diff options
author | Nelson Chu <nelson@rivosinc.com> | 2024-02-05 09:39:37 +0800 |
---|---|---|
committer | Nelson Chu <nelson@rivosinc.com> | 2024-05-08 12:34:58 +0800 |
commit | c144f638337944101131d9fe6de4ab908f6d4c2d (patch) | |
tree | c3dfb5240abd62be32e6ed7494dc11ae07e24f3c /ld/testsuite | |
parent | f0dbbf5401814b001c820a9fa07054329d1d7f46 (diff) | |
download | binutils-c144f638337944101131d9fe6de4ab908f6d4c2d.zip binutils-c144f638337944101131d9fe6de4ab908f6d4c2d.tar.gz binutils-c144f638337944101131d9fe6de4ab908f6d4c2d.tar.bz2 |
RISC-V: Support B, Zaamo and Zalrsc extensions.
* https://github.com/riscv/riscv-b/tags
Added standard B extension back, which implies Zba, Zbb and Zbs extensions.
* https://github.com/riscv/riscv-zaamo-zalrsc/tags
Splited standard A extension into two new extensions, Zaamo and Zalrsc.
The A extension implies Zaamo and Zalrsc extensions.
Not sure if we need to do the similar check as i and zicsr/zifencei.
Passed riscv[32|64]-[elf/linux] binutils testcases.
bfd/
* elfxx-riscv.c (riscv_implicit_subsets): Added imply rules
for A and B extensions. The A implies Zaamo and Zalrsc, the
B implies Zba, Zbb and Zbs.
(riscv_supported_std_ext): Supported B extension with v1.0.
(riscv_supported_std_z_ext): Supported Zaamo and Zalrsc with v1.0.
(riscv_multi_subset_supports, riscv_multi_subset_supports_ext): Updated.
include/
* opcode/riscv.h (riscv_insn_class): Removed INSN_CLASS_A, Added
INSN_CLASS_ZAAMO and INSN_CLASS_ZALRSC.
opcodes/
* riscv-opc.c (riscv_opcodes): Splited standard A extension into two
new extensions, Zaamo and Zalrsc.
gas/
* testsuite/gas/riscv/march-imply-a.d: New testcase.
* testsuite/gas/riscv/march-imply-b.d: New testcase.
* testsuite/gas/riscv/attribute-01.d: Updated.
* testsuite/gas/riscv/attribute-02.d: Updated.
* testsuite/gas/riscv/attribute-03.d: Updated.
* testsuite/gas/riscv/attribute-04.d: Updated.
* testsuite/gas/riscv/attribute-05.d: Updated.
* testsuite/gas/riscv/attribute-10.d: Updated.
* testsuite/gas/riscv/mapping-symbols.d: Updated.
* testsuite/gas/riscv/march-imply-g.d: Updated.
* testsuite/gas/riscv/march-imply-unsupported.d: Updated.
* testsuite/gas/riscv/march-ok-reorder.d: Updated.
ld/
* testsuite/ld-riscv-elf/attr-merge-arch-01.d: Updated.
* testsuite/ld-riscv-elf/attr-merge-arch-02.d: Updated.
* testsuite/ld-riscv-elf/attr-merge-arch-03.d: Updated.
* testsuite/ld-riscv-elf/attr-merge-user-ext-01.d: Updated.
Diffstat (limited to 'ld/testsuite')
-rw-r--r-- | ld/testsuite/ld-riscv-elf/attr-merge-arch-01.d | 2 | ||||
-rw-r--r-- | ld/testsuite/ld-riscv-elf/attr-merge-arch-02.d | 2 | ||||
-rw-r--r-- | ld/testsuite/ld-riscv-elf/attr-merge-arch-03.d | 2 | ||||
-rw-r--r-- | ld/testsuite/ld-riscv-elf/attr-merge-user-ext-01.d | 2 |
4 files changed, 4 insertions, 4 deletions
diff --git a/ld/testsuite/ld-riscv-elf/attr-merge-arch-01.d b/ld/testsuite/ld-riscv-elf/attr-merge-arch-01.d index de87f60..0fb655c 100644 --- a/ld/testsuite/ld-riscv-elf/attr-merge-arch-01.d +++ b/ld/testsuite/ld-riscv-elf/attr-merge-arch-01.d @@ -6,4 +6,4 @@ Attribute Section: riscv File Attributes - Tag_RISCV_arch: "rv32i2p1_a2p0" + Tag_RISCV_arch: "rv32i2p1_a2p0_zaamo1p0_zalrsc1p0" diff --git a/ld/testsuite/ld-riscv-elf/attr-merge-arch-02.d b/ld/testsuite/ld-riscv-elf/attr-merge-arch-02.d index 381ef85..10d01b1 100644 --- a/ld/testsuite/ld-riscv-elf/attr-merge-arch-02.d +++ b/ld/testsuite/ld-riscv-elf/attr-merge-arch-02.d @@ -6,4 +6,4 @@ Attribute Section: riscv File Attributes - Tag_RISCV_arch: "rv32i2p1_a2p0" + Tag_RISCV_arch: "rv32i2p1_a2p0_zaamo1p0_zalrsc1p0" diff --git a/ld/testsuite/ld-riscv-elf/attr-merge-arch-03.d b/ld/testsuite/ld-riscv-elf/attr-merge-arch-03.d index 6419fe8..9649931 100644 --- a/ld/testsuite/ld-riscv-elf/attr-merge-arch-03.d +++ b/ld/testsuite/ld-riscv-elf/attr-merge-arch-03.d @@ -6,4 +6,4 @@ Attribute Section: riscv File Attributes - Tag_RISCV_arch: "rv32i2p1_a2p0_xbar2p0_xfoo2p0" + Tag_RISCV_arch: "rv32i2p1_a2p0_zaamo1p0_zalrsc1p0_xbar2p0_xfoo2p0" diff --git a/ld/testsuite/ld-riscv-elf/attr-merge-user-ext-01.d b/ld/testsuite/ld-riscv-elf/attr-merge-user-ext-01.d index f4012dc..d71dd56 100644 --- a/ld/testsuite/ld-riscv-elf/attr-merge-user-ext-01.d +++ b/ld/testsuite/ld-riscv-elf/attr-merge-user-ext-01.d @@ -6,4 +6,4 @@ Attribute Section: riscv File Attributes - Tag_RISCV_arch: "rv32i2p1_a2p1" + Tag_RISCV_arch: "rv32i2p1_a2p1_zaamo1p0_zalrsc1p0" |