riscv-gnu-toolchain/binutils.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2017-06-06	ld: Allow section groups to be resolved as part of a relocatable link	Andrew Burgess	2	-0/+8
2017-06-01	PPC64_OPT_LOCALENTRY	Alan Modra	2	-0/+5
2017-05-31	Fix MinGW compilation warnings due to environ.h	Eli Zaretskii	2	-0/+6
2017-05-30	[ARC] Add arc-cpu.def with processor definitions	Anton Kolesov	2	-0/+53
2017-05-30	S/390: Improve error checking for optional operands	Andreas Krebbel	1	-3/+4
2017-05-30	S/390: Remove optional operand flag.	Andreas Krebbel	1	-10/+6
2017-05-24	Move print_insn_XXX to an opcodes internal header	Yao Qi	2	-78/+7
2017-05-24	Refactor disassembler selection	Yao Qi	2	-2/+10
2017-05-23	[ARC] Update MAX_INSN_FLGS.	claziss	2	-1/+5
2017-05-22	x86: Add NOTRACK prefix support	H.J. Lu	2	-0/+5
2017-05-19	binutils: support for the SPARC M8 processor	Jose E. Marchesi	3	-2/+58
2017-05-16	Rename non_ir_ref to non_ir_ref_regular	Alan Modra	2	-1/+6
2017-05-16	non_ir_ref_dynamic	Alan Modra	2	-5/+10
2017-05-15	MIPS16e2: Add MIPS16e2 ASE support	Maciej W. Rozycki	3	-6/+46
2017-05-14	Fix match and mask for 64-bit bb opcode.	John David Anglin	2	-1/+5
2017-05-10	[ARC] Object attributes.	Claudiu Zissulescu	4	-64/+146
2017-04-20	Handle symbol defined in IR and referenced in DSO	H.J. Lu	2	-0/+9
2017-04-19	Implement -z dynamic-undefined-weak	Alan Modra	2	-2/+8
2017-04-11	Reorder PPC_OPCODE_* and set PPC_OPCODE_TMR for e6500	Alan Modra	2	-43/+48
2017-04-11	Bye bye PPC_OPCODE_HTM and -mhtm	Alan Modra	2	-5/+1
2017-04-11	Bye Bye PPC_OPCODE_VSX3	Alan Modra	2	-3/+1
2017-04-11	Bye bye PPC_OPCODE_ALTIVEC2	Alan Modra	2	-3/+4
2017-04-06	Add support for disassembling WebAssembly opcodes.	Pip Cet	2	-0/+7
2017-04-05	-Wwrite-strings: Constify struct disassemble_info's disassembler_options field	Pedro Alves	2	-4/+10
2017-04-04	Support ELF SHF_GNU_MBIND and PT_GNU_MBIND_XXX	H.J. Lu	2	-0/+14
2017-04-04	RISC-V: Resurrect GP-relative disassembly hints	Palmer Dabbelt	2	-0/+7
2017-03-31	RISC-V: Add physical memory protection CSRs	Andrew Waterman	2	-0/+83
2017-03-30	Add support for the WebAssembly file format and the wasm32 ELF conversion to ...	Pip Cet	3	-0/+233
2017-03-29	PowerPC -Mraw disassembly	Alan Modra	2	-37/+48
2017-03-27	Add minimal support for WebAssembly backend to the BFD library.	Pip Cet	2	-0/+32
2017-03-27	Implement ARC NPS-400 Ultra Ip and Miscellaneous instructions.	Rinat Zelig	2	-6/+12
2017-03-21	S/390: Remove vx2 facility flag	Andreas Krebbel	2	-2/+6
2017-03-21	arc/nps400: Add cp16/cp32 instructions to opcodes library	Rinat Zelig	2	-0/+5
2017-03-16	Add support for a GNU BUILD note type to record the enum size.	Nick Clifton	2	-0/+6
2017-03-14	Add DW_OP_GNU_variable_value	H.J. Lu	2	-0/+8
2017-03-13	Sync libiberty sources with GCC.	Nick Clifton	2	-2/+16
2017-03-13	Rename R_AARCH64_TLSDESC_LD64_LO12_NC to R_AARCH64_TLSDESC_LD64_LO12 and R_AA...	Nick Clifton	2	-2/+10
2017-03-10	Add basic recognition of new EM_ ELF machine numbers.	Nick Clifton	2	-18/+20
2017-03-08	Properly dump NT_GNU_PROPERTY_TYPE_0	H.J. Lu	2	-0/+18
2017-03-01	Add support for displaying and merging GNU_BUILD_NOTEs.	Nick Clifton	2	-0/+88
2017-02-28	GDB: Add support for the new set/show disassembler-options commands.	Peter Bergner	2	-4/+53
2017-02-28	PowerPC addpcis fix	Alan Modra	3	-2/+15
2017-02-24	[AArch64] Additional SVE instructions	Richard Sandiford	2	-0/+13
2017-02-24	[AArch64] Add a "compnum" feature	Richard Sandiford	2	-1/+8
2017-02-24	Add new counter-enable CSRs	Andrew Waterman	2	-0/+11
2017-02-23	S/390: Add support for new cpu architecture - arch12.	Andreas Krebbel	1	-1/+4
2017-02-23	opcodes,gas: associate SPARC ASIs with an architecture level.	Sheldon Lobo	1	-1/+9
2017-02-15	Add SFENCE.VMA instruction	Andrew Waterman	2	-0/+9
2017-02-14	PowerPC register expression checks	Alan Modra	2	-70/+84
2017-02-06	[ARC] Provide an interface to decode ARC instructions.	Claudiu Zissulescu	1	-1/+23