| Age | Commit message (Collapse) | Author | Files | Lines |
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If a section has a non-zero entry size, its total size would generally
better be a multiple of the entry size. Warn if that's not the case.
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Commit 1ac26e9f7ac2 replaced ISSPACE with is_whitespace, but the
former returns true on EOL while the latter does not. Sprinkle
is_end_of_stmt tests to fix this bug.
The same segfault can be triggered by a ".relax_hint" with no
following instructions. Fix that too.
* config/tc-nds32.c (nds32_lookup_pseudo_opcode): Use
is_end_of_stmt along with is_whitespace.
(nds32_relax_relocs, nds32_relax_hint, nds32_flag),
(ict_model: Likewise.
(nds32_elf_append_relax_relocs): Return on no opcode.
* testsuite/gas/nds32/nds32.exp: Find .d files automatically.
* testsuite/gas/nds32/pr33229.d,
* testsuite/gas/nds32/pr33229.s: New test.
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This patch adds missing header guards in some of the tc-<arch>.h,
and merely comments on the corresponding #endif for others. The
patch does not aim at being exhaustive, it only touched the files
relevant for [1].
[1]: https://inbox.sourceware.org/binutils/20250711112913.2453285-1-matthieu.longo@arm.com/
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Add faminmax, move a couple of misplaced entries, and improve a few
other entries.
The documentation now lists every recognised extension name, with the
exception of a couple of aliases that are deliberately undocumented.
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Change dependency on sve2/sme2 to sve2p1/sme2p1.
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over gas directive to emit .sframe section.
Fix PR gas/33175 sframe: --gsframe=no does not disable when
.cfi_sections directive with .sframe
--gsframe=no should also disable generation of SFrame section when
explicit CFI directive:
.cfi_sections .sframe
is specified in the input. This means we need to track whether SFrame
generation was explicitly disabled by the user. Introduce a new enum to
facilitate disambiguation between GEN_SFRAME_DEFAULT_NONE and
GEN_SFRAME_DISABLED.
While fixing the bug by adding the enum, keep the upcoming requirement
in mind: we will also need to disambiguate between
--enable-default-sframe and user-specified --gsframe/--gsframe=yes. The
intent is to not display SFrame related warnings or errors like:
as_bad (_(".sframe not supported for target"));
for unsupported targets if --enable-default-sframe is in effect.
This implies we need to have a four state enum (
GEN_SFRAME_DEFAULT_NONE, GEN_SFRAME_CONFIG_ENABLED,
GEN_SFRAME_DISABLED, GEN_SFRAME_ENABLED)
gas/
PR gas/33175
* dw2gencfi.c (cfi_finish): Check state of flag_gen_sframe to
determine whether any SFrame section is generated.
* as.h (enum gen_sframe_option): New definition.
* as.c (parse_args): Keep track of whether the flag is
explicitly enabled or disabled
gas/testsuite/
PR gas/33175
* gas/cfi-sframe/cfi-sframe-common-1.d: Remove redundant
--gsframe.
* gas/cfi-sframe/cfi-sframe.exp: Add new test.
* gas/cfi-sframe/cfi-sframe-common-1c.d: New test. No SFrame
section if explicit --gsframe=no.
* gas/cfi-sframe/cfi-sframe-common-1c.s: New test.
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SFrame generation code assumes that since DW_CFA_restore means
restoration of the state of the register to the one at the beginning of
the function, there must be a state to restore to (hence the gas_assert
(cie_fre)).
This assumption needs adjustment. DW_CFA_restore may be present in the
very beginning of a (e.g., cold) function, with no initialized state for
SFrame functions to restore to.
gas/
PR gas/33170
* gas/gen-sframe.c (sframe_xlate_do_restore): Use current FRE if
CIE FRE is not yet setup.
gas/testsuite/
PR gas/33170
* gas/cfi-sframe/cfi-sframe.exp: New test.
* gas/cfi-sframe/cfi-sframe-x86_64-pr33170.d: New test.
* gas/cfi-sframe/cfi-sframe-x86_64-pr33170.s: New test.
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NaCl has been deprecated:
https://developer.chrome.com/docs/native-client/migration/
It is now in the process of being removed from llvm:
https://github.com/llvm/llvm-project/pull/133661
Remove NaCl/arm target support from bfd, binutils, gas and ld.
bfd/
* Makefile.am (BFD32_BACKENDS): Remove elf-nacl.lo.
(BFD32_BACKENDS_CFILES): Remove elf-nacl.c.
(SOURCE_HFILES): Remove elf-nacl.h.
* Makefile.in: Regenerated.
* config.bfd: Add *-*-nacl* to obsolete targets.
Remove *-*-nacl* targets.
* configure.ac: Remove nacl target vectors.
* elf-bfd.h (elf_target_os): Remove is_nacl.
* elf-nacl.c: Removed.
* elf-nacl.h: Likewise.
* elf32-arm.c: Don't include "elf-nacl.h".
(elf32_arm_nacl_plt0_entry): Removed.
(elf32_arm_nacl_plt_entry): Likewise.
(elf32_arm_stub_long_branch_arm_nacl): Likewise.
(elf32_arm_stub_long_branch_arm_nacl_pic): Likewise.
(arm_movw_immediate): Likewise.
(arm_movt_immediate): Likewise.
(arm_nacl_put_plt0): Likewise.
(elf32_arm_nacl_link_hash_table_create): Likewise.
(elf32_arm_nacl_modify_segment_map): Likewise.
(elf32_arm_nacl_final_write_processing): Likewise.
(elf32_arm_nacl_plt_sym_val): Likewise.
(elf32_arm_stub_cmse_branch_thumb_only): Remove
long_branch_arm_nacl and long_branch_arm_nacl_pic entries.
(arm_type_of_stub): Updated.
(elf32_arm_create_or_find_stub_sec): Likewise.
(arm_stub_required_alignment): Likewise.
(elf32_arm_allocate_plt_entry): Likewise.
(elf32_arm_populate_plt_entry): Likewise.
(elf32_arm_finish_dynamic_sections): Likewise.
(elf32_arm_output_plt_map_1): Likewise.
(elf32_arm_output_arch_local_syms): Likewise.
Remove elf32_arm_nacl_bed.
* targets.c: Remove NaCl target vectors.
* bfd-in2.h: Regenerated.
* configure: Likewise.
* po/SRC-POTFILES.in: Likewise.
binutils/
* NEWS: Mention NaCl target support removal.
* testsuite/lib/binutils-common.exp: Remove NaCl target support.
gas/
* NEWS: Mention NaCl target support removal.
* configure.tgt: Likewise.
* config/tc-arm.c: Remove NaCl target support.
* testsuite/gas/arm/any-armv8m.d: Likewise.
* testsuite/gas/arm/any-cmse-main.d: Likewise.
* testsuite/gas/arm/any-cmse.d: Likewise.
* testsuite/gas/arm/any-idiv.d: Likewise.
* testsuite/gas/arm/arch4t-eabi.d: Likewise.
* testsuite/gas/arm/arch4t.d: Likewise.
* testsuite/gas/arm/armv8m.base-idiv.d: Likewise.
* testsuite/gas/arm/armv9-a_arch.d: Likewise.
* testsuite/gas/arm/attr-abi-hardfp-use-0.d: Likewise.
* testsuite/gas/arm/attr-abi-hardfp-use-1.d: Likewise.
* testsuite/gas/arm/attr-abi-hardfp-use-2.d: Likewise.
* testsuite/gas/arm/attr-abi-hardfp-use-3.d: Likewise.
* testsuite/gas/arm/attr-any-armv4t.d: Likewise.
* testsuite/gas/arm/attr-any-thumbv6.d: Likewise.
* testsuite/gas/arm/attr-arch-assumption.d: Likewise.
* testsuite/gas/arm/attr-cpu-directive.d: Likewise.
* testsuite/gas/arm/attr-default.d: Likewise.
* testsuite/gas/arm/attr-empty-string.d: Likewise.
* testsuite/gas/arm/attr-ext-fpv5-d16.d: Likewise.
* testsuite/gas/arm/attr-ext-fpv5.d: Likewise.
* testsuite/gas/arm/attr-ext-idiv.d: Likewise.
* testsuite/gas/arm/attr-ext-mp.d: Likewise.
* testsuite/gas/arm/attr-ext-neon-fp16.d: Likewise.
* testsuite/gas/arm/attr-ext-neon-vfpv3.d: Likewise.
* testsuite/gas/arm/attr-ext-neon-vfpv4.d: Likewise.
* testsuite/gas/arm/attr-ext-sec.d: Likewise.
* testsuite/gas/arm/attr-ext-vfpv3-d16-fp16.d: Likewise.
* testsuite/gas/arm/attr-ext-vfpv3-d16.d: Likewise.
* testsuite/gas/arm/attr-ext-vfpv3-fp16.d: Likewise.
* testsuite/gas/arm/attr-ext-vfpv3.d: Likewise.
* testsuite/gas/arm/attr-ext-vfpv3xd-fp.d: Likewise.
* testsuite/gas/arm/attr-ext-vfpv3xd.d: Likewise.
* testsuite/gas/arm/attr-ext-vfpv4-d16.d: Likewise.
* testsuite/gas/arm/attr-ext-vfpv4-sp-d16.d: Likewise.
* testsuite/gas/arm/attr-ext-vfpv4.d: Likewise.
* testsuite/gas/arm/attr-march-all.d: Likewise.
* testsuite/gas/arm/attr-march-armv1.d: Likewise.
* testsuite/gas/arm/attr-march-armv2.d: Likewise.
* testsuite/gas/arm/attr-march-armv2a.d: Likewise.
* testsuite/gas/arm/attr-march-armv2s.d: Likewise.
* testsuite/gas/arm/attr-march-armv3.d: Likewise.
* testsuite/gas/arm/attr-march-armv3m.d: Likewise.
* testsuite/gas/arm/attr-march-armv4.d: Likewise.
* testsuite/gas/arm/attr-march-armv4t.d: Likewise.
* testsuite/gas/arm/attr-march-armv4txm.d: Likewise.
* testsuite/gas/arm/attr-march-armv4xm.d: Likewise.
* testsuite/gas/arm/attr-march-armv5.d: Likewise.
* testsuite/gas/arm/attr-march-armv5t.d: Likewise.
* testsuite/gas/arm/attr-march-armv5te.d: Likewise.
* testsuite/gas/arm/attr-march-armv5tej.d: Likewise.
* testsuite/gas/arm/attr-march-armv5texp.d: Likewise.
* testsuite/gas/arm/attr-march-armv5txm.d: Likewise.
* testsuite/gas/arm/attr-march-armv6-m+os.d: Likewise.
* testsuite/gas/arm/attr-march-armv6-m.d: Likewise.
* testsuite/gas/arm/attr-march-armv6.d: Likewise.
* testsuite/gas/arm/attr-march-armv6j.d: Likewise.
* testsuite/gas/arm/attr-march-armv6k+sec.d: Likewise.
* testsuite/gas/arm/attr-march-armv6k.d: Likewise.
* testsuite/gas/arm/attr-march-armv6kt2.d: Likewise.
* testsuite/gas/arm/attr-march-armv6kz.d: Likewise.
* testsuite/gas/arm/attr-march-armv6kzt2.d: Likewise.
* testsuite/gas/arm/attr-march-armv6s-m.d: Likewise.
* testsuite/gas/arm/attr-march-armv6t2.d: Likewise.
* testsuite/gas/arm/attr-march-armv6z.d: Likewise.
* testsuite/gas/arm/attr-march-armv6zk.d: Likewise.
* testsuite/gas/arm/attr-march-armv6zkt2.d: Likewise.
* testsuite/gas/arm/attr-march-armv6zt2.d: Likewise.
* testsuite/gas/arm/attr-march-armv7-a+idiv.d: Likewise.
* testsuite/gas/arm/attr-march-armv7-a+mp.d: Likewise.
* testsuite/gas/arm/attr-march-armv7-a+sec+virt.d: Likewise.
* testsuite/gas/arm/attr-march-armv7-a+sec.d: Likewise.
* testsuite/gas/arm/attr-march-armv7-a+virt.d: Likewise.
* testsuite/gas/arm/attr-march-armv7-a.d: Likewise.
* testsuite/gas/arm/attr-march-armv7-m.d: Likewise.
* testsuite/gas/arm/attr-march-armv7-r+mp.d: Likewise.
* testsuite/gas/arm/attr-march-armv7-r.d: Likewise.
* testsuite/gas/arm/attr-march-armv7.d: Likewise.
* testsuite/gas/arm/attr-march-armv7a.d: Likewise.
* testsuite/gas/arm/attr-march-armv7em.d: Likewise.
* testsuite/gas/arm/attr-march-armv7m.d: Likewise.
* testsuite/gas/arm/attr-march-armv7r.d: Likewise.
* testsuite/gas/arm/attr-march-armv7ve.d: Likewise.
* testsuite/gas/arm/attr-march-armv8-a+crypto.d: Likewise.
* testsuite/gas/arm/attr-march-armv8-a+fp.d: Likewise.
* testsuite/gas/arm/attr-march-armv8-a+rdma.d: Likewise.
* testsuite/gas/arm/attr-march-armv8-a+simd.d: Likewise.
* testsuite/gas/arm/attr-march-armv8-a.d: Likewise.
* testsuite/gas/arm/attr-march-armv8-r+crypto.d: Likewise.
* testsuite/gas/arm/attr-march-armv8-r+fp.d: Likewise.
* testsuite/gas/arm/attr-march-armv8-r+simd.d: Likewise.
* testsuite/gas/arm/attr-march-armv8-r.d: Likewise.
* testsuite/gas/arm/attr-march-armv8_1-a+simd.d: Likewise.
* testsuite/gas/arm/attr-march-armv8_1-m.main.d: Likewise.
* testsuite/gas/arm/attr-march-armv8_4-a.d: Likewise.
* testsuite/gas/arm/attr-march-armv8_5-a.d: Likewise.
* testsuite/gas/arm/attr-march-armv8_6-a.d: Likewise.
* testsuite/gas/arm/attr-march-armv8_7-a.d: Likewise.
* testsuite/gas/arm/attr-march-armv8_8-a.d: Likewise.
* testsuite/gas/arm/attr-march-armv8_9-a.d: Likewise.
* testsuite/gas/arm/attr-march-armv9_1-a.d: Likewise.
* testsuite/gas/arm/attr-march-armv9_2-a.d: Likewise.
* testsuite/gas/arm/attr-march-armv9_3-a.d: Likewise.
* testsuite/gas/arm/attr-march-armv9_4-a.d: Likewise.
* testsuite/gas/arm/attr-march-armv9_5-a.d: Likewise.
* testsuite/gas/arm/attr-march-armv8m.base.d: Likewise.
* testsuite/gas/arm/attr-march-armv8m.main.d: Likewise.
* testsuite/gas/arm/attr-march-armv8m.main.dsp.d: Likewise.
* testsuite/gas/arm/attr-march-iwmmxt.d: Likewise.
* testsuite/gas/arm/attr-march-iwmmxt2.d: Likewise.
* testsuite/gas/arm/attr-march-xscale.d: Likewise.
* testsuite/gas/arm/attr-mcpu.d: Likewise.
* testsuite/gas/arm/attr-mfpu-arm1020e.d: Likewise.
* testsuite/gas/arm/attr-mfpu-arm1020t.d: Likewise.
* testsuite/gas/arm/attr-mfpu-arm1136jf-s.d: Likewise.
* testsuite/gas/arm/attr-mfpu-arm1136jfs.d: Likewise.
* testsuite/gas/arm/attr-mfpu-neon-fp16.d: Likewise.
* testsuite/gas/arm/attr-mfpu-neon.d: Likewise.
* testsuite/gas/arm/attr-mfpu-softvfp+vfp.d: Likewise.
* testsuite/gas/arm/attr-mfpu-softvfp.d: Likewise.
* testsuite/gas/arm/attr-mfpu-vfp.d: Likewise.
* testsuite/gas/arm/attr-mfpu-vfp10-r0.d: Likewise.
* testsuite/gas/arm/attr-mfpu-vfp10.d: Likewise.
* testsuite/gas/arm/attr-mfpu-vfp3.d: Likewise.
* testsuite/gas/arm/attr-mfpu-vfp9.d: Likewise.
* testsuite/gas/arm/attr-mfpu-vfpv2.d: Likewise.
* testsuite/gas/arm/attr-mfpu-vfpv3-d16.d: Likewise.
* testsuite/gas/arm/attr-mfpu-vfpv3.d: Likewise.
* testsuite/gas/arm/attr-mfpu-vfpv4-d16.d: Likewise.
* testsuite/gas/arm/attr-mfpu-vfpv4.d: Likewise.
* testsuite/gas/arm/attr-mfpu-vfpxd.d: Likewise.
* testsuite/gas/arm/attr-names.d: Likewise.
* testsuite/gas/arm/attr-non-null-terminated-string.d: Likewise.
* testsuite/gas/arm/attr-order.d: Likewise.
* testsuite/gas/arm/attr-override-cpu-directive.d: Likewise.
* testsuite/gas/arm/attr-override-mcpu.d: Likewise.
* testsuite/gas/arm/bl-local-2.d: Likewise.
* testsuite/gas/arm/bl-local-v4t.d: Likewise.
* testsuite/gas/arm/blx-local.d: Likewise.
* testsuite/gas/arm/branch-reloc.d: Likewise.
* testsuite/gas/arm/directives.d: Likewise.
* testsuite/gas/arm/got_prel.d: Likewise.
* testsuite/gas/arm/mapdir.d: Likewise.
* testsuite/gas/arm/mapmisc.d: Likewise.
* testsuite/gas/arm/mapsecs.d: Likewise.
* testsuite/gas/arm/mapshort-eabi.d: Likewise.
* testsuite/gas/arm/mov-highregs-any.d: Likewise.
* testsuite/gas/arm/mov-lowregs-any.d: Likewise.
* testsuite/gas/arm/note-march-armv2.d: Likewise.
* testsuite/gas/arm/note-march-armv2a.d: Likewise.
* testsuite/gas/arm/note-march-armv3.d: Likewise.
* testsuite/gas/arm/note-march-armv3m.d: Likewise.
* testsuite/gas/arm/note-march-armv4.d: Likewise.
* testsuite/gas/arm/note-march-armv4t.d: Likewise.
* testsuite/gas/arm/note-march-armv5.d: Likewise.
* testsuite/gas/arm/note-march-armv5t.d: Likewise.
* testsuite/gas/arm/note-march-armv5te.d: Likewise.
* testsuite/gas/arm/note-march-iwmmxt.d: Likewise.
* testsuite/gas/arm/note-march-iwmmxt2.d: Likewise.
* testsuite/gas/arm/note-march-xscale.d: Likewise.
* testsuite/gas/arm/pr12198-1.d: Likewise.
* testsuite/gas/arm/pr12198-2.d: Likewise.
* testsuite/gas/arm/thumb-eabi.d: Likewise.
* testsuite/gas/arm/thumb.d: Likewise.
* testsuite/gas/arm/thumbrel.d: Likewise.
* config/te-nacl.h: Removed.
ld/
* Makefile.am (ALL_EMULATION_SOURCES): Remove earmelf_nacl.c and
and earmelfb_nacl.c.
Remove NaCl dep files.
* NEWS: Mention NaCl target support removal.
* configure.tgt: Remove NaCl target support.
* Makefile.in: Regenerated.
* configure: Likewise.
* po/BLD-POTFILES.in: Likewise.
* emulparams/armelf_nacl.sh: Removed.
* emulparams/armelfb_nacl.sh: Likewise.
* emulparams/elf_nacl.sh: Likewise.
* testsuite/ld-arm/farcall-arm-nacl-pic.d: Likewise.
* testsuite/ld-arm/farcall-arm-nacl.d: Likewise.
* testsuite/ld-arm/farcall-data-nacl.d: Likewise.
* testsuite/ld-arm/farcall-thumb2-purecode-consecutive-veneer.d:
Adjusted.
* testsuite/ld-arm/arm-elf.exp: Remove NaCl target support.
* testsuite/ld-arm/cortex-a8-far.d: Likewise.
* testsuite/ld-arm/non-contiguous-arm3.d: Likewise.
* testsuite/ld-arm/non-contiguous-arm6.d: Likewise.
* testsuite/ld-elf/binutils.exp: Likewise.
* testsuite/ld-elf/build-id.exp: Likewise.
* testsuite/ld-elf/ehdr_start-missing.d: Likewise.
* testsuite/ld-elf/ehdr_start-shared.d: Likewise.
* testsuite/ld-elf/ehdr_start-userdef.d: Likewise.
* testsuite/ld-elf/ehdr_start-weak.d: Likewise.
* testsuite/ld-elf/ehdr_start.d: Likewise.
* testsuite/ld-elf/elf.exp: Likewise.
* testsuite/ld-elf/export-class.exp: Likewise.
* testsuite/ld-elf/fatal-warnings-1a.d: Likewise.
* testsuite/ld-elf/fatal-warnings-1b.d: Likewise.
* testsuite/ld-elf/orphan-region.d: Likewise.
* testsuite/ld-elf/package-note.exp: Likewise.
* testsuite/ld-elf/pr16322.d: Likewise.
* testsuite/ld-elf/pr16498a.d: Likewise.
* testsuite/ld-elf/pr16498b.d: Likewise.
* testsuite/ld-elf/pr19162.d: Likewise.
* testsuite/ld-elf/pr22269a.d: Likewise.
* testsuite/ld-elf/pr22269b.d: Likewise.
* testsuite/ld-elf/pr22393-1a.d: Likewise.
* testsuite/ld-elf/pr22393-1b.d: Likewise.
* testsuite/ld-elf/pr22393-1c.d: Likewise.
* testsuite/ld-elf/pr22393-1d.d: Likewise.
* testsuite/ld-elf/pr22393-1e.d: Likewise.
* testsuite/ld-elf/pr22393-1f.d: Likewise.
* testsuite/ld-elf/pr22393-2a.rd: Likewise.
* testsuite/ld-elf/pr22393-2b.rd: Likewise.
* testsuite/ld-elf/pr23900-1-32.rd: Likewise.
* testsuite/ld-elf/pr23900-1-64.rd: Likewise.
* testsuite/ld-elf/pr23900-1.d: Likewise.
* testsuite/ld-elf/pr23900-2a.d: Likewise.
* testsuite/ld-elf/pr23900-2b.d: Likewise.
* testsuite/ld-elf/pr30508.d: Likewise.
* testsuite/ld-elf/pr30907-1.d: Likewise.
* testsuite/ld-elf/pr30907-2.d: Likewise.
* testsuite/ld-elf/pr32341.d: Likewise.
* testsuite/ld-elf/shared.exp: Likewise.
* testsuite/ld-elf/tls.exp: Likewise.
* testsuite/ld-elf/tls_common.exp: Likewise.
* testsuite/ld-elfvers/vers.exp: Likewise.
* testsuite/ld-elfvsb/elfvsb.exp: Likewise.
* testsuite/ld-elfweak/elfweak.exp: Likewise.
* testsuite/ld-gc/gc.exp: Likewise.
* testsuite/ld-ifunc/binutils.exp: Likewise.
* testsuite/ld-pie/pie.exp: Likewise.
* testsuite/ld-plugin/lto-binutils.exp: Likewise.
* testsuite/ld-plugin/lto.exp: Likewise.
* testsuite/ld-scripts/rgn-at3.d: Likewise.
* testsuite/ld-shared/shared.exp: Likewise.
* testsuite/ld-size/size.exp: Likewise.
Signed-off-by: H.J. Lu <hjl.tools@gmail.com>
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.bundle_align_mode 32
nop
read.c:776:26: runtime error: shift exponent 32 is too large for
32-bit type 'unsigned int'
Avoid this by using wider types in the expressions.
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I omitted documentation in 8aad677a12832885acd5be1de8f41e740b8e713d in
error. Rectify that with:
1) changing ---help to mention bare `--gsframe` too, as we're not
getting rid of that;
2) adding the new --gsframe=[no|yes] form to as.texi.
PR gas/33125
* gas/as.c (parse_args): Tweak --gsframe= help text.
* gas/doc/as.texi: Document --gsframe=[no|yes].
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PR gas/33125
* gas/as.c (parse_args): Re-indent case OPTION_SFRAME:
Signed-off-by: H.J. Lu <hjl.tools@gmail.com>
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Being able to explicitly disable SFrames on the command line is useful,
especially when looking at a gas that enables SFrames by default. The
binutils testsuite will benefit from this as there's testcases that don't
expect their presence.
In summary:
* Nothing is passed => no SFrames (no change from before)
* --gsframe is passed => SFrames (no change from before)
* --gsframe=yes is passed => SFrames (previously rejected)
* --gsframe-no is passed => no SFrames (previously rejected)
PR gas/33125
* gas/as.c (parse_args): Accept --gsframe=no, --gsframe=yes.
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This reverts commit e6b2368b9556ea6298a1f0de97baeabf1b5b18fd.
I made a last minute style change and oopsed it.
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Being able to explicitly disable SFrames on the command line is useful,
especially when looking at a gas that enables SFrames by default. The
binutils testsuite will benefit from this as there's testcases that don't
expect their presence.
In summary:
* Nothing is passed => no SFrames (no change from before)
* --gsframe is passed => SFrames (no change from before)
* --gsframe=yes is passed => SFrames (previously rejected)
* --gsframe-no is passed => no SFrames (previously rejected)
PR gas/33125
* gas/as.c (parse_args): Accept --gsframe=no, --gsframe=yes.
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asan complains when running the gas all/cond-diag test.
* read.c (deferred_diag_head, deferred_diag_tail): Renamed
from deferred_diags and last_deferred_diag, making the tail
pointer a deferred_diag**.
(s_errwarn_if): Simplify appending to list. Free unused diag
on error.
(evaluate_deferred_diags): Free list.
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These aren't needed since commit 862776f26a59.
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SDCC assembly output uses 5-digit numeric dollar sign labels, padded
with zeros. Commit 226749d made these invalid, and broke the Z80 SDCC
compatibility mode in GAS.
https://sourceware.org/git/?p=binutils-gdb.git;a=commit;h=226749d5a6ff0d5c607d6428d6c81e1e7e7a994b
This restores SDCC compatibility by replacing the leading zeros with
spaces when inside dollar local labels and when SDCC compatibility is
enabled. It also restores the SDCC test case to represent actual
syntax emitted by SDCC, and adds a note explaining the purpose of
the test.
Bug: https://sourceware.org/bugzilla/show_bug.cgi?id=33030
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Move gas_sframe_check to binutils-common.exp so that it can be used in
linker tests to check if a target assembler supports --gsframe.
binutils/
PR ld/33146
* testsuite/lib/binutils-common.exp (gas_sframe_check): Moved
from cfi-sframe.exp. Replace gas_host_run with remote_exec.
gas/
PR ld/33146
* testsuite/gas/cfi-sframe/cfi-sframe.exp (gas_sframe_check):
Moved to binutils-common.exp.
Signed-off-by: H.J. Lu <hjl.tools@gmail.com>
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Process a new aarch64-specific CFI directive: .cfi_mte_tagged_frame
(LLVM uses this CFI directive already). The CFI directive, when
present for a function, indicates that the stack frame for the
function may modify the MTE tags of the stack space it uses. The
assembler emits char 'G' in the CIE augmentation string to indicate
the same.
ChangeLog:
* gas/config/tc-aarch64.c (s_aarch64_mte_tagged_frame): New
definition.
* gas/config/tc-aarch64.h (tc_fde_entry_extras): Add
memtag_frame_p.
(tc_cie_entry_extras): Likewise.
(tc_fde_entry_init_extra): Likewise.
(tc_cie_fde_equivalent_extra): Likewise.
(tc_cie_entry_init_extra): Likewise.
* gas/doc/c-aarch64.texi: Add documentation for
.cfi_mte_tagged_frame directive.
* gas/testsuite/gas/aarch64/mte_tagged_stack.d: New test.
* gas/testsuite/gas/aarch64/mte_tagged_stack.s: New test.
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Add a new flag -menable-sysreg-checking to restore previous behaviour.
This existing behaviour is quite inconsistent, so the gating will
probably be updated in the future. (In particular, many system
registers are currently gated with the architecture version they were
released with instead of the lower architecture version that they
actually require).
This patch retains the +d128 requirement for msrr/mrrs.
Co-Authored-By: Srinath Parvathaneni <srinath.parvathaneni@arm.com>
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By default, NIL qualifiers are treated as matching any qualifier when
checking operand constraints. For many SVE instructions, this would
allow operands with missing type suffixes to be assembled as if they had
any explicit type specified. To prevent this, the F_STRICT flag is used
to specify that NIL qualifiers should match only NIL qualifiers.
Unfortunately, several SVE instructions incorrectly omitted this
F_STRICT flag. The bug has existed in the *MATMUL_SVE* macros since
they were added in 2019. The macro LUT_SVE2_INSN was added last year,
and the other incorrect macros are new in this release.
LUTv2_SME2_INSN and LUTv2_SME2p1_INSN were not actually broken, because
we reject untyped vector lists already during parsing. However, I have
added the F_STRICT flag here anyway, since this is more consistent and
would be more robust if those operands start accepting untyped vector
lists in the future. The new luti4 tests are the only ones that were
already rejected before this change.
BFLOAT16_SVE_INSN has been unused since it was originally added, so I
just deleted the macro.
The SVE LUT instructions were using the lut instruction class, which
has special handling only for SIMD operands, and isn't recognised by
aarch64_decode_variant_using_iclass (which sets the qualifiers during
decode for most SVE instructions). To prevent these instructions
failing to disassemble, I changed their instruction class to sve_misc.
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Previously the choice of error message for an invalid movprfx sequence
used the architecture requirements to determine whether an instruction
was an SVE instruction or not. This meant specifying SVE or SVE2 as an
explicit architecture requirement for all SVE instructions, even when
this was already implied by another feature. As more architecture
features are added and with the partial removal of the SME->SVE2
dependency, these extra feature requirements were getting messier and
easier to forget.
Instead, we now look at the operand types. If there is an SVE_REG,
SVE_REGLIST or PRED_REG operand, then we treat the instruction as an SVE
instruction. This does change behaviour slightly, but it only affects
the choice of error message and the new choice should be a bit more
consistent.
There is one testsuite update required, because Ezra's SVE_AES2 patch
temporarily broke classification of FEAT_SVE_AES instructions. This
patch restores the original behaviour.
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When parsing immediate values, register names should not be
misinterpreted as symbols. However, for backwards compatibility we need
to permit some newer register names within older instructions. The
current mechanism for doing so depends on the list of explicit
architecture requirements for the instructions, which is fragile and
easy to forget, and grows increasingly messy as more architecture
features are added.
This patch add explicit flags to each opcode to indicate which set of
register names is disallowed in each instance. These flags are
mandatory for all opcodes with immediate operands, which ensures that
the choice of disallowed names will always be deliberate and explicit.
This patch should have no functional change.
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So far, SFrame sections were of type SHT_PROGBITS.
As per ELF specification, SHT_PROGBITS indicates that the section holds
information defined by the program, whose format and meaning are
determined solely by the program.
On the linker side, SHT_PROGBITS should be reserved for the simple "cat
contents after applying relocs" semantics.
Currently, the only way to know that a section contains SFrame stack
trace data is if consumer checks for section name. Such a check for
section name is not quite conformant to ELF principles.
Some of this was discussed here
https://sourceware.org/pipermail/binutils/2025-March/140181.html
With this change, the SFrame sections generated by gas, ld will have
section type set to SHT_GNU_SFRAME. The new section type is defined in
the SHT_LOOS/SHT_HIOS space. The SFrame parsing routine
_bfd_elf_parse_sframe () now admits sections only when the the section
type is SHT_GNU_SFRAME.
No special handling / validation is done at the moment for the case of
manual creation of SFrame sections via obj_elf_section (). Add function
level comments for now to add a note about this.
Although the default handling for (sh_type >= SHT_LOOS && sh_type <=
SHT_HIOS) is sufficient when SHT_GNU_SFRAME is in that range, it makes
sense to add it as a case of its own.
bfd/
* elf-sframe.c (_bfd_elf_parse_sframe): Check if section type is
SHT_GNU_SFRAME.
(_bfd_elf_set_section_sframe): Set SHT_GNU_SFRAME for output
SFrame section.
* elflink.c (obj_elf_section): Use section type for check
instead of section name.
* elfxx-x86.c: Set SHT_GNU_SFRAME for SFrame sections for
.plt* sections.
* elf.c (bfd_section_from_shdr): Add case for SHT_GNU_SFRAME.
binutils/
* readelf.c (get_os_specific_section_type_name): Add
SHT_GNU_SFRAME.
gas/
* NEWS: Announce emitted SFrame sections have SHT_GNU_SFRAME
set.
* config/obj-elf.c (obj_elf_attach_to_group): Add comments to
indicate no special handling for SFrame yet.
* dw2gencfi.c (cfi_finish): Set SHT_GNU_SFRAME for emitted
SFrame section.
ld/
* NEWS: Announce emitted SFrame sections have SHT_GNU_SFRAME
set.
gas/testsuite/
* gas/cfi-sframe/cfi-sframe.exp: Add new test.
* gas/cfi-sframe/cfi-sframe-common-1b.d: New test.
* gas/cfi-sframe/cfi-sframe-common-1b.s: New test.
include/
* elf/common.h (SHT_GNU_SFRAME): Add new section type for SFrame
stack trace information.
libsframe/doc/
* sframe-spec.texi: Add expected ELF section type.
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SFrame is generated for ELF targets only. Guard the block with
support_sframe_p like others for consistency.
Also, in a later commit, we would like to do a:
elf_section_type (sframe_seg) = SHT_GNU_SFRAME;
This cannot be done for non-ELF targets, hence the need to guard with
some pre-processor conditional to enable it for only OBJ_ELF. Guarding
with support_sframe_p works for now, because those targets that support
SFrame define support_sframe_p:
- x86_64 and aarch64 define support_sframe_p when OBJ_ELF is defined
- s390x has no non-LEF target.
We continue to issue an error on targets where SFrame is not supported:
.sframe not supported for target
gas/
* dw2gencfi.c (cfi_finish): Guard with support_sframe_p.
(support_sframe_p): Remove stub to define to false for backends
not supporting SFrame.
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Signed-off-by: WANG Xuerui <git@xen0n.name>
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This corrects the DTPREL_HI16/LO16 and TPREL_HI16/LO16 howtos to use
_bfd_mips_elf_{hi,lo}16_reloc special functions, in order to support
addends outside the range [0,32767] on these relocations.
R_MIPS_GOT_HI16, R_MIPS_GOT_LO16, R_MIPS_CALL_HI16 and R_MIPS_CALL_LO16
are left alone as it seems that we (quite reasonably) only support
zero addends for those relocs.
PR 19977
bfd/
* elf32-mips.c (elf_mips_howto_table_rel): Set special_function
to _bfd_mips_elf_hi16_reloc for R_MIPS_TLS_DTPREL_HI16 and
R_MIPS_TLS_TPREL_HI16. Set special_function to
_bfd_mips_elf_lo16_reloc for R_MIPS_TLS_DTPREL_LO16 and
R_MIPS_TLS_TPREL_LO16
(elf_mips16_howto_table_rel): Likewise for
R_MIPS16_TLS_DTPREL_HI16, R_MIPS16_TLS_DTPREL_LO16,
R_MIPS16_TLS_TPREL_HI16 and R_MIPS16_TLS_TPREL_LO16.
(elf_micromips_howto_table_rel): Likewise for
R_MICROMIPS_TLS_DTPREL_HI16, R_MICROMIPS_TLS_DTPREL_LO16,
R_MICROMIPS_TLS_TPREL_HI16 and R_MICROMIPS_TLS_TPREL_LO16.
* elf64-mips.c (mips_elf64_howto_table_rel): Similarly.
(mips16_elf64_howto_table_rel): Similarly.
(micromips_elf64_howto_table_rel): Similarly.
* elfn32-mips.c: As for elf64-mips.c.
gas/
* testsuite/gas/mips/pr19977.d,
* testsuite/gas/mips/pr19977.s: New test.
* testsuite/gas/mips/mips.exp: Run it.
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Just as with all HI/LO 16-bit partial relocations the newly-introduced
MIPSr6 PC-relative R_MIPS_PCHI16 and R_MIPS_PCLO16 relocations require
pairing for correct borrow propagation from the low part to the high
part with REL targets, another case for PR 19977.
Unlike with absolute relocation, there is a complication here in that
both parts represent a calculation that is relative to the PC at the
individual relocation's location rather than both referring to the
location of the R_MIPS_PCHI16 relocation, normally applied to an AUIPC
instruction, the location of which is used for the run-time calculation
executed by hardware.
To take this semantics into account, the addend of the R_MIPS_PCLO16
relocation matching a given R_MIPS_PCHI16 relocation is expected to be
adjusted in the source assembly file for the distance between the two
relocations in a single pair, so that once both relocations have been
calculated by the linker, the expression calculated at run time is such
as if the combined 32-bit immediate was added at the location of the
AUIPC instruction.
So for matching R_MIPS_PCHI16 and R_MIPS_PCLO16 relocations into pairs
GAS needs to check for the distance between the two relocations to be
equal to the difference between the addends supplied, and then the
linker has to subtract the low part of the distance between the two
relocations from the low part in calculating the high part, so as to
factor in any borrow.
A further complication is that `_bfd_mips_elf_lo16_reloc' handler is
supplied with the addend differently depending on whether it has been
called by GAS via `bfd_install_relocation', or by the generic linker via
`bfd_perform_relocation'. In the former case the addend is supplied
with the relocation itself while in the latter one it comes from the
field being relocated.
We currently ignore the addend supplied with the relocation and it works
for calculating absolute high-part relocations, because the same addend
has been previously supplied with them when `_bfd_mips_elf_hi16_reloc'
was called, however this approach does not work for the PC-relative case
because as noted above the low-part addend is different and we need to
consistently apply the distance adjustment both with GAS and LD.
Since the supplied addend and one retrieved from field being relocated
won't ever be both nonzero, just use the sum of the two values.
The low-part addend in `mips_elf_add_lo16_rel_addend' always comes from
the field being relocated, so there's no complication there, we just
need to apply the same adjustment.
New linker test cases verify that the same ultimate machine code is
produced both for ELF and S-record output formats, ensuring that the
both the MIPS/ELF linker and the generic linker behave in the correct
way, consistent with each other.
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FEAT_SVE_AES2 implements the SVE multi-vector Advanced Encryption
Standard and 128-bit destination element polynomial multiply long
instructions, when the PE is not in Streaming SVE mode.
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FEAT_LSUI introduces unprivileged variants of load and store instructions so
that clearing PSTATE.PAN is never required in privileged software.
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FEAT_PCDPHINT - Producer-consumer data placement hints - is an optional
ISA extension that provides hint instructions to indicate:
- a store in the current execution thread is generating data at a specific
location, which a thread of execution on one or more other observers is
waiting on.
- the thread of execution on the current PE will read a location that may not
yet have been written with the value to be consumed.
This extension introduces:
- STSHH, a hint instruction, with operands (policies) keep and strm
- PRFM *IR*, a new prefetch memory operand.
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The preceding commits add s390 64-bit (s390x) support in binutils to
generate SFrame stack trace information (.sframe section) in the
assembler from CFI directives (with option --gsframe), generate .sframe
section for linker-generated .plt section in the linker, and dump SFrame
information in objdump and readelf (with option --sframe).
binutils/
* NEWS: Announce s390 64-bit (s390x) SFrame V2 support in
as, ld, objdump, and readelf.
gas/
* NEWS: Update s390 64-bit (s390x) SFrame V2 support in
assembler.
Signed-off-by: Jens Remus <jremus@linux.ibm.com>
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Port x86-64 test for handling of .cfi_def_cfa_register from commit
3602da6fa285 ("gas: sframe: fix handling of .cfi_def_cfa_register")
to s390x.
gas/testsuite/
PR gas/32879
* gas/cfi-sframe/cfi-sframe.exp: Add new test for handling of
.cfi_def_cfa_register on s390x.
* gas/cfi-sframe/cfi-sframe-s390x-3.d: Likewise.
* gas/cfi-sframe/cfi-sframe-s390x-3.s: Likewise.
Bug: https://sourceware.org/PR32879
Signed-off-by: Jens Remus <jremus@linux.ibm.com>
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In SFrame V2 the size of the offsets following an SFrame FRE can be
either signed 8-bit, 16-bit, or 32-bit integer, with the largest offset
determining their size:
1. CFA offset from CFA base register
2. RA (stack save slot) offset from CFA, usually -48 on s390x if saved
3. FP (stack save slot) offset from CFA, usually -72 on s390x if saved
The FP and RA offsets from CFA, when FP/RA saved on the stack, usually
have fixed values that fit into signed 8-bit SFrame offsets. Likewise
the DWARF register numbers on s390x of general registers (GR; 0-15) and
floating-point registers (FPR; 16-31), when FP/RA saved in registers.
With that the CFA offset from CFA base register has the greatest impact
on the signed SFrame offset size.
The s390x ELF ABI [1] defines the CFA as stack pointer (SP) at call
site +160. [2] Therefore the minimum CFA offset from CFA base register
on s390x is 160. This does not fit into a signed 8-bit integer and
therefore effectively prevents any use of signed 8-bit SFrame offsets
on s390x.
For s390x store the CFA offset from CFA base register adjusted by -160
to enable the use of signed 8-bit SFrame offsets.
[1]: s390x ELF ABI, https://github.com/IBM/s390x-abi/releases
[2]: s390x ELF ABI, commit 4e38ad9c8a88 ("Document the CFA"),
https://github.com/IBM/s390x-abi/commit/4e38ad9c8a88
include/
* sframe.h (SFRAME_S390X_CFA_OFFSET_ADJUSTMENT): Define
s390x-specific CFA offset adjustment.
(SFRAME_V2_S390X_CFA_OFFSET_ENCODE,
SFRAME_V2_S390X_CFA_OFFSET_DECODE): New s390x-specific
macros. Use SFRAME_S390X_CFA_OFFSET_ADJUSTMENT to en-/decode
CFA offset.
bfd/
* elf64-s390.c (elf_s390x_sframe_plt_fre): Use
SFRAME_V2_S390X_CFA_OFFSET_ENCODE on CFA offset to store it
adjusted and switch to 8-bit offsets.
gas/
* gen-sframe.c (sframe_fre_set_cfa_offset): For s390x use
SFRAME_V2_S390X_CFA_OFFSET_ENCODE on CFA offset to store it
adjusted.
(sframe_fre_get_cfa_offset): New helper. For s390x use
SFRAME_V2_S390X_CFA_OFFSET_DECODE on CFA offset to undo its
adjustment.
(sframe_xlate_do_def_cfa_register): Use new helper
sframe_fre_get_cfa_offset.
libsframe/
* sframe.c (sframe_fre_get_cfa_offset): For s390x use
SFRAME_V2_S390X_CFA_OFFSET_DECODE on CFA offset to undo its
adjustment.
* doc/sframe-spec.texi (s390x,
SFRAME_S390X_CFA_OFFSET_ADJUSTMENT,
SFRAME_V2_S390X_CFA_OFFSET_ENCODE,
SFRAME_V2_S390X_CFA_OFFSET_DECODE): Document s390x-specific
adjustment of CFA offset.
libsframe/testsuite/
* libsframe.find/plt-findfre-2.c (add_plt0_fde, add_pltn_fde):
Use SFRAME_V2_S390X_CFA_OFFSET_ENCODE to enable use of 1-byte
SFrame offsets.
Suggested-by: Indu Bhagat <indu.bhagat@oracle.com>
Signed-off-by: Jens Remus <jremus@linux.ibm.com>
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If an architecture uses both SFrame RA and FP tracking SFrame assumes
that the RA offset is the 2nd offset and the FP offset is the 3rd offset
following a SFrame FRE. An architecture does not necessarily need to
save both on the stack (or in register) at the same time or even at all.
SFrame cannot represent FP without RA saved on stack (or in a register),
since it cannot distinguish whether the 2nd offset is the RA or FP
offset.
For s390x use an invalid SFrame RA offset from CFA value of zero as
padding to represent the FP being saved when the RA is not saved. This
aligns with the existing invalid SFrame fixed RA offset from CFA value
of zero. In a stack tracer this then also naturally falls into place,
as it can skip restoring the RA in the topmost frame, if both the fixed
RA offset (from SFrame header) and the RA offset (from FDE) are zero,
without any need to test architecture-specific flags.
include/
* sframe.h (SFRAME_FRE_RA_OFFSET_INVALID): New define. Used as
padding offset.
* sframe-api.h (sframe_fre_get_ra_offset): Add comment that for
s390x an offset value of SFRAME_FRE_RA_OFFSET_INVALID indicates
that the RA is not saved.
gas/
* gen-sframe.c (get_fre_num_offsets): For s390x account padding
RA offset, if FP without RA saved.
(sframe_get_fre_offset_size): Likewise.
(output_sframe_row_entry): For s390x write a padding RA offset,
if FP without RA needs to be represented.
(sframe_do_fde): Enable FP without RA saved to be represented
on s390x.
libsframe/
* sframe.c (sframe_fre_get_ra_offset): Add comment that for
s390x an offset value of SFRAME_FRE_RA_OFFSET_INVALID indicates
that the RA is not saved.
* sframe-dump.c (dump_sframe_func_with_fres): Treat invalid
RA offsets as if they were undefined. Display them as "U"
to distinguish them.
* doc/sframe-spec.texi (s390x): Document s390x-specific use of
SFRAME_FRE_RA_OFFSET_INVALID to represent FP without RA saved.
gas/testsuite/
* gas/cfi-sframe/cfi-sframe.exp: Rename s390x-specific tests.
* gas/cfi-sframe/cfi-sframe-s390x-fpra-offset-err-1.s: Rename
to ...
* cfi-sframe/cfi-sframe-s390x-fpra-offset-err-1.d: Likewise.
* gas/cfi-sframe/cfi-sframe-s390x-fpra-offset-2.s: This.
* gas/cfi-sframe/cfi-sframe-s390x-fpra-offset-2.d: Likewise.
Update test verification pattern accordingly.
* cfi-sframe/cfi-sframe-s390x-fpra-register-err-1.s: Rename
to ...
* cfi-sframe/cfi-sframe-s390x-fpra-register-err-1.d: Likewise.
* gas/cfi-sframe/cfi-sframe-s390x-fpra-register-2.s: This.
* gas/cfi-sframe/cfi-sframe-s390x-fpra-register-2.d: Likewise.
Update test verification pattern accordingly.
Signed-off-by: Jens Remus <jremus@linux.ibm.com>
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GCC on s390x, when in a leaf function, can be observed to save the
frame pointer (FP) and/or return address (RA) register in a floating-
point registers (FPR) instead of on the stack. This is declared using
the following CFI directive:
.cfi_register <fp/ra-regnum>, <fpr-regnum>
SFrame cannot represent the FP and/or RA being saved in another
register. It does only track the CFA base register (SP/FP), CFA offset
from CFA base register, and FP and RA save area offsets from CFA.
On s390x the FP and/or RA are only saved in another FPR when in a leaf
function. That is a function that does not call any other function.
Therefore it can ever only be the topmost function in a call chain.
An unwinder by default has access to all registers of the function that
is the topmost on the call stack. Therefore no further information
is required to restore FP/RA from the FPR.
Represent FP/RA saved in another register on s390x, by encoding the
DWARF register number shifted by one to the left with the least-
significant bit set in the offset as follows:
offset = (regnum << 1) | 1
The use of the least-significant bit of the offset as indication is
possible, as the stack pointer (SP), the CFA, and any register save
area slots are 8-byte aligned according to the s390x ELF ABI:
- The stack pointer (SP) "shall maintain an 8-byte alignment". [1]
- The CFA is defined as SP at call site +160. [2]
- Pointers and 8-byte integers, such as general register values, must
be 8-byte aligned. [3]
SFrame FP and RA stack offsets must therefore always be a multiple of
8 on s390x. Note that for the same reason the DWARF data alignment
factor is -8 on s390x (see DWARF2_CIE_DATA_ALIGNMENT).
Add s390x-specific SFrame (error) tests for FP/RA saved in FPRs in leaf
function.
[1]: s390x ELF ABI, sections "Register Roles" and "Stack Frame
Allocation", https://github.com/IBM/s390x-abi/releases
[2]: s390x ELF ABI, commit 4e38ad9c8a88 ("Document the CFA"),
https://github.com/IBM/s390x-abi/commit/4e38ad9c8a88
[3]: s390x ELF ABI, section "Fundamental Types", table "Scalar types",
https://github.com/IBM/s390x-abi/releases
include/
* sframe.h (SFRAME_V2_S390X_OFFSET_IS_REGNUM): New s390x-
specific macro to test whether an SFrame FP/RA offset is a DWARF
register number.
(SFRAME_V2_S390X_OFFSET_ENCODE_REGNUM): New s390x-specific macro
to encode a DWARF register number into an SFrame FP/RA offset.
(SFRAME_V2_S390X_OFFSET_DECODE_REGNUM): New s390x-specific macro
to decode an SFrame FP/RA offset into a DWARF register number.
* sframe-api.h (sframe_fre_get_fp_offset,
sframe_fre_get_fp_offset): Add comment that for s390x the offset
may be an encoded register number.
gas/
* gen-sframe.c (s390_sframe_xlate_do_register): New S390-
specific function. Uses SFRAME_V2_S390X_OFFSET_ENCODE_REGNUM to
represent FP/RA saved in another register on s390x.
(sframe_xlate_do_register): Invoke s390_sframe_xlate_do_register
on s390x.
libsframe/
* sframe.c (sframe_fre_get_fp_offset, sframe_fre_get_fp_offset):
Add comment that for s390x the offset may be an encoded register
number.
* sframe-dump.c (is_sframe_abi_arch_s390x): New helper to test
whether ABI/arch is s390x.
(dump_sframe_func_with_fres): Use
SFRAME_V2_S390X_OFFSET_IS_REGNUM and
SFRAME_V2_S390X_OFFSET_DECODE_REGNUM to dump FP/RA saved in
another register on s390x.
* doc/sframe-spec.texi (s390x): Document s390x-specific
representation of FP/RA saved in another register.
gas/testsuite/
* gas/cfi-sframe/cfi-sframe.exp: Update s390x-specific SFrame
(error) tests.
* gas/cfi-sframe/cfi-sframe-s390x-fpra-register-err-2.s: Rename
to ...
* gas/cfi-sframe/cfi-sframe-s390x-fpra-register-err-2.d:
Likewise.
* gas/cfi-sframe/cfi-sframe-s390x-fpra-register-1.s: This. Test
no longer triggers a warning, as SFrame can represent FP and RA
saved in registers.
* gas/cfi-sframe/cfi-sframe-s390x-fpra-register-1.d: Likewise.
* gas/cfi-sframe/cfi-sframe-s390x-fpra-register-err-1.d: Test
now triggers a different warning, as SFrame can represent FP and
RA saved in registers, but not FP without RA saved in register.
Signed-off-by: Jens Remus <jremus@linux.ibm.com>
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This introduces initial support to generate .sframe from CFI directives
in assembler on s390 64-bit (s390x). Due to SFrame V2 format
limitations it has the following limitations, some of them getting
addressed by subsequent patches, which cause generation of SFrame FDE
to be skipped:
- SFrame FP/RA tracking only supports register contents being saved on
the stack (i.e. .cfi_offset). It does not support FP/RA register
contents being saved in other registers (i.e. .cfi_register). GCC on
s390x can be observed to save the FP/RA register contents in floating-
point registers, but only in leaf functions.
This issue is detailed further and resolved in the subsequent commit
"s390: Represent FP/RA saved in register in SFrame".
- SFrame FP/RA tracking cannot represent FP without RA saved. This is
because the format assumes SFrame FDE offset2 to be the RA offset, if
there are two offsets, and offset3 to be the FP offset, if there are
three offsets. There is no mean to distinguish whether offset2 is the
RA or FP offset, if there are only two offsets.
This issue is detailed further and resolved in the subsequent commit
"s390: Represent FP without RA saved in SFrame".
- SFrame assumes a dedicated FP register number. The s390x ELF ABI [1]
does only designate register 11 as preferred FP register number. In
general GCC and Clang on s390x use register 11 as frame pointer.
GCC on s390x can be observed to use register 14 as frame pointer in
the stack clash protector in the function prologue.
glibc on s390x contains hand-written assembler code that uses
register 12 as frame pointer.
This s390x support is largely based on the AArch64 support from commit
b52c4ee46657 ("gas: generate .sframe from CFI directives").
The SFrame ABI/arch identifier SFRAME_ABI_S390X_ENDIAN_BIG is introduced
for s390x and added to the SFrame format specification.
The s390x ELF ABI [1] specifies the following C calling conventions for
s390x architecture:
- Register 15 is the stack pointer (SP).
- Register 14 contains the return address (RA) at function entry.
- There is no dedicated frame pointer register. Register 11 is the
preferred frame pointer (FP). [2] GCC and Clang in general use
register 11 as frame pointer.
- The CFA is defined as SP at call site +160. [3] The SP at call site
can therefore be derived from the CFA using a SP value offset from CFA
of -160.
The s390x ELF ABI [1] does not assign any standard save slot to each
register in the register save area of a stack frame. Neither the
return address (RA, r14) nor preferred frame pointer (FP, r11)
necessarily need to be saved. Therefore SFrame RA and FP tracking is
used.
Support for SFrame on s390 is only enabled for the 64-bit s390x ELF ABI
(z/Architecture with 64-bit addressing mode). It is disabled for the
32-bit s390 ELF ABI (ESA/390 or z/Architecture with 32-bit addressing
mode).
s390x-specific SFrame assembler and linker tests are added, including
error tests for use of a non-preferred frame pointer (FP) register and
specification of a non-default return address (RA) register.
[1]: s390x ELF ABI, https://github.com/IBM/s390x-abi/releases
[2]: s390x ELF ABI, commit f00421825979 ("Add information about the frame
pointer register"),
https://github.com/IBM/s390x-abi/commit/f00421825979
[3]: s390x ELF ABI, commit 4e38ad9c8a88 ("Document the CFA"),
https://github.com/IBM/s390x-abi/commit/4e38ad9c8a88
include/
* sframe.h: Add reference to s390x architecture in comments.
(SFRAME_ABI_S390X_ENDIAN_BIG): Define SFrame ABI/arch identifier
for s390x.
(SFRAME_S390X_SP_VAL_OFFSET): Define s390x-specific SP value
offset from CFA.
libsframe/
* sframe.c (need_swapping): Add SFRAME_ABI_S390X_ENDIAN_BIG.
* doc/sframe-spec.texi (SFRAME_ABI_S390X_ENDIAN_BIG, s390x,
SFRAME_S390X_SP_VAL_OFFSET): Document SFrame ABI/arch identifier
for s390x, add references to s390x architecture, and document
s390x-specifics, such as the SP value offset from CFA of -160.
gas/
* config/tc-s390.h: s390x support to generate .sframe from CFI
directives in assembler.
(support_sframe_p): Define.
(SFRAME_CFA_SP_REG, SFRAME_CFA_FP_REG, SFRAME_CFA_RA_REG):
Define.
(sframe_ra_tracking_p): Define.
(sframe_cfa_ra_offset): Define.
(sframe_get_abi_arch): Define.
* config/tc-s390.c: s390x support to generate .sframe from CFI
directives in assembler.
(s390_sframe_cfa_sp_reg, s390_sframe_cfa_fp_reg,
s390_sframe_cfa_ra_reg): New. Initialize to DWARF register
numbers of stack pointer (SP, r15), preferred frame pointer
(FP, r11), and return address (RA, r14) registers.
(s390_support_sframe_p): New function. Return true if s390x.
(s390_sframe_ra_tracking_p): New function. Return true.
(s390_sframe_cfa_ra_offset): New function. Return
SFRAME_CFA_FIXED_RA_INVALID.
(s390_sframe_get_abi_arch): New function. Return
SFRAME_ABI_S390X_ENDIAN_BIG if s390x, otherwise zero.
* gen-sframe.c: Add reference to s390x architecture in comments.
(sframe_xlate_do_val_offset): Add support for s390x-specific
SFRAME_S390X_SP_VAL_OFFSET.
* NEWS: Add news entry.
gas/testsuite/
* gas/cfi-sframe/cfi-sframe.exp: Enable common SFrame tests for
s390x. Add s390x-specific SFrame (error) tests.
* gas/cfi-sframe/cfi-sframe-s390x-1.d: New s390x-specific SFrame
test.
* gas/cfi-sframe/cfi-sframe-s390x-1.s: Likewise.
* gas/cfi-sframe/cfi-sframe-s390x-2.d: Likewise.
* gas/cfi-sframe/cfi-sframe-s390x-2.s: Likewise.
* gas/cfi-sframe/cfi-sframe-s390x-err-1.d: New s390x-specific
SFrame error test that uses a non-default frame-pointer register
as CFA base register.
* gas/cfi-sframe/cfi-sframe-s390x-err-1.s: Likewise.
* gas/cfi-sframe/cfi-sframe-s390x-err-2.d: Likewise.
* gas/cfi-sframe/cfi-sframe-s390x-err-2.s: Likewise.
* gas/cfi-sframe/cfi-sframe-s390x-err-3.d: New s390x-specific
SFrame error test that uses a non-default return address
register.
* gas/cfi-sframe/cfi-sframe-s390x-err-3.s: Likewise.
* gas/cfi-sframe/cfi-sframe-s390x-fpra-offset-1.d: New s390x-
specific SFrame test that saves RA and FP individually on the
stack.
* gas/cfi-sframe/cfi-sframe-s390x-fpra-offset-1.s: Likewise.
* gas/cfi-sframe/cfi-sframe-s390x-fpra-offset-err-1.d: New
s390x-specific SFrame error test that saves FP and RA
individually, to trigger FP without RA saved.
* gas/cfi-sframe/cfi-sframe-s390x-fpra-offset-err-1.s: Likewise.
* gas/cfi-sframe/cfi-sframe-s390x-fpra-register-err-1.d: New
s390x-specific SFrame error test that saves FP and RA
individually in registers.
* gas/cfi-sframe/cfi-sframe-s390x-fpra-register-err-1.s:
Likewise.
* gas/cfi-sframe/cfi-sframe-s390x-fpra-register-err-2.d: New
s390x-specific SFrame error test that saves RA and FP
individually in registers.
* gas/cfi-sframe/cfi-sframe-s390x-fpra-register-err-2.s:
Likewise.
ld/testsuite/
* ld-s390/s390.exp: Add simple SFrame test.
* ld-s390/sframe-simple-1.d: New simple SFrame test.
* ld-s390/sframe-bar.s: Likewise.
* ld-s390/sframe-foo.s: Likewise.
Signed-off-by: Jens Remus <jremus@linux.ibm.com>
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Swap AM_PO_SUBDIRS and ZW_GNU_GETTEXT_SISTER_DIR lines in
*/configure.ac. ZW_GNU_GETTEXT_SISTER_DIR indirectly invokes
AC_REQUIRE(AM_PO_SUBDIRS) so results in AM_PO_SUBDIRS being emitted
before ZW_GNU_GETTEXT_SISTER_DIR if it hasn't already been invoked.
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The v850 md_convert_frag function oddly calls subseg_change twice
(commit 1cd986c58543). Neither call is needed, because that is done
in size_seg.
Convert the fr_opcode fixup field back (to an opindex, not fx_r_type)
using a cast rather than a union, since we used casts when setting up
those values. I guess the union was added to silence compiler
warnings about wrong-size casts, but unfortunately results in the
wrong value being retrieved on big-endian hosts.
Change "buffer" to a char* as there is no need to make it an
unsigned char*, and that way requires fewer casts. Finally, fix
formatting and use uintptr_t when make the rs_machine_dependent frags.
Remove subseg_change calls from cr16, crx, mn10200, mn10300, and sh
md_convert_frag too.
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Rename the old enum alpha_macro_arg to alpha_macro_argset, and create
a union alpha_macro_arg to use in all the alpha_macro.emit functions.
This avoids intptr_t casts on retrieving index values and void* casts
on storing them in the alpha_macros array.
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The entry of "zce imply zcf" needs check_implicit_for_zcf, so it needs to be
placed after the entries of "whatever imply f". Otherwise the implicit zcf
may be missed. Also merge the march-implu-zce* testcases into imply testcases.
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