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2020-05-28Fix all unexpected failures in gas testsuite for pdp11-aout.Stephen Casner6-3/+133
These failures were caused by the PDP11's mix of little-endian octets in shorts but shorts in big endian order for long or quad so regexps did not match. Also tests used addresses as values in .long which required BRD_RELOC_32 that was not implemented. * gas/config/tc-pdp11.c (md_number_to_chars): Implement .quad * gas/testsuite/gas/all/gas.exp: Select alternate test scripts for pdp11, skip octa test completely. * gas/testsuite/gas/all/eqv-dot-pdp11.s: Identical to eqv-dot.s * gas/testsuite/gas/all/eqv-dot-pdp11.d: Match different octet order. * gas/testsuite/gas/all/cond-pdp11.l: Match different octet order. * bfd/pdp11.c: Implement BRD_RELOC_32 to relocate the low 16 bits of addreses in .long (used in testsuites) and .stab values.
2020-05-28[PATCH] gas: Fix comment on definition of frag_grow()Nick Clifton2-3/+7
* frags.c (frag_grow): Fix comment.
2020-05-27Fix PR gas/26001 (pdp11-*-*)Stephen Casner5-1/+41
PR gas/26001 * gas/config/tc-pdp11.c (parse_reg): Distinguish register names from symbols that begin with a register name. * gas/testsuite/gas/pdp11/pdp11.exp: Add test of such symbols. * gas/testsuite/gas/pdp11/pr26001.s: Likewise. * gas/testsuite/gas/pdp11/pr26001.d: Likewise.
2020-05-27RISC-V: Fix missing initialization of riscv_csr_extra structsSimon Cook2-0/+6
The next pointer of struct riscv_csr_extra was not always initilized to NULL or a valid pointer, causing the assembler to attempt to read through an uninitialized pointer on startup. gas/ChangeLog: * config/tc-riscv.c (riscv_init_csr_hash): NULL initilize next pointer when creating struct riscv_csr_extra.
2020-05-26gas: Adjust x86 tests for PECOFFH.J. Lu4-1/+11
* testsuite/gas/i386/align-branch-9.d: Updated for PECOFF. * testsuite/gas/i386/inval-avx512f.s: Add .p2align for PECOFF. * testsuite/gas/i386/inval-avx512f.l: Updated.
2020-05-26ChangeLog entries for f687f5f563Stefan Schulze Frielinghaus1-0/+7
2020-05-26tc-xgate.c: Replace R_XGATE_PCREL_X with BFD_RELOC_XGATE_PCREL_XH.J. Lu2-4/+12
Replace R_XGATE_PCREL_X with BFD_RELOC_XGATE_PCREL_X to silence GCC 10 warning: gas/config/tc-xgate.c:1339:5: error: implicit conversion from ‘enum elf_xgate_reloc_type’ to ‘bfd_reloc_code_real_type’ {aka ‘enum bfd_reloc_code_real’} [-Werror=enum-conversion] 1339 | R_XGATE_PCREL_9); | ^~~~~~~~~~~~~~~ PR gas/26044 * config/tc-xgate.c (md_apply_fix): Check BFD_RELOC_XGATE_PCREL_X instead of R_XGATE_PCREL_X. (xgate_parse_operand): Replace R_XGATE_PCREL_X with BFD_RELOC_XGATE_PCREL_X.
2020-05-26S/390: z13: Accept vector alignment hintsStefan Schulze Frielinghaus2-8/+16
Accept vector alignment hints on z13 although they are ignored there. The advantage is that any binary compiled for architecture level z13 may run on z14 or later and benefit from vector alignment hints. gas/ChangeLog: 2020-05-18 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com> * testsuite/gas/s390/zarch-z13.d: Add regexp checks for vector load/store instruction variants with alignment hints. * testsuite/gas/s390/zarch-z13.s: Emit new vector load/store instruction variants with alignment hints. opcodes/ChangeLog: 2020-05-18 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com> * s390-opc.txt: Relocate vector load/store instructions with additional alignment parameter and change architecture level constraint from z14 to z13.
2020-05-26gas: Silence GCC 10 warning on tc-visium.cH.J. Lu2-1/+7
PR gas/26044 * config/tc-visium.c (md_convert_frag): Replace fragP->fr_literal with &fragP->fr_literal[0].
2020-05-26gas: Silence GCC 10 warning tc-vax.cH.J. Lu2-2/+9
PR gas/26044 * config/tc-vax.c (md_estimate_size_before_relax): Replace fragP->fr_literal with &fragP->fr_literal[0]. (md_convert_frag): Likewise.
2020-05-26gas: Silence GCC 10 warning on tc-v850.cH.J. Lu2-2/+8
PR gas/26044 * config/tc-v850.c (md_convert_frag): Replace fragP->fr_literal with &fragP->fr_literal[0].
2020-05-26gas: Silence GCC 10 warning on tc-crx.cH.J. Lu2-3/+10
opcode/crx.h has typedef enum { ... MAX_REG } reg; typedef enum { c0 = MAX_REG, } copreg; tc-crx.c has static int getreg_image (reg r) { ... /* Check whether the register is in registers table. */ if (r < MAX_REG) rreg = &crx_regtab[r]; /* Check whether the register is in coprocessor registers table. */ else if (r < (int) MAX_COPREG) rreg = &crx_copregtab[r-MAX_REG]; } Change getreg_image's argument type to int and replace fragP->fr_literal with &fragP->fr_literal[0] to silence GCC 10 warning. PR gas/26044 * config/tc-crx.c (getreg_image): Change argument type to int. (md_convert_frag): Replace fragP->fr_literal with &fragP->fr_literal[0].
2020-05-26tc-score.c: Replace overlapping sprintf with memmoveH.J. Lu2-8/+18
Fix GCC 10 warning: gas/config/tc-score.c:4575:6: error: ‘sprintf’ argument 3 may overlap destination object ‘keep_data’ [-Werror=restrict] 4575 | sprintf (append_str, "bne %s", keep_data); | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ PR gas/26044 * onfig/tc-score.c (s3_do_macro_bcmp): Replace overlapping sprintf with memmove.
2020-05-25gas: Silence GCC 10 warning on tc-mcore.cH.J. Lu2-1/+6
* config/tc-mcore.c (md_convert_frag): Replace fragP->fr_literal with &fragP->fr_literal[0].
2020-05-25tc-cr16.c: Use memmove to concatenate 2 overlapping stringsH.J. Lu2-1/+10
PR gas/26041 * config/tc-cr16.c (md_assemble): Use memmove to concatenate 2 overlapping strings.
2020-05-25gas: Silence GCC 10 warning on tc-cr16.cH.J. Lu2-1/+6
* config/tc-cr16.c (md_convert_frag): Replace fragP->fr_literal with &fragP->fr_literal[0].
2020-05-25gas: Update fr_literal access in frag for GCC 10H.J. Lu4-3/+10
When access fr_literal in struct frag { ... /* Data begins here. */ char fr_literal[1]; }; with char *buf = fragp->fr_fix + fragp->fr_literal; GCC 10 gave gas/config/tc-csky.c: In function ‘md_convert_frag’: gas/config/tc-csky.c:4507:9: error: writing 1 byte into a region of size 0 [-Werror=stringop-overflow=] 4507 | buf[1] = BYTE_1 (CSKYV1_INST_SUBI | (7 << 4)); | ^ Change char *buf = fragp->fr_fix + fragp->fr_literal; to char *buf = fragp->fr_fix + &fragp->fr_literal[0]; to silence GCC 10 warning. * config/tc-csky.c (md_convert_frag): Replace fragp->fr_literal with &fragp->fr_literal[0]. * config/tc-microblaze.c (md_apply_fix): Likewise. * config/tc-sh.c (md_convert_frag): Likewise.
2020-05-24RISC-V: Gas inserts cfa relocs in wrong section.Jim Wilson2-1/+19
The frag code makes a distinction between inserting frags before the frag chains are chained together and afterward. After chaining, we need to set now_seg before creating the frag. tc-xtensa.c has a function called fix_new_exp_in_seg that handles this right, but switches segments twice each time it is called. In this case, we can inline it and pull the save and restore out of the loop to get better code. gas/ PR 26025 * config/tc-riscv.c (riscv_pre_output_hook): Change s type from const asection to segT. New locals seg and subseg. Call subseg_set before fix_new_exp. Call subseg_set after loop to restore original values.
2020-05-21Replace "if (x) free (x)" with "free (x)", gasAlan Modra13-52/+41
* atof-generic.c: Replace "if (x) free (x)" with "free (x)" throughout. * config/obj-elf.c: Likewise. * config/tc-aarch64.c: Likewise. * config/tc-arm.c: Likewise. * config/tc-m68k.c: Likewise. * config/tc-nios2.c: Likewise. * config/tc-tic30.c: Likewise. * ecoff.c: Likewise. * read.c: Likewise. * stabs.c: Likewise. * symbols.c: Likewise. * testsuite/gas/all/test-gen.c: Likewise.
2020-05-20[PATCH v2 0/9] RISC-V: Support version controling for ISA standard ↵Nelson Chu42-2434/+4423
extensions and CSR 1. Remove the -mriscv-isa-version and --with-riscv-isa-version options. We can still use -march to choose the version for each extensions, so there is no need to add these. 2. Change the arguments of options from [1p9|1p9p1|...] to [1.9|1.9.1|...]. Unlike the architecture string has specified by spec, ther is no need to do the same thing for options. 3. Spilt the patches to reduce the burdens of review. [PATCH 3/7] RISC-V: Support new GAS options and configure options to set ISA versions to [PATCH v2 3/9] RISC-V: Support GAS option -misa-spec to set ISA versions [PATCH v2 4/9] RISC-V: Support configure options to set ISA versions by default. [PATCH 4/7] RISC-V: Support version checking for CSR according to privilege version. to [PATCH v2 5/9] RISC-V: Support version checking for CSR according to privilege spec version. [PATCH v2 6/9] RISC-V: Support configure option to choose the privilege spec version. 4. Use enum class rather than string to compare the choosen ISA spec in opcodes/riscv-opc.c. The behavior is same as comparing the choosen privilege spec. include * opcode/riscv.h: Include "bfd.h" to support bfd_boolean. (enum riscv_isa_spec_class): New enum class. All supported ISA spec belong to one of the class (struct riscv_ext_version): New structure holds version information for the specific ISA. * opcode/riscv-opc.h (DECLARE_CSR): There are two version information, define_version and abort_version. The define_version means which privilege spec is started to define the CSR, and the abort_version means which privilege spec is started to abort the CSR. If the CSR is valid for the newest spec, then the abort_version should be PRIV_SPEC_CLASS_DRAFT. (DECLARE_CSR_ALIAS): Same as DECLARE_CSR, but only for the obselete CSR. * opcode/riscv.h (enum riscv_priv_spec_class): New enum class. Define the current supported privilege spec versions. (struct riscv_csr_extra): Add new fields to store more information about the CSR. We use these information to find the suitable CSR address when user choosing a specific privilege spec. binutils * dwarf.c: Updated since DECLARE_CSR is changed. opcodes * riscv-opc.c (riscv_ext_version_table): The table used to store all information about the supported spec and the corresponding ISA versions. Currently, only Zicsr is supported to verify the correctness of Z sub extension settings. Others will be supported in the future patches. (struct isa_spec_t, isa_specs): List for all supported ISA spec classes and the corresponding strings. (riscv_get_isa_spec_class): New function. Get the corresponding ISA spec class by giving a ISA spec string. * riscv-opc.c (struct priv_spec_t): New structure. (struct priv_spec_t priv_specs): List for all supported privilege spec classes and the corresponding strings. (riscv_get_priv_spec_class): New function. Get the corresponding privilege spec class by giving a spec string. (riscv_get_priv_spec_name): New function. Get the corresponding privilege spec string by giving a CSR version class. * riscv-dis.c: Updated since DECLARE_CSR is changed. * riscv-dis.c: Add new disassembler option -Mpriv-spec to dump the CSR according to the chosen version. Build a hash table riscv_csr_hash to store the valid CSR for the chosen pirv verison. Dump the direct CSR address rather than it's name if it is invalid. (parse_riscv_dis_option_without_args): New function. Parse the options without arguments. (parse_riscv_dis_option): Call parse_riscv_dis_option_without_args to parse the options without arguments first, and then handle the options with arguments. Add the new option -Mpriv-spec, which has argument. * riscv-dis.c (print_riscv_disassembler_options): Add description about the new OBJDUMP option. ld * testsuite/ld-riscv-elf/attr-merge-arch-01.d: Updated priv attributes according to the -mpriv-spec option. * testsuite/ld-riscv-elf/attr-merge-arch-02.d: Likewise. * testsuite/ld-riscv-elf/attr-merge-arch-03.d: Likewise. * testsuite/ld-riscv-elf/attr-merge-priv-spec-a.s: Likewise. * testsuite/ld-riscv-elf/attr-merge-priv-spec-b.s: Likewise. * testsuite/ld-riscv-elf/attr-merge-priv-spec.d: Likewise. * testsuite/ld-riscv-elf/attr-merge-stack-align.d: Likewise. * testsuite/ld-riscv-elf/attr-merge-strict-align-01.d: Likewise. * testsuite/ld-riscv-elf/attr-merge-strict-align-02.d: Likewise. * testsuite/ld-riscv-elf/attr-merge-strict-align-03.d: Likewise. * testsuite/ld-riscv-elf/attr-merge-strict-align-04.d: Likewise. * testsuite/ld-riscv-elf/attr-merge-strict-align-05.d: Likewise. bfd * elfxx-riscv.h (riscv_parse_subset_t): Add new callback function get_default_version. It is used to find the default version for the specific extension. * elfxx-riscv.c (riscv_parsing_subset_version): Remove the parameters default_major_version and default_minor_version. Add new bfd_boolean parameter *use_default_version. Set it to TRUE if we need to call the callback rps->get_default_version to find the default version. (riscv_parse_std_ext): Call rps->get_default_version if we fail to find the default version in riscv_parsing_subset_version, and then call riscv_add_subset to add the subset into subset list. (riscv_parse_prefixed_ext): Likewise. (riscv_std_z_ext_strtab): Support Zicsr extensions. * elfnn-riscv.c (riscv_merge_std_ext): Use strcasecmp to compare the strings rather than characters. riscv_merge_arch_attr_info): The callback function get_default_version is only needed for assembler, so set it to NULL int the linker. * elfxx-riscv.c (riscv_estimate_digit): Remove the static. * elfxx-riscv.h: Updated. gas * testsuite/gas/riscv/priv-reg-fail-read-only-01.s: Updated. * config/tc-riscv.c (default_arch_with_ext, default_isa_spec): Static variables which are used to set the ISA extensions. You can use -march (or ELF build attributes) and -misa-spec to set them, respectively. (ext_version_hash): The hash table used to handle the extensions with versions. (init_ext_version_hash): Initialize the ext_version_hash according to riscv_ext_version_table. (riscv_get_default_ext_version): The callback function of riscv_parse_subset_t. According to the choosed ISA spec, get the default version for the specific extension. (riscv_set_arch): Set the callback function. (enum options, struct option md_longopts): Add new option -misa-spec. (md_parse_option): Do not call riscv_set_arch for -march. We will call it later in riscv_after_parse_args. Call riscv_get_isa_spec_class to set default_isa_spec class. (riscv_after_parse_args): Call init_ext_version_hash to initialize the ext_version_hash, and then call riscv_set_arch to set the architecture with versions according to default_arch_with_ext. * testsuite/gas/riscv/attribute-02.d: Set 0p0 as default version for x extensions. * testsuite/gas/riscv/attribute-03.d: Likewise. * testsuite/gas/riscv/attribute-09.d: New testcase. For i-ext, we already set it's version to 2p1 by march, so no need to use the default 2p2 version. For m-ext, we do not set the version by -march and ELF arch attribute, so set the default 2p0 to it. For zicsr, it is not defined in ISA spec 2p2, so set 0p0 to it. * testsuite/gas/riscv/attribute-10.d: New testcase. The version of zicsr is 2p0 according to ISA spec 20191213. * config/tc-riscv.c (DEFAULT_RISCV_ARCH_WITH_EXT) (DEFAULT_RISCV_ISA_SPEC): Default configure option settings. You can set them by configure options --with-arch and --with-isa-spec, respectively. (riscv_set_default_isa_spec): New function used to set the default ISA spec. (md_parse_option): Call riscv_set_default_isa_spec rather than call riscv_get_isa_spec_class directly. (riscv_after_parse_args): If the -isa-spec is not set, then we set the default ISA spec according to DEFAULT_RISCV_ISA_SPEC by calling riscv_set_default_isa_spec. * testsuite/gas/riscv/attribute-01.d: Add -misa-spec=2.2, since the --with-isa-spec may be set to different ISA spec. * testsuite/gas/riscv/attribute-02.d: Likewise. * testsuite/gas/riscv/attribute-03.d: Likewise. * testsuite/gas/riscv/attribute-04.d: Likewise. * testsuite/gas/riscv/attribute-05.d: Likewise. * testsuite/gas/riscv/attribute-06.d: Likewise. * testsuite/gas/riscv/attribute-07.d: Likewise. * configure.ac: Add configure options, --with-arch and --with-isa-spec. * configure: Regenerated. * config.in: Regenerated. * config/tc-riscv.c (default_priv_spec): Static variable which is used to check if the CSR is valid for the chosen privilege spec. You can use -mpriv-spec to set it. (enum reg_class): We now get the CSR address from csr_extra_hash rather than reg_names_hash. Therefore, move RCLASS_CSR behind RCLASS_MAX. (riscv_init_csr_hashes): Only need to initialize one hash table csr_extra_hash. (riscv_csr_class_check): Change the return type to void. Don't check the ISA dependency if -mcsr-check isn't set. (riscv_csr_version_check): New function. Check and find the CSR address from csr_extra_hash, according to default_priv_spec. Report warning for the invalid CSR if -mcsr-check is set. (reg_csr_lookup_internal): Updated. (reg_lookup_internal): Likewise. (md_begin): Updated since DECLARE_CSR and DECLARE_CSR_ALIAS are changed. (enum options, struct option md_longopts): Add new GAS option -mpriv-spec. (md_parse_option): Call riscv_set_default_priv_version to set default_priv_spec. (riscv_after_parse_args): If -mpriv-spec isn't set, then set the default privilege spec to the newest one. (enum riscv_csr_class, struct riscv_csr_extra): Move them to include/opcode/riscv.h. * testsuite/gas/riscv/priv-reg-fail-fext.d: This test case just want to check the ISA dependency for CSR, so fix the spec version by adding -mpriv-spec=1.11. * testsuite/gas/riscv/priv-reg-fail-fext.l: Likewise. There are some version warnings for the test case. * gas/testsuite/gas/riscv/priv-reg-fail-read-only-01.d: Likewise. * gas/testsuite/gas/riscv/priv-reg-fail-read-only-01.l: Likewise. * gas/testsuite/gas/riscv/priv-reg-fail-read-only-02.d: Likewise. * gas/testsuite/gas/riscv/priv-reg-fail-rv32-only.d: Likewise. * gas/testsuite/gas/riscv/priv-reg-fail-rv32-only.l: Likewise. * gas/testsuite/gas/riscv/priv-reg-fail-version-1p9.d: New test case. Check whether the CSR is valid when privilege version 1.9 is choosed. * gas/testsuite/gas/riscv/priv-reg-fail-version-1p9.l: Likewise. * gas/testsuite/gas/riscv/priv-reg-fail-version-1p9p1.d: New test case. Check whether the CSR is valid when privilege version 1.9.1 is choosed. * gas/testsuite/gas/riscv/priv-reg-fail-version-1p9p1.l: Likewise. * gas/testsuite/gas/riscv/priv-reg-fail-version-1p10.d: New test case. Check whether the CSR is valid when privilege version 1.10 is choosed. * gas/testsuite/gas/riscv/priv-reg-fail-version-1p10.l: Likewise. * gas/testsuite/gas/riscv/priv-reg-fail-version-1p11.d: New test case. Check whether the CSR is valid when privilege version 1.11 is choosed. * gas/testsuite/gas/riscv/priv-reg-fail-version-1p11.l: Likewise. * config/tc-riscv.c (DEFAULT_RISCV_ISA_SPEC): Default configure option setting. You can set it by configure option --with-priv-spec. (riscv_set_default_priv_spec): New function used to set the default privilege spec. (md_parse_option): Call riscv_set_default_priv_spec rather than call riscv_get_priv_spec_class directly. (riscv_after_parse_args): If -mpriv-spec isn't set, then we set the default privilege spec according to DEFAULT_RISCV_PRIV_SPEC by calling riscv_set_default_priv_spec. * testsuite/gas/riscv/csr-dw-regnums.d: Add -mpriv-spec=1.11, since the --with-priv-spec may be set to different privilege spec. * testsuite/gas/riscv/priv-reg.d: Likewise. * configure.ac: Add configure option --with-priv-spec. * configure: Regenerated. * config.in: Regenerated. * config/tc-riscv.c (explicit_attr): Rename explicit_arch_attr to explicit_attr. Set it to TRUE if any ELF attribute is found. (riscv_set_default_priv_spec): Try to set the default_priv_spec if the priv attributes are set. (md_assemble): Set the default_priv_spec according to the priv attributes when we start to assemble instruction. (riscv_write_out_attrs): Rename riscv_write_out_arch_attr to riscv_write_out_attrs. Update the arch and priv attributes. If we don't set the corresponding ELF attributes, then try to output the default ones. (riscv_set_public_attributes): If any ELF attribute or -march-attr options is set (explicit_attr is TRUE), then call riscv_write_out_attrs to update the arch and priv attributes. (s_riscv_attribute): Make sure all arch and priv attributes are set before any instruction. * testsuite/gas/riscv/attribute-01.d: Update the priv attributes if any ELF attribute or -march-attr is set. If the priv attributes are not set, then try to update them by the default setting (-mpriv-spec or --with-priv-spec). * testsuite/gas/riscv/attribute-02.d: Likewise. * testsuite/gas/riscv/attribute-03.d: Likewise. * testsuite/gas/riscv/attribute-04.d: Likewise. * testsuite/gas/riscv/attribute-06.d: Likewise. * testsuite/gas/riscv/attribute-07.d: Likewise. * testsuite/gas/riscv/attribute-08.d: Likewise. * testsuite/gas/riscv/attribute-09.d: Likewise. * testsuite/gas/riscv/attribute-10.d: Likewise. * testsuite/gas/riscv/attribute-unknown.d: Likewise. * testsuite/gas/riscv/attribute-05.d: Likewise. Also, the priv spec set by priv attributes must be supported. * testsuite/gas/riscv/attribute-05.s: Likewise. * testsuite/gas/riscv/priv-reg-fail-version-1p9.d: Likewise. Updated priv attributes according to the -mpriv-spec option. * testsuite/gas/riscv/priv-reg-fail-version-1p9p1.d: Likewise. * testsuite/gas/riscv/priv-reg-fail-version-1p10.d: Likewise. * testsuite/gas/riscv/priv-reg-fail-version-1p11.d: Likewise. * testsuite/gas/riscv/priv-reg.d: Removed. * testsuite/gas/riscv/priv-reg-version-1p9.d: New test case. Dump the CSR according to the priv spec 1.9. * testsuite/gas/riscv/priv-reg-version-1p9p1.d: New test case. Dump the CSR according to the priv spec 1.9.1. * testsuite/gas/riscv/priv-reg-version-1p10.d: New test case. Dump the CSR according to the priv spec 1.10. * testsuite/gas/riscv/priv-reg-version-1p11.d: New test case. Dump the CSR according to the priv spec 1.11. * config/tc-riscv.c (md_show_usage): Add descriptions about the new GAS options. * doc/c-riscv.texi: Likewise.
2020-05-19Power10 dcbf, sync, and wait extensions.Peter Bergner5-0/+91
opcodes/ * ppc-opc.c (insert_ls, extract_ls): Handle 3-bit L fields and new WC values on POWER10 sync, dcbf and wait instructions. (insert_pl, extract_pl): New functions. (L2OPT, LS, WC): Use insert_ls and extract_ls. (LS3): New , 3-bit L for sync. (LS3, L3OPT): New, 3-bit L for sync and dcbf. (SC2, PL): New, 2-bit SC and PL for sync and wait. (XWCPL_MASK, XL3RT_MASK, XSYNCLS_MASK): New instruction masks. (XOPL3, XWCPL, XSYNCLS): New opcode macros. (powerpc_opcodes) <dcbflp, dcbfps, dcbstps pause_short, phwsync, plwsync, stcisync, stncisync, stsync, waitrsv>: New extended mnemonics. <wait>: Enable PL operand on POWER10. <dcbf>: Enable L3OPT operand on POWER10. <sync>: Enable SC2 operand on POWER10. gas/ * testsuite/gas/ppc/power9.s <dcbf, dcbfl, dcbflp>: Add tests. * testsuite/gas/ppc/power9.d: Likewise. * testsuite/gas/ppc/power10.s <dcbf, dcbfps, dcbstps, hwsync, lwsync, pause_short, phwsync, plwsync, ptesync, stcisync, stncisync, stsync, sync, wait, waitrsv>: Add tests. * testsuite/gas/ppc/power10.d: Likewise.
2020-05-19Fix the ARM assembler to generate a Realtime profile for armv8-r.Alexander Fedotov6-10/+21
PR 25992 gas * config/tc-arm.c : Add arm_ext_v8r feature. (it_fsm_post_encode): Check arm_ext_v8r feature. (get_aeabi_cpu_arch_from_fset): Check arm_ext_v8r feature. include * opcode/arm.h (ARM_EXT2_V8R): Define. Modified ARM_AEXT2_V8R.
2020-05-19Use bfd_get_filename throughout gasAlan Modra2-6/+16
* write.c (write_contents): Use bfd_get_filename rather than accessing bfd->filename directly. Use bfd_section_name rather than accessing section->name directly.
2020-05-19Clear all local_symbol.lsy_flagsAlan Modra2-2/+6
* symbols.c (local_symbol_make): Init all of lsy_flags.
2020-05-18Re: Fix tight loop on recursively-defined symbolsAlan Modra2-0/+6
sy_resolving ought to not be set for a struct local_symbol, but it is apparent from local_symbol_make that the field is not initialised. * symbols.c (resolve_symbol_value): Invoke LOCAL_SYMBOL_CHECK before looking at add_symbol->sy_flags.sy_resolving.
2020-05-18Don't handle lret/iret when -mlfence-before-ret=[or|not|shl|yes] since they ↵liuhongt14-182/+22
are invalid in SGX enclaves. gas/ChangeLog * gas/config/tc-i386.c: Not handle lret/iret. * gas/testsuite/gas/i386/lfence-ret-a.d: Adjust testcase. * gas/testsuite/gas/i386/lfence-ret-b.d: Ditto. * gas/testsuite/gas/i386/lfence-ret-c.d: Ditto. * gas/testsuite/gas/i386/lfence-ret-d.d: Ditto. * gas/testsuite/gas/i386/lfence-ret.s: Ditto. * gas/testsuite/gas/i386/x86-64-lfence-ret-a.d: Ditto. * gas/testsuite/gas/i386/x86-64-lfence-ret-b.d: Ditto. * gas/testsuite/gas/i386/x86-64-lfence-ret-c.d: Ditto. * gas/testsuite/gas/i386/x86-64-lfence-ret-d.d: Ditto. * gas/testsuite/gas/i386/x86-64-lfence-ret-e.d: Ditto. * gas/testsuite/gas/i386/x86-64-lfence-ret.s: Ditto. * gas/testsuite/gas/i386/x86-64-lfence-ret.e: Deleted.
2020-05-15Fix tight loop on recursively-defined symbolsAlan Modra6-3/+48
This patch fixes a bug in GAS where the assembler enters a tight loop when attempting to resolve recursively-defined symbols, e.g. when trying to assemble "a=a". This is a regression introduced between binutils 2.32 and 2.33, by commit 1903f1385bff9 * symbols.c (struct local_symbol): Update comment. (resolve_symbol_value): For resolved symbols equated to other symbols, verify that the referenced symbol is not a local_symbol before accessing sy_value. Don't leave symbol loops during finalize_syms resolution. * testsuite/gas/all/assign-bad-recursive.d: New test. * testsuite/gas/all/assign-bad-recursive.l: Error output for test. * testsuite/gas/all/assign-bad-recursive.s: Assembly for test. * testsuite/gas/all/gas.exp: Run it.
2020-05-14Update Swedish translation for the gas sub-directory and a new Serbian ↵Nick Clifton2-390/+235
translation for the gold sub-directory.
2020-05-11Power10 VSX scalar min-max-compare quad precision operationsAlan Modra4-0/+29
opcodes/ * ppc-opc (powerpc_opcodes): Add xscmpeqqp, xscmpgeqp, xscmpgtqp, xsmaxcqp, xsmincqp. gas/ * testsuite/gas/ppc/scalarquad.d, * testsuite/gas/ppc/scalarquad.s: New test. * testsuite/gas/ppc/ppc.exp: Run it.
2020-05-11Power10 VSX load/store rightmost element operationsAlan Modra4-0/+34
opcodes/ * ppc-opc.c (powerpc_opcodes): Add lxvrbx, lxvrhx, lxvrwx, lxvrdx, stxvrbx, stxvrhx, stxvrwx, stxvrdx. gas/ * testsuite/gas/ppc/rightmost.d, * testsuite/gas/ppc/rightmost.s: New test. * testsuite/gas/ppc/ppc.exp: Run it.
2020-05-11Power10 test lsb by byte operationAlan Modra4-0/+34
opcodes/ * ppc-opc.c (powerpc_opcodes): Add xvtlsbb. gas/ * testsuite/gas/ppc/xvtlsbb.d, * testsuite/gas/ppc/xvtlsbb.s: New test. * testsuite/gas/ppc/ppc.exp: Run it.
2020-05-11Power10 string operationsAlan Modra4-0/+39
opcodes/ * ppc-opc.c (powerpc_opcodes): Add vstribl, vstribr, vstrihl, vstrihr, vclrlb, vclrrb, vstribl., vstribr., vstrihl., vstrihr.. gas/ * testsuite/gas/ppc/stringop.d, * testsuite/gas/ppc/stringop.s: New test. * testsuite/gas/ppc/ppc.exp: Run it.
2020-05-11Power10 Set boolean extensionPeter Bergner4-0/+27
opcodes/ * ppc-opc.c (powerpc_opcodes) <setbc, setbcr, setnbc, setnbcr>: New mnemonics. gas/ * testsuite/gas/ppc/set_bool.d, * testsuite/gas/ppc/set_bool.s: New test. * testsuite/gas/ppc/ppc.exp: Run it.
2020-05-11Power10 bit manipulation operationsAlan Modra4-0/+44
opcodes/ * ppc-opc.c (UIM8, P_U8XX4_MASK): Define. (powerpc_opcodes): Add vgnb, vcfuged, vpextd, vpdepd, vclzdm, vctzdm, cntlzdm, pdepd, pextd, cfuged, cnttzdm. (prefix_opcodes): Add xxeval. gas/ * testsuite/gas/ppc/bitmanip.d, * testsuite/gas/ppc/bitmanip.s: New test. * testsuite/gas/ppc/ppc.exp: Run it.
2020-05-11Power10 VSX PCV generate operationsAlan Modra4-0/+27
opcodes/ * ppc-opc.c (powerpc_opcodes): Add xxgenpcvbm, xxgenpcvhm, xxgenpcvwm, xxgenpcvdm. gas/ * testsuite/gas/ppc/genpcv.d, * testsuite/gas/ppc/genpcv.s: New test. * testsuite/gas/ppc/ppc.exp: Run it.
2020-05-11Power10 VSX Mask Manipulation OperationsAlan Modra4-0/+59
opcodes/ * ppc-opc.c (MP, VXVAM_MASK): Define. (VXVAPS_MASK): Use VXVA_MASK. (powerpc_opcodes): Add mtvsrbmi, vexpandbm, vexpandhm, vexpandwm, vexpanddm, vexpandqm, vextractbm, vextracthm, vextractwm, vextractdm, vextractqm, mtvsrbm, mtvsrhm, mtvsrwm, mtvsrdm, mtvsrqm, vcntmbb, vcntmbh, vcntmbw, vcntmbd. gas/ * testsuite/gas/ppc/maskmanip.d, * testsuite/gas/ppc/maskmanip.s: New test. * testsuite/gas/ppc/ppc.exp: Run it.
2020-05-11Power10 Reduced precision outer product operationsAlan Modra7-1/+207
include/ * opcode/ppc.h (PPC_OPERAND_ACC): Define. Renumber following PPC_OPERAND defines. opcodes/ * ppc-opc.c (insert_xa6a, extract_xa6a, insert_xb6a, extract_xb6a): New functions. (powerpc_operands): Define ACC, PMSK8, PMSK4, PMSK2, XMSK, YMSK, YMSK2, XA6a, XA6ap, XB6a entries. (PMMIRR, P_X_MASK, P_XX1_MASK, P_GER_MASK): Define (P_GER2_MASK, P_GER4_MASK, P_GER8_MASK, P_GER64_MASK): Define. (PPCVSX4): Define. (powerpc_opcodes): Add xxmfacc, xxmtacc, xxsetaccz, xvi8ger4pp, xvi8ger4, xvf16ger2pp, xvf16ger2, xvf32gerpp, xvf32ger, xvi4ger8pp, xvi4ger8, xvi16ger2spp, xvi16ger2s, xvbf16ger2pp, xvbf16ger2, xvf64gerpp, xvf64ger, xvi16ger2, xvf16ger2np, xvf32gernp, xvi8ger4spp, xvi16ger2pp, xvbf16ger2np, xvf64gernp, xvf16ger2pn, xvf32gerpn, xvbf16ger2pn, xvf64gerpn, xvf16ger2nn, xvf32gernn, xvbf16ger2nn, xvf64gernn, xvcvbf16sp, xvcvspbf16. (prefix_opcodes): Add pmxvi8ger4pp, pmxvi8ger4, pmxvf16ger2pp, pmxvf16ger2, pmxvf32gerpp, pmxvf32ger, pmxvi4ger8pp, pmxvi4ger8, pmxvi16ger2spp, pmxvi16ger2s, pmxvbf16ger2pp, pmxvbf16ger2, pmxvf64gerpp, pmxvf64ger, pmxvi16ger2, pmxvf16ger2np, pmxvf32gernp, pmxvi8ger4spp, pmxvi16ger2pp, pmxvbf16ger2np, pmxvf64gernp, pmxvf16ger2pn, pmxvf32gerpn, pmxvbf16ger2pn, pmxvf64gerpn, pmxvf16ger2nn, pmxvf32gernn, pmxvbf16ger2nn, pmxvf64gernn. gas/ * config/tc-ppc.c (pre_defined_registers): Add accumulators. (md_assemble): Check acc specified in correct operand. * testsuite/gas/ppc/outerprod.d, * testsuite/gas/ppc/outerprod.s, * testsuite/gas/ppc/vsx4.d, * testsuite/gas/ppc/vsx4.s: New tests. * testsuite/gas/ppc/ppc.exp: Run them.
2020-05-11Power10 SIMD permute class operationsAlan Modra4-0/+97
opcodes/ * ppc-opc.c (insert_imm32, extract_imm32): New functions. (insert_xts, extract_xts): New functions. (IMM32, UIM3, IX, UIM5, SH3, XTS, P8RR): Define. (P_XX4_MASK, P_UXX4_MASK, VSOP, P_VS_MASK, P_VSI_MASK): Define. (VXRC_MASK, VXSH_MASK): Define. (powerpc_opcodes): Add vinsbvlx, vsldbi, vextdubvlx, vextdubvrx, vextduhvlx, vextduhvrx, vextduwvlx, vextduwvrx, vextddvlx, vextddvrx, vinshvlx, vinswvlx, vinsw, vinsbvrx, vinshvrx, vinswvrx, vinsd, vinsblx, vsrdbi, vinshlx, vinswlx, vinsdlx, vinsbrx, vinshrx, vinswrx, vinsdrx, lxvkq. (prefix_opcodes): Add xxsplti32dx, xxspltidp, xxspltiw, xxblendvb, xxblendvh, xxblendvw, xxblendvd, xxpermx. gas/ * testsuite/gas/ppc/simd_perm.d, * testsuite/gas/ppc/simd_perm.s: New test. * testsuite/gas/ppc/ppc.exp: Run it.
2020-05-11Power10 128-bit binary integer operationsAlan Modra4-0/+83
opcodes/ * ppc-opc.c (powerpc_opcodes): Add vrlq, vdivuq, vmsumcud, vrlqmi, vmuloud, vcmpuq, vslq, vdivsq, vcmpsq, vrlqnm, vcmpequq, vmulosd, vsrq, vdiveuq, vcmpgtuq, vmuleud, vsraq, vdivesq, vcmpgtsq, vmulesd, vcmpequq., vextsd2q, vmoduq, vcmpgtuq., vmodsq, vcmpgtsq., xscvqpuqz, xscvuqqp, xscvqpsqz, xscvsqqp, dcffixqq, dctfixqq. gas/ * testsuite/gas/ppc/int128.d, * testsuite/gas/ppc/int128.s: New test. * testsuite/gas/ppc/ppc.exp: Run it.
2020-05-11Power10 VSX 32-byte storage accessAlan Modra4-0/+57
bfd/ * elf64-ppc.c (xlate_pcrel_opt): Handle lxvp and stxvp. opcodes/ * ppc-opc.c (insert_xtp, extract_xtp): New functions. (XTP, DQXP, DQXP_MASK): Define. (powerpc_opcodes): Add lxvp, stxvp, lxvpx, stxvpx. (prefix_opcodes): Add plxvp and pstxvp. gas/ * testsuite/gas/ppc/vsx_32byte.d, * testsuite/gas/ppc/vsx_32byte.s: New test. * testsuite/gas/ppc/ppc.exp: Run it. ld/ * testsuite/ld-powerpc/pcrelopt.s: Add lxvp and stxvp. * testsuite/ld-powerpc/pcrelopt.d: Update.
2020-05-11Power10 vector integer multiply, divide, modulo insnsAlan Modra4-0/+53
opcodes/ * ppc-opc.c (powerpc_opcodes): Add vdivuw, vdivud, vdivsw, vmulld, vdivsd, vmulhuw, vdiveuw, vmulhud, vdiveud, vmulhsw, vdivesw, vmulhsd, vdivesd, vmoduw, vmodud, vmodsw, vmodsd. gas/ * testsuite/gas/ppc/vec_mul.s, * testsuite/gas/ppc/vec_mul.d: New test. * testsuite/gas/ppc/ppc.exp: Run it.
2020-05-11Power10 byte reverse instructionsPeter Bergner4-0/+25
opcodes/ * ppc-opc.c (powerpc_opcodes) <brd, brh, brw>: New mnemonics. gas/ * testsuite/gas/ppc/byte_rev.d, * testsuite/gas/ppc/byte_rev.s: New test. * testsuite/gas/ppc/ppc.exp: Run it.
2020-05-11Power10 Copy/Paste ExtensionsPeter Bergner3-0/+11
opcodes/ * opcodes/ppc-opc.c (insert_l1opt, extract_l1opt): New functions. (L1OPT): Define. (powerpc_opcodes) <paste.>: Add L operand for cpu POWER10. gas/ * testsuite/gas/ppc/power10.d: Add paste. tests. * testsuite/gas/ppc/power10.s: Likewise.
2020-05-11Power10 Add new L operand to the slbiag instructionPeter Bergner4-0/+25
opcodes/ * ppc-opc.c (powerpc_opcodes) <slbiag>: Add variant with L operand. gas/ * testsuite/gas/ppc/power10.s: New test. * testsuite/gas/ppc/power10.d: Likewise. * testsuite/gas/ppc/ppc.exp: Run it.
2020-05-11PowerPC Rename powerxx to power10Alan Modra5-9/+18
Now that ISA3.1 is out we can finish with the powerxx silliness. bfd/ * elf64-ppc.c: Rename powerxx to power10 throughout. gas/ * config/tc-ppc.c (md_assemble): Update for PPC_OPCODE_POWER10 renaming. * testsuite/gas/ppc/prefix-align.d: Use -mpower10/-Mpower10 in place of -mfuture/-Mfuture. * testsuite/gas/ppc/prefix-pcrel.d: Likewise. * testsuite/gas/ppc/prefix-reloc.d: Likewise. gold/ * powerpc.cc: Rename powerxx to power10 throughout. include/ * elf/ppc64.h: Update comment. * opcode/ppc.h (PPC_OPCODE_POWER10): Rename from PPC_OPCODE_POWERXX. ld/ * testsuite/ld-powerpc/callstub-1.d: Use -mpower10/-Mpower10 in place of -mfuture/-Mfuture. * testsuite/ld-powerpc/notoc2.d: Likewise. * testsuite/ld-powerpc/powerpc.exp: Likewise. * testsuite/ld-powerpc/tlsgd.d: Likewise. * testsuite/ld-powerpc/tlsie.d: Likewise. * testsuite/ld-powerpc/tlsld.d: Likewise. opcodes/ * ppc-dis.c (ppc_opts): Add "power10" entry. (print_insn_powerpc): Update for PPC_OPCODE_POWER10 renaming. * ppc-opc.c (POWER10): Rename from POWERXX. Update all uses.
2020-05-06Updated Swedish translation for the gas sub-directoryNick Clifton2-3004/+4050
2020-05-06Section "3.1 Preprocessing" of the online GAS manual has a wrong reference ↵Nick Clifton2-2/+10
to "Using GNU CC". This fixes that link. PR 25927 * doc/as.texi (Preprocessing): Replace cross reference to not existant document with a URL to the equivalent page in the GCC manual.
2020-05-05Restore readelf's warnings that describe real problems with the file being ↵Nick Clifton3-2/+13
examined. Fix bug displaying empty file name tables. binutils* dwarf.c (do_checks): New global variable. (display_formatted_table): Warn about an unexpected number of columns in the table, if checks are enabled. Do not complain about the lack of data following the number of entries in the table if the table is empty. (display_debug_lines_decoded): Only warn about an unexpected number of columns in a table if checks are enabled. * dwarf.h (do_checks): Add a prototype. * elfcomm.c (error): Remove weak attribute. (warn): Likewise. * readelf.c (do_checks): Delete. (warn): Delete. (process_section_headers): Only warn about empty sections if checks are enabled. gas * dwarf2dbg.c (out_dir_and_file_list): Add comments describing the construction of a DWARF-5 directory name table. * testsuite/gas/elf/pr25917.d: Update expected output.
2020-05-05[GAS] change of ELF flags initial value in rx-linuxGunther Nikl2-8/+6
* config/tc-rx.c (elf_flags): Initialize for non-linux targets. (md_parse_option): Remove initialization of elf_flags.
2020-05-04GAS: Do not create an entry for the default directory if the directory table ↵Nick Clifton2-4/+6
is empty. Improve readelf's decoding of empty directory and file name tables. PR 25917 * dwarf.c (display_debug_lines_decoded): Warn if encountering a supicious number of entries for DWARF-5 format directory and file name tables. Do not display file name table header if the table is empty. Do not allocate space for empty tables.
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