| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2017-11-24 | x86: reject further invalid AVX-512 masking constructs | Jan Beulich | 6 | -3/+62 |
| 2017-11-24 | x86: don't omit disambiguating suffixes from "fi*" | Jan Beulich | 10 | -13/+25 |
| 2017-11-23 | Fix vax/ns32k/mmix gas testsuite regression. | Jim Wilson | 2 | -1/+4 |
| 2017-11-23 | Fix build error with --enable-targets=all. | Jim Wilson | 3 | -0/+13 |
| 2017-11-23 | Add Disp8MemShift for AVX512 VAES instructions. | Igor Tsimbalist | 18 | -96/+215 |
| 2017-11-23 | x86: fix AVX-512 16-bit addressing | Jan Beulich | 5 | -5/+28 |
| 2017-11-23 | x86-64: always use unsigned 32-bit reloc for 32-bit addressing w/o base reg | Jan Beulich | 4 | -2/+21 |
| 2017-11-23 | x86: drop redundant VSIB handling code | Jan Beulich | 2 | -7/+6 |
| 2017-11-23 | x86: correct UDn | Jan Beulich | 9 | -11/+21 |
| 2017-11-23 | x86/Intel: don't report multiple errors for a single insn operand | Jan Beulich | 4 | -8/+11 |
| 2017-11-22 | Riscv ld-elf/stab failure and fake label cleanup. | Jim Wilson | 10 | -14/+57 |
| 2017-11-22 | Update docs on filling text with nops. | Jim Wilson | 2 | -3/+8 |
| 2017-11-22 | [GAS/ARM] Clarify relation between reg_expected_msgs and arm_reg_type | Thomas Preud'homme | 2 | -23/+33 |
| 2017-11-22 | [ARC] Fix handling of ARCv2 H-register class. | claziss | 2 | -0/+15 |
| 2017-11-21 | x86: Add tests for -n option of x86 assembler | H.J. Lu | 5 | -0/+58 |
| 2017-11-21 | [ARC] Improve printing of pc-relative instructions. | claziss | 23 | -155/+193 |
| 2017-11-21 | xtensa error message | Alan Modra | 2 | -16/+11 |
| 2017-11-21 | mingw gas testsuite fix | Alan Modra | 2 | -0/+5 |
| 2017-11-16 | Add new AArch64 FP16 FM{A|S} instructions. | Tamar Christina | 5 | -2/+15 |
| 2017-11-16 | Correct AArch64 crypto dependencies. | Tamar Christina | 1 | -0/+7 |
| 2017-11-16 | Update documentation for Arvm8.4-A changes to AArch64. | Tamar Christina | 2 | -3/+16 |
| 2017-11-16 | Add assembler and disassembler support for the new Armv8.4-a instructions for... | Tamar Christina | 13 | -0/+12823 |
| 2017-11-16 | x86: ignore high register select bit(s) in 32- and 16-bit modes | Jan Beulich | 3 | -4/+82 |
| 2017-11-16 | ix86/Intel: don't require memory operand size specifier for PTWRITE | Jan Beulich | 5 | -1/+13 |
| 2017-11-16 | i386: Replace .code64/.code32 with .byte | H.J. Lu | 2 | -13/+13 |
| 2017-11-15 | Separate the new FP16 instructions backported from Armv8.4-a to Armv8.2-a int... | Tamar Christina | 7 | -5/+24 |
| 2017-11-15 | Add support to readelf and objdump for following links to separate debug info... | Nick Clifton | 13 | -12/+29 |
| 2017-11-15 | x86: use correct register names | Jan Beulich | 3 | -0/+27 |
| 2017-11-15 | x86: drop VEXI4_Fixup() | Jan Beulich | 4 | -0/+28 |
| 2017-11-15 | x86-64: don't allow use of %axl as accumulator | Jan Beulich | 9 | -0/+85 |
| 2017-11-14 | First part of fix for riscv gas lns-common-1 failure. | Jim Wilson | 2 | -0/+5 |
| 2017-11-14 | x86: add disassembler support for XOP VPCOM* pseudo-ops | Jan Beulich | 4 | -1194/+1199 |
| 2017-11-14 | x86: add support for AVX-512 VPCMP*{B,W} pseudo-ops | Jan Beulich | 7 | -0/+224 |
| 2017-11-14 | x86: string insns don't allow displacements | Jan Beulich | 6 | -33/+52 |
| 2017-11-13 | gas/arm64: don't emit stack pointer symbol table entries | Jan Beulich | 2 | -5/+11 |
| 2017-11-13 | gas/ia64: fix testsuite failures | Jan Beulich | 4 | -11/+18 |
| 2017-11-13 | x86: don't default variable shift count insns to 8-bit operand size | Jan Beulich | 4 | -1/+20 |
| 2017-11-13 | x86/Intel: don't mistake riz/eiz as base register | Jan Beulich | 4 | -1/+20 |
| 2017-11-13 | x86-64/Intel: issue diagnostic for out of range displacement | Jan Beulich | 5 | -29/+56 |
| 2017-11-09 | Fix riscv dwarf2-10 gas testsuite failure. | Jim Wilson | 2 | -1/+5 |
| 2017-11-09 | Enable the Dot Product extension by default for Armv8.4-a. | Tamar Christina | 3 | -0/+17 |
| 2017-11-09 | Add assembler and disassembler support for the new Armv8.4-a registers for AA... | Tamar Christina | 6 | -0/+555 |
| 2017-11-09 | Adds the new Fields and Operand types for the new instructions in Armv8.4-a. | Tamar Christina | 2 | -0/+17 |
| 2017-11-09 | Split the ARM Crypto ISA extensions for AES and SHA1+2 into their own options... | Tamar Christina | 2 | -0/+11 |
| 2017-11-08 | Fix typo in changelog | Nick Clifton | 1 | -1/+1 |
| 2017-11-08 | Split the AArch64 Crypto instructions for AES and SHA1+2 into their own optio... | Nick Clifton | 2 | -1/+13 |
| 2017-11-08 | Adds command line support for Armv8.4-A, via the new command line option -mar... | Jiong Wang | 12 | -3/+1552 |
| 2017-11-08 | xtensa message pluralization | Alan Modra | 2 | -4/+18 |
| 2017-11-07 | RISC-V: Fix riscv g++ testsuite EH failures. | Jim Wilson | 5 | -0/+47 |
| 2017-11-07 | RISC-V: Add satp as an alias for sptbr | Palmer Dabbelt | 5 | -0/+23 |
