| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2018-11-09 | PowerPC, don't use bfd reloc howto in md_assemble | Alan Modra | 2 | -11/+255 |
| 2018-11-07 | Add updated French and Portuguese translations. | Nick Clifton | 2 | -2994/+3076 |
| 2018-11-07 | rx: Add target rx-*-linux. | Yoshinori Sato | 5 | -2/+13 |
| 2018-11-06 | [arm] fix testsuite breakage on pe-coff | Matthew Malcomson | 2 | -2/+8 |
| 2018-11-06 | [arm] Check for neon and condition in vcvt.f16.f32 | Matthew Malcomson | 7 | -14/+40 |
| 2018-11-06 | PowerPC instruction mask checks | Alan Modra | 2 | -14/+29 |
| 2018-11-06 | PowerPC instruction operand flag validation | Alan Modra | 2 | -0/+14 |
| 2018-11-06 | x86: correctly handle VPBROADCASTD with EVEX.W set outside of 64-bit mode | Jan Beulich | 4 | -0/+10 |
| 2018-11-06 | x86: correctly handle VMOVD with EVEX.W set outside of 64-bit mode | Jan Beulich | 4 | -0/+20 |
| 2018-11-06 | x86: correctly handle KMOVD with VEX.W set outside of 64-bit mode | Jan Beulich | 3 | -0/+9 |
| 2018-11-06 | x86: adjust {,E}VEX.W handling for PEXTR* / PINSR* | Jan Beulich | 8 | -0/+60 |
| 2018-11-06 | x86: adjust {,E}VEX.W handling outside of 64-bit mode | Jan Beulich | 13 | -31/+241 |
| 2018-11-06 | x86: fix various non-LIG templates | Jan Beulich | 10 | -0/+433 |
| 2018-11-06 | x86: allow {store} to select alternative {,}PEXTRW encoding | Jan Beulich | 5 | -2/+51 |
| 2018-11-06 | x86: add more VexWIG | Jan Beulich | 9 | -18/+70 |
| 2018-11-05 | Correct ChangeLog entries for PR gas/23854 commit | H.J. Lu | 1 | -1/+1 |
| 2018-11-05 | x86: Disable GOT relaxation with data prefix | H.J. Lu | 3 | -7/+15 |
| 2018-11-01 | Fix ld action in run_dump_test | Thomas Preud'homme | 2 | -0/+13 |
| 2018-10-31 | [GAS][ARM] Fix ARMv8.1 AdvSIMD testism | Andre Vieira | 2 | -1/+4 |
| 2018-10-31 | [GAS][ARM] Fix UDF testism | Andre Vieira | 2 | -23/+23 |
| 2018-10-31 | [GAS][ARM] Fix failing Armv1 test | Andre Vieira | 2 | -18/+23 |
| 2018-10-29 | Move struc-symbol.h to symbols.c | Alan Modra | 31 | -326/+353 |
| 2018-10-28 | Correct ChangeLog | Alan Modra | 1 | -1/+1 |
| 2018-10-28 | PR23837, Segmentation fault in resolve_symbol_value | Alan Modra | 2 | -2/+8 |
| 2018-10-23 | S/390: Support vector alignment hints | Andreas Krebbel | 3 | -0/+31 |
| 2018-10-23 | S12Z: Handle 16 bit fixups which are constant. | John Darrington | 2 | -0/+8 |
| 2018-10-22 | gas simple-forward test | Alan Modra | 5 | -2/+36 |
| 2018-10-22 | Apply alpha BFD_RELOC_8 fixups | Alan Modra | 4 | -4/+15 |
| 2018-10-22 | PR23040, .uleb128 directive doesn't accept some valid expressions | Alan Modra | 4 | -20/+48 |
| 2018-10-20 | PR23800, .eqv doesn't always defer expression evaluation | Alan Modra | 6 | -1/+55 |
| 2018-10-19 | Arm: Skip new binary decode tests on pe targets | Tamar Christina | 3 | -2/+7 |
| 2018-10-19 | Arm: Fix disassembler crashing on -b binary when thumb file and thumb not for... | Tamar Christina | 4 | -0/+17 |
| 2018-10-19 | This set of changes clarifies the conditions for the R5900 short loop fix and... | Fredrik Noring | 4 | -10/+71 |
| 2018-10-16 | AArch64: Fix error checking for SIMD udot (by element) | Matthew Malcomson | 4 | -0/+28 |
| 2018-10-15 | BFD_INIT_MAGIC | Alan Modra | 2 | -1/+8 |
| 2018-10-11 | x86: add {,V}MOVQ cases to xmmword test | Jan Beulich | 3 | -0/+19 |
| 2018-10-10 | x86: fold Size{16,32,64} template attributes | Jan Beulich | 2 | -6/+11 |
| 2018-10-09 | [PATCH, BINUTULS, AARCH64, 9/9] Add SSBS to MSR/MRS | Sudakshina Das | 10 | -0/+220 |
| 2018-10-09 | [PATCH, BINUTILS, AARCH64, 8/9] Add SCXTNUM_ELx and ID_PFR2_EL1 system registers | Sudakshina Das | 4 | -0/+25 |
| 2018-10-09 | [PATCH, BINUTILS, AARCH64, 7/9] Add BTI instruction | Sudakshina Das | 7 | -4/+95 |
| 2018-10-09 | [PATCH, BINUTILS, AARCH64, 6/9] Add Random number instructions | Sudakshina Das | 6 | -1/+19 |
| 2018-10-09 | [PATCH, BINUTILS, AARCH64, 5/9] Add DC CVADP instruction | Sudakshina Das | 4 | -0/+9 |
| 2018-10-09 | [PATCH, BINUTILS, AARCH64, 4/9] Add Execution and Data Restriction instructions | Sudakshina Das | 9 | -0/+78 |
| 2018-10-09 | [PATCH, BINUTILS, AARCH64, 3/9] Add instruction SB for ARMv8.5-A | Sudakshina Das | 6 | -0/+40 |
| 2018-10-09 | [PATCH, BINUTILS, AARCH64, 2/9] Add Data procoessing instructions for ARMv8.5-A | Sudakshina Das | 3 | -0/+55 |
| 2018-10-09 | [PATCH, BINUTILS, AARCH64, 1/9] Add -march=armv8.5-a and related internal fea... | Sudakshina Das | 3 | -1/+9 |
| 2018-10-05 | x86: Add Intel ENCLV to assembler and disassembler | H.J. Lu | 5 | -0/+11 |
| 2018-10-05 | [Arm, 3/3] Add Execution and Data Prediction instructions for AArch32 | Sudakshina Das | 8 | -0/+63 |
| 2018-10-05 | [Arm, 2/3] Add instruction SB for AArch32 | Sudakshina Das | 10 | -0/+83 |
| 2018-10-05 | [Arm, 1/3] Add -march=armv8.5-a and related internal feature macros to AArch32 | Sudakshina Das | 4 | -0/+27 |
