Age | Commit message (Expand) | Author | Files | Lines |
2022-03-23 | x86: reject relocations involving registers | Jan Beulich | 1 | -0/+6 |
2022-03-23 | x86: improve resolution of register equates | Jan Beulich | 2 | -2/+18 |
2022-03-23 | x86: don't attempt to resolve equates and alike from i386_parse_name() | Jan Beulich | 3 | -0/+29 |
2022-03-23 | gas/Dwarf: improve debug info generation from .irp and alike blocks | Jan Beulich | 3 | -0/+112 |
2022-03-23 | ELF32: don't silently truncate relocation addends | Jan Beulich | 6 | -9/+23 |
2022-03-23 | gas: retain whitespace between strings | Jan Beulich | 3 | -0/+43 |
2022-03-21 | x86: don't suppress overflow diagnostics in x32 mode | Jan Beulich | 2 | -0/+28 |
2022-03-21 | z80 assembler: Fix new unexpected overflow warning in v2.37 | Nick Clifton | 2 | -0/+23 |
2022-03-18 | RISC-V: Cache management instructions | Tsukasa OI | 10 | -0/+70 |
2022-03-18 | RISC-V: Prefetch hint instructions and operand set | Tsukasa OI | 5 | -0/+27 |
2022-03-17 | x86: don't accept base architectures as extensions | Jan Beulich | 3 | -0/+4 |
2022-03-17 | x86: add another IAMCU testcase | Jan Beulich | 2 | -2/+7 |
2022-03-17 | x86: drop L1OM/K1OM support from gas | Jan Beulich | 7 | -532/+0 |
2022-03-17 | x86: assorted IAMCU CPU checking fixes | Jan Beulich | 3 | -0/+6 |
2022-03-16 | PowerPC VLE extended instructions in powerpc_macros | Alan Modra | 1 | -5/+5 |
2022-03-16 | PowerPC32 extended instructions in powerpc_macros | Alan Modra | 2 | -17/+17 |
2022-03-16 | PowerPC64 extended instructions in powerpc_macros | Alan Modra | 2 | -14/+14 |
2022-03-09 | Constant fold view increment expressions | Alan Modra | 1 | -2/+1 |
2022-03-04 | RISC-V: make .insn actually work for 64-bit insns | Jan Beulich | 2 | -0/+8 |
2022-03-04 | x86: drop redundant x86-64-code16-2 test | Jan Beulich | 2 | -5/+0 |
2022-02-23 | RISC-V: PR28733, add missing extension info to 'unrecognized opcode' error | Patrick O'Neill | 2 | -22/+22 |
2022-02-23 | RISC-V: PR28733, add missing extension info to 'invalid CSR' error | Patrick O'Neill | 4 | -696/+696 |
2022-02-23 | RISC-V: Updated CSRs to privileged spec v1.12 and debug spec v1.0. | Nelson Chu | 11 | -245/+288 |
2022-02-23 | RISC-V: Add Privileged Architecture 1.12 CSRs | Tsukasa OI | 11 | -0/+1249 |
2022-02-23 | RISC-V: Reorganize testcases for CFI directives | Tsukasa OI | 2 | -13/+86 |
2022-01-12 | gas: add visibility support using GNU syntax on XCOFF | Clément Chigot | 4 | -0/+47 |
2022-01-12 | gas: add visibility support for XCOFF | Clément Chigot | 6 | -32/+253 |
2022-01-12 | objdump, readelf: Emit "CU:" format only when wide output is requested | Hans-Peter Nilsson | 1 | -1/+1 |
2022-01-10 | XCOFF: add support for TLS relocations on hidden symbols | Clément Chigot | 7 | -84/+289 |
2022-01-07 | RISC-V: Updated the default ISA spec to 20191213. | Nelson Chu | 6 | -6/+6 |
2022-01-06 | aarch64: Add support for new SME instructions | Richard Sandiford | 2 | -0/+56 |
2022-01-05 | Adjust quoted-sym-names test | Alan Modra | 2 | -6/+6 |
2022-01-04 | x86/Intel: correct VFPCLASSP{S,D} handling when displacement is present | Jan Beulich | 3 | -4/+4 |
2022-01-04 | gas: rework handling of backslashes in quoted symbol names | Jan Beulich | 4 | -7/+27 |
2022-01-02 | Update year range in copyright notice of binutils files | Alan Modra | 191 | -191/+191 |
2021-12-24 | RISC-V: Rewrite the csr testcases. | Nelson Chu | 42 | -1521/+3567 |
2021-12-24 | RISC-V: Hypervisor ext: support Privileged Spec 1.12 | Vineet Gupta | 4 | -0/+308 |
2021-12-24 | RISC-V: Hypervisor ext: drop Privileged Spec 1.9.1 implementation/tests | Vineet Gupta | 9 | -90/+0 |
2021-12-22 | RISC-V: Update Scalar Crypto testcases. | jiawei | 18 | -144/+144 |
2021-12-17 | x86: Terminate mnemonicendp in swap_operand() | Vladimir Mezentsev | 8 | -420/+420 |
2021-12-16 | Fix AVR assembler so that it creates relocs that will work with linker relaxa... | Nick Clifton | 4 | -6/+6 |
2021-12-16 | arm: Add support for Armv9.1-A to Armv9.3-A | Richard Sandiford | 9 | -0/+81 |
2021-12-16 | arm: Add support for Armv8.7-A and Armv8.8-A | Richard Sandiford | 6 | -0/+54 |
2021-12-16 | aarch64: Add support for Armv9.1-A to Armv9.3-A | Richard Sandiford | 15 | -0/+88 |
2021-12-16 | RISC-V: Support svinval extension with frozen version 1.0. | Nelson Chu | 2 | -0/+20 |
2021-12-09 | RISC-V: Clarify the behavior of .option arch directive. | Nelson Chu | 8 | -9/+13 |
2021-12-02 | aarch64: Add BC instruction | Richard Sandiford | 5 | -0/+86 |
2021-12-02 | aarch64: Enforce P/M/E order for MOPS instructions | Richard Sandiford | 3 | -0/+174 |
2021-12-02 | aarch64: Add support for +mops | Richard Sandiford | 5 | -0/+1557 |
2021-12-02 | aarch64: Add Armv8.8-A system registers | Richard Sandiford | 5 | -0/+46 |