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2015-09-10S/390: Fix instruction format of crj*, clrj*, and clgrj*.Andreas Krebbel1-39/+39
2015-09-10S/390: Fix MASK_RIE_R0PI and MASK_RIE_R0PU.Andreas Krebbel1-52/+52
2015-09-09S/390: Fix opcode of ppno.Andreas Krebbel1-1/+1
2015-08-25Update MIPS tests for test failures on some configurations.Simon Dardis4-14/+20
2015-08-25Support for the sparc %pmcdper privileged register.Jose E. Marchesi5-0/+13
2015-08-24Fix the partial disassembly of a broken three byte instruction at the end of ...Jan Stancek3-0/+21
2015-08-21Allow symbol and label names to be enclosed in double quotes.Nick Clifton6-4/+24
2015-08-21PR binutils/18257: Properly decode x86/Intel mask instructions.Alexander Fomin5-2/+1002
2015-08-19[AArch64][5/6] GAS support TLSLD load/store relocation typesJiong Wang17-0/+146
2015-08-19[AArch64][3/6] GAS support TLSLD move/add relocation typesJiong Wang21-0/+167
2015-08-19[AArch64][1/6] GAS support BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NCJiong Wang5-0/+36
2015-08-13Fixes for unpredictable nops and 26-bit versions of teq,tst,cmn,cmp.Andre Vieira4-16/+39
2015-08-12xtensa: add --auto-litpools optionMax Filippov4-0/+34
2015-08-12[MIPS] Map 'move' to 'or'.Simon Dardis36-171/+227
2015-08-11[AArch64][7/8] GAS support BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12Jiong Wang5-0/+36
2015-08-11[AArch64][5/8] GAS support BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NCJiong Wang5-0/+38
2015-08-11[AArch64][2/8] GAS support BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21Jiong Wang5-0/+41
2015-08-10Add SIGRIE instruction for MIPS R6Robert Suchanek5-0/+16
2015-07-30Properly disassemble movnti in Intel modeH.J. Lu4-0/+334
2015-07-24Fix the evaluation of RL78 complex relocs, by making immediate values be comp...Nick Clifton5-1/+21
2015-07-24Remove leading/trailing white spaces in ChangeLogH.J. Lu1-1/+1
2015-07-22Fix memory operand size for vcvtt?ps2u?qq instructionsH.J. Lu13-240/+331
2015-07-21[ARM] Support correctly spelled ARMv6KZ architecture namesMatthew Wahab3-0/+33
2015-07-16Updates the ARM disassembler's output of floating point constants to include ...Alessandro Marzocchi1-2/+2
2015-07-16[AArch64][2/3] GAS support BFD_RELOC_AARCH64_TLSLD_ADR_PREL21Jiong Wang5-0/+40
2015-07-16[ARM] Make human parsing of "processor does not support instruction in mode" ...James Greenhalgh7-137/+146
2015-07-10Updated to accept .debug_* sectionsH.J. Lu2-2/+6
2015-07-10Add missing changelog entriesAlan Modra1-0/+6
2015-07-08Define DIFF_EXPR_OK for avr target to allow PC relative difference relocation.Denis Chertykov3-0/+59
2015-07-03Remove ppc860, ppc750cl, ppc7450 insns from common ppc.Alan Modra2-2/+6
2015-07-01Assembler tests for Nios II R2Sandra Loosemore123-0/+3862
2015-06-30Add support for monitorx/mwaitx instructionsAmit Pawar16-4/+304
2015-06-27Update ia64 gas testsH.J. Lu3-2/+7
2015-06-25Update .strtab section sizes in mmix testsH.J. Lu3-2/+7
2015-06-25Use strtab with GC and suffix merging for .strtabH.J. Lu4-0/+24
2015-06-22PPC sync instruction accepts invalid and incompatible operandsPeter Bergner3-4/+9
2015-06-22Stop "objdump -d" from disassembling past a symbolic address.Nick Clifton7-36/+48
2015-06-19Allow for optional operands with non-zero default values.Peter Bergner4-5/+11
2015-06-18Add support for using the ADR alias in Thumb mode against nearby symbols.Nick Clifton4-0/+27
2015-06-18Fix the computation of the addends for an ARM_TLS_LE32 reloc.Nick Clifton3-0/+48
2015-06-17Add support for converting LDR Rx,=<imm> to MOV or MVN in Thumb2 mode.Alessandro Marzocchi5-0/+66
2015-06-17Add support for converting VLDR <reg>,=<constant> to a VMOV instruction when ...Alessandro Marzocchi7-0/+278
2015-06-16[AArch64] Support id_mmfr4 system registerMatthew Wahab3-11/+18
2015-06-15[AArch64] Gas add BFD_RELOC_AARCH64_LD64_GOTOFF_LO15 supportRenlin Li3-15/+24
2015-06-15gas: Don't use frag_align but use plain padding to align .debug_aranges.Mark Wielaard3-0/+38
2015-06-04Add hwsync extended mnemonic.Peter Bergner3-4/+18
2015-06-03[ARM] Commit approaved testcases missed in previous commitMatthew Wahab3-0/+142
2015-06-02[ARM] Add support for ARMv8.1 PAN extensionMatthew Wahab3-9/+39
2015-06-02[AArch64] Support for ARMv8.1a Adv.SIMD instructionsMatthew Wahab4-0/+223
2015-06-02[AArch64] Support for ARMv8.1a Limited Ordering Regions extensionMatthew Wahab4-0/+97