Age | Commit message (Expand) | Author | Files | Lines |
2024-10-31 | gas/doc/riscv: Fixed misaligned instruction table | Nelson Chu | 1 | -42/+42 |
2024-10-29 | RISC-V: Update the doc to match ISA manual | Kito Cheng | 1 | -36/+36 |
2024-09-03 | RISC-V: Add support for XCVsimd extension in CV32E40P | Mary Bennett | 1 | -0/+5 |
2024-08-09 | RISC-V: PR32014, .option directives shuoldn't affect elf attribute. | Nelson Chu | 1 | -1/+6 |
2024-08-06 | RISC-V: Add support for XCvBitmanip extension in CV32E40P | Mary Bennett | 1 | -6/+11 |
2024-07-03 | gas/doc/riscv: Fixed typo of `.insn cj' format | Nelson Chu | 1 | -1/+1 |
2024-07-03 | gas/doc/riscv: Fixed syntax of `.option arch' when reseting whole architecture | Nelson Chu | 1 | -2/+2 |
2024-06-18 | RISC-V: Updated gas/NEWS and gas/doc/c-riscv.texi for vendor extensions. | Nelson Chu | 1 | -10/+10 |
2024-06-18 | RISC-V: Add SiFive cease extension v1.0 | Hau Hsu | 1 | -0/+5 |
2024-06-05 | RISC-V: Add support for XCVmem extension in CV32E40P | Mary Bennett | 1 | -0/+5 |
2024-06-05 | RISC-V: Add support for XCVbi extension in CV32E40P | Mary Bennett | 1 | -0/+5 |
2024-06-05 | RISC-V: Add support for XCVelw extension in CV32E40P | Mary Bennett | 1 | -0/+5 |
2024-05-28 | RISC-V: Fix U insn; replace opcode6 with opcode7 in gas/doc/c-riscv.texi | Javier Mora | 1 | -22/+22 |
2024-01-08 | gas/doc: fix several typos | Samuel Tardieu | 1 | -2/+2 |
2024-01-04 | Update year range in copyright notice of binutils files | Alan Modra | 1 | -1/+1 |
2023-12-22 | RISC-V: drop .bss override | Jan Beulich | 1 | -4/+0 |
2023-12-01 | RISC-V: Add SiFive custom vector coprocessor interface instructions v1.0 | Nelson Chu | 1 | -0/+7 |
2023-11-23 | RISC-V: Add sub-extension XTheadZvamo for T-Head VECTOR vendor extension | Jin Ma | 1 | -0/+6 |
2023-11-23 | RISC-V: Add T-Head VECTOR vendor extension. | Jin Ma | 1 | -0/+5 |
2023-11-07 | RISC-V: Add support for XCValu extension in CV32E40P | Mary Bennett | 1 | -0/+5 |
2023-11-07 | RISC-V: Add support for XCVmac extension in CV32E40P | Mary Bennett | 1 | -0/+5 |
2023-10-16 | RISC-V: Add "lp64e" ABI support | Tsukasa OI | 1 | -3/+2 |
2023-09-07 | RISC-V: Clarify the naming rules of vendor operands. | Nelson Chu | 1 | -1/+2 |
2023-06-30 | RISC-V: Add support for the Zfa extension | Christoph Müllner | 1 | -0/+41 |
2023-04-26 | RISC-V: Support XVentanaCondOps extension | Philipp Tomsich | 1 | -0/+6 |
2023-01-01 | Update year range in copyright notice of binutils files | Alan Modra | 1 | -1/+1 |
2022-11-17 | RISC-V: Add T-Head Int vendor extension | Christoph Müllner | 1 | -0/+5 |
2022-11-17 | RISC-V: Add T-Head Fmv vendor extension | Christoph Müllner | 1 | -0/+5 |
2022-09-22 | RISC-V: Add T-Head MemPair vendor extension | Christoph Müllner | 1 | -0/+5 |
2022-09-22 | RISC-V: Add T-Head MemIdx vendor extension | Christoph Müllner | 1 | -0/+5 |
2022-09-22 | RISC-V: Add T-Head FMemIdx vendor extension | Christoph Müllner | 1 | -0/+5 |
2022-09-22 | RISC-V: Add T-Head MAC vendor extension | Christoph Müllner | 1 | -0/+5 |
2022-09-22 | RISC-V: Add T-Head CondMov vendor extension | Christoph Müllner | 1 | -0/+5 |
2022-09-22 | RISC-V: Add T-Head Bitmanip vendor extension | Christoph Müllner | 1 | -0/+15 |
2022-09-22 | RISC-V: Add T-Head SYNC vendor extension | Christoph Müllner | 1 | -0/+5 |
2022-09-22 | RISC-V: Add T-Head CMO vendor extension | Christoph Müllner | 1 | -0/+4 |
2022-09-22 | RISC-V: Add generic support for vendor extensions | Christoph Müllner | 1 | -0/+14 |
2022-03-20 | RISC-V: Fix misplaced @end table | Andreas Schwab | 1 | -1/+1 |
2022-01-02 | Update year range in copyright notice of binutils files | Alan Modra | 1 | -1/+1 |
2021-11-19 | RISC-V: Support new .option arch directive. | Nelson Chu | 1 | -1/+14 |
2021-08-31 | RISC-V: Extend .insn directive to support hardcode encoding. | Nelson Chu | 1 | -2/+12 |
2021-02-19 | RISC-V: PR27158, fixed UJ/SB types and added CSS/CL/CS types for .insn. | Nelson Chu | 1 | -67/+93 |
2021-01-06 | RISC-V: Mention -mbig-endian and -mlittle-endian in doc | Marcus Comstedt | 1 | -0/+8 |
2021-01-01 | Update year range in copyright notice of binutils files | Alan Modra | 1 | -1/+1 |
2020-08-12 | The description for -mno-csr-check talks about "cheching" rather than "checki... | Nick Clifton | 1 | -1/+1 |
2020-06-03 | * gas/doc/c-riscv.texi (RISC-V-Options): Fix non-ASCII apostrophe. | Stephen Casner | 1 | -1/+1 |
2020-06-02 | RISC-V: Fix minor bugs in .insn docs. | Jim Wilson | 1 | -7/+6 |
2020-05-20 | [PATCH v2 0/9] RISC-V: Support version controling for ISA standard extensions... | Nelson Chu | 1 | -0/+16 |
2020-03-04 | RISC-V: Support assembler modifier %got_pcrel_hi. | Nelson Chu | 1 | -0/+17 |
2020-03-04 | RISC-V: Add description for RISC-V Modifiers to as doc. | Nelson Chu | 1 | -1/+111 |