| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2024-05-06 | x86: Drop using extension_opcode to encode vvvv register | Cui, Lili | 1 | -6/+3 |
| 2024-05-06 | x86: Drop SwapSources | Cui, Lili | 1 | -8/+11 |
| 2024-05-06 | x86: Use vexvvvv as the switch state to encode the vvvv register | Cui, Lili | 1 | -15/+17 |
| 2024-05-03 | x86/APX: extend SSE2AVX coverage | Jan Beulich | 1 | -2/+7 |
| 2024-04-25 | bpf: fix calculation when deciding to relax branch | David Faust | 1 | -4/+33 |
| 2024-04-25 | LoongArch: gas: Simplify relocations in sections without code flag | Jinyang He | 1 | -3/+1 |
| 2024-04-23 | arm: Fix MVE vmla encoding | Claudio Bantaloukas | 1 | -2/+2 |
| 2024-04-22 | x86/APX: Add invalid check for APX EVEX.X4. | Cui, Lili | 1 | -1/+4 |
| 2024-04-20 | LoongArch: Add -mignore-start-align option | mengqinggang | 1 | -20/+50 |
| 2024-04-16 | x86: Fix a memory leak in md_assemble | H.J. Lu | 1 | -5/+8 |
| 2024-04-10 | x86-64: Use long NOPs for Intel Core processors | H.J. Lu | 1 | -5/+35 |
| 2024-04-09 | arm: Fix encoding of MVE vqshr[u]n | Alex Coplan | 1 | -4/+4 |
| 2024-04-09 | RISC-V: Support Zcmp push/pop instructions. | Jiawei | 1 | -0/+181 |
| 2024-04-07 | Support APX NF | Cui, Lili | 1 | -4/+31 |
| 2024-04-03 | x86/APX: Remove KEYLOCKER and SHA promotions from EVEX MAP4 | Cui, Lili | 1 | -7/+0 |
| 2024-04-01 | LoongArch: gas: Ignore .align if it is at the start of a section | mengqinggang | 1 | -25/+109 |
| 2024-03-31 | BFD: Fix the bug of R_LARCH_AGLIN caused by discard section | mengqinggang | 1 | -4/+1 |
| 2024-03-28 | x86/SSE2AVX: move checking | Jan Beulich | 1 | -11/+10 |
| 2024-03-28 | x86/SSE2AVX: respect prefixes | Jan Beulich | 1 | -2/+3 |
| 2024-03-28 | RISC-V: Removed privileged spec 1.9.1 support in assembler. | Nelson Chu | 1 | -2/+3 |
| 2024-03-22 | x86: fix Solaris testsuite failures | Jan Beulich | 1 | -6/+3 |
| 2024-03-19 | gas, aarch64: Add faminmax extension | Saurabh Jha | 1 | -0/+1 |
| 2024-03-19 | LoongArch: Add relaxation for R_LARCH_CALL36 | mengqinggang | 1 | -1/+18 |
| 2024-03-18 | aarch64: Add support for (M)ADDPT and (M)SUBPT instructions | Yury Khrustalev | 1 | -0/+47 |
| 2024-03-15 | x86/APX: legacy promoted insns can't access %xmm16-%xmm31 | Jan Beulich | 1 | -0/+7 |
| 2024-03-13 | RISC-V: Add -march=help for gas | Hau Hsu | 1 | -0/+6 |
| 2024-03-12 | LoongArch: Scan all illegal operand instructions without interruption | Lulu Cai | 1 | -5/+6 |
| 2024-03-11 | x86: KeyLocker insn interaction with -msse-check / .sse_check | Jan Beulich | 1 | -1/+2 |
| 2024-03-11 | x86/APX: permit wider than 4-bit immediates with V{EXTRACT,INSERT}{F,I}128 | Jan Beulich | 1 | -1/+3 |
| 2024-03-11 | x86: don't open-code REG_{SP,FP} | Jan Beulich | 1 | -2/+2 |
| 2024-03-08 | gas: Fix x86 build with GCC 6.4 | H.J. Lu | 1 | -1/+1 |
| 2024-03-06 | LoongArch: Delete extra instructions when TLS type transition | Lulu Cai | 1 | -5/+26 |
| 2024-03-01 | s390: Be more verbose about missing operand type | Jens Remus | 1 | -1/+37 |
| 2024-03-01 | s390: Provide operand number in assembler warning and error messages | Jens Remus | 1 | -33/+74 |
| 2024-03-01 | s390: Allow to explicitly omit base register operand in assembly | Jens Remus | 1 | -3/+7 |
| 2024-03-01 | s390: Warn when register name type does not match operand | Jens Remus | 1 | -0/+108 |
| 2024-03-01 | s390: Revise s390-specific assembler option descriptions | Jens Remus | 1 | -10/+18 |
| 2024-03-01 | s390: Add comments to assembler operand parsing logic | Jens Remus | 1 | -6/+25 |
| 2024-03-01 | s390: Correct setting of highgprs flag in ELF output | Jens Remus | 1 | -6/+8 |
| 2024-03-01 | s390: Do not erroneously use base operand value for length operand | Jens Remus | 1 | -17/+18 |
| 2024-03-01 | s390: Enhance handling of syntax errors in assembler | Jens Remus | 1 | -2/+4 |
| 2024-03-01 | s390: Lower severity of assembler syntax errors from fatal to error | Jens Remus | 1 | -6/+6 |
| 2024-03-01 | x86: adjust which Dwarf2 register numbers to use | Jan Beulich | 2 | -23/+9 |
| 2024-03-01 | x86/APX: honor -mevexwig= for byte-size insns | Jan Beulich | 1 | -0/+9 |
| 2024-03-01 | x86/APX: optimize certain XOR and SUB forms | Jan Beulich | 1 | -0/+28 |
| 2024-03-01 | x86/APX: correct .insn opcode space determination when REX2 is needed | Jan Beulich | 1 | -28/+33 |
| 2024-03-01 | x86/APX: respect {vex}/{vex3} | Jan Beulich | 2 | -43/+123 |
| 2024-02-29 | RISC-V: Add assembly support for TLSDESC. | Tatsuyuki Ishi | 1 | -5/+13 |
| 2024-02-29 | PR23877, bad value (n32r5900) for default CPU | Alan Modra | 1 | -1/+3 |
| 2024-02-27 | aarch64: rename internals related to PAuth feature to use pauth in their nami... | Matthieu Longo | 1 | -2/+2 |
