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AgeCommit message (Expand)AuthorFilesLines
2022-06-27drop XC16x bitsJan Beulich2-3436/+0
2022-05-11opcodes cgen: remove use of PTRAlan Modra2-8/+2
2022-04-30opcodes: don't assume ELF in riscv, csky, rl78, mep disassemblersThomas Hebb1-5/+8
2022-01-22Add markers for 2.38 branchNick Clifton1-0/+4
2021-07-05Re: opcodes: constify & local meps macrosAlan Modra2-5/+12
2021-07-03Add markers for 2.37 branchNick Clifton1-0/+4
2021-05-06or1k: Implement relocation R_OR1K_GOT_AHI16 for gotha()Stafford Horne2-1/+12
2021-03-31Use bool in opcodesAlan Modra2-77/+82
2021-03-29opcodes int vs bfd_boolean fixesAlan Modra2-9/+15
2021-01-09Add Changelog entries and NEWS entries for 2.36 branchNick Clifton1-0/+4
2020-10-05Fix spelling mistakesSamanta Navarro2-1/+5
2020-09-18bpf: xBPF SDIV, SMOD instructionsDavid Faust2-17/+28
2020-09-08bpf: simulator: correct div, mod insn semanticsDavid Faust2-2/+7
2020-09-01mep: ubsan: mep-ibld.c:1635,1645,1652 left shift of negative valueAlan Modra2-5/+11
2020-08-26bpf: add xBPF ISADavid Faust2-35/+101
2020-07-04Add markers for binutils 2.35 branchNick Clifton1-0/+4
2020-06-25cpu: fix offset16 type, update c-calls in bpf.cpuDavid Faust2-14/+15
2020-06-04cpu,gas,opcodes: remove no longer needed workaround from the BPF portJose E. Marchesi3-8/+8
2020-06-04opcodes: discriminate endianness and insn-endianness in CGEN portsJose E. Marchesi2-1/+6
2020-05-28cpu,opcodes: add instruction semantics to bpf.cpu and minor fixesJose E. Marchesi3-91/+272
2020-05-21Replace "if (x) free (x)" with "free (x)", opcodesAlan Modra2-2/+6
2020-05-19or1k: Remove 64-bit support, it's not used and it breaks 32-bit hostsStafford Horne4-110/+16
2020-04-16cpu,gas,opcodes: support for eBPF JMP32 instruction classDavid Faust2-12/+22
2020-02-03ubsan: m32c: left shift of negative valueAlan Modra2-4/+8
2020-02-01ubsan: frv: left shift of negative valueAlan Modra2-4/+9
2020-01-30ubsan: m32c: left shift of negative valueAlan Modra2-18/+30
2020-01-30cpu,opcodes,gas: fix neg and neg32 instructions in BPFJose E. Marchesi2-1/+7
2020-01-18Add markers for 2.34 branch to the NEWS files and ChangeLogs.Nick Clifton1-0/+4
2020-01-13ubsan: fr30: left shift of negative valueAlan Modra2-5/+10
2020-01-06ubsan: m32c: left shift of negative valueAlan Modra2-52/+64
2020-01-04ubsan: m32r: left shift of negative valueAlan Modra2-3/+8
2019-12-23ubsan: iq2000: left shift of negative valueAlan Modra2-1/+5
2019-12-20ubsan: or1k: left shift of negative valueAlan Modra2-2/+6
2019-12-17ubsan: bpf: left shift cannot be represented in type 'DI' (aka 'long')Alan Modra2-2/+6
2019-12-16ubsan: xstormy16: left shift of negative valueAlan Modra2-1/+5
2019-12-11Remove more shifts for sign/zero extensionAlan Modra4-9/+23
2019-12-11ubsan: epiphany: left shift of negative valueAlan Modra2-2/+7
2019-11-20cpu: fix comment in bpf.cpuJose E. Marchesi2-1/+5
2019-09-09Add markers for 2.33 branch to NEWS and ChangeLog files.Phil Blundell1-0/+4
2019-07-19cpu,opcodes,gas: use %r0 and %r6 instead of %a and %ctf in eBPF disassemblerJose E. Marchesi2-2/+7
2019-07-15cpu,opcodes,gas: fix explicit arguments to eBPF ldabs instructionsJose E. Marchesi2-25/+43
2019-07-14cpu,opcodes,gas: fix arguments to ldabs and ldind eBPF instructionsJose E. Marchesi2-2/+7
2019-06-13cpu/or1k: Update fpu compare symbols to imply set flagStafford Horne2-3/+7
2019-06-13cpu/or1k: Document no branch delay slot architectures and l.adrpStafford Horne3-4/+9
2019-06-13cpu/or1k: Define unordered comparisonsStafford Horne2-4/+55
2019-06-13cpu/or1k: Add support for orfp64a32 specStafford Horne6-46/+375
2019-05-23cpu: add eBPF cpu descriptionJose E. Marchesi3-0/+843
2019-01-19Add markers for 2.32 branch to NEWS and ChangeLog files.Nick Clifton1-0/+4
2018-10-05or1k: Add the l.muld, l.muldu, l.macu, l.msbu insnsRichard Henderson2-93/+181
2018-10-05or1k: Add the l.adrp insn and supporting relocationsStafford Horne3-62/+213
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