diff options
Diffstat (limited to 'sim')
| -rw-r--r-- | sim/mips/ChangeLog | 20 | ||||
| -rw-r--r-- | sim/mips/gencode.c | 2 |
2 files changed, 17 insertions, 5 deletions
diff --git a/sim/mips/ChangeLog b/sim/mips/ChangeLog index 961eaa1..d6e147d 100644 --- a/sim/mips/ChangeLog +++ b/sim/mips/ChangeLog @@ -1,9 +1,21 @@ start-sanitize-r5900 +Tue Feb 18 17:03:47 1997 Gavin Koch <gavin@cetus.cygnus.com> + + * gencode.c (MIPS_DECODE): Correct instruction feature flags for + PMADDUW. + +end-sanitize-r5900 +Thu Feb 13 14:08:30 1997 Ian Lance Taylor <ian@cygnus.com> + + * gencode.c (build_mips16_operands): Correct computation of base + address for extended PC relative instruction. + +start-sanitize-r5900 Fri Feb 7 11:12:44 1997 Gavin Koch <gavin@cygnus.com> - - * Makefile.in, configure, configure.in, gencode.c, - interp.c, support.h: add r5900. - + + * Makefile.in, configure, configure.in, gencode.c, + interp.c, support.h: add r5900. + end-sanitize-r5900 Thu Feb 6 17:16:15 1997 Ian Lance Taylor <ian@cygnus.com> diff --git a/sim/mips/gencode.c b/sim/mips/gencode.c index f5541fb..9ae77c3 100644 --- a/sim/mips/gencode.c +++ b/sim/mips/gencode.c @@ -709,7 +709,7 @@ struct instruction MIPS_DECODE[] = { {"PLZCW", T5,"011100SSSSS00000ddddd00000000100",MMINORM,PLZCW, (NONE)}, {"PMADDH", T5,"011100SSSSSTTTTTddddd10000001001",MMI2, PMULTH, (ADDITION)}, - {"PMADDUW",T5,"011100SSSSSTTTTTddddd00000101001",MMI3, PMULTW, (UNSIGNED)}, + {"PMADDUW",T5,"011100SSSSSTTTTTddddd00000101001",MMI3, PMULTW, (ADDITION | UNSIGNED)}, {"PMADDW", T5,"011100SSSSSTTTTTddddd00000001001",MMI2, PMULTW, (ADDITION)}, {"PMAXH", T5,"011100SSSSSTTTTTddddd00111001000",MMI0, PMAXMIN, (GT | HALFWORD)}, |