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-rw-r--r--sim/tic80/Makefile.in4
1 files changed, 3 insertions, 1 deletions
diff --git a/sim/tic80/Makefile.in b/sim/tic80/Makefile.in
index 21be037..eb3f943 100644
--- a/sim/tic80/Makefile.in
+++ b/sim/tic80/Makefile.in
@@ -11,7 +11,7 @@
# List of object files, less common parts.
SIM_OBJS = sim-endian.o sim-bits.o sim-config.o interp.o \
- support.o idecode.o semantics.o itable.o \
+ support.o idecode.o semantics.o itable.o misc.o \
sim-calls.o \
sim-events.o \
sim-core.o \
@@ -89,6 +89,7 @@ clean-igen:
tmp-igen: $(srcdir)/dc $(srcdir)/insns $(srcdir)/ic ../igen/igen
cd ../igen && $(MAKE)
../igen/igen \
+ -F f \
-G direct-access \
-G delayed-branch \
-F short,emul \
@@ -146,3 +147,4 @@ support.o: $(ENGINE_H)
interp.o: interp.c $(ENGINE_H)
sim-calls.o: sim-calls.c $(ENGINE_H)
cpu.o: cpu.c $(ENGINE_H)
+misc.o: $(ENGINE_H) \ No newline at end of file