diff options
Diffstat (limited to 'sim/testsuite/frv/cfckug.cgs')
| -rw-r--r-- | sim/testsuite/frv/cfckug.cgs | 490 |
1 files changed, 490 insertions, 0 deletions
diff --git a/sim/testsuite/frv/cfckug.cgs b/sim/testsuite/frv/cfckug.cgs new file mode 100644 index 0000000..7442f84 --- /dev/null +++ b/sim/testsuite/frv/cfckug.cgs @@ -0,0 +1,490 @@ +# frv testcase for cfckug $FCCi,$CCj_float,$CCi,$cond +# mach: all + + .include "testutils.inc" + + start + + .global cfckug +cfckug: + set_spr_immed 0x1b5b,cccr + set_fcc 0x0 0 + cfckug fcc0,cc3,cc0,1 + test_spr_immed 0x1b9b,cccr + + set_spr_immed 0x1b5b,cccr + set_fcc 0x1 0 + cfckug fcc0,cc3,cc0,1 + test_spr_immed 0x1bdb,cccr + + set_spr_immed 0x1b5b,cccr + set_fcc 0x2 0 + cfckug fcc0,cc3,cc0,1 + test_spr_immed 0x1bdb,cccr + + set_spr_immed 0x1b5b,cccr + set_fcc 0x3 0 + cfckug fcc0,cc3,cc0,1 + test_spr_immed 0x1bdb,cccr + + set_spr_immed 0x1b5b,cccr + set_fcc 0x4 0 + cfckug fcc0,cc3,cc0,1 + test_spr_immed 0x1b9b,cccr + + set_spr_immed 0x1b5b,cccr + set_fcc 0x5 0 + cfckug fcc0,cc3,cc0,1 + test_spr_immed 0x1bdb,cccr + + set_spr_immed 0x1b5b,cccr + set_fcc 0x6 0 + cfckug fcc0,cc3,cc0,1 + test_spr_immed 0x1bdb,cccr + + set_spr_immed 0x1b5b,cccr + set_fcc 0x7 0 + cfckug fcc0,cc3,cc0,1 + test_spr_immed 0x1bdb,cccr + + set_spr_immed 0x1b5b,cccr + set_fcc 0x8 0 + cfckug fcc0,cc3,cc4,1 + test_spr_immed 0x1b9b,cccr + + set_spr_immed 0x1b5b,cccr + set_fcc 0x9 0 + cfckug fcc0,cc3,cc4,1 + test_spr_immed 0x1bdb,cccr + + set_spr_immed 0x1b5b,cccr + set_fcc 0xa 0 + cfckug fcc0,cc3,cc4,1 + test_spr_immed 0x1bdb,cccr + + set_spr_immed 0x1b5b,cccr + set_fcc 0xb 0 + cfckug fcc0,cc3,cc4,1 + test_spr_immed 0x1bdb,cccr + + set_spr_immed 0x1b5b,cccr + set_fcc 0xc 0 + cfckug fcc0,cc3,cc4,1 + test_spr_immed 0x1b9b,cccr + + set_spr_immed 0x1b5b,cccr + set_fcc 0xd 0 + cfckug fcc0,cc3,cc4,1 + test_spr_immed 0x1bdb,cccr + + set_spr_immed 0x1b5b,cccr + set_fcc 0xe 0 + cfckug fcc0,cc3,cc4,1 + test_spr_immed 0x1bdb,cccr + + set_spr_immed 0x1b5b,cccr + set_fcc 0xf 0 + cfckug fcc0,cc3,cc4,1 + test_spr_immed 0x1bdb,cccr + + set_spr_immed 0x1b5b,cccr + set_fcc 0x0 0 + cfckug fcc0,cc3,cc0,0 + test_spr_immed 0x1b1b,cccr + + set_spr_immed 0x1b5b,cccr + set_fcc 0x1 0 + cfckug fcc0,cc3,cc0,0 + test_spr_immed 0x1b1b,cccr + + set_spr_immed 0x1b5b,cccr + set_fcc 0x2 0 + cfckug fcc0,cc3,cc0,0 + test_spr_immed 0x1b1b,cccr + + set_spr_immed 0x1b5b,cccr + set_fcc 0x3 0 + cfckug fcc0,cc3,cc0,0 + test_spr_immed 0x1b1b,cccr + + set_spr_immed 0x1b5b,cccr + set_fcc 0x4 0 + cfckug fcc0,cc3,cc0,0 + test_spr_immed 0x1b1b,cccr + + set_spr_immed 0x1b5b,cccr + set_fcc 0x5 0 + cfckug fcc0,cc3,cc0,0 + test_spr_immed 0x1b1b,cccr + + set_spr_immed 0x1b5b,cccr + set_fcc 0x6 0 + cfckug fcc0,cc3,cc0,0 + test_spr_immed 0x1b1b,cccr + + set_spr_immed 0x1b5b,cccr + set_fcc 0x7 0 + cfckug fcc0,cc3,cc0,0 + test_spr_immed 0x1b1b,cccr + + set_spr_immed 0x1b5b,cccr + set_fcc 0x8 0 + cfckug fcc0,cc3,cc4,0 + test_spr_immed 0x1b1b,cccr + + set_spr_immed 0x1b5b,cccr + set_fcc 0x9 0 + cfckug fcc0,cc3,cc4,0 + test_spr_immed 0x1b1b,cccr + + set_spr_immed 0x1b5b,cccr + set_fcc 0xa 0 + cfckug fcc0,cc3,cc4,0 + test_spr_immed 0x1b1b,cccr + + set_spr_immed 0x1b5b,cccr + set_fcc 0xb 0 + cfckug fcc0,cc3,cc4,0 + test_spr_immed 0x1b1b,cccr + + set_spr_immed 0x1b5b,cccr + set_fcc 0xc 0 + cfckug fcc0,cc3,cc4,0 + test_spr_immed 0x1b1b,cccr + + set_spr_immed 0x1b5b,cccr + set_fcc 0xd 0 + cfckug fcc0,cc3,cc4,0 + test_spr_immed 0x1b1b,cccr + + set_spr_immed 0x1b5b,cccr + set_fcc 0xe 0 + cfckug fcc0,cc3,cc4,0 + test_spr_immed 0x1b1b,cccr + + set_spr_immed 0x1b5b,cccr + set_fcc 0xf 0 + cfckug fcc0,cc3,cc4,0 + test_spr_immed 0x1b1b,cccr + + set_spr_immed 0x1b5b,cccr + set_fcc 0x0 0 + cfckug fcc0,cc3,cc1,0 + test_spr_immed 0x1b9b,cccr + + set_spr_immed 0x1b5b,cccr + set_fcc 0x1 0 + cfckug fcc0,cc3,cc1,0 + test_spr_immed 0x1bdb,cccr + + set_spr_immed 0x1b5b,cccr + set_fcc 0x2 0 + cfckug fcc0,cc3,cc1,0 + test_spr_immed 0x1bdb,cccr + + set_spr_immed 0x1b5b,cccr + set_fcc 0x3 0 + cfckug fcc0,cc3,cc1,0 + test_spr_immed 0x1bdb,cccr + + set_spr_immed 0x1b5b,cccr + set_fcc 0x4 0 + cfckug fcc0,cc3,cc1,0 + test_spr_immed 0x1b9b,cccr + + set_spr_immed 0x1b5b,cccr + set_fcc 0x5 0 + cfckug fcc0,cc3,cc1,0 + test_spr_immed 0x1bdb,cccr + + set_spr_immed 0x1b5b,cccr + set_fcc 0x6 0 + cfckug fcc0,cc3,cc1,0 + test_spr_immed 0x1bdb,cccr + + set_spr_immed 0x1b5b,cccr + set_fcc 0x7 0 + cfckug fcc0,cc3,cc1,0 + test_spr_immed 0x1bdb,cccr + + set_spr_immed 0x1b5b,cccr + set_fcc 0x8 0 + cfckug fcc0,cc3,cc5,0 + test_spr_immed 0x1b9b,cccr + + set_spr_immed 0x1b5b,cccr + set_fcc 0x9 0 + cfckug fcc0,cc3,cc5,0 + test_spr_immed 0x1bdb,cccr + + set_spr_immed 0x1b5b,cccr + set_fcc 0xa 0 + cfckug fcc0,cc3,cc5,0 + test_spr_immed 0x1bdb,cccr + + set_spr_immed 0x1b5b,cccr + set_fcc 0xb 0 + cfckug fcc0,cc3,cc5,0 + test_spr_immed 0x1bdb,cccr + + set_spr_immed 0x1b5b,cccr + set_fcc 0xc 0 + cfckug fcc0,cc3,cc5,0 + test_spr_immed 0x1b9b,cccr + + set_spr_immed 0x1b5b,cccr + set_fcc 0xd 0 + cfckug fcc0,cc3,cc5,0 + test_spr_immed 0x1bdb,cccr + + set_spr_immed 0x1b5b,cccr + set_fcc 0xe 0 + cfckug fcc0,cc3,cc5,0 + test_spr_immed 0x1bdb,cccr + + set_spr_immed 0x1b5b,cccr + set_fcc 0xf 0 + cfckug fcc0,cc3,cc5,0 + test_spr_immed 0x1bdb,cccr + + set_spr_immed 0x1b5b,cccr + set_fcc 0x0 0 + cfckug fcc0,cc3,cc1,1 + test_spr_immed 0x1b1b,cccr + + set_spr_immed 0x1b5b,cccr + set_fcc 0x1 0 + cfckug fcc0,cc3,cc1,1 + test_spr_immed 0x1b1b,cccr + + set_spr_immed 0x1b5b,cccr + set_fcc 0x2 0 + cfckug fcc0,cc3,cc1,1 + test_spr_immed 0x1b1b,cccr + + set_spr_immed 0x1b5b,cccr + set_fcc 0x3 0 + cfckug fcc0,cc3,cc1,1 + test_spr_immed 0x1b1b,cccr + + set_spr_immed 0x1b5b,cccr + set_fcc 0x4 0 + cfckug fcc0,cc3,cc1,1 + test_spr_immed 0x1b1b,cccr + + set_spr_immed 0x1b5b,cccr + set_fcc 0x5 0 + cfckug fcc0,cc3,cc1,1 + test_spr_immed 0x1b1b,cccr + + set_spr_immed 0x1b5b,cccr + set_fcc 0x6 0 + cfckug fcc0,cc3,cc1,1 + test_spr_immed 0x1b1b,cccr + + set_spr_immed 0x1b5b,cccr + set_fcc 0x7 0 + cfckug fcc0,cc3,cc1,1 + test_spr_immed 0x1b1b,cccr + + set_spr_immed 0x1b5b,cccr + set_fcc 0x8 0 + cfckug fcc0,cc3,cc5,1 + test_spr_immed 0x1b1b,cccr + + set_spr_immed 0x1b5b,cccr + set_fcc 0x9 0 + cfckug fcc0,cc3,cc5,1 + test_spr_immed 0x1b1b,cccr + + set_spr_immed 0x1b5b,cccr + set_fcc 0xa 0 + cfckug fcc0,cc3,cc5,1 + test_spr_immed 0x1b1b,cccr + + set_spr_immed 0x1b5b,cccr + set_fcc 0xb 0 + cfckug fcc0,cc3,cc5,1 + test_spr_immed 0x1b1b,cccr + + set_spr_immed 0x1b5b,cccr + set_fcc 0xc 0 + cfckug fcc0,cc3,cc5,1 + test_spr_immed 0x1b1b,cccr + + set_spr_immed 0x1b5b,cccr + set_fcc 0xd 0 + cfckug fcc0,cc3,cc5,1 + test_spr_immed 0x1b1b,cccr + + set_spr_immed 0x1b5b,cccr + set_fcc 0xe 0 + cfckug fcc0,cc3,cc5,1 + test_spr_immed 0x1b1b,cccr + + set_spr_immed 0x1b5b,cccr + set_fcc 0xf 0 + cfckug fcc0,cc3,cc5,1 + test_spr_immed 0x1b1b,cccr + + set_spr_immed 0x1b5b,cccr + set_fcc 0x0 0 + cfckug fcc0,cc3,cc2,0 + test_spr_immed 0x1b1b,cccr + + set_spr_immed 0x1b5b,cccr + set_fcc 0x1 0 + cfckug fcc0,cc3,cc2,1 + test_spr_immed 0x1b1b,cccr + + set_spr_immed 0x1b5b,cccr + set_fcc 0x2 0 + cfckug fcc0,cc3,cc2,0 + test_spr_immed 0x1b1b,cccr + + set_spr_immed 0x1b5b,cccr + set_fcc 0x3 0 + cfckug fcc0,cc3,cc2,1 + test_spr_immed 0x1b1b,cccr + + set_spr_immed 0x1b5b,cccr + set_fcc 0x4 0 + cfckug fcc0,cc3,cc2,0 + test_spr_immed 0x1b1b,cccr + + set_spr_immed 0x1b5b,cccr + set_fcc 0x5 0 + cfckug fcc0,cc3,cc2,1 + test_spr_immed 0x1b1b,cccr + + set_spr_immed 0x1b5b,cccr + set_fcc 0x6 0 + cfckug fcc0,cc3,cc2,0 + test_spr_immed 0x1b1b,cccr + + set_spr_immed 0x1b5b,cccr + set_fcc 0x7 0 + cfckug fcc0,cc3,cc2,1 + test_spr_immed 0x1b1b,cccr + + set_spr_immed 0x1b5b,cccr + set_fcc 0x8 0 + cfckug fcc0,cc3,cc6,0 + test_spr_immed 0x1b1b,cccr + + set_spr_immed 0x1b5b,cccr + set_fcc 0x9 0 + cfckug fcc0,cc3,cc6,1 + test_spr_immed 0x1b1b,cccr + + set_spr_immed 0x1b5b,cccr + set_fcc 0xa 0 + cfckug fcc0,cc3,cc6,0 + test_spr_immed 0x1b1b,cccr + + set_spr_immed 0x1b5b,cccr + set_fcc 0xb 0 + cfckug fcc0,cc3,cc6,1 + test_spr_immed 0x1b1b,cccr + + set_spr_immed 0x1b5b,cccr + set_fcc 0xc 0 + cfckug fcc0,cc3,cc6,0 + test_spr_immed 0x1b1b,cccr + + set_spr_immed 0x1b5b,cccr + set_fcc 0xd 0 + cfckug fcc0,cc3,cc6,1 + test_spr_immed 0x1b1b,cccr + + set_spr_immed 0x1b5b,cccr + set_fcc 0xe 0 + cfckug fcc0,cc3,cc6,0 + test_spr_immed 0x1b1b,cccr + + set_spr_immed 0x1b5b,cccr + set_fcc 0xf 0 + cfckug fcc0,cc3,cc6,1 + test_spr_immed 0x1b1b,cccr + + set_spr_immed 0x1b5b,cccr + set_fcc 0x0 0 + cfckug fcc0,cc3,cc3,0 + test_spr_immed 0x1b1b,cccr + + set_spr_immed 0x1b5b,cccr + set_fcc 0x1 0 + cfckug fcc0,cc3,cc3,1 + test_spr_immed 0x1b1b,cccr + + set_spr_immed 0x1b5b,cccr + set_fcc 0x2 0 + cfckug fcc0,cc3,cc3,0 + test_spr_immed 0x1b1b,cccr + + set_spr_immed 0x1b5b,cccr + set_fcc 0x3 0 + cfckug fcc0,cc3,cc3,1 + test_spr_immed 0x1b1b,cccr + + set_spr_immed 0x1b5b,cccr + set_fcc 0x4 0 + cfckug fcc0,cc3,cc3,0 + test_spr_immed 0x1b1b,cccr + + set_spr_immed 0x1b5b,cccr + set_fcc 0x5 0 + cfckug fcc0,cc3,cc3,1 + test_spr_immed 0x1b1b,cccr + + set_spr_immed 0x1b5b,cccr + set_fcc 0x6 0 + cfckug fcc0,cc3,cc3,0 + test_spr_immed 0x1b1b,cccr + + set_spr_immed 0x1b5b,cccr + set_fcc 0x7 0 + cfckug fcc0,cc3,cc3,1 + test_spr_immed 0x1b1b,cccr + + set_spr_immed 0x1b5b,cccr + set_fcc 0x8 0 + cfckug fcc0,cc3,cc7,0 + test_spr_immed 0x1b1b,cccr + + set_spr_immed 0x1b5b,cccr + set_fcc 0x9 0 + cfckug fcc0,cc3,cc7,1 + test_spr_immed 0x1b1b,cccr + + set_spr_immed 0x1b5b,cccr + set_fcc 0xa 0 + cfckug fcc0,cc3,cc7,0 + test_spr_immed 0x1b1b,cccr + + set_spr_immed 0x1b5b,cccr + set_fcc 0xb 0 + cfckug fcc0,cc3,cc7,1 + test_spr_immed 0x1b1b,cccr + + set_spr_immed 0x1b5b,cccr + set_fcc 0xc 0 + cfckug fcc0,cc3,cc7,0 + test_spr_immed 0x1b1b,cccr + + set_spr_immed 0x1b5b,cccr + set_fcc 0xd 0 + cfckug fcc0,cc3,cc7,1 + test_spr_immed 0x1b1b,cccr + + set_spr_immed 0x1b5b,cccr + set_fcc 0xe 0 + cfckug fcc0,cc3,cc7,0 + test_spr_immed 0x1b1b,cccr + + set_spr_immed 0x1b5b,cccr + set_fcc 0xf 0 + cfckug fcc0,cc3,cc7,1 + test_spr_immed 0x1b1b,cccr + + pass |