diff options
Diffstat (limited to 'sim/testsuite/frv/bcnvlr.cgs')
| -rw-r--r-- | sim/testsuite/frv/bcnvlr.cgs | 292 |
1 files changed, 292 insertions, 0 deletions
diff --git a/sim/testsuite/frv/bcnvlr.cgs b/sim/testsuite/frv/bcnvlr.cgs new file mode 100644 index 0000000..2451557 --- /dev/null +++ b/sim/testsuite/frv/bcnvlr.cgs @@ -0,0 +1,292 @@ +# frv testcase for bcnvlr $ICCi,$ccond,$hint +# mach: all + + .include "testutils.inc" + + start + + .global bcnvlr +bcnvlr: + ; ccond is true + set_spr_immed 128,lcr + set_spr_addr ok1,lr + set_icc 0x0 0 + bcnvlr icc0,0,0 + fail +ok1: + set_spr_addr ok2,lr + set_icc 0x1 1 + bcnvlr icc1,0,1 + fail +ok2: + set_spr_addr bad,lr + set_icc 0x2 2 + bcnvlr icc2,0,2 + + set_spr_addr bad,lr + set_icc 0x3 3 + bcnvlr icc3,0,3 + + set_spr_addr ok5,lr + set_icc 0x4 0 + bcnvlr icc0,0,0 + fail +ok5: + set_spr_addr ok6,lr + set_icc 0x5 1 + bcnvlr icc1,0,1 + fail +ok6: + set_spr_addr bad,lr + set_icc 0x6 2 + bcnvlr icc2,0,2 + + set_spr_addr bad,lr + set_icc 0x7 3 + bcnvlr icc3,0,3 + + set_spr_addr ok9,lr + set_icc 0x8 0 + bcnvlr icc0,0,0 + fail +ok9: + set_spr_addr oka,lr + set_icc 0x9 1 + bcnvlr icc1,0,1 + fail +oka: + set_spr_addr bad,lr + set_icc 0xa 2 + bcnvlr icc2,0,2 + + set_spr_addr bad,lr + set_icc 0xb 3 + bcnvlr icc3,0,3 + + set_spr_addr okd,lr + set_icc 0xc 0 + bcnvlr icc0,0,0 + fail +okd: + set_spr_addr oke,lr + set_icc 0xd 1 + bcnvlr icc1,0,1 + fail +oke: + set_spr_addr bad,lr + set_icc 0xe 2 + bcnvlr icc2,0,2 + + set_spr_addr bad,lr + set_icc 0xf 3 + bcnvlr icc3,0,3 + + ; ccond is true + set_spr_immed 1,lcr + set_spr_addr okh,lr + set_icc 0x0 0 + bcnvlr icc0,1,0 + fail +okh: + set_spr_immed 1,lcr + set_spr_addr oki,lr + set_icc 0x1 1 + bcnvlr icc1,1,1 + fail +oki: + set_spr_immed 1,lcr + set_spr_addr bad,lr + set_icc 0x2 2 + bcnvlr icc2,1,2 + + set_spr_immed 1,lcr + set_spr_addr bad,lr + set_icc 0x3 3 + bcnvlr icc3,1,3 + + set_spr_immed 1,lcr + set_spr_addr okl,lr + set_icc 0x4 0 + bcnvlr icc0,1,0 + fail +okl: + set_spr_immed 1,lcr + set_spr_addr okm,lr + set_icc 0x5 1 + bcnvlr icc1,1,1 + fail +okm: + set_spr_immed 1,lcr + set_spr_addr bad,lr + set_icc 0x6 2 + bcnvlr icc2,1,2 + + set_spr_immed 1,lcr + set_spr_addr bad,lr + set_icc 0x7 3 + bcnvlr icc3,1,3 + + set_spr_immed 1,lcr + set_spr_addr okp,lr + set_icc 0x8 0 + bcnvlr icc0,1,0 + fail +okp: + set_spr_immed 1,lcr + set_spr_addr okq,lr + set_icc 0x9 1 + bcnvlr icc1,1,1 + fail +okq: + set_spr_immed 1,lcr + set_spr_addr bad,lr + set_icc 0xa 2 + bcnvlr icc2,1,2 + + set_spr_immed 1,lcr + set_spr_addr bad,lr + set_icc 0xb 3 + bcnvlr icc3,1,3 + + set_spr_immed 1,lcr + set_spr_addr okt,lr + set_icc 0xc 0 + bcnvlr icc0,1,0 + fail +okt: + set_spr_immed 1,lcr + set_spr_addr oku,lr + set_icc 0xd 1 + bcnvlr icc1,1,1 + fail +oku: + set_spr_immed 1,lcr + set_spr_addr bad,lr + set_icc 0xe 2 + bcnvlr icc2,1,2 + + set_spr_immed 1,lcr + set_spr_addr bad,lr + set_icc 0xf 3 + bcnvlr icc3,1,3 + + ; ccond is false + set_spr_immed 128,lcr + set_spr_addr bad,lr + set_icc 0x0 0 + bcnvlr icc0,1,0 + + set_icc 0x1 1 + bcnvlr icc1,1,1 + + set_icc 0x2 2 + bcnvlr icc2,1,2 + + set_icc 0x3 3 + bcnvlr icc3,1,3 + + set_icc 0x4 0 + bcnvlr icc0,1,0 + + set_icc 0x5 1 + bcnvlr icc1,1,1 + + set_icc 0x6 2 + bcnvlr icc2,1,2 + + set_icc 0x7 3 + bcnvlr icc3,1,3 + + set_icc 0x8 0 + bcnvlr icc0,1,0 + + set_icc 0x9 1 + bcnvlr icc1,1,1 + + set_icc 0xa 2 + bcnvlr icc2,1,2 + + set_icc 0xb 3 + bcnvlr icc3,1,3 + + set_icc 0xc 0 + bcnvlr icc0,1,0 + + set_icc 0xd 1 + bcnvlr icc1,1,1 + + set_icc 0xe 2 + bcnvlr icc2,1,2 + + set_icc 0xf 3 + bcnvlr icc3,1,3 + + ; ccond is false + set_spr_immed 1,lcr + set_spr_addr bad,lr + set_icc 0x0 0 + bcnvlr icc0,0,0 + + set_spr_immed 1,lcr + set_icc 0x1 1 + bcnvlr icc1,0,1 + + set_spr_immed 1,lcr + set_icc 0x2 2 + bcnvlr icc2,0,2 + + set_spr_immed 1,lcr + set_icc 0x3 3 + bcnvlr icc3,0,3 + + set_spr_immed 1,lcr + set_icc 0x4 0 + bcnvlr icc0,0,0 + + set_spr_immed 1,lcr + set_icc 0x5 1 + bcnvlr icc1,0,1 + + set_spr_immed 1,lcr + set_icc 0x6 2 + bcnvlr icc2,0,2 + + set_spr_immed 1,lcr + set_icc 0x7 3 + bcnvlr icc3,0,3 + + set_spr_immed 1,lcr + set_icc 0x8 0 + bcnvlr icc0,0,0 + + set_spr_immed 1,lcr + set_icc 0x9 1 + bcnvlr icc1,0,1 + + set_spr_immed 1,lcr + set_icc 0xa 2 + bcnvlr icc2,0,2 + + set_spr_immed 1,lcr + set_icc 0xb 3 + bcnvlr icc3,0,3 + + set_spr_immed 1,lcr + set_icc 0xc 0 + bcnvlr icc0,0,0 + + set_spr_immed 1,lcr + set_icc 0xd 1 + bcnvlr icc1,0,1 + + set_spr_immed 1,lcr + set_icc 0xe 2 + bcnvlr icc2,0,2 + + set_spr_immed 1,lcr + set_icc 0xf 3 + bcnvlr icc3,0,3 + + pass +bad: + fail |