diff options
Diffstat (limited to 'sim/testsuite/bfin/se_rets_hazard.s')
-rw-r--r-- | sim/testsuite/bfin/se_rets_hazard.s | 55 |
1 files changed, 55 insertions, 0 deletions
diff --git a/sim/testsuite/bfin/se_rets_hazard.s b/sim/testsuite/bfin/se_rets_hazard.s new file mode 100644 index 0000000..7406e87 --- /dev/null +++ b/sim/testsuite/bfin/se_rets_hazard.s @@ -0,0 +1,55 @@ +//Original:/testcases/seq/se_rets_hazard/se_rets_hazard.dsp +# mach: bfin + +.include "testutils.inc" + start + + +BOOT: + FP = SP; // and frame pointer + + INIT_R_REGS 0; // initialize general purpose regs + + + + + ASTAT = r0; // reset sequencer registers + +// The Main Program + + +START: + loadsym r1, SUB1; + RETS = r1; + RTS; + +MID1: + CHECKREG r6, 0; // shouldn't be BAD + R6.L = 0xBAD2; // In case we come back to MID1 + loadsym P1, MID2; + CALL ( P1 ); + RTS; + +MID2: + loadsym R1, END; + RETS = r1; + [ -- SP ] = I0; + LINK 0; + I0 = FP; + UNLINK; + RTS; + +END: + + pass // Call Endtest Macro + +// Subroutines and Functions + +SUB1: // Code goes here + CHECKREG r7, 0; // should be if sub executed + R7.L = 0xBAD; // In case we come back to SUB1 + loadsym R2, MID1; + [ -- SP ] = R2; + RETS = [sp++]; + RTS; + R6.L = 0xBAD; |