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-rw-r--r--sim/testsuite/bfin/dsp_d0.s31
1 files changed, 31 insertions, 0 deletions
diff --git a/sim/testsuite/bfin/dsp_d0.s b/sim/testsuite/bfin/dsp_d0.s
new file mode 100644
index 0000000..ff7aaf0
--- /dev/null
+++ b/sim/testsuite/bfin/dsp_d0.s
@@ -0,0 +1,31 @@
+# mach: bfin
+
+.include "testutils.inc"
+ start
+
+ loadsym I0, vec;
+
+ R0 = [ I0 ++ ];
+ DBGA ( R0.L , 1 ); DBGA ( R0.H , 2 );
+ R0 = [ I0 ++ ];
+ DBGA ( R0.L , 2 ); DBGA ( R0.H , 3 );
+
+ loadsym I3, vec;
+ R0 = 4;
+ M1 = R0;
+
+ _DBG I3;
+ R0 = [ I3 ++ M1 ];
+ DBGA ( R0.L , 1 ); DBGA ( R0.H , 2 );
+ _DBG I3;
+ R0 = [ I3 ++ M1 ];
+ DBGA ( R0.L , 2 ); DBGA ( R0.H , 3 );
+
+ pass
+
+ .data
+vec:
+ .dw 1
+ .dw 2
+ .dw 2
+ .dw 3