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-rw-r--r--sim/sh/ChangeLog20
-rw-r--r--sim/sh/gencode.c57
-rw-r--r--sim/sh/interp.c6
3 files changed, 51 insertions, 32 deletions
diff --git a/sim/sh/ChangeLog b/sim/sh/ChangeLog
index 9659f95..549e499 100644
--- a/sim/sh/ChangeLog
+++ b/sim/sh/ChangeLog
@@ -1,3 +1,23 @@
+2004-02-02 Michael Snyder <msnyder@redhat.com>
+
+ * gencode.c (movua.l): Set thislock to 0, not n.
+
+2004-02-12 Michael Snyder <msnyder@redhat.com>
+
+ * gencode.c (table): Change from char to short.
+ (dumptable): Change generated table from char to short.
+ * interp.c (sh_jump_table, sh_dsp_table, ppi_table): char to short.
+ (init_dsp): Compute size of sh_dsp_table.
+ (sim_resume): Change jump_table from char to short.
+
+2004-01-27 Michael Snyder <msnyder@redhat.com>
+
+ * gencode.c: (op tab): Some refs and defs fixes.
+ "fsrra" -> "fsrra <FREG_N>".
+ "sleep": replace array ref with array addr.
+ "trapa": ditto.
+ Comment and whitespace clean-ups.
+
2004-01-07 Michael Snyder <msnyder@redhat.com>
* gencode.c: Whitespace cleanup.
diff --git a/sim/sh/gencode.c b/sim/sh/gencode.c
index 52e611f..3347591 100644
--- a/sim/sh/gencode.c
+++ b/sim/sh/gencode.c
@@ -4,7 +4,7 @@
Written by Steve Chamberlain of Cygnus Support.
sac@cygnus.com
- This file is part of SH sim
+ This file is part of SH sim.
THIS SOFTWARE IS NOT COPYRIGHTED
@@ -20,7 +20,7 @@
*/
/* This program generates the opcode table for the assembler and
- the simulator code
+ the simulator code.
-t prints a pretty table for the assembler manual
-s generates the simulator code jump table
@@ -72,7 +72,7 @@ op tab[] =
"R[n] = ult;",
},
- { "0", "", "and #<imm>,R0", "11001001i8*1....",
+ { "0", "0", "and #<imm>,R0", "11001001i8*1....",
"R0 &= i;",
},
{ "n", "nm", "and <REG_M>,<REG_N>", "0010nnnnmmmm1001",
@@ -201,8 +201,8 @@ op tab[] =
"SET_SR_T (0);",
},
- { "", "nm", "div1 <REG_M>,<REG_N>", "0011nnnnmmmm0100",
- "div1 (R, m, n/*, T*/);",
+ { "n", "nm", "div1 <REG_M>,<REG_N>", "0011nnnnmmmm0100",
+ "div1 (&R0, m, n/*, T*/);",
},
{ "", "nm", "dmuls.l <REG_M>,<REG_N>", "0011nnnnmmmm1101",
@@ -287,7 +287,7 @@ op tab[] =
/* sh2e */
{ "", "", "fdiv <FREG_M>,<FREG_N>", "1111nnnnmmmm0011",
"FP_OP (n, /, m);",
- "/* FIXME: check for DP and (n & 1) == 0? */",
+ "/* FIXME: check for DP and (n & 1) == 0? */",
},
/* sh4 */
@@ -309,13 +309,13 @@ op tab[] =
/* sh2e */
{ "", "", "fldi0 <FREG_N>", "1111nnnn10001101",
"SET_FR (n, (float) 0.0);",
- "/* FIXME: check for DP and (n & 1) == 0? */",
+ "/* FIXME: check for DP and (n & 1) == 0? */",
},
/* sh2e */
{ "", "", "fldi1 <FREG_N>", "1111nnnn10011101",
"SET_FR (n, (float) 1.0);",
- "/* FIXME: check for DP and (n & 1) == 0? */",
+ "/* FIXME: check for DP and (n & 1) == 0? */",
},
/* sh2e */
@@ -443,7 +443,8 @@ op tab[] =
"}",
},
- /* sh4: See fmov instructions above for move to/from extended fp registers */
+ /* sh4:
+ See fmov instructions above for move to/from extended fp registers. */
/* sh2e */
{ "", "", "fmul <FREG_M>,<FREG_N>", "1111nnnnmmmm0010",
@@ -490,7 +491,7 @@ op tab[] =
},
/* sh4 */
- { "", "", "fsrra", "1111nnnn01111101",
+ { "", "", "fsrra <FREG_N>", "1111nnnn01111101",
"if (FPSCR_PR)",
" RAISE_EXCEPTION (SIGILL);",
"else",
@@ -662,11 +663,11 @@ op tab[] =
},
{ "nm", "nm", "mac.l @<REG_M>+,@<REG_N>+", "0000nnnnmmmm1111",
- "macl (&R0,memory,n,m);",
+ "macl (&R0, memory, n, m);",
},
{ "nm", "nm", "mac.w @<REG_M>+,@<REG_N>+", "0100nnnnmmmm1111",
- "macw (&R0,memory,n,m,endianw);",
+ "macw (&R0, memory, n, m, endianw);",
},
{ "n", "", "mov #<imm>,<REG_N>", "1110nnnni8*1....",
@@ -840,7 +841,7 @@ op tab[] =
"WLAT (R[n], R[0]);",
},
- { "n", "0", "movco.l R0, @<REG_N>", "0000nnnn01110011",
+ { "", "n0", "movco.l R0, @<REG_N>", "0000nnnn01110011",
"/* LDST -> T */",
"SET_SR_T (LDST);",
"/* if (T) R0 -> (Rn) */",
@@ -868,7 +869,7 @@ op tab[] =
"MA (1);",
"R[0] = (RBAT (regn) << 24) + (RBAT (regn + 1) << 16) + ",
" (RBAT (regn + 2) << 8) + RBAT (regn + 3);",
- "L (n);",
+ "L (0);",
},
{ "0n", "n", "movua.l @<REG_N>+,R0", "0100nnnn11101001",
"int regn = R[n];",
@@ -876,7 +877,7 @@ op tab[] =
"R[0] = (RBAT (regn) << 24) + (RBAT (regn + 1) << 16) + ",
" (RBAT (regn + 2) << 8) + RBAT (regn + 3);",
"R[n] += 4;",
- "L (n);",
+ "L (0);",
},
{ "", "mn", "mul.l <REG_M>,<REG_N>", "0000nnnnmmmm0111",
"MACL = ((int) R[n]) * ((int) R[m]);",
@@ -1101,7 +1102,7 @@ op tab[] =
},
{ "", "", "sleep", "0000000000011011",
- "nip += trap (0xc3, R0, PC, memory, maskl, maskw, endianw);",
+ "nip += trap (0xc3, &R0, PC, memory, maskl, maskw, endianw);",
},
{ "n", "", "stc <CREG_M>,<REG_N>", "0000nnnnmmmm0010",
@@ -1192,7 +1193,7 @@ op tab[] =
{ "0", "", "trapa #<imm>", "11000011i8*1....",
"long imm = 0xff & i;",
"if (i < 20 || i == 33 || i == 34 || i == 0xc3)",
- " nip += trap (i, R, PC, memory, maskl, maskw,endianw);",
+ " nip += trap (i, &R0, PC, memory, maskl, maskw, endianw);",
#if 0
"else {",
/* SH-[12] */
@@ -1242,10 +1243,10 @@ op tab[] =
#if 0
{ "divs.l <REG_M>,<REG_N>", "0100nnnnmmmm1110",
- "divl (0,R[n],R[m]);",
+ "divl (0, R[n], R[m]);",
},
{ "divu.l <REG_M>,<REG_N>", "0100nnnnmmmm1101",
- "divl (0,R[n],R[m]);",
+ "divl (0, R[n], R[m]);",
},
#endif
@@ -2262,11 +2263,9 @@ gengastab ()
{
printf ("%s %-30s\n", p->code, p->name);
}
-
-
}
-static unsigned char table[1 << 16];
+static unsigned short table[1 << 16];
/* Take an opcode, expand all varying fields in it out and fill all the
right entries in 'table' with the opcode index. */
@@ -2395,7 +2394,7 @@ expand_opcode (val, i, s)
}
/* Print the jump table used to index an opcode into a switch
- statement entry. */
+ statement entry. */
static void
dumptable (name, size, start)
@@ -2408,7 +2407,7 @@ dumptable (name, size, start)
int i = start;
- printf ("unsigned char %s[%d]={\n", name, size);
+ printf ("unsigned short %s[%d]={\n", name, size);
while (i < start + size)
{
int j = 0;
@@ -2643,7 +2642,7 @@ gensim_caselist (p)
printf (" TL (n);\n");
{
- /* Do the refs */
+ /* Do the refs. */
char *r;
for (r = p->refs; *r; r++)
{
@@ -2666,7 +2665,7 @@ gensim_caselist (p)
printf (" }\n");
{
- /* Do the defs */
+ /* Do the defs. */
char *r;
for (r = p->defs; *r; r++)
{
@@ -2975,12 +2974,12 @@ main (ac, av)
int ac;
char **av;
{
- /* verify the table before anything else */
+ /* Verify the table before anything else. */
{
op *p;
for (p = tab; p->name; p++)
{
- /* check that the code field contains 16 bits */
+ /* Check that the code field contains 16 bits. */
if (strlen (p->code) != 16)
{
fprintf (stderr, "Code `%s' length wrong (%d) for `%s'\n",
@@ -2990,7 +2989,7 @@ main (ac, av)
}
}
- /* now generate the requested data */
+ /* Now generate the requested data. */
if (ac > 1)
{
if (strcmp (av[1], "-t") == 0)
diff --git a/sim/sh/interp.c b/sim/sh/interp.c
index 9810678..b7c7779 100644
--- a/sim/sh/interp.c
+++ b/sim/sh/interp.c
@@ -53,7 +53,7 @@
#define SIGTRAP 5
#endif
-extern unsigned char sh_jump_table[], sh_dsp_table[0x1000], ppi_table[];
+extern unsigned short sh_jump_table[], sh_dsp_table[0x1000], ppi_table[];
int sim_write (SIM_DESC sd, SIM_ADDR addr, unsigned char *buffer, int size);
@@ -1646,7 +1646,7 @@ init_dsp (abfd)
{
int i, tmp;
- for (i = sizeof sh_dsp_table - 1; i >= 0; i--)
+ for (i = (sizeof sh_dsp_table / sizeof sh_dsp_table[0]) - 1; i >= 0; i--)
{
tmp = sh_jump_table[0xf000 + i];
sh_jump_table[0xf000 + i] = sh_dsp_table[i];
@@ -1752,7 +1752,7 @@ sim_resume (sd, step, siggnal)
void (*prev) ();
void (*prev_fpe) ();
- register unsigned char *jump_table = sh_jump_table;
+ register unsigned short *jump_table = sh_jump_table;
register int *R = &(saved_state.asregs.regs[0]);
/*register int T;*/
generated by cgit v1.1 at 2025-04-11 05:44:14 +0000