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Diffstat (limited to 'sim/riscv/machs.h')
-rw-r--r-- | sim/riscv/machs.h | 45 |
1 files changed, 45 insertions, 0 deletions
diff --git a/sim/riscv/machs.h b/sim/riscv/machs.h new file mode 100644 index 0000000..903488b --- /dev/null +++ b/sim/riscv/machs.h @@ -0,0 +1,45 @@ +/* RISC-V simulator. + + Copyright (C) 2005-2021 Free Software Foundation, Inc. + Contributed by Mike Frysinger. + + This file is part of simulators. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see <http://www.gnu.org/licenses/>. */ + +#ifndef RISCV_SIM_MACHS_H +#define RISCV_SIM_MACHS_H + +typedef enum model_type { +#define M(ext) MODEL_RV32##ext, +#include "model_list.def" +#undef M +#define M(ext) MODEL_RV64##ext, +#include "model_list.def" +#undef M +#define M(ext) MODEL_RV128##ext, +#include "model_list.def" +#undef M + MODEL_MAX +} MODEL_TYPE; + +typedef enum mach_attr { + MACH_BASE, + MACH_RV32I, + MACH_RV64I, + MACH_RV128I, + MACH_MAX +} MACH_ATTR; + +#endif |