diff options
Diffstat (limited to 'sim/erc32')
| -rw-r--r-- | sim/erc32/exec.c | 2 | ||||
| -rw-r--r-- | sim/erc32/float.c | 2 | ||||
| -rw-r--r-- | sim/erc32/sis.h | 2 |
3 files changed, 3 insertions, 3 deletions
diff --git a/sim/erc32/exec.c b/sim/erc32/exec.c index c84371f..50bd5d3 100644 --- a/sim/erc32/exec.c +++ b/sim/erc32/exec.c @@ -314,7 +314,7 @@ mul64 (uint32_t n1, uint32_t n2, uint32_t *result_hi, uint32_t *result_lo, int m hi = (((n1 >> 16) & 0xFFFF) * ((n2 >> 16) & 0xFFFF)); /* We now need to add all of these results together, taking care - to propogate the carries from the additions: */ + to propagate the carries from the additions: */ reg_lo = add32 (lo, (mid1 << 16), &carry); reg_hi = carry; reg_lo = add32 (reg_lo, (mid2 << 16), &carry); diff --git a/sim/erc32/float.c b/sim/erc32/float.c index 2b851ca..069436c 100644 --- a/sim/erc32/float.c +++ b/sim/erc32/float.c @@ -20,7 +20,7 @@ FPU. IEEE trap handling is done as follows: 1. In the host, all IEEE traps are masked 2. After each simulated FPU instruction, check if any exception - occured by reading the exception bits from the host FPU status + occurred by reading the exception bits from the host FPU status register (get_accex()). 3. Propagate any exceptions to the simulated FSR. 4. Clear host exception bits. diff --git a/sim/erc32/sis.h b/sim/erc32/sis.h index cf44ddf..9044a08 100644 --- a/sim/erc32/sis.h +++ b/sim/erc32/sis.h @@ -114,7 +114,7 @@ struct pstate { uint64_t pwdtime; /* Cycles in power-down mode */ uint64_t nstore; /* Number of load instructions */ uint64_t nload; /* Number of store instructions */ - uint64_t nannul; /* Number of annuled instructions */ + uint64_t nannul; /* Number of annulled instructions */ uint64_t nbranch; /* Number of branch instructions */ uint32_t ildreg; /* Destination of last load instruction */ uint64_t ildtime; /* Last time point for load dependency */ |