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-rw-r--r--sim/bfin/interp.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/sim/bfin/interp.c b/sim/bfin/interp.c
index accf5f3..ccd6a8a 100644
--- a/sim/bfin/interp.c
+++ b/sim/bfin/interp.c
@@ -606,6 +606,8 @@ step_once (SIM_CPU *cpu)
trace_prefix (sd, cpu, NULL_CIA, oldpc, TRACE_LINENUM_P (cpu),
NULL, 0, " "); /* Use a space for gcc warnings. */
+ TRACE_DISASM (cpu, oldpc);
+
/* Handle hardware single stepping when lower than EVT3, and when SYSCFG
has already had the SSSTEP bit enabled. */
ssstep = false;