diff options
Diffstat (limited to 'opcodes/m32r-opc.c')
| -rw-r--r-- | opcodes/m32r-opc.c | 40 |
1 files changed, 17 insertions, 23 deletions
diff --git a/opcodes/m32r-opc.c b/opcodes/m32r-opc.c index 670f724..29b7a21 100644 --- a/opcodes/m32r-opc.c +++ b/opcodes/m32r-opc.c @@ -32,36 +32,34 @@ with this program; if not, write to the Free Software Foundation, Inc., /* -- opc.c */ unsigned int -m32r_cgen_dis_hash (buf, value) - const char * buf ATTRIBUTE_UNUSED; - CGEN_INSN_INT value; +m32r_cgen_dis_hash (const char * buf ATTRIBUTE_UNUSED, CGEN_INSN_INT value) { unsigned int x; - - if (value & 0xffff0000) /* 32bit instructions */ + + if (value & 0xffff0000) /* 32bit instructions. */ value = (value >> 16) & 0xffff; - - x = (value>>8) & 0xf0; + + x = (value >> 8) & 0xf0; if (x == 0x40 || x == 0xe0 || x == 0x60 || x == 0x50) return x; - + if (x == 0x70 || x == 0xf0) - return x | ((value>>8) & 0x0f); - + return x | ((value >> 8) & 0x0f); + if (x == 0x30) return x | ((value & 0x70) >> 4); else return x | ((value & 0xf0) >> 4); } - + /* -- */ /* The hash functions are recorded here to help keep assembler code out of the disassembler and vice versa. */ -static int asm_hash_insn_p PARAMS ((const CGEN_INSN *)); -static unsigned int asm_hash_insn PARAMS ((const char *)); -static int dis_hash_insn_p PARAMS ((const CGEN_INSN *)); -static unsigned int dis_hash_insn PARAMS ((const char *, CGEN_INSN_INT)); +static int asm_hash_insn_p (const CGEN_INSN *); +static unsigned int asm_hash_insn (const char *); +static int dis_hash_insn_p (const CGEN_INSN *); +static unsigned int dis_hash_insn (const char *, CGEN_INSN_INT); /* Instruction formats. */ @@ -1778,14 +1776,10 @@ dis_hash_insn (buf, value) return CGEN_DIS_HASH (buf, value); } -static void set_fields_bitsize PARAMS ((CGEN_FIELDS *, int)); - /* Set the recorded length of the insn in the CGEN_FIELDS struct. */ static void -set_fields_bitsize (fields, size) - CGEN_FIELDS *fields; - int size; +set_fields_bitsize (CGEN_FIELDS *fields, int size) { CGEN_FIELDS_BITSIZE (fields) = size; } @@ -1794,15 +1788,15 @@ set_fields_bitsize (fields, size) This plugs the opcode entries and macro instructions into the cpu table. */ void -m32r_cgen_init_opcode_table (cd) - CGEN_CPU_DESC cd; +m32r_cgen_init_opcode_table (CGEN_CPU_DESC cd) { int i; int num_macros = (sizeof (m32r_cgen_macro_insn_table) / sizeof (m32r_cgen_macro_insn_table[0])); const CGEN_IBASE *ib = & m32r_cgen_macro_insn_table[0]; const CGEN_OPCODE *oc = & m32r_cgen_macro_insn_opcode_table[0]; - CGEN_INSN *insns = (CGEN_INSN *) xmalloc (num_macros * sizeof (CGEN_INSN)); + CGEN_INSN *insns = xmalloc (num_macros * sizeof (CGEN_INSN)); + memset (insns, 0, num_macros * sizeof (CGEN_INSN)); for (i = 0; i < num_macros; ++i) { |