diff options
Diffstat (limited to 'include/elf')
| -rw-r--r-- | include/elf/ChangeLog | 9 | ||||
| -rw-r--r-- | include/elf/arc-reloc.def | 456 | ||||
| -rw-r--r-- | include/elf/arc.h | 32 | ||||
| -rw-r--r-- | include/elf/common.h | 3 |
4 files changed, 491 insertions, 9 deletions
diff --git a/include/elf/ChangeLog b/include/elf/ChangeLog index 8e6bb44..5e4605d 100644 --- a/include/elf/ChangeLog +++ b/include/elf/ChangeLog @@ -1,3 +1,12 @@ +2015-10-07 Cupertino Miranda <cmiranda@synopsys.com> + + * arc-reloc.def: Macro file with definition of all relocation + types. + * arc.h: Changed macros for the newly supported ARC cpus. Altered + enum defining the supported relocations. + * common.h: Changed EM_ARC_A5 definition to EM_ARC_COMPACT. Added + macro for EM_ARC_COMPACT2. + 2015-09-22 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE> * common.h (DF_1_STUB, DF_1_PIE): Define. diff --git a/include/elf/arc-reloc.def b/include/elf/arc-reloc.def new file mode 100644 index 0000000..e2ff871 --- /dev/null +++ b/include/elf/arc-reloc.def @@ -0,0 +1,456 @@ + +ARC_RELOC_HOWTO(ARC_NONE, 0, \ + 2, \ + 32, \ + replace_none, \ + bitfield, \ + 0) + +ARC_RELOC_HOWTO(ARC_8, 1, \ + 0, \ + 8, \ + replace_bits8, \ + bitfield, \ + ( S + A )) + +ARC_RELOC_HOWTO(ARC_16, 2, \ + 1, \ + 16, \ + replace_bits16, \ + bitfield, \ + ( S + A )) + +ARC_RELOC_HOWTO(ARC_24, 3, \ + 2, \ + 24, \ + replace_bits24, \ + bitfield, \ + ( S + A )) + +ARC_RELOC_HOWTO(ARC_32, 4, \ + 2, \ + 32, \ + replace_word32, \ + bitfield, \ + ( S + A )) + +ARC_RELOC_HOWTO(ARC_N8, 8, \ + 0, \ + 8, \ + replace_bits8, \ + bitfield, \ + ( S - A )) + +ARC_RELOC_HOWTO(ARC_N16, 9, \ + 1, \ + 16, \ + replace_bits16, \ + bitfield, \ + ( S - A )) + +ARC_RELOC_HOWTO(ARC_N24, 10, \ + 2, \ + 24, \ + replace_bits24, \ + bitfield, \ + ( S - A )) + +ARC_RELOC_HOWTO(ARC_N32, 11, \ + 2, \ + 32, \ + replace_word32, \ + bitfield, \ + ( S - A )) + +ARC_RELOC_HOWTO(ARC_SDA, 12, \ + 2, \ + 9, \ + replace_disp9, \ + bitfield, \ + ( S + A )) + +ARC_RELOC_HOWTO(ARC_SECTOFF, 13, \ + 2, \ + 32, \ + replace_word32, \ + bitfield, \ + ( ( S - SECTSTART ) + A )) + +ARC_RELOC_HOWTO(ARC_S21H_PCREL, 14, \ + 2, \ + 20, \ + replace_disp21h, \ + signed, \ + ( ( ( S + A ) - P ) >> 1 )) + +ARC_RELOC_HOWTO(ARC_S21W_PCREL, 15, \ + 2, \ + 19, \ + replace_disp21w, \ + signed, \ + ( ( ( S + A ) - P ) >> 2 )) + +ARC_RELOC_HOWTO(ARC_S25H_PCREL, 16, \ + 2, \ + 24, \ + replace_disp25h, \ + signed, \ + ( ( ( S + A ) - P ) >> 1 )) + +ARC_RELOC_HOWTO(ARC_S25W_PCREL, 17, \ + 2, \ + 23, \ + replace_disp25w, \ + signed, \ + ( ( ( S + A ) - P ) >> 2 )) + +ARC_RELOC_HOWTO(ARC_SDA32, 18, \ + 2, \ + 32, \ + replace_word32, \ + signed, \ + ( ( S + A ) - _SDA_BASE_ )) + +ARC_RELOC_HOWTO(ARC_SDA_LDST, 19, \ + 2, \ + 9, \ + replace_disp9ls, \ + signed, \ + ( ( S + A ) - _SDA_BASE_ )) + +ARC_RELOC_HOWTO(ARC_SDA_LDST1, 20, \ + 2, \ + 9, \ + replace_disp9ls, \ + signed, \ + ( ( ( S + A ) - _SDA_BASE_ ) >> 1 )) + +ARC_RELOC_HOWTO(ARC_SDA_LDST2, 21, \ + 2, \ + 9, \ + replace_disp9ls, \ + signed, \ + ( ( ( S + A ) - _SDA_BASE_ ) >> 2 )) + +ARC_RELOC_HOWTO(ARC_SDA16_LD, 22, \ + 1, \ + 9, \ + replace_disp9s, \ + signed, \ + ( ( S + A ) - _SDA_BASE_ )) + +ARC_RELOC_HOWTO(ARC_SDA16_LD1, 23, \ + 1, \ + 9, \ + replace_disp9s, \ + signed, \ + ( ( ( S + A ) - _SDA_BASE_ ) >> 1 )) + +ARC_RELOC_HOWTO(ARC_SDA16_LD2, 24, \ + 1, \ + 9, \ + replace_disp9s, \ + signed, \ + ( ( ( S + A ) - _SDA_BASE_ ) >> 2 )) + +ARC_RELOC_HOWTO(ARC_S13_PCREL, 25, \ + 1, \ + 11, \ + replace_disp13s, \ + signed, \ + ( ( ( S + A ) - P ) >> 2 )) + +ARC_RELOC_HOWTO(ARC_W, 26, \ + 2, \ + 32, \ + replace_word32, \ + bitfield, \ + ( ( S + A ) & ( ~3 ) )) + +ARC_RELOC_HOWTO(ARC_32_ME, 27, \ + 2, \ + 32, \ + replace_limm, \ + signed, \ + ( S + A )) + +ARC_RELOC_HOWTO(ARC_32_ME_S, 105, \ + 2, \ + 32, \ + replace_limms, \ + signed, \ + ( S + A )) + +ARC_RELOC_HOWTO(ARC_N32_ME, 28, \ + 2, \ + 32, \ + replace_word32, \ + bitfield, \ + ( S - A )) + +ARC_RELOC_HOWTO(ARC_SECTOFF_ME, 29, \ + 2, \ + 32, \ + replace_word32, \ + bitfield, \ + ( ( S - SECTSTART ) + A )) + +ARC_RELOC_HOWTO(ARC_SDA32_ME, 30, \ + 2, \ + 32, \ + replace_limm, \ + signed, \ + ( ( S + A ) - _SDA_BASE_ )) + +ARC_RELOC_HOWTO(ARC_W_ME, 31, \ + 2, \ + 32, \ + replace_word32, \ + bitfield, \ + ( S + A )) + +ARC_RELOC_HOWTO(AC_SECTOFF_U8, 35, \ + 2, \ + 9, \ + replace_disp9ls, \ + bitfield, \ + ( ( S + A ) - SECTSTART )) + +ARC_RELOC_HOWTO(AC_SECTOFF_U8_1, 36, \ + 2, \ + 9, \ + replace_disp9ls, \ + bitfield, \ + ( ( ( S + A ) - SECTSTART ) >> 1 )) + +ARC_RELOC_HOWTO(AC_SECTOFF_U8_2, 37, \ + 2, \ + 9, \ + replace_disp9ls, \ + bitfield, \ + ( ( ( S + A ) - SECTSTART ) >> 2 )) + +ARC_RELOC_HOWTO(AC_SECTFOFF_S9, 38, \ + 2, \ + 9, \ + replace_disp9ls, \ + bitfield, \ + ( ( S + A ) - SECTSTART )) + +ARC_RELOC_HOWTO(AC_SECTFOFF_S9_1, 39, \ + 2, \ + 9, \ + replace_disp9ls, \ + bitfield, \ + ( ( ( S + A ) - SECTSTART ) >> 1 )) + +ARC_RELOC_HOWTO(AC_SECTFOFF_S9_2, 40, \ + 2, \ + 9, \ + replace_disp9ls, \ + bitfield, \ + ( ( ( S + A ) - SECTSTART ) >> 2 )) + +ARC_RELOC_HOWTO(ARC_SECTOFF_ME_1, 41, \ + 2, \ + 32, \ + replace_word32, \ + bitfield, \ + ( ( ( S - SECTSTART ) + A ) >> 1 )) + +ARC_RELOC_HOWTO(ARC_SECTOFF_ME_2, 42, \ + 2, \ + 32, \ + replace_word32, \ + bitfield, \ + ( ( ( S - SECTSTART ) + A ) >> 2 )) + +ARC_RELOC_HOWTO(ARC_SECTOFF_1, 43, \ + 2, \ + 32, \ + replace_word32, \ + bitfield, \ + ( ( ( S - SECTSTART ) + A ) >> 1 )) + +ARC_RELOC_HOWTO(ARC_SECTOFF_2, 44, \ + 2, \ + 32, \ + replace_word32, \ + bitfield, \ + ( ( ( S - SECTSTART ) + A ) >> 2 )) + +ARC_RELOC_HOWTO(ARC_SDA16_ST2, 48, \ + 1, \ + 9, \ + replace_disp9s1, \ + signed, \ + ( ( ( S + A ) - _SDA_BASE_ ) >> 2 )) + +ARC_RELOC_HOWTO(ARC_PC32, 50, \ + 2, \ + 32, \ + replace_word32, \ + signed, \ + ( ( S + A ) - P )) + +ARC_RELOC_HOWTO(ARC_GOT32, 59, \ + 2, \ + 32, \ + replace_word32, \ + dont, \ + ( G + A )) + +ARC_RELOC_HOWTO(ARC_GOTPC32, 51, \ + 2, \ + 32, \ + replace_word32, \ + signed, \ + ( ( ( GOT + G ) + A ) - P )) + +ARC_RELOC_HOWTO(ARC_PLT32, 52, \ + 2, \ + 32, \ + replace_word32, \ + signed, \ + ( ( L + A ) - P )) + +ARC_RELOC_HOWTO(ARC_COPY, 53, \ + 2, \ + 0, \ + replace_none, \ + signed, \ + none) + +ARC_RELOC_HOWTO(ARC_GLOB_DAT, 54, \ + 2, \ + 32, \ + replace_word32, \ + signed, \ + S) + +ARC_RELOC_HOWTO(ARC_JMP_SLOT, 55, \ + 2, \ + 32, \ + replace_word32, \ + signed, \ + S) + +ARC_RELOC_HOWTO(ARC_RELATIVE, 56, \ + 2, \ + 32, \ + replace_word32, \ + signed, \ + ( B + A )) + +ARC_RELOC_HOWTO(ARC_GOTOFF, 57, \ + 2, \ + 32, \ + replace_word32, \ + signed, \ + ( ( S + A ) - GOT )) + +ARC_RELOC_HOWTO(ARC_GOTPC, 58, \ + 2, \ + 32, \ + replace_word32, \ + signed, \ + ( ( GOT + A ) - P )) + +ARC_RELOC_HOWTO(ARC_S21W_PCREL_PLT, 60, \ + 2, \ + 19, \ + replace_disp21w, \ + signed, \ + ( ( ( L + A ) - P ) >> 2 )) + +ARC_RELOC_HOWTO(ARC_S25H_PCREL_PLT, 61, \ + 2, \ + 24, \ + replace_disp25h, \ + signed, \ + ( ( ( L + A ) - P ) >> 1 )) + +ARC_RELOC_HOWTO(ARC_TLS_DTPMOD, 66, \ + 2, \ + 32, \ + replace_word32, \ + dont, \ + 0) + +ARC_RELOC_HOWTO(ARC_TLS_DTPOFF, 67, \ + 2, \ + 32, \ + replace_word32, \ + dont, \ + 0) + +ARC_RELOC_HOWTO(ARC_TLS_TPOFF, 68, \ + 2, \ + 32, \ + replace_word32, \ + dont, \ + 0) + +ARC_RELOC_HOWTO(ARC_TLS_GD_GOT, 69, \ + 2, \ + 32, \ + replace_word32, \ + dont, \ + 0) + +ARC_RELOC_HOWTO(ARC_TLS_GD_LD, 70, \ + 2, \ + 32, \ + replace_word32, \ + dont, \ + 0) + +ARC_RELOC_HOWTO(ARC_TLS_GD_CALL, 71, \ + 2, \ + 32, \ + replace_word32, \ + dont, \ + 0) + +ARC_RELOC_HOWTO(ARC_TLS_IE_GOT, 72, \ + 2, \ + 32, \ + replace_word32, \ + dont, \ + 0) + +ARC_RELOC_HOWTO(ARC_TLS_DTPOFF_S9, 73, \ + 2, \ + 32, \ + replace_word32, \ + dont, \ + 0) + +ARC_RELOC_HOWTO(ARC_TLS_LE_S9, 74, \ + 2, \ + 32, \ + replace_word32, \ + dont, \ + 0) + +ARC_RELOC_HOWTO(ARC_TLS_LE_32, 75, \ + 2, \ + 32, \ + replace_word32, \ + dont, \ + 0) + +ARC_RELOC_HOWTO(ARC_S25W_PCREL_PLT, 76, \ + 2, \ + 23, \ + replace_disp25w, \ + signed, \ + ( ( ( L + A ) - P ) >> 2 )) + +ARC_RELOC_HOWTO(ARC_S21H_PCREL_PLT, 77, \ + 2, \ + 20, \ + replace_disp21h, \ + signed, \ + ( ( ( L + A ) - P ) >> 1 )) + diff --git a/include/elf/arc.h b/include/elf/arc.h index 62398e1..707aeb4 100644 --- a/include/elf/arc.h +++ b/include/elf/arc.h @@ -28,25 +28,41 @@ /* Relocations. */ +#define ARC_RELOC_HOWTO(TYPE, VALUE, SIZE, BITSIZE, RELOC_FUNCTION, OVERFLOW, FORMULA) \ + RELOC_NUMBER(R_##TYPE, VALUE) + START_RELOC_NUMBERS (elf_arc_reloc_type) - RELOC_NUMBER (R_ARC_NONE, 0) - RELOC_NUMBER (R_ARC_32, 1) - RELOC_NUMBER (R_ARC_B26, 2) - RELOC_NUMBER (R_ARC_B22_PCREL, 3) +#include "arc-reloc.def" END_RELOC_NUMBERS (R_ARC_max) +#undef ARC_RELOC_HOWTO + /* Processor specific flags for the ELF header e_flags field. */ /* Four bit ARC machine type field. */ +#define EF_ARC_MACH_MSK 0x000000ff +#define EF_ARC_OSABI_MSK 0x00000f00 +#define EF_ARC_ALL_MSK (EF_ARC_MACH_MSK | EF_ARC_OSABI_MSK) + +/* Four bit ARC machine type field. */ #define EF_ARC_MACH 0x0000000f /* Various CPU types. */ +#define E_ARC_MACH_ARC600 0x00000002 +#define E_ARC_MACH_ARC601 0x00000004 +#define E_ARC_MACH_ARC700 0x00000003 -#define E_ARC_MACH_ARC5 0 -#define E_ARC_MACH_ARC6 1 -#define E_ARC_MACH_ARC7 2 -#define E_ARC_MACH_ARC8 3 +/* Processor specific flags for the ELF header e_flags field. */ +#define EF_ARC_CPU_GENERIC 0x00000000 +#define EF_ARC_CPU_ARCV2EM 0x00000005 +#define EF_ARC_CPU_ARCV2HS 0x00000006 + +/* ARC Linux specific ABIs. */ +#define E_ARC_OSABI_ORIG 0x00000000 /* MUST be 0 for back-compat. */ +#define E_ARC_OSABI_V2 0x00000200 +#define E_ARC_OSABI_V3 0x00000300 +#define E_ARC_OSABI_CURRENT E_ARC_OSABI_V3 /* Leave bits 0xf0 alone in case we ever have more than 16 cpu types. */ diff --git a/include/elf/common.h b/include/elf/common.h index fbf1f3c..bb15b7d 100644 --- a/include/elf/common.h +++ b/include/elf/common.h @@ -194,7 +194,7 @@ #define EM_MN10200 90 /* Matsushita MN10200 */ #define EM_PJ 91 /* picoJava */ #define EM_OR1K 92 /* OpenRISC 1000 32-bit embedded processor */ -#define EM_ARC_A5 93 /* ARC Cores Tangent-A5 */ +#define EM_ARC_COMPACT 93 /* ARC International ARCompact processor */ #define EM_XTENSA 94 /* Tensilica Xtensa Architecture */ #define EM_VIDEOCORE 95 /* Alphamosaic VideoCore processor */ #define EM_TMM_GPP 96 /* Thompson Multimedia General Purpose Processor */ @@ -295,6 +295,7 @@ #define EM_MICROBLAZE 189 /* Xilinx MicroBlaze 32-bit RISC soft processor core */ #define EM_CUDA 190 /* NVIDIA CUDA architecture */ #define EM_TILEGX 191 /* Tilera TILE-Gx multicore architecture family */ +#define EM_ARC_COMPACT2 195 /* Synopsys ARCompact V2 */ #define EM_RL78 197 /* Renesas RL78 family. */ #define EM_78K0R 199 /* Renesas 78K0R. */ #define EM_INTEL205 205 /* Reserved by Intel */ |