diff options
Diffstat (limited to 'gas')
| -rw-r--r-- | gas/config/tc-aarch64.c | 4 | ||||
| -rw-r--r-- | gas/testsuite/gas/aarch64/sme2-12-invalid.d | 3 | ||||
| -rw-r--r-- | gas/testsuite/gas/aarch64/sme2-12-invalid.l | 155 | ||||
| -rw-r--r-- | gas/testsuite/gas/aarch64/sme2-12-invalid.s | 136 | ||||
| -rw-r--r-- | gas/testsuite/gas/aarch64/sme2-12-noarch.d | 3 | ||||
| -rw-r--r-- | gas/testsuite/gas/aarch64/sme2-12-noarch.l | 571 | ||||
| -rw-r--r-- | gas/testsuite/gas/aarch64/sme2-12.d | 579 | ||||
| -rw-r--r-- | gas/testsuite/gas/aarch64/sme2-12.s | 633 |
8 files changed, 2084 insertions, 0 deletions
diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c index 47ad704..2aa3838 100644 --- a/gas/config/tc-aarch64.c +++ b/gas/config/tc-aarch64.c @@ -6729,6 +6729,8 @@ parse_operands (char *str, const aarch64_opcode *opcode) case AARCH64_OPND_SVE_Zn_INDEX: case AARCH64_OPND_SME_Zm_INDEX1: case AARCH64_OPND_SME_Zm_INDEX2: + case AARCH64_OPND_SME_Zm_INDEX3_2: + case AARCH64_OPND_SME_Zm_INDEX3_10: case AARCH64_OPND_SME_Zn_INDEX1_16: case AARCH64_OPND_SME_Zn_INDEX2_15: case AARCH64_OPND_SME_Zn_INDEX2_16: @@ -7850,8 +7852,10 @@ parse_operands (char *str, const aarch64_opcode *opcode) info->imm.value = val; break; + case AARCH64_OPND_SME_ZA_array_off2x2: case AARCH64_OPND_SME_ZA_array_off3_0: case AARCH64_OPND_SME_ZA_array_off3_5: + case AARCH64_OPND_SME_ZA_array_off3x2: case AARCH64_OPND_SME_ZA_array_off4: if (!parse_dual_indexed_reg (&str, REG_TYPE_ZA, &info->indexed_za, &qualifier, 0)) diff --git a/gas/testsuite/gas/aarch64/sme2-12-invalid.d b/gas/testsuite/gas/aarch64/sme2-12-invalid.d new file mode 100644 index 0000000..2ce4152 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sme2-12-invalid.d @@ -0,0 +1,3 @@ +#as: -march=armv8-a +#source: sme2-12-invalid.s +#error_output: sme2-12-invalid.l diff --git a/gas/testsuite/gas/aarch64/sme2-12-invalid.l b/gas/testsuite/gas/aarch64/sme2-12-invalid.l new file mode 100644 index 0000000..a387bb7 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sme2-12-invalid.l @@ -0,0 +1,155 @@ +[^ :]+: Assembler messages: +[^ :]+:[0-9]+: Error: expected a ZA array vector at operand 1 -- `bfmlal 0,z0\.h,z0\.h\[0\]' +[^ :]+:[0-9]+: Error: expected a register or register list at operand 2 -- `bfmlal za\.s\[w8,0:1\],0,z0\.h\[0\]' +[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `bfmlal za\.s\[w8,0:1\],z0\.h,0' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w7,0:1\],z0\.h,z0\.h\[0\]' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w12,0:1\],z0\.h,z0\.h\[0\]' +[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `bfmlal za\.s\[w8,0\],z0\.h,z0\.h\[0\]' +[^ :]+:[0-9]+: Error: the last offset is equal to the first offset at operand 1 -- `bfmlal za\.s\[w8,0:0\],z0\.h,z0\.h\[0\]' +[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `bfmlal za\.s\[w8,0:2\],z0\.h,z0\.h\[0\]' +[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 1 -- `bfmlal za\.s\[w8,1:2\],z0\.h,z0\.h\[0\]' +[^ :]+:[0-9]+: Error: the last offset is less than the first offset at operand 1 -- `bfmlal za\.s\[w8,1:0\],z0\.h,z0\.h\[0\]' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 14 at operand 1 -- `bfmlal za\.s\[w8,-2:-1\],z0\.h,z0\.h\[0\]' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 14 at operand 1 -- `bfmlal za\.s\[w8,16:17\],z0\.h,z0\.h\[0\]' +[^ :]+:[0-9]+: Error: unexpected vector group size at operand 1 -- `bfmlal za\.s\[w8,0:1,vgx2\],z0\.h,z0\.h\[0\]' +[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `bfmlal za\.s\[w8,0:1\],z0\.h,z16\.h\[0\]' +[^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `bfmlal za\.s\[w8,0:1\],z0\.h,z0\.h\[-1\]' +[^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `bfmlal za\.s\[w8,0:1\],z0\.h,z0\.h\[8\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `bfmlal za\.s\[w8,0:1\],z0\.s,z0\.s\[0\]' +[^ :]+:[0-9]+: Info: did you mean this\? +[^ :]+:[0-9]+: Info: bfmlal za\.s\[w8, 0:1\], z0\.h, z0\.h\[0\] +[^ :]+:[0-9]+: Error: operand mismatch -- `bfmlal za\.h\[w8,0:1\],z0\.h,z0\.h\[0\]' +[^ :]+:[0-9]+: Info: did you mean this\? +[^ :]+:[0-9]+: Info: bfmlal za\.s\[w8, 0:1\], z0\.h, z0\.h\[0\] +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w7,0:1\],{z0\.h-z1\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w12,0:1\],{z0\.h-z1\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `bfmlal za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: the last offset is equal to the first offset at operand 1 -- `bfmlal za\.s\[w8,0:0\],{z0\.h-z1\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `bfmlal za\.s\[w8,0:2\],{z0\.h-z1\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 1 -- `bfmlal za\.s\[w8,1:2\],{z0\.h-z1\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: the last offset is less than the first offset at operand 1 -- `bfmlal za\.s\[w8,1:0\],{z0\.h-z1\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,-2:-1\],{z0\.h-z1\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,8:9\],{z0\.h-z1\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,16:17\],{z0\.h-z1\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `bfmlal za\.s\[w8,0:1,vgx4\],{z0\.h-z1\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `bfmlal za\.s\[w8,0:1\],{z1\.h-z2\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: the register list must have a stride of 1 at operand 2 -- `bfmlal za\.s\[w8,0:1\],{z1\.h,z3\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `bfmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z16\.h\[0\]' +[^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `bfmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[-1\]' +[^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `bfmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[8\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `bfmlal za\.s\[w8,0:1\],{z0\.s-z1\.s},z0\.s\[0\]' +[^ :]+:[0-9]+: Info: did you mean this\? +[^ :]+:[0-9]+: Info: bfmlal za\.s\[w8, 0:1\], {z0\.h-z1\.h}, z0\.h\[0\] +[^ :]+:[0-9]+: Error: operand mismatch -- `bfmlal za\.h\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Info: did you mean this\? +[^ :]+:[0-9]+: Info: bfmlal za\.s\[w8, 0:1\], {z0\.h-z1\.h}, z0\.h\[0\] +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w7,0:1\],{z0\.h-z3\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w12,0:1\],{z0\.h-z3\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `bfmlal za\.s\[w8,0\],{z0\.h-z3\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: the last offset is equal to the first offset at operand 1 -- `bfmlal za\.s\[w8,0:0\],{z0\.h-z3\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `bfmlal za\.s\[w8,0:2\],{z0\.h-z3\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 1 -- `bfmlal za\.s\[w8,1:2\],{z0\.h-z3\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: the last offset is less than the first offset at operand 1 -- `bfmlal za\.s\[w8,1:0\],{z0\.h-z3\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,-2:-1\],{z0\.h-z3\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,8:9\],{z0\.h-z3\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,16:17\],{z0\.h-z3\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `bfmlal za\.s\[w8,0:1,vgx2\],{z0\.h-z3\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `bfmlal za\.s\[w8,0:1\],{z1\.h-z4\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: the register list must have a stride of 1 at operand 2 -- `bfmlal za\.s\[w8,0:1\],{z1\.h,z3\.h,z5\.h,z7\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `bfmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z16\.h\[0\]' +[^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `bfmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[-1\]' +[^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `bfmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[8\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `bfmlal za\.s\[w8,0:1\],{z0\.s-z3\.s},z0\.s\[0\]' +[^ :]+:[0-9]+: Info: did you mean this\? +[^ :]+:[0-9]+: Info: bfmlal za\.s\[w8, 0:1\], {z0\.h-z3\.h}, z0\.h\[0\] +[^ :]+:[0-9]+: Error: operand mismatch -- `bfmlal za\.h\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Info: did you mean this\? +[^ :]+:[0-9]+: Info: bfmlal za\.s\[w8, 0:1\], {z0\.h-z3\.h}, z0\.h\[0\] +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w7,0:1\],z0\.h,z0\.h' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w12,0:1\],z0\.h,z0\.h' +[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `bfmlal za\.s\[w8,0\],z0\.h,z0\.h' +[^ :]+:[0-9]+: Error: the last offset is equal to the first offset at operand 1 -- `bfmlal za\.s\[w8,0:0\],z0\.h,z0\.h' +[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `bfmlal za\.s\[w8,0:2\],z0\.h,z0\.h' +[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 1 -- `bfmlal za\.s\[w8,1:2\],z0\.h,z0\.h' +[^ :]+:[0-9]+: Error: the last offset is less than the first offset at operand 1 -- `bfmlal za\.s\[w8,1:0\],z0\.h,z0\.h' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 14 at operand 1 -- `bfmlal za\.s\[w8,-2:-1\],z0\.h,z0\.h' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 14 at operand 1 -- `bfmlal za\.s\[w8,16:17\],z0\.h,z0\.h' +[^ :]+:[0-9]+: Error: unexpected vector group size at operand 1 -- `bfmlal za\.s\[w8,0:1,vgx2\],z0\.h,z0\.h' +[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `bfmlal za\.s\[w8,0:1\],z0\.h,z16\.h' +[^ :]+:[0-9]+: Error: operand mismatch -- `bfmlal za\.s\[w8,0:1\],z0\.s,z0\.s' +[^ :]+:[0-9]+: Info: did you mean this\? +[^ :]+:[0-9]+: Info: bfmlal za\.s\[w8, 0:1\], z0\.h, z0\.h +[^ :]+:[0-9]+: Error: operand mismatch -- `bfmlal za\.h\[w8,0:1\],z0\.h,z0\.h' +[^ :]+:[0-9]+: Info: did you mean this\? +[^ :]+:[0-9]+: Info: bfmlal za\.s\[w8, 0:1\], z0\.h, z0\.h +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w7,0:1\],{z0\.h-z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w12,0:1\],{z0\.h-z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `bfmlal za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: the last offset is equal to the first offset at operand 1 -- `bfmlal za\.s\[w8,0:0\],{z0\.h-z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `bfmlal za\.s\[w8,0:2\],{z0\.h-z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 1 -- `bfmlal za\.s\[w8,1:2\],{z0\.h-z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: the last offset is less than the first offset at operand 1 -- `bfmlal za\.s\[w8,1:0\],{z0\.h-z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,-2:-1\],{z0\.h-z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,8:9\],{z0\.h-z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,16:17\],{z0\.h-z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `bfmlal za\.s\[w8,0:1,vgx4\],{z0\.h-z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: the register list must have a stride of 1 at operand 2 -- `bfmlal za\.s\[w8,0:1\],{z1\.h,z3\.h},z0\.h' +[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `bfmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z16\.h' +[^ :]+:[0-9]+: Error: operand mismatch -- `bfmlal za\.s\[w8,0:1\],{z0\.s-z1\.s},z0\.s' +[^ :]+:[0-9]+: Info: did you mean this\? +[^ :]+:[0-9]+: Info: bfmlal za\.s\[w8, 0:1\], {z0\.h-z1\.h}, z0\.h +[^ :]+:[0-9]+: Error: operand mismatch -- `bfmlal za\.h\[w8,0:1\],{z0\.h-z1\.h},z0\.h' +[^ :]+:[0-9]+: Info: did you mean this\? +[^ :]+:[0-9]+: Info: bfmlal za\.s\[w8, 0:1\], {z0\.h-z1\.h}, z0\.h +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w7,0:1\],{z0\.h-z3\.h},z0\.h' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w12,0:1\],{z0\.h-z3\.h},z0\.h' +[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `bfmlal za\.s\[w8,0\],{z0\.h-z3\.h},z0\.h' +[^ :]+:[0-9]+: Error: the last offset is equal to the first offset at operand 1 -- `bfmlal za\.s\[w8,0:0\],{z0\.h-z3\.h},z0\.h' +[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `bfmlal za\.s\[w8,0:2\],{z0\.h-z3\.h},z0\.h' +[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 1 -- `bfmlal za\.s\[w8,1:2\],{z0\.h-z3\.h},z0\.h' +[^ :]+:[0-9]+: Error: the last offset is less than the first offset at operand 1 -- `bfmlal za\.s\[w8,1:0\],{z0\.h-z3\.h},z0\.h' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,-2:-1\],{z0\.h-z3\.h},z0\.h' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,8:9\],{z0\.h-z3\.h},z0\.h' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,16:17\],{z0\.h-z3\.h},z0\.h' +[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `bfmlal za\.s\[w8,0:1,vgx2\],{z0\.h-z3\.h},z0\.h' +[^ :]+:[0-9]+: Error: the register list must have a stride of 1 at operand 2 -- `bfmlal za\.s\[w8,0:1\],{z1\.h,z3\.h,z5\.h,z7\.h},z0\.h' +[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `bfmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z16\.h' +[^ :]+:[0-9]+: Error: operand mismatch -- `bfmlal za\.s\[w8,0:1\],{z0\.s-z3\.s},z0\.s' +[^ :]+:[0-9]+: Info: did you mean this\? +[^ :]+:[0-9]+: Info: bfmlal za\.s\[w8, 0:1\], {z0\.h-z3\.h}, z0\.h +[^ :]+:[0-9]+: Error: operand mismatch -- `bfmlal za\.h\[w8,0:1\],{z0\.h-z3\.h},z0\.h' +[^ :]+:[0-9]+: Info: did you mean this\? +[^ :]+:[0-9]+: Info: bfmlal za\.s\[w8, 0:1\], {z0\.h-z3\.h}, z0\.h +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w7,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w12,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,-2:-1\],{z0\.h-z1\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 1 -- `bfmlal za\.s\[w8,1:2\],{z0\.h-z1\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,8:9\],{z0\.h-z1\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `bfmlal za\.s\[w8,0:1\],{z1\.h-z2\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `bfmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},{z15\.h-z16\.h}' +[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `bfmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},{z31\.h,z0\.h}' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w7,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w12,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,-2:-1\],{z0\.h-z3\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 1 -- `bfmlal za\.s\[w8,1:2\],{z0\.h-z3\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,8:9\],{z0\.h-z3\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `bfmlal za\.s\[w8,0:1\],{z1\.h-z4\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `bfmlal za\.s\[w8,0:1\],{z2\.h-z5\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `bfmlal za\.s\[w8,0:1\],{z3\.h-z6\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `bfmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},{z15\.h-z18\.h}' +[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `bfmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},{z29\.h,z30\.h,z31\.h,z0\.h}' +[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `bfmlal za\.s\[w8,0:1\],{z0\.h-z2\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `bfmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `bfmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},{z0\.h-z2\.h}' +[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `bfmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 3 -- `bfmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},{z0\.h-z4\.h}' +[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `bfmlal za\.s\[w8,0:1,vgx4\],{z0\.h-z1\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `bfmlal za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `bfmlal za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `bfmlal za\.s\[w8,0:1,vgx2\],{z0\.h-z3\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: operand mismatch -- `bfmlal za\[w8,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Info: did you mean this\? +[^ :]+:[0-9]+: Info: bfmlal za\.s\[w8, 0:1\], {z0\.h-z1\.h}, {z0\.h-z1\.h} +[^ :]+:[0-9]+: Error: operand mismatch -- `bfmlal za\[w8,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Info: did you mean this\? +[^ :]+:[0-9]+: Info: bfmlal za\.s\[w8, 0:1\], {z0\.h-z3\.h}, {z0\.h-z3\.h} diff --git a/gas/testsuite/gas/aarch64/sme2-12-invalid.s b/gas/testsuite/gas/aarch64/sme2-12-invalid.s new file mode 100644 index 0000000..1d158ed --- /dev/null +++ b/gas/testsuite/gas/aarch64/sme2-12-invalid.s @@ -0,0 +1,136 @@ + bfmlal 0, z0.h, z0.h[0] + bfmlal za.s[w8, 0:1], 0, z0.h[0] + bfmlal za.s[w8, 0:1], z0.h, 0 + + bfmlal za.s[w7, 0:1], z0.h, z0.h[0] + bfmlal za.s[w12, 0:1], z0.h, z0.h[0] + bfmlal za.s[w8, 0], z0.h, z0.h[0] + bfmlal za.s[w8, 0:0], z0.h, z0.h[0] + bfmlal za.s[w8, 0:2], z0.h, z0.h[0] + bfmlal za.s[w8, 1:2], z0.h, z0.h[0] + bfmlal za.s[w8, 1:0], z0.h, z0.h[0] + bfmlal za.s[w8, -2:-1], z0.h, z0.h[0] + bfmlal za.s[w8, 16:17], z0.h, z0.h[0] + bfmlal za.s[w8, 0:1, vgx2], z0.h, z0.h[0] + bfmlal za.s[w8, 0:1], z0.h, z16.h[0] + bfmlal za.s[w8, 0:1], z0.h, z0.h[-1] + bfmlal za.s[w8, 0:1], z0.h, z0.h[8] + bfmlal za.s[w8, 0:1], z0.s, z0.s[0] + bfmlal za.h[w8, 0:1], z0.h, z0.h[0] + + bfmlal za.s[w7, 0:1], { z0.h - z1.h }, z0.h[0] + bfmlal za.s[w12, 0:1], { z0.h - z1.h }, z0.h[0] + bfmlal za.s[w8, 0], { z0.h - z1.h }, z0.h[0] + bfmlal za.s[w8, 0:0], { z0.h - z1.h }, z0.h[0] + bfmlal za.s[w8, 0:2], { z0.h - z1.h }, z0.h[0] + bfmlal za.s[w8, 1:2], { z0.h - z1.h }, z0.h[0] + bfmlal za.s[w8, 1:0], { z0.h - z1.h }, z0.h[0] + bfmlal za.s[w8, -2:-1], { z0.h - z1.h }, z0.h[0] + bfmlal za.s[w8, 8:9], { z0.h - z1.h }, z0.h[0] + bfmlal za.s[w8, 16:17], { z0.h - z1.h }, z0.h[0] + bfmlal za.s[w8, 0:1, vgx4], { z0.h - z1.h }, z0.h[0] + bfmlal za.s[w8, 0:1], { z1.h - z2.h }, z0.h[0] + bfmlal za.s[w8, 0:1], { z1.h, z3.h }, z0.h[0] + bfmlal za.s[w8, 0:1], { z0.h - z1.h }, z16.h[0] + bfmlal za.s[w8, 0:1], { z0.h - z1.h }, z0.h[-1] + bfmlal za.s[w8, 0:1], { z0.h - z1.h }, z0.h[8] + bfmlal za.s[w8, 0:1], { z0.s - z1.s }, z0.s[0] + bfmlal za.h[w8, 0:1], { z0.h - z1.h }, z0.h[0] + + bfmlal za.s[w7, 0:1], { z0.h - z3.h }, z0.h[0] + bfmlal za.s[w12, 0:1], { z0.h - z3.h }, z0.h[0] + bfmlal za.s[w8, 0], { z0.h - z3.h }, z0.h[0] + bfmlal za.s[w8, 0:0], { z0.h - z3.h }, z0.h[0] + bfmlal za.s[w8, 0:2], { z0.h - z3.h }, z0.h[0] + bfmlal za.s[w8, 1:2], { z0.h - z3.h }, z0.h[0] + bfmlal za.s[w8, 1:0], { z0.h - z3.h }, z0.h[0] + bfmlal za.s[w8, -2:-1], { z0.h - z3.h }, z0.h[0] + bfmlal za.s[w8, 8:9], { z0.h - z3.h }, z0.h[0] + bfmlal za.s[w8, 16:17], { z0.h - z3.h }, z0.h[0] + bfmlal za.s[w8, 0:1, vgx2], { z0.h - z3.h }, z0.h[0] + bfmlal za.s[w8, 0:1], { z1.h - z4.h }, z0.h[0] + bfmlal za.s[w8, 0:1], { z1.h, z3.h, z5.h, z7.h }, z0.h[0] + bfmlal za.s[w8, 0:1], { z0.h - z3.h }, z16.h[0] + bfmlal za.s[w8, 0:1], { z0.h - z3.h }, z0.h[-1] + bfmlal za.s[w8, 0:1], { z0.h - z3.h }, z0.h[8] + bfmlal za.s[w8, 0:1], { z0.s - z3.s }, z0.s[0] + bfmlal za.h[w8, 0:1], { z0.h - z3.h }, z0.h[0] + + bfmlal za.s[w7, 0:1], z0.h, z0.h + bfmlal za.s[w12, 0:1], z0.h, z0.h + bfmlal za.s[w8, 0], z0.h, z0.h + bfmlal za.s[w8, 0:0], z0.h, z0.h + bfmlal za.s[w8, 0:2], z0.h, z0.h + bfmlal za.s[w8, 1:2], z0.h, z0.h + bfmlal za.s[w8, 1:0], z0.h, z0.h + bfmlal za.s[w8, -2:-1], z0.h, z0.h + bfmlal za.s[w8, 16:17], z0.h, z0.h + bfmlal za.s[w8, 0:1, vgx2], z0.h, z0.h + bfmlal za.s[w8, 0:1], z0.h, z16.h + bfmlal za.s[w8, 0:1], z0.s, z0.s + bfmlal za.h[w8, 0:1], z0.h, z0.h + + bfmlal za.s[w7, 0:1], { z0.h - z1.h }, z0.h + bfmlal za.s[w12, 0:1], { z0.h - z1.h }, z0.h + bfmlal za.s[w8, 0], { z0.h - z1.h }, z0.h + bfmlal za.s[w8, 0:0], { z0.h - z1.h }, z0.h + bfmlal za.s[w8, 0:2], { z0.h - z1.h }, z0.h + bfmlal za.s[w8, 1:2], { z0.h - z1.h }, z0.h + bfmlal za.s[w8, 1:0], { z0.h - z1.h }, z0.h + bfmlal za.s[w8, -2:-1], { z0.h - z1.h }, z0.h + bfmlal za.s[w8, 8:9], { z0.h - z1.h }, z0.h + bfmlal za.s[w8, 16:17], { z0.h - z1.h }, z0.h + bfmlal za.s[w8, 0:1, vgx4], { z0.h - z1.h }, z0.h + bfmlal za.s[w8, 0:1], { z1.h, z3.h }, z0.h + bfmlal za.s[w8, 0:1], { z0.h - z1.h }, z16.h + bfmlal za.s[w8, 0:1], { z0.s - z1.s }, z0.s + bfmlal za.h[w8, 0:1], { z0.h - z1.h }, z0.h + + bfmlal za.s[w7, 0:1], { z0.h - z3.h }, z0.h + bfmlal za.s[w12, 0:1], { z0.h - z3.h }, z0.h + bfmlal za.s[w8, 0], { z0.h - z3.h }, z0.h + bfmlal za.s[w8, 0:0], { z0.h - z3.h }, z0.h + bfmlal za.s[w8, 0:2], { z0.h - z3.h }, z0.h + bfmlal za.s[w8, 1:2], { z0.h - z3.h }, z0.h + bfmlal za.s[w8, 1:0], { z0.h - z3.h }, z0.h + bfmlal za.s[w8, -2:-1], { z0.h - z3.h }, z0.h + bfmlal za.s[w8, 8:9], { z0.h - z3.h }, z0.h + bfmlal za.s[w8, 16:17], { z0.h - z3.h }, z0.h + bfmlal za.s[w8, 0:1, vgx2], { z0.h - z3.h }, z0.h + bfmlal za.s[w8, 0:1], { z1.h, z3.h, z5.h, z7.h }, z0.h + bfmlal za.s[w8, 0:1], { z0.h - z3.h }, z16.h + bfmlal za.s[w8, 0:1], { z0.s - z3.s }, z0.s + bfmlal za.h[w8, 0:1], { z0.h - z3.h }, z0.h + + bfmlal za.s[w7, 0:1], { z0.h - z1.h }, { z0.h - z1.h } + bfmlal za.s[w12, 0:1], { z0.h - z1.h }, { z0.h - z1.h } + bfmlal za.s[w8, -2:-1], { z0.h - z1.h }, { z0.h - z1.h } + bfmlal za.s[w8, 1:2], { z0.h - z1.h }, { z0.h - z1.h } + bfmlal za.s[w8, 8:9], { z0.h - z1.h }, { z0.h - z1.h } + bfmlal za.s[w8, 0:1], { z1.h - z2.h }, { z0.h - z1.h } + bfmlal za.s[w8, 0:1], { z0.h - z1.h }, { z15.h - z16.h } + bfmlal za.s[w8, 0:1], { z0.h - z1.h }, { z31.h, z0.h } + + bfmlal za.s[w7, 0:1], { z0.h - z3.h }, { z0.h - z3.h } + bfmlal za.s[w12, 0:1], { z0.h - z3.h }, { z0.h - z3.h } + bfmlal za.s[w8, -2:-1], { z0.h - z3.h }, { z0.h - z3.h } + bfmlal za.s[w8, 1:2], { z0.h - z3.h }, { z0.h - z3.h } + bfmlal za.s[w8, 8:9], { z0.h - z3.h }, { z0.h - z3.h } + bfmlal za.s[w8, 0:1], { z1.h - z4.h }, { z0.h - z3.h } + bfmlal za.s[w8, 0:1], { z2.h - z5.h }, { z0.h - z3.h } + bfmlal za.s[w8, 0:1], { z3.h - z6.h }, { z0.h - z3.h } + bfmlal za.s[w8, 0:1], { z0.h - z3.h }, { z15.h - z18.h } + bfmlal za.s[w8, 0:1], { z0.h - z3.h }, { z29.h, z30.h, z31.h, z0.h } + + bfmlal za.s[w8, 0:1], { z0.h - z2.h }, { z0.h - z1.h } + bfmlal za.s[w8, 0:1], { z0.h - z3.h }, { z0.h - z1.h } + bfmlal za.s[w8, 0:1], { z0.h - z1.h }, { z0.h - z2.h } + bfmlal za.s[w8, 0:1], { z0.h - z1.h }, { z0.h - z3.h } + bfmlal za.s[w8, 0:1], { z0.h - z1.h }, { z0.h - z4.h } + + bfmlal za.s[w8, 0:1, vgx4], { z0.h - z1.h }, { z0.h - z3.h } + bfmlal za.s[w8, 0:1, vgx4], { z0.h - z3.h }, { z0.h - z1.h } + bfmlal za.s[w8, 0:1, vgx2], { z0.h - z1.h }, { z0.h - z3.h } + bfmlal za.s[w8, 0:1, vgx2], { z0.h - z3.h }, { z0.h - z1.h } + bfmlal za[w8, 0:1], { z0.h - z1.h }, { z0.h - z1.h } + bfmlal za[w8, 0:1], { z0.h - z3.h }, { z0.h - z3.h } diff --git a/gas/testsuite/gas/aarch64/sme2-12-noarch.d b/gas/testsuite/gas/aarch64/sme2-12-noarch.d new file mode 100644 index 0000000..ecaeede --- /dev/null +++ b/gas/testsuite/gas/aarch64/sme2-12-noarch.d @@ -0,0 +1,3 @@ +#as: -march=armv8-a+sme +#source: sme2-12.s +#error_output: sme2-12-noarch.l diff --git a/gas/testsuite/gas/aarch64/sme2-12-noarch.l b/gas/testsuite/gas/aarch64/sme2-12-noarch.l new file mode 100644 index 0000000..7544d1e --- /dev/null +++ b/gas/testsuite/gas/aarch64/sme2-12-noarch.l @@ -0,0 +1,571 @@ +[^ :]+: Assembler messages: +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],z0\.h,z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.s\[W8,0:1\],Z0\.h,Z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.S\[W8,0:1\],Z0\.H,Z0\.H\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w11,0:1\],z0\.h,z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,14:15\],z0\.h,z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],z31\.h,z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],z0\.h,z15\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],z0\.h,z0\.h\[7\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w9,10:11\],z21\.h,z9\.h\[2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.s\[W8,0:1,VGx2\],{Z0\.h-Z1\.h},Z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.S\[W8,0:1,VGX2\],{Z0\.H-Z1\.H},Z0\.H\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w11,0:1\],{z0\.h-z1\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,6:7\],{z0\.h-z1\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z30\.h-z31\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z15\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[7\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w9,4:5\],{z18\.h-z19\.h},z9\.h\[3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.s\[W8,0:1,VGx4\],{Z0\.h-Z3\.h},Z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.S\[W8,0:1,VGX4\],{Z0\.H-Z3\.H},Z0\.H\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w11,0:1\],{z0\.h-z3\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,6:7\],{z0\.h-z3\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z28\.h-z31\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z15\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[7\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w9,4:5\],{z24\.h-z27\.h},z14\.h\[5\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],z0\.h,z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.s\[W8,0:1\],Z0\.h,Z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.S\[W8,0:1\],Z0\.H,Z0\.H' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w11,0:1\],z0\.h,z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,14:15\],z0\.h,z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],z31\.h,z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],z0\.h,z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w10,2:3\],z25\.h,z7\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.s\[W8,0:1,VGx2\],{Z0\.h-Z1\.h},Z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.S\[W8,0:1,VGX2\],{Z0\.H-Z1\.H},Z0\.H' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w11,0:1\],{z0\.h-z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,6:7\],{z0\.h-z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z1\.h-z2\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z30\.h-z31\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z31\.h,z0\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z31\.h-z0\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w9,4:5\],{z18\.h-z19\.h},z13\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.s\[W8,0:1,VGx4\],{Z0\.h-Z3\.h},Z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.S\[W8,0:1,VGX4\],{Z0\.H-Z3\.H},Z0\.H' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w11,0:1\],{z0\.h-z3\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,6:7\],{z0\.h-z3\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w11,0:1\],{z1\.h-z4\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z28\.h-z31\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z29\.h,z30\.h,z31\.h,z0\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z29\.h-z0\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z30\.h,z31\.h,z0\.h,z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z30\.h-z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z31\.h,z0\.h,z1\.h,z2\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z31\.h-z2\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w9,4:5\],{z24\.h-z27\.h},z14\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.s\[W8,0:1,VGx2\],{Z0\.h-Z1\.h},{Z0\.h-Z1\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.S\[W8,0:1,VGX2\],{Z0\.H-Z1\.H},{Z0\.H-Z1\.H}' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w11,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,6:7\],{z0\.h-z1\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z30\.h-z31\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},{z30\.h-z31\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w10,2:3\],{z22\.h-z23\.h},{z18\.h-z19\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.s\[W8,0:1,VGx4\],{Z0\.h-Z3\.h},{Z0\.h-Z3\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.S\[W8,0:1,VGX4\],{Z0\.H-Z3\.H},{Z0\.H-Z3\.H}' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w11,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,6:7\],{z0\.h-z3\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z28\.h-z31\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},{z28\.h-z31\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w11,4:5\],{z16\.h-z19\.h},{z24\.h-z27\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],z0\.h,z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.s\[W8,0:1\],Z0\.h,Z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.S\[W8,0:1\],Z0\.H,Z0\.H\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w11,0:1\],z0\.h,z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,14:15\],z0\.h,z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],z31\.h,z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],z0\.h,z15\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],z0\.h,z0\.h\[7\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w9,10:11\],z21\.h,z9\.h\[2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.s\[W8,0:1,VGx2\],{Z0\.h-Z1\.h},Z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.S\[W8,0:1,VGX2\],{Z0\.H-Z1\.H},Z0\.H\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w11,0:1\],{z0\.h-z1\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,6:7\],{z0\.h-z1\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z30\.h-z31\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z15\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[7\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w9,4:5\],{z18\.h-z19\.h},z9\.h\[3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.s\[W8,0:1,VGx4\],{Z0\.h-Z3\.h},Z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.S\[W8,0:1,VGX4\],{Z0\.H-Z3\.H},Z0\.H\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w11,0:1\],{z0\.h-z3\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,6:7\],{z0\.h-z3\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z28\.h-z31\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z15\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[7\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w9,4:5\],{z24\.h-z27\.h},z14\.h\[5\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],z0\.h,z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.s\[W8,0:1\],Z0\.h,Z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.S\[W8,0:1\],Z0\.H,Z0\.H' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w11,0:1\],z0\.h,z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,14:15\],z0\.h,z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],z31\.h,z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],z0\.h,z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w10,2:3\],z25\.h,z7\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.s\[W8,0:1,VGx2\],{Z0\.h-Z1\.h},Z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.S\[W8,0:1,VGX2\],{Z0\.H-Z1\.H},Z0\.H' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w11,0:1\],{z0\.h-z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,6:7\],{z0\.h-z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z30\.h-z31\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w9,4:5\],{z18\.h-z19\.h},z13\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.s\[W8,0:1,VGx4\],{Z0\.h-Z3\.h},Z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.S\[W8,0:1,VGX4\],{Z0\.H-Z3\.H},Z0\.H' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w11,0:1\],{z0\.h-z3\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,6:7\],{z0\.h-z3\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z28\.h-z31\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w9,4:5\],{z24\.h-z27\.h},z14\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.s\[W8,0:1,VGx2\],{Z0\.h-Z1\.h},{Z0\.h-Z1\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.S\[W8,0:1,VGX2\],{Z0\.H-Z1\.H},{Z0\.H-Z1\.H}' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w11,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,6:7\],{z0\.h-z1\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z30\.h-z31\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},{z30\.h-z31\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w10,2:3\],{z22\.h-z23\.h},{z18\.h-z19\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.s\[W8,0:1,VGx4\],{Z0\.h-Z3\.h},{Z0\.h-Z3\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.S\[W8,0:1,VGX4\],{Z0\.H-Z3\.H},{Z0\.H-Z3\.H}' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w11,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,6:7\],{z0\.h-z3\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z28\.h-z31\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},{z28\.h-z31\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w11,4:5\],{z16\.h-z19\.h},{z24\.h-z27\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],z0\.h,z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.s\[W8,0:1\],Z0\.h,Z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.S\[W8,0:1\],Z0\.H,Z0\.H\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w11,0:1\],z0\.h,z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,14:15\],z0\.h,z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],z31\.h,z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],z0\.h,z15\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],z0\.h,z0\.h\[7\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w9,10:11\],z21\.h,z9\.h\[2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.s\[W8,0:1,VGx2\],{Z0\.h-Z1\.h},Z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.S\[W8,0:1,VGX2\],{Z0\.H-Z1\.H},Z0\.H\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w11,0:1\],{z0\.h-z1\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,6:7\],{z0\.h-z1\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z30\.h-z31\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z15\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[7\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w9,4:5\],{z18\.h-z19\.h},z9\.h\[3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.s\[W8,0:1,VGx4\],{Z0\.h-Z3\.h},Z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.S\[W8,0:1,VGX4\],{Z0\.H-Z3\.H},Z0\.H\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w11,0:1\],{z0\.h-z3\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,6:7\],{z0\.h-z3\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z28\.h-z31\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z15\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[7\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w9,4:5\],{z24\.h-z27\.h},z14\.h\[5\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],z0\.h,z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.s\[W8,0:1\],Z0\.h,Z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.S\[W8,0:1\],Z0\.H,Z0\.H' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w11,0:1\],z0\.h,z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,14:15\],z0\.h,z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],z31\.h,z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],z0\.h,z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w10,2:3\],z25\.h,z7\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.s\[W8,0:1,VGx2\],{Z0\.h-Z1\.h},Z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.S\[W8,0:1,VGX2\],{Z0\.H-Z1\.H},Z0\.H' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w11,0:1\],{z0\.h-z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,6:7\],{z0\.h-z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z30\.h-z31\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z31\.h,z0\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z31\.h-z0\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w9,4:5\],{z19\.h-z20\.h},z13\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.s\[W8,0:1,VGx4\],{Z0\.h-Z3\.h},Z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.S\[W8,0:1,VGX4\],{Z0\.H-Z3\.H},Z0\.H' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w11,0:1\],{z0\.h-z3\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,6:7\],{z0\.h-z3\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z28\.h-z31\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z29\.h-z0\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z30\.h,z31\.h,z0\.h,z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z30\.h-z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z31\.h-z2\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w9,4:5\],{z25\.h-z28\.h},z14\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.s\[W8,0:1,VGx2\],{Z0\.h-Z1\.h},{Z0\.h-Z1\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.S\[W8,0:1,VGX2\],{Z0\.H-Z1\.H},{Z0\.H-Z1\.H}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w11,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,6:7\],{z0\.h-z1\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z30\.h-z31\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},{z30\.h-z31\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w10,2:3\],{z22\.h-z23\.h},{z18\.h-z19\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.s\[W8,0:1,VGx4\],{Z0\.h-Z3\.h},{Z0\.h-Z3\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.S\[W8,0:1,VGX4\],{Z0\.H-Z3\.H},{Z0\.H-Z3\.H}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w11,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,6:7\],{z0\.h-z3\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z28\.h-z31\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},{z28\.h-z31\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w11,4:5\],{z16\.h-z19\.h},{z24\.h-z27\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],z0\.h,z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.s\[W8,0:1\],Z0\.h,Z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.S\[W8,0:1\],Z0\.H,Z0\.H\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w11,0:1\],z0\.h,z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,14:15\],z0\.h,z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],z31\.h,z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],z0\.h,z15\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],z0\.h,z0\.h\[7\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w9,10:11\],z21\.h,z9\.h\[2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.s\[W8,0:1,VGx2\],{Z0\.h-Z1\.h},Z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.S\[W8,0:1,VGX2\],{Z0\.H-Z1\.H},Z0\.H\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w11,0:1\],{z0\.h-z1\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,6:7\],{z0\.h-z1\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z30\.h-z31\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z15\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[7\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w9,4:5\],{z18\.h-z19\.h},z9\.h\[3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.s\[W8,0:1,VGx4\],{Z0\.h-Z3\.h},Z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.S\[W8,0:1,VGX4\],{Z0\.H-Z3\.H},Z0\.H\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w11,0:1\],{z0\.h-z3\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,6:7\],{z0\.h-z3\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z28\.h-z31\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z15\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[7\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w9,4:5\],{z24\.h-z27\.h},z14\.h\[5\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],z0\.h,z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.s\[W8,0:1\],Z0\.h,Z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.S\[W8,0:1\],Z0\.H,Z0\.H' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w11,0:1\],z0\.h,z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,14:15\],z0\.h,z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],z31\.h,z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],z0\.h,z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w10,2:3\],z25\.h,z7\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.s\[W8,0:1,VGx2\],{Z0\.h-Z1\.h},Z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.S\[W8,0:1,VGX2\],{Z0\.H-Z1\.H},Z0\.H' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w11,0:1\],{z0\.h-z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,6:7\],{z0\.h-z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z30\.h-z31\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z31\.h,z0\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z31\.h-z0\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w9,4:5\],{z19\.h-z20\.h},z13\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.s\[W8,0:1,VGx4\],{Z0\.h-Z3\.h},Z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.S\[W8,0:1,VGX4\],{Z0\.H-Z3\.H},Z0\.H' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w11,0:1\],{z0\.h-z3\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,6:7\],{z0\.h-z3\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z28\.h-z31\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z29\.h-z0\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z30\.h,z31\.h,z0\.h,z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z30\.h-z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z31\.h-z2\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w9,4:5\],{z25\.h-z28\.h},z14\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.s\[W8,0:1,VGx2\],{Z0\.h-Z1\.h},{Z0\.h-Z1\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.S\[W8,0:1,VGX2\],{Z0\.H-Z1\.H},{Z0\.H-Z1\.H}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w11,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,6:7\],{z0\.h-z1\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z30\.h-z31\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},{z30\.h-z31\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w10,2:3\],{z22\.h-z23\.h},{z18\.h-z19\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.s\[W8,0:1,VGx4\],{Z0\.h-Z3\.h},{Z0\.h-Z3\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.S\[W8,0:1,VGX4\],{Z0\.H-Z3\.H},{Z0\.H-Z3\.H}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w11,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,6:7\],{z0\.h-z3\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z28\.h-z31\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},{z28\.h-z31\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w11,4:5\],{z16\.h-z19\.h},{z24\.h-z27\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],z0\.h,z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w11,0:1\],z0\.h,z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,14:15\],z0\.h,z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],z31\.h,z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],z0\.h,z15\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],z0\.h,z0\.h\[7\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w9,10:11\],z21\.h,z9\.h\[2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w11,0:1\],{z0\.h-z1\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,6:7\],{z0\.h-z1\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z30\.h-z31\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z15\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[7\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w9,4:5\],{z18\.h-z19\.h},z9\.h\[3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w11,0:1\],{z0\.h-z3\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,6:7\],{z0\.h-z3\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z28\.h-z31\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z15\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[7\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w9,4:5\],{z24\.h-z27\.h},z14\.h\[5\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],z0\.h,z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w11,0:1\],z0\.h,z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,14:15\],z0\.h,z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],z31\.h,z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],z0\.h,z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w10,2:3\],z25\.h,z7\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w11,0:1\],{z0\.h-z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,6:7\],{z0\.h-z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z30\.h-z31\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z31\.h,z0\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z31\.h-z0\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w9,4:5\],{z19\.h-z20\.h},z13\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w11,0:1\],{z0\.h-z3\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,6:7\],{z0\.h-z3\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z28\.h-z31\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z29\.h-z0\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z30\.h,z31\.h,z0\.h,z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z30\.h-z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z31\.h,z0\.h,z1\.h,z2\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z31\.h-z2\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w9,4:5\],{z25\.h-z28\.h},z14\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w11,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,6:7\],{z0\.h-z1\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z30\.h-z31\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z0\.h-z1\.h},{z30\.h-z31\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w10,2:3\],{z22\.h-z23\.h},{z18\.h-z19\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w11,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,6:7\],{z0\.h-z3\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z28\.h-z31\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z0\.h-z3\.h},{z28\.h-z31\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w11,4:5\],{z16\.h-z19\.h},{z24\.h-z27\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],z0\.h,z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w11,0:1\],z0\.h,z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,14:15\],z0\.h,z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],z31\.h,z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],z0\.h,z15\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],z0\.h,z0\.h\[7\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w9,10:11\],z21\.h,z9\.h\[2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w11,0:1\],{z0\.h-z1\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,6:7\],{z0\.h-z1\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z30\.h-z31\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z15\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[7\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w9,4:5\],{z18\.h-z19\.h},z9\.h\[3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w11,0:1\],{z0\.h-z3\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,6:7\],{z0\.h-z3\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z28\.h-z31\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z15\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[7\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w9,4:5\],{z24\.h-z27\.h},z14\.h\[5\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],z0\.h,z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w11,0:1\],z0\.h,z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,14:15\],z0\.h,z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],z31\.h,z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],z0\.h,z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w10,2:3\],z25\.h,z7\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w11,0:1\],{z0\.h-z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,6:7\],{z0\.h-z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z30\.h-z31\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z31\.h,z0\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z31\.h-z0\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w9,4:5\],{z19\.h-z20\.h},z13\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w11,0:1\],{z0\.h-z3\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,6:7\],{z0\.h-z3\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z28\.h-z31\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z29\.h-z0\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z30\.h,z31\.h,z0\.h,z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z30\.h-z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z31\.h,z0\.h,z1\.h,z2\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z31\.h-z2\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w9,4:5\],{z25\.h-z28\.h},z14\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w11,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,6:7\],{z0\.h-z1\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z30\.h-z31\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},{z30\.h-z31\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w10,2:3\],{z22\.h-z23\.h},{z18\.h-z19\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w11,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,6:7\],{z0\.h-z3\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z28\.h-z31\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},{z28\.h-z31\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w11,4:5\],{z16\.h-z19\.h},{z24\.h-z27\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],z0\.h,z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w11,0:1\],z0\.h,z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,14:15\],z0\.h,z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],z31\.h,z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],z0\.h,z15\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],z0\.h,z0\.h\[7\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w9,10:11\],z21\.h,z9\.h\[2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w11,0:1\],{z0\.h-z1\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,6:7\],{z0\.h-z1\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z30\.h-z31\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z15\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[7\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w9,4:5\],{z18\.h-z19\.h},z9\.h\[3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w11,0:1\],{z0\.h-z3\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,6:7\],{z0\.h-z3\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z28\.h-z31\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z15\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[7\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w9,4:5\],{z24\.h-z27\.h},z14\.h\[5\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],z0\.h,z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w11,0:1\],z0\.h,z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,14:15\],z0\.h,z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],z31\.h,z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],z0\.h,z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w10,2:3\],z25\.h,z7\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w11,0:1\],{z0\.h-z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,6:7\],{z0\.h-z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z30\.h-z31\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z31\.h,z0\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z31\.h-z0\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w9,4:5\],{z19\.h-z20\.h},z13\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w11,0:1\],{z0\.h-z3\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,6:7\],{z0\.h-z3\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z28\.h-z31\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z29\.h-z0\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z30\.h,z31\.h,z0\.h,z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z30\.h-z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z31\.h,z0\.h,z1\.h,z2\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z31\.h-z2\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w9,4:5\],{z25\.h-z28\.h},z14\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w11,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,6:7\],{z0\.h-z1\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z30\.h-z31\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z0\.h-z1\.h},{z30\.h-z31\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w10,2:3\],{z22\.h-z23\.h},{z18\.h-z19\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w11,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,6:7\],{z0\.h-z3\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z28\.h-z31\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z0\.h-z3\.h},{z28\.h-z31\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w11,4:5\],{z16\.h-z19\.h},{z24\.h-z27\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],z0\.h,z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w11,0:1\],z0\.h,z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,14:15\],z0\.h,z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],z31\.h,z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],z0\.h,z15\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],z0\.h,z0\.h\[7\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w9,10:11\],z21\.h,z9\.h\[2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w11,0:1\],{z0\.h-z1\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,6:7\],{z0\.h-z1\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z30\.h-z31\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z15\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[7\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w9,4:5\],{z18\.h-z19\.h},z9\.h\[3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w11,0:1\],{z0\.h-z3\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,6:7\],{z0\.h-z3\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z28\.h-z31\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z15\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[7\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w9,4:5\],{z24\.h-z27\.h},z14\.h\[5\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],z0\.h,z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w11,0:1\],z0\.h,z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,14:15\],z0\.h,z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],z31\.h,z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],z0\.h,z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w10,2:3\],z25\.h,z7\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w11,0:1\],{z0\.h-z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,6:7\],{z0\.h-z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z30\.h-z31\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z31\.h,z0\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z31\.h-z0\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w9,4:5\],{z19\.h-z20\.h},z13\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w11,0:1\],{z0\.h-z3\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,6:7\],{z0\.h-z3\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z28\.h-z31\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z29\.h-z0\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z30\.h,z31\.h,z0\.h,z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z30\.h-z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z31\.h,z0\.h,z1\.h,z2\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z31\.h-z2\.h},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w9,4:5\],{z25\.h-z28\.h},z14\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w11,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,6:7\],{z0\.h-z1\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z30\.h-z31\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},{z30\.h-z31\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w10,2:3\],{z22\.h-z23\.h},{z18\.h-z19\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w11,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,6:7\],{z0\.h-z3\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z28\.h-z31\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},{z28\.h-z31\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w11,4:5\],{z16\.h-z19\.h},{z24\.h-z27\.h}' diff --git a/gas/testsuite/gas/aarch64/sme2-12.d b/gas/testsuite/gas/aarch64/sme2-12.d new file mode 100644 index 0000000..958a1bd --- /dev/null +++ b/gas/testsuite/gas/aarch64/sme2-12.d @@ -0,0 +1,579 @@ +#as: -march=armv8-a+sme2 +#objdump: -dr + +[^:]+: file format .* + + +[^:]+: + +[^:]+: +[^:]+: c1801010 bfmlal za\.s\[w8, 0:1\], z0\.h, z0\.h\[0\] +[^:]+: c1801010 bfmlal za\.s\[w8, 0:1\], z0\.h, z0\.h\[0\] +[^:]+: c1801010 bfmlal za\.s\[w8, 0:1\], z0\.h, z0\.h\[0\] +[^:]+: c1807010 bfmlal za\.s\[w11, 0:1\], z0\.h, z0\.h\[0\] +[^:]+: c1801017 bfmlal za\.s\[w8, 14:15\], z0\.h, z0\.h\[0\] +[^:]+: c18013f0 bfmlal za\.s\[w8, 0:1\], z31\.h, z0\.h\[0\] +[^:]+: c18f1010 bfmlal za\.s\[w8, 0:1\], z0\.h, z15\.h\[0\] +[^:]+: c1809c10 bfmlal za\.s\[w8, 0:1\], z0\.h, z0\.h\[7\] +[^:]+: c1893ab5 bfmlal za\.s\[w9, 10:11\], z21\.h, z9\.h\[2\] +[^:]+: c1901010 bfmlal za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\] +[^:]+: c1901010 bfmlal za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\] +[^:]+: c1901010 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{z0\.h-z3\.h}, {z0\.h-z3\.h} +[^:]+: c1e10b98 umlsl za\.s\[w8, 0:1, vgx4\], {z28\.h-z31\.h}, {z0\.h-z3\.h} +[^:]+: c1fd0818 umlsl za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, {z28\.h-z31\.h} +[^:]+: c1f96a1a umlsl za\.s\[w11, 4:5, vgx4\], {z16\.h-z19\.h}, {z24\.h-z27\.h} diff --git a/gas/testsuite/gas/aarch64/sme2-12.s b/gas/testsuite/gas/aarch64/sme2-12.s new file mode 100644 index 0000000..5210e40 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sme2-12.s @@ -0,0 +1,633 @@ + bfmlal za.s[w8, 0:1], z0.h, z0.h[0] + BFMLAL ZA.s[W8, 0:1], Z0.h, Z0.h[0] + BFMLAL ZA.S[W8, 0:1], Z0.H, Z0.H[0] + bfmlal za.s[w11, 0:1], z0.h, z0.h[0] + bfmlal za.s[w8, 14:15], z0.h, z0.h[0] + bfmlal za.s[w8, 0:1], z31.h, z0.h[0] + bfmlal za.s[w8, 0:1], z0.h, z15.h[0] + bfmlal za.s[w8, 0:1], z0.h, z0.h[7] + bfmlal za.s[w9, 10:11], z21.h, z9.h[2] + + bfmlal za.s[w8, 0:1], { z0.h - z1.h }, z0.h[0] + bfmlal za.s[w8, 0:1, vgx2], { z0.h - z1.h }, z0.h[0] + BFMLAL ZA.s[W8, 0:1, VGx2], { Z0.h - Z1.h }, Z0.h[0] + BFMLAL ZA.S[W8, 0:1, VGX2], { Z0.H - Z1.H }, Z0.H[0] + bfmlal za.s[w11, 0:1], { z0.h - z1.h }, z0.h[0] + bfmlal za.s[w8, 6:7], { z0.h - z1.h }, z0.h[0] + bfmlal za.s[w8, 0:1], { z30.h - z31.h }, z0.h[0] + bfmlal za.s[w8, 0:1], { z0.h - z1.h }, z15.h[0] + bfmlal za.s[w8, 0:1], { z0.h - z1.h }, z0.h[7] + bfmlal za.s[w9, 4:5], { z18.h - z19.h }, z9.h[3] + + bfmlal za.s[w8, 0:1], { z0.h - z3.h }, z0.h[0] + bfmlal za.s[w8, 0:1, vgx4], { z0.h - z3.h }, z0.h[0] + BFMLAL ZA.s[W8, 0:1, VGx4], { Z0.h - Z3.h }, Z0.h[0] + BFMLAL ZA.S[W8, 0:1, VGX4], { Z0.H - Z3.H }, Z0.H[0] + bfmlal za.s[w11, 0:1], { z0.h - z3.h }, z0.h[0] + bfmlal za.s[w8, 6:7], { z0.h - z3.h }, z0.h[0] + bfmlal za.s[w8, 0:1], { z28.h - z31.h }, z0.h[0] + bfmlal za.s[w8, 0:1], { z0.h - z3.h }, z15.h[0] + bfmlal za.s[w8, 0:1], { z0.h - z3.h }, z0.h[7] + bfmlal za.s[w9, 4:5], { z24.h - z27.h }, z14.h[5] + + bfmlal za.s[w8, 0:1], z0.h, z0.h + BFMLAL ZA.s[W8, 0:1], Z0.h, Z0.h + BFMLAL ZA.S[W8, 0:1], Z0.H, Z0.H + bfmlal za.s[w11, 0:1], z0.h, z0.h + bfmlal za.s[w8, 14:15], z0.h, z0.h + bfmlal za.s[w8, 0:1], z31.h, z0.h + bfmlal za.s[w8, 0:1], z0.h, z15.h + bfmlal za.s[w10, 2:3], z25.h, z7.h + + bfmlal za.s[w8, 0:1], { z0.h - z1.h }, z0.h + bfmlal za.s[w8, 0:1, vgx2], { z0.h - z1.h }, z0.h + BFMLAL ZA.s[W8, 0:1, VGx2], { Z0.h - Z1.h }, Z0.h + BFMLAL ZA.S[W8, 0:1, VGX2], { Z0.H - Z1.H }, Z0.H + bfmlal za.s[w11, 0:1], { z0.h - z1.h }, z0.h + bfmlal za.s[w8, 6:7], { z0.h - z1.h }, z0.h + bfmlal za.s[w8, 0:1], { z1.h - z2.h }, z0.h + bfmlal za.s[w8, 0:1], { z30.h - z31.h }, z0.h + bfmlal za.s[w8, 0:1], { z31.h, z0.h }, z0.h + bfmlal za.s[w8, 0:1], { z31.h - z0.h }, z0.h + bfmlal za.s[w8, 0:1], { z0.h - z1.h }, z15.h + bfmlal za.s[w9, 4:5], { z18.h - z19.h }, z13.h + + bfmlal za.s[w8, 0:1], { z0.h - z3.h }, z0.h + bfmlal za.s[w8, 0:1, vgx4], { z0.h - z3.h }, z0.h + BFMLAL ZA.s[W8, 0:1, VGx4], { Z0.h - Z3.h }, Z0.h + BFMLAL ZA.S[W8, 0:1, VGX4], { Z0.H - Z3.H }, Z0.H + bfmlal za.s[w11, 0:1], { z0.h - z3.h }, z0.h + bfmlal za.s[w8, 6:7], { z0.h - z3.h }, z0.h + bfmlal za.s[w11, 0:1], { z1.h - z4.h }, z0.h + bfmlal za.s[w8, 0:1], { z28.h - z31.h }, z0.h + bfmlal za.s[w8, 0:1], { z29.h, z30.h, z31.h, z0.h }, z0.h + bfmlal za.s[w8, 0:1], { z29.h - z0.h }, z0.h + bfmlal za.s[w8, 0:1], { z30.h, z31.h, z0.h, z1.h }, z0.h + bfmlal za.s[w8, 0:1], { z30.h - z1.h }, z0.h + bfmlal za.s[w8, 0:1], { z31.h, z0.h, z1.h, z2.h }, z0.h + bfmlal za.s[w8, 0:1], { z31.h - z2.h }, z0.h + bfmlal za.s[w8, 0:1], { z0.h - z3.h }, z15.h + bfmlal za.s[w9, 4:5], { z24.h - z27.h }, z14.h + + bfmlal za.s[w8, 0:1], { z0.h - z1.h }, { z0.h - z1.h } + bfmlal za.s[w8, 0:1, vgx2], { z0.h - z1.h }, { z0.h - z1.h } + BFMLAL ZA.s[W8, 0:1, VGx2], { Z0.h - Z1.h }, { Z0.h - Z1.h } + BFMLAL ZA.S[W8, 0:1, VGX2], { Z0.H - Z1.H }, { Z0.H - Z1.H } + bfmlal za.s[w11, 0:1], { z0.h - z1.h }, { z0.h - z1.h } + bfmlal za.s[w8, 6:7], { z0.h - z1.h }, { z0.h - z1.h } + bfmlal za.s[w8, 0:1], { z30.h - z31.h }, { z0.h - z1.h } + bfmlal za.s[w8, 0:1], { z0.h - z1.h }, { z30.h - z31.h } + bfmlal za.s[w10, 2:3], { z22.h - z23.h }, { z18.h - z19.h } + + bfmlal za.s[w8, 0:1], { z0.h - z3.h }, { z0.h - z3.h } + bfmlal za.s[w8, 0:1, vgx4], { z0.h - z3.h }, { z0.h - z3.h } + BFMLAL ZA.s[W8, 0:1, VGx4], { Z0.h - Z3.h }, { Z0.h - Z3.h } + BFMLAL ZA.S[W8, 0:1, VGX4], { Z0.H - Z3.H }, { Z0.H - Z3.H } + bfmlal za.s[w11, 0:1], { z0.h - z3.h }, { z0.h - z3.h } + bfmlal za.s[w8, 6:7], { z0.h - z3.h }, { z0.h - z3.h } + bfmlal za.s[w8, 0:1], { z28.h - z31.h }, { z0.h - z3.h } + bfmlal za.s[w8, 0:1], { z0.h - z3.h }, { z28.h - z31.h } + bfmlal za.s[w11, 4:5], { z16.h - z19.h }, { z24.h - z27.h } + + bfmlsl za.s[w8, 0:1], z0.h, z0.h[0] + BFMLSL ZA.s[W8, 0:1], Z0.h, Z0.h[0] + BFMLSL ZA.S[W8, 0:1], Z0.H, Z0.H[0] + bfmlsl za.s[w11, 0:1], z0.h, z0.h[0] + bfmlsl za.s[w8, 14:15], z0.h, z0.h[0] + bfmlsl za.s[w8, 0:1], z31.h, z0.h[0] + bfmlsl za.s[w8, 0:1], z0.h, z15.h[0] + bfmlsl za.s[w8, 0:1], z0.h, z0.h[7] + bfmlsl za.s[w9, 10:11], z21.h, z9.h[2] + + bfmlsl za.s[w8, 0:1], { z0.h - z1.h }, z0.h[0] + bfmlsl za.s[w8, 0:1, vgx2], { z0.h - z1.h }, z0.h[0] + BFMLSL ZA.s[W8, 0:1, VGx2], { Z0.h - Z1.h }, Z0.h[0] + BFMLSL ZA.S[W8, 0:1, VGX2], { Z0.H - Z1.H }, Z0.H[0] + bfmlsl za.s[w11, 0:1], { z0.h - z1.h }, z0.h[0] + bfmlsl za.s[w8, 6:7], { z0.h - z1.h }, z0.h[0] + bfmlsl za.s[w8, 0:1], { z30.h - z31.h }, z0.h[0] + bfmlsl za.s[w8, 0:1], { z0.h - z1.h }, z15.h[0] + bfmlsl za.s[w8, 0:1], { z0.h - z1.h }, z0.h[7] + bfmlsl za.s[w9, 4:5], { z18.h - z19.h }, z9.h[3] + + bfmlsl za.s[w8, 0:1], { z0.h - z3.h }, z0.h[0] + bfmlsl za.s[w8, 0:1, vgx4], { z0.h - z3.h }, z0.h[0] + BFMLSL ZA.s[W8, 0:1, VGx4], { Z0.h - Z3.h }, Z0.h[0] + BFMLSL ZA.S[W8, 0:1, VGX4], { Z0.H - Z3.H }, Z0.H[0] + bfmlsl za.s[w11, 0:1], { z0.h - z3.h }, z0.h[0] + bfmlsl za.s[w8, 6:7], { z0.h - z3.h }, z0.h[0] + bfmlsl za.s[w8, 0:1], { z28.h - z31.h }, z0.h[0] + bfmlsl za.s[w8, 0:1], { z0.h - z3.h }, z15.h[0] + bfmlsl za.s[w8, 0:1], { z0.h - z3.h }, z0.h[7] + bfmlsl za.s[w9, 4:5], { z24.h - z27.h }, z14.h[5] + + bfmlsl za.s[w8, 0:1], z0.h, z0.h + BFMLSL ZA.s[W8, 0:1], Z0.h, Z0.h + BFMLSL ZA.S[W8, 0:1], Z0.H, Z0.H + bfmlsl za.s[w11, 0:1], z0.h, z0.h + bfmlsl za.s[w8, 14:15], z0.h, z0.h + bfmlsl za.s[w8, 0:1], z31.h, z0.h + bfmlsl za.s[w8, 0:1], z0.h, z15.h + bfmlsl za.s[w10, 2:3], z25.h, z7.h + + bfmlsl za.s[w8, 0:1], { z0.h - z1.h }, z0.h + bfmlsl za.s[w8, 0:1, vgx2], { z0.h - z1.h }, z0.h + BFMLSL ZA.s[W8, 0:1, VGx2], { Z0.h - Z1.h }, Z0.h + BFMLSL ZA.S[W8, 0:1, VGX2], { Z0.H - Z1.H }, Z0.H + bfmlsl za.s[w11, 0:1], { z0.h - z1.h }, z0.h + bfmlsl za.s[w8, 6:7], { z0.h - z1.h }, z0.h + bfmlsl za.s[w8, 0:1], { z30.h - z31.h }, z0.h + bfmlsl za.s[w8, 0:1], { z0.h - z1.h }, z15.h + bfmlsl za.s[w9, 4:5], { z18.h - z19.h }, z13.h + + bfmlsl za.s[w8, 0:1], { z0.h - z3.h }, z0.h + bfmlsl za.s[w8, 0:1, vgx4], { z0.h - z3.h }, z0.h + BFMLSL ZA.s[W8, 0:1, VGx4], { Z0.h - Z3.h }, Z0.h + BFMLSL ZA.S[W8, 0:1, VGX4], { Z0.H - Z3.H }, Z0.H + bfmlsl za.s[w11, 0:1], { z0.h - z3.h }, z0.h + bfmlsl za.s[w8, 6:7], { z0.h - z3.h }, z0.h + bfmlsl za.s[w8, 0:1], { z28.h - z31.h }, z0.h + bfmlsl za.s[w8, 0:1], { z0.h - z3.h }, z15.h + bfmlsl za.s[w9, 4:5], { z24.h - z27.h }, z14.h + + bfmlsl za.s[w8, 0:1], { z0.h - z1.h }, { z0.h - z1.h } + bfmlsl za.s[w8, 0:1, vgx2], { z0.h - z1.h }, { z0.h - z1.h } + BFMLSL ZA.s[W8, 0:1, VGx2], { Z0.h - Z1.h }, { Z0.h - Z1.h } + BFMLSL ZA.S[W8, 0:1, VGX2], { Z0.H - Z1.H }, { Z0.H - Z1.H } + bfmlsl za.s[w11, 0:1], { z0.h - z1.h }, { z0.h - z1.h } + bfmlsl za.s[w8, 6:7], { z0.h - z1.h }, { z0.h - z1.h } + bfmlsl za.s[w8, 0:1], { z30.h - z31.h }, { z0.h - z1.h } + bfmlsl za.s[w8, 0:1], { z0.h - z1.h }, { z30.h - z31.h } + bfmlsl za.s[w10, 2:3], { z22.h - z23.h }, { z18.h - z19.h } + + bfmlsl za.s[w8, 0:1], { z0.h - z3.h }, { z0.h - z3.h } + bfmlsl za.s[w8, 0:1, vgx4], { z0.h - z3.h }, { z0.h - z3.h } + BFMLSL ZA.s[W8, 0:1, VGx4], { Z0.h - Z3.h }, { Z0.h - Z3.h } + BFMLSL ZA.S[W8, 0:1, VGX4], { Z0.H - Z3.H }, { Z0.H - Z3.H } + bfmlsl za.s[w11, 0:1], { z0.h - z3.h }, { z0.h - z3.h } + bfmlsl za.s[w8, 6:7], { z0.h - z3.h }, { z0.h - z3.h } + bfmlsl za.s[w8, 0:1], { z28.h - z31.h }, { z0.h - z3.h } + bfmlsl za.s[w8, 0:1], { z0.h - z3.h }, { z28.h - z31.h } + bfmlsl za.s[w11, 4:5], { z16.h - z19.h }, { z24.h - z27.h } + + fmlal za.s[w8, 0:1], z0.h, z0.h[0] + FMLAL ZA.s[W8, 0:1], Z0.h, Z0.h[0] + FMLAL ZA.S[W8, 0:1], Z0.H, Z0.H[0] + fmlal za.s[w11, 0:1], z0.h, z0.h[0] + fmlal za.s[w8, 14:15], z0.h, z0.h[0] + fmlal za.s[w8, 0:1], z31.h, z0.h[0] + fmlal za.s[w8, 0:1], z0.h, z15.h[0] + fmlal za.s[w8, 0:1], z0.h, z0.h[7] + fmlal za.s[w9, 10:11], z21.h, z9.h[2] + + fmlal za.s[w8, 0:1], { z0.h - z1.h }, z0.h[0] + fmlal za.s[w8, 0:1, vgx2], { z0.h - z1.h }, z0.h[0] + FMLAL ZA.s[W8, 0:1, VGx2], { Z0.h - Z1.h }, Z0.h[0] + FMLAL ZA.S[W8, 0:1, VGX2], { Z0.H - Z1.H }, Z0.H[0] + fmlal za.s[w11, 0:1], { z0.h - z1.h }, z0.h[0] + fmlal za.s[w8, 6:7], { z0.h - z1.h }, z0.h[0] + fmlal za.s[w8, 0:1], { z30.h - z31.h }, z0.h[0] + fmlal za.s[w8, 0:1], { z0.h - z1.h }, z15.h[0] + fmlal za.s[w8, 0:1], { z0.h - z1.h }, z0.h[7] + fmlal za.s[w9, 4:5], { z18.h - z19.h }, z9.h[3] + + fmlal za.s[w8, 0:1], { z0.h - z3.h }, z0.h[0] + fmlal za.s[w8, 0:1, vgx4], { z0.h - z3.h }, z0.h[0] + FMLAL ZA.s[W8, 0:1, VGx4], { Z0.h - Z3.h }, Z0.h[0] + FMLAL ZA.S[W8, 0:1, VGX4], { Z0.H - Z3.H }, Z0.H[0] + fmlal za.s[w11, 0:1], { z0.h - z3.h }, z0.h[0] + fmlal za.s[w8, 6:7], { z0.h - z3.h }, z0.h[0] + fmlal za.s[w8, 0:1], { z28.h - z31.h }, z0.h[0] + fmlal za.s[w8, 0:1], { z0.h - z3.h }, z15.h[0] + fmlal za.s[w8, 0:1], { z0.h - z3.h }, z0.h[7] + fmlal za.s[w9, 4:5], { z24.h - z27.h }, z14.h[5] + + fmlal za.s[w8, 0:1], z0.h, z0.h + FMLAL ZA.s[W8, 0:1], Z0.h, Z0.h + FMLAL ZA.S[W8, 0:1], Z0.H, Z0.H + fmlal za.s[w11, 0:1], z0.h, z0.h + fmlal za.s[w8, 14:15], z0.h, z0.h + fmlal za.s[w8, 0:1], z31.h, z0.h + fmlal za.s[w8, 0:1], z0.h, z15.h + fmlal za.s[w10, 2:3], z25.h, z7.h + + fmlal za.s[w8, 0:1], { z0.h - z1.h }, z0.h + fmlal za.s[w8, 0:1, vgx2], { z0.h - z1.h }, z0.h + FMLAL ZA.s[W8, 0:1, VGx2], { Z0.h - Z1.h }, Z0.h + FMLAL ZA.S[W8, 0:1, VGX2], { Z0.H - Z1.H }, Z0.H + fmlal za.s[w11, 0:1], { z0.h - z1.h }, z0.h + fmlal za.s[w8, 6:7], { z0.h - z1.h }, z0.h + fmlal za.s[w8, 0:1], { z30.h - z31.h }, z0.h + fmlal za.s[w8, 0:1], { z31.h, z0.h }, z0.h + fmlal za.s[w8, 0:1], { z31.h - z0.h }, z0.h + fmlal za.s[w8, 0:1], { z0.h - z1.h }, z15.h + fmlal za.s[w9, 4:5], { z19.h - z20.h }, z13.h + + fmlal za.s[w8, 0:1], { z0.h - z3.h }, z0.h + fmlal za.s[w8, 0:1, vgx4], { z0.h - z3.h }, z0.h + FMLAL ZA.s[W8, 0:1, VGx4], { Z0.h - Z3.h }, Z0.h + FMLAL ZA.S[W8, 0:1, VGX4], { Z0.H - Z3.H }, Z0.H + fmlal za.s[w11, 0:1], { z0.h - z3.h }, z0.h + fmlal za.s[w8, 6:7], { z0.h - z3.h }, z0.h + fmlal za.s[w8, 0:1], { z28.h - z31.h }, z0.h + fmlal za.s[w8, 0:1], { z29.h - z0.h }, z0.h + fmlal za.s[w8, 0:1], { z30.h, z31.h, z0.h, z1.h }, z0.h + fmlal za.s[w8, 0:1], { z30.h - z1.h }, z0.h + fmlal za.s[w8, 0:1], { z31.h - z2.h }, z0.h + fmlal za.s[w8, 0:1], { z0.h - z3.h }, z15.h + fmlal za.s[w9, 4:5], { z25.h - z28.h }, z14.h + + fmlal za.s[w8, 0:1], { z0.h - z1.h }, { z0.h - z1.h } + fmlal za.s[w8, 0:1, vgx2], { z0.h - z1.h }, { z0.h - z1.h } + FMLAL ZA.s[W8, 0:1, VGx2], { Z0.h - Z1.h }, { Z0.h - Z1.h } + FMLAL ZA.S[W8, 0:1, VGX2], { Z0.H - Z1.H }, { Z0.H - Z1.H } + fmlal za.s[w11, 0:1], { z0.h - z1.h }, { z0.h - z1.h } + fmlal za.s[w8, 6:7], { z0.h - z1.h }, { z0.h - z1.h } + fmlal za.s[w8, 0:1], { z30.h - z31.h }, { z0.h - z1.h } + fmlal za.s[w8, 0:1], { z0.h - z1.h }, { z30.h - z31.h } + fmlal za.s[w10, 2:3], { z22.h - z23.h }, { z18.h - z19.h } + + fmlal za.s[w8, 0:1], { z0.h - z3.h }, { z0.h - z3.h } + fmlal za.s[w8, 0:1, vgx4], { z0.h - z3.h }, { z0.h - z3.h } + FMLAL ZA.s[W8, 0:1, VGx4], { Z0.h - Z3.h }, { Z0.h - Z3.h } + FMLAL ZA.S[W8, 0:1, VGX4], { Z0.H - Z3.H }, { Z0.H - Z3.H } + fmlal za.s[w11, 0:1], { z0.h - z3.h }, { z0.h - z3.h } + fmlal za.s[w8, 6:7], { z0.h - z3.h }, { z0.h - z3.h } + fmlal za.s[w8, 0:1], { z28.h - z31.h }, { z0.h - z3.h } + fmlal za.s[w8, 0:1], { z0.h - z3.h }, { z28.h - z31.h } + fmlal za.s[w11, 4:5], { z16.h - z19.h }, { z24.h - z27.h } + + fmlsl za.s[w8, 0:1], z0.h, z0.h[0] + FMLSL ZA.s[W8, 0:1], Z0.h, Z0.h[0] + FMLSL ZA.S[W8, 0:1], Z0.H, Z0.H[0] + fmlsl za.s[w11, 0:1], z0.h, z0.h[0] + fmlsl za.s[w8, 14:15], z0.h, z0.h[0] + fmlsl za.s[w8, 0:1], z31.h, z0.h[0] + fmlsl za.s[w8, 0:1], z0.h, z15.h[0] + fmlsl za.s[w8, 0:1], z0.h, z0.h[7] + fmlsl za.s[w9, 10:11], z21.h, z9.h[2] + + fmlsl za.s[w8, 0:1], { z0.h - z1.h }, z0.h[0] + fmlsl za.s[w8, 0:1, vgx2], { z0.h - z1.h }, z0.h[0] + FMLSL ZA.s[W8, 0:1, VGx2], { Z0.h - Z1.h }, Z0.h[0] + FMLSL ZA.S[W8, 0:1, VGX2], { Z0.H - Z1.H }, Z0.H[0] + fmlsl za.s[w11, 0:1], { z0.h - z1.h }, z0.h[0] + fmlsl za.s[w8, 6:7], { z0.h - z1.h }, z0.h[0] + fmlsl za.s[w8, 0:1], { z30.h - z31.h }, z0.h[0] + fmlsl za.s[w8, 0:1], { z0.h - z1.h }, z15.h[0] + fmlsl za.s[w8, 0:1], { z0.h - z1.h }, z0.h[7] + fmlsl za.s[w9, 4:5], { z18.h - z19.h }, z9.h[3] + + fmlsl za.s[w8, 0:1], { z0.h - z3.h }, z0.h[0] + fmlsl za.s[w8, 0:1, vgx4], { z0.h - z3.h }, z0.h[0] + FMLSL ZA.s[W8, 0:1, VGx4], { Z0.h - Z3.h }, Z0.h[0] + FMLSL ZA.S[W8, 0:1, VGX4], { Z0.H - Z3.H }, Z0.H[0] + fmlsl za.s[w11, 0:1], { z0.h - z3.h }, z0.h[0] + fmlsl za.s[w8, 6:7], { z0.h - z3.h }, z0.h[0] + fmlsl za.s[w8, 0:1], { z28.h - z31.h }, z0.h[0] + fmlsl za.s[w8, 0:1], { z0.h - z3.h }, z15.h[0] + fmlsl za.s[w8, 0:1], { z0.h - z3.h }, z0.h[7] + fmlsl za.s[w9, 4:5], { z24.h - z27.h }, z14.h[5] + + fmlsl za.s[w8, 0:1], z0.h, z0.h + FMLSL ZA.s[W8, 0:1], Z0.h, Z0.h + FMLSL ZA.S[W8, 0:1], Z0.H, Z0.H + fmlsl za.s[w11, 0:1], z0.h, z0.h + fmlsl za.s[w8, 14:15], z0.h, z0.h + fmlsl za.s[w8, 0:1], z31.h, z0.h + fmlsl za.s[w8, 0:1], z0.h, z15.h + fmlsl za.s[w10, 2:3], z25.h, z7.h + + fmlsl za.s[w8, 0:1], { z0.h - z1.h }, z0.h + fmlsl za.s[w8, 0:1, vgx2], { z0.h - z1.h }, z0.h + FMLSL ZA.s[W8, 0:1, VGx2], { Z0.h - Z1.h }, Z0.h + FMLSL ZA.S[W8, 0:1, VGX2], { Z0.H - Z1.H }, Z0.H + fmlsl za.s[w11, 0:1], { z0.h - z1.h }, z0.h + fmlsl za.s[w8, 6:7], { z0.h - z1.h }, z0.h + fmlsl za.s[w8, 0:1], { z30.h - z31.h }, z0.h + fmlsl za.s[w8, 0:1], { z31.h, z0.h }, z0.h + fmlsl za.s[w8, 0:1], { z31.h - z0.h }, z0.h + fmlsl za.s[w8, 0:1], { z0.h - z1.h }, z15.h + fmlsl za.s[w9, 4:5], { z19.h - z20.h }, z13.h + + fmlsl za.s[w8, 0:1], { z0.h - z3.h }, z0.h + fmlsl za.s[w8, 0:1, vgx4], { z0.h - z3.h }, z0.h + FMLSL ZA.s[W8, 0:1, VGx4], { Z0.h - Z3.h }, Z0.h + FMLSL ZA.S[W8, 0:1, VGX4], { Z0.H - Z3.H }, Z0.H + fmlsl za.s[w11, 0:1], { z0.h - z3.h }, z0.h + fmlsl za.s[w8, 6:7], { z0.h - z3.h }, z0.h + fmlsl za.s[w8, 0:1], { z28.h - z31.h }, z0.h + fmlsl za.s[w8, 0:1], { z29.h - z0.h }, z0.h + fmlsl za.s[w8, 0:1], { z30.h, z31.h, z0.h, z1.h }, z0.h + fmlsl za.s[w8, 0:1], { z30.h - z1.h }, z0.h + fmlsl za.s[w8, 0:1], { z31.h - z2.h }, z0.h + fmlsl za.s[w8, 0:1], { z0.h - z3.h }, z15.h + fmlsl za.s[w9, 4:5], { z25.h - z28.h }, z14.h + + fmlsl za.s[w8, 0:1], { z0.h - z1.h }, { z0.h - z1.h } + fmlsl za.s[w8, 0:1, vgx2], { z0.h - z1.h }, { z0.h - z1.h } + FMLSL ZA.s[W8, 0:1, VGx2], { Z0.h - Z1.h }, { Z0.h - Z1.h } + FMLSL ZA.S[W8, 0:1, VGX2], { Z0.H - Z1.H }, { Z0.H - Z1.H } + fmlsl za.s[w11, 0:1], { z0.h - z1.h }, { z0.h - z1.h } + fmlsl za.s[w8, 6:7], { z0.h - z1.h }, { z0.h - z1.h } + fmlsl za.s[w8, 0:1], { z30.h - z31.h }, { z0.h - z1.h } + fmlsl za.s[w8, 0:1], { z0.h - z1.h }, { z30.h - z31.h } + fmlsl za.s[w10, 2:3], { z22.h - z23.h }, { z18.h - z19.h } + + fmlsl za.s[w8, 0:1], { z0.h - z3.h }, { z0.h - z3.h } + fmlsl za.s[w8, 0:1, vgx4], { z0.h - z3.h }, { z0.h - z3.h } + FMLSL ZA.s[W8, 0:1, VGx4], { Z0.h - Z3.h }, { Z0.h - Z3.h } + FMLSL ZA.S[W8, 0:1, VGX4], { Z0.H - Z3.H }, { Z0.H - Z3.H } + fmlsl za.s[w11, 0:1], { z0.h - z3.h }, { z0.h - z3.h } + fmlsl za.s[w8, 6:7], { z0.h - z3.h }, { z0.h - z3.h } + fmlsl za.s[w8, 0:1], { z28.h - z31.h }, { z0.h - z3.h } + fmlsl za.s[w8, 0:1], { z0.h - z3.h }, { z28.h - z31.h } + fmlsl za.s[w11, 4:5], { z16.h - z19.h }, { z24.h - z27.h } + + smlal za.s[w8, 0:1], z0.h, z0.h[0] + smlal za.s[w11, 0:1], z0.h, z0.h[0] + smlal za.s[w8, 14:15], z0.h, z0.h[0] + smlal za.s[w8, 0:1], z31.h, z0.h[0] + smlal za.s[w8, 0:1], z0.h, z15.h[0] + smlal za.s[w8, 0:1], z0.h, z0.h[7] + smlal za.s[w9, 10:11], z21.h, z9.h[2] + + smlal za.s[w8, 0:1], { z0.h - z1.h }, z0.h[0] + smlal za.s[w8, 0:1, vgx2], { z0.h - z1.h }, z0.h[0] + smlal za.s[w11, 0:1], { z0.h - z1.h }, z0.h[0] + smlal za.s[w8, 6:7], { z0.h - z1.h }, z0.h[0] + smlal za.s[w8, 0:1], { z30.h - z31.h }, z0.h[0] + smlal za.s[w8, 0:1], { z0.h - z1.h }, z15.h[0] + smlal za.s[w8, 0:1], { z0.h - z1.h }, z0.h[7] + smlal za.s[w9, 4:5], { z18.h - z19.h }, z9.h[3] + + smlal za.s[w8, 0:1], { z0.h - z3.h }, z0.h[0] + smlal za.s[w8, 0:1, vgx4], { z0.h - z3.h }, z0.h[0] + smlal za.s[w11, 0:1], { z0.h - z3.h }, z0.h[0] + smlal za.s[w8, 6:7], { z0.h - z3.h }, z0.h[0] + smlal za.s[w8, 0:1], { z28.h - z31.h }, z0.h[0] + smlal za.s[w8, 0:1], { z0.h - z3.h }, z15.h[0] + smlal za.s[w8, 0:1], { z0.h - z3.h }, z0.h[7] + smlal za.s[w9, 4:5], { z24.h - z27.h }, z14.h[5] + + smlal za.s[w8, 0:1], z0.h, z0.h + smlal za.s[w11, 0:1], z0.h, z0.h + smlal za.s[w8, 14:15], z0.h, z0.h + smlal za.s[w8, 0:1], z31.h, z0.h + smlal za.s[w8, 0:1], z0.h, z15.h + smlal za.s[w10, 2:3], z25.h, z7.h + + smlal za.s[w8, 0:1], { z0.h - z1.h }, z0.h + smlal za.s[w8, 0:1, vgx2], { z0.h - z1.h }, z0.h + smlal za.s[w11, 0:1], { z0.h - z1.h }, z0.h + smlal za.s[w8, 6:7], { z0.h - z1.h }, z0.h + smlal za.s[w8, 0:1], { z30.h - z31.h }, z0.h + smlal za.s[w8, 0:1], { z31.h, z0.h }, z0.h + smlal za.s[w8, 0:1], { z31.h - z0.h }, z0.h + smlal za.s[w8, 0:1], { z0.h - z1.h }, z15.h + smlal za.s[w9, 4:5], { z19.h - z20.h }, z13.h + + smlal za.s[w8, 0:1], { z0.h - z3.h }, z0.h + smlal za.s[w8, 0:1, vgx4], { z0.h - z3.h }, z0.h + smlal za.s[w11, 0:1], { z0.h - z3.h }, z0.h + smlal za.s[w8, 6:7], { z0.h - z3.h }, z0.h + smlal za.s[w8, 0:1], { z28.h - z31.h }, z0.h + smlal za.s[w8, 0:1], { z29.h - z0.h }, z0.h + smlal za.s[w8, 0:1], { z30.h, z31.h, z0.h, z1.h }, z0.h + smlal za.s[w8, 0:1], { z30.h - z1.h }, z0.h + smlal za.s[w8, 0:1], { z31.h, z0.h, z1.h, z2.h }, z0.h + smlal za.s[w8, 0:1], { z31.h - z2.h }, z0.h + smlal za.s[w8, 0:1], { z0.h - z3.h }, z15.h + smlal za.s[w9, 4:5], { z25.h - z28.h }, z14.h + + smlal za.s[w8, 0:1], { z0.h - z1.h }, { z0.h - z1.h } + smlal za.s[w8, 0:1, vgx2], { z0.h - z1.h }, { z0.h - z1.h } + smlal za.s[w11, 0:1], { z0.h - z1.h }, { z0.h - z1.h } + smlal za.s[w8, 6:7], { z0.h - z1.h }, { z0.h - z1.h } + smlal za.s[w8, 0:1], { z30.h - z31.h }, { z0.h - z1.h } + smlal za.s[w8, 0:1], { z0.h - z1.h }, { z30.h - z31.h } + smlal za.s[w10, 2:3], { z22.h - z23.h }, { z18.h - z19.h } + + smlal za.s[w8, 0:1], { z0.h - z3.h }, { z0.h - z3.h } + smlal za.s[w8, 0:1, vgx4], { z0.h - z3.h }, { z0.h - z3.h } + smlal za.s[w11, 0:1], { z0.h - z3.h }, { z0.h - z3.h } + smlal za.s[w8, 6:7], { z0.h - z3.h }, { z0.h - z3.h } + smlal za.s[w8, 0:1], { z28.h - z31.h }, { z0.h - z3.h } + smlal za.s[w8, 0:1], { z0.h - z3.h }, { z28.h - z31.h } + smlal za.s[w11, 4:5], { z16.h - z19.h }, { z24.h - z27.h } + + smlsl za.s[w8, 0:1], z0.h, z0.h[0] + smlsl za.s[w11, 0:1], z0.h, z0.h[0] + smlsl za.s[w8, 14:15], z0.h, z0.h[0] + smlsl za.s[w8, 0:1], z31.h, z0.h[0] + smlsl za.s[w8, 0:1], z0.h, z15.h[0] + smlsl za.s[w8, 0:1], z0.h, z0.h[7] + smlsl za.s[w9, 10:11], z21.h, z9.h[2] + + smlsl za.s[w8, 0:1], { z0.h - z1.h }, z0.h[0] + smlsl za.s[w8, 0:1, vgx2], { z0.h - z1.h }, z0.h[0] + smlsl za.s[w11, 0:1], { z0.h - z1.h }, z0.h[0] + smlsl za.s[w8, 6:7], { z0.h - z1.h }, z0.h[0] + smlsl za.s[w8, 0:1], { z30.h - z31.h }, z0.h[0] + smlsl za.s[w8, 0:1], { z0.h - z1.h }, z15.h[0] + smlsl za.s[w8, 0:1], { z0.h - z1.h }, z0.h[7] + smlsl za.s[w9, 4:5], { z18.h - z19.h }, z9.h[3] + + smlsl za.s[w8, 0:1], { z0.h - z3.h }, z0.h[0] + smlsl za.s[w8, 0:1, vgx4], { z0.h - z3.h }, z0.h[0] + smlsl za.s[w11, 0:1], { z0.h - z3.h }, z0.h[0] + smlsl za.s[w8, 6:7], { z0.h - z3.h }, z0.h[0] + smlsl za.s[w8, 0:1], { z28.h - z31.h }, z0.h[0] + smlsl za.s[w8, 0:1], { z0.h - z3.h }, z15.h[0] + smlsl za.s[w8, 0:1], { z0.h - z3.h }, z0.h[7] + smlsl za.s[w9, 4:5], { z24.h - z27.h }, z14.h[5] + + smlsl za.s[w8, 0:1], z0.h, z0.h + smlsl za.s[w11, 0:1], z0.h, z0.h + smlsl za.s[w8, 14:15], z0.h, z0.h + smlsl za.s[w8, 0:1], z31.h, z0.h + smlsl za.s[w8, 0:1], z0.h, z15.h + smlsl za.s[w10, 2:3], z25.h, z7.h + + smlsl za.s[w8, 0:1], { z0.h - z1.h }, z0.h + smlsl za.s[w8, 0:1, vgx2], { z0.h - z1.h }, z0.h + smlsl za.s[w11, 0:1], { z0.h - z1.h }, z0.h + smlsl za.s[w8, 6:7], { z0.h - z1.h }, z0.h + smlsl za.s[w8, 0:1], { z30.h - z31.h }, z0.h + smlsl za.s[w8, 0:1], { z31.h, z0.h }, z0.h + smlsl za.s[w8, 0:1], { z31.h - z0.h }, z0.h + smlsl za.s[w8, 0:1], { z0.h - z1.h }, z15.h + smlsl za.s[w9, 4:5], { z19.h - z20.h }, z13.h + + smlsl za.s[w8, 0:1], { z0.h - z3.h }, z0.h + smlsl za.s[w8, 0:1, vgx4], { z0.h - z3.h }, z0.h + smlsl za.s[w11, 0:1], { z0.h - z3.h }, z0.h + smlsl za.s[w8, 6:7], { z0.h - z3.h }, z0.h + smlsl za.s[w8, 0:1], { z28.h - z31.h }, z0.h + smlsl za.s[w8, 0:1], { z29.h - z0.h }, z0.h + smlsl za.s[w8, 0:1], { z30.h, z31.h, z0.h, z1.h }, z0.h + smlsl za.s[w8, 0:1], { z30.h - z1.h }, z0.h + smlsl za.s[w8, 0:1], { z31.h, z0.h, z1.h, z2.h }, z0.h + smlsl za.s[w8, 0:1], { z31.h - z2.h }, z0.h + smlsl za.s[w8, 0:1], { z0.h - z3.h }, z15.h + smlsl za.s[w9, 4:5], { z25.h - z28.h }, z14.h + + smlsl za.s[w8, 0:1], { z0.h - z1.h }, { z0.h - z1.h } + smlsl za.s[w8, 0:1, vgx2], { z0.h - z1.h }, { z0.h - z1.h } + smlsl za.s[w11, 0:1], { z0.h - z1.h }, { z0.h - z1.h } + smlsl za.s[w8, 6:7], { z0.h - z1.h }, { z0.h - z1.h } + smlsl za.s[w8, 0:1], { z30.h - z31.h }, { z0.h - z1.h } + smlsl za.s[w8, 0:1], { z0.h - z1.h }, { z30.h - z31.h } + smlsl za.s[w10, 2:3], { z22.h - z23.h }, { z18.h - z19.h } + + smlsl za.s[w8, 0:1], { z0.h - z3.h }, { z0.h - z3.h } + smlsl za.s[w8, 0:1, vgx4], { z0.h - z3.h }, { z0.h - z3.h } + smlsl za.s[w11, 0:1], { z0.h - z3.h }, { z0.h - z3.h } + smlsl za.s[w8, 6:7], { z0.h - z3.h }, { z0.h - z3.h } + smlsl za.s[w8, 0:1], { z28.h - z31.h }, { z0.h - z3.h } + smlsl za.s[w8, 0:1], { z0.h - z3.h }, { z28.h - z31.h } + smlsl za.s[w11, 4:5], { z16.h - z19.h }, { z24.h - z27.h } + + umlal za.s[w8, 0:1], z0.h, z0.h[0] + umlal za.s[w11, 0:1], z0.h, z0.h[0] + umlal za.s[w8, 14:15], z0.h, z0.h[0] + umlal za.s[w8, 0:1], z31.h, z0.h[0] + umlal za.s[w8, 0:1], z0.h, z15.h[0] + umlal za.s[w8, 0:1], z0.h, z0.h[7] + umlal za.s[w9, 10:11], z21.h, z9.h[2] + + umlal za.s[w8, 0:1], { z0.h - z1.h }, z0.h[0] + umlal za.s[w8, 0:1, vgx2], { z0.h - z1.h }, z0.h[0] + umlal za.s[w11, 0:1], { z0.h - z1.h }, z0.h[0] + umlal za.s[w8, 6:7], { z0.h - z1.h }, z0.h[0] + umlal za.s[w8, 0:1], { z30.h - z31.h }, z0.h[0] + umlal za.s[w8, 0:1], { z0.h - z1.h }, z15.h[0] + umlal za.s[w8, 0:1], { z0.h - z1.h }, z0.h[7] + umlal za.s[w9, 4:5], { z18.h - z19.h }, z9.h[3] + + umlal za.s[w8, 0:1], { z0.h - z3.h }, z0.h[0] + umlal za.s[w8, 0:1, vgx4], { z0.h - z3.h }, z0.h[0] + umlal za.s[w11, 0:1], { z0.h - z3.h }, z0.h[0] + umlal za.s[w8, 6:7], { z0.h - z3.h }, z0.h[0] + umlal za.s[w8, 0:1], { z28.h - z31.h }, z0.h[0] + umlal za.s[w8, 0:1], { z0.h - z3.h }, z15.h[0] + umlal za.s[w8, 0:1], { z0.h - z3.h }, z0.h[7] + umlal za.s[w9, 4:5], { z24.h - z27.h }, z14.h[5] + + umlal za.s[w8, 0:1], z0.h, z0.h + umlal za.s[w11, 0:1], z0.h, z0.h + umlal za.s[w8, 14:15], z0.h, z0.h + umlal za.s[w8, 0:1], z31.h, z0.h + umlal za.s[w8, 0:1], z0.h, z15.h + umlal za.s[w10, 2:3], z25.h, z7.h + + umlal za.s[w8, 0:1], { z0.h - z1.h }, z0.h + umlal za.s[w8, 0:1, vgx2], { z0.h - z1.h }, z0.h + umlal za.s[w11, 0:1], { z0.h - z1.h }, z0.h + umlal za.s[w8, 6:7], { z0.h - z1.h }, z0.h + umlal za.s[w8, 0:1], { z30.h - z31.h }, z0.h + umlal za.s[w8, 0:1], { z31.h, z0.h }, z0.h + umlal za.s[w8, 0:1], { z31.h - z0.h }, z0.h + umlal za.s[w8, 0:1], { z0.h - z1.h }, z15.h + umlal za.s[w9, 4:5], { z19.h - z20.h }, z13.h + + umlal za.s[w8, 0:1], { z0.h - z3.h }, z0.h + umlal za.s[w8, 0:1, vgx4], { z0.h - z3.h }, z0.h + umlal za.s[w11, 0:1], { z0.h - z3.h }, z0.h + umlal za.s[w8, 6:7], { z0.h - z3.h }, z0.h + umlal za.s[w8, 0:1], { z28.h - z31.h }, z0.h + umlal za.s[w8, 0:1], { z29.h - z0.h }, z0.h + umlal za.s[w8, 0:1], { z30.h, z31.h, z0.h, z1.h }, z0.h + umlal za.s[w8, 0:1], { z30.h - z1.h }, z0.h + umlal za.s[w8, 0:1], { z31.h, z0.h, z1.h, z2.h }, z0.h + umlal za.s[w8, 0:1], { z31.h - z2.h }, z0.h + umlal za.s[w8, 0:1], { z0.h - z3.h }, z15.h + umlal za.s[w9, 4:5], { z25.h - z28.h }, z14.h + + umlal za.s[w8, 0:1], { z0.h - z1.h }, { z0.h - z1.h } + umlal za.s[w8, 0:1, vgx2], { z0.h - z1.h }, { z0.h - z1.h } + umlal za.s[w11, 0:1], { z0.h - z1.h }, { z0.h - z1.h } + umlal za.s[w8, 6:7], { z0.h - z1.h }, { z0.h - z1.h } + umlal za.s[w8, 0:1], { z30.h - z31.h }, { z0.h - z1.h } + umlal za.s[w8, 0:1], { z0.h - z1.h }, { z30.h - z31.h } + umlal za.s[w10, 2:3], { z22.h - z23.h }, { z18.h - z19.h } + + umlal za.s[w8, 0:1], { z0.h - z3.h }, { z0.h - z3.h } + umlal za.s[w8, 0:1, vgx4], { z0.h - z3.h }, { z0.h - z3.h } + umlal za.s[w11, 0:1], { z0.h - z3.h }, { z0.h - z3.h } + umlal za.s[w8, 6:7], { z0.h - z3.h }, { z0.h - z3.h } + umlal za.s[w8, 0:1], { z28.h - z31.h }, { z0.h - z3.h } + umlal za.s[w8, 0:1], { z0.h - z3.h }, { z28.h - z31.h } + umlal za.s[w11, 4:5], { z16.h - z19.h }, { z24.h - z27.h } + + umlsl za.s[w8, 0:1], z0.h, z0.h[0] + umlsl za.s[w11, 0:1], z0.h, z0.h[0] + umlsl za.s[w8, 14:15], z0.h, z0.h[0] + umlsl za.s[w8, 0:1], z31.h, z0.h[0] + umlsl za.s[w8, 0:1], z0.h, z15.h[0] + umlsl za.s[w8, 0:1], z0.h, z0.h[7] + umlsl za.s[w9, 10:11], z21.h, z9.h[2] + + umlsl za.s[w8, 0:1], { z0.h - z1.h }, z0.h[0] + umlsl za.s[w8, 0:1, vgx2], { z0.h - z1.h }, z0.h[0] + umlsl za.s[w11, 0:1], { z0.h - z1.h }, z0.h[0] + umlsl za.s[w8, 6:7], { z0.h - z1.h }, z0.h[0] + umlsl za.s[w8, 0:1], { z30.h - z31.h }, z0.h[0] + umlsl za.s[w8, 0:1], { z0.h - z1.h }, z15.h[0] + umlsl za.s[w8, 0:1], { z0.h - z1.h }, z0.h[7] + umlsl za.s[w9, 4:5], { z18.h - z19.h }, z9.h[3] + + umlsl za.s[w8, 0:1], { z0.h - z3.h }, z0.h[0] + umlsl za.s[w8, 0:1, vgx4], { z0.h - z3.h }, z0.h[0] + umlsl za.s[w11, 0:1], { z0.h - z3.h }, z0.h[0] + umlsl za.s[w8, 6:7], { z0.h - z3.h }, z0.h[0] + umlsl za.s[w8, 0:1], { z28.h - z31.h }, z0.h[0] + umlsl za.s[w8, 0:1], { z0.h - z3.h }, z15.h[0] + umlsl za.s[w8, 0:1], { z0.h - z3.h }, z0.h[7] + umlsl za.s[w9, 4:5], { z24.h - z27.h }, z14.h[5] + + umlsl za.s[w8, 0:1], z0.h, z0.h + umlsl za.s[w11, 0:1], z0.h, z0.h + umlsl za.s[w8, 14:15], z0.h, z0.h + umlsl za.s[w8, 0:1], z31.h, z0.h + umlsl za.s[w8, 0:1], z0.h, z15.h + umlsl za.s[w10, 2:3], z25.h, z7.h + + umlsl za.s[w8, 0:1], { z0.h - z1.h }, z0.h + umlsl za.s[w8, 0:1, vgx2], { z0.h - z1.h }, z0.h + umlsl za.s[w11, 0:1], { z0.h - z1.h }, z0.h + umlsl za.s[w8, 6:7], { z0.h - z1.h }, z0.h + umlsl za.s[w8, 0:1], { z30.h - z31.h }, z0.h + umlsl za.s[w8, 0:1], { z31.h, z0.h }, z0.h + umlsl za.s[w8, 0:1], { z31.h - z0.h }, z0.h + umlsl za.s[w8, 0:1], { z0.h - z1.h }, z15.h + umlsl za.s[w9, 4:5], { z19.h - z20.h }, z13.h + + umlsl za.s[w8, 0:1], { z0.h - z3.h }, z0.h + umlsl za.s[w8, 0:1, vgx4], { z0.h - z3.h }, z0.h + umlsl za.s[w11, 0:1], { z0.h - z3.h }, z0.h + umlsl za.s[w8, 6:7], { z0.h - z3.h }, z0.h + umlsl za.s[w8, 0:1], { z28.h - z31.h }, z0.h + umlsl za.s[w8, 0:1], { z29.h - z0.h }, z0.h + umlsl za.s[w8, 0:1], { z30.h, z31.h, z0.h, z1.h }, z0.h + umlsl za.s[w8, 0:1], { z30.h - z1.h }, z0.h + umlsl za.s[w8, 0:1], { z31.h, z0.h, z1.h, z2.h }, z0.h + umlsl za.s[w8, 0:1], { z31.h - z2.h }, z0.h + umlsl za.s[w8, 0:1], { z0.h - z3.h }, z15.h + umlsl za.s[w9, 4:5], { z25.h - z28.h }, z14.h + + umlsl za.s[w8, 0:1], { z0.h - z1.h }, { z0.h - z1.h } + umlsl za.s[w8, 0:1, vgx2], { z0.h - z1.h }, { z0.h - z1.h } + umlsl za.s[w11, 0:1], { z0.h - z1.h }, { z0.h - z1.h } + umlsl za.s[w8, 6:7], { z0.h - z1.h }, { z0.h - z1.h } + umlsl za.s[w8, 0:1], { z30.h - z31.h }, { z0.h - z1.h } + umlsl za.s[w8, 0:1], { z0.h - z1.h }, { z30.h - z31.h } + umlsl za.s[w10, 2:3], { z22.h - z23.h }, { z18.h - z19.h } + + umlsl za.s[w8, 0:1], { z0.h - z3.h }, { z0.h - z3.h } + umlsl za.s[w8, 0:1, vgx4], { z0.h - z3.h }, { z0.h - z3.h } + umlsl za.s[w11, 0:1], { z0.h - z3.h }, { z0.h - z3.h } + umlsl za.s[w8, 6:7], { z0.h - z3.h }, { z0.h - z3.h } + umlsl za.s[w8, 0:1], { z28.h - z31.h }, { z0.h - z3.h } + umlsl za.s[w8, 0:1], { z0.h - z3.h }, { z28.h - z31.h } + umlsl za.s[w11, 4:5], { z16.h - z19.h }, { z24.h - z27.h } |