diff options
Diffstat (limited to 'binutils/testsuite/binutils-all/arm')
| -rw-r--r-- | binutils/testsuite/binutils-all/arm/in-order-all.d | 46 | ||||
| -rw-r--r-- | binutils/testsuite/binutils-all/arm/in-order.d | 24 | ||||
| -rw-r--r-- | binutils/testsuite/binutils-all/arm/out-of-order-all.d | 46 | ||||
| -rw-r--r-- | binutils/testsuite/binutils-all/arm/out-of-order.d | 24 | ||||
| -rw-r--r-- | binutils/testsuite/binutils-all/arm/out-of-order.s | 8 |
5 files changed, 72 insertions, 76 deletions
diff --git a/binutils/testsuite/binutils-all/arm/in-order-all.d b/binutils/testsuite/binutils-all/arm/in-order-all.d index 3a098dd..5e51ca1 100644 --- a/binutils/testsuite/binutils-all/arm/in-order-all.d +++ b/binutils/testsuite/binutils-all/arm/in-order-all.d @@ -8,43 +8,41 @@ Disassembly of section \.func1: -00400000 <v1>: - 400000: e0800001 add r0, r0, r1 - 400004: 00000000 andeq r0, r0, r0 +.+ <v1>: +[^:]+: e0800001 add r0, r0, r1 +[^:]+: 00000000 andeq r0, r0, r0 Disassembly of section \.func2: -00400008 <\.func2>: - 400008: e0800001 add r0, r0, r1 +.+ <\.func2>: +[^:]+: e0800001 add r0, r0, r1 Disassembly of section \.func3: -0040000c <\.func3>: - 40000c: e0800001 add r0, r0, r1 - 400010: e0800001 add r0, r0, r1 - 400014: e0800001 add r0, r0, r1 - 400018: e0800001 add r0, r0, r1 - 40001c: e0800001 add r0, r0, r1 - 400020: 00000000 andeq r0, r0, r0 +.+ <\.func3>: +[^:]+: e0800001 add r0, r0, r1 +[^:]+: e0800001 add r0, r0, r1 +[^:]+: e0800001 add r0, r0, r1 +[^:]+: e0800001 add r0, r0, r1 +[^:]+: e0800001 add r0, r0, r1 +[^:]+: 00000000 andeq r0, r0, r0 Disassembly of section \.rodata: -00400024 <\.rodata>: - 400024: 00000004 andeq r0, r0, r4 +.+ <\.rodata>: +[^:]+: 00000000 andeq r0, r0, r0 Disassembly of section \.global: -00410028 <__data_start>: - 410028: 00000001 andeq r0, r0, r1 - 41002c: 00000001 andeq r0, r0, r1 - 410030: 00000001 andeq r0, r0, r1 +.+ <.+>: + ... Disassembly of section \.ARM\.attributes: -00000000 <\.ARM\.attributes>: - 0: 00001141 andeq r1, r0, r1, asr #2 - 4: 61656100 cmnvs r5, r0, lsl #2 - 8: 01006962 tsteq r0, r2, ror #18 - c: 00000007 andeq r0, r0, r7 - 10: Address 0x0000000000000010 is out of bounds. +.+ <\.ARM\.attributes>: +[^:]+: .+ +[^:]+: .+ +[^:]+: .+ +[^:]+: .+ +[^:]+: .+ diff --git a/binutils/testsuite/binutils-all/arm/in-order.d b/binutils/testsuite/binutils-all/arm/in-order.d index a0b63c2..a2c9b9e 100644 --- a/binutils/testsuite/binutils-all/arm/in-order.d +++ b/binutils/testsuite/binutils-all/arm/in-order.d @@ -8,21 +8,21 @@ Disassembly of section \.func1: -00400000 <v1>: - 400000: e0800001 add r0, r0, r1 - 400004: 00000000 \.word 0x00000000 +.+ <v1>: +[^:]+: e0800001 add r0, r0, r1 +[^:]+: 00000000 \.word 0x00000000 Disassembly of section \.func2: -00400008 <\.func2>: - 400008: e0800001 add r0, r0, r1 +.+ <\.func2>: +[^:]+: e0800001 add r0, r0, r1 Disassembly of section \.func3: -0040000c <\.func3>: - 40000c: e0800001 add r0, r0, r1 - 400010: e0800001 add r0, r0, r1 - 400014: e0800001 add r0, r0, r1 - 400018: e0800001 add r0, r0, r1 - 40001c: e0800001 add r0, r0, r1 - 400020: 00000000 \.word 0x00000000 +.+ <\.func3>: +[^:]+: e0800001 add r0, r0, r1 +[^:]+: e0800001 add r0, r0, r1 +[^:]+: e0800001 add r0, r0, r1 +[^:]+: e0800001 add r0, r0, r1 +[^:]+: e0800001 add r0, r0, r1 +[^:]+: 00000000 \.word 0x00000000 diff --git a/binutils/testsuite/binutils-all/arm/out-of-order-all.d b/binutils/testsuite/binutils-all/arm/out-of-order-all.d index 58c4057..c1df003 100644 --- a/binutils/testsuite/binutils-all/arm/out-of-order-all.d +++ b/binutils/testsuite/binutils-all/arm/out-of-order-all.d @@ -8,43 +8,41 @@ Disassembly of section \.global: -ffe00000 <\.global>: -ffe00000: 00000001 andeq r0, r0, r1 -ffe00004: 00000001 andeq r0, r0, r1 -ffe00008: 00000001 andeq r0, r0, r1 +.+ <\.global>: + ... Disassembly of section \.func2: -04018280 <\.func2>: - 4018280: e0800001 add r0, r0, r1 +.+ <\.func2>: +[^:]+: e0800001 add r0, r0, r1 Disassembly of section \.func1: -04005000 <v1>: - 4005000: e0800001 add r0, r0, r1 - 4005004: 00000000 andeq r0, r0, r0 +.+ <v1>: +[^:]+: e0800001 add r0, r0, r1 +[^:]+: 00000000 andeq r0, r0, r0 Disassembly of section \.func3: -04015000 <\.func3>: - 4015000: e0800001 add r0, r0, r1 - 4015004: e0800001 add r0, r0, r1 - 4015008: e0800001 add r0, r0, r1 - 401500c: e0800001 add r0, r0, r1 - 4015010: e0800001 add r0, r0, r1 - 4015014: 00000000 andeq r0, r0, r0 +.+ <\.func3>: +[^:]+: e0800001 add r0, r0, r1 +[^:]+: e0800001 add r0, r0, r1 +[^:]+: e0800001 add r0, r0, r1 +[^:]+: e0800001 add r0, r0, r1 +[^:]+: e0800001 add r0, r0, r1 +[^:]+: 00000000 andeq r0, r0, r0 Disassembly of section \.rodata: -04015018 <\.rodata>: - 4015018: 00000004 andeq r0, r0, r4 +.+ <\.rodata>: +[^:]+: 00000000 andeq r0, r0, r0 Disassembly of section \.ARM\.attributes: -00000000 <\.ARM\.attributes>: - 0: 00001141 andeq r1, r0, r1, asr #2 - 4: 61656100 cmnvs r5, r0, lsl #2 - 8: 01006962 tsteq r0, r2, ror #18 - c: 00000007 andeq r0, r0, r7 - 10: Address 0x0000000000000010 is out of bounds. +.+ <\.ARM\.attributes>: +[^:]+: .+ +[^:]+: .+ +[^:]+: .+ +[^:]+: .+ +[^:]+: .+ diff --git a/binutils/testsuite/binutils-all/arm/out-of-order.d b/binutils/testsuite/binutils-all/arm/out-of-order.d index 9351af7..f880cbc 100644 --- a/binutils/testsuite/binutils-all/arm/out-of-order.d +++ b/binutils/testsuite/binutils-all/arm/out-of-order.d @@ -7,21 +7,21 @@ Disassembly of section \.func2: -04018280 <\.func2>: - 4018280: e0800001 add r0, r0, r1 +.+ <\.func2>: +[^:]+: e0800001 add r0, r0, r1 Disassembly of section \.func1: -04005000 <v1>: - 4005000: e0800001 add r0, r0, r1 - 4005004: 00000000 \.word 0x00000000 +.+ <v1>: +[^:]+: e0800001 add r0, r0, r1 +[^:]+: 00000000 \.word 0x00000000 Disassembly of section \.func3: -04015000 <\.func3>: - 4015000: e0800001 add r0, r0, r1 - 4015004: e0800001 add r0, r0, r1 - 4015008: e0800001 add r0, r0, r1 - 401500c: e0800001 add r0, r0, r1 - 4015010: e0800001 add r0, r0, r1 - 4015014: 00000000 \.word 0x00000000 +.+ <\.func3>: +[^:]+: e0800001 add r0, r0, r1 +[^:]+: e0800001 add r0, r0, r1 +[^:]+: e0800001 add r0, r0, r1 +[^:]+: e0800001 add r0, r0, r1 +[^:]+: e0800001 add r0, r0, r1 +[^:]+: 00000000 \.word 0x00000000 diff --git a/binutils/testsuite/binutils-all/arm/out-of-order.s b/binutils/testsuite/binutils-all/arm/out-of-order.s index 4e43ddf..3994fe5 100644 --- a/binutils/testsuite/binutils-all/arm/out-of-order.s +++ b/binutils/testsuite/binutils-all/arm/out-of-order.s @@ -21,9 +21,9 @@ v1: .data .section .global,"aw",%progbits - .word 1 - .word 1 - .word 1 + .word 0 + .word 0 + .word 0 .section .rodata - .word 4 + .word 0 |