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-rw-r--r--gas/ChangeLog10
-rw-r--r--gas/config/tc-i386.c24
-rw-r--r--gas/doc/c-i386.texi3
-rw-r--r--gas/testsuite/ChangeLog9
-rw-r--r--gas/testsuite/gas/i386/disp32.d19
-rw-r--r--gas/testsuite/gas/i386/disp32.s11
-rw-r--r--gas/testsuite/gas/i386/i386.exp2
-rw-r--r--gas/testsuite/gas/i386/x86-64-disp32.d19
-rw-r--r--gas/testsuite/gas/i386/x86-64-disp32.s11
9 files changed, 100 insertions, 8 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog
index 94f0523..445330d 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,13 @@
+2010-10-14 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (_i386_insn): Add disp32_encoding.
+ (md_assemble): Don't call optimize_disp if disp32_encoding is
+ set.
+ (parse_insn): Support .d32 to force 32bit displacement.
+ (output_branch): Use BIG if disp32_encoding is set.
+
+ * doc/c-i386.texi: Document .d32 encoding suffix.
+
2010-10-11 Steve Kilbane <steve.kilbane@analog.com>
* config/bfin-lex.l (FLAGS): New state.
diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
index cc08efb..ff6061b 100644
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -277,6 +277,9 @@ struct _i386_insn
/* Swap operand in encoding. */
unsigned int swap_operand;
+ /* Force 32bit displacement in encoding. */
+ unsigned int disp32_encoding;
+
/* Error message. */
enum i386_error error;
};
@@ -2982,6 +2985,7 @@ md_assemble (char *line)
/* Don't optimize displacement for movabs since it only takes 64bit
displacement. */
if (i.disp_operands
+ && !i.disp32_encoding
&& (flag_code != CODE_64BIT
|| strcmp (mnemonic, "movabs") != 0))
optimize_disp ();
@@ -3256,9 +3260,15 @@ parse_insn (char *line, char *mnemonic)
if (!current_templates)
{
- /* Check if we should swap operand in encoding. */
+ /* Check if we should swap operand or force 32bit displacement in
+ encoding. */
if (mnem_p - 2 == dot_p && dot_p[1] == 's')
i.swap_operand = 1;
+ else if (mnem_p - 4 == dot_p
+ && dot_p[1] == 'd'
+ && dot_p[2] == '3'
+ && dot_p[3] == '2')
+ i.disp32_encoding = 1;
else
goto check_suffix;
mnem_p = dot_p;
@@ -5691,15 +5701,15 @@ static void
output_branch (void)
{
char *p;
+ int size;
int code16;
int prefix;
relax_substateT subtype;
symbolS *sym;
offsetT off;
- code16 = 0;
- if (flag_code == CODE_16BIT)
- code16 = CODE16;
+ code16 = flag_code == CODE_16BIT ? CODE16 : 0;
+ size = i.disp32_encoding ? BIG : SMALL;
prefix = 0;
if (i.prefix[DATA_PREFIX] != 0)
@@ -5742,11 +5752,11 @@ output_branch (void)
*p = i.tm.base_opcode;
if ((unsigned char) *p == JUMP_PC_RELATIVE)
- subtype = ENCODE_RELAX_STATE (UNCOND_JUMP, SMALL);
+ subtype = ENCODE_RELAX_STATE (UNCOND_JUMP, size);
else if (cpu_arch_flags.bitfield.cpui386)
- subtype = ENCODE_RELAX_STATE (COND_JUMP, SMALL);
+ subtype = ENCODE_RELAX_STATE (COND_JUMP, size);
else
- subtype = ENCODE_RELAX_STATE (COND_JUMP86, SMALL);
+ subtype = ENCODE_RELAX_STATE (COND_JUMP86, size);
subtype |= code16;
sym = i.op[0].disps->X_add_symbol;
diff --git a/gas/doc/c-i386.texi b/gas/doc/c-i386.texi
index 9f4d742..d0a47de 100644
--- a/gas/doc/c-i386.texi
+++ b/gas/doc/c-i386.texi
@@ -394,7 +394,8 @@ quadruple word).
Different encoding options can be specified via optional mnemonic
suffix. @samp{.s} suffix swaps 2 register operands in encoding when
-moving from one register to another.
+moving from one register to another. @samp{.d32} suffix forces 32bit
+displacement in encoding.
@cindex conversion instructions, i386
@cindex i386 conversion instructions
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index 26aff5c..acd3d21 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,12 @@
+2010-10-14 H.J. Lu <hongjiu.lu@intel.com>
+
+ * gas/i386/disp32.d: New.
+ * gas/i386/disp32.s: Likewise.
+ * gas/i386/x86-64-disp32.d: Likewise.
+ * gas/i386/x86-64-disp32.s: Likewise.
+
+ * gas/i386/i386.exp: Run disp32 and x86-64-disp32.
+
2010-10-11 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* gas/s390/zarch-z196.d: Adjust the load/store on condition
diff --git a/gas/testsuite/gas/i386/disp32.d b/gas/testsuite/gas/i386/disp32.d
new file mode 100644
index 0000000..c1f59b6
--- /dev/null
+++ b/gas/testsuite/gas/i386/disp32.d
@@ -0,0 +1,19 @@
+#as:
+#objdump: -drw
+#name: i386 32bit displacement
+
+.*: +file format .*
+
+
+Disassembly of section .text:
+
+0+ <foo-0x10>:
+[ ]*[a-f0-9]+: 8b 58 03 mov 0x3\(%eax\),%ebx
+[ ]*[a-f0-9]+: 8b 98 03 00 00 00 mov 0x3\(%eax\),%ebx
+[ ]*[a-f0-9]+: eb 05 jmp 10 <foo>
+[ ]*[a-f0-9]+: e9 00 00 00 00 jmp 10 <foo>
+
+0+10 <foo>:
+[ ]*[a-f0-9]+: 89 58 03 mov %ebx,0x3\(%eax\)
+[ ]*[a-f0-9]+: 89 98 03 00 00 00 mov %ebx,0x3\(%eax\)
+#pass
diff --git a/gas/testsuite/gas/i386/disp32.s b/gas/testsuite/gas/i386/disp32.s
new file mode 100644
index 0000000..de34f41
--- /dev/null
+++ b/gas/testsuite/gas/i386/disp32.s
@@ -0,0 +1,11 @@
+ .text
+ mov 3(%eax),%ebx
+ mov.d32 3(%eax),%ebx
+
+ jmp foo
+ jmp.d32 foo
+foo:
+
+ .intel_syntax noprefix
+ mov DWORD PTR [eax+3], ebx
+ mov.d32 DWORD PTR [eax+3], ebx
diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp
index c8d88d0..9027355 100644
--- a/gas/testsuite/gas/i386/i386.exp
+++ b/gas/testsuite/gas/i386/i386.exp
@@ -49,6 +49,7 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_32_check]]
run_dump_test "sib-intel"
run_dump_test "disp"
run_dump_test "disp-intel"
+ run_dump_test "disp32"
run_dump_test "vmx"
run_dump_test "smx"
run_dump_test "suffix"
@@ -323,6 +324,7 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_64_check]] t
run_dump_test "x86-64-sib-intel"
run_dump_test "x86-64-disp"
run_dump_test "x86-64-disp-intel"
+ run_dump_test "x86-64-disp32"
run_dump_test "rexw"
run_dump_test "x86-64-fxsave"
run_dump_test "x86-64-fxsave-intel"
diff --git a/gas/testsuite/gas/i386/x86-64-disp32.d b/gas/testsuite/gas/i386/x86-64-disp32.d
new file mode 100644
index 0000000..4d02063
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-disp32.d
@@ -0,0 +1,19 @@
+#as:
+#objdump: -drw
+#name: x86-64 32bit displacement
+
+.*: +file format .*
+
+
+Disassembly of section .text:
+
+0+ <foo-0x10>:
+[ ]*[a-f0-9]+: 8b 58 03 mov 0x3\(%rax\),%ebx
+[ ]*[a-f0-9]+: 8b 98 03 00 00 00 mov 0x3\(%rax\),%ebx
+[ ]*[a-f0-9]+: eb 05 jmp 10 <foo>
+[ ]*[a-f0-9]+: e9 00 00 00 00 jmpq 10 <foo>
+
+0+10 <foo>:
+[ ]*[a-f0-9]+: 89 58 03 mov %ebx,0x3\(%rax\)
+[ ]*[a-f0-9]+: 89 98 03 00 00 00 mov %ebx,0x3\(%rax\)
+#pass
diff --git a/gas/testsuite/gas/i386/x86-64-disp32.s b/gas/testsuite/gas/i386/x86-64-disp32.s
new file mode 100644
index 0000000..b0e83e1
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-disp32.s
@@ -0,0 +1,11 @@
+ .text
+ mov 3(%rax),%ebx
+ mov.d32 3(%rax),%ebx
+
+ jmp foo
+ jmp.d32 foo
+foo:
+
+ .intel_syntax noprefix
+ mov DWORD PTR [rax+3], ebx
+ mov.d32 DWORD PTR [rax+3], ebx
generated by cgit v1.1 at 2024-10-12 17:22:32 +0000