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-rw-r--r--gas/ChangeLog5
-rw-r--r--gas/testsuite/gas/ppc/vsx.d4
-rw-r--r--gas/testsuite/gas/ppc/vsx.s4
-rw-r--r--opcodes/ChangeLog4
-rw-r--r--opcodes/ppc-opc.c2
5 files changed, 19 insertions, 0 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog
index d2f5f76..3e2120d 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,8 @@
+2021-05-27 Peter Bergner <bergner@linux.ibm.com>
+
+ * testsuite/gas/ppc/vsx.d <xxmr, xxlnot>: Add tests.
+ * testsuite/gas/ppc/vsx.s: Likewise.
+
2021-05-27 Alan Modra <amodra@gmail.com>
* config/tc-nds32.c (do_pseudo_push_bhwd, do_pseudo_pop_bhwd),
diff --git a/gas/testsuite/gas/ppc/vsx.d b/gas/testsuite/gas/ppc/vsx.d
index 0fbbf75..7aa9f19 100644
--- a/gas/testsuite/gas/ppc/vsx.d
+++ b/gas/testsuite/gas/ppc/vsx.d
@@ -170,4 +170,8 @@ Disassembly of section \.text:
.*: (7d 0a a6 99|99 a6 0a 7d) lxvd2x vs40,r10,r20
.*: (7d 00 a7 99|99 a7 00 7d) stxvd2x vs40,0,r20
.*: (7d 0a a7 99|99 a7 0a 7d) stxvd2x vs40,r10,r20
+.*: (f1 12 95 17|17 95 12 f1) xxlnot vs40,vs50
+.*: (f1 12 95 17|17 95 12 f1) xxlnot vs40,vs50
+.*: (f1 12 94 97|97 94 12 f1) xxmr vs40,vs50
+.*: (f1 12 94 97|97 94 12 f1) xxmr vs40,vs50
#pass
diff --git a/gas/testsuite/gas/ppc/vsx.s b/gas/testsuite/gas/ppc/vsx.s
index 716174c..cd02a6e 100644
--- a/gas/testsuite/gas/ppc/vsx.s
+++ b/gas/testsuite/gas/ppc/vsx.s
@@ -162,3 +162,7 @@ start:
lxvd2x 40,10,20
stxvd2x 40,0,20
stxvd2x 40,10,20
+ xxlnot 40,50
+ xxlnor 40,50,50
+ xxmr 40,50
+ xxlor 40,50,50
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index fcb30c3..7ba0c02 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,7 @@
+2021-05-27 Peter Bergner <bergner@linux.ibm.com>
+
+ * ppc-opc.c (powerpc_opcodes) <xxmr, xxlnot>: New extended mnemonics.
+
2021-05-25 Alan Modra <amodra@gmail.com>
* cris-desc.c: Regenerate.
diff --git a/opcodes/ppc-opc.c b/opcodes/ppc-opc.c
index 272dc09..84b885a 100644
--- a/opcodes/ppc-opc.c
+++ b/opcodes/ppc-opc.c
@@ -8516,6 +8516,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"xsrsp", XX2(60,281), XX2_MASK, PPCVSX2, PPCVLE, {XT6, XB6}},
{"xsmaxjdp", XX3(60,144), XX3_MASK, PPCVSX3, PPCVLE, {XT6, XA6, XB6}},
{"xsnmsubasp", XX3(60,145), XX3_MASK, PPCVSX2, PPCVLE, {XT6, XA6, XB6}},
+{"xxmr", XX3(60,146), XX3_MASK, PPCVSX, PPCVLE, {XT6, XAB6}},
{"xxlor", XX3(60,146), XX3_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6}},
{"xscvuxdsp", XX2(60,296), XX2_MASK, PPCVSX2, PPCVLE, {XT6, XB6}},
{"xststdcsp", XX2(60,298), XX2BFD_MASK, PPCVSX3, PPCVLE, {BF, XB6, DCMX}},
@@ -8525,6 +8526,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"xscvsxdsp", XX2(60,312), XX2_MASK, PPCVSX2, PPCVLE, {XT6, XB6}},
{"xsmaxdp", XX3(60,160), XX3_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6}},
{"xsnmaddadp", XX3(60,161), XX3_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6}},
+{"xxlnot", XX3(60,162), XX3_MASK, PPCVSX, PPCVLE, {XT6, XAB6}},
{"xxlnor", XX3(60,162), XX3_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6}},
{"xscvdpuxds", XX2(60,328), XX2_MASK, PPCVSX, PPCVLE, {XT6, XB6}},
{"xscvspdp", XX2(60,329), XX2_MASK, PPCVSX, PPCVLE, {XT6, XB6}},