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-rw-r--r--gas/ChangeLog12
-rw-r--r--gas/config/tc-arm.c13
-rw-r--r--gas/doc/c-arm.texi2
-rw-r--r--gas/testsuite/gas/arm/predres-bad.d4
-rw-r--r--gas/testsuite/gas/arm/predres-bad.l4
-rw-r--r--gas/testsuite/gas/arm/predres.s6
-rw-r--r--gas/testsuite/gas/arm/predres1.d11
-rw-r--r--gas/testsuite/gas/arm/predres2.d11
-rw-r--r--include/ChangeLog5
-rw-r--r--include/opcode/arm.h4
10 files changed, 71 insertions, 1 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog
index 9bdeb22..9b6afa1 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,5 +1,17 @@
2018-10-05 Sudakshina Das <sudi.das@arm.com>
+ * config/tc-arm.c (arm_ext_predres): New.
+ (insns): Add new cfprctx, dvprctx and cpprctx instructions.
+ (arm_extensions): Add "predres".
+ * doc/c-arm.texi: Document the above.
+ * testsuite/gas/arm/predres-bad.d: New test.
+ * testsuite/gas/arm/predres-bad.l: New test.
+ * testsuite/gas/arm/predres.s: New test.
+ * testsuite/gas/arm/predres1.d: New test.
+ * testsuite/gas/arm/predres2.d: New test.
+
+2018-10-05 Sudakshina Das <sudi.das@arm.com>
+
* config/tc-arm.c (arm_ext_sb): New.
(insns): Add new sb instruction.
(arm_extensions): Add "sb".
diff --git a/gas/config/tc-arm.c b/gas/config/tc-arm.c
index 1ecaa45..80fb0c3 100644
--- a/gas/config/tc-arm.c
+++ b/gas/config/tc-arm.c
@@ -258,6 +258,8 @@ static const arm_feature_set arm_ext_v8_3 =
ARM_FEATURE_CORE_HIGH (ARM_EXT2_V8_3A);
static const arm_feature_set arm_ext_sb =
ARM_FEATURE_CORE_HIGH (ARM_EXT2_SB);
+static const arm_feature_set arm_ext_predres =
+ ARM_FEATURE_CORE_HIGH (ARM_EXT2_PREDRES);
static const arm_feature_set arm_arch_any = ARM_ANY;
#ifdef OBJ_ELF
@@ -21525,6 +21527,14 @@ static const struct asm_opcode insns[] =
#define THUMB_VARIANT & arm_ext_sb
TUF("sb", 57ff070, f3bf8f70, 0, (), noargs, noargs),
+#undef ARM_VARIANT
+#define ARM_VARIANT & arm_ext_predres
+#undef THUMB_VARIANT
+#define THUMB_VARIANT & arm_ext_predres
+ CE("cfprctx", e070f93, 1, (RRnpc), rd),
+ CE("dvprctx", e070fb3, 1, (RRnpc), rd),
+ CE("cpprctx", e070ff3, 1, (RRnpc), rd),
+
/* ARMv8-M instructions. */
#undef ARM_VARIANT
#define ARM_VARIANT NULL
@@ -26421,6 +26431,9 @@ static const struct arm_option_extension_value_table arm_extensions[] =
ARM_EXT_OPT ("pan", ARM_FEATURE_CORE_HIGH (ARM_EXT2_PAN),
ARM_FEATURE (ARM_EXT_V8, ARM_EXT2_PAN, 0),
ARM_FEATURE_CORE_HIGH (ARM_EXT2_V8A)),
+ ARM_EXT_OPT ("predres", ARM_FEATURE_CORE_HIGH (ARM_EXT2_PREDRES),
+ ARM_FEATURE_CORE_HIGH (ARM_EXT2_PREDRES),
+ ARM_ARCH_V8A),
ARM_EXT_OPT ("ras", ARM_FEATURE_CORE_HIGH (ARM_EXT2_RAS),
ARM_FEATURE (ARM_EXT_V8, ARM_EXT2_RAS, 0),
ARM_FEATURE_CORE_HIGH (ARM_EXT2_V8A)),
diff --git a/gas/doc/c-arm.texi b/gas/doc/c-arm.texi
index 18008c4..835777a 100644
--- a/gas/doc/c-arm.texi
+++ b/gas/doc/c-arm.texi
@@ -189,6 +189,8 @@ The following extensions are currently supported:
@code{mp} (Multiprocessing Extensions for v7-A and v7-R
architectures),
@code{os} (Operating System for v6M architecture),
+@code{predres} (Execution and Data Prediction Restriction Instruction for
+v8-A architectures, added by default from v8.5-A),
@code{sb} (Speculation Barrier Instruction for v8-A architectures, added by
default from v8.5-A),
@code{sec} (Security Extensions for v6K and v7-A architectures),
diff --git a/gas/testsuite/gas/arm/predres-bad.d b/gas/testsuite/gas/arm/predres-bad.d
new file mode 100644
index 0000000..8ddc8ee
--- /dev/null
+++ b/gas/testsuite/gas/arm/predres-bad.d
@@ -0,0 +1,4 @@
+#name: Error for Prediction Restriction instructions without +predres
+#source: predres.s
+#as: -march=armv8-a
+#error_output: predres-bad.l
diff --git a/gas/testsuite/gas/arm/predres-bad.l b/gas/testsuite/gas/arm/predres-bad.l
new file mode 100644
index 0000000..3f7efc6
--- /dev/null
+++ b/gas/testsuite/gas/arm/predres-bad.l
@@ -0,0 +1,4 @@
+[^:]*: Assembler messages:
+[^:]*:4: Error: selected processor does not support `cfprctx r1' in ARM mode
+[^:]*:5: Error: selected processor does not support `dvprctx r2' in ARM mode
+[^:]*:6: Error: selected processor does not support `cpprctx r3' in ARM mode
diff --git a/gas/testsuite/gas/arm/predres.s b/gas/testsuite/gas/arm/predres.s
new file mode 100644
index 0000000..6cfb1f1
--- /dev/null
+++ b/gas/testsuite/gas/arm/predres.s
@@ -0,0 +1,6 @@
+@ Test case to validate Prediction Restriction Instructions
+.section .text
+.syntax unified
+ cfprctx r1
+ dvprctx r2
+ cpprctx r3
diff --git a/gas/testsuite/gas/arm/predres1.d b/gas/testsuite/gas/arm/predres1.d
new file mode 100644
index 0000000..b3a900a
--- /dev/null
+++ b/gas/testsuite/gas/arm/predres1.d
@@ -0,0 +1,11 @@
+#name: Execution and Data Prediction Restriction instructions
+#source: predres.s
+#as: -march=armv8.5-a
+#objdump: -dr --prefix-addresses --show-raw-insn
+
+.*: *file format .*arm.*
+
+Disassembly of section .text:
+.*> ee071f93 mcr 15, 0, r1, cr7, cr3, \{4\}
+.*> ee072fb3 mcr 15, 0, r2, cr7, cr3, \{5\}
+.*> ee073ff3 mcr 15, 0, r3, cr7, cr3, \{7\}
diff --git a/gas/testsuite/gas/arm/predres2.d b/gas/testsuite/gas/arm/predres2.d
new file mode 100644
index 0000000..d17cf06
--- /dev/null
+++ b/gas/testsuite/gas/arm/predres2.d
@@ -0,0 +1,11 @@
+#name: Execution and Data Prediction Restriction instructions with +predres
+#source: predres.s
+#as: -march=armv8-a+predres
+#objdump: -dr --prefix-addresses --show-raw-insn
+
+.*: *file format .*arm.*
+
+Disassembly of section .text:
+.*> ee071f93 mcr 15, 0, r1, cr7, cr3, \{4\}
+.*> ee072fb3 mcr 15, 0, r2, cr7, cr3, \{5\}
+.*> ee073ff3 mcr 15, 0, r3, cr7, cr3, \{7\}
diff --git a/include/ChangeLog b/include/ChangeLog
index c78101f..4d129ac 100644
--- a/include/ChangeLog
+++ b/include/ChangeLog
@@ -1,5 +1,10 @@
2018-10-05 Sudakshina Das <sudi.das@arm.com>
+ * opcode/arm.h (ARM_EXT2_PREDRES): New.
+ (ARM_ARCH_V8_5A): Add ARM_EXT2_PREDRES by default.
+
+2018-10-05 Sudakshina Das <sudi.das@arm.com>
+
* opcode/arm.h (ARM_EXT2_SB): New.
(ARM_ARCH_V8_5A): Add ARM_EXT2_SB by default.
diff --git a/include/opcode/arm.h b/include/opcode/arm.h
index c595799..71c4306 100644
--- a/include/opcode/arm.h
+++ b/include/opcode/arm.h
@@ -70,6 +70,7 @@
#define ARM_EXT2_FP16_FML 0x00000800 /* ARM V8.2A FP16-FML instructions. */
#define ARM_EXT2_V8_5A 0x00001000 /* ARM V8.5A. */
#define ARM_EXT2_SB 0x00002000 /* Speculation Barrier instruction. */
+#define ARM_EXT2_PREDRES 0x00004000 /* Prediction Restriction insns. */
/* Co-processor space extensions. */
#define ARM_CEXT_XSCALE 0x00000001 /* Allow MIA etc. */
@@ -297,7 +298,8 @@
CRC_EXT_ARMV8 | FPU_NEON_EXT_RDMA \
| FPU_NEON_EXT_DOTPROD)
#define ARM_ARCH_V8_5A ARM_FEATURE (ARM_AEXT_V8A, \
- ARM_AEXT2_V8_5A | ARM_EXT2_SB, \
+ ARM_AEXT2_V8_5A | ARM_EXT2_SB \
+ | ARM_EXT2_PREDRES, \
CRC_EXT_ARMV8 | FPU_NEON_EXT_RDMA \
| FPU_NEON_EXT_DOTPROD)
#define ARM_ARCH_V8M_BASE ARM_FEATURE_CORE (ARM_AEXT_V8M_BASE, ARM_AEXT2_V8M)
generated by cgit v1.1 at 2024-11-16 18:28:55 +0000