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-rw-r--r--sim/testsuite/ChangeLog7
-rw-r--r--sim/testsuite/sim/m32r/xor.cgs16
2 files changed, 22 insertions, 1 deletions
diff --git a/sim/testsuite/ChangeLog b/sim/testsuite/ChangeLog
index d6c998f..22de6ee 100644
--- a/sim/testsuite/ChangeLog
+++ b/sim/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+Thu Feb 19 11:15:45 1998 Nick Clifton <nickc@cygnus.com>
+
+ * sim/m32r/xor3.cgs: Test xor3 instruction.
+ * sim/m32r/xor.cgs: Test xor instruction.
+
Tue Feb 17 12:46:05 1998 Doug Evans <devans@seba.cygnus.com>
* config/default.exp: New file.
@@ -8,7 +13,7 @@ Tue Feb 17 12:46:05 1998 Doug Evans <devans@seba.cygnus.com>
(arch): Define.
(RUNTEST_FOR_TARGET): Delete.
(RUNTEST): Fix.
- (SCHEME,SCHEMEFLAGS,CGENDIR,CGENFLAGS,CGENFILES): Define.
+ (SCHEME,SCHEMEFLAGS,CGENDIR,CGENFLAGS): Define.
(check): Depend on site.exp. Run dejagnu.
(site.exp): New target.
(cgen): New target.
diff --git a/sim/testsuite/sim/m32r/xor.cgs b/sim/testsuite/sim/m32r/xor.cgs
new file mode 100644
index 0000000..c554681
--- /dev/null
+++ b/sim/testsuite/sim/m32r/xor.cgs
@@ -0,0 +1,16 @@
+# m32r testcase for xor $dr,$sr
+# mach(): m32r m32rx
+
+ .include "testutils.inc"
+
+ start
+
+ .global xor
+xor:
+
+ mvi_h_gr r4, 3
+ mvi_h_gr r5, 6
+ xor r4, r5
+ test_h_gr r4, 5
+
+ pass