diff options
| -rw-r--r-- | gas/ChangeLog | 6 | ||||
| -rw-r--r-- | gas/testsuite/gas/i386/i386.exp | 1 | ||||
| -rw-r--r-- | gas/testsuite/gas/i386/x86-64-nosse2.l | 15 | ||||
| -rw-r--r-- | gas/testsuite/gas/i386/x86-64-nosse2.s | 9 | ||||
| -rw-r--r-- | opcodes/ChangeLog | 6 | ||||
| -rw-r--r-- | opcodes/i386-opc.tbl | 4 | ||||
| -rw-r--r-- | opcodes/i386-tbl.h | 4 |
7 files changed, 41 insertions, 4 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index f6c350d..4f6bcf7 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,9 @@ +2021-03-26 Jan Beulich <jbeulich@suse.com> + + * testsuite/gas/i386/x86-64-nosse2.s, + testsuite/gas/i386/x86-64-nosse2.l: New. + * testsuite/gas/i386/i386.exp: Run new test. + 2021-03-25 Abid Qadeer <abidh@codesourcery.com> * testsuite/gas/nios2/brn.d: New. diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp index 2282f52..e1dab45 100644 --- a/gas/testsuite/gas/i386/i386.exp +++ b/gas/testsuite/gas/i386/i386.exp @@ -826,6 +826,7 @@ if [gas_64_check] then { run_list_test "noreg-intel64" "-I${srcdir}/$subdir -mintel64" run_list_test "movx64" "-al" run_list_test "cvtsi2sX" + run_list_test "x86-64-nosse2" "-al" run_dump_test "x86-64-sse4_1" run_dump_test "x86-64-sse4_1-intel" run_dump_test "x86-64-sse4_2" diff --git a/gas/testsuite/gas/i386/x86-64-nosse2.l b/gas/testsuite/gas/i386/x86-64-nosse2.l new file mode 100644 index 0000000..2404dc3 --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-nosse2.l @@ -0,0 +1,15 @@ +.*: Assembler messages: +.*:6: Error: .*paddb.* +.*:7: Error: .*movq.* +.*:8: Error: .*movq.* +GAS LISTING .* +#... +[ ]*1[ ]+\# Test \.arch \.nosse2 +[ ]*2[ ]+\.text +[ ]*3[ ]+\.arch generic64 +[ ]*4[ ]+\.arch \.nosse2 +[ ]*5[ ]+\?\?\?\? 0F58C0 addps %xmm0, %xmm0 +[ ]*6[ ]+paddb %xmm0, %xmm0 +[ ]*7[ ]+movq %xmm0, %rax +[ ]*8[ ]+movq %rax, %xmm0 +#pass diff --git a/gas/testsuite/gas/i386/x86-64-nosse2.s b/gas/testsuite/gas/i386/x86-64-nosse2.s new file mode 100644 index 0000000..b151ac2 --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-nosse2.s @@ -0,0 +1,9 @@ +# Test .arch .nosse2 + .text + .arch generic64 + .arch .nosse2 + addps %xmm0, %xmm0 + paddb %xmm0, %xmm0 + movq %xmm0, %rax + movq %rax, %xmm0 + .p2align 4 diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 53d7340..0e2e94c 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,9 @@ +2021-03-26 Jan Beulich <jbeulich@suse.com> + + * i386-opc.tbl (movq): Add CpuSSE2 to SSE2 form. Add CpuMMX to + MMX form. + * i386-tbl.h: Re-generate. + 2021-03-25 Abid Qadeer <abidh@codesourcery.com> * nios2-dis.c (nios2_print_insn_arg): Fix sign extension of diff --git a/opcodes/i386-opc.tbl b/opcodes/i386-opc.tbl index 721e94e..49ff868 100644 --- a/opcodes/i386-opc.tbl +++ b/opcodes/i386-opc.tbl @@ -972,9 +972,9 @@ movq, 0x66d6, None, CpuAVX, Modrm|Vex=1|Space0F|VexWIG|No_bSuf|No_wSuf|No_lSuf|N movq, 0x666e, None, CpuAVX|Cpu64, D|Modrm|Vex=1|Space0F|VexW1|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|Size64|SSE2AVX, { Reg64|Unspecified|BaseIndex, RegXMM } movq, 0x0f7e, None, CpuSSE2, Prefix_0XF3|Load|Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|NoRex64, { Unspecified|Qword|BaseIndex|RegXMM, RegXMM } movq, 0x0fd6, None, CpuSSE2, Prefix_0X66|Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|NoRex64, { RegXMM, Unspecified|Qword|BaseIndex|RegXMM } -movq, 0x0f6e, None, Cpu64, Prefix_0X66|D|Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|Size64, { Reg64|Unspecified|BaseIndex, RegXMM } +movq, 0x0f6e, None, CpuSSE2|Cpu64, Prefix_0X66|D|Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|Size64, { Reg64|Unspecified|BaseIndex, RegXMM } movq, 0xf6f, None, CpuMMX, D|Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|NoRex64, { Unspecified|Qword|BaseIndex|RegMMX, RegMMX } -movq, 0xf6e, None, Cpu64, D|Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|Size64, { Reg64|Unspecified|BaseIndex, RegMMX } +movq, 0xf6e, None, CpuMMX|Cpu64, D|Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|Size64, { Reg64|Unspecified|BaseIndex, RegMMX } // The segment register moves accept Reg64 so that a segment register // can be copied to a 64 bit register, and vice versa. movq, 0x8c, None, Cpu64, D|RegMem|Size64|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { SReg, Reg64 } diff --git a/opcodes/i386-tbl.h b/opcodes/i386-tbl.h index 337bf18..72585a2 100644 --- a/opcodes/i386-tbl.h +++ b/opcodes/i386-tbl.h @@ -9847,7 +9847,7 @@ const insn_template i386_optab[] = { 1, 0, 0, 1, 0, 0, 0, 3, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, @@ -9877,7 +9877,7 @@ const insn_template i386_optab[] = { 1, 0, 0, 1, 0, 0, 0, 3, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, |