diff options
| -rw-r--r-- | gas/config/tc-i386.c | 36 | ||||
| -rw-r--r-- | gas/testsuite/gas/i386/optimize-1.d | 10 | ||||
| -rw-r--r-- | gas/testsuite/gas/i386/optimize-1.s | 13 | ||||
| -rw-r--r-- | gas/testsuite/gas/i386/optimize-1a.d | 10 | ||||
| -rw-r--r-- | gas/testsuite/gas/i386/optimize-4.d | 10 | ||||
| -rw-r--r-- | gas/testsuite/gas/i386/optimize-5.d | 10 | ||||
| -rw-r--r-- | gas/testsuite/gas/i386/x86-64-optimize-1.d | 13 | ||||
| -rw-r--r-- | gas/testsuite/gas/i386/x86-64-optimize-1.s | 13 | ||||
| -rw-r--r-- | opcodes/i386-opc.tbl | 8 | ||||
| -rw-r--r-- | opcodes/i386-tbl.h | 8 |
10 files changed, 123 insertions, 8 deletions
diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c index 7cd50f5..d54cb65 100644 --- a/gas/config/tc-i386.c +++ b/gas/config/tc-i386.c @@ -4362,6 +4362,42 @@ optimize_encoding (void) */ i.tm.base_opcode = 0x84 | (i.tm.base_opcode & 1); } + else if (i.tm.base_opcode == 0xba + && i.tm.opcode_space == SPACE_0F + && i.reg_operands == 1 + && i.op[0].imms->X_op == O_constant + && i.op[0].imms->X_add_number >= 0) + { + /* Optimize: -O: + btw $n, %rN -> btl $n, %rN (outside of 16-bit mode, n < 16) + btq $n, %rN -> btl $n, %rN (in 64-bit mode, n < 32, N < 8) + btl $n, %rN -> btw $n, %rN (in 16-bit mode, n < 16) + + With <BT> one of bts, btr, and bts also: + <BT>w $n, %rN -> btl $n, %rN (in 32-bit mode, n < 16) + <BT>l $n, %rN -> btw $n, %rN (in 16-bit mode, n < 16) + */ + switch (flag_code) + { + case CODE_64BIT: + if (i.tm.extension_opcode != 4) + break; + if (i.types[1].bitfield.qword + && i.op[0].imms->X_add_number < 32 + && !(i.op[1].regs->reg_flags & RegRex)) + i.tm.opcode_modifier.size = SIZE32; + /* Fall through. */ + case CODE_32BIT: + if (i.types[1].bitfield.word + && i.op[0].imms->X_add_number < 16) + i.tm.opcode_modifier.size = SIZE32; + break; + case CODE_16BIT: + if (i.op[0].imms->X_add_number < 16) + i.tm.opcode_modifier.size = SIZE16; + break; + } + } else if (i.reg_operands == 3 && i.op[0].regs == i.op[1].regs && !i.types[2].bitfield.xmmword diff --git a/gas/testsuite/gas/i386/optimize-1.d b/gas/testsuite/gas/i386/optimize-1.d index 9c5f423..f6c54b7 100644 --- a/gas/testsuite/gas/i386/optimize-1.d +++ b/gas/testsuite/gas/i386/optimize-1.d @@ -147,4 +147,14 @@ Disassembly of section .text: +[a-f0-9]+: 62 .* vporq 0x80\(%eax\),%ymm2,%ymm3 +[a-f0-9]+: 62 .* vpxord 0x80\(%eax\),%ymm2,%ymm3 +[a-f0-9]+: 62 .* vpxorq 0x80\(%eax\),%ymm2,%ymm3 + +[a-f0-9]+: 0f ba e0 0f bt \$0xf,%eax + +[a-f0-9]+: 66 0f ba e0 10 bt \$0x10,%ax + +[a-f0-9]+: 0f ba f8 0f btc \$0xf,%eax + +[a-f0-9]+: 0f ba f0 0f btr \$0xf,%eax + +[a-f0-9]+: 0f ba e8 0f bts \$0xf,%eax + +[a-f0-9]+: 0f ba e0 0f bt \$0xf,%eax + +[a-f0-9]+: 66 0f ba e0 10 bt \$0x10,%ax + +[a-f0-9]+: 0f ba f8 0f btc \$0xf,%eax + +[a-f0-9]+: 0f ba f0 0f btr \$0xf,%eax + +[a-f0-9]+: 0f ba e8 0f bts \$0xf,%eax #pass diff --git a/gas/testsuite/gas/i386/optimize-1.s b/gas/testsuite/gas/i386/optimize-1.s index b41a960..53a0dd7 100644 --- a/gas/testsuite/gas/i386/optimize-1.s +++ b/gas/testsuite/gas/i386/optimize-1.s @@ -170,3 +170,16 @@ _start: vporq 128(%eax), %ymm2, %ymm3 vpxord 128(%eax), %ymm2, %ymm3 vpxorq 128(%eax), %ymm2, %ymm3 + + bt $15, %ax + bt $16, %ax + btc $15, %ax + btr $15, %ax + bts $15, %ax + + .code16 + bt $15, %eax + bt $16, %eax + btc $15, %eax + btr $15, %eax + bts $15, %eax diff --git a/gas/testsuite/gas/i386/optimize-1a.d b/gas/testsuite/gas/i386/optimize-1a.d index bdac985..d0bf1b4 100644 --- a/gas/testsuite/gas/i386/optimize-1a.d +++ b/gas/testsuite/gas/i386/optimize-1a.d @@ -148,4 +148,14 @@ Disassembly of section .text: +[a-f0-9]+: 62 .* vporq 0x80\(%eax\),%ymm2,%ymm3 +[a-f0-9]+: 62 .* vpxord 0x80\(%eax\),%ymm2,%ymm3 +[a-f0-9]+: 62 .* vpxorq 0x80\(%eax\),%ymm2,%ymm3 + +[a-f0-9]+: 0f ba e0 0f bt \$0xf,%eax + +[a-f0-9]+: 66 0f ba e0 10 bt \$0x10,%ax + +[a-f0-9]+: 0f ba f8 0f btc \$0xf,%eax + +[a-f0-9]+: 0f ba f0 0f btr \$0xf,%eax + +[a-f0-9]+: 0f ba e8 0f bts \$0xf,%eax + +[a-f0-9]+: 0f ba e0 0f bt \$0xf,%eax + +[a-f0-9]+: 66 0f ba e0 10 bt \$0x10,%ax + +[a-f0-9]+: 0f ba f8 0f btc \$0xf,%eax + +[a-f0-9]+: 0f ba f0 0f btr \$0xf,%eax + +[a-f0-9]+: 0f ba e8 0f bts \$0xf,%eax #pass diff --git a/gas/testsuite/gas/i386/optimize-4.d b/gas/testsuite/gas/i386/optimize-4.d index 1c7cbed..092d078 100644 --- a/gas/testsuite/gas/i386/optimize-4.d +++ b/gas/testsuite/gas/i386/optimize-4.d @@ -147,6 +147,16 @@ Disassembly of section .text: +[a-f0-9]+: 62 .* vporq 0x80\(%eax\),%ymm2,%ymm3 +[a-f0-9]+: 62 .* vpxord 0x80\(%eax\),%ymm2,%ymm3 +[a-f0-9]+: 62 .* vpxorq 0x80\(%eax\),%ymm2,%ymm3 + +[a-f0-9]+: 0f ba e0 0f bt \$0xf,%eax + +[a-f0-9]+: 66 0f ba e0 10 bt \$0x10,%ax + +[a-f0-9]+: 0f ba f8 0f btc \$0xf,%eax + +[a-f0-9]+: 0f ba f0 0f btr \$0xf,%eax + +[a-f0-9]+: 0f ba e8 0f bts \$0xf,%eax + +[a-f0-9]+: 0f ba e0 0f bt \$0xf,%eax + +[a-f0-9]+: 66 0f ba e0 10 bt \$0x10,%ax + +[a-f0-9]+: 0f ba f8 0f btc \$0xf,%eax + +[a-f0-9]+: 0f ba f0 0f btr \$0xf,%eax + +[a-f0-9]+: 0f ba e8 0f bts \$0xf,%eax +[a-f0-9]+: 62 f1 f5 08 55 e9 \{evex\} vandnpd %xmm1,%xmm1,%xmm5 +[a-f0-9]+: 62 f1 f5 08 55 e9 \{evex\} vandnpd %xmm1,%xmm1,%xmm5 #pass diff --git a/gas/testsuite/gas/i386/optimize-5.d b/gas/testsuite/gas/i386/optimize-5.d index 18f7dff..1d1397b 100644 --- a/gas/testsuite/gas/i386/optimize-5.d +++ b/gas/testsuite/gas/i386/optimize-5.d @@ -147,6 +147,16 @@ Disassembly of section .text: +[a-f0-9]+: 62 .* vporq 0x80\(%eax\),%ymm2,%ymm3 +[a-f0-9]+: 62 .* vpxord 0x80\(%eax\),%ymm2,%ymm3 +[a-f0-9]+: 62 .* vpxorq 0x80\(%eax\),%ymm2,%ymm3 + +[a-f0-9]+: 0f ba e0 0f bt \$0xf,%eax + +[a-f0-9]+: 66 0f ba e0 10 bt \$0x10,%ax + +[a-f0-9]+: 0f ba f8 0f btc \$0xf,%eax + +[a-f0-9]+: 0f ba f0 0f btr \$0xf,%eax + +[a-f0-9]+: 0f ba e8 0f bts \$0xf,%eax + +[a-f0-9]+: 0f ba e0 0f bt \$0xf,%eax + +[a-f0-9]+: 66 0f ba e0 10 bt \$0x10,%ax + +[a-f0-9]+: 0f ba f8 0f btc \$0xf,%eax + +[a-f0-9]+: 0f ba f0 0f btr \$0xf,%eax + +[a-f0-9]+: 0f ba e8 0f bts \$0xf,%eax +[a-f0-9]+: 62 f1 f5 08 55 e9 \{evex\} vandnpd %xmm1,%xmm1,%xmm5 +[a-f0-9]+: 62 f1 f5 08 55 e9 \{evex\} vandnpd %xmm1,%xmm1,%xmm5 +[a-f0-9]+: 62 f1 7d 28 6f d1 vmovdqa32 %ymm1,%ymm2 diff --git a/gas/testsuite/gas/i386/x86-64-optimize-1.d b/gas/testsuite/gas/i386/x86-64-optimize-1.d index aa61261..8bcc90c 100644 --- a/gas/testsuite/gas/i386/x86-64-optimize-1.d +++ b/gas/testsuite/gas/i386/x86-64-optimize-1.d @@ -58,4 +58,17 @@ Disassembly of section .text: +[a-f0-9]+: 48 b8 00 00 00 00 01 00 00 00 movabs \$0x100000000,%rax +[a-f0-9]+: 31 c0 xor %eax,%eax +[a-f0-9]+: 45 31 f6 xor %r14d,%r14d + +[a-f0-9]+: 0f ba e0 0f bt \$0xf,%eax + +[a-f0-9]+: 66 0f ba e0 10 bt \$0x10,%ax + +[a-f0-9]+: 41 0f ba e0 0f bt \$0xf,%r8d + +[a-f0-9]+: 66 41 0f ba e0 10 bt \$0x10,%r8w + +[a-f0-9]+: 0f ba e0 1f bt \$0x1f,%eax + +[a-f0-9]+: 48 0f ba e0 20 bt \$0x20,%rax + +[a-f0-9]+: 49 0f ba e0 1f bt \$0x1f,%r8 + +[a-f0-9]+: 66 0f ba f8 0f btc \$0xf,%ax + +[a-f0-9]+: 48 0f ba f8 1f btc \$0x1f,%rax + +[a-f0-9]+: 66 0f ba f0 0f btr \$0xf,%ax + +[a-f0-9]+: 48 0f ba f0 1f btr \$0x1f,%rax + +[a-f0-9]+: 66 0f ba e8 0f bts \$0xf,%ax + +[a-f0-9]+: 48 0f ba e8 1f bts \$0x1f,%rax #pass diff --git a/gas/testsuite/gas/i386/x86-64-optimize-1.s b/gas/testsuite/gas/i386/x86-64-optimize-1.s index b83ecb0..8042155 100644 --- a/gas/testsuite/gas/i386/x86-64-optimize-1.s +++ b/gas/testsuite/gas/i386/x86-64-optimize-1.s @@ -53,3 +53,16 @@ _start: movq $0x100000000,%rax clrq %rax clrq %r14 + bt $15, %ax + bt $16, %ax + bt $15, %r8w + bt $16, %r8w + bt $31, %rax + bt $32, %rax + bt $31, %r8 + btc $15, %ax + btc $31, %rax + btr $15, %ax + btr $31, %rax + bts $15, %ax + bts $31, %rax diff --git a/opcodes/i386-opc.tbl b/opcodes/i386-opc.tbl index 7355f3c..5bd7595 100644 --- a/opcodes/i386-opc.tbl +++ b/opcodes/i386-opc.tbl @@ -536,13 +536,13 @@ xlat, 0xd7, 0, No_wSuf|No_lSuf|No_sSuf|No_qSuf|IsString, { Byte|Unspecified|Base bsf, 0xfbc, i386, Modrm|CheckOperandSize|No_bSuf|No_sSuf|RepPrefixOk, { Reg16|Reg32|Reg64|Word|Dword|Qword|Unspecified|BaseIndex, Reg16|Reg32|Reg64 } bsr, 0xfbd, i386, Modrm|CheckOperandSize|No_bSuf|No_sSuf|RepPrefixOk, { Reg16|Reg32|Reg64|Word|Dword|Qword|Unspecified|BaseIndex, Reg16|Reg32|Reg64 } bt, 0xfa3, i386, Modrm|CheckOperandSize|No_bSuf|No_sSuf, { Reg16|Reg32|Reg64, Reg16|Reg32|Reg64|Word|Dword|Qword|Unspecified|BaseIndex } -bt, 0xfba/4, i386, Modrm|No_bSuf|No_sSuf, { Imm8, Reg16|Reg32|Reg64|Word|Dword|Qword|Unspecified|BaseIndex } +bt, 0xfba/4, i386, Modrm|No_bSuf|No_sSuf|Optimize, { Imm8, Reg16|Reg32|Reg64|Unspecified|BaseIndex } btc, 0xfbb, i386, Modrm|CheckOperandSize|No_bSuf|No_sSuf|HLEPrefixLock, { Reg16|Reg32|Reg64, Reg16|Reg32|Reg64|Word|Dword|Qword|Unspecified|BaseIndex } -btc, 0xfba/7, i386, Modrm|No_bSuf|No_sSuf|HLEPrefixLock, { Imm8, Reg16|Reg32|Reg64|Word|Dword|Qword|Unspecified|BaseIndex } +btc, 0xfba/7, i386, Modrm|No_bSuf|No_sSuf|Optimize|HLEPrefixLock, { Imm8, Reg16|Reg32|Reg64|Unspecified|BaseIndex } btr, 0xfb3, i386, Modrm|CheckOperandSize|No_bSuf|No_sSuf|HLEPrefixLock, { Reg16|Reg32|Reg64, Reg16|Reg32|Reg64|Word|Dword|Qword|Unspecified|BaseIndex } -btr, 0xfba/6, i386, Modrm|No_bSuf|No_sSuf|HLEPrefixLock, { Imm8, Reg16|Reg32|Reg64|Word|Dword|Qword|Unspecified|BaseIndex } +btr, 0xfba/6, i386, Modrm|No_bSuf|No_sSuf|Optimize|HLEPrefixLock, { Imm8, Reg16|Reg32|Reg64|Unspecified|BaseIndex } bts, 0xfab, i386, Modrm|CheckOperandSize|No_bSuf|No_sSuf|HLEPrefixLock, { Reg16|Reg32|Reg64, Reg16|Reg32|Reg64|Word|Dword|Qword|Unspecified|BaseIndex } -bts, 0xfba/5, i386, Modrm|No_bSuf|No_sSuf|HLEPrefixLock, { Imm8, Reg16|Reg32|Reg64|Word|Dword|Qword|Unspecified|BaseIndex } +bts, 0xfba/5, i386, Modrm|No_bSuf|No_sSuf|Optimize|HLEPrefixLock, { Imm8, Reg16|Reg32|Reg64|Unspecified|BaseIndex } // Interrupts & op. sys insns. // See gas/config/tc-i386.c for conversion of 'int $3' into the special diff --git a/opcodes/i386-tbl.h b/opcodes/i386-tbl.h index 1c7424f..262a05d 100644 --- a/opcodes/i386-tbl.h +++ b/opcodes/i386-tbl.h @@ -4330,7 +4330,7 @@ static const insn_template i386_optab[] = 0, 0, 0, 0, 1, 0 } } } }, { MN_bt, 0xba, 2, SPACE_0F, 4, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, @@ -4358,7 +4358,7 @@ static const insn_template i386_optab[] = 0, 0, 0, 0, 1, 0 } } } }, { MN_btc, 0xba, 2, SPACE_0F, 7, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 5, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, @@ -4386,7 +4386,7 @@ static const insn_template i386_optab[] = 0, 0, 0, 0, 1, 0 } } } }, { MN_btr, 0xba, 2, SPACE_0F, 6, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 5, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, @@ -4414,7 +4414,7 @@ static const insn_template i386_optab[] = 0, 0, 0, 0, 1, 0 } } } }, { MN_bts, 0xba, 2, SPACE_0F, 5, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 5, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, |