diff options
| -rw-r--r-- | gas/config/tc-aarch64.c | 1 | ||||
| -rw-r--r-- | gas/doc/c-aarch64.texi | 2 | ||||
| -rw-r--r-- | gas/testsuite/gas/aarch64/occmo-memtag.d | 13 | ||||
| -rw-r--r-- | gas/testsuite/gas/aarch64/occmo-memtag.s | 4 | ||||
| -rw-r--r-- | gas/testsuite/gas/aarch64/occmo.d | 11 | ||||
| -rw-r--r-- | gas/testsuite/gas/aarch64/occmo.s | 8 | ||||
| -rw-r--r-- | include/opcode/aarch64.h | 2 | ||||
| -rw-r--r-- | opcodes/aarch64-opc.c | 8 |
8 files changed, 31 insertions, 18 deletions
diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c index 42a3115..b4bd1bc 100644 --- a/gas/config/tc-aarch64.c +++ b/gas/config/tc-aarch64.c @@ -10691,6 +10691,7 @@ static const struct aarch64_option_cpu_value_table aarch64_features[] = { {"rng", AARCH64_FEATURE (RNG), AARCH64_NO_FEATURES}, {"ssbs", AARCH64_FEATURE (SSBS), AARCH64_NO_FEATURES}, {"memtag", AARCH64_FEATURE (MEMTAG), AARCH64_NO_FEATURES}, + {"occmo", AARCH64_FEATURE (OCCMO), AARCH64_NO_FEATURES}, {"sve2", AARCH64_FEATURE (SVE2), AARCH64_FEATURE (SVE)}, {"sve2-sm4", AARCH64_FEATURE (SVE2_SM4), AARCH64_FEATURES (2, SVE2, SM4)}, diff --git a/gas/doc/c-aarch64.texi b/gas/doc/c-aarch64.texi index 1d5fac1..a1075a2 100644 --- a/gas/doc/c-aarch64.texi +++ b/gas/doc/c-aarch64.texi @@ -233,6 +233,8 @@ automatically cause those extensions to be disabled. @tab Enable Armv8.5-A Memory Tagging Extensions. @item @code{mops} @tab @tab Enable Armv8.8-A memcpy and memset acceleration instructions +@item @code{occmo} @tab + @tab Enable Outer Cacheable Cache Maintenance Operations. @item @code{pan} @tab @tab Enable Privileged Access Never support. @item @code{pauth} @tab diff --git a/gas/testsuite/gas/aarch64/occmo-memtag.d b/gas/testsuite/gas/aarch64/occmo-memtag.d new file mode 100644 index 0000000..0dbbab0 --- /dev/null +++ b/gas/testsuite/gas/aarch64/occmo-memtag.d @@ -0,0 +1,13 @@ +#name: FEAT_OCCMO + MEMTAG Test +#as: -march=armv8-a+occmo+memtag +#objdump: -dr + +.*: file format .* + +Disassembly of section .text: + +0+ <.*>: +[^:]*: d50b7be0 dc cgdvaoc, x0 +[^:]*: d50b7bff dc cgdvaoc, xzr +[^:]*: d50b7fe0 dc cigdvaoc, x0 +[^:]*: d50b7fff dc cigdvaoc, xzr diff --git a/gas/testsuite/gas/aarch64/occmo-memtag.s b/gas/testsuite/gas/aarch64/occmo-memtag.s new file mode 100644 index 0000000..2426dfb --- /dev/null +++ b/gas/testsuite/gas/aarch64/occmo-memtag.s @@ -0,0 +1,4 @@ + dc cgdvaoc, x0 + dc cgdvaoc, xzr + dc cigdvaoc, x0 + dc cigdvaoc, xzr diff --git a/gas/testsuite/gas/aarch64/occmo.d b/gas/testsuite/gas/aarch64/occmo.d index 388d8f4..0ec68e8 100644 --- a/gas/testsuite/gas/aarch64/occmo.d +++ b/gas/testsuite/gas/aarch64/occmo.d @@ -1,5 +1,5 @@ #name: FEAT_OCCMO Test -#as: -march=armv9.5-a+memtag +#as: -march=armv8-a+occmo #objdump: -dr .*: file format .* @@ -7,12 +7,7 @@ Disassembly of section .text: 0+ <.*>: - [^:]*: d50b7b00 dc cvaoc, x0 -[^:]*: d50b7b1e dc cvaoc, x30 -[^:]*: d50b7be0 dc cgdvaoc, x0 -[^:]*: d50b7bfe dc cgdvaoc, x30 +[^:]*: d50b7b1f dc cvaoc, xzr [^:]*: d50b7f00 dc civaoc, x0 -[^:]*: d50b7f1e dc civaoc, x30 -[^:]*: d50b7fe0 dc cigdvaoc, x0 -[^:]*: d50b7ffe dc cigdvaoc, x30 +[^:]*: d50b7f1f dc civaoc, xzr diff --git a/gas/testsuite/gas/aarch64/occmo.s b/gas/testsuite/gas/aarch64/occmo.s index 92cfaf0..750341d 100644 --- a/gas/testsuite/gas/aarch64/occmo.s +++ b/gas/testsuite/gas/aarch64/occmo.s @@ -1,8 +1,4 @@ dc cvaoc, x0 - dc cvaoc, x30 - dc cgdvaoc, x0 - dc cgdvaoc, x30 + dc cvaoc, xzr dc civaoc, x0 - dc civaoc, x30 - dc cigdvaoc, x0 - dc cigdvaoc, x30 + dc civaoc, xzr diff --git a/include/opcode/aarch64.h b/include/opcode/aarch64.h index 3efd0b2..1c7d6f1 100644 --- a/include/opcode/aarch64.h +++ b/include/opcode/aarch64.h @@ -137,6 +137,8 @@ enum aarch64_feature_bit { AARCH64_FEATURE_SSBS, /* Memory Tagging Extension. */ AARCH64_FEATURE_MEMTAG, + /* Outer Cacheable Cache Maintenance Operation. */ + AARCH64_FEATURE_OCCMO, /* Transactional Memory Extension. */ AARCH64_FEATURE_TME, /* XS memory attribute. */ diff --git a/opcodes/aarch64-opc.c b/opcodes/aarch64-opc.c index e075214..b31f663 100644 --- a/opcodes/aarch64-opc.c +++ b/opcodes/aarch64-opc.c @@ -5216,8 +5216,8 @@ const aarch64_sys_ins_reg aarch64_sys_regs_dc[] = { "cvac", CPENS (3, C7, C10, 1), F_HASXT, AARCH64_NO_FEATURES }, { "cgvac", CPENS (3, C7, C10, 3), F_HASXT | F_ARCHEXT, AARCH64_FEATURE (MEMTAG) }, { "cgdvac", CPENS (3, C7, C10, 5), F_HASXT | F_ARCHEXT, AARCH64_FEATURE (MEMTAG) }, - { "cvaoc", CPENS (3, C7, C11, 0), F_HASXT | F_ARCHEXT, AARCH64_FEATURE (V9_5A) }, - { "cgdvaoc", CPENS (3, C7, C11, 7), F_HASXT | F_ARCHEXT, AARCH64_FEATURES (2, V9_5A, MEMTAG) }, + { "cvaoc", CPENS (3, C7, C11, 0), F_HASXT | F_ARCHEXT, AARCH64_FEATURE (OCCMO) }, + { "cgdvaoc", CPENS (3, C7, C11, 7), F_HASXT | F_ARCHEXT, AARCH64_FEATURES (2, OCCMO, MEMTAG) }, { "csw", CPENS (0, C7, C10, 2), F_HASXT, AARCH64_NO_FEATURES }, { "cgsw", CPENS (0, C7, C10, 4), F_HASXT | F_ARCHEXT, AARCH64_FEATURE (MEMTAG) }, { "cgdsw", CPENS (0, C7, C10, 6), F_HASXT | F_ARCHEXT, AARCH64_FEATURE (MEMTAG) }, @@ -5234,8 +5234,8 @@ const aarch64_sys_ins_reg aarch64_sys_regs_dc[] = { "cisw", CPENS (0, C7, C14, 2), F_HASXT, AARCH64_NO_FEATURES }, { "cigsw", CPENS (0, C7, C14, 4), F_HASXT | F_ARCHEXT, AARCH64_FEATURE (MEMTAG) }, { "cigdsw", CPENS (0, C7, C14, 6), F_HASXT | F_ARCHEXT, AARCH64_FEATURE (MEMTAG) }, - { "civaoc", CPENS (3, C7, C15, 0), F_HASXT | F_ARCHEXT, AARCH64_FEATURE (V9_5A) }, - { "cigdvaoc", CPENS (3, C7, C15, 7), F_HASXT | F_ARCHEXT, AARCH64_FEATURES (2, V9_5A, MEMTAG) }, + { "civaoc", CPENS (3, C7, C15, 0), F_HASXT | F_ARCHEXT, AARCH64_FEATURE (OCCMO) }, + { "cigdvaoc", CPENS (3, C7, C15, 7), F_HASXT | F_ARCHEXT, AARCH64_FEATURES (2, OCCMO, MEMTAG) }, { "cipae", CPENS (4, C7, C14, 0), F_HASXT | F_ARCHEXT, AARCH64_FEATURE (V8_7A) }, { "cigdpae", CPENS (4, C7, C14, 7), F_HASXT | F_ARCHEXT, AARCH64_FEATURE (V8_7A) }, { "cipapa", CPENS (6, C7, C14, 1), F_HASXT, AARCH64_NO_FEATURES }, |