diff options
| -rw-r--r-- | sim/arm/ChangeLog | 9 | ||||
| -rw-r--r-- | sim/arm/armdefs.h | 4 | ||||
| -rw-r--r-- | sim/arm/armemu.h | 12 | ||||
| -rw-r--r-- | sim/arm/arminit.c | 4 | ||||
| -rw-r--r-- | sim/arm/wrapper.c | 41 |
5 files changed, 59 insertions, 11 deletions
diff --git a/sim/arm/ChangeLog b/sim/arm/ChangeLog index bdc2f36..b4ab3a4 100644 --- a/sim/arm/ChangeLog +++ b/sim/arm/ChangeLog @@ -1,5 +1,14 @@ 2000-07-04 Alexandre Oliva <aoliva@redhat.com> + * armdefs.h (struct ARMul_State): Add is_StrongARM. + (ARM_Strong_Prop, STRONGARM): Define. + * arminit.c (ARMul_NewState): Reset is_StrongARM. + (ARMul_SelectProcessor): Set is_StrongARM. + * wrapper.c (sim_create_inferior): Use bfd machine type to + determine processor type to emulate. + * armemu.h (BUSUSEDINCPCS, BUSUSEDINCPCN): Don't increment PC + when emulating StrongARM. + * armemu.c (ARMul_Emulate, t_undefined): Proceed to next insn. * armemu.h (INSN_SIZE): New macro. diff --git a/sim/arm/armdefs.h b/sim/arm/armdefs.h index d08a94c..72dae0a 100644 --- a/sim/arm/armdefs.h +++ b/sim/arm/armdefs.h @@ -123,6 +123,8 @@ struct ARMul_State const struct Dbg_HostosInterface *hostif; + unsigned is_StrongARM; /* Are we emulating a StrongARM? */ + int verbose; /* non-zero means print various messages like the banner */ }; @@ -146,6 +148,7 @@ struct ARMul_State #define ARM_Debug_Prop 0x10 #define ARM_Isync_Prop ARM_Debug_Prop #define ARM_Lock_Prop 0x20 +#define ARM_Strong_Prop 0x40 /* ARM2 family */ #define ARM2 (ARM_Fix26_Prop) @@ -164,6 +167,7 @@ struct ARMul_State #define ARM610 ARM6 #define ARM620 ARM6 +#define STRONGARM (ARM_Strong_Prop) /***************************************************************************\ * Macros to extract instruction fields * diff --git a/sim/arm/armemu.h b/sim/arm/armemu.h index de836cb..7bca8d3 100644 --- a/sim/arm/armemu.h +++ b/sim/arm/armemu.h @@ -231,10 +231,14 @@ extern ARMword isize; #define NORMALCYCLE state->NextInstr = 0 #define BUSUSEDN state->NextInstr |= 1 /* the next fetch will be an N cycle */ -#define BUSUSEDINCPCS state->Reg[15] += isize ; /* a standard PC inc and an S cycle */ \ - state->NextInstr = (state->NextInstr & 0xff) | 2 -#define BUSUSEDINCPCN state->Reg[15] += isize ; /* a standard PC inc and an N cycle */ \ - state->NextInstr |= 3 +#define BUSUSEDINCPCS do { if (! state->is_StrongARM) { \ + state->Reg[15] += isize ; /* a standard PC inc and an S cycle */ \ + state->NextInstr = (state->NextInstr & 0xff) | 2; \ + } } while (0) +#define BUSUSEDINCPCN do { if (state->is_StrongARM) BUSUSEDN; else { \ + state->Reg[15] += isize ; /* a standard PC inc and an N cycle */ \ + state->NextInstr |= 3; \ + } } while (0) #define INCPC state->Reg[15] += isize ; /* a standard PC inc */ \ state->NextInstr |= 2 #define FLUSHPIPE state->NextInstr |= PRIMEPIPE diff --git a/sim/arm/arminit.c b/sim/arm/arminit.c index 66e6dad..3ee4c69 100644 --- a/sim/arm/arminit.c +++ b/sim/arm/arminit.c @@ -124,6 +124,8 @@ ARMul_NewState (void) state->lateabtSig = LOW; state->bigendSig = LOW; + state->is_StrongARM = LOW; + ARMul_Reset (state); return (state); } @@ -147,6 +149,8 @@ ARMul_SelectProcessor (ARMul_State * state, unsigned processor) } state->lateabtSig = LOW; + + state->is_StrongARM = (processor & ARM_Strong_Prop) ? HIGH : LOW; } /***************************************************************************\ diff --git a/sim/arm/wrapper.c b/sim/arm/wrapper.c index 8fca85d..5db178c 100644 --- a/sim/arm/wrapper.c +++ b/sim/arm/wrapper.c @@ -1,5 +1,5 @@ /* run front end support for arm - Copyright (C) 1995, 1996, 1997 Free Software Foundation, Inc. + Copyright (C) 1995, 1996, 1997, 2000 Free Software Foundation, Inc. This file is part of ARM SIM. @@ -198,6 +198,7 @@ sim_create_inferior (sd, abfd, argv, env) char **env; { int argvlen = 0; + int mach; char **arg; if (abfd != NULL) @@ -205,12 +206,38 @@ sim_create_inferior (sd, abfd, argv, env) else ARMul_SetPC (state, 0); /* ??? */ - /* We explicitly select a processor capable of supporting the ARM - 32bit mode. JGS */ - ARMul_SelectProcessor (state, ARM600); - /* And then we force the simulated CPU into the 32bit User mode. */ - ARMul_SetCPSR (state, USER32MODE); - + mach = bfd_get_mach (abfd); + + switch (mach) { + default: + (*sim_callback->printf_filtered) (sim_callback, + "Unknown machine type; please update sim_create_inferior.\n"); + /* fall through */ + + case 0: /* arm */ + /* We wouldn't set the machine type with earlier toolchains, so we + explicitly select a processor capable of supporting all ARM + 32bit mode. */ + /* fall through */ + + case 5: /* armv4 */ + case 6: /* armv4t */ + case 7: /* armv5 */ + case 8: /* armv5t */ + ARMul_SelectProcessor (state, STRONGARM); + break; + + case 3: /* armv3 */ + case 4: /* armv3m */ + ARMul_SelectProcessor (state, ARM600); + break; + + case 1: /* armv2 */ + case 2: /* armv2a */ + ARMul_SelectProcessor (state, ARM2); + break; + } + if (argv != NULL) { /* |