diff options
-rw-r--r-- | sim/mips/ChangeLog | 6 | ||||
-rw-r--r-- | sim/mips/interp.c | 2 | ||||
-rw-r--r-- | sim/mips/sim-main.h | 2 |
3 files changed, 8 insertions, 2 deletions
diff --git a/sim/mips/ChangeLog b/sim/mips/ChangeLog index 53dc86c..3d79557 100644 --- a/sim/mips/ChangeLog +++ b/sim/mips/ChangeLog @@ -1,3 +1,9 @@ +2004-05-11 Maciej W. Rozycki <macro@ds2.pg.gda.pl> + + * mips/interp.c (decode_coproc): Sign-extend the address retrieved + from COP0_BADVADDR. + * mips/sim-main.h (COP0_BADVADDR): Remove a cast. + 2004-04-10 Chris Demetriou <cgd@broadcom.com> * sb1.igen (DIV.PS, RECIP.PS, RSQRT.PS, SQRT.PS): New. diff --git a/sim/mips/interp.c b/sim/mips/interp.c index f8c14c8..043d76d 100644 --- a/sim/mips/interp.c +++ b/sim/mips/interp.c @@ -2102,7 +2102,7 @@ decode_coproc (SIM_DESC sd, case 8: /* 8 = BadVAddr R4000 VR4100 VR4300 */ if (code == 0x00) - GPR[rt] = COP0_BADVADDR; + GPR[rt] = (signed_word) (signed_address) COP0_BADVADDR; else COP0_BADVADDR = GPR[rt]; break; diff --git a/sim/mips/sim-main.h b/sim/mips/sim-main.h index 96a86e9..10ddbf2 100644 --- a/sim/mips/sim-main.h +++ b/sim/mips/sim-main.h @@ -383,7 +383,7 @@ struct _sim_cpu { #define NR_COP0_GPR 32 unsigned_word cop0_gpr[NR_COP0_GPR]; #define COP0_GPR ((CPU)->cop0_gpr) -#define COP0_BADVADDR ((unsigned32)(COP0_GPR[8])) +#define COP0_BADVADDR (COP0_GPR[8]) /* While space is allocated for the floating point registers in the main registers array, they are stored separatly. This is because |