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-rw-r--r--cpu/cris.cpu6
-rw-r--r--sim/cris/semcrisv10f-switch.c12
-rw-r--r--sim/cris/semcrisv32f-switch.c12
3 files changed, 28 insertions, 2 deletions
diff --git a/cpu/cris.cpu b/cpu/cris.cpu
index ba5ed18..32a1e2d 100644
--- a/cpu/cris.cpu
+++ b/cpu/cris.cpu
@@ -550,7 +550,8 @@
(condn condc)
((eq tmpcond condn) (set condres (.sym condc -condition))))
(.iota 16)
- cris-condition-codes)))
+ cris-condition-codes))
+ (else (error "Unknown condition code")))
condres)
)
@@ -3710,7 +3711,8 @@
((eq tmpcode x-swapcode)
(set tmpres ((.sym swap- x-swap) tmpval))))
(.iota 16)
- (.splice _ (.unsplice cris-swap-codes)))))
+ (.splice _ (.unsplice cris-swap-codes))))
+ (else (error "Unknown swapcode")))
tmpres)
)
diff --git a/sim/cris/semcrisv10f-switch.c b/sim/cris/semcrisv10f-switch.c
index cae56fd..8441c22 100644
--- a/sim/cris/semcrisv10f-switch.c
+++ b/sim/cris/semcrisv10f-switch.c
@@ -11091,6 +11091,9 @@ SET_H_VBIT_MOVE (0);
; ORSI (ANDSI (SLLSI (tmp_tmpb, 8), 0xff00ff00), ANDSI (SRLSI (tmp_tmpb, 8), 16711935)); });
; ORSI (SLLSI (ANDSI (tmp_tmpr, 16843009), 7), ORSI (SLLSI (ANDSI (tmp_tmpr, 33686018), 5), ORSI (SLLSI (ANDSI (tmp_tmpr, 67372036), 3), ORSI (SLLSI (ANDSI (tmp_tmpr, 134744072), 1), ORSI (SRLSI (ANDSI (tmp_tmpr, 269488144), 1), ORSI (SRLSI (ANDSI (tmp_tmpr, 538976288), 3), ORSI (SRLSI (ANDSI (tmp_tmpr, 1077952576), 5), SRLSI (ANDSI (tmp_tmpr, 0x80808080), 7)))))))); });
}
+ else {
+cgen_rtx_error (current_cpu, "Unknown swapcode");
+}
; tmp_tmpres; });
{
SI opval = tmp_tmpd;
@@ -12110,6 +12113,9 @@ if (NESI (ANDSI (tmp_tmp, SLLSI (1, 7)), 0)) {
else if (EQSI (tmp_tmpcond, 15)) {
tmp_condres = CPU (h_pbit);
}
+ else {
+cgen_rtx_error (current_cpu, "Unknown condition code");
+}
; tmp_condres; });
crisv10f_branch_taken (current_cpu, pc, FLD (i_o_pcrel), tmp_truthval);
{
@@ -12242,6 +12248,9 @@ if (tmp_truthval) {
else if (EQSI (tmp_tmpcond, 15)) {
tmp_condres = CPU (h_pbit);
}
+ else {
+cgen_rtx_error (current_cpu, "Unknown condition code");
+}
; tmp_condres; });
crisv10f_branch_taken (current_cpu, pc, FLD (i_o_word_pcrel), tmp_truthval);
{
@@ -13115,6 +13124,9 @@ SET_H_VBIT_MOVE (0);
else if (EQSI (tmp_tmpcond, 15)) {
tmp_condres = CPU (h_pbit);
}
+ else {
+cgen_rtx_error (current_cpu, "Unknown condition code");
+}
; tmp_condres; });
{
SI opval = ZEXTBISI (tmp_truthval);
diff --git a/sim/cris/semcrisv32f-switch.c b/sim/cris/semcrisv32f-switch.c
index db2f7aa..77cd07a 100644
--- a/sim/cris/semcrisv32f-switch.c
+++ b/sim/cris/semcrisv32f-switch.c
@@ -11361,6 +11361,9 @@ SET_H_VBIT_MOVE (0);
; ORSI (ANDSI (SLLSI (tmp_tmpb, 8), 0xff00ff00), ANDSI (SRLSI (tmp_tmpb, 8), 16711935)); });
; ORSI (SLLSI (ANDSI (tmp_tmpr, 16843009), 7), ORSI (SLLSI (ANDSI (tmp_tmpr, 33686018), 5), ORSI (SLLSI (ANDSI (tmp_tmpr, 67372036), 3), ORSI (SLLSI (ANDSI (tmp_tmpr, 134744072), 1), ORSI (SRLSI (ANDSI (tmp_tmpr, 269488144), 1), ORSI (SRLSI (ANDSI (tmp_tmpr, 538976288), 3), ORSI (SRLSI (ANDSI (tmp_tmpr, 1077952576), 5), SRLSI (ANDSI (tmp_tmpr, 0x80808080), 7)))))))); });
}
+ else {
+cgen_rtx_error (current_cpu, "Unknown swapcode");
+}
; tmp_tmpres; });
{
SI opval = tmp_tmpd;
@@ -12510,6 +12513,9 @@ crisv32f_rfg_handler (current_cpu, pc);
else if (EQSI (tmp_tmpcond, 15)) {
tmp_condres = CPU (h_pbit);
}
+ else {
+cgen_rtx_error (current_cpu, "Unknown condition code");
+}
; tmp_condres; });
crisv32f_branch_taken (current_cpu, pc, FLD (i_o_pcrel), tmp_truthval);
{
@@ -12642,6 +12648,9 @@ if (tmp_truthval) {
else if (EQSI (tmp_tmpcond, 15)) {
tmp_condres = CPU (h_pbit);
}
+ else {
+cgen_rtx_error (current_cpu, "Unknown condition code");
+}
; tmp_condres; });
crisv32f_branch_taken (current_cpu, pc, FLD (i_o_word_pcrel), tmp_truthval);
{
@@ -13430,6 +13439,9 @@ SET_H_VBIT_MOVE (0);
else if (EQSI (tmp_tmpcond, 15)) {
tmp_condres = CPU (h_pbit);
}
+ else {
+cgen_rtx_error (current_cpu, "Unknown condition code");
+}
; tmp_condres; });
{
SI opval = ZEXTBISI (tmp_truthval);