1401 files changed, 52537 insertions, 30864 deletions

diff --git a/.pre-commit-config.yaml b/.pre-commit-config.yaml
index 722307d..87726ae 100644
--- a/.pre-commit-config.yaml
+++ b/.pre-commit-config.yaml
@@ -2,13 +2,13 @@
 # See https://pre-commit.com/hooks.html for more hooks
 repos:
   - repo: https://github.com/psf/black-pre-commit-mirror
-    rev: 24.4.2
+    rev: 24.8.0
     hooks:
       - id: black
         types_or: [file]
         files: 'gdb/.*\.py(\.in)?$'
   - repo:  https://github.com/pycqa/flake8
-    rev: 7.0.0
+    rev: 7.1.1
     hooks:
     - id: flake8
       types_or: [file]
diff --git a/bfd/Makefile.in b/bfd/Makefile.in
index b3d97d4..e9b479a 100644
--- a/bfd/Makefile.in
+++ b/bfd/Makefile.in
@@ -1322,7 +1322,7 @@ REGEN_TEXI = \
 	$(MKDOC) -f $(srcdir)/doc/doc.str < $< > $@.tmp; \
 	texi=$@; \
 	texi=$${texi%.stamp}.texi; \
-	test -e $$texi || test ! -f $(srcdir)/$$texi || $(LN_S) $(srcdir)/$$texi .; \
+	test -e $$texi || test ! -f $(srcdir)/$$texi || $(LN_S) $(srcdir)/$$texi $$texi; \
 	$(SHELL) $(srcdir)/../move-if-change $@.tmp $$texi; \
 	touch $@; \
 	)
diff --git a/bfd/archures.c b/bfd/archures.c
index 94118b8..c4decc5 100644
--- a/bfd/archures.c
+++ b/bfd/archures.c
@@ -947,6 +947,7 @@ bfd_arch_get_compatible (const bfd *abfd,
      to assume that they know what they are doing.  */
   if (accept_unknowns
       || ubfd->plugin_format == bfd_plugin_yes
+      || ubfd->plugin_format == bfd_plugin_yes_unused
       || strcmp (bfd_get_target (ubfd), "binary") == 0)
     return kbfd->arch_info;
   return NULL;
diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h
index e3b5a8b..3b047d9 100644
--- a/bfd/bfd-in2.h
+++ b/bfd/bfd-in2.h
@@ -1260,6 +1260,11 @@ typedef struct _symbol_info
   const char *stab_name;       /* String for stab type.  */
 } symbol_info;
 
+/* An empty string that will not match the address of any other
+   symbol name, even unnamed local symbols which will also have empty
+   string names.  This can be used to flag a symbol as corrupt if its
+   name uses an out of range string table index.  */
+extern const char bfd_symbol_error_name[];
 #define bfd_get_symtab_upper_bound(abfd) \
        BFD_SEND (abfd, _bfd_get_symtab_upper_bound, (abfd))
 
@@ -1947,7 +1952,8 @@ enum bfd_plugin_format
   {
     bfd_plugin_unknown = 0,
     bfd_plugin_yes = 1,
-    bfd_plugin_no = 2
+    bfd_plugin_yes_unused = 2,
+    bfd_plugin_no = 3
   };
 
 struct bfd_build_id
diff --git a/bfd/bfd.c b/bfd/bfd.c
index ae79c64..a93be10 100644
--- a/bfd/bfd.c
+++ b/bfd/bfd.c
@@ -65,7 +65,8 @@ EXTERNAL
 .  {
 .    bfd_plugin_unknown = 0,
 .    bfd_plugin_yes = 1,
-.    bfd_plugin_no = 2
+.    bfd_plugin_yes_unused = 2,
+.    bfd_plugin_no = 3
 .  };
 .
 .struct bfd_build_id
diff --git a/bfd/coffgen.c b/bfd/coffgen.c
index cc1c655..5754dbb 100644
--- a/bfd/coffgen.c
+++ b/bfd/coffgen.c
@@ -1928,7 +1928,7 @@ coff_get_normalized_symtab (bfd *abfd)
 	      if ((bfd_size_type) aux->u.auxent.x_file.x_n.x_n.x_offset
 		  >= obj_coff_strings_len (abfd))
 		sym->u.syment._n._n_n._n_offset =
-		  (uintptr_t) _("<corrupt>");
+		  (uintptr_t) bfd_symbol_error_name;
 	      else
 		sym->u.syment._n._n_n._n_offset =
 		  (uintptr_t) (string_table
@@ -1978,7 +1978,7 @@ coff_get_normalized_symtab (bfd *abfd)
 		    if ((bfd_size_type) aux->u.auxent.x_file.x_n.x_n.x_offset
 			>= obj_coff_strings_len (abfd))
 		      aux->u.auxent.x_file.x_n.x_n.x_offset =
-			(uintptr_t) _("<corrupt>");
+			(uintptr_t) bfd_symbol_error_name;
 		    else
 		      aux->u.auxent.x_file.x_n.x_n.x_offset =
 			(uintptr_t) (string_table
@@ -2028,7 +2028,7 @@ coff_get_normalized_symtab (bfd *abfd)
 		}
 	      if (sym->u.syment._n._n_n._n_offset >= obj_coff_strings_len (abfd))
 		sym->u.syment._n._n_n._n_offset =
-		  (uintptr_t) _("<corrupt>");
+		  (uintptr_t) bfd_symbol_error_name;
 	      else
 		sym->u.syment._n._n_n._n_offset =
 		  (uintptr_t) (string_table
@@ -2047,7 +2047,7 @@ coff_get_normalized_symtab (bfd *abfd)
 		 the debug data.  */
 	      if (sym->u.syment._n._n_n._n_offset >= debug_sec->size)
 		sym->u.syment._n._n_n._n_offset =
-		  (uintptr_t) _("<corrupt>");
+		  (uintptr_t) bfd_symbol_error_name;
 	      else
 		sym->u.syment._n._n_n._n_offset =
 		  (uintptr_t) (debug_sec_data
@@ -2161,11 +2161,13 @@ coff_print_symbol (bfd *abfd,
 		   bfd_print_symbol_type how)
 {
   FILE * file = (FILE *) filep;
+  const char *symname = (symbol->name != bfd_symbol_error_name
+			 ? symbol->name : _("<corrupt>"));
 
   switch (how)
     {
     case bfd_print_symbol_name:
-      fprintf (file, "%s", symbol->name);
+      fprintf (file, "%s", symname);
       break;
 
     case bfd_print_symbol_more:
@@ -2189,7 +2191,7 @@ coff_print_symbol (bfd *abfd,
 	  if (combined < obj_raw_syments (abfd)
 	      || combined >= obj_raw_syments (abfd) + obj_raw_syment_count (abfd))
 	    {
-	      fprintf (file, _("<corrupt info> %s"), symbol->name);
+	      fprintf (file, _("<corrupt info> %s"), symname);
 	      break;
 	    }
 
@@ -2207,7 +2209,7 @@ coff_print_symbol (bfd *abfd,
 		   combined->u.syment.n_sclass,
 		   combined->u.syment.n_numaux);
 	  bfd_fprintf_vma (abfd, file, val);
-	  fprintf (file, " %s", symbol->name);
+	  fprintf (file, " %s", symname);
 
 	  for (aux = 0; aux < combined->u.syment.n_numaux; aux++)
 	    {
@@ -2297,7 +2299,9 @@ coff_print_symbol (bfd *abfd,
 
 	  if (l)
 	    {
-	      fprintf (file, "\n%s :", l->u.sym->name);
+	      fprintf (file, "\n%s :",
+		       l->u.sym->name != bfd_symbol_error_name
+		       ? l->u.sym->name : _("<corrupt>"));
 	      l++;
 	      while (l->line_number)
 		{
@@ -2317,7 +2321,7 @@ coff_print_symbol (bfd *abfd,
 		   symbol->section->name,
 		   coffsymbol (symbol)->native ? "n" : "g",
 		   coffsymbol (symbol)->lineno ? "l" : " ",
-		   symbol->name);
+		   symname);
 	}
     }
 }
diff --git a/bfd/doc/local.mk b/bfd/doc/local.mk
index 5e8f486..9767e58 100644
--- a/bfd/doc/local.mk
+++ b/bfd/doc/local.mk
@@ -101,7 +101,7 @@ REGEN_TEXI = \
 	$(MKDOC) -f $(srcdir)/%D%/doc.str < $< > $@.tmp; \
 	texi=$@; \
 	texi=$${texi%.stamp}.texi; \
-	test -e $$texi || test ! -f $(srcdir)/$$texi || $(LN_S) $(srcdir)/$$texi .; \
+	test -e $$texi || test ! -f $(srcdir)/$$texi || $(LN_S) $(srcdir)/$$texi $$texi; \
 	$(SHELL) $(srcdir)/../move-if-change $@.tmp $$texi; \
 	touch $@; \
 	)
diff --git a/bfd/ecoff.c b/bfd/ecoff.c
index 0450176..d0cb9e1 100644
--- a/bfd/ecoff.c
+++ b/bfd/ecoff.c
@@ -1452,11 +1452,13 @@ _bfd_ecoff_print_symbol (bfd *abfd,
   const struct ecoff_debug_swap * const debug_swap
     = &ecoff_backend (abfd)->debug_swap;
   FILE *file = (FILE *)filep;
+  const char *symname = (symbol->name != bfd_symbol_error_name
+			 ? symbol->name : _("<corrupt>"));
 
   switch (how)
     {
     case bfd_print_symbol_name:
-      fprintf (file, "%s", symbol->name);
+      fprintf (file, "%s", symname);
       break;
     case bfd_print_symbol_more:
       if (ecoffsymbol (symbol)->local)
@@ -1526,7 +1528,7 @@ _bfd_ecoff_print_symbol (bfd *abfd,
 		 (unsigned) ecoff_ext.asym.sc,
 		 (unsigned) ecoff_ext.asym.index,
 		 jmptbl, cobol_main, weakext,
-		 symbol->name);
+		 symname);
 
 	if (ecoffsymbol (symbol)->fdr != NULL
 	    && ecoff_ext.asym.index != indexNil)
@@ -3278,8 +3280,8 @@ ecoff_link_hash_newfunc (struct bfd_hash_entry *entry,
       ret->abfd = NULL;
       ret->written = 0;
       ret->small = 0;
+      memset ((void *) &ret->esym, 0, sizeof ret->esym);
     }
-  memset ((void *) &ret->esym, 0, sizeof ret->esym);
 
   return (struct bfd_hash_entry *) ret;
 }
diff --git a/bfd/elf-bfd.h b/bfd/elf-bfd.h
index b89d3dd..96cf119 100644
--- a/bfd/elf-bfd.h
+++ b/bfd/elf-bfd.h
@@ -2540,7 +2540,7 @@ extern long _bfd_elf_link_lookup_local_dynindx
 extern bool _bfd_elf_compute_section_file_positions
   (bfd *, struct bfd_link_info *);
 extern file_ptr _bfd_elf_assign_file_position_for_section
-  (Elf_Internal_Shdr *, file_ptr, bool);
+  (Elf_Internal_Shdr *, file_ptr, bool, unsigned char);
 extern bool _bfd_elf_modify_headers
   (bfd *, struct bfd_link_info *);
 
diff --git a/bfd/elf-eh-frame.c b/bfd/elf-eh-frame.c
index 902d7c1..ebe162f 100644
--- a/bfd/elf-eh-frame.c
+++ b/bfd/elf-eh-frame.c
@@ -345,7 +345,7 @@ next_cie_fde_offset (const struct eh_cie_fde *ent,
 static bool
 skip_cfa_op (bfd_byte **iter, bfd_byte *end, unsigned int encoded_ptr_width)
 {
-  bfd_byte op;
+  bfd_byte op = 0;
   bfd_vma length;
 
   if (!read_byte (iter, end, &op))
diff --git a/bfd/elf.c b/bfd/elf.c
index bc4a2de..5d85742 100644
--- a/bfd/elf.c
+++ b/bfd/elf.c
@@ -285,9 +285,7 @@ bfd_elf_get_str_section (bfd *abfd, unsigned int shindex)
       offset = i_shdrp[shindex]->sh_offset;
       shstrtabsize = i_shdrp[shindex]->sh_size;
 
-      /* Allocate and clear an extra byte at the end, to prevent crashes
-	 in case the string table is not terminated.  */
-      if (shstrtabsize + 1 <= 1
+      if (shstrtabsize == 0
 	  || bfd_seek (abfd, offset, SEEK_SET) != 0
 	  || (shstrtab
 	      = _bfd_mmap_readonly_persistent (abfd, shstrtabsize)) == NULL)
@@ -297,14 +295,14 @@ bfd_elf_get_str_section (bfd *abfd, unsigned int shindex)
 	     the string table over and over.  */
 	  i_shdrp[shindex]->sh_size = 0;
 	}
-      else if (shstrtab[shstrtabsize - 1] != '\0')
+      else if (shstrtab[shstrtabsize - 1] != 0)
 	{
 	  /* It is an error if a string table isn't terminated.  */
 	  _bfd_error_handler
 	    /* xgettext:c-format */
-	    (_("%pB(%pA): string table is corrupt"),
-	     abfd, i_shdrp[shindex]->bfd_section);
-	  return NULL;
+	    (_("%pB: string table [%u] is corrupt"), abfd, shindex);
+	  shstrtab = NULL;
+	  i_shdrp[shindex]->sh_size = 0;
 	}
       i_shdrp[shindex]->contents = shstrtab;
     }
@@ -532,13 +530,11 @@ bfd_elf_get_elf_syms (bfd *ibfd,
 }
 
 /* Look up a symbol name.  */
-const char *
-bfd_elf_sym_name (bfd *abfd,
-		  Elf_Internal_Shdr *symtab_hdr,
-		  Elf_Internal_Sym *isym,
-		  asection *sym_sec)
+static const char *
+bfd_elf_sym_name_raw (bfd *abfd,
+		      Elf_Internal_Shdr *symtab_hdr,
+		      Elf_Internal_Sym *isym)
 {
-  const char *name;
   unsigned int iname = isym->st_name;
   unsigned int shindex = symtab_hdr->sh_link;
 
@@ -550,9 +546,18 @@ bfd_elf_sym_name (bfd *abfd,
       shindex = elf_elfheader (abfd)->e_shstrndx;
     }
 
-  name = bfd_elf_string_from_elf_section (abfd, shindex, iname);
+  return bfd_elf_string_from_elf_section (abfd, shindex, iname);
+}
+
+const char *
+bfd_elf_sym_name (bfd *abfd,
+		  Elf_Internal_Shdr *symtab_hdr,
+		  Elf_Internal_Sym *isym,
+		  asection *sym_sec)
+{
+  const char *name = bfd_elf_sym_name_raw (abfd, symtab_hdr, isym);
   if (name == NULL)
-    name = "(null)";
+    name = bfd_symbol_error_name;
   else if (sym_sec && *name == '\0')
     name = bfd_section_name (sym_sec);
 
@@ -585,7 +590,7 @@ group_signature (bfd *abfd, Elf_Internal_Shdr *ghdr)
 			    &isym, esym, &eshndx) == NULL)
     return NULL;
 
-  return bfd_elf_sym_name (abfd, hdr, &isym, NULL);
+  return bfd_elf_sym_name_raw (abfd, hdr, &isym);
 }
 
 static bool
@@ -1914,7 +1919,7 @@ _bfd_elf_get_dynamic_symbols (bfd *abfd, Elf_Internal_Phdr *phdr,
       _bfd_error_handler
 	/* xgettext:c-format */
 	(_("%pB: DT_STRTAB table is corrupt"), abfd);
-      goto error_return;
+      strbuf[dt_strsz - 1] = 0;
     }
 
   /* Get the real symbol count from DT_HASH or DT_GNU_HASH.  Prefer
@@ -2316,10 +2321,13 @@ bfd_elf_print_symbol (bfd *abfd,
 		      bfd_print_symbol_type how)
 {
   FILE *file = (FILE *) filep;
+  const char *symname = (symbol->name != bfd_symbol_error_name
+			 ? symbol->name : _("<corrupt>"));
+
   switch (how)
     {
     case bfd_print_symbol_name:
-      fprintf (file, "%s", symbol->name);
+      fprintf (file, "%s", symname);
       break;
     case bfd_print_symbol_more:
       fprintf (file, "elf ");
@@ -2342,11 +2350,10 @@ bfd_elf_print_symbol (bfd *abfd,
 	if (bed->elf_backend_print_symbol_all)
 	  name = (*bed->elf_backend_print_symbol_all) (abfd, filep, symbol);
 
-	if (name == NULL)
-	  {
-	    name = symbol->name;
-	    bfd_print_symbol_vandf (abfd, file, symbol);
-	  }
+	if (name != NULL)
+	  symname = name;
+	else
+	  bfd_print_symbol_vandf (abfd, file, symbol);
 
 	fprintf (file, " %s\t", section_name);
 	/* Print the "other" value for a symbol.  For common symbols,
@@ -2393,7 +2400,7 @@ bfd_elf_print_symbol (bfd *abfd,
 	    fprintf (file, " 0x%02x", (unsigned int) st_other);
 	  }
 
-	fprintf (file, " %s", name);
+	fprintf (file, " %s", symname);
       }
       break;
     }
@@ -4550,25 +4557,29 @@ elf_map_symbols (bfd *abfd, unsigned int *pnum_locals)
   return true;
 }
 
-/* Align to the maximum file alignment that could be required for any
-   ELF data structure.  */
-
-static inline file_ptr
-align_file_position (file_ptr off, int align)
-{
-  return (off + align - 1) & ~(align - 1);
-}
-
 /* Assign a file position to a section, optionally aligning to the
    required section alignment.  */
 
 file_ptr
 _bfd_elf_assign_file_position_for_section (Elf_Internal_Shdr *i_shdrp,
 					   file_ptr offset,
-					   bool align)
+					   bool align,
+					   unsigned char log_file_align)
 {
-  if (align && i_shdrp->sh_addralign > 1)
-    offset = BFD_ALIGN (offset, i_shdrp->sh_addralign & -i_shdrp->sh_addralign);
+  if (i_shdrp->sh_addralign > 1)
+    {
+      file_ptr salign = i_shdrp->sh_addralign & -i_shdrp->sh_addralign;
+
+      if (align)
+	offset = BFD_ALIGN (offset, salign);
+      else if (log_file_align)
+	{
+	  /* Heuristic: Cap alignment at log_file_align.  */
+	  file_ptr falign = 1u << log_file_align;
+
+	  offset = BFD_ALIGN (offset, salign < falign ? salign : falign);
+	}
+    }
   i_shdrp->sh_offset = offset;
   if (i_shdrp->bfd_section != NULL)
     i_shdrp->bfd_section->filepos = offset;
@@ -4656,18 +4667,18 @@ _bfd_elf_compute_section_file_positions (bfd *abfd,
       off = elf_next_file_pos (abfd);
 
       hdr = & elf_symtab_hdr (abfd);
-      off = _bfd_elf_assign_file_position_for_section (hdr, off, true);
+      off = _bfd_elf_assign_file_position_for_section (hdr, off, true, 0);
 
       if (elf_symtab_shndx_list (abfd) != NULL)
 	{
 	  hdr = & elf_symtab_shndx_list (abfd)->hdr;
 	  if (hdr->sh_size != 0)
-	    off = _bfd_elf_assign_file_position_for_section (hdr, off, true);
+	    off = _bfd_elf_assign_file_position_for_section (hdr, off, true, 0);
 	  /* FIXME: What about other symtab_shndx sections in the list ?  */
 	}
 
       hdr = &elf_tdata (abfd)->strtab_hdr;
-      off = _bfd_elf_assign_file_position_for_section (hdr, off, true);
+      off = _bfd_elf_assign_file_position_for_section (hdr, off, true, 0);
 
       elf_next_file_pos (abfd) = off;
 
@@ -6541,8 +6552,8 @@ assign_file_positions_for_non_load_sections (bfd *abfd,
 	  else
 	    align = hdr->sh_addralign & -hdr->sh_addralign;
 	  off += vma_page_aligned_bias (hdr->sh_addr, off, align);
-	  off = _bfd_elf_assign_file_position_for_section (hdr, off,
-							   false);
+	  off = _bfd_elf_assign_file_position_for_section (hdr, off, false,
+							   bed->s->log_file_align);
 	}
       else if (((hdr->sh_type == SHT_REL || hdr->sh_type == SHT_RELA)
 		&& hdr->bfd_section == NULL)
@@ -6559,7 +6570,7 @@ assign_file_positions_for_non_load_sections (bfd *abfd,
 	       || hdr == i_shdrpp[elf_shstrtab_sec (abfd)])
 	hdr->sh_offset = -1;
       else
-	off = _bfd_elf_assign_file_position_for_section (hdr, off, true);
+	off = _bfd_elf_assign_file_position_for_section (hdr, off, true, 0);
     }
   elf_next_file_pos (abfd) = off;
 
@@ -6796,7 +6807,8 @@ assign_file_positions_except_relocs (bfd *abfd,
 	      hdr->sh_offset = -1;
 	    }
 	  else
-	    off = _bfd_elf_assign_file_position_for_section (hdr, off, true);
+	    off = _bfd_elf_assign_file_position_for_section (hdr, off, false,
+							     0);
 	}
 
       elf_next_file_pos (abfd) = off;
@@ -7011,7 +7023,7 @@ _bfd_elf_assign_file_positions_for_non_load (bfd *abfd)
   Elf_Internal_Shdr **shdrpp, **end_shdrpp;
   Elf_Internal_Shdr *shdrp;
   Elf_Internal_Ehdr *i_ehdrp;
-  const struct elf_backend_data *bed;
+  const struct elf_backend_data *bed = get_elf_backend_data (abfd);
 
   /* Skip non-load sections without section header.  */
   if ((abfd->flags & BFD_NO_SECTION_HEADER) != 0)
@@ -7079,7 +7091,10 @@ _bfd_elf_assign_file_positions_for_non_load (bfd *abfd)
 	      sec->contents = NULL;
 	    }
 
-	  off = _bfd_elf_assign_file_position_for_section (shdrp, off, true);
+	  off = _bfd_elf_assign_file_position_for_section (shdrp, off,
+		  (abfd->flags & (EXEC_P | DYNAMIC))
+		  || bfd_get_format (abfd) == bfd_core,
+		  bed->s->log_file_align);
 	}
     }
 
@@ -7088,12 +7103,11 @@ _bfd_elf_assign_file_positions_for_non_load (bfd *abfd)
   _bfd_elf_strtab_finalize (elf_shstrtab (abfd));
   shdrp = &elf_tdata (abfd)->shstrtab_hdr;
   shdrp->sh_size = _bfd_elf_strtab_size (elf_shstrtab (abfd));
-  off = _bfd_elf_assign_file_position_for_section (shdrp, off, true);
+  off = _bfd_elf_assign_file_position_for_section (shdrp, off, true, 0);
 
   /* Place the section headers.  */
   i_ehdrp = elf_elfheader (abfd);
-  bed = get_elf_backend_data (abfd);
-  off = align_file_position (off, 1 << bed->s->log_file_align);
+  off = BFD_ALIGN (off, 1u << bed->s->log_file_align);
   i_ehdrp->e_shoff = off;
   off += i_ehdrp->e_shnum * i_ehdrp->e_shentsize;
   elf_next_file_pos (abfd) = off;
@@ -8732,17 +8746,16 @@ swap_out_syms (bfd *abfd,
 	  && (flags & (BSF_SECTION_SYM | BSF_GLOBAL)) == BSF_SECTION_SYM)
 	{
 	  /* Local section symbols have no name.  */
-	  sym.st_name = (unsigned long) -1;
+	  sym.st_name = 0;
 	}
       else
 	{
 	  /* Call _bfd_elf_strtab_offset after _bfd_elf_strtab_finalize
 	     to get the final offset for st_name.  */
-	  sym.st_name
-	    = (unsigned long) _bfd_elf_strtab_add (stt, syms[idx]->name,
-						   false);
-	  if (sym.st_name == (unsigned long) -1)
+	  size_t stridx = _bfd_elf_strtab_add (stt, syms[idx]->name, false);
+	  if (stridx == (size_t) -1)
 	    goto error_return;
+	  sym.st_name = stridx;
 	}
 
       bfd_vma value = syms[idx]->value;
@@ -8953,9 +8966,7 @@ Unable to handle section index %x in ELF symbol.  Using ABS instead."),
   for (idx = 0; idx < outbound_syms_index; idx++)
     {
       struct elf_sym_strtab *elfsym = &symstrtab[idx];
-      if (elfsym->sym.st_name == (unsigned long) -1)
-	elfsym->sym.st_name = 0;
-      else
+      if (elfsym->sym.st_name != 0)
 	elfsym->sym.st_name = _bfd_elf_strtab_offset (stt,
 						      elfsym->sym.st_name);
       if (info && info->callbacks->ctf_new_symbol)
diff --git a/bfd/elf32-arm.c b/bfd/elf32-arm.c
index ca76bee..17df8b3 100644
--- a/bfd/elf32-arm.c
+++ b/bfd/elf32-arm.c
@@ -4226,12 +4226,33 @@ arm_type_of_stub (struct bfd_link_info *info,
 
   r_type = ELF32_R_TYPE (rel->r_info);
 
+  /* Don't pretend we know what stub to use (if any) when we target a
+     Thumb-only target and we don't know the actual destination
+     type.  */
+  if (branch_type == ST_BRANCH_UNKNOWN && thumb_only)
+    return stub_type;
+
   /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we
      are considering a function call relocation.  */
   if (thumb_only && (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24
 		     || r_type == R_ARM_THM_JUMP19)
       && branch_type == ST_BRANCH_TO_ARM)
-    branch_type = ST_BRANCH_TO_THUMB;
+    {
+      if (sym_sec == bfd_abs_section_ptr)
+	/* As an exception, assume that absolute symbols are of the
+	   right kind (Thumb).  They are presumably defined in the
+	   linker script, where it is not possible to declare them as
+	   Thumb (and thus are seen as Arm mode). We'll inform the
+	   user with a warning, though, in
+	   elf32_arm_final_link_relocate. */
+	branch_type = ST_BRANCH_TO_THUMB;
+      else
+	/* Otherwise do not silently build a stub, and let the users
+	   know they have to fix their code.  Indeed, we could decide
+	   to insert a stub involving Arm code and/or BLX, leading to
+	   a run-time crash.  */
+	return stub_type;
+    }
 
   /* For TLS call relocs, it is the caller's responsibility to provide
      the address of the appropriate trampoline.  */
@@ -10382,14 +10403,6 @@ elf32_arm_final_link_relocate (reloc_howto_type *	    howto,
   else
     addend = signed_addend = rel->r_addend;
 
-  /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we
-     are resolving a function call relocation.  */
-  if (using_thumb_only (globals)
-      && (r_type == R_ARM_THM_CALL
-	  || r_type == R_ARM_THM_JUMP24)
-      && branch_type == ST_BRANCH_TO_ARM)
-    branch_type = ST_BRANCH_TO_THUMB;
-
   /* Record the symbol information that should be used in dynamic
      relocations.  */
   dynreloc_st_type = st_type;
@@ -10452,6 +10465,73 @@ elf32_arm_final_link_relocate (reloc_howto_type *	    howto,
       gotplt_offset = (bfd_vma) -1;
     }
 
+  /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we are
+     resolving a function call relocation.  We want to inform the user
+     that something is wrong.  */
+  if (using_thumb_only (globals)
+      && (r_type == R_ARM_THM_CALL
+	  || r_type == R_ARM_THM_JUMP24)
+      && branch_type == ST_BRANCH_TO_ARM
+      /* Calls through a PLT are special: the assembly source code
+	 cannot be annotated with '.type foo(PLT), %function', and
+	 they handled specifically below anyway. */
+      && splt == NULL)
+    {
+      if (sym_sec == bfd_abs_section_ptr)
+	{
+	/* As an exception, assume that absolute symbols are of the
+	   right kind (Thumb).  They are presumably defined in the
+	   linker script, where it is not possible to declare them as
+	   Thumb (and thus are seen as Arm mode). Inform the user with
+	   a warning, though. */
+	  branch_type = ST_BRANCH_TO_THUMB;
+
+	  if (sym_sec->owner)
+	    _bfd_error_handler
+	      (_("warning: %pB(%s): Forcing bramch to absolute symbol in Thumb mode (Thumb-only CPU)"
+		 " in %pB"),
+	       sym_sec->owner, sym_name, input_bfd);
+	  else
+	    _bfd_error_handler
+	      (_("warning: (%s): Forcing branch to absolute symbol in Thumb mode (Thumb-only CPU)"
+		 " in %pB"),
+	       sym_name, input_bfd);
+	}
+      else
+	/* Otherwise do not silently build a stub, and let the users
+	   know they have to fix their code.  Indeed, we could decide
+	   to insert a stub involving Arm code and/or BLX, leading to
+	   a run-time crash.  */
+	branch_type = ST_BRANCH_UNKNOWN;
+    }
+
+  /* Fail early if branch_type is ST_BRANCH_UNKNOWN and we target a
+     Thumb-only CPU.  We could emit a warning on Arm-capable targets
+     too, but that would be too verbose (a lot of legacy code does not
+     use the .type foo, %function directive).  */
+  if (using_thumb_only (globals)
+      && (r_type == R_ARM_THM_CALL
+	  || r_type == R_ARM_THM_JUMP24)
+      && branch_type == ST_BRANCH_UNKNOWN
+      /* Exception to the rule above: a branch to an undefined weak
+	 symbol is turned into a jump to the next instruction unless a
+	 PLT entry will be created (see below).  */
+      && !(h && h->root.type == bfd_link_hash_undefweak
+	   && plt_offset == (bfd_vma) -1))
+    {
+      if (sym_sec != NULL
+	  && sym_sec->owner != NULL)
+	_bfd_error_handler
+	  (_("%pB(%s): Unknown destination type (ARM/Thumb) in %pB"),
+	   sym_sec->owner, sym_name, input_bfd);
+      else
+	_bfd_error_handler
+	  (_("(%s): Unknown destination type (ARM/Thumb) in %pB"),
+	   sym_name, input_bfd);
+
+      return bfd_reloc_notsupported;
+    }
+
   resolved_to_zero = (h != NULL
 		      && UNDEFWEAK_NO_DYNAMIC_RELOC (info, h));
 
@@ -17838,7 +17918,7 @@ elf32_arm_output_map_sym (output_arch_syminfo *osi,
   sym.st_other = 0;
   sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
   sym.st_shndx = osi->sec_shndx;
-  sym.st_target_internal = 0;
+  sym.st_target_internal = ST_BRANCH_TO_ARM;
   elf32_arm_section_map_add (osi->sec, names[type][1], offset);
   return osi->func (osi->flaginfo, names[type], &sym, osi->sec, NULL) == 1;
 }
@@ -17995,7 +18075,7 @@ elf32_arm_output_stub_sym (output_arch_syminfo *osi, const char *name,
   sym.st_other = 0;
   sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
   sym.st_shndx = osi->sec_shndx;
-  sym.st_target_internal = 0;
+  sym.st_target_internal = ST_BRANCH_TO_ARM;
   return osi->func (osi->flaginfo, name, &sym, osi->sec, NULL) == 1;
 }
 
@@ -19743,7 +19823,7 @@ elf32_arm_swap_symbol_in (bfd * abfd,
 {
   if (!bfd_elf32_swap_symbol_in (abfd, psrc, pshn, dst))
     return false;
-  dst->st_target_internal = 0;
+  dst->st_target_internal = ST_BRANCH_TO_ARM;
 
   /* New EABI objects mark thumb function symbols by setting the low bit of
      the address.  */
diff --git a/bfd/elf32-i386.c b/bfd/elf32-i386.c
index 7d573e7..2e8d595 100644
--- a/bfd/elf32-i386.c
+++ b/bfd/elf32-i386.c
@@ -975,15 +975,15 @@ elf_i386_check_tls_transition (asection *sec,
 
     case R_386_TLS_IE:
       /* Check transition from IE access model:
-		movl foo@indntpoff(%rip), %eax
-		movl foo@indntpoff(%rip), %reg
-		addl foo@indntpoff(%rip), %reg
+		movl foo@indntpoff, %eax
+		movl foo@indntpoff, %reg
+		addl foo@indntpoff, %reg
        */
 
       if (offset < 1 || (offset + 4) > sec->size)
 	return elf_x86_tls_error_yes;
 
-      /* Check "movl foo@tpoff(%rip), %eax" first.  */
+      /* Check "movl foo@indntpoff, %eax" first.  */
       val = bfd_get_8 (abfd, contents + offset - 1);
       if (val == 0xa1)
 	return elf_x86_tls_error_none;
@@ -991,7 +991,7 @@ elf_i386_check_tls_transition (asection *sec,
       if (offset < 2)
 	return elf_x86_tls_error_yes;
 
-      /* Check movl|addl foo@tpoff(%rip), %reg.   */
+      /* Check movl|addl foo@indntpoff, %reg.   */
       type = bfd_get_8 (abfd, contents + offset - 2);
       if (type != 0x8b && type != 0x03)
 	return elf_x86_tls_error_add_mov;
@@ -1039,19 +1039,8 @@ elf_i386_check_tls_transition (asection *sec,
 	      : elf_x86_tls_error_yes);
 
     case R_386_TLS_DESC_CALL:
-      /* Check transition from GDesc access model:
-		call *x@tlsdesc(%eax)
-       */
-      if (offset + 2 <= sec->size)
-	{
-	  /* Make sure that it's a call *x@tlsdesc(%eax).  */
-	  call = contents + offset;
-	  return (call[0] == 0xff && call[1] == 0x10
-		  ? elf_x86_tls_error_none
-		  : elf_x86_tls_error_indirect_call);
-	}
-
-      return elf_x86_tls_error_yes;
+      /* It has been checked in elf_i386_tls_transition.  */
+      return elf_x86_tls_error_none;
 
     default:
       abort ();
@@ -1077,6 +1066,8 @@ elf_i386_tls_transition (struct bfd_link_info *info, bfd *abfd,
   unsigned int to_type = from_type;
   bool check = true;
   unsigned int to_le_type, to_ie_type;
+  bfd_vma offset;
+  bfd_byte *call;
 
   /* Skip TLS transition for functions.  */
   if (h != NULL
@@ -1098,9 +1089,34 @@ elf_i386_tls_transition (struct bfd_link_info *info, bfd *abfd,
 
   switch (from_type)
     {
+    case R_386_TLS_DESC_CALL:
+      /* Check valid GDesc call:
+		call *x@tlscall(%eax)
+       */
+      offset = rel->r_offset;
+      call = NULL;
+      if (offset + 2 <= sec->size)
+	{
+	  /* Make sure that it's a call *x@tlscall(%eax).  */
+	  call = contents + offset;
+	  if (call[0] != 0xff || call[1] != 0x10)
+	    call = NULL;
+	}
+
+      if (call == NULL)
+	{
+	  _bfd_x86_elf_link_report_tls_transition_error
+	    (info, abfd, sec, symtab_hdr, h, sym, rel,
+	     "R_386_TLS_DESC_CALL", NULL,
+	     elf_x86_tls_error_indirect_call);
+
+	  return false;
+	}
+
+      /* Fall through.  */
+
     case R_386_TLS_GD:
     case R_386_TLS_GOTDESC:
-    case R_386_TLS_DESC_CALL:
     case R_386_TLS_IE_32:
     case R_386_TLS_IE:
     case R_386_TLS_GOTIE:
@@ -1707,7 +1723,7 @@ elf_i386_scan_relocs (bfd *abfd,
 		      name = h->root.root.string;
 		    else
 		      name = bfd_elf_sym_name (abfd, symtab_hdr, isym,
-					     NULL);
+					       NULL);
 		    _bfd_error_handler
 		      /* xgettext:c-format */
 		      (_("%pB: `%s' accessed both as normal and "
diff --git a/bfd/elf32-v850.c b/bfd/elf32-v850.c
index 85cbcbc..bb3ce8d 100644
--- a/bfd/elf32-v850.c
+++ b/bfd/elf32-v850.c
@@ -1933,8 +1933,11 @@ v850_elf_info_to_howto_rela (bfd *abfd,
 static bool
 v850_elf_is_local_label_name (bfd *abfd ATTRIBUTE_UNUSED, const char *name)
 {
-  return (   (name[0] == '.' && (name[1] == 'L' || name[1] == '.'))
-	  || (name[0] == '_' &&  name[1] == '.' && name[2] == 'L' && name[3] == '_'));
+  if (name[0] == '.' && (name[1] == 'L' || name[1] == '.'))
+    return true;
+  if (name[0] == '_' && name[1] == '.' && name[2] == 'L' && name[3] == '_')
+    return true;
+  return false;
 }
 
 static bool
diff --git a/bfd/elf64-x86-64.c b/bfd/elf64-x86-64.c
index 83399ea..4330bbd 100644
--- a/bfd/elf64-x86-64.c
+++ b/bfd/elf64-x86-64.c
@@ -1409,32 +1409,8 @@ elf_x86_64_check_tls_transition (bfd *abfd,
 	      : elf_x86_tls_error_yes);
 
     case R_X86_64_TLSDESC_CALL:
-      /* Check transition from GDesc access model:
-		call *x@tlsdesc(%rax) <--- LP64 mode.
-		call *x@tlsdesc(%eax) <--- X32 mode.
-       */
-      if (offset + 2 <= sec->size)
-	{
-	  unsigned int prefix;
-	  call = contents + offset;
-	  prefix = 0;
-	  if (!ABI_64_P (abfd))
-	    {
-	      /* Check for call *x@tlsdesc(%eax).  */
-	      if (call[0] == 0x67)
-		{
-		  prefix = 1;
-		  if (offset + 3 > sec->size)
-		    return elf_x86_tls_error_yes;
-		}
-	    }
-	  /* Make sure that it's a call *x@tlsdesc(%rax).  */
-	  return (call[prefix] == 0xff && call[1 + prefix] == 0x10
-		  ? elf_x86_tls_error_none
-		  : elf_x86_tls_error_indirect_call);
-	}
-
-      return elf_x86_tls_error_yes;
+      /* It has been checked in elf_x86_64_tls_transition.  */
+      return elf_x86_tls_error_none;
 
     default:
       abort ();
@@ -1459,6 +1435,8 @@ elf_x86_64_tls_transition (struct bfd_link_info *info, bfd *abfd,
   unsigned int from_type = *r_type;
   unsigned int to_type = from_type;
   bool check = true;
+  bfd_vma offset;
+  bfd_byte *call;
 
   /* Skip TLS transition for functions.  */
   if (h != NULL
@@ -1468,10 +1446,49 @@ elf_x86_64_tls_transition (struct bfd_link_info *info, bfd *abfd,
 
   switch (from_type)
     {
+    case R_X86_64_TLSDESC_CALL:
+      /* Check valid GDesc call:
+		call *x@tlscall(%rax) <--- LP64 mode.
+		call *x@tlscall(%eax) <--- X32 mode.
+       */
+      offset = rel->r_offset;
+      call = NULL;
+      if (offset + 2 <= sec->size)
+	{
+	  unsigned int prefix;
+	  call = contents + offset;
+	  prefix = 0;
+	  if (!ABI_64_P (abfd))
+	    {
+	      /* Check for call *x@tlscall(%eax).  */
+	      if (call[0] == 0x67)
+		{
+		  prefix = 1;
+		  if (offset + 3 > sec->size)
+		    call = NULL;
+		}
+	    }
+
+	  /* Make sure that it's a call *x@tlscall(%rax).  */
+	  if (call != NULL
+	      && (call[prefix] != 0xff || call[1 + prefix] != 0x10))
+	    call = NULL;
+	}
+
+      if (call == NULL)
+	{
+	  _bfd_x86_elf_link_report_tls_transition_error
+	    (info, abfd, sec, symtab_hdr, h, sym, rel,
+	     "R_X86_64_TLSDESC_CALL", NULL,
+	     elf_x86_tls_error_indirect_call);
+	  return false;
+	}
+
+      /* Fall through.  */
+
     case R_X86_64_TLSGD:
     case R_X86_64_GOTPC32_TLSDESC:
     case R_X86_64_CODE_4_GOTPC32_TLSDESC:
-    case R_X86_64_TLSDESC_CALL:
     case R_X86_64_GOTTPOFF:
     case R_X86_64_CODE_4_GOTTPOFF:
     case R_X86_64_CODE_6_GOTTPOFF:
@@ -3825,7 +3842,7 @@ elf_x86_64_relocate_section (bfd *output_bfd,
 		  unsigned int prefix = 0;
 		  if (!ABI_64_P (input_bfd))
 		    {
-		      /* Check for call *x@tlsdesc(%eax).  */
+		      /* Check for call *x@tlscall(%eax).  */
 		      if (contents[roff] == 0x67)
 			prefix = 1;
 		    }
@@ -4285,7 +4302,7 @@ elf_x86_64_relocate_section (bfd *output_bfd,
 		  unsigned int prefix = 0;
 		  if (!ABI_64_P (input_bfd))
 		    {
-		      /* Check for call *x@tlsdesc(%eax).  */
+		      /* Check for call *x@tlscall(%eax).  */
 		      if (contents[roff] == 0x67)
 			prefix = 1;
 		    }
diff --git a/bfd/elflink.c b/bfd/elflink.c
index a180e59..19a9aec 100644
--- a/bfd/elflink.c
+++ b/bfd/elflink.c
@@ -64,7 +64,7 @@ _bfd_elf_link_keep_memory (struct bfd_link_info *info)
      this is opt-in by each backend.  */
   const struct elf_backend_data *bed
     = get_elf_backend_data (info->output_bfd);
-  if (bed->use_mmap)
+  if (bed != NULL && bed->use_mmap)
     return false;
 #endif
   bfd *abfd;
@@ -3653,6 +3653,7 @@ elf_link_is_defined_archive_symbol (bfd * abfd, carsym * symdef)
      object file is an IR object, give linker LTO plugin a chance to
      get the correct symbol table.  */
   if (abfd->plugin_format == bfd_plugin_yes
+      || abfd->plugin_format == bfd_plugin_yes_unused
 #if BFD_SUPPORTS_PLUGINS
       || (abfd->plugin_format == bfd_plugin_unknown
 	  && bfd_link_plugin_object_p (abfd))
@@ -5694,7 +5695,8 @@ elf_link_add_object_symbols (bfd *abfd, struct bfd_link_info *info)
       && !bfd_link_relocatable (info)
       && (abfd->flags & BFD_PLUGIN) == 0
       && !just_syms
-      && extsymcount)
+      && extsymcount != 0
+      && is_elf_hash_table (&htab->root))
     {
       int r_sym_shift;
 
@@ -5717,9 +5719,7 @@ elf_link_add_object_symbols (bfd *abfd, struct bfd_link_info *info)
 	  if ((s->flags & SEC_RELOC) == 0
 	      || s->reloc_count == 0
 	      || (s->flags & SEC_EXCLUDE) != 0
-	      || ((info->strip == strip_all
-		   || info->strip == strip_debugger)
-		  && (s->flags & SEC_DEBUGGING) != 0))
+	      || (s->flags & SEC_DEBUGGING) != 0)
 	    continue;
 
 	  internal_relocs = _bfd_elf_link_info_read_relocs
@@ -8819,6 +8819,8 @@ bfd_elf_match_symbols_in_sections (asection *sec1, asection *sec2,
 	    symp->name = bfd_elf_string_from_elf_section (bfd1,
 							  hdr1->sh_link,
 							  ssym->st_name);
+	    if (symp->name == NULL)
+	      goto done;
 	    symp++;
 	  }
 
@@ -8832,6 +8834,8 @@ bfd_elf_match_symbols_in_sections (asection *sec1, asection *sec2,
 	    symp->name = bfd_elf_string_from_elf_section (bfd2,
 							  hdr2->sh_link,
 							  ssym->st_name);
+	    if (symp->name == NULL)
+	      goto done;
 	    symp++;
 	  }
 
@@ -8878,14 +8882,22 @@ bfd_elf_match_symbols_in_sections (asection *sec1, asection *sec2,
     goto done;
 
   for (i = 0; i < count1; i++)
-    symtable1[i].name
-      = bfd_elf_string_from_elf_section (bfd1, hdr1->sh_link,
-					 symtable1[i].u.isym->st_name);
+    {
+      symtable1[i].name
+	= bfd_elf_string_from_elf_section (bfd1, hdr1->sh_link,
+					   symtable1[i].u.isym->st_name);
+      if (symtable1[i].name == NULL)
+	goto done;
+    }
 
   for (i = 0; i < count2; i++)
-    symtable2[i].name
-      = bfd_elf_string_from_elf_section (bfd2, hdr2->sh_link,
-					 symtable2[i].u.isym->st_name);
+    {
+      symtable2[i].name
+	= bfd_elf_string_from_elf_section (bfd2, hdr2->sh_link,
+					   symtable2[i].u.isym->st_name);
+      if (symtable2[i].name == NULL)
+	goto done;
+    }
 
   /* Sort symbol by name.  */
   qsort (symtable1, count1, sizeof (struct elf_symbol),
@@ -12914,7 +12926,7 @@ bfd_elf_final_link (bfd *abfd, struct bfd_link_info *info)
     {
       file_ptr off = elf_next_file_pos (abfd);
 
-      _bfd_elf_assign_file_position_for_section (symtab_hdr, off, true);
+      _bfd_elf_assign_file_position_for_section (symtab_hdr, off, true, 0);
 
       /* Note that at this point elf_next_file_pos (abfd) is
 	 incorrect.  We do not yet know the size of the .symtab section.
@@ -13358,7 +13370,7 @@ bfd_elf_final_link (bfd *abfd, struct bfd_link_info *info)
 	      symtab_shndx_hdr->sh_size = amt;
 
 	      off = _bfd_elf_assign_file_position_for_section (symtab_shndx_hdr,
-							       off, true);
+							       off, true, 0);
 
 	      if (bfd_seek (abfd, symtab_shndx_hdr->sh_offset, SEEK_SET) != 0
 		  || (bfd_write (flinfo.symshndxbuf, amt, abfd) != amt))
@@ -13382,7 +13394,7 @@ bfd_elf_final_link (bfd *abfd, struct bfd_link_info *info)
       symstrtab_hdr->sh_addralign = 1;
 
       off = _bfd_elf_assign_file_position_for_section (symstrtab_hdr,
-						       off, true);
+						       off, true, 0);
       elf_next_file_pos (abfd) = off;
 
       if (bfd_seek (abfd, symstrtab_hdr->sh_offset, SEEK_SET) != 0
diff --git a/bfd/elfnn-loongarch.c b/bfd/elfnn-loongarch.c
index db6d419..63c6fdf 100644
--- a/bfd/elfnn-loongarch.c
+++ b/bfd/elfnn-loongarch.c
@@ -84,6 +84,14 @@ struct _bfd_loongarch_elf_obj_tdata
    && elf_tdata (bfd) != NULL						\
    && elf_object_id (bfd) == LARCH_ELF_DATA)
 
+static bool
+elfNN_loongarch_object (bfd *abfd)
+{
+  return bfd_elf_allocate_object (abfd,
+				  sizeof (struct _bfd_loongarch_elf_obj_tdata),
+				  LARCH_ELF_DATA);
+}
+
 struct relr_entry
 {
   asection *sec;
@@ -121,6 +129,12 @@ struct loongarch_elf_link_hash_table
 
   /* Layout recomputation count.  */
   bfd_size_type relr_layout_iter;
+
+  /* In BFD DT_RELR is implemented as a "relaxation."  If in a relax trip
+     size_relative_relocs is updating the layout, relax_section may see
+     a partially updated state (some sections have vma updated but the
+     others do not), and it's unsafe to do the normal relaxation.  */
+  bool layout_mutating_for_relr;
 };
 
 struct loongarch_elf_section_data
@@ -157,9 +171,7 @@ loongarch_elf_new_section_hook (bfd *abfd, asection *sec)
 
 /* Get the LoongArch ELF linker hash table from a link_info structure.  */
 #define loongarch_elf_hash_table(p)					\
-  (elf_hash_table_id (elf_hash_table (p)) == LARCH_ELF_DATA		\
-   ? ((struct loongarch_elf_link_hash_table *) ((p)->hash))		\
-   : NULL)
+    ((struct loongarch_elf_link_hash_table *) ((p)->hash))		\
 
 #define MINUS_ONE ((bfd_vma) 0 - 1)
 
@@ -2212,6 +2224,8 @@ loongarch_elf_size_relative_relocs (struct bfd_link_info *info,
 	  *need_layout = false;
 	}
     }
+
+  htab->layout_mutating_for_relr = *need_layout;
   return true;
 }
 
@@ -3307,7 +3321,7 @@ loongarch_elf_relocate_section (bfd *output_bfd, struct bfd_link_info *info,
       /* The r_symndx will be STN_UNDEF (zero) only for relocs against symbols
 	 from removed linkonce sections, or sections discarded by a linker
 	 script.  Also for R_*_SOP_PUSH_ABSOLUTE and PCREL to specify const.  */
-      if (r_symndx == STN_UNDEF || bfd_is_abs_section (sec))
+      if (r_symndx == STN_UNDEF)
 	{
 	  defined_local = false;
 	  resolved_local = false;
@@ -3536,7 +3550,7 @@ loongarch_elf_relocate_section (bfd *output_bfd, struct bfd_link_info *info,
 			  bfd_reloc_notsupported, is_undefweak, name,
 			  "TLS section not be created"));
 	      else
-		relocation -= elf_hash_table (info)->tls_sec->vma;
+		relocation = tlsoff (info, relocation);
 	    }
 	  else
 	    fatal = (loongarch_reloc_is_fatal
@@ -3885,73 +3899,71 @@ loongarch_elf_relocate_section (bfd *output_bfd, struct bfd_link_info *info,
 	      {
 		Elf_Internal_Rela rela;
 		asection *srel = htab->elf.srelgot;
-		bfd_vma tls_block_off = 0;
 
-		if (LARCH_REF_LOCAL (info, h))
-		  {
-		    BFD_ASSERT (elf_hash_table (info)->tls_sec);
-		    tls_block_off = relocation
-			- elf_hash_table (info)->tls_sec->vma;
-		  }
+		int indx = 0;
+		bool need_reloc = false;
+		LARCH_TLS_GD_IE_NEED_DYN_RELOC (info, is_dyn, h, indx,
+						need_reloc);
 
 		if (tls_type & GOT_TLS_GD)
 		  {
-		    rela.r_offset = sec_addr (got) + got_off;
-		    rela.r_addend = 0;
-		    if (LARCH_REF_LOCAL (info, h))
+		    if (need_reloc)
 		      {
-			/* Local sym, used in exec, set module id 1.  */
-			if (bfd_link_executable (info))
-			  bfd_put_NN (output_bfd, 1, got->contents + got_off);
+			/* Dynamic resolved Module ID.  */
+			rela.r_offset = sec_addr (got) + got_off;
+			rela.r_addend = 0;
+			rela.r_info = ELFNN_R_INFO (indx, R_LARCH_TLS_DTPMODNN);
+			bfd_put_NN (output_bfd, 0, got->contents + got_off);
+			loongarch_elf_append_rela (output_bfd, srel, &rela);
+
+			if (indx == 0)
+			  {
+			    /* Local symbol, tp offset has been known.  */
+			    BFD_ASSERT (! unresolved_reloc);
+			    bfd_put_NN (output_bfd,
+				tlsoff (info, relocation),
+				(got->contents + got_off + GOT_ENTRY_SIZE));
+			  }
 			else
 			  {
-			    rela.r_info = ELFNN_R_INFO (0,
-							R_LARCH_TLS_DTPMODNN);
+			    /* Dynamic resolved block offset.  */
+			    bfd_put_NN (output_bfd, 0,
+				got->contents + got_off + GOT_ENTRY_SIZE);
+			    rela.r_info = ELFNN_R_INFO (indx,
+						R_LARCH_TLS_DTPRELNN);
+			    rela.r_offset += GOT_ENTRY_SIZE;
 			    loongarch_elf_append_rela (output_bfd, srel, &rela);
 			  }
-
-			bfd_put_NN (output_bfd, tls_block_off,
-				    got->contents + got_off + GOT_ENTRY_SIZE);
 		      }
-		    /* Dynamic resolved.  */
 		    else
 		      {
-			/* Dynamic relocate module id.  */
-			rela.r_info = ELFNN_R_INFO (h->dynindx,
-						    R_LARCH_TLS_DTPMODNN);
-			loongarch_elf_append_rela (output_bfd, srel, &rela);
-
-			/* Dynamic relocate offset of block.  */
-			rela.r_offset += GOT_ENTRY_SIZE;
-			rela.r_info = ELFNN_R_INFO (h->dynindx,
-						    R_LARCH_TLS_DTPRELNN);
-			loongarch_elf_append_rela (output_bfd, srel, &rela);
+			/* In a static link or an executable link with the symbol
+			   binding locally.  Mark it as belonging to module 1.  */
+			bfd_put_NN (output_bfd, 1, got->contents + got_off);
+			bfd_put_NN (output_bfd, tlsoff (info, relocation),
+			    got->contents + got_off + GOT_ENTRY_SIZE);
 		      }
 		  }
 		if (tls_type & GOT_TLS_IE)
 		  {
-		    rela.r_offset = sec_addr (got) + got_off + ie_off;
-		    if (LARCH_REF_LOCAL (info, h))
+		    if (need_reloc)
 		      {
-			/* Local sym, used in exec, set module id 1.  */
-			if (!bfd_link_executable (info))
-			  {
-			    rela.r_info = ELFNN_R_INFO (0, R_LARCH_TLS_TPRELNN);
-			    rela.r_addend = tls_block_off;
-			    loongarch_elf_append_rela (output_bfd, srel, &rela);
-			  }
+			bfd_put_NN (output_bfd, 0,
+			    got->contents + got_off + ie_off);
+			rela.r_offset = sec_addr (got) + got_off + ie_off;
+			rela.r_addend = 0;
 
-			bfd_put_NN (output_bfd, tls_block_off,
-				    got->contents + got_off + ie_off);
+			if (indx == 0)
+			  rela.r_addend = tlsoff (info, relocation);
+			rela.r_info = ELFNN_R_INFO (indx, R_LARCH_TLS_TPRELNN);
+			loongarch_elf_append_rela (output_bfd, srel, &rela);
 		      }
-		    /* Dynamic resolved.  */
 		    else
 		      {
-			/* Dynamic relocate offset of block.  */
-			rela.r_info = ELFNN_R_INFO (h->dynindx,
-						    R_LARCH_TLS_TPRELNN);
-			rela.r_addend = 0;
-			loongarch_elf_append_rela (output_bfd, srel, &rela);
+			/* In a static link or an executable link with the symbol
+			   binding locally, compute offset directly.  */
+			bfd_put_NN (output_bfd, tlsoff (info, relocation),
+			    got->contents + got_off + ie_off);
 		      }
 		  }
 	      }
@@ -4061,7 +4073,7 @@ loongarch_elf_relocate_section (bfd *output_bfd, struct bfd_link_info *info,
 	  /* For 2G jump, generate pcalau12i, jirl.  */
 	  /* If use jirl, turns to R_LARCH_B16.  */
 	  uint32_t insn = bfd_get (32, input_bfd, contents + rel->r_offset);
-	  if ((insn & 0x4c000000) == 0x4c000000)
+	  if (LARCH_INSN_JIRL(insn))
 	    {
 	      relocation &= 0xfff;
 	      /* Signed extend.  */
@@ -4132,8 +4144,10 @@ loongarch_elf_relocate_section (bfd *output_bfd, struct bfd_link_info *info,
 		      if (!WILL_CALL_FINISH_DYNAMIC_SYMBOL (is_dyn,
 							    bfd_link_pic (info),
 							    h)
+			  && !bfd_is_abs_section(h->root.u.def.section)
 			  && bfd_link_pic (info)
-			  && LARCH_REF_LOCAL (info, h))
+			  && LARCH_REF_LOCAL (info, h)
+			  && !info->enable_dt_relr)
 			{
 			  Elf_Internal_Rela rela;
 			  rela.r_offset = sec_addr (got) + got_off;
@@ -4153,7 +4167,8 @@ loongarch_elf_relocate_section (bfd *output_bfd, struct bfd_link_info *info,
 			      && local_got_offsets[r_symndx] != MINUS_ONE);
 
 		  got_off = local_got_offsets[r_symndx] & (~(bfd_vma)1);
-		  if ((local_got_offsets[r_symndx] & 1) == 0)
+		  if (sym->st_shndx != SHN_ABS
+		      && (local_got_offsets[r_symndx] & 1) == 0)
 		    {
 		      if (bfd_link_pic (info) && !info->enable_dt_relr)
 			{
@@ -4700,7 +4715,7 @@ loongarch_tls_perform_trans (bfd *abfd, asection *sec,
 	       pcalalau12i $a0,%desc_pc_hi20(var) =>
 	       lu12i.w $a0,%le_hi20(var)
 	    */
-	    bfd_put (32, abfd, LARCH_LU12I_W | LARCH_RD_A0,
+	    bfd_put (32, abfd, LARCH_OP_LU12I_W | LARCH_RD_A0,
 		contents + rel->r_offset);
 	    rel->r_info = ELFNN_R_INFO (r_symndx, R_LARCH_TLS_LE_HI20);
 	  }
@@ -4721,8 +4736,8 @@ loongarch_tls_perform_trans (bfd *abfd, asection *sec,
 	       addi.d $a0,$a0,%desc_pc_lo12(var) =>
 	       ori  $a0,$a0,le_lo12(var)
 	    */
-	    insn = LARCH_ORI | LARCH_RD_RJ_A0;
-	    bfd_put (32, abfd, LARCH_ORI | LARCH_RD_RJ_A0,
+	    insn = LARCH_OP_ORI | LARCH_RD_RJ_A0;
+	    bfd_put (32, abfd, LARCH_OP_ORI | LARCH_RD_RJ_A0,
 		contents + rel->r_offset);
 	    rel->r_info = ELFNN_R_INFO (r_symndx, R_LARCH_TLS_LE_LO12);
 	  }
@@ -4732,7 +4747,7 @@ loongarch_tls_perform_trans (bfd *abfd, asection *sec,
 	       addi.d $a0,$a0,%desc_pc_lo12(var) =>
 	       ld.d $a0,$a0,%ie_pc_lo12(var)
 	    */
-	    bfd_put (32, abfd, LARCH_LD_D | LARCH_RD_RJ_A0,
+	    bfd_put (32, abfd, LARCH_OP_LD_D | LARCH_RD_RJ_A0,
 		contents + rel->r_offset);
 	    rel->r_info = ELFNN_R_INFO (r_symndx, R_LARCH_TLS_IE_PC_LO12);
 	  }
@@ -4759,7 +4774,7 @@ loongarch_tls_perform_trans (bfd *abfd, asection *sec,
 	       lu12i.w $rd,%le_hi20(var)
 	    */
 	    insn = bfd_getl32 (contents + rel->r_offset);
-	    bfd_put (32, abfd, LARCH_LU12I_W | (insn & 0x1f),
+	    bfd_put (32, abfd, LARCH_OP_LU12I_W | LARCH_GET_RD(insn),
 		contents + rel->r_offset);
 	    rel->r_info = ELFNN_R_INFO (r_symndx, R_LARCH_TLS_LE_HI20);
 	  }
@@ -4773,7 +4788,7 @@ loongarch_tls_perform_trans (bfd *abfd, asection *sec,
 	       ori  $rd,$rj,le_lo12(var)
 	    */
 	    insn = bfd_getl32 (contents + rel->r_offset);
-	    bfd_put (32, abfd, LARCH_ORI | (insn & 0x3ff),
+	    bfd_put (32, abfd, LARCH_OP_ORI | (insn & 0x3ff),
 		contents + rel->r_offset);
 	    rel->r_info = ELFNN_R_INFO (r_symndx, R_LARCH_TLS_LE_LO12);
 	  }
@@ -4871,11 +4886,11 @@ loongarch_relax_tls_le (bfd *abfd, asection *sec,
 		/* Change rj to $tp.  */
 		insn_rj = 0x2 << 5;
 		/* Get rd register.  */
-		insn_rd = insn & 0x1f;
+		insn_rd = LARCH_GET_RD(insn);
 		/* Write symbol offset.  */
 		symval <<= 10;
 		/* Writes the modified instruction.  */
-		insn = insn & 0xffc00000;
+		insn = insn & LARCH_MK_ADDI_D;
 		insn = insn | symval | insn_rj | insn_rd;
 		bfd_put (32, abfd, insn, contents + rel->r_offset);
 	      }
@@ -4890,7 +4905,7 @@ loongarch_relax_tls_le (bfd *abfd, asection *sec,
 	    break;
 
 	  case R_LARCH_TLS_LE_LO12:
-	    bfd_put (32, abfd, LARCH_ORI | (insn & 0x1f),
+	    bfd_put (32, abfd, LARCH_OP_ORI | LARCH_GET_RD(insn),
 		    contents + rel->r_offset);
 	    break;
 
@@ -4936,7 +4951,7 @@ loongarch_relax_pcala_addi (bfd *abfd, asection *sec, asection *sym_sec,
   Elf_Internal_Rela *rel_lo = rel_hi + 2;
   uint32_t pca = bfd_get (32, abfd, contents + rel_hi->r_offset);
   uint32_t add = bfd_get (32, abfd, contents + rel_lo->r_offset);
-  uint32_t rd = pca & 0x1f;
+  uint32_t rd = LARCH_GET_RD(pca);
 
   /* This section's output_offset need to subtract the bytes of instructions
      relaxed by the previous sections, so it needs to be updated beforehand.
@@ -4957,18 +4972,17 @@ loongarch_relax_pcala_addi (bfd *abfd, asection *sec, asection *sym_sec,
   else if (symval < pc)
     pc += (max_alignment > 4 ? max_alignment : 0);
 
-  const uint32_t addi_d = 0x02c00000;
-  const uint32_t pcaddi = 0x18000000;
+  const uint32_t pcaddi = LARCH_OP_PCADDI;
 
   /* Is pcalau12i + addi.d insns?  */
   if ((ELFNN_R_TYPE (rel_lo->r_info) != R_LARCH_PCALA_LO12)
       || (ELFNN_R_TYPE ((rel_lo + 1)->r_info) != R_LARCH_RELAX)
       || (ELFNN_R_TYPE ((rel_hi + 1)->r_info) != R_LARCH_RELAX)
       || (rel_hi->r_offset + 4 != rel_lo->r_offset)
-      || ((add & addi_d) != addi_d)
+      || !LARCH_INSN_ADDI_D(add)
       /* Is pcalau12i $rd + addi.d $rd,$rd?  */
-      || ((add & 0x1f) != rd)
-      || (((add >> 5) & 0x1f) != rd)
+      || (LARCH_GET_RD(add) != rd)
+      || (LARCH_GET_RJ(add) != rd)
       /* Can be relaxed to pcaddi?  */
       || (symval & 0x3) /* 4 bytes align.  */
       || ((bfd_signed_vma)(symval - pc) < (bfd_signed_vma)(int32_t)0xffe00000)
@@ -5001,7 +5015,7 @@ loongarch_relax_call36 (bfd *abfd, asection *sec, asection *sym_sec,
 {
   bfd_byte *contents = elf_section_data (sec)->this_hdr.contents;
   uint32_t jirl = bfd_get (32, abfd, contents + rel->r_offset + 4);
-  uint32_t rd = jirl & 0x1f;
+  uint32_t rd = LARCH_GET_RD(jirl);
 
   /* This section's output_offset need to subtract the bytes of instructions
      relaxed by the previous sections, so it needs to be updated beforehand.
@@ -5022,11 +5036,10 @@ loongarch_relax_call36 (bfd *abfd, asection *sec, asection *sym_sec,
   else if (symval < pc)
     pc += (max_alignment > 4 ? max_alignment : 0);
 
-  const uint32_t jirl_opcode = 0x4c000000;
 
   /* Is pcalau12i + addi.d insns?  */
   if ((ELFNN_R_TYPE ((rel + 1)->r_info) != R_LARCH_RELAX)
-      || ((jirl & jirl_opcode) != jirl_opcode)
+      || !LARCH_INSN_JIRL(jirl)
       || ((bfd_signed_vma)(symval - pc) < (bfd_signed_vma)(int32_t)0xf8000000)
       || ((bfd_signed_vma)(symval - pc) > (bfd_signed_vma)(int32_t)0x7fffffc))
     return false;
@@ -5034,8 +5047,8 @@ loongarch_relax_call36 (bfd *abfd, asection *sec, asection *sym_sec,
   /* Continue next relax trip.  */
   *again = true;
 
-  const uint32_t bl = 0x54000000;
-  const uint32_t b = 0x50000000;
+  const uint32_t bl = LARCH_OP_BL;
+  const uint32_t b = LARCH_OP_B;
 
   if (rd)
     bfd_put (32, abfd, bl, contents + rel->r_offset);
@@ -5058,17 +5071,16 @@ loongarch_relax_pcala_ld (bfd *abfd, asection *sec,
   Elf_Internal_Rela *rel_lo = rel_hi + 2;
   uint32_t pca = bfd_get (32, abfd, contents + rel_hi->r_offset);
   uint32_t ld = bfd_get (32, abfd, contents + rel_lo->r_offset);
-  uint32_t rd = pca & 0x1f;
-  const uint32_t ld_d = 0x28c00000;
-  uint32_t addi_d = 0x02c00000;
+  uint32_t rd = LARCH_GET_RD(pca);
+  uint32_t addi_d = LARCH_OP_ADDI_D;
 
   if ((ELFNN_R_TYPE (rel_lo->r_info) != R_LARCH_GOT_PC_LO12)
       || (ELFNN_R_TYPE ((rel_lo + 1)->r_info) != R_LARCH_RELAX)
       || (ELFNN_R_TYPE ((rel_hi + 1)->r_info) != R_LARCH_RELAX)
       || (rel_hi->r_offset + 4 != rel_lo->r_offset)
-      || ((ld & 0x1f) != rd)
-      || (((ld >> 5) & 0x1f) != rd)
-      || ((ld & ld_d) != ld_d))
+      || (LARCH_GET_RD(ld) != rd)
+      || (LARCH_GET_RJ(ld) != rd)
+      || !LARCH_INSN_LD_D(ld))
     return false;
 
   addi_d = addi_d | (rd << 5) | rd;
@@ -5161,7 +5173,7 @@ loongarch_relax_tls_ld_gd_desc (bfd *abfd, asection *sec, asection *sym_sec,
   Elf_Internal_Rela *rel_lo = rel_hi + 2;
   uint32_t pca = bfd_get (32, abfd, contents + rel_hi->r_offset);
   uint32_t add = bfd_get (32, abfd, contents + rel_lo->r_offset);
-  uint32_t rd = pca & 0x1f;
+  uint32_t rd = LARCH_GET_RD(pca);
 
   /* This section's output_offset need to subtract the bytes of instructions
      relaxed by the previous sections, so it needs to be updated beforehand.
@@ -5182,8 +5194,7 @@ loongarch_relax_tls_ld_gd_desc (bfd *abfd, asection *sec, asection *sym_sec,
   else if (symval < pc)
     pc += (max_alignment > 4 ? max_alignment : 0);
 
-  const uint32_t addi_d = 0x02c00000;
-  const uint32_t pcaddi = 0x18000000;
+  const uint32_t pcaddi = LARCH_OP_PCADDI;
 
   /* Is pcalau12i + addi.d insns?  */
   if ((ELFNN_R_TYPE (rel_lo->r_info) != R_LARCH_GOT_PC_LO12
@@ -5191,10 +5202,10 @@ loongarch_relax_tls_ld_gd_desc (bfd *abfd, asection *sec, asection *sym_sec,
       || (ELFNN_R_TYPE ((rel_lo + 1)->r_info) != R_LARCH_RELAX)
       || (ELFNN_R_TYPE ((rel_hi + 1)->r_info) != R_LARCH_RELAX)
       || (rel_hi->r_offset + 4 != rel_lo->r_offset)
-      || ((add & addi_d) != addi_d)
+      || !LARCH_INSN_ADDI_D(add)
       /* Is pcalau12i $rd + addi.d $rd,$rd?  */
-      || ((add & 0x1f) != rd)
-      || (((add >> 5) & 0x1f) != rd)
+      || (LARCH_GET_RD(add) != rd)
+      || (LARCH_GET_RJ(add) != rd)
       /* Can be relaxed to pcaddi?  */
       || (symval & 0x3) /* 4 bytes align.  */
       || ((bfd_signed_vma)(symval - pc) < (bfd_signed_vma)(int32_t)0xffe00000)
@@ -5249,15 +5260,21 @@ loongarch_get_max_alignment (asection *sec)
 
 static bool
 loongarch_elf_relax_section (bfd *abfd, asection *sec,
-			       struct bfd_link_info *info,
-			       bool *again)
+			     struct bfd_link_info *info,
+			     bool *again)
 {
-  struct loongarch_elf_link_hash_table *htab = loongarch_elf_hash_table (info);
-  struct bfd_elf_section_data *data = elf_section_data (sec);
-  Elf_Internal_Shdr *symtab_hdr = &elf_symtab_hdr (abfd);
-  Elf_Internal_Rela *relocs;
   *again = false;
-  bfd_vma max_alignment = 0;
+  if (!is_elf_hash_table (info->hash)
+      || elf_hash_table_id (elf_hash_table (info)) != LARCH_ELF_DATA)
+    return true;
+
+  struct loongarch_elf_link_hash_table *htab = loongarch_elf_hash_table (info);
+
+  /* It may happen that some sections have updated vma but the others do
+     not.  Go to the next relax trip (size_relative_relocs should have
+     been demending another relax trip anyway).  */
+  if (htab->layout_mutating_for_relr)
+    return true;
 
   if (bfd_link_relocatable (info)
       || sec->sec_flg0
@@ -5270,6 +5287,8 @@ loongarch_elf_relax_section (bfd *abfd, asection *sec,
       || *(htab->data_segment_phase) == 4)
     return true;
 
+  struct bfd_elf_section_data *data = elf_section_data (sec);
+  Elf_Internal_Rela *relocs;
   if (data->relocs)
     relocs = data->relocs;
   else if (!(relocs = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL,
@@ -5280,6 +5299,7 @@ loongarch_elf_relax_section (bfd *abfd, asection *sec,
       && !bfd_malloc_and_get_section (abfd, sec, &data->this_hdr.contents))
     return true;
 
+  Elf_Internal_Shdr *symtab_hdr = &elf_symtab_hdr (abfd);
   if (symtab_hdr->sh_info != 0
       && !symtab_hdr->contents
       && !(symtab_hdr->contents =
@@ -5292,7 +5312,7 @@ loongarch_elf_relax_section (bfd *abfd, asection *sec,
 
   /* Estimate the maximum alignment for all output sections once time
      should be enough.  */
-  max_alignment = htab->max_alignment;
+  bfd_vma max_alignment = htab->max_alignment;
   if (max_alignment == (bfd_vma) -1)
     {
       max_alignment = loongarch_get_max_alignment (sec);
@@ -5305,6 +5325,7 @@ loongarch_elf_relax_section (bfd *abfd, asection *sec,
       bfd_vma symval;
       asection *sym_sec;
       bool local_got = false;
+      bool is_abs_symbol = false;
       Elf_Internal_Rela *rel = relocs + i;
       struct elf_link_hash_entry *h = NULL;
       unsigned long r_type = ELFNN_R_TYPE (rel->r_info);
@@ -5486,7 +5507,21 @@ loongarch_elf_relax_section (bfd *abfd, asection *sec,
 	  break;
 
 	case R_LARCH_GOT_PC_HI20:
+	  if (h)
+	    is_abs_symbol = bfd_is_abs_section(h->root.u.def.section);
+	  else
+	    {
+	      Elf_Internal_Sym *sym = (Elf_Internal_Sym *)symtab_hdr->contents
+				    + ELFNN_R_SYM (rel->r_info);
+	      is_abs_symbol = sym->st_shndx == SHN_ABS;
+	    }
+	 /* If symval is in the range [-2^31, 2^31), we can relax the
+	    pair of instructions from pcalau12i/ld.d to lu12i.w/ori for
+	    abosulte symbol. This is not implemented yet, so we just
+	    remain the r_type which will be needed when relocate for
+	    absolute symbol. */
 	  if (local_got && 0 == info->relax_pass
+	      && !is_abs_symbol
 	      && (i + 4) <= sec->reloc_count)
 	    {
 	      if (loongarch_relax_pcala_ld (abfd, sec, rel))
@@ -6132,6 +6167,8 @@ elf_loongarch64_hash_symbol (struct elf_link_hash_entry *h)
 #define bfd_elfNN_bfd_reloc_name_lookup loongarch_reloc_name_lookup
 #define elf_info_to_howto_rel NULL /* Fall through to elf_info_to_howto.  */
 #define elf_info_to_howto loongarch_info_to_howto_rela
+#define bfd_elfNN_mkobject						  \
+  elfNN_loongarch_object
 #define bfd_elfNN_bfd_merge_private_bfd_data				  \
   elfNN_loongarch_merge_private_bfd_data
 
diff --git a/bfd/elfnn-riscv.c b/bfd/elfnn-riscv.c
index 90ecc27..c8bf45f 100644
--- a/bfd/elfnn-riscv.c
+++ b/bfd/elfnn-riscv.c
@@ -5612,7 +5612,7 @@ riscv_elf_is_target_special_symbol (bfd *abfd, asymbol *sym)
 {
   /* PR27584, local and empty symbols.  Since they are usually
      generated for pcrel relocations.  */
-  return (!strcmp (sym->name, "")
+  return (!sym->name[0]
 	  || _bfd_elf_is_local_label_name (abfd, sym->name)
 	  /* PR27916, mapping symbols.  */
 	  || riscv_elf_is_mapping_symbols (sym->name));
diff --git a/bfd/elfxx-riscv.c b/bfd/elfxx-riscv.c
index b8f314d..4b48d8e 100644
--- a/bfd/elfxx-riscv.c
+++ b/bfd/elfxx-riscv.c
@@ -1182,8 +1182,8 @@ static struct riscv_implicit_subset riscv_implicit_subsets[] =
 
   {"m", "+zmmul", check_implicit_always},
 
-  {"zabha", "+a", check_implicit_always},
-  {"zacas", "+a", check_implicit_always},
+  {"zabha", "+zaamo", check_implicit_always},
+  {"zacas", "+zaamo", check_implicit_always},
   {"a", "+zaamo,+zalrsc", check_implicit_always},
 
   {"xsfvcp", "+zve32x", check_implicit_always},
@@ -1213,6 +1213,7 @@ static struct riscv_implicit_subset riscv_implicit_subsets[] =
   {"zcd", "+d,+zca", check_implicit_always},
   {"zcf", "+f,+zca", check_implicit_always},
   {"zcmp", "+zca", check_implicit_always},
+  {"zcmop", "+zca", check_implicit_always},
 
   {"shcounterenw", "+h", check_implicit_always},
   {"shgatpa", "+h", check_implicit_always},
@@ -1344,6 +1345,7 @@ static struct riscv_supported_ext riscv_supported_std_z_ext[] =
   {"zihintntl",		ISA_SPEC_CLASS_DRAFT,		1, 0,  0 },
   {"zihintpause",	ISA_SPEC_CLASS_DRAFT,		2, 0,  0 },
   {"zihpm",		ISA_SPEC_CLASS_DRAFT,		2, 0,  0 },
+  {"zimop",		ISA_SPEC_CLASS_DRAFT,		1, 0,  0 },
   {"zmmul",		ISA_SPEC_CLASS_DRAFT,		1, 0,  0 },
   {"za64rs",		ISA_SPEC_CLASS_DRAFT,		1, 0,  0 },
   {"za128rs",		ISA_SPEC_CLASS_DRAFT,		1, 0,  0 },
@@ -1420,6 +1422,7 @@ static struct riscv_supported_ext riscv_supported_std_z_ext[] =
   {"zcb",		ISA_SPEC_CLASS_DRAFT,		1, 0,  0 },
   {"zcf",		ISA_SPEC_CLASS_DRAFT,		1, 0,  0 },
   {"zcd",		ISA_SPEC_CLASS_DRAFT,		1, 0,  0 },
+  {"zcmop",		ISA_SPEC_CLASS_DRAFT,		1, 0,  0 },
   {"zcmp",		ISA_SPEC_CLASS_DRAFT,		1, 0,  0 },
   {NULL, 0, 0, 0, 0}
 };
@@ -1436,6 +1439,7 @@ static struct riscv_supported_ext riscv_supported_std_s_ext[] =
   {"smcsrind",		ISA_SPEC_CLASS_DRAFT,		1, 0, 0 },
   {"smcntrpmf",		ISA_SPEC_CLASS_DRAFT,		1, 0, 0 },
   {"smepmp",		ISA_SPEC_CLASS_DRAFT,		1, 0, 0 },
+  {"smrnmi",		ISA_SPEC_CLASS_DRAFT,		1, 0, 0 },
   {"smstateen",		ISA_SPEC_CLASS_DRAFT,		1, 0, 0 },
   {"ssaia",		ISA_SPEC_CLASS_DRAFT,		1, 0, 0 },
   {"ssccptr",		ISA_SPEC_CLASS_DRAFT,		1, 0, 0 },
@@ -1463,11 +1467,13 @@ static struct riscv_supported_ext riscv_supported_std_zxm_ext[] =
 
 static struct riscv_supported_ext riscv_supported_vendor_x_ext[] =
 {
-  {"xcvmac",		ISA_SPEC_CLASS_DRAFT,	1, 0, 0 },
   {"xcvalu",		ISA_SPEC_CLASS_DRAFT,	1, 0, 0 },
-  {"xcvelw",		ISA_SPEC_CLASS_DRAFT,	1, 0, 0 },
   {"xcvbi",		ISA_SPEC_CLASS_DRAFT,	1, 0, 0 },
+  {"xcvbitmanip",	ISA_SPEC_CLASS_DRAFT,   1, 0, 0 },
+  {"xcvelw",		ISA_SPEC_CLASS_DRAFT,   1, 0, 0 },
+  {"xcvmac",		ISA_SPEC_CLASS_DRAFT,   1, 0, 0 },
   {"xcvmem",		ISA_SPEC_CLASS_DRAFT,	1, 0, 0 },
+  {"xcvsimd",		ISA_SPEC_CLASS_DRAFT,	1, 0, 0 },
   {"xtheadba",		ISA_SPEC_CLASS_DRAFT,	1, 0, 0 },
   {"xtheadbb",		ISA_SPEC_CLASS_DRAFT,	1, 0, 0 },
   {"xtheadbs",		ISA_SPEC_CLASS_DRAFT,	1, 0, 0 },
@@ -2556,6 +2562,8 @@ riscv_multi_subset_supports (riscv_parse_subset_t *rps,
 		  || riscv_subset_supports (rps, "zca")));
     case INSN_CLASS_ZIHINTPAUSE:
       return riscv_subset_supports (rps, "zihintpause");
+    case INSN_CLASS_ZIMOP:
+      return riscv_subset_supports (rps, "zimop");
     case INSN_CLASS_M:
       return riscv_subset_supports (rps, "m");
     case INSN_CLASS_ZMMUL:
@@ -2708,22 +2716,28 @@ riscv_multi_subset_supports (riscv_parse_subset_t *rps,
     case INSN_CLASS_ZCB_AND_ZMMUL:
       return (riscv_subset_supports (rps, "zcb")
 	      && riscv_subset_supports (rps, "zmmul"));
+    case INSN_CLASS_ZCMOP:
+      return riscv_subset_supports (rps, "zcmop");
     case INSN_CLASS_ZCMP:
       return riscv_subset_supports (rps, "zcmp");
     case INSN_CLASS_SVINVAL:
       return riscv_subset_supports (rps, "svinval");
     case INSN_CLASS_H:
       return riscv_subset_supports (rps, "h");
-    case INSN_CLASS_XCVMAC:
-      return riscv_subset_supports (rps, "xcvmac");
     case INSN_CLASS_XCVALU:
       return riscv_subset_supports (rps, "xcvalu");
-    case INSN_CLASS_XCVELW:
-      return riscv_subset_supports (rps, "xcvelw");
     case INSN_CLASS_XCVBI:
       return riscv_subset_supports (rps, "xcvbi");
+    case INSN_CLASS_XCVBITMANIP:
+      return riscv_subset_supports (rps, "xcvbitmanip");
+    case INSN_CLASS_XCVELW:
+      return riscv_subset_supports (rps, "xcvelw");
+    case INSN_CLASS_XCVMAC:
+      return riscv_subset_supports (rps, "xcvmac");
     case INSN_CLASS_XCVMEM:
       return riscv_subset_supports (rps, "xcvmem");
+    case INSN_CLASS_XCVSIMD:
+      return riscv_subset_supports (rps, "xcvsimd");
     case INSN_CLASS_XTHEADBA:
       return riscv_subset_supports (rps, "xtheadba");
     case INSN_CLASS_XTHEADBB:
@@ -2803,6 +2817,8 @@ riscv_multi_subset_supports_ext (riscv_parse_subset_t *rps,
 	return _("c' or `zca");
     case INSN_CLASS_ZIHINTPAUSE:
       return "zihintpause";
+    case INSN_CLASS_ZIMOP:
+      return "zimop";
     case INSN_CLASS_M:
       return "m";
     case INSN_CLASS_ZMMUL:
@@ -2982,22 +2998,28 @@ riscv_multi_subset_supports_ext (riscv_parse_subset_t *rps,
       return _("zcb' and `zbb");
     case INSN_CLASS_ZCB_AND_ZMMUL:
       return _("zcb' and `zmmul', or `zcb' and `m");
+    case INSN_CLASS_ZCMOP:
+      return "zcmop";
     case INSN_CLASS_ZCMP:
       return "zcmp";
     case INSN_CLASS_SVINVAL:
       return "svinval";
     case INSN_CLASS_H:
       return _("h");
-    case INSN_CLASS_XCVMAC:
-      return "xcvmac";
     case INSN_CLASS_XCVALU:
       return "xcvalu";
-    case INSN_CLASS_XCVELW:
-      return "xcvelw";
     case INSN_CLASS_XCVBI:
       return "xcvbi";
+    case INSN_CLASS_XCVBITMANIP:
+      return "xcvbitmanip";
+    case INSN_CLASS_XCVELW:
+      return "xcvelw";
+    case INSN_CLASS_XCVMAC:
+      return "xcvmac";
     case INSN_CLASS_XCVMEM:
       return "xcvmem";
+    case INSN_CLASS_XCVSIMD:
+      return "xcvsimd";
     case INSN_CLASS_XTHEADBA:
       return "xtheadba";
     case INSN_CLASS_XTHEADBB:
diff --git a/bfd/elfxx-x86.c b/bfd/elfxx-x86.c
index 85737fc..dd951b9 100644
--- a/bfd/elfxx-x86.c
+++ b/bfd/elfxx-x86.c
@@ -745,6 +745,7 @@ _bfd_x86_elf_link_hash_table_create (bfd *abfd)
       ret->tls_get_addr = "__tls_get_addr";
       ret->relative_r_type = R_X86_64_RELATIVE;
       ret->relative_r_name = "R_X86_64_RELATIVE";
+      ret->ax_register = "RAX";
       ret->elf_append_reloc = elf_append_rela;
       ret->elf_write_addend_in_got = _bfd_elf64_write_addend;
     }
@@ -776,6 +777,7 @@ _bfd_x86_elf_link_hash_table_create (bfd *abfd)
 	  ret->pointer_r_type = R_386_32;
 	  ret->relative_r_type = R_386_RELATIVE;
 	  ret->relative_r_name = "R_386_RELATIVE";
+	  ret->ax_register = "EAX";
 	  ret->elf_append_reloc = elf_append_rel;
 	  ret->elf_write_addend = _bfd_elf32_write_addend;
 	  ret->elf_write_addend_in_got = _bfd_elf32_write_addend;
@@ -3211,15 +3213,14 @@ _bfd_x86_elf_link_report_tls_transition_error
    enum elf_x86_tls_error_type tls_error)
 {
   const char *name;
+  const struct elf_backend_data *bed = get_elf_backend_data (abfd);
+  struct elf_x86_link_hash_table *htab
+    = elf_x86_hash_table (info, bed->target_id);
 
   if (h)
     name = h->root.root.string;
   else
     {
-      const struct elf_backend_data *bed
-	= get_elf_backend_data (abfd);
-      struct elf_x86_link_hash_table *htab
-	= elf_x86_hash_table (info, bed->target_id);
       if (htab == NULL)
 	name = "*unknown*";
       else
@@ -3265,8 +3266,9 @@ _bfd_x86_elf_link_report_tls_transition_error
       info->callbacks->einfo
 	/* xgettext:c-format */
 	(_("%pB(%pA+0x%v): relocation %s against `%s' must be used "
-	   "in indirect CALL only\n"),
-	 abfd, asect, rel->r_offset, from_reloc_name, name);
+	   "in indirect CALL with %s register only\n"),
+	 abfd, asect, rel->r_offset, from_reloc_name, name,
+	 htab->ax_register);
       break;
 
     case elf_x86_tls_error_lea:
diff --git a/bfd/elfxx-x86.h b/bfd/elfxx-x86.h
index 5eef7b0..b042d45 100644
--- a/bfd/elfxx-x86.h
+++ b/bfd/elfxx-x86.h
@@ -687,6 +687,7 @@ struct elf_x86_link_hash_table
   const char *dynamic_interpreter;
   const char *tls_get_addr;
   const char *relative_r_name;
+  const char *ax_register;
   void (*elf_append_reloc) (bfd *, asection *, Elf_Internal_Rela *);
   void (*elf_write_addend) (bfd *, uint64_t, void *);
   void (*elf_write_addend_in_got) (bfd *, uint64_t, void *);
diff --git a/bfd/libbfd.c b/bfd/libbfd.c
index 5386847..4da842e 100644
--- a/bfd/libbfd.c
+++ b/bfd/libbfd.c
@@ -1126,7 +1126,7 @@ _bfd_munmap_readonly_temporary (void *ptr, size_t rsize)
 {
   /* NB: Since _bfd_munmap_readonly_temporary is called like free, PTR
      may be NULL.  Otherwise, PTR and RSIZE must be valid.  If RSIZE is
-     0, _bfd_malloc_and_read is called.  */
+     0, free is called.  */
   if (ptr == NULL)
     return;
   if (rsize != 0)
diff --git a/bfd/pdb.c b/bfd/pdb.c
index b0455b0..340cda6 100644
--- a/bfd/pdb.c
+++ b/bfd/pdb.c
@@ -412,7 +412,8 @@ pdb_allocate_block (uint32_t *num_blocks, uint32_t block_size)
 
 static bool
 pdb_write_directory (bfd *abfd, uint32_t block_size, uint32_t num_files,
-		     uint32_t block_map_addr, uint32_t * num_blocks)
+		     uint32_t block_map_addr, uint32_t * num_blocks,
+		     uint32_t *stream0_start)
 {
   char tmp[sizeof (uint32_t)];
   uint32_t block, left, block_map_off;
@@ -561,6 +562,9 @@ pdb_write_directory (bfd *abfd, uint32_t block_size, uint32_t num_files,
 	      return false;
 	    }
 
+	  if (arelt == abfd->archive_head && i == 0)
+	    *stream0_start = file_block;
+
 	  left -= sizeof (uint32_t);
 
 	  /* Read file contents into buffer.  */
@@ -617,7 +621,8 @@ pdb_write_directory (bfd *abfd, uint32_t block_size, uint32_t num_files,
 }
 
 static bool
-pdb_write_bitmap (bfd *abfd, uint32_t block_size, uint32_t num_blocks)
+pdb_write_bitmap (bfd *abfd, uint32_t block_size, uint32_t num_blocks,
+		  uint32_t stream0_start)
 {
   char *buf;
   uint32_t num_intervals = (num_blocks + block_size - 1) / block_size;
@@ -626,8 +631,6 @@ pdb_write_bitmap (bfd *abfd, uint32_t block_size, uint32_t num_blocks)
   if (!buf)
     return false;
 
-  num_blocks--;			/* Superblock not included.  */
-
   for (uint32_t i = 0; i < num_intervals; i++)
     {
       if (bfd_seek (abfd, ((i * block_size) + 1) * block_size, SEEK_SET))
@@ -636,8 +639,8 @@ pdb_write_bitmap (bfd *abfd, uint32_t block_size, uint32_t num_blocks)
 	  return false;
 	}
 
-      /* All of our blocks are contiguous, making our free block map simple.
-         0 = used, 1 = free.  */
+      /* All of our blocks are contiguous, making our free block map
+	 relatively simple.  0 = used, 1 = free.  */
 
       if (num_blocks >= 8)
 	memset (buf, 0,
@@ -650,7 +653,7 @@ pdb_write_bitmap (bfd *abfd, uint32_t block_size, uint32_t num_blocks)
 
 	  if (num_blocks % 8)
 	    {
-	      buf[off] = (1 << (8 - (num_blocks % 8))) - 1;
+	      buf[off] = 256 - (1 << (num_blocks % 8));
 	      off++;
 	    }
 
@@ -658,6 +661,40 @@ pdb_write_bitmap (bfd *abfd, uint32_t block_size, uint32_t num_blocks)
 	    memset (buf + off, 0xff, block_size - off);
 	}
 
+      /* Mark the blocks allocated to stream 0 as free.  This is because stream
+	 0 is intended to be used for the previous MSF directory, to allow
+	 atomic updates.  This doesn't apply to us, as we rewrite the whole
+	 file whenever any change is made.  */
+
+      if (i == 0 && abfd->archive_head)
+	{
+	  bfd *arelt = abfd->archive_head;
+	  uint32_t stream0_blocks =
+	    (bfd_get_size (arelt) + block_size - 1) / block_size;
+
+	  if (stream0_start % 8)
+	    {
+	      unsigned int high_bit;
+
+	      high_bit = (stream0_start % 8) + stream0_blocks;
+	      if (high_bit > 8)
+		high_bit = 8;
+
+	      buf[stream0_start / 8] |=
+		(1 << high_bit) - (1 << (stream0_start % 8));
+
+	      stream0_blocks -= high_bit - (stream0_start % 8);
+	      stream0_start += high_bit - (stream0_start % 8);
+	    }
+
+	  memset (buf + (stream0_start / 8), 0xff, stream0_blocks / 8);
+	  stream0_start += stream0_blocks / 8;
+	  stream0_blocks %= 8;
+
+	  if (stream0_blocks > 0)
+	    buf[stream0_start / 8] |= (1 << stream0_blocks) - 1;
+	}
+
       if (num_blocks < block_size * 8)
 	num_blocks = 0;
       else
@@ -681,6 +718,7 @@ pdb_write_contents (bfd *abfd)
   uint32_t num_blocks;
   uint32_t num_files = 0;
   uint32_t num_directory_bytes = sizeof (uint32_t);
+  uint32_t stream0_start = 0;
   bfd *arelt;
 
   if (bfd_write (pdb_magic, sizeof (pdb_magic), abfd) != sizeof (pdb_magic))
@@ -735,10 +773,11 @@ pdb_write_contents (bfd *abfd)
     return false;
 
   if (!pdb_write_directory
-      (abfd, block_size, num_files, block_map_addr, &num_blocks))
+      (abfd, block_size, num_files, block_map_addr, &num_blocks,
+       &stream0_start))
     return false;
 
-  if (!pdb_write_bitmap (abfd, block_size, num_blocks))
+  if (!pdb_write_bitmap (abfd, block_size, num_blocks, stream0_start))
     return false;
 
   /* Write num_blocks now we know it.  */
diff --git a/bfd/peXXigen.c b/bfd/peXXigen.c
index 51b567e..c09d16e 100644
--- a/bfd/peXXigen.c
+++ b/bfd/peXXigen.c
@@ -699,8 +699,8 @@ _bfd_XXi_swap_aouthdr_out (bfd * abfd, void * in, void * out)
 	   for the image size.  */
 	if (coff_section_data (abfd, sec) != NULL
 	    && pei_section_data (abfd, sec) != NULL)
-	  isize = (sec->vma - extra->ImageBase
-		   + SA (FA (pei_section_data (abfd, sec)->virt_size)));
+	  isize = SA (sec->vma - extra->ImageBase
+		      + FA (pei_section_data (abfd, sec)->virt_size));
       }
 
     aouthdr_in->dsize = dsize;
diff --git a/bfd/pef.c b/bfd/pef.c
index f330b92..2d2f559 100644
--- a/bfd/pef.c
+++ b/bfd/pef.c
@@ -210,16 +210,18 @@ bfd_pef_print_symbol (bfd *abfd,
 		      bfd_print_symbol_type how)
 {
   FILE *file = (FILE *) afile;
+  const char *symname = (symbol->name != bfd_symbol_error_name
+			 ? symbol->name : _("<corrupt>"));
 
   switch (how)
     {
     case bfd_print_symbol_name:
-      fprintf (file, "%s", symbol->name);
+      fprintf (file, "%s", symname);
       break;
     default:
       bfd_print_symbol_vandf (abfd, (void *) file, symbol);
-      fprintf (file, " %-5s %s", symbol->section->name, symbol->name);
-      if (startswith (symbol->name, "__traceback_"))
+      fprintf (file, " %-5s %s", symbol->section->name, symname);
+      if (startswith (symname, "__traceback_"))
 	{
 	  unsigned char *buf;
 	  size_t offset = symbol->value + 4;
diff --git a/bfd/peicode.h b/bfd/peicode.h
index 11807ef..eb5d6da 100644
--- a/bfd/peicode.h
+++ b/bfd/peicode.h
@@ -127,7 +127,7 @@ bfd_cleanup coff_real_object_p
 
 #ifndef NO_COFF_RELOCS
 static void
-coff_swap_reloc_in (bfd * abfd, void * src, void * dst)
+coff_swap_reloc_in (bfd *abfd, void *src, void *dst)
 {
   RELOC *reloc_src = (RELOC *) src;
   struct internal_reloc *reloc_dst = (struct internal_reloc *) dst;
@@ -141,7 +141,7 @@ coff_swap_reloc_in (bfd * abfd, void * src, void * dst)
 }
 
 static unsigned int
-coff_swap_reloc_out (bfd * abfd, void * src, void * dst)
+coff_swap_reloc_out (bfd *abfd, void *src, void *dst)
 {
   struct internal_reloc *reloc_src = (struct internal_reloc *) src;
   struct external_reloc *reloc_dst = (struct external_reloc *) dst;
@@ -166,7 +166,7 @@ coff_swap_reloc_out (bfd * abfd, void * src, void * dst)
 #endif
 
 static void
-coff_swap_filehdr_in (bfd * abfd, void * src, void * dst)
+coff_swap_filehdr_in (bfd *abfd, void *src, void *dst)
 {
   FILHDR *filehdr_src = (FILHDR *) src;
   struct internal_filehdr *filehdr_dst = (struct internal_filehdr *) dst;
@@ -202,7 +202,7 @@ coff_swap_filehdr_in (bfd * abfd, void * src, void * dst)
 #endif
 
 static void
-coff_swap_scnhdr_in (bfd * abfd, void * ext, void * in)
+coff_swap_scnhdr_in (bfd *abfd, void *ext, void *in)
 {
   SCNHDR *scnhdr_ext = (SCNHDR *) ext;
   struct internal_scnhdr *scnhdr_int = (struct internal_scnhdr *) in;
@@ -233,7 +233,8 @@ coff_swap_scnhdr_in (bfd * abfd, void * ext, void * in)
     {
       scnhdr_int->s_vaddr += pe_data (abfd)->pe_opthdr.ImageBase;
       /* Do not cut upper 32-bits for 64-bit vma.  */
-#if !defined(COFF_WITH_pex64) && !defined(COFF_WITH_peAArch64) && !defined(COFF_WITH_peLoongArch64) && !defined(COFF_WITH_peRiscV64)
+#if (!defined(COFF_WITH_pex64) && !defined(COFF_WITH_peAArch64) \
+     && !defined(COFF_WITH_peLoongArch64) && !defined(COFF_WITH_peRiscV64))
       scnhdr_int->s_vaddr &= 0xffffffff;
 #endif
     }
@@ -256,7 +257,7 @@ coff_swap_scnhdr_in (bfd * abfd, void * ext, void * in)
 }
 
 static bool
-pe_mkobject (bfd * abfd)
+pe_mkobject (bfd *abfd)
 {
   /* Some x86 code followed by an ascii string.  */
   static const char default_dos_message[64] = {
@@ -290,9 +291,9 @@ pe_mkobject (bfd * abfd)
 /* Create the COFF backend specific information.  */
 
 static void *
-pe_mkobject_hook (bfd * abfd,
-		  void * filehdr,
-		  void * aouthdr ATTRIBUTE_UNUSED)
+pe_mkobject_hook (bfd *abfd,
+		  void *filehdr,
+		  void *aouthdr ATTRIBUTE_UNUSED)
 {
   struct internal_filehdr *internal_f = (struct internal_filehdr *) filehdr;
   pe_data_type *pe;
@@ -344,7 +345,7 @@ pe_mkobject_hook (bfd * abfd,
 }
 
 static bool
-pe_print_private_bfd_data (bfd *abfd, void * vfile)
+pe_print_private_bfd_data (bfd *abfd, void *vfile)
 {
   FILE *file = (FILE *) vfile;
 
@@ -409,7 +410,7 @@ pe_bfd_copy_private_bfd_data (bfd *ibfd, bfd *obfd)
 
       There will be two symbols for the imported value, one the symbol name
       and one with _imp__ prefixed.  Allowing for the terminating nul's this
-      is strlen (symbol_name) * 2 + 8 + 21 + strlen (source_dll).
+      is strlen (import_name) * 2 + 8 + 21 + strlen (source_dll).
 
       The strings in the string table must start STRING__SIZE_SIZE bytes into
       the table in order to for the string lookup code in coffgen/coffcode to
@@ -418,17 +419,17 @@ pe_bfd_copy_private_bfd_data (bfd *ibfd, bfd *obfd)
 #define NUM_ILF_SECTIONS	6
 #define NUM_ILF_SYMS		(2 + NUM_ILF_SECTIONS)
 
-#define SIZEOF_ILF_SYMS		 (NUM_ILF_SYMS * sizeof (* vars.sym_cache))
-#define SIZEOF_ILF_SYM_TABLE	 (NUM_ILF_SYMS * sizeof (* vars.sym_table))
-#define SIZEOF_ILF_NATIVE_SYMS	 (NUM_ILF_SYMS * sizeof (* vars.native_syms))
-#define SIZEOF_ILF_SYM_PTR_TABLE (NUM_ILF_SYMS * sizeof (* vars.sym_ptr_table))
-#define SIZEOF_ILF_EXT_SYMS	 (NUM_ILF_SYMS * sizeof (* vars.esym_table))
-#define SIZEOF_ILF_RELOCS	 (NUM_ILF_RELOCS * sizeof (* vars.reltab))
-#define SIZEOF_ILF_INT_RELOCS	 (NUM_ILF_RELOCS * sizeof (* vars.int_reltab))
-#define SIZEOF_ILF_STRINGS	 (strlen (symbol_name) * 2 + 8 \
-					+ 21 + strlen (source_dll) \
-					+ NUM_ILF_SECTIONS * 9 \
-					+ STRING_SIZE_SIZE)
+#define SIZEOF_ILF_SYMS		 (NUM_ILF_SYMS * sizeof (*vars.sym_cache))
+#define SIZEOF_ILF_SYM_TABLE	 (NUM_ILF_SYMS * sizeof (*vars.sym_table))
+#define SIZEOF_ILF_NATIVE_SYMS	 (NUM_ILF_SYMS * sizeof (*vars.native_syms))
+#define SIZEOF_ILF_SYM_PTR_TABLE (NUM_ILF_SYMS * sizeof (*vars.sym_ptr_table))
+#define SIZEOF_ILF_EXT_SYMS	 (NUM_ILF_SYMS * sizeof (*vars.esym_table))
+#define SIZEOF_ILF_RELOCS	 (NUM_ILF_RELOCS * sizeof (*vars.reltab))
+#define SIZEOF_ILF_INT_RELOCS	 (NUM_ILF_RELOCS * sizeof (*vars.int_reltab))
+#define SIZEOF_ILF_STRINGS	 (strlen (import_name) * 2 + 8 \
+				  + 21 + strlen (source_dll)   \
+				  + NUM_ILF_SECTIONS * 9       \
+				  + STRING_SIZE_SIZE)
 #define SIZEOF_IDATA2		(5 * 4)
 
 /* For PEx64 idata4 & 5 have thumb size of 8 bytes.  */
@@ -440,9 +441,10 @@ pe_bfd_copy_private_bfd_data (bfd *ibfd, bfd *obfd)
 #define SIZEOF_IDATA5		(1 * 4)
 #endif
 
-#define SIZEOF_IDATA6		(2 + strlen (symbol_name) + 1 + 1)
+#define SIZEOF_IDATA6		(2 + strlen (import_name) + 1 + 1)
 #define SIZEOF_IDATA7		(strlen (source_dll) + 1 + 1)
-#define SIZEOF_ILF_SECTIONS	(NUM_ILF_SECTIONS * sizeof (struct coff_section_tdata))
+#define SIZEOF_ILF_SECTIONS	(NUM_ILF_SECTIONS \
+				 * sizeof (struct coff_section_tdata))
 
 #define ILF_DATA_SIZE				\
     + SIZEOF_ILF_SYMS				\
@@ -470,8 +472,8 @@ pe_ILF_make_a_symbol_reloc (pe_ILF_vars *		vars,
 			    struct bfd_symbol **	sym,
 			    unsigned int		sym_index)
 {
-  arelent * entry;
-  struct internal_reloc * internal;
+  arelent *entry;
+  struct internal_reloc *internal;
 
   entry = vars->reltab + vars->relcount;
   internal = vars->int_reltab + vars->relcount;
@@ -505,8 +507,8 @@ pe_ILF_make_a_reloc (pe_ILF_vars *	       vars,
 /* Move the queued relocs into the given section.  */
 
 static void
-pe_ILF_save_relocs (pe_ILF_vars * vars,
-		    asection_ptr  sec)
+pe_ILF_save_relocs (pe_ILF_vars *vars,
+		    asection_ptr sec)
 {
   /* Make sure that there is somewhere to store the internal relocs.  */
   if (coff_section_data (vars->abfd, sec) == NULL)
@@ -535,9 +537,9 @@ pe_ILF_make_a_symbol (pe_ILF_vars *  vars,
 		      asection_ptr   section,
 		      flagword       extra_flags)
 {
-  coff_symbol_type * sym;
-  combined_entry_type * ent;
-  SYMENT * esym;
+  coff_symbol_type *sym;
+  combined_entry_type *ent;
+  SYMENT *esym;
   unsigned short sclass;
 
   if (extra_flags & BSF_LOCAL)
@@ -590,8 +592,8 @@ pe_ILF_make_a_symbol (pe_ILF_vars *  vars,
   sym->symbol.section = section;
   sym->native	      = ent;
 
-  * vars->table_ptr = vars->sym_index;
-  * vars->sym_ptr_ptr = sym;
+  *vars->table_ptr = vars->sym_index;
+  *vars->sym_ptr_ptr = sym;
 
   /* Adjust pointers for the next symbol.  */
   vars->sym_index ++;
@@ -792,7 +794,8 @@ pe_ILF_build_a_bfd (bfd *	    abfd,
 		    char *	    symbol_name,
 		    char *	    source_dll,
 		    unsigned int    ordinal,
-		    unsigned int    types)
+		    unsigned int    types,
+		    char *	    import_name)
 {
   bfd_byte *		   ptr;
   pe_ILF_vars		   vars;
@@ -834,6 +837,17 @@ pe_ILF_build_a_bfd (bfd *	    abfd,
     case IMPORT_NAME:
     case IMPORT_NAME_NOPREFIX:
     case IMPORT_NAME_UNDECORATE:
+      import_name = symbol_name;
+      break;
+
+    case IMPORT_NAME_EXPORTAS:
+      if (!import_name || !import_name[0])
+	{
+	  _bfd_error_handler (_("%pB: missing import name for "
+				"IMPORT_NAME_EXPORTAS for %s"),
+			      abfd, symbol_name);
+	  return false;
+	}
       break;
 
     default:
@@ -922,8 +936,8 @@ pe_ILF_build_a_bfd (bfd *	    abfd,
 
      Note we do not create a .idata$3 section as this is
      created for us by the linker script.  */
-  id4 = pe_ILF_make_a_section (& vars, ".idata$4", SIZEOF_IDATA4, 0);
-  id5 = pe_ILF_make_a_section (& vars, ".idata$5", SIZEOF_IDATA5, 0);
+  id4 = pe_ILF_make_a_section (&vars, ".idata$4", SIZEOF_IDATA4, 0);
+  id5 = pe_ILF_make_a_section (&vars, ".idata$5", SIZEOF_IDATA5, 0);
   if (id4 == NULL || id5 == NULL)
     goto error_return;
 
@@ -934,28 +948,29 @@ pe_ILF_build_a_bfd (bfd *	    abfd,
 	/* See PR 20907 for a reproducer.  */
 	goto error_return;
 
-#if defined(COFF_WITH_pex64) || defined(COFF_WITH_peAArch64) || defined(COFF_WITH_peLoongArch64) || defined (COFF_WITH_peRiscV64)
+#if (defined(COFF_WITH_pex64) || defined(COFF_WITH_peAArch64) \
+     || defined(COFF_WITH_peLoongArch64) || defined (COFF_WITH_peRiscV64))
       ((unsigned int *) id4->contents)[0] = ordinal;
       ((unsigned int *) id4->contents)[1] = 0x80000000;
       ((unsigned int *) id5->contents)[0] = ordinal;
       ((unsigned int *) id5->contents)[1] = 0x80000000;
 #else
-      * (unsigned int *) id4->contents = ordinal | 0x80000000;
-      * (unsigned int *) id5->contents = ordinal | 0x80000000;
+      ((unsigned int *) id4->contents)[0] = ordinal | 0x80000000;
+      ((unsigned int *) id5->contents)[0] = ordinal | 0x80000000;
 #endif
     }
   else
     {
-      char * symbol;
+      char *symbol;
       unsigned int len;
 
       /* Create .idata$6 - the Hint Name Table.  */
-      id6 = pe_ILF_make_a_section (& vars, ".idata$6", SIZEOF_IDATA6, 0);
+      id6 = pe_ILF_make_a_section (&vars, ".idata$6", SIZEOF_IDATA6, 0);
       if (id6 == NULL)
 	goto error_return;
 
       /* If necessary, trim the import symbol name.  */
-      symbol = symbol_name;
+      symbol = import_name;
 
       /* As used by MS compiler, '_', '@', and '?' are alternative
 	 forms of USER_LABEL_PREFIX, with '?' for c++ mangled names,
@@ -964,7 +979,8 @@ pe_ILF_build_a_bfd (bfd *	    abfd,
 	 IMPORT_NAME_NOPREFIX and IMPORT_NAME_UNDECORATE as per the
 	 PE COFF 6.0 spec (section 8.3, Import Name Type).  */
 
-      if (import_name_type != IMPORT_NAME)
+      if (import_name_type != IMPORT_NAME
+	  && import_name_type != IMPORT_NAME_EXPORTAS)
 	{
 	  char c = symbol[0];
 
@@ -1002,11 +1018,12 @@ pe_ILF_build_a_bfd (bfd *	    abfd,
     }
 
   /* Create an import symbol.  */
-  pe_ILF_make_a_symbol (& vars, "__imp_", symbol_name, id5, 0);
+  pe_ILF_make_a_symbol (&vars, "__imp_", symbol_name, id5, 0);
   imp_sym   = vars.sym_ptr_ptr - 1;
   imp_index = vars.sym_index - 1;
 
-  /* Create extra sections depending upon the type of import we are dealing with.  */
+  /* Create extra sections depending upon the type of import we are
+     dealing with.  */
   switch (import_type)
     {
       int i;
@@ -1027,7 +1044,7 @@ pe_ILF_build_a_bfd (bfd *	    abfd,
 	abort ();
 
       /* Create the .text section.  */
-      text = pe_ILF_make_a_section (& vars, ".text", jtab[i].size, SEC_CODE);
+      text = pe_ILF_make_a_section (&vars, ".text", jtab[i].size, SEC_CODE);
       if (text == NULL)
 	goto error_return;
 
@@ -1061,7 +1078,7 @@ pe_ILF_build_a_bfd (bfd *	    abfd,
 				    BFD_RELOC_32, (asymbol **) imp_sym,
 				    imp_index);
 
-      pe_ILF_save_relocs (& vars, text);
+      pe_ILF_save_relocs (&vars, text);
       break;
 
     case IMPORT_DATA:
@@ -1076,7 +1093,7 @@ pe_ILF_build_a_bfd (bfd *	    abfd,
   switch (import_type)
     {
     case IMPORT_CODE:
-      pe_ILF_make_a_symbol (& vars, "", symbol_name, text,
+      pe_ILF_make_a_symbol (&vars, "", symbol_name, text,
 			    BSF_NOT_AT_END | BSF_FUNCTION);
 
       break;
@@ -1093,30 +1110,31 @@ pe_ILF_build_a_bfd (bfd *	    abfd,
   /* Create an import symbol for the DLL, without the .dll suffix.  */
   ptr = (bfd_byte *) strrchr (source_dll, '.');
   if (ptr)
-    * ptr = 0;
-  pe_ILF_make_a_symbol (& vars, "__IMPORT_DESCRIPTOR_", source_dll, NULL, 0);
+    *ptr = 0;
+  pe_ILF_make_a_symbol (&vars, "__IMPORT_DESCRIPTOR_", source_dll, NULL, 0);
   if (ptr)
-    * ptr = '.';
+    *ptr = '.';
 
   /* Initialise the bfd.  */
-  memset (& internal_f, 0, sizeof (internal_f));
+  memset (&internal_f, 0, sizeof (internal_f));
 
   internal_f.f_magic  = magic;
   internal_f.f_symptr = 0;
   internal_f.f_nsyms  = 0;
   internal_f.f_flags  = F_AR32WR | F_LNNO; /* XXX is this correct ?  */
 
-  if (   ! bfd_set_start_address (abfd, (bfd_vma) 0)
-      || ! bfd_coff_set_arch_mach_hook (abfd, & internal_f))
+  if (!bfd_set_start_address (abfd, (bfd_vma) 0)
+      || !bfd_coff_set_arch_mach_hook (abfd, &internal_f))
     goto error_return;
 
-  if (bfd_coff_mkobject_hook (abfd, (void *) & internal_f, NULL) == NULL)
+  if (bfd_coff_mkobject_hook (abfd, (void *) &internal_f, NULL) == NULL)
     goto error_return;
 
   obj_pe (abfd) = true;
 #ifdef THUMBPEMAGIC
   if (vars.magic == THUMBPEMAGIC)
-    /* Stop some linker warnings about thumb code not supporting interworking.  */
+    /* Stop some linker warnings about thumb code not supporting
+       interworking.  */
     coff_data (abfd)->flags |= F_INTERWORK | F_INTERWORK_SET;
 #endif
 
@@ -1173,12 +1191,13 @@ pe_ILF_cleanup (bfd *abfd)
    Decode the element and return the appropriate target.  */
 
 static bfd_cleanup
-pe_ILF_object_p (bfd * abfd)
+pe_ILF_object_p (bfd *abfd)
 {
   bfd_byte	  buffer[14];
   bfd_byte *	  ptr;
   char *	  symbol_name;
   char *	  source_dll;
+  char *	  import_name;
   unsigned int	  machine;
   bfd_size_type	  size;
   unsigned int	  ordinal;
@@ -1266,7 +1285,7 @@ pe_ILF_object_p (bfd * abfd)
       {
 	extern const bfd_target TARGET_LITTLE_SYM;
 
-	if (abfd->xvec == & TARGET_LITTLE_SYM)
+	if (abfd->xvec == &TARGET_LITTLE_SYM)
 	  magic = THUMBPEMAGIC;
       }
 #endif
@@ -1340,9 +1359,24 @@ pe_ILF_object_p (bfd * abfd)
       return NULL;
     }
 
+  /* An ILF file may contain a third string, after source_dll; this is
+     used for IMPORT_NAME_EXPORTAS. We know from above that the whole
+     block of data is null terminated, ptr[size-1]==0, but we don't
+     know how many individual null terminated strings we have in there.
+
+     First find the end of source_dll.  */
+  import_name = source_dll + strlen (source_dll) + 1;
+  if ((bfd_byte *) import_name >= ptr + size)
+    {
+      /* If this points at the end of the ptr+size block, we only had
+	 two strings. */
+      import_name = NULL;
+    }
+
   /* Now construct the bfd.  */
   if (! pe_ILF_build_a_bfd (abfd, magic, symbol_name,
-			    source_dll, ordinal, types))
+			    source_dll, ordinal, types,
+			    import_name))
     {
       bfd_release (abfd, ptr);
       return NULL;
@@ -1424,12 +1458,14 @@ pe_bfd_read_buildid (bfd *abfd)
 					      (file_ptr) idd.PointerToRawData,
 					      idd.SizeOfData, cvinfo, NULL))
 	    {
-	      struct bfd_build_id* build_id = bfd_alloc (abfd,
-			 sizeof (struct bfd_build_id) + cvinfo->SignatureLength);
+	      struct bfd_build_id *build_id;
+	      size_t bidlen = sizeof (*build_id) + cvinfo->SignatureLength;
+
+	      build_id = bfd_alloc (abfd, bidlen);
 	      if (build_id)
 		{
 		  build_id->size = cvinfo->SignatureLength;
-		  memcpy(build_id->data,  cvinfo->Signature,
+		  memcpy(build_id->data, cvinfo->Signature,
 			 cvinfo->SignatureLength);
 		  abfd->build_id = build_id;
 		}
@@ -1442,7 +1478,7 @@ pe_bfd_read_buildid (bfd *abfd)
 }
 
 static bfd_cleanup
-pe_bfd_object_p (bfd * abfd)
+pe_bfd_object_p (bfd *abfd)
 {
   bfd_byte buffer[6];
   struct external_DOS_hdr dos_hdr;
@@ -1527,7 +1563,7 @@ pe_bfd_object_p (bfd * abfd)
   if (opt_hdr_size != 0)
     {
       bfd_size_type amt = opt_hdr_size;
-      bfd_byte * opthdr;
+      bfd_byte *opthdr;
 
       /* PR 17521 file: 230-131433-0.004.  */
       if (amt < sizeof (PEAOUTHDR))
@@ -1561,7 +1597,7 @@ pe_bfd_object_p (bfd * abfd)
 	  || a->SectionAlignment >= 0x80000000)
 	{
 	  _bfd_error_handler (_("%pB: adjusting invalid SectionAlignment"),
-				abfd);
+			      abfd);
 	  a->SectionAlignment &= -a->SectionAlignment;
 	  if (a->SectionAlignment >= 0x80000000)
 	    a->SectionAlignment = 0x40000000;
diff --git a/bfd/plugin.c b/bfd/plugin.c
index 026654f..de2137f 100644
--- a/bfd/plugin.c
+++ b/bfd/plugin.c
@@ -329,13 +329,23 @@ try_claim (bfd *abfd)
   struct ld_plugin_input_file file;
 
   file.handle = abfd;
-  if (bfd_plugin_open_input (abfd, &file)
-      && current_plugin->claim_file)
+  if (bfd_plugin_open_input (abfd, &file))
     {
-      current_plugin->claim_file (&file, &claimed);
-      bfd_plugin_close_file_descriptor ((abfd->my_archive != NULL
-					 ? abfd : NULL),
-					file.fd);
+      bool claim_file_called = false;
+      if (current_plugin->claim_file_v2)
+	{
+	  current_plugin->claim_file_v2 (&file, &claimed, false);
+	  claim_file_called = true;
+	}
+      else if (current_plugin->claim_file)
+	{
+	  current_plugin->claim_file (&file, &claimed);
+	  claim_file_called = true;
+	}
+      if (claim_file_called)
+	bfd_plugin_close_file_descriptor ((abfd->my_archive != NULL
+					   ? abfd : NULL),
+					  file.fd);
     }
 
   return claimed;
@@ -586,8 +596,12 @@ load_plugin (bfd *abfd)
 static bfd_cleanup
 bfd_plugin_object_p (bfd *abfd)
 {
+  /* Since ld_plugin_object_p is called only for linker command-line input
+     objects, pass true to ld_plugin_object_p so that the same input IR
+     file won't be included twice if the LDPT_REGISTER_CLAIM_FILE_HOOK_V2
+     isn't used.  */
   if (ld_plugin_object_p)
-    return ld_plugin_object_p (abfd, false);
+    return ld_plugin_object_p (abfd, true);
 
   if (abfd->plugin_format == bfd_plugin_unknown && !load_plugin (abfd))
     return NULL;
diff --git a/bfd/syms.c b/bfd/syms.c
index b370a33..68f0730 100644
--- a/bfd/syms.c
+++ b/bfd/syms.c
@@ -342,6 +342,11 @@ EXTERNAL
 .  const char *stab_name;	{* String for stab type.  *}
 .} symbol_info;
 .
+.{* An empty string that will not match the address of any other
+.   symbol name, even unnamed local symbols which will also have empty
+.   string names.  This can be used to flag a symbol as corrupt if its
+.   name uses an out of range string table index.  *}
+.extern const char bfd_symbol_error_name[];
 */
 
 #include "sysdep.h"
@@ -351,6 +356,8 @@ EXTERNAL
 #include "bfdlink.h"
 #include "aout/stab_gnu.h"
 
+const char bfd_symbol_error_name[] = { 0 };
+
 /*
 DOCDD
 INODE
@@ -394,7 +401,7 @@ bfd_is_local_label (bfd *abfd, asymbol *sym)
      if we didn't reject them here.  */
   if ((sym->flags & (BSF_GLOBAL | BSF_WEAK | BSF_FILE | BSF_SECTION_SYM)) != 0)
     return false;
-  if (sym->name == NULL)
+  if (sym->name == NULL || sym->name == bfd_symbol_error_name)
     return false;
   return bfd_is_local_label_name (abfd, sym->name);
 }
@@ -777,7 +784,8 @@ bfd_symbol_info (asymbol *symbol, symbol_info *ret)
   else
     ret->value = symbol->value + symbol->section->vma;
 
-  ret->name = symbol->name;
+  ret->name = (symbol->name != bfd_symbol_error_name
+	       ? symbol->name : _("<corrupt>"));
 }
 
 /*
diff --git a/bfd/version.h b/bfd/version.h
index d02f0d3..3993001 100644
--- a/bfd/version.h
+++ b/bfd/version.h
@@ -16,7 +16,7 @@
 
    In releases, the date is not included in either version strings or
    sonames.  */
-#define BFD_VERSION_DATE 20240803
+#define BFD_VERSION_DATE 20241012
 #define BFD_VERSION @bfd_version@
 #define BFD_VERSION_STRING  @bfd_version_package@ @bfd_version_string@
 #define REPORT_BUGS_TO @report_bugs_to@
diff --git a/bfd/vms-alpha.c b/bfd/vms-alpha.c
index 6eea61d..df279bc 100644
--- a/bfd/vms-alpha.c
+++ b/bfd/vms-alpha.c
@@ -8330,18 +8330,26 @@ evax_bfd_print_image (bfd *abfd, FILE *file)
 	}
       /* xgettext:c-format */
       fprintf (file, _("Image identification: (major: %u, minor: %u)\n"),
-	       (unsigned)bfd_getl32 (eihi.majorid),
-	       (unsigned)bfd_getl32 (eihi.minorid));
-      fprintf (file, _(" image name       : %.*s\n"),
-	       eihi.imgnam[0], eihi.imgnam + 1);
+	       (unsigned) bfd_getl32 (eihi.majorid),
+	       (unsigned) bfd_getl32 (eihi.minorid));
+      unsigned int nlen = eihi.imgnam[0];
+      if (nlen > sizeof (eihi.imgnam) - 1)
+	nlen = sizeof (eihi.imgnam) - 1;
+      fprintf (file, _(" image name       : %.*s\n"), nlen, eihi.imgnam + 1);
       fprintf (file, _(" link time        : %s\n"),
 	       vms_time_to_str (eihi.linktime));
-      fprintf (file, _(" image ident      : %.*s\n"),
-	       eihi.imgid[0], eihi.imgid + 1);
-      fprintf (file, _(" linker ident     : %.*s\n"),
-	       eihi.linkid[0], eihi.linkid + 1);
-      fprintf (file, _(" image build ident: %.*s\n"),
-	       eihi.imgbid[0], eihi.imgbid + 1);
+      nlen = eihi.imgid[0];
+      if (nlen > sizeof (eihi.imgid) - 1)
+	nlen = sizeof (eihi.imgid) - 1;
+      fprintf (file, _(" image ident      : %.*s\n"), nlen, eihi.imgid + 1);
+      nlen = eihi.linkid[0];
+      if (nlen > sizeof (eihi.linkid) - 1)
+	nlen = sizeof (eihi.linkid) - 1;
+      fprintf (file, _(" linker ident     : %.*s\n"), nlen, eihi.linkid + 1);
+      nlen = eihi.imgbid[0];
+      if (nlen > sizeof (eihi.imgbid) -1 )
+	nlen = sizeof (eihi.imgbid) - 1;
+      fprintf (file, _(" image build ident: %.*s\n"), nlen, eihi.imgbid + 1);
     }
   if (eihs_off != 0)
     {
@@ -8474,10 +8482,15 @@ evax_bfd_print_image (bfd *abfd, FILE *file)
 	}
       fputs (_(")\n"), file);
       if (val & EISD__M_GBL)
-	/* xgettext:c-format */
-	fprintf (file, _(" ident: 0x%08x, name: %.*s\n"),
-		 (unsigned)bfd_getl32 (eisd.ident),
-		 eisd.gblnam[0], eisd.gblnam + 1);
+	{
+	  unsigned int nlen = eisd.gblnam[0];
+	  if (nlen > sizeof (eisd.gblnam) - 1)
+	    nlen = sizeof (eisd.gblnam) - 1;
+	  /* xgettext:c-format */
+	  fprintf (file, _(" ident: 0x%08x, name: %.*s\n"),
+		   (unsigned) bfd_getl32 (eisd.ident),
+		   nlen, eisd.gblnam + 1);
+	}
       eisd_off += len;
     }
 
@@ -8628,11 +8641,14 @@ evax_bfd_print_image (bfd *abfd, FILE *file)
 	       j++, shlstoff += sizeof (struct vms_shl))
 	    {
 	      struct vms_shl *shl = (struct vms_shl *) (buf + shlstoff);
+	      unsigned int nlen = shl->imgnam[0];
+	      if (nlen > sizeof (shl->imgnam) - 1)
+		nlen = sizeof (shl->imgnam) - 1;
 	      fprintf (file,
 		       /* xgettext:c-format */
 		       _("  %u: size: %u, flags: 0x%02x, name: %.*s\n"),
 		       j, shl->size, shl->flags,
-		       shl->imgnam[0], shl->imgnam + 1);
+		       nlen, shl->imgnam + 1);
 	    }
 	}
       if (qrelfixoff != 0)
diff --git a/binutils/MAINTAINERS b/binutils/MAINTAINERS
index 9094c6b..6a584b5 100644
--- a/binutils/MAINTAINERS
+++ b/binutils/MAINTAINERS
@@ -73,9 +73,7 @@ responsibility among the other maintainers.
   BFIN		   Jie Zhang <jzhang918@gmail.com>
   BFIN		   Mike Frysinger <vapier@gentoo.org>
   BPF		   Jose E. Marchesi <jose.marchesi@oracle.com>
-  CR16		   M R Swami Reddy <MR.Swami.Reddy@nsc.com>
   CRIS		   Hans-Peter Nilsson <hp@axis.com>
-  CRX		   M R Swami Reddy <MR.Swami.Reddy@nsc.com>
   CTF		   Nick Alcock <nick.alcock@oracle.com>
   C-SKY		   Lifang Xia <lifang_xia@linux.alibaba.com>
   C-SKY		   Yunhai Shang <yunhai@linux.alibaba.com>
@@ -119,7 +117,6 @@ responsibility among the other maintainers.
   Moxie		   Anthony Green <green@moxielogic.com>
   NDS32		   Kuan-Lin Chen <kuanlinchentw@gmail.com>
   NDS32		   Wei-Cheng Wang <cole945@gmail.com>
-  NetBSD support   Matt Thomas <matt@netbsd.org>
   Nios II	   Sandra Loosemore <sloosemore@baylibre.com>
   Nios II	   Andrew Jenner <andrew@codesourcery.com>
   OR1K		   Christian Svensson <blue@cmd.nu>
@@ -140,9 +137,6 @@ responsibility among the other maintainers.
   SPU		   Alan Modra <amodra@gmail.com>
   TIC54X           Timothy Wall <twall@alum.mit.edu>
   TIC6X            Joseph Myers <josmyers@redhat.com>
-  TILE-Gx          Walter Lee <walt@tilera.com>
-  TILEPro          Walter Lee <walt@tilera.com>
-  VAX		   Matt Thomas <matt@netbsd.org>
   VAX		   Jan-Benedict Glaw <jbglaw@lug-owl.de>
   Visium	   Eric Botcazou <ebotcazou@libertysurf.fr>
   VMS		   Tristan Gingold <tgingold@free.fr>
@@ -167,12 +161,15 @@ goes with them.
   Jason Eckhardt
   Geoff Keating
   Mark Kettenis
+  Walter Lee
   Mei Ligang
   Arnold Metselaar
   Mark Mitchell
   Bernd Schmidt
   Svein Seldal
+  M R Swami Reddy
   Martin Schwidefsky
+  Matt Thomas
 
       --------- CGEN Maintainers -------------
 
diff --git a/binutils/README-how-to-make-a-release b/binutils/README-how-to-make-a-release
index 9e71abd..cce2ed7 100644
--- a/binutils/README-how-to-make-a-release
+++ b/binutils/README-how-to-make-a-release
@@ -244,7 +244,7 @@ How to create the release.
 
   21. a. Update the release number in bfd/version.m4 on the release
          branch to a whole new minor version number, without a point
-         value.  Eg "2.42.90" becomes "2.43".  NB/ Not: "2.43.00"
+         value.  Eg "2.43.90" becomes "2.44".  NB/ Not: "2.44.00"
 
       b. Change bfd/development.sh to set all values to "false".
 
@@ -275,7 +275,7 @@ How to create the release.
          "this-is-the-2.43-release" comment and commit.
 
 	   git add .
-           git commit -m "this-is-the-2.43-release"
+           git commit -m "this-is-the-2.44-release"
 	   git push
 	   
   22. Check that your file creation mask will create the
@@ -297,7 +297,7 @@ How to create the release.
       PARANOIA: Check that there are no pending commits:
 
              git status
-	   
+
       Then create the release tarballs:
   
             ./src-release.sh -b -g -l -x -z binutils
@@ -345,16 +345,16 @@ How to create the release.
 
 	    git tag -a <TAG>         -u <Your Key>
 	  eg:
-	    git tag -a binutils-2_43 -u DD9E3C4F      <=== Be careful to get the tag right
+	    git tag -a binutils-2_44 -u DD9E3C4F      <=== Be careful to get the tag right
 	  or:
-	    git tag -a binutils-2_43 -u DD9E3C4F -m "Official GNU Binutils 2.43 release"
+	    git tag -a binutils-2_44 -u DD9E3C4F -m "Official GNU Binutils 2.43 release"
 
         NB/ If you do sign the binaries make sure to use a key
 	that has been published with the FSF.
 
         Then push the release:
 	
-	    git push origin binutils-2_43
+	    git push origin binutils-2_44
 
         If you get an error message along the lines of:
 	  "Invalid revision range ..."
@@ -362,7 +362,7 @@ How to create the release.
 
   27.  Upload the tarballs to ftp.gnu.org.
 
-          gnupload --to ftp.gnu.org:binutils binutils-2.43.tar.*
+          gnupload --to ftp.gnu.org:binutils binutils-2.44.tar.*
 
         Be prepared to provide the password for the key, if you
 	signed the binaries.
@@ -370,6 +370,8 @@ How to create the release.
         The gnupload script is in the gnulib/build-aux directory.
 	It uses the ncftp package for transmitting the files.
 
+        NB/ This step can be done in PARALLEL with step 28.
+
         Check for an email response from the upload.  If necessary
         fix any problems.  (The response might take a while, so
 	proceed with the next steps if you are confident that
@@ -383,10 +385,6 @@ How to create the release.
  	 chmod 644 binutils-2.4*.tar.*
 	 quit
 
-      FIXME: Are the signatures (created by the gnupload script in step 27)
-      needed ?  [The above commands upload them and nobody has complained,
-      so suggest that they are retained].
-
   29. Update web pages.  For sourceware.org:
 
       Clone the documentation (if you have not already done so):
@@ -396,8 +394,8 @@ How to create the release.
       Create a new docs sub-directory and move into it:
 
         cd binutils-htdocs
-	mkdir docs-2.43
-        cd docs-2.43
+	mkdir docs-2.44
+        cd docs-2.44
 	
       Copy the index.html from the previous release
 
@@ -424,12 +422,12 @@ How to create the release.
 	 cp <build-dir>/binutils/doc/binutils.pdf  .
 
 	 cp -r <build-dir>/gprof/doc/gprof     .
-	 cp <build-dir>/gprof/doc/gprof.html   .
-	 cp <build-dir>/gprof/doc/gprof.pdf    .
+	 cp <build-dir>/gprof/gprof.html   .		    [NB/ Path not like others]
+	 cp <build-dir>/gprof/gprof.pdf    .		    [NB/ Path not like others]
 	 
 	 cp -r <build-dir>/ld/doc/ld     .
-	 cp <build-dir>/ld/doc/ld.html   .
-	 cp <build-dir>/ld/doc/ld.pdf    .
+	 cp <build-dir>/ld/ld.html   .		    [NB/ Path not like others]
+	 cp <build-dir>/ld/ld.pdf    .		    [NB/ Path not like others]
 
 	    [NB/ The gprofng documentation does not have a node-per-page selection]
 	 cp <build-dir>/gprofng/doc/gprof.html   .
@@ -445,7 +443,7 @@ How to create the release.
 
          cd ..     [Should now be in be in binutils-htdocs/ ]
 	 rm docs
-	 ln -s docs-2.43 docs
+	 ln -s docs-2.44 docs
 	 
       Edit index.html file to change the links to point to the new
       release, mention any new features, update dates and so on.
@@ -457,7 +455,7 @@ How to create the release.
       Add the new directories and files, commit and push the changes:
 
         git add .
-        git commit -m"Update documenation for the 2.4x release"
+        git commit -m"Update documenation for the 2.4x release"a
 	git push
 
 
@@ -471,7 +469,7 @@ Hi FSF Webmasters,
 https://www.gnu.org/software/binutils/binutils.html
 
   be updated to indicate that there is now a newer version available
-  (2.4x).  I have already updated the related page on the sourceware
+  (2.4x).  I have already updated the related page on the Sourceware
   website so this might be useful as a template:
 
 https://sourceware.org/binutils/
@@ -568,7 +566,7 @@ looks like this:
      correctly.
 
   2.5 Prepare a list of the bugs which have been fixed.  This
-      will be needed for step 8.
+      will be needed for step 9.
 
   3. In the branch sources:
 
@@ -578,14 +576,29 @@ looks like this:
        d. Remove spurious autom4te.cache files:
 
           git clean -fdx
+
+        e. Update the changelog:
+	
+           gitlog-to-changelog --since=2021-07-03 > ChangeLog.git
 	  
-       e. Commit the updates along with a "this-is-the-2.3x.y-release"
-          note in all of the changelogs.
-       f. Tag the branch with the new release number:
+       f. Commit the updates along with a "this-is-the-2.4x.y-release"
+          comment.
+
+             git add .
+	     git commit -m"..."
+	     git push
+	     
+       f. Tag the branch with the new release number.  Optional: add
+          "-u XXXXX" to sign with a gpg key, and -m "..." for a
+          comment.  eg:
+	  
+               git tag -a binutils-2_43_1
+          or:	    
+	       git tag -a binutils-2_43_1 -u DD9E3C4F -m "Official GNU Binutils 2.43.1 release"
 
-            git tag -a binutils-2_3x_y
-	      [optional: add "-u XXXXX" to sign with a gpg key]
-	    git push origin binutils-2_3x_y
+          Then push it:
+	  
+	    git push origin binutils-2_43_1
 
        g. Check that your file creation mask will create the
           correct file permissions.  Ie:
@@ -594,17 +607,14 @@ looks like this:
 
        h. Create the release tarballs:
        
-            ./src-release.sh -b -g -l -x -z binutils
+              ./src-release.sh -b -g -l -x -z binutils
+	  or: 
+              ./src-release.sh -b -g -l -x -z -r `git log -1 --format=%cd --date=format:%F bfd/version.m4` binutils
 
        i. Check that the files in the tarballs have the correct
           permissions.
 
-       j. Clean the source tree again
-       
-	    git clean -fdx
-	  
-       k. Edit bfd/development.sh and set "development=true".
-       l. Commit this change.
+           tar tvf binutils-*.tar.xz | grep -e "---"
 
   4. [If paranoid - upload the tarballs to one of the FTP servers and
       ask people to test it before going on to step 5].
@@ -623,9 +633,17 @@ looks like this:
  	 chmod 644 binutils-*.tar.*
 	 quit
 
-    It is OK to upload the signatures as well.
+   It is OK to upload the signatures as well.
+
+   7. Clean the source tree again
+       
+	 git clean -fdx
+	    
+       Edit bfd/development.sh and set "development=true".
+       
+       Commit this change.
 
-  7. Update web pages.  For sourceware.org:
+  8. Update web pages.  For sourceware.org:
 
       * Clone the binutils documentation: git clone ssh://sourceware.org/git/binutils-htdocs
       * Edit index.html and update the latest release number (if this
@@ -636,7 +654,7 @@ looks like this:
       For the www.gnu.org site you have to email webmasters@gnu.org
       and ask them to make the change(s).
 
-  8. Send an emails to the binutils list, info-gnu@gnu.org and
+  9. Send an emails to the binutils list, info-gnu@gnu.org and
      David Edelsohn <dje.gcc@gmail.com> announcing the new release.
      (The email to Davis is so that he can update the GNU Toolchain
      social media).  Something like this:
@@ -644,13 +662,13 @@ looks like this:
 ------------------------------------------------------------------------
 Hi Everyone,
 
-  We are pleased to announce that version 2.3x.y of the GNU Binutils
+  We are pleased to announce that version 2.4x.y of the GNU Binutils
   project sources have been released and are now available for download at:
 
     https://ftp.gnu.org/gnu/binutils
     https://sourceware.org/pub/binutils/releases/
 
-  This is a point release over the previous 2.3x version, containing bug
+  This is a point release over the previous 2.4x version, containing bug
   fixes but no new features.
 
   Our thanks go out to all of the binutils contributors, past and
@@ -663,7 +681,7 @@ Hi Everyone,
     xx
 --------------------------------------------------------------------------
 
-  9. Create a new Bugzilla entry for the point release.
+  10. Create a new Bugzilla entry for the point release.
      
        https://sourceware.org/bugzilla/editversions.cgi?product=binutils
 
diff --git a/binutils/dlltool.c b/binutils/dlltool.c
index 13655a8..17e9416 100644
--- a/binutils/dlltool.c
+++ b/binutils/dlltool.c
@@ -271,16 +271,8 @@
 #define PAGE_MASK ((bfd_vma) (- COFF_PAGE_SIZE))
 #endif
 
-/* Get current BFD error message.  */
-#define bfd_get_errmsg() (bfd_errmsg (bfd_get_error ()))
-
-/* Forward references.  */
-static char *look_for_prog (const char *, const char *, int);
-static char *deduce_name (const char *);
-
-#ifdef DLLTOOL_MCORE_ELF
-static void mcore_elf_cache_filename (const char *);
-static void mcore_elf_gen_out_file (void);
+#ifndef NAME_MAX
+#define NAME_MAX	255
 #endif
 
 #ifdef HAVE_SYS_WAIT_H
@@ -334,16 +326,16 @@ static void mcore_elf_gen_out_file (void);
 
 typedef struct ifunct
 {
-  char *         name;   /* Name of function being imported.  */
-  char *     its_name;	 /* Optional import table symbol name.  */
-  int            ord;    /* Two-byte ordinal value associated with function.  */
+  char *	 name;	/* Name of function being imported.  */
+  char *     its_name;	/* Optional import table symbol name.  */
+  int		 ord;	/* Two-byte ordinal value associated with function.  */
   struct ifunct *next;
 } ifunctype;
 
 typedef struct iheadt
 {
-  char *         dllname;  /* Name of dll file imported from.  */
-  long           nfuncs;   /* Number of functions in list.  */
+  char *	 dllname;  /* Name of dll file imported from.  */
+  long		 nfuncs;   /* Number of functions in list.  */
   struct ifunct *funchead; /* First function in list.  */
   struct ifunct *functail; /* Last  function in list.  */
   struct iheadt *next;     /* Next dll file in list.  */
@@ -371,7 +363,7 @@ static bool deterministic = DEFAULT_AR_DETERMINISTIC;
    (head->dllname is NULL).  */
 typedef struct dll_name_list_node_t
 {
-  char *                        dllname;
+  char *			dllname;
   struct dll_name_list_node_t * next;
 } dll_name_list_node_type;
 
@@ -402,11 +394,7 @@ static int dll_name_set_by_exp_name;
 static int add_indirect = 0;
 static int add_underscore = 0;
 static int add_stdcall_underscore = 0;
-/* This variable can hold three different values. The value
-   -1 (default) means that default underscoring should be used,
-   zero means that no underscoring should be done, and one
-   indicates that underscoring should be done.  */
-static int leading_underscore = -1;
+static char *leading_underscore = NULL;
 static int dontdeltemps = 0;
 
 /* TRUE if we should export all symbols.  Otherwise, we only export
@@ -487,25 +475,22 @@ static char * mcore_elf_linker_flags = NULL;
 #define DRECTVE_SECTION_NAME ".drectve"
 #endif
 
-/* What's the right name for this ?  */
-#define PATHMAX 250
-
 /* External name alias numbering starts here.  */
 #define PREFIX_ALIAS_BASE	20000
 
-char *tmp_asm_buf;
-char *tmp_head_s_buf;
-char *tmp_head_o_buf;
-char *tmp_tail_s_buf;
-char *tmp_tail_o_buf;
-char *tmp_stub_buf;
+static char *tmp_asm_buf;
+static char *tmp_head_s_buf;
+static char *tmp_head_o_buf;
+static char *tmp_tail_s_buf;
+static char *tmp_tail_o_buf;
+static char *tmp_stub_buf;
 
 #define TMP_ASM		dlltmp (&tmp_asm_buf, "%sc.s")
 #define TMP_HEAD_S	dlltmp (&tmp_head_s_buf, "%sh.s")
 #define TMP_HEAD_O	dlltmp (&tmp_head_o_buf, "%sh.o")
 #define TMP_TAIL_S	dlltmp (&tmp_tail_s_buf, "%st.s")
 #define TMP_TAIL_O	dlltmp (&tmp_tail_o_buf, "%st.o")
-#define TMP_STUB	dlltmp (&tmp_stub_buf, "%ss")
+#define TMP_STUB	dlltmp (&tmp_stub_buf, "%ssnnnnn.o")
 
 /* This bit of assembly does jmp * ....  */
 static const unsigned char i386_jtab[] =
@@ -515,69 +500,69 @@ static const unsigned char i386_jtab[] =
 
 static const unsigned char i386_dljtab[] =
 {
-  0xFF, 0x25, 0x00, 0x00, 0x00, 0x00, /* jmp __imp__function             */
-  0xB8, 0x00, 0x00, 0x00, 0x00,       /* mov eax, offset __imp__function */
-  0xE9, 0x00, 0x00, 0x00, 0x00        /* jmp __tailMerge__dllname        */
+  0xFF, 0x25, 0x00, 0x00, 0x00, 0x00, /* jmp __imp__function		 */
+  0xB8, 0x00, 0x00, 0x00, 0x00,	      /* mov eax, offset __imp__function */
+  0xE9, 0x00, 0x00, 0x00, 0x00	      /* jmp __tailMerge__dllname	 */
 };
 
 static const unsigned char i386_x64_dljtab[] =
 {
-  0xFF, 0x25, 0x00, 0x00, 0x00, 0x00, /* jmp __imp__function             */
-  0x48, 0x8d, 0x05,		      /* leaq rax, (__imp__function) */
-        0x00, 0x00, 0x00, 0x00,
-  0xE9, 0x00, 0x00, 0x00, 0x00        /* jmp __tailMerge__dllname        */
+  0xFF, 0x25, 0x00, 0x00, 0x00, 0x00, /* jmp __imp__function		 */
+  0x48, 0x8d, 0x05,		      /* leaq rax, (__imp__function)	 */
+	0x00, 0x00, 0x00, 0x00,
+  0xE9, 0x00, 0x00, 0x00, 0x00	      /* jmp __tailMerge__dllname	 */
 };
 
 static const unsigned char arm_jtab[] =
 {
   0x00, 0xc0, 0x9f, 0xe5,	/* ldr  ip, [pc] */
   0x00, 0xf0, 0x9c, 0xe5,	/* ldr  pc, [ip] */
-  0,    0,    0,    0
+  0,	0,    0,    0
 };
 
 static const unsigned char arm_interwork_jtab[] =
 {
-  0x04, 0xc0, 0x9f, 0xe5,	/* ldr  ip, [pc] */
-  0x00, 0xc0, 0x9c, 0xe5,	/* ldr  ip, [ip] */
-  0x1c, 0xff, 0x2f, 0xe1,	/* bx   ip       */
-  0,    0,    0,    0
+  0x04, 0xc0, 0x9f, 0xe5,	/* ldr	ip, [pc] */
+  0x00, 0xc0, 0x9c, 0xe5,	/* ldr	ip, [ip] */
+  0x1c, 0xff, 0x2f, 0xe1,	/* bx	ip	 */
+  0,	0,    0,    0
 };
 
 static const unsigned char thumb_jtab[] =
 {
-  0x40, 0xb4,           /* push {r6}         */
-  0x02, 0x4e,           /* ldr  r6, [pc, #8] */
-  0x36, 0x68,           /* ldr  r6, [r6]     */
-  0xb4, 0x46,           /* mov  ip, r6       */
-  0x40, 0xbc,           /* pop  {r6}         */
-  0x60, 0x47,           /* bx   ip           */
-  0,    0,    0,    0
+  0x40, 0xb4,		/* push {r6}	     */
+  0x02, 0x4e,		/* ldr	r6, [pc, #8] */
+  0x36, 0x68,		/* ldr	r6, [r6]     */
+  0xb4, 0x46,		/* mov	ip, r6	     */
+  0x40, 0xbc,		/* pop	{r6}	     */
+  0x60, 0x47,		/* bx	ip	     */
+  0,	0,    0,    0
 };
 
 static const unsigned char mcore_be_jtab[] =
 {
-  0x71, 0x02,            /* lrw r1,2       */
-  0x81, 0x01,            /* ld.w r1,(r1,0) */
-  0x00, 0xC1,            /* jmp r1         */
-  0x12, 0x00,            /* nop            */
-  0x00, 0x00, 0x00, 0x00 /* <address>      */
+  0x71, 0x02,		 /* lrw r1,2	   */
+  0x81, 0x01,		 /* ld.w r1,(r1,0) */
+  0x00, 0xC1,		 /* jmp r1	   */
+  0x12, 0x00,		 /* nop		   */
+  0x00, 0x00, 0x00, 0x00 /* <address>	   */
 };
 
 static const unsigned char mcore_le_jtab[] =
 {
-  0x02, 0x71,            /* lrw r1,2       */
-  0x01, 0x81,            /* ld.w r1,(r1,0) */
-  0xC1, 0x00,            /* jmp r1         */
-  0x00, 0x12,            /* nop            */
-  0x00, 0x00, 0x00, 0x00 /* <address>      */
+  0x02, 0x71,		 /* lrw r1,2	   */
+  0x01, 0x81,		 /* ld.w r1,(r1,0) */
+  0xC1, 0x00,		 /* jmp r1	   */
+  0x00, 0x12,		 /* nop		   */
+  0x00, 0x00, 0x00, 0x00 /* <address>	   */
 };
 
 static const unsigned char aarch64_jtab[] =
 {
-  0x10, 0x00, 0x00, 0x90, /* adrp x16, 0        */
+  0x10, 0x00, 0x00, 0x90, /* adrp x16, 0	*/
   0x10, 0x02, 0x00, 0x91, /* add x16, x16, #0x0 */
-  0x10, 0x02, 0x40, 0xf9, /* ldr x16, [x16]     */
-  0x00, 0x02, 0x1f, 0xd6  /* br x16             */
+  0x10, 0x02, 0x40, 0xf9, /* ldr x16, [x16]	*/
+  0x00, 0x02, 0x1f, 0xd6  /* br x16		*/
 };
 
 static const char i386_trampoline[] =
@@ -669,7 +654,7 @@ mtable[] =
 #define MARM 0
     "arm", ".byte", ".short", ".long", ".asciz", "@",
     "ldr\tip,[pc]\n\tldr\tpc,[ip]\n\t.long",
-    ".global", ".space", ".align\t2",".align\t4", "-mapcs-32",
+    ".global", ".space", ".align\t2", ".align\t4", "-mapcs-32",
     "pe-arm-little", bfd_arch_arm,
     arm_jtab, sizeof (arm_jtab), 8,
     0, 0, 0, 0, 0, false, 0
@@ -678,7 +663,7 @@ mtable[] =
   {
 #define M386 1
     "i386", ".byte", ".short", ".long", ".asciz", "#",
-    "jmp *", ".global", ".space", ".align\t2",".align\t4", "",
+    "jmp *", ".global", ".space", ".align\t2", ".align\t4", "",
     "pe-i386",bfd_arch_i386,
     i386_jtab, sizeof (i386_jtab), 2,
     i386_dljtab, sizeof (i386_dljtab), 2, 7, 12, false, i386_trampoline
@@ -688,7 +673,7 @@ mtable[] =
 #define MTHUMB 2
     "thumb", ".byte", ".short", ".long", ".asciz", "@",
     "push\t{r6}\n\tldr\tr6, [pc, #8]\n\tldr\tr6, [r6]\n\tmov\tip, r6\n\tpop\t{r6}\n\tbx\tip",
-    ".global", ".space", ".align\t2",".align\t4", "-mthumb-interwork",
+    ".global", ".space", ".align\t2", ".align\t4", "-mthumb-interwork",
     "pe-arm-little", bfd_arch_arm,
     thumb_jtab, sizeof (thumb_jtab), 12,
     0, 0, 0, 0, 0, false, 0
@@ -698,7 +683,7 @@ mtable[] =
   {
     "arm_interwork", ".byte", ".short", ".long", ".asciz", "@",
     "ldr\tip,[pc]\n\tldr\tip,[ip]\n\tbx\tip\n\t.long",
-    ".global", ".space", ".align\t2",".align\t4", "-mthumb-interwork",
+    ".global", ".space", ".align\t2", ".align\t4", "-mthumb-interwork",
     "pe-arm-little", bfd_arch_arm,
     arm_interwork_jtab, sizeof (arm_interwork_jtab), 12,
     0, 0, 0, 0, 0, false, 0
@@ -708,7 +693,7 @@ mtable[] =
 #define MMCORE_BE 4
     "mcore-be", ".byte", ".short", ".long", ".asciz", "//",
     "lrw r1,[1f]\n\tld.w r1,(r1,0)\n\tjmp r1\n\tnop\n1:.long",
-    ".global", ".space", ".align\t2",".align\t4", "",
+    ".global", ".space", ".align\t2", ".align\t4", "",
     "pe-mcore-big", bfd_arch_mcore,
     mcore_be_jtab, sizeof (mcore_be_jtab), 8,
     0, 0, 0, 0, 0, false, 0
@@ -718,7 +703,7 @@ mtable[] =
 #define MMCORE_LE 5
     "mcore-le", ".byte", ".short", ".long", ".asciz", "//",
     "lrw r1,[1f]\n\tld.w r1,(r1,0)\n\tjmp r1\n\tnop\n1:.long",
-    ".global", ".space", ".align\t2",".align\t4", "-EL",
+    ".global", ".space", ".align\t2", ".align\t4", "-EL",
     "pe-mcore-little", bfd_arch_mcore,
     mcore_le_jtab, sizeof (mcore_le_jtab), 8,
     0, 0, 0, 0, 0, false, 0
@@ -728,7 +713,7 @@ mtable[] =
 #define MMCORE_ELF 6
     "mcore-elf-be", ".byte", ".short", ".long", ".asciz", "//",
     "lrw r1,[1f]\n\tld.w r1,(r1,0)\n\tjmp r1\n\tnop\n1:.long",
-    ".global", ".space", ".align\t2",".align\t4", "",
+    ".global", ".space", ".align\t2", ".align\t4", "",
     "elf32-mcore-big", bfd_arch_mcore,
     mcore_be_jtab, sizeof (mcore_be_jtab), 8,
     0, 0, 0, 0, 0, false, 0
@@ -738,7 +723,7 @@ mtable[] =
 #define MMCORE_ELF_LE 7
     "mcore-elf-le", ".byte", ".short", ".long", ".asciz", "//",
     "lrw r1,[1f]\n\tld.w r1,(r1,0)\n\tjmp r1\n\tnop\n1:.long",
-    ".global", ".space", ".align\t2",".align\t4", "-EL",
+    ".global", ".space", ".align\t2", ".align\t4", "-EL",
     "elf32-mcore-little", bfd_arch_mcore,
     mcore_le_jtab, sizeof (mcore_le_jtab), 8,
     0, 0, 0, 0, 0, false, 0
@@ -748,7 +733,7 @@ mtable[] =
 #define MARM_WINCE 8
     "arm-wince", ".byte", ".short", ".long", ".asciz", "@",
     "ldr\tip,[pc]\n\tldr\tpc,[ip]\n\t.long",
-    ".global", ".space", ".align\t2",".align\t4", "-mapcs-32",
+    ".global", ".space", ".align\t2", ".align\t4", "-mapcs-32",
     "pe-arm-wince-little", bfd_arch_arm,
     arm_jtab, sizeof (arm_jtab), 8,
     0, 0, 0, 0, 0, false, 0
@@ -757,7 +742,7 @@ mtable[] =
   {
 #define MX86 9
     "i386:x86-64", ".byte", ".short", ".long", ".asciz", "#",
-    "jmp *", ".global", ".space", ".align\t2",".align\t4", "",
+    "jmp *", ".global", ".space", ".align\t2", ".align\t4", "",
     "pe-x86-64",bfd_arch_i386,
     i386_jtab, sizeof (i386_jtab), 2,
     i386_x64_dljtab, sizeof (i386_x64_dljtab), 2, 9, 14, true, i386_x64_trampoline
@@ -809,72 +794,36 @@ struct string_list
 
 static struct string_list *excludes;
 
-static const char *rvaafter (int);
-static const char *rvabefore (int);
-static const char *asm_prefix (int, const char *);
-static void process_def_file (const char *);
-static void new_directive (char *);
-static void append_import (const char *, const char *, int, const char *);
-static void run (const char *, char *);
-static void scan_drectve_symbols (bfd *);
-static void scan_filtered_symbols (bfd *, void *, long, unsigned int);
-static void add_excludes (const char *);
-static bool match_exclude (const char *);
-static void set_default_excludes (void);
-static long filter_symbols (bfd *, void *, long, unsigned int);
-static void scan_all_symbols (bfd *);
-static void scan_open_obj_file (bfd *);
-static void scan_obj_file (const char *);
-static void dump_def_info (FILE *);
-static int sfunc (const void *, const void *);
-static void flush_page (FILE *, bfd_vma *, bfd_vma, int);
-static void gen_def_file (void);
-static void generate_idata_ofile (FILE *);
-static void assemble_file (const char *, const char *);
-static void gen_exp_file (void);
+/* Forward references.  */
+static char *deduce_name (const char *);
 static const char *xlate (const char *);
-static char *make_label (const char *, const char *);
-static char *make_imp_label (const char *, const char *);
-static bfd *make_one_lib_file (export_type *, int, int);
-static bfd *make_head (void);
-static bfd *make_tail (void);
-static bfd *make_delay_head (void);
-static void gen_lib_file (int);
-static void dll_name_list_append (dll_name_list_type *, bfd_byte *);
-static int  dll_name_list_count (dll_name_list_type *);
-static void dll_name_list_print (dll_name_list_type *);
 static void dll_name_list_free_contents (dll_name_list_node_type *);
-static void dll_name_list_free (dll_name_list_type *);
-static dll_name_list_type * dll_name_list_create (void);
-static void identify_dll_for_implib (void);
 static void identify_search_archive
   (bfd *, void (*) (bfd *, bfd *, void *),  void *);
 static void identify_search_member (bfd *, bfd *, void *);
-static bool identify_process_section_p (asection *, bool);
 static void identify_search_section (bfd *, asection *, void *);
-static void identify_member_contains_symname (bfd *, bfd  *, void *);
-
-static int pfunc (const void *, const void *);
-static int nfunc (const void *, const void *);
-static void remove_null_names (export_type **);
-static void process_duplicates (export_type **);
-static void fill_ordinals (export_type **);
-static void mangle_defs (void);
-static void usage (FILE *, int);
 static void inform (const char *, ...) ATTRIBUTE_PRINTF_1;
-static void set_dll_name_from_def (const char *name, char is_dll);
+
+#ifdef DLLTOOL_MCORE_ELF
+static void mcore_elf_cache_filename (const char *);
+static void mcore_elf_gen_out_file (void);
+#endif
+
+/* Get current BFD error message.  */
+static inline const char *
+bfd_get_errmsg (void)
+{
+  return bfd_errmsg (bfd_get_error ());
+}
 
 static char *
 prefix_encode (char *start, unsigned code)
 {
-  static char alpha[26] = "abcdefghijklmnopqrstuvwxyz";
   static char buf[32];
-  char *p;
-  strcpy (buf, start);
-  p = strchr (buf, '\0');
+  char *p = stpcpy (buf, start);
   do
-    *p++ = alpha[code % sizeof (alpha)];
-  while ((code /= sizeof (alpha)) != 0);
+    *p++ = "abcdefghijklmnopqrstuvwxyz"[code % 26];
+  while ((code /= 26) != 0);
   *p = '\0';
   return buf;
 }
@@ -956,33 +905,12 @@ rvabefore (int mach)
 }
 
 static const char *
-asm_prefix (int mach, const char *name)
+asm_prefix (const char *name)
 {
-  switch (mach)
-    {
-    case MARM:
-    case MTHUMB:
-    case MARM_INTERWORK:
-    case MMCORE_BE:
-    case MMCORE_LE:
-    case MMCORE_ELF:
-    case MMCORE_ELF_LE:
-    case MARM_WINCE:
-    case MAARCH64:
-      break;
-    case M386:
-    case MX86:
-      /* Symbol names starting with ? do not have a leading underscore. */
-      if ((name && *name == '?') || leading_underscore == 0)
-        break;
-      else
-        return "_";
-    default:
-      /* xgettext:c-format */
-      fatal (_("Internal error: Unknown machine type: %d"), mach);
-      break;
-    }
-  return "";
+  /* Symbol names starting with ? do not have a leading underscore.  */
+  if (name && *name == '?')
+    return "";
+  return leading_underscore;
 }
 
 #define ASM_BYTE		mtable[machine].how_byte
@@ -996,7 +924,7 @@ asm_prefix (int mach, const char *name)
 #define ASM_ALIGN_SHORT		mtable[machine].how_align_short
 #define ASM_RVA_BEFORE		rvabefore (machine)
 #define ASM_RVA_AFTER		rvaafter (machine)
-#define ASM_PREFIX(NAME)	asm_prefix (machine, (NAME))
+#define ASM_PREFIX(NAME)	asm_prefix (NAME)
 #define ASM_ALIGN_LONG  	mtable[machine].how_align_long
 #define HOW_BFD_READ_TARGET	0  /* Always default.  */
 #define HOW_BFD_WRITE_TARGET	mtable[machine].how_bfd_target
@@ -1077,8 +1005,8 @@ def_exports (const char *name, const char *internal_name, int ordinal,
   d_exports = p;
   d_nfuncs++;
 
-  if ((internal_name != NULL)
-      && (strchr (internal_name, '.') != NULL))
+  if (internal_name != NULL
+      && strchr (internal_name, '.') != NULL)
     p->forward = ++d_nforwards;
   else
     p->forward = 0; /* no forward */
@@ -1090,7 +1018,7 @@ set_dll_name_from_def (const char *name, char is_dll)
   const char *image_basename = lbasename (name);
   if (image_basename != name)
     non_fatal (_("%s: Path components stripped from image name, '%s'."),
-	      def_file, name);
+	       def_file, name);
   /* Append the default suffix, if none specified.  */
   if (strchr (image_basename, '.') == 0)
     {
@@ -1204,7 +1132,7 @@ append_import (const char *symbol_name, const char *dllname, int func_ordinal,
 	  q->functail = q->functail->next;
 	  q->functail->ord  = func_ordinal;
 	  q->functail->name = xstrdup (symbol_name);
-	  q->functail->its_name = (its_name ? xstrdup (its_name) : NULL);
+	  q->functail->its_name = its_name ? xstrdup (its_name) : NULL;
 	  q->functail->next = NULL;
 	  q->nfuncs++;
 	  return;
@@ -1218,7 +1146,7 @@ append_import (const char *symbol_name, const char *dllname, int func_ordinal,
   q->functail = q->funchead;
   q->next = NULL;
   q->functail->name = xstrdup (symbol_name);
-  q->functail->its_name = (its_name ? xstrdup (its_name) : NULL);
+  q->functail->its_name = its_name ? xstrdup (its_name) : NULL;
   q->functail->ord  = func_ordinal;
   q->functail->next = NULL;
 
@@ -1309,7 +1237,6 @@ def_section (const char *name, int attr)
 void
 def_code (int attr)
 {
-
   def_section ("CODE", attr);
 }
 
@@ -1516,13 +1443,14 @@ scan_filtered_symbols (bfd *abfd, void *minisyms, long symcount,
 		   ! (sym->flags & BSF_FUNCTION), 0, NULL);
 
       if (add_stdcall_alias && strchr (symbol_name, '@'))
-        {
+	{
 	  int lead_at = (*symbol_name == '@');
 	  char *exported_name = xstrdup (symbol_name + lead_at);
 	  char *atsym = strchr (exported_name, '@');
 	  *atsym = '\0';
 	  /* Note: stdcall alias symbols can never be data.  */
-	  def_exports (exported_name, xstrdup (symbol_name), -1, 0, 0, 0, 0, NULL);
+	  def_exports (exported_name, xstrdup (symbol_name),
+		       -1, 0, 0, 0, 0, NULL);
 	}
     }
 }
@@ -1549,7 +1477,7 @@ add_excludes (const char *new_excludes)
       if (*exclude_string == '@')
 	sprintf (new_exclude->string, "%s", exclude_string);
       else
-	sprintf (new_exclude->string, "%s%s", (!leading_underscore ? "" : "_"),
+	sprintf (new_exclude->string, "%s%s", leading_underscore,
 		 exclude_string);
       new_exclude->next = excludes;
       excludes = new_exclude;
@@ -1714,7 +1642,8 @@ scan_obj_file (const char *filename)
 
 #ifdef DLLTOOL_MCORE_ELF
       if (mcore_elf_out_file)
-	inform (_("Cannot produce mcore-elf dll from archive file: %s"), filename);
+	inform (_("Cannot produce mcore-elf dll from archive file: %s"),
+		filename);
 #endif
     }
   else if (bfd_check_format (f, bfd_object))
@@ -1731,7 +1660,6 @@ scan_obj_file (const char *filename)
 }
 
 
-
 static void
 dump_def_info (FILE *f)
 {
@@ -1789,7 +1717,7 @@ flush_page (FILE *f, bfd_vma *need, bfd_vma page_addr, int on_page)
       bfd_vma needed = need[i];
 
       if (needed)
-        {
+	{
 	  if (!create_for_pep)
 	    {
 	      /* Relocation via HIGHLOW.  */
@@ -1831,7 +1759,7 @@ gen_def_file (void)
 
       if (res)
 	{
-	  fprintf (output_def,";\t%s\n", res);
+	  fprintf (output_def, ";\t%s\n", res);
 	  free (res);
 	}
 
@@ -1919,7 +1847,7 @@ generate_idata_ofile (FILE *filvar)
     {
       fprintf (filvar, "listone%d:\n", headindex);
       for (funcindex = 0; funcindex < headptr->nfuncs; funcindex++)
-        {
+	{
 	  if (create_for_pep)
 	    fprintf (filvar, "\t%sfuncptr%d_%d%s\n%s\t0\n",
 		     ASM_RVA_BEFORE, headindex, funcindex, ASM_RVA_AFTER,
@@ -1927,7 +1855,7 @@ generate_idata_ofile (FILE *filvar)
 	  else
 	    fprintf (filvar, "\t%sfuncptr%d_%d%s\n",
 		     ASM_RVA_BEFORE, headindex, funcindex, ASM_RVA_AFTER);
-        }
+	}
       if (create_for_pep)
 	fprintf (filvar, "\t%s\t0\n\t%s\t0\n", ASM_LONG, ASM_LONG);
       else
@@ -1941,7 +1869,7 @@ generate_idata_ofile (FILE *filvar)
     {
       fprintf (filvar, "listtwo%d:\n", headindex);
       for (funcindex = 0; funcindex < headptr->nfuncs; funcindex++)
-        {
+	{
 	  if (create_for_pep)
 	    fprintf (filvar, "\t%sfuncptr%d_%d%s\n%s\t0\n",
 		     ASM_RVA_BEFORE, headindex, funcindex, ASM_RVA_AFTER,
@@ -1949,7 +1877,7 @@ generate_idata_ofile (FILE *filvar)
 	  else
 	    fprintf (filvar, "\t%sfuncptr%d_%d%s\n",
 		     ASM_RVA_BEFORE, headindex, funcindex, ASM_RVA_AFTER);
-        }
+	}
       if (create_for_pep)
 	fprintf (filvar, "\t%s\t0\n\t%s\t0\n", ASM_LONG, ASM_LONG);
       else
@@ -1965,12 +1893,11 @@ generate_idata_ofile (FILE *filvar)
       for (funcptr = headptr->funchead; funcptr != NULL;
 	   funcptr = funcptr->next)
 	{
-	  fprintf (filvar,"funcptr%d_%d:\n", headindex, funcindex);
-	  fprintf (filvar,"\t%s\t%d\n", ASM_SHORT,
-		   ((funcptr->ord) & 0xFFFF));
-	  fprintf (filvar,"\t%s\t\"%s\"\n", ASM_TEXT,
-	    (funcptr->its_name ? funcptr->its_name : funcptr->name));
-	  fprintf (filvar,"\t%s\t0\n", ASM_BYTE);
+	  fprintf (filvar, "funcptr%d_%d:\n", headindex, funcindex);
+	  fprintf (filvar, "\t%s\t%d\n", ASM_SHORT, funcptr->ord & 0xFFFF);
+	  fprintf (filvar, "\t%s\t\"%s\"\n", ASM_TEXT,
+		   funcptr->its_name ? funcptr->its_name : funcptr->name);
+	  fprintf (filvar, "\t%s\t0\n", ASM_BYTE);
 	  funcindex++;
 	}
       headindex++;
@@ -1980,9 +1907,9 @@ generate_idata_ofile (FILE *filvar)
   headindex = 0;
   for (headptr = import_list; headptr != NULL; headptr = headptr->next)
     {
-      fprintf (filvar,"dllname%d:\n", headindex);
-      fprintf (filvar,"\t%s\t\"%s\"\n", ASM_TEXT, headptr->dllname);
-      fprintf (filvar,"\t%s\t0\n", ASM_BYTE);
+      fprintf (filvar, "dllname%d:\n", headindex);
+      fprintf (filvar, "\t%s\t\"%s\"\n", ASM_TEXT, headptr->dllname);
+      fprintf (filvar, "\t%s\t0\n", ASM_BYTE);
       headindex++;
     }
 }
@@ -2057,28 +1984,33 @@ gen_exp_file (void)
       fprintf (f, "\t%s	0x%lx	%s Time and date\n", ASM_LONG,
 	       (unsigned long) time(0), ASM_C);
       fprintf (f, "\t%s	0	%s Major and Minor version\n", ASM_LONG, ASM_C);
-      fprintf (f, "\t%sname%s	%s Ptr to name of dll\n", ASM_RVA_BEFORE, ASM_RVA_AFTER, ASM_C);
-      fprintf (f, "\t%s	%d	%s Starting ordinal of exports\n", ASM_LONG, d_low_ord, ASM_C);
+      fprintf (f, "\t%sname%s	%s Ptr to name of dll\n",
+	       ASM_RVA_BEFORE, ASM_RVA_AFTER, ASM_C);
+      fprintf (f, "\t%s	%d	%s Starting ordinal of exports\n",
+	       ASM_LONG, d_low_ord, ASM_C);
 
 
-      fprintf (f, "\t%s	%d	%s Number of functions\n", ASM_LONG, d_high_ord - d_low_ord + 1, ASM_C);
-      fprintf(f,"\t%s named funcs %d, low ord %d, high ord %d\n",
-	      ASM_C,
-	      d_named_nfuncs, d_low_ord, d_high_ord);
+      fprintf (f, "\t%s	%d	%s Number of functions\n",
+	       ASM_LONG, d_high_ord - d_low_ord + 1, ASM_C);
+      fprintf (f, "\t%s named funcs %d, low ord %d, high ord %d\n",
+	       ASM_C, d_named_nfuncs, d_low_ord, d_high_ord);
       fprintf (f, "\t%s	%d	%s Number of names\n", ASM_LONG,
-	       show_allnames ? d_high_ord - d_low_ord + 1 : d_named_nfuncs, ASM_C);
-      fprintf (f, "\t%safuncs%s  %s Address of functions\n", ASM_RVA_BEFORE, ASM_RVA_AFTER, ASM_C);
+	       show_allnames ? d_high_ord - d_low_ord + 1 : d_named_nfuncs,
+	       ASM_C);
+      fprintf (f, "\t%safuncs%s  %s Address of functions\n",
+	       ASM_RVA_BEFORE, ASM_RVA_AFTER, ASM_C);
 
       fprintf (f, "\t%sanames%s	%s Address of Name Pointer Table\n",
 	       ASM_RVA_BEFORE, ASM_RVA_AFTER, ASM_C);
 
-      fprintf (f, "\t%sanords%s	%s Address of ordinals\n", ASM_RVA_BEFORE, ASM_RVA_AFTER, ASM_C);
+      fprintf (f, "\t%sanords%s	%s Address of ordinals\n",
+	       ASM_RVA_BEFORE, ASM_RVA_AFTER, ASM_C);
 
       fprintf (f, "name:	%s	\"%s\"\n", ASM_TEXT, dll_name);
 
 
-      fprintf(f,"%s Export address Table\n", ASM_C);
-      fprintf(f,"\t%s\n", ASM_ALIGN_LONG);
+      fprintf (f, "%s Export address Table\n", ASM_C);
+      fprintf (f, "\t%s\n", ASM_ALIGN_LONG);
       fprintf (f, "afuncs:\n");
       i = d_low_ord;
 
@@ -2088,7 +2020,7 @@ gen_exp_file (void)
 	    {
 	      while (i < exp->ordinal)
 		{
-		  fprintf(f,"\t%s\t0\n", ASM_LONG);
+		  fprintf (f, "\t%s\t0\n", ASM_LONG);
 		  i++;
 		}
 	    }
@@ -2109,7 +2041,7 @@ gen_exp_file (void)
 	  i++;
 	}
 
-      fprintf (f,"%s Export Name Pointer Table\n", ASM_C);
+      fprintf (f, "%s Export Name Pointer Table\n", ASM_C);
       fprintf (f, "anames:\n");
 
       for (i = 0; (exp = d_exports_lexically[i]); i++)
@@ -2119,7 +2051,7 @@ gen_exp_file (void)
 		     ASM_RVA_BEFORE, exp->ordinal, ASM_RVA_AFTER);
 	}
 
-      fprintf (f,"%s Export Ordinal Table\n", ASM_C);
+      fprintf (f, "%s Export Ordinal Table\n", ASM_C);
       fprintf (f, "anords:\n");
       for (i = 0; (exp = d_exports_lexically[i]); i++)
 	{
@@ -2127,13 +2059,13 @@ gen_exp_file (void)
 	    fprintf (f, "\t%s	%d\n", ASM_SHORT, exp->ordinal - d_low_ord);
 	}
 
-      fprintf(f,"%s Export Name Table\n", ASM_C);
+      fprintf (f, "%s Export Name Table\n", ASM_C);
       for (i = 0; (exp = d_exports_lexically[i]); i++)
 	{
 	  if (!exp->noname || show_allnames)
 	    fprintf (f, "n%d:	%s	\"%s\"\n",
 		     exp->ordinal, ASM_TEXT,
-		     (exp->its_name ? exp->its_name : xlate (exp->name)));
+		     exp->its_name ? exp->its_name : xlate (exp->name));
 	  if (exp->forward != 0)
 	    fprintf (f, "f%d:	%s	\"%s\"\n",
 		     exp->forward, ASM_TEXT, exp->internal_name);
@@ -2157,7 +2089,7 @@ gen_exp_file (void)
 	      int l;
 
 	      /* We don't output as ascii because there can
-	         be quote characters in the string.  */
+		 be quote characters in the string.  */
 	      l = 0;
 	      for (p = dl->text; *p; p++)
 		{
@@ -2190,15 +2122,15 @@ gen_exp_file (void)
 	if (!exp->noname || show_allnames)
 	  {
 	    /* We use a single underscore for MS compatibility, and a
-               double underscore for backward compatibility with old
-               cygwin releases.  */
+	       double underscore for backward compatibility with old
+	       cygwin releases.  */
 	    if (create_compat_implib)
 	      fprintf (f, "\t%s\t__imp_%s\n", ASM_GLOBAL, exp->name);
 	    fprintf (f, "\t%s\t_imp_%s%s\n", ASM_GLOBAL,
-	    	     (!leading_underscore ? "" : "_"), exp->name);
+		     leading_underscore, exp->name);
 	    if (create_compat_implib)
 	      fprintf (f, "__imp_%s:\n", exp->name);
-	    fprintf (f, "_imp_%s%s:\n", (!leading_underscore ? "" : "_"), exp->name);
+	    fprintf (f, "_imp_%s%s:\n", leading_underscore, exp->name);
 	    fprintf (f, "\t%s\t%s\n", ASM_LONG, exp->name);
 	  }
     }
@@ -2225,7 +2157,6 @@ gen_exp_file (void)
 	fatal (_("failed to read the number of entries from base file"));
       num_entries = numbytes / sizeof (bfd_vma);
 
-
       fprintf (f, "\t.section\t.reloc\n");
       if (num_entries)
 	{
@@ -2255,8 +2186,9 @@ gen_exp_file (void)
 	      need[on_page++] = addr;
 	    }
 	  flush_page (f, need, page_addr, on_page);
-
-/*	  fprintf (f, "\t%s\t0,0\t%s End\n", ASM_LONG, ASM_C);*/
+#if 0
+	  fprintf (f, "\t%s\t0,0\t%s End\n", ASM_LONG, ASM_C);
+#endif
 	}
     }
 
@@ -2279,8 +2211,8 @@ gen_exp_file (void)
 static const char *
 xlate (const char *name)
 {
-  int lead_at = (*name == '@');
-  int is_stdcall = (!lead_at && strchr (name, '@') != NULL);
+  int lead_at = *name == '@';
+  int is_stdcall = !lead_at && strchr (name, '@') != NULL;
 
   if (!lead_at && (add_underscore
 		   || (add_stdcall_underscore && is_stdcall)))
@@ -2319,7 +2251,7 @@ typedef struct
 } sinfo;
 
 #define INIT_SEC_DATA(id, name, flags, align) \
-        { id, name, flags, align, NULL, NULL, NULL, 0, NULL }
+  { id, name, flags, align, NULL, NULL, NULL, 0, NULL }
 
 #define TEXT 0
 #define DATA 1
@@ -2332,7 +2264,7 @@ typedef struct
 #define NSECS 7
 
 #define TEXT_SEC_FLAGS   \
-        (SEC_ALLOC | SEC_LOAD | SEC_CODE | SEC_READONLY | SEC_HAS_CONTENTS)
+  (SEC_ALLOC | SEC_LOAD | SEC_CODE | SEC_READONLY | SEC_HAS_CONTENTS)
 #define DATA_SEC_FLAGS   (SEC_ALLOC | SEC_LOAD | SEC_DATA)
 #define BSS_SEC_FLAGS     SEC_ALLOC
 
@@ -2409,26 +2341,11 @@ make_imp_label (const char *prefix, const char *name)
 static bfd *
 make_one_lib_file (export_type *exp, int i, int delay)
 {
-  bfd *      abfd;
-  asymbol *  exp_label;
-  asymbol *  iname = 0;
-  asymbol *  iname2;
-  asymbol *  iname_lab;
-  asymbol ** iname_lab_pp;
-  asymbol ** iname_pp;
-#ifndef EXTRA
-#define EXTRA    0
-#endif
-  asymbol *  ptrs[NSECS + 4 + EXTRA + 1];
-  flagword   applicable;
-  char *     outname = xmalloc (strlen (TMP_STUB) + 10);
-  int        oidx = 0;
-
-
-  sprintf (outname, "%s%05d.o", TMP_STUB, i);
-
-  abfd = bfd_openw (outname, HOW_BFD_WRITE_TARGET);
+  char *outname = TMP_STUB;
+  size_t name_len = strlen (outname);
+  sprintf (outname + name_len - 7, "%05d.o", i);
 
+  bfd *abfd = bfd_openw (outname, HOW_BFD_WRITE_TARGET);
   if (!abfd)
     /* xgettext:c-format */
     fatal (_("bfd_open failed open stub file: %s: %s"),
@@ -2445,9 +2362,13 @@ make_one_lib_file (export_type *exp, int i, int delay)
     bfd_set_private_flags (abfd, F_INTERWORK);
 #endif
 
-  applicable = bfd_applicable_section_flags (abfd);
-
   /* First make symbols for the sections.  */
+  flagword applicable = bfd_applicable_section_flags (abfd);
+#ifndef EXTRA
+#define EXTRA    0
+#endif
+  asymbol *ptrs[NSECS + 4 + EXTRA + 1];
+  int oidx = 0;
   for (i = 0; i < NSECS; i++)
     {
       sinfo *si = secdata + i;
@@ -2474,7 +2395,7 @@ make_one_lib_file (export_type *exp, int i, int delay)
 
   if (! exp->data)
     {
-      exp_label = bfd_make_empty_symbol (abfd);
+      asymbol *exp_label = bfd_make_empty_symbol (abfd);
       exp_label->name = make_imp_label ("", exp->name);
       exp_label->section = secdata[TEXT].sec;
       exp_label->flags = BSF_GLOBAL;
@@ -2490,6 +2411,7 @@ make_one_lib_file (export_type *exp, int i, int delay)
   /* Generate imp symbols with one underscore for Microsoft
      compatibility, and with two underscores for backward
      compatibility with old versions of cygwin.  */
+  asymbol *iname = NULL;
   if (create_compat_implib)
     {
       iname = bfd_make_empty_symbol (abfd);
@@ -2499,25 +2421,24 @@ make_one_lib_file (export_type *exp, int i, int delay)
       iname->value = 0;
     }
 
-  iname2 = bfd_make_empty_symbol (abfd);
+  asymbol *iname2 = bfd_make_empty_symbol (abfd);
   iname2->name = make_imp_label ("__imp_", exp->name);
   iname2->section = secdata[IDATA5].sec;
   iname2->flags = BSF_GLOBAL;
   iname2->value = 0;
 
-  iname_lab = bfd_make_empty_symbol (abfd);
-
+  asymbol *iname_lab = bfd_make_empty_symbol (abfd);
   iname_lab->name = head_label;
   iname_lab->section = bfd_und_section_ptr;
   iname_lab->flags = 0;
   iname_lab->value = 0;
 
-  iname_pp = ptrs + oidx;
+  asymbol **iname_pp = ptrs + oidx;
   if (create_compat_implib)
     ptrs[oidx++] = iname;
   ptrs[oidx++] = iname2;
 
-  iname_lab_pp = ptrs + oidx;
+  asymbol **iname_lab_pp = ptrs + oidx;
   ptrs[oidx++] = iname_lab;
 
   ptrs[oidx] = 0;
@@ -2556,17 +2477,17 @@ make_one_lib_file (export_type *exp, int i, int delay)
 	      rel->addend = 0;
 
 	      if (delay)
-	        {
-	          rel2 = xmalloc (sizeof (arelent));
-	          rpp[1] = rel2;
-	          rel2->address = HOW_JTAB_ROFF2;
-	          rel2->addend = 0;
-	          rel3 = xmalloc (sizeof (arelent));
-	          rpp[2] = rel3;
-	          rel3->address = HOW_JTAB_ROFF3;
-	          rel3->addend = 0;
-	          rpp[3] = 0;
-	        }
+		{
+		  rel2 = xmalloc (sizeof (arelent));
+		  rpp[1] = rel2;
+		  rel2->address = HOW_JTAB_ROFF2;
+		  rel2->addend = 0;
+		  rel3 = xmalloc (sizeof (arelent));
+		  rpp[2] = rel3;
+		  rel3->address = HOW_JTAB_ROFF3;
+		  rel3->addend = 0;
+		  rpp[3] = 0;
+		}
 
 	      if (machine == MX86)
 		{
@@ -2597,17 +2518,17 @@ make_one_lib_file (export_type *exp, int i, int delay)
 		}
 
 	      if (delay)
-	        {
+		{
 		  if (machine == MX86)
-		   rel2->howto = bfd_reloc_type_lookup (abfd,
-							BFD_RELOC_32_PCREL);
-	          else
-	            rel2->howto = bfd_reloc_type_lookup (abfd, BFD_RELOC_32);
-	          rel2->sym_ptr_ptr = rel->sym_ptr_ptr;
-	          rel3->howto = bfd_reloc_type_lookup (abfd,
+		    rel2->howto = bfd_reloc_type_lookup (abfd,
+							 BFD_RELOC_32_PCREL);
+		  else
+		    rel2->howto = bfd_reloc_type_lookup (abfd, BFD_RELOC_32);
+		  rel2->sym_ptr_ptr = rel->sym_ptr_ptr;
+		  rel3->howto = bfd_reloc_type_lookup (abfd,
 						       BFD_RELOC_32_PCREL);
-	          rel3->sym_ptr_ptr = iname_lab_pp;
-	        }
+		  rel3->sym_ptr_ptr = iname_lab_pp;
+		}
 
 	      sec->orelocation = rpp;
 	      sec->reloc_count = rpp_len - 1;
@@ -2630,9 +2551,9 @@ make_one_lib_file (export_type *exp, int i, int delay)
 	      rel->address = 0;
 	      rel->addend = 0;
 	      if (create_for_pep)
-	        rel->howto = bfd_reloc_type_lookup (abfd, BFD_RELOC_64);
+		rel->howto = bfd_reloc_type_lookup (abfd, BFD_RELOC_64);
 	      else
-	        rel->howto = bfd_reloc_type_lookup (abfd, BFD_RELOC_32);
+		rel->howto = bfd_reloc_type_lookup (abfd, BFD_RELOC_32);
 	      rel->sym_ptr_ptr = secdata[TEXT].sympp;
 	      sec->orelocation = rpp;
 	      break;
@@ -2648,7 +2569,7 @@ make_one_lib_file (export_type *exp, int i, int delay)
 	      si->data = xmalloc (8);
 	      si->size = 8;
 	      if (exp->noname)
-	        {
+		{
 		  si->data[0] = exp->ordinal ;
 		  si->data[1] = exp->ordinal >> 8;
 		  si->data[2] = exp->ordinal >> 16;
@@ -2657,9 +2578,9 @@ make_one_lib_file (export_type *exp, int i, int delay)
 		  si->data[5] = 0;
 		  si->data[6] = 0;
 		  si->data[7] = 0x80;
-	        }
+		}
 	      else
-	        {
+		{
 		  sec->reloc_count = 1;
 		  memset (si->data, 0, si->size);
 		  rel = xmalloc (sizeof (arelent));
@@ -2671,7 +2592,7 @@ make_one_lib_file (export_type *exp, int i, int delay)
 		  rel->howto = bfd_reloc_type_lookup (abfd, BFD_RELOC_RVA);
 		  rel->sym_ptr_ptr = secdata[IDATA6].sympp;
 		  sec->orelocation = rpp;
-	        }
+		}
 	    }
 	  else
 	    {
@@ -2679,14 +2600,14 @@ make_one_lib_file (export_type *exp, int i, int delay)
 	      si->size = 4;
 
 	      if (exp->noname)
-	        {
+		{
 		  si->data[0] = exp->ordinal ;
 		  si->data[1] = exp->ordinal >> 8;
 		  si->data[2] = exp->ordinal >> 16;
 		  si->data[3] = 0x80;
-	        }
+		}
 	      else
-	        {
+		{
 		  sec->reloc_count = 1;
 		  memset (si->data, 0, si->size);
 		  rel = xmalloc (sizeof (arelent));
@@ -2698,7 +2619,7 @@ make_one_lib_file (export_type *exp, int i, int delay)
 		  rel->howto = bfd_reloc_type_lookup (abfd, BFD_RELOC_RVA);
 		  rel->sym_ptr_ptr = secdata[IDATA6].sympp;
 		  sec->orelocation = rpp;
-	      }
+		}
 	    }
 	  break;
 
@@ -2710,9 +2631,9 @@ make_one_lib_file (export_type *exp, int i, int delay)
 		 in programs compiled with the MS tools.  */
 	      int idx = exp->hint;
 	      if (exp->its_name)
-	        si->size = strlen (exp->its_name) + 3;
+		si->size = strlen (exp->its_name) + 3;
 	      else
-	        si->size = strlen (xlate (exp->import_name)) + 3;
+		si->size = strlen (xlate (exp->import_name)) + 3;
 	      si->data = xmalloc (si->size);
 	      memset (si->data, 0, si->size);
 	      si->data[0] = idx & 0xff;
@@ -2797,7 +2718,7 @@ make_head (void)
   fprintf (f, "%s IMAGE_IMPORT_DESCRIPTOR\n", ASM_C);
   fprintf (f, "\t.section\t.idata$2\n");
 
-  fprintf (f,"\t%s\t%s\n", ASM_GLOBAL, head_label);
+  fprintf (f, "\t%s\t%s\n", ASM_GLOBAL, head_label);
 
   fprintf (f, "%s:\n", head_label);
 
@@ -2823,12 +2744,12 @@ make_head (void)
     {
       fprintf (f, "\t.section\t.idata$5\n");
       if (use_nul_prefixed_import_tables)
-        {
+	{
 	  if (create_for_pep)
-	    fprintf (f,"\t%s\t0\n\t%s\t0\n", ASM_LONG, ASM_LONG);
+	    fprintf (f, "\t%s\t0\n\t%s\t0\n", ASM_LONG, ASM_LONG);
 	  else
-	    fprintf (f,"\t%s\t0\n", ASM_LONG);
-        }
+	    fprintf (f, "\t%s\t0\n", ASM_LONG);
+	}
       fprintf (f, "fthunk:\n");
     }
 
@@ -2836,12 +2757,12 @@ make_head (void)
     {
       fprintf (f, "\t.section\t.idata$4\n");
       if (use_nul_prefixed_import_tables)
-        {
+	{
 	  if (create_for_pep)
-	    fprintf (f,"\t%s\t0\n\t%s\t0\n", ASM_LONG, ASM_LONG);
+	    fprintf (f, "\t%s\t0\n\t%s\t0\n", ASM_LONG, ASM_LONG);
 	  else
-	    fprintf (f,"\t%s\t0\n", ASM_LONG);
-        }
+	    fprintf (f, "\t%s\t0\n", ASM_LONG);
+	}
       fprintf (f, "hname:\n");
     }
 
@@ -2859,7 +2780,7 @@ make_head (void)
   return abfd;
 }
 
-bfd *
+static bfd *
 make_delay_head (void)
 {
   FILE *f = fopen (TMP_HEAD_S, FOPEN_WT);
@@ -2876,7 +2797,7 @@ make_delay_head (void)
   /* Output the __tailMerge__xxx function */
   fprintf (f, "%s Import trampoline\n", ASM_C);
   fprintf (f, "\t.section\t.text\n");
-  fprintf(f,"\t%s\t%s\n", ASM_GLOBAL, head_label);
+  fprintf (f, "\t%s\t%s\n", ASM_GLOBAL, head_label);
   if (HOW_SEH)
     fprintf (f, "\t.seh_proc\t%s\n", head_label);
   fprintf (f, "%s:\n", head_label);
@@ -2887,7 +2808,7 @@ make_delay_head (void)
   /* Output the delay import descriptor */
   fprintf (f, "\n%s DELAY_IMPORT_DESCRIPTOR\n", ASM_C);
   fprintf (f, ".section\t.text$2\n");
-  fprintf (f,"%s __DELAY_IMPORT_DESCRIPTOR_%s\n", ASM_GLOBAL,imp_name_lab);
+  fprintf (f, "%s __DELAY_IMPORT_DESCRIPTOR_%s\n", ASM_GLOBAL,imp_name_lab);
   fprintf (f, "__DELAY_IMPORT_DESCRIPTOR_%s:\n", imp_name_lab);
   fprintf (f, "\t%s 1\t%s grAttrs\n", ASM_LONG, ASM_C);
   fprintf (f, "\t%s__%s_iname%s\t%s rvaDLLName\n",
@@ -2917,9 +2838,9 @@ make_delay_head (void)
       fprintf (f, "\t.section\t.idata$5\n");
       /* NULL terminating list.  */
       if (create_for_pep)
-        fprintf (f,"\t%s\t0\n\t%s\t0\n", ASM_LONG, ASM_LONG);
+	fprintf (f, "\t%s\t0\n\t%s\t0\n", ASM_LONG, ASM_LONG);
       else
-        fprintf (f,"\t%s\t0\n", ASM_LONG);
+	fprintf (f, "\t%s\t0\n", ASM_LONG);
       fprintf (f, "__IAT_%s:\n", imp_name_lab);
     }
 
@@ -2928,7 +2849,7 @@ make_delay_head (void)
       fprintf (f, "\t.section\t.idata$4\n");
       fprintf (f, "\t%s\t0\n", ASM_LONG);
       if (create_for_pep)
-        fprintf (f, "\t%s\t0\n", ASM_LONG);
+	fprintf (f, "\t%s\t0\n", ASM_LONG);
       fprintf (f, "\t.section\t.idata$4\n");
       fprintf (f, "__INT_%s:\n", imp_name_lab);
     }
@@ -2967,18 +2888,18 @@ make_tail (void)
     {
       fprintf (f, "\t.section\t.idata$4\n");
       if (create_for_pep)
-	fprintf (f,"\t%s\t0\n\t%s\t0\n", ASM_LONG, ASM_LONG);
+	fprintf (f, "\t%s\t0\n\t%s\t0\n", ASM_LONG, ASM_LONG);
       else
-	fprintf (f,"\t%s\t0\n", ASM_LONG); /* NULL terminating list.  */
+	fprintf (f, "\t%s\t0\n", ASM_LONG); /* NULL terminating list.  */
     }
 
   if (!no_idata5)
     {
       fprintf (f, "\t.section\t.idata$5\n");
       if (create_for_pep)
-	fprintf (f,"\t%s\t0\n\t%s\t0\n", ASM_LONG, ASM_LONG);
+	fprintf (f, "\t%s\t0\n\t%s\t0\n", ASM_LONG, ASM_LONG);
       else
-	fprintf (f,"\t%s\t0\n", ASM_LONG); /* NULL terminating list.  */
+	fprintf (f, "\t%s\t0\n", ASM_LONG); /* NULL terminating list.  */
     }
 
   fprintf (f, "\t.section\t.idata$7\n");
@@ -3100,29 +3021,26 @@ gen_lib_file (int delay)
 
   if (dontdeltemps < 2)
     {
-      char *name;
-      size_t stub_len = strlen (TMP_STUB);
+      char *name = TMP_STUB;
+      size_t name_len = strlen (name);
 
-      name = xmalloc (stub_len + 10);
-      memcpy (name, TMP_STUB, stub_len);
       for (i = 0; (exp = d_exports_lexically[i]); i++)
 	{
 	  /* Don't delete non-existent stubs for PRIVATE entries.  */
-          if (exp->private)
+	  if (exp->private)
 	    continue;
-	  sprintf (name + stub_len, "%05d.o", i);
+	  sprintf (name + name_len - 7, "%05d.o", i);
 	  if (unlink (name) < 0)
 	    /* xgettext:c-format */
 	    non_fatal (_("cannot delete %s: %s"), name, strerror (errno));
 	  if (ext_prefix_alias)
 	    {
-	      sprintf (name + stub_len, "%05d.o", i + PREFIX_ALIAS_BASE);
+	      sprintf (name + name_len - 7, "%05d.o", i + PREFIX_ALIAS_BASE);
 	      if (unlink (name) < 0)
 		/* xgettext:c-format */
 		non_fatal (_("cannot delete %s: %s"), name, strerror (errno));
 	    }
 	}
-      free (name);
     }
 
   inform (_("Created lib file"));
@@ -3187,7 +3105,7 @@ dll_name_list_print (dll_name_list_type * list)
 
   p = list->head;
 
-  while (p && p->next && p->next->dllname && *(p->next->dllname))
+  while (p && p->next && p->next->dllname && *p->next->dllname)
     {
       printf ("%s\n", p->next->dllname);
       p = p->next;
@@ -3282,8 +3200,8 @@ identify_member_contains_symname (bfd  * abfd,
   for (i = 0; i < number_of_symbols; i++)
     {
       if (strncmp (symbol_table[i]->name,
-                   search_data->symname,
-                   strlen (search_data->symname)) == 0)
+		   search_data->symname,
+		   strlen (search_data->symname)) == 0)
 	{
 	  search_data->found = true;
 	  break;
@@ -3337,7 +3255,7 @@ identify_dll_for_implib (void)
   if (! bfd_check_format (abfd, bfd_archive))
     {
       if (! bfd_close (abfd))
-        bfd_fatal (identify_imp_name);
+	bfd_fatal (identify_imp_name);
 
       fatal (_("%s is not a library"), identify_imp_name);
     }
@@ -3345,7 +3263,7 @@ identify_dll_for_implib (void)
   /* Detect if this a Microsoft import library.  */
   identify_search_archive (abfd,
 			   identify_member_contains_symname,
-			   (void *)(& search_data));
+			   (void *) &search_data);
   if (search_data.found)
     identify_data.ms_style_implib = true;
 
@@ -3359,7 +3277,7 @@ identify_dll_for_implib (void)
   if (!bfd_check_format (abfd, bfd_archive))
     {
       if (!bfd_close (abfd))
-        bfd_fatal (identify_imp_name);
+	bfd_fatal (identify_imp_name);
 
       fatal (_("%s is not a library"), identify_imp_name);
     }
@@ -3367,7 +3285,7 @@ identify_dll_for_implib (void)
   /* Now search for the dll name.  */
   identify_search_archive (abfd,
 			   identify_search_member,
-			   (void *)(& identify_data));
+			   (void *) &identify_data);
 
   if (! bfd_close (abfd))
     bfd_fatal (identify_imp_name);
@@ -3376,12 +3294,12 @@ identify_dll_for_implib (void)
   if (count > 0)
     {
       if (identify_strict && count > 1)
-        {
-          dll_name_list_free (identify_data.list);
-          identify_data.list = NULL;
-          fatal (_("Import library `%s' specifies two or more dlls"),
+	{
+	  dll_name_list_free (identify_data.list);
+	  identify_data.list = NULL;
+	  fatal (_("Import library `%s' specifies two or more dlls"),
 		 identify_imp_name);
-        }
+	}
       dll_name_list_print (identify_data.list);
       dll_name_list_free (identify_data.list);
       identify_data.list = NULL;
@@ -3413,19 +3331,19 @@ identify_search_archive (bfd * abfd,
       arfile = bfd_openr_next_archived_file (abfd, arfile);
 
       if (arfile == NULL)
-        {
-          if (bfd_get_error () != bfd_error_no_more_archived_files)
-            bfd_fatal (bfd_get_filename (abfd));
-          break;
-        }
+	{
+	  if (bfd_get_error () != bfd_error_no_more_archived_files)
+	    bfd_fatal (bfd_get_filename (abfd));
+	  break;
+	}
 
       if (bfd_check_format_matches (arfile, bfd_object, &matching))
 	(*operation) (arfile, abfd, user_storage);
       else
-        {
-          bfd_nonfatal (bfd_get_filename (arfile));
-          free (matching);
-        }
+	{
+	  bfd_nonfatal (bfd_get_filename (arfile));
+	  free (matching);
+	}
 
       if (last_arfile != NULL)
 	{
@@ -3530,7 +3448,7 @@ identify_search_section (bfd * abfd, asection * section, void * obj)
      name begins at offset 0 in the data. We assume that the
      dll name does not contain unprintable characters.   */
   if (data[0] != '\0' && ISPRINT (data[0])
-      && ((datasize < 2) || ISPRINT (data[1])))
+      && (datasize < 2 || ISPRINT (data[1])))
     dll_name_list_append (identify_data->list, data);
 
   free (data);
@@ -3623,7 +3541,7 @@ process_duplicates (export_type **d_export_vec)
 		  && b->ordinal != -1)
 		/* xgettext:c-format */
 		fatal (_("Error, duplicate EXPORT with ordinals: %s"),
-		      a->name);
+		       a->name);
 
 	      /* Merge attributes.  */
 	      b->ordinal = a->ordinal > 0 ? a->ordinal : b->ordinal;
@@ -3904,9 +3822,9 @@ main (int ac, char **av)
 
   while ((c = getopt_long (ac, av,
 #ifdef DLLTOOL_MCORE_ELF
-                           "m:e:l:aD:d:z:b:xp:cCuUkAS:t:f:nI:vVHhM:L:F:",
+			   "m:e:l:aD:d:z:b:xp:cCuUkAS:t:f:nI:vVHhM:L:F:",
 #else
-                           "m:e:l:y:aD:d:z:b:xp:cCuUkAS:t:f:nI:vVHh",
+			   "m:e:l:y:aD:d:z:b:xp:cCuUkAS:t:f:nI:vVHh",
 #endif
 			   long_options, 0))
 	 != EOF)
@@ -3932,10 +3850,10 @@ main (int ac, char **av)
 	  add_stdcall_underscore = 1;
 	  break;
 	case OPTION_NO_LEADING_UNDERSCORE:
-	  leading_underscore = 0;
+	  leading_underscore = "";
 	  break;
 	case OPTION_LEADING_UNDERSCORE:
-	  leading_underscore = 1;
+	  leading_underscore = "_";
 	  break;
 	case OPTION_IDENTIFY_STRICT:
 	  identify_strict = 1;
@@ -3972,7 +3890,7 @@ main (int ac, char **av)
 	  dll_name = (char*) lbasename (optarg);
 	  if (dll_name != optarg)
 	    non_fatal (_("Path components stripped from dllname, '%s'."),
-	      		 optarg);
+		       optarg);
 	  break;
 	case 'l':
 	  imp_name = optarg;
@@ -4062,24 +3980,28 @@ main (int ac, char **av)
   machine = i;
 
   /* Check if we generated PE+.  */
-  create_for_pep = strcmp (mname, "i386:x86-64") == 0 ||
-		   strcmp (mname, "arm64") == 0;
+  create_for_pep = (strcmp (mname, "i386:x86-64") == 0
+		    || strcmp (mname, "arm64") == 0);
 
-  {
-    /* Check the default underscore */
-    int u = leading_underscore; /* Underscoring mode. -1 for use default.  */
-    if (u == -1)
+  /* Check the default underscore */
+  if (leading_underscore == NULL)
+    {
+      int u;
+      static char underscore[2];
       bfd_get_target_info (mtable[machine].how_bfd_target, NULL,
-                           NULL, &u, NULL);
-    if (u != -1)
-      leading_underscore = u != 0;
-  }
+			   NULL, &u, NULL);
+      if (u == -1)
+	u = 0;
+      underscore[0] = u;
+      underscore[1] = 0;
+      leading_underscore = underscore;
+    }
 
   if (!dll_name && exp_name)
     {
       /* If we are inferring dll_name from exp_name,
-         strip off any path components, without emitting
-         a warning.  */
+	 strip off any path components, without emitting
+	 a warning.  */
       const char* exp_basename = lbasename (exp_name);
       const int len = strlen (exp_basename) + 5;
       dll_name = xmalloc (len);
@@ -4114,19 +4036,17 @@ main (int ac, char **av)
   if (tmp_prefix == NULL)
     {
       /* If possible use a deterministic prefix.  */
-      if (imp_name || delayimp_name)
-        {
-          const char *input = imp_name ? imp_name : delayimp_name;
-          tmp_prefix = xmalloc (strlen (input) + 2);
-          sprintf (tmp_prefix, "%s_", input);
-          for (i = 0; tmp_prefix[i]; i++)
-            if (!ISALNUM (tmp_prefix[i]))
-              tmp_prefix[i] = '_';
-        }
+      const char *input = imp_name ? imp_name : delayimp_name;
+      if (input && strlen (input) + sizeof ("_snnnnn.o") - 1 <= NAME_MAX)
+	{
+	  tmp_prefix = xmalloc (strlen (input) + 2);
+	  sprintf (tmp_prefix, "%s_", input);
+	  for (i = 0; tmp_prefix[i]; i++)
+	    if (!ISALNUM (tmp_prefix[i]))
+	      tmp_prefix[i] = '_';
+	}
       else
-        {
-          tmp_prefix = prefix_encode ("d", getpid ());
-        }
+	tmp_prefix = prefix_encode ("d", getpid ());
     }
 
   mangle_defs ();
@@ -4155,23 +4075,23 @@ main (int ac, char **av)
       char *p;
 
       if (mtable[machine].how_dljtab == 0)
-        {
-          inform (_("Warning, machine type (%d) not supported for "
-			"delayimport."), machine);
-        }
+	{
+	  inform (_("Warning, machine type (%d) not supported for "
+		    "delayimport."), machine);
+	}
       else
-        {
-          killat = 1;
-          imp_name = delayimp_name;
-          imp_name_lab = xstrdup (imp_name);
-          for (p = imp_name_lab; *p; p++)
-            {
-              if (!ISALNUM (*p))
-                *p = '_';
-            }
-          head_label = make_label("__tailMerge_", imp_name_lab);
-          gen_lib_file (1);
-        }
+	{
+	  killat = 1;
+	  imp_name = delayimp_name;
+	  imp_name_lab = xstrdup (imp_name);
+	  for (p = imp_name_lab; *p; p++)
+	    {
+	      if (!ISALNUM (*p))
+		*p = '_';
+	    }
+	  head_label = make_label("__tailMerge_", imp_name_lab);
+	  gen_lib_file (1);
+	}
     }
 
   if (output_def)
@@ -4289,14 +4209,14 @@ deduce_name (const char *prog_name)
   if (dash != NULL)
     {
       /* First, try looking for a prefixed PROG_NAME in the
-         PROGRAM_NAME directory, with the same prefix as PROGRAM_NAME.  */
+	 PROGRAM_NAME directory, with the same prefix as PROGRAM_NAME.  */
       cmd = look_for_prog (prog_name, program_name, dash - program_name + 1);
     }
 
   if (slash != NULL && cmd == NULL)
     {
       /* Next, try looking for a PROG_NAME in the same directory as
-         that of this program.  */
+	 that of this program.  */
       cmd = look_for_prog (prog_name, program_name, slash - program_name + 1);
     }
 
diff --git a/binutils/dwarf.c b/binutils/dwarf.c
index 13a9162..424353c 100644
--- a/binutils/dwarf.c
+++ b/binutils/dwarf.c
@@ -2035,7 +2035,7 @@ skip_attr_bytes (unsigned long form,
 
 static abbrev_entry *
 get_type_abbrev_from_form (unsigned long form,
-			   unsigned long uvalue,
+			   uint64_t uvalue,
 			   uint64_t cu_offset,
 			   unsigned char *cu_end,
 			   const struct dwarf_section *section,
@@ -2043,16 +2043,6 @@ get_type_abbrev_from_form (unsigned long form,
 			   unsigned char **data_return,
 			   abbrev_map **map_return)
 {
-  unsigned long   abbrev_number;
-  abbrev_map *    map;
-  abbrev_entry *  entry;
-  unsigned char * data;
-
-  if (abbrev_num_return != NULL)
-    * abbrev_num_return = 0;
-  if (data_return != NULL)
-    * data_return = NULL;
-
   switch (form)
     {
     case DW_FORM_GNU_ref_alt:
@@ -2063,8 +2053,8 @@ get_type_abbrev_from_form (unsigned long form,
     case DW_FORM_ref_addr:
       if (uvalue >= section->size)
 	{
-	  warn (_("Unable to resolve ref_addr form: uvalue %lx "
-		  "> section size %" PRIx64 " (%s)\n"),
+	  warn (_("Unable to resolve ref_addr form: uvalue %" PRIx64
+		  " >= section size %" PRIx64 " (%s)\n"),
 		uvalue, section->size, section->name);
 	  return NULL;
 	}
@@ -2082,8 +2072,8 @@ get_type_abbrev_from_form (unsigned long form,
       if (uvalue + cu_offset < uvalue
 	  || uvalue + cu_offset > (size_t) (cu_end - section->start))
 	{
-	  warn (_("Unable to resolve ref form: uvalue %lx + cu_offset %" PRIx64
-		  " > CU size %tx\n"),
+	  warn (_("Unable to resolve ref form: uvalue %" PRIx64
+		  " + cu_offset %" PRIx64 " > CU size %tx\n"),
 		uvalue, cu_offset, cu_end - section->start);
 	  return NULL;
 	}
@@ -2097,17 +2087,18 @@ get_type_abbrev_from_form (unsigned long form,
       return NULL;
     }
 
-  data = (unsigned char *) section->start + uvalue;
-  map = find_abbrev_map_by_offset (uvalue);
+  abbrev_map *map = find_abbrev_map_by_offset (uvalue);
 
   if (map == NULL)
     {
-      warn (_("Unable to find abbreviations for CU offset %#lx\n"), uvalue);
+      warn (_("Unable to find abbreviations for CU offset %" PRIx64 "\n"),
+	    uvalue);
       return NULL;
     }
   if (map->list == NULL)
     {
-      warn (_("Empty abbreviation list encountered for CU offset %lx\n"), uvalue);
+      warn (_("Empty abbreviation list encountered for CU offset %" PRIx64 "\n"),
+	    uvalue);
       return NULL;
     }
 
@@ -2119,20 +2110,23 @@ get_type_abbrev_from_form (unsigned long form,
 	*map_return = NULL;
     }
 
+  unsigned char *data = section->start + uvalue;
   if (form == DW_FORM_ref_addr)
     cu_end = section->start + map->end;
 
+  unsigned long abbrev_number;
   READ_ULEB (abbrev_number, data, cu_end);
 
-  for (entry = map->list->first_abbrev; entry != NULL; entry = entry->next)
-    if (entry->number == abbrev_number)
-      break;
-
   if (abbrev_num_return != NULL)
-    * abbrev_num_return = abbrev_number;
+    *abbrev_num_return = abbrev_number;
 
   if (data_return != NULL)
-    * data_return = data;
+    *data_return = data;
+
+  abbrev_entry *entry;
+  for (entry = map->list->first_abbrev; entry != NULL; entry = entry->next)
+    if (entry->number == abbrev_number)
+      break;
 
   if (entry == NULL)
     warn (_("Unable to find entry for abbreviation %lu\n"), abbrev_number);
diff --git a/binutils/nm.c b/binutils/nm.c
index faf27c5..7acf9a2 100644
--- a/binutils/nm.c
+++ b/binutils/nm.c
@@ -1227,7 +1227,8 @@ print_symbol (bfd *        abfd,
 
   format->print_symbol_info (&info, abfd);
 
-  if (line_numbers)
+  const char *symname = bfd_asymbol_name (sym);
+  if (line_numbers && symname != NULL && symname[0] != 0)
     {
       struct lineno_cache *lc = bfd_usrdata (abfd);
       const char *filename, *functionname;
@@ -1258,7 +1259,6 @@ print_symbol (bfd *        abfd,
       else if (bfd_is_und_section (bfd_asymbol_section (sym)))
 	{
 	  unsigned int i;
-	  const char *symname;
 
 	  /* For an undefined symbol, we try to find a reloc for the
              symbol, and print the line number of the reloc.  */
@@ -1274,7 +1274,6 @@ print_symbol (bfd *        abfd,
 	      bfd_map_over_sections (abfd, get_relocs, &rinfo);
 	    }
 
-	  symname = bfd_asymbol_name (sym);
 	  for (i = 0; i < lc->seccount; i++)
 	    {
 	      long j;
@@ -1287,6 +1286,7 @@ print_symbol (bfd *        abfd,
 		  if (r->sym_ptr_ptr != NULL
 		      && (*r->sym_ptr_ptr)->section == sym->section
 		      && (*r->sym_ptr_ptr)->value == sym->value
+		      && bfd_asymbol_name (*r->sym_ptr_ptr) != NULL
 		      && strcmp (symname,
 				 bfd_asymbol_name (*r->sym_ptr_ptr)) == 0
 		      && bfd_find_nearest_line (abfd, lc->secs[i], lc->syms,
diff --git a/binutils/objcopy.c b/binutils/objcopy.c
index 24e31cc..3782850 100644
--- a/binutils/objcopy.c
+++ b/binutils/objcopy.c
@@ -1590,14 +1590,14 @@ filter_symbols (bfd *abfd, bfd *obfd, asymbol **osyms,
 	{
 	  char *new_name;
 
-	  if (name != NULL
-	      && name[0] == '_'
+	  if (name[0] == '_'
 	      && name[1] == '_'
 	      && strcmp (name + (name[2] == '_'), "__gnu_lto_slim") == 0)
 	    {
-	      fatal (_("redefining symbols does not work on LTO-compiled object files"));
+	      fatal (_("redefining symbols does not work"
+		       " on LTO-compiled object files"));
 	    }
-	  
+
 	  new_name = (char *) lookup_sym_redefinition (name);
 	  if (new_name == name
 	      && (flags & BSF_SECTION_SYM) != 0)
@@ -2956,7 +2956,7 @@ copy_object (bfd *ibfd, bfd *obfd, const bfd_arch_info_type *input_arch)
 	  pset = find_section_list (padd->name, false,
 				    SECTION_CONTEXT_SET_FLAGS);
 	  if (pset != NULL)
-	    {	      
+	    {
 	      flags = pset->flags | SEC_HAS_CONTENTS;
 	      flags = check_new_section_flags (flags, obfd, padd->name);
 	    }
diff --git a/binutils/testsuite/binutils-all/debuginfod.exp b/binutils/testsuite/binutils-all/debuginfod.exp
index 2f74644..af0dc09 100644
--- a/binutils/testsuite/binutils-all/debuginfod.exp
+++ b/binutils/testsuite/binutils-all/debuginfod.exp
@@ -34,12 +34,12 @@ if { ![is_elf_format] || ![isnative] } {
 }
 
 if { [which $OBJDUMP] == 0} {
-    perror "$test $OBJDUMP (does not exist)"
+    perror "$test [file tail $OBJDUMP] (does not exist)"
     return
 }
 
  if { [which $READELF] == 0} {
-    perror "$test $READELF (does not exist)"
+     perror "$test [file tail $READELF] (does not exist)"
     return
 }
 
@@ -162,9 +162,9 @@ proc test_fetch_debuglink { prog progargs } {
     set got [binutils_run $prog "$progargs tmpdir/testprog"]
 
     if { [regexp ".*Found separate debug info file.*Contents\[^\n\]*loaded from\[^\n\]*" $got] } {
-       pass "$test ($prog debuglink)"
+        pass "$test ([file tail $prog] debuglink)"
     } else {
-       fail "$test ($prog did not find debuglink to cache $cache)"
+        fail "$test ([file tail $prog] did not find debuglink to cache)"
     }
 }
 
@@ -178,9 +178,9 @@ proc test_fetch_debugaltlink { prog progargs } {
     set buildid "00112233445566778899aabbccddeeff0123456789abcdef"
 
     if { [regexp ".*Found separate debug info file\[^\n\]*$cache/$buildid" $got] } {
-        pass "$test ($prog debugaltlink)"
+        pass "$test ([file tail $prog] debugaltlink)"
     } else {
-        fail "$test ($prog could not load debugaltlink)"
+        fail "$test ([file tail $prog] could not load debugaltlink)"
     }
 }
 
diff --git a/binutils/testsuite/binutils-all/dlltool.exp b/binutils/testsuite/binutils-all/dlltool.exp
index ac1306b..7bae86b 100644
--- a/binutils/testsuite/binutils-all/dlltool.exp
+++ b/binutils/testsuite/binutils-all/dlltool.exp
@@ -14,29 +14,10 @@
 # along with this program; if not, write to the Free Software
 # Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
 
-if {![istarget "i*86-*-*"]
-    && ![istarget "x86_64-*-mingw*"]
-    && ![istarget "arm-*-pe*"]} {
+if { ![is_pecoff_format] } {
     return
 }
 
-if {![istarget "i*86-*-*pe*"] \
-    && ![istarget "i*86-*-cygwin*"] \
-    && ![istarget "i*86-*-mingw32*"] \
-    && ![istarget "arm-*-pe*"] \
-    && ![istarget "x86_64-*-mingw*"] } {
-    set target_xfail "yes"
-} else {
-    set target_xfail "no"
-}
-
-# PR 19459: The ARM does not support inserting a leading underscore.
-if { [istarget "arm-*-pe*"] } {
-    set target_no_leading_underscore "yes"
-} else {
-    set target_no_leading_underscore "no"
-}
-
 if {![info exists DLLTOOL]} then {
     return
 }
@@ -56,10 +37,6 @@ if ![string match "" $err] then {
     pass "dlltool (fastcall export)"
 }
 
-if { "$target_xfail" == "yes" } {
-    setup_xfail *-*
-}
-
 verbose "$DLLTOOL -l libversion.a --def $srcdir/$subdir/version.def $dlltool_gas_flag" 1
 catch "exec $DLLTOOL -l libersion.a --def $srcdir/$subdir/version.def $dlltool_gas_flag" err
 
@@ -71,10 +48,6 @@ if ![string match "" $err] then {
     pass "dlltool (version.dll)"
 }
 
-if { "$target_xfail" == "yes" } {
-    setup_xfail *-*
-}
-
 verbose "$DLLTOOL -p prefix --leading-underscore -l tmpdir/libalias.a -d $srcdir/$subdir/alias.def $dlltool_gas_flag" 1
 catch "exec $DLLTOOL -p prefix --leading-underscore -l tmpdir/libalias.a -d $srcdir/$subdir/alias.def $dlltool_gas_flag" err
 
@@ -88,11 +61,7 @@ if ![string match "" $err] then {
 pass "dlltool -p (execution)"
 
 set got [binutils_run $NM "tmpdir/libalias.a"]
-if { "$target_no_leading_underscore" == "yes" } {
-    set want "00000000 I __imp_prefixsymbol.*00000000 T prefixsymbol.*00000000 I __imp_symbol.*00000000 T symbol"
-} else {
-    set want "00000000 I __imp__prefix_symbol.*00000000 T _prefix_symbol.*00000000 I __imp__symbol.*00000000 T _symbol"
-}
+set want "00000000 I __imp__prefix_symbol.*00000000 T _prefix_symbol.*00000000 I __imp__symbol.*00000000 T _symbol"
 
 if [regexp $want $got] then {
     pass "dlltool -p (symbol names)"
@@ -122,11 +91,7 @@ if ![string match "" $err] then {
 pass "dlltool -p (execution) alias-2.def"
 
 set got [binutils_run $NM "tmpdir/libalias2.a"]
-if { "$target_no_leading_underscore" == "yes" } {
-    set want "00000000 I __imp_prefixsymbol.*00000000 T prefixsymbol.*00000000 I __imp_symbol.*00000000 T symbol"
-} else {
-    set want "00000000 I __imp__prefix_symbol.*00000000 T _prefix_symbol.*00000000 I __imp__symbol.*00000000 T _symbol"
-}
+set want "00000000 I __imp__prefix_symbol.*00000000 T _prefix_symbol.*00000000 I __imp__symbol.*00000000 T _symbol"
 
 if [regexp $want $got] then {
     pass "dlltool -p (symbol names) alias-2.def"
@@ -241,15 +206,7 @@ if ![string match "" $err] then {
 pass "dlltool -p (execution leading-underscore)"
 
 set got [binutils_run $NM "tmpdir/libalias_u.a"]
-if { "$target_no_leading_underscore" == "yes" } {
-    set want "00000000 I __imp_prefixsymbol.*00000000 T prefixsymbol.*00000000 I __imp_symbol.*00000000 T symbol"
-} else {
-    set want "00000000 I __imp__prefix_symbol.*00000000 T _prefix_symbol.*00000000 I __imp__symbol.*00000000 T _symbol"
-}
-
-if { "$target_xfail" == "yes" } {
-    setup_xfail *-*
-}
+set want "00000000 I __imp__prefix_symbol.*00000000 T _prefix_symbol.*00000000 I __imp__symbol.*00000000 T _symbol"
 
 if [regexp $want $got] then {
     pass "dlltool -p (symbol names leading underscore)"
@@ -279,11 +236,7 @@ if ![string match "" $err] then {
 pass "dlltool -p (execution leading underscore) alias-2.def"
 
 set got [binutils_run $NM "tmpdir/libalias_u2.a"]
-if { "$target_no_leading_underscore" == "yes" } {
-    set want "00000000 I __imp_prefixsymbol.*00000000 T prefixsymbol.*00000000 I __imp_symbol.*00000000 T symbol"
-} else {
-    set want "00000000 I __imp__prefix_symbol.*00000000 T _prefix_symbol.*00000000 I __imp__symbol.*00000000 T _symbol"
-}
+set want "00000000 I __imp__prefix_symbol.*00000000 T _prefix_symbol.*00000000 I __imp__symbol.*00000000 T _symbol"
 
 if [regexp $want $got] then {
     pass "dlltool -p (symbol names leading underscore) alias-2.def"
diff --git a/binutils/testsuite/binutils-all/i386/compressed-1b.d b/binutils/testsuite/binutils-all/i386/compressed-1b.d
index 6e45e55..8b3f75a 100644
--- a/binutils/testsuite/binutils-all/i386/compressed-1b.d
+++ b/binutils/testsuite/binutils-all/i386/compressed-1b.d
@@ -10,9 +10,9 @@ There are 5 section headers, starting at offset 0x[0-9a-f]+:
 Section Headers:
   \[Nr\] Name              Type            Addr     Off    Size   ES Flg Lk Inf Al
   \[ 0\]                   NULL            00000000 000000 000000 00      0   0  0
-  \[ 1\] .text             PROGBITS        00000000 000040 00001b 00  AX  0   0 16
-  \[ 2\] .data             PROGBITS        00000000 00005b 000000 00  WA  0   0  1
-  \[ 3\] .bss              NOBITS          00000000 00005b 000000 00  WA  0   0  1
-  \[ 4\] .shstrtab         STRTAB          00000000 [0-9a-f]+ 00001c 00   .  0   0  1
+  \[ 1\] .text             PROGBITS        00000000 0000.. 00001b 00  AX  0   0 16
+  \[ 2\] .data             PROGBITS        00000000 0000.. 000000 00  WA  0   0  1
+  \[ 3\] .bss              NOBITS          00000000 0000.. 000000 00  WA  0   0  1
+  \[ 4\] .shstrtab         STRTAB          00000000 0000.. 00001c 00  ..  0   0  1
 Key to Flags:
 #...
diff --git a/binutils/testsuite/binutils-all/i386/compressed-1c.d b/binutils/testsuite/binutils-all/i386/compressed-1c.d
index 1e1a18e..f65e8cf 100644
--- a/binutils/testsuite/binutils-all/i386/compressed-1c.d
+++ b/binutils/testsuite/binutils-all/i386/compressed-1c.d
@@ -10,9 +10,9 @@ There are 5 section headers, starting at offset 0x[0-9a-f]+:
 Section Headers:
   \[Nr\] Name              Type            Addr     Off    Size   ES Flg Lk Inf Al
   \[ 0\]                   NULL            00000000 000000 000000 00      0   0  0
-  \[ 1\] .text             PROGBITS        00000000 000040 00001b 00  AX  0   0 16
-  \[ 2\] .data             PROGBITS        00000000 00005b 000000 00  WA  0   0  1
-  \[ 3\] .bss              NOBITS          00000000 00005b 000000 00  WA  0   0  1
-  \[ 4\] .shstrtab         STRTAB          00000000 [0-9a-f]+ 00001c 00 .* 0   0  1
+  \[ 1\] .text             PROGBITS        00000000 0000.. 00001b 00  AX  0   0 16
+  \[ 2\] .data             PROGBITS        00000000 0000.. 000000 00  WA  0   0  1
+  \[ 3\] .bss              NOBITS          00000000 0000.. 000000 00  WA  0   0  1
+  \[ 4\] .shstrtab         STRTAB          00000000 0000.. 00001c 00  ..  0   0  1
 Key to Flags:
 #...
diff --git a/binutils/testsuite/binutils-all/readelf.s b/binutils/testsuite/binutils-all/readelf.s
index ff37acb..5a1f320 100644
--- a/binutils/testsuite/binutils-all/readelf.s
+++ b/binutils/testsuite/binutils-all/readelf.s
@@ -10,7 +10,7 @@ Section Headers:
 # MIPS targets put .rela.text here.
 #...
  +\[ .\] .* +PROGBITS +00000000 0000(3c|40|44|48|50) 0000(04|10) 00 +WA +0 +0 +(.|..)
- +\[ .\] .* +NOBITS +00000000 0000(40|44|48|4c|60) 000000 00 +WA +0 +0 +(.|..)
+ +\[ .\] .* +NOBITS +00000000 0+[0-9a-f]+ 000000 00 +WA +0 +0 +(.|..)
 # ARM targets put .ARM.attributes here.
 # MIPS targets put .reginfo, .mdebug, .MIPS.abiflags and .gnu.attributes here.
 # v850 targets put .call_table_data and .call_table_text here.
diff --git a/binutils/testsuite/lib/binutils-common.exp b/binutils/testsuite/lib/binutils-common.exp
index 8d28407..403103d 100644
--- a/binutils/testsuite/lib/binutils-common.exp
+++ b/binutils/testsuite/lib/binutils-common.exp
@@ -275,27 +275,6 @@ proc is_generic { } {
     return 0
 }
 
-# Return true if target uses elf.em.
-proc uses_elf_em { } {
-    if { ![is_elf_format] || [is_generic] } {
-	return 0
-    }
-
-    # These targets don't use elf.em.
-    if { [istarget "fr30-*-*"]
-	 || [istarget "frv-*-elf"]
-	 || [istarget "ft32-*-*"]
-	 || [istarget "iq2000-*-*"]
-	 || [istarget "mn10200-*-*"]
-	 || [istarget "moxie-*-moxiebox*"]
-	 || [istarget "msp430-*-*"]
-	 || [istarget "mt-*-*"] } {
-	return 0
-    }
-
-    return 1
-}
-
 # True if the object format is ELF with unused section symbols.
 proc is_elf_unused_section_symbols {} {
     global AS ASFLAGS READELF
diff --git a/configure b/configure
index 7823f2c..93d286b 100755
--- a/configure
+++ b/configure
@@ -3146,6 +3146,8 @@ fi
 
 if test "$enable_gprofng" = "yes"; then
   case "${target}" in
+    *-musl*)
+      ;;
     x86_64-*-linux* | i?86-*-linux* | aarch64-*-linux* | riscv64-*-linux*)
     configdirs="$configdirs gprofng"
     ;;
diff --git a/configure.ac b/configure.ac
index a390639..6fd9e77 100644
--- a/configure.ac
+++ b/configure.ac
@@ -414,6 +414,8 @@ enable_gprofng=$enableval,
 enable_gprofng=yes)
 if test "$enable_gprofng" = "yes"; then
   case "${target}" in
+    *-musl*)
+      ;;
     x86_64-*-linux* | i?86-*-linux* | aarch64-*-linux* | riscv64-*-linux*)
     configdirs="$configdirs gprofng"
     ;;
diff --git a/gas/Makefile.am b/gas/Makefile.am
index b9b9e18..d025b75 100644
--- a/gas/Makefile.am
+++ b/gas/Makefile.am
@@ -362,9 +362,6 @@ TARG_ENV_CFILES = \
 MULTI_CFILES = \
 	config/e-crisaout.c \
 	config/e-criself.c \
-	config/e-i386aout.c \
-	config/e-i386coff.c \
-	config/e-i386elf.c \
 	config/e-mipself.c
 
 CONFIG_ATOF_CFILES = \
diff --git a/gas/Makefile.in b/gas/Makefile.in
index b575163..fde7aa7 100644
--- a/gas/Makefile.in
+++ b/gas/Makefile.in
@@ -861,9 +861,6 @@ TARG_ENV_CFILES = \
 MULTI_CFILES = \
 	config/e-crisaout.c \
 	config/e-criself.c \
-	config/e-i386aout.c \
-	config/e-i386coff.c \
-	config/e-i386elf.c \
 	config/e-mipself.c
 
 CONFIG_ATOF_CFILES = \
@@ -1284,12 +1281,6 @@ config/e-crisaout.$(OBJEXT): config/$(am__dirstamp) \
 	config/$(DEPDIR)/$(am__dirstamp)
 config/e-criself.$(OBJEXT): config/$(am__dirstamp) \
 	config/$(DEPDIR)/$(am__dirstamp)
-config/e-i386aout.$(OBJEXT): config/$(am__dirstamp) \
-	config/$(DEPDIR)/$(am__dirstamp)
-config/e-i386coff.$(OBJEXT): config/$(am__dirstamp) \
-	config/$(DEPDIR)/$(am__dirstamp)
-config/e-i386elf.$(OBJEXT): config/$(am__dirstamp) \
-	config/$(DEPDIR)/$(am__dirstamp)
 config/e-mipself.$(OBJEXT): config/$(am__dirstamp) \
 	config/$(DEPDIR)/$(am__dirstamp)
 config/m68k-parse.$(OBJEXT): config/$(am__dirstamp) \
@@ -1369,9 +1360,6 @@ distclean-compile:
 @AMDEP_TRUE@@am__include@ @am__quote@config/$(DEPDIR)/bfin-parse.Po@am__quote@
 @AMDEP_TRUE@@am__include@ @am__quote@config/$(DEPDIR)/e-crisaout.Po@am__quote@
 @AMDEP_TRUE@@am__include@ @am__quote@config/$(DEPDIR)/e-criself.Po@am__quote@
-@AMDEP_TRUE@@am__include@ @am__quote@config/$(DEPDIR)/e-i386aout.Po@am__quote@
-@AMDEP_TRUE@@am__include@ @am__quote@config/$(DEPDIR)/e-i386coff.Po@am__quote@
-@AMDEP_TRUE@@am__include@ @am__quote@config/$(DEPDIR)/e-i386elf.Po@am__quote@
 @AMDEP_TRUE@@am__include@ @am__quote@config/$(DEPDIR)/e-mipself.Po@am__quote@
 @AMDEP_TRUE@@am__include@ @am__quote@config/$(DEPDIR)/kvx-parse.Po@am__quote@
 @AMDEP_TRUE@@am__include@ @am__quote@config/$(DEPDIR)/loongarch-lex.Po@am__quote@
diff --git a/gas/NEWS b/gas/NEWS
index b9d742a..d643301 100644
--- a/gas/NEWS
+++ b/gas/NEWS
@@ -1,5 +1,10 @@
 -*- text -*-
 
+* On x86 emulation support (for secondary targets) was dropped.
+
+* Add support for RISC-V Zcmp (cm.mva01s, cm.mvsa01), Smrnmi and CORE-V
+  (xcvbitmanip, xcvsimd) extensions with version 1.0.
+
 Changes in 2.43:
 
 * Add support for LoongArch .option for fine-grained control of assembly
@@ -46,6 +51,8 @@ Changes in 2.43:
 
 * Add support for RISC-V Zcmp extension with version 1.0.
 
+* Add support for RISC-V Zimop and Zcmop extensions with version 1.0.
+
 * Add support for RISC-V Zfbfmin extension with version 1.0.
 
 * Add support for RISC-V Zvfbfmin extension with version 1.0.
diff --git a/gas/app.c b/gas/app.c
index fa87785..8dc69ff 100644
--- a/gas/app.c
+++ b/gas/app.c
@@ -45,6 +45,8 @@ static int scrub_m68k_mri;
 /* The pseudo-op which switches in and out of MRI mode.  See the
    comment in do_scrub_chars.  */
 static const char mri_pseudo[] = ".mri 0";
+static const char *mri_state;
+static char mri_last_ch;
 #else
 #define scrub_m68k_mri 0
 #endif
@@ -56,6 +58,15 @@ static const char   symver_pseudo[] = ".symver";
 static const char * symver_state;
 #endif
 
+/* The pseudo-op (without leading dot) at which we want to (perhaps just
+   temporarily) stop processing.  See the comments in do_scrub_chars().  */
+static const char   end_pseudo[] = "end ";
+static const char * end_state;
+
+/* Whether, considering the state at start of assembly, NO_PSEUDO_DOT is
+   active.  */
+static bool no_pseudo_dot;
+
 static char last_char;
 
 #define LEX_IS_SYMBOL_COMPONENT		1
@@ -71,9 +82,6 @@ static char last_char;
 #ifdef TC_V850
 #define LEX_IS_DOUBLEDASH_1ST		12
 #endif
-#ifdef TC_M32R
-#define DOUBLEBAR_PARALLEL
-#endif
 #ifdef DOUBLEBAR_PARALLEL
 #define LEX_IS_DOUBLEBAR_1ST		13
 #endif
@@ -93,7 +101,11 @@ static char last_char;
 static char lex[256] = {
   [' ']  = LEX_IS_WHITESPACE,
   ['\t'] = LEX_IS_WHITESPACE,
+#ifdef CR_EOL
+  ['\r'] = LEX_IS_LINE_SEPARATOR,
+#else
   ['\r'] = LEX_IS_WHITESPACE,
+#endif
   ['\n'] = LEX_IS_NEWLINE,
   [':'] = LEX_IS_COLON,
   ['$'] = LEX_IS_SYMBOL_COMPONENT,
@@ -158,6 +170,12 @@ do_scrub_begin (int m68k_mri ATTRIBUTE_UNUSED)
 {
   const char *p;
 
+  /* Latch this once at start.  xtensa uses a hook function, yet context isn't
+     meaningful for scrubbing (or else we'd need to sync scrubber behavior as
+     state changes).  */
+  if (lex['/'] == 0)
+    no_pseudo_dot = NO_PSEUDO_DOT;
+
 #ifdef TC_M68K
   scrub_m68k_mri = m68k_mri;
 
@@ -264,8 +282,6 @@ static int add_newlines;
 static char *saved_input;
 static size_t saved_input_len;
 static char input_buffer[32 * 1024];
-static const char *mri_state;
-static char mri_last_ch;
 
 /* Data structure for saving the state of app across #include's.  Note that
    app is called asynchronously to the parsing of the .include's, so our
@@ -281,11 +297,12 @@ struct app_save
   int          add_newlines;
   char *       saved_input;
   size_t       saved_input_len;
+  const char * end_state;
 #ifdef TC_M68K
   int          scrub_m68k_mri;
-#endif
   const char * mri_state;
   char         mri_last_ch;
+#endif
 #if defined TC_ARM && defined OBJ_ELF
   const char * symver_state;
 #endif
@@ -311,11 +328,12 @@ app_push (void)
       memcpy (saved->saved_input, saved_input, saved_input_len);
       saved->saved_input_len = saved_input_len;
     }
+  saved->end_state = end_state;
 #ifdef TC_M68K
   saved->scrub_m68k_mri = scrub_m68k_mri;
-#endif
   saved->mri_state = mri_state;
   saved->mri_last_ch = mri_last_ch;
+#endif
 #if defined TC_ARM && defined OBJ_ELF
   saved->symver_state = symver_state;
 #endif
@@ -351,11 +369,12 @@ app_pop (char *arg)
       saved_input_len = saved->saved_input_len;
       free (saved->saved_input);
     }
+  end_state = saved->end_state;
 #ifdef TC_M68K
   scrub_m68k_mri = saved->scrub_m68k_mri;
-#endif
   mri_state = saved->mri_state;
   mri_last_ch = saved->mri_last_ch;
+#endif
 #if defined TC_ARM && defined OBJ_ELF
   symver_state = saved->symver_state;
 #endif
@@ -799,12 +818,51 @@ do_scrub_chars (size_t (*get) (char *, size_t), char *tostart, size_t tolen,
 
     recycle:
 
+      /* We need to watch out for .end directives: We should in particular not
+	 issue diagnostics for anything after an active one.  */
+      if (end_state == NULL)
+	{
+	  if ((state == 0 || state == 1)
+	      && (ch == '.'
+		  || (no_pseudo_dot && ch == end_pseudo[0])))
+	    end_state = end_pseudo + (ch != '.');
+	}
+      else if (ch != '\0'
+	       && (*end_state == ch
+		   /* Avoid triggering on directives like .endif or .endr.  */
+		   || (*end_state == ' ' && !IS_SYMBOL_COMPONENT (ch))))
+	{
+ 	  if (IS_NEWLINE (ch) || IS_LINE_SEPARATOR (ch))
+ 	    goto end_end;
+	  ++end_state;
+	}
+      else if (*end_state != '\0')
+	/* We did not get the expected character, or we didn't
+	   get a valid terminating character after seeing the
+	   entire pseudo-op, so we must go back to the beginning.  */
+	end_state = NULL;
+      else if (IS_NEWLINE (ch) || IS_LINE_SEPARATOR (ch))
+	{
+	end_end:
+	  /* We've read the entire pseudo-op.  If this is the end of the line,
+	     bail out now by (ab)using the output-full path.  This allows the
+	     caller to process input up to here and terminate processing if this
+	     directive is actually active (not on the false branch of a
+	     conditional and not in a macro definition).  */
+	  end_state = NULL;
+	  state = 0;
+	  PUT (ch);
+	  goto tofull;
+	}
+
 #if defined TC_ARM && defined OBJ_ELF
       /* We need to watch out for .symver directives.  See the comment later
 	 in this function.  */
       if (symver_state == NULL)
 	{
-	  if ((state == 0 || state == 1) && ch == symver_pseudo[0])
+	  if ((state == 0 || state == 1)
+	      && strchr (tc_comment_chars, '@') != NULL
+	      && ch == symver_pseudo[0])
 	    symver_state = symver_pseudo + 1;
 	}
       else
@@ -822,7 +880,7 @@ do_scrub_chars (size_t (*get) (char *, size_t), char *tostart, size_t tolen,
 	    {
 	      /* We've read the entire pseudo-op.  If this is the end
 		 of the line, go back to the beginning.  */
-	      if (IS_NEWLINE (ch))
+	      if (IS_NEWLINE (ch) || IS_LINE_SEPARATOR (ch))
 		symver_state = NULL;
 	    }
 	}
@@ -857,7 +915,9 @@ do_scrub_chars (size_t (*get) (char *, size_t), char *tostart, size_t tolen,
 	      ++mri_state;
 	    }
 	  else if (*mri_state != '\0'
-		   || (!IS_WHITESPACE (ch) && !IS_NEWLINE (ch)))
+		   || (!IS_WHITESPACE (ch)
+		       && !IS_LINE_SEPARATOR (ch)
+		       && !IS_NEWLINE (ch)))
 	    {
 	      /* We did not get the expected character, or we didn't
 		 get a valid terminating character after seeing the
@@ -1108,6 +1168,8 @@ do_scrub_chars (size_t (*get) (char *, size_t), char *tostart, size_t tolen,
 	    }
 	  else if (state == 3)
 	    old_state = 9;
+	  else if (state == 0)
+	    old_state = 11; /* Now seeing label definition.  */
 	  else
 	    old_state = state;
 	  state = 5;
@@ -1427,11 +1489,13 @@ do_scrub_chars (size_t (*get) (char *, size_t), char *tostart, size_t tolen,
 	  /* This is a common case.  Quickly copy CH and all the
 	     following symbol component or normal characters.  */
 	  if (to + 1 < toend
+#ifdef TC_M68K
 	      && mri_state == NULL
+#endif
 #if defined TC_ARM && defined OBJ_ELF
 	      && symver_state == NULL
 #endif
-	      )
+	      && end_state == NULL)
 	    {
 	      char *s;
 	      ptrdiff_t len;
diff --git a/gas/as.c b/gas/as.c
index 259dc0e..030da2e 100644
--- a/gas/as.c
+++ b/gas/as.c
@@ -130,10 +130,6 @@ static long start_time;
 #ifdef USE_EMULATIONS
 #define EMULATION_ENVIRON "AS_EMULATION"
 
-extern struct emulation mipsbelf, mipslelf, mipself;
-extern struct emulation i386coff, i386elf, i386aout;
-extern struct emulation crisaout, criself;
-
 static struct emulation *const emulations[] = { EMULATIONS };
 static const int n_emulations = sizeof (emulations) / sizeof (emulations[0]);
 
@@ -182,13 +178,6 @@ select_emulation_mode (int argc, char **argv)
   this_emulation->init ();
 }
 
-const char *
-default_emul_bfd_name (void)
-{
-  abort ();
-  return NULL;
-}
-
 void
 common_emul_init (void)
 {
@@ -457,13 +446,8 @@ parse_args (int * pargc, char *** pargv)
     /* -K is not meaningful if .word is not being hacked.  */
     'K',
 #endif
-    'L', 'M', 'R', 'W', 'Z', 'a', ':', ':', 'D', 'f', 'g', ':',':', 'I', ':', 'o', ':',
-#ifndef VMS
-    /* -v takes an argument on VMS, so we don't make it a generic
-       option.  */
-    'v',
-#endif
-    'w', 'X',
+    'L', 'M', 'R', 'W', 'Z', 'a', ':', ':', 'D', 'f', 'g', ':',':', 'I', ':',
+    'o', ':', 'v', 'w', 'X',
 #ifdef HAVE_ITBL_CPU
     /* New option for extending instruction set (see also --itbl below).  */
     't', ':',
@@ -481,7 +465,6 @@ parse_args (int * pargc, char *** pargv)
       OPTION_STATISTICS,
       OPTION_VERSION,
       OPTION_DUMPCONFIG,
-      OPTION_VERBOSE,
       OPTION_EMULATION,
       OPTION_DEBUG_PREFIX_MAP,
       OPTION_DEFSYM,
@@ -600,7 +583,7 @@ parse_args (int * pargc, char *** pargv)
     ,{"statistics", no_argument, NULL, OPTION_STATISTICS}
     ,{"strip-local-absolute", no_argument, NULL, OPTION_STRIP_LOCAL_ABSOLUTE}
     ,{"version", no_argument, NULL, OPTION_VERSION}
-    ,{"verbose", no_argument, NULL, OPTION_VERBOSE}
+    ,{"verbose", no_argument, NULL, 'v'}
     ,{"target-help", no_argument, NULL, OPTION_TARGET_HELP}
     ,{"traditional-format", no_argument, NULL, OPTION_TRADITIONAL_FORMAT}
     ,{"warn", no_argument, NULL, OPTION_WARN}
@@ -650,24 +633,17 @@ parse_args (int * pargc, char *** pargv)
 	     it explicitly here before deciding we've gotten a bad argument.  */
 	  if (optc == 'v')
 	    {
-#ifdef VMS
-	      /* Telling getopt to treat -v's value as optional can result
-		 in it picking up a following filename argument here.  The
-		 VMS code in md_parse_option can return 0 in that case,
-		 but it has no way of pushing the filename argument back.  */
-	      if (optarg && *optarg)
-		new_argv[new_argc++] = optarg, new_argv[new_argc] = NULL;
-	      else
-#else
-	      case 'v':
-#endif
-	      case OPTION_VERBOSE:
-		print_version_id ();
-		verbose = 1;
+	case 'v':
+	      print_version_id ();
+	      verbose = 1;
 	      break;
 	    }
+	  else if (is_a_char (optc))
+	    as_bad (_("unrecognized option `-%c%s'"), optc, optarg ? optarg : "");
+	  else if (optarg)
+	    as_bad (_("unrecognized option `--%s=%s'"), longopts[longind].name, optarg);
 	  else
-	    as_bad (_("unrecognized option -%c%s"), optc, optarg ? optarg : "");
+	    as_bad (_("unrecognized option `--%s'"), longopts[longind].name);
 	  /* Fall through.  */
 
 	case '?':
diff --git a/gas/config.in b/gas/config.in
index a1f8349..c32b46b 100644
--- a/gas/config.in
+++ b/gas/config.in
@@ -60,6 +60,9 @@
 /* Define default value for RISC-V -mpriv-spec */
 #undef DEFAULT_RISCV_PRIV_SPEC
 
+/* Define to 1 if you want to check x86 TLS relocation by default. */
+#undef DEFAULT_X86_TLS_CHECK
+
 /* Define to 1 if you want to generate GNU x86 used ISA and feature properties
    by default. */
 #undef DEFAULT_X86_USED_NOTE
diff --git a/gas/config/e-crisaout.c b/gas/config/e-crisaout.c
index 4bd97ae..be2d1b0 100644
--- a/gas/config/e-crisaout.c
+++ b/gas/config/e-crisaout.c
@@ -20,16 +20,6 @@
 #include "as.h"
 #include "emul.h"
 
-static const char *crisaout_bfd_name (void);
-
-static const char *
-crisaout_bfd_name (void)
-{
-  abort ();
-  return NULL;
-}
-
-#define emul_bfd_name	crisaout_bfd_name
 #define emul_format	&aout_format_ops
 
 #define emul_name	"crisaout"
diff --git a/gas/config/e-criself.c b/gas/config/e-criself.c
index 6998bee..713d851 100644
--- a/gas/config/e-criself.c
+++ b/gas/config/e-criself.c
@@ -20,16 +20,6 @@
 #include "as.h"
 #include "emul.h"
 
-static const char *criself_bfd_name (void);
-
-static const char *
-criself_bfd_name (void)
-{
-  abort ();
-  return NULL;
-}
-
-#define emul_bfd_name	criself_bfd_name
 #define emul_format	&elf_format_ops
 
 #define emul_name	"criself"
diff --git a/gas/config/e-i386aout.c b/gas/config/e-i386aout.c
deleted file mode 100644
index 723a5ac..0000000
--- a/gas/config/e-i386aout.c
+++ /dev/null
@@ -1,38 +0,0 @@
-/* Copyright (C) 2007-2024 Free Software Foundation, Inc.
-
-   This file is part of GAS, the GNU Assembler.
-
-   GAS is free software; you can redistribute it and/or modify
-   it under the terms of the GNU General Public License as published by
-   the Free Software Foundation; either version 3, or (at your option)
-   any later version.
-
-   GAS is distributed in the hope that it will be useful,
-   but WITHOUT ANY WARRANTY; without even the implied warranty of
-   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-   GNU General Public License for more details.
-
-   You should have received a copy of the GNU General Public License
-   along with GAS; see the file COPYING.  If not, write to the Free
-   Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
-   02110-1301, USA.  */
-
-#include "as.h"
-#include "emul.h"
-
-static const char *i386aout_bfd_name (void);
-
-static const char *
-i386aout_bfd_name (void)
-{
-  abort ();
-  return NULL;
-}
-
-#define emul_bfd_name	i386aout_bfd_name
-#define emul_format	&aout_format_ops
-
-#define emul_name	"i386aout"
-#define emul_struct_name i386aout
-#define emul_default_endian 0
-#include "emul-target.h"
diff --git a/gas/config/e-i386coff.c b/gas/config/e-i386coff.c
deleted file mode 100644
index 62e8631..0000000
--- a/gas/config/e-i386coff.c
+++ /dev/null
@@ -1,38 +0,0 @@
-/* Copyright (C) 2007-2024 Free Software Foundation, Inc.
-
-   This file is part of GAS, the GNU Assembler.
-
-   GAS is free software; you can redistribute it and/or modify
-   it under the terms of the GNU General Public License as published by
-   the Free Software Foundation; either version 3, or (at your option)
-   any later version.
-
-   GAS is distributed in the hope that it will be useful,
-   but WITHOUT ANY WARRANTY; without even the implied warranty of
-   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-   GNU General Public License for more details.
-
-   You should have received a copy of the GNU General Public License
-   along with GAS; see the file COPYING.  If not, write to the Free
-   Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
-   02110-1301, USA.  */
-
-#include "as.h"
-#include "emul.h"
-
-static const char *i386coff_bfd_name (void);
-
-static const char *
-i386coff_bfd_name (void)
-{
-  abort ();
-  return NULL;
-}
-
-#define emul_bfd_name	i386coff_bfd_name
-#define emul_format	&coff_format_ops
-
-#define emul_name	"i386coff"
-#define emul_struct_name i386coff
-#define emul_default_endian 0
-#include "emul-target.h"
diff --git a/gas/config/e-i386elf.c b/gas/config/e-i386elf.c
deleted file mode 100644
index 99850e3..0000000
--- a/gas/config/e-i386elf.c
+++ /dev/null
@@ -1,38 +0,0 @@
-/* Copyright (C) 2007-2024 Free Software Foundation, Inc.
-
-   This file is part of GAS, the GNU Assembler.
-
-   GAS is free software; you can redistribute it and/or modify
-   it under the terms of the GNU General Public License as published by
-   the Free Software Foundation; either version 3, or (at your option)
-   any later version.
-
-   GAS is distributed in the hope that it will be useful,
-   but WITHOUT ANY WARRANTY; without even the implied warranty of
-   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-   GNU General Public License for more details.
-
-   You should have received a copy of the GNU General Public License
-   along with GAS; see the file COPYING.  If not, write to the Free
-   Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
-   02110-1301, USA.  */
-
-#include "as.h"
-#include "emul.h"
-
-static const char *i386elf_bfd_name (void);
-
-static const char *
-i386elf_bfd_name (void)
-{
-  abort ();
-  return NULL;
-}
-
-#define emul_bfd_name	i386elf_bfd_name
-#define emul_format	&elf_format_ops
-
-#define emul_name	"i386elf"
-#define emul_struct_name i386elf
-#define emul_default_endian 0
-#include "emul-target.h"
diff --git a/gas/config/e-mipself.c b/gas/config/e-mipself.c
index 42c9e7c..ed38444 100644
--- a/gas/config/e-mipself.c
+++ b/gas/config/e-mipself.c
@@ -20,16 +20,6 @@
 #include "as.h"
 #include "emul.h"
 
-static const char *mipself_bfd_name (void);
-
-static const char *
-mipself_bfd_name (void)
-{
-  abort ();
-  return NULL;
-}
-
-#define emul_bfd_name	mipself_bfd_name
 #define emul_format	&elf_format_ops
 
 #define emul_name	"mipsbelf"
diff --git a/gas/config/loongarch-parse.y b/gas/config/loongarch-parse.y
index 63a4fcf..0607248 100644
--- a/gas/config/loongarch-parse.y
+++ b/gas/config/loongarch-parse.y
@@ -368,24 +368,24 @@ multiplicative_expression
 	| multiplicative_expression '%' unary_expression {emit_bin ('%');}
 	;
 
-additive_expression
+shift_expression
 	: multiplicative_expression
-	| additive_expression '+' multiplicative_expression {emit_bin ('+');}
-	| additive_expression '-' multiplicative_expression {emit_bin ('-');}
+	| shift_expression LEFT_OP multiplicative_expression {emit_bin (LEFT_OP);}
+	| shift_expression RIGHT_OP multiplicative_expression {emit_bin (RIGHT_OP);}
 	;
 
-shift_expression
-	: additive_expression
-	| shift_expression LEFT_OP additive_expression {emit_bin (LEFT_OP);}
-	| shift_expression RIGHT_OP additive_expression {emit_bin (RIGHT_OP);}
+additive_expression
+	: shift_expression
+	| additive_expression '+' shift_expression {emit_bin ('+');}
+	| additive_expression '-' shift_expression {emit_bin ('-');}
 	;
 
 relational_expression
-	: shift_expression
-	| relational_expression '<' shift_expression {emit_bin ('<');}
-	| relational_expression '>' shift_expression {emit_bin ('>');}
-	| relational_expression LE_OP shift_expression {emit_bin (LE_OP);}
-	| relational_expression GE_OP shift_expression {emit_bin (GE_OP);}
+	: additive_expression
+	| relational_expression '<' additive_expression {emit_bin ('<');}
+	| relational_expression '>' additive_expression {emit_bin ('>');}
+	| relational_expression LE_OP additive_expression {emit_bin (LE_OP);}
+	| relational_expression GE_OP additive_expression {emit_bin (GE_OP);}
 	;
 
 equality_expression
diff --git a/gas/config/obj-aout.c b/gas/config/obj-aout.c
index 318520c..5237400 100644
--- a/gas/config/obj-aout.c
+++ b/gas/config/obj-aout.c
@@ -221,14 +221,16 @@ obj_aout_type (int ignore ATTRIBUTE_UNUSED)
   s_ignore (0);
 }
 
-/* Support for an AOUT emulation.  */
+static const pseudo_typeS aout_pseudo_table[];
 
-static void
+void
 aout_pop_insert (void)
 {
   pop_insert (aout_pseudo_table);
 }
 
+#ifdef USE_EMULATIONS /* Support for an AOUT emulation.  */
+
 static int
 obj_aout_s_get_other (symbolS *sym)
 {
@@ -298,6 +300,7 @@ const struct format_ops aout_format_ops =
   0,	/* begin.  */
   0,	/* end.  */
   0,	/* app_file.  */
+  NULL, /* assign_symbol */
   obj_aout_frob_symbol,
   0,	/* frob_file.  */
   0,	/* frob_file_before_adjust.  */
@@ -314,7 +317,6 @@ const struct format_ops aout_format_ops =
   obj_aout_s_get_type,
   obj_aout_s_set_type,
   0,	/* copy_symbol_attributes.  */
-  0,	/* generate_asm_lineno.  */
   obj_aout_process_stab,
   obj_aout_separate_stab_sections,
   0,	/* init_stab_section.  */
@@ -327,7 +329,9 @@ const struct format_ops aout_format_ops =
   0	/* adjust_symtab.  */
 };
 
-const pseudo_typeS aout_pseudo_table[] =
+#endif /* USE_EMULATIONS */
+
+static const pseudo_typeS aout_pseudo_table[] =
 {
   {"line", obj_aout_line, 0},	/* Source code line number.  */
   {"ln", obj_aout_line, 0},	/* COFF line number that we use anyway.  */
diff --git a/gas/config/obj-aout.h b/gas/config/obj-aout.h
index 9f5e7dd..dd25d14 100644
--- a/gas/config/obj-aout.h
+++ b/gas/config/obj-aout.h
@@ -27,10 +27,9 @@
 
 #define OUTPUT_FLAVOR bfd_target_aout_flavour
 
-extern const pseudo_typeS aout_pseudo_table[];
-
+extern void aout_pop_insert (void);
 #ifndef obj_pop_insert
-#define obj_pop_insert() pop_insert (aout_pseudo_table)
+#define obj_pop_insert() aout_pop_insert ()
 #endif
 
 /* Symbol table entry data type.  */
diff --git a/gas/config/obj-coff.c b/gas/config/obj-coff.c
index 13dc4ff..845fcc8 100644
--- a/gas/config/obj-coff.c
+++ b/gas/config/obj-coff.c
@@ -1177,6 +1177,15 @@ coff_obj_read_begin_hook (void)
   tag_init ();
 }
 
+void
+coff_assign_symbol (symbolS *symp ATTRIBUTE_UNUSED)
+{
+#ifndef TE_PE
+  /* "set" symbols are local unless otherwise specified.  */
+  SF_SET_LOCAL (symp);
+#endif
+}
+
 symbolS *coff_last_function;
 #ifndef OBJ_XCOFF
 static symbolS *coff_last_bf;
@@ -1847,7 +1856,7 @@ symbol_dump (void)
 
 #endif /* DEBUG */
 
-const pseudo_typeS coff_pseudo_table[] =
+static const pseudo_typeS coff_pseudo_table[] =
 {
   {"ABORT", s_abort, 0},
   /* We accept the .bss directive for backward compatibility with
@@ -1888,14 +1897,14 @@ const pseudo_typeS coff_pseudo_table[] =
 };
 
 
-/* Support for a COFF emulation.  */
-
-static void
+void
 coff_pop_insert (void)
 {
   pop_insert (coff_pseudo_table);
 }
 
+#ifdef USE_EMULATIONS /* Support for a COFF emulation.  */
+
 static int
 coff_separate_stab_sections (void)
 {
@@ -1910,6 +1919,7 @@ const struct format_ops coff_format_ops =
   0,    /* begin */
   0,	/* end.  */
   c_dot_file_symbol,
+  coff_assign_symbol,
   coff_frob_symbol,
   0,	/* frob_file */
   0,	/* frob_file_before_adjust */
@@ -1926,7 +1936,6 @@ const struct format_ops coff_format_ops =
   0,	/* s_get_type */
   0,	/* s_set_type */
   0,	/* copy_symbol_attributes */
-  0,	/* generate_asm_lineno */
   0,	/* process_stab */
   coff_separate_stab_sections,
   obj_coff_init_stab_section,
@@ -1938,3 +1947,5 @@ const struct format_ops coff_format_ops =
   coff_obj_symbol_clone_hook,
   coff_adjust_symtab
 };
+
+#endif /* USE_EMULATIONS */
diff --git a/gas/config/obj-coff.h b/gas/config/obj-coff.h
index 9b8e492..23f54ff 100644
--- a/gas/config/obj-coff.h
+++ b/gas/config/obj-coff.h
@@ -49,12 +49,7 @@
 #endif
 
 #ifdef TC_I386
-#ifdef TE_PEP
-#include "coff/x86_64.h"
-#else
-#include "coff/i386.h"
-#endif
-
+#include "coff/x86.h"
 #ifndef TARGET_FORMAT
 #ifdef TE_PEP
 #define TARGET_FORMAT "coff-x86-64"
@@ -251,6 +246,7 @@ extern symbolS *coff_last_function;
 
 #define obj_emit_lineno(WHERE, LINE, FILE_START)	abort ()
 #define obj_app_file(name)           c_dot_file_symbol (name)
+#define obj_assign_symbol(S)         coff_assign_symbol (S)
 #define obj_frob_symbol(S,P) 	     coff_frob_symbol (S, & P)
 #define obj_frob_section(S)	     coff_frob_section (S)
 #define obj_frob_file_after_relocs() coff_frob_file_after_relocs ()
@@ -274,12 +270,9 @@ extern symbolS *coff_last_function;
 #endif
 #endif
 
-/* Sanity check.  */
-
-extern const pseudo_typeS coff_pseudo_table[];
-
+extern void coff_pop_insert (void);
 #ifndef obj_pop_insert
-#define obj_pop_insert() pop_insert (coff_pseudo_table)
+#define obj_pop_insert() coff_pop_insert ()
 #endif
 
 /* In COFF, if a symbol is defined using .def/.val SYM/.endef, it's OK
@@ -322,6 +315,7 @@ extern int  S_GET_STORAGE_CLASS          (symbolS *);
 extern void SA_SET_SYM_ENDNDX            (symbolS *, symbolS *);
 extern void coff_add_linesym             (symbolS *);
 extern void c_dot_file_symbol            (const char *);
+extern void coff_assign_symbol           (symbolS *);
 extern void coff_frob_symbol             (symbolS *, int *);
 extern void coff_adjust_symtab           (void);
 extern void coff_frob_section            (segT);
diff --git a/gas/config/obj-ecoff.c b/gas/config/obj-ecoff.c
index 11f42a4..c79d57d 100644
--- a/gas/config/obj-ecoff.c
+++ b/gas/config/obj-ecoff.c
@@ -195,30 +195,6 @@ obj_ecoff_set_ext (symbolS *sym, EXTR *ext)
   (*debug_swap->swap_ext_out) (stdoutput, ext, esym->native);
 }
 
-static int
-ecoff_sec_sym_ok_for_reloc (asection *sec ATTRIBUTE_UNUSED)
-{
-  return 1;
-}
-
-static void
-obj_ecoff_frob_symbol (symbolS *sym, int *puntp ATTRIBUTE_UNUSED)
-{
-  ecoff_frob_symbol (sym);
-}
-
-static void
-ecoff_pop_insert (void)
-{
-  pop_insert (obj_pseudo_table);
-}
-
-static int
-ecoff_separate_stab_sections (void)
-{
-  return 0;
-}
-
 /* These are the pseudo-ops we support in this file.  Only those
    relating to debugging information are supported here.
 
@@ -282,6 +258,32 @@ const pseudo_typeS obj_pseudo_table[] =
   { NULL,	s_ignore,		0 }
 };
 
+#ifdef USE_EMULATIONS
+
+static int
+ecoff_sec_sym_ok_for_reloc (asection *sec ATTRIBUTE_UNUSED)
+{
+  return 1;
+}
+
+static void
+obj_ecoff_frob_symbol (symbolS *sym, int *puntp ATTRIBUTE_UNUSED)
+{
+  ecoff_frob_symbol (sym);
+}
+
+static void
+ecoff_pop_insert (void)
+{
+  pop_insert (obj_pseudo_table);
+}
+
+static int
+ecoff_separate_stab_sections (void)
+{
+  return 0;
+}
+
 const struct format_ops ecoff_format_ops =
 {
   bfd_target_ecoff_flavour,
@@ -293,6 +295,7 @@ const struct format_ops ecoff_format_ops =
   0,	/* begin.  */
   0,	/* end.  */
   ecoff_new_file,
+  NULL, /* assign_symbol */
   obj_ecoff_frob_symbol,
   ecoff_frob_file,
   0,	/* frob_file_before_adjust.  */
@@ -309,7 +312,6 @@ const struct format_ops ecoff_format_ops =
   0,	/* s_get_type.  */
   0,	/* s_set_type.  */
   0,	/* copy_symbol_attributes.  */
-  ecoff_generate_asm_lineno,
   ecoff_stab,
   ecoff_separate_stab_sections,
   0,	/* init_stab_section.  */
@@ -321,3 +323,5 @@ const struct format_ops ecoff_format_ops =
   ecoff_symbol_clone_hook,
   0	/* adjust_symtab.  */
 };
+
+#endif /* USE_EMULATIONS */
diff --git a/gas/config/obj-elf.c b/gas/config/obj-elf.c
index e28ba0a..b9aaca9 100644
--- a/gas/config/obj-elf.c
+++ b/gas/config/obj-elf.c
@@ -199,48 +199,6 @@ elf_pop_insert (void)
     pop_insert (ecoff_debug_pseudo_table);
 }
 
-static bfd_vma
-elf_s_get_size (symbolS *sym)
-{
-  return S_GET_SIZE (sym);
-}
-
-static void
-elf_s_set_size (symbolS *sym, bfd_vma sz)
-{
-  S_SET_SIZE (sym, sz);
-}
-
-static bfd_vma
-elf_s_get_align (symbolS *sym)
-{
-  return S_GET_ALIGN (sym);
-}
-
-static void
-elf_s_set_align (symbolS *sym, bfd_vma align)
-{
-  S_SET_ALIGN (sym, align);
-}
-
-int
-elf_s_get_other (symbolS *sym)
-{
-  return elf_symbol (symbol_get_bfdsym (sym))->internal_elf_sym.st_other;
-}
-
-static void
-elf_s_set_other (symbolS *sym, int other)
-{
-  S_SET_OTHER (sym, other);
-}
-
-static int
-elf_sec_sym_ok_for_reloc (asection *sec)
-{
-  return obj_sec_sym_ok_for_reloc (sec);
-}
-
 void
 elf_file_symbol (const char *s)
 {
@@ -3190,47 +3148,6 @@ elf_frob_file_after_relocs (void)
 #endif /* NEED_ECOFF_DEBUG */
 }
 
-static void
-elf_generate_asm_lineno (void)
-{
-#ifdef NEED_ECOFF_DEBUG
-  if (ECOFF_DEBUGGING)
-    ecoff_generate_asm_lineno ();
-#endif
-}
-
-static void
-elf_process_stab (int what ATTRIBUTE_UNUSED,
-		  const char *string ATTRIBUTE_UNUSED,
-		  int type ATTRIBUTE_UNUSED,
-		  int other ATTRIBUTE_UNUSED,
-		  int desc ATTRIBUTE_UNUSED)
-{
-#ifdef NEED_ECOFF_DEBUG
-  if (ECOFF_DEBUGGING)
-    ecoff_stab (what, string, type, other, desc);
-#endif
-}
-
-static int
-elf_separate_stab_sections (void)
-{
-#ifdef NEED_ECOFF_DEBUG
-  return (!ECOFF_DEBUGGING);
-#else
-  return 1;
-#endif
-}
-
-static void
-elf_init_stab_section (segT stab, segT stabstr)
-{
-#ifdef NEED_ECOFF_DEBUG
-  if (!ECOFF_DEBUGGING)
-#endif
-    obj_elf_init_stab_section (stab, stabstr);
-}
-
 /* This is called when the assembler starts.  */
 
 void
@@ -3274,6 +3191,84 @@ elf_end (void)
     }
 }
 
+#ifdef USE_EMULATIONS
+
+static bfd_vma
+elf_s_get_size (symbolS *sym)
+{
+  return S_GET_SIZE (sym);
+}
+
+static void
+elf_s_set_size (symbolS *sym, bfd_vma sz)
+{
+  S_SET_SIZE (sym, sz);
+}
+
+static bfd_vma
+elf_s_get_align (symbolS *sym)
+{
+  return S_GET_ALIGN (sym);
+}
+
+static void
+elf_s_set_align (symbolS *sym, bfd_vma align)
+{
+  S_SET_ALIGN (sym, align);
+}
+
+int
+elf_s_get_other (symbolS *sym)
+{
+  return elf_symbol (symbol_get_bfdsym (sym))->internal_elf_sym.st_other;
+}
+
+static void
+elf_s_set_other (symbolS *sym, int other)
+{
+  S_SET_OTHER (sym, other);
+}
+
+static int
+elf_sec_sym_ok_for_reloc (asection *sec)
+{
+  return obj_sec_sym_ok_for_reloc (sec);
+}
+
+#ifdef NEED_ECOFF_DEBUG
+static void
+elf_process_stab (int what ATTRIBUTE_UNUSED,
+		  const char *string ATTRIBUTE_UNUSED,
+		  int type ATTRIBUTE_UNUSED,
+		  int other ATTRIBUTE_UNUSED,
+		  int desc ATTRIBUTE_UNUSED)
+{
+  if (ECOFF_DEBUGGING)
+    ecoff_stab (what, string, type, other, desc);
+}
+#else
+# define elf_process_stab NULL
+#endif
+
+static int
+elf_separate_stab_sections (void)
+{
+#ifdef NEED_ECOFF_DEBUG
+  return (!ECOFF_DEBUGGING);
+#else
+  return 1;
+#endif
+}
+
+#ifdef NEED_ECOFF_DEBUG
+static void
+elf_init_stab_section (segT stab, segT stabstr)
+{
+  if (!ECOFF_DEBUGGING)
+    obj_elf_init_stab_section (stab, stabstr);
+}
+#endif
+
 const struct format_ops elf_format_ops =
 {
   bfd_target_elf_flavour,
@@ -3282,6 +3277,7 @@ const struct format_ops elf_format_ops =
   elf_begin,
   elf_end,
   elf_file_symbol,
+  NULL, /* assign_symbol */
   elf_frob_symbol,
   elf_frob_file,
   elf_frob_file_before_adjust,
@@ -3296,10 +3292,13 @@ const struct format_ops elf_format_ops =
   0,	/* s_get_type */
   0,	/* s_set_type */
   elf_copy_symbol_attributes,
-  elf_generate_asm_lineno,
   elf_process_stab,
   elf_separate_stab_sections,
+#ifdef NEED_ECOFF_DEBUG
   elf_init_stab_section,
+#else
+  obj_elf_init_stab_section,
+#endif
   elf_sec_sym_ok_for_reloc,
   elf_pop_insert,
 #ifdef NEED_ECOFF_DEBUG
@@ -3312,3 +3311,5 @@ const struct format_ops elf_format_ops =
   elf_obj_symbol_clone_hook,
   elf_adjust_symtab
 };
+
+#endif /* USE_EMULATIONS */
diff --git a/gas/config/obj-elf.h b/gas/config/obj-elf.h
index 7b5d2fe..179711e 100644
--- a/gas/config/obj-elf.h
+++ b/gas/config/obj-elf.h
@@ -150,7 +150,8 @@ extern void elf_end (void);
 
 int elf_s_get_other (symbolS *);
 #ifndef S_GET_OTHER
-#define S_GET_OTHER(S)	(elf_s_get_other (S))
+#define S_GET_OTHER(S) \
+  (elf_symbol (symbol_get_bfdsym (S))->internal_elf_sym.st_other)
 #endif
 #ifndef S_SET_OTHER
 #define S_SET_OTHER(S,V) \
diff --git a/gas/config/obj-multi.h b/gas/config/obj-multi.h
index 6700fe5..4069ce6 100644
--- a/gas/config/obj-multi.h
+++ b/gas/config/obj-multi.h
@@ -46,6 +46,11 @@
 	 ? (*this_format->app_file) (NAME)		\
 	 : (void) 0)
 
+#define obj_assign_symbol(S)				\
+	(this_format->assign_symbol			\
+	 ? (*this_format->assign_symbol) (S)		\
+	 : (void) 0)
+
 #define obj_frob_symbol(S,P)				\
 	(*this_format->frob_symbol) (S, &(P))
 
diff --git a/gas/config/tc-bfin.h b/gas/config/tc-bfin.h
index 94b146e..5567c97 100644
--- a/gas/config/tc-bfin.h
+++ b/gas/config/tc-bfin.h
@@ -44,7 +44,7 @@ extern bool bfin_start_label (char *);
 #define md_convert_frag(b,s,f)	as_fatal ("bfin convert_frag\n");
 
 /* Allow for [, ], etc.  */
-#define LEX_BR 6
+#define LEX_BR (LEX_BEGIN_NAME | LEX_END_NAME)
 
 #define TC_EOL_IN_INSN(PTR) (bfin_eol_in_insn(PTR) ? 1 : 0)
 extern bool bfin_eol_in_insn (char *);
diff --git a/gas/config/tc-dlx.h b/gas/config/tc-dlx.h
index c5e8545..4c52593 100644
--- a/gas/config/tc-dlx.h
+++ b/gas/config/tc-dlx.h
@@ -29,7 +29,7 @@
 
 #define WORKING_DOT_WORD
 
-#define LEX_DOLLAR 1
+#define LEX_DOLLAR LEX_NAME
 
 #include "bit_fix.h"
 
diff --git a/gas/config/tc-i386-ginsn.c b/gas/config/tc-i386-ginsn.c
index b9dc9c1..a4ebdf1 100644
--- a/gas/config/tc-i386-ginsn.c
+++ b/gas/config/tc-i386-ginsn.c
@@ -488,6 +488,8 @@ x86_ginsn_indirect_branch (const symbolS *insn_end_sym)
   else if (i.tm.extension_opcode == 2)
     /* 0xFF /2 (call r/m).  */
     ginsn_func = ginsn_new_call;
+  else
+    return ginsn;
 
   if (i.reg_operands)
     {
diff --git a/gas/config/tc-i386-intel.c b/gas/config/tc-i386-intel.c
index 0949e94..21675f6 100644
--- a/gas/config/tc-i386-intel.c
+++ b/gas/config/tc-i386-intel.c
@@ -1126,7 +1126,7 @@ i386_intel_operand (char *operand_string, int got_a_float)
 	  else
 	    i.types[this_operand].bitfield.disp16 = 1;
 
-#if defined (OBJ_AOUT) || defined (OBJ_MAYBE_AOUT)
+#ifdef OBJ_AOUT
 	  /*
 	   * exp_seg is used only for verification in
 	   * i386_finalize_displacement, and we can end up seeing reg_section
diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
index 87a1d0c..cdefde0 100644
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -193,7 +193,7 @@ static void output_disp (fragS *, offsetT);
 #ifdef OBJ_AOUT
 static void s_bss (int);
 #endif
-#if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
+#ifdef OBJ_ELF
 static void handle_large_common (int small ATTRIBUTE_UNUSED);
 
 /* GNU_PROPERTY_X86_ISA_1_USED.  */
@@ -274,6 +274,32 @@ enum i386_error
     internal_error,
   };
 
+#ifdef OBJ_ELF
+enum x86_tls_error_type
+{
+  x86_tls_error_continue,
+  x86_tls_error_none,
+  x86_tls_error_insn,
+  x86_tls_error_opcode,
+  x86_tls_error_sib,
+  x86_tls_error_no_base_reg,
+  x86_tls_error_require_no_base_index_reg,
+  x86_tls_error_base_reg,
+  x86_tls_error_index_ebx,
+  x86_tls_error_eax,
+  x86_tls_error_RegA,
+  x86_tls_error_ebx,
+  x86_tls_error_rip,
+  x86_tls_error_dest_eax,
+  x86_tls_error_dest_rdi,
+  x86_tls_error_scale_factor,
+  x86_tls_error_base_reg_size,
+  x86_tls_error_dest_32bit_reg_size,
+  x86_tls_error_dest_64bit_reg_size,
+  x86_tls_error_dest_32bit_or_64bit_reg_size
+};
+#endif
+
 struct _i386_insn
   {
     /* TM holds the template for the insn were currently assembling.  */
@@ -365,6 +391,9 @@ struct _i386_insn
     /* Has GOTPC or TLS relocation.  */
     bool has_gotpc_tls_reloc;
 
+    /* Has relocation entry from the gotrel array.  */
+    bool has_gotrel;
+
     /* RM and SIB are the modrm byte and the sib byte where the
        addressing modes of this insn are encoded.  */
     modrm_byte rm;
@@ -535,7 +564,7 @@ const char extra_symbol_chars[] = "*%-(["
 #endif
 	;
 
-#if ((defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF))	\
+#if (defined (OBJ_ELF)					\
      && !defined (TE_GNU)				\
      && !defined (TE_LINUX)				\
      && !defined (TE_Haiku)				\
@@ -624,7 +653,7 @@ static int use_rela_relocations = 0;
 /* __tls_get_addr/___tls_get_addr symbol for TLS.  */
 static const char *tls_get_addr;
 
-#if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
+#ifdef OBJ_ELF
 
 /* The ELF ABI to use.  */
 enum x86_elf_abi
@@ -642,7 +671,7 @@ static enum x86_elf_abi x86_elf_abi = I386_ABI;
 static int use_big_obj = 0;
 #endif
 
-#if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
+#ifdef OBJ_ELF
 /* 1 if generating code for a shared library.  */
 static int shared = 0;
 
@@ -717,6 +746,9 @@ lfence_before_ret;
 static int generate_relax_relocations
   = DEFAULT_GENERATE_X86_RELAX_RELOCATIONS;
 
+/* 1 if the assembler should check tls relocation.  */
+static bool tls_check = DEFAULT_X86_TLS_CHECK;
+
 static enum check_kind
   {
     check_none = 0,
@@ -1186,6 +1218,7 @@ static const arch_entry cpu_arch[] =
   VECARCH (avx10.1, AVX10_1, ANY_AVX512F, set),
   SUBARCH (user_msr, USER_MSR, USER_MSR, false),
   SUBARCH (apx_f, APX_F, APX_F, false),
+  VECARCH (avx10.2, AVX10_2, ANY_AVX10_2, set),
 };
 
 #undef SUBARCH
@@ -1271,7 +1304,7 @@ const pseudo_typeS md_pseudo_table[] =
   {"disallow_index_reg", set_allow_index_reg, 0},
   {"sse_check", set_check, 0},
   {"operand_check", set_check, 1},
-#if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
+#ifdef OBJ_ELF
   {"largecomm", handle_large_common, 0},
 #else
   {"file", dwarf2_directive_file, 0},
@@ -1293,6 +1326,96 @@ static htab_t op_hash;
 
 /* Hash table for register lookup.  */
 static htab_t reg_hash;
+
+#if (defined (OBJ_ELF) || defined (OBJ_MACH_O) || defined (TE_PE))
+static const struct
+{
+  const char *str;
+  unsigned int len;
+  const enum bfd_reloc_code_real rel[2];
+  const i386_operand_type types64;
+  bool need_GOT_symbol;
+}
+gotrel[] =
+{
+#define OPERAND_TYPE_IMM32_32S_DISP32 { .bitfield = \
+      { .imm32 = 1, .imm32s = 1, .disp32 = 1 } }
+#define OPERAND_TYPE_IMM32_32S_64_DISP32 { .bitfield = \
+      { .imm32 = 1, .imm32s = 1, .imm64 = 1, .disp32 = 1 } }
+#define OPERAND_TYPE_IMM32_32S_64_DISP32_64 { .bitfield = \
+      { .imm32 = 1, .imm32s = 1, .imm64 = 1, .disp32 = 1, .disp64 = 1 } }
+#define OPERAND_TYPE_IMM64_DISP64 { .bitfield = \
+      { .imm64 = 1, .disp64 = 1 } }
+
+#ifndef TE_PE
+#ifdef OBJ_ELF
+    { STRING_COMMA_LEN ("SIZE"),      { BFD_RELOC_SIZE32,
+					BFD_RELOC_SIZE32 },
+    { .bitfield = { .imm32 = 1, .imm64 = 1 } }, false },
+#endif
+    { STRING_COMMA_LEN ("PLTOFF"),   { _dummy_first_bfd_reloc_code_real,
+				       BFD_RELOC_X86_64_PLTOFF64 },
+    { .bitfield = { .imm64 = 1 } }, true },
+    { STRING_COMMA_LEN ("PLT"),      { BFD_RELOC_386_PLT32,
+				       BFD_RELOC_X86_64_PLT32    },
+    OPERAND_TYPE_IMM32_32S_DISP32, false },
+    { STRING_COMMA_LEN ("GOTPLT"),   { _dummy_first_bfd_reloc_code_real,
+				       BFD_RELOC_X86_64_GOTPLT64 },
+    OPERAND_TYPE_IMM64_DISP64, true },
+    { STRING_COMMA_LEN ("GOTOFF"),   { BFD_RELOC_386_GOTOFF,
+				       BFD_RELOC_X86_64_GOTOFF64 },
+    OPERAND_TYPE_IMM64_DISP64, true },
+    { STRING_COMMA_LEN ("GOTPCREL"), { _dummy_first_bfd_reloc_code_real,
+				       BFD_RELOC_X86_64_GOTPCREL },
+    OPERAND_TYPE_IMM32_32S_DISP32, true },
+    { STRING_COMMA_LEN ("TLSGD"),    { BFD_RELOC_386_TLS_GD,
+				       BFD_RELOC_X86_64_TLSGD    },
+    OPERAND_TYPE_IMM32_32S_DISP32, true },
+    { STRING_COMMA_LEN ("TLSLDM"),   { BFD_RELOC_386_TLS_LDM,
+				       _dummy_first_bfd_reloc_code_real },
+    OPERAND_TYPE_NONE, true },
+    { STRING_COMMA_LEN ("TLSLD"),    { _dummy_first_bfd_reloc_code_real,
+				       BFD_RELOC_X86_64_TLSLD    },
+    OPERAND_TYPE_IMM32_32S_DISP32, true },
+    { STRING_COMMA_LEN ("GOTTPOFF"), { BFD_RELOC_386_TLS_IE_32,
+				       BFD_RELOC_X86_64_GOTTPOFF },
+    OPERAND_TYPE_IMM32_32S_DISP32, true },
+    { STRING_COMMA_LEN ("TPOFF"),    { BFD_RELOC_386_TLS_LE_32,
+				       BFD_RELOC_X86_64_TPOFF32  },
+    OPERAND_TYPE_IMM32_32S_64_DISP32_64, true },
+    { STRING_COMMA_LEN ("NTPOFF"),   { BFD_RELOC_386_TLS_LE,
+				       _dummy_first_bfd_reloc_code_real },
+    OPERAND_TYPE_NONE, true },
+    { STRING_COMMA_LEN ("DTPOFF"),   { BFD_RELOC_386_TLS_LDO_32,
+				       BFD_RELOC_X86_64_DTPOFF32 },
+    OPERAND_TYPE_IMM32_32S_64_DISP32_64, true },
+    { STRING_COMMA_LEN ("GOTNTPOFF"),{ BFD_RELOC_386_TLS_GOTIE,
+				       _dummy_first_bfd_reloc_code_real },
+    OPERAND_TYPE_NONE, true },
+    { STRING_COMMA_LEN ("INDNTPOFF"),{ BFD_RELOC_386_TLS_IE,
+				       _dummy_first_bfd_reloc_code_real },
+    OPERAND_TYPE_NONE, true },
+    { STRING_COMMA_LEN ("GOT"),      { BFD_RELOC_386_GOT32,
+				       BFD_RELOC_X86_64_GOT32    },
+    OPERAND_TYPE_IMM32_32S_64_DISP32, true },
+    { STRING_COMMA_LEN ("TLSDESC"),  { BFD_RELOC_386_TLS_GOTDESC,
+				       BFD_RELOC_X86_64_GOTPC32_TLSDESC },
+    OPERAND_TYPE_IMM32_32S_DISP32, true },
+    { STRING_COMMA_LEN ("TLSCALL"),  { BFD_RELOC_386_TLS_DESC_CALL,
+				       BFD_RELOC_X86_64_TLSDESC_CALL },
+    OPERAND_TYPE_IMM32_32S_DISP32, true },
+#else /* TE_PE */
+    { STRING_COMMA_LEN ("SECREL32"), { BFD_RELOC_32_SECREL,
+				       BFD_RELOC_32_SECREL },
+    OPERAND_TYPE_IMM32_32S_64_DISP32_64, false },
+#endif
+
+#undef OPERAND_TYPE_IMM32_32S_DISP32
+#undef OPERAND_TYPE_IMM32_32S_64_DISP32
+#undef OPERAND_TYPE_IMM32_32S_64_DISP32_64
+#undef OPERAND_TYPE_IMM64_DISP64
+};
+#endif
 
   /* Various efficient no-op patterns for aligning code labels.
      Note: Don't try to assemble the instructions in the comments.
@@ -2953,12 +3076,9 @@ static void
 check_cpu_arch_compatible (const char *name ATTRIBUTE_UNUSED,
 			   i386_cpu_flags new_flag ATTRIBUTE_UNUSED)
 {
-#if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
-  static const char *arch;
-
   /* Intel MCU is only supported on ELF.  */
-  if (!IS_ELF)
-    return;
+#ifdef OBJ_ELF
+  static const char *arch;
 
   if (!arch)
     {
@@ -3080,9 +3200,16 @@ set_cpu_arch (int dummy ATTRIBUTE_UNUSED)
       const arch_stack_entry *top = arch_stack_top;
 
       if (!top)
-	as_bad (_(".arch stack is empty"));
-      else if (top->flag_code != flag_code
-	       || top->stackop_size != stackop_size)
+	{
+	  as_bad (_(".arch stack is empty"));
+	restore_bad:
+	  (void) restore_line_pointer (e);
+	  ignore_rest_of_line ();
+	  return;
+	}
+
+      if (top->flag_code != flag_code
+	  || top->stackop_size != stackop_size)
 	{
 	  static const unsigned int bits[] = {
 	    [CODE_16BIT] = 16,
@@ -3093,22 +3220,21 @@ set_cpu_arch (int dummy ATTRIBUTE_UNUSED)
 	  as_bad (_("this `.arch pop' requires `.code%u%s' to be in effect"),
 		  bits[top->flag_code],
 		  top->stackop_size == LONG_MNEM_SUFFIX ? "gcc" : "");
+	  goto restore_bad;
 	}
-      else
-	{
-	  arch_stack_top = top->prev;
 
-	  cpu_arch_name = top->name;
-	  free (cpu_sub_arch_name);
-	  cpu_sub_arch_name = top->sub_name;
-	  cpu_arch_flags = top->flags;
-	  cpu_arch_isa = top->isa;
-	  cpu_arch_isa_flags = top->isa_flags;
-	  vector_size = top->vector_size;
-	  no_cond_jump_promotion = top->no_cond_jump_promotion;
+      arch_stack_top = top->prev;
 
-	  XDELETE (top);
-	}
+      cpu_arch_name = top->name;
+      free (cpu_sub_arch_name);
+      cpu_sub_arch_name = top->sub_name;
+      cpu_arch_flags = top->flags;
+      cpu_arch_isa = top->isa;
+      cpu_arch_isa_flags = top->isa_flags;
+      vector_size = top->vector_size;
+      no_cond_jump_promotion = top->no_cond_jump_promotion;
+
+      XDELETE (top);
 
       (void) restore_line_pointer (e);
       demand_empty_rest_of_line ();
@@ -3151,18 +3277,14 @@ set_cpu_arch (int dummy ATTRIBUTE_UNUSED)
 		{
 		  as_bad (_("64bit mode not supported on `%s'."),
 			  cpu_arch[j].name);
-		  (void) restore_line_pointer (e);
-		  ignore_rest_of_line ();
-		  return;
+		  goto restore_bad;
 		}
 
 	      if (flag_code == CODE_32BIT && !cpu_arch[j].enable.bitfield.cpui386)
 		{
 		  as_bad (_("32bit mode not supported on `%s'."),
 			  cpu_arch[j].name);
-		  (void) restore_line_pointer (e);
-		  ignore_rest_of_line ();
-		  return;
+		  goto restore_bad;
 		}
 
 	      cpu_arch_name = cpu_arch[j].name;
@@ -3242,12 +3364,13 @@ set_cpu_arch (int dummy ATTRIBUTE_UNUSED)
     }
 
   if (j == ARRAY_SIZE (cpu_arch))
-    as_bad (_("no such architecture: `%s'"), string);
-
-  *input_line_pointer = e;
+    {
+      as_bad (_("no such architecture: `%s'"), string);
+      goto restore_bad;
+    }
 
   no_cond_jump_promotion = 0;
-  if (*input_line_pointer == ','
+  if (restore_line_pointer (e) == ','
       && !is_end_of_line[(unsigned char) input_line_pointer[1]])
     {
       ++input_line_pointer;
@@ -3256,10 +3379,11 @@ set_cpu_arch (int dummy ATTRIBUTE_UNUSED)
 
       if (strcmp (string, "nojumps") == 0)
 	no_cond_jump_promotion = 1;
-      else if (strcmp (string, "jumps") == 0)
-	;
-      else
-	as_bad (_("no such architecture modifier: `%s'"), string);
+      else if (strcmp (string, "jumps") != 0)
+	{
+	  as_bad (_("no such architecture modifier: `%s'"), string);
+	  goto restore_bad;
+	}
 
       (void) restore_line_pointer (e);
     }
@@ -3427,13 +3551,12 @@ md_begin (void)
   if (object_64bit)
     {
 #if defined (OBJ_COFF) && defined (TE_PE)
-      x86_dwarf2_return_column = (OUTPUT_FLAVOR == bfd_target_coff_flavour
-				  ? 32 : 16);
+      x86_dwarf2_return_column = 32;
 #else
       x86_dwarf2_return_column = 16;
 #endif
       x86_cie_data_alignment = -8;
-#if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
+#ifdef OBJ_ELF
       x86_sframe_cfa_sp_reg = REG_SP;
       x86_sframe_cfa_fp_reg = REG_FP;
 #endif
@@ -3672,7 +3795,7 @@ reloc (unsigned int size,
 	    break;
 	  }
 
-#if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
+#ifdef OBJ_ELF
       if (other == BFD_RELOC_SIZE32)
 	{
 	  if (size == 8)
@@ -3743,7 +3866,7 @@ reloc (unsigned int size,
   return NO_RELOC;
 }
 
-#if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
+#ifdef OBJ_ELF
 /* Here we decide which fixups can be adjusted to make them relative to
    the beginning of the section instead of the symbol.  Basically we need
    to make sure that the dynamic relocations are done correctly, so in
@@ -3752,9 +3875,6 @@ reloc (unsigned int size,
 int
 tc_i386_fix_adjustable (fixS *fixP)
 {
-  if (!IS_ELF)
-    return 1;
-
   /* Don't adjust pc-relative references to merge sections in 64-bit
      mode.  */
   if (use_rela_relocations
@@ -3800,12 +3920,18 @@ tc_i386_fix_adjustable (fixS *fixP)
       || fixP->fx_r_type == BFD_RELOC_X86_64_TPOFF32
       || fixP->fx_r_type == BFD_RELOC_X86_64_TPOFF64
       || fixP->fx_r_type == BFD_RELOC_X86_64_GOTOFF64
+      || fixP->fx_r_type == BFD_RELOC_X86_64_GOT64
       || fixP->fx_r_type == BFD_RELOC_X86_64_GOTPC32_TLSDESC
       || fixP->fx_r_type == BFD_RELOC_X86_64_CODE_4_GOTPC32_TLSDESC
       || fixP->fx_r_type == BFD_RELOC_X86_64_TLSDESC_CALL
       || fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT
       || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
     return 0;
+  /* Resolve PLT32 relocation against local symbol to section only for
+     PC-relative relocations.  */
+  if (fixP->fx_r_type == BFD_RELOC_386_PLT32
+      || fixP->fx_r_type == BFD_RELOC_X86_64_PLT32)
+    return fixP->fx_pcrel;
   return 1;
 }
 #endif
@@ -3949,7 +4075,7 @@ build_vex_prefix (const insn_template *t)
 {
   unsigned int register_specifier;
   unsigned int vector_length;
-  unsigned int w;
+  bool w;
 
   /* Check register specifier.  */
   if (i.vex.register_specifier)
@@ -4048,11 +4174,11 @@ build_vex_prefix (const insn_template *t)
 
   /* Check the REX.W bit and VEXW.  */
   if (i.tm.opcode_modifier.vexw == VEXWIG)
-    w = (vexwig == vexw1 || (i.rex & REX_W)) ? 1 : 0;
+    w = vexwig == vexw1 || (i.rex & REX_W);
   else if (i.tm.opcode_modifier.vexw && !(i.rex & REX_W))
-    w = i.tm.opcode_modifier.vexw == VEXW1 ? 1 : 0;
+    w = i.tm.opcode_modifier.vexw == VEXW1;
   else
-    w = (flag_code == CODE_64BIT ? i.rex & REX_W : vexwig == vexw1) ? 1 : 0;
+    w = flag_code == CODE_64BIT ? i.rex & REX_W : vexwig == vexw1;
 
   /* Use 2-byte VEX prefix if possible.  */
   if (w == 0
@@ -4061,13 +4187,13 @@ build_vex_prefix (const insn_template *t)
       && (i.rex & (REX_W | REX_X | REX_B)) == 0)
     {
       /* 2-byte VEX prefix.  */
-      unsigned int r;
+      bool r;
 
       i.vex.length = 2;
       i.vex.bytes[0] = 0xc5;
 
       /* Check the REX.R bit.  */
-      r = (i.rex & REX_R) ? 0 : 1;
+      r = !(i.rex & REX_R);
       i.vex.bytes[1] = (r << 7
 			| register_specifier << 3
 			| vector_length << 2
@@ -4205,7 +4331,8 @@ get_broadcast_bytes (const insn_template *t, bool diag)
 static void
 build_evex_prefix (void)
 {
-  unsigned int register_specifier, w;
+  unsigned int register_specifier;
+  bool w, u;
   rex_byte vrex_used = 0;
 
   /* Check register specifier.  */
@@ -4272,16 +4399,68 @@ build_evex_prefix (void)
 
   /* Check the REX.W bit and VEXW.  */
   if (i.tm.opcode_modifier.vexw == VEXWIG)
-    w = (evexwig == evexw1 || (i.rex & REX_W)) ? 1 : 0;
+    w = evexwig == evexw1 || (i.rex & REX_W);
   else if (i.tm.opcode_modifier.vexw && !(i.rex & REX_W))
-    w = i.tm.opcode_modifier.vexw == VEXW1 ? 1 : 0;
+    w = i.tm.opcode_modifier.vexw == VEXW1;
   else
-    w = (flag_code == CODE_64BIT ? i.rex & REX_W : evexwig == evexw1) ? 1 : 0;
+    w = flag_code == CODE_64BIT ? i.rex & REX_W : evexwig == evexw1;
+
+  if (i.tm.opcode_modifier.evex == EVEXDYN)
+    {
+      unsigned int op;
+
+      /* Determine vector length from the last multi-length vector operand.  */
+      for (op = i.operands; op--;)
+	if (i.tm.operand_types[op].bitfield.xmmword
+	    + i.tm.operand_types[op].bitfield.ymmword
+	    + i.tm.operand_types[op].bitfield.zmmword > 1)
+	  {
+	    if (i.types[op].bitfield.zmmword)
+	      {
+		i.tm.opcode_modifier.evex = EVEX512;
+		break;
+	      }
+	    else if (i.types[op].bitfield.ymmword)
+	      {
+		i.tm.opcode_modifier.evex = EVEX256;
+		break;
+	      }
+	    else if (i.types[op].bitfield.xmmword)
+	      {
+		i.tm.opcode_modifier.evex = EVEX128;
+		break;
+	      }
+	    else if ((i.broadcast.type || i.broadcast.bytes)
+		      && op == i.broadcast.operand)
+	      {
+		switch (get_broadcast_bytes (&i.tm, true))
+		  {
+		    case 64:
+		      i.tm.opcode_modifier.evex = EVEX512;
+		      break;
+		    case 32:
+		      i.tm.opcode_modifier.evex = EVEX256;
+		      break;
+		    case 16:
+		      i.tm.opcode_modifier.evex = EVEX128;
+		      break;
+		    default:
+		      abort ();
+		  }
+		break;
+	      }
+	  }
+
+      if (op >= MAX_OPERANDS)
+	abort ();
+    }
+
+  u = i.rounding.type == rc_none || i.tm.opcode_modifier.evex != EVEX256;
 
   /* The third byte of the EVEX prefix.  */
   i.vex.bytes[2] = ((w << 7)
 		    | (register_specifier << 3)
-		    | 4 /* Encode the U bit.  */
+		    | (u << 2)
 		    | i.tm.opcode_modifier.opcodeprefix);
 
   /* The fourth byte of the EVEX prefix.  */
@@ -4295,57 +4474,6 @@ build_evex_prefix (void)
       /* Encode the vector length.  */
       unsigned int vec_length;
 
-      if (i.tm.opcode_modifier.evex == EVEXDYN)
-	{
-	  unsigned int op;
-
-	  /* Determine vector length from the last multi-length vector
-	     operand.  */
-	  for (op = i.operands; op--;)
-	    if (i.tm.operand_types[op].bitfield.xmmword
-		+ i.tm.operand_types[op].bitfield.ymmword
-		+ i.tm.operand_types[op].bitfield.zmmword > 1)
-	      {
-		if (i.types[op].bitfield.zmmword)
-		  {
-		    i.tm.opcode_modifier.evex = EVEX512;
-		    break;
-		  }
-		else if (i.types[op].bitfield.ymmword)
-		  {
-		    i.tm.opcode_modifier.evex = EVEX256;
-		    break;
-		  }
-		else if (i.types[op].bitfield.xmmword)
-		  {
-		    i.tm.opcode_modifier.evex = EVEX128;
-		    break;
-		  }
-		else if ((i.broadcast.type || i.broadcast.bytes)
-			 && op == i.broadcast.operand)
-		  {
-		    switch (get_broadcast_bytes (&i.tm, true))
-		      {
-			case 64:
-			  i.tm.opcode_modifier.evex = EVEX512;
-			  break;
-			case 32:
-			  i.tm.opcode_modifier.evex = EVEX256;
-			  break;
-			case 16:
-			  i.tm.opcode_modifier.evex = EVEX128;
-			  break;
-			default:
-			  abort ();
-		      }
-		    break;
-		  }
-	      }
-
-	  if (op >= MAX_OPERANDS)
-	    abort ();
-	}
-
       switch (i.tm.opcode_modifier.evex)
 	{
 	case EVEXLIG: /* LL' is ignored */
@@ -4487,9 +4615,9 @@ static void establish_rex (void)
   i.rex |= i.prefix[REX_PREFIX] & REX_OPCODE;
 
   /* For 8 bit RegRex64 registers without a prefix, we need an empty rex prefix.  */
-  if (((i.types[first].bitfield.class == Reg && i.types[first].bitfield.byte
+  if (((i.types[first].bitfield.class == Reg
 	&& (i.op[first].regs->reg_flags & RegRex64) != 0)
-       || (i.types[last].bitfield.class == Reg && i.types[last].bitfield.byte
+       || (i.types[last].bitfield.class == Reg
 	   && (i.op[last].regs->reg_flags & RegRex64) != 0))
       && !is_apx_rex2_encoding () && !is_any_vex_encoding (&i.tm))
     i.rex |= REX_OPCODE;
@@ -4503,9 +4631,8 @@ static void establish_rex (void)
 	{
 	  /* Look for 8 bit operand that uses old registers.  */
 	  if (i.types[x].bitfield.class == Reg && i.types[x].bitfield.byte
-	      && (i.op[x].regs->reg_flags & RegRex64) == 0)
+	      && !(i.op[x].regs->reg_flags & (RegRex | RegRex2 | RegRex64)))
 	    {
-	      gas_assert (!(i.op[x].regs->reg_flags & RegRex));
 	      /* In case it is "hi" register, give up.  */
 	      if (i.op[x].regs->reg_num > 3)
 		as_bad (_("can't encode register '%s%s' in an "
@@ -4531,10 +4658,9 @@ static void establish_rex (void)
       for (x = first; x <= last; x++)
 	if (i.types[x].bitfield.class == Reg
 	    && i.types[x].bitfield.byte
-	    && (i.op[x].regs->reg_flags & RegRex64) == 0
+	    && !(i.op[x].regs->reg_flags & (RegRex | RegRex2 | RegRex64))
 	    && i.op[x].regs->reg_num > 3)
 	  {
-	    gas_assert (!(i.op[x].regs->reg_flags & RegRex));
 	    pp.rex_encoding = false;
 	    pp.rex2_encoding = false;
 	    break;
@@ -4839,7 +4965,7 @@ optimize_encoding (void)
 	  /* Squash the suffix.  */
 	  i.suffix = 0;
 	  /* Convert to byte registers. 8-bit registers are special,
-	     RegRex64 and non-RegRex64 each have 8 registers.  */
+	     RegRex64 and non-RegRex* each have 8 registers.  */
 	  if (i.types[1].bitfield.word)
 	    /* 32 (or 40) 8-bit registers.  */
 	    j = 32;
@@ -5054,6 +5180,41 @@ optimize_encoding (void)
 	  break;
 	}
     }
+  else if (optimize > 1
+	   && (i.tm.base_opcode | 0xf) == 0x4f
+	   && i.tm.opcode_space == SPACE_EVEXMAP4
+	   && i.reg_operands == 3
+	   && i.tm.opcode_modifier.operandconstraint == EVEX_NF
+	   && !i.types[0].bitfield.word)
+    {
+      /* Optimize: -O2:
+	   cfcmov<cc> %rM, %rN, %rN -> cmov<cc> %rM, %rN
+	   cfcmov<cc> %rM, %rN, %rM -> cmov<!cc> %rN, %rM
+	   cfcmov<cc> %rN, %rN, %rN -> nop %rN
+       */
+      if (i.op[0].regs == i.op[2].regs)
+	{
+	  i.tm.base_opcode ^= 1;
+	  i.op[0].regs = i.op[1].regs;
+	  i.op[1].regs = i.op[2].regs;
+	}
+      else if (i.op[1].regs != i.op[2].regs)
+	return;
+
+      i.tm.opcode_space = SPACE_0F;
+      i.tm.opcode_modifier.evex = 0;
+      i.tm.opcode_modifier.vexvvvv = 0;
+      i.tm.opcode_modifier.operandconstraint = 0;
+      i.reg_operands = 2;
+
+      /* While at it, convert to NOP if all three regs match.  */
+      if (i.op[0].regs == i.op[1].regs)
+	{
+	  i.tm.base_opcode = 0x1f;
+	  i.tm.extension_opcode = 0;
+	  i.reg_operands = 1;
+	}
+    }
   else if (i.reg_operands == 3
 	   && i.op[0].regs == i.op[1].regs
 	   && !i.types[2].bitfield.xmmword
@@ -5376,11 +5537,218 @@ optimize_encoding (void)
       i.op[1].regs = i.op[2].regs;
       i.types[1] = i.types[2];
       i.flags[1] = i.flags[2];
+      i.reloc[1] = i.reloc[2];
       i.tm.operand_types[1] = i.tm.operand_types[2];
 
       i.operands = 2;
       i.imm_operands = 0;
     }
+  else if (i.tm.base_opcode == 0x17
+	   && i.tm.opcode_space == SPACE_0F3A
+	   && i.op[0].imms->X_op == O_constant
+	   && i.op[0].imms->X_add_number == 0)
+    {
+      /* Optimize: -O:
+         extractps $0, %xmmN, %rM   -> movd %xmmN, %rM
+         extractps $0, %xmmN, mem   -> movss %xmmN, mem
+         vextractps $0, %xmmN, %rM  -> vmovd %xmmN, %rM
+         vextractps $0, %xmmN, mem  -> vmovss %xmmN, mem
+       */
+      i.tm.opcode_space = SPACE_0F;
+      i.tm.opcode_modifier.vexw = VEXW0;
+
+      if (!i.mem_operands)
+	i.tm.base_opcode = 0x7e;
+      else
+	{
+	  i.tm.base_opcode = 0x11;
+	  i.tm.opcode_modifier.opcodeprefix = PREFIX_0XF3;
+	}
+
+      i.op[0].regs = i.op[1].regs;
+      i.types[0] = i.types[1];
+      i.flags[0] = i.flags[1];
+      i.tm.operand_types[0] = i.tm.operand_types[1];
+
+      i.op[1].regs = i.op[2].regs;
+      i.types[1] = i.types[2];
+      i.flags[1] = i.flags[2];
+      i.reloc[1] = i.reloc[2];
+      i.tm.operand_types[1] = i.tm.operand_types[2];
+
+      i.operands = 2;
+      i.imm_operands = 0;
+    }
+  else if ((i.tm.base_opcode | 0x22) == 0x3b
+	   && i.tm.opcode_space == SPACE_0F3A
+	   && i.op[0].imms->X_op == O_constant
+	   && i.op[0].imms->X_add_number == 0)
+    {
+      /* Optimize: -O:
+         vextractf128 $0, %ymmN, %xmmM      -> vmovaps %xmmN, %xmmM
+         vextractf128 $0, %ymmN, mem        -> vmovups %xmmN, mem
+         vextractf32x4 $0, %[yz]mmN, %xmmM  -> vmovaps %xmmN, %xmmM
+         vextractf32x4 $0, %[yz]mmN, mem    -> vmovups %xmmN, mem
+         vextractf64x2 $0, %[yz]mmN, %xmmM  -> vmovapd %xmmN, %xmmM
+         vextractf64x2 $0, %[yz]mmN, mem    -> vmovupd %xmmN, mem
+         vextractf32x8 $0, %zmmN, %ymmM     -> vmovaps %ymmN, %ymmM
+         vextractf32x8 $0, %zmmN, mem       -> vmovups %ymmN, mem
+         vextractf64x4 $0, %zmmN, %ymmM     -> vmovapd %ymmN, %ymmM
+         vextractf64x4 $0, %zmmN, mem       -> vmovupd %ymmN, mem
+         vextracti128 $0, %ymmN, %xmmM      -> vmovdqa %xmmN, %xmmM
+         vextracti128 $0, %ymmN, mem        -> vmovdqu %xmmN, mem
+         vextracti32x4 $0, %[yz]mmN, %xmmM  -> vmovdqa{,32} %xmmN, %xmmM
+         vextracti32x4 $0, %[yz]mmN, mem    -> vmovdqu{,32} %xmmN, mem
+         vextracti64x2 $0, %[yz]mmN, %xmmM  -> vmovdqa{,64} %xmmN, %xmmM
+         vextracti64x2 $0, %[yz]mmN, mem    -> vmovdqu{,64} %xmmN, mem
+         vextracti32x8 $0, %zmmN, %ymmM     -> vmovdqa{,32} %ymmN, %ymmM
+         vextracti32x8 $0, %zmmN, mem       -> vmovdqu{,32} %ymmN, mem
+         vextracti64x4 $0, %zmmN, %ymmM     -> vmovdqa{,64} %ymmN, %ymmM
+         vextracti64x4 $0, %zmmN, mem       -> vmovdqu{,64} %ymmN, mem
+       */
+      i.tm.opcode_space = SPACE_0F;
+
+      if (!i.mask.reg
+	  && (pp.encoding <= encoding_vex3
+	      || (pp.encoding == encoding_evex512
+		  && (!i.base_reg || !(i.base_reg->reg_flags & RegRex2))
+		  && (!i.index_reg || !(i.index_reg->reg_flags & RegRex2)))))
+	{
+	  i.tm.opcode_modifier.vex = i.tm.base_opcode & 2 ? VEX256 : VEX128;
+	  i.tm.opcode_modifier.evex = 0;
+	}
+      else
+	i.tm.opcode_modifier.evex = i.tm.base_opcode & 2 ? EVEX256 : EVEX128;
+
+      if (i.tm.base_opcode & 0x20)
+	{
+	  i.tm.base_opcode = 0x7f;
+	  if (i.reg_operands != 2)
+	    i.tm.opcode_modifier.opcodeprefix = PREFIX_0XF3;
+	}
+      else
+	{
+	  if (i.reg_operands == 2)
+	    i.tm.base_opcode = 0x29;
+	  else
+	    i.tm.base_opcode = 0x11;
+	  if (i.tm.opcode_modifier.vexw != VEXW1)
+	    i.tm.opcode_modifier.opcodeprefix = PREFIX_NONE;
+	}
+
+      if (i.tm.opcode_modifier.vex)
+	i.tm.opcode_modifier.vexw = VEXWIG;
+
+      i.op[0].regs = i.op[1].regs;
+      i.types[0] = i.types[1];
+      i.flags[0] = i.flags[1];
+      i.tm.operand_types[0] = i.tm.operand_types[1];
+
+      i.op[1].regs = i.op[2].regs;
+      i.types[1] = i.types[2];
+      i.flags[1] = i.flags[2];
+      i.reloc[1] = i.reloc[2];
+      i.tm.operand_types[1] = i.tm.operand_types[2];
+
+      i.operands = 2;
+      i.imm_operands = 0;
+    }
+  else if (i.tm.base_opcode == 0x21
+	   && i.tm.opcode_space == SPACE_0F3A
+	   && i.op[0].imms->X_op == O_constant
+	   && (i.operands == i.reg_operands + 1
+	       ? i.op[0].imms->X_add_number == 0
+		 || (i.op[0].imms->X_add_number & 0xf) == 0xf
+	       : (i.op[0].imms->X_add_number & 0x3f) == 0x0e
+		  && (i.reg_operands == 1 || i.op[2].regs == i.op[3].regs)))
+    {
+      /* Optimize: -O:
+         insertps $0b....1111, %xmmN, %xmmM          -> xorps %xmmM, %xmmM
+         insertps $0b00000000, %xmmN, %xmmM          -> movss %xmmN, %xmmM
+         insertps $0b..001110, mem, %xmmN            -> movss mem, %xmmN
+         vinsertps $0b....1111, %xmmN, %xmmM, %xmmK  -> vxorps %xmm?, %xmm?, %xmmK
+         vinsertps $0b00000000, %xmmN, %xmmM, %xmmK  -> vmovss %xmmN, %xmmM, %xmmK
+         vinsertps $0b..001110, mem, %xmmN, %xmmN    -> vmovss mem, %xmmN
+       */
+      i.tm.opcode_space = SPACE_0F;
+      if ((i.op[0].imms->X_add_number & 0xf) == 0xf)
+	{
+	  i.tm.base_opcode = 0x57;
+	  i.tm.opcode_modifier.opcodeprefix = PREFIX_NONE;
+
+	  --i.operands;
+
+	  i.op[i.operands - 1].regs = i.op[i.operands].regs;
+	  i.types[i.operands - 1] = i.types[i.operands];
+	  i.flags[i.operands - 1] = i.flags[i.operands];
+	  i.tm.operand_types[i.operands - 1] = i.tm.operand_types[i.operands];
+
+	  i.op[1].regs = i.op[i.operands - 1].regs;
+	  i.types[1] = i.types[i.operands - 1];
+	  i.flags[1] = i.flags[i.operands - 1];
+	  i.tm.operand_types[1] = i.tm.operand_types[i.operands - 1];
+
+	  i.op[0].regs = i.op[1].regs;
+	  i.types[0] = i.types[1];
+	  i.flags[0] = i.flags[1];
+	  i.tm.operand_types[0] = i.tm.operand_types[1];
+
+	  /* Switch from EVEX to VEX encoding if possible.  Sadly we can't
+	     (always) tell use of the {evex} pseudo-prefix (which otherwise
+	     we'd like to respect) from use of %xmm16-%xmm31.  */
+	  if (pp.encoding == encoding_evex)
+	    pp.encoding = encoding_default;
+	  if (i.tm.opcode_modifier.evex
+	      && pp.encoding <= encoding_vex3
+	      && !(i.op[0].regs->reg_flags & RegVRex))
+	    {
+	      i.tm.opcode_modifier.evex = 0;
+	      i.tm.opcode_modifier.vex = VEX128;
+	    }
+
+	  /* Switch from VEX3 to VEX2 encoding if possible.  */
+	  if (i.tm.opcode_modifier.vex
+	      && pp.encoding <= encoding_vex
+	      && (i.op[0].regs->reg_flags & RegRex))
+	    {
+	      i.op[0].regs -= 8;
+	      i.op[1].regs = i.op[0].regs;
+	    }
+	}
+      else
+	{
+	  i.tm.base_opcode = 0x10;
+	  i.tm.opcode_modifier.opcodeprefix = PREFIX_0XF3;
+
+	  if (i.op[0].imms->X_add_number == 0)
+	    {
+	      i.op[0].regs = i.op[1].regs;
+	      --i.operands;
+	    }
+	  else
+	    {
+	      i.op[0].disps = i.op[1].disps;
+	      i.reloc[0] = i.reloc[1];
+	      i.operands = 2;
+	      i.tm.opcode_modifier.vexvvvv = 0;
+	    }
+	  i.types[0] = i.types[1];
+	  i.flags[0] = i.flags[1];
+	  i.tm.operand_types[0] = i.tm.operand_types[1];
+
+	  i.op[1].regs = i.op[2].regs;
+	  i.types[1] = i.types[2];
+	  i.flags[1] = i.flags[2];
+	  i.tm.operand_types[1] = i.tm.operand_types[2];
+
+	  i.op[2].regs = i.op[3].regs;
+	  i.types[2] = i.types[3];
+	  i.flags[2] = i.flags[3];
+	  i.tm.operand_types[2] = i.tm.operand_types[3];
+	}
+
+      i.imm_operands = 0;
+    }
 }
 
 /* Check whether the promoted (to address size) register is usable as index
@@ -5392,7 +5760,7 @@ static bool is_index (const reg_entry *r)
 
   if (r->reg_type.bitfield.byte)
     {
-      if (!(r->reg_flags & RegRex64))
+      if (!(r->reg_flags & (RegRex | RegRex2 | RegRex64)))
 	{
 	  if (r->reg_num >= 4)
 	    return false;
@@ -6229,6 +6597,358 @@ static INLINE bool may_need_pass2 (const insn_template *t)
 	       && (t->base_opcode | 8) == 0x2c);
 }
 
+#ifdef OBJ_ELF
+static enum x86_tls_error_type
+x86_check_tls_relocation (enum bfd_reloc_code_real r_type)
+{
+  switch (r_type)
+    {
+    case BFD_RELOC_386_TLS_GOTDESC:
+      /* Check GDesc access model:
+
+	 leal x@tlsdesc(%ebx), %reg32 --> Memory reg must be %ebx and
+					  SIB is not supported.
+       */
+      if (i.tm.mnem_off != MN_lea)
+	return x86_tls_error_insn;
+      if (i.index_reg)
+	return x86_tls_error_sib;
+      if (!i.base_reg)
+	return x86_tls_error_no_base_reg;
+      if (i.base_reg->reg_type.bitfield.instance != RegB)
+	return x86_tls_error_ebx;
+      if (!i.op[1].regs->reg_type.bitfield.dword)
+	return x86_tls_error_dest_32bit_reg_size;
+      break;
+
+    case BFD_RELOC_386_TLS_GD:
+      /* Check GD access model:
+
+	 leal foo@tlsgd(,%ebx,1), %eax   --> Only this fixed format is supported.
+	 leal foo@tlsgd(%reg32), %eax    --> Dest reg must be '%eax'
+					     Memory reg can't be %eax.
+       */
+      if (i.tm.mnem_off != MN_lea)
+	return x86_tls_error_insn;
+      if (i.op[1].regs->reg_type.bitfield.instance != Accum)
+	return x86_tls_error_dest_eax;
+      if (!i.op[1].regs->reg_type.bitfield.dword)
+	return x86_tls_error_dest_32bit_reg_size;
+      if (i.index_reg)
+	{
+	  if (i.base_reg)
+	    return x86_tls_error_base_reg;
+	  if (i.index_reg->reg_type.bitfield.instance != RegB)
+	    return x86_tls_error_index_ebx;
+	  if (i.log2_scale_factor)
+	    return x86_tls_error_scale_factor;
+	}
+      else
+	{
+	  if (!i.base_reg)
+	    return x86_tls_error_no_base_reg;
+	  if (i.base_reg->reg_type.bitfield.instance == Accum)
+	    return x86_tls_error_eax;
+	}
+      break;
+
+    case BFD_RELOC_386_TLS_LDM:
+      /*  Check LDM access model:
+
+	  leal foo@tlsldm(%reg32), %eax --> Dest reg must be '%eax'
+				            Memory reg can't be %eax and SIB
+					    is not supported.
+       */
+      if (i.tm.mnem_off != MN_lea)
+	return x86_tls_error_insn;
+      if (i.index_reg)
+	return x86_tls_error_sib;
+      if (!i.base_reg)
+	return x86_tls_error_no_base_reg;
+      if (i.base_reg->reg_type.bitfield.instance == Accum)
+	return x86_tls_error_eax;
+      if (i.op[1].regs->reg_type.bitfield.instance != Accum)
+	return x86_tls_error_dest_eax;
+      if (!i.op[1].regs->reg_type.bitfield.dword)
+	return x86_tls_error_dest_32bit_reg_size;
+      break;
+
+    case BFD_RELOC_X86_64_GOTPC32_TLSDESC:
+      /* Check GOTPC32 TLSDESC access model:
+
+	 --- LP64 mode ---
+	 leaq x@tlsdesc(%rip), %reg64 --> Memory reg must be %rip.
+
+	 --- X32 mode ---
+	 rex/rex2 leal x@tlsdesc(%rip), %reg32 --> Memory reg must be %rip.
+
+	 In X32 mode, gas will add rex/rex2 for it later, no need to check
+	 here.
+       */
+      if (i.tm.mnem_off != MN_lea)
+	return x86_tls_error_insn;
+      if (!i.base_reg)
+	return x86_tls_error_no_base_reg;
+      if (i.base_reg->reg_num != RegIP
+	  || !i.base_reg->reg_type.bitfield.qword)
+	return x86_tls_error_rip;
+      if (x86_elf_abi == X86_64_ABI)
+	{
+	  if (!i.op[1].regs->reg_type.bitfield.qword)
+	    return x86_tls_error_dest_64bit_reg_size;
+	}
+      else if (!i.op[1].regs->reg_type.bitfield.dword
+	       && !i.op[1].regs->reg_type.bitfield.qword)
+	return x86_tls_error_dest_32bit_or_64bit_reg_size;
+	  break;
+
+    case BFD_RELOC_X86_64_TLSGD:
+      /* Check GD access model:
+
+	 leaq foo@tlsgd(%rip), %rdi --> Only this fixed format is supported.
+       */
+    case BFD_RELOC_X86_64_TLSLD:
+      /* Check LD access model:
+
+	 leaq foo@tlsld(%rip), %rdi --> Only this fixed format is supported.
+       */
+      if (i.tm.mnem_off != MN_lea)
+	return x86_tls_error_insn;
+      if (!i.base_reg)
+	return x86_tls_error_no_base_reg;
+      if (i.base_reg->reg_num != RegIP
+	  || !i.base_reg->reg_type.bitfield.qword)
+	return x86_tls_error_rip;
+      if (!i.op[1].regs->reg_type.bitfield.qword
+	  || i.op[1].regs->reg_num != EDI_REG_NUM
+	  || i.op[1].regs->reg_flags)
+	return x86_tls_error_dest_rdi;
+      break;
+
+    case BFD_RELOC_386_TLS_GOTIE:
+      /* Check GOTIE access model:
+
+	 subl foo@gotntpoff(%reg1), %reg2
+	 movl foo@gotntpoff(%reg1), %reg2
+	 addl foo@gotntpoff(%reg1), %reg2
+
+	 Memory operand: SIB is not supported.
+       */
+    case BFD_RELOC_386_TLS_IE_32:
+      /* Check IE_32 access model:
+
+	 subl foo@gottpoff(%reg1), %reg2
+	 movl foo@gottpoff(%reg1), %reg2
+	 addl foo@gottpoff(%reg1), %reg2
+
+	 Memory operand: SIB is not supported.
+       */
+      if (i.tm.mnem_off != MN_sub
+	  && i.tm.mnem_off != MN_add
+	  && i.tm.mnem_off != MN_mov)
+	return x86_tls_error_insn;
+      if (i.op[1].regs->reg_type.bitfield.class != Reg
+	  || i.op[0].regs->reg_type.bitfield.class
+	  || i.imm_operands)
+	return x86_tls_error_opcode;
+      if (!i.base_reg)
+	return x86_tls_error_no_base_reg;
+      if (i.index_reg)
+	return x86_tls_error_sib;
+      if (!i.base_reg->reg_type.bitfield.dword)
+	return x86_tls_error_base_reg_size;
+      if (!i.op[1].regs->reg_type.bitfield.dword)
+	return x86_tls_error_dest_32bit_reg_size;
+      break;
+
+    case BFD_RELOC_386_TLS_IE:
+      /* Check IE access model:
+
+	 movl foo@indntpoff, %reg32 --> Mod == 00 && r/m == 5
+	 addl foo@indntpoff, %reg32 --> Mod == 00 && r/m == 5
+       */
+      if (i.tm.mnem_off != MN_add && i.tm.mnem_off != MN_mov)
+	return x86_tls_error_insn;
+      if (i.op[1].regs->reg_type.bitfield.class != Reg
+	  || i.op[0].regs->reg_type.bitfield.class
+	  || i.imm_operands)
+	return x86_tls_error_opcode;
+      if (i.base_reg || i.index_reg)
+	return x86_tls_error_require_no_base_index_reg;
+      if (!i.op[1].regs->reg_type.bitfield.dword)
+	return x86_tls_error_dest_32bit_reg_size;
+      break;
+
+    case BFD_RELOC_X86_64_GOTTPOFF:
+      /* Check GOTTPOFF access model:
+
+	 mov foo@gottpoff(%rip), %reg --> Memory Reg must be %rip.
+	 add foo@gottpoff(%rip), %reg --> Memory Reg must be %rip.
+	 add %reg1, foo@gottpoff(%rip), %reg2 --> Memory Reg must be %rip.
+	 add foo@gottpoff(%rip), %reg1, %reg2 --> Memory Reg must be %rip.
+       */
+      if (i.tm.mnem_off != MN_add && i.tm.mnem_off != MN_mov)
+	return x86_tls_error_insn;
+      if (i.op[i.operands - 1].regs->reg_type.bitfield.class != Reg
+	  || (i.op[0].regs->reg_type.bitfield.class
+	      && i.tm.opcode_modifier.vexvvvv != VexVVVV_DST)
+	  || i.imm_operands)
+	return x86_tls_error_opcode;
+      if (!i.base_reg)
+	return x86_tls_error_no_base_reg;
+      if (i.base_reg->reg_num != RegIP
+	  || !i.base_reg->reg_type.bitfield.qword)
+	return x86_tls_error_rip;
+      if (x86_elf_abi == X86_64_ABI)
+	{
+	  if (!i.op[i.operands - 1].regs->reg_type.bitfield.qword)
+	    return x86_tls_error_dest_64bit_reg_size;
+	}
+      else if (!i.op[i.operands - 1].regs->reg_type.bitfield.dword
+	       && !i.op[i.operands - 1].regs->reg_type.bitfield.qword)
+	return x86_tls_error_dest_32bit_or_64bit_reg_size;
+      break;
+
+    case BFD_RELOC_386_TLS_DESC_CALL:
+      /* Check GDesc access model:
+
+	 call *x@tlscall(%eax) --> Memory reg must be %eax and
+				   SIB is not supported.
+       */
+    case BFD_RELOC_X86_64_TLSDESC_CALL:
+      /* Check GDesc access model:
+
+	 call *x@tlscall(%rax) <--- LP64 mode.
+	 call *x@tlscall(%eax) <--- X32 mode.
+
+	 Only these fixed formats are supported.
+       */
+      if (i.tm.mnem_off != MN_call)
+	return x86_tls_error_insn;
+      if (i.index_reg)
+	return x86_tls_error_sib;
+      if (!i.base_reg)
+	return x86_tls_error_no_base_reg;
+      if (i.base_reg->reg_type.bitfield.instance != Accum)
+	return x86_tls_error_RegA;
+      break;
+
+    case BFD_RELOC_NONE:
+      /* This isn't a relocation.  */
+      return x86_tls_error_continue;
+
+    default:
+      break;
+    }
+
+  /* This relocation is OK.  */
+  return x86_tls_error_none;
+}
+
+static void
+x86_report_tls_error (enum x86_tls_error_type tls_error,
+		      enum bfd_reloc_code_real r_type)
+{
+  unsigned int k;
+  for (k = 0; k < ARRAY_SIZE (gotrel); k++)
+    if (gotrel[k].rel[object_64bit] == r_type)
+      break;
+
+  switch (tls_error)
+    {
+    case x86_tls_error_insn:
+      as_bad (_("@%s operator cannot be used with `%s'"),
+	      gotrel[k].str, insn_name (&i.tm));
+      return;
+
+    case x86_tls_error_opcode:
+      as_bad (_("@%s operator can be used with `%s', but format is wrong"),
+	      gotrel[k].str, insn_name (&i.tm));
+      return;
+
+    case x86_tls_error_sib:
+      as_bad (_("@%s operator requires no SIB"), gotrel[k].str);
+      return;
+
+    case x86_tls_error_no_base_reg:
+      as_bad (_("@%s operator requires base register"), gotrel[k].str);
+      return;
+
+    case x86_tls_error_require_no_base_index_reg:
+      as_bad (_("@%s operator requires no base/index register"),
+	      gotrel[k].str);
+      return;
+
+    case x86_tls_error_base_reg:
+      as_bad (_("@%s operator requires no base register"), gotrel[k].str);
+      return;
+
+    case x86_tls_error_index_ebx:
+      as_bad (_("@%s operator requires `%sebx' as index register"),
+	      gotrel[k].str, register_prefix);
+      return;
+
+    case x86_tls_error_eax:
+      as_bad (_("@%s operator requires `%seax' as base register"),
+	      gotrel[k].str, register_prefix);
+      return;
+
+    case x86_tls_error_RegA:
+      as_bad (_("@%s operator requires `%seax/%srax' as base register"),
+	      gotrel[k].str, register_prefix, register_prefix);
+      return;
+
+    case x86_tls_error_ebx:
+      as_bad (_("@%s operator requires `%sebx' as base register"),
+	      gotrel[k].str, register_prefix);
+      return;
+
+    case x86_tls_error_rip:
+      as_bad (_("@%s operator requires `%srip' as base register"),
+	      gotrel[k].str, register_prefix);
+      return;
+
+    case x86_tls_error_dest_eax:
+      as_bad (_("@%s operator requires `%seax' as dest register"),
+	      gotrel[k].str, register_prefix);
+      return;
+
+    case x86_tls_error_dest_rdi:
+      as_bad (_("@%s operator requires `%srdi' as dest register"),
+	      gotrel[k].str, register_prefix);
+      return;
+
+    case x86_tls_error_scale_factor:
+      as_bad (_("@%s operator requires scale factor of 1"),
+	      gotrel[k].str);
+      return;
+
+    case x86_tls_error_base_reg_size:
+      as_bad (_("@%s operator requires 32-bit base register"),
+	      gotrel[k].str);
+      return;
+
+    case x86_tls_error_dest_32bit_reg_size:
+      as_bad (_("@%s operator requires 32-bit dest register"),
+	      gotrel[k].str);
+      return;
+
+    case x86_tls_error_dest_64bit_reg_size:
+      as_bad (_("@%s operator requires 64-bit dest register"),
+	      gotrel[k].str);
+      return;
+
+    case x86_tls_error_dest_32bit_or_64bit_reg_size:
+      as_bad (_("@%s operator requires 32-bit or 64-bit dest register"),
+	      gotrel[k].str);
+      return;
+
+    default:
+      abort ();
+    }
+}
+#endif
+
 /* This is the guts of the machine-dependent assembler.  LINE points to a
    machine dependent instruction.  This function is supposed to emit
    the frags/bytes it assembles to.  */
@@ -6567,6 +7287,23 @@ i386_assemble (char *line)
 	i.prefix[LOCK_PREFIX] = 0;
     }
 
+#ifdef OBJ_ELF
+  if (i.has_gotrel && tls_check)
+    {
+      enum x86_tls_error_type tls_error;
+      for (j = 0; j < i.operands; ++j)
+	{
+	  tls_error = x86_check_tls_relocation (i.reloc[j]);
+	  if (tls_error == x86_tls_error_continue)
+	    continue;
+
+	  if (tls_error != x86_tls_error_none)
+	    x86_report_tls_error (tls_error, i.reloc[j]);
+	  break;
+	}
+    }
+#endif
+
   if ((is_any_vex_encoding (&i.tm) && i.tm.opcode_space != SPACE_EVEXMAP4)
       || i.tm.operand_types[i.imm_operands].bitfield.class >= RegMMX
       || i.tm.operand_types[i.imm_operands + 1].bitfield.class >= RegMMX)
@@ -6577,20 +7314,6 @@ i386_assemble (char *line)
 	  as_bad (_("data size prefix invalid with `%s'"), insn_name (&i.tm));
 	  return;
 	}
-
-      /* Don't allow e.g. KMOV in TLS code sequences.  */
-      for (j = i.imm_operands; j < i.operands; ++j)
-	switch (i.reloc[j])
-	  {
-	  case BFD_RELOC_X86_64_GOTTPOFF:
-	  case BFD_RELOC_386_TLS_GOTIE:
-	  case BFD_RELOC_386_TLS_LE_32:
-	  case BFD_RELOC_X86_64_TLSLD:
-	    as_bad (_("TLS relocation cannot be used with `%s'"), insn_name (&i.tm));
-	    return;
-	  default:
-	    break;
-	  }
     }
 
   /* Check if HLE prefix is OK.  */
@@ -6799,10 +7522,10 @@ i386_assemble (char *line)
   /* We are ready to output the insn.  */
   output_insn (last_insn);
 
-#if defined (OBJ_MAYBE_ELF) || defined (OBJ_ELF)
+#ifdef OBJ_ELF
   /* PS: SCFI is enabled only for System V AMD64 ABI.  The ABI check has been
      performed in i386_target_format.  */
-  if (IS_ELF && flag_synth_cfi)
+  if (flag_synth_cfi)
     {
       ginsnS *ginsn;
       ginsn = x86_ginsn_new (symbol_temp_new_now (), frch_ginsn_gen_mode ());
@@ -8024,18 +8747,22 @@ check_VecOperands (const insn_template *t)
 	  return 1;
 	}
 
-      /* Non-EVEX.LIG forms need to have a ZMM register as at least one
-	 operand.  */
-      if (t->opcode_modifier.evex != EVEXLIG)
-	{
-	  for (op = 0; op < t->operands; ++op)
-	    if (i.types[op].bitfield.zmmword)
-	      break;
-	  if (op >= t->operands)
-	    {
-	      i.error = operand_size_mismatch;
-	      return 1;
-	    }
+      /* Non-EVEX.{LIG,512,256} forms need to have a ZMM or YMM register as at
+	 least one operand.  For YMM register or EVEX256, we will need AVX10.2
+	 enabled.  There's no need to check all operands, though: Either of the
+	 last two operands will be of the right size in all relevant templates.  */
+      if (t->opcode_modifier.evex != EVEXLIG
+	  && t->opcode_modifier.evex != EVEX512
+	  && (t->opcode_modifier.evex != EVEX256
+	      || !cpu_arch_flags.bitfield.cpuavx10_2)
+	  && !i.types[t->operands - 1].bitfield.zmmword
+	  && !i.types[t->operands - 2].bitfield.zmmword
+	  && ((!i.types[t->operands - 1].bitfield.ymmword
+	       && !i.types[t->operands - 2].bitfield.ymmword)
+	      || !cpu_arch_flags.bitfield.cpuavx10_2))
+	{
+	  i.error = operand_size_mismatch;
+	  return 1;
 	}
     }
 
@@ -8742,7 +9469,10 @@ match_template (char mnem_suffix)
 		  found_reverse_match = Opcode_D;
 		  goto check_operands_345;
 		}
-	      else if (t->opcode_modifier.commutative)
+	      else if (t->opcode_modifier.commutative
+		       /* CFCMOVcc also wants its major opcode unaltered.  */
+		       || (t->opcode_space == SPACE_EVEXMAP4
+			   && (t->base_opcode | 0xf) == 0x4f))
 		found_reverse_match = ~0;
 	      else if (t->opcode_space != SPACE_BASE
 		       && (t->opcode_space != SPACE_EVEXMAP4
@@ -9042,6 +9772,9 @@ match_template (char mnem_suffix)
 
       /* Fall through.  */
     case ~0:
+      if (i.tm.opcode_space == SPACE_EVEXMAP4
+	  && !t->opcode_modifier.commutative)
+	i.tm.opcode_modifier.operandconstraint = EVEX_NF;
       i.tm.operand_types[0] = operand_types[i.operands - 1];
       i.tm.operand_types[i.operands - 1] = operand_types[0];
       break;
@@ -9561,7 +10294,7 @@ process_suffix (const insn_template *t)
 		  ? i.op[1].regs->reg_type.bitfield.word
 		  : i.op[1].regs->reg_type.bitfield.dword)
 	      && ((i.base_reg == NULL && i.index_reg == NULL)
-#if defined (OBJ_MAYBE_ELF) || defined (OBJ_ELF)
+#ifdef OBJ_ELF
 		  || (x86_elf_abi == X86_64_X32_ABI
 		      && i.base_reg
 		      && i.base_reg->reg_num == RegIP
@@ -10707,17 +11440,14 @@ output_branch (void)
   frag_var (rs_machine_dependent, 5, i.reloc[0], subtype, sym, off, p);
 }
 
-#if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
+/* PLT32 relocation is ELF only.  */
+#ifdef OBJ_ELF
 /* Return TRUE iff PLT32 relocation should be used for branching to
    symbol S.  */
 
 static bool
 need_plt32_p (symbolS *s)
 {
-  /* PLT32 relocation is ELF only.  */
-  if (!IS_ELF)
-    return false;
-
 #ifdef TE_SOLARIS
   /* Don't emit PLT32 relocation on Solaris: neither native linker nor
      krtld support it.  */
@@ -10829,7 +11559,7 @@ output_jump (void)
       abort ();
     }
 
-#if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
+#ifdef OBJ_ELF
   if (flag_code == CODE_64BIT && size == 4
       && jump_reloc == NO_RELOC && i.op[0].disps->X_add_number == 0
       && need_plt32_p (i.op[0].disps->X_add_symbol))
@@ -10992,7 +11722,7 @@ i386_unrecognized_line (int ch)
   return 1;
 }
 
-#if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
+#ifdef OBJ_ELF
 void
 x86_cleanup (void)
 {
@@ -11005,7 +11735,7 @@ x86_cleanup (void)
   unsigned int isa_1_descsz_raw, feature_2_descsz_raw;
   unsigned int padding;
 
-  if (!IS_ELF || !x86_used_note)
+  if (!x86_used_note)
     return;
 
   x86_feature_2_used |= GNU_PROPERTY_X86_FEATURE_2_X86;
@@ -11414,8 +12144,8 @@ output_insn (const struct last_insn *last_insn)
      or never be used.  */
   enum mf_jcc_kind mf_jcc = mf_jcc_jo;
 
-#if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
-  if (IS_ELF && x86_used_note && now_seg != absolute_section)
+#ifdef OBJ_ELF
+  if (x86_used_note && now_seg != absolute_section)
     {
       if ((i.xstate & xstate_tmm) == xstate_tmm
 	  || is_cpu (&i.tm, CpuAMX_TILE))
@@ -11690,7 +12420,7 @@ output_insn (const struct last_insn *last_insn)
 	      abort ();
 	    }
 
-#if defined (OBJ_MAYBE_ELF) || defined (OBJ_ELF)
+#ifdef OBJ_ELF
 	  /* For x32, add a dummy REX_OPCODE prefix for mov/add with
 	     R_X86_64_GOTTPOFF relocation so that linker can safely
 	     perform IE->LE optimization.  A dummy REX_OPCODE prefix
@@ -12305,10 +13035,7 @@ x86_address_bytes (void)
   return stdoutput->arch_info->bits_per_address / 8;
 }
 
-#if (!(defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF) || defined (OBJ_MACH_O)) \
-     || defined (LEX_AT)) && !defined (TE_PE)
-# define lex_got(reloc, adjust, types) NULL
-#else
+#if (defined (OBJ_ELF) || defined (OBJ_MACH_O) || defined (TE_PE))
 /* Parse operands of the form
    <symbol>@GOTOFF+<nnn>
    and similar .plt or .got references.
@@ -12328,103 +13055,9 @@ lex_got (enum bfd_reloc_code_real *rel,
      we don't yet know the operand size (this will be set by insn
      matching).  Hence we record the word32 relocation here,
      and adjust the reloc according to the real size in reloc().  */
-  static const struct
-  {
-    const char *str;
-    int len;
-    const enum bfd_reloc_code_real rel[2];
-    const i386_operand_type types64;
-    bool need_GOT_symbol;
-  }
-    gotrel[] =
-  {
-
-#define OPERAND_TYPE_IMM32_32S_DISP32 { .bitfield = \
-  { .imm32 = 1, .imm32s = 1, .disp32 = 1 } }
-#define OPERAND_TYPE_IMM32_32S_64_DISP32 { .bitfield = \
-  { .imm32 = 1, .imm32s = 1, .imm64 = 1, .disp32 = 1 } }
-#define OPERAND_TYPE_IMM32_32S_64_DISP32_64 { .bitfield = \
-  { .imm32 = 1, .imm32s = 1, .imm64 = 1, .disp32 = 1, .disp64 = 1 } }
-#define OPERAND_TYPE_IMM64_DISP64 { .bitfield = \
-  { .imm64 = 1, .disp64 = 1 } }
-
-#ifndef TE_PE
-#if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
-    { STRING_COMMA_LEN ("SIZE"),      { BFD_RELOC_SIZE32,
-					BFD_RELOC_SIZE32 },
-      { .bitfield = { .imm32 = 1, .imm64 = 1 } }, false },
-#endif
-    { STRING_COMMA_LEN ("PLTOFF"),   { _dummy_first_bfd_reloc_code_real,
-				       BFD_RELOC_X86_64_PLTOFF64 },
-      { .bitfield = { .imm64 = 1 } }, true },
-    { STRING_COMMA_LEN ("PLT"),      { BFD_RELOC_386_PLT32,
-				       BFD_RELOC_X86_64_PLT32    },
-      OPERAND_TYPE_IMM32_32S_DISP32, false },
-    { STRING_COMMA_LEN ("GOTPLT"),   { _dummy_first_bfd_reloc_code_real,
-				       BFD_RELOC_X86_64_GOTPLT64 },
-      OPERAND_TYPE_IMM64_DISP64, true },
-    { STRING_COMMA_LEN ("GOTOFF"),   { BFD_RELOC_386_GOTOFF,
-				       BFD_RELOC_X86_64_GOTOFF64 },
-      OPERAND_TYPE_IMM64_DISP64, true },
-    { STRING_COMMA_LEN ("GOTPCREL"), { _dummy_first_bfd_reloc_code_real,
-				       BFD_RELOC_X86_64_GOTPCREL },
-      OPERAND_TYPE_IMM32_32S_DISP32, true },
-    { STRING_COMMA_LEN ("TLSGD"),    { BFD_RELOC_386_TLS_GD,
-				       BFD_RELOC_X86_64_TLSGD    },
-      OPERAND_TYPE_IMM32_32S_DISP32, true },
-    { STRING_COMMA_LEN ("TLSLDM"),   { BFD_RELOC_386_TLS_LDM,
-				       _dummy_first_bfd_reloc_code_real },
-      OPERAND_TYPE_NONE, true },
-    { STRING_COMMA_LEN ("TLSLD"),    { _dummy_first_bfd_reloc_code_real,
-				       BFD_RELOC_X86_64_TLSLD    },
-      OPERAND_TYPE_IMM32_32S_DISP32, true },
-    { STRING_COMMA_LEN ("GOTTPOFF"), { BFD_RELOC_386_TLS_IE_32,
-				       BFD_RELOC_X86_64_GOTTPOFF },
-      OPERAND_TYPE_IMM32_32S_DISP32, true },
-    { STRING_COMMA_LEN ("TPOFF"),    { BFD_RELOC_386_TLS_LE_32,
-				       BFD_RELOC_X86_64_TPOFF32  },
-      OPERAND_TYPE_IMM32_32S_64_DISP32_64, true },
-    { STRING_COMMA_LEN ("NTPOFF"),   { BFD_RELOC_386_TLS_LE,
-				       _dummy_first_bfd_reloc_code_real },
-      OPERAND_TYPE_NONE, true },
-    { STRING_COMMA_LEN ("DTPOFF"),   { BFD_RELOC_386_TLS_LDO_32,
-				       BFD_RELOC_X86_64_DTPOFF32 },
-      OPERAND_TYPE_IMM32_32S_64_DISP32_64, true },
-    { STRING_COMMA_LEN ("GOTNTPOFF"),{ BFD_RELOC_386_TLS_GOTIE,
-				       _dummy_first_bfd_reloc_code_real },
-      OPERAND_TYPE_NONE, true },
-    { STRING_COMMA_LEN ("INDNTPOFF"),{ BFD_RELOC_386_TLS_IE,
-				       _dummy_first_bfd_reloc_code_real },
-      OPERAND_TYPE_NONE, true },
-    { STRING_COMMA_LEN ("GOT"),      { BFD_RELOC_386_GOT32,
-				       BFD_RELOC_X86_64_GOT32    },
-      OPERAND_TYPE_IMM32_32S_64_DISP32, true },
-    { STRING_COMMA_LEN ("TLSDESC"),  { BFD_RELOC_386_TLS_GOTDESC,
-				       BFD_RELOC_X86_64_GOTPC32_TLSDESC },
-      OPERAND_TYPE_IMM32_32S_DISP32, true },
-    { STRING_COMMA_LEN ("TLSCALL"),  { BFD_RELOC_386_TLS_DESC_CALL,
-				       BFD_RELOC_X86_64_TLSDESC_CALL },
-      OPERAND_TYPE_IMM32_32S_DISP32, true },
-#else /* TE_PE */
-    { STRING_COMMA_LEN ("SECREL32"), { BFD_RELOC_32_SECREL,
-				       BFD_RELOC_32_SECREL },
-      OPERAND_TYPE_IMM32_32S_64_DISP32_64, false },
-#endif
-
-#undef OPERAND_TYPE_IMM32_32S_DISP32
-#undef OPERAND_TYPE_IMM32_32S_64_DISP32
-#undef OPERAND_TYPE_IMM32_32S_64_DISP32_64
-#undef OPERAND_TYPE_IMM64_DISP64
-
-  };
   char *cp;
   unsigned int j;
 
-#if defined (OBJ_MAYBE_ELF) && !defined (TE_PE)
-  if (!IS_ELF)
-    return NULL;
-#endif
-
   for (cp = input_line_pointer; *cp != '@'; cp++)
     if (is_end_of_line[(unsigned char) *cp] || *cp == ',')
       return NULL;
@@ -12439,6 +13072,7 @@ lex_got (enum bfd_reloc_code_real *rel,
 	      int first, second;
 	      char *tmpbuf, *past_reloc;
 
+	      i.has_gotrel = true;
 	      *rel = gotrel[j].rel[object_64bit];
 
 	      if (types)
@@ -12494,6 +13128,8 @@ lex_got (enum bfd_reloc_code_real *rel,
   /* Might be a symbol version string.  Don't as_bad here.  */
   return NULL;
 }
+#else
+# define lex_got(reloc, adjust, types) NULL
 #endif
 
 bfd_reloc_code_real_type
@@ -12505,9 +13141,7 @@ x86_cons (expressionS *exp, int size)
   exp->X_md = 0;
   expr_mode = expr_operator_none;
 
-#if ((defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)) \
-      && !defined (LEX_AT)) \
-    || defined (TE_PE)
+#if defined (OBJ_ELF) || defined (TE_PE)
   if (size == 4 || (object_64bit && size == 8))
     {
       /* Handle @GOTOFF and the like in an expression.  */
@@ -13057,7 +13691,8 @@ s_insn (int dummy ATTRIBUTE_UNUSED)
 	case 3:
 	  if (pp.encoding != encoding_default)
 	    {
-	      i.tm.opcode_modifier.vexvvvv = VexVVVV_SRC1;
+	      i.tm.opcode_modifier.vexvvvv = i.tm.extension_opcode == None
+					     ? VexVVVV_SRC1 : VexVVVV_DST;
 	      break;
 	    }
 	  /* Fall through.  */
@@ -13141,7 +13776,7 @@ s_insn (int dummy ATTRIBUTE_UNUSED)
 	      && flag_code == CODE_64BIT
 	      && i.types[j].bitfield.class == Reg
 	      && i.types[j].bitfield.byte
-	      && !(i.op[j].regs->reg_flags & RegRex64)
+	      && !(i.op[j].regs->reg_flags & (RegRex | RegRex2 | RegRex64))
 	      && i.op[j].regs->reg_num > 3)
 	    as_bad (_("can't encode register '%s%s' with VEX/XOP/EVEX"),
 		    register_prefix, i.op[j].regs->reg_name);
@@ -13377,10 +14012,10 @@ s_insn (int dummy ATTRIBUTE_UNUSED)
   last_insn->name = ".insn directive";
   last_insn->file = as_where (&last_insn->line);
 
-#if defined (OBJ_MAYBE_ELF) || defined (OBJ_ELF)
+#ifdef OBJ_ELF
   /* PS: SCFI is enabled only for System V AMD64 ABI.  The ABI check has been
      performed in i386_target_format.  */
-  if (IS_ELF && flag_synth_cfi)
+  if (flag_synth_cfi)
     as_bad (_("SCFI: hand-crafting instructions not supported"));
 #endif
 
@@ -13786,9 +14421,8 @@ i386_finalize_immediate (segT exp_seg ATTRIBUTE_UNUSED, expressionS *exp,
 	  && flag_code != CODE_64BIT && !object_64bit)
 	exp->X_add_number = extend_to_32bit_address (exp->X_add_number);
     }
-#if (defined (OBJ_AOUT) || defined (OBJ_MAYBE_AOUT))
-  else if (OUTPUT_FLAVOR == bfd_target_aout_flavour
-	   && exp_seg != absolute_section
+#ifdef OBJ_AOUT
+  else if (exp_seg != absolute_section
 	   && exp_seg != text_section
 	   && exp_seg != data_section
 	   && exp_seg != bss_section
@@ -14075,9 +14709,8 @@ i386_finalize_displacement (segT exp_seg ATTRIBUTE_UNUSED, expressionS *exp,
 	exp->X_add_number = extend_to_32bit_address (exp->X_add_number);
     }
 
-#if (defined (OBJ_AOUT) || defined (OBJ_MAYBE_AOUT))
-  else if (OUTPUT_FLAVOR == bfd_target_aout_flavour
-	   && exp_seg != absolute_section
+#ifdef OBJ_AOUT
+  else if (exp_seg != absolute_section
 	   && exp_seg != text_section
 	   && exp_seg != data_section
 	   && exp_seg != bss_section
@@ -14758,7 +15391,7 @@ i386_frag_max_var (fragS *frag)
   return TYPE_FROM_RELAX_STATE (frag->fr_subtype) == UNCOND_JUMP ? 4 : 5;
 }
 
-#if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
+#ifdef OBJ_ELF
 static int
 elf_symbol_resolved_in_segment_p (symbolS *fr_symbol, offsetT fr_var)
 {
@@ -15216,14 +15849,12 @@ md_estimate_size_before_relax (fragS *fragP, segT segment)
      an externally visible symbol, because it may be overridden by a
      shared library.  */
   if (S_GET_SEGMENT (fragP->fr_symbol) != segment
-#if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
-      || (IS_ELF
-	  && !elf_symbol_resolved_in_segment_p (fragP->fr_symbol,
-						fragP->fr_var))
+#ifdef OBJ_ELF
+      || !elf_symbol_resolved_in_segment_p (fragP->fr_symbol,
+					    fragP->fr_var)
 #endif
 #if defined (OBJ_COFF) && defined (TE_PE)
-      || (OUTPUT_FLAVOR == bfd_target_coff_flavour
-	  && S_IS_WEAK (fragP->fr_symbol))
+      || S_IS_WEAK (fragP->fr_symbol)
 #endif
       )
     {
@@ -15239,7 +15870,7 @@ md_estimate_size_before_relax (fragS *fragP, segT segment)
 	reloc_type = (enum bfd_reloc_code_real) fragP->fr_var;
       else if (size == 2)
 	reloc_type = BFD_RELOC_16_PCREL;
-#if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
+#ifdef OBJ_ELF
       else if (fragP->tc_frag_data.code == CODE_64BIT
 	       && fragP->fr_offset == 0
 	       && need_plt32_p (fragP->fr_symbol))
@@ -15590,30 +16221,22 @@ md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
 	 This covers for the fact that bfd_install_relocation will
 	 subtract the current location (for partial_inplace, PC relative
 	 relocations); see more below.  */
-#ifndef OBJ_AOUT
-      if (IS_ELF
-#ifdef TE_PE
-	  || OUTPUT_FLAVOR == bfd_target_coff_flavour
-#endif
-	  )
-	value += fixP->fx_where + fixP->fx_frag->fr_address;
+#if defined (OBJ_ELF) || defined (TE_PE)
+      value += fixP->fx_where + fixP->fx_frag->fr_address;
 #endif
-#if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
-      if (IS_ELF)
-	{
-	  segT sym_seg = S_GET_SEGMENT (fixP->fx_addsy);
+#ifdef OBJ_ELF
+      segT sym_seg = S_GET_SEGMENT (fixP->fx_addsy);
 
-	  if ((sym_seg == seg
-	       || (symbol_section_p (fixP->fx_addsy)
-		   && sym_seg != absolute_section))
-	      && !generic_force_reloc (fixP))
-	    {
-	      /* Yes, we add the values in twice.  This is because
-		 bfd_install_relocation subtracts them out again.  I think
-		 bfd_install_relocation is broken, but I don't dare change
-		 it.  FIXME.  */
-	      value += fixP->fx_where + fixP->fx_frag->fr_address;
-	    }
+      if ((sym_seg == seg
+	   || (symbol_section_p (fixP->fx_addsy)
+	       && sym_seg != absolute_section))
+	  && !generic_force_reloc (fixP))
+	{
+	  /* Yes, we add the values in twice.  This is because
+	     bfd_install_relocation subtracts them out again.  I think
+	     bfd_install_relocation is broken, but I don't dare change
+	     it.  FIXME.  */
+	  value += fixP->fx_where + fixP->fx_frag->fr_address;
 	}
 #endif
 #if defined (OBJ_COFF) && defined (TE_PE)
@@ -15646,8 +16269,8 @@ md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
 
   /* Fix a few things - the dynamic linker expects certain values here,
      and we must not disappoint it.  */
-#if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
-  if (IS_ELF && fixP->fx_addsy)
+#ifdef OBJ_ELF
+  if (fixP->fx_addsy)
     switch (fixP->fx_r_type)
       {
       case BFD_RELOC_386_PLT32:
@@ -15699,7 +16322,7 @@ md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
       default:
 	break;
       }
-#endif /* defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)  */
+#endif /* OBJ_ELF  */
 
   /* If not 64bit, massage value, to account for wraparound when !BFD64.  */
   if (!object_64bit)
@@ -16130,7 +16753,7 @@ bool i386_record_operator (operatorT op,
 }
 #endif
 
-#if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
+#ifdef OBJ_ELF
 const char *md_shortopts = "kVQ:sqnO::";
 #else
 const char *md_shortopts = "qnO::";
@@ -16171,16 +16794,19 @@ const char *md_shortopts = "qnO::";
 #define OPTION_MLFENCE_BEFORE_INDIRECT_BRANCH (OPTION_MD_BASE + 32)
 #define OPTION_MLFENCE_BEFORE_RET (OPTION_MD_BASE + 33)
 #define OPTION_MUSE_UNALIGNED_VECTOR_MOVE (OPTION_MD_BASE + 34)
+#define OPTION_MTLS_CHECK (OPTION_MD_BASE + 35)
 
 struct option md_longopts[] =
 {
   {"32", no_argument, NULL, OPTION_32},
-#if (defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF) \
-     || defined (TE_PE) || defined (TE_PEP) || defined (OBJ_MACH_O))
+#if (defined (OBJ_ELF) || defined (TE_PE) || defined (OBJ_MACH_O)) \
+    && defined (BFD64)
   {"64", no_argument, NULL, OPTION_64},
 #endif
-#if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
+#ifdef OBJ_ELF
+# ifdef BFD64
   {"x32", no_argument, NULL, OPTION_X32},
+# endif
   {"mshared", no_argument, NULL, OPTION_MSHARED},
   {"mx86-used-note", required_argument, NULL, OPTION_X86_USED_NOTE},
 #endif
@@ -16217,6 +16843,7 @@ struct option md_longopts[] =
   {"mlfence-before-ret", required_argument, NULL, OPTION_MLFENCE_BEFORE_RET},
   {"mamd64", no_argument, NULL, OPTION_MAMD64},
   {"mintel64", no_argument, NULL, OPTION_MINTEL64},
+  {"mtls-check", required_argument, NULL, OPTION_MTLS_CHECK},
   {NULL, no_argument, NULL, 0}
 };
 size_t md_longopts_size = sizeof (md_longopts);
@@ -16237,7 +16864,7 @@ md_parse_option (int c, const char *arg)
       quiet_warnings = 1;
       break;
 
-#if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
+#ifdef OBJ_ELF
       /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
 	 should be emitted or not.  FIXME: Not implemented.  */
     case 'Q':
@@ -16271,11 +16898,11 @@ md_parse_option (int c, const char *arg)
       else
         as_fatal (_("invalid -mx86-used-note= option: `%s'"), arg);
       break;
+#endif
 
+#ifdef BFD64
 
-#endif
-#if (defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF) \
-     || defined (TE_PE) || defined (TE_PEP) || defined (OBJ_MACH_O))
+#if (defined (OBJ_ELF) || defined (TE_PE) || defined (OBJ_MACH_O))
     case OPTION_64:
       {
 	const char **list, **l;
@@ -16298,28 +16925,27 @@ md_parse_option (int c, const char *arg)
       break;
 #endif
 
-#if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
+#ifdef OBJ_ELF
     case OPTION_X32:
-      if (IS_ELF)
-	{
-	  const char **list, **l;
+      {
+	const char **list, **l;
 
-	  list = bfd_target_list ();
-	  for (l = list; *l != NULL; l++)
-	    if (startswith (*l, "elf32-x86-64"))
-	      {
-		default_arch = "x86_64:32";
-		break;
-	      }
-	  if (*l == NULL)
-	    as_fatal (_("no compiled in support for 32bit x86_64"));
-	  free (list);
-	}
-      else
-	as_fatal (_("32bit x86_64 is only supported for ELF"));
+	list = bfd_target_list ();
+	for (l = list; *l != NULL; l++)
+	  if (startswith (*l, "elf32-x86-64"))
+	    {
+	      default_arch = "x86_64:32";
+	      break;
+	    }
+	if (*l == NULL)
+	  as_fatal (_("no compiled in support for 32bit x86_64"));
+	free (list);
+      }
       break;
 #endif
 
+#endif /* BFD64 */
+
     case OPTION_32:
       {
 	const char **list, **l;
@@ -16773,6 +17399,14 @@ md_parse_option (int c, const char *arg)
 	  optimize_for_space = 0;
 	}
       break;
+    case OPTION_MTLS_CHECK:
+      if (strcasecmp (arg, "yes") == 0)
+	tls_check = true;
+      else if (strcasecmp (arg, "no") == 0)
+	tls_check = false;
+      else
+	as_fatal (_("invalid -mtls-check= option: `%s'"), arg);
+      break;
 
     default:
       return 0;
@@ -16896,7 +17530,7 @@ show_arch (FILE *stream, int ext, int check)
 void
 md_show_usage (FILE *stream)
 {
-#if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
+#ifdef OBJ_ELF
   fprintf (stream, _("\
   -Qy, -Qn                ignored\n\
   -V                      print assembler version number\n\
@@ -16906,12 +17540,12 @@ md_show_usage (FILE *stream)
   -n                      do not optimize code alignment\n\
   -O{012s}                attempt some code optimizations\n\
   -q                      quieten some warnings\n"));
-#if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
+#ifdef OBJ_ELF
   fprintf (stream, _("\
   -s                      ignored\n"));
 #endif
 #ifdef BFD64
-# if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
+# ifdef OBJ_ELF
   fprintf (stream, _("\
   --32/--64/--x32         generate 32bit/64bit/x32 object\n"));
 # elif defined (TE_PE) || defined (TE_PEP) || defined (OBJ_MACH_O)
@@ -16984,7 +17618,7 @@ md_show_usage (FILE *stream)
   -mnaked-reg             don't require `%%' prefix for registers\n"));
   fprintf (stream, _("\
   -madd-bnd-prefix        add BND prefix for all valid branches\n"));
-#if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
+#ifdef OBJ_ELF
   fprintf (stream, _("\
   -mshared                disable branch optimization for shared code\n"));
   fprintf (stream, _("\
@@ -17015,6 +17649,16 @@ md_show_usage (FILE *stream)
     fprintf (stream, _("(default: no)\n"));
   fprintf (stream, _("\
                           generate relax relocations\n"));
+#ifdef OBJ_ELF
+  fprintf (stream, _("\
+  -mtls-check=[no|yes] "));
+  if (DEFAULT_X86_TLS_CHECK)
+    fprintf (stream, _("(default: yes)\n"));
+  else
+    fprintf (stream, _("(default: no)\n"));
+  fprintf (stream, _("\
+                          check TLS relocation\n"));
+#endif
   fprintf (stream, _("\
   -malign-branch-boundary=NUM (default: 0)\n\
                           align branches within NUM byte boundary\n"));
@@ -17044,9 +17688,7 @@ md_show_usage (FILE *stream)
   -mintel64               accept only Intel64 ISA\n"));
 }
 
-#if ((defined (OBJ_MAYBE_COFF) && defined (OBJ_MAYBE_AOUT)) \
-     || defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF) \
-     || defined (TE_PE) || defined (TE_PEP) || defined (OBJ_MACH_O))
+#if (defined (OBJ_ELF) || defined (TE_PE) || defined (OBJ_MACH_O))
 
 /* Pick the target format to use.  */
 
@@ -17056,7 +17698,7 @@ i386_target_format (void)
   if (startswith (default_arch, "x86_64"))
     {
       update_code_flag (CODE_64BIT, 1);
-#if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
+#ifdef OBJ_ELF
       if (default_arch[6] == '\0')
 	x86_elf_abi = X86_64_ABI;
       else
@@ -17087,8 +17729,8 @@ i386_target_format (void)
   else
     as_fatal (_("unknown architecture"));
 
-#if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
-  if (IS_ELF && flag_synth_cfi && x86_elf_abi != X86_64_ABI)
+#ifdef OBJ_ELF
+  if (flag_synth_cfi && x86_elf_abi != X86_64_ABI)
     as_fatal (_("SCFI is not supported for this ABI"));
 #endif
 
@@ -17097,12 +17739,7 @@ i386_target_format (void)
 
   switch (OUTPUT_FLAVOR)
     {
-#if defined (OBJ_MAYBE_AOUT) || defined (OBJ_AOUT)
-    case bfd_target_aout_flavour:
-      return AOUT_TARGET_FORMAT;
-#endif
-#if defined (OBJ_MAYBE_COFF) || defined (OBJ_COFF)
-# if defined (TE_PE) || defined (TE_PEP)
+#ifdef TE_PE
     case bfd_target_coff_flavour:
       if (flag_code == CODE_64BIT)
 	{
@@ -17110,15 +17747,8 @@ i386_target_format (void)
 	  return use_big_obj ? "pe-bigobj-x86-64" : "pe-x86-64";
 	}
       return use_big_obj ? "pe-bigobj-i386" : "pe-i386";
-# elif defined (TE_GO32)
-    case bfd_target_coff_flavour:
-      return "coff-go32";
-# else
-    case bfd_target_coff_flavour:
-      return "coff-i386";
-# endif
 #endif
-#if defined (OBJ_MAYBE_ELF) || defined (OBJ_ELF)
+#ifdef OBJ_ELF
     case bfd_target_elf_flavour:
       {
 	const char *format;
@@ -17176,7 +17806,7 @@ i386_target_format (void)
     }
 }
 
-#endif /* OBJ_MAYBE_ more than one  */
+#endif /* ELF / PE / MACH_O  */
 
 symbolS *
 md_undefined_symbol (char *name)
@@ -17198,26 +17828,20 @@ md_undefined_symbol (char *name)
   return 0;
 }
 
-#if defined (OBJ_AOUT) || defined (OBJ_MAYBE_AOUT)
+#ifdef OBJ_AOUT
 /* Round up a section size to the appropriate boundary.  */
 
 valueT
 md_section_align (segT segment, valueT size)
 {
-  if (OUTPUT_FLAVOR == bfd_target_aout_flavour)
-    {
-      /* For a.out, force the section size to be aligned.  If we don't do
-	 this, BFD will align it for us, but it will not write out the
-	 final bytes of the section.  This may be a bug in BFD, but it is
-	 easier to fix it here since that is how the other a.out targets
-	 work.  */
-      int align;
-
-      align = bfd_section_alignment (segment);
-      size = ((size + (1 << align) - 1) & (-((valueT) 1 << align)));
-    }
-
-  return size;
+  /* For a.out, force the section size to be aligned.  If we don't do
+     this, BFD will align it for us, but it will not write out the
+     final bytes of the section.  This may be a bug in BFD, but it is
+     easier to fix it here since that is how the other a.out targets
+     work.  */
+  int align = bfd_section_alignment (segment);
+
+  return ((size + (1 << align) - 1) & (-((valueT) 1 << align)));
 }
 #endif
 
@@ -17275,10 +17899,10 @@ i386_validate_fix (fixS *fixp)
       return 0;
     }
 
-#if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
+#ifdef OBJ_ELF
   if (fixp->fx_r_type == BFD_RELOC_SIZE32
       || fixp->fx_r_type == BFD_RELOC_SIZE64)
-    return IS_ELF && fixp->fx_addsy
+    return fixp->fx_addsy
 	   && (!S_IS_DEFINED (fixp->fx_addsy)
 	       || S_IS_EXTERNAL (fixp->fx_addsy));
 
@@ -17313,7 +17937,7 @@ i386_validate_fix (fixS *fixp)
 	    {
 	      if (!object_64bit)
 		abort ();
-#if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
+#ifdef OBJ_ELF
 	      if (fixp->fx_tcbit)
 		fixp->fx_r_type = BFD_RELOC_X86_64_GOTPCRELX;
 	      else if (fixp->fx_tcbit2)
@@ -17334,13 +17958,17 @@ i386_validate_fix (fixS *fixp)
 	  fixp->fx_subsy = 0;
 	}
     }
-#if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
+#ifdef OBJ_ELF
   else
     {
       /* NB: Commit 292676c1 resolved PLT32 reloc aganst local symbol
 	 to section.  Since PLT32 relocation must be against symbols,
-	 turn such PLT32 relocation into PC32 relocation.  */
+	 turn such PLT32 relocation into PC32 relocation.  NB: We can
+	 turn PLT32 relocation into PC32 relocation only for PC-relative
+	 relocations since non-PC-relative relocations need PLT entries.
+       */
       if (fixp->fx_addsy
+	  && fixp->fx_pcrel
 	  && (fixp->fx_r_type == BFD_RELOC_386_PLT32
 	      || fixp->fx_r_type == BFD_RELOC_X86_64_PLT32)
 	  && symbol_section_p (fixp->fx_addsy))
@@ -17365,7 +17993,7 @@ tc_gen_reloc (asection *section ATTRIBUTE_UNUSED, fixS *fixp)
 
   switch (fixp->fx_r_type)
     {
-#if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
+#ifdef OBJ_ELF
       symbolS *sym;
 
     case BFD_RELOC_SIZE32:
@@ -17382,7 +18010,7 @@ tc_gen_reloc (asection *section ATTRIBUTE_UNUSED, fixS *fixp)
 	sym = fixp->fx_subsy;
       else
 	sym = NULL;
-      if (IS_ELF && sym && S_IS_DEFINED (sym) && !S_IS_EXTERNAL (sym))
+      if (sym && S_IS_DEFINED (sym) && !S_IS_EXTERNAL (sym))
 	{
 	  /* Resolve size relocation against local symbol to size of
 	     the symbol plus addend.  */
@@ -17660,7 +18288,7 @@ tc_x86_frame_initial_instructions (void)
 int
 x86_dwarf2_addr_size (void)
 {
-#if defined (OBJ_MAYBE_ELF) || defined (OBJ_ELF)
+#ifdef OBJ_ELF
   if (x86_elf_abi == X86_64_X32_ABI)
     return 4;
 #endif
@@ -17680,7 +18308,7 @@ tc_pe_dwarf2_emit_offset (symbolS *symbol, unsigned int size)
 }
 #endif
 
-#if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
+#ifdef OBJ_ELF
 int
 i386_elf_section_type (const char *str, size_t len)
 {
@@ -17789,4 +18417,4 @@ handle_large_common (int small ATTRIBUTE_UNUSED)
       bss_section = saved_bss_section;
     }
 }
-#endif /* OBJ_ELF || OBJ_MAYBE_ELF */
+#endif /* OBJ_ELF */
diff --git a/gas/config/tc-i386.h b/gas/config/tc-i386.h
index cda7166..5ee6694 100644
--- a/gas/config/tc-i386.h
+++ b/gas/config/tc-i386.h
@@ -84,9 +84,7 @@ extern unsigned long i386_mach (void);
 #define ELF_TARGET_IAMCU_FORMAT	"elf32-iamcu"
 #endif
 
-#if ((defined (OBJ_MAYBE_COFF) && defined (OBJ_MAYBE_AOUT)) \
-     || defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF) \
-     || defined (TE_PE) || defined (TE_PEP) || defined (OBJ_MACH_O))
+#if (defined (OBJ_ELF) || defined (TE_PE) || defined (OBJ_MACH_O))
 extern const char *i386_target_format (void);
 #define TARGET_FORMAT i386_target_format ()
 #else
@@ -141,7 +139,7 @@ int i386_validate_fix (struct fix *);
     if (!i386_validate_fix(FIX)) goto SKIP;      \
   } while (0)
 
-#if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
+#ifdef OBJ_ELF
 #define tc_fix_adjustable(X)  tc_i386_fix_adjustable(X)
 extern int tc_i386_fix_adjustable (struct fix *);
 #else
@@ -233,7 +231,7 @@ if ((n)									\
 extern void i386_cons_align (int);
 #define md_cons_align(nbytes) i386_cons_align (nbytes)
 
-#if !defined (OBJ_AOUT) && !defined (OBJ_MAYBE_AOUT)
+#ifndef OBJ_AOUT
 #define md_section_align(seg, value) ((void)(seg), (value))
 #endif
 
@@ -426,7 +424,7 @@ extern void i386_solaris_fix_up_eh_frame (segT);
 extern bfd_vma x86_64_section_letter (int, const char **);
 #define md_elf_section_letter(LETTER, PTR_MSG)	x86_64_section_letter (LETTER, PTR_MSG)
 
-#if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
+#ifdef OBJ_ELF
 extern void x86_cleanup (void);
 #define md_cleanup() x86_cleanup ()
 
diff --git a/gas/config/tc-loongarch.c b/gas/config/tc-loongarch.c
index 5ca33c6..eee2bad 100644
--- a/gas/config/tc-loongarch.c
+++ b/gas/config/tc-loongarch.c
@@ -1078,34 +1078,34 @@ check_this_insn_before_appending (struct loongarch_cl_insn *ip)
       ip->reloc_info[ip->reloc_num].value = const_0;
       ip->reloc_num++;
     }
-  else if (ip->insn->mask == 0xffff8000
-	   /* amcas.b  rd, rk, rj  */
-	   && ((ip->insn_bin & 0xfff80000) == 0x38580000
-	       /* amswap.w  rd, rk, rj  */
-	       || (ip->insn_bin & 0xfff00000) == 0x38600000
-	       /* ammax_db.wu  rd, rk, rj  */
-	       || (ip->insn_bin & 0xffff0000) == 0x38700000
-	       /* ammin_db.wu  rd, rk, rj  */
-	       || (ip->insn_bin & 0xffff0000) == 0x38710000))
+  /* check all atomic memory insns */
+  else if (ip->insn->mask == LARCH_MK_ATOMIC_MEM
+	   && LARCH_INSN_ATOMIC_MEM(ip->insn_bin))
     {
       /* For AMO insn amswap.[wd], amadd.[wd], etc.  */
       if (ip->args[0] != 0
 	  && (ip->args[0] == ip->args[1] || ip->args[0] == ip->args[2]))
-	as_bad (_("automic memory operations insns require rd != rj"
+	as_bad (_("atomic memory operations insns require rd != rj"
 		  " && rd != rk when rd isn't r0"));
     }
-  else if ((ip->insn->mask == 0xffe08000
-	    /* bstrins.w  rd, rj, msbw, lsbw  */
-	    && (ip->insn_bin & 0xffe00000) == 0x00600000)
-	   || (ip->insn->mask == 0xffc00000
-	       /* bstrins.d  rd, rj, msbd, lsbd  */
-	       && (ip->insn_bin & 0xff800000) == 0x00800000))
+  else if ((ip->insn->mask == LARCH_MK_BSTRINS_W
+	    /* bstr(ins|pick).w  rd, rj, msbw, lsbw  */
+	    && (LARCH_INSN_BSTRINS_W(ip->insn_bin)
+		|| LARCH_INSN_BSTRPICK_W(ip->insn_bin)))
+	   || (ip->insn->mask == LARCH_MK_BSTRINS_D
+	       /* bstr(ins|pick).d  rd, rj, msbd, lsbd  */
+	       && (LARCH_INSN_BSTRINS_D(ip->insn_bin)
+		   || LARCH_INSN_BSTRPICK_D(ip->insn_bin))))
     {
       /* For bstr(ins|pick).[wd].  */
       if (ip->args[2] < ip->args[3])
 	as_bad (_("bstr(ins|pick).[wd] require msbd >= lsbd"));
     }
-  else if (ip->insn->mask != 0 && (ip->insn_bin & 0xfe0003c0) == 0x04000000
+  else if (ip->insn->mask != 0
+	   && (LARCH_INSN_CSRXCHG(ip->insn_bin)
+	       || LARCH_INSN_GCSRXCHG(ip->insn_bin))
+	   && (LARCH_GET_RJ(ip->insn_bin) == 0
+	       || LARCH_GET_RJ(ip->insn_bin) == 1)
 	   /* csrxchg  rd, rj, csr_num  */
 	   && (strcmp ("csrxchg", ip->name) == 0
 	       || strcmp ("gcsrxchg", ip->name) == 0))
@@ -1221,6 +1221,9 @@ append_fixp_and_insn (struct loongarch_cl_insn *ip)
 					 bfd_get_reloc_size (howto),
 					 &reloc_info[i].value, FALSE, r_type);
 	    }
+	  /* Allow LoongArch 64 to use 64-bit addends.  */
+	  if (LARCH_opts.ase_lp64)
+	    ip->fixp[i]->fx_no_overflow = 1;
 	}
     }
 
@@ -2204,7 +2207,7 @@ loongarch_convert_frag_branch (fragS *fragp)
     case RELAX_BRANCH_26:
       insn = bfd_getl32 (buf);
       /* Invert the branch condition.  */
-      if (LARCH_FLOAT_BRANCH == (insn & LARCH_BRANCH_OPCODE_MASK))
+      if (LARCH_INSN_FLOAT_BRANCH(insn))
 	insn ^= LARCH_FLOAT_BRANCH_INVERT_BIT;
       else
 	insn ^= LARCH_BRANCH_INVERT_BIT;
diff --git a/gas/config/tc-m32r.h b/gas/config/tc-m32r.h
index 4d26940..9463865 100644
--- a/gas/config/tc-m32r.h
+++ b/gas/config/tc-m32r.h
@@ -42,6 +42,9 @@ extern const char *m32r_target_format (void);
 /* Permit temporary numeric labels.  */
 #define LOCAL_LABELS_FB 1
 
+/* '||' denotes parallel instruction */
+#define DOUBLEBAR_PARALLEL
+
 #define DIFF_EXPR_OK		/* .-foo gets turned into PC relative relocs.  */
 
 /* We don't need to handle .word strangely.  */
diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c
index 28d3ed8..576ef1f 100644
--- a/gas/config/tc-mips.c
+++ b/gas/config/tc-mips.c
@@ -10831,13 +10831,10 @@ macro (struct mips_cl_insn *ip, char *str)
       if (mips_opts.micromips)
 	micromips_label_expr (&label_expr);
       else
-	label_expr.X_add_number = (mips_use_trap ()
-				   ? (dbl ? 12 : 8) : (dbl ? 20 : 16));
+	label_expr.X_add_number = mips_use_trap () ? 8 : 16;
       macro_build (&label_expr, "bne", "s,t,p", op[2], AT);
       if (dbl)
 	{
-	  expr1.X_add_number = 1;
-	  load_register (AT, &expr1, dbl);
 	  macro_build (NULL, "dsll32", SHFT_FMT, AT, AT, 31);
 	}
       else
diff --git a/gas/config/tc-msp430.h b/gas/config/tc-msp430.h
index 0c2565e..f28dcb7 100644
--- a/gas/config/tc-msp430.h
+++ b/gas/config/tc-msp430.h
@@ -99,7 +99,7 @@
 
 /* Support symbols like: C$$IO$$.  */
 #undef  LEX_DOLLAR
-#define LEX_DOLLAR 1
+#define LEX_DOLLAR LEX_NAME
 
 #define TC_IMPLICIT_LCOMM_ALIGNMENT(SIZE, P2VAR) (P2VAR) = 0
 /*   An `.lcomm' directive with no explicit alignment parameter will
diff --git a/gas/config/tc-ppc.h b/gas/config/tc-ppc.h
index a65d1e3..ddc018c 100644
--- a/gas/config/tc-ppc.h
+++ b/gas/config/tc-ppc.h
@@ -149,7 +149,7 @@ struct ppc_tc_sy
 #define OBJ_COFF_MAX_AUXENTRIES 4
 
 /* Square and curly brackets are permitted in symbol names.  */
-#define LEX_BR 3
+#define LEX_BR (LEX_BEGIN_NAME | LEX_NAME)
 
 /* Canonicalize the symbol name.  */
 #define tc_canonicalize_symbol_name(name) ppc_canonicalize_symbol_name (name)
diff --git a/gas/config/tc-pru.c b/gas/config/tc-pru.c
index 99a3c1e..fb158fb 100644
--- a/gas/config/tc-pru.c
+++ b/gas/config/tc-pru.c
@@ -1401,6 +1401,7 @@ pru_parse_args (pru_insn_infoS *insn ATTRIBUTE_UNUSED, char *argstr,
   char *p;
   char *end = NULL;
   int i;
+  size_t len;
   p = argstr;
   i = 0;
   bool terminate = false;
@@ -1437,6 +1438,13 @@ pru_parse_args (pru_insn_infoS *insn ATTRIBUTE_UNUSED, char *argstr,
 	    as_bad (_("too many arguments"));
 	}
 
+      /* Strip trailing whitespace.  */
+      len = strlen (parsed_args[i]);
+      for (char *temp = parsed_args[i] + len - 1;
+	   len && ISSPACE (*temp);
+	   temp--, len--)
+	*temp = '\0';
+
       if (*parsestr == '\0' || (p != NULL && *p == '\0'))
 	terminate = true;
       ++i;
diff --git a/gas/config/tc-riscv.c b/gas/config/tc-riscv.c
index c09bd42..ef455e4 100644
--- a/gas/config/tc-riscv.c
+++ b/gas/config/tc-riscv.c
@@ -81,6 +81,7 @@ enum riscv_csr_class
   CSR_CLASS_SMCSRIND,		/* Smcsrind */
   CSR_CLASS_SMCNTRPMF,		/* Smcntrpmf */
   CSR_CLASS_SMCNTRPMF_32,	/* Smcntrpmf, rv32 only */
+  CSR_CLASS_SMRNMI,		/* Smrnmi */
   CSR_CLASS_SMSTATEEN,		/* Smstateen only */
   CSR_CLASS_SMSTATEEN_32,	/* Smstateen RV32 only */
   CSR_CLASS_SSAIA,		/* Ssaia */
@@ -162,6 +163,7 @@ struct riscv_ip_error
 
 static const char default_arch[] = DEFAULT_ARCH;
 static const char *default_arch_with_ext = DEFAULT_RISCV_ARCH_WITH_EXT;
+static const char *file_arch_str = NULL;
 static enum riscv_spec_class default_isa_spec = ISA_SPEC_CLASS_NONE;
 static enum riscv_spec_class default_priv_spec = PRIV_SPEC_CLASS_NONE;
 
@@ -183,6 +185,9 @@ static enum float_abi float_abi = FLOAT_ABI_DEFAULT;
 
 static unsigned elf_flags = 0;
 
+/* Indicate whether we are already assembling any instructions.  */
+static bool start_assemble = false;
+
 static bool probing_insn_operands;
 
 /* Set the default_isa_spec.  Return 0 if the spec isn't supported.
@@ -280,6 +285,16 @@ riscv_set_rvc (bool rvc_value)
   if (rvc_value)
     elf_flags |= EF_RISCV_RVC;
 
+  if (start_assemble && subseg_text_p (now_seg)
+      && riscv_opts.rvc && !rvc_value)
+    {
+      struct riscv_segment_info_type *info
+	= &seg_info(now_seg)->tc_segment_info_data;
+
+      info->last_insn16 = true;
+      info->rvc = rvc_value;
+    }
+
   riscv_opts.rvc = rvc_value;
 }
 
@@ -305,15 +320,17 @@ static riscv_parse_subset_t riscv_rps_as =
   true,			/* check_unknown_prefixed_ext.  */
 };
 
-/* Update the architecture string in the subset_list.  */
+/* Update file/function-level architecture string according to the
+   subset_list.  */
 
 static void
-riscv_reset_subsets_list_arch_str (void)
+riscv_set_arch_str (const char **arch_str_p)
 {
   riscv_subset_list_t *subsets = riscv_rps_as.subset_list;
-  if (subsets->arch_str != NULL)
-    free ((void *) subsets->arch_str);
-  subsets->arch_str = riscv_arch_str (xlen, subsets);
+  const char *arch_str = *arch_str_p;
+  if (arch_str != NULL)
+    free ((void *) arch_str);
+  *arch_str_p = riscv_arch_str (xlen, subsets);
 }
 
 /* This structure is used to hold a stack of .option values.  */
@@ -347,12 +364,11 @@ riscv_set_arch (const char *s)
     }
   riscv_release_subset_list (riscv_rps_as.subset_list);
   riscv_parse_subset (&riscv_rps_as, s);
-  riscv_reset_subsets_list_arch_str ();
+  riscv_set_arch_str (&file_arch_str);
+  riscv_set_arch_str (&riscv_rps_as.subset_list->arch_str);
 
-  riscv_set_rvc (false);
-  if (riscv_subset_supports (&riscv_rps_as, "c")
-      || riscv_subset_supports (&riscv_rps_as, "zca"))
-    riscv_set_rvc (true);
+  riscv_set_rvc (riscv_subset_supports (&riscv_rps_as, "c")
+		 || riscv_subset_supports (&riscv_rps_as, "zca"));
 
   if (riscv_subset_supports (&riscv_rps_as, "ztso"))
     riscv_set_tso ();
@@ -452,9 +468,6 @@ const char EXP_CHARS[] = "eE";
    As in 0f12.456 or 0d1.2345e12.  */
 const char FLT_CHARS[] = "rRsSfFdDxXpPhH";
 
-/* Indicate we are already assemble any instructions or not.  */
-static bool start_assemble = false;
-
 /* Indicate ELF attributes are explicitly set.  */
 static bool explicit_attr = false;
 
@@ -566,19 +579,19 @@ make_mapping_symbol (enum riscv_seg_mstate state,
     }
   frag->tc_frag_data.last_map_symbol = symbol;
 
-  if (removed == NULL)
-    return;
-
   if (odd_data_padding)
     {
       /* If the removed mapping symbol is $x+arch, then add it back to
 	 the next $x.  */
-      const char *str = strncmp (S_GET_NAME (removed), "$xrv", 4) == 0
+      const char *str = removed != NULL
+			&& strncmp (S_GET_NAME (removed), "$xrv", 4) == 0
 			? S_GET_NAME (removed) + 2 : NULL;
       make_mapping_symbol (MAP_INSN, frag->fr_fix + 1, frag, str,
 			   false/* odd_data_padding */);
     }
-  symbol_remove (removed, &symbol_rootP, &symbol_lastP);
+
+  if (removed != NULL)
+    symbol_remove (removed, &symbol_rootP, &symbol_lastP);
 }
 
 /* Set the mapping state for frag_now.  */
@@ -622,6 +635,7 @@ riscv_mapping_state (enum riscv_seg_mstate to_state,
 
   valueT value = (valueT) (frag_now_fix () - max_chars);
   seg_info (now_seg)->tc_segment_info_data.map_state = to_state;
+  seg_info (now_seg)->tc_segment_info_data.last_insn16 = false;
   const char *arch_str = reset_seg_arch_str
 			 ? riscv_rps_as.subset_list->arch_str : NULL;
   make_mapping_symbol (to_state, value, frag_now, arch_str,
@@ -1078,6 +1092,9 @@ riscv_csr_address (const char *csr_name,
       need_check_version = true;
       extension = "smcntrpmf";
       break;
+    case CSR_CLASS_SMRNMI:
+      extension = "smrnmi";
+      break;
     case CSR_CLASS_SMSTATEEN_32:
       is_rv32_only = true;
       /* Fall through.  */
@@ -1622,6 +1639,9 @@ validate_riscv_insn (const struct riscv_opcode *opc, int length)
 	    case 'c':
 	      switch (*++oparg)
 		{
+		/* sreg operators in cm.mvsa01 and cm.mva01s.  */
+		case '1': USE_BITS (OP_MASK_SREG1, OP_SH_SREG1); break;
+		case '2': USE_BITS (OP_MASK_SREG2, OP_SH_SREG2); break;
 		/* byte immediate operators, load/store byte insns.  */
 		case 'h': used_bits |= ENCODE_ZCB_HALFWORD_UIMM (-1U); break;
 		/* halfword immediate operators, load/store halfword insns.  */
@@ -1688,6 +1708,19 @@ validate_riscv_insn (const struct riscv_opcode *opc, int length)
 		  case '3':
 		    used_bits |= ENCODE_CV_IS3_UIMM5 (-1U);
 		    break;
+		  case '5':
+		    used_bits |= ENCODE_CV_SIMD_IMM6(-1U);
+		    break;
+		  case '6':
+		    used_bits |= ENCODE_CV_BITMANIP_UIMM5(-1U);
+		    break;
+		  case '7':
+		    used_bits |= ENCODE_CV_BITMANIP_UIMM2(-1U);
+		    break;
+		  case '8':
+		    used_bits |= ENCODE_CV_SIMD_UIMM6(-1U);
+		    ++oparg;
+		    break;
 		  default:
 		    goto unknown_validate_operand;
 		}
@@ -3882,6 +3915,18 @@ riscv_ip (char *str, struct riscv_cl_insn *ip, expressionS *imm_expr,
 		      asarg = expr_parse_end;
 		      imm_expr->X_op = O_absent;
 		      continue;
+		    case '1':
+		      if (!reg_lookup (&asarg, RCLASS_GPR, &regno)
+			  || !RISCV_SREG_0_7 (regno))
+			break;
+		      INSERT_OPERAND (SREG1, *ip, regno % 8);
+		      continue;
+		    case '2':
+		      if (!reg_lookup (&asarg, RCLASS_GPR, &regno)
+			  || !RISCV_SREG_0_7 (regno))
+			break;
+		      INSERT_OPERAND (SREG2, *ip, regno % 8);
+		      continue;
 		    default:
 		      goto unknown_riscv_ip_operand;
 		    }
@@ -3996,6 +4041,59 @@ riscv_ip (char *str, struct riscv_cl_insn *ip, expressionS *imm_expr,
 			ip->insn_opcode
 			    |= ENCODE_CV_IS2_UIMM5 (imm_expr->X_add_number);
 			continue;
+		      case '5':
+			my_getExpression (imm_expr, asarg);
+			check_absolute_expr (ip, imm_expr, FALSE);
+			asarg = expr_parse_end;
+			if (imm_expr->X_add_number < -32
+			    || imm_expr->X_add_number > 31)
+			  break;
+			ip->insn_opcode
+			    |= ENCODE_CV_SIMD_IMM6 (imm_expr->X_add_number);
+			continue;
+		      case '6':
+			my_getExpression (imm_expr, asarg);
+			check_absolute_expr (ip, imm_expr, FALSE);
+			asarg = expr_parse_end;
+			if (imm_expr->X_add_number < 0
+			    || imm_expr->X_add_number > 31)
+			  break;
+			ip->insn_opcode
+			    |= ENCODE_CV_BITMANIP_UIMM5 (imm_expr->X_add_number);
+			continue;
+		      case '7':
+			my_getExpression (imm_expr, asarg);
+			check_absolute_expr (ip, imm_expr, FALSE);
+			asarg = expr_parse_end;
+			if (imm_expr->X_add_number < 0
+			    || imm_expr->X_add_number > 3)
+			  break;
+			ip->insn_opcode
+			    |= ENCODE_CV_BITMANIP_UIMM2 (imm_expr->X_add_number);
+			continue;
+		      case '8':
+			my_getExpression (imm_expr, asarg);
+			check_absolute_expr (ip, imm_expr, FALSE);
+			asarg = expr_parse_end;
+			++oparg;
+			if (imm_expr->X_add_number < 0
+			    || imm_expr->X_add_number > 63)
+			  break;
+			else if (*oparg == '1'
+			    && imm_expr->X_add_number > 1)
+			  break;
+			else if (*oparg == '2'
+			    && imm_expr->X_add_number > 3)
+			  break;
+			else if (*oparg == '3'
+			    && imm_expr->X_add_number > 7)
+			  break;
+			else if (*oparg == '4'
+			    && imm_expr->X_add_number > 15)
+			  break;
+			ip->insn_opcode
+			    |= ENCODE_CV_SIMD_UIMM6 (imm_expr->X_add_number);
+			continue;
 		      default:
 			goto unknown_riscv_ip_operand;
 		    }
@@ -4148,12 +4246,13 @@ riscv_ip_hardcode (char *str,
 	    generic_bignum[num],
 	    llen);
       memset(ip->insn_long_opcode + repr_bytes, 0, bytes - repr_bytes);
-      return NULL;
     }
-
-  if (bytes < sizeof(values[0]) && values[num - 1] >> (8 * bytes) != 0)
+  else if (bytes < sizeof(values[0]) && values[num - 1] >> (8 * bytes) != 0)
     return _("value conflicts with instruction length");
 
+  if (!riscv_opts.rvc && (bytes & 2))
+    seg_info (now_seg)->tc_segment_info_data.last_insn16 = true;
+
   return NULL;
 }
 
@@ -4811,13 +4910,13 @@ s_riscv_option (int x ATTRIBUTE_UNUSED)
   if (strcmp (name, "rvc") == 0)
     {
       riscv_update_subset (&riscv_rps_as, "+c");
-      riscv_reset_subsets_list_arch_str ();
+      riscv_set_arch_str (&riscv_rps_as.subset_list->arch_str);
       riscv_set_rvc (true);
     }
   else if (strcmp (name, "norvc") == 0)
     {
       riscv_update_subset (&riscv_rps_as, "-c");
-      riscv_reset_subsets_list_arch_str ();
+      riscv_set_arch_str (&riscv_rps_as.subset_list->arch_str);
       riscv_set_rvc (false);
     }
   else if (strcmp (name, "pic") == 0)
@@ -4838,12 +4937,10 @@ s_riscv_option (int x ATTRIBUTE_UNUSED)
       if (ISSPACE (*name) && *name != '\0')
 	name++;
       riscv_update_subset (&riscv_rps_as, name);
-      riscv_reset_subsets_list_arch_str ();
+      riscv_set_arch_str (&riscv_rps_as.subset_list->arch_str);
 
-      riscv_set_rvc (false);
-      if (riscv_subset_supports (&riscv_rps_as, "c")
-	  || riscv_subset_supports (&riscv_rps_as, "zca"))
-	riscv_set_rvc (true);
+      riscv_set_rvc (riscv_subset_supports (&riscv_rps_as, "c")
+		     || riscv_subset_supports (&riscv_rps_as, "zca"));
 
       if (riscv_subset_supports (&riscv_rps_as, "ztso"))
 	riscv_set_tso ();
@@ -4951,15 +5048,27 @@ riscv_frag_align_code (int n)
   char *nops;
   expressionS ex;
 
-  /* If we are moving to a smaller alignment than the instruction size, then no
-     alignment is required. */
+  /* If we are moving to alignment no larger than the instruction size, then
+     no special alignment handling is required. */
   if (bytes <= insn_alignment)
-    return true;
+    {
+      if (bytes == insn_alignment)
+	seg_info (now_seg)->tc_segment_info_data.last_insn16 = false;
+      return false;
+    }
 
   /* When not relaxing, riscv_handle_align handles code alignment.  */
   if (!riscv_opts.relax)
     return false;
 
+  /* If the last item emitted was not an ordinary insn, first align back to
+     insn granularity.  Don't do this unconditionally, to avoid altering frags
+     when that's not actually needed.  */
+  if (seg_info (now_seg)->tc_segment_info_data.map_state != MAP_INSN
+      || seg_info (now_seg)->tc_segment_info_data.last_insn16)
+    frag_align_code (riscv_opts.rvc ? 1 : 2, 0);
+  seg_info (now_seg)->tc_segment_info_data.last_insn16 = false;
+
   /* Maybe we should use frag_var to create a new rs_align_code fragment,
      rather than just use frag_more to handle an alignment here?  So that we
      don't need to call riscv_mapping_state again later, and then only need
@@ -4993,40 +5102,37 @@ riscv_handle_align (fragS *fragP)
   switch (fragP->fr_type)
     {
     case rs_align_code:
-      /* When relaxing, riscv_frag_align_code handles code alignment.  */
-      if (!riscv_opts.relax)
-	{
-	  bfd_signed_vma bytes = (fragP->fr_next->fr_address
-				  - fragP->fr_address - fragP->fr_fix);
-	  /* We have 4 byte uncompressed nops.  */
-	  bfd_signed_vma size = 4;
-	  bfd_signed_vma excess = bytes % size;
-	  bfd_boolean odd_padding = (excess % 2 == 1);
-	  char *p = fragP->fr_literal + fragP->fr_fix;
-
-	  if (bytes <= 0)
-	    break;
+      {
+	bfd_signed_vma bytes = (fragP->fr_next->fr_address
+				- fragP->fr_address - fragP->fr_fix);
+	/* We have 4 byte uncompressed nops.  */
+	bfd_signed_vma size = 4;
+	bfd_signed_vma excess = bytes % size;
+	char *p = fragP->fr_literal + fragP->fr_fix;
+
+	if (bytes <= 0)
+	  break;
 
-	  /* Insert zeros or compressed nops to get 4 byte alignment.  */
-	  if (excess)
-	    {
-	      if (odd_padding)
-		riscv_add_odd_padding_symbol (fragP);
-	      riscv_make_nops (p, excess);
-	      fragP->fr_fix += excess;
-	      p += excess;
-	    }
+	/* Insert zeros or compressed nops to get 4 byte alignment.  */
+	if (excess)
+	  {
+	    if (excess % 2)
+	      riscv_add_odd_padding_symbol (fragP);
+	    riscv_make_nops (p, excess);
+	    fragP->fr_fix += excess;
+	    p += excess;
+	  }
 
-	  /* The frag will be changed to `rs_fill` later.  The function
-	     `write_contents` will try to fill the remaining spaces
-	     according to the patterns we give.  In this case, we give
-	     a 4 byte uncompressed nop as the pattern, and set the size
-	     of the pattern into `fr_var`.  The nop will be output to the
-	     file `fr_offset` times.  However, `fr_offset` could be zero
-	     if we don't need to pad the boundary finally.  */
-	  riscv_make_nops (p, size);
-	  fragP->fr_var = size;
-	}
+	/* The frag will be changed to `rs_fill` later.  The function
+	   `write_contents` will try to fill the remaining spaces
+	   according to the patterns we give.  In this case, we give
+	   a 4 byte uncompressed nop as the pattern, and set the size
+	   of the pattern into `fr_var`.  The nop will be output to the
+	   file `fr_offset` times.  However, `fr_offset` could be zero
+	   if we don't need to pad the boundary finally.  */
+	riscv_make_nops (p, size);
+	fragP->fr_var = size;
+      }
       break;
 
     default:
@@ -5280,6 +5386,18 @@ tc_riscv_regname_to_dw2regnum (char *regname)
 }
 
 void
+riscv_elf_section_change_hook (void)
+{
+  struct riscv_segment_info_type *info
+    = &seg_info(now_seg)->tc_segment_info_data;
+
+  if (info->rvc && !riscv_opts.rvc)
+    info->last_insn16 = true;
+
+  info->rvc = riscv_opts.rvc;
+}
+
+void
 riscv_elf_final_processing (void)
 {
   riscv_set_abi_by_arch ();
@@ -5363,7 +5481,7 @@ s_riscv_insn (int x ATTRIBUTE_UNUSED)
 static void
 riscv_write_out_attrs (void)
 {
-  const char *arch_str, *priv_str, *p;
+  const char *priv_str, *p;
   /* versions[0]: major version.
      versions[1]: minor version.
      versions[2]: revision version.  */
@@ -5371,10 +5489,10 @@ riscv_write_out_attrs (void)
   unsigned int i;
 
   /* Re-write architecture elf attribute.  */
-  arch_str = riscv_rps_as.subset_list->arch_str;
-  if (!bfd_elf_add_proc_attr_string (stdoutput, Tag_RISCV_arch, arch_str))
+  if (!bfd_elf_add_proc_attr_string (stdoutput, Tag_RISCV_arch, file_arch_str))
     as_fatal (_("error adding attribute: %s"),
 	      bfd_errmsg (bfd_get_error ()));
+  free ((void *) file_arch_str);
 
   /* For the file without any instruction, we don't set the default_priv_spec
      according to the privileged elf attributes since the md_assemble isn't
diff --git a/gas/config/tc-riscv.h b/gas/config/tc-riscv.h
index 07a00b6..05594cf 100644
--- a/gas/config/tc-riscv.h
+++ b/gas/config/tc-riscv.h
@@ -128,6 +128,9 @@ extern int tc_riscv_regname_to_dw2regnum (char *);
 /* Even on RV64, use 4-byte alignment, as F registers may be only 32 bits.  */
 #define DWARF2_CIE_DATA_ALIGNMENT -4
 
+#define md_elf_section_change_hook riscv_elf_section_change_hook
+extern void riscv_elf_section_change_hook (void);
+
 #define elf_tc_final_processing riscv_elf_final_processing
 extern void riscv_elf_final_processing (void);
 
@@ -153,6 +156,8 @@ void riscv_mapping_state (enum riscv_seg_mstate, int, bool);
 struct riscv_segment_info_type
 {
   enum riscv_seg_mstate map_state;
+  bool rvc;
+  bool last_insn16;
   /* The current mapping symbol with architecture string.  */
   symbolS *arch_map_symbol;
 };
diff --git a/gas/config/tc-s390.c b/gas/config/tc-s390.c
index 659c6af..055b694 100644
--- a/gas/config/tc-s390.c
+++ b/gas/config/tc-s390.c
@@ -342,6 +342,8 @@ s390_parse_cpu (const char *arg,
     { STRING_COMMA_LEN ("z15"), STRING_COMMA_LEN ("arch13"),
       S390_INSTR_FLAG_HTM | S390_INSTR_FLAG_VX },
     { STRING_COMMA_LEN ("z16"), STRING_COMMA_LEN ("arch14"),
+      S390_INSTR_FLAG_HTM | S390_INSTR_FLAG_VX },
+    { STRING_COMMA_LEN (""), STRING_COMMA_LEN ("arch15"),
       S390_INSTR_FLAG_HTM | S390_INSTR_FLAG_VX }
   };
   static struct
@@ -795,13 +797,6 @@ s390_insert_operand (unsigned char *insn,
       uval &= 0xf;
     }
 
-  if (operand->flags & S390_OPERAND_OR1)
-    uval |= 1;
-  if (operand->flags & S390_OPERAND_OR2)
-    uval |= 2;
-  if (operand->flags & S390_OPERAND_OR8)
-    uval |= 8;
-
   /* Duplicate the GPR/VR operand at bit pos 12 to 16.  */
   if (operand->flags & S390_OPERAND_CP16)
     {
diff --git a/gas/config/tc-score.c b/gas/config/tc-score.c
index 116c7aa..707bd6f 100644
--- a/gas/config/tc-score.c
+++ b/gas/config/tc-score.c
@@ -6168,18 +6168,6 @@ s3_s_score_lcomm (int bytes_p)
 
       record_alignment (bss_seg, align);
     }
-  else
-    {
-      /* Assume some objects may require alignment on some systems.  */
-#if defined (TC_ALPHA) && ! defined (VMS)
-      if (temp > 1)
-        {
-          align = ffs (temp) - 1;
-          if (temp % (1 << align))
-            abort ();
-        }
-#endif
-    }
 
   *p = 0;
   symbolP = symbol_find_or_make (name);
diff --git a/gas/config/tc-score7.c b/gas/config/tc-score7.c
index 52cb871..e6d98df 100644
--- a/gas/config/tc-score7.c
+++ b/gas/config/tc-score7.c
@@ -6014,18 +6014,6 @@ s7_s_score_lcomm (int bytes_p)
 
       record_alignment (bss_seg, align);
     }
-  else
-    {
-      /* Assume some objects may require alignment on some systems.  */
-#if defined (TC_ALPHA) && ! defined (VMS)
-      if (temp > 1)
-        {
-          align = ffs (temp) - 1;
-          if (temp % (1 << align))
-            abort ();
-        }
-#endif
-    }
 
   *p = 0;
   symbolP = symbol_find_or_make (name);
diff --git a/gas/config/tc-sparc.c b/gas/config/tc-sparc.c
index aca60e6..e37189e 100644
--- a/gas/config/tc-sparc.c
+++ b/gas/config/tc-sparc.c
@@ -2593,13 +2593,6 @@ sparc_ip (char *str, const struct sparc_opcode **pinsn)
 		    break;
 		  }	/* if not an 'f' register.  */
 
-		if (*args == '}' && mask != RS2 (opcode))
-		  {
-		    error_message
-		      = _(": Instruction requires frs2 and frsd must be the same register");
-		    goto error;
-		  }
-
 		switch (*args)
 		  {
 		  case 'v':
@@ -2628,10 +2621,18 @@ sparc_ip (char *str, const struct sparc_opcode **pinsn)
 		  case 'g':
 		  case 'H':
 		  case 'J':
-		  case '}':
                   case '^':
 		    opcode |= RD (mask);
 		    continue;
+
+		  case '}':
+		    if (RD (mask) != (opcode & RD (0x1f)))
+		      {
+			error_message = _(": Instruction requires frs2 and "
+					  "frsd must be the same register");
+			goto error;
+		      }
+		    continue;
 		  }		/* Pack it in.  */
 
 		know (0);
diff --git a/gas/config/tc-vax.c b/gas/config/tc-vax.c
index 08d5dfc..cab1264 100644
--- a/gas/config/tc-vax.c
+++ b/gas/config/tc-vax.c
@@ -1021,10 +1021,6 @@ vax_reg_parse (char c1, char c2, char c3, char c4)
   c2 = c3;
   c3 = c4;
 #endif
-#ifdef OBJ_VMS
-  if (c4 != 0)		/* Register prefixes are not allowed under VMS.  */
-    return retval;
-#endif
 #ifdef OBJ_AOUT
   if (c1 == '%')	/* Register prefixes are optional under a.out.  */
     {
@@ -2193,18 +2189,15 @@ md_create_long_jump (char *ptr,
   md_number_to_chars (ptr, offset, 4);
 }
 
-#ifdef OBJ_VMS
-const char *md_shortopts = "d:STt:V+1h:Hv::";
-#elif defined(OBJ_ELF)
-const char *md_shortopts = "d:STt:VkKQ:";
+#ifdef OBJ_ELF
+const char *md_shortopts = "d:STt:VkQ:";
 #else
 const char *md_shortopts = "d:STt:V";
 #endif
 struct option md_longopts[] =
 {
 #ifdef OBJ_ELF
-#define OPTION_PIC (OPTION_MD_BASE)
-  { "pic", no_argument, NULL, OPTION_PIC },
+  { "pic", no_argument, NULL, 'k' },
 #endif
   { NULL, no_argument, NULL, 0 }
 };
@@ -2235,40 +2228,7 @@ md_parse_option (int c, const char *arg)
       as_warn (_("I don't use an interpass file! -V ignored"));
       break;
 
-#ifdef OBJ_VMS
-    case '+':			/* For g++.  Hash any name > 31 chars long.  */
-      flag_hash_long_names = 1;
-      break;
-
-    case '1':			/* For backward compatibility.  */
-      flag_one = 1;
-      break;
-
-    case 'H':			/* Show new symbol after hash truncation.  */
-      flag_show_after_trunc = 1;
-      break;
-
-    case 'h':			/* No hashing of mixed-case names.  */
-      {
-	extern char vms_name_mapping;
-	vms_name_mapping = atoi (arg);
-	flag_no_hash_mixed_case = 1;
-      }
-      break;
-
-    case 'v':
-      {
-	extern char *compiler_version_string;
-
-	if (!arg || !*arg || access (arg, 0) == 0)
-	  return 0;		/* Have caller show the assembler version.  */
-	compiler_version_string = arg;
-      }
-      break;
-#endif
-
 #ifdef OBJ_ELF
-    case OPTION_PIC:
     case 'k':
       flag_want_pic = 1;
       break;			/* -pic, Position Independent Code.  */
@@ -2297,15 +2257,11 @@ VAX options:\n\
 -t FILE			ignored\n\
 -T			ignored\n\
 -V			ignored\n"));
-#ifdef OBJ_VMS
+#ifdef OBJ_ELF
   fprintf (stream, _("\
-VMS options:\n\
--+			hash encode names longer than 31 characters\n\
--1			`const' handling compatible with gcc 1.x\n\
--H			show new symbol after hash truncation\n\
--h NUM			don't hash mixed-case names, and adjust case:\n\
-			0 = upper, 2 = lower, 3 = preserve case\n\
--v\"VERSION\"		code being assembled was produced by compiler \"VERSION\"\n"));
+ELF options:\n\
+-k -pic			enable PIC mode\n\
+-Q[y|n]			ignored\n"));
 #endif
 }
 
diff --git a/gas/config/tc-vax.h b/gas/config/tc-vax.h
index 1708e10..1799a1d 100644
--- a/gas/config/tc-vax.h
+++ b/gas/config/tc-vax.h
@@ -31,10 +31,6 @@
 #endif
 #endif
 
-#ifdef OBJ_VMS
-#define TARGET_FORMAT "vms-vax"
-#endif
-
 #ifdef OBJ_ELF
 #define TARGET_FORMAT "elf32-vax"
 #endif
diff --git a/gas/config/te-interix.h b/gas/config/te-interix.h
index a1f1c53..00290d3 100644
--- a/gas/config/te-interix.h
+++ b/gas/config/te-interix.h
@@ -19,8 +19,8 @@
 
 #define TE_PE_DYN /* PE with dynamic linking (UNIX shared lib) support */
 #define TE_PE
-#define LEX_AT 1 /* can have @'s inside labels */
-#define LEX_QM 3 /* can have ?'s in or begin labels */
+#define LEX_AT LEX_NAME /* can have @'s inside labels */
+#define LEX_QM (LEX_BEGIN_NAME | LEX_NAME) /* can have ?'s in or begin labels */
 
 /* The PE format supports long section names.  */
 #define COFF_LONG_SECTION_NAMES
diff --git a/gas/configure b/gas/configure
index 6b96d3a..47c43c0 100755
--- a/gas/configure
+++ b/gas/configure
@@ -818,6 +818,7 @@ enable_checking
 enable_compressed_debug_sections
 enable_default_compressed_debug_sections_algorithm
 enable_x86_relax_relocations
+enable_x86_tls_check
 enable_elf_stt_common
 enable_generate_build_notes
 enable_mips_fix_loongson3_llsc
@@ -1493,6 +1494,7 @@ Optional Features:
                           --enable-compressed-debug-sections.
   --enable-x86-relax-relocations
                           generate x86 relax relocations by default
+  --enable-x86-tls-check  check x86 TLS relocation by default
   --enable-elf-stt-common generate ELF common symbols with STT_COMMON type by
                           default
   --enable-generate-build-notes
@@ -10775,7 +10777,7 @@ else
   lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
   lt_status=$lt_dlunknown
   cat > conftest.$ac_ext <<_LT_EOF
-#line 10778 "configure"
+#line 10780 "configure"
 #include "confdefs.h"
 
 #if HAVE_DLFCN_H
@@ -10881,7 +10883,7 @@ else
   lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
   lt_status=$lt_dlunknown
   cat > conftest.$ac_ext <<_LT_EOF
-#line 10884 "configure"
+#line 10886 "configure"
 #include "confdefs.h"
 
 #if HAVE_DLFCN_H
@@ -11575,6 +11577,17 @@ if test "${enable_x86_relax_relocations+set}" = set; then :
 esac
 fi
 
+# PR gas/32022
+# Decide if x86 assembler should check TLS relocation.
+ac_default_x86_tls_check=unset
+# Provide a configure time option to override our default.
+# Check whether --enable-x86_tls_check was given.
+if test "${enable_x86_tls_check+set}" = set; then :
+  enableval=$enable_x86_tls_check; case "${enableval}" in
+  no)  ac_default_x86_tls_check=0 ;;
+esac
+fi
+
 # Decide if ELF assembler should generate common symbols with the
 # STT_COMMON type.
 ac_default_elf_stt_common=unset
@@ -12670,15 +12683,6 @@ $as_echo "$with_priv_spec" >&6; }
 			big)	emulation="mipsbelf mipslelf mipself" ;;
 			*)	emulation="mipslelf mipsbelf mipself" ;;
 			esac ;;
-      # i386-pc-pe-coff != i386-pc-coff.
-      i386-*-pe-coff)	;;
-      # Uncommenting the next line will turn on support for i386 AOUT
-      # for the default linux configuration
-      # i386-*-linux*-elf) emulation="i386elf i386aout" ;;
-      #
-      i386-*-aout)	emulation="i386aout" ;;
-      i386-*-coff)	emulation="i386coff" ;;
-      i386-*-elf)	emulation="i386elf" ;;
 
       # Always all formats.  The first stated emulation becomes the default.
       cris-*-*aout*)	emulation="crisaout criself" ;;
@@ -12698,6 +12702,15 @@ cat >>confdefs.h <<_ACEOF
 _ACEOF
 
 
+if test ${ac_default_x86_tls_check} = unset; then
+  ac_default_x86_tls_check=1
+fi
+
+cat >>confdefs.h <<_ACEOF
+#define DEFAULT_X86_TLS_CHECK $ac_default_x86_tls_check
+_ACEOF
+
+
 if test ${ac_default_elf_stt_common} = unset; then
   ac_default_elf_stt_common=0
 fi
@@ -12753,38 +12766,6 @@ cat >>confdefs.h <<_ACEOF
 _ACEOF
 
 
-# Turn on all targets if possible
-if test ${all_targets} = "yes"; then
-  case ${target_cpu_type} in
-  i386)
-    case ${obj_format} in
-    aout)
-      emulations="$emulations i386coff i386elf"
-      ;;
-    coff)
-      emulations="$emulations i386aout i386elf"
-    ;;
-    elf)
-      emulations="$emulations i386aout i386coff"
-      ;;
-    esac
-  ;;
-  x86_64)
-    case ${obj_format} in
-    aout)
-      emulations="$emulations i386coff i386elf"
-      ;;
-    coff)
-      emulations="$emulations i386aout i386elf"
-    ;;
-    elf)
-      emulations="$emulations i386aout i386coff"
-      ;;
-    esac
-  ;;
-  esac
-fi
-
 # PE code has way too many macros tweaking behaviour
 case ${te_file} in
   pe*) emulations="" ;;
diff --git a/gas/configure.ac b/gas/configure.ac
index 6b978aa..ab1d0e0 100644
--- a/gas/configure.ac
+++ b/gas/configure.ac
@@ -95,6 +95,17 @@ AC_ARG_ENABLE(x86_relax_relocations,
   no)  ac_default_x86_relax_relocations=0 ;;
 esac])dnl
 
+# PR gas/32022
+# Decide if x86 assembler should check TLS relocation.
+ac_default_x86_tls_check=unset
+# Provide a configure time option to override our default.
+AC_ARG_ENABLE(x86_tls_check,
+	      AS_HELP_STRING([--enable-x86-tls-check],
+	      [check x86 TLS relocation by default]),
+[case "${enableval}" in
+  no)  ac_default_x86_tls_check=0 ;;
+esac])dnl
+
 # Decide if ELF assembler should generate common symbols with the
 # STT_COMMON type.
 ac_default_elf_stt_common=unset
@@ -711,15 +722,6 @@ changequote([,])dnl
 			big)	emulation="mipsbelf mipslelf mipself" ;;
 			*)	emulation="mipslelf mipsbelf mipself" ;;
 			esac ;;
-      # i386-pc-pe-coff != i386-pc-coff.
-      i386-*-pe-coff)	;;
-      # Uncommenting the next line will turn on support for i386 AOUT
-      # for the default linux configuration
-      # i386-*-linux*-elf) emulation="i386elf i386aout" ;;
-      #
-      i386-*-aout)	emulation="i386aout" ;;
-      i386-*-coff)	emulation="i386coff" ;;
-      i386-*-elf)	emulation="i386elf" ;;
 
       # Always all formats.  The first stated emulation becomes the default.
       cris-*-*aout*)	emulation="crisaout criself" ;;
@@ -737,6 +739,13 @@ AC_DEFINE_UNQUOTED(DEFAULT_GENERATE_X86_RELAX_RELOCATIONS,
   $ac_default_x86_relax_relocations,
   [Define to 1 if you want to generate x86 relax relocations by default.])
 
+if test ${ac_default_x86_tls_check} = unset; then
+  ac_default_x86_tls_check=1
+fi
+AC_DEFINE_UNQUOTED(DEFAULT_X86_TLS_CHECK,
+  $ac_default_x86_tls_check,
+  [Define to 1 if you want to check x86 TLS relocation by default.])
+
 if test ${ac_default_elf_stt_common} = unset; then
   ac_default_elf_stt_common=0
 fi
@@ -780,38 +789,6 @@ fi
 AC_DEFINE_UNQUOTED(DEFAULT_COMPRESSED_DEBUG_ALGORITHM, $ac_default_compressed_debug_sections_algorithm,
 		   [Default compression algorithm for --enable-compressed-debug-sections.])
 
-# Turn on all targets if possible
-if test ${all_targets} = "yes"; then
-  case ${target_cpu_type} in
-  i386)
-    case ${obj_format} in
-    aout)
-      emulations="$emulations i386coff i386elf"
-      ;;
-    coff)
-      emulations="$emulations i386aout i386elf"
-    ;;
-    elf)
-      emulations="$emulations i386aout i386coff"
-      ;;
-    esac
-  ;;
-  x86_64)
-    case ${obj_format} in
-    aout)
-      emulations="$emulations i386coff i386elf"
-      ;;
-    coff)
-      emulations="$emulations i386aout i386elf"
-    ;;
-    elf)
-      emulations="$emulations i386aout i386coff"
-      ;;
-    esac
-  ;;
-  esac
-fi
-
 # PE code has way too many macros tweaking behaviour
 case ${te_file} in
   pe*) emulations="" ;;
diff --git a/gas/doc/as.texi b/gas/doc/as.texi
index 0b4109e..4c7799a 100644
--- a/gas/doc/as.texi
+++ b/gas/doc/as.texi
@@ -1961,7 +1961,7 @@ Specify which s390 processor variant is the target, @samp{g5} (or
 @samp{arch6}), @samp{z9-109}, @samp{z9-ec} (or @samp{arch7}), @samp{z10} (or
 @samp{arch8}), @samp{z196} (or @samp{arch9}), @samp{zEC12} (or @samp{arch10}),
 @samp{z13} (or @samp{arch11}), @samp{z14} (or @samp{arch12}), @samp{z15}
-(or @samp{arch13}), or @samp{z16} (or @samp{arch14}).
+(or @samp{arch13}), @samp{z16} (or @samp{arch14}), or @samp{arch15}.
 @item -mregnames
 @itemx -mno-regnames
 Allow or disallow symbolic names for registers.
diff --git a/gas/doc/c-i386.texi b/gas/doc/c-i386.texi
index 36ba825..9667061 100644
--- a/gas/doc/c-i386.texi
+++ b/gas/doc/c-i386.texi
@@ -219,6 +219,10 @@ accept various extension mnemonics.  For example,
 @code{avx10.1/128},
 @code{user_msr},
 @code{apx_f},
+@code{avx10.2},
+@code{avx10.2/512},
+@code{avx10.2/256},
+@code{avx10.2/128},
 @code{amx_int8},
 @code{amx_bf16},
 @code{amx_fp16},
@@ -463,6 +467,16 @@ R_X86_64_REX_GOTPCRELX, in 64-bit mode.
 relocations.  The default can be controlled by a configure option
 @option{--enable-x86-relax-relocations}.
 
+@cindex @samp{-mtls-check=} option, i386
+@cindex @samp{-mtls-check=} option, x86-64
+@item -mtls-check=@var{no}
+@itemx -mtls-check=@var{yes}
+These options control whether the assembler check tls relocation.
+@option{-mtls-check=@var{yes}} will check tls relocation.
+@option{-mtls-check=@var{no}} will not check tls relocation
+The default can be controlled by a configure option
+@option{--enable-x86-tls-check}.
+
 @cindex @samp{-malign-branch-boundary=} option, i386
 @cindex @samp{-malign-branch-boundary=} option, x86-64
 @item -malign-branch-boundary=@var{NUM}
@@ -1679,7 +1693,7 @@ supported on the CPU specified.  The choices for @var{cpu_type} are:
 @item @samp{.cmpccxadd} @tab @samp{.wrmsrns} @tab @samp{.msrlist}
 @item @samp{.avx_ne_convert} @tab @samp{.rao_int} @tab @samp{.fred} @tab @samp{.lkgs}
 @item @samp{.avx_vnni_int16} @tab @samp{.sha512} @tab @samp{.sm3} @tab @samp{.sm4}
-@item @samp{.pbndkb} @tab @samp{.user_msr}
+@item @samp{.pbndkb} @tab @samp{.user_msr} @tab @samp{.avx10.2}
 @item @samp{.wbnoinvd} @tab @samp{.pconfig} @tab @samp{.waitpkg} @tab @samp{.cldemote}
 @item @samp{.shstk} @tab @samp{.gfni} @tab @samp{.vaes} @tab @samp{.vpclmulqdq}
 @item @samp{.movdiri} @tab @samp{.movdir64b} @tab @samp{.enqcmd} @tab @samp{.tsxldtrk}
diff --git a/gas/doc/c-riscv.texi b/gas/doc/c-riscv.texi
index d396669..5614e76 100644
--- a/gas/doc/c-riscv.texi
+++ b/gas/doc/c-riscv.texi
@@ -178,7 +178,12 @@ instead of just
 It's not expected that options are changed in this manner during regular use,
 but there are a handful of esoteric cases like the one above where users need
 to disable particular features of the assembler for particular code sequences.
-The complete list of option arguments is shown below:
+However, it's also useful to enable/disable the extensions for some specific
+code regions by @samp{.option arch, +-}.  This is very common in the ifunc
+libraries.  We can support functions which are implemented by different
+extensions in the same library, but these should not affect any file-level
+settings, like the elf architecture attribute.  The complete list of option
+arguments is shown below:
 
 @table @code
 @item push
@@ -740,13 +745,18 @@ extensions supported and provides the location of their
 publicly-released documentation:
 
 @table @r
-@item XCvMac
-The XCvMac extension provides instructions for multiply-accumulate operations.
+@item XCvAlu
+The XCvAlu extension provides instructions for general ALU operations.
 
 It is documented in @url{https://docs.openhwgroup.org/projects/cv32e40p-user-manual/en/latest/instruction_set_extensions.html}
 
-@item XCvAlu
-The XCvAlu extension provides instructions for general ALU operations.
+@item XCvBi
+The XCvBi extension provides instructions for branch immediate operations.
+
+It is documented in @url{https://docs.openhwgroup.org/projects/cv32e40p-user-manual/en/latest/instruction_set_extensions.html}
+
+@item XCvBitmanip
+The XCvBitmanip extension provides instructions for bitmanip operations.
 
 It is documented in @url{https://docs.openhwgroup.org/projects/cv32e40p-user-manual/en/latest/instruction_set_extensions.html}
 
@@ -755,8 +765,8 @@ The XCvElw extension provides instructions for event load word operations.
 
 It is documented in @url{https://docs.openhwgroup.org/projects/cv32e40p-user-manual/en/latest/instruction_set_extensions.html}
 
-@item XCvBi
-The XCvBi extension provides instructions for branch immediate operations.
+@item XCvMac
+The XCvMac extension provides instructions for multiply-accumulate operations.
 
 It is documented in @url{https://docs.openhwgroup.org/projects/cv32e40p-user-manual/en/latest/instruction_set_extensions.html}
 
@@ -765,6 +775,11 @@ The XCvMem extension provides instructions for post inc load/store operations.
 
 It is documented in @url{https://docs.openhwgroup.org/projects/cv32e40p-user-manual/en/latest/instruction_set_extensions.html}
 
+@item XcvSimd
+The XcvSimd extension provides instructions for SIMD operations.
+
+It is documented in @url{https://docs.openhwgroup.org/projects/cv32e40p-user-manual/en/latest/instruction_set_extensions.html}
+
 @item XTheadBa
 The XTheadBa extension provides instructions for address calculations.
 
diff --git a/gas/doc/c-s390.texi b/gas/doc/c-s390.texi
index f73dfde..9a4fdfe 100644
--- a/gas/doc/c-s390.texi
+++ b/gas/doc/c-s390.texi
@@ -18,7 +18,7 @@ and eleven chip levels. The architecture modes are the Enterprise System
 Architecture (ESA) and the newer z/Architecture mode. The chip levels
 are g5 (or arch3), g6, z900 (or arch5), z990 (or arch6), z9-109, z9-ec
 (or arch7), z10 (or arch8), z196 (or arch9), zEC12 (or arch10), z13
-(or arch11), z14 (or arch12), z15 (or arch13), or z16 (or arch14).
+(or arch11), z14 (or arch12), z15 (or arch13), z16 (or arch14), or arch15.
 
 @menu
 * s390 Options::                Command-line Options.
@@ -71,8 +71,9 @@ are recognized:
 @code{zEC12} (or @code{arch10}),
 @code{z13} (or @code{arch11}),
 @code{z14} (or @code{arch12}),
-@code{z15} (or @code{arch13}), and
-@code{z16} (or @code{arch14}).
+@code{z15} (or @code{arch13}),
+@code{z16} (or @code{arch14}), and
+@code{arch15}.
 
 Assembling an instruction that is not supported on the target
 processor results in an error message.
@@ -300,10 +301,11 @@ field. The notation changes as follows:
 @display
 @multitable @columnfractions 0.30 0.30
 @headitem full notation @tab short notation
-@item Dn(0,Bn) @tab Dn(Bn)
+@item Dn(Xn,0) @tab Dn(Xn,)
+@item Dn(0,Bn) @tab Dn(,Bn) or Dn(Bn)
 @item Dn(0,0) @tab Dn
 @item Dn(0) @tab Dn
-@item Dn(Ln,0) @tab Dn(Ln)
+@item Dn(Ln,0) @tab Dn(Ln,) or Dn(Ln)
 @end multitable
 @end display
 
diff --git a/gas/dw2gencfi.c b/gas/dw2gencfi.c
index db0261d..ca7605e 100644
--- a/gas/dw2gencfi.c
+++ b/gas/dw2gencfi.c
@@ -2498,16 +2498,15 @@ cfi_finish (void)
 	- .sframe in the .cfi_sections directive.  */
   if (flag_gen_sframe || (all_cfi_sections & CFI_EMIT_sframe) != 0)
     {
-      if (support_sframe_p ())
+      if (support_sframe_p () && !SUPPORT_FRAME_LINKONCE)
 	{
 	  segT sframe_seg;
 	  int alignment = ffs (DWARF2_ADDR_SIZE (stdoutput)) - 1;
 
-	  if (!SUPPORT_FRAME_LINKONCE)
-	    sframe_seg = get_cfi_seg (NULL, ".sframe",
-					 (SEC_ALLOC | SEC_LOAD | SEC_DATA
-					  | DWARF2_EH_FRAME_READ_ONLY),
-					 alignment);
+	  sframe_seg = get_cfi_seg (NULL, ".sframe",
+				    (SEC_ALLOC | SEC_LOAD | SEC_DATA
+				     | DWARF2_EH_FRAME_READ_ONLY),
+				    alignment);
 	  output_sframe (sframe_seg);
 	}
       else
diff --git a/gas/emul-target.h b/gas/emul-target.h
index d38e121..6b6064a 100644
--- a/gas/emul-target.h
+++ b/gas/emul-target.h
@@ -22,10 +22,6 @@
 #define emul_init			common_emul_init
 #endif
 
-#ifndef emul_bfd_name
-#define emul_bfd_name			default_emul_bfd_name
-#endif
-
 #ifndef emul_local_labels_fb
 #define emul_local_labels_fb		0
 #endif
@@ -48,10 +44,8 @@
 
 struct emulation emul_struct_name =
   {
-    0,
     emul_name,
     emul_init,
-    emul_bfd_name,
     emul_local_labels_fb, emul_local_labels_dollar,
     emul_leading_underscore,
     emul_default_endian,
diff --git a/gas/emul.h b/gas/emul.h
index 635dbfd..355a700 100644
--- a/gas/emul.h
+++ b/gas/emul.h
@@ -23,10 +23,8 @@
 
 struct emulation
   {
-    void (*                   match) (const char *);
     const char *              name;
     void (*                   init) (void);
-    const char *(*            bfd_name) (void);
     unsigned                  local_labels_fb : 1;
     unsigned                  local_labels_dollar : 1;
     unsigned                  leading_underscore : 2;
@@ -37,7 +35,9 @@ struct emulation
 
 COMMON struct emulation * this_emulation;
 
-extern const char * default_emul_bfd_name (void);
+extern struct emulation mipsbelf, mipslelf, mipself;
+extern struct emulation crisaout, criself;
+
 extern void common_emul_init (void);
 
 #endif
diff --git a/gas/input-file.c b/gas/input-file.c
index 89f03a9..c96d276 100644
--- a/gas/input-file.c
+++ b/gas/input-file.c
@@ -164,34 +164,38 @@ input_file_open (const char *filename,
     }
   gas_assert (c != EOF);
 
-  if (c == '#')
+  if (strchr (line_comment_chars, '#')
+      ? c == '#'
+      : c && strchr (line_comment_chars, c))
     {
       /* Begins with comment, may not want to preprocess.  */
+      int lead = c;
+
       c = getc (f_in);
       if (c == 'N')
 	{
 	  char *p = fgets (buf, sizeof (buf), f_in);
-	  if (p && startswith (p, "O_APP") && ISSPACE (p[5]))
+	  if (p && startswith (p, "O_APP") && is_end_of_line (p[5]))
 	    preprocess = 0;
 	  if (!p || !strchr (p, '\n'))
-	    ungetc ('#', f_in);
+	    ungetc (lead, f_in);
 	  else
 	    ungetc ('\n', f_in);
 	}
       else if (c == 'A')
 	{
 	  char *p = fgets (buf, sizeof (buf), f_in);
-	  if (p && startswith (p, "PP") && ISSPACE (p[2]))
+	  if (p && startswith (p, "PP") && is_end_of_line (p[2]))
 	    preprocess = 1;
 	  if (!p || !strchr (p, '\n'))
-	    ungetc ('#', f_in);
+	    ungetc (lead, f_in);
 	  else
 	    ungetc ('\n', f_in);
 	}
       else if (c == '\n')
 	ungetc ('\n', f_in);
       else
-	ungetc ('#', f_in);
+	ungetc (lead, f_in);
     }
   else
     ungetc (c, f_in);
diff --git a/gas/input-scrub.c b/gas/input-scrub.c
index 776d15e..878edc8 100644
--- a/gas/input-scrub.c
+++ b/gas/input-scrub.c
@@ -194,10 +194,23 @@ input_scrub_pop (struct input_save *saved)
   saved_position = saved->saved_position;
   buffer_start = saved->buffer_start;
   buffer_length = saved->buffer_length;
-  physical_input_file = saved->physical_input_file;
+
+  /* When expanding an #APP / #NO_APP block, original lines are re-
+     processed, so whatever they did to physical file/line needs
+     retaining.  If logical file/line weren't changed, the logical
+     line number will want bumping by a corresponding value.  */
+  if (from_sb_expansion != expanding_app)
+    {
+      if (logical_input_file == 0 && logical_input_line == -1u
+	  && saved->logical_input_line != -1u)
+	saved->logical_input_line
+	  += physical_input_line - saved->physical_input_line;
+      physical_input_file = saved->physical_input_file;
+      physical_input_line = saved->physical_input_line;
+    }
   logical_input_file = saved->logical_input_file;
-  physical_input_line = saved->physical_input_line;
   logical_input_line = saved->logical_input_line;
+
   is_linefile = saved->is_linefile;
   sb_index = saved->sb_index;
   from_sb = saved->from_sb;
@@ -270,9 +283,12 @@ input_scrub_include_sb (sb *from, char *position, enum expansion expansion)
 {
   int newline;
 
-  if (macro_nest > max_macro_nest)
-    as_fatal (_("macros nested too deeply"));
-  ++macro_nest;
+  if (expansion != expanding_app)
+    {
+      if (macro_nest > max_macro_nest)
+	as_fatal (_("macros nested too deeply"));
+      ++macro_nest;
+    }
 
 #ifdef md_macro_start
   if (expansion == expanding_macro)
@@ -335,7 +351,8 @@ input_scrub_next_buffer (char **bufp)
 	      md_macro_end ();
 #endif
 	    }
-	  --macro_nest;
+	  if (from_sb_expansion != expanding_app)
+	    --macro_nest;
 	  partial_where = NULL;
 	  partial_size = 0;
 	  if (next_saved_file != NULL)
@@ -432,7 +449,7 @@ seen_at_least_1_file (void)
 void
 bump_line_counters (void)
 {
-  if (sb_index == (size_t) -1)
+  if (sb_index == (size_t) -1 || from_sb_expansion == expanding_app)
     ++physical_input_line;
 
   if (logical_input_line != -1u)
diff --git a/gas/listing.c b/gas/listing.c
index 4309063..23f76a7 100644
--- a/gas/listing.c
+++ b/gas/listing.c
@@ -176,13 +176,16 @@ struct list_info_struct
   /* Pointers to linked list of messages associated with this line.  */
   struct list_message *messages, *last_message;
 
-  enum edict_enum edict;
-  char *edict_arg;
-
+#ifdef OBJ_ELF
   /* Nonzero if this line is to be omitted because it contains
      debugging information.  This can become a flags field if we come
      up with more information to store here.  */
-  int debugging;
+  bool debugging;
+#endif
+
+  enum edict_enum edict;
+  char *edict_arg;
+
 };
 
 typedef struct list_info_struct list_info_type;
@@ -226,7 +229,6 @@ static unsigned int calc_hex (list_info_type *);
 static void print_lines (list_info_type *, unsigned int, const char *,
 			 unsigned int);
 static void list_symbol_table (void);
-static int debugging_pseudo (list_info_type *, const char *);
 static void listing_listing (char *);
 
 static void
@@ -311,7 +313,8 @@ listing_newline (char *ps)
      considered to be debugging information.  This includes the
      statement which switches us into the debugging section, which we
      can only set after we are already in the debugging section.  */
-  if ((listing & LISTING_NODEBUG) != 0
+  if (IS_ELF
+      && (listing & LISTING_NODEBUG) != 0
       && listing_tail != NULL
       && ! listing_tail->debugging)
     {
@@ -320,7 +323,7 @@ listing_newline (char *ps)
       segname = segment_name (now_seg);
       if (startswith (segname, ".debug")
 	  || startswith (segname, ".line"))
-	listing_tail->debugging = 1;
+	listing_tail->debugging = true;
     }
 #endif
 
@@ -421,13 +424,13 @@ listing_newline (char *ps)
   new_i->edict = EDICT_NONE;
   new_i->hll_file = (file_info_type *) NULL;
   new_i->hll_line = 0;
-  new_i->debugging = 0;
 
   new_frag ();
 
 #ifdef OBJ_ELF
   /* In ELF, anything in a section beginning with .debug or .line is
      considered to be debugging information.  */
+  new_i->debugging = false;
   if ((listing & LISTING_NODEBUG) != 0)
     {
       const char *segname;
@@ -435,7 +438,7 @@ listing_newline (char *ps)
       segname = segment_name (now_seg);
       if (startswith (segname, ".debug")
 	  || startswith (segname, ".line"))
-	new_i->debugging = 1;
+	new_i->debugging = true;
     }
 #endif
 }
@@ -1023,12 +1026,25 @@ list_symbol_table (void)
 
 typedef struct cached_line
 {
-  file_info_type * file;
-  unsigned int     line;
-  char             buffer [LISTING_RHS_WIDTH];
+  file_info_type *file;
+  unsigned int line;
+  unsigned int bufsize;
+  char *buffer;
 } cached_line;
 
 static void
+alloc_cache (cached_line *cache, unsigned int width)
+{
+  if (cache->bufsize < width)
+    {
+      cache->bufsize = width;
+      free (cache->buffer);
+      cache->buffer = xmalloc (width);
+    }
+  cache->buffer[0] = 0;
+}
+
+static void
 print_source (file_info_type *  current_file,
 	      list_info_type *  list,
 	      unsigned int      width)
@@ -1077,7 +1093,7 @@ print_source (file_info_type *  current_file,
 
 	  cache->file = current_file;
 	  cache->line = list->hll_line;
-	  cache->buffer[0] = 0;
+	  alloc_cache (cache, width);
 	  rebuffer_line (current_file, cache->line, cache->buffer, width);
 	}
 
@@ -1098,7 +1114,7 @@ print_source (file_info_type *  current_file,
 	  cache = cached_lines + next_free_line;
 	  cache->file = current_file;
 	  cache->line = current_file->linenum + 1;
-	  cache->buffer[0] = 0;
+	  alloc_cache (cache, width);
 	  p = buffer_line (current_file, cache->buffer, width);
 
 	  /* Cache optimization:  If printing a group of lines
@@ -1120,24 +1136,20 @@ print_source (file_info_type *  current_file,
 /* Sometimes the user doesn't want to be bothered by the debugging
    records inserted by the compiler, see if the line is suspicious.  */
 
-static int
-debugging_pseudo (list_info_type *list, const char *line)
+static bool
+debugging_pseudo (list_info_type *list ATTRIBUTE_UNUSED, const char *line)
 {
 #ifdef OBJ_ELF
-  static int in_debug;
-  int was_debug;
-#endif
+  static bool in_debug;
+  bool was_debug;
 
   if (list->debugging)
     {
-#ifdef OBJ_ELF
-      in_debug = 1;
-#endif
-      return 1;
+      in_debug = true;
+      return true;
     }
-#ifdef OBJ_ELF
   was_debug = in_debug;
-  in_debug = 0;
+  in_debug = false;
 #endif
 
   while (ISSPACE (*line))
@@ -1156,42 +1168,42 @@ debugging_pseudo (list_info_type *list, const char *line)
 	  && list->next != NULL
 	  && list->next->debugging)
 	{
-	  in_debug = 1;
-	  return 1;
+	  in_debug = true;
+	  return true;
 	}
 #endif
 
-      return 0;
+      return false;
     }
 
   line++;
 
   if (startswith (line, "def"))
-    return 1;
+    return true;
   if (startswith (line, "val"))
-    return 1;
+    return true;
   if (startswith (line, "scl"))
-    return 1;
+    return true;
   if (startswith (line, "line"))
-    return 1;
+    return true;
   if (startswith (line, "endef"))
-    return 1;
+    return true;
   if (startswith (line, "ln"))
-    return 1;
+    return true;
   if (startswith (line, "type"))
-    return 1;
+    return true;
   if (startswith (line, "size"))
-    return 1;
+    return true;
   if (startswith (line, "dim"))
-    return 1;
+    return true;
   if (startswith (line, "tag"))
-    return 1;
+    return true;
   if (startswith (line, "stabs"))
-    return 1;
+    return true;
   if (startswith (line, "stabn"))
-    return 1;
+    return true;
 
-  return 0;
+  return false;
 }
 
 static void
diff --git a/gas/macro.c b/gas/macro.c
index a35e135..8b376f7 100644
--- a/gas/macro.c
+++ b/gas/macro.c
@@ -220,6 +220,11 @@ buffer_and_nest (const char *from, const char *to, sb *ptr,
 		{
 		  /* Reset the string to not include the ending rune.  */
 		  ptr->len = line_start;
+
+		  /* With the ending directive consumed here, announce the
+		     line for macro-expanded listings. */
+		  if (listing & LISTING_MACEXP)
+		    listing_newline (NULL);
 		  break;
 		}
 	    }
@@ -1389,6 +1394,7 @@ expand_irp (int irpc, size_t idx, sb *in, sb *out, size_t (*get_line) (sb *))
 		      if (idx >= in->len)
 			break;
 		    }
+		  continue;
 		}
 	      sb_reset (&f.actual);
 	      sb_add_char (&f.actual, in->ptr[idx]);
diff --git a/gas/obj.h b/gas/obj.h
index 4676d07..972fa92 100644
--- a/gas/obj.h
+++ b/gas/obj.h
@@ -46,6 +46,7 @@ struct format_ops {
   void (*begin) (void);
   void (*end) (void);
   void (*app_file) (const char *);
+  void (*assign_symbol) (symbolS *);
   void (*frob_symbol) (symbolS *, int *);
   void (*frob_file) (void);
   void (*frob_file_before_adjust) (void);
@@ -62,7 +63,6 @@ struct format_ops {
   int (*s_get_type) (symbolS *);
   void (*s_set_type) (symbolS *, int);
   void (*copy_symbol_attributes) (symbolS *, symbolS *);
-  void (*generate_asm_lineno) (void);
   void (*process_stab) (int, const char *, int, int, int);
   int (*separate_stab_sections) (void);
   void (*init_stab_section) (segT, segT);
@@ -82,7 +82,7 @@ extern const struct format_ops ecoff_format_ops;
 extern const struct format_ops coff_format_ops;
 extern const struct format_ops aout_format_ops;
 
-#ifndef this_format
+#ifdef USE_EMULATIONS
 COMMON const struct format_ops *this_format;
 #endif
 
diff --git a/gas/po/POTFILES.in b/gas/po/POTFILES.in
index 5281cbb..820b7cd 100644
--- a/gas/po/POTFILES.in
+++ b/gas/po/POTFILES.in
@@ -17,9 +17,6 @@ config/atof-vax.c
 config/bfin-lex-wrapper.c
 config/e-crisaout.c
 config/e-criself.c
-config/e-i386aout.c
-config/e-i386coff.c
-config/e-i386elf.c
 config/e-mipself.c
 config/kvx-parse.c
 config/kvx-parse.h
diff --git a/gas/read.c b/gas/read.c
index adb4759..bf57787 100644
--- a/gas/read.c
+++ b/gas/read.c
@@ -285,7 +285,8 @@ read_begin (void)
   /* Use more.  FIXME-SOMEDAY.  */
 
   if (flag_mri)
-    lex_type['?'] = 3;
+    lex_type['?'] = LEX_BEGIN_NAME | LEX_NAME;
+
   stabs_begin ();
 
 #ifndef WORKING_DOT_WORD
@@ -864,6 +865,29 @@ do_align (unsigned int n, char *fill, unsigned int len, unsigned int max)
     record_alignment (now_seg, n - OCTETS_PER_BYTE_POWER);
 }
 
+/* Find first <eol><next_char>NO_APP<eol>, if any, in the supplied buffer.
+   Return NULL if there's none, or else the position of <next_char>.  */
+static char *
+find_no_app (const char *s, char next_char)
+{
+  const char *start = s;
+  const char srch[] = { next_char, 'N', 'O', '_', 'A', 'P', 'P', '\0' };
+
+  for (;;)
+    {
+      char *ends = strstr (s, srch);
+
+      if (ends == NULL)
+	break;
+      if (is_end_of_line (ends[sizeof (srch) - 1])
+	  && (ends == start || is_end_of_line (ends[-1])))
+	return ends;
+      s = ends + sizeof (srch) - 1;
+    }
+
+  return NULL;
+}
+
 /* We read the file, putting things into a web that represents what we
    have been reading.  */
 void
@@ -900,7 +924,7 @@ read_a_source_file (const char *name)
 #endif
       while (input_line_pointer < buffer_limit)
 	{
-	  bool was_new_line;
+	  char was_new_line;
 	  /* We have more of this buffer to parse.  */
 
 	  /* We now have input_line_pointer->1st char of next line.
@@ -953,6 +977,61 @@ read_a_source_file (const char *name)
 		listing_newline (NULL);
 	    }
 #endif
+
+	  next_char = *input_line_pointer;
+	  if (was_new_line == 1
+             && (strchr (line_comment_chars, '#')
+		  ? next_char == '#'
+		  : next_char && strchr (line_comment_chars, next_char)))
+	    {
+	      /* Its a comment.  Check for APP followed by NO_APP.  */
+	      sb sbuf;
+	      char *ends;
+	      size_t len;
+
+	      s = input_line_pointer + 1;
+	      if (!startswith (s, "APP") || !is_end_of_line (s[3]))
+		{
+		  /* We ignore it.  Note: Not ignore_rest_of_line ()!  */
+		  while (s <= buffer_limit)
+		    if (is_end_of_line (*s++))
+		      break;
+		  input_line_pointer = s;
+		  continue;
+		}
+	      s += 4;
+
+	      ends = find_no_app (s, next_char);
+	      len = ends ? ends - s : buffer_limit - s;
+
+	      sb_build (&sbuf, len + 100);
+	      sb_add_buffer (&sbuf, s, len);
+	      if (!ends)
+		{
+		  /* The end of the #APP wasn't in this buffer.  We
+		     keep reading in buffers until we find the #NO_APP
+		     that goes with this #APP  There is one.  The specs
+		     guarantee it...  */
+		  do
+		    {
+		      buffer_limit = input_scrub_next_buffer (&buffer);
+		      if (!buffer_limit)
+			break;
+		      ends = find_no_app (buffer, next_char);
+		      len = ends ? ends - buffer : buffer_limit - buffer;
+		      sb_add_buffer (&sbuf, buffer, len);
+		    }
+		  while (!ends);
+		}
+	      sb_add_char (&sbuf, '\n');
+
+	      input_line_pointer = ends ? ends + 8 : NULL;
+	      input_scrub_include_sb (&sbuf, input_line_pointer, expanding_app);
+	      sb_kill (&sbuf);
+	      buffer_limit = input_scrub_next_buffer (&input_line_pointer);
+	      continue;
+	    }
+
 	  if (was_new_line)
 	    {
 	      line_label = NULL;
@@ -1316,51 +1395,13 @@ read_a_source_file (const char *name)
 	    }
 
 	  if (next_char && strchr (line_comment_chars, next_char))
-	    {			/* Its a comment.  Better say APP or NO_APP.  */
-	      sb sbuf;
-	      char *ends;
-	      size_t len;
-
+	    {
+	      /* Its a comment, ignore it.  Note: Not ignore_rest_of_line ()!  */
 	      s = input_line_pointer;
-	      if (!startswith (s, "APP\n"))
-		{
-		  /* We ignore it.  Note: Not ignore_rest_of_line ()!  */
-		  while (s <= buffer_limit)
-		    if (is_end_of_line (*s++))
-		      break;
-		  input_line_pointer = s;
-		  continue;
-		}
-	      bump_line_counters ();
-	      s += 4;
-
-	      ends = strstr (s, "#NO_APP\n");
-	      len = ends ? ends - s : buffer_limit - s;
-
-	      sb_build (&sbuf, len + 100);
-	      sb_add_buffer (&sbuf, s, len);
-	      if (!ends)
-		{
-		  /* The end of the #APP wasn't in this buffer.  We
-		     keep reading in buffers until we find the #NO_APP
-		     that goes with this #APP  There is one.  The specs
-		     guarantee it...  */
-		  do
-		    {
-		      buffer_limit = input_scrub_next_buffer (&buffer);
-		      if (!buffer_limit)
-			break;
-		      ends = strstr (buffer, "#NO_APP\n");
-		      len = ends ? ends - buffer : buffer_limit - buffer;
-		      sb_add_buffer (&sbuf, buffer, len);
-		    }
-		  while (!ends);
-		}
-
-	      input_line_pointer = ends ? ends + 8 : NULL;
-	      input_scrub_include_sb (&sbuf, input_line_pointer, expanding_none);
-	      sb_kill (&sbuf);
-	      buffer_limit = input_scrub_next_buffer (&input_line_pointer);
+	      while (s <= buffer_limit)
+		if (is_end_of_line (*s++))
+		  break;
+	      input_line_pointer = s;
 	      continue;
 	    }
 
@@ -2810,6 +2851,7 @@ s_mri (int ignore ATTRIBUTE_UNUSED)
 #ifdef TC_M68K
       flag_m68k_mri = 1;
 #endif
+      lex_type['?'] = LEX_BEGIN_NAME | LEX_NAME;
     }
   else
     {
@@ -2817,6 +2859,7 @@ s_mri (int ignore ATTRIBUTE_UNUSED)
 #ifdef TC_M68K
       flag_m68k_mri = 0;
 #endif
+      lex_type['?'] = LEX_QM;
     }
 
   /* Operator precedence changes in m68k MRI mode, so we need to
@@ -3247,9 +3290,8 @@ assign_symbol (char *name, int mode)
 	  symbol_set_frag (symbolP, dummy_frag);
 	}
 #endif
-#if defined (OBJ_COFF) && !defined (TE_PE)
-      /* "set" symbols are local unless otherwise specified.  */
-      SF_SET_LOCAL (symbolP);
+#ifdef obj_assign_symbol
+      obj_assign_symbol (symbolP);
 #endif
     }
 
diff --git a/gas/sb.h b/gas/sb.h
index 2507d35..9c60f71 100644
--- a/gas/sb.h
+++ b/gas/sb.h
@@ -69,6 +69,7 @@ enum expansion {
   expanding_none,
   expanding_repeat,
   expanding_macro,
+  expanding_app,
 };
 extern void input_scrub_include_sb (sb *, char *, enum expansion);
 
diff --git a/gas/scfi.c b/gas/scfi.c
index 5898a57..6c59a8e 100644
--- a/gas/scfi.c
+++ b/gas/scfi.c
@@ -478,14 +478,29 @@ verify_heuristic_traceable_reg_fp (ginsnS *ginsn, scfi_stateS *state)
 {
   /* The function uses this variable to issue error to user right away.  */
   int fp_traceable_p = 0;
-  struct ginsn_dst *dst;
+  enum ginsn_type gtype;
   struct ginsn_src *src1;
   struct ginsn_src *src2;
+  struct ginsn_dst *dst;
+  unsigned int src1_reg;
+  unsigned int dst_reg;
+  enum ginsn_src_type src1_type;
+  enum ginsn_src_type src2_type;
+  enum ginsn_dst_type dst_type;
+
+  gtype = ginsn->type;
 
   src1 = ginsn_get_src1 (ginsn);
   src2 = ginsn_get_src2 (ginsn);
   dst = ginsn_get_dst (ginsn);
 
+  src1_reg = ginsn_get_src_reg (src1);
+  dst_reg = ginsn_get_dst_reg (dst);
+
+  src1_type = ginsn_get_src_type (src1);
+  src2_type = ginsn_get_src_type (src2);
+  dst_type = ginsn_get_dst_type (dst);
+
   /* Stack manipulation can be done in a variety of ways.  A program may
      allocate stack statically or may perform dynamic stack allocation in
      the prologue.
@@ -498,25 +513,26 @@ verify_heuristic_traceable_reg_fp (ginsnS *ginsn, scfi_stateS *state)
 
   /* Check all applicable instructions with dest REG_FP, when the CFA base
      register is REG_FP.  */
-  if (state->regs[REG_CFA].base == REG_FP && ginsn_get_dst_reg (dst) == REG_FP)
+  if (state->regs[REG_CFA].base == REG_FP
+      && (dst_type == GINSN_DST_REG || dst_type == GINSN_DST_INDIRECT)
+      && dst_reg == REG_FP)
     {
       /* Excuse the add/sub with imm usage: They are OK.  */
-      if ((ginsn->type == GINSN_TYPE_ADD || ginsn->type == GINSN_TYPE_SUB)
-	  && ginsn_get_src_reg (src1) == REG_FP
-	  && ginsn_get_src_type (src2) == GINSN_SRC_IMM)
+      if ((gtype == GINSN_TYPE_ADD || gtype == GINSN_TYPE_SUB)
+	  && src1_type == GINSN_SRC_REG && src1_reg == REG_FP
+	  && src2_type == GINSN_SRC_IMM)
 	fp_traceable_p = 0;
       /* REG_FP restore is OK too.  */
       else if (ginsn->type == GINSN_TYPE_LOAD)
 	fp_traceable_p = 0;
       /* mov's to memory with REG_FP base do not make REG_FP untraceable.  */
-      else if (ginsn_get_dst_type (dst) == GINSN_DST_INDIRECT
-	       && (ginsn->type == GINSN_TYPE_MOV
-		   || ginsn->type == GINSN_TYPE_STORE))
+      else if (dst_type == GINSN_DST_INDIRECT
+	       && (gtype == GINSN_TYPE_MOV || gtype == GINSN_TYPE_STORE))
 	fp_traceable_p = 0;
       /* Manipulations of the values possibly on stack are OK too.  */
-      else if ((ginsn->type == GINSN_TYPE_ADD || ginsn->type == GINSN_TYPE_SUB
-		|| ginsn->type == GINSN_TYPE_AND)
-	       && ginsn_get_dst_type (dst) == GINSN_DST_INDIRECT)
+      else if ((gtype == GINSN_TYPE_ADD || gtype == GINSN_TYPE_SUB
+		|| gtype == GINSN_TYPE_AND)
+	       && dst_type == GINSN_DST_INDIRECT)
 	fp_traceable_p = 0;
       /* All other ginsns with REG_FP as destination make REG_FP not
 	 traceable.  */
@@ -538,14 +554,29 @@ verify_heuristic_traceable_stack_manipulation (ginsnS *ginsn,
   /* The function uses this variable to issue error to user right away.  */
   int sp_untraceable_p = 0;
   bool possibly_untraceable = false;
+  enum ginsn_type gtype;
   struct ginsn_dst *dst;
   struct ginsn_src *src1;
   struct ginsn_src *src2;
+  unsigned int src1_reg;
+  unsigned int dst_reg;
+  enum ginsn_src_type src1_type;
+  enum ginsn_src_type src2_type;
+  enum ginsn_dst_type dst_type;
+
+  gtype = ginsn->type;
 
   src1 = ginsn_get_src1 (ginsn);
   src2 = ginsn_get_src2 (ginsn);
   dst = ginsn_get_dst (ginsn);
 
+  src1_reg = ginsn_get_src_reg (src1);
+  dst_reg = ginsn_get_dst_reg (dst);
+
+  src1_type = ginsn_get_src_type (src1);
+  src2_type = ginsn_get_src_type (src2);
+  dst_type = ginsn_get_dst_type (dst);
+
   /* Stack manipulation can be done in a variety of ways.  A program may
      allocate stack statically in prologue or may need to do dynamic stack
      allocation.
@@ -559,31 +590,24 @@ verify_heuristic_traceable_stack_manipulation (ginsnS *ginsn,
        amount of stack usage (and hence, the value of rsp) must be known at
        all times.  */
 
-  if (ginsn->type == GINSN_TYPE_MOV
-      && ginsn_get_dst_type (dst) == GINSN_DST_REG
-      && ginsn_get_dst_reg (dst) == REG_SP
-      && ginsn_get_src_type (src1) == GINSN_SRC_REG
+  if (gtype == GINSN_TYPE_MOV
+      && dst_type == GINSN_DST_REG && dst_reg == REG_SP
       /* Exclude mov %rbp, %rsp from this check.  */
-      && ginsn_get_src_reg (src1) != REG_FP)
+      && src1_type == GINSN_SRC_REG && src1_reg != REG_FP)
     {
-      /* mov %reg, %rsp.  */
       /* A previous mov %rsp, %reg must have been seen earlier for this to be
 	 an OK for stack manipulation.  */
-      if (state->scratch[ginsn_get_src_reg (src1)].base != REG_CFA
-	  || state->scratch[ginsn_get_src_reg (src1)].state != CFI_IN_REG)
-	{
-	  possibly_untraceable = true;
-	}
+      if (state->scratch[src1_reg].base != REG_CFA
+	  || state->scratch[src1_reg].state != CFI_IN_REG)
+	possibly_untraceable = true;
     }
   /* Check add/sub/and insn usage when CFA base register is REG_SP.
      Any stack size manipulation, including stack realignment is not allowed
      if CFA base register is REG_SP.  */
-  else if (ginsn_get_dst_type (dst) == GINSN_DST_REG
-	   && ginsn_get_dst_reg (dst) == REG_SP
-	   && (((ginsn->type == GINSN_TYPE_ADD || ginsn->type == GINSN_TYPE_SUB)
-		&& ginsn_get_src_type (src2) != GINSN_SRC_IMM)
-	       || ginsn->type == GINSN_TYPE_AND
-	       || ginsn->type == GINSN_TYPE_OTHER))
+  else if (dst_type == GINSN_DST_REG && dst_reg == REG_SP
+	   && (((gtype == GINSN_TYPE_ADD || gtype == GINSN_TYPE_SUB)
+		&& src2_type != GINSN_SRC_IMM)
+	       || gtype == GINSN_TYPE_AND || gtype == GINSN_TYPE_OTHER))
     possibly_untraceable = true;
   /* If a register save operation is seen when REG_SP is untraceable,
      CFI cannot be synthesized for register saves, hence bail out.  */
@@ -593,19 +617,15 @@ verify_heuristic_traceable_stack_manipulation (ginsnS *ginsn,
       /* If, however, the register save is an REG_FP-based, indirect mov
 	 like: mov reg, disp(%rbp) and CFA base register is REG_BP,
 	 untraceable REG_SP is not a problem.  */
-      if (ginsn->type == GINSN_TYPE_MOV
-	  && ginsn_get_dst_type (dst) == GINSN_DST_INDIRECT
-	  && (ginsn_get_dst_reg (dst) == REG_FP
-	      && state->regs[REG_CFA].base == REG_FP))
+      if (gtype == GINSN_TYPE_MOV && state->regs[REG_CFA].base == REG_FP
+	  && dst_type == GINSN_DST_INDIRECT && dst_reg == REG_FP)
 	sp_untraceable_p = 0;
     }
   else if (ginsn_scfi_restore_reg_p (ginsn, state) && !state->traceable_p)
     {
-      if (ginsn->type == GINSN_TYPE_MOV
-	  && ginsn_get_dst_type (dst) == GINSN_DST_INDIRECT
-	  && (ginsn_get_src_reg (src1) == REG_SP
-	      || (ginsn_get_src_reg (src1) == REG_FP
-		  && state->regs[REG_CFA].base != REG_FP)))
+      if (gtype == GINSN_TYPE_MOV && dst_type == GINSN_DST_INDIRECT
+	  && (src1_reg == REG_SP
+	      || (src1_reg == REG_FP && state->regs[REG_CFA].base != REG_FP)))
 	sp_untraceable_p = 1;
     }
 
@@ -706,6 +726,11 @@ gen_scfi_ops (ginsnS *ginsn, scfi_stateS *state)
   struct ginsn_src *src1;
   struct ginsn_src *src2;
   struct ginsn_dst *dst;
+  unsigned int src1_reg;
+  unsigned int dst_reg;
+  enum ginsn_src_type src1_type;
+  enum ginsn_src_type src2_type;
+  enum ginsn_dst_type dst_type;
 
   if (!ginsn || !state)
     ret = 1;
@@ -724,6 +749,13 @@ gen_scfi_ops (ginsnS *ginsn, scfi_stateS *state)
   src2 = ginsn_get_src2 (ginsn);
   dst = ginsn_get_dst (ginsn);
 
+  src1_reg = ginsn_get_src_reg (src1);
+  dst_reg = ginsn_get_dst_reg (dst);
+
+  src1_type = ginsn_get_src_type (src1);
+  src2_type = ginsn_get_src_type (src2);
+  dst_type = ginsn_get_dst_type (dst);
+
   ret = verify_heuristic_traceable_stack_manipulation (ginsn, state);
   if (ret)
     return ret;
@@ -732,68 +764,63 @@ gen_scfi_ops (ginsnS *ginsn, scfi_stateS *state)
   if (ret)
     return ret;
 
-  switch (ginsn->dst.type)
+  switch (dst_type)
     {
     case GINSN_DST_REG:
       switch (ginsn->type)
 	{
 	case GINSN_TYPE_MOV:
-	  if (ginsn_get_src_type (src1) == GINSN_SRC_REG
-	      && ginsn_get_src_reg (src1) == REG_SP
-	      && ginsn_get_dst_reg (dst) == REG_FP
+	  if (src1_type == GINSN_SRC_REG && src1_reg == REG_SP
+	      && dst_type == GINSN_DST_REG && dst_reg == REG_FP
 	      && state->regs[REG_CFA].base == REG_SP)
 	    {
 	      /* mov %rsp, %rbp.  */
-	      scfi_op_add_def_cfa_reg (state, ginsn, ginsn_get_dst_reg (dst));
+	      scfi_op_add_def_cfa_reg (state, ginsn, dst_reg);
 	    }
-	  else if (ginsn_get_src_type (src1) == GINSN_SRC_REG
-		   && ginsn_get_src_reg (src1) == REG_FP
-		   && ginsn_get_dst_reg (dst) == REG_SP
+	  else if (src1_type == GINSN_SRC_REG && src1_reg == REG_FP
+		   && dst_type == GINSN_DST_REG && dst_reg == REG_SP
 		   && state->regs[REG_CFA].base == REG_FP)
 	    {
 	      /* mov %rbp, %rsp.  */
 	      state->stack_size = -state->regs[REG_FP].offset;
-	      scfi_op_add_def_cfa_reg (state, ginsn, ginsn_get_dst_reg (dst));
+	      scfi_op_add_def_cfa_reg (state, ginsn, dst_reg);
 	      state->traceable_p = true;
 	    }
-	  else if (ginsn_get_src_type (src1) == GINSN_SRC_INDIRECT
-		   && (ginsn_get_src_reg (src1) == REG_SP
-		       || ginsn_get_src_reg (src1) == REG_FP)
-		   && ginsn_track_reg_p (ginsn_get_dst_reg (dst), GINSN_GEN_SCFI))
+	  else if (src1_type == GINSN_SRC_INDIRECT
+		   && (src1_reg == REG_SP || src1_reg == REG_FP)
+		   && ginsn_track_reg_p (dst_reg, GINSN_GEN_SCFI))
 	    {
 	      /* mov disp(%rsp), reg.  */
 	      /* mov disp(%rbp), reg.  */
 	      if (verify_heuristic_symmetrical_restore_reg (state, ginsn))
 		{
-		  scfi_state_restore_reg (state, ginsn_get_dst_reg (dst));
-		  scfi_op_add_cfa_restore (ginsn, ginsn_get_dst_reg (dst));
+		  scfi_state_restore_reg (state, dst_reg);
+		  scfi_op_add_cfa_restore (ginsn, dst_reg);
 		}
 	      else
 		as_warn_where (ginsn->file, ginsn->line,
 			       _("SCFI: asymetrical register restore"));
 	    }
-	  else if (ginsn_get_src_type (src1) == GINSN_SRC_REG
-		   && ginsn_get_dst_type (dst) == GINSN_DST_REG
-		   && ginsn_get_src_reg (src1) == REG_SP)
+	  else if (src1_type == GINSN_SRC_REG && src1_reg == REG_SP
+		   && dst_type == GINSN_DST_REG)
 	    {
 	      /* mov %rsp, %reg.  */
 	      /* The value of rsp is taken directly from state->stack_size.
 		 IMP: The workflow in gen_scfi_ops must keep it updated.
 		 PS: Not taking the value from state->scratch[REG_SP] is
 		 intentional.  */
-	      state->scratch[ginsn_get_dst_reg (dst)].base = REG_CFA;
-	      state->scratch[ginsn_get_dst_reg (dst)].offset = -state->stack_size;
-	      state->scratch[ginsn_get_dst_reg (dst)].state = CFI_IN_REG;
+	      state->scratch[dst_reg].base = REG_CFA;
+	      state->scratch[dst_reg].offset = -state->stack_size;
+	      state->scratch[dst_reg].state = CFI_IN_REG;
 	    }
-	  else if (ginsn_get_src_type (src1) == GINSN_SRC_REG
-		   && ginsn_get_dst_type (dst) == GINSN_DST_REG
-		   && ginsn_get_dst_reg (dst) == REG_SP)
+	  else if (src1_type == GINSN_SRC_REG
+		   && dst_type == GINSN_DST_REG && dst_reg == REG_SP)
 	    {
 	      /* mov %reg, %rsp.  */
 	      /* Keep the value of REG_SP updated.  */
-	      if (state->scratch[ginsn_get_src_reg (src1)].state == CFI_IN_REG)
+	      if (state->scratch[src1_reg].state == CFI_IN_REG)
 		{
-		  state->stack_size = -state->scratch[ginsn_get_src_reg (src1)].offset;
+		  state->stack_size = -state->scratch[src1_reg].offset;
 		  state->traceable_p = true;
 		}
 # if 0
@@ -805,8 +832,9 @@ gen_scfi_ops (ginsnS *ginsn, scfi_stateS *state)
 	    }
 	  break;
 	case GINSN_TYPE_SUB:
-	  if (ginsn_get_src_reg (src1) == REG_SP
-	      && ginsn_get_dst_reg (dst) == REG_SP)
+	  if (src1_type == GINSN_SRC_REG && src1_reg == REG_SP
+	      && dst_type == GINSN_DST_REG && dst_reg == REG_SP
+	      && src2_type == GINSN_SRC_IMM)
 	    {
 	      /* Stack inc/dec offset, when generated due to stack push and pop is
 		 target-specific.  Use the value encoded in the ginsn.  */
@@ -819,8 +847,9 @@ gen_scfi_ops (ginsnS *ginsn, scfi_stateS *state)
 	    }
 	  break;
 	case GINSN_TYPE_ADD:
-	  if (ginsn_get_src_reg (src1) == REG_SP
-	      && ginsn_get_dst_reg (dst) == REG_SP)
+	  if (src1_type == GINSN_SRC_REG && src1_reg == REG_SP
+	      && dst_type == GINSN_DST_REG && dst_reg == REG_SP
+	      && src2_type == GINSN_SRC_IMM)
 	    {
 	      /* Stack inc/dec offset is target-specific.  Use the value
 		 encoded in the ginsn.  */
@@ -832,8 +861,8 @@ gen_scfi_ops (ginsnS *ginsn, scfi_stateS *state)
 		  scfi_op_add_cfa_offset_inc (state, ginsn, ginsn_get_src_imm (src2));
 		}
 	    }
-	  else if (ginsn_get_src_reg (src1) == REG_FP
-		   && ginsn_get_dst_reg (dst) == REG_SP
+	  else if (src1_type == GINSN_SRC_REG && src1_reg == REG_FP
+		   && dst_type == GINSN_DST_REG && dst_reg == REG_SP
 		   && state->regs[REG_CFA].base == REG_FP)
 	    {
 	      /* FIXME - what is this for ? */
@@ -842,26 +871,25 @@ gen_scfi_ops (ginsnS *ginsn, scfi_stateS *state)
 	  break;
 	case GINSN_TYPE_LOAD:
 	  /* If this is a load from stack.  */
-	  if (ginsn_get_src_type (src1) == GINSN_SRC_INDIRECT
-	      && (ginsn_get_src_reg (src1) == REG_SP
-		  || (ginsn_get_src_reg (src1) == REG_FP
-		      && state->regs[REG_CFA].base == REG_FP)))
+	  if (src1_type == GINSN_SRC_INDIRECT
+	      && ((src1_reg == REG_FP && state->regs[REG_CFA].base == REG_FP)
+		  || src1_reg == REG_SP))
+
 	    {
 	      /* pop %rbp when CFA tracking is REG_FP based.  */
-	      if (ginsn_get_dst_reg (dst) == REG_FP
-		  && state->regs[REG_CFA].base == REG_FP)
+	      if (dst_reg == REG_FP && state->regs[REG_CFA].base == REG_FP)
 		{
 		  scfi_op_add_def_cfa_reg (state, ginsn, REG_SP);
 		  if (state->regs[REG_CFA].offset != state->stack_size)
 		    scfi_op_add_cfa_offset_inc (state, ginsn,
 						(state->regs[REG_CFA].offset - state->stack_size));
 		}
-	      if (ginsn_track_reg_p (ginsn_get_dst_reg (dst), GINSN_GEN_SCFI))
+	      if (ginsn_track_reg_p (dst_reg, GINSN_GEN_SCFI))
 		{
 		  if (verify_heuristic_symmetrical_restore_reg (state, ginsn))
 		    {
-		      scfi_state_restore_reg (state, ginsn_get_dst_reg (dst));
-		      scfi_op_add_cfa_restore (ginsn, ginsn_get_dst_reg (dst));
+		      scfi_state_restore_reg (state, dst_reg);
+		      scfi_op_add_cfa_restore (ginsn, dst_reg);
 		    }
 		  else
 		    as_warn_where (ginsn->file, ginsn->line,
@@ -890,20 +918,20 @@ gen_scfi_ops (ginsnS *ginsn, scfi_stateS *state)
       /* mov reg, disp(%rsp) */
       if (ginsn_scfi_save_reg_p (ginsn, state))
 	{
-	  if (ginsn_get_dst_reg (dst) == REG_SP)
+	  if (dst_reg == REG_SP)
 	    {
 	      /* mov reg, disp(%rsp) */
 	      offset = 0 - state->stack_size + ginsn_get_dst_disp (dst);
-	      scfi_state_save_reg (state, ginsn_get_src_reg (src1), REG_CFA, offset);
-	      scfi_op_add_cfi_offset (state, ginsn, ginsn_get_src_reg (src1));
+	      scfi_state_save_reg (state, src1_reg, REG_CFA, offset);
+	      scfi_op_add_cfi_offset (state, ginsn, src1_reg);
 	    }
-	  else if (ginsn_get_dst_reg (dst) == REG_FP)
+	  else if (dst_reg == REG_FP)
 	    {
 	      gas_assert (state->regs[REG_CFA].base == REG_FP);
 	      /* mov reg, disp(%rbp) */
 	      offset = 0 - state->regs[REG_CFA].offset + ginsn_get_dst_disp (dst);
-	      scfi_state_save_reg (state, ginsn_get_src_reg (src1), REG_CFA, offset);
-	      scfi_op_add_cfi_offset (state, ginsn, ginsn_get_src_reg (src1));
+	      scfi_state_save_reg (state, src1_reg, REG_CFA, offset);
+	      scfi_op_add_cfi_offset (state, ginsn, src1_reg);
 	    }
 	}
       break;
diff --git a/gas/testsuite/gas/aarch64/advsimd-lut-bad.l b/gas/testsuite/gas/aarch64/advsimd-lut-bad.l
index 3afe4a3..800f44c 100644
--- a/gas/testsuite/gas/aarch64/advsimd-lut-bad.l
+++ b/gas/testsuite/gas/aarch64/advsimd-lut-bad.l
@@ -1,25 +1,25 @@
 [^ :]+: Assembler messages:
-.*: Error: selected processor does not support `luti2 v0.16b,{v0.16b},v0\[0\]'
-.*: Error: selected processor does not support `luti2 v31.16b,{v0.16b},v0\[0\]'
-.*: Error: selected processor does not support `luti2 v0.16b,{v31.16b},v0\[0\]'
-.*: Error: selected processor does not support `luti2 v0.16b,{v0.16b},v31\[0\]'
-.*: Error: selected processor does not support `luti2 v0.16b,{v0.16b},v31\[3\]'
-.*: Error: selected processor does not support `luti2 v17.16b,{v21.16b},v27\[2\]'
-.*: Error: selected processor does not support `luti2 v0.8h,{v0.8h},v0\[0\]'
-.*: Error: selected processor does not support `luti2 v31.8h,{v0.8h},v0\[0\]'
-.*: Error: selected processor does not support `luti2 v0.8h,{v31.8h},v0\[0\]'
-.*: Error: selected processor does not support `luti2 v0.8h,{v0.8h},v31\[0\]'
-.*: Error: selected processor does not support `luti2 v0.8h,{v0.8h},v0\[7\]'
-.*: Error: selected processor does not support `luti2 v17.8h,{v21.8h},v27\[4\]'
-.*: Error: selected processor does not support `luti4 v0.16b,{v0.16b},v0\[0\]'
-.*: Error: selected processor does not support `luti4 v31.16b,{v0.16b},v0\[0\]'
-.*: Error: selected processor does not support `luti4 v0.16b,{v31.16b},v0\[0\]'
-.*: Error: selected processor does not support `luti4 v0.16b,{v0.16b},v31\[0\]'
-.*: Error: selected processor does not support `luti4 v0.16b,{v0.16b},v0\[1\]'
-.*: Error: selected processor does not support `luti4 v17.16b,{v21.16b},v27\[1\]'
-.*: Error: selected processor does not support `luti4 v0.8h,{v0.8h,v1.8h},v0\[0\]'
-.*: Error: selected processor does not support `luti4 v31.8h,{v0.8h,v1.8h},v0\[0\]'
-.*: Error: selected processor does not support `luti4 v0.8h,{v31.8h,v0.8h},v0\[0\]'
-.*: Error: selected processor does not support `luti4 v0.8h,{v0.8h,v1.8h},v31\[0\]'
-.*: Error: selected processor does not support `luti4 v0.8h,{v0.8h,v1.8h},v0\[3\]'
-.*: Error: selected processor does not support `luti4 v17.8h,{v21.8h,v22.8h},v27\[2\]'
+.*: Error: selected processor does not support `luti2 v0.16b,{ ?v0.16b ?},v0\[0\]'
+.*: Error: selected processor does not support `luti2 v31.16b,{ ?v0.16b ?},v0\[0\]'
+.*: Error: selected processor does not support `luti2 v0.16b,{ ?v31.16b ?},v0\[0\]'
+.*: Error: selected processor does not support `luti2 v0.16b,{ ?v0.16b ?},v31\[0\]'
+.*: Error: selected processor does not support `luti2 v0.16b,{ ?v0.16b ?},v31\[3\]'
+.*: Error: selected processor does not support `luti2 v17.16b,{ ?v21.16b ?},v27\[2\]'
+.*: Error: selected processor does not support `luti2 v0.8h,{ ?v0.8h ?},v0\[0\]'
+.*: Error: selected processor does not support `luti2 v31.8h,{ ?v0.8h ?},v0\[0\]'
+.*: Error: selected processor does not support `luti2 v0.8h,{ ?v31.8h ?},v0\[0\]'
+.*: Error: selected processor does not support `luti2 v0.8h,{ ?v0.8h ?},v31\[0\]'
+.*: Error: selected processor does not support `luti2 v0.8h,{ ?v0.8h ?},v0\[7\]'
+.*: Error: selected processor does not support `luti2 v17.8h,{ ?v21.8h ?},v27\[4\]'
+.*: Error: selected processor does not support `luti4 v0.16b,{ ?v0.16b ?},v0\[0\]'
+.*: Error: selected processor does not support `luti4 v31.16b,{ ?v0.16b ?},v0\[0\]'
+.*: Error: selected processor does not support `luti4 v0.16b,{ ?v31.16b ?},v0\[0\]'
+.*: Error: selected processor does not support `luti4 v0.16b,{ ?v0.16b ?},v31\[0\]'
+.*: Error: selected processor does not support `luti4 v0.16b,{ ?v0.16b ?},v0\[1\]'
+.*: Error: selected processor does not support `luti4 v17.16b,{ ?v21.16b ?},v27\[1\]'
+.*: Error: selected processor does not support `luti4 v0.8h,{ ?v0.8h,v1.8h ?},v0\[0\]'
+.*: Error: selected processor does not support `luti4 v31.8h,{ ?v0.8h,v1.8h ?},v0\[0\]'
+.*: Error: selected processor does not support `luti4 v0.8h,{ ?v31.8h,v0.8h ?},v0\[0\]'
+.*: Error: selected processor does not support `luti4 v0.8h,{ ?v0.8h,v1.8h ?},v31\[0\]'
+.*: Error: selected processor does not support `luti4 v0.8h,{ ?v0.8h,v1.8h ?},v0\[3\]'
+.*: Error: selected processor does not support `luti4 v17.8h,{ ?v21.8h,v22.8h ?},v27\[2\]'
diff --git a/gas/testsuite/gas/aarch64/advsimd-lut-illegal.l b/gas/testsuite/gas/aarch64/advsimd-lut-illegal.l
index 86f6a7d..53a2915 100644
--- a/gas/testsuite/gas/aarch64/advsimd-lut-illegal.l
+++ b/gas/testsuite/gas/aarch64/advsimd-lut-illegal.l
@@ -1,208 +1,208 @@
 [^ :]+: Assembler messages:
-[^ :]+:[0-9]+: Error: operand mismatch -- `luti2 v2.16b,\{v4.8h\},v8\[1\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `luti2 v2.16b,\{ ?v4.8h ?\},v8\[1\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	luti2 v2.16b, \{v4.16b\}, v8\[1\]
-[^ :]+:[0-9]+: Error: operand mismatch -- `luti2 v2.8h,\{v4.16b\},v8\[1\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `luti2 v2.8h,\{ ?v4.16b ?\},v8\[1\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	luti2 v2.16b, \{v4.16b\}, v8\[1\]
-[^ :]+:[0-9]+: Error: operand mismatch -- `luti4 v2.16b,\{v4.8h\},v8\[5\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `luti4 v2.16b,\{ ?v4.8h ?\},v8\[5\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	luti4 v2.16b, \{v4.16b\}, v8\[5\]
-[^ :]+:[0-9]+: Error: operand mismatch -- `luti4 v2.8h,\{v4.16b\},v8\[5\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `luti4 v2.8h,\{ ?v4.16b ?\},v8\[5\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	luti4 v2.16b, \{v4.16b\}, v8\[5\]
 [^ :]+:[0-9]+: Error: missing braces at operand 2 -- `luti2 v2.16b,v4.16b,v8\[1\]'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: expected a vector register at operand 1 -- `luti2 x12,\{v4.16b\},v8\[1\]'
+[^ :]+:[0-9]+: Error: expected a vector register at operand 1 -- `luti2 x12,\{ ?v4.16b ?\},v8\[1\]'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: expected an Advanced SIMD vector register at operand 2 -- `luti2 v2.16b,\{x12\},v8\[1\]'
+[^ :]+:[0-9]+: Error: expected an Advanced SIMD vector register at operand 2 -- `luti2 v2.16b,\{ ?x12 ?\},v8\[1\]'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: operand 3 must be a SIMD vector without a type qualifier encoding a bit index -- `luti2 v2.16b,\{v4.16b\},x12\[1\]'
+[^ :]+:[0-9]+: Error: operand 3 must be a SIMD vector without a type qualifier encoding a bit index -- `luti2 v2.16b,\{ ?v4.16b ?\},x12\[1\]'
 [^ :]+:[0-9]+:  Info: macro invoked from here
 [^ :]+:[0-9]+: Error: missing braces at operand 2 -- `luti2 v2.8h,v4.8h,v8\[1\]'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: expected a vector register at operand 1 -- `luti2 x12,\{v4.8h\},v8\[1\]'
+[^ :]+:[0-9]+: Error: expected a vector register at operand 1 -- `luti2 x12,\{ ?v4.8h ?\},v8\[1\]'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: expected an Advanced SIMD vector register at operand 2 -- `luti2 v2.8h,\{x12\},v8\[1\]'
+[^ :]+:[0-9]+: Error: expected an Advanced SIMD vector register at operand 2 -- `luti2 v2.8h,\{ ?x12 ?\},v8\[1\]'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: operand 3 must be a SIMD vector without a type qualifier encoding a bit index -- `luti2 v2.8h,\{v4.8h\},x12\[1\]'
+[^ :]+:[0-9]+: Error: operand 3 must be a SIMD vector without a type qualifier encoding a bit index -- `luti2 v2.8h,\{ ?v4.8h ?\},x12\[1\]'
 [^ :]+:[0-9]+:  Info: macro invoked from here
 [^ :]+:[0-9]+: Error: missing braces at operand 2 -- `luti4 v2.16b,v4.16b,v8\[1\]'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: expected a vector register at operand 1 -- `luti4 x12,\{v4.16b\},v8\[1\]'
+[^ :]+:[0-9]+: Error: expected a vector register at operand 1 -- `luti4 x12,\{ ?v4.16b ?\},v8\[1\]'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: expected an Advanced SIMD vector register at operand 2 -- `luti4 v2.16b,\{x12\},v8\[1\]'
+[^ :]+:[0-9]+: Error: expected an Advanced SIMD vector register at operand 2 -- `luti4 v2.16b,\{ ?x12 ?\},v8\[1\]'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: operand 3 must be a SIMD vector without a type qualifier encoding a bit index -- `luti4 v2.16b,\{v4.16b\},x12\[1\]'
+[^ :]+:[0-9]+: Error: operand 3 must be a SIMD vector without a type qualifier encoding a bit index -- `luti4 v2.16b,\{ ?v4.16b ?\},x12\[1\]'
 [^ :]+:[0-9]+:  Info: macro invoked from here
 [^ :]+:[0-9]+: Error: missing braces at operand 2 -- `luti4 v2.8h,v4.8h,v8\[1\]'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: expected a vector register at operand 1 -- `luti4 x12,\{v4.8h\},v8\[1\]'
+[^ :]+:[0-9]+: Error: expected a vector register at operand 1 -- `luti4 x12,\{ ?v4.8h ?\},v8\[1\]'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: expected an Advanced SIMD vector register at operand 2 -- `luti4 v2.8h,\{x12\},v8\[1\]'
+[^ :]+:[0-9]+: Error: expected an Advanced SIMD vector register at operand 2 -- `luti4 v2.8h,\{ ?x12 ?\},v8\[1\]'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: operand 3 must be a SIMD vector without a type qualifier encoding a bit index -- `luti4 v2.8h,\{v4.8h\},x12\[1\]'
+[^ :]+:[0-9]+: Error: operand 3 must be a SIMD vector without a type qualifier encoding a bit index -- `luti4 v2.8h,\{ ?v4.8h ?\},x12\[1\]'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: operand 2 must be a SIMD vector register list -- `luti4 v2.8h,\{v4.8h,x12\},v8\[1\]'
-[^ :]+:[0-9]+: Error: operand mismatch -- `luti2 v2.8b,\{v4.8b\},v8\[1\]'
+[^ :]+:[0-9]+: Error: operand 2 must be a SIMD vector register list -- `luti4 v2.8h,\{ ?v4.8h,x12 ?\},v8\[1\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `luti2 v2.8b,\{ ?v4.8b ?\},v8\[1\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	luti2 v2.16b, \{v4.16b\}, v8\[1\]
-[^ :]+:[0-9]+: Error: operand mismatch -- `luti2 v2.4h,\{v4.4h\},v8\[1\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `luti2 v2.4h,\{ ?v4.4h ?\},v8\[1\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	luti2 v2.16b, \{v4.16b\}, v8\[1\]
-[^ :]+:[0-9]+: Error: operand mismatch -- `luti4 v2.8b,\{v4.8b\},v8\[5\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `luti4 v2.8b,\{ ?v4.8b ?\},v8\[5\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	luti4 v2.16b, \{v4.16b\}, v8\[5\]
-[^ :]+:[0-9]+: Error: operand mismatch -- `luti4 v2.4h,\{v4.4h,v5.4h\},v8\[5\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `luti4 v2.4h,\{ ?v4.4h,v5.4h ?\},v8\[5\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	luti4 v2.16b, \{v4.16b-v5.16b\}, v8\[5\]
 [^ :]+:[0-9]+: Error: comma expected between operands at operand 2 -- `luti2 v2.16b'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: expected element type rather than vector type at operand 2 -- `luti2 v2.16b,\{v4.16b\}'
+[^ :]+:[0-9]+: Error: expected element type rather than vector type at operand 2 -- `luti2 v2.16b,\{ ?v4.16b ?\}'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: unexpected characters following instruction at operand 3 -- `luti2 v2.16b,\{v4.16b\},v8\[1\],v16.16b'
+[^ :]+:[0-9]+: Error: unexpected characters following instruction at operand 3 -- `luti2 v2.16b,\{ ?v4.16b ?\},v8\[1\],v16.16b'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: unexpected characters following instruction at operand 3 -- `luti2 v2.16b,\{v4.16b\},v8\[1\],\{v16.16b\}'
+[^ :]+:[0-9]+: Error: unexpected characters following instruction at operand 3 -- `luti2 v2.16b,\{ ?v4.16b ?\},v8\[1\],\{ ?v16.16b ?\}'
 [^ :]+:[0-9]+:  Info: macro invoked from here
 [^ :]+:[0-9]+: Error: comma expected between operands at operand 2 -- `luti2 v2.8h'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: expected element type rather than vector type at operand 2 -- `luti2 v2.8h,\{v4.8h\}'
+[^ :]+:[0-9]+: Error: expected element type rather than vector type at operand 2 -- `luti2 v2.8h,\{ ?v4.8h ?\}'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: unexpected characters following instruction at operand 3 -- `luti2 v2.8h,\{v4.8h\},v8\[1\],v16.8h'
+[^ :]+:[0-9]+: Error: unexpected characters following instruction at operand 3 -- `luti2 v2.8h,\{ ?v4.8h ?\},v8\[1\],v16.8h'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: unexpected characters following instruction at operand 3 -- `luti2 v2.8h,\{v4.8h\},v8\[1\],\{v16.8h\}'
+[^ :]+:[0-9]+: Error: unexpected characters following instruction at operand 3 -- `luti2 v2.8h,\{ ?v4.8h ?\},v8\[1\],\{ ?v16.8h ?\}'
 [^ :]+:[0-9]+:  Info: macro invoked from here
 [^ :]+:[0-9]+: Error: comma expected between operands at operand 2 -- `luti4 v2.16b'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: expected element type rather than vector type at operand 2 -- `luti4 v2.16b,\{v4.16b\}'
+[^ :]+:[0-9]+: Error: expected element type rather than vector type at operand 2 -- `luti4 v2.16b,\{ ?v4.16b ?\}'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: unexpected characters following instruction at operand 3 -- `luti4 v2.16b,\{v4.16b\},v8\[1\],v16.16b'
+[^ :]+:[0-9]+: Error: unexpected characters following instruction at operand 3 -- `luti4 v2.16b,\{ ?v4.16b ?\},v8\[1\],v16.16b'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: unexpected characters following instruction at operand 3 -- `luti4 v2.16b,\{v4.16b\},v8\[1\],\{v16.16b\}'
+[^ :]+:[0-9]+: Error: unexpected characters following instruction at operand 3 -- `luti4 v2.16b,\{ ?v4.16b ?\},v8\[1\],\{ ?v16.16b ?\}'
 [^ :]+:[0-9]+:  Info: macro invoked from here
 [^ :]+:[0-9]+: Error: comma expected between operands at operand 2 -- `luti4 v2.8h'
-[^ :]+:[0-9]+: Error: expected element type rather than vector type at operand 2 -- `luti4 v2.8h,\{v4.8h,v5.8h\}'
-[^ :]+:[0-9]+: Error: unexpected characters following instruction at operand 3 -- `luti4 v2.8h,\{v4.8h,v5.8h\},v8\[1\],v16.8h'
-[^ :]+:[0-9]+: Error: unexpected characters following instruction at operand 3 -- `luti4 v2.8h,\{v4.8h,v5.8h\},v8\[1\],\{v16.8h\}'
-[^ :]+:[0-9]+: Error: unexpected character `t' in element size at operand 2 -- `luti2 v2.16b,\{v4.16t\},v8\[1\]'
+[^ :]+:[0-9]+: Error: expected element type rather than vector type at operand 2 -- `luti4 v2.8h,\{ ?v4.8h,v5.8h ?\}'
+[^ :]+:[0-9]+: Error: unexpected characters following instruction at operand 3 -- `luti4 v2.8h,\{ ?v4.8h,v5.8h ?\},v8\[1\],v16.8h'
+[^ :]+:[0-9]+: Error: unexpected characters following instruction at operand 3 -- `luti4 v2.8h,\{ ?v4.8h,v5.8h ?\},v8\[1\],\{ ?v16.8h ?\}'
+[^ :]+:[0-9]+: Error: unexpected character `t' in element size at operand 2 -- `luti2 v2.16b,\{ ?v4.16t ?\},v8\[1\]'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: unexpected character `t' in element size at operand 1 -- `luti2 v2.16t,\{v4.16b\},v8\[1\]'
+[^ :]+:[0-9]+: Error: unexpected character `t' in element size at operand 1 -- `luti2 v2.16t,\{ ?v4.16b ?\},v8\[1\]'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: unexpected character `m' in element size at operand 2 -- `luti2 v2.8h,\{v4.8m\},v8\[1\]'
+[^ :]+:[0-9]+: Error: unexpected character `m' in element size at operand 2 -- `luti2 v2.8h,\{ ?v4.8m ?\},v8\[1\]'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: unexpected character `m' in element size at operand 1 -- `luti2 v2.8m,\{v4.8h\},v8\[1\]'
+[^ :]+:[0-9]+: Error: unexpected character `m' in element size at operand 1 -- `luti2 v2.8m,\{ ?v4.8h ?\},v8\[1\]'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: unexpected character `t' in element size at operand 2 -- `luti4 v2.16b,\{v4.16t\},v8\[1\]'
+[^ :]+:[0-9]+: Error: unexpected character `t' in element size at operand 2 -- `luti4 v2.16b,\{ ?v4.16t ?\},v8\[1\]'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: unexpected character `t' in element size at operand 1 -- `luti4 v2.16t,\{v4.16b\},v8\[1\]'
+[^ :]+:[0-9]+: Error: unexpected character `t' in element size at operand 1 -- `luti4 v2.16t,\{ ?v4.16b ?\},v8\[1\]'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: unexpected character `t' in element size at operand 2 -- `luti4 v2.8h,\{v4.8h,v5.8t\},v8\[1\]'
-[^ :]+:[0-9]+: Error: unexpected character `t' in element size at operand 1 -- `luti4 v2.8t,\{v4.8h,v5.8h\},v8\[1\]'
-[^ :]+:[0-9]+: Error: invalid use of vector register at operand 2 -- `luti2 v2.16b,\{v4\},v8\[1\]'
+[^ :]+:[0-9]+: Error: unexpected character `t' in element size at operand 2 -- `luti4 v2.8h,\{ ?v4.8h,v5.8t ?\},v8\[1\]'
+[^ :]+:[0-9]+: Error: unexpected character `t' in element size at operand 1 -- `luti4 v2.8t,\{ ?v4.8h,v5.8h ?\},v8\[1\]'
+[^ :]+:[0-9]+: Error: invalid use of vector register at operand 2 -- `luti2 v2.16b,\{ ?v4 ?\},v8\[1\]'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: invalid use of vector register at operand 1 -- `luti2 v2,\{v4.16b\},v8\[1\]'
+[^ :]+:[0-9]+: Error: invalid use of vector register at operand 1 -- `luti2 v2,\{ ?v4.16b ?\},v8\[1\]'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `luti2 2.16b,\{v4.16b\},v8\[1\]'
+[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `luti2 2.16b,\{ ?v4.16b ?\},v8\[1\]'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: syntax error in register list at operand 2 -- `luti2 v2.16b,\{4.16b\},v8\[1\]'
+[^ :]+:[0-9]+: Error: syntax error in register list at operand 2 -- `luti2 v2.16b,\{ ?4.16b ?\},v8\[1\]'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: invalid use of vector register at operand 2 -- `luti2 v2.8h,\{v4\},v8\[1\]'
+[^ :]+:[0-9]+: Error: invalid use of vector register at operand 2 -- `luti2 v2.8h,\{ ?v4 ?\},v8\[1\]'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: invalid use of vector register at operand 1 -- `luti2 v2,\{v4.8h\},v8\[1\]'
+[^ :]+:[0-9]+: Error: invalid use of vector register at operand 1 -- `luti2 v2,\{ ?v4.8h ?\},v8\[1\]'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `luti2 2.8h,\{v4.8h\},v8\[1\]'
+[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `luti2 2.8h,\{ ?v4.8h ?\},v8\[1\]'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: syntax error in register list at operand 2 -- `luti2 v2.8h,\{4.8h\},v8\[1\]'
+[^ :]+:[0-9]+: Error: syntax error in register list at operand 2 -- `luti2 v2.8h,\{ ?4.8h ?\},v8\[1\]'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: invalid use of vector register at operand 2 -- `luti4 v2.16b,\{v4\},v8\[1\]'
+[^ :]+:[0-9]+: Error: invalid use of vector register at operand 2 -- `luti4 v2.16b,\{ ?v4 ?\},v8\[1\]'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: invalid use of vector register at operand 1 -- `luti4 v2,\{v4.16b\},v8\[1\]'
+[^ :]+:[0-9]+: Error: invalid use of vector register at operand 1 -- `luti4 v2,\{ ?v4.16b ?\},v8\[1\]'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `luti4 2.16b,\{v4.16b\},v8\[1\]'
+[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `luti4 2.16b,\{ ?v4.16b ?\},v8\[1\]'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: syntax error in register list at operand 2 -- `luti4 v2.16b,\{4.16b\},v8\[1\]'
+[^ :]+:[0-9]+: Error: syntax error in register list at operand 2 -- `luti4 v2.16b,\{ ?4.16b ?\},v8\[1\]'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: invalid use of vector register at operand 2 -- `luti4 v2.16b,\{v4,v5.16b\},v8\[1\]'
-[^ :]+:[0-9]+: Error: invalid use of vector register at operand 1 -- `luti4 v2,\{v4.16b,v5.16b\},v8\[1\]'
-[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `luti4 2.16b,\{v4.16b,v5.16b\},v8\[1\]'
-[^ :]+:[0-9]+: Error: syntax error in register list at operand 2 -- `luti4 v2.16b,\{v4.16b,5.16b\},v8\[1\]'
-[^ :]+:[0-9]+: Error: operand 3 must be a SIMD vector without a type qualifier encoding a bit index -- `luti2 v17.16b,\{v21.16b\},v27.16b\[3\]'
-[^ :]+:[0-9]+: Error: operand 3 must be a SIMD vector without a type qualifier encoding a bit index -- `luti2 v17.8h,\{v21.8h\},v27.8h\[4\]'
-[^ :]+:[0-9]+: Error: operand 3 must be a SIMD vector without a type qualifier encoding a bit index -- `luti4 v17.16b,\{v21.16b\},v27.16b\[1\]'
-[^ :]+:[0-9]+: Error: operand 3 must be a SIMD vector without a type qualifier encoding a bit index -- `luti4 v17.8h,\{v21.8h,v22.8h\},v27.8h\[2\]'
-[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `luti2 v17.16b\[1\],\{v0.16b\},v31.16b'
+[^ :]+:[0-9]+: Error: invalid use of vector register at operand 2 -- `luti4 v2.16b,\{ ?v4,v5.16b ?\},v8\[1\]'
+[^ :]+:[0-9]+: Error: invalid use of vector register at operand 1 -- `luti4 v2,\{ ?v4.16b,v5.16b ?\},v8\[1\]'
+[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `luti4 2.16b,\{ ?v4.16b,v5.16b ?\},v8\[1\]'
+[^ :]+:[0-9]+: Error: syntax error in register list at operand 2 -- `luti4 v2.16b,\{ ?v4.16b,5.16b ?\},v8\[1\]'
+[^ :]+:[0-9]+: Error: operand 3 must be a SIMD vector without a type qualifier encoding a bit index -- `luti2 v17.16b,\{ ?v21.16b ?\},v27.16b\[3\]'
+[^ :]+:[0-9]+: Error: operand 3 must be a SIMD vector without a type qualifier encoding a bit index -- `luti2 v17.8h,\{ ?v21.8h ?\},v27.8h\[4\]'
+[^ :]+:[0-9]+: Error: operand 3 must be a SIMD vector without a type qualifier encoding a bit index -- `luti4 v17.16b,\{ ?v21.16b ?\},v27.16b\[1\]'
+[^ :]+:[0-9]+: Error: operand 3 must be a SIMD vector without a type qualifier encoding a bit index -- `luti4 v17.8h,\{ ?v21.8h,v22.8h ?\},v27.8h\[2\]'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `luti2 v17.16b\[1\],\{ ?v0.16b ?\},v31.16b'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: this type of register can't be indexed at operand 1 -- `luti2 v17\[1\],\{v0.16b\},v31.16b'
+[^ :]+:[0-9]+: Error: this type of register can't be indexed at operand 1 -- `luti2 v17\[1\],\{ ?v0.16b ?\},v31.16b'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: index not allowed inside register list at operand 2 -- `luti2 v17.16b,\{v0.16b\[1\]\},v31.16b'
+[^ :]+:[0-9]+: Error: index not allowed inside register list at operand 2 -- `luti2 v17.16b,\{ ?v0.16b\[1\] ?\},v31.16b'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: this type of register can't be indexed at operand 2 -- `luti2 v17.16b,\{v0\[1\]\},v31.16b'
+[^ :]+:[0-9]+: Error: this type of register can't be indexed at operand 2 -- `luti2 v17.16b,\{ ?v0\[1\] ?\},v31.16b'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `luti2 v17.8h\[1\],\{v0.8h\},v31.8h'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `luti2 v17.8h\[1\],\{ ?v0.8h ?\},v31.8h'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: this type of register can't be indexed at operand 1 -- `luti2 v17\[1\],\{v0.8h\},v31.8h'
+[^ :]+:[0-9]+: Error: this type of register can't be indexed at operand 1 -- `luti2 v17\[1\],\{ ?v0.8h ?\},v31.8h'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: index not allowed inside register list at operand 2 -- `luti2 v17.8h,\{v0.8h\[1\]\},v31.8h'
+[^ :]+:[0-9]+: Error: index not allowed inside register list at operand 2 -- `luti2 v17.8h,\{ ?v0.8h\[1\] ?\},v31.8h'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: this type of register can't be indexed at operand 2 -- `luti2 v17.8h,\{v0\[1\]\},v31.8h'
+[^ :]+:[0-9]+: Error: this type of register can't be indexed at operand 2 -- `luti2 v17.8h,\{ ?v0\[1\] ?\},v31.8h'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `luti4 v17.16b\[1\],\{v0.16b\},v31.16b'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `luti4 v17.16b\[1\],\{ ?v0.16b ?\},v31.16b'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: this type of register can't be indexed at operand 1 -- `luti4 v17\[1\],\{v0.16b\},v31.16b'
+[^ :]+:[0-9]+: Error: this type of register can't be indexed at operand 1 -- `luti4 v17\[1\],\{ ?v0.16b ?\},v31.16b'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: index not allowed inside register list at operand 2 -- `luti4 v17.16b,\{v0.16b\[1\]\},v31.16b'
+[^ :]+:[0-9]+: Error: index not allowed inside register list at operand 2 -- `luti4 v17.16b,\{ ?v0.16b\[1\] ?\},v31.16b'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: this type of register can't be indexed at operand 2 -- `luti4 v17.16b,\{v0\[1\]\},v31.16b'
+[^ :]+:[0-9]+: Error: this type of register can't be indexed at operand 2 -- `luti4 v17.16b,\{ ?v0\[1\] ?\},v31.16b'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `luti4 v17.8h\[1\],\{v0.8h,v1.8h\},v31.8h'
-[^ :]+:[0-9]+: Error: this type of register can't be indexed at operand 1 -- `luti4 v17\[1\],\{v0.8h,v1.8h\},v31.8h'
-[^ :]+:[0-9]+: Error: index not allowed inside register list at operand 2 -- `luti4 v17.8h,\{v0.8h\[1\],v1.8h\},v31.8h'
-[^ :]+:[0-9]+: Error: this type of register can't be indexed at operand 2 -- `luti4 v17.8h,\{v0\[1\],v1.8h\},v31.8h'
-[^ :]+:[0-9]+: Error: operand 3 must be a SIMD vector without a type qualifier encoding a bit index -- `luti2 v2.16b,\{v4.16b\},v8.16b'
-[^ :]+:[0-9]+: Error: operand 3 must be a SIMD vector without a type qualifier encoding a bit index -- `luti2 v2.16b,\{v4.16b\},v8'
-[^ :]+:[0-9]+: Error: operand 3 must be a SIMD vector without a type qualifier encoding a bit index -- `luti2 v2.8h,\{v4.8h\},v8.8h'
-[^ :]+:[0-9]+: Error: operand 3 must be a SIMD vector without a type qualifier encoding a bit index -- `luti2 v2.8h,\{v4.8h\},v8'
-[^ :]+:[0-9]+: Error: operand 3 must be a SIMD vector without a type qualifier encoding a bit index -- `luti4 v2.16b,\{v4.16b\},v8.16b'
-[^ :]+:[0-9]+: Error: operand 3 must be a SIMD vector without a type qualifier encoding a bit index -- `luti4 v2.16b,\{v4.16b\},v8'
-[^ :]+:[0-9]+: Error: operand 3 must be a SIMD vector without a type qualifier encoding a bit index -- `luti4 v2.8h,\{v4.8h,v5.8h\},v8.8h'
-[^ :]+:[0-9]+: Error: operand 3 must be a SIMD vector without a type qualifier encoding a bit index -- `luti4 v2.8h,\{v4.8h,v5.8h\},v8'
-[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `luti2 v32.16b,\{v4.16b\},v8\[1\]'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `luti4 v17.8h\[1\],\{ ?v0.8h,v1.8h ?\},v31.8h'
+[^ :]+:[0-9]+: Error: this type of register can't be indexed at operand 1 -- `luti4 v17\[1\],\{ ?v0.8h,v1.8h ?\},v31.8h'
+[^ :]+:[0-9]+: Error: index not allowed inside register list at operand 2 -- `luti4 v17.8h,\{ ?v0.8h\[1\],v1.8h ?\},v31.8h'
+[^ :]+:[0-9]+: Error: this type of register can't be indexed at operand 2 -- `luti4 v17.8h,\{ ?v0\[1\],v1.8h ?\},v31.8h'
+[^ :]+:[0-9]+: Error: operand 3 must be a SIMD vector without a type qualifier encoding a bit index -- `luti2 v2.16b,\{ ?v4.16b ?\},v8.16b'
+[^ :]+:[0-9]+: Error: operand 3 must be a SIMD vector without a type qualifier encoding a bit index -- `luti2 v2.16b,\{ ?v4.16b ?\},v8'
+[^ :]+:[0-9]+: Error: operand 3 must be a SIMD vector without a type qualifier encoding a bit index -- `luti2 v2.8h,\{ ?v4.8h ?\},v8.8h'
+[^ :]+:[0-9]+: Error: operand 3 must be a SIMD vector without a type qualifier encoding a bit index -- `luti2 v2.8h,\{ ?v4.8h ?\},v8'
+[^ :]+:[0-9]+: Error: operand 3 must be a SIMD vector without a type qualifier encoding a bit index -- `luti4 v2.16b,\{ ?v4.16b ?\},v8.16b'
+[^ :]+:[0-9]+: Error: operand 3 must be a SIMD vector without a type qualifier encoding a bit index -- `luti4 v2.16b,\{ ?v4.16b ?\},v8'
+[^ :]+:[0-9]+: Error: operand 3 must be a SIMD vector without a type qualifier encoding a bit index -- `luti4 v2.8h,\{ ?v4.8h,v5.8h ?\},v8.8h'
+[^ :]+:[0-9]+: Error: operand 3 must be a SIMD vector without a type qualifier encoding a bit index -- `luti4 v2.8h,\{ ?v4.8h,v5.8h ?\},v8'
+[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `luti2 v32.16b,\{ ?v4.16b ?\},v8\[1\]'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: expected an Advanced SIMD vector register at operand 2 -- `luti2 v2.16b,\{v32.16b\},v8\[1\]'
+[^ :]+:[0-9]+: Error: expected an Advanced SIMD vector register at operand 2 -- `luti2 v2.16b,\{ ?v32.16b ?\},v8\[1\]'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: operand 3 must be a SIMD vector without a type qualifier encoding a bit index -- `luti2 v2.16b,\{v4.16b\},v32\[1\]'
+[^ :]+:[0-9]+: Error: operand 3 must be a SIMD vector without a type qualifier encoding a bit index -- `luti2 v2.16b,\{ ?v4.16b ?\},v32\[1\]'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `luti2 v2.16b,\{v4.16b\},v8\[4\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `luti2 v2.16b,\{ ?v4.16b ?\},v8\[4\]'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `luti2 v2.16b,\{v4.16b\},v8\[-1\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `luti2 v2.16b,\{ ?v4.16b ?\},v8\[-1\]'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `luti2 v32.8h,\{v4.8h\},v8\[1\]'
+[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `luti2 v32.8h,\{ ?v4.8h ?\},v8\[1\]'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: expected an Advanced SIMD vector register at operand 2 -- `luti2 v2.8h,\{v32.8h\},v8\[1\]'
+[^ :]+:[0-9]+: Error: expected an Advanced SIMD vector register at operand 2 -- `luti2 v2.8h,\{ ?v32.8h ?\},v8\[1\]'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: operand 3 must be a SIMD vector without a type qualifier encoding a bit index -- `luti2 v2.8h,\{v4.8h\},v32\[1\]'
+[^ :]+:[0-9]+: Error: operand 3 must be a SIMD vector without a type qualifier encoding a bit index -- `luti2 v2.8h,\{ ?v4.8h ?\},v32\[1\]'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `luti2 v2.8h,\{v4.8h\},v8\[8\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `luti2 v2.8h,\{ ?v4.8h ?\},v8\[8\]'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `luti2 v2.8h,\{v4.8h\},v8\[-1\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `luti2 v2.8h,\{ ?v4.8h ?\},v8\[-1\]'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `luti4 v32.16b,\{v4.16b\},v8\[1\]'
+[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `luti4 v32.16b,\{ ?v4.16b ?\},v8\[1\]'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: expected an Advanced SIMD vector register at operand 2 -- `luti4 v2.16b,\{v32.16b\},v8\[1\]'
+[^ :]+:[0-9]+: Error: expected an Advanced SIMD vector register at operand 2 -- `luti4 v2.16b,\{ ?v32.16b ?\},v8\[1\]'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: operand 3 must be a SIMD vector without a type qualifier encoding a bit index -- `luti4 v2.16b,\{v4.16b\},v32\[1\]'
+[^ :]+:[0-9]+: Error: operand 3 must be a SIMD vector without a type qualifier encoding a bit index -- `luti4 v2.16b,\{ ?v4.16b ?\},v32\[1\]'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: register element index out of range 0 to 1 at operand 3 -- `luti4 v2.16b,\{v4.16b\},v8\[2\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 1 at operand 3 -- `luti4 v2.16b,\{ ?v4.16b ?\},v8\[2\]'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: register element index out of range 0 to 1 at operand 3 -- `luti4 v2.16b,\{v4.16b\},v8\[-1\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 1 at operand 3 -- `luti4 v2.16b,\{ ?v4.16b ?\},v8\[-1\]'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `luti4 v32.8h,\{v4.8h,v5.8h\},v8\[1\]'
-[^ :]+:[0-9]+: Error: operand 2 must be a SIMD vector register list -- `luti4 v2.8h,\{v31.8h,v32.8h\},v8\[1\]'
-[^ :]+:[0-9]+: Error: operand 3 must be a SIMD vector without a type qualifier encoding a bit index -- `luti4 v2.8h,\{v4.8h,v5.8h\},v32\[1\]'
-[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `luti4 v2.8h,\{v4.8h,v5.8h\},v8\[4\]'
-[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `luti4 v2.8h,\{v4.8h,v5.8h\},v8\[-1\]'
-[^ :]+:[0-9]+: Error: the register list must have a stride of 1 at operand 2 -- `luti4 v2.8h,\{v4.8h,v6.8h\},v8\[2\]'
-[^ :]+:[0-9]+: Error: expected a single-register list at operand 2 -- `luti2 v17.16b,\{v21.16b,v22.16b\},v27\[2\]'
-[^ :]+:[0-9]+: Error: expected a single-register list at operand 2 -- `luti2 v17.8h,\{v21.8h,v22.8h\},v27\[4\]'
-[^ :]+:[0-9]+: Error: expected a single-register list at operand 2 -- `luti4 v17.16b,\{v21.16b,v22.16b\},v27\[1\]'
-[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `luti4 v17.8h,\{v21.8h\},v27\[2\]'
+[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `luti4 v32.8h,\{ ?v4.8h,v5.8h ?\},v8\[1\]'
+[^ :]+:[0-9]+: Error: operand 2 must be a SIMD vector register list -- `luti4 v2.8h,\{ ?v31.8h,v32.8h ?\},v8\[1\]'
+[^ :]+:[0-9]+: Error: operand 3 must be a SIMD vector without a type qualifier encoding a bit index -- `luti4 v2.8h,\{ ?v4.8h,v5.8h ?\},v32\[1\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `luti4 v2.8h,\{ ?v4.8h,v5.8h ?\},v8\[4\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `luti4 v2.8h,\{ ?v4.8h,v5.8h ?\},v8\[-1\]'
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 at operand 2 -- `luti4 v2.8h,\{ ?v4.8h,v6.8h ?\},v8\[2\]'
+[^ :]+:[0-9]+: Error: expected a single-register list at operand 2 -- `luti2 v17.16b,\{ ?v21.16b,v22.16b ?\},v27\[2\]'
+[^ :]+:[0-9]+: Error: expected a single-register list at operand 2 -- `luti2 v17.8h,\{ ?v21.8h,v22.8h ?\},v27\[4\]'
+[^ :]+:[0-9]+: Error: expected a single-register list at operand 2 -- `luti4 v17.16b,\{ ?v21.16b,v22.16b ?\},v27\[1\]'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `luti4 v17.8h,\{ ?v21.8h ?\},v27\[2\]'
diff --git a/gas/testsuite/gas/aarch64/bfloat16-2-invalid.l b/gas/testsuite/gas/aarch64/bfloat16-2-invalid.l
index 5da96c7..ae949cf 100644
--- a/gas/testsuite/gas/aarch64/bfloat16-2-invalid.l
+++ b/gas/testsuite/gas/aarch64/bfloat16-2-invalid.l
@@ -166,7 +166,7 @@
 .*: Info:    did you mean this\?
 .*: Info:    	bfadd z31.h, z31.h, z31.h
 .*: Error: expected an SVE vector register at operand 1 -- `bfadd {z0.h},z0.h,z0.h'
-.*: Error: expected an SVE vector register at operand 1 -- `bfadd {z0.h-z0.h},z0.h'
+.*: Error: expected an SVE vector register at operand 1 -- `bfadd {z0.h ?- ?z0.h},z0.h'
 .*: Error: comma expected between operands at operand 3 -- `bfadd z0.h,z0.h'
 .*: Error: operand mismatch -- `bfclamp z0.b,z0.h,z0.h'
 .*: Info:    did you mean this\?
@@ -184,7 +184,7 @@
 .*: Info:    did you mean this\?
 .*: Info:    	bfclamp z31.h, z31.h, z31.h
 .*: Error: expected an SVE vector register at operand 1 -- `bfclamp {z0.h},z0.h,z0.h'
-.*: Error: expected an SVE vector register at operand 1 -- `bfclamp {z0.h-z0.h},z0.h'
+.*: Error: expected an SVE vector register at operand 1 -- `bfclamp {z0.h ?- ?z0.h},z0.h'
 .*: Error: comma expected between operands at operand 3 -- `bfclamp z0.h,z0.h'
 .*: Error: operand mismatch -- `bfmla z0.b,z0.h,z0.h\[0\]'
 .*: Info:    did you mean this\?
@@ -202,7 +202,7 @@
 .*: Info:    did you mean this\?
 .*: Info:    	bfmla z31.h, z31.h, z31.h\[8\]
 .*: Error: expected an SVE vector register at operand 1 -- `bfmla {z0.h},z0.h,z0.h\[1\]'
-.*: Error: expected an SVE vector register at operand 1 -- `bfmla {z0.h-z0.h},z0.h\[2\]'
+.*: Error: expected an SVE vector register at operand 1 -- `bfmla {z0.h ?- ?z0.h},z0.h\[2\]'
 .*: Error: expected an SVE predicate register at operand 2 -- `bfmla z0.h,z0.h\[3\]'
 .*: Error: operand mismatch -- `bfmls z0.b,z0.h,z0.h\[0\]'
 .*: Info:    did you mean this\?
@@ -220,7 +220,7 @@
 .*: Info:    did you mean this\?
 .*: Info:    	bfmls z31.h, z31.h, z31.h\[8\]
 .*: Error: expected an SVE vector register at operand 1 -- `bfmls {z0.h},z0.h,z0.h\[1\]'
-.*: Error: expected an SVE vector register at operand 1 -- `bfmls {z0.h-z0.h},z0.h\[2\]'
+.*: Error: expected an SVE vector register at operand 1 -- `bfmls {z0.h ?- ?z0.h},z0.h\[2\]'
 .*: Error: expected an SVE predicate register at operand 2 -- `bfmls z0.h,z0.h\[3\]'
 .*: Error: operand mismatch -- `bfmul z0.b,z0.h,z0.h\[0\]'
 .*: Info:    did you mean this\?
@@ -238,7 +238,7 @@
 .*: Info:    did you mean this\?
 .*: Info:    	bfmul z31.h, z31.h, z31.h\[8\]
 .*: Error: expected an SVE vector register at operand 1 -- `bfmul {z0.h},z0.h,z0.h\[1\]'
-.*: Error: expected an SVE vector register at operand 1 -- `bfmul {z0.h-z0.h},z0.h\[2\]'
+.*: Error: expected an SVE vector register at operand 1 -- `bfmul {z0.h ?- ?z0.h},z0.h\[2\]'
 .*: Error: expected an SVE predicate register at operand 2 -- `bfmul z0.h,z0.h\[3\]'
 .*: Error: operand mismatch -- `bfsub z0.b,z0.h,z0.h'
 .*: Info:    did you mean this\?
@@ -256,7 +256,7 @@
 .*: Info:    did you mean this\?
 .*: Info:    	bfsub z31.h, z31.h, z31.h
 .*: Error: expected an SVE vector register at operand 1 -- `bfsub {z0.h},z0.h,z0.h'
-.*: Error: expected an SVE vector register at operand 1 -- `bfsub {z0.h-z0.h},z0.h'
+.*: Error: expected an SVE vector register at operand 1 -- `bfsub {z0.h ?- ?z0.h},z0.h'
 .*: Error: comma expected between operands at operand 3 -- `bfsub z0.h,z0.h'
 .*: Warning: output register of preceding `movprfx' expected as output at operand 1 -- `bfclamp z1.h,z3.h,z16.h'
 .*: Warning: output register of preceding `movprfx' not used in current instruction at operand 1 -- `bfmla z10.h,z16.h,z3.h\[7\]'
diff --git a/gas/testsuite/gas/aarch64/cpa-addsub-bad.l b/gas/testsuite/gas/aarch64/cpa-addsub-bad.l
index c0c671b..bbce0a7 100644
--- a/gas/testsuite/gas/aarch64/cpa-addsub-bad.l
+++ b/gas/testsuite/gas/aarch64/cpa-addsub-bad.l
@@ -2,18 +2,18 @@
 .*: Error: operand mismatch -- `addpt w5,w8,w0'
 .*: Info:\s+did you mean this\?
 .*: Info:\s+addpt x5, x8, x0
-.*: Error: only 'LSL' shift is permitted at operand 3 -- `addpt x5,x8,x0,asr#6'
-.*: Error: shift amount out of range 0 to 7 at operand 3 -- `addpt x5,x8,x0,lsl#9'
-.*: Error: expected an integer or zero register at operand 3 -- `addpt x5,x8,sp,lsl#5'
-.*: Error: unexpected register type at operand 1 -- `addpt xzr,x8,x0,lsl#3'
+.*: Error: only 'LSL' shift is permitted at operand 3 -- `addpt x5,x8,x0,asr ?#6'
+.*: Error: shift amount out of range 0 to 7 at operand 3 -- `addpt x5,x8,x0,lsl ?#9'
+.*: Error: expected an integer or zero register at operand 3 -- `addpt x5,x8,sp,lsl ?#5'
+.*: Error: unexpected register type at operand 1 -- `addpt xzr,x8,x0,lsl ?#3'
 
 .*: Error: operand mismatch -- `subpt w5,w8,w0'
 .*: Info:\s+did you mean this\?
 .*: Info:\s+subpt x5, x8, x0
-.*: Error: only 'LSL' shift is permitted at operand 3 -- `subpt x5,x8,x0,asr#6'
-.*: Error: shift amount out of range 0 to 7 at operand 3 -- `subpt x5,x8,x0,lsl#9'
-.*: Error: expected an integer or zero register at operand 3 -- `subpt x5,x8,sp,lsl#5'
-.*: Error: unexpected register type at operand 1 -- `subpt xzr,x8,x0,lsl#3'
+.*: Error: only 'LSL' shift is permitted at operand 3 -- `subpt x5,x8,x0,asr ?#6'
+.*: Error: shift amount out of range 0 to 7 at operand 3 -- `subpt x5,x8,x0,lsl ?#9'
+.*: Error: expected an integer or zero register at operand 3 -- `subpt x5,x8,sp,lsl ?#5'
+.*: Error: unexpected register type at operand 1 -- `subpt xzr,x8,x0,lsl ?#3'
 
 .*: Error: operand mismatch -- `maddpt w1,x2,x3,x4'
 .*: Info:\s+did you mean this\?
diff --git a/gas/testsuite/gas/aarch64/cpa-addsub-neg.l b/gas/testsuite/gas/aarch64/cpa-addsub-neg.l
index 44a7236..79ce81d 100644
--- a/gas/testsuite/gas/aarch64/cpa-addsub-neg.l
+++ b/gas/testsuite/gas/aarch64/cpa-addsub-neg.l
@@ -3,16 +3,16 @@
 .*: Error: selected processor does not support `addpt sp,x0,x0'
 .*: Error: selected processor does not support `addpt x0,sp,x0'
 .*: Error: selected processor does not support `addpt x0,x0,xzr'
-.*: Error: selected processor does not support `addpt x0,x0,x0,lsl#0'
-.*: Error: selected processor does not support `addpt x0,x0,x0,lsl#7'
-.*: Error: selected processor does not support `addpt x8,x13,x29,lsl#5'
+.*: Error: selected processor does not support `addpt x0,x0,x0,lsl ?#0'
+.*: Error: selected processor does not support `addpt x0,x0,x0,lsl ?#7'
+.*: Error: selected processor does not support `addpt x8,x13,x29,lsl ?#5'
 .*: Error: selected processor does not support `subpt x0,x0,x0'
 .*: Error: selected processor does not support `subpt sp,x0,x0'
 .*: Error: selected processor does not support `subpt x0,sp,x0'
 .*: Error: selected processor does not support `subpt x0,x0,xzr'
-.*: Error: selected processor does not support `subpt x0,x0,x0,lsl#0'
-.*: Error: selected processor does not support `subpt x0,x0,x0,lsl#7'
-.*: Error: selected processor does not support `subpt x1,x10,x22,lsl#2'
+.*: Error: selected processor does not support `subpt x0,x0,x0,lsl ?#0'
+.*: Error: selected processor does not support `subpt x0,x0,x0,lsl ?#7'
+.*: Error: selected processor does not support `subpt x1,x10,x22,lsl ?#2'
 .*: Error: selected processor does not support `maddpt x0,x0,x0,x0'
 .*: Error: selected processor does not support `maddpt xzr,x0,x0,x0'
 .*: Error: selected processor does not support `maddpt x0,xzr,x0,x0'
diff --git a/gas/testsuite/gas/aarch64/diagnostic.l b/gas/testsuite/gas/aarch64/diagnostic.l
index 85ec9fe..1c83662 100644
--- a/gas/testsuite/gas/aarch64/diagnostic.l
+++ b/gas/testsuite/gas/aarch64/diagnostic.l
@@ -21,17 +21,17 @@
 [^:]*:23: Error: immediate value out of range 1 to 32 at operand 3 -- `scvtf s0,w0,0'
 [^:]*:24: Error: register number out of range 0 to 15 at operand 3 -- `smlal v0.4s,v31.4h,v16.h\[1\]'
 [^:]*:25: Error: register element index out of range 0 to 7 at operand 3 -- `smlal v0.4s,v31.4h,v15.h\[8\]'
-[^:]*:26: Error: extend operator expected at operand 3 -- `add sp,x0,x7,lsr#2'
-[^:]*:27: Error: shift amount out of range 0 to 4 at operand 3 -- `add x0,x0,x7,uxtx#5'
-[^:]*:28: Error: 'ROR' operator not allowed at operand 3 -- `add x0,xzr,x7,ror#5'
-[^:]*:29: Error: shift amount out of range 0 to 31 at operand 3 -- `add w0,wzr,w7,asr#32'
+[^:]*:26: Error: extend operator expected at operand 3 -- `add sp,x0,x7,lsr ?#2'
+[^:]*:27: Error: shift amount out of range 0 to 4 at operand 3 -- `add x0,x0,x7,uxtx ?#5'
+[^:]*:28: Error: 'ROR' operator not allowed at operand 3 -- `add x0,xzr,x7,ror ?#5'
+[^:]*:29: Error: shift amount out of range 0 to 31 at operand 3 -- `add w0,wzr,w7,asr ?#32'
 [^:]*:30: Error: invalid post-increment amount at operand 2 -- `st2 \{v0.4s,v1.4s\},\[sp\],#24'
-[^:]*:31: Error: invalid shift amount at operand 2 -- `ldr q0,\[x0,w0,uxtw#5\]'
+[^:]*:31: Error: invalid shift amount at operand 2 -- `ldr q0,\[x0,w0,uxtw ?#5\]'
 [^:]*:32: Error: expected a list of 2 registers at operand 1 -- `st2 \{v0.4s,v1.4s,v2.4s,v3.4s\},\[sp\],#64'
-[^:]*:33: Error: shift amount must be 0 or 12 at operand 3 -- `adds x1,sp,2134,lsl#4'
-[^:]*:34: Error: shift amount must be a multiple of 16 at operand 2 -- `movz w0,2134,lsl#8'
-[^:]*:35: Error: shift amount out of range 0 to 16 at operand 2 -- `movz w0,2134,lsl#32'
-[^:]*:36: Error: shift amount must be a multiple of 16 at operand 2 -- `movz x0,2134,lsl#47'
+[^:]*:33: Error: shift amount must be 0 or 12 at operand 3 -- `adds x1,sp,2134,lsl ?#4'
+[^:]*:34: Error: shift amount must be a multiple of 16 at operand 2 -- `movz w0,2134,lsl ?#8'
+[^:]*:35: Error: shift amount out of range 0 to 16 at operand 2 -- `movz w0,2134,lsl ?#32'
+[^:]*:36: Error: shift amount must be a multiple of 16 at operand 2 -- `movz x0,2134,lsl ?#47'
 [^:]*:37: Error: immediate value out of range 1 to 17 at operand 4 -- `sbfiz w0,w7,15,18'
 [^:]*:38: Error: immediate value out of range 1 to 32 at operand 4 -- `sbfiz w0,w7,15,0'
 [^:]*:39: Error: invalid shift amount at operand 3 -- `shll v1.4s,v2.4h,#15'
@@ -40,12 +40,12 @@
 [^:]*:42: Error: immediate value out of range 1 to 8 at operand 3 -- `sqshrn2 v2.16b,v3.8h,#17'
 [^:]*:43: Error: immediate value out of range -128 to 255 at operand 2 -- `movi v1.4h,256'
 [^:]*:44: Error: immediate value out of range -128 to 255 at operand 2 -- `movi v1.4h,-129'
-[^:]*:45: Error: invalid shift operator at operand 2 -- `movi v1.4h,255,msl#8'
+[^:]*:45: Error: invalid shift operator at operand 2 -- `movi v1.4h,255,msl ?#8'
 [^:]*:46: Error: invalid value for immediate at operand 2 -- `movi d0,256'
-[^:]*:47: Error: immediate value must be a multiple of 8 at operand 2 -- `movi v1.4h,255,lsl#7'
-[^:]*:48: Error: shift amount out of range 0 to 8 at operand 2 -- `movi v1.4h,255,lsl#16'
-[^:]*:49: Error: shift amount must be 0 or 16 at operand 2 -- `movi v2.2s,255,msl#0'
-[^:]*:50: Error: shift amount must be 0 or 16 at operand 2 -- `movi v2.2s,255,msl#15'
+[^:]*:47: Error: immediate value must be a multiple of 8 at operand 2 -- `movi v1.4h,255,lsl ?#7'
+[^:]*:48: Error: shift amount out of range 0 to 8 at operand 2 -- `movi v1.4h,255,lsl ?#16'
+[^:]*:49: Error: shift amount must be 0 or 16 at operand 2 -- `movi v2.2s,255,msl ?#0'
+[^:]*:50: Error: shift amount must be 0 or 16 at operand 2 -- `movi v2.2s,255,msl ?#15'
 [^:]*:51: Error: invalid floating-point constant at operand 2 -- `fmov v1.2s,1.01'
 [^:]*:52: Error: invalid floating-point constant at operand 2 -- `fmov v1.2d,1.01'
 [^:]*:53: Error: invalid floating-point constant at operand 2 -- `fmov s3,1.01'
@@ -53,27 +53,27 @@
 [^:]*:55: Error: immediate zero expected at operand 2 -- `fcmp d0,#1.0'
 [^:]*:56: Error: expected a scalar SIMD or floating-point register at operand 2 -- `fcmp d0,x0'
 [^:]*:57: Error: immediate zero expected at operand 3 -- `cmgt v0.4s,v2.4s,#1'
-[^:]*:58: Error: unexpected characters following instruction at operand 2 -- `fmov d3,1.00,lsl#3'
+[^:]*:58: Error: unexpected characters following instruction at operand 2 -- `fmov d3,1.00,lsl ?#3'
 [^:]*:59: Error: invalid offset register at operand 2 -- `st2 {v0.4s,v1.4s},\[sp\],sp'
 [^:]*:60: Error: writeback value must be an immediate constant at operand 2 -- `st2 {v0.4s,v1.4s},\[sp\],zr'
-[^:]*:61: Error: invalid shift for the register offset addressing mode at operand 2 -- `ldr q0,\[x0,w0,lsr#4\]'
-[^:]*:62: Error: only 'LSL' shift is permitted at operand 3 -- `adds x1,sp,2134,uxtw#12'
-[^:]*:63: Error: shift amount out of range 0 to 63 at operand 2 -- `movz x0,2134,lsl#64'
-[^:]*:64: Error: expected an integer or zero register at operand 1 -- `adds sp,sp,2134,lsl#12'
+[^:]*:61: Error: invalid shift for the register offset addressing mode at operand 2 -- `ldr q0,\[x0,w0,lsr ?#4\]'
+[^:]*:62: Error: only 'LSL' shift is permitted at operand 3 -- `adds x1,sp,2134,uxtw ?#12'
+[^:]*:63: Error: shift amount out of range 0 to 63 at operand 2 -- `movz x0,2134,lsl ?#64'
+[^:]*:64: Error: expected an integer or zero register at operand 1 -- `adds sp,sp,2134,lsl ?#12'
 [^:]*:65: Error: the optional immediate offset can only be 0 at operand 2 -- `ldxrb w2,\[x0,#1\]'
 [^:]*:66: Error: invalid addressing mode at operand 2 -- `ldrb w0,x1,x2,sxtx'
-[^:]*:67: Error: invalid shift amount at operand 2 -- `prfm PLDL3KEEP,\[x9,x15,sxtx#2\]'
+[^:]*:67: Error: invalid shift amount at operand 2 -- `prfm PLDL3KEEP,\[x9,x15,sxtx ?#2\]'
 [^:]*:68: Error: C0 - C15 expected at operand 3 -- `sysl x7,#1,C16,C30,#1'
 [^:]*:69: Error: C0 - C15 expected at operand 4 -- `sysl x7,#1,C15,C77,#1'
 [^:]*:70: Error: operand 3 must be a 4-bit opcode field named for historical reasons C0 - C15 -- `sysl x7,#1,x15,C1,#1'
-[^:]*:71: Error: extending shift is not permitted at operand 3 -- `add x0,xzr,x7,uxtx#5'
+[^:]*:71: Error: extending shift is not permitted at operand 3 -- `add x0,xzr,x7,uxtx ?#5'
 [^:]*:72: Error: bad expression at operand 2 -- `mov x0,##5'
 [^:]*:73: Error: unknown mnemonic `bad' -- `bad expression'
 [^:]*:74: Error: unknown mnemonic `mockup' -- `mockup-op'
-[^:]*:75: Error: comma expected between operands at operand 2 -- `orr x0. x0,#0xff,lsl#1'
+[^:]*:75: Error: comma expected between operands at operand 2 -- `orr x0. x0,#0xff,lsl ?#1'
 [^:]*:76: Error: the specified relocation type is not allowed for MOVK at operand 2 -- `movk x1,#:abs_g1_s:s12'
-[^:]*:77: Error: can't mix relocation modifier with explicit shift at operand 2 -- `movz x1,#:abs_g1_s:s12,lsl#16'
-[^:]*:78: Error: register offset not allowed in pre-indexed addressing mode at operand 2 -- `prfm pldl3strm,\[sp,w0,sxtw#3\]!'
+[^:]*:77: Error: can't mix relocation modifier with explicit shift at operand 2 -- `movz x1,#:abs_g1_s:s12,lsl ?#16'
+[^:]*:78: Error: register offset not allowed in pre-indexed addressing mode at operand 2 -- `prfm pldl3strm,\[sp,w0,sxtw ?#3\]!'
 [^:]*:79: Error: immediate value out of range 0 to 31 at operand 1 -- `prfm 0x2f,LABEL1'
 [^:]*:80: Error: immediate value out of range 0 to 15 at operand 1 -- `dmb #16'
 [^:]*:81: Error: immediate value out of range 0 to 31 at operand 2 -- `tbz w0,#40,0x17c'
@@ -84,8 +84,8 @@
 [^:]*:86: Error: immediate value must be a multiple of 4 at operand 3 -- `ldnp w7,w15,\[x3,#3\]'
 [^:]*:87: Error: unexpected address writeback at operand 3 -- `stnp x7,x15,\[x3,#32\]!'
 [^:]*:88: Error: immediate offset out of range -256 to 252 at operand 3 -- `ldnp w7,w15,\[x3,#256\]'
-[^:]*:89: Error: shift is not permitted at operand 2 -- `movi v1.2d,4294967295,lsl#0'
-[^:]*:90: Error: shift amount must be 0 at operand 2 -- `movi v1.8b,97,lsl#8'
+[^:]*:89: Error: shift is not permitted at operand 2 -- `movi v1.2d,4294967295,lsl ?#0'
+[^:]*:90: Error: shift amount must be 0 at operand 2 -- `movi v1.8b,97,lsl ?#8'
 [^:]*:91: Error: unknown or missing system register name at operand 1 -- `msr dummy,x1'
 [^:]*:92: Error: invalid floating-point constant at operand 2 -- `fmov s0,0x42000000'
 [^:]*:93: Error: immediate value must be a multiple of 8 at operand 3 -- `ldp x0,x1,\[x2,#4\]'
@@ -156,18 +156,18 @@
 [^:]*:280: Error: invalid addressing mode at operand 2 -- `prfum pldl1keep,\[x3\],x4'
 [^:]*:282: Error: '\]' expected at operand 2 -- `ldr x0,\[x1,#1,mul vl\]'
 [^:]*:283: Error: invalid use of 'MUL' at operand 2 -- `ldr x0,\[x1,x2,mul vl\]'
-[^:]*:284: Error: invalid use of 'MUL' at operand 2 -- `ldr x0,\[x1,x2,mul#1\]'
-[^:]*:285: Error: invalid use of 'MUL' at operand 2 -- `ldr x0,\[x1,x2,mul#4\]'
+[^:]*:284: Error: invalid use of 'MUL' at operand 2 -- `ldr x0,\[x1,x2,mul ?#1\]'
+[^:]*:285: Error: invalid use of 'MUL' at operand 2 -- `ldr x0,\[x1,x2,mul ?#4\]'
 [^:]*:287: Error: invalid use of 'MUL' at operand 2 -- `strb w7,\[x30,x0,mul\]'
-[^:]*:288: Error: invalid use of 'MUL' at operand 2 -- `strb w7,\[x30,x0,mul#1\]'
+[^:]*:288: Error: invalid use of 'MUL' at operand 2 -- `strb w7,\[x30,x0,mul ?#1\]'
 [^:]*:289: Error: invalid use of 'MUL' at operand 2 -- `strb w7,\[x30,w0,mul\]'
-[^:]*:290: Error: invalid use of 'MUL' at operand 2 -- `strb w7,\[x30,w0,mul#2\]'
-[^:]*:292: Error: invalid use of 'MUL' at operand 3 -- `adds x1,sp,1,mul#1'
-[^:]*:293: Error: invalid use of 'MUL' at operand 3 -- `adds x1,sp,2,mul#255'
-[^:]*:294: Error: invalid use of 'MUL' at operand 3 -- `adds x1,sp,3,mul#256'
-[^:]*:295: Error: invalid use of 'MUL' at operand 4 -- `orr x0,x0,#0xff,mul#1'
-[^:]*:296: Error: invalid use of 'MUL' at operand 4 -- `orr x0,x0,#0xfe,mul#255'
-[^:]*:297: Error: invalid use of 'MUL' at operand 4 -- `orr x0,x0,#0xfc,mul#256'
+[^:]*:290: Error: invalid use of 'MUL' at operand 2 -- `strb w7,\[x30,w0,mul ?#2\]'
+[^:]*:292: Error: invalid use of 'MUL' at operand 3 -- `adds x1,sp,1,mul ?#1'
+[^:]*:293: Error: invalid use of 'MUL' at operand 3 -- `adds x1,sp,2,mul ?#255'
+[^:]*:294: Error: invalid use of 'MUL' at operand 3 -- `adds x1,sp,3,mul ?#256'
+[^:]*:295: Error: invalid use of 'MUL' at operand 4 -- `orr x0,x0,#0xff,mul ?#1'
+[^:]*:296: Error: invalid use of 'MUL' at operand 4 -- `orr x0,x0,#0xfe,mul ?#255'
+[^:]*:297: Error: invalid use of 'MUL' at operand 4 -- `orr x0,x0,#0xfc,mul ?#256'
 [^:]*:299: Warning: ignoring redefinition of register alias 'ip0'
 [^:]*:300: Warning: ignoring redefinition of register alias 'ip1'
 [^:]*:301: Warning: ignoring redefinition of register alias 'lr'
diff --git a/gas/testsuite/gas/aarch64/fp8-sme-dot-illegal.l b/gas/testsuite/gas/aarch64/fp8-sme-dot-illegal.l
index 3444d73..bd25bb3 100644
--- a/gas/testsuite/gas/aarch64/fp8-sme-dot-illegal.l
+++ b/gas/testsuite/gas/aarch64/fp8-sme-dot-illegal.l
@@ -1,72 +1,72 @@
 [^:]*: Assembler messages:
-[^:]*:1: Error: z0-z15 expected at operand 3 -- `fdot za\.s\[w8,0\],{z0\.b-z1\.b},z16\.b\[0\]'
-[^:]*:2: Error: start register out of range at operand 2 -- `fdot za\.s\[w8,0\],{z1\.b-z2\.b},z0\.b\[0\]'
-[^:]*:3: Error: expected a list of 2 registers at operand 2 -- `fdot za\.s\[w8,0,VGx2\],{z0\.b-z3\.b},z0\.b\[0\]'
-[^:]*:4: Error: register element index out of range 0 to 3 at operand 3 -- `fdot za\.s\[w8,0\],{z0\.b-z1\.b},z0\.b\[4\]'
-[^:]*:5: Error: immediate offset out of range 0 to 7 at operand 1 -- `fdot za\.s\[w8,8\],{z0\.b-z1\.b},z0\.b\[0\]'
-[^:]*:6: Error: expected a selection register in the range w8-w11 at operand 1 -- `fdot za\.s\[w7,0\],{z0\.b-z1\.b},z0\.b\[0\]'
-[^:]*:7: Error: expected a selection register in the range w8-w11 at operand 1 -- `fdot za\.s\[w12,0\],{z0\.b-z1\.b},z0\.b\[0\]'
-[^:]*:9: Error: z0-z15 expected at operand 3 -- `fdot za\.s\[w8,0\],{z0\.b-z3\.b},z16\.b\[0\]'
-[^:]*:10: Error: start register out of range at operand 2 -- `fdot za\.s\[w8,0\],{z2\.b-z5\.b},z0\.b\[0\]'
-[^:]*:11: Error: expected a list of 4 registers at operand 2 -- `fdot za\.s\[w8,0,VGx4\],{z0\.b-z1\.b},z0\.b\[0\]'
-[^:]*:12: Error: register element index out of range 0 to 3 at operand 3 -- `fdot za\.s\[w8,0\],{z0\.b-z3\.b},z0\.b\[4\]'
-[^:]*:13: Error: immediate offset out of range 0 to 7 at operand 1 -- `fdot za\.s\[w8,8\],{z0\.b-z3\.b},z0\.b\[0\]'
-[^:]*:14: Error: expected a selection register in the range w8-w11 at operand 1 -- `fdot za\.s\[w7,0\],{z0\.b-z3\.b},z0\.b\[0\]'
-[^:]*:15: Error: expected a selection register in the range w8-w11 at operand 1 -- `fdot za\.s\[w12,0\],{z0\.b-z3\.b},z0\.b\[0\]'
-[^:]*:17: Error: z0-z15 expected at operand 3 -- `fdot za\.s\[w8,0\],{z0\.b-z1\.b},z16\.b'
-[^:]*:18: Error: immediate offset out of range 0 to 7 at operand 1 -- `fdot za\.s\[w8,8\],{z0\.b-z1\.b},z0\.b'
-[^:]*:19: Error: expected a selection register in the range w8-w11 at operand 1 -- `fdot za\.s\[w7,0\],{z0\.b-z1\.b},z0\.b'
-[^:]*:20: Error: expected a selection register in the range w8-w11 at operand 1 -- `fdot za\.s\[w12,0\],{z0\.b-z1\.b},z0\.b'
-[^:]*:21: Error: expected a list of 4 registers at operand 2 -- `fdot za\.s\[w8,0,VGx4\],{z0\.b-z1\.b},z0\.b'
-[^:]*:23: Error: z0-z15 expected at operand 3 -- `fdot za\.s\[w8,0\],{z0\.b-z3\.b},z16\.b'
-[^:]*:24: Error: immediate offset out of range 0 to 7 at operand 1 -- `fdot za\.s\[w8,8\],{z0\.b-z3\.b},z0\.b'
-[^:]*:25: Error: expected a selection register in the range w8-w11 at operand 1 -- `fdot za\.s\[w7,0\],{z0\.b-z3\.b},z0\.b'
-[^:]*:26: Error: expected a selection register in the range w8-w11 at operand 1 -- `fdot za\.s\[w12,0\],{z0\.b-z3\.b},z0\.b'
-[^:]*:27: Error: expected a list of 2 registers at operand 2 -- `fdot za\.s\[w8,0,VGx2\],{z0\.b-z3\.b},z0\.b'
-[^:]*:29: Error: expected a list of 2 registers at operand 3 -- `fdot za\.s\[w8,0\],{z0\.b-z1\.b},{z0\.b-z3\.b}'
-[^:]*:30: Error: start register out of range at operand 3 -- `fdot za\.s\[w8,0\],{z0\.b-z1\.b},{z1\.b-z2\.b}'
-[^:]*:31: Error: start register out of range at operand 2 -- `fdot za\.s\[w8,0\],{z1\.b-z2\.b},{z0\.b-z1\.b}'
-[^:]*:32: Error: expected a selection register in the range w8-w11 at operand 1 -- `fdot za\.s\[w7,0\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
-[^:]*:33: Error: immediate offset out of range 0 to 7 at operand 1 -- `fdot za\.s\[w8,8\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
-[^:]*:35: Error: expected a list of 4 registers at operand 3 -- `fdot za\.s\[w8,0\],{z0\.b-z3\.b},{z0\.b-z1\.b}'
-[^:]*:36: Error: start register out of range at operand 3 -- `fdot za\.s\[w8,0\],{z0\.b-z3\.b},{z2\.b-z5\.b}'
-[^:]*:37: Error: start register out of range at operand 2 -- `fdot za\.s\[w8,0\],{z2\.b-z5\.b},{z0\.b-z3\.b}'
-[^:]*:38: Error: expected a selection register in the range w8-w11 at operand 1 -- `fdot za\.s\[w7,0\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
-[^:]*:39: Error: immediate offset out of range 0 to 7 at operand 1 -- `fdot za\.s\[w8,8\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
-[^:]*:41: Error: z0-z15 expected at operand 3 -- `fdot za\.h\[w8,0\],{z0\.b-z1\.b},z16\.b\[0\]'
-[^:]*:42: Error: start register out of range at operand 2 -- `fdot za\.h\[w8,0\],{z1\.b-z2\.b},z0\.b\[0\]'
-[^:]*:43: Error: expected a list of 2 registers at operand 2 -- `fdot za\.h\[w8,0,VGx2\],{z0\.b-z3\.b},z0\.b\[0\]'
-[^:]*:44: Error: register element index out of range 0 to 7 at operand 3 -- `fdot za\.h\[w8,0\],{z0\.b-z1\.b},z0\.b\[8\]'
-[^:]*:45: Error: immediate offset out of range 0 to 7 at operand 1 -- `fdot za\.h\[w8,8\],{z0\.b-z1\.b},z0\.b\[0\]'
-[^:]*:46: Error: expected a selection register in the range w8-w11 at operand 1 -- `fdot za\.h\[w7,0\],{z0\.b-z1\.b},z0\.b\[0\]'
-[^:]*:47: Error: expected a selection register in the range w8-w11 at operand 1 -- `fdot za\.h\[w12,0\],{z0\.b-z1\.b},z0\.b\[0\]'
-[^:]*:49: Error: z0-z15 expected at operand 3 -- `fdot za\.h\[w8,0\],{z0\.b-z3\.b},z16\.b\[0\]'
-[^:]*:50: Error: start register out of range at operand 2 -- `fdot za\.h\[w8,0\],{z2\.b-z5\.b},z0\.b\[0\]'
-[^:]*:51: Error: expected a list of 4 registers at operand 2 -- `fdot za\.h\[w8,0,VGx4\],{z0\.b-z1\.b},z0\.b\[0\]'
-[^:]*:52: Error: register element index out of range 0 to 7 at operand 3 -- `fdot za\.h\[w8,0\],{z0\.b-z3\.b},z0\.b\[8\]'
-[^:]*:53: Error: immediate offset out of range 0 to 7 at operand 1 -- `fdot za\.h\[w8,8\],{z0\.b-z3\.b},z0\.b\[0\]'
-[^:]*:54: Error: expected a selection register in the range w8-w11 at operand 1 -- `fdot za\.h\[w7,0\],{z0\.b-z3\.b},z0\.b\[0\]'
-[^:]*:55: Error: expected a selection register in the range w8-w11 at operand 1 -- `fdot za\.h\[w12,0\],{z0\.b-z3\.b},z0\.b\[0\]'
-[^:]*:57: Error: z0-z15 expected at operand 3 -- `fdot za\.h\[w8,0\],{z0\.b-z1\.b},z16\.b'
-[^:]*:58: Error: immediate offset out of range 0 to 7 at operand 1 -- `fdot za\.h\[w8,8\],{z0\.b-z1\.b},z0\.b'
-[^:]*:59: Error: expected a selection register in the range w8-w11 at operand 1 -- `fdot za\.h\[w7,0\],{z0\.b-z1\.b},z0\.b'
-[^:]*:60: Error: expected a selection register in the range w8-w11 at operand 1 -- `fdot za\.h\[w12,0\],{z0\.b-z1\.b},z0\.b'
-[^:]*:61: Error: expected a list of 4 registers at operand 2 -- `fdot za\.h\[w8,0,VGx4\],{z0\.b-z1\.b},z0\.b'
-[^:]*:63: Error: z0-z15 expected at operand 3 -- `fdot za\.h\[w8,0\],{z0\.b-z3\.b},z16\.b'
-[^:]*:64: Error: immediate offset out of range 0 to 7 at operand 1 -- `fdot za\.h\[w8,8\],{z0\.b-z3\.b},z0\.b'
-[^:]*:65: Error: expected a selection register in the range w8-w11 at operand 1 -- `fdot za\.h\[w7,0\],{z0\.b-z3\.b},z0\.b'
-[^:]*:66: Error: expected a selection register in the range w8-w11 at operand 1 -- `fdot za\.h\[w12,0\],{z0\.b-z3\.b},z0\.b'
-[^:]*:67: Error: expected a list of 2 registers at operand 2 -- `fdot za\.h\[w8,0,VGx2\],{z0\.b-z3\.b},z0\.b'
-[^:]*:69: Error: expected a list of 2 registers at operand 3 -- `fdot za\.h\[w8,0\],{z0\.b-z1\.b},{z0\.b-z3\.b}'
-[^:]*:70: Error: start register out of range at operand 3 -- `fdot za\.h\[w8,0\],{z0\.b-z1\.b},{z1\.b-z2\.b}'
-[^:]*:71: Error: start register out of range at operand 2 -- `fdot za\.h\[w8,0\],{z1\.b-z2\.b},{z0\.b-z1\.b}'
-[^:]*:72: Error: expected a selection register in the range w8-w11 at operand 1 -- `fdot za\.h\[w7,0\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
-[^:]*:73: Error: immediate offset out of range 0 to 7 at operand 1 -- `fdot za\.h\[w8,8\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
-[^:]*:75: Error: expected a list of 4 registers at operand 3 -- `fdot za\.h\[w8,0\],{z0\.b-z3\.b},{z0\.b-z1\.b}'
-[^:]*:76: Error: start register out of range at operand 3 -- `fdot za\.h\[w8,0\],{z0\.b-z3\.b},{z2\.b-z5\.b}'
-[^:]*:77: Error: start register out of range at operand 2 -- `fdot za\.h\[w8,0\],{z2\.b-z5\.b},{z0\.b-z3\.b}'
-[^:]*:78: Error: expected a selection register in the range w8-w11 at operand 1 -- `fdot za\.h\[w7,0\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
-[^:]*:79: Error: immediate offset out of range 0 to 7 at operand 1 -- `fdot za\.h\[w8,8\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
+[^:]*:1: Error: z0-z15 expected at operand 3 -- `fdot za\.s\[w8,0\],{ ?z0\.b-z1\.b ?},z16\.b\[0\]'
+[^:]*:2: Error: start register out of range at operand 2 -- `fdot za\.s\[w8,0\],{ ?z1\.b-z2\.b ?},z0\.b\[0\]'
+[^:]*:3: Error: expected a list of 2 registers at operand 2 -- `fdot za\.s\[w8,0,VGx2\],{ ?z0\.b-z3\.b ?},z0\.b\[0\]'
+[^:]*:4: Error: register element index out of range 0 to 3 at operand 3 -- `fdot za\.s\[w8,0\],{ ?z0\.b-z1\.b ?},z0\.b\[4\]'
+[^:]*:5: Error: immediate offset out of range 0 to 7 at operand 1 -- `fdot za\.s\[w8,8\],{ ?z0\.b-z1\.b ?},z0\.b\[0\]'
+[^:]*:6: Error: expected a selection register in the range w8-w11 at operand 1 -- `fdot za\.s\[w7,0\],{ ?z0\.b-z1\.b ?},z0\.b\[0\]'
+[^:]*:7: Error: expected a selection register in the range w8-w11 at operand 1 -- `fdot za\.s\[w12,0\],{ ?z0\.b-z1\.b ?},z0\.b\[0\]'
+[^:]*:9: Error: z0-z15 expected at operand 3 -- `fdot za\.s\[w8,0\],{ ?z0\.b-z3\.b ?},z16\.b\[0\]'
+[^:]*:10: Error: start register out of range at operand 2 -- `fdot za\.s\[w8,0\],{ ?z2\.b-z5\.b ?},z0\.b\[0\]'
+[^:]*:11: Error: expected a list of 4 registers at operand 2 -- `fdot za\.s\[w8,0,VGx4\],{ ?z0\.b-z1\.b ?},z0\.b\[0\]'
+[^:]*:12: Error: register element index out of range 0 to 3 at operand 3 -- `fdot za\.s\[w8,0\],{ ?z0\.b-z3\.b ?},z0\.b\[4\]'
+[^:]*:13: Error: immediate offset out of range 0 to 7 at operand 1 -- `fdot za\.s\[w8,8\],{ ?z0\.b-z3\.b ?},z0\.b\[0\]'
+[^:]*:14: Error: expected a selection register in the range w8-w11 at operand 1 -- `fdot za\.s\[w7,0\],{ ?z0\.b-z3\.b ?},z0\.b\[0\]'
+[^:]*:15: Error: expected a selection register in the range w8-w11 at operand 1 -- `fdot za\.s\[w12,0\],{ ?z0\.b-z3\.b ?},z0\.b\[0\]'
+[^:]*:17: Error: z0-z15 expected at operand 3 -- `fdot za\.s\[w8,0\],{ ?z0\.b-z1\.b ?},z16\.b'
+[^:]*:18: Error: immediate offset out of range 0 to 7 at operand 1 -- `fdot za\.s\[w8,8\],{ ?z0\.b-z1\.b ?},z0\.b'
+[^:]*:19: Error: expected a selection register in the range w8-w11 at operand 1 -- `fdot za\.s\[w7,0\],{ ?z0\.b-z1\.b ?},z0\.b'
+[^:]*:20: Error: expected a selection register in the range w8-w11 at operand 1 -- `fdot za\.s\[w12,0\],{ ?z0\.b-z1\.b ?},z0\.b'
+[^:]*:21: Error: expected a list of 4 registers at operand 2 -- `fdot za\.s\[w8,0,VGx4\],{ ?z0\.b-z1\.b ?},z0\.b'
+[^:]*:23: Error: z0-z15 expected at operand 3 -- `fdot za\.s\[w8,0\],{ ?z0\.b-z3\.b ?},z16\.b'
+[^:]*:24: Error: immediate offset out of range 0 to 7 at operand 1 -- `fdot za\.s\[w8,8\],{ ?z0\.b-z3\.b ?},z0\.b'
+[^:]*:25: Error: expected a selection register in the range w8-w11 at operand 1 -- `fdot za\.s\[w7,0\],{ ?z0\.b-z3\.b ?},z0\.b'
+[^:]*:26: Error: expected a selection register in the range w8-w11 at operand 1 -- `fdot za\.s\[w12,0\],{ ?z0\.b-z3\.b ?},z0\.b'
+[^:]*:27: Error: expected a list of 2 registers at operand 2 -- `fdot za\.s\[w8,0,VGx2\],{ ?z0\.b-z3\.b ?},z0\.b'
+[^:]*:29: Error: expected a list of 2 registers at operand 3 -- `fdot za\.s\[w8,0\],{ ?z0\.b-z1\.b ?},{ ?z0\.b-z3\.b}'
+[^:]*:30: Error: start register out of range at operand 3 -- `fdot za\.s\[w8,0\],{ ?z0\.b-z1\.b ?},{ ?z1\.b-z2\.b}'
+[^:]*:31: Error: start register out of range at operand 2 -- `fdot za\.s\[w8,0\],{ ?z1\.b-z2\.b ?},{ ?z0\.b-z1\.b}'
+[^:]*:32: Error: expected a selection register in the range w8-w11 at operand 1 -- `fdot za\.s\[w7,0\],{ ?z0\.b-z1\.b ?},{ ?z0\.b-z1\.b}'
+[^:]*:33: Error: immediate offset out of range 0 to 7 at operand 1 -- `fdot za\.s\[w8,8\],{ ?z0\.b-z1\.b ?},{ ?z0\.b-z1\.b}'
+[^:]*:35: Error: expected a list of 4 registers at operand 3 -- `fdot za\.s\[w8,0\],{ ?z0\.b-z3\.b ?},{ ?z0\.b-z1\.b}'
+[^:]*:36: Error: start register out of range at operand 3 -- `fdot za\.s\[w8,0\],{ ?z0\.b-z3\.b ?},{ ?z2\.b-z5\.b}'
+[^:]*:37: Error: start register out of range at operand 2 -- `fdot za\.s\[w8,0\],{ ?z2\.b-z5\.b ?},{ ?z0\.b-z3\.b}'
+[^:]*:38: Error: expected a selection register in the range w8-w11 at operand 1 -- `fdot za\.s\[w7,0\],{ ?z0\.b-z3\.b ?},{ ?z0\.b-z3\.b}'
+[^:]*:39: Error: immediate offset out of range 0 to 7 at operand 1 -- `fdot za\.s\[w8,8\],{ ?z0\.b-z3\.b ?},{ ?z0\.b-z3\.b}'
+[^:]*:41: Error: z0-z15 expected at operand 3 -- `fdot za\.h\[w8,0\],{ ?z0\.b-z1\.b ?},z16\.b\[0\]'
+[^:]*:42: Error: start register out of range at operand 2 -- `fdot za\.h\[w8,0\],{ ?z1\.b-z2\.b ?},z0\.b\[0\]'
+[^:]*:43: Error: expected a list of 2 registers at operand 2 -- `fdot za\.h\[w8,0,VGx2\],{ ?z0\.b-z3\.b ?},z0\.b\[0\]'
+[^:]*:44: Error: register element index out of range 0 to 7 at operand 3 -- `fdot za\.h\[w8,0\],{ ?z0\.b-z1\.b ?},z0\.b\[8\]'
+[^:]*:45: Error: immediate offset out of range 0 to 7 at operand 1 -- `fdot za\.h\[w8,8\],{ ?z0\.b-z1\.b ?},z0\.b\[0\]'
+[^:]*:46: Error: expected a selection register in the range w8-w11 at operand 1 -- `fdot za\.h\[w7,0\],{ ?z0\.b-z1\.b ?},z0\.b\[0\]'
+[^:]*:47: Error: expected a selection register in the range w8-w11 at operand 1 -- `fdot za\.h\[w12,0\],{ ?z0\.b-z1\.b ?},z0\.b\[0\]'
+[^:]*:49: Error: z0-z15 expected at operand 3 -- `fdot za\.h\[w8,0\],{ ?z0\.b-z3\.b ?},z16\.b\[0\]'
+[^:]*:50: Error: start register out of range at operand 2 -- `fdot za\.h\[w8,0\],{ ?z2\.b-z5\.b ?},z0\.b\[0\]'
+[^:]*:51: Error: expected a list of 4 registers at operand 2 -- `fdot za\.h\[w8,0,VGx4\],{ ?z0\.b-z1\.b ?},z0\.b\[0\]'
+[^:]*:52: Error: register element index out of range 0 to 7 at operand 3 -- `fdot za\.h\[w8,0\],{ ?z0\.b-z3\.b ?},z0\.b\[8\]'
+[^:]*:53: Error: immediate offset out of range 0 to 7 at operand 1 -- `fdot za\.h\[w8,8\],{ ?z0\.b-z3\.b ?},z0\.b\[0\]'
+[^:]*:54: Error: expected a selection register in the range w8-w11 at operand 1 -- `fdot za\.h\[w7,0\],{ ?z0\.b-z3\.b ?},z0\.b\[0\]'
+[^:]*:55: Error: expected a selection register in the range w8-w11 at operand 1 -- `fdot za\.h\[w12,0\],{ ?z0\.b-z3\.b ?},z0\.b\[0\]'
+[^:]*:57: Error: z0-z15 expected at operand 3 -- `fdot za\.h\[w8,0\],{ ?z0\.b-z1\.b ?},z16\.b'
+[^:]*:58: Error: immediate offset out of range 0 to 7 at operand 1 -- `fdot za\.h\[w8,8\],{ ?z0\.b-z1\.b ?},z0\.b'
+[^:]*:59: Error: expected a selection register in the range w8-w11 at operand 1 -- `fdot za\.h\[w7,0\],{ ?z0\.b-z1\.b ?},z0\.b'
+[^:]*:60: Error: expected a selection register in the range w8-w11 at operand 1 -- `fdot za\.h\[w12,0\],{ ?z0\.b-z1\.b ?},z0\.b'
+[^:]*:61: Error: expected a list of 4 registers at operand 2 -- `fdot za\.h\[w8,0,VGx4\],{ ?z0\.b-z1\.b ?},z0\.b'
+[^:]*:63: Error: z0-z15 expected at operand 3 -- `fdot za\.h\[w8,0\],{ ?z0\.b-z3\.b ?},z16\.b'
+[^:]*:64: Error: immediate offset out of range 0 to 7 at operand 1 -- `fdot za\.h\[w8,8\],{ ?z0\.b-z3\.b ?},z0\.b'
+[^:]*:65: Error: expected a selection register in the range w8-w11 at operand 1 -- `fdot za\.h\[w7,0\],{ ?z0\.b-z3\.b ?},z0\.b'
+[^:]*:66: Error: expected a selection register in the range w8-w11 at operand 1 -- `fdot za\.h\[w12,0\],{ ?z0\.b-z3\.b ?},z0\.b'
+[^:]*:67: Error: expected a list of 2 registers at operand 2 -- `fdot za\.h\[w8,0,VGx2\],{ ?z0\.b-z3\.b ?},z0\.b'
+[^:]*:69: Error: expected a list of 2 registers at operand 3 -- `fdot za\.h\[w8,0\],{ ?z0\.b-z1\.b ?},{ ?z0\.b-z3\.b}'
+[^:]*:70: Error: start register out of range at operand 3 -- `fdot za\.h\[w8,0\],{ ?z0\.b-z1\.b ?},{ ?z1\.b-z2\.b}'
+[^:]*:71: Error: start register out of range at operand 2 -- `fdot za\.h\[w8,0\],{ ?z1\.b-z2\.b ?},{ ?z0\.b-z1\.b}'
+[^:]*:72: Error: expected a selection register in the range w8-w11 at operand 1 -- `fdot za\.h\[w7,0\],{ ?z0\.b-z1\.b ?},{ ?z0\.b-z1\.b}'
+[^:]*:73: Error: immediate offset out of range 0 to 7 at operand 1 -- `fdot za\.h\[w8,8\],{ ?z0\.b-z1\.b ?},{ ?z0\.b-z1\.b}'
+[^:]*:75: Error: expected a list of 4 registers at operand 3 -- `fdot za\.h\[w8,0\],{ ?z0\.b-z3\.b ?},{ ?z0\.b-z1\.b}'
+[^:]*:76: Error: start register out of range at operand 3 -- `fdot za\.h\[w8,0\],{ ?z0\.b-z3\.b ?},{ ?z2\.b-z5\.b}'
+[^:]*:77: Error: start register out of range at operand 2 -- `fdot za\.h\[w8,0\],{ ?z2\.b-z5\.b ?},{ ?z0\.b-z3\.b}'
+[^:]*:78: Error: expected a selection register in the range w8-w11 at operand 1 -- `fdot za\.h\[w7,0\],{ ?z0\.b-z3\.b ?},{ ?z0\.b-z3\.b}'
+[^:]*:79: Error: immediate offset out of range 0 to 7 at operand 1 -- `fdot za\.h\[w8,8\],{ ?z0\.b-z3\.b ?},{ ?z0\.b-z3\.b}'
 [^:]*:81: Error: expected a selection register in the range w8-w11 at operand 1 -- `fvdot za\.h\[w7,0\],{z0\.b-z1\.b},z0\.b\[0\]'
 [^:]*:82: Error: expected a selection register in the range w8-w11 at operand 1 -- `fvdot za\.h\[w12,0\],{z0\.b-z1\.b},z0\.b\[0\]'
 [^:]*:83: Error: immediate offset out of range 0 to 7 at operand 1 -- `fvdot za\.h\[w8,8\],{z0\.b-z1\.b},z0\.b\[0\]'
diff --git a/gas/testsuite/gas/aarch64/fp8-sme-fmlal-illegal.l b/gas/testsuite/gas/aarch64/fp8-sme-fmlal-illegal.l
index 31551f9..6749b24 100644
--- a/gas/testsuite/gas/aarch64/fp8-sme-fmlal-illegal.l
+++ b/gas/testsuite/gas/aarch64/fp8-sme-fmlal-illegal.l
@@ -8,26 +8,26 @@
 [^:]*:7: Error: expected a range of two offsets at operand 1 -- `fmlal za\.h\[w8,0:3\],z0\.b,z0\.b\[0\]'
 [^:]*:8: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmlal za\.h\[w7,0:1\],z0\.b,z0\.b\[0\]'
 [^:]*:9: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmlal za\.h\[w12,0:1\],z0\.b,z0\.b\[0\]'
-[^:]*:11: Error: z0-z15 expected at operand 3 -- `fmlal za\.h\[w8,0:1\],{z0\.b-z1\.b},z16\.b\[0\]'
-[^:]*:12: Error: start register out of range at operand 2 -- `fmlal za\.h\[w8,0:1\],{z1\.b-z2\.b},z0\.b\[0\]'
-[^:]*:13: Error: expected a list of 2 registers at operand 2 -- `fmlal za\.h\[w8,0:1,VGx2\],{z0\.b-z3\.b},z0\.b\[0\]'
-[^:]*:14: Error: register element index out of range 0 to 15 at operand 3 -- `fmlal za\.h\[w8,0:1\],{z0\.b-z1\.b},z0\.b\[16\]'
-[^:]*:15: Error: expected a range of two offsets at operand 1 -- `fmlal za\.h\[w8,0\],{z0\.b-z1\.b},z0\.b\[0\]'
-[^:]*:16: Error: starting offset is not a multiple of 2 at operand 1 -- `fmlal za\.h\[w8,1:2\],{z0\.b-z1\.b},z0\.b\[0\]'
-[^:]*:17: Error: immediate offset out of range 0 to 6 at operand 1 -- `fmlal za\.h\[w8,8:9\],{z0\.b-z1\.b},z0\.b\[0\]'
-[^:]*:18: Error: expected a range of two offsets at operand 1 -- `fmlal za\.h\[w8,0:3\],{z0\.b-z1\.b},z0\.b\[0\]'
-[^:]*:19: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmlal za\.h\[w7,0:1\],{z0\.b-z1\.b},z0\.b\[0\]'
-[^:]*:20: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmlal za\.h\[w12,0:1\],{z0\.b-z1\.b},z0\.b\[0\]'
-[^:]*:22: Error: z0-z15 expected at operand 3 -- `fmlal za\.h\[w8,0:1\],{z0\.b-z3\.b},z16\.b\[0\]'
-[^:]*:23: Error: start register out of range at operand 2 -- `fmlal za\.h\[w8,0:1\],{z2\.b-z5\.b},z0\.b\[0\]'
-[^:]*:24: Error: expected a list of 4 registers at operand 2 -- `fmlal za\.h\[w8,0:1,VGx4\],{z0\.b-z1\.b},z0\.b\[0\]'
-[^:]*:25: Error: register element index out of range 0 to 15 at operand 3 -- `fmlal za\.h\[w8,0:1\],{z0\.b-z3\.b},z0\.b\[16\]'
-[^:]*:26: Error: expected a range of two offsets at operand 1 -- `fmlal za\.h\[w8,0\],{z0\.b-z3\.b},z0\.b\[0\]'
-[^:]*:27: Error: starting offset is not a multiple of 2 at operand 1 -- `fmlal za\.h\[w8,1:2\],{z0\.b-z3\.b},z0\.b\[0\]'
-[^:]*:28: Error: immediate offset out of range 0 to 6 at operand 1 -- `fmlal za\.h\[w8,8:9\],{z0\.b-z3\.b},z0\.b\[0\]'
-[^:]*:29: Error: expected a range of two offsets at operand 1 -- `fmlal za\.h\[w8,0:3\],{z0\.b-z3\.b},z0\.b\[0\]'
-[^:]*:30: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmlal za\.h\[w7,0\],{z0\.b-z3\.b},z0\.b\[0\]'
-[^:]*:31: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmlal za\.h\[w12,0\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^:]*:11: Error: z0-z15 expected at operand 3 -- `fmlal za\.h\[w8,0:1\],{ ?z0\.b-z1\.b ?},z16\.b\[0\]'
+[^:]*:12: Error: start register out of range at operand 2 -- `fmlal za\.h\[w8,0:1\],{ ?z1\.b-z2\.b ?},z0\.b\[0\]'
+[^:]*:13: Error: expected a list of 2 registers at operand 2 -- `fmlal za\.h\[w8,0:1,VGx2\],{ ?z0\.b-z3\.b ?},z0\.b\[0\]'
+[^:]*:14: Error: register element index out of range 0 to 15 at operand 3 -- `fmlal za\.h\[w8,0:1\],{ ?z0\.b-z1\.b ?},z0\.b\[16\]'
+[^:]*:15: Error: expected a range of two offsets at operand 1 -- `fmlal za\.h\[w8,0\],{ ?z0\.b-z1\.b ?},z0\.b\[0\]'
+[^:]*:16: Error: starting offset is not a multiple of 2 at operand 1 -- `fmlal za\.h\[w8,1:2\],{ ?z0\.b-z1\.b ?},z0\.b\[0\]'
+[^:]*:17: Error: immediate offset out of range 0 to 6 at operand 1 -- `fmlal za\.h\[w8,8:9\],{ ?z0\.b-z1\.b ?},z0\.b\[0\]'
+[^:]*:18: Error: expected a range of two offsets at operand 1 -- `fmlal za\.h\[w8,0:3\],{ ?z0\.b-z1\.b ?},z0\.b\[0\]'
+[^:]*:19: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmlal za\.h\[w7,0:1\],{ ?z0\.b-z1\.b ?},z0\.b\[0\]'
+[^:]*:20: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmlal za\.h\[w12,0:1\],{ ?z0\.b-z1\.b ?},z0\.b\[0\]'
+[^:]*:22: Error: z0-z15 expected at operand 3 -- `fmlal za\.h\[w8,0:1\],{ ?z0\.b-z3\.b ?},z16\.b\[0\]'
+[^:]*:23: Error: start register out of range at operand 2 -- `fmlal za\.h\[w8,0:1\],{ ?z2\.b-z5\.b ?},z0\.b\[0\]'
+[^:]*:24: Error: expected a list of 4 registers at operand 2 -- `fmlal za\.h\[w8,0:1,VGx4\],{ ?z0\.b-z1\.b ?},z0\.b\[0\]'
+[^:]*:25: Error: register element index out of range 0 to 15 at operand 3 -- `fmlal za\.h\[w8,0:1\],{ ?z0\.b-z3\.b ?},z0\.b\[16\]'
+[^:]*:26: Error: expected a range of two offsets at operand 1 -- `fmlal za\.h\[w8,0\],{ ?z0\.b-z3\.b ?},z0\.b\[0\]'
+[^:]*:27: Error: starting offset is not a multiple of 2 at operand 1 -- `fmlal za\.h\[w8,1:2\],{ ?z0\.b-z3\.b ?},z0\.b\[0\]'
+[^:]*:28: Error: immediate offset out of range 0 to 6 at operand 1 -- `fmlal za\.h\[w8,8:9\],{ ?z0\.b-z3\.b ?},z0\.b\[0\]'
+[^:]*:29: Error: expected a range of two offsets at operand 1 -- `fmlal za\.h\[w8,0:3\],{ ?z0\.b-z3\.b ?},z0\.b\[0\]'
+[^:]*:30: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmlal za\.h\[w7,0\],{ ?z0\.b-z3\.b ?},z0\.b\[0\]'
+[^:]*:31: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmlal za\.h\[w12,0\],{ ?z0\.b-z3\.b ?},z0\.b\[0\]'
 [^:]*:33: Error: z0-z15 expected at operand 3 -- `fmlal za\.h\[w8,0:1\],z0\.b,z16\.b'
 [^:]*:34: Error: expected a range of two offsets at operand 1 -- `fmlal za\.h\[w8,0\],z0\.b,z0\.b'
 [^:]*:35: Error: starting offset is not a multiple of 2 at operand 1 -- `fmlal za\.h\[w8,1:2\],z0\.b,z0\.b'
@@ -36,37 +36,37 @@
 [^:]*:38: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmlal za\.h\[w7,0\],z0\.b,z0\.b'
 [^:]*:39: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmlal za\.h\[w12,0\],z0\.b,z0\.b'
 [^:]*:40: Error: expected a range of two offsets at operand 1 -- `fmlal za\.h\[w8,0,VGx4\],z0\.b,z0\.b'
-[^:]*:42: Error: z0-z15 expected at operand 3 -- `fmlal za\.h\[w8,0:1\],{z0\.b-z1\.b},z16\.b'
-[^:]*:43: Error: expected a range of two offsets at operand 1 -- `fmlal za\.h\[w8,0\],{z0\.b-z1\.b},z0\.b'
-[^:]*:44: Error: starting offset is not a multiple of 2 at operand 1 -- `fmlal za\.h\[w8,1:2\],{z0\.b-z1\.b},z0\.b'
-[^:]*:45: Error: immediate offset out of range 0 to 6 at operand 1 -- `fmlal za\.h\[w8,8:9\],{z0\.b-z1\.b},z0\.b'
-[^:]*:46: Error: expected a range of two offsets at operand 1 -- `fmlal za\.h\[w8,0:3\],{z0\.b-z1\.b},z0\.b'
-[^:]*:47: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmlal za\.h\[w7,0:1\],{z0\.b-z1\.b},z0\.b'
-[^:]*:48: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmlal za\.h\[w12,0:1\],{z0\.b-z1\.b},z0\.b'
-[^:]*:49: Error: expected a list of 4 registers at operand 2 -- `fmlal za\.h\[w8,0:1,VGx4\],{z0\.b-z1\.b},z0\.b'
-[^:]*:51: Error: z0-z15 expected at operand 3 -- `fmlal za\.h\[w8,0:1\],{z0\.b-z3\.b},z16\.b'
-[^:]*:52: Error: expected a range of two offsets at operand 1 -- `fmlal za\.h\[w8,0\],{z0\.b-z3\.b},z0\.b'
-[^:]*:53: Error: starting offset is not a multiple of 2 at operand 1 -- `fmlal za\.h\[w8,1:2\],{z0\.b-z3\.b},z0\.b'
-[^:]*:54: Error: immediate offset out of range 0 to 6 at operand 1 -- `fmlal za\.h\[w8,8:9\],{z0\.b-z3\.b},z0\.b'
-[^:]*:55: Error: expected a range of two offsets at operand 1 -- `fmlal za\.h\[w8,0:3\],{z0\.b-z3\.b},z0\.b'
-[^:]*:56: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmlal za\.h\[w7,0:1\],{z0\.b-z3\.b},z0\.b'
-[^:]*:57: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmlal za\.h\[w12,0:1\],{z0\.b-z3\.b},z0\.b'
-[^:]*:58: Error: expected a list of 2 registers at operand 2 -- `fmlal za\.h\[w8,0:1,VGx2\],{z0\.b-z3\.b},z0\.b'
-[^:]*:60: Error: expected a list of 2 registers at operand 3 -- `fmlal za\.h\[w8,0:1\],{z0\.b-z1\.b},{z0\.b-z3\.b}'
-[^:]*:61: Error: start register out of range at operand 3 -- `fmlal za\.h\[w8,0:1\],{z0\.b-z1\.b},{z1\.b-z2\.b}'
-[^:]*:62: Error: start register out of range at operand 2 -- `fmlal za\.h\[w8,0:1\],{z1\.b-z2\.b},{z0\.b-z1\.b}'
-[^:]*:63: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmlal za\.h\[w7,0:1\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
-[^:]*:64: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmlal za\.h\[w12,0:1\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
-[^:]*:65: Error: expected a range of two offsets at operand 1 -- `fmlal za\.h\[w8,0\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
-[^:]*:66: Error: starting offset is not a multiple of 2 at operand 1 -- `fmlal za\.h\[w8,1:2\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
-[^:]*:67: Error: immediate offset out of range 0 to 6 at operand 1 -- `fmlal za\.h\[w8,8:9\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
-[^:]*:68: Error: expected a range of two offsets at operand 1 -- `fmlal za\.h\[w8,0:3\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
-[^:]*:70: Error: expected a list of 4 registers at operand 3 -- `fmlal za\.h\[w8,0:1\],{z0\.b-z3\.b},{z0\.b-z1\.b}'
-[^:]*:71: Error: start register out of range at operand 3 -- `fmlal za\.h\[w8,0:1\],{z0\.b-z3\.b},{z2\.b-z5\.b}'
-[^:]*:72: Error: start register out of range at operand 2 -- `fmlal za\.h\[w8,0:1\],{z2\.b-z5\.b},{z0\.b-z3\.b}'
-[^:]*:73: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmlal za\.h\[w7,0:1\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
-[^:]*:74: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmlal za\.h\[w12,0:1\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
-[^:]*:75: Error: expected a range of two offsets at operand 1 -- `fmlal za\.h\[w8,0\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
-[^:]*:76: Error: starting offset is not a multiple of 2 at operand 1 -- `fmlal za\.h\[w8,1:2\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
-[^:]*:77: Error: immediate offset out of range 0 to 6 at operand 1 -- `fmlal za\.h\[w8,8:9\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
-[^:]*:78: Error: expected a range of two offsets at operand 1 -- `fmlal za\.h\[w8,0:3\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
+[^:]*:42: Error: z0-z15 expected at operand 3 -- `fmlal za\.h\[w8,0:1\],{ ?z0\.b-z1\.b ?},z16\.b'
+[^:]*:43: Error: expected a range of two offsets at operand 1 -- `fmlal za\.h\[w8,0\],{ ?z0\.b-z1\.b ?},z0\.b'
+[^:]*:44: Error: starting offset is not a multiple of 2 at operand 1 -- `fmlal za\.h\[w8,1:2\],{ ?z0\.b-z1\.b ?},z0\.b'
+[^:]*:45: Error: immediate offset out of range 0 to 6 at operand 1 -- `fmlal za\.h\[w8,8:9\],{ ?z0\.b-z1\.b ?},z0\.b'
+[^:]*:46: Error: expected a range of two offsets at operand 1 -- `fmlal za\.h\[w8,0:3\],{ ?z0\.b-z1\.b ?},z0\.b'
+[^:]*:47: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmlal za\.h\[w7,0:1\],{ ?z0\.b-z1\.b ?},z0\.b'
+[^:]*:48: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmlal za\.h\[w12,0:1\],{ ?z0\.b-z1\.b ?},z0\.b'
+[^:]*:49: Error: expected a list of 4 registers at operand 2 -- `fmlal za\.h\[w8,0:1,VGx4\],{ ?z0\.b-z1\.b ?},z0\.b'
+[^:]*:51: Error: z0-z15 expected at operand 3 -- `fmlal za\.h\[w8,0:1\],{ ?z0\.b-z3\.b ?},z16\.b'
+[^:]*:52: Error: expected a range of two offsets at operand 1 -- `fmlal za\.h\[w8,0\],{ ?z0\.b-z3\.b ?},z0\.b'
+[^:]*:53: Error: starting offset is not a multiple of 2 at operand 1 -- `fmlal za\.h\[w8,1:2\],{ ?z0\.b-z3\.b ?},z0\.b'
+[^:]*:54: Error: immediate offset out of range 0 to 6 at operand 1 -- `fmlal za\.h\[w8,8:9\],{ ?z0\.b-z3\.b ?},z0\.b'
+[^:]*:55: Error: expected a range of two offsets at operand 1 -- `fmlal za\.h\[w8,0:3\],{ ?z0\.b-z3\.b ?},z0\.b'
+[^:]*:56: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmlal za\.h\[w7,0:1\],{ ?z0\.b-z3\.b ?},z0\.b'
+[^:]*:57: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmlal za\.h\[w12,0:1\],{ ?z0\.b-z3\.b ?},z0\.b'
+[^:]*:58: Error: expected a list of 2 registers at operand 2 -- `fmlal za\.h\[w8,0:1,VGx2\],{ ?z0\.b-z3\.b ?},z0\.b'
+[^:]*:60: Error: expected a list of 2 registers at operand 3 -- `fmlal za\.h\[w8,0:1\],{ ?z0\.b-z1\.b ?},{ ?z0\.b-z3\.b ?}'
+[^:]*:61: Error: start register out of range at operand 3 -- `fmlal za\.h\[w8,0:1\],{ ?z0\.b-z1\.b ?},{ ?z1\.b-z2\.b ?}'
+[^:]*:62: Error: start register out of range at operand 2 -- `fmlal za\.h\[w8,0:1\],{ ?z1\.b-z2\.b ?},{ ?z0\.b-z1\.b ?}'
+[^:]*:63: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmlal za\.h\[w7,0:1\],{ ?z0\.b-z1\.b ?},{ ?z0\.b-z1\.b ?}'
+[^:]*:64: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmlal za\.h\[w12,0:1\],{ ?z0\.b-z1\.b ?},{ ?z0\.b-z1\.b ?}'
+[^:]*:65: Error: expected a range of two offsets at operand 1 -- `fmlal za\.h\[w8,0\],{ ?z0\.b-z1\.b ?},{ ?z0\.b-z1\.b ?}'
+[^:]*:66: Error: starting offset is not a multiple of 2 at operand 1 -- `fmlal za\.h\[w8,1:2\],{ ?z0\.b-z1\.b ?},{ ?z0\.b-z1\.b ?}'
+[^:]*:67: Error: immediate offset out of range 0 to 6 at operand 1 -- `fmlal za\.h\[w8,8:9\],{ ?z0\.b-z1\.b ?},{ ?z0\.b-z1\.b ?}'
+[^:]*:68: Error: expected a range of two offsets at operand 1 -- `fmlal za\.h\[w8,0:3\],{ ?z0\.b-z1\.b ?},{ ?z0\.b-z1\.b ?}'
+[^:]*:70: Error: expected a list of 4 registers at operand 3 -- `fmlal za\.h\[w8,0:1\],{ ?z0\.b-z3\.b ?},{ ?z0\.b-z1\.b ?}'
+[^:]*:71: Error: start register out of range at operand 3 -- `fmlal za\.h\[w8,0:1\],{ ?z0\.b-z3\.b ?},{ ?z2\.b-z5\.b ?}'
+[^:]*:72: Error: start register out of range at operand 2 -- `fmlal za\.h\[w8,0:1\],{ ?z2\.b-z5\.b ?},{ ?z0\.b-z3\.b ?}'
+[^:]*:73: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmlal za\.h\[w7,0:1\],{ ?z0\.b-z3\.b ?},{ ?z0\.b-z3\.b ?}'
+[^:]*:74: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmlal za\.h\[w12,0:1\],{ ?z0\.b-z3\.b ?},{ ?z0\.b-z3\.b ?}'
+[^:]*:75: Error: expected a range of two offsets at operand 1 -- `fmlal za\.h\[w8,0\],{ ?z0\.b-z3\.b ?},{ ?z0\.b-z3\.b ?}'
+[^:]*:76: Error: starting offset is not a multiple of 2 at operand 1 -- `fmlal za\.h\[w8,1:2\],{ ?z0\.b-z3\.b ?},{ ?z0\.b-z3\.b ?}'
+[^:]*:77: Error: immediate offset out of range 0 to 6 at operand 1 -- `fmlal za\.h\[w8,8:9\],{ ?z0\.b-z3\.b ?},{ ?z0\.b-z3\.b ?}'
+[^:]*:78: Error: expected a range of two offsets at operand 1 -- `fmlal za\.h\[w8,0:3\],{ ?z0\.b-z3\.b ?},{ ?z0\.b-z3\.b ?}'
diff --git a/gas/testsuite/gas/aarch64/fp8-sme-fmlall-illegal.l b/gas/testsuite/gas/aarch64/fp8-sme-fmlall-illegal.l
index 12ffda0..cb419b9 100644
--- a/gas/testsuite/gas/aarch64/fp8-sme-fmlall-illegal.l
+++ b/gas/testsuite/gas/aarch64/fp8-sme-fmlall-illegal.l
@@ -8,26 +8,26 @@
 [^:]*:7: Error: expected a range of four offsets at operand 1 -- `fmlall za\.s\[w8,0:1\],z0\.b,z0\.b\[0\]'
 [^:]*:8: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmlall za\.s\[w7,0:3\],z0\.b,z0\.b\[0\]'
 [^:]*:9: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmlall za\.s\[w12,0:3\],z0\.b,z0\.b\[0\]'
-[^:]*:11: Error: z0-z15 expected at operand 3 -- `fmlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z16\.b\[0\]'
-[^:]*:12: Error: start register out of range at operand 2 -- `fmlall za\.s\[w8,0:3\],{z1\.b-z2\.b},z0\.b\[0\]'
-[^:]*:13: Error: expected a list of 2 registers at operand 2 -- `fmlall za\.s\[w8,0:3,VGx2\],{z0\.b-z3\.b},z0\.b\[0\]'
-[^:]*:14: Error: register element index out of range 0 to 15 at operand 3 -- `fmlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z0\.b\[16\]'
-[^:]*:15: Error: expected a range of four offsets at operand 1 -- `fmlall za\.s\[w8,0\],{z0\.b-z1\.b},z0\.b\[0\]'
-[^:]*:16: Error: starting offset is not a multiple of 4 at operand 1 -- `fmlall za\.s\[w8,2:5\],{z0\.b-z1\.b},z0\.b\[0\]'
-[^:]*:17: Error: immediate offset out of range 0 to 4 at operand 1 -- `fmlall za\.s\[w8,8:11\],{z0\.b-z1\.b},z0\.b\[0\]'
-[^:]*:18: Error: expected a range of four offsets at operand 1 -- `fmlall za\.s\[w8,0:1\],{z0\.b-z1\.b},z0\.b\[0\]'
-[^:]*:19: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmlall za\.s\[w7,0:3\],{z0\.b-z1\.b},z0\.b\[0\]'
-[^:]*:20: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmlall za\.s\[w12,0:3\],{z0\.b-z1\.b},z0\.b\[0\]'
-[^:]*:22: Error: z0-z15 expected at operand 3 -- `fmlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z16\.b\[0\]'
-[^:]*:23: Error: start register out of range at operand 2 -- `fmlall za\.s\[w8,0:3\],{z2\.b-z5\.b},z0\.b\[0\]'
-[^:]*:24: Error: expected a list of 4 registers at operand 2 -- `fmlall za\.s\[w8,0:3,VGx4\],{z0\.b-z1\.b},z0\.b\[0\]'
-[^:]*:25: Error: register element index out of range 0 to 15 at operand 3 -- `fmlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z0\.b\[16\]'
-[^:]*:26: Error: expected a range of four offsets at operand 1 -- `fmlall za\.s\[w8,0\],{z0\.b-z3\.b},z0\.b\[0\]'
-[^:]*:27: Error: starting offset is not a multiple of 4 at operand 1 -- `fmlall za\.s\[w8,2:5\],{z0\.b-z3\.b},z0\.b\[0\]'
-[^:]*:28: Error: immediate offset out of range 0 to 4 at operand 1 -- `fmlall za\.s\[w8,8:11\],{z0\.b-z3\.b},z0\.b\[0\]'
-[^:]*:29: Error: expected a range of four offsets at operand 1 -- `fmlall za\.s\[w8,0:1\],{z0\.b-z3\.b},z0\.b\[0\]'
-[^:]*:30: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmlall za\.s\[w7,0\],{z0\.b-z3\.b},z0\.b\[0\]'
-[^:]*:31: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmlall za\.s\[w12,0\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^:]*:11: Error: z0-z15 expected at operand 3 -- `fmlall za\.s\[w8,0:3\],{ ?z0\.b-z1\.b ?},z16\.b\[0\]'
+[^:]*:12: Error: start register out of range at operand 2 -- `fmlall za\.s\[w8,0:3\],{ ?z1\.b-z2\.b ?},z0\.b\[0\]'
+[^:]*:13: Error: expected a list of 2 registers at operand 2 -- `fmlall za\.s\[w8,0:3,VGx2\],{ ?z0\.b-z3\.b ?},z0\.b\[0\]'
+[^:]*:14: Error: register element index out of range 0 to 15 at operand 3 -- `fmlall za\.s\[w8,0:3\],{ ?z0\.b-z1\.b ?},z0\.b\[16\]'
+[^:]*:15: Error: expected a range of four offsets at operand 1 -- `fmlall za\.s\[w8,0\],{ ?z0\.b-z1\.b ?},z0\.b\[0\]'
+[^:]*:16: Error: starting offset is not a multiple of 4 at operand 1 -- `fmlall za\.s\[w8,2:5\],{ ?z0\.b-z1\.b ?},z0\.b\[0\]'
+[^:]*:17: Error: immediate offset out of range 0 to 4 at operand 1 -- `fmlall za\.s\[w8,8:11\],{ ?z0\.b-z1\.b ?},z0\.b\[0\]'
+[^:]*:18: Error: expected a range of four offsets at operand 1 -- `fmlall za\.s\[w8,0:1\],{ ?z0\.b-z1\.b ?},z0\.b\[0\]'
+[^:]*:19: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmlall za\.s\[w7,0:3\],{ ?z0\.b-z1\.b ?},z0\.b\[0\]'
+[^:]*:20: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmlall za\.s\[w12,0:3\],{ ?z0\.b-z1\.b ?},z0\.b\[0\]'
+[^:]*:22: Error: z0-z15 expected at operand 3 -- `fmlall za\.s\[w8,0:3\],{ ?z0\.b-z3\.b ?},z16\.b\[0\]'
+[^:]*:23: Error: start register out of range at operand 2 -- `fmlall za\.s\[w8,0:3\],{ ?z2\.b-z5\.b ?},z0\.b\[0\]'
+[^:]*:24: Error: expected a list of 4 registers at operand 2 -- `fmlall za\.s\[w8,0:3,VGx4\],{ ?z0\.b-z1\.b ?},z0\.b\[0\]'
+[^:]*:25: Error: register element index out of range 0 to 15 at operand 3 -- `fmlall za\.s\[w8,0:3\],{ ?z0\.b-z3\.b ?},z0\.b\[16\]'
+[^:]*:26: Error: expected a range of four offsets at operand 1 -- `fmlall za\.s\[w8,0\],{ ?z0\.b-z3\.b ?},z0\.b\[0\]'
+[^:]*:27: Error: starting offset is not a multiple of 4 at operand 1 -- `fmlall za\.s\[w8,2:5\],{ ?z0\.b-z3\.b ?},z0\.b\[0\]'
+[^:]*:28: Error: immediate offset out of range 0 to 4 at operand 1 -- `fmlall za\.s\[w8,8:11\],{ ?z0\.b-z3\.b ?},z0\.b\[0\]'
+[^:]*:29: Error: expected a range of four offsets at operand 1 -- `fmlall za\.s\[w8,0:1\],{ ?z0\.b-z3\.b ?},z0\.b\[0\]'
+[^:]*:30: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmlall za\.s\[w7,0\],{ ?z0\.b-z3\.b ?},z0\.b\[0\]'
+[^:]*:31: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmlall za\.s\[w12,0\],{ ?z0\.b-z3\.b ?},z0\.b\[0\]'
 [^:]*:33: Error: z0-z15 expected at operand 3 -- `fmlall za\.s\[w8,0:3\],z0\.b,z16\.b'
 [^:]*:34: Error: expected a range of four offsets at operand 1 -- `fmlall za\.s\[w8,0\],z0\.b,z0\.b'
 [^:]*:35: Error: starting offset is not a multiple of 4 at operand 1 -- `fmlall za\.s\[w8,2:5\],z0\.b,z0\.b'
@@ -36,37 +36,37 @@
 [^:]*:38: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmlall za\.s\[w7,0\],z0\.b,z0\.b'
 [^:]*:39: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmlall za\.s\[w12,0\],z0\.b,z0\.b'
 [^:]*:40: Error: expected a range of four offsets at operand 1 -- `fmlall za\.s\[w8,0,VGx4\],z0\.b,z0\.b'
-[^:]*:42: Error: z0-z15 expected at operand 3 -- `fmlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z16\.b'
-[^:]*:43: Error: expected a range of four offsets at operand 1 -- `fmlall za\.s\[w8,0\],{z0\.b-z1\.b},z0\.b'
-[^:]*:44: Error: starting offset is not a multiple of 4 at operand 1 -- `fmlall za\.s\[w8,2:5\],{z0\.b-z1\.b},z0\.b'
-[^:]*:45: Error: immediate offset out of range 0 to 4 at operand 1 -- `fmlall za\.s\[w8,8:11\],{z0\.b-z1\.b},z0\.b'
-[^:]*:46: Error: expected a range of four offsets at operand 1 -- `fmlall za\.s\[w8,0:1\],{z0\.b-z1\.b},z0\.b'
-[^:]*:47: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmlall za\.s\[w7,0:3\],{z0\.b-z1\.b},z0\.b'
-[^:]*:48: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmlall za\.s\[w12,0:3\],{z0\.b-z1\.b},z0\.b'
-[^:]*:49: Error: expected a list of 4 registers at operand 2 -- `fmlall za\.s\[w8,0:3,VGx4\],{z0\.b-z1\.b},z0\.b'
-[^:]*:51: Error: z0-z15 expected at operand 3 -- `fmlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z16\.b'
-[^:]*:52: Error: expected a range of four offsets at operand 1 -- `fmlall za\.s\[w8,0\],{z0\.b-z3\.b},z0\.b'
-[^:]*:53: Error: starting offset is not a multiple of 4 at operand 1 -- `fmlall za\.s\[w8,2:5\],{z0\.b-z3\.b},z0\.b'
-[^:]*:54: Error: immediate offset out of range 0 to 4 at operand 1 -- `fmlall za\.s\[w8,8:11\],{z0\.b-z3\.b},z0\.b'
-[^:]*:55: Error: expected a range of four offsets at operand 1 -- `fmlall za\.s\[w8,0:1\],{z0\.b-z3\.b},z0\.b'
-[^:]*:56: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmlall za\.s\[w7,0:3\],{z0\.b-z3\.b},z0\.b'
-[^:]*:57: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmlall za\.s\[w12,0:3\],{z0\.b-z3\.b},z0\.b'
-[^:]*:58: Error: expected a list of 2 registers at operand 2 -- `fmlall za\.s\[w8,0:3,VGx2\],{z0\.b-z3\.b},z0\.b'
-[^:]*:60: Error: expected a list of 2 registers at operand 3 -- `fmlall za\.s\[w8,0:3\],{z0\.b-z1\.b},{z0\.b-z3\.b}'
-[^:]*:61: Error: start register out of range at operand 3 -- `fmlall za\.s\[w8,0:3\],{z0\.b-z1\.b},{z1\.b-z2\.b}'
-[^:]*:62: Error: start register out of range at operand 2 -- `fmlall za\.s\[w8,0:3\],{z1\.b-z2\.b},{z0\.b-z1\.b}'
-[^:]*:63: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmlall za\.s\[w7,0:3\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
-[^:]*:64: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmlall za\.s\[w12,0:3\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
-[^:]*:65: Error: expected a range of four offsets at operand 1 -- `fmlall za\.s\[w8,0\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
-[^:]*:66: Error: starting offset is not a multiple of 4 at operand 1 -- `fmlall za\.s\[w8,2:5\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
-[^:]*:67: Error: immediate offset out of range 0 to 4 at operand 1 -- `fmlall za\.s\[w8,8:11\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
-[^:]*:68: Error: expected a range of four offsets at operand 1 -- `fmlall za\.s\[w8,0:1\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
-[^:]*:70: Error: expected a list of 4 registers at operand 3 -- `fmlall za\.s\[w8,0:3\],{z0\.b-z3\.b},{z0\.b-z1\.b}'
-[^:]*:71: Error: start register out of range at operand 3 -- `fmlall za\.s\[w8,0:3\],{z0\.b-z3\.b},{z2\.b-z5\.b}'
-[^:]*:72: Error: start register out of range at operand 2 -- `fmlall za\.s\[w8,0:3\],{z2\.b-z5\.b},{z0\.b-z3\.b}'
-[^:]*:73: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmlall za\.s\[w7,0:3\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
-[^:]*:74: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmlall za\.s\[w12,0:3\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
-[^:]*:75: Error: expected a range of four offsets at operand 1 -- `fmlall za\.s\[w8,0\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
-[^:]*:76: Error: starting offset is not a multiple of 4 at operand 1 -- `fmlall za\.s\[w8,2:5\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
-[^:]*:77: Error: immediate offset out of range 0 to 4 at operand 1 -- `fmlall za\.s\[w8,8:11\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
-[^:]*:78: Error: expected a range of four offsets at operand 1 -- `fmlall za\.s\[w8,0:1\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
+[^:]*:42: Error: z0-z15 expected at operand 3 -- `fmlall za\.s\[w8,0:3\],{ ?z0\.b-z1\.b ?},z16\.b'
+[^:]*:43: Error: expected a range of four offsets at operand 1 -- `fmlall za\.s\[w8,0\],{ ?z0\.b-z1\.b ?},z0\.b'
+[^:]*:44: Error: starting offset is not a multiple of 4 at operand 1 -- `fmlall za\.s\[w8,2:5\],{ ?z0\.b-z1\.b ?},z0\.b'
+[^:]*:45: Error: immediate offset out of range 0 to 4 at operand 1 -- `fmlall za\.s\[w8,8:11\],{ ?z0\.b-z1\.b ?},z0\.b'
+[^:]*:46: Error: expected a range of four offsets at operand 1 -- `fmlall za\.s\[w8,0:1\],{ ?z0\.b-z1\.b ?},z0\.b'
+[^:]*:47: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmlall za\.s\[w7,0:3\],{ ?z0\.b-z1\.b ?},z0\.b'
+[^:]*:48: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmlall za\.s\[w12,0:3\],{ ?z0\.b-z1\.b ?},z0\.b'
+[^:]*:49: Error: expected a list of 4 registers at operand 2 -- `fmlall za\.s\[w8,0:3,VGx4\],{ ?z0\.b-z1\.b ?},z0\.b'
+[^:]*:51: Error: z0-z15 expected at operand 3 -- `fmlall za\.s\[w8,0:3\],{ ?z0\.b-z3\.b ?},z16\.b'
+[^:]*:52: Error: expected a range of four offsets at operand 1 -- `fmlall za\.s\[w8,0\],{ ?z0\.b-z3\.b ?},z0\.b'
+[^:]*:53: Error: starting offset is not a multiple of 4 at operand 1 -- `fmlall za\.s\[w8,2:5\],{ ?z0\.b-z3\.b ?},z0\.b'
+[^:]*:54: Error: immediate offset out of range 0 to 4 at operand 1 -- `fmlall za\.s\[w8,8:11\],{ ?z0\.b-z3\.b ?},z0\.b'
+[^:]*:55: Error: expected a range of four offsets at operand 1 -- `fmlall za\.s\[w8,0:1\],{ ?z0\.b-z3\.b ?},z0\.b'
+[^:]*:56: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmlall za\.s\[w7,0:3\],{ ?z0\.b-z3\.b ?},z0\.b'
+[^:]*:57: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmlall za\.s\[w12,0:3\],{ ?z0\.b-z3\.b ?},z0\.b'
+[^:]*:58: Error: expected a list of 2 registers at operand 2 -- `fmlall za\.s\[w8,0:3,VGx2\],{ ?z0\.b-z3\.b ?},z0\.b'
+[^:]*:60: Error: expected a list of 2 registers at operand 3 -- `fmlall za\.s\[w8,0:3\],{ ?z0\.b-z1\.b ?},{ ?z0\.b-z3\.b ?}'
+[^:]*:61: Error: start register out of range at operand 3 -- `fmlall za\.s\[w8,0:3\],{ ?z0\.b-z1\.b ?},{ ?z1\.b-z2\.b ?}'
+[^:]*:62: Error: start register out of range at operand 2 -- `fmlall za\.s\[w8,0:3\],{ ?z1\.b-z2\.b ?},{ ?z0\.b-z1\.b ?}'
+[^:]*:63: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmlall za\.s\[w7,0:3\],{ ?z0\.b-z1\.b ?},{ ?z0\.b-z1\.b ?}'
+[^:]*:64: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmlall za\.s\[w12,0:3\],{ ?z0\.b-z1\.b ?},{ ?z0\.b-z1\.b ?}'
+[^:]*:65: Error: expected a range of four offsets at operand 1 -- `fmlall za\.s\[w8,0\],{ ?z0\.b-z1\.b ?},{ ?z0\.b-z1\.b ?}'
+[^:]*:66: Error: starting offset is not a multiple of 4 at operand 1 -- `fmlall za\.s\[w8,2:5\],{ ?z0\.b-z1\.b ?},{ ?z0\.b-z1\.b ?}'
+[^:]*:67: Error: immediate offset out of range 0 to 4 at operand 1 -- `fmlall za\.s\[w8,8:11\],{ ?z0\.b-z1\.b ?},{ ?z0\.b-z1\.b ?}'
+[^:]*:68: Error: expected a range of four offsets at operand 1 -- `fmlall za\.s\[w8,0:1\],{ ?z0\.b-z1\.b ?},{ ?z0\.b-z1\.b ?}'
+[^:]*:70: Error: expected a list of 4 registers at operand 3 -- `fmlall za\.s\[w8,0:3\],{ ?z0\.b-z3\.b ?},{ ?z0\.b-z1\.b ?}'
+[^:]*:71: Error: start register out of range at operand 3 -- `fmlall za\.s\[w8,0:3\],{ ?z0\.b-z3\.b ?},{ ?z2\.b-z5\.b ?}'
+[^:]*:72: Error: start register out of range at operand 2 -- `fmlall za\.s\[w8,0:3\],{ ?z2\.b-z5\.b ?},{ ?z0\.b-z3\.b ?}'
+[^:]*:73: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmlall za\.s\[w7,0:3\],{ ?z0\.b-z3\.b ?},{ ?z0\.b-z3\.b ?}'
+[^:]*:74: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmlall za\.s\[w12,0:3\],{ ?z0\.b-z3\.b ?},{ ?z0\.b-z3\.b ?}'
+[^:]*:75: Error: expected a range of four offsets at operand 1 -- `fmlall za\.s\[w8,0\],{ ?z0\.b-z3\.b ?},{ ?z0\.b-z3\.b ?}'
+[^:]*:76: Error: starting offset is not a multiple of 4 at operand 1 -- `fmlall za\.s\[w8,2:5\],{ ?z0\.b-z3\.b ?},{ ?z0\.b-z3\.b ?}'
+[^:]*:77: Error: immediate offset out of range 0 to 4 at operand 1 -- `fmlall za\.s\[w8,8:11\],{ ?z0\.b-z3\.b ?},{ ?z0\.b-z3\.b ?}'
+[^:]*:78: Error: expected a range of four offsets at operand 1 -- `fmlall za\.s\[w8,0:1\],{ ?z0\.b-z3\.b ?},{ ?z0\.b-z3\.b ?}'
diff --git a/gas/testsuite/gas/aarch64/illegal-sve2-sve1ext.l b/gas/testsuite/gas/aarch64/illegal-sve2-sve1ext.l
index 856ca7f..30ab7bb 100644
--- a/gas/testsuite/gas/aarch64/illegal-sve2-sve1ext.l
+++ b/gas/testsuite/gas/aarch64/illegal-sve2-sve1ext.l
@@ -1,35 +1,35 @@
 [^ :]+: Assembler messages:
-[^ :]+:[0-9]+: Error: selected processor does not support `ext z17\.b,{z21\.b,z22\.b},#221'
-[^ :]+:[0-9]+: Error: selected processor does not support `ext z0\.b,{z0\.b,z1\.b},#0'
-[^ :]+:[0-9]+: Error: selected processor does not support `ext z0\.b,{z31\.b,z0\.b},#0'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z17\.d},p5/z,\[z21\.d,x27\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.d},p0/z,\[z0\.d,x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.d},p0/z,\[z0\.d\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.d},p0/z,\[z0\.d,xzr\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z17\.s},p5/z,\[z21\.s,x27\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.s},p0/z,\[z0\.s,x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.s},p0/z,\[z0\.s\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.s},p0/z,\[z0\.s,xzr\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z17\.d},p5/z,\[z21\.d,x27\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d},p0/z,\[z0\.d,x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d},p0/z,\[z0\.d\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d},p0/z,\[z0\.d,xzr\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z17\.d},p5/z,\[z21\.d,x27\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.d},p0/z,\[z0\.d,x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.d},p0/z,\[z0\.d\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.d},p0/z,\[z0\.d,xzr\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z17\.s},p5/z,\[z21\.s,x27\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.s},p0/z,\[z0\.s,x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.s},p0/z,\[z0\.s\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.s},p0/z,\[z0\.s,xzr\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z17\.s},p5/z,\[z21\.s,x27\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s},p0/z,\[z0\.s,x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s},p0/z,\[z0\.s\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s},p0/z,\[z0\.s,xzr\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z17\.d},p5/z,\[z21\.d,x27\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.d},p0/z,\[z0\.d,x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.d},p0/z,\[z0\.d\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.d},p0/z,\[z0\.d,xzr\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ext z17\.b,{ ?z21\.b,z22\.b ?},#221'
+[^ :]+:[0-9]+: Error: selected processor does not support `ext z0\.b,{ ?z0\.b,z1\.b ?},#0'
+[^ :]+:[0-9]+: Error: selected processor does not support `ext z0\.b,{ ?z31\.b,z0\.b ?},#0'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z17\.d ?},p5/z,\[z21\.d,x27\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.d ?},p0/z,\[z0\.d,x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.d ?},p0/z,\[z0\.d\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.d ?},p0/z,\[z0\.d,xzr\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z17\.s ?},p5/z,\[z21\.s,x27\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.s ?},p0/z,\[z0\.s,x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.s ?},p0/z,\[z0\.s\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.s ?},p0/z,\[z0\.s,xzr\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z17\.d ?},p5/z,\[z21\.d,x27\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d ?},p0/z,\[z0\.d,x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d ?},p0/z,\[z0\.d\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d ?},p0/z,\[z0\.d,xzr\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z17\.d ?},p5/z,\[z21\.d,x27\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.d ?},p0/z,\[z0\.d,x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.d ?},p0/z,\[z0\.d\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.d ?},p0/z,\[z0\.d,xzr\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z17\.s ?},p5/z,\[z21\.s,x27\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.s ?},p0/z,\[z0\.s,x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.s ?},p0/z,\[z0\.s\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.s ?},p0/z,\[z0\.s,xzr\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z17\.s ?},p5/z,\[z21\.s,x27\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s ?},p0/z,\[z0\.s,x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s ?},p0/z,\[z0\.s\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s ?},p0/z,\[z0\.s,xzr\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z17\.d ?},p5/z,\[z21\.d,x27\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.d ?},p0/z,\[z0\.d,x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.d ?},p0/z,\[z0\.d\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.d ?},p0/z,\[z0\.d,xzr\]'
 [^ :]+:[0-9]+: Error: selected processor does not support `mla z17\.h,z21\.h,z3\.h\[3\]'
 [^ :]+:[0-9]+: Error: selected processor does not support `mla z0\.h,z0\.h,z0\.h\[4\]'
 [^ :]+:[0-9]+: Error: selected processor does not support `mla z0\.h,z0\.h,z0\.h\[0\]'
@@ -61,12 +61,12 @@
 [^ :]+:[0-9]+: Error: selected processor does not support `smulh z0\.h,z0\.h,z0\.h'
 [^ :]+:[0-9]+: Error: selected processor does not support `smulh z0\.s,z0\.s,z0\.s'
 [^ :]+:[0-9]+: Error: selected processor does not support `smulh z0\.d,z0\.d,z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `splice z17\.b,p5,{z21\.b,z22\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `splice z0\.b,p0,{z0\.b,z1\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `splice z0\.h,p0,{z0\.h,z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `splice z0\.s,p0,{z0\.s,z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `splice z0\.d,p0,{z0\.d,z1\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `splice z0\.b,p0,{z31\.b,z0\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `splice z17\.b,p5,{ ?z21\.b,z22\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `splice z0\.b,p0,{ ?z0\.b,z1\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `splice z0\.h,p0,{ ?z0\.h,z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `splice z0\.s,p0,{ ?z0\.s,z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `splice z0\.d,p0,{ ?z0\.d,z1\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `splice z0\.b,p0,{ ?z31\.b,z0\.b ?}'
 [^ :]+:[0-9]+: Error: selected processor does not support `sqadd z17\.b,p5/m,z17\.b,z21\.b'
 [^ :]+:[0-9]+: Error: selected processor does not support `sqadd z0\.b,p0/m,z0\.b,z0\.b'
 [^ :]+:[0-9]+: Error: selected processor does not support `sqadd z0\.h,p0/m,z0\.h,z0\.h'
@@ -77,40 +77,40 @@
 [^ :]+:[0-9]+: Error: selected processor does not support `sqsub z0\.h,p0/m,z0\.h,z0\.h'
 [^ :]+:[0-9]+: Error: selected processor does not support `sqsub z0\.s,p0/m,z0\.s,z0\.s'
 [^ :]+:[0-9]+: Error: selected processor does not support `sqsub z0\.d,p0/m,z0\.d,z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z17\.s},p5,\[z21\.s,x27\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.s},p0,\[z0\.s,x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.s},p0,\[z0\.s\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.s},p0,\[z0\.s,xzr\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z17\.d},p5,\[z21\.d,x27\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.d},p0,\[z0\.d,x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.d},p0,\[z0\.d\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.d},p0,\[z0\.d,xzr\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z17\.d},p5,\[z21\.d,x27\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d},p0,\[z0\.d,x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d},p0,\[z0\.d\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d},p0,\[z0\.d,xzr\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z17\.s},p5,\[z21\.s,x27\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.s},p0,\[z0\.s,x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.s},p0,\[z0\.s\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.s},p0,\[z0\.s,xzr\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z17\.d},p5,\[z21\.d,x27\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.d},p0,\[z0\.d,x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.d},p0,\[z0\.d\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.d},p0,\[z0\.d,xzr\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z17\.s},p5,\[z21\.s,x27\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s},p0,\[z0\.s,x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s},p0,\[z0\.s\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s},p0,\[z0\.s,xzr\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z17\.d},p5,\[z21\.d,x27\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.d},p0,\[z0\.d,x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.d},p0,\[z0\.d\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.d},p0,\[z0\.d,xzr\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `tbl z17\.b,{z21\.b,z22\.b},z27\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `tbl z0\.b,{z0\.b,z1\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `tbl z0\.h,{z0\.h,z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `tbl z0\.s,{z0\.s,z1\.s},z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `tbl z0\.d,{z0\.d,z1\.d},z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `tbl z0\.b,{z31\.b,z0\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z17\.s ?},p5,\[z21\.s,x27\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.s ?},p0,\[z0\.s,x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.s ?},p0,\[z0\.s\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.s ?},p0,\[z0\.s,xzr\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z17\.d ?},p5,\[z21\.d,x27\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.d ?},p0,\[z0\.d,x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.d ?},p0,\[z0\.d\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.d ?},p0,\[z0\.d,xzr\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z17\.d ?},p5,\[z21\.d,x27\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d ?},p0,\[z0\.d,x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d ?},p0,\[z0\.d\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d ?},p0,\[z0\.d,xzr\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z17\.s ?},p5,\[z21\.s,x27\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.s ?},p0,\[z0\.s,x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.s ?},p0,\[z0\.s\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.s ?},p0,\[z0\.s,xzr\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z17\.d ?},p5,\[z21\.d,x27\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.d ?},p0,\[z0\.d,x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.d ?},p0,\[z0\.d\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.d ?},p0,\[z0\.d,xzr\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z17\.s ?},p5,\[z21\.s,x27\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s ?},p0,\[z0\.s,x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s ?},p0,\[z0\.s\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s ?},p0,\[z0\.s,xzr\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z17\.d ?},p5,\[z21\.d,x27\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.d ?},p0,\[z0\.d,x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.d ?},p0,\[z0\.d\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.d ?},p0,\[z0\.d,xzr\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `tbl z17\.b,{ ?z21\.b,z22\.b ?},z27\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `tbl z0\.b,{ ?z0\.b,z1\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `tbl z0\.h,{ ?z0\.h,z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `tbl z0\.s,{ ?z0\.s,z1\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `tbl z0\.d,{ ?z0\.d,z1\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `tbl z0\.b,{ ?z31\.b,z0\.b ?},z0\.b'
 [^ :]+:[0-9]+: Error: selected processor does not support `umulh z17\.b,z21\.b,z27\.b'
 [^ :]+:[0-9]+: Error: selected processor does not support `umulh z0\.b,z0\.b,z0\.b'
 [^ :]+:[0-9]+: Error: selected processor does not support `umulh z0\.h,z0\.h,z0\.h'
diff --git a/gas/testsuite/gas/aarch64/illegal-sve2.l b/gas/testsuite/gas/aarch64/illegal-sve2.l
index dfa05af..b5e1662 100644
--- a/gas/testsuite/gas/aarch64/illegal-sve2.l
+++ b/gas/testsuite/gas/aarch64/illegal-sve2.l
@@ -239,24 +239,24 @@
 [^ :]+:[0-9]+: Error: expected an SVE vector register at operand 2 -- `eortb z0\.s,z32\.s,z0\.s'
 [^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `eortb z0\.s,z0\.s,z32\.s'
 [^ :]+:[0-9]+: Error: syntax error in register list at operand 2 -- `ext z0\.b,{,},#0'
-[^ :]+:[0-9]+: Error: the register list must have a stride of 1 at operand 2 -- `ext z0\.b,{z0\.b,z2\.b},#0'
-[^ :]+:[0-9]+: Error: operand mismatch -- `ext z0\.h,{z0\.b,z1\.b},#0'
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 at operand 2 -- `ext z0\.b,{ ?z0\.b,z2\.b ?},#0'
+[^ :]+:[0-9]+: Error: operand mismatch -- `ext z0\.h,{ ?z0\.b,z1\.b ?},#0'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	ext z0\.b, {z0\.b-z1\.b}, #0
-[^ :]+:[0-9]+: Error: type mismatch in vector register list at operand 2 -- `ext z0\.b,{z0\.h,z1\.b},#0'
-[^ :]+:[0-9]+: Error: type mismatch in vector register list at operand 2 -- `ext z0\.b,{z0\.b,z1\.h},#0'
-[^ :]+:[0-9]+: Error: operand mismatch -- `ext z0\.b,{z0\.h,z1\.h},#0'
+[^ :]+:[0-9]+: Error: type mismatch in vector register list at operand 2 -- `ext z0\.b,{ ?z0\.h,z1\.b ?},#0'
+[^ :]+:[0-9]+: Error: type mismatch in vector register list at operand 2 -- `ext z0\.b,{ ?z0\.b,z1\.h ?},#0'
+[^ :]+:[0-9]+: Error: operand mismatch -- `ext z0\.b,{ ?z0\.h,z1\.h ?},#0'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	ext z0\.b, {z0\.b-z1\.b}, #0
-[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `ext z0\.b,{z0\.b,z1\.b,z2\.b},#0'
-[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `ext z0\.b,{z0\.b},#0'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `ext z0\.b,{ ?z0\.b,z1\.b,z2\.b ?},#0'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `ext z0\.b,{ ?z0\.b ?},#0'
 [^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `ext z0\.b,z0\.b,#0'
-[^ :]+:[0-9]+: Error: the register list must have a stride of 1 at operand 2 -- `ext z0\.b,{z31\.b,z1\.b},#0'
-[^ :]+:[0-9]+: Error: the register list must have a stride of 1 at operand 2 -- `ext z0\.b,{z0\.b,z31\.b},#0'
-[^ :]+:[0-9]+: Error: immediate value out of range 0 to 255 at operand 3 -- `ext z0\.b,{z0\.b,z1\.b},#256'
-[^ :]+:[0-9]+: Error: expected a vector register at operand 1 -- `ext z32\.b,{z0\.b,z1\.b},#0'
-[^ :]+:[0-9]+: Error: operand 2 must be a list of SVE vector registers -- `ext z0\.b,{z31\.b,z32\.b},#0'
-[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 2 -- `ext z0\.b,{z32\.b,z33\.b},#0'
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 at operand 2 -- `ext z0\.b,{ ?z31\.b,z1\.b ?},#0'
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 at operand 2 -- `ext z0\.b,{ ?z0\.b,z31\.b ?},#0'
+[^ :]+:[0-9]+: Error: immediate value out of range 0 to 255 at operand 3 -- `ext z0\.b,{ ?z0\.b,z1\.b ?},#256'
+[^ :]+:[0-9]+: Error: expected a vector register at operand 1 -- `ext z32\.b,{ ?z0\.b,z1\.b ?},#0'
+[^ :]+:[0-9]+: Error: operand 2 must be a list of SVE vector registers -- `ext z0\.b,{ ?z31\.b,z32\.b ?},#0'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 2 -- `ext z0\.b,{ ?z32\.b,z33\.b ?},#0'
 [^ :]+:[0-9]+: Error: expected a register at operand 1 -- `faddp z32\.h,p0/m,z32\.h,z0\.h'
 [^ :]+:[0-9]+: Error: p0-p7 expected at operand 2 -- `faddp z0\.h,p8/m,z0\.h,z0\.h'
 [^ :]+:[0-9]+: Error: expected an SVE vector register at operand 4 -- `faddp z0\.h,p0/m,z0\.h,z32\.h'
@@ -488,134 +488,134 @@
 [^ :]+:[0-9]+: Error: operand mismatch -- `histseg z0\.b,z0\.b,z0\.h'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	histseg z0\.b, z0\.b, z0\.b
-[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ldnt1b {z0\.d,z1\.d},p0/z,\[z0\.d,x0\]'
-[^ :]+:[0-9]+: Error: operand mismatch -- `ldnt1b {z0\.d},p0/m,\[z0\.d\]'
+[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ldnt1b { ?z0\.d,z1\.d ?},p0/z,\[z0\.d,x0\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `ldnt1b { ?z0\.d ?},p0/m,\[z0\.d\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	ldnt1b {z0\.d}, p0/z, \[z0\.d\]
-[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `ldnt1b {z32\.d},p0/z,\[z0\.d\]'
-[^ :]+:[0-9]+: Error: p0-p7 expected at operand 2 -- `ldnt1b {z0\.d},p8/z,\[z0\.d\]'
-[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ldnt1b {z0\.d},p0/z,\[z32\.d\]'
-[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ldnt1b {z0\.d},p0/z,\[z0\.d,sp\]'
-[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ldnt1b {z0\.d},p0/z,\[z0\.d,x32\]'
-[^ :]+:[0-9]+: Error: invalid use of 32-bit register offset at operand 3 -- `ldnt1b {z0\.d},p0/z,\[z0\.d,w16\]'
-[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ldnt1b {z0\.d},p0/z,\[z0\.d,z0\.d\]'
-[^ :]+:[0-9]+: Error: operand mismatch -- `ldnt1b {z0\.s},p0/z,\[z0\.d\]'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `ldnt1b { ?z32\.d ?},p0/z,\[z0\.d\]'
+[^ :]+:[0-9]+: Error: p0-p7 expected at operand 2 -- `ldnt1b { ?z0\.d ?},p8/z,\[z0\.d\]'
+[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ldnt1b { ?z0\.d ?},p0/z,\[z32\.d\]'
+[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ldnt1b { ?z0\.d ?},p0/z,\[z0\.d,sp\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ldnt1b { ?z0\.d ?},p0/z,\[z0\.d,x32\]'
+[^ :]+:[0-9]+: Error: invalid use of 32-bit register offset at operand 3 -- `ldnt1b { ?z0\.d ?},p0/z,\[z0\.d,w16\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ldnt1b { ?z0\.d ?},p0/z,\[z0\.d,z0\.d\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `ldnt1b { ?z0\.s ?},p0/z,\[z0\.d\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	ldnt1b {z0\.s}, p0/z, \[z0\.s\]
-[^ :]+:[0-9]+: Error: operand mismatch -- `ldnt1b {z0\.d},p0/z,\[z0\.s\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `ldnt1b { ?z0\.d ?},p0/z,\[z0\.s\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	ldnt1b {z0\.s}, p0/z, \[z0\.s\]
-[^ :]+:[0-9]+: Error: type mismatch in vector register list at operand 1 -- `ldnt1b {z0\.s,z1\.d},p0/z,\[z0\.s,x0\]'
-[^ :]+:[0-9]+: Error: operand mismatch -- `ldnt1b {z0\.s},p0/m,\[z0\.s\]'
+[^ :]+:[0-9]+: Error: type mismatch in vector register list at operand 1 -- `ldnt1b { ?z0\.s,z1\.d ?},p0/z,\[z0\.s,x0\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `ldnt1b { ?z0\.s ?},p0/m,\[z0\.s\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	ldnt1b {z0\.s}, p0/z, \[z0\.s\]
-[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `ldnt1b {z32\.s},p0/z,\[z0\.s\]'
-[^ :]+:[0-9]+: Error: p0-p7 expected at operand 2 -- `ldnt1b {z0\.s},p8/z,\[z0\.s\]'
-[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ldnt1b {z0\.s},p0/z,\[z32\.s\]'
-[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ldnt1b {z0\.s},p0/z,\[z0\.s,sp\]'
-[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ldnt1b {z0\.s},p0/z,\[z0\.s,x32\]'
-[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ldnt1b {z0\.s},p0/z,\[z0\.s,z0\.s\]'
-[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ldnt1d {z0\.d,z1\.d},p0/z,\[z0\.d,x0\]'
-[^ :]+:[0-9]+: Error: operand mismatch -- `ldnt1d {z0\.d},p0/m,\[z0\.d\]'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `ldnt1b { ?z32\.s ?},p0/z,\[z0\.s\]'
+[^ :]+:[0-9]+: Error: p0-p7 expected at operand 2 -- `ldnt1b { ?z0\.s ?},p8/z,\[z0\.s\]'
+[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ldnt1b { ?z0\.s ?},p0/z,\[z32\.s\]'
+[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ldnt1b { ?z0\.s ?},p0/z,\[z0\.s,sp\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ldnt1b { ?z0\.s ?},p0/z,\[z0\.s,x32\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ldnt1b { ?z0\.s ?},p0/z,\[z0\.s,z0\.s\]'
+[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ldnt1d { ?z0\.d,z1\.d ?},p0/z,\[z0\.d,x0\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `ldnt1d { ?z0\.d ?},p0/m,\[z0\.d\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	ldnt1d {z0\.d}, p0/z, \[z0\.d\]
-[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `ldnt1d {z32\.d},p0/z,\[z0\.d\]'
-[^ :]+:[0-9]+: Error: p0-p7 expected at operand 2 -- `ldnt1d {z0\.d},p8/z,\[z0\.d\]'
-[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ldnt1d {z0\.d},p0/z,\[z32\.d\]'
-[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ldnt1d {z0\.d},p0/z,\[z0\.d,sp\]'
-[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ldnt1d {z0\.d},p0/z,\[z0\.d,x32\]'
-[^ :]+:[0-9]+: Error: invalid use of 32-bit register offset at operand 3 -- `ldnt1d {z0\.d},p0/z,\[z0\.d,w16\]'
-[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ldnt1d {z0\.d},p0/z,\[z0\.d,z0\.d\]'
-[^ :]+:[0-9]+: Error: operand mismatch -- `ldnt1d {z0\.s},p0/z,\[z0\.d\]'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `ldnt1d { ?z32\.d ?},p0/z,\[z0\.d\]'
+[^ :]+:[0-9]+: Error: p0-p7 expected at operand 2 -- `ldnt1d { ?z0\.d ?},p8/z,\[z0\.d\]'
+[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ldnt1d { ?z0\.d ?},p0/z,\[z32\.d\]'
+[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ldnt1d { ?z0\.d ?},p0/z,\[z0\.d,sp\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ldnt1d { ?z0\.d ?},p0/z,\[z0\.d,x32\]'
+[^ :]+:[0-9]+: Error: invalid use of 32-bit register offset at operand 3 -- `ldnt1d { ?z0\.d ?},p0/z,\[z0\.d,w16\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ldnt1d { ?z0\.d ?},p0/z,\[z0\.d,z0\.d\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `ldnt1d { ?z0\.s ?},p0/z,\[z0\.d\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	ldnt1d {z0\.d}, p0/z, \[z0\.d\]
-[^ :]+:[0-9]+: Error: operand mismatch -- `ldnt1d {z0\.d},p0/z,\[z0\.s\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `ldnt1d { ?z0\.d ?},p0/z,\[z0\.s\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	ldnt1d {z0\.d}, p0/z, \[z0\.d\]
-[^ :]+:[0-9]+: Error: operand mismatch -- `ldnt1d {z0\.d},p0/m,\[z0\.d\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `ldnt1d { ?z0\.d ?},p0/m,\[z0\.d\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	ldnt1d {z0\.d}, p0/z, \[z0\.d\]
-[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ldnt1h {z0\.d,z1\.d},p0/z,\[z0\.d,x0\]'
-[^ :]+:[0-9]+: Error: operand mismatch -- `ldnt1h {z0\.d},p0/m,\[z0\.d\]'
+[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ldnt1h { ?z0\.d,z1\.d ?},p0/z,\[z0\.d,x0\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `ldnt1h { ?z0\.d ?},p0/m,\[z0\.d\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	ldnt1h {z0\.d}, p0/z, \[z0\.d\]
-[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `ldnt1h {z32\.d},p0/z,\[z0\.d\]'
-[^ :]+:[0-9]+: Error: p0-p7 expected at operand 2 -- `ldnt1h {z0\.d},p8/z,\[z0\.d\]'
-[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ldnt1h {z0\.d},p0/z,\[z32\.d\]'
-[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ldnt1h {z0\.d},p0/z,\[z0\.d,sp\]'
-[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ldnt1h {z0\.d},p0/z,\[z0\.d,x32\]'
-[^ :]+:[0-9]+: Error: invalid use of 32-bit register offset at operand 3 -- `ldnt1h {z0\.d},p0/z,\[z0\.d,w16\]'
-[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ldnt1h {z0\.d},p0/z,\[z0\.d,z0\.d\]'
-[^ :]+:[0-9]+: Error: operand mismatch -- `ldnt1h {z0\.s},p0/z,\[z0\.d\]'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `ldnt1h { ?z32\.d ?},p0/z,\[z0\.d\]'
+[^ :]+:[0-9]+: Error: p0-p7 expected at operand 2 -- `ldnt1h { ?z0\.d ?},p8/z,\[z0\.d\]'
+[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ldnt1h { ?z0\.d ?},p0/z,\[z32\.d\]'
+[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ldnt1h { ?z0\.d ?},p0/z,\[z0\.d,sp\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ldnt1h { ?z0\.d ?},p0/z,\[z0\.d,x32\]'
+[^ :]+:[0-9]+: Error: invalid use of 32-bit register offset at operand 3 -- `ldnt1h { ?z0\.d ?},p0/z,\[z0\.d,w16\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ldnt1h { ?z0\.d ?},p0/z,\[z0\.d,z0\.d\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `ldnt1h { ?z0\.s ?},p0/z,\[z0\.d\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	ldnt1h {z0\.s}, p0/z, \[z0\.s\]
-[^ :]+:[0-9]+: Error: type mismatch in vector register list at operand 1 -- `ldnt1h {z0\.s,z1\.d},p0/z,\[z0\.s,x0\]'
-[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `ldnt1h {z32\.s},p0/z,\[z0\.s\]'
-[^ :]+:[0-9]+: Error: p0-p7 expected at operand 2 -- `ldnt1h {z0\.s},p8/z,\[z0\.s\]'
-[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ldnt1h {z0\.s},p0/z,\[z32\.s\]'
-[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ldnt1h {z0\.s},p0/z,\[z0\.s,sp\]'
-[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ldnt1h {z0\.s},p0/z,\[z0\.s,x32\]'
-[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ldnt1h {z0\.s},p0/z,\[z0\.s,z0\.s\]'
-[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ldnt1sb {z0\.d,z1\.d},p0/z,\[z0\.d,x0\]'
-[^ :]+:[0-9]+: Error: operand mismatch -- `ldnt1sb {z0\.d},p0/m,\[z0\.d\]'
+[^ :]+:[0-9]+: Error: type mismatch in vector register list at operand 1 -- `ldnt1h { ?z0\.s,z1\.d ?},p0/z,\[z0\.s,x0\]'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `ldnt1h { ?z32\.s ?},p0/z,\[z0\.s\]'
+[^ :]+:[0-9]+: Error: p0-p7 expected at operand 2 -- `ldnt1h { ?z0\.s ?},p8/z,\[z0\.s\]'
+[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ldnt1h { ?z0\.s ?},p0/z,\[z32\.s\]'
+[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ldnt1h { ?z0\.s ?},p0/z,\[z0\.s,sp\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ldnt1h { ?z0\.s ?},p0/z,\[z0\.s,x32\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ldnt1h { ?z0\.s ?},p0/z,\[z0\.s,z0\.s\]'
+[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ldnt1sb { ?z0\.d,z1\.d ?},p0/z,\[z0\.d,x0\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `ldnt1sb { ?z0\.d ?},p0/m,\[z0\.d\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	ldnt1sb {z0\.d}, p0/z, \[z0\.d\]
 [^ :]+:[0-9]+: Info:    other valid variant\(s\):
 [^ :]+:[0-9]+: Info:    	ldnt1sb {z0\.s}, p0/z, \[z0\.s\]
-[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `ldnt1sb {z32\.d},p0/z,\[z0\.d\]'
-[^ :]+:[0-9]+: Error: p0-p7 expected at operand 2 -- `ldnt1sb {z0\.d},p8/z,\[z0\.d\]'
-[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ldnt1sb {z0\.d},p0/z,\[z32\.d\]'
-[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ldnt1sb {z0\.d},p0/z,\[z0\.d,sp\]'
-[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ldnt1sb {z0\.d},p0/z,\[z0\.d,x32\]'
-[^ :]+:[0-9]+: Error: invalid use of 32-bit register offset at operand 3 -- `ldnt1sb {z0\.d},p0/z,\[z0\.d,w16\]'
-[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ldnt1sb {z0\.d},p0/z,\[z0\.d,z0\.d\]'
-[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ldnt1sh {z0\.d,z1\.d},p0/z,\[z0\.d,x0\]'
-[^ :]+:[0-9]+: Error: operand mismatch -- `ldnt1sh {z0\.d},p0/m,\[z0\.d\]'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `ldnt1sb { ?z32\.d ?},p0/z,\[z0\.d\]'
+[^ :]+:[0-9]+: Error: p0-p7 expected at operand 2 -- `ldnt1sb { ?z0\.d ?},p8/z,\[z0\.d\]'
+[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ldnt1sb { ?z0\.d ?},p0/z,\[z32\.d\]'
+[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ldnt1sb { ?z0\.d ?},p0/z,\[z0\.d,sp\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ldnt1sb { ?z0\.d ?},p0/z,\[z0\.d,x32\]'
+[^ :]+:[0-9]+: Error: invalid use of 32-bit register offset at operand 3 -- `ldnt1sb { ?z0\.d ?},p0/z,\[z0\.d,w16\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ldnt1sb { ?z0\.d ?},p0/z,\[z0\.d,z0\.d\]'
+[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ldnt1sh { ?z0\.d,z1\.d ?},p0/z,\[z0\.d,x0\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `ldnt1sh { ?z0\.d ?},p0/m,\[z0\.d\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	ldnt1sh {z0\.d}, p0/z, \[z0\.d\]
 [^ :]+:[0-9]+: Info:    other valid variant\(s\):
 [^ :]+:[0-9]+: Info:    	ldnt1sh {z0\.s}, p0/z, \[z0\.s\]
-[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `ldnt1sh {z32\.d},p0/z,\[z0\.d\]'
-[^ :]+:[0-9]+: Error: p0-p7 expected at operand 2 -- `ldnt1sh {z0\.d},p8/z,\[z0\.d\]'
-[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ldnt1sh {z0\.d},p0/z,\[z32\.d\]'
-[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ldnt1sh {z0\.d},p0/z,\[z0\.d,sp\]'
-[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ldnt1sh {z0\.d},p0/z,\[z0\.d,x32\]'
-[^ :]+:[0-9]+: Error: invalid use of 32-bit register offset at operand 3 -- `ldnt1sh {z0\.d},p0/z,\[z0\.d,w16\]'
-[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ldnt1sh {z0\.d},p0/z,\[z0\.d,z0\.d\]'
-[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ldnt1sh {z0\.d,z1\.d},p0/z,\[z0\.d,x0\]'
-[^ :]+:[0-9]+: Error: operand mismatch -- `ldnt1sh {z0\.d},p0/m,\[z0\.d\]'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `ldnt1sh { ?z32\.d ?},p0/z,\[z0\.d\]'
+[^ :]+:[0-9]+: Error: p0-p7 expected at operand 2 -- `ldnt1sh { ?z0\.d ?},p8/z,\[z0\.d\]'
+[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ldnt1sh { ?z0\.d ?},p0/z,\[z32\.d\]'
+[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ldnt1sh { ?z0\.d ?},p0/z,\[z0\.d,sp\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ldnt1sh { ?z0\.d ?},p0/z,\[z0\.d,x32\]'
+[^ :]+:[0-9]+: Error: invalid use of 32-bit register offset at operand 3 -- `ldnt1sh { ?z0\.d ?},p0/z,\[z0\.d,w16\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ldnt1sh { ?z0\.d ?},p0/z,\[z0\.d,z0\.d\]'
+[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ldnt1sh { ?z0\.d,z1\.d ?},p0/z,\[z0\.d,x0\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `ldnt1sh { ?z0\.d ?},p0/m,\[z0\.d\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	ldnt1sh {z0\.d}, p0/z, \[z0\.d\]
 [^ :]+:[0-9]+: Info:    other valid variant\(s\):
 [^ :]+:[0-9]+: Info:    	ldnt1sh {z0\.s}, p0/z, \[z0\.s\]
-[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `ldnt1sh {z32\.d},p0/z,\[z0\.d\]'
-[^ :]+:[0-9]+: Error: p0-p7 expected at operand 2 -- `ldnt1sh {z0\.d},p8/z,\[z0\.d\]'
-[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ldnt1sh {z0\.d},p0/z,\[z32\.d\]'
-[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ldnt1sh {z0\.d},p0/z,\[z0\.d,sp\]'
-[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ldnt1sh {z0\.d},p0/z,\[z0\.d,x32\]'
-[^ :]+:[0-9]+: Error: invalid use of 32-bit register offset at operand 3 -- `ldnt1sh {z0\.d},p0/z,\[z0\.d,w16\]'
-[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ldnt1sh {z0\.d},p0/z,\[z0\.d,z0\.d\]'
-[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ldnt1w {z0\.d,z1\.d},p0/z,\[z0\.d,x0\]'
-[^ :]+:[0-9]+: Error: operand mismatch -- `ldnt1w {z0\.d},p0/m,\[z0\.d\]'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `ldnt1sh { ?z32\.d ?},p0/z,\[z0\.d\]'
+[^ :]+:[0-9]+: Error: p0-p7 expected at operand 2 -- `ldnt1sh { ?z0\.d ?},p8/z,\[z0\.d\]'
+[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ldnt1sh { ?z0\.d ?},p0/z,\[z32\.d\]'
+[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ldnt1sh { ?z0\.d ?},p0/z,\[z0\.d,sp\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ldnt1sh { ?z0\.d ?},p0/z,\[z0\.d,x32\]'
+[^ :]+:[0-9]+: Error: invalid use of 32-bit register offset at operand 3 -- `ldnt1sh { ?z0\.d ?},p0/z,\[z0\.d,w16\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ldnt1sh { ?z0\.d ?},p0/z,\[z0\.d,z0\.d\]'
+[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ldnt1w { ?z0\.d,z1\.d ?},p0/z,\[z0\.d,x0\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `ldnt1w { ?z0\.d ?},p0/m,\[z0\.d\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	ldnt1w {z0\.d}, p0/z, \[z0\.d\]
-[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `ldnt1w {z32\.d},p0/z,\[z0\.d\]'
-[^ :]+:[0-9]+: Error: p0-p7 expected at operand 2 -- `ldnt1w {z0\.d},p8/z,\[z0\.d\]'
-[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ldnt1w {z0\.d},p0/z,\[z32\.d\]'
-[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ldnt1w {z0\.d},p0/z,\[z0\.d,sp\]'
-[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ldnt1w {z0\.d},p0/z,\[z0\.d,x32\]'
-[^ :]+:[0-9]+: Error: invalid use of 32-bit register offset at operand 3 -- `ldnt1w {z0\.d},p0/z,\[z0\.d,w16\]'
-[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ldnt1w {z0\.d},p0/z,\[z0\.d,z0\.d\]'
-[^ :]+:[0-9]+: Error: operand mismatch -- `ldnt1w {z0\.s},p0/z,\[z0\.d\]'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `ldnt1w { ?z32\.d ?},p0/z,\[z0\.d\]'
+[^ :]+:[0-9]+: Error: p0-p7 expected at operand 2 -- `ldnt1w { ?z0\.d ?},p8/z,\[z0\.d\]'
+[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ldnt1w { ?z0\.d ?},p0/z,\[z32\.d\]'
+[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ldnt1w { ?z0\.d ?},p0/z,\[z0\.d,sp\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ldnt1w { ?z0\.d ?},p0/z,\[z0\.d,x32\]'
+[^ :]+:[0-9]+: Error: invalid use of 32-bit register offset at operand 3 -- `ldnt1w { ?z0\.d ?},p0/z,\[z0\.d,w16\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ldnt1w { ?z0\.d ?},p0/z,\[z0\.d,z0\.d\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `ldnt1w { ?z0\.s ?},p0/z,\[z0\.d\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	ldnt1w {z0\.s}, p0/z, \[z0\.s\]
-[^ :]+:[0-9]+: Error: type mismatch in vector register list at operand 1 -- `ldnt1w {z0\.s,z1\.d},p0/z,\[z0\.s,x0\]'
-[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `ldnt1w {z32\.s},p0/z,\[z0\.s\]'
-[^ :]+:[0-9]+: Error: p0-p7 expected at operand 2 -- `ldnt1w {z0\.s},p8/z,\[z0\.s\]'
-[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ldnt1w {z0\.s},p0/z,\[z32\.s\]'
-[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ldnt1w {z0\.s},p0/z,\[z0\.s,sp\]'
-[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ldnt1w {z0\.s},p0/z,\[z0\.s,x32\]'
-[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ldnt1w {z0\.s},p0/z,\[z0\.s,z0\.s\]'
+[^ :]+:[0-9]+: Error: type mismatch in vector register list at operand 1 -- `ldnt1w { ?z0\.s,z1\.d ?},p0/z,\[z0\.s,x0\]'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `ldnt1w { ?z32\.s ?},p0/z,\[z0\.s\]'
+[^ :]+:[0-9]+: Error: p0-p7 expected at operand 2 -- `ldnt1w { ?z0\.s ?},p8/z,\[z0\.s\]'
+[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ldnt1w { ?z0\.s ?},p0/z,\[z32\.s\]'
+[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ldnt1w { ?z0\.s ?},p0/z,\[z0\.s,sp\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ldnt1w { ?z0\.s ?},p0/z,\[z0\.s,x32\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ldnt1w { ?z0\.s ?},p0/z,\[z0\.s,z0\.s\]'
 [^ :]+:[0-9]+: Error: operand mismatch -- `match p0\.h,p0/z,z0\.b,z0\.b'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	match p0\.b, p0/z, z0\.b, z0\.b
@@ -1277,21 +1277,21 @@
 [^ :]+:[0-9]+: Info:    other valid variant\(s\):
 [^ :]+:[0-9]+: Info:    	smullt z0\.s, z0\.h, z0\.h
 [^ :]+:[0-9]+: Info:    	smullt z0\.d, z0\.s, z0\.s
-[^ :]+:[0-9]+: Error: the register list must have a stride of 1 at operand 3 -- `splice z0\.b,p0,{z0\.b,z2\.b}'
-[^ :]+:[0-9]+: Error: operand mismatch -- `splice z0\.h,p0,{z0\.b,z1\.b}'
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 at operand 3 -- `splice z0\.b,p0,{ ?z0\.b,z2\.b ?}'
+[^ :]+:[0-9]+: Error: operand mismatch -- `splice z0\.h,p0,{ ?z0\.b,z1\.b ?}'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	splice z0\.b, p0, {z0\.b-z1\.b}
 [^ :]+:[0-9]+: Info:    other valid variant\(s\):
 [^ :]+:[0-9]+: Info:    	splice z0\.h, p0, {z0\.h-z1\.h}
 [^ :]+:[0-9]+: Info:    	splice z0\.s, p0, {z0\.s-z1\.s}
 [^ :]+:[0-9]+: Info:    	splice z0\.d, p0, {z0\.d-z1\.d}
-[^ :]+:[0-9]+: Error: type mismatch in vector register list at operand 3 -- `splice z0\.b,p0,{z0\.h,z1\.b}'
-[^ :]+:[0-9]+: Error: type mismatch in vector register list at operand 3 -- `splice z0\.b,p0,{z0\.b,z1\.h}'
-[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `splice z32\.b,p0,{z0\.b,z1\.b}'
-[^ :]+:[0-9]+: Error: p0-p7 expected at operand 2 -- `splice z0\.b,p8,{z0\.b,z1\.b}'
-[^ :]+:[0-9]+: Error: the register list must have a stride of 1 at operand 3 -- `splice z0\.b,p0,{z31\.b,z1\.b}'
-[^ :]+:[0-9]+: Error: operand 3 must be a list of SVE vector registers -- `splice z0\.b,p0,{z31\.b,z32\.b}'
-[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `splice z0\.b,p0,{z32\.b,z1\.b}'
+[^ :]+:[0-9]+: Error: type mismatch in vector register list at operand 3 -- `splice z0\.b,p0,{ ?z0\.h,z1\.b ?}'
+[^ :]+:[0-9]+: Error: type mismatch in vector register list at operand 3 -- `splice z0\.b,p0,{ ?z0\.b,z1\.h ?}'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `splice z32\.b,p0,{ ?z0\.b,z1\.b ?}'
+[^ :]+:[0-9]+: Error: p0-p7 expected at operand 2 -- `splice z0\.b,p8,{ ?z0\.b,z1\.b ?}'
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 at operand 3 -- `splice z0\.b,p0,{ ?z31\.b,z1\.b ?}'
+[^ :]+:[0-9]+: Error: operand 3 must be a list of SVE vector registers -- `splice z0\.b,p0,{ ?z31\.b,z32\.b ?}'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `splice z0\.b,p0,{ ?z32\.b,z1\.b ?}'
 [^ :]+:[0-9]+: Error: expected a register at operand 1 -- `sqabs z32\.b,p0/m,z0\.b'
 [^ :]+:[0-9]+: Error: p0-p7 expected at operand 2 -- `sqabs z0\.b,p8/m,z0\.b'
 [^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `sqabs z0\.b,p0/m,z32\.b'
@@ -2216,83 +2216,83 @@
 [^ :]+:[0-9]+: Info:    other valid variant\(s\):
 [^ :]+:[0-9]+: Info:    	ssubwt z0\.s, z0\.s, z0\.h
 [^ :]+:[0-9]+: Info:    	ssubwt z0\.d, z0\.d, z0\.s
-[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `stnt1b {z0\.d,z1\.d},p0,\[z0\.d,x0\]'
-[^ :]+:[0-9]+: Error: operand mismatch -- `stnt1b {z0\.d},p0/m,\[z0\.d\]'
+[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `stnt1b { ?z0\.d,z1\.d ?},p0,\[z0\.d,x0\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `stnt1b { ?z0\.d ?},p0/m,\[z0\.d\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	stnt1b {z0\.d}, p0, \[z0\.d\]
-[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `stnt1b {z32\.d},p0,\[z0\.d\]'
-[^ :]+:[0-9]+: Error: p0-p7 expected at operand 2 -- `stnt1b {z0\.d},p8,\[z0\.d\]'
-[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `stnt1b {z0\.d},p0,\[z32\.d\]'
-[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `stnt1b {z0\.d},p0,\[z0\.d,sp\]'
-[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `stnt1b {z0\.d},p0,\[z0\.d,x32\]'
-[^ :]+:[0-9]+: Error: invalid use of 32-bit register offset at operand 3 -- `stnt1b {z0\.d},p0,\[z0\.d,w16\]'
-[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `stnt1b {z0\.d},p0,\[z0\.d,z0\.d\]'
-[^ :]+:[0-9]+: Error: operand mismatch -- `stnt1b {z0\.s},p0,\[z0\.d\]'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `stnt1b { ?z32\.d ?},p0,\[z0\.d\]'
+[^ :]+:[0-9]+: Error: p0-p7 expected at operand 2 -- `stnt1b { ?z0\.d ?},p8,\[z0\.d\]'
+[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `stnt1b { ?z0\.d ?},p0,\[z32\.d\]'
+[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `stnt1b { ?z0\.d ?},p0,\[z0\.d,sp\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `stnt1b { ?z0\.d ?},p0,\[z0\.d,x32\]'
+[^ :]+:[0-9]+: Error: invalid use of 32-bit register offset at operand 3 -- `stnt1b { ?z0\.d ?},p0,\[z0\.d,w16\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `stnt1b { ?z0\.d ?},p0,\[z0\.d,z0\.d\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `stnt1b { ?z0\.s ?},p0,\[z0\.d\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	stnt1b {z0\.s}, p0, \[z0\.s\]
-[^ :]+:[0-9]+: Error: type mismatch in vector register list at operand 1 -- `stnt1b {z0\.s,z1\.d},p0,\[z0\.s,x0\]'
-[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `stnt1b {z32\.s},p0,\[z0\.s\]'
-[^ :]+:[0-9]+: Error: p0-p7 expected at operand 2 -- `stnt1b {z0\.s},p8,\[z0\.s\]'
-[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `stnt1b {z0\.s},p0,\[z32\.s\]'
-[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `stnt1b {z0\.s},p0,\[z0\.s,sp\]'
-[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `stnt1b {z0\.s},p0,\[z0\.s,x32\]'
-[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `stnt1b {z0\.s},p0,\[z0\.s,z0\.s\]'
-[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `stnt1d {z0\.d,z1\.d},p0,\[z0\.d,x0\]'
-[^ :]+:[0-9]+: Error: operand mismatch -- `stnt1d {z0\.d},p0/m,\[z0\.d\]'
+[^ :]+:[0-9]+: Error: type mismatch in vector register list at operand 1 -- `stnt1b { ?z0\.s,z1\.d ?},p0,\[z0\.s,x0\]'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `stnt1b { ?z32\.s ?},p0,\[z0\.s\]'
+[^ :]+:[0-9]+: Error: p0-p7 expected at operand 2 -- `stnt1b { ?z0\.s ?},p8,\[z0\.s\]'
+[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `stnt1b { ?z0\.s ?},p0,\[z32\.s\]'
+[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `stnt1b { ?z0\.s ?},p0,\[z0\.s,sp\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `stnt1b { ?z0\.s ?},p0,\[z0\.s,x32\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `stnt1b { ?z0\.s ?},p0,\[z0\.s,z0\.s\]'
+[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `stnt1d { ?z0\.d,z1\.d ?},p0,\[z0\.d,x0\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `stnt1d { ?z0\.d ?},p0/m,\[z0\.d\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	stnt1d {z0\.d}, p0, \[z0\.d\]
-[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `stnt1d {z32\.d},p0,\[z0\.d\]'
-[^ :]+:[0-9]+: Error: p0-p7 expected at operand 2 -- `stnt1d {z0\.d},p8,\[z0\.d\]'
-[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `stnt1d {z0\.d},p0,\[z32\.d\]'
-[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `stnt1d {z0\.d},p0,\[z0\.d,sp\]'
-[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `stnt1d {z0\.d},p0,\[z0\.d,x32\]'
-[^ :]+:[0-9]+: Error: invalid use of 32-bit register offset at operand 3 -- `stnt1d {z0\.d},p0,\[z0\.d,w16\]'
-[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `stnt1d {z0\.d},p0,\[z0\.d,z0\.d\]'
-[^ :]+:[0-9]+: Error: operand mismatch -- `stnt1d {z0\.s},p0,\[z0\.d\]'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `stnt1d { ?z32\.d ?},p0,\[z0\.d\]'
+[^ :]+:[0-9]+: Error: p0-p7 expected at operand 2 -- `stnt1d { ?z0\.d ?},p8,\[z0\.d\]'
+[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `stnt1d { ?z0\.d ?},p0,\[z32\.d\]'
+[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `stnt1d { ?z0\.d ?},p0,\[z0\.d,sp\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `stnt1d { ?z0\.d ?},p0,\[z0\.d,x32\]'
+[^ :]+:[0-9]+: Error: invalid use of 32-bit register offset at operand 3 -- `stnt1d { ?z0\.d ?},p0,\[z0\.d,w16\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `stnt1d { ?z0\.d ?},p0,\[z0\.d,z0\.d\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `stnt1d { ?z0\.s ?},p0,\[z0\.d\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	stnt1d {z0\.d}, p0, \[z0\.d\]
-[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `stnt1h {z0\.d,z1\.d},p0,\[z0\.d,x0\]'
-[^ :]+:[0-9]+: Error: operand mismatch -- `stnt1h {z0\.d},p0/m,\[z0\.d\]'
+[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `stnt1h { ?z0\.d,z1\.d ?},p0,\[z0\.d,x0\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `stnt1h { ?z0\.d ?},p0/m,\[z0\.d\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	stnt1h {z0\.d}, p0, \[z0\.d\]
-[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `stnt1h {z32\.d},p0,\[z0\.d\]'
-[^ :]+:[0-9]+: Error: p0-p7 expected at operand 2 -- `stnt1h {z0\.d},p8,\[z0\.d\]'
-[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `stnt1h {z0\.d},p0,\[z32\.d\]'
-[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `stnt1h {z0\.d},p0,\[z0\.d,sp\]'
-[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `stnt1h {z0\.d},p0,\[z0\.d,x32\]'
-[^ :]+:[0-9]+: Error: invalid use of 32-bit register offset at operand 3 -- `stnt1h {z0\.d},p0,\[z0\.d,w16\]'
-[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `stnt1h {z0\.d},p0,\[z0\.d,z0\.d\]'
-[^ :]+:[0-9]+: Error: operand mismatch -- `stnt1h {z0\.s},p0,\[z0\.d\]'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `stnt1h { ?z32\.d ?},p0,\[z0\.d\]'
+[^ :]+:[0-9]+: Error: p0-p7 expected at operand 2 -- `stnt1h { ?z0\.d ?},p8,\[z0\.d\]'
+[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `stnt1h { ?z0\.d ?},p0,\[z32\.d\]'
+[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `stnt1h { ?z0\.d ?},p0,\[z0\.d,sp\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `stnt1h { ?z0\.d ?},p0,\[z0\.d,x32\]'
+[^ :]+:[0-9]+: Error: invalid use of 32-bit register offset at operand 3 -- `stnt1h { ?z0\.d ?},p0,\[z0\.d,w16\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `stnt1h { ?z0\.d ?},p0,\[z0\.d,z0\.d\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `stnt1h { ?z0\.s ?},p0,\[z0\.d\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	stnt1h {z0\.s}, p0, \[z0\.s\]
-[^ :]+:[0-9]+: Error: type mismatch in vector register list at operand 1 -- `stnt1h {z0\.s,z1\.d},p0,\[z0\.s,x0\]'
-[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `stnt1h {z32\.s},p0,\[z0\.s\]'
-[^ :]+:[0-9]+: Error: p0-p7 expected at operand 2 -- `stnt1h {z0\.s},p8,\[z0\.s\]'
-[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `stnt1h {z0\.s},p0,\[z32\.s\]'
-[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `stnt1h {z0\.s},p0,\[z0\.s,sp\]'
-[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `stnt1h {z0\.s},p0,\[z0\.s,x32\]'
-[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `stnt1h {z0\.s},p0,\[z0\.s,z0\.s\]'
-[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `stnt1w {z0\.d,z1\.d},p0,\[z0\.d,x0\]'
-[^ :]+:[0-9]+: Error: operand mismatch -- `stnt1w {z0\.d},p0/m,\[z0\.d\]'
+[^ :]+:[0-9]+: Error: type mismatch in vector register list at operand 1 -- `stnt1h { ?z0\.s,z1\.d ?},p0,\[z0\.s,x0\]'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `stnt1h { ?z32\.s ?},p0,\[z0\.s\]'
+[^ :]+:[0-9]+: Error: p0-p7 expected at operand 2 -- `stnt1h { ?z0\.s ?},p8,\[z0\.s\]'
+[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `stnt1h { ?z0\.s ?},p0,\[z32\.s\]'
+[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `stnt1h { ?z0\.s ?},p0,\[z0\.s,sp\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `stnt1h { ?z0\.s ?},p0,\[z0\.s,x32\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `stnt1h { ?z0\.s ?},p0,\[z0\.s,z0\.s\]'
+[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `stnt1w { ?z0\.d,z1\.d ?},p0,\[z0\.d,x0\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `stnt1w { ?z0\.d ?},p0/m,\[z0\.d\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	stnt1w {z0\.d}, p0, \[z0\.d\]
-[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `stnt1w {z32\.d},p0,\[z0\.d\]'
-[^ :]+:[0-9]+: Error: p0-p7 expected at operand 2 -- `stnt1w {z0\.d},p8,\[z0\.d\]'
-[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `stnt1w {z0\.d},p0,\[z32\.d\]'
-[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `stnt1w {z0\.d},p0,\[z0\.d,sp\]'
-[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `stnt1w {z0\.d},p0,\[z0\.d,x32\]'
-[^ :]+:[0-9]+: Error: invalid use of 32-bit register offset at operand 3 -- `stnt1w {z0\.d},p0,\[z0\.d,w16\]'
-[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `stnt1w {z0\.d},p0,\[z0\.d,z0\.d\]'
-[^ :]+:[0-9]+: Error: operand mismatch -- `stnt1w {z0\.s},p0,\[z0\.d\]'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `stnt1w { ?z32\.d ?},p0,\[z0\.d\]'
+[^ :]+:[0-9]+: Error: p0-p7 expected at operand 2 -- `stnt1w { ?z0\.d ?},p8,\[z0\.d\]'
+[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `stnt1w { ?z0\.d ?},p0,\[z32\.d\]'
+[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `stnt1w { ?z0\.d ?},p0,\[z0\.d,sp\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `stnt1w { ?z0\.d ?},p0,\[z0\.d,x32\]'
+[^ :]+:[0-9]+: Error: invalid use of 32-bit register offset at operand 3 -- `stnt1w { ?z0\.d ?},p0,\[z0\.d,w16\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `stnt1w { ?z0\.d ?},p0,\[z0\.d,z0\.d\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `stnt1w { ?z0\.s ?},p0,\[z0\.d\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	stnt1w {z0\.s}, p0, \[z0\.s\]
-[^ :]+:[0-9]+: Error: type mismatch in vector register list at operand 1 -- `stnt1w {z0\.s,z1\.d},p0,\[z0\.s,x0\]'
-[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `stnt1w {z32\.s},p0,\[z0\.s\]'
-[^ :]+:[0-9]+: Error: p0-p7 expected at operand 2 -- `stnt1w {z0\.s},p8,\[z0\.s\]'
-[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `stnt1w {z0\.s},p0,\[z32\.s\]'
-[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `stnt1w {z0\.s},p0,\[z0\.s,sp\]'
-[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `stnt1w {z0\.s},p0,\[z0\.s,x32\]'
-[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `stnt1w {z0\.s},p0,\[z0\.s,z0\.s\]'
+[^ :]+:[0-9]+: Error: type mismatch in vector register list at operand 1 -- `stnt1w { ?z0\.s,z1\.d ?},p0,\[z0\.s,x0\]'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `stnt1w { ?z32\.s ?},p0,\[z0\.s\]'
+[^ :]+:[0-9]+: Error: p0-p7 expected at operand 2 -- `stnt1w { ?z0\.s ?},p8,\[z0\.s\]'
+[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `stnt1w { ?z0\.s ?},p0,\[z32\.s\]'
+[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `stnt1w { ?z0\.s ?},p0,\[z0\.s,sp\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `stnt1w { ?z0\.s ?},p0,\[z0\.s,x32\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `stnt1w { ?z0\.s ?},p0,\[z0\.s,z0\.s\]'
 [^ :]+:[0-9]+: Error: operand mismatch -- `subhnb z0\.h,z0\.h,z0\.h'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	subhnb z0\.b, z0\.h, z0\.h
@@ -2330,21 +2330,21 @@
 [^ :]+:[0-9]+: Info:    	suqadd z0\.h, p0/m, z0\.h, z0\.h
 [^ :]+:[0-9]+: Info:    	suqadd z0\.s, p0/m, z0\.s, z0\.s
 [^ :]+:[0-9]+: Info:    	suqadd z0\.d, p0/m, z0\.d, z0\.d
-[^ :]+:[0-9]+: Error: expected a vector register at operand 1 -- `tbl z32\.b,{z0\.b,z1\.b},z0\.b'
-[^ :]+:[0-9]+: Error: operand 2 must be a list of SVE vector registers -- `tbl z0\.b,{z31\.b,z32\.b},z0\.b'
-[^ :]+:[0-9]+: Error: the register list must have a stride of 1 at operand 2 -- `tbl z0\.b,{z31\.b,z1\.b},z0\.b'
-[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `tbl z0\.b,{z0\.b,z1\.b},z32\.b'
-[^ :]+:[0-9]+: Error: operand mismatch -- `tbl z0\.b,{z0\.b,z1\.b},z0\.h'
+[^ :]+:[0-9]+: Error: expected a vector register at operand 1 -- `tbl z32\.b,{ ?z0\.b,z1\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: operand 2 must be a list of SVE vector registers -- `tbl z0\.b,{ ?z31\.b,z32\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 at operand 2 -- `tbl z0\.b,{ ?z31\.b,z1\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `tbl z0\.b,{ ?z0\.b,z1\.b ?},z32\.b'
+[^ :]+:[0-9]+: Error: operand mismatch -- `tbl z0\.b,{ ?z0\.b,z1\.b ?},z0\.h'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	tbl z0\.b, {z0\.b-z1\.b}, z0\.b
 [^ :]+:[0-9]+: Info:    other valid variant\(s\):
 [^ :]+:[0-9]+: Info:    	tbl z0\.h, {z0\.h-z1\.h}, z0\.h
 [^ :]+:[0-9]+: Info:    	tbl z0\.s, {z0\.s-z1\.s}, z0\.s
 [^ :]+:[0-9]+: Info:    	tbl z0\.d, {z0\.d-z1\.d}, z0\.d
-[^ :]+:[0-9]+: Error: type mismatch in vector register list at operand 2 -- `tbl z0\.b,{z0\.b,z1\.h},z0\.b'
-[^ :]+:[0-9]+: Error: type mismatch in vector register list at operand 2 -- `tbl z0\.b,{z0\.h,z0\.b},z0\.b'
-[^ :]+:[0-9]+: Error: invalid register list at operand 2 -- `tbl z0\.h,{z0\.b,z0\.b},z0\.b'
-[^ :]+:[0-9]+: Error: operand mismatch -- `tbl z0\.h,{z0\.b,z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: type mismatch in vector register list at operand 2 -- `tbl z0\.b,{ ?z0\.b,z1\.h ?},z0\.b'
+[^ :]+:[0-9]+: Error: type mismatch in vector register list at operand 2 -- `tbl z0\.b,{ ?z0\.h,z0\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: invalid register list at operand 2 -- `tbl z0\.h,{ ?z0\.b,z0\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: operand mismatch -- `tbl z0\.h,{ ?z0\.b,z1\.b ?},z0\.b'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	tbl z0\.b, {z0\.b-z1\.b}, z0\.b
 [^ :]+:[0-9]+: Info:    other valid variant\(s\):
diff --git a/gas/testsuite/gas/aarch64/illegal.l b/gas/testsuite/gas/aarch64/illegal.l
index ae9bb93..5030210 100644
--- a/gas/testsuite/gas/aarch64/illegal.l
+++ b/gas/testsuite/gas/aarch64/illegal.l
@@ -35,9 +35,9 @@
 [^:]*:64: Error: .*`pmull2 v7.8h,v15.8b,v31.8b'
 [^:]*:65: Error: .*`pmull2 v7.1q,v15.2d,v31.1q'
 [^:]*:67: Error: .*`ld2 {v1.4h,v0.4h},\[x1\]'
-[^:]*:68: Error: .*`strb x0,\[sp,x1,lsl#0\]'
+[^:]*:68: Error: .*`strb x0,\[sp,x1,lsl ?#0\]'
 [^:]*:69: Error: .*`strb w7,\[x30,x0,lsl\]'
-[^:]*:70: Error: .*`strb w7,\[x30,x0,lsl#1\]'
+[^:]*:70: Error: .*`strb w7,\[x30,x0,lsl ?#1\]'
 [^:]*:71: Error: .*`ldtr x7,\[x15,266\]'
 [^:]*:72: Error: .*`sttr x7,\[x15,#1\]!'
 [^:]*:73: Error: .*`stxrb x2,w1,\[sp\]'
@@ -123,7 +123,7 @@
 [^:]*:176: Error: .*`prfm 0x2f,LABEL1'
 [^:]*:177: Error: .*`prfm pldl3strm,\[sp,#8\]!'
 [^:]*:178: Error: .*`prfm pldl3strm,\[sp\],#8'
-[^:]*:179: Error: .*`prfm pldl3strm,\[sp,w0,sxtw#3\]!'
+[^:]*:179: Error: .*`prfm pldl3strm,\[sp,w0,sxtw ?#3\]!'
 [^:]*:180: Error: .*`prfm pldl3strm,=0x100'
 [^:]*:182: Error: .*`sttr x0,LABEL1'
 [^:]*:183: Error: .*`sttr x0,\[sp,#16\]!'
@@ -142,22 +142,22 @@
 [^:]*:199: Error: .*`sys #0,c0,c0,0,w0'
 [^:]*:200: Error: .*`msr spsel,#16'
 [^:]*:201: Error: .*`msr cptr_el2,#15'
-[^:]*:203: Error: .*`movz x1,#:abs_g2:u48,lsl#16'
-[^:]*:204: Error: .*`movz x1,0xddee,lsl#8'
+[^:]*:203: Error: .*`movz x1,#:abs_g2:u48,lsl ?#16'
+[^:]*:204: Error: .*`movz x1,0xddee,lsl ?#8'
 [^:]*:205: Error: .*`movz w1,#:abs_g2:u48'
 [^:]*:206: Error: .*`movz w1,#:abs_g3:u48'
 [^:]*:207: Error: .*`movk x1,#:abs_g1_s:s12'
 [^:]*:209: Error: .*`movi v0.4s,#256'
 [^:]*:210: Error: .*`movi v0.2d,#0xabcdef'
-[^:]*:212: Error: .*`bic v0.4s,#255,msl#8'
+[^:]*:212: Error: .*`bic v0.4s,#255,msl ?#8'
 [^:]*:213: Error: .*`bic v0.4s,#512'
-[^:]*:214: Error: .*`bic v0.4s,#1,lsl#31'
-[^:]*:217: Error: .*`orr v0.4s,#255,msl#8'
+[^:]*:214: Error: .*`bic v0.4s,#1,lsl ?#31'
+[^:]*:217: Error: .*`orr v0.4s,#255,msl ?#8'
 [^:]*:218: Error: .*`orr v0.4s,#512'
-[^:]*:220: Error: .*`movi v0.4s,#127,lsl#4'
-[^:]*:221: Error: .*`movi v0.4s,#127,msl#24'
-[^:]*:224: Error: .*`mvni v0.4s,#127,lsl#4'
-[^:]*:225: Error: .*`mvni v0.4s,#127,msl#24'
+[^:]*:220: Error: .*`movi v0.4s,#127,lsl ?#4'
+[^:]*:221: Error: .*`movi v0.4s,#127,msl ?#24'
+[^:]*:224: Error: .*`mvni v0.4s,#127,lsl ?#4'
+[^:]*:225: Error: .*`mvni v0.4s,#127,msl ?#24'
 [^:]*:228: Error: .*`fmov v0.2s,#3.1415926'
 [^:]*:229: Error: .*`fmov v0.4s,#3.1415926'
 [^:]*:230: Error: .*`fmov v0.2d,#3.1415926'
@@ -802,12 +802,12 @@
 [^:]*:467: Error: .*`fcvtzu x1,d0,65'
 [^:]*:468: Error: .*`fcvtzu x1,s0,65'
 [^:]*:472: Error: .*
-[^:]*:475: Error: .*`ldrh w0,\[x1,x2,lsr#1\]'
-[^:]*:477: Error: .*`add w0,w1,w2,ror#1'
-[^:]*:478: Error: .*`sub w0,w1,w2,asr#32'
-[^:]*:479: Error: .*`eor w0,w1,w2,ror#32'
-[^:]*:481: Error: .*`add x0,x1,#20,LSL#16'
-[^:]*:482: Error: .*`add x0,x1,#20,UXTX#12'
+[^:]*:475: Error: .*`ldrh w0,\[x1,x2,lsr ?#1\]'
+[^:]*:477: Error: .*`add w0,w1,w2,ror ?#1'
+[^:]*:478: Error: .*`sub w0,w1,w2,asr ?#32'
+[^:]*:479: Error: .*`eor w0,w1,w2,ror ?#32'
+[^:]*:481: Error: .*`add x0,x1,#20,LSL ?#16'
+[^:]*:482: Error: .*`add x0,x1,#20,UXTX ?#12'
 [^:]*:483: Error: .*`add x0,x1,#20,LSR'
 [^:]*:484: Error: .*`add x0,x1,#20,LSL'
 [^:]*:486: Error: .*`ldnp h7,h15,\[x0,#2\]'
@@ -818,7 +818,7 @@
 [^:]*:493: Error: .*`bfxil w7,w15,#15,#30'
 [^:]*:494: Error: .*`bfi x3,x7,#31,#48'
 [^:]*:496: Error: .*`str x1,page_table_count'
-[^:]*:498: Error: .*`prfm PLDL3KEEP,\[x9,x15,sxtx#2\]'
+[^:]*:498: Error: .*`prfm PLDL3KEEP,\[x9,x15,sxtx ?#2\]'
 [^:]*:500: Error: .*`mrs x5,S1_0_C17_C8_0'
 [^:]*:502: Error: .*`msr S3_1_C11_C15_-1,x7'
 [^:]*:503: Error: .*`msr S3_1_11_15_1,x7'
@@ -836,15 +836,15 @@
 [^:]*:520: Error: .*`mov x0,v0.h\[0\]'
 [^:]*:521: Error: .*`mov x0,v0.s\[0\]'
 [^:]*:523: Error: .*`uabdl2 v20\.4S,v12\.8H,v29\.8'
-[^:]*:525: Error: .*`movi d1,0xffff,lsl#16'
+[^:]*:525: Error: .*`movi d1,0xffff,lsl ?#16'
 [^:]*:527: Error: .*`st3 {v18.D-v20.D}\[0\],\[x28\],x'
 [^:]*:528: Error: .*`st1 {v7.B}\[2\],\[x4\],x'
 [^:]*:529: Error: .*`st1 {v22.1D-v25.1D},\[x10\],x'
 [^:]*:531: Error: .*`ldr w0,\[x0\]!'
 [^:]*:532: Error: .*`ldr w0,\[x0\],\{127\}'
-[^:]*:534: Error: .*`orr x0,x0,#0xff,lsl#1'
-[^:]*:535: Error: .*`orr x0. x0,#0xff,lsl#1'
-[^:]*:536: Error: .*`orr x0,x0,#0xff lsl#1'
+[^:]*:534: Error: .*`orr x0,x0,#0xff,lsl ?#1'
+[^:]*:535: Error: .*`orr x0. x0,#0xff,lsl ?#1'
+[^:]*:536: Error: .*`orr x0,x0,#0xff lsl ?#1'
 [^:]*:538: Error: .*`mov x0,##5'
 [^:]*:540: Error: .*`msr daifset,x0'
 [^:]*:541: Error: .*`msr daifclr,x0'
@@ -879,8 +879,8 @@
 [^:]*:593: Error: .*`st2 {v0\.16b-v1\.16b}\[1\],\[x0\]'
 [^:]*:594: Error: .*`st3 {v0\.16b-v2\.16b}\[2\],\[x0\]'
 [^:]*:595: Error: .*`st4 {v0\.8b-v3\.8b}\[4\],\[x0\]'
-[^:]*:597: Error: the register-index form of PRFM does not accept opcodes in the range 24-31 at operand 1 -- `prfm #0x18,\[sp,x15,lsl#0\]'
-[^:]*:598: Error: the register-index form of PRFM does not accept opcodes in the range 24-31 at operand 1 -- `prfm #0x1f,\[sp,x15,lsl#0\]'
-[^:]*:599: Error: immediate value out of range 0 to 31 at operand 1 -- `prfm #0x20,\[sp,x15,lsl#0\]'
+[^:]*:597: Error: the register-index form of PRFM does not accept opcodes in the range 24-31 at operand 1 -- `prfm #0x18,\[sp,x15,lsl ?#0\]'
+[^:]*:598: Error: the register-index form of PRFM does not accept opcodes in the range 24-31 at operand 1 -- `prfm #0x1f,\[sp,x15,lsl ?#0\]'
+[^:]*:599: Error: immediate value out of range 0 to 31 at operand 1 -- `prfm #0x20,\[sp,x15,lsl ?#0\]'
 [^:]*:600: Error: immediate value out of range 0 to 31 at operand 1 -- `prfm #0x20,FOO'
 [^:]*:602: Error: .*
diff --git a/gas/testsuite/gas/aarch64/rcpc3-fp-fail.l b/gas/testsuite/gas/aarch64/rcpc3-fp-fail.l
index 20c08f8..0d40b29 100644
--- a/gas/testsuite/gas/aarch64/rcpc3-fp-fail.l
+++ b/gas/testsuite/gas/aarch64/rcpc3-fp-fail.l
@@ -1,8 +1,8 @@
 [^:]+: Assembler messages:
-[^:]+:3: Error: register element index out of range 0 to 1 at operand 1 -- `stl1 {v1.d}\[-1\],\[x1\]'
-[^:]+:6: Error: register element index out of range 0 to 1 at operand 1 -- `stl1 {v1.d}\[2\],\[x1\]'
-[^:]+:8: Error: register element index out of range 0 to 1 at operand 1 -- `ldap1 {v2.d}\[-1\],\[sp\]'
-[^:]+:11: Error: register element index out of range 0 to 1 at operand 1 -- `ldap1 {v2.d}\[2\],\[sp\]'
+[^:]+:3: Error: register element index out of range 0 to 1 at operand 1 -- `stl1 { ?v1.d ?}\[-1\],\[x1\]'
+[^:]+:6: Error: register element index out of range 0 to 1 at operand 1 -- `stl1 { ?v1.d ?}\[2\],\[x1\]'
+[^:]+:8: Error: register element index out of range 0 to 1 at operand 1 -- `ldap1 { ?v2.d ?}\[-1\],\[sp\]'
+[^:]+:11: Error: register element index out of range 0 to 1 at operand 1 -- `ldap1 { ?v2.d ?}\[2\],\[sp\]'
 [^:]+:13: Error: immediate value out of range -256 to 255 at operand 2 -- `ldapur b1,\[x1,#-257\]'
 [^:]+:16: Error: immediate value out of range -256 to 255 at operand 2 -- `ldapur b1,\[x1,#256\]'
 [^:]+:18: Error: immediate value out of range -256 to 255 at operand 2 -- `stlur q1,\[x1,#-257\]'
diff --git a/gas/testsuite/gas/aarch64/reglist-2.l b/gas/testsuite/gas/aarch64/reglist-2.l
index 9d7dfbe..8bf23c7 100644
--- a/gas/testsuite/gas/aarch64/reglist-2.l
+++ b/gas/testsuite/gas/aarch64/reglist-2.l
@@ -1,8 +1,8 @@
 [^ :]+: Assembler messages:
-[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 1 -- `ld1 {v1\.2d-v0\.2d},\[x0\]'
-[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 1 -- `ld1 {v31\.2d-v3\.2d},\[x0\]'
-[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 1 -- `ld1 {v30\.2d-v2\.2d},\[x0\]'
-[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 1 -- `ld1 {v29\.2d-v1\.2d},\[x0\]'
-[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 1 -- `ld1 {v31\.2d-v30\.2d},\[x0\]'
-[^ :]+:[0-9]+: Error: invalid range in vector register list at operand 1 -- `ld1 {v0\.2d-v0\.2d},\[x0\]'
-[^ :]+:[0-9]+: Error: invalid range in vector register list at operand 1 -- `ld1 {v31\.2d-v31\.2d},\[x0\]'
+[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 1 -- `ld1 { ?v1\.2d ?- ?v0\.2d ?},\[x0\]'
+[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 1 -- `ld1 { ?v31\.2d ?- ?v3\.2d ?},\[x0\]'
+[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 1 -- `ld1 { ?v30\.2d ?- ?v2\.2d ?},\[x0\]'
+[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 1 -- `ld1 { ?v29\.2d ?- ?v1\.2d ?},\[x0\]'
+[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 1 -- `ld1 { ?v31\.2d ?- ?v30\.2d ?},\[x0\]'
+[^ :]+:[0-9]+: Error: invalid range in vector register list at operand 1 -- `ld1 { ?v0\.2d ?- ?v0\.2d ?},\[x0\]'
+[^ :]+:[0-9]+: Error: invalid range in vector register list at operand 1 -- `ld1 { ?v31\.2d ?- ?v31\.2d ?},\[x0\]'
diff --git a/gas/testsuite/gas/aarch64/sme-4-illegal.l b/gas/testsuite/gas/aarch64/sme-4-illegal.l
index db52529..26cd74f 100644
--- a/gas/testsuite/gas/aarch64/sme-4-illegal.l
+++ b/gas/testsuite/gas/aarch64/sme-4-illegal.l
@@ -1,41 +1,41 @@
 [^:]*: Assembler messages:
 [^:]*:[0-9]+: Error: expected '\[' at operand 1 -- `zero za'
-[^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `zero {za8\.d}'
-[^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `zero {za0\.d,za8.d}'
-[^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `zero {za2\.h}'
-[^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `zero {za4\.s}'
-[^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `zero {za1\.s,za4.s}'
-[^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `zero {za0\.d,za3.s,za2.h}'
-[^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `zero {za1.b}'
-[^:]*:[0-9]+: Error: unexpected comma after the mnemonic name `zero' -- `zero ,'
+[^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `zero { ?za8\.d ?}'
+[^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `zero { ?za0\.d,za8.d ?}'
+[^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `zero { ?za2\.h ?}'
+[^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `zero { ?za4\.s ?}'
+[^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `zero { ?za1\.s,za4.s ?}'
+[^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `zero { ?za0\.d,za3.s,za2.h ?}'
+[^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `zero { ?za1.b ?}'
+[^:]*:[0-9]+: Error: unexpected comma after the mnemonic name `zero' -- `zero ?,'
 [^:]*:[0-9]+: Error: syntax error in register list at operand 1 -- `zero {'
 [^:]*:[0-9]+: Error: syntax error in register list at operand 1 -- `zero {,'
 [^:]*:[0-9]+: Error: expected '{' at operand 1 -- `zero }'
 [^:]*:[0-9]+: Error: syntax error in register list at operand 1 -- `zero {,}'
 [^:]*:[0-9]+: Error: syntax error in register list at operand 1 -- `zero {,,}'
-[^:]*:[0-9]+: Error: missing ZA tile size at operand 1 -- `zero {za0}'
-[^:]*:[0-9]+: Error: syntax error in register list at operand 1 -- `zero {,za0.d}'
-[^:]*:[0-9]+: Error: syntax error in register list at operand 1 -- `zero {za0.d,}'
-[^:]*:[0-9]+: Error: operand 1 must be a list of 64-bit ZA element tiles -- `zero {za0.d,z1.d}'
-[^:]*:[0-9]+: Error: operand 1 must be a list of 64-bit ZA element tiles -- `zero {za0.d,za32.d}'
-[^:]*:[0-9]+: Error: syntax error in register list at operand 1 -- `zero {za0.d,za1.d,}'
-[^:]*:[0-9]+: Error: syntax error in register list at operand 1 -- `zero {za,}'
-[^:]*:[0-9]+: Error: unexpected character `}' in element size at operand 1 -- `zero {za.}'
-[^:]*:[0-9]+: Error: expected '}' at operand 1 -- `zero {za-}'
-[^:]*:[0-9]+: Error: expected ZT0 or a ZA mask at operand 1 -- `zero {za_}'
-[^:]*:[0-9]+: Error: expected '}' at operand 1 -- `zero {za#}'
-[^:]*:[0-9]+: Error: expected ZT0 or a ZA mask at operand 1 -- `zero {zaX}'
-[^:]*:[0-9]+: Error: missing ZA tile size at operand 1 -- `zero {za0}'
-[^:]*:[0-9]+: Error: expected ZT0 or a ZA mask at operand 1 -- `zero {zax}'
-[^:]*:[0-9]+: Error: expected '}' at operand 1 -- `zero {za{}'
-[^:]*:[0-9]+: Error: unexpected characters following instruction at operand 1 -- `zero {za}}'
-[^:]*:[0-9]+: Error: ZA tile masks do not operate at .Q granularity at operand 1 -- `zero {za0\.q}'
-[^:]*:[0-9]+: Error: ZA should not have a size suffix at operand 1 -- `zero {za\.b}'
-[^:]*:[0-9]+: Error: ZA should not have a size suffix at operand 1 -- `zero {za\.h}'
-[^:]*:[0-9]+: Error: ZA should not have a size suffix at operand 1 -- `zero {za\.s}'
-[^:]*:[0-9]+: Error: ZA should not have a size suffix at operand 1 -- `zero {za\.d}'
-[^:]*:[0-9]+: Error: ZA should not have a size suffix at operand 1 -- `zero {za\.q}'
-[^:]*:[0-9]+: Error: unexpected character `2' in element size at operand 1 -- `zero {za.2d}'
-[^:]*:[0-9]+: Error: unexpected character `2' in element size at operand 1 -- `zero {za0.2d}'
-[^:]*:[0-9]+: Error: expected an unsuffixed ZA tile at operand 1 -- `zero {za0h\.b}'
-[^:]*:[0-9]+: Error: expected an unsuffixed ZA tile at operand 1 -- `zero {za0v\.b}'
+[^:]*:[0-9]+: Error: missing ZA tile size at operand 1 -- `zero { ?za0 ?}'
+[^:]*:[0-9]+: Error: syntax error in register list at operand 1 -- `zero {,za0.d ?}'
+[^:]*:[0-9]+: Error: syntax error in register list at operand 1 -- `zero { ?za0.d,}'
+[^:]*:[0-9]+: Error: operand 1 must be a list of 64-bit ZA element tiles -- `zero { ?za0.d,z1.d ?}'
+[^:]*:[0-9]+: Error: operand 1 must be a list of 64-bit ZA element tiles -- `zero { ?za0.d,za32.d ?}'
+[^:]*:[0-9]+: Error: syntax error in register list at operand 1 -- `zero { ?za0.d,za1.d,}'
+[^:]*:[0-9]+: Error: syntax error in register list at operand 1 -- `zero { ?za,}'
+[^:]*:[0-9]+: Error: unexpected character `.*' in element size at operand 1 -- `zero { ?za. ?}'
+[^:]*:[0-9]+: Error: expected '}' at operand 1 -- `zero { ?za- ?}'
+[^:]*:[0-9]+: Error: expected ZT0 or a ZA mask at operand 1 -- `zero { ?za_ ?}'
+[^:]*:[0-9]+: Error: expected '}' at operand 1 -- `zero { ?za# ?}'
+[^:]*:[0-9]+: Error: expected ZT0 or a ZA mask at operand 1 -- `zero { ?zaX ?}'
+[^:]*:[0-9]+: Error: missing ZA tile size at operand 1 -- `zero { ?za0 ?}'
+[^:]*:[0-9]+: Error: expected ZT0 or a ZA mask at operand 1 -- `zero { ?zax ?}'
+[^:]*:[0-9]+: Error: expected '}' at operand 1 -- `zero { ?za{ ?}'
+[^:]*:[0-9]+: Error: unexpected characters following instruction at operand 1 -- `zero { ?za} ?}'
+[^:]*:[0-9]+: Error: ZA tile masks do not operate at .Q granularity at operand 1 -- `zero { ?za0\.q ?}'
+[^:]*:[0-9]+: Error: ZA should not have a size suffix at operand 1 -- `zero { ?za\.b ?}'
+[^:]*:[0-9]+: Error: ZA should not have a size suffix at operand 1 -- `zero { ?za\.h ?}'
+[^:]*:[0-9]+: Error: ZA should not have a size suffix at operand 1 -- `zero { ?za\.s ?}'
+[^:]*:[0-9]+: Error: ZA should not have a size suffix at operand 1 -- `zero { ?za\.d ?}'
+[^:]*:[0-9]+: Error: ZA should not have a size suffix at operand 1 -- `zero { ?za\.q ?}'
+[^:]*:[0-9]+: Error: unexpected character `2' in element size at operand 1 -- `zero { ?za.2d ?}'
+[^:]*:[0-9]+: Error: unexpected character `2' in element size at operand 1 -- `zero { ?za0.2d ?}'
+[^:]*:[0-9]+: Error: expected an unsuffixed ZA tile at operand 1 -- `zero { ?za0h\.b ?}'
+[^:]*:[0-9]+: Error: expected an unsuffixed ZA tile at operand 1 -- `zero { ?za0v\.b ?}'
diff --git a/gas/testsuite/gas/aarch64/sme-5-illegal.l b/gas/testsuite/gas/aarch64/sme-5-illegal.l
index b0736e0..a289c05 100644
--- a/gas/testsuite/gas/aarch64/sme-5-illegal.l
+++ b/gas/testsuite/gas/aarch64/sme-5-illegal.l
@@ -1,10 +1,10 @@
 [^:]*: Assembler messages:
 [^:]*:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 1 -- `ld1b {za0h.b\[w11,0\]},p0/z,\[x0\]'
 [^:]*:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 1 -- `ld1h {za0h.h\[w16,0\]},p0/z,\[x0\]'
-[^:]*:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1h {za0v.h\[w12,0\]},p0/z,\[x0,x0,lsl#3\]'
-[^:]*:[0-9]+: Error: '\]' expected at operand 3 -- `ld1w {za3v.s\[w15,3\]},p7/z,\[sp,lsl#2\]'
-[^:]*:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1d {za0h.d\[w12,0\]},p0/z,\[sp,x0,lsl#12\]'
-[^:]*:[0-9]+: Error: missing immediate offset at operand 1 -- `ld1q {za0v.q\[w12\]},p0/z,\[x0,x0,lsl#2\]'
+[^:]*:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1h {za0v.h\[w12,0\]},p0/z,\[x0,x0,lsl ?#3\]'
+[^:]*:[0-9]+: Error: '\]' expected at operand 3 -- `ld1w {za3v.s\[w15,3\]},p7/z,\[sp,lsl ?#2\]'
+[^:]*:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1d {za0h.d\[w12,0\]},p0/z,\[sp,x0,lsl ?#12\]'
+[^:]*:[0-9]+: Error: missing immediate offset at operand 1 -- `ld1q {za0v.q\[w12\]},p0/z,\[x0,x0,lsl ?#2\]'
 [^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `ld1b {za1h.b\[w12,0\]},p0/z,\[x0\]'
 [^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `ld1b {za1v.b\[w12,0\]},p0/z,\[sp\]'
 [^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `ld1b {za1h.b\[w12,0\]},p0/z,\[sp,x0\]'
@@ -13,42 +13,42 @@
 [^:]*:[0-9]+: Error: immediate offset out of range 0 to 15 at operand 1 -- `ld1b {za0v.b\[w15,16\]},p7/z,\[sp,x17\]'
 [^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `ld1h {za2v.h\[w12,0\]},p0/z,\[x0\]'
 [^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `ld1h {za2h.h\[w12,0\]},p0/z,\[sp\]'
-[^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `ld1h {za2v.h\[w12,0\]},p0/z,\[x0,x0,lsl#1\]'
-[^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `ld1h {za2h.h\[w12,0\]},p0/z,\[sp,x0,lsl#1\]'
+[^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `ld1h {za2v.h\[w12,0\]},p0/z,\[x0,x0,lsl ?#1\]'
+[^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `ld1h {za2h.h\[w12,0\]},p0/z,\[sp,x0,lsl ?#1\]'
 [^:]*:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `ld1h {za1v.h\[w15,8\]},p7/z,\[x17\]'
 [^:]*:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `ld1h {za1h.h\[w15,8\]},p7/z,\[sp\]'
-[^:]*:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `ld1h {za1v.h\[w15,8\]},p7/z,\[x0,x17,lsl#1\]'
-[^:]*:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `ld1h {za1h.h\[w15,8\]},p7/z,\[sp,x17,lsl#1\]'
+[^:]*:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `ld1h {za1v.h\[w15,8\]},p7/z,\[x0,x17,lsl ?#1\]'
+[^:]*:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `ld1h {za1h.h\[w15,8\]},p7/z,\[sp,x17,lsl ?#1\]'
 [^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `ld1w {za4h.s\[w12,0\]},p0/z,\[x0\]'
 [^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `ld1w {za4v.s\[w12,0\]},p0/z,\[sp\]'
-[^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `ld1w {za4h.s\[w12,0\]},p0/z,\[x0,x0,lsl#2\]'
-[^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `ld1w {za4v.s\[w12,0\]},p0/z,\[sp,x0,lsl#2\]'
+[^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `ld1w {za4h.s\[w12,0\]},p0/z,\[x0,x0,lsl ?#2\]'
+[^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `ld1w {za4v.s\[w12,0\]},p0/z,\[sp,x0,lsl ?#2\]'
 [^:]*:[0-9]+: Error: immediate offset out of range 0 to 3 at operand 1 -- `ld1w {za3h.s\[w15,4\]},p7/z,\[x17\]'
 [^:]*:[0-9]+: Error: immediate offset out of range 0 to 3 at operand 1 -- `ld1w {za3v.s\[w15,4\]},p7/z,\[sp\]'
-[^:]*:[0-9]+: Error: immediate offset out of range 0 to 3 at operand 1 -- `ld1w {za3h.s\[w15,4\]},p7/z,\[x0,x17,lsl#2\]'
-[^:]*:[0-9]+: Error: immediate offset out of range 0 to 3 at operand 1 -- `ld1w {za3v.s\[w15,4\]},p7/z,\[sp,x17,lsl#2\]'
+[^:]*:[0-9]+: Error: immediate offset out of range 0 to 3 at operand 1 -- `ld1w {za3h.s\[w15,4\]},p7/z,\[x0,x17,lsl ?#2\]'
+[^:]*:[0-9]+: Error: immediate offset out of range 0 to 3 at operand 1 -- `ld1w {za3v.s\[w15,4\]},p7/z,\[sp,x17,lsl ?#2\]'
 [^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `ld1d {za8v.d\[w12,0\]},p0/z,\[x0\]'
 [^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `ld1d {za8h.d\[w12,0\]},p0/z,\[sp\]'
-[^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `ld1d {za8v.d\[w12,0\]},p0/z,\[x0,x0,lsl#3\]'
-[^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `ld1d {za8h.d\[w12,0\]},p0/z,\[sp,x0,lsl#3\]'
+[^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `ld1d {za8v.d\[w12,0\]},p0/z,\[x0,x0,lsl ?#3\]'
+[^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `ld1d {za8h.d\[w12,0\]},p0/z,\[sp,x0,lsl ?#3\]'
 [^:]*:[0-9]+: Error: immediate offset out of range 0 to 1 at operand 1 -- `ld1d {za7v.d\[w15,2\]},p7/z,\[x17\]'
 [^:]*:[0-9]+: Error: immediate offset out of range 0 to 1 at operand 1 -- `ld1d {za7h.d\[w15,2\]},p7/z,\[sp\]'
-[^:]*:[0-9]+: Error: immediate offset out of range 0 to 1 at operand 1 -- `ld1d {za7v.d\[w15,2\]},p7/z,\[x0,x17,lsl#3\]'
-[^:]*:[0-9]+: Error: immediate offset out of range 0 to 1 at operand 1 -- `ld1d {za7h.d\[w15,2\]},p7/z,\[sp,x17,lsl#3\]'
+[^:]*:[0-9]+: Error: immediate offset out of range 0 to 1 at operand 1 -- `ld1d {za7v.d\[w15,2\]},p7/z,\[x0,x17,lsl ?#3\]'
+[^:]*:[0-9]+: Error: immediate offset out of range 0 to 1 at operand 1 -- `ld1d {za7h.d\[w15,2\]},p7/z,\[sp,x17,lsl ?#3\]'
 [^:]*:[0-9]+: Error: expected an SVE vector register or ZA tile slice at operand 1 -- `ld1q {za16v.q\[w12\]},p0/z,\[x0\]'
 [^:]*:[0-9]+: Error: expected an SVE vector register or ZA tile slice at operand 1 -- `ld1q {za16h.q\[w12\]},p0/z,\[sp\]'
-[^:]*:[0-9]+: Error: expected an SVE vector register or ZA tile slice at operand 1 -- `ld1q {za16v.q\[w12\]},p0/z,\[x0,x0,lsl#4\]'
-[^:]*:[0-9]+: Error: expected an SVE vector register or ZA tile slice at operand 1 -- `ld1q {za16h.q\[w12\]},p0/z,\[sp,x0,lsl#4\]'
+[^:]*:[0-9]+: Error: expected an SVE vector register or ZA tile slice at operand 1 -- `ld1q {za16v.q\[w12\]},p0/z,\[x0,x0,lsl ?#4\]'
+[^:]*:[0-9]+: Error: expected an SVE vector register or ZA tile slice at operand 1 -- `ld1q {za16h.q\[w12\]},p0/z,\[sp,x0,lsl ?#4\]'
 [^:]*:[0-9]+: Error: immediate offset must be 0 at operand 1 -- `ld1q {za15v.q\[w15,1\]},p7/z,\[x17\]'
 [^:]*:[0-9]+: Error: immediate offset must be 0 at operand 1 -- `ld1q {za15h.q\[w15,1\]},p7/z,\[sp\]'
-[^:]*:[0-9]+: Error: immediate offset must be 0 at operand 1 -- `ld1q {za15v.q\[w15,1\]},p7/z,\[x0,x17,lsl#4\]'
-[^:]*:[0-9]+: Error: immediate offset must be 0 at operand 1 -- `ld1q {za15h.q\[w15,1\]},p7/z,\[sp,x17,lsl#4\]'
-[^:]*:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b {za0h.b\[w12,0\]},p0/z,\[x0,x1,lsl#1\]'
-[^:]*:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1h {za0h.h\[w12,0\]},p0/z,\[x0,x1,lsl#2\]'
-[^:]*:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1w {za3v.s\[w12,3\]},p7/z,\[x0,x1,lsl#3\]'
-[^:]*:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1d {za0h.d\[w12,0\]},p0/z,\[x0,x1,lsl#4\]'
-[^:]*:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1q {za0v.q\[w12,0\]},p0/z,\[x0,x1,lsl#1\]'
-[^:]*:[0-9]+: Error: missing immediate offset at operand 1 -- `ld1q {za0v.q\[w12\]},p0/z,\[x0,x1,lsl#1\]'
+[^:]*:[0-9]+: Error: immediate offset must be 0 at operand 1 -- `ld1q {za15v.q\[w15,1\]},p7/z,\[x0,x17,lsl ?#4\]'
+[^:]*:[0-9]+: Error: immediate offset must be 0 at operand 1 -- `ld1q {za15h.q\[w15,1\]},p7/z,\[sp,x17,lsl ?#4\]'
+[^:]*:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b {za0h.b\[w12,0\]},p0/z,\[x0,x1,lsl ?#1\]'
+[^:]*:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1h {za0h.h\[w12,0\]},p0/z,\[x0,x1,lsl ?#2\]'
+[^:]*:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1w {za3v.s\[w12,3\]},p7/z,\[x0,x1,lsl ?#3\]'
+[^:]*:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1d {za0h.d\[w12,0\]},p0/z,\[x0,x1,lsl ?#4\]'
+[^:]*:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1q {za0v.q\[w12,0\]},p0/z,\[x0,x1,lsl ?#1\]'
+[^:]*:[0-9]+: Error: missing immediate offset at operand 1 -- `ld1q {za0v.q\[w12\]},p0/z,\[x0,x1,lsl ?#1\]'
 [^:]*:[0-9]+: Error: missing horizontal or vertical suffix at operand 1 -- `ld1b {za0.b\[w12,0\]},p0/z,\[x0\]'
 [^:]*:[0-9]+: Error: expected an SVE vector register or ZA tile slice at operand 1 -- `ld1b {za.b\[w12,0\]},p0/z,\[x0\]'
 [^:]*:[0-9]+: Error: missing braces at operand 1 -- `ld1b za0h.b\[w12,0\],p0/z,\[x0\]'
diff --git a/gas/testsuite/gas/aarch64/sme-6-illegal.l b/gas/testsuite/gas/aarch64/sme-6-illegal.l
index 10c2a51..7301ddd 100644
--- a/gas/testsuite/gas/aarch64/sme-6-illegal.l
+++ b/gas/testsuite/gas/aarch64/sme-6-illegal.l
@@ -1,10 +1,10 @@
 [^:]*: Assembler messages:
 [^:]*:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 1 -- `st1b {za0h.b\[w11,0\]},p0,\[x0\]'
 [^:]*:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 1 -- `st1h {za0h.h\[w16,0\]},p0,\[x0\]'
-[^:]*:[0-9]+: Error: invalid addressing mode at operand 3 -- `st1h {za0v.h\[w12,0\]},p0,\[x0,x0,lsl#3\]'
-[^:]*:[0-9]+: Error: '\]' expected at operand 3 -- `st1w {za3v.s\[w15,3\]},p7,\[sp,lsl#2\]'
-[^:]*:[0-9]+: Error: invalid addressing mode at operand 3 -- `st1d {za0h.d\[w12,0\]},p0,\[sp,x0,lsl#12\]'
-[^:]*:[0-9]+: Error: missing immediate offset at operand 1 -- `st1q {za0v.q\[w12\]},p0,\[x0,x0,lsl#2\]'
+[^:]*:[0-9]+: Error: invalid addressing mode at operand 3 -- `st1h {za0v.h\[w12,0\]},p0,\[x0,x0,lsl ?#3\]'
+[^:]*:[0-9]+: Error: '\]' expected at operand 3 -- `st1w {za3v.s\[w15,3\]},p7,\[sp,lsl ?#2\]'
+[^:]*:[0-9]+: Error: invalid addressing mode at operand 3 -- `st1d {za0h.d\[w12,0\]},p0,\[sp,x0,lsl ?#12\]'
+[^:]*:[0-9]+: Error: missing immediate offset at operand 1 -- `st1q {za0v.q\[w12\]},p0,\[x0,x0,lsl ?#2\]'
 [^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `st1b {za1h.b\[w12,0\]},p0,\[x0\]'
 [^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `st1b {za1v.b\[w12,0\]},p0,\[sp\]'
 [^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `st1b {za1h.b\[w12,0\]},p0,\[sp,x0\]'
@@ -13,36 +13,36 @@
 [^:]*:[0-9]+: Error: immediate offset out of range 0 to 15 at operand 1 -- `st1b {za0v.b\[w15,16\]},p7,\[sp,x17\]'
 [^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `st1h {za2v.h\[w12,0\]},p0,\[x0\]'
 [^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `st1h {za2h.h\[w12,0\]},p0,\[sp\]'
-[^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `st1h {za2v.h\[w12,0\]},p0,\[x0,x0,lsl#1\]'
-[^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `st1h {za2h.h\[w12,0\]},p0,\[sp,x0,lsl#1\]'
+[^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `st1h {za2v.h\[w12,0\]},p0,\[x0,x0,lsl ?#1\]'
+[^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `st1h {za2h.h\[w12,0\]},p0,\[sp,x0,lsl ?#1\]'
 [^:]*:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `st1h {za1v.h\[w15,8\]},p7,\[x17\]'
 [^:]*:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `st1h {za1h.h\[w15,8\]},p7,\[sp\]'
-[^:]*:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `st1h {za1v.h\[w15,8\]},p7,\[x0,x17,lsl#1\]'
-[^:]*:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `st1h {za1h.h\[w15,8\]},p7,\[sp,x17,lsl#1\]'
+[^:]*:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `st1h {za1v.h\[w15,8\]},p7,\[x0,x17,lsl ?#1\]'
+[^:]*:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `st1h {za1h.h\[w15,8\]},p7,\[sp,x17,lsl ?#1\]'
 [^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `st1w {za4h.s\[w12,0\]},p0,\[x0\]'
 [^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `st1w {za4v.s\[w12,0\]},p0,\[sp\]'
-[^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `st1w {za4h.s\[w12,0\]},p0,\[x0,x0,lsl#2\]'
-[^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `st1w {za4v.s\[w12,0\]},p0,\[sp,x0,lsl#2\]'
+[^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `st1w {za4h.s\[w12,0\]},p0,\[x0,x0,lsl ?#2\]'
+[^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `st1w {za4v.s\[w12,0\]},p0,\[sp,x0,lsl ?#2\]'
 [^:]*:[0-9]+: Error: immediate offset out of range 0 to 3 at operand 1 -- `st1w {za3h.s\[w15,4\]},p7,\[x17\]'
 [^:]*:[0-9]+: Error: immediate offset out of range 0 to 3 at operand 1 -- `st1w {za3v.s\[w15,4\]},p7,\[sp\]'
-[^:]*:[0-9]+: Error: immediate offset out of range 0 to 3 at operand 1 -- `st1w {za3h.s\[w15,4\]},p7,\[x0,x17,lsl#2\]'
-[^:]*:[0-9]+: Error: immediate offset out of range 0 to 3 at operand 1 -- `st1w {za3v.s\[w15,4\]},p7,\[sp,x17,lsl#2\]'
+[^:]*:[0-9]+: Error: immediate offset out of range 0 to 3 at operand 1 -- `st1w {za3h.s\[w15,4\]},p7,\[x0,x17,lsl ?#2\]'
+[^:]*:[0-9]+: Error: immediate offset out of range 0 to 3 at operand 1 -- `st1w {za3v.s\[w15,4\]},p7,\[sp,x17,lsl ?#2\]'
 [^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `st1d {za8v.d\[w12,0\]},p0,\[x0\]'
 [^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `st1d {za8h.d\[w12,0\]},p0,\[sp\]'
-[^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `st1d {za8v.d\[w12,0\]},p0,\[x0,x0,lsl#3\]'
-[^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `st1d {za8h.d\[w12,0\]},p0,\[sp,x0,lsl#3\]'
+[^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `st1d {za8v.d\[w12,0\]},p0,\[x0,x0,lsl ?#3\]'
+[^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `st1d {za8h.d\[w12,0\]},p0,\[sp,x0,lsl ?#3\]'
 [^:]*:[0-9]+: Error: immediate offset out of range 0 to 1 at operand 1 -- `st1d {za7v.d\[w15,2\]},p7,\[x17\]'
 [^:]*:[0-9]+: Error: immediate offset out of range 0 to 1 at operand 1 -- `st1d {za7h.d\[w15,2\]},p7,\[sp\]'
-[^:]*:[0-9]+: Error: immediate offset out of range 0 to 1 at operand 1 -- `st1d {za7v.d\[w15,2\]},p7,\[x0,x17,lsl#3\]'
-[^:]*:[0-9]+: Error: immediate offset out of range 0 to 1 at operand 1 -- `st1d {za7h.d\[w15,2\]},p7,\[sp,x17,lsl#3\]'
+[^:]*:[0-9]+: Error: immediate offset out of range 0 to 1 at operand 1 -- `st1d {za7v.d\[w15,2\]},p7,\[x0,x17,lsl ?#3\]'
+[^:]*:[0-9]+: Error: immediate offset out of range 0 to 1 at operand 1 -- `st1d {za7h.d\[w15,2\]},p7,\[sp,x17,lsl ?#3\]'
 [^:]*:[0-9]+: Error: expected an SVE vector register or ZA tile slice at operand 1 -- `st1q {za16v.q\[w12\]},p0,\[x0\]'
 [^:]*:[0-9]+: Error: expected an SVE vector register or ZA tile slice at operand 1 -- `st1q {za16h.q\[w12\]},p0,\[sp\]'
-[^:]*:[0-9]+: Error: expected an SVE vector register or ZA tile slice at operand 1 -- `st1q {za16v.q\[w12\]},p0,\[x0,x0,lsl#4\]'
-[^:]*:[0-9]+: Error: expected an SVE vector register or ZA tile slice at operand 1 -- `st1q {za16h.q\[w12\]},p0,\[sp,x0,lsl#4\]'
+[^:]*:[0-9]+: Error: expected an SVE vector register or ZA tile slice at operand 1 -- `st1q {za16v.q\[w12\]},p0,\[x0,x0,lsl ?#4\]'
+[^:]*:[0-9]+: Error: expected an SVE vector register or ZA tile slice at operand 1 -- `st1q {za16h.q\[w12\]},p0,\[sp,x0,lsl ?#4\]'
 [^:]*:[0-9]+: Error: immediate offset must be 0 at operand 1 -- `st1q {za15v.q\[w15,1\]},p7,\[x17\]'
 [^:]*:[0-9]+: Error: immediate offset must be 0 at operand 1 -- `st1q {za15h.q\[w15,1\]},p7,\[sp\]'
-[^:]*:[0-9]+: Error: immediate offset must be 0 at operand 1 -- `st1q {za15v.q\[w15,1\]},p7,\[x0,x17,lsl#4\]'
-[^:]*:[0-9]+: Error: immediate offset must be 0 at operand 1 -- `st1q {za15h.q\[w15,1\]},p7,\[sp,x17,lsl#4\]'
+[^:]*:[0-9]+: Error: immediate offset must be 0 at operand 1 -- `st1q {za15v.q\[w15,1\]},p7,\[x0,x17,lsl ?#4\]'
+[^:]*:[0-9]+: Error: immediate offset must be 0 at operand 1 -- `st1q {za15h.q\[w15,1\]},p7,\[sp,x17,lsl ?#4\]'
 [^:]*:[0-9]+: Error: unexpected vector group size at operand 1 -- `st1b {za0h.b\[w12,0,vgx2\]},p0,\[x0\]'
 [^:]*:[0-9]+: Error: unexpected vector group size at operand 1 -- `st1b {za0h\.b\[w12,0,vgx4\]},p0,\[x0\]'
 [^:]*:[0-9]+: Error: invalid vector group size at operand 1 -- `st1b {za0h\.b\[w12,0,vgx8\]},p0,\[x0\]'
diff --git a/gas/testsuite/gas/aarch64/sme-7-illegal.l b/gas/testsuite/gas/aarch64/sme-7-illegal.l
index 5ab025c..c27e131 100644
--- a/gas/testsuite/gas/aarch64/sme-7-illegal.l
+++ b/gas/testsuite/gas/aarch64/sme-7-illegal.l
@@ -6,10 +6,10 @@
 [^:]*:[0-9]+: Error: immediate offset out of range 0 to 15 at operand 1 -- `ldr za\[w13,21\],\[x17,#21,mul vl\]'
 [^:]*:[0-9]+: Error: operand 2 must have the same immediate value as operand 1 -- `ldr za\[w15,32\],\[x17,#15,mul vl\]'
 [^:]*:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 1 -- `ldr za\[w16,15\],\[sp,#15,mul vl\]'
-[^:]*:[0-9]+: Error: only 'MUL VL' is permitted at operand 2 -- `ldr za\[w12,0\],\[x0,#0,mul#1\]'
-[^:]*:[0-9]+: Error: only 'MUL VL' is permitted at operand 2 -- `ldr za\[w13,0\],\[sp,#0,mul#2\]'
-[^:]*:[0-9]+: Error: only 'MUL VL' is permitted at operand 2 -- `ldr za\[w14,9\],\[x17,#9,mul#3\]'
-[^:]*:[0-9]+: Error: only 'MUL VL' is permitted at operand 2 -- `ldr za\[w15,15\],\[sp,#15,mul#4\]'
+[^:]*:[0-9]+: Error: only 'MUL VL' is permitted at operand 2 -- `ldr za\[w12,0\],\[x0,#0,mul ?#1\]'
+[^:]*:[0-9]+: Error: only 'MUL VL' is permitted at operand 2 -- `ldr za\[w13,0\],\[sp,#0,mul ?#2\]'
+[^:]*:[0-9]+: Error: only 'MUL VL' is permitted at operand 2 -- `ldr za\[w14,9\],\[x17,#9,mul ?#3\]'
+[^:]*:[0-9]+: Error: only 'MUL VL' is permitted at operand 2 -- `ldr za\[w15,15\],\[sp,#15,mul ?#4\]'
 [^:]*:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 1 -- `str za\[w11,0\],\[x0\]'
 [^:]*:[0-9]+: Error: invalid addressing mode at operand 2 -- `str za\[w12,1\],\[sp,x0\]'
 [^:]*:[0-9]+: Error: operand 2 must have the same immediate value as operand 1 -- `str za\[w12,0\],\[sp,#1,mul vl\]'
@@ -17,10 +17,10 @@
 [^:]*:[0-9]+: Error: immediate offset out of range 0 to 15 at operand 1 -- `str za\[w13,21\],\[x17,#21,mul vl\]'
 [^:]*:[0-9]+: Error: operand 2 must have the same immediate value as operand 1 -- `str za\[w15,32\],\[x17,#15,mul vl\]'
 [^:]*:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 1 -- `str za\[w16,15\],\[sp,#15,mul vl\]'
-[^:]*:[0-9]+: Error: only 'MUL VL' is permitted at operand 2 -- `str za\[w12,0\],\[x0,#0,mul#1\]'
-[^:]*:[0-9]+: Error: only 'MUL VL' is permitted at operand 2 -- `str za\[w13,0\],\[sp,#0,mul#2\]'
-[^:]*:[0-9]+: Error: only 'MUL VL' is permitted at operand 2 -- `str za\[w14,9\],\[x17,#9,mul#3\]'
-[^:]*:[0-9]+: Error: only 'MUL VL' is permitted at operand 2 -- `str za\[w15,15\],\[sp,#15,mul#4\]'
+[^:]*:[0-9]+: Error: only 'MUL VL' is permitted at operand 2 -- `str za\[w12,0\],\[x0,#0,mul ?#1\]'
+[^:]*:[0-9]+: Error: only 'MUL VL' is permitted at operand 2 -- `str za\[w13,0\],\[sp,#0,mul ?#2\]'
+[^:]*:[0-9]+: Error: only 'MUL VL' is permitted at operand 2 -- `str za\[w14,9\],\[x17,#9,mul ?#3\]'
+[^:]*:[0-9]+: Error: only 'MUL VL' is permitted at operand 2 -- `str za\[w15,15\],\[sp,#15,mul ?#4\]'
 [^:]*:[0-9]+: Error: operand 2 must have the same immediate value as operand 1 -- `ldr za\[w13,13\],\[x17,#23,mul vl\]'
 [^:]*:[0-9]+: Error: operand 2 must have the same immediate value as operand 1 -- `str za\[w13,13\],\[x17,#23,mul vl\]'
 [^:]*:[0-9]+: Error: operand 2 must have the same immediate value as operand 1 -- `ldr za\[w13,23\],\[x17,#13,mul vl\]'
diff --git a/gas/testsuite/gas/aarch64/sme2-1-invalid.l b/gas/testsuite/gas/aarch64/sme2-1-invalid.l
index d8d2d77..08c30c5 100644
--- a/gas/testsuite/gas/aarch64/sme2-1-invalid.l
+++ b/gas/testsuite/gas/aarch64/sme2-1-invalid.l
@@ -1,327 +1,327 @@
 [^ :]+: Assembler messages:
 [^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `mov 0,za\.b\[w8,0\]'
-[^ :]+:[0-9]+: Error: expected a register at operand 2 -- `mov {z0\.b-z1\.b},0'
-[^ :]+:[0-9]+: Error: operand mismatch -- `mov {z0\.d-z1\.d},za\.q\[w8,0\]'
+[^ :]+:[0-9]+: Error: expected a register at operand 2 -- `mov { ?z0\.b ?- ?z1\.b ?},0'
+[^ :]+:[0-9]+: Error: operand mismatch -- `mov { ?z0\.d ?- ?z1\.d ?},za\.q\[w8,0\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	mov {z0\.d-z1\.d}, za\.d\[w8, 0\]
 [^ :]+:[0-9]+: Info:    other valid variant\(s\):
 [^ :]+:[0-9]+: Info:    	mov {z0\.b-z1\.b}, za\.b\[w8, 0\]
 [^ :]+:[0-9]+: Info:    	mov {z0\.h-z1\.h}, za\.h\[w8, 0\]
 [^ :]+:[0-9]+: Info:    	mov {z0\.s-z1\.s}, za\.s\[w8, 0\]
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `mov {z1\.d-z2\.d},za\.d\[w8,0\]'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 2 -- `mov {z0\.d-z1\.d},za\.d\[w7,0\]'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 2 -- `mov {z0\.d-z1\.d},za\.d\[w12,0\]'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 2 -- `mov {z0\.d-z1\.d},za\.d\[w8,-1\]'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 2 -- `mov {z0\.d-z1\.d},za\.d\[w8,8\]'
-[^ :]+:[0-9]+: Error: operand mismatch -- `mov {z0\.d-z3\.d},za\.q\[w8,0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `mov { ?z1\.d ?- ?z2\.d ?},za\.d\[w8,0\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 2 -- `mov { ?z0\.d ?- ?z1\.d ?},za\.d\[w7,0\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 2 -- `mov { ?z0\.d ?- ?z1\.d ?},za\.d\[w12,0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 2 -- `mov { ?z0\.d ?- ?z1\.d ?},za\.d\[w8,-1\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 2 -- `mov { ?z0\.d ?- ?z1\.d ?},za\.d\[w8,8\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `mov { ?z0\.d ?- ?z3\.d ?},za\.q\[w8,0\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	mov {z0\.d-z3\.d}, za\.d\[w8, 0\]
 [^ :]+:[0-9]+: Info:    other valid variant\(s\):
 [^ :]+:[0-9]+: Info:    	mov {z0\.b-z3\.b}, za\.b\[w8, 0\]
 [^ :]+:[0-9]+: Info:    	mov {z0\.h-z3\.h}, za\.h\[w8, 0\]
 [^ :]+:[0-9]+: Info:    	mov {z0\.s-z3\.s}, za\.s\[w8, 0\]
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `mov {z1\.d-z4\.d},za\.d\[w8,0\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `mov {z2\.d-z5\.d},za\.d\[w8,0\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `mov {z3\.d-z6\.d},za\.d\[w8,0\]'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 2 -- `mov {z0\.d-z3\.d},za\.d\[w7,0\]'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 2 -- `mov {z0\.d-z3\.d},za\.d\[w12,0\]'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 2 -- `mov {z0\.d-z3\.d},za\.d\[w8,-1\]'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 2 -- `mov {z0\.d-z3\.d},za\.d\[w8,8\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `mov {z1\.b-z2\.b},za0h\.b\[w8,0:1\]'
-[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 2 -- `mov {z0\.b-z1\.b},za1h\.b\[w12,0:1\]'
-[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 2 -- `mov {z0\.b-z1\.b},za1v\.b\[w12,0:1\]'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 2 -- `mov {z0\.b-z1\.b},za0h\.b\[w11,0:1\]'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 2 -- `mov {z0\.b-z1\.b},za0h\.b\[w16,0:1\]'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 14 at operand 2 -- `mov {z0\.b-z1\.b},za0h\.b\[w12,-2:-1\]'
-[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 2 -- `mov {z0\.b-z1\.b},za0h\.b\[w12,1:2\]'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 14 at operand 2 -- `mov {z0\.b-z1\.b},za0h\.b\[w12,15:16\]'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 14 at operand 2 -- `mov {z0\.b-z1\.b},za0h\.b\[w12,16:17\]'
-[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 2 -- `mov {z0\.b-z1\.b},za0h\.b\[w12,0\]'
-[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 2 -- `mov {z0\.b-z1\.b},za0h\.b\[w12,0:2\]'
-[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 2 -- `mov {z0\.b-z1\.b},za0h\.b\[w12,0:3\]'
-[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 1 -- `mov {z0\.b-z1\.b},za0h\.b\[w12,0:1,vgx2\]'
-[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 1 -- `mov {z0\.b-z1\.b},za0h\.b\[w12,0:1,vgx4\]'
-[^ :]+:[0-9]+: Error: missing horizontal or vertical suffix at operand 2 -- `mov {z0\.b-z1\.b},za0\.b\[w12,0:1\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `mov {z1\.h-z2\.h},za0h\.h\[w12,0:1\]'
-[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 2 -- `mov {z0\.h-z1\.h},za2h\.h\[w12,0:1\]'
-[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 2 -- `mov {z0\.h-z1\.h},za2v\.h\[w12,0:1\]'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 2 -- `mov {z0\.h-z1\.h},za0h\.h\[w11,0:1\]'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 2 -- `mov {z0\.h-z1\.h},za0h\.h\[w16,0:1\]'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 2 -- `mov {z0\.h-z1\.h},za0h\.h\[w12,-2:-1\]'
-[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 2 -- `mov {z0\.h-z1\.h},za0h\.h\[w12,1:2\]'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 2 -- `mov {z0\.h-z1\.h},za0h\.h\[w12,7:8\]'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 2 -- `mov {z0\.h-z1\.h},za0h\.h\[w12,8:9\]'
-[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 2 -- `mov {z0\.h-z1\.h},za0h\.h\[w12,0\]'
-[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 2 -- `mov {z0\.h-z1\.h},za0h\.h\[w12,0:2\]'
-[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 2 -- `mov {z0\.h-z1\.h},za0h\.h\[w12,0:3\]'
-[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 1 -- `mov {z0\.h-z1\.h},za0h\.h\[w12,0:1,vgx2\]'
-[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 1 -- `mov {z0\.h-z1\.h},za0h\.h\[w12,0:1,vgx4\]'
-[^ :]+:[0-9]+: Error: missing horizontal or vertical suffix at operand 2 -- `mov {z0\.h-z1\.h},za0\.h\[w12,0:1\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `mov {z1\.s-z2\.s},za0h\.s\[w12,0:1\]'
-[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 2 -- `mov {z0\.s-z1\.s},za4h\.s\[w12,0:1\]'
-[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 2 -- `mov {z0\.s-z1\.s},za4v\.s\[w12,0:1\]'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 2 -- `mov {z0\.s-z1\.s},za0h\.s\[w11,0:1\]'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 2 -- `mov {z0\.s-z1\.s},za0h\.s\[w16,0:1\]'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 2 at operand 2 -- `mov {z0\.s-z1\.s},za0h\.s\[w12,-2:-1\]'
-[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 2 -- `mov {z0\.s-z1\.s},za0h\.s\[w12,1:2\]'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 2 at operand 2 -- `mov {z0\.s-z1\.s},za0h\.s\[w12,3:4\]'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 2 at operand 2 -- `mov {z0\.s-z1\.s},za0h\.s\[w12,4:5\]'
-[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 2 -- `mov {z0\.s-z1\.s},za0h\.s\[w12,0\]'
-[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 2 -- `mov {z0\.s-z1\.s},za0h\.s\[w12,0:2\]'
-[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 2 -- `mov {z0\.s-z1\.s},za0h\.s\[w12,0:3\]'
-[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 1 -- `mov {z0\.s-z1\.s},za0h\.s\[w12,0:1,vgx2\]'
-[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 1 -- `mov {z0\.s-z1\.s},za0h\.s\[w12,0:1,vgx4\]'
-[^ :]+:[0-9]+: Error: missing horizontal or vertical suffix at operand 2 -- `mov {z0\.s-z1\.s},za0\.s\[w12,0:1\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `mov {z1\.d-z2\.d},za0h\.d\[w12,0:1\]'
-[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 2 -- `mov {z0\.d-z1\.d},za8h\.d\[w12,0:1\]'
-[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 2 -- `mov {z0\.d-z1\.d},za8v\.d\[w12,0:1\]'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 2 -- `mov {z0\.d-z1\.d},za0h\.d\[w11,0:1\]'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 2 -- `mov {z0\.d-z1\.d},za0h\.d\[w16,0:1\]'
-[^ :]+:[0-9]+: Error: immediate offset must be 0 at operand 2 -- `mov {z0\.d-z1\.d},za0h\.d\[w12,-2:-1\]'
-[^ :]+:[0-9]+: Error: immediate offset must be 0 at operand 2 -- `mov {z0\.d-z1\.d},za0h\.d\[w12,1:2\]'
-[^ :]+:[0-9]+: Error: immediate offset must be 0 at operand 2 -- `mov {z0\.d-z1\.d},za0h\.d\[w12,2:3\]'
-[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 2 -- `mov {z0\.d-z1\.d},za0h\.d\[w12,0\]'
-[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 2 -- `mov {z0\.d-z1\.d},za0h\.d\[w12,0:2\]'
-[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 2 -- `mov {z0\.d-z1\.d},za0h\.d\[w12,0:3\]'
-[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 1 -- `mov {z0\.d-z1\.d},za0h\.d\[w12,0:1,vgx2\]'
-[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 1 -- `mov {z0\.d-z1\.d},za0h\.d\[w12,0:1,vgx4\]'
-[^ :]+:[0-9]+: Error: missing horizontal or vertical suffix at operand 2 -- `mov {z0\.d-z1\.d},za0\.d\[w12,0:1\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `mov {z1\.b-z4\.b},za0h\.b\[w12,0:3\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `mov {z2\.b-z5\.b},za0h\.b\[w12,0:3\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `mov {z3\.b-z6\.b},za0h\.b\[w12,0:3\]'
-[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 2 -- `mov {z0\.b-z3\.b},za1h\.b\[w12,0:3\]'
-[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 2 -- `mov {z0\.b-z3\.b},za1v\.b\[w12,0:3\]'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 2 -- `mov {z0\.b-z3\.b},za0h\.b\[w11,0:3\]'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 2 -- `mov {z0\.b-z3\.b},za0h\.b\[w16,0:3\]'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 12 at operand 2 -- `mov {z0\.b-z3\.b},za0h\.b\[w12,-4:-1\]'
-[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 2 -- `mov {z0\.b-z3\.b},za0h\.b\[w12,1:4\]'
-[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 2 -- `mov {z0\.b-z3\.b},za0h\.b\[w12,2:5\]'
-[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 2 -- `mov {z0\.b-z3\.b},za0h\.b\[w12,3:6\]'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 12 at operand 2 -- `mov {z0\.b-z3\.b},za0h\.b\[w12,13:16\]'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 12 at operand 2 -- `mov {z0\.b-z3\.b},za0h\.b\[w12,14:17\]'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 12 at operand 2 -- `mov {z0\.b-z3\.b},za0h\.b\[w12,15:18\]'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 12 at operand 2 -- `mov {z0\.b-z3\.b},za0h\.b\[w12,16:19\]'
-[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 2 -- `mov {z0\.b-z3\.b},za0h\.b\[w12,0\]'
-[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 2 -- `mov {z0\.b-z3\.b},za0h\.b\[w12,0:1\]'
-[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 2 -- `mov {z0\.b-z3\.b},za0h\.b\[w12,0:2\]'
-[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 1 -- `mov {z0\.b-z3\.b},za0h\.b\[w12,0:3,vgx2\]'
-[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 1 -- `mov {z0\.b-z3\.b},za0h\.b\[w12,0:3,vgx4\]'
-[^ :]+:[0-9]+: Error: missing horizontal or vertical suffix at operand 2 -- `mov {z0\.b-z3\.b},za0\.b\[w12,0:3\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `mov {z1\.h-z2\.h},za0h\.h\[w12,0:3\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `mov {z2\.h-z5\.h},za0h\.h\[w12,0:3\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `mov {z3\.h-z6\.h},za0h\.h\[w12,0:3\]'
-[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 2 -- `mov {z0\.h-z3\.h},za2h\.h\[w12,0:3\]'
-[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 2 -- `mov {z0\.h-z3\.h},za2v\.h\[w12,0:3\]'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 2 -- `mov {z0\.h-z3\.h},za0h\.h\[w11,0:3\]'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 2 -- `mov {z0\.h-z3\.h},za0h\.h\[w16,0:3\]'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 4 at operand 2 -- `mov {z0\.h-z3\.h},za0h\.h\[w12,-4:-1\]'
-[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 2 -- `mov {z0\.h-z3\.h},za0h\.h\[w12,1:2\]'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 4 at operand 2 -- `mov {z0\.h-z3\.h},za0h\.h\[w12,5:8\]'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 4 at operand 2 -- `mov {z0\.h-z3\.h},za0h\.h\[w12,6:9\]'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 4 at operand 2 -- `mov {z0\.h-z3\.h},za0h\.h\[w12,7:10\]'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 4 at operand 2 -- `mov {z0\.h-z3\.h},za0h\.h\[w12,8:11\]'
-[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 2 -- `mov {z0\.h-z3\.h},za0h\.h\[w12,0\]'
-[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 2 -- `mov {z0\.h-z3\.h},za0h\.h\[w12,0:1\]'
-[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 2 -- `mov {z0\.h-z3\.h},za0h\.h\[w12,0:2\]'
-[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 1 -- `mov {z0\.h-z3\.h},za0h\.h\[w12,0:3,vgx2\]'
-[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 1 -- `mov {z0\.h-z3\.h},za0h\.h\[w12,0:3,vgx4\]'
-[^ :]+:[0-9]+: Error: missing horizontal or vertical suffix at operand 2 -- `mov {z0\.h-z3\.h},za0\.h\[w12,0:3\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `mov {z1\.s-z2\.s},za0h\.s\[w12,0:3\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `mov {z2\.s-z5\.s},za0h\.s\[w12,0:3\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `mov {z3\.s-z6\.s},za0h\.s\[w12,0:3\]'
-[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 2 -- `mov {z0\.s-z3\.s},za4h\.s\[w12,0:3\]'
-[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 2 -- `mov {z0\.s-z3\.s},za4v\.s\[w12,0:3\]'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 2 -- `mov {z0\.s-z3\.s},za0h\.s\[w11,0:3\]'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 2 -- `mov {z0\.s-z3\.s},za0h\.s\[w16,0:3\]'
-[^ :]+:[0-9]+: Error: immediate offset must be 0 at operand 2 -- `mov {z0\.s-z3\.s},za0h\.s\[w12,-4:-1\]'
-[^ :]+:[0-9]+: Error: immediate offset must be 0 at operand 2 -- `mov {z0\.s-z3\.s},za0h\.s\[w12,1:4\]'
-[^ :]+:[0-9]+: Error: immediate offset must be 0 at operand 2 -- `mov {z0\.s-z3\.s},za0h\.s\[w12,2:5\]'
-[^ :]+:[0-9]+: Error: immediate offset must be 0 at operand 2 -- `mov {z0\.s-z3\.s},za0h\.s\[w12,3:6\]'
-[^ :]+:[0-9]+: Error: immediate offset must be 0 at operand 2 -- `mov {z0\.s-z3\.s},za0h\.s\[w12,4:7\]'
-[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 2 -- `mov {z0\.s-z3\.s},za0h\.s\[w12,0\]'
-[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 2 -- `mov {z0\.s-z3\.s},za0h\.s\[w12,0:1\]'
-[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 2 -- `mov {z0\.s-z3\.s},za0h\.s\[w12,0:2\]'
-[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 1 -- `mov {z0\.s-z3\.s},za0h\.s\[w12,0:3,vgx2\]'
-[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 1 -- `mov {z0\.s-z3\.s},za0h\.s\[w12,0:3,vgx4\]'
-[^ :]+:[0-9]+: Error: missing horizontal or vertical suffix at operand 2 -- `mov {z0\.s-z3\.s},za0\.s\[w12,0:3\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `mov {z1\.d-z2\.d},za0h\.d\[w12,0:3\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `mov {z2\.d-z5\.d},za0h\.d\[w12,0:3\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `mov {z3\.d-z6\.d},za0h\.d\[w12,0:3\]'
-[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 2 -- `mov {z0\.d-z3\.d},za8h\.d\[w12,0:3\]'
-[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 2 -- `mov {z0\.d-z3\.d},za8v\.d\[w12,0:3\]'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 2 -- `mov {z0\.d-z3\.d},za0h\.d\[w11,0:3\]'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 2 -- `mov {z0\.d-z3\.d},za0h\.d\[w16,0:3\]'
-[^ :]+:[0-9]+: Error: immediate offset must be 0 at operand 2 -- `mov {z0\.d-z3\.d},za0h\.d\[w12,-4:-1\]'
-[^ :]+:[0-9]+: Error: immediate offset must be 0 at operand 2 -- `mov {z0\.d-z3\.d},za0h\.d\[w12,1:4\]'
-[^ :]+:[0-9]+: Error: immediate offset must be 0 at operand 2 -- `mov {z0\.d-z3\.d},za0h\.d\[w12,2:5\]'
-[^ :]+:[0-9]+: Error: immediate offset must be 0 at operand 2 -- `mov {z0\.d-z3\.d},za0h\.d\[w12,3:6\]'
-[^ :]+:[0-9]+: Error: immediate offset must be 0 at operand 2 -- `mov {z0\.d-z3\.d},za0h\.d\[w12,4:7\]'
-[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 2 -- `mov {z0\.d-z3\.d},za0h\.d\[w12,0\]'
-[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 2 -- `mov {z0\.d-z3\.d},za0h\.d\[w12,0:1\]'
-[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 2 -- `mov {z0\.d-z3\.d},za0h\.d\[w12,0:2\]'
-[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 1 -- `mov {z0\.d-z3\.d},za0h\.d\[w12,0:3,vgx2\]'
-[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 1 -- `mov {z0\.d-z3\.d},za0h\.d\[w12,0:3,vgx4\]'
-[^ :]+:[0-9]+: Error: missing horizontal or vertical suffix at operand 2 -- `mov {z0\.d-z3\.d},za0\.d\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `mov { ?z1\.d ?- ?z4\.d ?},za\.d\[w8,0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `mov { ?z2\.d ?- ?z5\.d ?},za\.d\[w8,0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `mov { ?z3\.d ?- ?z6\.d ?},za\.d\[w8,0\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 2 -- `mov { ?z0\.d ?- ?z3\.d ?},za\.d\[w7,0\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 2 -- `mov { ?z0\.d ?- ?z3\.d ?},za\.d\[w12,0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 2 -- `mov { ?z0\.d ?- ?z3\.d ?},za\.d\[w8,-1\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 2 -- `mov { ?z0\.d ?- ?z3\.d ?},za\.d\[w8,8\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `mov { ?z1\.b ?- ?z2\.b ?},za0h\.b\[w8,0:1\]'
+[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 2 -- `mov { ?z0\.b ?- ?z1\.b ?},za1h\.b\[w12,0:1\]'
+[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 2 -- `mov { ?z0\.b ?- ?z1\.b ?},za1v\.b\[w12,0:1\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 2 -- `mov { ?z0\.b ?- ?z1\.b ?},za0h\.b\[w11,0:1\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 2 -- `mov { ?z0\.b ?- ?z1\.b ?},za0h\.b\[w16,0:1\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 14 at operand 2 -- `mov { ?z0\.b ?- ?z1\.b ?},za0h\.b\[w12,-2:-1\]'
+[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 2 -- `mov { ?z0\.b ?- ?z1\.b ?},za0h\.b\[w12,1:2\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 14 at operand 2 -- `mov { ?z0\.b ?- ?z1\.b ?},za0h\.b\[w12,15:16\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 14 at operand 2 -- `mov { ?z0\.b ?- ?z1\.b ?},za0h\.b\[w12,16:17\]'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 2 -- `mov { ?z0\.b ?- ?z1\.b ?},za0h\.b\[w12,0\]'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 2 -- `mov { ?z0\.b ?- ?z1\.b ?},za0h\.b\[w12,0:2\]'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 2 -- `mov { ?z0\.b ?- ?z1\.b ?},za0h\.b\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 1 -- `mov { ?z0\.b ?- ?z1\.b ?},za0h\.b\[w12,0:1,vgx2\]'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 1 -- `mov { ?z0\.b ?- ?z1\.b ?},za0h\.b\[w12,0:1,vgx4\]'
+[^ :]+:[0-9]+: Error: missing horizontal or vertical suffix at operand 2 -- `mov { ?z0\.b ?- ?z1\.b ?},za0\.b\[w12,0:1\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `mov { ?z1\.h ?- ?z2\.h ?},za0h\.h\[w12,0:1\]'
+[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 2 -- `mov { ?z0\.h ?- ?z1\.h ?},za2h\.h\[w12,0:1\]'
+[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 2 -- `mov { ?z0\.h ?- ?z1\.h ?},za2v\.h\[w12,0:1\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 2 -- `mov { ?z0\.h ?- ?z1\.h ?},za0h\.h\[w11,0:1\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 2 -- `mov { ?z0\.h ?- ?z1\.h ?},za0h\.h\[w16,0:1\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 2 -- `mov { ?z0\.h ?- ?z1\.h ?},za0h\.h\[w12,-2:-1\]'
+[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 2 -- `mov { ?z0\.h ?- ?z1\.h ?},za0h\.h\[w12,1:2\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 2 -- `mov { ?z0\.h ?- ?z1\.h ?},za0h\.h\[w12,7:8\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 2 -- `mov { ?z0\.h ?- ?z1\.h ?},za0h\.h\[w12,8:9\]'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 2 -- `mov { ?z0\.h ?- ?z1\.h ?},za0h\.h\[w12,0\]'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 2 -- `mov { ?z0\.h ?- ?z1\.h ?},za0h\.h\[w12,0:2\]'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 2 -- `mov { ?z0\.h ?- ?z1\.h ?},za0h\.h\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 1 -- `mov { ?z0\.h ?- ?z1\.h ?},za0h\.h\[w12,0:1,vgx2\]'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 1 -- `mov { ?z0\.h ?- ?z1\.h ?},za0h\.h\[w12,0:1,vgx4\]'
+[^ :]+:[0-9]+: Error: missing horizontal or vertical suffix at operand 2 -- `mov { ?z0\.h ?- ?z1\.h ?},za0\.h\[w12,0:1\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `mov { ?z1\.s ?- ?z2\.s ?},za0h\.s\[w12,0:1\]'
+[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 2 -- `mov { ?z0\.s ?- ?z1\.s ?},za4h\.s\[w12,0:1\]'
+[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 2 -- `mov { ?z0\.s ?- ?z1\.s ?},za4v\.s\[w12,0:1\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 2 -- `mov { ?z0\.s ?- ?z1\.s ?},za0h\.s\[w11,0:1\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 2 -- `mov { ?z0\.s ?- ?z1\.s ?},za0h\.s\[w16,0:1\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 2 at operand 2 -- `mov { ?z0\.s ?- ?z1\.s ?},za0h\.s\[w12,-2:-1\]'
+[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 2 -- `mov { ?z0\.s ?- ?z1\.s ?},za0h\.s\[w12,1:2\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 2 at operand 2 -- `mov { ?z0\.s ?- ?z1\.s ?},za0h\.s\[w12,3:4\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 2 at operand 2 -- `mov { ?z0\.s ?- ?z1\.s ?},za0h\.s\[w12,4:5\]'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 2 -- `mov { ?z0\.s ?- ?z1\.s ?},za0h\.s\[w12,0\]'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 2 -- `mov { ?z0\.s ?- ?z1\.s ?},za0h\.s\[w12,0:2\]'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 2 -- `mov { ?z0\.s ?- ?z1\.s ?},za0h\.s\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 1 -- `mov { ?z0\.s ?- ?z1\.s ?},za0h\.s\[w12,0:1,vgx2\]'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 1 -- `mov { ?z0\.s ?- ?z1\.s ?},za0h\.s\[w12,0:1,vgx4\]'
+[^ :]+:[0-9]+: Error: missing horizontal or vertical suffix at operand 2 -- `mov { ?z0\.s ?- ?z1\.s ?},za0\.s\[w12,0:1\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `mov { ?z1\.d ?- ?z2\.d ?},za0h\.d\[w12,0:1\]'
+[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 2 -- `mov { ?z0\.d ?- ?z1\.d ?},za8h\.d\[w12,0:1\]'
+[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 2 -- `mov { ?z0\.d ?- ?z1\.d ?},za8v\.d\[w12,0:1\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 2 -- `mov { ?z0\.d ?- ?z1\.d ?},za0h\.d\[w11,0:1\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 2 -- `mov { ?z0\.d ?- ?z1\.d ?},za0h\.d\[w16,0:1\]'
+[^ :]+:[0-9]+: Error: immediate offset must be 0 at operand 2 -- `mov { ?z0\.d ?- ?z1\.d ?},za0h\.d\[w12,-2:-1\]'
+[^ :]+:[0-9]+: Error: immediate offset must be 0 at operand 2 -- `mov { ?z0\.d ?- ?z1\.d ?},za0h\.d\[w12,1:2\]'
+[^ :]+:[0-9]+: Error: immediate offset must be 0 at operand 2 -- `mov { ?z0\.d ?- ?z1\.d ?},za0h\.d\[w12,2:3\]'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 2 -- `mov { ?z0\.d ?- ?z1\.d ?},za0h\.d\[w12,0\]'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 2 -- `mov { ?z0\.d ?- ?z1\.d ?},za0h\.d\[w12,0:2\]'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 2 -- `mov { ?z0\.d ?- ?z1\.d ?},za0h\.d\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 1 -- `mov { ?z0\.d ?- ?z1\.d ?},za0h\.d\[w12,0:1,vgx2\]'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 1 -- `mov { ?z0\.d ?- ?z1\.d ?},za0h\.d\[w12,0:1,vgx4\]'
+[^ :]+:[0-9]+: Error: missing horizontal or vertical suffix at operand 2 -- `mov { ?z0\.d ?- ?z1\.d ?},za0\.d\[w12,0:1\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `mov { ?z1\.b ?- ?z4\.b ?},za0h\.b\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `mov { ?z2\.b ?- ?z5\.b ?},za0h\.b\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `mov { ?z3\.b ?- ?z6\.b ?},za0h\.b\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 2 -- `mov { ?z0\.b ?- ?z3\.b ?},za1h\.b\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 2 -- `mov { ?z0\.b ?- ?z3\.b ?},za1v\.b\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 2 -- `mov { ?z0\.b ?- ?z3\.b ?},za0h\.b\[w11,0:3\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 2 -- `mov { ?z0\.b ?- ?z3\.b ?},za0h\.b\[w16,0:3\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 12 at operand 2 -- `mov { ?z0\.b ?- ?z3\.b ?},za0h\.b\[w12,-4:-1\]'
+[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 2 -- `mov { ?z0\.b ?- ?z3\.b ?},za0h\.b\[w12,1:4\]'
+[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 2 -- `mov { ?z0\.b ?- ?z3\.b ?},za0h\.b\[w12,2:5\]'
+[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 2 -- `mov { ?z0\.b ?- ?z3\.b ?},za0h\.b\[w12,3:6\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 12 at operand 2 -- `mov { ?z0\.b ?- ?z3\.b ?},za0h\.b\[w12,13:16\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 12 at operand 2 -- `mov { ?z0\.b ?- ?z3\.b ?},za0h\.b\[w12,14:17\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 12 at operand 2 -- `mov { ?z0\.b ?- ?z3\.b ?},za0h\.b\[w12,15:18\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 12 at operand 2 -- `mov { ?z0\.b ?- ?z3\.b ?},za0h\.b\[w12,16:19\]'
+[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 2 -- `mov { ?z0\.b ?- ?z3\.b ?},za0h\.b\[w12,0\]'
+[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 2 -- `mov { ?z0\.b ?- ?z3\.b ?},za0h\.b\[w12,0:1\]'
+[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 2 -- `mov { ?z0\.b ?- ?z3\.b ?},za0h\.b\[w12,0:2\]'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 1 -- `mov { ?z0\.b ?- ?z3\.b ?},za0h\.b\[w12,0:3,vgx2\]'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 1 -- `mov { ?z0\.b ?- ?z3\.b ?},za0h\.b\[w12,0:3,vgx4\]'
+[^ :]+:[0-9]+: Error: missing horizontal or vertical suffix at operand 2 -- `mov { ?z0\.b ?- ?z3\.b ?},za0\.b\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `mov { ?z1\.h ?- ?z2\.h ?},za0h\.h\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `mov { ?z2\.h ?- ?z5\.h ?},za0h\.h\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `mov { ?z3\.h ?- ?z6\.h ?},za0h\.h\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 2 -- `mov { ?z0\.h ?- ?z3\.h ?},za2h\.h\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 2 -- `mov { ?z0\.h ?- ?z3\.h ?},za2v\.h\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 2 -- `mov { ?z0\.h ?- ?z3\.h ?},za0h\.h\[w11,0:3\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 2 -- `mov { ?z0\.h ?- ?z3\.h ?},za0h\.h\[w16,0:3\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 4 at operand 2 -- `mov { ?z0\.h ?- ?z3\.h ?},za0h\.h\[w12,-4:-1\]'
+[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 2 -- `mov { ?z0\.h ?- ?z3\.h ?},za0h\.h\[w12,1:2\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 4 at operand 2 -- `mov { ?z0\.h ?- ?z3\.h ?},za0h\.h\[w12,5:8\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 4 at operand 2 -- `mov { ?z0\.h ?- ?z3\.h ?},za0h\.h\[w12,6:9\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 4 at operand 2 -- `mov { ?z0\.h ?- ?z3\.h ?},za0h\.h\[w12,7:10\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 4 at operand 2 -- `mov { ?z0\.h ?- ?z3\.h ?},za0h\.h\[w12,8:11\]'
+[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 2 -- `mov { ?z0\.h ?- ?z3\.h ?},za0h\.h\[w12,0\]'
+[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 2 -- `mov { ?z0\.h ?- ?z3\.h ?},za0h\.h\[w12,0:1\]'
+[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 2 -- `mov { ?z0\.h ?- ?z3\.h ?},za0h\.h\[w12,0:2\]'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 1 -- `mov { ?z0\.h ?- ?z3\.h ?},za0h\.h\[w12,0:3,vgx2\]'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 1 -- `mov { ?z0\.h ?- ?z3\.h ?},za0h\.h\[w12,0:3,vgx4\]'
+[^ :]+:[0-9]+: Error: missing horizontal or vertical suffix at operand 2 -- `mov { ?z0\.h ?- ?z3\.h ?},za0\.h\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `mov { ?z1\.s ?- ?z2\.s ?},za0h\.s\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `mov { ?z2\.s ?- ?z5\.s ?},za0h\.s\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `mov { ?z3\.s ?- ?z6\.s ?},za0h\.s\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 2 -- `mov { ?z0\.s ?- ?z3\.s ?},za4h\.s\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 2 -- `mov { ?z0\.s ?- ?z3\.s ?},za4v\.s\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 2 -- `mov { ?z0\.s ?- ?z3\.s ?},za0h\.s\[w11,0:3\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 2 -- `mov { ?z0\.s ?- ?z3\.s ?},za0h\.s\[w16,0:3\]'
+[^ :]+:[0-9]+: Error: immediate offset must be 0 at operand 2 -- `mov { ?z0\.s ?- ?z3\.s ?},za0h\.s\[w12,-4:-1\]'
+[^ :]+:[0-9]+: Error: immediate offset must be 0 at operand 2 -- `mov { ?z0\.s ?- ?z3\.s ?},za0h\.s\[w12,1:4\]'
+[^ :]+:[0-9]+: Error: immediate offset must be 0 at operand 2 -- `mov { ?z0\.s ?- ?z3\.s ?},za0h\.s\[w12,2:5\]'
+[^ :]+:[0-9]+: Error: immediate offset must be 0 at operand 2 -- `mov { ?z0\.s ?- ?z3\.s ?},za0h\.s\[w12,3:6\]'
+[^ :]+:[0-9]+: Error: immediate offset must be 0 at operand 2 -- `mov { ?z0\.s ?- ?z3\.s ?},za0h\.s\[w12,4:7\]'
+[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 2 -- `mov { ?z0\.s ?- ?z3\.s ?},za0h\.s\[w12,0\]'
+[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 2 -- `mov { ?z0\.s ?- ?z3\.s ?},za0h\.s\[w12,0:1\]'
+[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 2 -- `mov { ?z0\.s ?- ?z3\.s ?},za0h\.s\[w12,0:2\]'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 1 -- `mov { ?z0\.s ?- ?z3\.s ?},za0h\.s\[w12,0:3,vgx2\]'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 1 -- `mov { ?z0\.s ?- ?z3\.s ?},za0h\.s\[w12,0:3,vgx4\]'
+[^ :]+:[0-9]+: Error: missing horizontal or vertical suffix at operand 2 -- `mov { ?z0\.s ?- ?z3\.s ?},za0\.s\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `mov { ?z1\.d ?- ?z2\.d ?},za0h\.d\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `mov { ?z2\.d ?- ?z5\.d ?},za0h\.d\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `mov { ?z3\.d ?- ?z6\.d ?},za0h\.d\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 2 -- `mov { ?z0\.d ?- ?z3\.d ?},za8h\.d\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 2 -- `mov { ?z0\.d ?- ?z3\.d ?},za8v\.d\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 2 -- `mov { ?z0\.d ?- ?z3\.d ?},za0h\.d\[w11,0:3\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 2 -- `mov { ?z0\.d ?- ?z3\.d ?},za0h\.d\[w16,0:3\]'
+[^ :]+:[0-9]+: Error: immediate offset must be 0 at operand 2 -- `mov { ?z0\.d ?- ?z3\.d ?},za0h\.d\[w12,-4:-1\]'
+[^ :]+:[0-9]+: Error: immediate offset must be 0 at operand 2 -- `mov { ?z0\.d ?- ?z3\.d ?},za0h\.d\[w12,1:4\]'
+[^ :]+:[0-9]+: Error: immediate offset must be 0 at operand 2 -- `mov { ?z0\.d ?- ?z3\.d ?},za0h\.d\[w12,2:5\]'
+[^ :]+:[0-9]+: Error: immediate offset must be 0 at operand 2 -- `mov { ?z0\.d ?- ?z3\.d ?},za0h\.d\[w12,3:6\]'
+[^ :]+:[0-9]+: Error: immediate offset must be 0 at operand 2 -- `mov { ?z0\.d ?- ?z3\.d ?},za0h\.d\[w12,4:7\]'
+[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 2 -- `mov { ?z0\.d ?- ?z3\.d ?},za0h\.d\[w12,0\]'
+[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 2 -- `mov { ?z0\.d ?- ?z3\.d ?},za0h\.d\[w12,0:1\]'
+[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 2 -- `mov { ?z0\.d ?- ?z3\.d ?},za0h\.d\[w12,0:2\]'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 1 -- `mov { ?z0\.d ?- ?z3\.d ?},za0h\.d\[w12,0:3,vgx2\]'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 1 -- `mov { ?z0\.d ?- ?z3\.d ?},za0h\.d\[w12,0:3,vgx4\]'
+[^ :]+:[0-9]+: Error: missing horizontal or vertical suffix at operand 2 -- `mov { ?z0\.d ?- ?z3\.d ?},za0\.d\[w12,0:3\]'
 [^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `mova 0,za\.b\[w8,0\]'
-[^ :]+:[0-9]+: Error: expected a register at operand 2 -- `mova {z0\.b-z1\.b},0'
-[^ :]+:[0-9]+: Error: operand mismatch -- `mova za\.q\[w8,0\],{z0\.q-z1\.q}'
+[^ :]+:[0-9]+: Error: expected a register at operand 2 -- `mova { ?z0\.b ?- ?z1\.b ?},0'
+[^ :]+:[0-9]+: Error: operand mismatch -- `mova za\.q\[w8,0\],{ ?z0\.q ?- ?z1\.q ?}'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	mova za\.b\[w8, 0\], {z0\.b-z1\.b}
 [^ :]+:[0-9]+: Info:    other valid variant\(s\):
 [^ :]+:[0-9]+: Info:    	mova za\.h\[w8, 0\], {z0\.h-z1\.h}
 [^ :]+:[0-9]+: Info:    	mova za\.s\[w8, 0\], {z0\.s-z1\.s}
 [^ :]+:[0-9]+: Info:    	mova za\.d\[w8, 0\], {z0\.d-z1\.d}
-[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `mova za\.d\[w7,0\],{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `mova za\.d\[w12,0\],{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `mova za\.d\[w8,-1\],{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `mova za\.d\[w8,8\],{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `mova za\.d\[w8,0\],{z1\.d-z2\.d}'
-[^ :]+:[0-9]+: Error: operand mismatch -- `mova za\.q\[w8,0\],{z0\.q-z3\.q}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `mova za\.d\[w7,0\],{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `mova za\.d\[w12,0\],{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `mova za\.d\[w8,-1\],{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `mova za\.d\[w8,8\],{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `mova za\.d\[w8,0\],{ ?z1\.d ?- ?z2\.d ?}'
+[^ :]+:[0-9]+: Error: operand mismatch -- `mova za\.q\[w8,0\],{ ?z0\.q ?- ?z3\.q ?}'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	mova za\.b\[w8, 0\], {z0\.b-z3\.b}
 [^ :]+:[0-9]+: Info:    other valid variant\(s\):
 [^ :]+:[0-9]+: Info:    	mova za\.h\[w8, 0\], {z0\.h-z3\.h}
 [^ :]+:[0-9]+: Info:    	mova za\.s\[w8, 0\], {z0\.s-z3\.s}
 [^ :]+:[0-9]+: Info:    	mova za\.d\[w8, 0\], {z0\.d-z3\.d}
-[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `mova za\.d\[w7,0\],{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `mova za\.d\[w12,0\],{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `mova za\.d\[w8,-1\],{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `mova za\.d\[w8,8\],{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `mova za\.d\[w8,0\],{z1\.d-z4\.d}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `mova za\.d\[w8,0\],{z2\.d-z5\.d}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `mova za\.d\[w8,0\],{z3\.d-z6\.d}'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 1 -- `mova za0h\.b\[w8,0:1\],{z1\.b-z2\.b}'
-[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 1 -- `mova za1h\.b\[w12,0:1\],{z0\.b-z1\.b}'
-[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 1 -- `mova za1v\.b\[w12,0:1\],{z0\.b-z1\.b}'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 1 -- `mova za0h\.b\[w11,0:1\],{z0\.b-z1\.b}'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 1 -- `mova za0h\.b\[w16,0:1\],{z0\.b-z1\.b}'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 14 at operand 1 -- `mova za0h\.b\[w12,-2:-1\],{z0\.b-z1\.b}'
-[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 1 -- `mova za0h\.b\[w12,1:2\],{z0\.b-z1\.b}'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 14 at operand 1 -- `mova za0h\.b\[w12,15:16\],{z0\.b-z1\.b}'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 14 at operand 1 -- `mova za0h\.b\[w12,16:17\],{z0\.b-z1\.b}'
-[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.b\[w12,0\],{z0\.b-z1\.b}'
-[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.b\[w12,0:2\],{z0\.b-z1\.b}'
-[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.b\[w12,0:3\],{z0\.b-z1\.b}'
-[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `mova za0h\.b\[w12,0:1,vgx2\],{z0\.b-z1\.b}'
-[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `mova za0h\.b\[w12,0:1,vgx4\],{z0\.b-z1\.b}'
-[^ :]+:[0-9]+: Error: missing horizontal or vertical suffix at operand 1 -- `mova za0\.b\[w12,0:1\],{z0\.b-z1\.b}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `mova za0h\.h\[w12,0:1\],{z1\.h-z2\.h}'
-[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 1 -- `mova za2h\.h\[w12,0:1\],{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 1 -- `mova za2v\.h\[w12,0:1\],{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 1 -- `mova za0h\.h\[w11,0:1\],{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 1 -- `mova za0h\.h\[w16,0:1\],{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `mova za0h\.h\[w12,-2:-1\],{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 1 -- `mova za0h\.h\[w12,1:2\],{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `mova za0h\.h\[w12,7:8\],{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `mova za0h\.h\[w12,8:9\],{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.h\[w12,0\],{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.h\[w12,0:2\],{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.h\[w12,0:3\],{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `mova za0h\.h\[w12,0:1,vgx2\],{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `mova za0h\.h\[w12,0:1,vgx4\],{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: missing horizontal or vertical suffix at operand 1 -- `mova za0\.h\[w12,0:1\],{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `mova za0h\.s\[w12,0:1\],{z1\.s-z2\.s}'
-[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 1 -- `mova za4h\.s\[w12,0:1\],{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 1 -- `mova za4v\.s\[w12,0:1\],{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 1 -- `mova za0h\.s\[w11,0:1\],{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 1 -- `mova za0h\.s\[w16,0:1\],{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 2 at operand 1 -- `mova za0h\.s\[w12,-2:-1\],{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 1 -- `mova za0h\.s\[w12,1:2\],{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 2 at operand 1 -- `mova za0h\.s\[w12,3:4\],{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 2 at operand 1 -- `mova za0h\.s\[w12,4:5\],{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.s\[w12,0\],{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.s\[w12,0:2\],{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.s\[w12,0:3\],{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `mova za0h\.s\[w12,0:1,vgx2\],{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `mova za0h\.s\[w12,0:1,vgx4\],{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: missing horizontal or vertical suffix at operand 1 -- `mova za0\.s\[w12,0:1\],{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `mova za0h\.d\[w12,0:1\],{z1\.d-z2\.d}'
-[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 1 -- `mova za8h\.d\[w12,0:1\],{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 1 -- `mova za8v\.d\[w12,0:1\],{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 1 -- `mova za0h\.d\[w11,0:1\],{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 1 -- `mova za0h\.d\[w16,0:1\],{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: immediate offset must be 0 at operand 1 -- `mova za0h\.d\[w12,-2:-1\],{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: immediate offset must be 0 at operand 1 -- `mova za0h\.d\[w12,1:2\],{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: immediate offset must be 0 at operand 1 -- `mova za0h\.d\[w12,2:3\],{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.d\[w12,0\],{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.d\[w12,0:2\],{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.d\[w12,0:3\],{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `mova za0h\.d\[w12,0:1,vgx2\],{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `mova za0h\.d\[w12,0:1,vgx4\],{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: missing horizontal or vertical suffix at operand 1 -- `mova za0\.d\[w12,0:1\],{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `mova za0h\.b\[w12,0:3\],{z1\.b-z4\.b}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `mova za0h\.b\[w12,0:3\],{z2\.b-z5\.b}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `mova za0h\.b\[w12,0:3\],{z3\.b-z6\.b}'
-[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 1 -- `mova za1h\.b\[w12,0:3\],{z0\.b-z3\.b}'
-[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 1 -- `mova za1v\.b\[w12,0:3\],{z0\.b-z3\.b}'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 1 -- `mova za0h\.b\[w11,0:3\],{z0\.b-z3\.b}'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 1 -- `mova za0h\.b\[w16,0:3\],{z0\.b-z3\.b}'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 14 at operand 1 -- `mova za0h\.b\[w12,-4:-1\],{z0\.b-z3\.b}'
-[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 1 -- `mova za0h\.b\[w12,1:4\],{z0\.b-z3\.b}'
-[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.b\[w12,2:5\],{z0\.b-z3\.b}'
-[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 1 -- `mova za0h\.b\[w12,3:6\],{z0\.b-z3\.b}'
-[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 1 -- `mova za0h\.b\[w12,13:16\],{z0\.b-z3\.b}'
-[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.b\[w12,14:17\],{z0\.b-z3\.b}'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 14 at operand 1 -- `mova za0h\.b\[w12,15:18\],{z0\.b-z3\.b}'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 14 at operand 1 -- `mova za0h\.b\[w12,16:19\],{z0\.b-z3\.b}'
-[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.b\[w12,0\],{z0\.b-z3\.b}'
-[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `mova za0h\.b\[w12,0:1\],{z0\.b-z3\.b}'
-[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.b\[w12,0:2\],{z0\.b-z3\.b}'
-[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.b\[w12,0:3,vgx2\],{z0\.b-z3\.b}'
-[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.b\[w12,0:3,vgx4\],{z0\.b-z3\.b}'
-[^ :]+:[0-9]+: Error: missing horizontal or vertical suffix at operand 1 -- `mova za0\.b\[w12,0:3\],{z0\.b-z3\.b}'
-[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.h\[w12,0:3\],{z1\.h-z2\.h}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `mova za0h\.h\[w12,0:3\],{z2\.h-z5\.h}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `mova za0h\.h\[w12,0:3\],{z3\.h-z6\.h}'
-[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 1 -- `mova za2h\.h\[w12,0:3\],{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 1 -- `mova za2v\.h\[w12,0:3\],{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 1 -- `mova za0h\.h\[w11,0:3\],{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 1 -- `mova za0h\.h\[w16,0:3\],{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `mova za0h\.h\[w12,-4:-1\],{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 1 -- `mova za0h\.h\[w12,1:2\],{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 1 -- `mova za0h\.h\[w12,5:8\],{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.h\[w12,6:9\],{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `mova za0h\.h\[w12,7:10\],{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `mova za0h\.h\[w12,8:11\],{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.h\[w12,0\],{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `mova za0h\.h\[w12,0:1\],{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.h\[w12,0:2\],{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.h\[w12,0:3,vgx2\],{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.h\[w12,0:3,vgx4\],{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: missing horizontal or vertical suffix at operand 1 -- `mova za0\.h\[w12,0:3\],{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.s\[w12,0:3\],{z1\.s-z2\.s}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `mova za0h\.s\[w12,0:3\],{z2\.s-z5\.s}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `mova za0h\.s\[w12,0:3\],{z3\.s-z6\.s}'
-[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 1 -- `mova za4h\.s\[w12,0:3\],{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 1 -- `mova za4v\.s\[w12,0:3\],{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 1 -- `mova za0h\.s\[w11,0:3\],{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 1 -- `mova za0h\.s\[w16,0:3\],{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 2 at operand 1 -- `mova za0h\.s\[w12,-4:-1\],{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 1 -- `mova za0h\.s\[w12,1:4\],{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.s\[w12,2:5\],{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 2 at operand 1 -- `mova za0h\.s\[w12,3:6\],{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 2 at operand 1 -- `mova za0h\.s\[w12,4:7\],{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.s\[w12,0\],{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `mova za0h\.s\[w12,0:1\],{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.s\[w12,0:2\],{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.s\[w12,0:3,vgx2\],{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.s\[w12,0:3,vgx4\],{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: missing horizontal or vertical suffix at operand 1 -- `mova za0\.s\[w12,0:3\],{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.d\[w12,0:3\],{z1\.d-z2\.d}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `mova za0h\.d\[w12,0:3\],{z2\.d-z5\.d}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `mova za0h\.d\[w12,0:3\],{z3\.d-z6\.d}'
-[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 1 -- `mova za8h\.d\[w12,0:3\],{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 1 -- `mova za8v\.d\[w12,0:3\],{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 1 -- `mova za0h\.d\[w11,0:3\],{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 1 -- `mova za0h\.d\[w16,0:3\],{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: immediate offset must be 0 at operand 1 -- `mova za0h\.d\[w12,-4:-1\],{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: immediate offset must be 0 at operand 1 -- `mova za0h\.d\[w12,1:4\],{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: immediate offset must be 0 at operand 1 -- `mova za0h\.d\[w12,2:5\],{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: immediate offset must be 0 at operand 1 -- `mova za0h\.d\[w12,3:6\],{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: immediate offset must be 0 at operand 1 -- `mova za0h\.d\[w12,4:7\],{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.d\[w12,0\],{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `mova za0h\.d\[w12,0:1\],{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.d\[w12,0:2\],{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.d\[w12,0:3,vgx2\],{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.d\[w12,0:3,vgx4\],{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: missing horizontal or vertical suffix at operand 1 -- `mova za0\.d\[w12,0:3\],{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `mova za\.d\[w7,0\],{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `mova za\.d\[w12,0\],{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `mova za\.d\[w8,-1\],{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `mova za\.d\[w8,8\],{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `mova za\.d\[w8,0\],{ ?z1\.d ?- ?z4\.d ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `mova za\.d\[w8,0\],{ ?z2\.d ?- ?z5\.d ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `mova za\.d\[w8,0\],{ ?z3\.d ?- ?z6\.d ?}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 1 -- `mova za0h\.b\[w8,0:1\],{ ?z1\.b ?- ?z2\.b ?}'
+[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 1 -- `mova za1h\.b\[w12,0:1\],{ ?z0\.b ?- ?z1\.b ?}'
+[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 1 -- `mova za1v\.b\[w12,0:1\],{ ?z0\.b ?- ?z1\.b ?}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 1 -- `mova za0h\.b\[w11,0:1\],{ ?z0\.b ?- ?z1\.b ?}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 1 -- `mova za0h\.b\[w16,0:1\],{ ?z0\.b ?- ?z1\.b ?}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 14 at operand 1 -- `mova za0h\.b\[w12,-2:-1\],{ ?z0\.b ?- ?z1\.b ?}'
+[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 1 -- `mova za0h\.b\[w12,1:2\],{ ?z0\.b ?- ?z1\.b ?}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 14 at operand 1 -- `mova za0h\.b\[w12,15:16\],{ ?z0\.b ?- ?z1\.b ?}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 14 at operand 1 -- `mova za0h\.b\[w12,16:17\],{ ?z0\.b ?- ?z1\.b ?}'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.b\[w12,0\],{ ?z0\.b ?- ?z1\.b ?}'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.b\[w12,0:2\],{ ?z0\.b ?- ?z1\.b ?}'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.b\[w12,0:3\],{ ?z0\.b ?- ?z1\.b ?}'
+[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `mova za0h\.b\[w12,0:1,vgx2\],{ ?z0\.b ?- ?z1\.b ?}'
+[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `mova za0h\.b\[w12,0:1,vgx4\],{ ?z0\.b ?- ?z1\.b ?}'
+[^ :]+:[0-9]+: Error: missing horizontal or vertical suffix at operand 1 -- `mova za0\.b\[w12,0:1\],{ ?z0\.b ?- ?z1\.b ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `mova za0h\.h\[w12,0:1\],{ ?z1\.h ?- ?z2\.h ?}'
+[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 1 -- `mova za2h\.h\[w12,0:1\],{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 1 -- `mova za2v\.h\[w12,0:1\],{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 1 -- `mova za0h\.h\[w11,0:1\],{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 1 -- `mova za0h\.h\[w16,0:1\],{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `mova za0h\.h\[w12,-2:-1\],{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 1 -- `mova za0h\.h\[w12,1:2\],{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `mova za0h\.h\[w12,7:8\],{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `mova za0h\.h\[w12,8:9\],{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.h\[w12,0\],{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.h\[w12,0:2\],{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.h\[w12,0:3\],{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `mova za0h\.h\[w12,0:1,vgx2\],{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `mova za0h\.h\[w12,0:1,vgx4\],{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: missing horizontal or vertical suffix at operand 1 -- `mova za0\.h\[w12,0:1\],{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `mova za0h\.s\[w12,0:1\],{ ?z1\.s ?- ?z2\.s ?}'
+[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 1 -- `mova za4h\.s\[w12,0:1\],{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 1 -- `mova za4v\.s\[w12,0:1\],{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 1 -- `mova za0h\.s\[w11,0:1\],{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 1 -- `mova za0h\.s\[w16,0:1\],{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 2 at operand 1 -- `mova za0h\.s\[w12,-2:-1\],{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 1 -- `mova za0h\.s\[w12,1:2\],{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 2 at operand 1 -- `mova za0h\.s\[w12,3:4\],{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 2 at operand 1 -- `mova za0h\.s\[w12,4:5\],{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.s\[w12,0\],{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.s\[w12,0:2\],{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.s\[w12,0:3\],{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `mova za0h\.s\[w12,0:1,vgx2\],{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `mova za0h\.s\[w12,0:1,vgx4\],{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: missing horizontal or vertical suffix at operand 1 -- `mova za0\.s\[w12,0:1\],{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `mova za0h\.d\[w12,0:1\],{ ?z1\.d ?- ?z2\.d ?}'
+[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 1 -- `mova za8h\.d\[w12,0:1\],{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 1 -- `mova za8v\.d\[w12,0:1\],{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 1 -- `mova za0h\.d\[w11,0:1\],{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 1 -- `mova za0h\.d\[w16,0:1\],{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: immediate offset must be 0 at operand 1 -- `mova za0h\.d\[w12,-2:-1\],{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: immediate offset must be 0 at operand 1 -- `mova za0h\.d\[w12,1:2\],{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: immediate offset must be 0 at operand 1 -- `mova za0h\.d\[w12,2:3\],{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.d\[w12,0\],{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.d\[w12,0:2\],{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.d\[w12,0:3\],{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `mova za0h\.d\[w12,0:1,vgx2\],{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `mova za0h\.d\[w12,0:1,vgx4\],{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: missing horizontal or vertical suffix at operand 1 -- `mova za0\.d\[w12,0:1\],{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `mova za0h\.b\[w12,0:3\],{ ?z1\.b ?- ?z4\.b ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `mova za0h\.b\[w12,0:3\],{ ?z2\.b ?- ?z5\.b ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `mova za0h\.b\[w12,0:3\],{ ?z3\.b ?- ?z6\.b ?}'
+[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 1 -- `mova za1h\.b\[w12,0:3\],{ ?z0\.b ?- ?z3\.b ?}'
+[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 1 -- `mova za1v\.b\[w12,0:3\],{ ?z0\.b ?- ?z3\.b ?}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 1 -- `mova za0h\.b\[w11,0:3\],{ ?z0\.b ?- ?z3\.b ?}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 1 -- `mova za0h\.b\[w16,0:3\],{ ?z0\.b ?- ?z3\.b ?}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 14 at operand 1 -- `mova za0h\.b\[w12,-4:-1\],{ ?z0\.b ?- ?z3\.b ?}'
+[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 1 -- `mova za0h\.b\[w12,1:4\],{ ?z0\.b ?- ?z3\.b ?}'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.b\[w12,2:5\],{ ?z0\.b ?- ?z3\.b ?}'
+[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 1 -- `mova za0h\.b\[w12,3:6\],{ ?z0\.b ?- ?z3\.b ?}'
+[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 1 -- `mova za0h\.b\[w12,13:16\],{ ?z0\.b ?- ?z3\.b ?}'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.b\[w12,14:17\],{ ?z0\.b ?- ?z3\.b ?}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 14 at operand 1 -- `mova za0h\.b\[w12,15:18\],{ ?z0\.b ?- ?z3\.b ?}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 14 at operand 1 -- `mova za0h\.b\[w12,16:19\],{ ?z0\.b ?- ?z3\.b ?}'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.b\[w12,0\],{ ?z0\.b ?- ?z3\.b ?}'
+[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `mova za0h\.b\[w12,0:1\],{ ?z0\.b ?- ?z3\.b ?}'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.b\[w12,0:2\],{ ?z0\.b ?- ?z3\.b ?}'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.b\[w12,0:3,vgx2\],{ ?z0\.b ?- ?z3\.b ?}'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.b\[w12,0:3,vgx4\],{ ?z0\.b ?- ?z3\.b ?}'
+[^ :]+:[0-9]+: Error: missing horizontal or vertical suffix at operand 1 -- `mova za0\.b\[w12,0:3\],{ ?z0\.b ?- ?z3\.b ?}'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.h\[w12,0:3\],{ ?z1\.h ?- ?z2\.h ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `mova za0h\.h\[w12,0:3\],{ ?z2\.h ?- ?z5\.h ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `mova za0h\.h\[w12,0:3\],{ ?z3\.h ?- ?z6\.h ?}'
+[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 1 -- `mova za2h\.h\[w12,0:3\],{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 1 -- `mova za2v\.h\[w12,0:3\],{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 1 -- `mova za0h\.h\[w11,0:3\],{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 1 -- `mova za0h\.h\[w16,0:3\],{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `mova za0h\.h\[w12,-4:-1\],{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 1 -- `mova za0h\.h\[w12,1:2\],{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 1 -- `mova za0h\.h\[w12,5:8\],{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.h\[w12,6:9\],{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `mova za0h\.h\[w12,7:10\],{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `mova za0h\.h\[w12,8:11\],{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.h\[w12,0\],{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `mova za0h\.h\[w12,0:1\],{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.h\[w12,0:2\],{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.h\[w12,0:3,vgx2\],{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.h\[w12,0:3,vgx4\],{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: missing horizontal or vertical suffix at operand 1 -- `mova za0\.h\[w12,0:3\],{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.s\[w12,0:3\],{ ?z1\.s ?- ?z2\.s ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `mova za0h\.s\[w12,0:3\],{ ?z2\.s ?- ?z5\.s ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `mova za0h\.s\[w12,0:3\],{ ?z3\.s ?- ?z6\.s ?}'
+[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 1 -- `mova za4h\.s\[w12,0:3\],{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 1 -- `mova za4v\.s\[w12,0:3\],{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 1 -- `mova za0h\.s\[w11,0:3\],{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 1 -- `mova za0h\.s\[w16,0:3\],{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 2 at operand 1 -- `mova za0h\.s\[w12,-4:-1\],{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 1 -- `mova za0h\.s\[w12,1:4\],{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.s\[w12,2:5\],{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 2 at operand 1 -- `mova za0h\.s\[w12,3:6\],{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 2 at operand 1 -- `mova za0h\.s\[w12,4:7\],{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.s\[w12,0\],{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `mova za0h\.s\[w12,0:1\],{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.s\[w12,0:2\],{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.s\[w12,0:3,vgx2\],{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.s\[w12,0:3,vgx4\],{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: missing horizontal or vertical suffix at operand 1 -- `mova za0\.s\[w12,0:3\],{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.d\[w12,0:3\],{ ?z1\.d ?- ?z2\.d ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `mova za0h\.d\[w12,0:3\],{ ?z2\.d ?- ?z5\.d ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `mova za0h\.d\[w12,0:3\],{ ?z3\.d ?- ?z6\.d ?}'
+[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 1 -- `mova za8h\.d\[w12,0:3\],{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 1 -- `mova za8v\.d\[w12,0:3\],{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 1 -- `mova za0h\.d\[w11,0:3\],{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 1 -- `mova za0h\.d\[w16,0:3\],{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: immediate offset must be 0 at operand 1 -- `mova za0h\.d\[w12,-4:-1\],{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: immediate offset must be 0 at operand 1 -- `mova za0h\.d\[w12,1:4\],{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: immediate offset must be 0 at operand 1 -- `mova za0h\.d\[w12,2:5\],{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: immediate offset must be 0 at operand 1 -- `mova za0h\.d\[w12,3:6\],{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: immediate offset must be 0 at operand 1 -- `mova za0h\.d\[w12,4:7\],{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.d\[w12,0\],{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `mova za0h\.d\[w12,0:1\],{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.d\[w12,0:2\],{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.d\[w12,0:3,vgx2\],{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.d\[w12,0:3,vgx4\],{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: missing horizontal or vertical suffix at operand 1 -- `mova za0\.d\[w12,0:3\],{ ?z0\.d ?- ?z3\.d ?}'
diff --git a/gas/testsuite/gas/aarch64/sme2-1-noarch.l b/gas/testsuite/gas/aarch64/sme2-1-noarch.l
index 9d9fd08..09f5a3c 100644
--- a/gas/testsuite/gas/aarch64/sme2-1-noarch.l
+++ b/gas/testsuite/gas/aarch64/sme2-1-noarch.l
@@ -1,289 +1,289 @@
 [^ :]+: Assembler messages:
-[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.b-z1\.b},za\.b\[w8,0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.h-z1\.h},za\.h\[w8,0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.s-z1\.s},za\.s\[w8,0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.d-z1\.d},za\.d\[w8,0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov {z30\.d-z31\.d},za\.d\[w8,0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.d-z1\.d},za\.d\[w11,0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.d-z1\.d},za\.d\[w8,7\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.b-z3\.b},za\.b\[w8,0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.h-z3\.h},za\.h\[w8,0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.s-z3\.s},za\.s\[w8,0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.d-z3\.d},za\.d\[w8,0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov {z28\.d-z31\.d},za\.d\[w8,0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.d-z3\.d},za\.d\[w11,0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.d-z3\.d},za\.d\[w8,7\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.b-z1\.b},za0h\.b\[w12,0:1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov {z30\.b-z31\.b},za0h\.b\[w12,0:1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.b-z1\.b},za0v\.b\[w12,0:1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.b-z1\.b},za0h\.b\[w15,0:1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.b-z1\.b},za0h\.b\[w12,14:15\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov {z8\.b-z9\.b},za0h\.b\[w14,6:7\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.h-z1\.h},za0h\.h\[w12,0:1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov {z30\.h-z31\.h},za0h\.h\[w12,0:1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.h-z1\.h},za0v\.h\[w12,0:1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.h-z1\.h},za1h\.h\[w12,0:1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.h-z1\.h},za1v\.h\[w12,0:1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.h-z1\.h},za0h\.h\[w15,0:1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.h-z1\.h},za0h\.h\[w12,6:7\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov {z10\.h-z11\.h},za0h\.h\[w13,2:3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.s-z1\.s},za0h\.s\[w12,0:1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov {z30\.s-z31\.s},za0h\.s\[w12,0:1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.s-z1\.s},za0v\.s\[w12,0:1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.s-z1\.s},za3h\.s\[w12,0:1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.s-z1\.s},za3v\.s\[w12,0:1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.s-z1\.s},za0h\.s\[w15,0:1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.s-z1\.s},za0h\.s\[w12,2:3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov {z18\.s-z19\.s},za2h\.s\[w14,0:1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.d-z1\.d},za0h\.d\[w12,0:1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov {z30\.d-z31\.d},za0h\.d\[w12,0:1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.d-z1\.d},za0v\.d\[w12,0:1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.d-z1\.d},za7h\.d\[w12,0:1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.d-z1\.d},za7v\.d\[w12,0:1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.d-z1\.d},za0h\.d\[w15,0:1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov {z22\.d-z23\.d},za6h\.d\[w13,0:1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.b-z3\.b},za0h\.b\[w12,0:3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov {z28\.b-z31\.b},za0h\.b\[w12,0:3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.b-z3\.b},za0v\.b\[w12,0:3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.b-z3\.b},za0h\.b\[w15,0:3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.b-z3\.b},za0h\.b\[w12,12:15\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov {z12\.b-z15\.b},za0h\.b\[w14,8:11\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.h-z3\.h},za0h\.h\[w12,0:3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov {z28\.h-z31\.h},za0h\.h\[w12,0:3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.h-z3\.h},za0v\.h\[w12,0:3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.h-z3\.h},za1h\.h\[w12,0:3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.h-z3\.h},za1v\.h\[w12,0:3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.h-z3\.h},za0h\.h\[w15,0:3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.h-z3\.h},za0h\.h\[w12,4:7\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov {z16\.h-z19\.h},za0h\.h\[w13,4:7\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.s-z3\.s},za0h\.s\[w12,0:3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov {z28\.s-z31\.s},za0h\.s\[w12,0:3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.s-z3\.s},za0v\.s\[w12,0:3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.s-z3\.s},za3h\.s\[w12,0:3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.s-z3\.s},za3v\.s\[w12,0:3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.s-z3\.s},za0h\.s\[w15,0:3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov {z20\.s-z23\.s},za2h\.s\[w13,0:3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.d-z3\.d},za0h\.d\[w12,0:3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov {z28\.d-z31\.d},za0h\.d\[w12,0:3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.d-z3\.d},za0v\.d\[w12,0:3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.d-z3\.d},za7h\.d\[w12,0:3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.d-z3\.d},za7v\.d\[w12,0:3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.d-z3\.d},za0h\.d\[w15,0:3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov {z24\.d-z27\.d},za5h\.d\[w13,0:3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov za\.b\[w8,0\],{z0\.b-z1\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov za\.h\[w8,0\],{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov za\.s\[w8,0\],{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov za\.d\[w8,0\],{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov za\.d\[w11,0\],{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov za\.d\[w8,7\],{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov za\.d\[w8,0\],{z30\.d-z31\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov za\.d\[w9,5\],{z2\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov za\.b\[w8,0\],{z0\.b-z3\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov za\.h\[w8,0\],{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov za\.s\[w8,0\],{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov za\.d\[w8,0\],{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov za\.d\[w11,0\],{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov za\.d\[w8,7\],{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov za\.d\[w8,0\],{z28\.d-z31\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov za\.d\[w10,1\],{z20\.d-z23\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.b\[w12,0:1\],{z0\.b-z1\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov za0v\.b\[w12,0:1\],{z0\.b-z1\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.b\[w15,0:1\],{z0\.b-z1\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.b\[w12,14:15\],{z0\.b-z1\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.b\[w12,0:1\],{z30\.b-z31\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.b\[w14,6:7\],{z8\.b-z9\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.h\[w12,0:1\],{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov za0v\.h\[w12,0:1\],{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov za1h\.h\[w12,0:1\],{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov za1v\.h\[w12,0:1\],{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.h\[w15,0:1\],{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.h\[w12,6:7\],{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.h\[w12,0:1\],{z30\.h-z31\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.h\[w13,2:3\],{z10\.h-z11\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.s\[w12,0:1\],{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov za0v\.s\[w12,0:1\],{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov za3h\.s\[w12,0:1\],{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov za3v\.s\[w12,0:1\],{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.s\[w15,0:1\],{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.s\[w12,2:3\],{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.s\[w12,0:1\],{z30\.s-z31\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov za2h\.s\[w14,0:1\],{z18\.s-z19\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.d\[w12,0:1\],{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov za0v\.d\[w12,0:1\],{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov za7h\.d\[w12,0:1\],{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov za7v\.d\[w12,0:1\],{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.d\[w15,0:1\],{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.d\[w12,0:1\],{z30\.d-z31\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov za6h\.d\[w13,0:1\],{z22\.d-z23\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.b\[w12,0:3\],{z0\.b-z3\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov za0v\.b\[w12,0:3\],{z0\.b-z3\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.b\[w15,0:3\],{z0\.b-z3\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.b\[w12,12:15\],{z0\.b-z3\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.b\[w12,0:3\],{z28\.b-z31\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.b\[w14,8:11\],{z12\.b-z15\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.h\[w12,0:3\],{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov za0v\.h\[w12,0:3\],{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov za1h\.h\[w12,0:3\],{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov za1v\.h\[w12,0:3\],{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.h\[w15,0:3\],{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.h\[w12,4:7\],{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.h\[w12,0:3\],{z28\.h-z31\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.h\[w13,4:7\],{z16\.h-z19\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.s\[w12,0:3\],{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov za0v\.s\[w12,0:3\],{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov za3h\.s\[w12,0:3\],{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov za3v\.s\[w12,0:3\],{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.s\[w15,0:3\],{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.s\[w12,0:3\],{z28\.s-z31\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov za2h\.s\[w13,0:3\],{z20\.s-z23\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.d\[w12,0:3\],{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov za0v\.d\[w12,0:3\],{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov za7h\.d\[w12,0:3\],{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov za7v\.d\[w12,0:3\],{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.d\[w15,0:3\],{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.d\[w12,0:3\],{z28\.d-z31\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mov za5h\.d\[w13,0:3\],{z24\.d-z27\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.b-z1\.b},za\.b\[w8,0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.h-z1\.h},za\.h\[w8,0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.s-z1\.s},za\.s\[w8,0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.d-z1\.d},za\.d\[w8,0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova {z30\.d-z31\.d},za\.d\[w8,0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.d-z1\.d},za\.d\[w11,0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.d-z1\.d},za\.d\[w8,7\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.b-z3\.b},za\.b\[w8,0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.h-z3\.h},za\.h\[w8,0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.s-z3\.s},za\.s\[w8,0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.d-z3\.d},za\.d\[w8,0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova {z28\.d-z31\.d},za\.d\[w8,0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.d-z3\.d},za\.d\[w11,0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.d-z3\.d},za\.d\[w8,7\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.b-z1\.b},za0h\.b\[w12,0:1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova {z30\.b-z31\.b},za0h\.b\[w12,0:1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.b-z1\.b},za0v\.b\[w12,0:1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.b-z1\.b},za0h\.b\[w15,0:1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.b-z1\.b},za0h\.b\[w12,14:15\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova {z8\.b-z9\.b},za0h\.b\[w14,6:7\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.h-z1\.h},za0h\.h\[w12,0:1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova {z30\.h-z31\.h},za0h\.h\[w12,0:1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.h-z1\.h},za0v\.h\[w12,0:1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.h-z1\.h},za1h\.h\[w12,0:1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.h-z1\.h},za1v\.h\[w12,0:1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.h-z1\.h},za0h\.h\[w15,0:1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.h-z1\.h},za0h\.h\[w12,6:7\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova {z10\.h-z11\.h},za0h\.h\[w13,2:3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.s-z1\.s},za0h\.s\[w12,0:1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova {z30\.s-z31\.s},za0h\.s\[w12,0:1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.s-z1\.s},za0v\.s\[w12,0:1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.s-z1\.s},za3h\.s\[w12,0:1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.s-z1\.s},za3v\.s\[w12,0:1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.s-z1\.s},za0h\.s\[w15,0:1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.s-z1\.s},za0h\.s\[w12,2:3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova {z18\.s-z19\.s},za2h\.s\[w14,0:1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.d-z1\.d},za0h\.d\[w12,0:1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova {z30\.d-z31\.d},za0h\.d\[w12,0:1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.d-z1\.d},za0v\.d\[w12,0:1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.d-z1\.d},za7h\.d\[w12,0:1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.d-z1\.d},za7v\.d\[w12,0:1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.d-z1\.d},za0h\.d\[w15,0:1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova {z22\.d-z23\.d},za6h\.d\[w13,0:1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.b-z3\.b},za0h\.b\[w12,0:3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova {z28\.b-z31\.b},za0h\.b\[w12,0:3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.b-z3\.b},za0v\.b\[w12,0:3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.b-z3\.b},za0h\.b\[w15,0:3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.b-z3\.b},za0h\.b\[w12,12:15\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova {z12\.b-z15\.b},za0h\.b\[w14,8:11\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.h-z3\.h},za0h\.h\[w12,0:3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova {z28\.h-z31\.h},za0h\.h\[w12,0:3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.h-z3\.h},za0v\.h\[w12,0:3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.h-z3\.h},za1h\.h\[w12,0:3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.h-z3\.h},za1v\.h\[w12,0:3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.h-z3\.h},za0h\.h\[w15,0:3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.h-z3\.h},za0h\.h\[w12,4:7\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova {z16\.h-z19\.h},za0h\.h\[w13,4:7\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.s-z3\.s},za0h\.s\[w12,0:3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova {z28\.s-z31\.s},za0h\.s\[w12,0:3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.s-z3\.s},za0v\.s\[w12,0:3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.s-z3\.s},za3h\.s\[w12,0:3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.s-z3\.s},za3v\.s\[w12,0:3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.s-z3\.s},za0h\.s\[w15,0:3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova {z20\.s-z23\.s},za2h\.s\[w13,0:3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.d-z3\.d},za0h\.d\[w12,0:3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova {z28\.d-z31\.d},za0h\.d\[w12,0:3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.d-z3\.d},za0v\.d\[w12,0:3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.d-z3\.d},za7h\.d\[w12,0:3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.d-z3\.d},za7v\.d\[w12,0:3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.d-z3\.d},za0h\.d\[w15,0:3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova {z24\.d-z27\.d},za5h\.d\[w13,0:3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova za\.b\[w8,0\],{z0\.b-z1\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova za\.h\[w8,0\],{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova za\.s\[w8,0\],{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova za\.d\[w8,0\],{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova za\.d\[w11,0\],{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova za\.d\[w8,7\],{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova za\.d\[w8,0\],{z30\.d-z31\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova za\.d\[w9,5\],{z2\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova za\.b\[w8,0\],{z0\.b-z3\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova za\.h\[w8,0\],{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova za\.s\[w8,0\],{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova za\.d\[w8,0\],{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova za\.d\[w11,0\],{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova za\.d\[w8,7\],{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova za\.d\[w8,0\],{z28\.d-z31\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova za\.d\[w10,1\],{z20\.d-z23\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.b\[w12,0:1\],{z0\.b-z1\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova za0v\.b\[w12,0:1\],{z0\.b-z1\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.b\[w15,0:1\],{z0\.b-z1\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.b\[w12,14:15\],{z0\.b-z1\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.b\[w12,0:1\],{z30\.b-z31\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.b\[w14,6:7\],{z8\.b-z9\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.h\[w12,0:1\],{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova za0v\.h\[w12,0:1\],{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova za1h\.h\[w12,0:1\],{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova za1v\.h\[w12,0:1\],{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.h\[w15,0:1\],{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.h\[w12,6:7\],{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.h\[w12,0:1\],{z30\.h-z31\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.h\[w13,2:3\],{z10\.h-z11\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.s\[w12,0:1\],{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova za0v\.s\[w12,0:1\],{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova za3h\.s\[w12,0:1\],{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova za3v\.s\[w12,0:1\],{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.s\[w15,0:1\],{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.s\[w12,2:3\],{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.s\[w12,0:1\],{z30\.s-z31\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova za2h\.s\[w14,0:1\],{z18\.s-z19\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.d\[w12,0:1\],{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova za0v\.d\[w12,0:1\],{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova za7h\.d\[w12,0:1\],{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova za7v\.d\[w12,0:1\],{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.d\[w15,0:1\],{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.d\[w12,0:1\],{z30\.d-z31\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova za6h\.d\[w13,0:1\],{z22\.d-z23\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.b\[w12,0:3\],{z0\.b-z3\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova za0v\.b\[w12,0:3\],{z0\.b-z3\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.b\[w15,0:3\],{z0\.b-z3\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.b\[w12,12:15\],{z0\.b-z3\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.b\[w12,0:3\],{z28\.b-z31\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.b\[w14,8:11\],{z12\.b-z15\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.h\[w12,0:3\],{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova za0v\.h\[w12,0:3\],{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova za1h\.h\[w12,0:3\],{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova za1v\.h\[w12,0:3\],{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.h\[w15,0:3\],{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.h\[w12,4:7\],{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.h\[w12,0:3\],{z28\.h-z31\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.h\[w13,4:7\],{z16\.h-z19\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.s\[w12,0:3\],{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova za0v\.s\[w12,0:3\],{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova za3h\.s\[w12,0:3\],{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova za3v\.s\[w12,0:3\],{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.s\[w15,0:3\],{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.s\[w12,0:3\],{z28\.s-z31\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova za2h\.s\[w13,0:3\],{z20\.s-z23\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.d\[w12,0:3\],{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova za0v\.d\[w12,0:3\],{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova za7h\.d\[w12,0:3\],{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova za7v\.d\[w12,0:3\],{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.d\[w15,0:3\],{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.d\[w12,0:3\],{z28\.d-z31\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `mova za5h\.d\[w13,0:3\],{z24\.d-z27\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z0\.b ?- ?z1\.b ?},za\.b\[w8,0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z0\.h ?- ?z1\.h ?},za\.h\[w8,0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z0\.s ?- ?z1\.s ?},za\.s\[w8,0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z0\.d ?- ?z1\.d ?},za\.d\[w8,0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z30\.d ?- ?z31\.d ?},za\.d\[w8,0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z0\.d ?- ?z1\.d ?},za\.d\[w11,0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z0\.d ?- ?z1\.d ?},za\.d\[w8,7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z0\.b ?- ?z3\.b ?},za\.b\[w8,0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z0\.h ?- ?z3\.h ?},za\.h\[w8,0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z0\.s ?- ?z3\.s ?},za\.s\[w8,0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z0\.d ?- ?z3\.d ?},za\.d\[w8,0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z28\.d ?- ?z31\.d ?},za\.d\[w8,0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z0\.d ?- ?z3\.d ?},za\.d\[w11,0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z0\.d ?- ?z3\.d ?},za\.d\[w8,7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z0\.b ?- ?z1\.b ?},za0h\.b\[w12,0:1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z30\.b ?- ?z31\.b ?},za0h\.b\[w12,0:1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z0\.b ?- ?z1\.b ?},za0v\.b\[w12,0:1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z0\.b ?- ?z1\.b ?},za0h\.b\[w15,0:1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z0\.b ?- ?z1\.b ?},za0h\.b\[w12,14:15\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z8\.b ?- ?z9\.b ?},za0h\.b\[w14,6:7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z0\.h ?- ?z1\.h ?},za0h\.h\[w12,0:1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z30\.h ?- ?z31\.h ?},za0h\.h\[w12,0:1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z0\.h ?- ?z1\.h ?},za0v\.h\[w12,0:1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z0\.h ?- ?z1\.h ?},za1h\.h\[w12,0:1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z0\.h ?- ?z1\.h ?},za1v\.h\[w12,0:1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z0\.h ?- ?z1\.h ?},za0h\.h\[w15,0:1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z0\.h ?- ?z1\.h ?},za0h\.h\[w12,6:7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z10\.h ?- ?z11\.h ?},za0h\.h\[w13,2:3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z0\.s ?- ?z1\.s ?},za0h\.s\[w12,0:1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z30\.s ?- ?z31\.s ?},za0h\.s\[w12,0:1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z0\.s ?- ?z1\.s ?},za0v\.s\[w12,0:1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z0\.s ?- ?z1\.s ?},za3h\.s\[w12,0:1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z0\.s ?- ?z1\.s ?},za3v\.s\[w12,0:1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z0\.s ?- ?z1\.s ?},za0h\.s\[w15,0:1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z0\.s ?- ?z1\.s ?},za0h\.s\[w12,2:3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z18\.s ?- ?z19\.s ?},za2h\.s\[w14,0:1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z0\.d ?- ?z1\.d ?},za0h\.d\[w12,0:1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z30\.d ?- ?z31\.d ?},za0h\.d\[w12,0:1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z0\.d ?- ?z1\.d ?},za0v\.d\[w12,0:1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z0\.d ?- ?z1\.d ?},za7h\.d\[w12,0:1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z0\.d ?- ?z1\.d ?},za7v\.d\[w12,0:1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z0\.d ?- ?z1\.d ?},za0h\.d\[w15,0:1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z22\.d ?- ?z23\.d ?},za6h\.d\[w13,0:1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z0\.b ?- ?z3\.b ?},za0h\.b\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z28\.b ?- ?z31\.b ?},za0h\.b\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z0\.b ?- ?z3\.b ?},za0v\.b\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z0\.b ?- ?z3\.b ?},za0h\.b\[w15,0:3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z0\.b ?- ?z3\.b ?},za0h\.b\[w12,12:15\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z12\.b ?- ?z15\.b ?},za0h\.b\[w14,8:11\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z0\.h ?- ?z3\.h ?},za0h\.h\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z28\.h ?- ?z31\.h ?},za0h\.h\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z0\.h ?- ?z3\.h ?},za0v\.h\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z0\.h ?- ?z3\.h ?},za1h\.h\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z0\.h ?- ?z3\.h ?},za1v\.h\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z0\.h ?- ?z3\.h ?},za0h\.h\[w15,0:3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z0\.h ?- ?z3\.h ?},za0h\.h\[w12,4:7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z16\.h ?- ?z19\.h ?},za0h\.h\[w13,4:7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z0\.s ?- ?z3\.s ?},za0h\.s\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z28\.s ?- ?z31\.s ?},za0h\.s\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z0\.s ?- ?z3\.s ?},za0v\.s\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z0\.s ?- ?z3\.s ?},za3h\.s\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z0\.s ?- ?z3\.s ?},za3v\.s\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z0\.s ?- ?z3\.s ?},za0h\.s\[w15,0:3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z20\.s ?- ?z23\.s ?},za2h\.s\[w13,0:3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z0\.d ?- ?z3\.d ?},za0h\.d\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z28\.d ?- ?z31\.d ?},za0h\.d\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z0\.d ?- ?z3\.d ?},za0v\.d\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z0\.d ?- ?z3\.d ?},za7h\.d\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z0\.d ?- ?z3\.d ?},za7v\.d\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z0\.d ?- ?z3\.d ?},za0h\.d\[w15,0:3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z24\.d ?- ?z27\.d ?},za5h\.d\[w13,0:3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za\.b\[w8,0\],{ ?z0\.b ?- ?z1\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za\.h\[w8,0\],{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za\.s\[w8,0\],{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za\.d\[w8,0\],{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za\.d\[w11,0\],{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za\.d\[w8,7\],{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za\.d\[w8,0\],{ ?z30\.d ?- ?z31\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za\.d\[w9,5\],{ ?z2\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za\.b\[w8,0\],{ ?z0\.b ?- ?z3\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za\.h\[w8,0\],{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za\.s\[w8,0\],{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za\.d\[w8,0\],{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za\.d\[w11,0\],{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za\.d\[w8,7\],{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za\.d\[w8,0\],{ ?z28\.d ?- ?z31\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za\.d\[w10,1\],{ ?z20\.d ?- ?z23\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.b\[w12,0:1\],{ ?z0\.b ?- ?z1\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za0v\.b\[w12,0:1\],{ ?z0\.b ?- ?z1\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.b\[w15,0:1\],{ ?z0\.b ?- ?z1\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.b\[w12,14:15\],{ ?z0\.b ?- ?z1\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.b\[w12,0:1\],{ ?z30\.b ?- ?z31\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.b\[w14,6:7\],{ ?z8\.b ?- ?z9\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.h\[w12,0:1\],{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za0v\.h\[w12,0:1\],{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za1h\.h\[w12,0:1\],{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za1v\.h\[w12,0:1\],{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.h\[w15,0:1\],{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.h\[w12,6:7\],{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.h\[w12,0:1\],{ ?z30\.h ?- ?z31\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.h\[w13,2:3\],{ ?z10\.h ?- ?z11\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.s\[w12,0:1\],{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za0v\.s\[w12,0:1\],{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za3h\.s\[w12,0:1\],{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za3v\.s\[w12,0:1\],{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.s\[w15,0:1\],{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.s\[w12,2:3\],{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.s\[w12,0:1\],{ ?z30\.s ?- ?z31\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za2h\.s\[w14,0:1\],{ ?z18\.s ?- ?z19\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.d\[w12,0:1\],{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za0v\.d\[w12,0:1\],{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za7h\.d\[w12,0:1\],{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za7v\.d\[w12,0:1\],{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.d\[w15,0:1\],{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.d\[w12,0:1\],{ ?z30\.d ?- ?z31\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za6h\.d\[w13,0:1\],{ ?z22\.d ?- ?z23\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.b\[w12,0:3\],{ ?z0\.b ?- ?z3\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za0v\.b\[w12,0:3\],{ ?z0\.b ?- ?z3\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.b\[w15,0:3\],{ ?z0\.b ?- ?z3\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.b\[w12,12:15\],{ ?z0\.b ?- ?z3\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.b\[w12,0:3\],{ ?z28\.b ?- ?z31\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.b\[w14,8:11\],{ ?z12\.b ?- ?z15\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.h\[w12,0:3\],{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za0v\.h\[w12,0:3\],{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za1h\.h\[w12,0:3\],{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za1v\.h\[w12,0:3\],{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.h\[w15,0:3\],{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.h\[w12,4:7\],{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.h\[w12,0:3\],{ ?z28\.h ?- ?z31\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.h\[w13,4:7\],{ ?z16\.h ?- ?z19\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.s\[w12,0:3\],{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za0v\.s\[w12,0:3\],{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za3h\.s\[w12,0:3\],{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za3v\.s\[w12,0:3\],{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.s\[w15,0:3\],{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.s\[w12,0:3\],{ ?z28\.s ?- ?z31\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za2h\.s\[w13,0:3\],{ ?z20\.s ?- ?z23\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.d\[w12,0:3\],{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za0v\.d\[w12,0:3\],{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za7h\.d\[w12,0:3\],{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za7v\.d\[w12,0:3\],{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.d\[w15,0:3\],{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.d\[w12,0:3\],{ ?z28\.d ?- ?z31\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za5h\.d\[w13,0:3\],{ ?z24\.d ?- ?z27\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z0\.b ?- ?z1\.b ?},za\.b\[w8,0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z0\.h ?- ?z1\.h ?},za\.h\[w8,0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z0\.s ?- ?z1\.s ?},za\.s\[w8,0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z0\.d ?- ?z1\.d ?},za\.d\[w8,0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z30\.d ?- ?z31\.d ?},za\.d\[w8,0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z0\.d ?- ?z1\.d ?},za\.d\[w11,0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z0\.d ?- ?z1\.d ?},za\.d\[w8,7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z0\.b ?- ?z3\.b ?},za\.b\[w8,0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z0\.h ?- ?z3\.h ?},za\.h\[w8,0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z0\.s ?- ?z3\.s ?},za\.s\[w8,0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z0\.d ?- ?z3\.d ?},za\.d\[w8,0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z28\.d ?- ?z31\.d ?},za\.d\[w8,0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z0\.d ?- ?z3\.d ?},za\.d\[w11,0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z0\.d ?- ?z3\.d ?},za\.d\[w8,7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z0\.b ?- ?z1\.b ?},za0h\.b\[w12,0:1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z30\.b ?- ?z31\.b ?},za0h\.b\[w12,0:1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z0\.b ?- ?z1\.b ?},za0v\.b\[w12,0:1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z0\.b ?- ?z1\.b ?},za0h\.b\[w15,0:1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z0\.b ?- ?z1\.b ?},za0h\.b\[w12,14:15\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z8\.b ?- ?z9\.b ?},za0h\.b\[w14,6:7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z0\.h ?- ?z1\.h ?},za0h\.h\[w12,0:1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z30\.h ?- ?z31\.h ?},za0h\.h\[w12,0:1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z0\.h ?- ?z1\.h ?},za0v\.h\[w12,0:1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z0\.h ?- ?z1\.h ?},za1h\.h\[w12,0:1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z0\.h ?- ?z1\.h ?},za1v\.h\[w12,0:1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z0\.h ?- ?z1\.h ?},za0h\.h\[w15,0:1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z0\.h ?- ?z1\.h ?},za0h\.h\[w12,6:7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z10\.h ?- ?z11\.h ?},za0h\.h\[w13,2:3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z0\.s ?- ?z1\.s ?},za0h\.s\[w12,0:1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z30\.s ?- ?z31\.s ?},za0h\.s\[w12,0:1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z0\.s ?- ?z1\.s ?},za0v\.s\[w12,0:1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z0\.s ?- ?z1\.s ?},za3h\.s\[w12,0:1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z0\.s ?- ?z1\.s ?},za3v\.s\[w12,0:1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z0\.s ?- ?z1\.s ?},za0h\.s\[w15,0:1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z0\.s ?- ?z1\.s ?},za0h\.s\[w12,2:3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z18\.s ?- ?z19\.s ?},za2h\.s\[w14,0:1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z0\.d ?- ?z1\.d ?},za0h\.d\[w12,0:1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z30\.d ?- ?z31\.d ?},za0h\.d\[w12,0:1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z0\.d ?- ?z1\.d ?},za0v\.d\[w12,0:1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z0\.d ?- ?z1\.d ?},za7h\.d\[w12,0:1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z0\.d ?- ?z1\.d ?},za7v\.d\[w12,0:1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z0\.d ?- ?z1\.d ?},za0h\.d\[w15,0:1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z22\.d ?- ?z23\.d ?},za6h\.d\[w13,0:1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z0\.b ?- ?z3\.b ?},za0h\.b\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z28\.b ?- ?z31\.b ?},za0h\.b\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z0\.b ?- ?z3\.b ?},za0v\.b\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z0\.b ?- ?z3\.b ?},za0h\.b\[w15,0:3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z0\.b ?- ?z3\.b ?},za0h\.b\[w12,12:15\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z12\.b ?- ?z15\.b ?},za0h\.b\[w14,8:11\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z0\.h ?- ?z3\.h ?},za0h\.h\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z28\.h ?- ?z31\.h ?},za0h\.h\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z0\.h ?- ?z3\.h ?},za0v\.h\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z0\.h ?- ?z3\.h ?},za1h\.h\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z0\.h ?- ?z3\.h ?},za1v\.h\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z0\.h ?- ?z3\.h ?},za0h\.h\[w15,0:3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z0\.h ?- ?z3\.h ?},za0h\.h\[w12,4:7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z16\.h ?- ?z19\.h ?},za0h\.h\[w13,4:7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z0\.s ?- ?z3\.s ?},za0h\.s\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z28\.s ?- ?z31\.s ?},za0h\.s\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z0\.s ?- ?z3\.s ?},za0v\.s\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z0\.s ?- ?z3\.s ?},za3h\.s\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z0\.s ?- ?z3\.s ?},za3v\.s\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z0\.s ?- ?z3\.s ?},za0h\.s\[w15,0:3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z20\.s ?- ?z23\.s ?},za2h\.s\[w13,0:3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z0\.d ?- ?z3\.d ?},za0h\.d\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z28\.d ?- ?z31\.d ?},za0h\.d\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z0\.d ?- ?z3\.d ?},za0v\.d\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z0\.d ?- ?z3\.d ?},za7h\.d\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z0\.d ?- ?z3\.d ?},za7v\.d\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z0\.d ?- ?z3\.d ?},za0h\.d\[w15,0:3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z24\.d ?- ?z27\.d ?},za5h\.d\[w13,0:3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za\.b\[w8,0\],{ ?z0\.b ?- ?z1\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za\.h\[w8,0\],{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za\.s\[w8,0\],{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za\.d\[w8,0\],{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za\.d\[w11,0\],{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za\.d\[w8,7\],{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za\.d\[w8,0\],{ ?z30\.d ?- ?z31\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za\.d\[w9,5\],{ ?z2\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za\.b\[w8,0\],{ ?z0\.b ?- ?z3\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za\.h\[w8,0\],{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za\.s\[w8,0\],{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za\.d\[w8,0\],{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za\.d\[w11,0\],{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za\.d\[w8,7\],{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za\.d\[w8,0\],{ ?z28\.d ?- ?z31\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za\.d\[w10,1\],{ ?z20\.d ?- ?z23\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.b\[w12,0:1\],{ ?z0\.b ?- ?z1\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za0v\.b\[w12,0:1\],{ ?z0\.b ?- ?z1\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.b\[w15,0:1\],{ ?z0\.b ?- ?z1\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.b\[w12,14:15\],{ ?z0\.b ?- ?z1\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.b\[w12,0:1\],{ ?z30\.b ?- ?z31\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.b\[w14,6:7\],{ ?z8\.b ?- ?z9\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.h\[w12,0:1\],{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za0v\.h\[w12,0:1\],{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za1h\.h\[w12,0:1\],{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za1v\.h\[w12,0:1\],{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.h\[w15,0:1\],{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.h\[w12,6:7\],{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.h\[w12,0:1\],{ ?z30\.h ?- ?z31\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.h\[w13,2:3\],{ ?z10\.h ?- ?z11\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.s\[w12,0:1\],{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za0v\.s\[w12,0:1\],{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za3h\.s\[w12,0:1\],{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za3v\.s\[w12,0:1\],{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.s\[w15,0:1\],{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.s\[w12,2:3\],{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.s\[w12,0:1\],{ ?z30\.s ?- ?z31\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za2h\.s\[w14,0:1\],{ ?z18\.s ?- ?z19\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.d\[w12,0:1\],{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za0v\.d\[w12,0:1\],{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za7h\.d\[w12,0:1\],{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za7v\.d\[w12,0:1\],{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.d\[w15,0:1\],{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.d\[w12,0:1\],{ ?z30\.d ?- ?z31\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za6h\.d\[w13,0:1\],{ ?z22\.d ?- ?z23\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.b\[w12,0:3\],{ ?z0\.b ?- ?z3\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za0v\.b\[w12,0:3\],{ ?z0\.b ?- ?z3\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.b\[w15,0:3\],{ ?z0\.b ?- ?z3\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.b\[w12,12:15\],{ ?z0\.b ?- ?z3\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.b\[w12,0:3\],{ ?z28\.b ?- ?z31\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.b\[w14,8:11\],{ ?z12\.b ?- ?z15\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.h\[w12,0:3\],{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za0v\.h\[w12,0:3\],{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za1h\.h\[w12,0:3\],{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za1v\.h\[w12,0:3\],{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.h\[w15,0:3\],{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.h\[w12,4:7\],{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.h\[w12,0:3\],{ ?z28\.h ?- ?z31\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.h\[w13,4:7\],{ ?z16\.h ?- ?z19\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.s\[w12,0:3\],{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za0v\.s\[w12,0:3\],{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za3h\.s\[w12,0:3\],{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za3v\.s\[w12,0:3\],{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.s\[w15,0:3\],{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.s\[w12,0:3\],{ ?z28\.s ?- ?z31\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za2h\.s\[w13,0:3\],{ ?z20\.s ?- ?z23\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.d\[w12,0:3\],{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za0v\.d\[w12,0:3\],{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za7h\.d\[w12,0:3\],{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za7v\.d\[w12,0:3\],{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.d\[w15,0:3\],{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.d\[w12,0:3\],{ ?z28\.d ?- ?z31\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za5h\.d\[w13,0:3\],{ ?z24\.d ?- ?z27\.d ?}'
diff --git a/gas/testsuite/gas/aarch64/sme2-10-invalid.l b/gas/testsuite/gas/aarch64/sme2-10-invalid.l
index d0309ba..1e7784f 100644
--- a/gas/testsuite/gas/aarch64/sme2-10-invalid.l
+++ b/gas/testsuite/gas/aarch64/sme2-10-invalid.l
@@ -1,67 +1,67 @@
 [^ :]+: Assembler messages:
-[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `fmax 0,{z0\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: expected '{' at operand 2 -- `fmax {z0\.h-z1\.h},0,z0\.h'
-[^ :]+:[0-9]+: Error: expected a register or register list at operand 3 -- `fmax {z0\.h-z1\.h},{z0\.h-z1\.h},0'
-[^ :]+:[0-9]+: Error: operand mismatch -- `fmax {z0\.b-z1\.b},{z0\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `fmax 0,{ ?z0\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: expected '{' at operand 2 -- `fmax { ?z0\.h ?- ?z1\.h ?},0,z0\.h'
+[^ :]+:[0-9]+: Error: expected a register or register list at operand 3 -- `fmax { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?},0'
+[^ :]+:[0-9]+: Error: operand mismatch -- `fmax { ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?},z0\.b'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	fmax {z0\.h-z1\.h}, {z0\.h-z1\.h}, z0\.h
 [^ :]+:[0-9]+: Info:    other valid variant\(s\):
 [^ :]+:[0-9]+: Info:    	fmax {z0\.s-z1\.s}, {z0\.s-z1\.s}, z0\.s
 [^ :]+:[0-9]+: Info:    	fmax {z0\.d-z1\.d}, {z0\.d-z1\.d}, z0\.d
-[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `fmax {z0\.h-z1\.h},{z0\.h-z2\.h},z0\.h'
-[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `fmax {z0\.h-z1\.h},{z0\.h-z3\.h},z0\.h'
-[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `fmax {z0\.h-z1\.h},{z0\.h,z8\.h},z0\.h'
-[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 1 -- `fmax {z0\.h-z2\.h},{z0\.h-z2\.h},z0\.h'
-[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `fmax {z0\.h-z1\.h},{z2\.h-z3\.h},z0\.h'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `fmax {z1\.h-z2\.h},{z1\.h-z2\.h},z0\.h'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `fmax {z31\.h,z0\.h},{z31\.h,z0\.h},z0\.h'
-[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `fmax {z0\.h-z1\.h},{z0\.h-z1\.h},z16\.h'
-[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `fmax {z0\.h-z1\.h},{z0\.h-z1\.h},z31\.h'
-[^ :]+:[0-9]+: Error: operand mismatch -- `fmax {z0\.b-z3\.b},{z0\.b-z3\.b},z0\.b'
+[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `fmax { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z2\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `fmax { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z3\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `fmax { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h,z8\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 1 -- `fmax { ?z0\.h ?- ?z2\.h ?},{ ?z0\.h ?- ?z2\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `fmax { ?z0\.h ?- ?z1\.h ?},{ ?z2\.h ?- ?z3\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `fmax { ?z1\.h ?- ?z2\.h ?},{ ?z1\.h ?- ?z2\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `fmax { ?z31\.h,z0\.h ?},{ ?z31\.h,z0\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: z0 ?- ?z15 expected at operand 3 -- `fmax { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?},z16\.h'
+[^ :]+:[0-9]+: Error: z0 ?- ?z15 expected at operand 3 -- `fmax { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?},z31\.h'
+[^ :]+:[0-9]+: Error: operand mismatch -- `fmax { ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?},z0\.b'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	fmax {z0\.h-z3\.h}, {z0\.h-z3\.h}, z0\.h
 [^ :]+:[0-9]+: Info:    other valid variant\(s\):
 [^ :]+:[0-9]+: Info:    	fmax {z0\.s-z3\.s}, {z0\.s-z3\.s}, z0\.s
 [^ :]+:[0-9]+: Info:    	fmax {z0\.d-z3\.d}, {z0\.d-z3\.d}, z0\.d
-[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `fmax {z0\.h-z3\.h},{z0\.h-z2\.h},z0\.h'
-[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `fmax {z0\.h-z3\.h},{z0\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `fmax {z0\.h-z3\.h},{z2\.h-z5\.h},z0\.h'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `fmax {z1\.h-z4\.h},{z1\.h-z4\.h},z0\.h'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `fmax {z2\.h-z5\.h},{z2\.h-z5\.h},z0\.h'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `fmax {z3\.h-z6\.h},{z3\.h-z6\.h},z0\.h'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `fmax {z31\.h,z0\.h,z1\.h,z2\.h},{z31\.h,z0\.h,z1\.h,z2\.h},z0\.h'
-[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `fmax {z0\.h-z3\.h},{z0\.h-z3\.h},z16\.h'
-[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `fmax {z0\.h-z3\.h},{z0\.h-z3\.h},z31\.h'
-[^ :]+:[0-9]+: Error: operand mismatch -- `fmax {z0\.b-z1\.b},{z0\.b-z1\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `fmax { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z2\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `fmax { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `fmax { ?z0\.h ?- ?z3\.h ?},{ ?z2\.h ?- ?z5\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `fmax { ?z1\.h ?- ?z4\.h ?},{ ?z1\.h ?- ?z4\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `fmax { ?z2\.h ?- ?z5\.h ?},{ ?z2\.h ?- ?z5\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `fmax { ?z3\.h ?- ?z6\.h ?},{ ?z3\.h ?- ?z6\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `fmax { ?z31\.h,z0\.h,z1\.h,z2\.h ?},{ ?z31\.h,z0\.h,z1\.h,z2\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: z0 ?- ?z15 expected at operand 3 -- `fmax { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?},z16\.h'
+[^ :]+:[0-9]+: Error: z0 ?- ?z15 expected at operand 3 -- `fmax { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?},z31\.h'
+[^ :]+:[0-9]+: Error: operand mismatch -- `fmax { ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?}'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	fmax {z0\.h-z1\.h}, {z0\.h-z1\.h}, {z0\.h-z1\.h}
 [^ :]+:[0-9]+: Info:    other valid variant\(s\):
 [^ :]+:[0-9]+: Info:    	fmax {z0\.s-z1\.s}, {z0\.s-z1\.s}, {z0\.s-z1\.s}
 [^ :]+:[0-9]+: Info:    	fmax {z0\.d-z1\.d}, {z0\.d-z1\.d}, {z0\.d-z1\.d}
-[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `fmax {z0\.h-z1\.h},{z0\.h-z2\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `fmax {z0\.h-z1\.h},{z0\.h-z3\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `fmax {z0\.h-z1\.h},{z0\.h-z1\.h},{z0\.h-z2\.h}'
-[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `fmax {z0\.h-z1\.h},{z0\.h-z1\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 1 -- `fmax {z0\.h-z2\.h},{z0\.h-z2\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `fmax {z0\.h-z1\.h},{z2\.h-z3\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `fmax {z1\.h-z2\.h},{z1\.h-z2\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `fmax {z0\.h-z1\.h},{z0\.h-z1\.h},{z1\.h-z2\.h}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `fmax {z31\.h,z0\.h},{z31\.h,z0\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `fmax {z0\.h-z1\.h},{z0\.h-z1\.h},{z31\.h,z0\.h}'
-[^ :]+:[0-9]+: Error: operand mismatch -- `fmax {z0\.b-z3\.b},{z0\.b-z3\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `fmax { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z2\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `fmax { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `fmax { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z2\.h ?}'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `fmax { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 1 -- `fmax { ?z0\.h ?- ?z2\.h ?},{ ?z0\.h ?- ?z2\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `fmax { ?z0\.h ?- ?z1\.h ?},{ ?z2\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `fmax { ?z1\.h ?- ?z2\.h ?},{ ?z1\.h ?- ?z2\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `fmax { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?},{ ?z1\.h ?- ?z2\.h ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `fmax { ?z31\.h,z0\.h ?},{ ?z31\.h,z0\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `fmax { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?},{ ?z31\.h,z0\.h ?}'
+[^ :]+:[0-9]+: Error: operand mismatch -- `fmax { ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?}'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	fmax {z0\.h-z3\.h}, {z0\.h-z3\.h}, {z0\.h-z3\.h}
 [^ :]+:[0-9]+: Info:    other valid variant\(s\):
 [^ :]+:[0-9]+: Info:    	fmax {z0\.s-z3\.s}, {z0\.s-z3\.s}, {z0\.s-z3\.s}
 [^ :]+:[0-9]+: Info:    	fmax {z0\.d-z3\.d}, {z0\.d-z3\.d}, {z0\.d-z3\.d}
-[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `fmax {z0\.h-z3\.h},{z0\.h-z1\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `fmax {z0\.h-z3\.h},{z0\.h-z2\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `fmax {z0\.h-z3\.h},{z0\.h-z3\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `fmax {z0\.h-z3\.h},{z0\.h-z3\.h},{z0\.h-z2\.h}'
-[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `fmax {z0\.h-z3\.h},{z4\.h-z7\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `fmax {z1\.h-z4\.h},{z1\.h-z4\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `fmax {z2\.h-z5\.h},{z2\.h-z5\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `fmax {z3\.h-z6\.h},{z3\.h-z6\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `fmax {z0\.h-z3\.h},{z0\.h-z3\.h},{z1\.h-z4\.h}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `fmax {z0\.h-z3\.h},{z0\.h-z3\.h},{z2\.h-z5\.h}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `fmax {z0\.h-z3\.h},{z0\.h-z3\.h},{z3\.h-z6\.h}'
+[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `fmax { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `fmax { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z2\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `fmax { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `fmax { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z2\.h ?}'
+[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `fmax { ?z0\.h ?- ?z3\.h ?},{ ?z4\.h ?- ?z7\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `fmax { ?z1\.h ?- ?z4\.h ?},{ ?z1\.h ?- ?z4\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `fmax { ?z2\.h ?- ?z5\.h ?},{ ?z2\.h ?- ?z5\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `fmax { ?z3\.h ?- ?z6\.h ?},{ ?z3\.h ?- ?z6\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `fmax { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?},{ ?z1\.h ?- ?z4\.h ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `fmax { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?},{ ?z2\.h ?- ?z5\.h ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `fmax { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?},{ ?z3\.h ?- ?z6\.h ?}'
diff --git a/gas/testsuite/gas/aarch64/sme2-10-noarch.l b/gas/testsuite/gas/aarch64/sme2-10-noarch.l
index 9320767..58a40f0 100644
--- a/gas/testsuite/gas/aarch64/sme2-10-noarch.l
+++ b/gas/testsuite/gas/aarch64/sme2-10-noarch.l
@@ -1,641 +1,641 @@
 [^ :]+: Assembler messages:
-[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.h-z1\.h},{z0\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z30\.h-z31\.h},{z30\.h-z31\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.h-z1\.h},{z0\.h-z1\.h},z15\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z6\.h-z7\.h},{z6\.h-z7\.h},z6\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.s-z1\.s},{z0\.s-z1\.s},z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z30\.s-z31\.s},{z30\.s-z31\.s},z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.s-z1\.s},{z0\.s-z1\.s},z15\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z18\.s-z19\.s},{z18\.s-z19\.s},z5\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.d-z1\.d},{z0\.d-z1\.d},z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z30\.d-z31\.d},{z30\.d-z31\.d},z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.d-z1\.d},{z0\.d-z1\.d},z15\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z22\.d-z23\.d},{z22\.d-z23\.d},z8\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.h-z3\.h},{z0\.h-z3\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z28\.h-z31\.h},{z28\.h-z31\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.h-z3\.h},{z0\.h-z3\.h},z15\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z12\.h-z15\.h},{z12\.h-z15\.h},z12\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.s-z3\.s},{z0\.s-z3\.s},z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z28\.s-z31\.s},{z28\.s-z31\.s},z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.s-z3\.s},{z0\.s-z3\.s},z15\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z8\.s-z11\.s},{z8\.s-z11\.s},z7\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.d-z3\.d},{z0\.d-z3\.d},z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z28\.d-z31\.d},{z28\.d-z31\.d},z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.d-z3\.d},{z0\.d-z3\.d},z15\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z24\.d-z27\.d},{z24\.d-z27\.d},z13\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.h-z1\.h},{z0\.h-z1\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z30\.h-z31\.h},{z30\.h-z31\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.h-z1\.h},{z0\.h-z1\.h},{z30\.h-z31\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z18\.h-z19\.h},{z18\.h-z19\.h},{z26\.h-z27\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.s-z1\.s},{z0\.s-z1\.s},{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z30\.s-z31\.s},{z30\.s-z31\.s},{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.s-z1\.s},{z0\.s-z1\.s},{z30\.s-z31\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z4\.s-z5\.s},{z4\.s-z5\.s},{z10\.s-z11\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.d-z1\.d},{z0\.d-z1\.d},{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z30\.d-z31\.d},{z30\.d-z31\.d},{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.d-z1\.d},{z0\.d-z1\.d},{z30\.d-z31\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z28\.d-z29\.d},{z28\.d-z29\.d},{z8\.d-z9\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.h-z3\.h},{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z28\.h-z31\.h},{z28\.h-z31\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.h-z3\.h},{z0\.h-z3\.h},{z28\.h-z31\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z16\.h-z19\.h},{z16\.h-z19\.h},{z20\.h-z23\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.s-z3\.s},{z0\.s-z3\.s},{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z28\.s-z31\.s},{z28\.s-z31\.s},{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.s-z3\.s},{z0\.s-z3\.s},{z28\.s-z31\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z24\.s-z27\.s},{z24\.s-z27\.s},{z4\.s-z7\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.d-z3\.d},{z0\.d-z3\.d},{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z28\.d-z31\.d},{z28\.d-z31\.d},{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.d-z3\.d},{z0\.d-z3\.d},{z28\.d-z31\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z12\.d-z15\.d},{z12\.d-z15\.d},{z8\.d-z11\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.h-z1\.h},{z0\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z30\.h-z31\.h},{z30\.h-z31\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.h-z1\.h},{z0\.h-z1\.h},z15\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z6\.h-z7\.h},{z6\.h-z7\.h},z6\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.s-z1\.s},{z0\.s-z1\.s},z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z30\.s-z31\.s},{z30\.s-z31\.s},z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.s-z1\.s},{z0\.s-z1\.s},z15\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z18\.s-z19\.s},{z18\.s-z19\.s},z5\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.d-z1\.d},{z0\.d-z1\.d},z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z30\.d-z31\.d},{z30\.d-z31\.d},z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.d-z1\.d},{z0\.d-z1\.d},z15\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z22\.d-z23\.d},{z22\.d-z23\.d},z8\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.h-z3\.h},{z0\.h-z3\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z28\.h-z31\.h},{z28\.h-z31\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.h-z3\.h},{z0\.h-z3\.h},z15\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z12\.h-z15\.h},{z12\.h-z15\.h},z12\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.s-z3\.s},{z0\.s-z3\.s},z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z28\.s-z31\.s},{z28\.s-z31\.s},z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.s-z3\.s},{z0\.s-z3\.s},z15\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z8\.s-z11\.s},{z8\.s-z11\.s},z7\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.d-z3\.d},{z0\.d-z3\.d},z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z28\.d-z31\.d},{z28\.d-z31\.d},z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.d-z3\.d},{z0\.d-z3\.d},z15\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z24\.d-z27\.d},{z24\.d-z27\.d},z13\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.h-z1\.h},{z0\.h-z1\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z30\.h-z31\.h},{z30\.h-z31\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.h-z1\.h},{z0\.h-z1\.h},{z30\.h-z31\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z18\.h-z19\.h},{z18\.h-z19\.h},{z26\.h-z27\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.s-z1\.s},{z0\.s-z1\.s},{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z30\.s-z31\.s},{z30\.s-z31\.s},{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.s-z1\.s},{z0\.s-z1\.s},{z30\.s-z31\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z4\.s-z5\.s},{z4\.s-z5\.s},{z10\.s-z11\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.d-z1\.d},{z0\.d-z1\.d},{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z30\.d-z31\.d},{z30\.d-z31\.d},{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.d-z1\.d},{z0\.d-z1\.d},{z30\.d-z31\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z28\.d-z29\.d},{z28\.d-z29\.d},{z8\.d-z9\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.h-z3\.h},{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z28\.h-z31\.h},{z28\.h-z31\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.h-z3\.h},{z0\.h-z3\.h},{z28\.h-z31\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z16\.h-z19\.h},{z16\.h-z19\.h},{z20\.h-z23\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.s-z3\.s},{z0\.s-z3\.s},{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z28\.s-z31\.s},{z28\.s-z31\.s},{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.s-z3\.s},{z0\.s-z3\.s},{z28\.s-z31\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z24\.s-z27\.s},{z24\.s-z27\.s},{z4\.s-z7\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.d-z3\.d},{z0\.d-z3\.d},{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z28\.d-z31\.d},{z28\.d-z31\.d},{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.d-z3\.d},{z0\.d-z3\.d},{z28\.d-z31\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z12\.d-z15\.d},{z12\.d-z15\.d},{z8\.d-z11\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.h-z1\.h},{z0\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z30\.h-z31\.h},{z30\.h-z31\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.h-z1\.h},{z0\.h-z1\.h},z15\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z6\.h-z7\.h},{z6\.h-z7\.h},z6\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.s-z1\.s},{z0\.s-z1\.s},z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z30\.s-z31\.s},{z30\.s-z31\.s},z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.s-z1\.s},{z0\.s-z1\.s},z15\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z18\.s-z19\.s},{z18\.s-z19\.s},z5\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.d-z1\.d},{z0\.d-z1\.d},z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z30\.d-z31\.d},{z30\.d-z31\.d},z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.d-z1\.d},{z0\.d-z1\.d},z15\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z22\.d-z23\.d},{z22\.d-z23\.d},z8\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.h-z3\.h},{z0\.h-z3\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z28\.h-z31\.h},{z28\.h-z31\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.h-z3\.h},{z0\.h-z3\.h},z15\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z12\.h-z15\.h},{z12\.h-z15\.h},z12\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.s-z3\.s},{z0\.s-z3\.s},z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z28\.s-z31\.s},{z28\.s-z31\.s},z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.s-z3\.s},{z0\.s-z3\.s},z15\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z8\.s-z11\.s},{z8\.s-z11\.s},z7\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.d-z3\.d},{z0\.d-z3\.d},z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z28\.d-z31\.d},{z28\.d-z31\.d},z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.d-z3\.d},{z0\.d-z3\.d},z15\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z24\.d-z27\.d},{z24\.d-z27\.d},z13\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.h-z1\.h},{z0\.h-z1\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z30\.h-z31\.h},{z30\.h-z31\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.h-z1\.h},{z0\.h-z1\.h},{z30\.h-z31\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z18\.h-z19\.h},{z18\.h-z19\.h},{z26\.h-z27\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.s-z1\.s},{z0\.s-z1\.s},{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z30\.s-z31\.s},{z30\.s-z31\.s},{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.s-z1\.s},{z0\.s-z1\.s},{z30\.s-z31\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z4\.s-z5\.s},{z4\.s-z5\.s},{z10\.s-z11\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.d-z1\.d},{z0\.d-z1\.d},{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z30\.d-z31\.d},{z30\.d-z31\.d},{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.d-z1\.d},{z0\.d-z1\.d},{z30\.d-z31\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z28\.d-z29\.d},{z28\.d-z29\.d},{z8\.d-z9\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.h-z3\.h},{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z28\.h-z31\.h},{z28\.h-z31\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.h-z3\.h},{z0\.h-z3\.h},{z28\.h-z31\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z16\.h-z19\.h},{z16\.h-z19\.h},{z20\.h-z23\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.s-z3\.s},{z0\.s-z3\.s},{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z28\.s-z31\.s},{z28\.s-z31\.s},{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.s-z3\.s},{z0\.s-z3\.s},{z28\.s-z31\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z24\.s-z27\.s},{z24\.s-z27\.s},{z4\.s-z7\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.d-z3\.d},{z0\.d-z3\.d},{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z28\.d-z31\.d},{z28\.d-z31\.d},{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.d-z3\.d},{z0\.d-z3\.d},{z28\.d-z31\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z12\.d-z15\.d},{z12\.d-z15\.d},{z8\.d-z11\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.h-z1\.h},{z0\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z30\.h-z31\.h},{z30\.h-z31\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.h-z1\.h},{z0\.h-z1\.h},z15\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z6\.h-z7\.h},{z6\.h-z7\.h},z6\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.s-z1\.s},{z0\.s-z1\.s},z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z30\.s-z31\.s},{z30\.s-z31\.s},z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.s-z1\.s},{z0\.s-z1\.s},z15\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z18\.s-z19\.s},{z18\.s-z19\.s},z5\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.d-z1\.d},{z0\.d-z1\.d},z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z30\.d-z31\.d},{z30\.d-z31\.d},z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.d-z1\.d},{z0\.d-z1\.d},z15\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z22\.d-z23\.d},{z22\.d-z23\.d},z8\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.h-z3\.h},{z0\.h-z3\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z28\.h-z31\.h},{z28\.h-z31\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.h-z3\.h},{z0\.h-z3\.h},z15\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z12\.h-z15\.h},{z12\.h-z15\.h},z12\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.s-z3\.s},{z0\.s-z3\.s},z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z28\.s-z31\.s},{z28\.s-z31\.s},z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.s-z3\.s},{z0\.s-z3\.s},z15\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z8\.s-z11\.s},{z8\.s-z11\.s},z7\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.d-z3\.d},{z0\.d-z3\.d},z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z28\.d-z31\.d},{z28\.d-z31\.d},z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.d-z3\.d},{z0\.d-z3\.d},z15\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z24\.d-z27\.d},{z24\.d-z27\.d},z13\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.h-z1\.h},{z0\.h-z1\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z30\.h-z31\.h},{z30\.h-z31\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.h-z1\.h},{z0\.h-z1\.h},{z30\.h-z31\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z18\.h-z19\.h},{z18\.h-z19\.h},{z26\.h-z27\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.s-z1\.s},{z0\.s-z1\.s},{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z30\.s-z31\.s},{z30\.s-z31\.s},{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.s-z1\.s},{z0\.s-z1\.s},{z30\.s-z31\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z4\.s-z5\.s},{z4\.s-z5\.s},{z10\.s-z11\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.d-z1\.d},{z0\.d-z1\.d},{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z30\.d-z31\.d},{z30\.d-z31\.d},{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.d-z1\.d},{z0\.d-z1\.d},{z30\.d-z31\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z28\.d-z29\.d},{z28\.d-z29\.d},{z8\.d-z9\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.h-z3\.h},{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z28\.h-z31\.h},{z28\.h-z31\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.h-z3\.h},{z0\.h-z3\.h},{z28\.h-z31\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z16\.h-z19\.h},{z16\.h-z19\.h},{z20\.h-z23\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.s-z3\.s},{z0\.s-z3\.s},{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z28\.s-z31\.s},{z28\.s-z31\.s},{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.s-z3\.s},{z0\.s-z3\.s},{z28\.s-z31\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z24\.s-z27\.s},{z24\.s-z27\.s},{z4\.s-z7\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.d-z3\.d},{z0\.d-z3\.d},{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z28\.d-z31\.d},{z28\.d-z31\.d},{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.d-z3\.d},{z0\.d-z3\.d},{z28\.d-z31\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z12\.d-z15\.d},{z12\.d-z15\.d},{z8\.d-z11\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.b-z1\.b},{z0\.b-z1\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `smax {z30\.b-z31\.b},{z30\.b-z31\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.b-z1\.b},{z0\.b-z1\.b},z15\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `smax {z2\.b-z3\.b},{z2\.b-z3\.b},z9\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.h-z1\.h},{z0\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `smax {z30\.h-z31\.h},{z30\.h-z31\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.h-z1\.h},{z0\.h-z1\.h},z15\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `smax {z6\.h-z7\.h},{z6\.h-z7\.h},z6\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.s-z1\.s},{z0\.s-z1\.s},z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `smax {z30\.s-z31\.s},{z30\.s-z31\.s},z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.s-z1\.s},{z0\.s-z1\.s},z15\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `smax {z18\.s-z19\.s},{z18\.s-z19\.s},z5\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.d-z1\.d},{z0\.d-z1\.d},z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `smax {z30\.d-z31\.d},{z30\.d-z31\.d},z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.d-z1\.d},{z0\.d-z1\.d},z15\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `smax {z22\.d-z23\.d},{z22\.d-z23\.d},z8\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.b-z3\.b},{z0\.b-z3\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `smax {z28\.b-z31\.b},{z28\.b-z31\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.b-z3\.b},{z0\.b-z3\.b},z15\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `smax {z4\.b-z7\.b},{z4\.b-z7\.b},z7\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.h-z3\.h},{z0\.h-z3\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `smax {z28\.h-z31\.h},{z28\.h-z31\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.h-z3\.h},{z0\.h-z3\.h},z15\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `smax {z12\.h-z15\.h},{z12\.h-z15\.h},z12\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.s-z3\.s},{z0\.s-z3\.s},z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `smax {z28\.s-z31\.s},{z28\.s-z31\.s},z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.s-z3\.s},{z0\.s-z3\.s},z15\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `smax {z8\.s-z11\.s},{z8\.s-z11\.s},z7\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.d-z3\.d},{z0\.d-z3\.d},z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `smax {z28\.d-z31\.d},{z28\.d-z31\.d},z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.d-z3\.d},{z0\.d-z3\.d},z15\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `smax {z24\.d-z27\.d},{z24\.d-z27\.d},z13\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.b-z1\.b},{z0\.b-z1\.b},{z0\.b-z1\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smax {z30\.b-z31\.b},{z30\.b-z31\.b},{z0\.b-z1\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.b-z1\.b},{z0\.b-z1\.b},{z30\.b-z31\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smax {z14\.b-z15\.b},{z14\.b-z15\.b},{z20\.b-z21\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.h-z1\.h},{z0\.h-z1\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smax {z30\.h-z31\.h},{z30\.h-z31\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.h-z1\.h},{z0\.h-z1\.h},{z30\.h-z31\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smax {z18\.h-z19\.h},{z18\.h-z19\.h},{z26\.h-z27\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.s-z1\.s},{z0\.s-z1\.s},{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smax {z30\.s-z31\.s},{z30\.s-z31\.s},{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.s-z1\.s},{z0\.s-z1\.s},{z30\.s-z31\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smax {z4\.s-z5\.s},{z4\.s-z5\.s},{z10\.s-z11\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.d-z1\.d},{z0\.d-z1\.d},{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smax {z30\.d-z31\.d},{z30\.d-z31\.d},{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.d-z1\.d},{z0\.d-z1\.d},{z30\.d-z31\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smax {z28\.d-z29\.d},{z28\.d-z29\.d},{z8\.d-z9\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.b-z3\.b},{z0\.b-z3\.b},{z0\.b-z3\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smax {z28\.b-z31\.b},{z28\.b-z31\.b},{z0\.b-z3\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.b-z3\.b},{z0\.b-z3\.b},{z28\.b-z31\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smax {z8\.b-z11\.b},{z8\.b-z11\.b},{z12\.b-z15\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.h-z3\.h},{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smax {z28\.h-z31\.h},{z28\.h-z31\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.h-z3\.h},{z0\.h-z3\.h},{z28\.h-z31\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smax {z16\.h-z19\.h},{z16\.h-z19\.h},{z20\.h-z23\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.s-z3\.s},{z0\.s-z3\.s},{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smax {z28\.s-z31\.s},{z28\.s-z31\.s},{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.s-z3\.s},{z0\.s-z3\.s},{z28\.s-z31\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smax {z24\.s-z27\.s},{z24\.s-z27\.s},{z4\.s-z7\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.d-z3\.d},{z0\.d-z3\.d},{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smax {z28\.d-z31\.d},{z28\.d-z31\.d},{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.d-z3\.d},{z0\.d-z3\.d},{z28\.d-z31\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smax {z12\.d-z15\.d},{z12\.d-z15\.d},{z8\.d-z11\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.b-z1\.b},{z0\.b-z1\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `smin {z30\.b-z31\.b},{z30\.b-z31\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.b-z1\.b},{z0\.b-z1\.b},z15\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `smin {z2\.b-z3\.b},{z2\.b-z3\.b},z9\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.h-z1\.h},{z0\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `smin {z30\.h-z31\.h},{z30\.h-z31\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.h-z1\.h},{z0\.h-z1\.h},z15\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `smin {z6\.h-z7\.h},{z6\.h-z7\.h},z6\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.s-z1\.s},{z0\.s-z1\.s},z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `smin {z30\.s-z31\.s},{z30\.s-z31\.s},z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.s-z1\.s},{z0\.s-z1\.s},z15\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `smin {z18\.s-z19\.s},{z18\.s-z19\.s},z5\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.d-z1\.d},{z0\.d-z1\.d},z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `smin {z30\.d-z31\.d},{z30\.d-z31\.d},z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.d-z1\.d},{z0\.d-z1\.d},z15\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `smin {z22\.d-z23\.d},{z22\.d-z23\.d},z8\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.b-z3\.b},{z0\.b-z3\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `smin {z28\.b-z31\.b},{z28\.b-z31\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.b-z3\.b},{z0\.b-z3\.b},z15\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `smin {z4\.b-z7\.b},{z4\.b-z7\.b},z7\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.h-z3\.h},{z0\.h-z3\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `smin {z28\.h-z31\.h},{z28\.h-z31\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.h-z3\.h},{z0\.h-z3\.h},z15\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `smin {z12\.h-z15\.h},{z12\.h-z15\.h},z12\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.s-z3\.s},{z0\.s-z3\.s},z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `smin {z28\.s-z31\.s},{z28\.s-z31\.s},z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.s-z3\.s},{z0\.s-z3\.s},z15\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `smin {z8\.s-z11\.s},{z8\.s-z11\.s},z7\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.d-z3\.d},{z0\.d-z3\.d},z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `smin {z28\.d-z31\.d},{z28\.d-z31\.d},z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.d-z3\.d},{z0\.d-z3\.d},z15\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `smin {z24\.d-z27\.d},{z24\.d-z27\.d},z13\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.b-z1\.b},{z0\.b-z1\.b},{z0\.b-z1\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smin {z30\.b-z31\.b},{z30\.b-z31\.b},{z0\.b-z1\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.b-z1\.b},{z0\.b-z1\.b},{z30\.b-z31\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smin {z14\.b-z15\.b},{z14\.b-z15\.b},{z20\.b-z21\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.h-z1\.h},{z0\.h-z1\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smin {z30\.h-z31\.h},{z30\.h-z31\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.h-z1\.h},{z0\.h-z1\.h},{z30\.h-z31\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smin {z18\.h-z19\.h},{z18\.h-z19\.h},{z26\.h-z27\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.s-z1\.s},{z0\.s-z1\.s},{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smin {z30\.s-z31\.s},{z30\.s-z31\.s},{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.s-z1\.s},{z0\.s-z1\.s},{z30\.s-z31\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smin {z4\.s-z5\.s},{z4\.s-z5\.s},{z10\.s-z11\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.d-z1\.d},{z0\.d-z1\.d},{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smin {z30\.d-z31\.d},{z30\.d-z31\.d},{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.d-z1\.d},{z0\.d-z1\.d},{z30\.d-z31\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smin {z28\.d-z29\.d},{z28\.d-z29\.d},{z8\.d-z9\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.b-z3\.b},{z0\.b-z3\.b},{z0\.b-z3\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smin {z28\.b-z31\.b},{z28\.b-z31\.b},{z0\.b-z3\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.b-z3\.b},{z0\.b-z3\.b},{z28\.b-z31\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smin {z8\.b-z11\.b},{z8\.b-z11\.b},{z12\.b-z15\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.h-z3\.h},{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smin {z28\.h-z31\.h},{z28\.h-z31\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.h-z3\.h},{z0\.h-z3\.h},{z28\.h-z31\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smin {z16\.h-z19\.h},{z16\.h-z19\.h},{z20\.h-z23\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.s-z3\.s},{z0\.s-z3\.s},{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smin {z28\.s-z31\.s},{z28\.s-z31\.s},{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.s-z3\.s},{z0\.s-z3\.s},{z28\.s-z31\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smin {z24\.s-z27\.s},{z24\.s-z27\.s},{z4\.s-z7\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.d-z3\.d},{z0\.d-z3\.d},{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smin {z28\.d-z31\.d},{z28\.d-z31\.d},{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.d-z3\.d},{z0\.d-z3\.d},{z28\.d-z31\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smin {z12\.d-z15\.d},{z12\.d-z15\.d},{z8\.d-z11\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.b-z1\.b},{z0\.b-z1\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z30\.b-z31\.b},{z30\.b-z31\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.b-z1\.b},{z0\.b-z1\.b},z15\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z2\.b-z3\.b},{z2\.b-z3\.b},z9\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.h-z1\.h},{z0\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z30\.h-z31\.h},{z30\.h-z31\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.h-z1\.h},{z0\.h-z1\.h},z15\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z6\.h-z7\.h},{z6\.h-z7\.h},z6\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.s-z1\.s},{z0\.s-z1\.s},z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z30\.s-z31\.s},{z30\.s-z31\.s},z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.s-z1\.s},{z0\.s-z1\.s},z15\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z18\.s-z19\.s},{z18\.s-z19\.s},z5\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.d-z1\.d},{z0\.d-z1\.d},z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z30\.d-z31\.d},{z30\.d-z31\.d},z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.d-z1\.d},{z0\.d-z1\.d},z15\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z22\.d-z23\.d},{z22\.d-z23\.d},z8\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.b-z3\.b},{z0\.b-z3\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z28\.b-z31\.b},{z28\.b-z31\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.b-z3\.b},{z0\.b-z3\.b},z15\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z4\.b-z7\.b},{z4\.b-z7\.b},z7\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.h-z3\.h},{z0\.h-z3\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z28\.h-z31\.h},{z28\.h-z31\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.h-z3\.h},{z0\.h-z3\.h},z15\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z12\.h-z15\.h},{z12\.h-z15\.h},z12\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.s-z3\.s},{z0\.s-z3\.s},z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z28\.s-z31\.s},{z28\.s-z31\.s},z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.s-z3\.s},{z0\.s-z3\.s},z15\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z8\.s-z11\.s},{z8\.s-z11\.s},z7\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.d-z3\.d},{z0\.d-z3\.d},z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z28\.d-z31\.d},{z28\.d-z31\.d},z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.d-z3\.d},{z0\.d-z3\.d},z15\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z24\.d-z27\.d},{z24\.d-z27\.d},z13\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.b-z1\.b},{z0\.b-z1\.b},{z0\.b-z1\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z30\.b-z31\.b},{z30\.b-z31\.b},{z0\.b-z1\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.b-z1\.b},{z0\.b-z1\.b},{z30\.b-z31\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z14\.b-z15\.b},{z14\.b-z15\.b},{z20\.b-z21\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.h-z1\.h},{z0\.h-z1\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z30\.h-z31\.h},{z30\.h-z31\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.h-z1\.h},{z0\.h-z1\.h},{z30\.h-z31\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z18\.h-z19\.h},{z18\.h-z19\.h},{z26\.h-z27\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.s-z1\.s},{z0\.s-z1\.s},{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z30\.s-z31\.s},{z30\.s-z31\.s},{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.s-z1\.s},{z0\.s-z1\.s},{z30\.s-z31\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z4\.s-z5\.s},{z4\.s-z5\.s},{z10\.s-z11\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.d-z1\.d},{z0\.d-z1\.d},{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z30\.d-z31\.d},{z30\.d-z31\.d},{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.d-z1\.d},{z0\.d-z1\.d},{z30\.d-z31\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z28\.d-z29\.d},{z28\.d-z29\.d},{z8\.d-z9\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.b-z3\.b},{z0\.b-z3\.b},{z0\.b-z3\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z28\.b-z31\.b},{z28\.b-z31\.b},{z0\.b-z3\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.b-z3\.b},{z0\.b-z3\.b},{z28\.b-z31\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z8\.b-z11\.b},{z8\.b-z11\.b},{z12\.b-z15\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.h-z3\.h},{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z28\.h-z31\.h},{z28\.h-z31\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.h-z3\.h},{z0\.h-z3\.h},{z28\.h-z31\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z16\.h-z19\.h},{z16\.h-z19\.h},{z20\.h-z23\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.s-z3\.s},{z0\.s-z3\.s},{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z28\.s-z31\.s},{z28\.s-z31\.s},{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.s-z3\.s},{z0\.s-z3\.s},{z28\.s-z31\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z24\.s-z27\.s},{z24\.s-z27\.s},{z4\.s-z7\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.d-z3\.d},{z0\.d-z3\.d},{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z28\.d-z31\.d},{z28\.d-z31\.d},{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.d-z3\.d},{z0\.d-z3\.d},{z28\.d-z31\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z12\.d-z15\.d},{z12\.d-z15\.d},{z8\.d-z11\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.b-z1\.b},{z0\.b-z1\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z30\.b-z31\.b},{z30\.b-z31\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.b-z1\.b},{z0\.b-z1\.b},z15\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z2\.b-z3\.b},{z2\.b-z3\.b},z9\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.h-z1\.h},{z0\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z30\.h-z31\.h},{z30\.h-z31\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.h-z1\.h},{z0\.h-z1\.h},z15\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z6\.h-z7\.h},{z6\.h-z7\.h},z6\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.s-z1\.s},{z0\.s-z1\.s},z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z30\.s-z31\.s},{z30\.s-z31\.s},z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.s-z1\.s},{z0\.s-z1\.s},z15\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z18\.s-z19\.s},{z18\.s-z19\.s},z5\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.d-z1\.d},{z0\.d-z1\.d},z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z30\.d-z31\.d},{z30\.d-z31\.d},z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.d-z1\.d},{z0\.d-z1\.d},z15\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z22\.d-z23\.d},{z22\.d-z23\.d},z8\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.b-z3\.b},{z0\.b-z3\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z28\.b-z31\.b},{z28\.b-z31\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.b-z3\.b},{z0\.b-z3\.b},z15\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z4\.b-z7\.b},{z4\.b-z7\.b},z7\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.h-z3\.h},{z0\.h-z3\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z28\.h-z31\.h},{z28\.h-z31\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.h-z3\.h},{z0\.h-z3\.h},z15\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z12\.h-z15\.h},{z12\.h-z15\.h},z12\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.s-z3\.s},{z0\.s-z3\.s},z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z28\.s-z31\.s},{z28\.s-z31\.s},z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.s-z3\.s},{z0\.s-z3\.s},z15\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z8\.s-z11\.s},{z8\.s-z11\.s},z7\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.d-z3\.d},{z0\.d-z3\.d},z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z28\.d-z31\.d},{z28\.d-z31\.d},z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.d-z3\.d},{z0\.d-z3\.d},z15\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z24\.d-z27\.d},{z24\.d-z27\.d},z13\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.b-z1\.b},{z0\.b-z1\.b},{z0\.b-z1\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z30\.b-z31\.b},{z30\.b-z31\.b},{z0\.b-z1\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.b-z1\.b},{z0\.b-z1\.b},{z30\.b-z31\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z14\.b-z15\.b},{z14\.b-z15\.b},{z20\.b-z21\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.h-z1\.h},{z0\.h-z1\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z30\.h-z31\.h},{z30\.h-z31\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.h-z1\.h},{z0\.h-z1\.h},{z30\.h-z31\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z18\.h-z19\.h},{z18\.h-z19\.h},{z26\.h-z27\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.s-z1\.s},{z0\.s-z1\.s},{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z30\.s-z31\.s},{z30\.s-z31\.s},{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.s-z1\.s},{z0\.s-z1\.s},{z30\.s-z31\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z4\.s-z5\.s},{z4\.s-z5\.s},{z10\.s-z11\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.d-z1\.d},{z0\.d-z1\.d},{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z30\.d-z31\.d},{z30\.d-z31\.d},{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.d-z1\.d},{z0\.d-z1\.d},{z30\.d-z31\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z28\.d-z29\.d},{z28\.d-z29\.d},{z8\.d-z9\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.b-z3\.b},{z0\.b-z3\.b},{z0\.b-z3\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z28\.b-z31\.b},{z28\.b-z31\.b},{z0\.b-z3\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.b-z3\.b},{z0\.b-z3\.b},{z28\.b-z31\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z8\.b-z11\.b},{z8\.b-z11\.b},{z12\.b-z15\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.h-z3\.h},{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z28\.h-z31\.h},{z28\.h-z31\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.h-z3\.h},{z0\.h-z3\.h},{z28\.h-z31\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z16\.h-z19\.h},{z16\.h-z19\.h},{z20\.h-z23\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.s-z3\.s},{z0\.s-z3\.s},{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z28\.s-z31\.s},{z28\.s-z31\.s},{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.s-z3\.s},{z0\.s-z3\.s},{z28\.s-z31\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z24\.s-z27\.s},{z24\.s-z27\.s},{z4\.s-z7\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.d-z3\.d},{z0\.d-z3\.d},{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z28\.d-z31\.d},{z28\.d-z31\.d},{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.d-z3\.d},{z0\.d-z3\.d},{z28\.d-z31\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z12\.d-z15\.d},{z12\.d-z15\.d},{z8\.d-z11\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.b-z1\.b},{z0\.b-z1\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `umax {z30\.b-z31\.b},{z30\.b-z31\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.b-z1\.b},{z0\.b-z1\.b},z15\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `umax {z2\.b-z3\.b},{z2\.b-z3\.b},z9\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.h-z1\.h},{z0\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `umax {z30\.h-z31\.h},{z30\.h-z31\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.h-z1\.h},{z0\.h-z1\.h},z15\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `umax {z6\.h-z7\.h},{z6\.h-z7\.h},z6\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.s-z1\.s},{z0\.s-z1\.s},z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `umax {z30\.s-z31\.s},{z30\.s-z31\.s},z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.s-z1\.s},{z0\.s-z1\.s},z15\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `umax {z18\.s-z19\.s},{z18\.s-z19\.s},z5\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.d-z1\.d},{z0\.d-z1\.d},z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `umax {z30\.d-z31\.d},{z30\.d-z31\.d},z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.d-z1\.d},{z0\.d-z1\.d},z15\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `umax {z22\.d-z23\.d},{z22\.d-z23\.d},z8\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.b-z3\.b},{z0\.b-z3\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `umax {z28\.b-z31\.b},{z28\.b-z31\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.b-z3\.b},{z0\.b-z3\.b},z15\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `umax {z4\.b-z7\.b},{z4\.b-z7\.b},z7\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.h-z3\.h},{z0\.h-z3\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `umax {z28\.h-z31\.h},{z28\.h-z31\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.h-z3\.h},{z0\.h-z3\.h},z15\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `umax {z12\.h-z15\.h},{z12\.h-z15\.h},z12\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.s-z3\.s},{z0\.s-z3\.s},z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `umax {z28\.s-z31\.s},{z28\.s-z31\.s},z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.s-z3\.s},{z0\.s-z3\.s},z15\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `umax {z8\.s-z11\.s},{z8\.s-z11\.s},z7\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.d-z3\.d},{z0\.d-z3\.d},z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `umax {z28\.d-z31\.d},{z28\.d-z31\.d},z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.d-z3\.d},{z0\.d-z3\.d},z15\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `umax {z24\.d-z27\.d},{z24\.d-z27\.d},z13\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.b-z1\.b},{z0\.b-z1\.b},{z0\.b-z1\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umax {z30\.b-z31\.b},{z30\.b-z31\.b},{z0\.b-z1\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.b-z1\.b},{z0\.b-z1\.b},{z30\.b-z31\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umax {z14\.b-z15\.b},{z14\.b-z15\.b},{z20\.b-z21\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.h-z1\.h},{z0\.h-z1\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umax {z30\.h-z31\.h},{z30\.h-z31\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.h-z1\.h},{z0\.h-z1\.h},{z30\.h-z31\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umax {z18\.h-z19\.h},{z18\.h-z19\.h},{z26\.h-z27\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.s-z1\.s},{z0\.s-z1\.s},{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umax {z30\.s-z31\.s},{z30\.s-z31\.s},{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.s-z1\.s},{z0\.s-z1\.s},{z30\.s-z31\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umax {z4\.s-z5\.s},{z4\.s-z5\.s},{z10\.s-z11\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.d-z1\.d},{z0\.d-z1\.d},{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umax {z30\.d-z31\.d},{z30\.d-z31\.d},{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.d-z1\.d},{z0\.d-z1\.d},{z30\.d-z31\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umax {z28\.d-z29\.d},{z28\.d-z29\.d},{z8\.d-z9\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.b-z3\.b},{z0\.b-z3\.b},{z0\.b-z3\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umax {z28\.b-z31\.b},{z28\.b-z31\.b},{z0\.b-z3\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.b-z3\.b},{z0\.b-z3\.b},{z28\.b-z31\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umax {z8\.b-z11\.b},{z8\.b-z11\.b},{z12\.b-z15\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.h-z3\.h},{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umax {z28\.h-z31\.h},{z28\.h-z31\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.h-z3\.h},{z0\.h-z3\.h},{z28\.h-z31\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umax {z16\.h-z19\.h},{z16\.h-z19\.h},{z20\.h-z23\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.s-z3\.s},{z0\.s-z3\.s},{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umax {z28\.s-z31\.s},{z28\.s-z31\.s},{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.s-z3\.s},{z0\.s-z3\.s},{z28\.s-z31\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umax {z24\.s-z27\.s},{z24\.s-z27\.s},{z4\.s-z7\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.d-z3\.d},{z0\.d-z3\.d},{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umax {z28\.d-z31\.d},{z28\.d-z31\.d},{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.d-z3\.d},{z0\.d-z3\.d},{z28\.d-z31\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umax {z12\.d-z15\.d},{z12\.d-z15\.d},{z8\.d-z11\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.b-z1\.b},{z0\.b-z1\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `umin {z30\.b-z31\.b},{z30\.b-z31\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.b-z1\.b},{z0\.b-z1\.b},z15\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `umin {z2\.b-z3\.b},{z2\.b-z3\.b},z9\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.h-z1\.h},{z0\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `umin {z30\.h-z31\.h},{z30\.h-z31\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.h-z1\.h},{z0\.h-z1\.h},z15\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `umin {z6\.h-z7\.h},{z6\.h-z7\.h},z6\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.s-z1\.s},{z0\.s-z1\.s},z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `umin {z30\.s-z31\.s},{z30\.s-z31\.s},z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.s-z1\.s},{z0\.s-z1\.s},z15\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `umin {z18\.s-z19\.s},{z18\.s-z19\.s},z5\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.d-z1\.d},{z0\.d-z1\.d},z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `umin {z30\.d-z31\.d},{z30\.d-z31\.d},z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.d-z1\.d},{z0\.d-z1\.d},z15\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `umin {z22\.d-z23\.d},{z22\.d-z23\.d},z8\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.b-z3\.b},{z0\.b-z3\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `umin {z28\.b-z31\.b},{z28\.b-z31\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.b-z3\.b},{z0\.b-z3\.b},z15\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `umin {z4\.b-z7\.b},{z4\.b-z7\.b},z7\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.h-z3\.h},{z0\.h-z3\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `umin {z28\.h-z31\.h},{z28\.h-z31\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.h-z3\.h},{z0\.h-z3\.h},z15\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `umin {z12\.h-z15\.h},{z12\.h-z15\.h},z12\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.s-z3\.s},{z0\.s-z3\.s},z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `umin {z28\.s-z31\.s},{z28\.s-z31\.s},z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.s-z3\.s},{z0\.s-z3\.s},z15\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `umin {z8\.s-z11\.s},{z8\.s-z11\.s},z7\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.d-z3\.d},{z0\.d-z3\.d},z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `umin {z28\.d-z31\.d},{z28\.d-z31\.d},z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.d-z3\.d},{z0\.d-z3\.d},z15\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `umin {z24\.d-z27\.d},{z24\.d-z27\.d},z13\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.b-z1\.b},{z0\.b-z1\.b},{z0\.b-z1\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umin {z30\.b-z31\.b},{z30\.b-z31\.b},{z0\.b-z1\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.b-z1\.b},{z0\.b-z1\.b},{z30\.b-z31\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umin {z14\.b-z15\.b},{z14\.b-z15\.b},{z20\.b-z21\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.h-z1\.h},{z0\.h-z1\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umin {z30\.h-z31\.h},{z30\.h-z31\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.h-z1\.h},{z0\.h-z1\.h},{z30\.h-z31\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umin {z18\.h-z19\.h},{z18\.h-z19\.h},{z26\.h-z27\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.s-z1\.s},{z0\.s-z1\.s},{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umin {z30\.s-z31\.s},{z30\.s-z31\.s},{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.s-z1\.s},{z0\.s-z1\.s},{z30\.s-z31\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umin {z4\.s-z5\.s},{z4\.s-z5\.s},{z10\.s-z11\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.d-z1\.d},{z0\.d-z1\.d},{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umin {z30\.d-z31\.d},{z30\.d-z31\.d},{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.d-z1\.d},{z0\.d-z1\.d},{z30\.d-z31\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umin {z28\.d-z29\.d},{z28\.d-z29\.d},{z8\.d-z9\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.b-z3\.b},{z0\.b-z3\.b},{z0\.b-z3\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umin {z28\.b-z31\.b},{z28\.b-z31\.b},{z0\.b-z3\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.b-z3\.b},{z0\.b-z3\.b},{z28\.b-z31\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umin {z8\.b-z11\.b},{z8\.b-z11\.b},{z12\.b-z15\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.h-z3\.h},{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umin {z28\.h-z31\.h},{z28\.h-z31\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.h-z3\.h},{z0\.h-z3\.h},{z28\.h-z31\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umin {z16\.h-z19\.h},{z16\.h-z19\.h},{z20\.h-z23\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.s-z3\.s},{z0\.s-z3\.s},{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umin {z28\.s-z31\.s},{z28\.s-z31\.s},{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.s-z3\.s},{z0\.s-z3\.s},{z28\.s-z31\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umin {z24\.s-z27\.s},{z24\.s-z27\.s},{z4\.s-z7\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.d-z3\.d},{z0\.d-z3\.d},{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umin {z28\.d-z31\.d},{z28\.d-z31\.d},{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.d-z3\.d},{z0\.d-z3\.d},{z28\.d-z31\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umin {z12\.d-z15\.d},{z12\.d-z15\.d},{z8\.d-z11\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.b-z1\.b},{z0\.b-z1\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z30\.b-z31\.b},{z30\.b-z31\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.b-z1\.b},{z0\.b-z1\.b},z15\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z2\.b-z3\.b},{z2\.b-z3\.b},z9\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.h-z1\.h},{z0\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z30\.h-z31\.h},{z30\.h-z31\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.h-z1\.h},{z0\.h-z1\.h},z15\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z6\.h-z7\.h},{z6\.h-z7\.h},z6\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.s-z1\.s},{z0\.s-z1\.s},z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z30\.s-z31\.s},{z30\.s-z31\.s},z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.s-z1\.s},{z0\.s-z1\.s},z15\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z18\.s-z19\.s},{z18\.s-z19\.s},z5\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.d-z1\.d},{z0\.d-z1\.d},z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z30\.d-z31\.d},{z30\.d-z31\.d},z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.d-z1\.d},{z0\.d-z1\.d},z15\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z22\.d-z23\.d},{z22\.d-z23\.d},z8\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.b-z3\.b},{z0\.b-z3\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z28\.b-z31\.b},{z28\.b-z31\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.b-z3\.b},{z0\.b-z3\.b},z15\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z4\.b-z7\.b},{z4\.b-z7\.b},z7\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.h-z3\.h},{z0\.h-z3\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z28\.h-z31\.h},{z28\.h-z31\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.h-z3\.h},{z0\.h-z3\.h},z15\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z12\.h-z15\.h},{z12\.h-z15\.h},z12\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.s-z3\.s},{z0\.s-z3\.s},z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z28\.s-z31\.s},{z28\.s-z31\.s},z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.s-z3\.s},{z0\.s-z3\.s},z15\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z8\.s-z11\.s},{z8\.s-z11\.s},z7\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.d-z3\.d},{z0\.d-z3\.d},z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z28\.d-z31\.d},{z28\.d-z31\.d},z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.d-z3\.d},{z0\.d-z3\.d},z15\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z24\.d-z27\.d},{z24\.d-z27\.d},z13\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.b-z1\.b},{z0\.b-z1\.b},{z0\.b-z1\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z30\.b-z31\.b},{z30\.b-z31\.b},{z0\.b-z1\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.b-z1\.b},{z0\.b-z1\.b},{z30\.b-z31\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z14\.b-z15\.b},{z14\.b-z15\.b},{z20\.b-z21\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.h-z1\.h},{z0\.h-z1\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z30\.h-z31\.h},{z30\.h-z31\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.h-z1\.h},{z0\.h-z1\.h},{z30\.h-z31\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z18\.h-z19\.h},{z18\.h-z19\.h},{z26\.h-z27\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.s-z1\.s},{z0\.s-z1\.s},{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z30\.s-z31\.s},{z30\.s-z31\.s},{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.s-z1\.s},{z0\.s-z1\.s},{z30\.s-z31\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z4\.s-z5\.s},{z4\.s-z5\.s},{z10\.s-z11\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.d-z1\.d},{z0\.d-z1\.d},{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z30\.d-z31\.d},{z30\.d-z31\.d},{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.d-z1\.d},{z0\.d-z1\.d},{z30\.d-z31\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z28\.d-z29\.d},{z28\.d-z29\.d},{z8\.d-z9\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.b-z3\.b},{z0\.b-z3\.b},{z0\.b-z3\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z28\.b-z31\.b},{z28\.b-z31\.b},{z0\.b-z3\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.b-z3\.b},{z0\.b-z3\.b},{z28\.b-z31\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z8\.b-z11\.b},{z8\.b-z11\.b},{z12\.b-z15\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.h-z3\.h},{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z28\.h-z31\.h},{z28\.h-z31\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.h-z3\.h},{z0\.h-z3\.h},{z28\.h-z31\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z16\.h-z19\.h},{z16\.h-z19\.h},{z20\.h-z23\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.s-z3\.s},{z0\.s-z3\.s},{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z28\.s-z31\.s},{z28\.s-z31\.s},{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.s-z3\.s},{z0\.s-z3\.s},{z28\.s-z31\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z24\.s-z27\.s},{z24\.s-z27\.s},{z4\.s-z7\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.d-z3\.d},{z0\.d-z3\.d},{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z28\.d-z31\.d},{z28\.d-z31\.d},{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.d-z3\.d},{z0\.d-z3\.d},{z28\.d-z31\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z12\.d-z15\.d},{z12\.d-z15\.d},{z8\.d-z11\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmax { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmax { ?z30\.h ?- ?z31\.h ?},{ ?z30\.h ?- ?z31\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmax { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmax { ?z6\.h ?- ?z7\.h ?},{ ?z6\.h ?- ?z7\.h ?},z6\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmax { ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmax { ?z30\.s ?- ?z31\.s ?},{ ?z30\.s ?- ?z31\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmax { ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?},z15\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmax { ?z18\.s ?- ?z19\.s ?},{ ?z18\.s ?- ?z19\.s ?},z5\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmax { ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmax { ?z30\.d ?- ?z31\.d ?},{ ?z30\.d ?- ?z31\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmax { ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?},z15\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmax { ?z22\.d ?- ?z23\.d ?},{ ?z22\.d ?- ?z23\.d ?},z8\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmax { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmax { ?z28\.h ?- ?z31\.h ?},{ ?z28\.h ?- ?z31\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmax { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmax { ?z12\.h ?- ?z15\.h ?},{ ?z12\.h ?- ?z15\.h ?},z12\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmax { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmax { ?z28\.s ?- ?z31\.s ?},{ ?z28\.s ?- ?z31\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmax { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?},z15\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmax { ?z8\.s ?- ?z11\.s ?},{ ?z8\.s ?- ?z11\.s ?},z7\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmax { ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmax { ?z28\.d ?- ?z31\.d ?},{ ?z28\.d ?- ?z31\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmax { ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?},z15\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmax { ?z24\.d ?- ?z27\.d ?},{ ?z24\.d ?- ?z27\.d ?},z13\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmax { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmax { ?z30\.h ?- ?z31\.h ?},{ ?z30\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmax { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?},{ ?z30\.h ?- ?z31\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmax { ?z18\.h ?- ?z19\.h ?},{ ?z18\.h ?- ?z19\.h ?},{ ?z26\.h ?- ?z27\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmax { ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmax { ?z30\.s ?- ?z31\.s ?},{ ?z30\.s ?- ?z31\.s ?},{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmax { ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?},{ ?z30\.s ?- ?z31\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmax { ?z4\.s ?- ?z5\.s ?},{ ?z4\.s ?- ?z5\.s ?},{ ?z10\.s ?- ?z11\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmax { ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmax { ?z30\.d ?- ?z31\.d ?},{ ?z30\.d ?- ?z31\.d ?},{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmax { ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?},{ ?z30\.d ?- ?z31\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmax { ?z28\.d ?- ?z29\.d ?},{ ?z28\.d ?- ?z29\.d ?},{ ?z8\.d ?- ?z9\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmax { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmax { ?z28\.h ?- ?z31\.h ?},{ ?z28\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmax { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?},{ ?z28\.h ?- ?z31\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmax { ?z16\.h ?- ?z19\.h ?},{ ?z16\.h ?- ?z19\.h ?},{ ?z20\.h ?- ?z23\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmax { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmax { ?z28\.s ?- ?z31\.s ?},{ ?z28\.s ?- ?z31\.s ?},{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmax { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?},{ ?z28\.s ?- ?z31\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmax { ?z24\.s ?- ?z27\.s ?},{ ?z24\.s ?- ?z27\.s ?},{ ?z4\.s ?- ?z7\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmax { ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmax { ?z28\.d ?- ?z31\.d ?},{ ?z28\.d ?- ?z31\.d ?},{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmax { ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?},{ ?z28\.d ?- ?z31\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmax { ?z12\.d ?- ?z15\.d ?},{ ?z12\.d ?- ?z15\.d ?},{ ?z8\.d ?- ?z11\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm { ?z30\.h ?- ?z31\.h ?},{ ?z30\.h ?- ?z31\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm { ?z6\.h ?- ?z7\.h ?},{ ?z6\.h ?- ?z7\.h ?},z6\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm { ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm { ?z30\.s ?- ?z31\.s ?},{ ?z30\.s ?- ?z31\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm { ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?},z15\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm { ?z18\.s ?- ?z19\.s ?},{ ?z18\.s ?- ?z19\.s ?},z5\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm { ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm { ?z30\.d ?- ?z31\.d ?},{ ?z30\.d ?- ?z31\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm { ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?},z15\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm { ?z22\.d ?- ?z23\.d ?},{ ?z22\.d ?- ?z23\.d ?},z8\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm { ?z28\.h ?- ?z31\.h ?},{ ?z28\.h ?- ?z31\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm { ?z12\.h ?- ?z15\.h ?},{ ?z12\.h ?- ?z15\.h ?},z12\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm { ?z28\.s ?- ?z31\.s ?},{ ?z28\.s ?- ?z31\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?},z15\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm { ?z8\.s ?- ?z11\.s ?},{ ?z8\.s ?- ?z11\.s ?},z7\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm { ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm { ?z28\.d ?- ?z31\.d ?},{ ?z28\.d ?- ?z31\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm { ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?},z15\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm { ?z24\.d ?- ?z27\.d ?},{ ?z24\.d ?- ?z27\.d ?},z13\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm { ?z30\.h ?- ?z31\.h ?},{ ?z30\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?},{ ?z30\.h ?- ?z31\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm { ?z18\.h ?- ?z19\.h ?},{ ?z18\.h ?- ?z19\.h ?},{ ?z26\.h ?- ?z27\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm { ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm { ?z30\.s ?- ?z31\.s ?},{ ?z30\.s ?- ?z31\.s ?},{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm { ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?},{ ?z30\.s ?- ?z31\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm { ?z4\.s ?- ?z5\.s ?},{ ?z4\.s ?- ?z5\.s ?},{ ?z10\.s ?- ?z11\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm { ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm { ?z30\.d ?- ?z31\.d ?},{ ?z30\.d ?- ?z31\.d ?},{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm { ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?},{ ?z30\.d ?- ?z31\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm { ?z28\.d ?- ?z29\.d ?},{ ?z28\.d ?- ?z29\.d ?},{ ?z8\.d ?- ?z9\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm { ?z28\.h ?- ?z31\.h ?},{ ?z28\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?},{ ?z28\.h ?- ?z31\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm { ?z16\.h ?- ?z19\.h ?},{ ?z16\.h ?- ?z19\.h ?},{ ?z20\.h ?- ?z23\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm { ?z28\.s ?- ?z31\.s ?},{ ?z28\.s ?- ?z31\.s ?},{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?},{ ?z28\.s ?- ?z31\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm { ?z24\.s ?- ?z27\.s ?},{ ?z24\.s ?- ?z27\.s ?},{ ?z4\.s ?- ?z7\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm { ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm { ?z28\.d ?- ?z31\.d ?},{ ?z28\.d ?- ?z31\.d ?},{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm { ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?},{ ?z28\.d ?- ?z31\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm { ?z12\.d ?- ?z15\.d ?},{ ?z12\.d ?- ?z15\.d ?},{ ?z8\.d ?- ?z11\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmin { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmin { ?z30\.h ?- ?z31\.h ?},{ ?z30\.h ?- ?z31\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmin { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmin { ?z6\.h ?- ?z7\.h ?},{ ?z6\.h ?- ?z7\.h ?},z6\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmin { ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmin { ?z30\.s ?- ?z31\.s ?},{ ?z30\.s ?- ?z31\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmin { ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?},z15\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmin { ?z18\.s ?- ?z19\.s ?},{ ?z18\.s ?- ?z19\.s ?},z5\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmin { ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmin { ?z30\.d ?- ?z31\.d ?},{ ?z30\.d ?- ?z31\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmin { ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?},z15\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmin { ?z22\.d ?- ?z23\.d ?},{ ?z22\.d ?- ?z23\.d ?},z8\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmin { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmin { ?z28\.h ?- ?z31\.h ?},{ ?z28\.h ?- ?z31\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmin { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmin { ?z12\.h ?- ?z15\.h ?},{ ?z12\.h ?- ?z15\.h ?},z12\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmin { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmin { ?z28\.s ?- ?z31\.s ?},{ ?z28\.s ?- ?z31\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmin { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?},z15\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmin { ?z8\.s ?- ?z11\.s ?},{ ?z8\.s ?- ?z11\.s ?},z7\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmin { ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmin { ?z28\.d ?- ?z31\.d ?},{ ?z28\.d ?- ?z31\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmin { ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?},z15\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmin { ?z24\.d ?- ?z27\.d ?},{ ?z24\.d ?- ?z27\.d ?},z13\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmin { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmin { ?z30\.h ?- ?z31\.h ?},{ ?z30\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmin { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?},{ ?z30\.h ?- ?z31\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmin { ?z18\.h ?- ?z19\.h ?},{ ?z18\.h ?- ?z19\.h ?},{ ?z26\.h ?- ?z27\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmin { ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmin { ?z30\.s ?- ?z31\.s ?},{ ?z30\.s ?- ?z31\.s ?},{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmin { ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?},{ ?z30\.s ?- ?z31\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmin { ?z4\.s ?- ?z5\.s ?},{ ?z4\.s ?- ?z5\.s ?},{ ?z10\.s ?- ?z11\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmin { ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmin { ?z30\.d ?- ?z31\.d ?},{ ?z30\.d ?- ?z31\.d ?},{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmin { ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?},{ ?z30\.d ?- ?z31\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmin { ?z28\.d ?- ?z29\.d ?},{ ?z28\.d ?- ?z29\.d ?},{ ?z8\.d ?- ?z9\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmin { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmin { ?z28\.h ?- ?z31\.h ?},{ ?z28\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmin { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?},{ ?z28\.h ?- ?z31\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmin { ?z16\.h ?- ?z19\.h ?},{ ?z16\.h ?- ?z19\.h ?},{ ?z20\.h ?- ?z23\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmin { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmin { ?z28\.s ?- ?z31\.s ?},{ ?z28\.s ?- ?z31\.s ?},{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmin { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?},{ ?z28\.s ?- ?z31\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmin { ?z24\.s ?- ?z27\.s ?},{ ?z24\.s ?- ?z27\.s ?},{ ?z4\.s ?- ?z7\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmin { ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmin { ?z28\.d ?- ?z31\.d ?},{ ?z28\.d ?- ?z31\.d ?},{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmin { ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?},{ ?z28\.d ?- ?z31\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmin { ?z12\.d ?- ?z15\.d ?},{ ?z12\.d ?- ?z15\.d ?},{ ?z8\.d ?- ?z11\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fminnm { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fminnm { ?z30\.h ?- ?z31\.h ?},{ ?z30\.h ?- ?z31\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fminnm { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fminnm { ?z6\.h ?- ?z7\.h ?},{ ?z6\.h ?- ?z7\.h ?},z6\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fminnm { ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fminnm { ?z30\.s ?- ?z31\.s ?},{ ?z30\.s ?- ?z31\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fminnm { ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?},z15\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fminnm { ?z18\.s ?- ?z19\.s ?},{ ?z18\.s ?- ?z19\.s ?},z5\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fminnm { ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fminnm { ?z30\.d ?- ?z31\.d ?},{ ?z30\.d ?- ?z31\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fminnm { ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?},z15\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fminnm { ?z22\.d ?- ?z23\.d ?},{ ?z22\.d ?- ?z23\.d ?},z8\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fminnm { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fminnm { ?z28\.h ?- ?z31\.h ?},{ ?z28\.h ?- ?z31\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fminnm { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fminnm { ?z12\.h ?- ?z15\.h ?},{ ?z12\.h ?- ?z15\.h ?},z12\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fminnm { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fminnm { ?z28\.s ?- ?z31\.s ?},{ ?z28\.s ?- ?z31\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fminnm { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?},z15\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fminnm { ?z8\.s ?- ?z11\.s ?},{ ?z8\.s ?- ?z11\.s ?},z7\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fminnm { ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fminnm { ?z28\.d ?- ?z31\.d ?},{ ?z28\.d ?- ?z31\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fminnm { ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?},z15\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fminnm { ?z24\.d ?- ?z27\.d ?},{ ?z24\.d ?- ?z27\.d ?},z13\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fminnm { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fminnm { ?z30\.h ?- ?z31\.h ?},{ ?z30\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fminnm { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?},{ ?z30\.h ?- ?z31\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fminnm { ?z18\.h ?- ?z19\.h ?},{ ?z18\.h ?- ?z19\.h ?},{ ?z26\.h ?- ?z27\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fminnm { ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fminnm { ?z30\.s ?- ?z31\.s ?},{ ?z30\.s ?- ?z31\.s ?},{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fminnm { ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?},{ ?z30\.s ?- ?z31\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fminnm { ?z4\.s ?- ?z5\.s ?},{ ?z4\.s ?- ?z5\.s ?},{ ?z10\.s ?- ?z11\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fminnm { ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fminnm { ?z30\.d ?- ?z31\.d ?},{ ?z30\.d ?- ?z31\.d ?},{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fminnm { ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?},{ ?z30\.d ?- ?z31\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fminnm { ?z28\.d ?- ?z29\.d ?},{ ?z28\.d ?- ?z29\.d ?},{ ?z8\.d ?- ?z9\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fminnm { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fminnm { ?z28\.h ?- ?z31\.h ?},{ ?z28\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fminnm { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?},{ ?z28\.h ?- ?z31\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fminnm { ?z16\.h ?- ?z19\.h ?},{ ?z16\.h ?- ?z19\.h ?},{ ?z20\.h ?- ?z23\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fminnm { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fminnm { ?z28\.s ?- ?z31\.s ?},{ ?z28\.s ?- ?z31\.s ?},{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fminnm { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?},{ ?z28\.s ?- ?z31\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fminnm { ?z24\.s ?- ?z27\.s ?},{ ?z24\.s ?- ?z27\.s ?},{ ?z4\.s ?- ?z7\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fminnm { ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fminnm { ?z28\.d ?- ?z31\.d ?},{ ?z28\.d ?- ?z31\.d ?},{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fminnm { ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?},{ ?z28\.d ?- ?z31\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fminnm { ?z12\.d ?- ?z15\.d ?},{ ?z12\.d ?- ?z15\.d ?},{ ?z8\.d ?- ?z11\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z30\.b ?- ?z31\.b ?},{ ?z30\.b ?- ?z31\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?},z15\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z2\.b ?- ?z3\.b ?},{ ?z2\.b ?- ?z3\.b ?},z9\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z30\.h ?- ?z31\.h ?},{ ?z30\.h ?- ?z31\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z6\.h ?- ?z7\.h ?},{ ?z6\.h ?- ?z7\.h ?},z6\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z30\.s ?- ?z31\.s ?},{ ?z30\.s ?- ?z31\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?},z15\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z18\.s ?- ?z19\.s ?},{ ?z18\.s ?- ?z19\.s ?},z5\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z30\.d ?- ?z31\.d ?},{ ?z30\.d ?- ?z31\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?},z15\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z22\.d ?- ?z23\.d ?},{ ?z22\.d ?- ?z23\.d ?},z8\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z28\.b ?- ?z31\.b ?},{ ?z28\.b ?- ?z31\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?},z15\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z4\.b ?- ?z7\.b ?},{ ?z4\.b ?- ?z7\.b ?},z7\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z28\.h ?- ?z31\.h ?},{ ?z28\.h ?- ?z31\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z12\.h ?- ?z15\.h ?},{ ?z12\.h ?- ?z15\.h ?},z12\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z28\.s ?- ?z31\.s ?},{ ?z28\.s ?- ?z31\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?},z15\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z8\.s ?- ?z11\.s ?},{ ?z8\.s ?- ?z11\.s ?},z7\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z28\.d ?- ?z31\.d ?},{ ?z28\.d ?- ?z31\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?},z15\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z24\.d ?- ?z27\.d ?},{ ?z24\.d ?- ?z27\.d ?},z13\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z30\.b ?- ?z31\.b ?},{ ?z30\.b ?- ?z31\.b ?},{ ?z0\.b ?- ?z1\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?},{ ?z30\.b ?- ?z31\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z14\.b ?- ?z15\.b ?},{ ?z14\.b ?- ?z15\.b ?},{ ?z20\.b ?- ?z21\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z30\.h ?- ?z31\.h ?},{ ?z30\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?},{ ?z30\.h ?- ?z31\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z18\.h ?- ?z19\.h ?},{ ?z18\.h ?- ?z19\.h ?},{ ?z26\.h ?- ?z27\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z30\.s ?- ?z31\.s ?},{ ?z30\.s ?- ?z31\.s ?},{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?},{ ?z30\.s ?- ?z31\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z4\.s ?- ?z5\.s ?},{ ?z4\.s ?- ?z5\.s ?},{ ?z10\.s ?- ?z11\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z30\.d ?- ?z31\.d ?},{ ?z30\.d ?- ?z31\.d ?},{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?},{ ?z30\.d ?- ?z31\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z28\.d ?- ?z29\.d ?},{ ?z28\.d ?- ?z29\.d ?},{ ?z8\.d ?- ?z9\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z28\.b ?- ?z31\.b ?},{ ?z28\.b ?- ?z31\.b ?},{ ?z0\.b ?- ?z3\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?},{ ?z28\.b ?- ?z31\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z8\.b ?- ?z11\.b ?},{ ?z8\.b ?- ?z11\.b ?},{ ?z12\.b ?- ?z15\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z28\.h ?- ?z31\.h ?},{ ?z28\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?},{ ?z28\.h ?- ?z31\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z16\.h ?- ?z19\.h ?},{ ?z16\.h ?- ?z19\.h ?},{ ?z20\.h ?- ?z23\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z28\.s ?- ?z31\.s ?},{ ?z28\.s ?- ?z31\.s ?},{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?},{ ?z28\.s ?- ?z31\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z24\.s ?- ?z27\.s ?},{ ?z24\.s ?- ?z27\.s ?},{ ?z4\.s ?- ?z7\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z28\.d ?- ?z31\.d ?},{ ?z28\.d ?- ?z31\.d ?},{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?},{ ?z28\.d ?- ?z31\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z12\.d ?- ?z15\.d ?},{ ?z12\.d ?- ?z15\.d ?},{ ?z8\.d ?- ?z11\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z30\.b ?- ?z31\.b ?},{ ?z30\.b ?- ?z31\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?},z15\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z2\.b ?- ?z3\.b ?},{ ?z2\.b ?- ?z3\.b ?},z9\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z30\.h ?- ?z31\.h ?},{ ?z30\.h ?- ?z31\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z6\.h ?- ?z7\.h ?},{ ?z6\.h ?- ?z7\.h ?},z6\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z30\.s ?- ?z31\.s ?},{ ?z30\.s ?- ?z31\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?},z15\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z18\.s ?- ?z19\.s ?},{ ?z18\.s ?- ?z19\.s ?},z5\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z30\.d ?- ?z31\.d ?},{ ?z30\.d ?- ?z31\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?},z15\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z22\.d ?- ?z23\.d ?},{ ?z22\.d ?- ?z23\.d ?},z8\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z28\.b ?- ?z31\.b ?},{ ?z28\.b ?- ?z31\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?},z15\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z4\.b ?- ?z7\.b ?},{ ?z4\.b ?- ?z7\.b ?},z7\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z28\.h ?- ?z31\.h ?},{ ?z28\.h ?- ?z31\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z12\.h ?- ?z15\.h ?},{ ?z12\.h ?- ?z15\.h ?},z12\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z28\.s ?- ?z31\.s ?},{ ?z28\.s ?- ?z31\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?},z15\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z8\.s ?- ?z11\.s ?},{ ?z8\.s ?- ?z11\.s ?},z7\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z28\.d ?- ?z31\.d ?},{ ?z28\.d ?- ?z31\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?},z15\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z24\.d ?- ?z27\.d ?},{ ?z24\.d ?- ?z27\.d ?},z13\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z30\.b ?- ?z31\.b ?},{ ?z30\.b ?- ?z31\.b ?},{ ?z0\.b ?- ?z1\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?},{ ?z30\.b ?- ?z31\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z14\.b ?- ?z15\.b ?},{ ?z14\.b ?- ?z15\.b ?},{ ?z20\.b ?- ?z21\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z30\.h ?- ?z31\.h ?},{ ?z30\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?},{ ?z30\.h ?- ?z31\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z18\.h ?- ?z19\.h ?},{ ?z18\.h ?- ?z19\.h ?},{ ?z26\.h ?- ?z27\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z30\.s ?- ?z31\.s ?},{ ?z30\.s ?- ?z31\.s ?},{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?},{ ?z30\.s ?- ?z31\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z4\.s ?- ?z5\.s ?},{ ?z4\.s ?- ?z5\.s ?},{ ?z10\.s ?- ?z11\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z30\.d ?- ?z31\.d ?},{ ?z30\.d ?- ?z31\.d ?},{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?},{ ?z30\.d ?- ?z31\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z28\.d ?- ?z29\.d ?},{ ?z28\.d ?- ?z29\.d ?},{ ?z8\.d ?- ?z9\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z28\.b ?- ?z31\.b ?},{ ?z28\.b ?- ?z31\.b ?},{ ?z0\.b ?- ?z3\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?},{ ?z28\.b ?- ?z31\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z8\.b ?- ?z11\.b ?},{ ?z8\.b ?- ?z11\.b ?},{ ?z12\.b ?- ?z15\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z28\.h ?- ?z31\.h ?},{ ?z28\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?},{ ?z28\.h ?- ?z31\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z16\.h ?- ?z19\.h ?},{ ?z16\.h ?- ?z19\.h ?},{ ?z20\.h ?- ?z23\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z28\.s ?- ?z31\.s ?},{ ?z28\.s ?- ?z31\.s ?},{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?},{ ?z28\.s ?- ?z31\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z24\.s ?- ?z27\.s ?},{ ?z24\.s ?- ?z27\.s ?},{ ?z4\.s ?- ?z7\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z28\.d ?- ?z31\.d ?},{ ?z28\.d ?- ?z31\.d ?},{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?},{ ?z28\.d ?- ?z31\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z12\.d ?- ?z15\.d ?},{ ?z12\.d ?- ?z15\.d ?},{ ?z8\.d ?- ?z11\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z30\.b ?- ?z31\.b ?},{ ?z30\.b ?- ?z31\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?},z15\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z2\.b ?- ?z3\.b ?},{ ?z2\.b ?- ?z3\.b ?},z9\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z30\.h ?- ?z31\.h ?},{ ?z30\.h ?- ?z31\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z6\.h ?- ?z7\.h ?},{ ?z6\.h ?- ?z7\.h ?},z6\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z30\.s ?- ?z31\.s ?},{ ?z30\.s ?- ?z31\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?},z15\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z18\.s ?- ?z19\.s ?},{ ?z18\.s ?- ?z19\.s ?},z5\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z30\.d ?- ?z31\.d ?},{ ?z30\.d ?- ?z31\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?},z15\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z22\.d ?- ?z23\.d ?},{ ?z22\.d ?- ?z23\.d ?},z8\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z28\.b ?- ?z31\.b ?},{ ?z28\.b ?- ?z31\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?},z15\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z4\.b ?- ?z7\.b ?},{ ?z4\.b ?- ?z7\.b ?},z7\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z28\.h ?- ?z31\.h ?},{ ?z28\.h ?- ?z31\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z12\.h ?- ?z15\.h ?},{ ?z12\.h ?- ?z15\.h ?},z12\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z28\.s ?- ?z31\.s ?},{ ?z28\.s ?- ?z31\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?},z15\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z8\.s ?- ?z11\.s ?},{ ?z8\.s ?- ?z11\.s ?},z7\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z28\.d ?- ?z31\.d ?},{ ?z28\.d ?- ?z31\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?},z15\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z24\.d ?- ?z27\.d ?},{ ?z24\.d ?- ?z27\.d ?},z13\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z30\.b ?- ?z31\.b ?},{ ?z30\.b ?- ?z31\.b ?},{ ?z0\.b ?- ?z1\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?},{ ?z30\.b ?- ?z31\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z14\.b ?- ?z15\.b ?},{ ?z14\.b ?- ?z15\.b ?},{ ?z20\.b ?- ?z21\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z30\.h ?- ?z31\.h ?},{ ?z30\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?},{ ?z30\.h ?- ?z31\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z18\.h ?- ?z19\.h ?},{ ?z18\.h ?- ?z19\.h ?},{ ?z26\.h ?- ?z27\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z30\.s ?- ?z31\.s ?},{ ?z30\.s ?- ?z31\.s ?},{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?},{ ?z30\.s ?- ?z31\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z4\.s ?- ?z5\.s ?},{ ?z4\.s ?- ?z5\.s ?},{ ?z10\.s ?- ?z11\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z30\.d ?- ?z31\.d ?},{ ?z30\.d ?- ?z31\.d ?},{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?},{ ?z30\.d ?- ?z31\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z28\.d ?- ?z29\.d ?},{ ?z28\.d ?- ?z29\.d ?},{ ?z8\.d ?- ?z9\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z28\.b ?- ?z31\.b ?},{ ?z28\.b ?- ?z31\.b ?},{ ?z0\.b ?- ?z3\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?},{ ?z28\.b ?- ?z31\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z8\.b ?- ?z11\.b ?},{ ?z8\.b ?- ?z11\.b ?},{ ?z12\.b ?- ?z15\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z28\.h ?- ?z31\.h ?},{ ?z28\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?},{ ?z28\.h ?- ?z31\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z16\.h ?- ?z19\.h ?},{ ?z16\.h ?- ?z19\.h ?},{ ?z20\.h ?- ?z23\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z28\.s ?- ?z31\.s ?},{ ?z28\.s ?- ?z31\.s ?},{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?},{ ?z28\.s ?- ?z31\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z24\.s ?- ?z27\.s ?},{ ?z24\.s ?- ?z27\.s ?},{ ?z4\.s ?- ?z7\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z28\.d ?- ?z31\.d ?},{ ?z28\.d ?- ?z31\.d ?},{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?},{ ?z28\.d ?- ?z31\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z12\.d ?- ?z15\.d ?},{ ?z12\.d ?- ?z15\.d ?},{ ?z8\.d ?- ?z11\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z30\.b ?- ?z31\.b ?},{ ?z30\.b ?- ?z31\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?},z15\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z2\.b ?- ?z3\.b ?},{ ?z2\.b ?- ?z3\.b ?},z9\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z30\.h ?- ?z31\.h ?},{ ?z30\.h ?- ?z31\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z6\.h ?- ?z7\.h ?},{ ?z6\.h ?- ?z7\.h ?},z6\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z30\.s ?- ?z31\.s ?},{ ?z30\.s ?- ?z31\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?},z15\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z18\.s ?- ?z19\.s ?},{ ?z18\.s ?- ?z19\.s ?},z5\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z30\.d ?- ?z31\.d ?},{ ?z30\.d ?- ?z31\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?},z15\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z22\.d ?- ?z23\.d ?},{ ?z22\.d ?- ?z23\.d ?},z8\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z28\.b ?- ?z31\.b ?},{ ?z28\.b ?- ?z31\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?},z15\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z4\.b ?- ?z7\.b ?},{ ?z4\.b ?- ?z7\.b ?},z7\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z28\.h ?- ?z31\.h ?},{ ?z28\.h ?- ?z31\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z12\.h ?- ?z15\.h ?},{ ?z12\.h ?- ?z15\.h ?},z12\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z28\.s ?- ?z31\.s ?},{ ?z28\.s ?- ?z31\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?},z15\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z8\.s ?- ?z11\.s ?},{ ?z8\.s ?- ?z11\.s ?},z7\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z28\.d ?- ?z31\.d ?},{ ?z28\.d ?- ?z31\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?},z15\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z24\.d ?- ?z27\.d ?},{ ?z24\.d ?- ?z27\.d ?},z13\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z30\.b ?- ?z31\.b ?},{ ?z30\.b ?- ?z31\.b ?},{ ?z0\.b ?- ?z1\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?},{ ?z30\.b ?- ?z31\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z14\.b ?- ?z15\.b ?},{ ?z14\.b ?- ?z15\.b ?},{ ?z20\.b ?- ?z21\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z30\.h ?- ?z31\.h ?},{ ?z30\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?},{ ?z30\.h ?- ?z31\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z18\.h ?- ?z19\.h ?},{ ?z18\.h ?- ?z19\.h ?},{ ?z26\.h ?- ?z27\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z30\.s ?- ?z31\.s ?},{ ?z30\.s ?- ?z31\.s ?},{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?},{ ?z30\.s ?- ?z31\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z4\.s ?- ?z5\.s ?},{ ?z4\.s ?- ?z5\.s ?},{ ?z10\.s ?- ?z11\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z30\.d ?- ?z31\.d ?},{ ?z30\.d ?- ?z31\.d ?},{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?},{ ?z30\.d ?- ?z31\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z28\.d ?- ?z29\.d ?},{ ?z28\.d ?- ?z29\.d ?},{ ?z8\.d ?- ?z9\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z28\.b ?- ?z31\.b ?},{ ?z28\.b ?- ?z31\.b ?},{ ?z0\.b ?- ?z3\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?},{ ?z28\.b ?- ?z31\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z8\.b ?- ?z11\.b ?},{ ?z8\.b ?- ?z11\.b ?},{ ?z12\.b ?- ?z15\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z28\.h ?- ?z31\.h ?},{ ?z28\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?},{ ?z28\.h ?- ?z31\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z16\.h ?- ?z19\.h ?},{ ?z16\.h ?- ?z19\.h ?},{ ?z20\.h ?- ?z23\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z28\.s ?- ?z31\.s ?},{ ?z28\.s ?- ?z31\.s ?},{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?},{ ?z28\.s ?- ?z31\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z24\.s ?- ?z27\.s ?},{ ?z24\.s ?- ?z27\.s ?},{ ?z4\.s ?- ?z7\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z28\.d ?- ?z31\.d ?},{ ?z28\.d ?- ?z31\.d ?},{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?},{ ?z28\.d ?- ?z31\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z12\.d ?- ?z15\.d ?},{ ?z12\.d ?- ?z15\.d ?},{ ?z8\.d ?- ?z11\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z30\.b ?- ?z31\.b ?},{ ?z30\.b ?- ?z31\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?},z15\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z2\.b ?- ?z3\.b ?},{ ?z2\.b ?- ?z3\.b ?},z9\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z30\.h ?- ?z31\.h ?},{ ?z30\.h ?- ?z31\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z6\.h ?- ?z7\.h ?},{ ?z6\.h ?- ?z7\.h ?},z6\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z30\.s ?- ?z31\.s ?},{ ?z30\.s ?- ?z31\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?},z15\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z18\.s ?- ?z19\.s ?},{ ?z18\.s ?- ?z19\.s ?},z5\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z30\.d ?- ?z31\.d ?},{ ?z30\.d ?- ?z31\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?},z15\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z22\.d ?- ?z23\.d ?},{ ?z22\.d ?- ?z23\.d ?},z8\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z28\.b ?- ?z31\.b ?},{ ?z28\.b ?- ?z31\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?},z15\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z4\.b ?- ?z7\.b ?},{ ?z4\.b ?- ?z7\.b ?},z7\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z28\.h ?- ?z31\.h ?},{ ?z28\.h ?- ?z31\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z12\.h ?- ?z15\.h ?},{ ?z12\.h ?- ?z15\.h ?},z12\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z28\.s ?- ?z31\.s ?},{ ?z28\.s ?- ?z31\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?},z15\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z8\.s ?- ?z11\.s ?},{ ?z8\.s ?- ?z11\.s ?},z7\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z28\.d ?- ?z31\.d ?},{ ?z28\.d ?- ?z31\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?},z15\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z24\.d ?- ?z27\.d ?},{ ?z24\.d ?- ?z27\.d ?},z13\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z30\.b ?- ?z31\.b ?},{ ?z30\.b ?- ?z31\.b ?},{ ?z0\.b ?- ?z1\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?},{ ?z30\.b ?- ?z31\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z14\.b ?- ?z15\.b ?},{ ?z14\.b ?- ?z15\.b ?},{ ?z20\.b ?- ?z21\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z30\.h ?- ?z31\.h ?},{ ?z30\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?},{ ?z30\.h ?- ?z31\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z18\.h ?- ?z19\.h ?},{ ?z18\.h ?- ?z19\.h ?},{ ?z26\.h ?- ?z27\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z30\.s ?- ?z31\.s ?},{ ?z30\.s ?- ?z31\.s ?},{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?},{ ?z30\.s ?- ?z31\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z4\.s ?- ?z5\.s ?},{ ?z4\.s ?- ?z5\.s ?},{ ?z10\.s ?- ?z11\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z30\.d ?- ?z31\.d ?},{ ?z30\.d ?- ?z31\.d ?},{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?},{ ?z30\.d ?- ?z31\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z28\.d ?- ?z29\.d ?},{ ?z28\.d ?- ?z29\.d ?},{ ?z8\.d ?- ?z9\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z28\.b ?- ?z31\.b ?},{ ?z28\.b ?- ?z31\.b ?},{ ?z0\.b ?- ?z3\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?},{ ?z28\.b ?- ?z31\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z8\.b ?- ?z11\.b ?},{ ?z8\.b ?- ?z11\.b ?},{ ?z12\.b ?- ?z15\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z28\.h ?- ?z31\.h ?},{ ?z28\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?},{ ?z28\.h ?- ?z31\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z16\.h ?- ?z19\.h ?},{ ?z16\.h ?- ?z19\.h ?},{ ?z20\.h ?- ?z23\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z28\.s ?- ?z31\.s ?},{ ?z28\.s ?- ?z31\.s ?},{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?},{ ?z28\.s ?- ?z31\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z24\.s ?- ?z27\.s ?},{ ?z24\.s ?- ?z27\.s ?},{ ?z4\.s ?- ?z7\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z28\.d ?- ?z31\.d ?},{ ?z28\.d ?- ?z31\.d ?},{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?},{ ?z28\.d ?- ?z31\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z12\.d ?- ?z15\.d ?},{ ?z12\.d ?- ?z15\.d ?},{ ?z8\.d ?- ?z11\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z30\.b ?- ?z31\.b ?},{ ?z30\.b ?- ?z31\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?},z15\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z2\.b ?- ?z3\.b ?},{ ?z2\.b ?- ?z3\.b ?},z9\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z30\.h ?- ?z31\.h ?},{ ?z30\.h ?- ?z31\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z6\.h ?- ?z7\.h ?},{ ?z6\.h ?- ?z7\.h ?},z6\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z30\.s ?- ?z31\.s ?},{ ?z30\.s ?- ?z31\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?},z15\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z18\.s ?- ?z19\.s ?},{ ?z18\.s ?- ?z19\.s ?},z5\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z30\.d ?- ?z31\.d ?},{ ?z30\.d ?- ?z31\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?},z15\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z22\.d ?- ?z23\.d ?},{ ?z22\.d ?- ?z23\.d ?},z8\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z28\.b ?- ?z31\.b ?},{ ?z28\.b ?- ?z31\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?},z15\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z4\.b ?- ?z7\.b ?},{ ?z4\.b ?- ?z7\.b ?},z7\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z28\.h ?- ?z31\.h ?},{ ?z28\.h ?- ?z31\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z12\.h ?- ?z15\.h ?},{ ?z12\.h ?- ?z15\.h ?},z12\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z28\.s ?- ?z31\.s ?},{ ?z28\.s ?- ?z31\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?},z15\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z8\.s ?- ?z11\.s ?},{ ?z8\.s ?- ?z11\.s ?},z7\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z28\.d ?- ?z31\.d ?},{ ?z28\.d ?- ?z31\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?},z15\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z24\.d ?- ?z27\.d ?},{ ?z24\.d ?- ?z27\.d ?},z13\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z30\.b ?- ?z31\.b ?},{ ?z30\.b ?- ?z31\.b ?},{ ?z0\.b ?- ?z1\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?},{ ?z30\.b ?- ?z31\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z14\.b ?- ?z15\.b ?},{ ?z14\.b ?- ?z15\.b ?},{ ?z20\.b ?- ?z21\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z30\.h ?- ?z31\.h ?},{ ?z30\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?},{ ?z30\.h ?- ?z31\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z18\.h ?- ?z19\.h ?},{ ?z18\.h ?- ?z19\.h ?},{ ?z26\.h ?- ?z27\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z30\.s ?- ?z31\.s ?},{ ?z30\.s ?- ?z31\.s ?},{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?},{ ?z30\.s ?- ?z31\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z4\.s ?- ?z5\.s ?},{ ?z4\.s ?- ?z5\.s ?},{ ?z10\.s ?- ?z11\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z30\.d ?- ?z31\.d ?},{ ?z30\.d ?- ?z31\.d ?},{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?},{ ?z30\.d ?- ?z31\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z28\.d ?- ?z29\.d ?},{ ?z28\.d ?- ?z29\.d ?},{ ?z8\.d ?- ?z9\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z28\.b ?- ?z31\.b ?},{ ?z28\.b ?- ?z31\.b ?},{ ?z0\.b ?- ?z3\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?},{ ?z28\.b ?- ?z31\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z8\.b ?- ?z11\.b ?},{ ?z8\.b ?- ?z11\.b ?},{ ?z12\.b ?- ?z15\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z28\.h ?- ?z31\.h ?},{ ?z28\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?},{ ?z28\.h ?- ?z31\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z16\.h ?- ?z19\.h ?},{ ?z16\.h ?- ?z19\.h ?},{ ?z20\.h ?- ?z23\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z28\.s ?- ?z31\.s ?},{ ?z28\.s ?- ?z31\.s ?},{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?},{ ?z28\.s ?- ?z31\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z24\.s ?- ?z27\.s ?},{ ?z24\.s ?- ?z27\.s ?},{ ?z4\.s ?- ?z7\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z28\.d ?- ?z31\.d ?},{ ?z28\.d ?- ?z31\.d ?},{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?},{ ?z28\.d ?- ?z31\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z12\.d ?- ?z15\.d ?},{ ?z12\.d ?- ?z15\.d ?},{ ?z8\.d ?- ?z11\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z30\.b ?- ?z31\.b ?},{ ?z30\.b ?- ?z31\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?},z15\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z2\.b ?- ?z3\.b ?},{ ?z2\.b ?- ?z3\.b ?},z9\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z30\.h ?- ?z31\.h ?},{ ?z30\.h ?- ?z31\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z6\.h ?- ?z7\.h ?},{ ?z6\.h ?- ?z7\.h ?},z6\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z30\.s ?- ?z31\.s ?},{ ?z30\.s ?- ?z31\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?},z15\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z18\.s ?- ?z19\.s ?},{ ?z18\.s ?- ?z19\.s ?},z5\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z30\.d ?- ?z31\.d ?},{ ?z30\.d ?- ?z31\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?},z15\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z22\.d ?- ?z23\.d ?},{ ?z22\.d ?- ?z23\.d ?},z8\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z28\.b ?- ?z31\.b ?},{ ?z28\.b ?- ?z31\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?},z15\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z4\.b ?- ?z7\.b ?},{ ?z4\.b ?- ?z7\.b ?},z7\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z28\.h ?- ?z31\.h ?},{ ?z28\.h ?- ?z31\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z12\.h ?- ?z15\.h ?},{ ?z12\.h ?- ?z15\.h ?},z12\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z28\.s ?- ?z31\.s ?},{ ?z28\.s ?- ?z31\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?},z15\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z8\.s ?- ?z11\.s ?},{ ?z8\.s ?- ?z11\.s ?},z7\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z28\.d ?- ?z31\.d ?},{ ?z28\.d ?- ?z31\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?},z15\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z24\.d ?- ?z27\.d ?},{ ?z24\.d ?- ?z27\.d ?},z13\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z30\.b ?- ?z31\.b ?},{ ?z30\.b ?- ?z31\.b ?},{ ?z0\.b ?- ?z1\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?},{ ?z30\.b ?- ?z31\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z14\.b ?- ?z15\.b ?},{ ?z14\.b ?- ?z15\.b ?},{ ?z20\.b ?- ?z21\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z30\.h ?- ?z31\.h ?},{ ?z30\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?},{ ?z30\.h ?- ?z31\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z18\.h ?- ?z19\.h ?},{ ?z18\.h ?- ?z19\.h ?},{ ?z26\.h ?- ?z27\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z30\.s ?- ?z31\.s ?},{ ?z30\.s ?- ?z31\.s ?},{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?},{ ?z30\.s ?- ?z31\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z4\.s ?- ?z5\.s ?},{ ?z4\.s ?- ?z5\.s ?},{ ?z10\.s ?- ?z11\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z30\.d ?- ?z31\.d ?},{ ?z30\.d ?- ?z31\.d ?},{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?},{ ?z30\.d ?- ?z31\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z28\.d ?- ?z29\.d ?},{ ?z28\.d ?- ?z29\.d ?},{ ?z8\.d ?- ?z9\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z28\.b ?- ?z31\.b ?},{ ?z28\.b ?- ?z31\.b ?},{ ?z0\.b ?- ?z3\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?},{ ?z28\.b ?- ?z31\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z8\.b ?- ?z11\.b ?},{ ?z8\.b ?- ?z11\.b ?},{ ?z12\.b ?- ?z15\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z28\.h ?- ?z31\.h ?},{ ?z28\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?},{ ?z28\.h ?- ?z31\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z16\.h ?- ?z19\.h ?},{ ?z16\.h ?- ?z19\.h ?},{ ?z20\.h ?- ?z23\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z28\.s ?- ?z31\.s ?},{ ?z28\.s ?- ?z31\.s ?},{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?},{ ?z28\.s ?- ?z31\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z24\.s ?- ?z27\.s ?},{ ?z24\.s ?- ?z27\.s ?},{ ?z4\.s ?- ?z7\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z28\.d ?- ?z31\.d ?},{ ?z28\.d ?- ?z31\.d ?},{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?},{ ?z28\.d ?- ?z31\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z12\.d ?- ?z15\.d ?},{ ?z12\.d ?- ?z15\.d ?},{ ?z8\.d ?- ?z11\.d ?}'
diff --git a/gas/testsuite/gas/aarch64/sme2-11-invalid.l b/gas/testsuite/gas/aarch64/sme2-11-invalid.l
index 8044d26..63c3e6d 100644
--- a/gas/testsuite/gas/aarch64/sme2-11-invalid.l
+++ b/gas/testsuite/gas/aarch64/sme2-11-invalid.l
@@ -1,100 +1,100 @@
 [^ :]+: Assembler messages:
-[^ :]+:[0-9]+: Error: expected a register at operand 1 -- `fmla 0,{z0\.s-z1\.s},z0\.s\[0\]'
+[^ :]+:[0-9]+: Error: expected a register at operand 1 -- `fmla 0,{ ?z0\.s ?- ?z1\.s ?},z0\.s\[0\]'
 [^ :]+:[0-9]+: Error: expected '{' at operand 2 -- `fmla za\.s\[w8,0\],0,z0\.s\[0\]'
-[^ :]+:[0-9]+: Error: expected a register or register list at operand 3 -- `fmla za\.s\[w8,0\],{z0\.s-z1\.s},0'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.s\[w7,0\],{z0\.s-z1\.s},z0\.s\[0\]'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.s\[w12,0\],{z0\.s-z1\.s},z0\.s\[0\]'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.s\[w8,-1\],{z0\.s-z1\.s},z0\.s\[0\]'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.s\[w8,8\],{z0\.s-z1\.s},z0\.s\[0\]'
-[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `fmla za\.s\[w8,0,vgx4\],{z0\.s-z1\.s},z0\.s\[0\]'
-[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `fmla za\.s\[w8,0\],{z0\.s-z2\.s},z0\.s\[0\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fmla za\.s\[w8,0\],{z1\.s-z2\.s},z0\.s\[0\]'
-[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `fmla za\.s\[w8,0\],{z0\.s-z1\.s},z16\.s\[0\]'
-[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `fmla za\.s\[w8,0\],{z0\.s-z1\.s},z0\.s\[-1\]'
-[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `fmla za\.s\[w8,0\],{z0\.s-z1\.s},z0\.s\[4\]'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.s\[w7,0\],{z0\.s-z3\.s},z0\.s\[0\]'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.s\[w12,0\],{z0\.s-z3\.s},z0\.s\[0\]'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.s\[w8,-1\],{z0\.s-z3\.s},z0\.s\[0\]'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.s\[w8,8\],{z0\.s-z3\.s},z0\.s\[0\]'
-[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `fmla za\.s\[w8,0,vgx2\],{z0\.s-z3\.s},z0\.s\[0\]'
-[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 2 -- `fmla za\.s\[w8,0\],{z0\.s-z4\.s},z0\.s\[0\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fmla za\.s\[w8,0\],{z1\.s-z4\.s},z0\.s\[0\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fmla za\.s\[w8,0\],{z2\.s-z5\.s},z0\.s\[0\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fmla za\.s\[w8,0\],{z3\.s-z6\.s},z0\.s\[0\]'
-[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `fmla za\.s\[w8,0\],{z0\.s-z3\.s},z16\.s\[0\]'
-[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `fmla za\.s\[w8,0\],{z0\.s-z3\.s},z0\.s\[-1\]'
-[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `fmla za\.s\[w8,0\],{z0\.s-z3\.s},z0\.s\[4\]'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.s\[w0,0\],{z0\.s-z1\.s},z0\.s'
-[^ :]+:[0-9]+: Error: expected a 32-bit selection register at operand 1 -- `fmla za\.s\[w31,0\],{z0\.s-z1\.s},z0\.s'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.s\[w8,1<<63\],{z0\.s-z1\.s},z0\.s'
-[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `fmla za\.s\[w8,0\],{z0\.s-z1\.s},z31\.s'
-[^ :]+:[0-9]+: Error: the last offset is equal to the first offset at operand 1 -- `fmla za\.s\[w8,0:0\],{z0\.s-z1\.s},z0\.s'
-[^ :]+:[0-9]+: Error: the last offset is less than the first offset at operand 1 -- `fmla za\.s\[w8,0:-1\],{z0\.s-z1\.s},z0\.s'
-[^ :]+:[0-9]+: Error: expected a single offset rather than a range at operand 1 -- `fmla za\.s\[w8,0:1\],{z0\.s-z1\.s},z0\.s'
-[^ :]+:[0-9]+: Error: expected a single offset rather than a range at operand 1 -- `fmla za\.s\[w8,0:100\],{z0\.s-z1\.s},z0\.s'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.s\[w7,0\],{z0\.s-z1\.s},z0\.s'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.s\[w12,0\],{z0\.s-z1\.s},z0\.s'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.s\[w8,-1\],{z0\.s-z1\.s},z0\.s'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.s\[w8,8\],{z0\.s-z1\.s},z0\.s'
-[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `fmla za\.s\[w8,0\],{z0\.s-z1\.s},z16\.s'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.s\[w7,0\],{z0\.s-z3\.s},z0\.s'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.s\[w12,0\],{z0\.s-z3\.s},z0\.s'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.s\[w8,-1\],{z0\.s-z3\.s},z0\.s'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.s\[w8,8\],{z0\.s-z3\.s},z0\.s'
-[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `fmla za\.s\[w8,0\],{z0\.s-z3\.s},z16\.s'
-[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `fmla za\.s\[w8,0\],{z0\.s-z2\.s},z0\.s'
-[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 2 -- `fmla za\.s\[w8,0\],{z0\.s-z4\.s},z0\.s'
-[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `fmla za\.s\[w8,0\],{z0\.s,z1\.s,z2\.s},z0\.s'
-[^ :]+:[0-9]+: Error: invalid register list at operand 2 -- `fmla za\.s\[w8,0\],{z0\.s,z1\.s,z5\.s},z0\.s'
-[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `fmla za\.s\[w8,0,vgx4\],{z0\.s-z1\.s},z0\.s'
-[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `fmla za\.s\[w8,0,vgx2\],{z0\.s-z3\.s},z0\.s'
-[^ :]+:[0-9]+: Error: operand mismatch -- `fmla za\[w8,0\],{z0\.s-z1\.s},z0\.s'
+[^ :]+:[0-9]+: Error: expected a register or register list at operand 3 -- `fmla za\.s\[w8,0\],{ ?z0\.s ?- ?z1\.s ?},0'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.s\[w7,0\],{ ?z0\.s ?- ?z1\.s ?},z0\.s\[0\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.s\[w12,0\],{ ?z0\.s ?- ?z1\.s ?},z0\.s\[0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.s\[w8,-1\],{ ?z0\.s ?- ?z1\.s ?},z0\.s\[0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.s\[w8,8\],{ ?z0\.s ?- ?z1\.s ?},z0\.s\[0\]'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `fmla za\.s\[w8,0,vgx4\],{ ?z0\.s ?- ?z1\.s ?},z0\.s\[0\]'
+[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `fmla za\.s\[w8,0\],{ ?z0\.s ?- ?z2\.s ?},z0\.s\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fmla za\.s\[w8,0\],{ ?z1\.s ?- ?z2\.s ?},z0\.s\[0\]'
+[^ :]+:[0-9]+: Error: z0 ?- ?z15 expected at operand 3 -- `fmla za\.s\[w8,0\],{ ?z0\.s ?- ?z1\.s ?},z16\.s\[0\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `fmla za\.s\[w8,0\],{ ?z0\.s ?- ?z1\.s ?},z0\.s\[-1\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `fmla za\.s\[w8,0\],{ ?z0\.s ?- ?z1\.s ?},z0\.s\[4\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.s\[w7,0\],{ ?z0\.s ?- ?z3\.s ?},z0\.s\[0\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.s\[w12,0\],{ ?z0\.s ?- ?z3\.s ?},z0\.s\[0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.s\[w8,-1\],{ ?z0\.s ?- ?z3\.s ?},z0\.s\[0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.s\[w8,8\],{ ?z0\.s ?- ?z3\.s ?},z0\.s\[0\]'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `fmla za\.s\[w8,0,vgx2\],{ ?z0\.s ?- ?z3\.s ?},z0\.s\[0\]'
+[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 2 -- `fmla za\.s\[w8,0\],{ ?z0\.s ?- ?z4\.s ?},z0\.s\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fmla za\.s\[w8,0\],{ ?z1\.s ?- ?z4\.s ?},z0\.s\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fmla za\.s\[w8,0\],{ ?z2\.s ?- ?z5\.s ?},z0\.s\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fmla za\.s\[w8,0\],{ ?z3\.s ?- ?z6\.s ?},z0\.s\[0\]'
+[^ :]+:[0-9]+: Error: z0 ?- ?z15 expected at operand 3 -- `fmla za\.s\[w8,0\],{ ?z0\.s ?- ?z3\.s ?},z16\.s\[0\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `fmla za\.s\[w8,0\],{ ?z0\.s ?- ?z3\.s ?},z0\.s\[-1\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `fmla za\.s\[w8,0\],{ ?z0\.s ?- ?z3\.s ?},z0\.s\[4\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.s\[w0,0\],{ ?z0\.s ?- ?z1\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: expected a 32-bit selection register at operand 1 -- `fmla za\.s\[w31,0\],{ ?z0\.s ?- ?z1\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.s\[w8,1<<63\],{ ?z0\.s ?- ?z1\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: z0 ?- ?z15 expected at operand 3 -- `fmla za\.s\[w8,0\],{ ?z0\.s ?- ?z1\.s ?},z31\.s'
+[^ :]+:[0-9]+: Error: the last offset is equal to the first offset at operand 1 -- `fmla za\.s\[w8,0:0\],{ ?z0\.s ?- ?z1\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: the last offset is less than the first offset at operand 1 -- `fmla za\.s\[w8,0:-1\],{ ?z0\.s ?- ?z1\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: expected a single offset rather than a range at operand 1 -- `fmla za\.s\[w8,0:1\],{ ?z0\.s ?- ?z1\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: expected a single offset rather than a range at operand 1 -- `fmla za\.s\[w8,0:100\],{ ?z0\.s ?- ?z1\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.s\[w7,0\],{ ?z0\.s ?- ?z1\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.s\[w12,0\],{ ?z0\.s ?- ?z1\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.s\[w8,-1\],{ ?z0\.s ?- ?z1\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.s\[w8,8\],{ ?z0\.s ?- ?z1\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: z0 ?- ?z15 expected at operand 3 -- `fmla za\.s\[w8,0\],{ ?z0\.s ?- ?z1\.s ?},z16\.s'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.s\[w7,0\],{ ?z0\.s ?- ?z3\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.s\[w12,0\],{ ?z0\.s ?- ?z3\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.s\[w8,-1\],{ ?z0\.s ?- ?z3\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.s\[w8,8\],{ ?z0\.s ?- ?z3\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: z0 ?- ?z15 expected at operand 3 -- `fmla za\.s\[w8,0\],{ ?z0\.s ?- ?z3\.s ?},z16\.s'
+[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `fmla za\.s\[w8,0\],{ ?z0\.s ?- ?z2\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 2 -- `fmla za\.s\[w8,0\],{ ?z0\.s ?- ?z4\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `fmla za\.s\[w8,0\],{ ?z0\.s,z1\.s,z2\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: invalid register list at operand 2 -- `fmla za\.s\[w8,0\],{ ?z0\.s,z1\.s,z5\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `fmla za\.s\[w8,0,vgx4\],{ ?z0\.s ?- ?z1\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `fmla za\.s\[w8,0,vgx2\],{ ?z0\.s ?- ?z3\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: operand mismatch -- `fmla za\[w8,0\],{ ?z0\.s ?- ?z1\.s ?},z0\.s'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	fmla za\.s\[w8, 0\], {z0\.s-z1\.s}, z0\.s
 [^ :]+:[0-9]+: Info:    other valid variant\(s\):
 [^ :]+:[0-9]+: Info:    	fmla za\.d\[w8, 0\], {z0\.d-z1\.d}, z0\.d
-[^ :]+:[0-9]+: Error: missing type suffix at operand 2 -- `fmla za\.s\[w8,0\],{z0-z1},z0\.s'
-[^ :]+:[0-9]+: Error: operand mismatch -- `fmla za\.s\[w8,0\],{z0\.s-z1\.s},z0'
+[^ :]+:[0-9]+: Error: missing type suffix at operand 2 -- `fmla za\.s\[w8,0\],{ ?z0 ?- ?z1 ?},z0\.s'
+[^ :]+:[0-9]+: Error: operand mismatch -- `fmla za\.s\[w8,0\],{ ?z0\.s ?- ?z1\.s ?},z0'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	fmla za\.s\[w8, 0\], {z0\.s-z1\.s}, z0\.s
 [^ :]+:[0-9]+: Info:    other valid variant\(s\):
 [^ :]+:[0-9]+: Info:    	fmla za\.d\[w8, 0\], {z0\.d-z1\.d}, z0\.d
-[^ :]+:[0-9]+: Error: operand mismatch -- `fmla za\[w8,0\],{z0\.s-z1\.s},z0'
+[^ :]+:[0-9]+: Error: operand mismatch -- `fmla za\[w8,0\],{ ?z0\.s ?- ?z1\.s ?},z0'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	fmla za\.s\[w8, 0\], {z0\.s-z1\.s}, z0\.s
 [^ :]+:[0-9]+: Info:    other valid variant\(s\):
 [^ :]+:[0-9]+: Info:    	fmla za\.d\[w8, 0\], {z0\.d-z1\.d}, z0\.d
-[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.s\[w7,0\],{z0\.s-z1\.s},{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.s\[w12,0\],{z0\.s-z1\.s},{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.s\[w8,-1\],{z0\.s-z1\.s},{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.s\[w8,8\],{z0\.s-z1\.s},{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fmla za\.s\[w8,0\],{z1\.s-z2\.s},{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `fmla za\.s\[w8,0\],{z0\.s-z1\.s},{z15\.s-z16\.s}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `fmla za\.s\[w8,0\],{z0\.s-z1\.s},{z31\.s,z0\.s}'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.s\[w7,0\],{z0\.s-z3\.s},{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.s\[w12,0\],{z0\.s-z3\.s},{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.s\[w8,-1\],{z0\.s-z3\.s},{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.s\[w8,8\],{z0\.s-z3\.s},{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fmla za\.s\[w8,0\],{z1\.s-z4\.s},{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fmla za\.s\[w8,0\],{z2\.s-z5\.s},{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fmla za\.s\[w8,0\],{z3\.s-z6\.s},{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `fmla za\.s\[w8,0\],{z0\.s-z3\.s},{z15\.s-z18\.s}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `fmla za\.s\[w8,0\],{z0\.s-z3\.s},{z29\.s,z30\.s,z31\.s,z0\.s}'
-[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `fmla za\.s\[w8,0\],{z0\.s-z2\.s},{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `fmla za\.s\[w8,0\],{z0\.s-z3\.s},{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `fmla za\.s\[w8,0\],{z0\.s-z1\.s},{z0\.s-z2\.s}'
-[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `fmla za\.s\[w8,0\],{z0\.s-z1\.s},{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 3 -- `fmla za\.s\[w8,0\],{z0\.s-z1\.s},{z0\.s-z4\.s}'
-[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `fmla za\.s\[w8,0,vgx4\],{z0\.s-z1\.s},{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `fmla za\.s\[w8,0,vgx4\],{z0\.s-z3\.s},{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `fmla za\.s\[w8,0,vgx2\],{z0\.s-z1\.s},{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `fmla za\.s\[w8,0,vgx2\],{z0\.s-z3\.s},{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: operand mismatch -- `fmla za\[w8,0\],{z0\.s-z1\.s},{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.s\[w7,0\],{ ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.s\[w12,0\],{ ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.s\[w8,-1\],{ ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.s\[w8,8\],{ ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fmla za\.s\[w8,0\],{ ?z1\.s ?- ?z2\.s ?},{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `fmla za\.s\[w8,0\],{ ?z0\.s ?- ?z1\.s ?},{ ?z15\.s ?- ?z16\.s ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `fmla za\.s\[w8,0\],{ ?z0\.s ?- ?z1\.s ?},{ ?z31\.s,z0\.s ?}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.s\[w7,0\],{ ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.s\[w12,0\],{ ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.s\[w8,-1\],{ ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.s\[w8,8\],{ ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fmla za\.s\[w8,0\],{ ?z1\.s ?- ?z4\.s ?},{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fmla za\.s\[w8,0\],{ ?z2\.s ?- ?z5\.s ?},{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fmla za\.s\[w8,0\],{ ?z3\.s ?- ?z6\.s ?},{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `fmla za\.s\[w8,0\],{ ?z0\.s ?- ?z3\.s ?},{ ?z15\.s ?- ?z18\.s ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `fmla za\.s\[w8,0\],{ ?z0\.s ?- ?z3\.s ?},{ ?z29\.s,z30\.s,z31\.s,z0\.s ?}'
+[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `fmla za\.s\[w8,0\],{ ?z0\.s ?- ?z2\.s ?},{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `fmla za\.s\[w8,0\],{ ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `fmla za\.s\[w8,0\],{ ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z2\.s ?}'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `fmla za\.s\[w8,0\],{ ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 3 -- `fmla za\.s\[w8,0\],{ ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z4\.s ?}'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `fmla za\.s\[w8,0,vgx4\],{ ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `fmla za\.s\[w8,0,vgx4\],{ ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `fmla za\.s\[w8,0,vgx2\],{ ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `fmla za\.s\[w8,0,vgx2\],{ ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: operand mismatch -- `fmla za\[w8,0\],{ ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?}'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	fmla za\.s\[w8, 0\], {z0\.s-z1\.s}, {z0\.s-z1\.s}
 [^ :]+:[0-9]+: Info:    other valid variant\(s\):
 [^ :]+:[0-9]+: Info:    	fmla za\.d\[w8, 0\], {z0\.d-z1\.d}, {z0\.d-z1\.d}
-[^ :]+:[0-9]+: Error: operand mismatch -- `fmla za\[w8,0\],{z0\.s-z3\.s},{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: operand mismatch -- `fmla za\[w8,0\],{ ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?}'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	fmla za\.s\[w8, 0\], {z0\.s-z3\.s}, {z0\.s-z3\.s}
 [^ :]+:[0-9]+: Info:    other valid variant\(s\):
diff --git a/gas/testsuite/gas/aarch64/sme2-11-noarch.l b/gas/testsuite/gas/aarch64/sme2-11-noarch.l
index 05c3139..27ebf2a 100644
--- a/gas/testsuite/gas/aarch64/sme2-11-noarch.l
+++ b/gas/testsuite/gas/aarch64/sme2-11-noarch.l
@@ -1,117 +1,117 @@
 [^ :]+: Assembler messages:
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{z0\.s-z1\.s},z0\.s\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0,vgx2\],{z0\.s-z1\.s},z0\.s\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla ZA\.S\[W8,0,VGx2\],{Z0\.S-Z1\.S},Z0\.S\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w11,0\],{z0\.s-z1\.s},z0\.s\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,7\],{z0\.s-z1\.s},z0\.s\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{z30\.s-z31\.s},z0\.s\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{z0\.s-z1\.s},z15\.s\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{z0\.s-z1\.s},z0\.s\[3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w9,6\],{z12\.s-z13\.s},z1\.s\[2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{z0\.s-z3\.s},z0\.s\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0,vgx4\],{z0\.s-z3\.s},z0\.s\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla ZA\.S\[W8,0,VGX4\],{Z0\.S-Z3\.S},Z0\.S\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w11,0\],{z0\.s-z3\.s},z0\.s\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,7\],{z0\.s-z3\.s},z0\.s\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{z28\.s-z31\.s},z0\.s\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{z0\.s-z3\.s},z15\.s\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{z0\.s-z3\.s},z0\.s\[3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w10,4\],{z4\.s-z7\.s},z9\.s\[1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{z0\.s-z1\.s},z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0,vgx2\],{z0\.s-z1\.s},z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla ZA\.s\[W8,0,VGx2\],{Z0\.s-Z1\.s},Z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla ZA\.S\[W8,0,VGX2\],{Z0\.S-Z1\.S},Z0\.S'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w11,0\],{z0\.s-z1\.s},z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,7\],{z0\.s-z1\.s},z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{z30\.s-z31\.s},z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{z31\.s,z0\.s},z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{z31\.s-z0\.s},z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{z0\.s-z1\.s},z15\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w9,5\],{z9\.s-z10\.s},z6\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{z0\.s-z3\.s},z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0,vgx4\],{z0\.s-z3\.s},z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla ZA\.s\[W8,0,VGx4\],{Z0\.s-Z3\.s},Z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla ZA\.S\[W8,0,VGX4\],{Z0\.S-Z3\.S},Z0\.S'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w11,0\],{z0\.s-z3\.s},z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,7\],{z0\.s-z3\.s},z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{z28\.s-z31\.s},z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{z31\.s,z0\.s,z1\.s,z2\.s},z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{z31\.s-z2\.s},z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{z0\.s-z3\.s},z15\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w11,2\],{z23\.s-z26\.s},z13\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{z0\.s-z1\.s},{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0,vgx2\],{z0\.s-z1\.s},{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla ZA\.s\[W8,0,VGx2\],{Z0\.s-Z1\.s},{Z0\.s-Z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla ZA\.S\[W8,0,VGX2\],{Z0\.S-Z1\.S},{Z0\.S-Z1\.S}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w11,0\],{z0\.s-z1\.s},{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,7\],{z0\.s-z1\.s},{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{z30\.s-z31\.s},{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{z0\.s-z1\.s},{z30\.s-z31\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w10,1\],{z22\.s-z23\.s},{z18\.s-z19\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{z0\.s-z3\.s},{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0,vgx4\],{z0\.s-z3\.s},{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla ZA\.s\[W8,0,VGx4\],{Z0\.s-Z3\.s},{Z0\.s-Z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla ZA\.S\[W8,0,VGX4\],{Z0\.S-Z3\.S},{Z0\.S-Z3\.S}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w11,0\],{z0\.s-z3\.s},{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,7\],{z0\.s-z3\.s},{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{z28\.s-z31\.s},{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{z0\.s-z3\.s},{z28\.s-z31\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w11,3\],{z16\.s-z19\.s},{z24\.s-z27\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{z0\.s-z1\.s},z0\.s\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0,vgx2\],{z0\.s-z1\.s},z0\.s\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls ZA\.S\[W8,0,VGx2\],{Z0\.S-Z1\.S},Z0\.S\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w11,0\],{z0\.s-z1\.s},z0\.s\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,7\],{z0\.s-z1\.s},z0\.s\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{z30\.s-z31\.s},z0\.s\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{z0\.s-z1\.s},z15\.s\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{z0\.s-z1\.s},z0\.s\[3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w9,6\],{z12\.s-z13\.s},z1\.s\[2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{z0\.s-z3\.s},z0\.s\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0,vgx4\],{z0\.s-z3\.s},z0\.s\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls ZA\.S\[W8,0,VGX4\],{Z0\.S-Z3\.S},Z0\.S\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w11,0\],{z0\.s-z3\.s},z0\.s\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,7\],{z0\.s-z3\.s},z0\.s\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{z28\.s-z31\.s},z0\.s\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{z0\.s-z3\.s},z15\.s\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{z0\.s-z3\.s},z0\.s\[3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w10,4\],{z4\.s-z7\.s},z9\.s\[1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{z0\.s-z1\.s},z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0,vgx2\],{z0\.s-z1\.s},z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls ZA\.s\[W8,0,VGx2\],{Z0\.s-Z1\.s},Z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls ZA\.S\[W8,0,VGX2\],{Z0\.S-Z1\.S},Z0\.S'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w11,0\],{z0\.s-z1\.s},z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,7\],{z0\.s-z1\.s},z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{z30\.s-z31\.s},z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{z31\.s,z0\.s},z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{z31\.s-z0\.s},z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{z0\.s-z1\.s},z15\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w9,5\],{z9\.s-z10\.s},z6\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{z0\.s-z3\.s},z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0,vgx4\],{z0\.s-z3\.s},z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls ZA\.s\[W8,0,VGx4\],{Z0\.s-Z3\.s},Z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls ZA\.S\[W8,0,VGX4\],{Z0\.S-Z3\.S},Z0\.S'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w11,0\],{z0\.s-z3\.s},z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,7\],{z0\.s-z3\.s},z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{z28\.s-z31\.s},z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{z31\.s,z0\.s,z1\.s,z2\.s},z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{z31\.s-z2\.s},z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{z0\.s-z3\.s},z15\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w11,2\],{z23\.s-z26\.s},z13\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{z0\.s-z1\.s},{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0,vgx2\],{z0\.s-z1\.s},{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls ZA\.s\[W8,0,VGx2\],{Z0\.s-Z1\.s},{Z0\.s-Z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls ZA\.S\[W8,0,VGX2\],{Z0\.S-Z1\.S},{Z0\.S-Z1\.S}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w11,0\],{z0\.s-z1\.s},{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,7\],{z0\.s-z1\.s},{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{z30\.s-z31\.s},{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{z0\.s-z1\.s},{z30\.s-z31\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w10,1\],{z22\.s-z23\.s},{z18\.s-z19\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{z0\.s-z3\.s},{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0,vgx4\],{z0\.s-z3\.s},{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls ZA\.s\[W8,0,VGx4\],{Z0\.s-Z3\.s},{Z0\.s-Z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls ZA\.S\[W8,0,VGX4\],{Z0\.S-Z3\.S},{Z0\.S-Z3\.S}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w11,0\],{z0\.s-z3\.s},{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,7\],{z0\.s-z3\.s},{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{z28\.s-z31\.s},{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{z0\.s-z3\.s},{z28\.s-z31\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w11,3\],{z16\.s-z19\.s},{z24\.s-z27\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{ ?z0\.s ?- ?z1\.s ?},z0\.s\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0,vgx2\],{ ?z0\.s ?- ?z1\.s ?},z0\.s\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla ZA\.S\[W8,0,VGx2\],{ ?Z0\.S ?- ?Z1\.S ?},Z0\.S\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w11,0\],{ ?z0\.s ?- ?z1\.s ?},z0\.s\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,7\],{ ?z0\.s ?- ?z1\.s ?},z0\.s\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{ ?z30\.s ?- ?z31\.s ?},z0\.s\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{ ?z0\.s ?- ?z1\.s ?},z15\.s\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{ ?z0\.s ?- ?z1\.s ?},z0\.s\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w9,6\],{ ?z12\.s ?- ?z13\.s ?},z1\.s\[2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{ ?z0\.s ?- ?z3\.s ?},z0\.s\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0,vgx4\],{ ?z0\.s ?- ?z3\.s ?},z0\.s\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla ZA\.S\[W8,0,VGX4\],{ ?Z0\.S ?- ?Z3\.S ?},Z0\.S\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w11,0\],{ ?z0\.s ?- ?z3\.s ?},z0\.s\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,7\],{ ?z0\.s ?- ?z3\.s ?},z0\.s\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{ ?z28\.s ?- ?z31\.s ?},z0\.s\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{ ?z0\.s ?- ?z3\.s ?},z15\.s\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{ ?z0\.s ?- ?z3\.s ?},z0\.s\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w10,4\],{ ?z4\.s ?- ?z7\.s ?},z9\.s\[1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{ ?z0\.s ?- ?z1\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0,vgx2\],{ ?z0\.s ?- ?z1\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla ZA\.s\[W8,0,VGx2\],{ ?Z0\.s ?- ?Z1\.s ?},Z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla ZA\.S\[W8,0,VGX2\],{ ?Z0\.S ?- ?Z1\.S ?},Z0\.S'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w11,0\],{ ?z0\.s ?- ?z1\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,7\],{ ?z0\.s ?- ?z1\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{ ?z30\.s ?- ?z31\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{ ?z31\.s,z0\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{ ?z31\.s ?- ?z0\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{ ?z0\.s ?- ?z1\.s ?},z15\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w9,5\],{ ?z9\.s ?- ?z10\.s ?},z6\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{ ?z0\.s ?- ?z3\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0,vgx4\],{ ?z0\.s ?- ?z3\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla ZA\.s\[W8,0,VGx4\],{ ?Z0\.s ?- ?Z3\.s ?},Z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla ZA\.S\[W8,0,VGX4\],{ ?Z0\.S ?- ?Z3\.S ?},Z0\.S'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w11,0\],{ ?z0\.s ?- ?z3\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,7\],{ ?z0\.s ?- ?z3\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{ ?z28\.s ?- ?z31\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{ ?z31\.s,z0\.s,z1\.s,z2\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{ ?z31\.s ?- ?z2\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{ ?z0\.s ?- ?z3\.s ?},z15\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w11,2\],{ ?z23\.s ?- ?z26\.s ?},z13\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{ ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0,vgx2\],{ ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla ZA\.s\[W8,0,VGx2\],{ ?Z0\.s ?- ?Z1\.s ?},{ ?Z0\.s ?- ?Z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla ZA\.S\[W8,0,VGX2\],{ ?Z0\.S ?- ?Z1\.S ?},{ ?Z0\.S ?- ?Z1\.S ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w11,0\],{ ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,7\],{ ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{ ?z30\.s ?- ?z31\.s ?},{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{ ?z0\.s ?- ?z1\.s ?},{ ?z30\.s ?- ?z31\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w10,1\],{ ?z22\.s ?- ?z23\.s ?},{ ?z18\.s ?- ?z19\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{ ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0,vgx4\],{ ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla ZA\.s\[W8,0,VGx4\],{ ?Z0\.s ?- ?Z3\.s ?},{ ?Z0\.s ?- ?Z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla ZA\.S\[W8,0,VGX4\],{ ?Z0\.S ?- ?Z3\.S ?},{ ?Z0\.S ?- ?Z3\.S ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w11,0\],{ ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,7\],{ ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{ ?z28\.s ?- ?z31\.s ?},{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{ ?z0\.s ?- ?z3\.s ?},{ ?z28\.s ?- ?z31\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w11,3\],{ ?z16\.s ?- ?z19\.s ?},{ ?z24\.s ?- ?z27\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{ ?z0\.s ?- ?z1\.s ?},z0\.s\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0,vgx2\],{ ?z0\.s ?- ?z1\.s ?},z0\.s\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls ZA\.S\[W8,0,VGx2\],{ ?Z0\.S ?- ?Z1\.S ?},Z0\.S\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w11,0\],{ ?z0\.s ?- ?z1\.s ?},z0\.s\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,7\],{ ?z0\.s ?- ?z1\.s ?},z0\.s\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{ ?z30\.s ?- ?z31\.s ?},z0\.s\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{ ?z0\.s ?- ?z1\.s ?},z15\.s\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{ ?z0\.s ?- ?z1\.s ?},z0\.s\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w9,6\],{ ?z12\.s ?- ?z13\.s ?},z1\.s\[2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{ ?z0\.s ?- ?z3\.s ?},z0\.s\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0,vgx4\],{ ?z0\.s ?- ?z3\.s ?},z0\.s\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls ZA\.S\[W8,0,VGX4\],{ ?Z0\.S ?- ?Z3\.S ?},Z0\.S\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w11,0\],{ ?z0\.s ?- ?z3\.s ?},z0\.s\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,7\],{ ?z0\.s ?- ?z3\.s ?},z0\.s\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{ ?z28\.s ?- ?z31\.s ?},z0\.s\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{ ?z0\.s ?- ?z3\.s ?},z15\.s\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{ ?z0\.s ?- ?z3\.s ?},z0\.s\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w10,4\],{ ?z4\.s ?- ?z7\.s ?},z9\.s\[1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{ ?z0\.s ?- ?z1\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0,vgx2\],{ ?z0\.s ?- ?z1\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls ZA\.s\[W8,0,VGx2\],{ ?Z0\.s ?- ?Z1\.s ?},Z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls ZA\.S\[W8,0,VGX2\],{ ?Z0\.S ?- ?Z1\.S ?},Z0\.S'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w11,0\],{ ?z0\.s ?- ?z1\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,7\],{ ?z0\.s ?- ?z1\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{ ?z30\.s ?- ?z31\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{ ?z31\.s,z0\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{ ?z31\.s ?- ?z0\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{ ?z0\.s ?- ?z1\.s ?},z15\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w9,5\],{ ?z9\.s ?- ?z10\.s ?},z6\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{ ?z0\.s ?- ?z3\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0,vgx4\],{ ?z0\.s ?- ?z3\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls ZA\.s\[W8,0,VGx4\],{ ?Z0\.s ?- ?Z3\.s ?},Z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls ZA\.S\[W8,0,VGX4\],{ ?Z0\.S ?- ?Z3\.S ?},Z0\.S'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w11,0\],{ ?z0\.s ?- ?z3\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,7\],{ ?z0\.s ?- ?z3\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{ ?z28\.s ?- ?z31\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{ ?z31\.s,z0\.s,z1\.s,z2\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{ ?z31\.s ?- ?z2\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{ ?z0\.s ?- ?z3\.s ?},z15\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w11,2\],{ ?z23\.s ?- ?z26\.s ?},z13\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{ ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0,vgx2\],{ ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls ZA\.s\[W8,0,VGx2\],{ ?Z0\.s ?- ?Z1\.s ?},{ ?Z0\.s ?- ?Z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls ZA\.S\[W8,0,VGX2\],{ ?Z0\.S ?- ?Z1\.S ?},{ ?Z0\.S ?- ?Z1\.S ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w11,0\],{ ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,7\],{ ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{ ?z30\.s ?- ?z31\.s ?},{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{ ?z0\.s ?- ?z1\.s ?},{ ?z30\.s ?- ?z31\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w10,1\],{ ?z22\.s ?- ?z23\.s ?},{ ?z18\.s ?- ?z19\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{ ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0,vgx4\],{ ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls ZA\.s\[W8,0,VGx4\],{ ?Z0\.s ?- ?Z3\.s ?},{ ?Z0\.s ?- ?Z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls ZA\.S\[W8,0,VGX4\],{ ?Z0\.S ?- ?Z3\.S ?},{ ?Z0\.S ?- ?Z3\.S ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w11,0\],{ ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,7\],{ ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{ ?z28\.s ?- ?z31\.s ?},{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{ ?z0\.s ?- ?z3\.s ?},{ ?z28\.s ?- ?z31\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w11,3\],{ ?z16\.s ?- ?z19\.s ?},{ ?z24\.s ?- ?z27\.s ?}'
diff --git a/gas/testsuite/gas/aarch64/sme2-12-invalid.l b/gas/testsuite/gas/aarch64/sme2-12-invalid.l
index a387bb7..1554498 100644
--- a/gas/testsuite/gas/aarch64/sme2-12-invalid.l
+++ b/gas/testsuite/gas/aarch64/sme2-12-invalid.l
@@ -12,7 +12,7 @@
 [^ :]+:[0-9]+: Error: immediate offset out of range 0 to 14 at operand 1 -- `bfmlal za\.s\[w8,-2:-1\],z0\.h,z0\.h\[0\]'
 [^ :]+:[0-9]+: Error: immediate offset out of range 0 to 14 at operand 1 -- `bfmlal za\.s\[w8,16:17\],z0\.h,z0\.h\[0\]'
 [^ :]+:[0-9]+: Error: unexpected vector group size at operand 1 -- `bfmlal za\.s\[w8,0:1,vgx2\],z0\.h,z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `bfmlal za\.s\[w8,0:1\],z0\.h,z16\.h\[0\]'
+[^ :]+:[0-9]+: Error: z0 ?- ?z15 expected at operand 3 -- `bfmlal za\.s\[w8,0:1\],z0\.h,z16\.h\[0\]'
 [^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `bfmlal za\.s\[w8,0:1\],z0\.h,z0\.h\[-1\]'
 [^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `bfmlal za\.s\[w8,0:1\],z0\.h,z0\.h\[8\]'
 [^ :]+:[0-9]+: Error: operand mismatch -- `bfmlal za\.s\[w8,0:1\],z0\.s,z0\.s\[0\]'
@@ -21,48 +21,48 @@
 [^ :]+:[0-9]+: Error: operand mismatch -- `bfmlal za\.h\[w8,0:1\],z0\.h,z0\.h\[0\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	bfmlal za\.s\[w8, 0:1\], z0\.h, z0\.h\[0\]
-[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w7,0:1\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w12,0:1\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `bfmlal za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: the last offset is equal to the first offset at operand 1 -- `bfmlal za\.s\[w8,0:0\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `bfmlal za\.s\[w8,0:2\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 1 -- `bfmlal za\.s\[w8,1:2\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: the last offset is less than the first offset at operand 1 -- `bfmlal za\.s\[w8,1:0\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,-2:-1\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,8:9\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,16:17\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `bfmlal za\.s\[w8,0:1,vgx4\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `bfmlal za\.s\[w8,0:1\],{z1\.h-z2\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: the register list must have a stride of 1 at operand 2 -- `bfmlal za\.s\[w8,0:1\],{z1\.h,z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `bfmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z16\.h\[0\]'
-[^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `bfmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[-1\]'
-[^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `bfmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[8\]'
-[^ :]+:[0-9]+: Error: operand mismatch -- `bfmlal za\.s\[w8,0:1\],{z0\.s-z1\.s},z0\.s\[0\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w7,0:1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w12,0:1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `bfmlal za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: the last offset is equal to the first offset at operand 1 -- `bfmlal za\.s\[w8,0:0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `bfmlal za\.s\[w8,0:2\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 1 -- `bfmlal za\.s\[w8,1:2\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: the last offset is less than the first offset at operand 1 -- `bfmlal za\.s\[w8,1:0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,-2:-1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,8:9\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,16:17\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `bfmlal za\.s\[w8,0:1,vgx4\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `bfmlal za\.s\[w8,0:1\],{ ?z1\.h ?- ?z2\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 at operand 2 -- `bfmlal za\.s\[w8,0:1\],{ ?z1\.h,z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: z0 ?- ?z15 expected at operand 3 -- `bfmlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},z16\.h\[0\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `bfmlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[-1\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `bfmlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[8\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `bfmlal za\.s\[w8,0:1\],{ ?z0\.s ?- ?z1\.s ?},z0\.s\[0\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	bfmlal za\.s\[w8, 0:1\], {z0\.h-z1\.h}, z0\.h\[0\]
-[^ :]+:[0-9]+: Error: operand mismatch -- `bfmlal za\.h\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `bfmlal za\.h\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	bfmlal za\.s\[w8, 0:1\], {z0\.h-z1\.h}, z0\.h\[0\]
-[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w7,0:1\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w12,0:1\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `bfmlal za\.s\[w8,0\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: the last offset is equal to the first offset at operand 1 -- `bfmlal za\.s\[w8,0:0\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `bfmlal za\.s\[w8,0:2\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 1 -- `bfmlal za\.s\[w8,1:2\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: the last offset is less than the first offset at operand 1 -- `bfmlal za\.s\[w8,1:0\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,-2:-1\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,8:9\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,16:17\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `bfmlal za\.s\[w8,0:1,vgx2\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `bfmlal za\.s\[w8,0:1\],{z1\.h-z4\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: the register list must have a stride of 1 at operand 2 -- `bfmlal za\.s\[w8,0:1\],{z1\.h,z3\.h,z5\.h,z7\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `bfmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z16\.h\[0\]'
-[^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `bfmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[-1\]'
-[^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `bfmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[8\]'
-[^ :]+:[0-9]+: Error: operand mismatch -- `bfmlal za\.s\[w8,0:1\],{z0\.s-z3\.s},z0\.s\[0\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w7,0:1\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w12,0:1\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `bfmlal za\.s\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: the last offset is equal to the first offset at operand 1 -- `bfmlal za\.s\[w8,0:0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `bfmlal za\.s\[w8,0:2\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 1 -- `bfmlal za\.s\[w8,1:2\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: the last offset is less than the first offset at operand 1 -- `bfmlal za\.s\[w8,1:0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,-2:-1\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,8:9\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,16:17\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `bfmlal za\.s\[w8,0:1,vgx2\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `bfmlal za\.s\[w8,0:1\],{ ?z1\.h ?- ?z4\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 at operand 2 -- `bfmlal za\.s\[w8,0:1\],{ ?z1\.h,z3\.h,z5\.h,z7\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: z0 ?- ?z15 expected at operand 3 -- `bfmlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},z16\.h\[0\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `bfmlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[-1\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `bfmlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[8\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `bfmlal za\.s\[w8,0:1\],{ ?z0\.s ?- ?z3\.s ?},z0\.s\[0\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	bfmlal za\.s\[w8, 0:1\], {z0\.h-z3\.h}, z0\.h\[0\]
-[^ :]+:[0-9]+: Error: operand mismatch -- `bfmlal za\.h\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `bfmlal za\.h\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	bfmlal za\.s\[w8, 0:1\], {z0\.h-z3\.h}, z0\.h\[0\]
 [^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w7,0:1\],z0\.h,z0\.h'
@@ -75,81 +75,81 @@
 [^ :]+:[0-9]+: Error: immediate offset out of range 0 to 14 at operand 1 -- `bfmlal za\.s\[w8,-2:-1\],z0\.h,z0\.h'
 [^ :]+:[0-9]+: Error: immediate offset out of range 0 to 14 at operand 1 -- `bfmlal za\.s\[w8,16:17\],z0\.h,z0\.h'
 [^ :]+:[0-9]+: Error: unexpected vector group size at operand 1 -- `bfmlal za\.s\[w8,0:1,vgx2\],z0\.h,z0\.h'
-[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `bfmlal za\.s\[w8,0:1\],z0\.h,z16\.h'
+[^ :]+:[0-9]+: Error: z0 ?- ?z15 expected at operand 3 -- `bfmlal za\.s\[w8,0:1\],z0\.h,z16\.h'
 [^ :]+:[0-9]+: Error: operand mismatch -- `bfmlal za\.s\[w8,0:1\],z0\.s,z0\.s'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	bfmlal za\.s\[w8, 0:1\], z0\.h, z0\.h
 [^ :]+:[0-9]+: Error: operand mismatch -- `bfmlal za\.h\[w8,0:1\],z0\.h,z0\.h'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	bfmlal za\.s\[w8, 0:1\], z0\.h, z0\.h
-[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w7,0:1\],{z0\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w12,0:1\],{z0\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `bfmlal za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: the last offset is equal to the first offset at operand 1 -- `bfmlal za\.s\[w8,0:0\],{z0\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `bfmlal za\.s\[w8,0:2\],{z0\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 1 -- `bfmlal za\.s\[w8,1:2\],{z0\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: the last offset is less than the first offset at operand 1 -- `bfmlal za\.s\[w8,1:0\],{z0\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,-2:-1\],{z0\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,8:9\],{z0\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,16:17\],{z0\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `bfmlal za\.s\[w8,0:1,vgx4\],{z0\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: the register list must have a stride of 1 at operand 2 -- `bfmlal za\.s\[w8,0:1\],{z1\.h,z3\.h},z0\.h'
-[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `bfmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z16\.h'
-[^ :]+:[0-9]+: Error: operand mismatch -- `bfmlal za\.s\[w8,0:1\],{z0\.s-z1\.s},z0\.s'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w7,0:1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w12,0:1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `bfmlal za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: the last offset is equal to the first offset at operand 1 -- `bfmlal za\.s\[w8,0:0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `bfmlal za\.s\[w8,0:2\],{ ?z0\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 1 -- `bfmlal za\.s\[w8,1:2\],{ ?z0\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: the last offset is less than the first offset at operand 1 -- `bfmlal za\.s\[w8,1:0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,-2:-1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,8:9\],{ ?z0\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,16:17\],{ ?z0\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `bfmlal za\.s\[w8,0:1,vgx4\],{ ?z0\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 at operand 2 -- `bfmlal za\.s\[w8,0:1\],{ ?z1\.h,z3\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: z0 ?- ?z15 expected at operand 3 -- `bfmlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},z16\.h'
+[^ :]+:[0-9]+: Error: operand mismatch -- `bfmlal za\.s\[w8,0:1\],{ ?z0\.s ?- ?z1\.s ?},z0\.s'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	bfmlal za\.s\[w8, 0:1\], {z0\.h-z1\.h}, z0\.h
-[^ :]+:[0-9]+: Error: operand mismatch -- `bfmlal za\.h\[w8,0:1\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: operand mismatch -- `bfmlal za\.h\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	bfmlal za\.s\[w8, 0:1\], {z0\.h-z1\.h}, z0\.h
-[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w7,0:1\],{z0\.h-z3\.h},z0\.h'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w12,0:1\],{z0\.h-z3\.h},z0\.h'
-[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `bfmlal za\.s\[w8,0\],{z0\.h-z3\.h},z0\.h'
-[^ :]+:[0-9]+: Error: the last offset is equal to the first offset at operand 1 -- `bfmlal za\.s\[w8,0:0\],{z0\.h-z3\.h},z0\.h'
-[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `bfmlal za\.s\[w8,0:2\],{z0\.h-z3\.h},z0\.h'
-[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 1 -- `bfmlal za\.s\[w8,1:2\],{z0\.h-z3\.h},z0\.h'
-[^ :]+:[0-9]+: Error: the last offset is less than the first offset at operand 1 -- `bfmlal za\.s\[w8,1:0\],{z0\.h-z3\.h},z0\.h'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,-2:-1\],{z0\.h-z3\.h},z0\.h'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,8:9\],{z0\.h-z3\.h},z0\.h'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,16:17\],{z0\.h-z3\.h},z0\.h'
-[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `bfmlal za\.s\[w8,0:1,vgx2\],{z0\.h-z3\.h},z0\.h'
-[^ :]+:[0-9]+: Error: the register list must have a stride of 1 at operand 2 -- `bfmlal za\.s\[w8,0:1\],{z1\.h,z3\.h,z5\.h,z7\.h},z0\.h'
-[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `bfmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z16\.h'
-[^ :]+:[0-9]+: Error: operand mismatch -- `bfmlal za\.s\[w8,0:1\],{z0\.s-z3\.s},z0\.s'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w7,0:1\],{ ?z0\.h ?- ?z3\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w12,0:1\],{ ?z0\.h ?- ?z3\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `bfmlal za\.s\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: the last offset is equal to the first offset at operand 1 -- `bfmlal za\.s\[w8,0:0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `bfmlal za\.s\[w8,0:2\],{ ?z0\.h ?- ?z3\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 1 -- `bfmlal za\.s\[w8,1:2\],{ ?z0\.h ?- ?z3\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: the last offset is less than the first offset at operand 1 -- `bfmlal za\.s\[w8,1:0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,-2:-1\],{ ?z0\.h ?- ?z3\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,8:9\],{ ?z0\.h ?- ?z3\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,16:17\],{ ?z0\.h ?- ?z3\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `bfmlal za\.s\[w8,0:1,vgx2\],{ ?z0\.h ?- ?z3\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 at operand 2 -- `bfmlal za\.s\[w8,0:1\],{ ?z1\.h,z3\.h,z5\.h,z7\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: z0 ?- ?z15 expected at operand 3 -- `bfmlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},z16\.h'
+[^ :]+:[0-9]+: Error: operand mismatch -- `bfmlal za\.s\[w8,0:1\],{ ?z0\.s ?- ?z3\.s ?},z0\.s'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	bfmlal za\.s\[w8, 0:1\], {z0\.h-z3\.h}, z0\.h
-[^ :]+:[0-9]+: Error: operand mismatch -- `bfmlal za\.h\[w8,0:1\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: operand mismatch -- `bfmlal za\.h\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},z0\.h'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	bfmlal za\.s\[w8, 0:1\], {z0\.h-z3\.h}, z0\.h
-[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w7,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w12,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,-2:-1\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 1 -- `bfmlal za\.s\[w8,1:2\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,8:9\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `bfmlal za\.s\[w8,0:1\],{z1\.h-z2\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `bfmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},{z15\.h-z16\.h}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `bfmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},{z31\.h,z0\.h}'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w7,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w12,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,-2:-1\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 1 -- `bfmlal za\.s\[w8,1:2\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,8:9\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `bfmlal za\.s\[w8,0:1\],{z1\.h-z4\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `bfmlal za\.s\[w8,0:1\],{z2\.h-z5\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `bfmlal za\.s\[w8,0:1\],{z3\.h-z6\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `bfmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},{z15\.h-z18\.h}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `bfmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},{z29\.h,z30\.h,z31\.h,z0\.h}'
-[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `bfmlal za\.s\[w8,0:1\],{z0\.h-z2\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `bfmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `bfmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},{z0\.h-z2\.h}'
-[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `bfmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 3 -- `bfmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},{z0\.h-z4\.h}'
-[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `bfmlal za\.s\[w8,0:1,vgx4\],{z0\.h-z1\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `bfmlal za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `bfmlal za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `bfmlal za\.s\[w8,0:1,vgx2\],{z0\.h-z3\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: operand mismatch -- `bfmlal za\[w8,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w7,0:1\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w12,0:1\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,-2:-1\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 1 -- `bfmlal za\.s\[w8,1:2\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,8:9\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `bfmlal za\.s\[w8,0:1\],{ ?z1\.h ?- ?z2\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `bfmlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},{ ?z15\.h ?- ?z16\.h ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `bfmlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},{ ?z31\.h,z0\.h ?}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w7,0:1\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w12,0:1\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,-2:-1\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 1 -- `bfmlal za\.s\[w8,1:2\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,8:9\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `bfmlal za\.s\[w8,0:1\],{ ?z1\.h ?- ?z4\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `bfmlal za\.s\[w8,0:1\],{ ?z2\.h ?- ?z5\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `bfmlal za\.s\[w8,0:1\],{ ?z3\.h ?- ?z6\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `bfmlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},{ ?z15\.h ?- ?z18\.h ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `bfmlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},{ ?z29\.h,z30\.h,z31\.h,z0\.h ?}'
+[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `bfmlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z2\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `bfmlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `bfmlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z2\.h ?}'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `bfmlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 3 -- `bfmlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z4\.h ?}'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `bfmlal za\.s\[w8,0:1,vgx4\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `bfmlal za\.s\[w8,0:1,vgx4\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `bfmlal za\.s\[w8,0:1,vgx2\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `bfmlal za\.s\[w8,0:1,vgx2\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: operand mismatch -- `bfmlal za\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	bfmlal za\.s\[w8, 0:1\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
-[^ :]+:[0-9]+: Error: operand mismatch -- `bfmlal za\[w8,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: operand mismatch -- `bfmlal za\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	bfmlal za\.s\[w8, 0:1\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
diff --git a/gas/testsuite/gas/aarch64/sme2-12-noarch.l b/gas/testsuite/gas/aarch64/sme2-12-noarch.l
index 7544d1e..29a7bc6 100644
--- a/gas/testsuite/gas/aarch64/sme2-12-noarch.l
+++ b/gas/testsuite/gas/aarch64/sme2-12-noarch.l
@@ -8,26 +8,26 @@
 [^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],z0\.h,z15\.h\[0\]'
 [^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],z0\.h,z0\.h\[7\]'
 [^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w9,10:11\],z21\.h,z9\.h\[2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.s\[W8,0:1,VGx2\],{Z0\.h-Z1\.h},Z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.S\[W8,0:1,VGX2\],{Z0\.H-Z1\.H},Z0\.H\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w11,0:1\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,6:7\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z30\.h-z31\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z15\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[7\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w9,4:5\],{z18\.h-z19\.h},z9\.h\[3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.s\[W8,0:1,VGx4\],{Z0\.h-Z3\.h},Z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.S\[W8,0:1,VGX4\],{Z0\.H-Z3\.H},Z0\.H\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w11,0:1\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,6:7\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z28\.h-z31\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z15\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[7\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w9,4:5\],{z24\.h-z27\.h},z14\.h\[5\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1,vgx2\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.s\[W8,0:1,VGx2\],{ ?Z0\.h ?- ?Z1\.h ?},Z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.S\[W8,0:1,VGX2\],{ ?Z0\.H ?- ?Z1\.H ?},Z0\.H\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w11,0:1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,6:7\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{ ?z30\.h ?- ?z31\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w9,4:5\],{ ?z18\.h ?- ?z19\.h ?},z9\.h\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1,vgx4\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.s\[W8,0:1,VGx4\],{ ?Z0\.h ?- ?Z3\.h ?},Z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.S\[W8,0:1,VGX4\],{ ?Z0\.H ?- ?Z3\.H ?},Z0\.H\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w11,0:1\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,6:7\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{ ?z28\.h ?- ?z31\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w9,4:5\],{ ?z24\.h ?- ?z27\.h ?},z14\.h\[5\]'
 [^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],z0\.h,z0\.h'
 [^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.s\[W8,0:1\],Z0\.h,Z0\.h'
 [^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.S\[W8,0:1\],Z0\.H,Z0\.H'
@@ -36,52 +36,52 @@
 [^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],z31\.h,z0\.h'
 [^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],z0\.h,z15\.h'
 [^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w10,2:3\],z25\.h,z7\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.s\[W8,0:1,VGx2\],{Z0\.h-Z1\.h},Z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.S\[W8,0:1,VGX2\],{Z0\.H-Z1\.H},Z0\.H'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w11,0:1\],{z0\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,6:7\],{z0\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z1\.h-z2\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z30\.h-z31\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z31\.h,z0\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z31\.h-z0\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z15\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w9,4:5\],{z18\.h-z19\.h},z13\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.s\[W8,0:1,VGx4\],{Z0\.h-Z3\.h},Z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.S\[W8,0:1,VGX4\],{Z0\.H-Z3\.H},Z0\.H'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w11,0:1\],{z0\.h-z3\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,6:7\],{z0\.h-z3\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w11,0:1\],{z1\.h-z4\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z28\.h-z31\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z29\.h,z30\.h,z31\.h,z0\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z29\.h-z0\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z30\.h,z31\.h,z0\.h,z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z30\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z31\.h,z0\.h,z1\.h,z2\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z31\.h-z2\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z15\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w9,4:5\],{z24\.h-z27\.h},z14\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.s\[W8,0:1,VGx2\],{Z0\.h-Z1\.h},{Z0\.h-Z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.S\[W8,0:1,VGX2\],{Z0\.H-Z1\.H},{Z0\.H-Z1\.H}'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w11,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,6:7\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z30\.h-z31\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},{z30\.h-z31\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w10,2:3\],{z22\.h-z23\.h},{z18\.h-z19\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.s\[W8,0:1,VGx4\],{Z0\.h-Z3\.h},{Z0\.h-Z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.S\[W8,0:1,VGX4\],{Z0\.H-Z3\.H},{Z0\.H-Z3\.H}'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w11,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,6:7\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z28\.h-z31\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},{z28\.h-z31\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w11,4:5\],{z16\.h-z19\.h},{z24\.h-z27\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1,vgx2\],{ ?z0\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.s\[W8,0:1,VGx2\],{ ?Z0\.h ?- ?Z1\.h ?},Z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.S\[W8,0:1,VGX2\],{ ?Z0\.H ?- ?Z1\.H ?},Z0\.H'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w11,0:1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,6:7\],{ ?z0\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{ ?z1\.h ?- ?z2\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{ ?z30\.h ?- ?z31\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{ ?z31\.h,z0\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{ ?z31\.h ?- ?z0\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w9,4:5\],{ ?z18\.h ?- ?z19\.h ?},z13\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1,vgx4\],{ ?z0\.h ?- ?z3\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.s\[W8,0:1,VGx4\],{ ?Z0\.h ?- ?Z3\.h ?},Z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.S\[W8,0:1,VGX4\],{ ?Z0\.H ?- ?Z3\.H ?},Z0\.H'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w11,0:1\],{ ?z0\.h ?- ?z3\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,6:7\],{ ?z0\.h ?- ?z3\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w11,0:1\],{ ?z1\.h ?- ?z4\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{ ?z28\.h ?- ?z31\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{ ?z29\.h,z30\.h,z31\.h,z0\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{ ?z29\.h ?- ?z0\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{ ?z30\.h,z31\.h,z0\.h,z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{ ?z30\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{ ?z31\.h,z0\.h,z1\.h,z2\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{ ?z31\.h ?- ?z2\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w9,4:5\],{ ?z24\.h ?- ?z27\.h ?},z14\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1,vgx2\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.s\[W8,0:1,VGx2\],{ ?Z0\.h ?- ?Z1\.h ?},{ ?Z0\.h ?- ?Z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.S\[W8,0:1,VGX2\],{ ?Z0\.H ?- ?Z1\.H ?},{ ?Z0\.H ?- ?Z1\.H ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w11,0:1\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,6:7\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{ ?z30\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},{ ?z30\.h ?- ?z31\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w10,2:3\],{ ?z22\.h ?- ?z23\.h ?},{ ?z18\.h ?- ?z19\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1,vgx4\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.s\[W8,0:1,VGx4\],{ ?Z0\.h ?- ?Z3\.h ?},{ ?Z0\.h ?- ?Z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.S\[W8,0:1,VGX4\],{ ?Z0\.H ?- ?Z3\.H ?},{ ?Z0\.H ?- ?Z3\.H ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w11,0:1\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,6:7\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{ ?z28\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},{ ?z28\.h ?- ?z31\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w11,4:5\],{ ?z16\.h ?- ?z19\.h ?},{ ?z24\.h ?- ?z27\.h ?}'
 [^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],z0\.h,z0\.h\[0\]'
 [^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.s\[W8,0:1\],Z0\.h,Z0\.h\[0\]'
 [^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.S\[W8,0:1\],Z0\.H,Z0\.H\[0\]'
@@ -91,26 +91,26 @@
 [^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],z0\.h,z15\.h\[0\]'
 [^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],z0\.h,z0\.h\[7\]'
 [^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w9,10:11\],z21\.h,z9\.h\[2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.s\[W8,0:1,VGx2\],{Z0\.h-Z1\.h},Z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.S\[W8,0:1,VGX2\],{Z0\.H-Z1\.H},Z0\.H\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w11,0:1\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,6:7\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z30\.h-z31\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z15\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[7\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w9,4:5\],{z18\.h-z19\.h},z9\.h\[3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.s\[W8,0:1,VGx4\],{Z0\.h-Z3\.h},Z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.S\[W8,0:1,VGX4\],{Z0\.H-Z3\.H},Z0\.H\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w11,0:1\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,6:7\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z28\.h-z31\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z15\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[7\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w9,4:5\],{z24\.h-z27\.h},z14\.h\[5\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1,vgx2\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.s\[W8,0:1,VGx2\],{ ?Z0\.h ?- ?Z1\.h ?},Z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.S\[W8,0:1,VGX2\],{ ?Z0\.H ?- ?Z1\.H ?},Z0\.H\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w11,0:1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,6:7\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{ ?z30\.h ?- ?z31\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w9,4:5\],{ ?z18\.h ?- ?z19\.h ?},z9\.h\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1,vgx4\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.s\[W8,0:1,VGx4\],{ ?Z0\.h ?- ?Z3\.h ?},Z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.S\[W8,0:1,VGX4\],{ ?Z0\.H ?- ?Z3\.H ?},Z0\.H\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w11,0:1\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,6:7\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{ ?z28\.h ?- ?z31\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w9,4:5\],{ ?z24\.h ?- ?z27\.h ?},z14\.h\[5\]'
 [^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],z0\.h,z0\.h'
 [^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.s\[W8,0:1\],Z0\.h,Z0\.h'
 [^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.S\[W8,0:1\],Z0\.H,Z0\.H'
@@ -119,42 +119,42 @@
 [^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],z31\.h,z0\.h'
 [^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],z0\.h,z15\.h'
 [^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w10,2:3\],z25\.h,z7\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.s\[W8,0:1,VGx2\],{Z0\.h-Z1\.h},Z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.S\[W8,0:1,VGX2\],{Z0\.H-Z1\.H},Z0\.H'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w11,0:1\],{z0\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,6:7\],{z0\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z30\.h-z31\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z15\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w9,4:5\],{z18\.h-z19\.h},z13\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.s\[W8,0:1,VGx4\],{Z0\.h-Z3\.h},Z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.S\[W8,0:1,VGX4\],{Z0\.H-Z3\.H},Z0\.H'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w11,0:1\],{z0\.h-z3\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,6:7\],{z0\.h-z3\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z28\.h-z31\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z15\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w9,4:5\],{z24\.h-z27\.h},z14\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.s\[W8,0:1,VGx2\],{Z0\.h-Z1\.h},{Z0\.h-Z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.S\[W8,0:1,VGX2\],{Z0\.H-Z1\.H},{Z0\.H-Z1\.H}'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w11,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,6:7\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z30\.h-z31\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},{z30\.h-z31\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w10,2:3\],{z22\.h-z23\.h},{z18\.h-z19\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.s\[W8,0:1,VGx4\],{Z0\.h-Z3\.h},{Z0\.h-Z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.S\[W8,0:1,VGX4\],{Z0\.H-Z3\.H},{Z0\.H-Z3\.H}'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w11,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,6:7\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z28\.h-z31\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},{z28\.h-z31\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w11,4:5\],{z16\.h-z19\.h},{z24\.h-z27\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1,vgx2\],{ ?z0\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.s\[W8,0:1,VGx2\],{ ?Z0\.h ?- ?Z1\.h ?},Z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.S\[W8,0:1,VGX2\],{ ?Z0\.H ?- ?Z1\.H ?},Z0\.H'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w11,0:1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,6:7\],{ ?z0\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{ ?z30\.h ?- ?z31\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w9,4:5\],{ ?z18\.h ?- ?z19\.h ?},z13\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1,vgx4\],{ ?z0\.h ?- ?z3\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.s\[W8,0:1,VGx4\],{ ?Z0\.h ?- ?Z3\.h ?},Z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.S\[W8,0:1,VGX4\],{ ?Z0\.H ?- ?Z3\.H ?},Z0\.H'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w11,0:1\],{ ?z0\.h ?- ?z3\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,6:7\],{ ?z0\.h ?- ?z3\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{ ?z28\.h ?- ?z31\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w9,4:5\],{ ?z24\.h ?- ?z27\.h ?},z14\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1,vgx2\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.s\[W8,0:1,VGx2\],{ ?Z0\.h ?- ?Z1\.h ?},{ ?Z0\.h ?- ?Z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.S\[W8,0:1,VGX2\],{ ?Z0\.H ?- ?Z1\.H ?},{ ?Z0\.H ?- ?Z1\.H ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w11,0:1\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,6:7\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{ ?z30\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},{ ?z30\.h ?- ?z31\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w10,2:3\],{ ?z22\.h ?- ?z23\.h ?},{ ?z18\.h ?- ?z19\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1,vgx4\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.s\[W8,0:1,VGx4\],{ ?Z0\.h ?- ?Z3\.h ?},{ ?Z0\.h ?- ?Z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.S\[W8,0:1,VGX4\],{ ?Z0\.H ?- ?Z3\.H ?},{ ?Z0\.H ?- ?Z3\.H ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w11,0:1\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,6:7\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{ ?z28\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},{ ?z28\.h ?- ?z31\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w11,4:5\],{ ?z16\.h ?- ?z19\.h ?},{ ?z24\.h ?- ?z27\.h ?}'
 [^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],z0\.h,z0\.h\[0\]'
 [^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.s\[W8,0:1\],Z0\.h,Z0\.h\[0\]'
 [^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.S\[W8,0:1\],Z0\.H,Z0\.H\[0\]'
@@ -164,26 +164,26 @@
 [^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],z0\.h,z15\.h\[0\]'
 [^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],z0\.h,z0\.h\[7\]'
 [^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w9,10:11\],z21\.h,z9\.h\[2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.s\[W8,0:1,VGx2\],{Z0\.h-Z1\.h},Z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.S\[W8,0:1,VGX2\],{Z0\.H-Z1\.H},Z0\.H\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w11,0:1\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,6:7\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z30\.h-z31\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z15\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[7\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w9,4:5\],{z18\.h-z19\.h},z9\.h\[3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.s\[W8,0:1,VGx4\],{Z0\.h-Z3\.h},Z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.S\[W8,0:1,VGX4\],{Z0\.H-Z3\.H},Z0\.H\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w11,0:1\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,6:7\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z28\.h-z31\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z15\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[7\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w9,4:5\],{z24\.h-z27\.h},z14\.h\[5\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1,vgx2\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.s\[W8,0:1,VGx2\],{ ?Z0\.h ?- ?Z1\.h ?},Z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.S\[W8,0:1,VGX2\],{ ?Z0\.H ?- ?Z1\.H ?},Z0\.H\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w11,0:1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,6:7\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{ ?z30\.h ?- ?z31\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w9,4:5\],{ ?z18\.h ?- ?z19\.h ?},z9\.h\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1,vgx4\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.s\[W8,0:1,VGx4\],{ ?Z0\.h ?- ?Z3\.h ?},Z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.S\[W8,0:1,VGX4\],{ ?Z0\.H ?- ?Z3\.H ?},Z0\.H\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w11,0:1\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,6:7\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{ ?z28\.h ?- ?z31\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w9,4:5\],{ ?z24\.h ?- ?z27\.h ?},z14\.h\[5\]'
 [^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],z0\.h,z0\.h'
 [^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.s\[W8,0:1\],Z0\.h,Z0\.h'
 [^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.S\[W8,0:1\],Z0\.H,Z0\.H'
@@ -192,48 +192,48 @@
 [^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],z31\.h,z0\.h'
 [^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],z0\.h,z15\.h'
 [^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w10,2:3\],z25\.h,z7\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.s\[W8,0:1,VGx2\],{Z0\.h-Z1\.h},Z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.S\[W8,0:1,VGX2\],{Z0\.H-Z1\.H},Z0\.H'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w11,0:1\],{z0\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,6:7\],{z0\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z30\.h-z31\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z31\.h,z0\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z31\.h-z0\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z15\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w9,4:5\],{z19\.h-z20\.h},z13\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.s\[W8,0:1,VGx4\],{Z0\.h-Z3\.h},Z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.S\[W8,0:1,VGX4\],{Z0\.H-Z3\.H},Z0\.H'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w11,0:1\],{z0\.h-z3\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,6:7\],{z0\.h-z3\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z28\.h-z31\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z29\.h-z0\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z30\.h,z31\.h,z0\.h,z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z30\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z31\.h-z2\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z15\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w9,4:5\],{z25\.h-z28\.h},z14\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.s\[W8,0:1,VGx2\],{Z0\.h-Z1\.h},{Z0\.h-Z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.S\[W8,0:1,VGX2\],{Z0\.H-Z1\.H},{Z0\.H-Z1\.H}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w11,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,6:7\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z30\.h-z31\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},{z30\.h-z31\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w10,2:3\],{z22\.h-z23\.h},{z18\.h-z19\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.s\[W8,0:1,VGx4\],{Z0\.h-Z3\.h},{Z0\.h-Z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.S\[W8,0:1,VGX4\],{Z0\.H-Z3\.H},{Z0\.H-Z3\.H}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w11,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,6:7\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z28\.h-z31\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},{z28\.h-z31\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w11,4:5\],{z16\.h-z19\.h},{z24\.h-z27\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1,vgx2\],{ ?z0\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.s\[W8,0:1,VGx2\],{ ?Z0\.h ?- ?Z1\.h ?},Z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.S\[W8,0:1,VGX2\],{ ?Z0\.H ?- ?Z1\.H ?},Z0\.H'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w11,0:1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,6:7\],{ ?z0\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{ ?z30\.h ?- ?z31\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{ ?z31\.h,z0\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{ ?z31\.h ?- ?z0\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w9,4:5\],{ ?z19\.h ?- ?z20\.h ?},z13\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1,vgx4\],{ ?z0\.h ?- ?z3\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.s\[W8,0:1,VGx4\],{ ?Z0\.h ?- ?Z3\.h ?},Z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.S\[W8,0:1,VGX4\],{ ?Z0\.H ?- ?Z3\.H ?},Z0\.H'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w11,0:1\],{ ?z0\.h ?- ?z3\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,6:7\],{ ?z0\.h ?- ?z3\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{ ?z28\.h ?- ?z31\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{ ?z29\.h ?- ?z0\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{ ?z30\.h,z31\.h,z0\.h,z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{ ?z30\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{ ?z31\.h ?- ?z2\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w9,4:5\],{ ?z25\.h ?- ?z28\.h ?},z14\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1,vgx2\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.s\[W8,0:1,VGx2\],{ ?Z0\.h ?- ?Z1\.h ?},{ ?Z0\.h ?- ?Z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.S\[W8,0:1,VGX2\],{ ?Z0\.H ?- ?Z1\.H ?},{ ?Z0\.H ?- ?Z1\.H ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w11,0:1\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,6:7\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{ ?z30\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},{ ?z30\.h ?- ?z31\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w10,2:3\],{ ?z22\.h ?- ?z23\.h ?},{ ?z18\.h ?- ?z19\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1,vgx4\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.s\[W8,0:1,VGx4\],{ ?Z0\.h ?- ?Z3\.h ?},{ ?Z0\.h ?- ?Z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.S\[W8,0:1,VGX4\],{ ?Z0\.H ?- ?Z3\.H ?},{ ?Z0\.H ?- ?Z3\.H ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w11,0:1\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,6:7\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{ ?z28\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},{ ?z28\.h ?- ?z31\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w11,4:5\],{ ?z16\.h ?- ?z19\.h ?},{ ?z24\.h ?- ?z27\.h ?}'
 [^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],z0\.h,z0\.h\[0\]'
 [^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.s\[W8,0:1\],Z0\.h,Z0\.h\[0\]'
 [^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.S\[W8,0:1\],Z0\.H,Z0\.H\[0\]'
@@ -243,26 +243,26 @@
 [^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],z0\.h,z15\.h\[0\]'
 [^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],z0\.h,z0\.h\[7\]'
 [^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w9,10:11\],z21\.h,z9\.h\[2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.s\[W8,0:1,VGx2\],{Z0\.h-Z1\.h},Z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.S\[W8,0:1,VGX2\],{Z0\.H-Z1\.H},Z0\.H\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w11,0:1\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,6:7\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z30\.h-z31\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z15\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[7\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w9,4:5\],{z18\.h-z19\.h},z9\.h\[3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.s\[W8,0:1,VGx4\],{Z0\.h-Z3\.h},Z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.S\[W8,0:1,VGX4\],{Z0\.H-Z3\.H},Z0\.H\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w11,0:1\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,6:7\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z28\.h-z31\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z15\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[7\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w9,4:5\],{z24\.h-z27\.h},z14\.h\[5\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1,vgx2\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.s\[W8,0:1,VGx2\],{ ?Z0\.h ?- ?Z1\.h ?},Z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.S\[W8,0:1,VGX2\],{ ?Z0\.H ?- ?Z1\.H ?},Z0\.H\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w11,0:1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,6:7\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{ ?z30\.h ?- ?z31\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w9,4:5\],{ ?z18\.h ?- ?z19\.h ?},z9\.h\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1,vgx4\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.s\[W8,0:1,VGx4\],{ ?Z0\.h ?- ?Z3\.h ?},Z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.S\[W8,0:1,VGX4\],{ ?Z0\.H ?- ?Z3\.H ?},Z0\.H\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w11,0:1\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,6:7\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{ ?z28\.h ?- ?z31\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w9,4:5\],{ ?z24\.h ?- ?z27\.h ?},z14\.h\[5\]'
 [^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],z0\.h,z0\.h'
 [^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.s\[W8,0:1\],Z0\.h,Z0\.h'
 [^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.S\[W8,0:1\],Z0\.H,Z0\.H'
@@ -271,48 +271,48 @@
 [^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],z31\.h,z0\.h'
 [^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],z0\.h,z15\.h'
 [^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w10,2:3\],z25\.h,z7\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.s\[W8,0:1,VGx2\],{Z0\.h-Z1\.h},Z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.S\[W8,0:1,VGX2\],{Z0\.H-Z1\.H},Z0\.H'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w11,0:1\],{z0\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,6:7\],{z0\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z30\.h-z31\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z31\.h,z0\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z31\.h-z0\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z15\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w9,4:5\],{z19\.h-z20\.h},z13\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.s\[W8,0:1,VGx4\],{Z0\.h-Z3\.h},Z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.S\[W8,0:1,VGX4\],{Z0\.H-Z3\.H},Z0\.H'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w11,0:1\],{z0\.h-z3\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,6:7\],{z0\.h-z3\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z28\.h-z31\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z29\.h-z0\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z30\.h,z31\.h,z0\.h,z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z30\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z31\.h-z2\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z15\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w9,4:5\],{z25\.h-z28\.h},z14\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.s\[W8,0:1,VGx2\],{Z0\.h-Z1\.h},{Z0\.h-Z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.S\[W8,0:1,VGX2\],{Z0\.H-Z1\.H},{Z0\.H-Z1\.H}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w11,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,6:7\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z30\.h-z31\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},{z30\.h-z31\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w10,2:3\],{z22\.h-z23\.h},{z18\.h-z19\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.s\[W8,0:1,VGx4\],{Z0\.h-Z3\.h},{Z0\.h-Z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.S\[W8,0:1,VGX4\],{Z0\.H-Z3\.H},{Z0\.H-Z3\.H}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w11,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,6:7\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z28\.h-z31\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},{z28\.h-z31\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w11,4:5\],{z16\.h-z19\.h},{z24\.h-z27\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1,vgx2\],{ ?z0\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.s\[W8,0:1,VGx2\],{ ?Z0\.h ?- ?Z1\.h ?},Z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.S\[W8,0:1,VGX2\],{ ?Z0\.H ?- ?Z1\.H ?},Z0\.H'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w11,0:1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,6:7\],{ ?z0\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{ ?z30\.h ?- ?z31\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{ ?z31\.h,z0\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{ ?z31\.h ?- ?z0\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w9,4:5\],{ ?z19\.h ?- ?z20\.h ?},z13\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1,vgx4\],{ ?z0\.h ?- ?z3\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.s\[W8,0:1,VGx4\],{ ?Z0\.h ?- ?Z3\.h ?},Z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.S\[W8,0:1,VGX4\],{ ?Z0\.H ?- ?Z3\.H ?},Z0\.H'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w11,0:1\],{ ?z0\.h ?- ?z3\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,6:7\],{ ?z0\.h ?- ?z3\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{ ?z28\.h ?- ?z31\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{ ?z29\.h ?- ?z0\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{ ?z30\.h,z31\.h,z0\.h,z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{ ?z30\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{ ?z31\.h ?- ?z2\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w9,4:5\],{ ?z25\.h ?- ?z28\.h ?},z14\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1,vgx2\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.s\[W8,0:1,VGx2\],{ ?Z0\.h ?- ?Z1\.h ?},{ ?Z0\.h ?- ?Z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.S\[W8,0:1,VGX2\],{ ?Z0\.H ?- ?Z1\.H ?},{ ?Z0\.H ?- ?Z1\.H ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w11,0:1\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,6:7\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{ ?z30\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},{ ?z30\.h ?- ?z31\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w10,2:3\],{ ?z22\.h ?- ?z23\.h ?},{ ?z18\.h ?- ?z19\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1,vgx4\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.s\[W8,0:1,VGx4\],{ ?Z0\.h ?- ?Z3\.h ?},{ ?Z0\.h ?- ?Z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.S\[W8,0:1,VGX4\],{ ?Z0\.H ?- ?Z3\.H ?},{ ?Z0\.H ?- ?Z3\.H ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w11,0:1\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,6:7\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{ ?z28\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},{ ?z28\.h ?- ?z31\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w11,4:5\],{ ?z16\.h ?- ?z19\.h ?},{ ?z24\.h ?- ?z27\.h ?}'
 [^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],z0\.h,z0\.h\[0\]'
 [^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w11,0:1\],z0\.h,z0\.h\[0\]'
 [^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,14:15\],z0\.h,z0\.h\[0\]'
@@ -320,63 +320,63 @@
 [^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],z0\.h,z15\.h\[0\]'
 [^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],z0\.h,z0\.h\[7\]'
 [^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w9,10:11\],z21\.h,z9\.h\[2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w11,0:1\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,6:7\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z30\.h-z31\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z15\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[7\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w9,4:5\],{z18\.h-z19\.h},z9\.h\[3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w11,0:1\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,6:7\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z28\.h-z31\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z15\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[7\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w9,4:5\],{z24\.h-z27\.h},z14\.h\[5\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1,vgx2\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w11,0:1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,6:7\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{ ?z30\.h ?- ?z31\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w9,4:5\],{ ?z18\.h ?- ?z19\.h ?},z9\.h\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1,vgx4\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w11,0:1\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,6:7\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{ ?z28\.h ?- ?z31\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w9,4:5\],{ ?z24\.h ?- ?z27\.h ?},z14\.h\[5\]'
 [^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],z0\.h,z0\.h'
 [^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w11,0:1\],z0\.h,z0\.h'
 [^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,14:15\],z0\.h,z0\.h'
 [^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],z31\.h,z0\.h'
 [^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],z0\.h,z15\.h'
 [^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w10,2:3\],z25\.h,z7\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w11,0:1\],{z0\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,6:7\],{z0\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z30\.h-z31\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z31\.h,z0\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z31\.h-z0\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z15\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w9,4:5\],{z19\.h-z20\.h},z13\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w11,0:1\],{z0\.h-z3\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,6:7\],{z0\.h-z3\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z28\.h-z31\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z29\.h-z0\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z30\.h,z31\.h,z0\.h,z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z30\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z31\.h,z0\.h,z1\.h,z2\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z31\.h-z2\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z15\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w9,4:5\],{z25\.h-z28\.h},z14\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w11,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,6:7\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z30\.h-z31\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z0\.h-z1\.h},{z30\.h-z31\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w10,2:3\],{z22\.h-z23\.h},{z18\.h-z19\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w11,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,6:7\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z28\.h-z31\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z0\.h-z3\.h},{z28\.h-z31\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w11,4:5\],{z16\.h-z19\.h},{z24\.h-z27\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1,vgx2\],{ ?z0\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w11,0:1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,6:7\],{ ?z0\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{ ?z30\.h ?- ?z31\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{ ?z31\.h,z0\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{ ?z31\.h ?- ?z0\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w9,4:5\],{ ?z19\.h ?- ?z20\.h ?},z13\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1,vgx4\],{ ?z0\.h ?- ?z3\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w11,0:1\],{ ?z0\.h ?- ?z3\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,6:7\],{ ?z0\.h ?- ?z3\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{ ?z28\.h ?- ?z31\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{ ?z29\.h ?- ?z0\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{ ?z30\.h,z31\.h,z0\.h,z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{ ?z30\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{ ?z31\.h,z0\.h,z1\.h,z2\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{ ?z31\.h ?- ?z2\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w9,4:5\],{ ?z25\.h ?- ?z28\.h ?},z14\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1,vgx2\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w11,0:1\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,6:7\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{ ?z30\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},{ ?z30\.h ?- ?z31\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w10,2:3\],{ ?z22\.h ?- ?z23\.h ?},{ ?z18\.h ?- ?z19\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1,vgx4\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w11,0:1\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,6:7\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{ ?z28\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},{ ?z28\.h ?- ?z31\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w11,4:5\],{ ?z16\.h ?- ?z19\.h ?},{ ?z24\.h ?- ?z27\.h ?}'
 [^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],z0\.h,z0\.h\[0\]'
 [^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w11,0:1\],z0\.h,z0\.h\[0\]'
 [^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,14:15\],z0\.h,z0\.h\[0\]'
@@ -384,63 +384,63 @@
 [^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],z0\.h,z15\.h\[0\]'
 [^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],z0\.h,z0\.h\[7\]'
 [^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w9,10:11\],z21\.h,z9\.h\[2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w11,0:1\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,6:7\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z30\.h-z31\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z15\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[7\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w9,4:5\],{z18\.h-z19\.h},z9\.h\[3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w11,0:1\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,6:7\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z28\.h-z31\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z15\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[7\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w9,4:5\],{z24\.h-z27\.h},z14\.h\[5\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1,vgx2\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w11,0:1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,6:7\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{ ?z30\.h ?- ?z31\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w9,4:5\],{ ?z18\.h ?- ?z19\.h ?},z9\.h\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1,vgx4\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w11,0:1\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,6:7\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{ ?z28\.h ?- ?z31\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w9,4:5\],{ ?z24\.h ?- ?z27\.h ?},z14\.h\[5\]'
 [^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],z0\.h,z0\.h'
 [^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w11,0:1\],z0\.h,z0\.h'
 [^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,14:15\],z0\.h,z0\.h'
 [^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],z31\.h,z0\.h'
 [^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],z0\.h,z15\.h'
 [^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w10,2:3\],z25\.h,z7\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w11,0:1\],{z0\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,6:7\],{z0\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z30\.h-z31\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z31\.h,z0\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z31\.h-z0\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z15\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w9,4:5\],{z19\.h-z20\.h},z13\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w11,0:1\],{z0\.h-z3\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,6:7\],{z0\.h-z3\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z28\.h-z31\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z29\.h-z0\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z30\.h,z31\.h,z0\.h,z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z30\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z31\.h,z0\.h,z1\.h,z2\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z31\.h-z2\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z15\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w9,4:5\],{z25\.h-z28\.h},z14\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w11,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,6:7\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z30\.h-z31\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},{z30\.h-z31\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w10,2:3\],{z22\.h-z23\.h},{z18\.h-z19\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w11,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,6:7\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z28\.h-z31\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},{z28\.h-z31\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w11,4:5\],{z16\.h-z19\.h},{z24\.h-z27\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1,vgx2\],{ ?z0\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w11,0:1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,6:7\],{ ?z0\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{ ?z30\.h ?- ?z31\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{ ?z31\.h,z0\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{ ?z31\.h ?- ?z0\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w9,4:5\],{ ?z19\.h ?- ?z20\.h ?},z13\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1,vgx4\],{ ?z0\.h ?- ?z3\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w11,0:1\],{ ?z0\.h ?- ?z3\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,6:7\],{ ?z0\.h ?- ?z3\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{ ?z28\.h ?- ?z31\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{ ?z29\.h ?- ?z0\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{ ?z30\.h,z31\.h,z0\.h,z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{ ?z30\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{ ?z31\.h,z0\.h,z1\.h,z2\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{ ?z31\.h ?- ?z2\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w9,4:5\],{ ?z25\.h ?- ?z28\.h ?},z14\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1,vgx2\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w11,0:1\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,6:7\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{ ?z30\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},{ ?z30\.h ?- ?z31\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w10,2:3\],{ ?z22\.h ?- ?z23\.h ?},{ ?z18\.h ?- ?z19\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1,vgx4\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w11,0:1\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,6:7\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{ ?z28\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},{ ?z28\.h ?- ?z31\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w11,4:5\],{ ?z16\.h ?- ?z19\.h ?},{ ?z24\.h ?- ?z27\.h ?}'
 [^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],z0\.h,z0\.h\[0\]'
 [^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w11,0:1\],z0\.h,z0\.h\[0\]'
 [^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,14:15\],z0\.h,z0\.h\[0\]'
@@ -448,63 +448,63 @@
 [^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],z0\.h,z15\.h\[0\]'
 [^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],z0\.h,z0\.h\[7\]'
 [^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w9,10:11\],z21\.h,z9\.h\[2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w11,0:1\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,6:7\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z30\.h-z31\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z15\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[7\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w9,4:5\],{z18\.h-z19\.h},z9\.h\[3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w11,0:1\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,6:7\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z28\.h-z31\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z15\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[7\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w9,4:5\],{z24\.h-z27\.h},z14\.h\[5\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1,vgx2\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w11,0:1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,6:7\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{ ?z30\.h ?- ?z31\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w9,4:5\],{ ?z18\.h ?- ?z19\.h ?},z9\.h\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1,vgx4\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w11,0:1\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,6:7\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{ ?z28\.h ?- ?z31\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w9,4:5\],{ ?z24\.h ?- ?z27\.h ?},z14\.h\[5\]'
 [^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],z0\.h,z0\.h'
 [^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w11,0:1\],z0\.h,z0\.h'
 [^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,14:15\],z0\.h,z0\.h'
 [^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],z31\.h,z0\.h'
 [^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],z0\.h,z15\.h'
 [^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w10,2:3\],z25\.h,z7\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w11,0:1\],{z0\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,6:7\],{z0\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z30\.h-z31\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z31\.h,z0\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z31\.h-z0\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z15\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w9,4:5\],{z19\.h-z20\.h},z13\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w11,0:1\],{z0\.h-z3\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,6:7\],{z0\.h-z3\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z28\.h-z31\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z29\.h-z0\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z30\.h,z31\.h,z0\.h,z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z30\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z31\.h,z0\.h,z1\.h,z2\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z31\.h-z2\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z15\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w9,4:5\],{z25\.h-z28\.h},z14\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w11,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,6:7\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z30\.h-z31\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z0\.h-z1\.h},{z30\.h-z31\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w10,2:3\],{z22\.h-z23\.h},{z18\.h-z19\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w11,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,6:7\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z28\.h-z31\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z0\.h-z3\.h},{z28\.h-z31\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w11,4:5\],{z16\.h-z19\.h},{z24\.h-z27\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1,vgx2\],{ ?z0\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w11,0:1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,6:7\],{ ?z0\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{ ?z30\.h ?- ?z31\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{ ?z31\.h,z0\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{ ?z31\.h ?- ?z0\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w9,4:5\],{ ?z19\.h ?- ?z20\.h ?},z13\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1,vgx4\],{ ?z0\.h ?- ?z3\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w11,0:1\],{ ?z0\.h ?- ?z3\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,6:7\],{ ?z0\.h ?- ?z3\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{ ?z28\.h ?- ?z31\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{ ?z29\.h ?- ?z0\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{ ?z30\.h,z31\.h,z0\.h,z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{ ?z30\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{ ?z31\.h,z0\.h,z1\.h,z2\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{ ?z31\.h ?- ?z2\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w9,4:5\],{ ?z25\.h ?- ?z28\.h ?},z14\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1,vgx2\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w11,0:1\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,6:7\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{ ?z30\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},{ ?z30\.h ?- ?z31\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w10,2:3\],{ ?z22\.h ?- ?z23\.h ?},{ ?z18\.h ?- ?z19\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1,vgx4\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w11,0:1\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,6:7\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{ ?z28\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},{ ?z28\.h ?- ?z31\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w11,4:5\],{ ?z16\.h ?- ?z19\.h ?},{ ?z24\.h ?- ?z27\.h ?}'
 [^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],z0\.h,z0\.h\[0\]'
 [^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w11,0:1\],z0\.h,z0\.h\[0\]'
 [^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,14:15\],z0\.h,z0\.h\[0\]'
@@ -512,60 +512,60 @@
 [^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],z0\.h,z15\.h\[0\]'
 [^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],z0\.h,z0\.h\[7\]'
 [^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w9,10:11\],z21\.h,z9\.h\[2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w11,0:1\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,6:7\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z30\.h-z31\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z15\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[7\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w9,4:5\],{z18\.h-z19\.h},z9\.h\[3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w11,0:1\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,6:7\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z28\.h-z31\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z15\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[7\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w9,4:5\],{z24\.h-z27\.h},z14\.h\[5\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1,vgx2\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w11,0:1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,6:7\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{ ?z30\.h ?- ?z31\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w9,4:5\],{ ?z18\.h ?- ?z19\.h ?},z9\.h\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1,vgx4\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w11,0:1\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,6:7\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{ ?z28\.h ?- ?z31\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w9,4:5\],{ ?z24\.h ?- ?z27\.h ?},z14\.h\[5\]'
 [^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],z0\.h,z0\.h'
 [^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w11,0:1\],z0\.h,z0\.h'
 [^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,14:15\],z0\.h,z0\.h'
 [^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],z31\.h,z0\.h'
 [^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],z0\.h,z15\.h'
 [^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w10,2:3\],z25\.h,z7\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w11,0:1\],{z0\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,6:7\],{z0\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z30\.h-z31\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z31\.h,z0\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z31\.h-z0\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z15\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w9,4:5\],{z19\.h-z20\.h},z13\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w11,0:1\],{z0\.h-z3\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,6:7\],{z0\.h-z3\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z28\.h-z31\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z29\.h-z0\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z30\.h,z31\.h,z0\.h,z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z30\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z31\.h,z0\.h,z1\.h,z2\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z31\.h-z2\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z15\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w9,4:5\],{z25\.h-z28\.h},z14\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w11,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,6:7\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z30\.h-z31\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},{z30\.h-z31\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w10,2:3\],{z22\.h-z23\.h},{z18\.h-z19\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w11,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,6:7\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z28\.h-z31\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},{z28\.h-z31\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w11,4:5\],{z16\.h-z19\.h},{z24\.h-z27\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1,vgx2\],{ ?z0\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w11,0:1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,6:7\],{ ?z0\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{ ?z30\.h ?- ?z31\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{ ?z31\.h,z0\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{ ?z31\.h ?- ?z0\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w9,4:5\],{ ?z19\.h ?- ?z20\.h ?},z13\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1,vgx4\],{ ?z0\.h ?- ?z3\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w11,0:1\],{ ?z0\.h ?- ?z3\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,6:7\],{ ?z0\.h ?- ?z3\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{ ?z28\.h ?- ?z31\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{ ?z29\.h ?- ?z0\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{ ?z30\.h,z31\.h,z0\.h,z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{ ?z30\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{ ?z31\.h,z0\.h,z1\.h,z2\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{ ?z31\.h ?- ?z2\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w9,4:5\],{ ?z25\.h ?- ?z28\.h ?},z14\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1,vgx2\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w11,0:1\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,6:7\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{ ?z30\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},{ ?z30\.h ?- ?z31\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w10,2:3\],{ ?z22\.h ?- ?z23\.h ?},{ ?z18\.h ?- ?z19\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1,vgx4\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w11,0:1\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,6:7\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{ ?z28\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},{ ?z28\.h ?- ?z31\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w11,4:5\],{ ?z16\.h ?- ?z19\.h ?},{ ?z24\.h ?- ?z27\.h ?}'
diff --git a/gas/testsuite/gas/aarch64/sme2-13-invalid.l b/gas/testsuite/gas/aarch64/sme2-13-invalid.l
index 88a74ac..023de98 100644
--- a/gas/testsuite/gas/aarch64/sme2-13-invalid.l
+++ b/gas/testsuite/gas/aarch64/sme2-13-invalid.l
@@ -16,7 +16,7 @@
 [^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 1 -- `smlall za\.s\[w8,2:5\],z0\.b,z0\.b\[0\]'
 [^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 1 -- `smlall za\.s\[w8,3:6\],z0\.b,z0\.b\[0\]'
 [^ :]+:[0-9]+: Error: immediate offset out of range 0 to 12 at operand 1 -- `smlall za\.s\[w8,16:19\],z0\.b,z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `smlall za\.s\[w8,0:3\],z0\.b,z16\.b\[0\]'
+[^ :]+:[0-9]+: Error: z0 ?- ?z15 expected at operand 3 -- `smlall za\.s\[w8,0:3\],z0\.b,z16\.b\[0\]'
 [^ :]+:[0-9]+: Error: register element index out of range 0 to 15 at operand 3 -- `smlall za\.s\[w8,0:3\],z0\.b,z0\.b\[-1\]'
 [^ :]+:[0-9]+: Error: register element index out of range 0 to 15 at operand 3 -- `smlall za\.s\[w8,0:3\],z0\.b,z0\.b\[16\]'
 [^ :]+:[0-9]+: Error: operand mismatch -- `smlall za\.s\[w8,0:3\],z0\.h,z0\.h\[0\]'
@@ -25,56 +25,56 @@
 [^ :]+:[0-9]+: Error: operand mismatch -- `smlall za\.s\[w8,0:3\],z0\.s,z0\.s\[0\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	smlall za\.s\[w8, 0:3\], z0\.b, z0\.b\[0\]
-[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `smlall za\.s\[w7,0:3\],{z0\.b-z1\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `smlall za\.s\[w12,0:3\],{z0\.b-z1\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `smlall za\.s\[w8,0\],{z0\.b-z1\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `smlall za\.s\[w8,0:1\],{z0\.b-z1\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `smlall za\.s\[w8,0:2\],{z0\.b-z1\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `smlall za\.s\[w8,0:3,vgx4\],{z0\.b-z1\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 1 -- `smlall za\.s\[w8,1:4\],{z0\.b-z1\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 1 -- `smlall za\.s\[w8,2:5\],{z0\.b-z1\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 1 -- `smlall za\.s\[w8,3:6\],{z0\.b-z1\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 4 at operand 1 -- `smlall za\.s\[w8,8:11\],{z0\.b-z1\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `smlall za\.s\[w8,0:3\],{z1\.b-z2\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `smlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z16\.b\[0\]'
-[^ :]+:[0-9]+: Error: register element index out of range 0 to 15 at operand 3 -- `smlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z0\.b\[-1\]'
-[^ :]+:[0-9]+: Error: register element index out of range 0 to 15 at operand 3 -- `smlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z0\.b\[16\]'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `smlall za\.s\[w7,0:3\],{z0\.b-z3\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `smlall za\.s\[w12,0:3\],{z0\.b-z3\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `smlall za\.s\[w8,0\],{z0\.b-z3\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `smlall za\.s\[w8,0:1\],{z0\.b-z3\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `smlall za\.s\[w8,0:2\],{z0\.b-z3\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `smlall za\.s\[w8,0:3,vgx2\],{z0\.b-z3\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 1 -- `smlall za\.s\[w8,1:4\],{z0\.b-z3\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 1 -- `smlall za\.s\[w8,2:5\],{z0\.b-z3\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 1 -- `smlall za\.s\[w8,3:6\],{z0\.b-z3\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 4 at operand 1 -- `smlall za\.s\[w8,8:11\],{z0\.b-z3\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `smlall za\.s\[w8,0:3\],{z1\.b-z4\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `smlall za\.s\[w8,0:3\],{z2\.b-z5\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `smlall za\.s\[w8,0:3\],{z3\.b-z6\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `smlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z16\.b\[0\]'
-[^ :]+:[0-9]+: Error: register element index out of range 0 to 15 at operand 3 -- `smlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z0\.b\[-1\]'
-[^ :]+:[0-9]+: Error: register element index out of range 0 to 15 at operand 3 -- `smlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z0\.b\[16\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `smlall za\.s\[w7,0:3\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `smlall za\.s\[w12,0:3\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `smlall za\.s\[w8,0\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `smlall za\.s\[w8,0:1\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `smlall za\.s\[w8,0:2\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `smlall za\.s\[w8,0:3,vgx4\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 1 -- `smlall za\.s\[w8,1:4\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 1 -- `smlall za\.s\[w8,2:5\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 1 -- `smlall za\.s\[w8,3:6\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 4 at operand 1 -- `smlall za\.s\[w8,8:11\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `smlall za\.s\[w8,0:3\],{ ?z1\.b ?- ?z2\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: z0 ?- ?z15 expected at operand 3 -- `smlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z1\.b ?},z16\.b\[0\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 15 at operand 3 -- `smlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[-1\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 15 at operand 3 -- `smlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[16\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `smlall za\.s\[w7,0:3\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `smlall za\.s\[w12,0:3\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `smlall za\.s\[w8,0\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `smlall za\.s\[w8,0:1\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `smlall za\.s\[w8,0:2\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `smlall za\.s\[w8,0:3,vgx2\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 1 -- `smlall za\.s\[w8,1:4\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 1 -- `smlall za\.s\[w8,2:5\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 1 -- `smlall za\.s\[w8,3:6\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 4 at operand 1 -- `smlall za\.s\[w8,8:11\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `smlall za\.s\[w8,0:3\],{ ?z1\.b ?- ?z4\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `smlall za\.s\[w8,0:3\],{ ?z2\.b ?- ?z5\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `smlall za\.s\[w8,0:3\],{ ?z3\.b ?- ?z6\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: z0 ?- ?z15 expected at operand 3 -- `smlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z3\.b ?},z16\.b\[0\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 15 at operand 3 -- `smlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[-1\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 15 at operand 3 -- `smlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[16\]'
 [^ :]+:[0-9]+: Error: unexpected vector group size at operand 1 -- `smlall za\.s\[w8,0:3,vgx2\],z0\.b,z0\.b'
 [^ :]+:[0-9]+: Error: unexpected vector group size at operand 1 -- `smlall za\.s\[w8,0:3,vgx4\],z0\.b,z0\.b'
 [^ :]+:[0-9]+: Error: immediate offset out of range 0 to 12 at operand 1 -- `smlall za\.s\[w8,16:19\],z0\.b,z0\.b'
-[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `smlall za\.s\[w8,0:3\],z0\.b,z16\.b'
-[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `smlall za\.s\[w8,0:3,vgx4\],{z0\.b-z1\.b},z0\.b'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 4 at operand 1 -- `smlall za\.s\[w8,8:11\],{z0\.b-z1\.b},z0\.b'
-[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `smlall za\.s\[w8,0:3\],{z0\.b-z2\.b},z0\.b'
-[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `smlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z16\.b'
-[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `smlall za\.s\[w8,0:3,vgx2\],{z0\.b-z3\.b},z0\.b'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 4 at operand 1 -- `smlall za\.s\[w8,8:11\],{z0\.b-z3\.b},z0\.b'
-[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `smlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z16\.b'
-[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `smlall za\.s\[w8,0:3,vgx4\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 4 at operand 1 -- `smlall za\.s\[w8,8:11\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `smlall za\.s\[w8,0:3\],{z1\.b-z2\.b},{z0\.b-z1\.b}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `smlall za\.s\[w8,0:3\],{z0\.b-z1\.b},{z1\.b-z2\.b}'
-[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `smlall za\.s\[w8,0:3,vgx2\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 4 at operand 1 -- `smlall za\.s\[w8,8:11\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `smlall za\.s\[w8,0:3\],{z1\.b-z4\.b},{z0\.b-z3\.b}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `smlall za\.s\[w8,0:3\],{z2\.b-z5\.b},{z0\.b-z3\.b}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `smlall za\.s\[w8,0:3\],{z3\.b-z6\.b},{z0\.b-z3\.b}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `smlall za\.s\[w8,0:3\],{z0\.b-z3\.b},{z1\.b-z4\.b}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `smlall za\.s\[w8,0:3\],{z0\.b-z3\.b},{z2\.b-z5\.b}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `smlall za\.s\[w8,0:3\],{z0\.b-z3\.b},{z3\.b-z6\.b}'
+[^ :]+:[0-9]+: Error: z0 ?- ?z15 expected at operand 3 -- `smlall za\.s\[w8,0:3\],z0\.b,z16\.b'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `smlall za\.s\[w8,0:3,vgx4\],{ ?z0\.b ?- ?z1\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 4 at operand 1 -- `smlall za\.s\[w8,8:11\],{ ?z0\.b ?- ?z1\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `smlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z2\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: z0 ?- ?z15 expected at operand 3 -- `smlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z1\.b ?},z16\.b'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `smlall za\.s\[w8,0:3,vgx2\],{ ?z0\.b ?- ?z3\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 4 at operand 1 -- `smlall za\.s\[w8,8:11\],{ ?z0\.b ?- ?z3\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: z0 ?- ?z15 expected at operand 3 -- `smlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z3\.b ?},z16\.b'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `smlall za\.s\[w8,0:3,vgx4\],{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 4 at operand 1 -- `smlall za\.s\[w8,8:11\],{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `smlall za\.s\[w8,0:3\],{ ?z1\.b ?- ?z2\.b ?},{ ?z0\.b ?- ?z1\.b ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `smlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z1\.b ?},{ ?z1\.b ?- ?z2\.b ?}'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `smlall za\.s\[w8,0:3,vgx2\],{ ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 4 at operand 1 -- `smlall za\.s\[w8,8:11\],{ ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `smlall za\.s\[w8,0:3\],{ ?z1\.b ?- ?z4\.b ?},{ ?z0\.b ?- ?z3\.b ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `smlall za\.s\[w8,0:3\],{ ?z2\.b ?- ?z5\.b ?},{ ?z0\.b ?- ?z3\.b ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `smlall za\.s\[w8,0:3\],{ ?z3\.b ?- ?z6\.b ?},{ ?z0\.b ?- ?z3\.b ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `smlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z3\.b ?},{ ?z1\.b ?- ?z4\.b ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `smlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z3\.b ?},{ ?z2\.b ?- ?z5\.b ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `smlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z3\.b ?},{ ?z3\.b ?- ?z6\.b ?}'
diff --git a/gas/testsuite/gas/aarch64/sme2-13-noarch.l b/gas/testsuite/gas/aarch64/sme2-13-noarch.l
index 3d55aaa..8363d3b 100644
--- a/gas/testsuite/gas/aarch64/sme2-13-noarch.l
+++ b/gas/testsuite/gas/aarch64/sme2-13-noarch.l
@@ -6,62 +6,62 @@
 [^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],z0\.b,z15\.b\[0\]'
 [^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],z0\.b,z0\.b\[15\]'
 [^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w9,8:11\],z21\.b,z9\.b\[9\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3,vgx2\],{z0\.b-z1\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w11,0:3\],{z0\.b-z1\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,4:7\],{z0\.b-z1\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z30\.b-z31\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z15\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z0\.b\[15\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w9,4:7\],{z18\.b-z19\.b},z9\.b\[12\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3,vgx4\],{z0\.b-z3\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w11,0:3\],{z0\.b-z3\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,4:7\],{z0\.b-z3\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z28\.b-z31\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z15\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z0\.b\[15\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w10,0:3\],{z24\.b-z27\.b},z14\.b\[6\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3,vgx2\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w11,0:3\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,4:7\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{ ?z30\.b ?- ?z31\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z1\.b ?},z15\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[15\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w9,4:7\],{ ?z18\.b ?- ?z19\.b ?},z9\.b\[12\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3,vgx4\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w11,0:3\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,4:7\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{ ?z28\.b ?- ?z31\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z3\.b ?},z15\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[15\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w10,0:3\],{ ?z24\.b ?- ?z27\.b ?},z14\.b\[6\]'
 [^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],z0\.b,z0\.b'
 [^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w11,0:3\],z0\.b,z0\.b'
 [^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,12:15\],z0\.b,z0\.b'
 [^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],z31\.b,z0\.b'
 [^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],z0\.b,z15\.b'
 [^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w10,4:7\],z25\.b,z7\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3,vgx2\],{z0\.b-z1\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w11,0:3\],{z0\.b-z1\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,4:7\],{z0\.b-z1\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z30\.b-z31\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z31\.b,z0\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z31\.b-z0\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z15\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w9,4:7\],{z19\.b-z20\.b},z13\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3,vgx4\],{z0\.b-z3\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w11,0:3\],{z0\.b-z3\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,4:7\],{z0\.b-z3\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z28\.b-z31\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z29\.b-z0\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z30\.b,z31\.b,z0\.b,z1\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z30\.b-z1\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z31\.b-z2\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z15\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w9,0:3\],{z25\.b-z28\.b},z14\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3,vgx2\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w11,0:3\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,4:7\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z30\.b-z31\.b},{z0\.b-z1\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z0\.b-z1\.b},{z30\.b-z31\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w10,4:7\],{z22\.b-z23\.b},{z18\.b-z19\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3,vgx4\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w11,0:3\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,4:7\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z28\.b-z31\.b},{z0\.b-z3\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z0\.b-z3\.b},{z28\.b-z31\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w11,0:3\],{z16\.b-z19\.b},{z24\.b-z27\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z1\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3,vgx2\],{ ?z0\.b ?- ?z1\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w11,0:3\],{ ?z0\.b ?- ?z1\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,4:7\],{ ?z0\.b ?- ?z1\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{ ?z30\.b ?- ?z31\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{ ?z31\.b,z0\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{ ?z31\.b ?- ?z0\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z1\.b ?},z15\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w9,4:7\],{ ?z19\.b ?- ?z20\.b ?},z13\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z3\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3,vgx4\],{ ?z0\.b ?- ?z3\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w11,0:3\],{ ?z0\.b ?- ?z3\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,4:7\],{ ?z0\.b ?- ?z3\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{ ?z28\.b ?- ?z31\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{ ?z29\.b ?- ?z0\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{ ?z30\.b,z31\.b,z0\.b,z1\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{ ?z30\.b ?- ?z1\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{ ?z31\.b ?- ?z2\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z3\.b ?},z15\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w9,0:3\],{ ?z25\.b ?- ?z28\.b ?},z14\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3,vgx2\],{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w11,0:3\],{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,4:7\],{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{ ?z30\.b ?- ?z31\.b ?},{ ?z0\.b ?- ?z1\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z1\.b ?},{ ?z30\.b ?- ?z31\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w10,4:7\],{ ?z22\.b ?- ?z23\.b ?},{ ?z18\.b ?- ?z19\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3,vgx4\],{ ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w11,0:3\],{ ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,4:7\],{ ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{ ?z28\.b ?- ?z31\.b ?},{ ?z0\.b ?- ?z3\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z3\.b ?},{ ?z28\.b ?- ?z31\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w11,0:3\],{ ?z16\.b ?- ?z19\.b ?},{ ?z24\.b ?- ?z27\.b ?}'
 [^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],z0\.b,z0\.b\[0\]'
 [^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w11,0:3\],z0\.b,z0\.b\[0\]'
 [^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,12:15\],z0\.b,z0\.b\[0\]'
@@ -69,62 +69,62 @@
 [^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],z0\.b,z15\.b\[0\]'
 [^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],z0\.b,z0\.b\[15\]'
 [^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w9,8:11\],z21\.b,z9\.b\[9\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z0\.b-z1\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3,vgx2\],{z0\.b-z1\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w11,0:3\],{z0\.b-z1\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,4:7\],{z0\.b-z1\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z30\.b-z31\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z0\.b-z1\.b},z15\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z0\.b-z1\.b},z0\.b\[15\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w9,4:7\],{z18\.b-z19\.b},z9\.b\[12\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z0\.b-z3\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3,vgx4\],{z0\.b-z3\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w11,0:3\],{z0\.b-z3\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,4:7\],{z0\.b-z3\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z28\.b-z31\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z0\.b-z3\.b},z15\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z0\.b-z3\.b},z0\.b\[15\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w10,0:3\],{z24\.b-z27\.b},z14\.b\[6\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3,vgx2\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w11,0:3\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,4:7\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{ ?z30\.b ?- ?z31\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{ ?z0\.b ?- ?z1\.b ?},z15\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[15\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w9,4:7\],{ ?z18\.b ?- ?z19\.b ?},z9\.b\[12\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3,vgx4\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w11,0:3\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,4:7\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{ ?z28\.b ?- ?z31\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{ ?z0\.b ?- ?z3\.b ?},z15\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[15\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w10,0:3\],{ ?z24\.b ?- ?z27\.b ?},z14\.b\[6\]'
 [^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],z0\.b,z0\.b'
 [^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w11,0:3\],z0\.b,z0\.b'
 [^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,12:15\],z0\.b,z0\.b'
 [^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],z31\.b,z0\.b'
 [^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],z0\.b,z15\.b'
 [^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w10,4:7\],z25\.b,z7\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z0\.b-z1\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3,vgx2\],{z0\.b-z1\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w11,0:3\],{z0\.b-z1\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,4:7\],{z0\.b-z1\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z30\.b-z31\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z31\.b,z0\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z31\.b-z0\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z0\.b-z1\.b},z15\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w9,4:7\],{z19\.b-z20\.b},z13\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z0\.b-z3\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3,vgx4\],{z0\.b-z3\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w11,0:3\],{z0\.b-z3\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,4:7\],{z0\.b-z3\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z28\.b-z31\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z29\.b-z0\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z30\.b,z31\.b,z0\.b,z1\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z30\.b-z1\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z31\.b-z2\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z0\.b-z3\.b},z15\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w9,0:3\],{z25\.b-z28\.b},z14\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3,vgx2\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w11,0:3\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,4:7\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z30\.b-z31\.b},{z0\.b-z1\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z0\.b-z1\.b},{z30\.b-z31\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w10,4:7\],{z22\.b-z23\.b},{z18\.b-z19\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3,vgx4\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w11,0:3\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,4:7\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z28\.b-z31\.b},{z0\.b-z3\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z0\.b-z3\.b},{z28\.b-z31\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w11,0:3\],{z16\.b-z19\.b},{z24\.b-z27\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{ ?z0\.b ?- ?z1\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3,vgx2\],{ ?z0\.b ?- ?z1\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w11,0:3\],{ ?z0\.b ?- ?z1\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,4:7\],{ ?z0\.b ?- ?z1\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{ ?z30\.b ?- ?z31\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{ ?z31\.b,z0\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{ ?z31\.b ?- ?z0\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{ ?z0\.b ?- ?z1\.b ?},z15\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w9,4:7\],{ ?z19\.b ?- ?z20\.b ?},z13\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{ ?z0\.b ?- ?z3\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3,vgx4\],{ ?z0\.b ?- ?z3\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w11,0:3\],{ ?z0\.b ?- ?z3\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,4:7\],{ ?z0\.b ?- ?z3\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{ ?z28\.b ?- ?z31\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{ ?z29\.b ?- ?z0\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{ ?z30\.b,z31\.b,z0\.b,z1\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{ ?z30\.b ?- ?z1\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{ ?z31\.b ?- ?z2\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{ ?z0\.b ?- ?z3\.b ?},z15\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w9,0:3\],{ ?z25\.b ?- ?z28\.b ?},z14\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3,vgx2\],{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w11,0:3\],{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,4:7\],{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{ ?z30\.b ?- ?z31\.b ?},{ ?z0\.b ?- ?z1\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{ ?z0\.b ?- ?z1\.b ?},{ ?z30\.b ?- ?z31\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w10,4:7\],{ ?z22\.b ?- ?z23\.b ?},{ ?z18\.b ?- ?z19\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{ ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3,vgx4\],{ ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w11,0:3\],{ ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,4:7\],{ ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{ ?z28\.b ?- ?z31\.b ?},{ ?z0\.b ?- ?z3\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{ ?z0\.b ?- ?z3\.b ?},{ ?z28\.b ?- ?z31\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w11,0:3\],{ ?z16\.b ?- ?z19\.b ?},{ ?z24\.b ?- ?z27\.b ?}'
 [^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],z0\.b,z0\.b\[0\]'
 [^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w11,0:3\],z0\.b,z0\.b\[0\]'
 [^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,12:15\],z0\.b,z0\.b\[0\]'
@@ -132,62 +132,62 @@
 [^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],z0\.b,z15\.b\[0\]'
 [^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],z0\.b,z0\.b\[15\]'
 [^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w9,8:11\],z21\.b,z9\.b\[9\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3,vgx2\],{z0\.b-z1\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w11,0:3\],{z0\.b-z1\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,4:7\],{z0\.b-z1\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z30\.b-z31\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z15\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z0\.b\[15\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w9,4:7\],{z18\.b-z19\.b},z9\.b\[12\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3,vgx4\],{z0\.b-z3\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w11,0:3\],{z0\.b-z3\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,4:7\],{z0\.b-z3\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z28\.b-z31\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z15\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z0\.b\[15\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w10,0:3\],{z24\.b-z27\.b},z14\.b\[6\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3,vgx2\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w11,0:3\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,4:7\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{ ?z30\.b ?- ?z31\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z1\.b ?},z15\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[15\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w9,4:7\],{ ?z18\.b ?- ?z19\.b ?},z9\.b\[12\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3,vgx4\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w11,0:3\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,4:7\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{ ?z28\.b ?- ?z31\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z3\.b ?},z15\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[15\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w10,0:3\],{ ?z24\.b ?- ?z27\.b ?},z14\.b\[6\]'
 [^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],z0\.b,z0\.b'
 [^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w11,0:3\],z0\.b,z0\.b'
 [^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,12:15\],z0\.b,z0\.b'
 [^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],z31\.b,z0\.b'
 [^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],z0\.b,z15\.b'
 [^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w10,4:7\],z25\.b,z7\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3,vgx2\],{z0\.b-z1\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w11,0:3\],{z0\.b-z1\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,4:7\],{z0\.b-z1\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z30\.b-z31\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z31\.b,z0\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z31\.b-z0\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z15\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w9,4:7\],{z19\.b-z20\.b},z13\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3,vgx4\],{z0\.b-z3\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w11,0:3\],{z0\.b-z3\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,4:7\],{z0\.b-z3\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z28\.b-z31\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z29\.b-z0\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z30\.b,z31\.b,z0\.b,z1\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z30\.b-z1\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z31\.b-z2\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z15\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w9,0:3\],{z25\.b-z28\.b},z14\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3,vgx2\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w11,0:3\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,4:7\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z30\.b-z31\.b},{z0\.b-z1\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z0\.b-z1\.b},{z30\.b-z31\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w10,4:7\],{z22\.b-z23\.b},{z18\.b-z19\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3,vgx4\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w11,0:3\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,4:7\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z28\.b-z31\.b},{z0\.b-z3\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z0\.b-z3\.b},{z28\.b-z31\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w11,0:3\],{z16\.b-z19\.b},{z24\.b-z27\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z1\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3,vgx2\],{ ?z0\.b ?- ?z1\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w11,0:3\],{ ?z0\.b ?- ?z1\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,4:7\],{ ?z0\.b ?- ?z1\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{ ?z30\.b ?- ?z31\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{ ?z31\.b,z0\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{ ?z31\.b ?- ?z0\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z1\.b ?},z15\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w9,4:7\],{ ?z19\.b ?- ?z20\.b ?},z13\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z3\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3,vgx4\],{ ?z0\.b ?- ?z3\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w11,0:3\],{ ?z0\.b ?- ?z3\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,4:7\],{ ?z0\.b ?- ?z3\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{ ?z28\.b ?- ?z31\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{ ?z29\.b ?- ?z0\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{ ?z30\.b,z31\.b,z0\.b,z1\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{ ?z30\.b ?- ?z1\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{ ?z31\.b ?- ?z2\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z3\.b ?},z15\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w9,0:3\],{ ?z25\.b ?- ?z28\.b ?},z14\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3,vgx2\],{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w11,0:3\],{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,4:7\],{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{ ?z30\.b ?- ?z31\.b ?},{ ?z0\.b ?- ?z1\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z1\.b ?},{ ?z30\.b ?- ?z31\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w10,4:7\],{ ?z22\.b ?- ?z23\.b ?},{ ?z18\.b ?- ?z19\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3,vgx4\],{ ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w11,0:3\],{ ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,4:7\],{ ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{ ?z28\.b ?- ?z31\.b ?},{ ?z0\.b ?- ?z3\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z3\.b ?},{ ?z28\.b ?- ?z31\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w11,0:3\],{ ?z16\.b ?- ?z19\.b ?},{ ?z24\.b ?- ?z27\.b ?}'
 [^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],z0\.b,z0\.b\[0\]'
 [^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w11,0:3\],z0\.b,z0\.b\[0\]'
 [^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,12:15\],z0\.b,z0\.b\[0\]'
@@ -195,59 +195,59 @@
 [^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],z0\.b,z15\.b\[0\]'
 [^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],z0\.b,z0\.b\[15\]'
 [^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w9,8:11\],z21\.b,z9\.b\[9\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z0\.b-z1\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3,vgx2\],{z0\.b-z1\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w11,0:3\],{z0\.b-z1\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,4:7\],{z0\.b-z1\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z30\.b-z31\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z0\.b-z1\.b},z15\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z0\.b-z1\.b},z0\.b\[15\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w9,4:7\],{z18\.b-z19\.b},z9\.b\[12\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z0\.b-z3\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3,vgx4\],{z0\.b-z3\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w11,0:3\],{z0\.b-z3\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,4:7\],{z0\.b-z3\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z28\.b-z31\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z0\.b-z3\.b},z15\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z0\.b-z3\.b},z0\.b\[15\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w10,0:3\],{z24\.b-z27\.b},z14\.b\[6\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3,vgx2\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w11,0:3\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,4:7\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{ ?z30\.b ?- ?z31\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{ ?z0\.b ?- ?z1\.b ?},z15\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[15\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w9,4:7\],{ ?z18\.b ?- ?z19\.b ?},z9\.b\[12\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3,vgx4\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w11,0:3\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,4:7\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{ ?z28\.b ?- ?z31\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{ ?z0\.b ?- ?z3\.b ?},z15\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[15\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w10,0:3\],{ ?z24\.b ?- ?z27\.b ?},z14\.b\[6\]'
 [^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],z0\.b,z0\.b'
 [^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w11,0:3\],z0\.b,z0\.b'
 [^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,12:15\],z0\.b,z0\.b'
 [^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],z31\.b,z0\.b'
 [^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],z0\.b,z15\.b'
 [^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w10,4:7\],z25\.b,z7\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z0\.b-z1\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3,vgx2\],{z0\.b-z1\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w11,0:3\],{z0\.b-z1\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,4:7\],{z0\.b-z1\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z30\.b-z31\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z31\.b,z0\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z31\.b-z0\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z0\.b-z1\.b},z15\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w9,4:7\],{z19\.b-z20\.b},z13\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z0\.b-z3\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3,vgx4\],{z0\.b-z3\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w11,0:3\],{z0\.b-z3\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,4:7\],{z0\.b-z3\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z28\.b-z31\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z29\.b-z0\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z30\.b,z31\.b,z0\.b,z1\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z30\.b-z1\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z31\.b-z2\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z0\.b-z3\.b},z15\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w9,0:3\],{z25\.b-z28\.b},z14\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3,vgx2\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w11,0:3\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,4:7\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z30\.b-z31\.b},{z0\.b-z1\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z0\.b-z1\.b},{z30\.b-z31\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w10,4:7\],{z22\.b-z23\.b},{z18\.b-z19\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3,vgx4\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w11,0:3\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,4:7\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z28\.b-z31\.b},{z0\.b-z3\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z0\.b-z3\.b},{z28\.b-z31\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w11,0:3\],{z16\.b-z19\.b},{z24\.b-z27\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{ ?z0\.b ?- ?z1\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3,vgx2\],{ ?z0\.b ?- ?z1\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w11,0:3\],{ ?z0\.b ?- ?z1\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,4:7\],{ ?z0\.b ?- ?z1\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{ ?z30\.b ?- ?z31\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{ ?z31\.b,z0\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{ ?z31\.b ?- ?z0\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{ ?z0\.b ?- ?z1\.b ?},z15\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w9,4:7\],{ ?z19\.b ?- ?z20\.b ?},z13\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{ ?z0\.b ?- ?z3\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3,vgx4\],{ ?z0\.b ?- ?z3\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w11,0:3\],{ ?z0\.b ?- ?z3\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,4:7\],{ ?z0\.b ?- ?z3\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{ ?z28\.b ?- ?z31\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{ ?z29\.b ?- ?z0\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{ ?z30\.b,z31\.b,z0\.b,z1\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{ ?z30\.b ?- ?z1\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{ ?z31\.b ?- ?z2\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{ ?z0\.b ?- ?z3\.b ?},z15\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w9,0:3\],{ ?z25\.b ?- ?z28\.b ?},z14\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3,vgx2\],{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w11,0:3\],{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,4:7\],{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{ ?z30\.b ?- ?z31\.b ?},{ ?z0\.b ?- ?z1\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{ ?z0\.b ?- ?z1\.b ?},{ ?z30\.b ?- ?z31\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w10,4:7\],{ ?z22\.b ?- ?z23\.b ?},{ ?z18\.b ?- ?z19\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{ ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3,vgx4\],{ ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w11,0:3\],{ ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,4:7\],{ ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{ ?z28\.b ?- ?z31\.b ?},{ ?z0\.b ?- ?z3\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{ ?z0\.b ?- ?z3\.b ?},{ ?z28\.b ?- ?z31\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w11,0:3\],{ ?z16\.b ?- ?z19\.b ?},{ ?z24\.b ?- ?z27\.b ?}'
diff --git a/gas/testsuite/gas/aarch64/sme2-14-invalid.l b/gas/testsuite/gas/aarch64/sme2-14-invalid.l
index c398f6b..82f18be 100644
--- a/gas/testsuite/gas/aarch64/sme2-14-invalid.l
+++ b/gas/testsuite/gas/aarch64/sme2-14-invalid.l
@@ -3,5 +3,5 @@
 [^ :]+:[0-9]+: Error: expected a register or register list at operand 2 -- `sumlall za\.s\[w8,0:3\],0,z0\.b\[0\]'
 [^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `sumlall za\.s\[w8,0:3\],z0\.b,0'
 [^ :]+:[0-9]+: Error: operand 3 must be an indexed SVE vector register -- `sumlall za\.s\[w8,0:3\],z0\.b,z0\.b'
-[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `sumlall za\.s\[w8,0:3\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
-[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `sumlall za\.s\[w8,0:3\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `sumlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?}'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `sumlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?}'
diff --git a/gas/testsuite/gas/aarch64/sme2-14-noarch.l b/gas/testsuite/gas/aarch64/sme2-14-noarch.l
index 76f5e43..a8570ca 100644
--- a/gas/testsuite/gas/aarch64/sme2-14-noarch.l
+++ b/gas/testsuite/gas/aarch64/sme2-14-noarch.l
@@ -6,42 +6,42 @@
 [^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],z0\.b,z15\.b\[0\]'
 [^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],z0\.b,z0\.b\[15\]'
 [^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w9,8:11\],z21\.b,z9\.b\[9\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3,vgx2\],{z0\.b-z1\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w11,0:3\],{z0\.b-z1\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,4:7\],{z0\.b-z1\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{z30\.b-z31\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z15\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z0\.b\[15\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w9,4:7\],{z18\.b-z19\.b},z9\.b\[12\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3,vgx4\],{z0\.b-z3\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w11,0:3\],{z0\.b-z3\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,4:7\],{z0\.b-z3\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{z28\.b-z31\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z15\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z0\.b\[15\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w10,0:3\],{z24\.b-z27\.b},z14\.b\[6\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3,vgx2\],{z0\.b-z1\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w11,0:3\],{z0\.b-z1\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,4:7\],{z0\.b-z1\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{z30\.b-z31\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{z31\.b,z0\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{z31\.b-z0\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z15\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w9,4:7\],{z19\.b-z20\.b},z13\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3,vgx4\],{z0\.b-z3\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w11,0:3\],{z0\.b-z3\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,4:7\],{z0\.b-z3\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{z28\.b-z31\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{z29\.b-z0\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{z30\.b,z31\.b,z0\.b,z1\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{z30\.b-z1\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{z31\.b-z2\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z15\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w9,0:3\],{z25\.b-z28\.b},z14\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3,vgx2\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w11,0:3\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,4:7\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{ ?z30\.b ?- ?z31\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z1\.b ?},z15\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[15\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w9,4:7\],{ ?z18\.b ?- ?z19\.b ?},z9\.b\[12\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3,vgx4\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w11,0:3\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,4:7\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{ ?z28\.b ?- ?z31\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z3\.b ?},z15\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[15\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w10,0:3\],{ ?z24\.b ?- ?z27\.b ?},z14\.b\[6\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z1\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3,vgx2\],{ ?z0\.b ?- ?z1\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w11,0:3\],{ ?z0\.b ?- ?z1\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,4:7\],{ ?z0\.b ?- ?z1\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{ ?z30\.b ?- ?z31\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{ ?z31\.b,z0\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{ ?z31\.b ?- ?z0\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z1\.b ?},z15\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w9,4:7\],{ ?z19\.b ?- ?z20\.b ?},z13\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z3\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3,vgx4\],{ ?z0\.b ?- ?z3\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w11,0:3\],{ ?z0\.b ?- ?z3\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,4:7\],{ ?z0\.b ?- ?z3\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{ ?z28\.b ?- ?z31\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{ ?z29\.b ?- ?z0\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{ ?z30\.b,z31\.b,z0\.b,z1\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{ ?z30\.b ?- ?z1\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{ ?z31\.b ?- ?z2\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z3\.b ?},z15\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w9,0:3\],{ ?z25\.b ?- ?z28\.b ?},z14\.b'
 [^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],z0\.b,z0\.b\[0\]'
 [^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w11,0:3\],z0\.b,z0\.b\[0\]'
 [^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,12:15\],z0\.b,z0\.b\[0\]'
@@ -49,59 +49,59 @@
 [^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],z0\.b,z15\.b\[0\]'
 [^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],z0\.b,z0\.b\[15\]'
 [^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w9,8:11\],z21\.b,z9\.b\[9\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3,vgx2\],{z0\.b-z1\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w11,0:3\],{z0\.b-z1\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,4:7\],{z0\.b-z1\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z30\.b-z31\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z15\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z0\.b\[15\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w9,4:7\],{z18\.b-z19\.b},z9\.b\[12\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3,vgx4\],{z0\.b-z3\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w11,0:3\],{z0\.b-z3\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,4:7\],{z0\.b-z3\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z28\.b-z31\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z15\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z0\.b\[15\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w10,0:3\],{z24\.b-z27\.b},z14\.b\[6\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3,vgx2\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w11,0:3\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,4:7\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{ ?z30\.b ?- ?z31\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z1\.b ?},z15\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[15\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w9,4:7\],{ ?z18\.b ?- ?z19\.b ?},z9\.b\[12\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3,vgx4\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w11,0:3\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,4:7\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{ ?z28\.b ?- ?z31\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z3\.b ?},z15\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[15\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w10,0:3\],{ ?z24\.b ?- ?z27\.b ?},z14\.b\[6\]'
 [^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],z0\.b,z0\.b'
 [^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w11,0:3\],z0\.b,z0\.b'
 [^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,12:15\],z0\.b,z0\.b'
 [^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],z31\.b,z0\.b'
 [^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],z0\.b,z15\.b'
 [^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w10,4:7\],z25\.b,z7\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3,vgx2\],{z0\.b-z1\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w11,0:3\],{z0\.b-z1\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,4:7\],{z0\.b-z1\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z30\.b-z31\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z31\.b,z0\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z31\.b-z0\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z15\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w9,4:7\],{z19\.b-z20\.b},z13\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3,vgx4\],{z0\.b-z3\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w11,0:3\],{z0\.b-z3\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,4:7\],{z0\.b-z3\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z28\.b-z31\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z29\.b-z0\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z30\.b,z31\.b,z0\.b,z1\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z30\.b-z1\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z31\.b-z2\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z15\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w9,0:3\],{z25\.b-z28\.b},z14\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3,vgx2\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w11,0:3\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,4:7\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z30\.b-z31\.b},{z0\.b-z1\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z0\.b-z1\.b},{z30\.b-z31\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w10,4:7\],{z22\.b-z23\.b},{z18\.b-z19\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3,vgx4\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w11,0:3\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,4:7\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z28\.b-z31\.b},{z0\.b-z3\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z0\.b-z3\.b},{z28\.b-z31\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w11,0:3\],{z16\.b-z19\.b},{z24\.b-z27\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z1\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3,vgx2\],{ ?z0\.b ?- ?z1\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w11,0:3\],{ ?z0\.b ?- ?z1\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,4:7\],{ ?z0\.b ?- ?z1\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{ ?z30\.b ?- ?z31\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{ ?z31\.b,z0\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{ ?z31\.b ?- ?z0\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z1\.b ?},z15\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w9,4:7\],{ ?z19\.b ?- ?z20\.b ?},z13\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z3\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3,vgx4\],{ ?z0\.b ?- ?z3\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w11,0:3\],{ ?z0\.b ?- ?z3\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,4:7\],{ ?z0\.b ?- ?z3\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{ ?z28\.b ?- ?z31\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{ ?z29\.b ?- ?z0\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{ ?z30\.b,z31\.b,z0\.b,z1\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{ ?z30\.b ?- ?z1\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{ ?z31\.b ?- ?z2\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z3\.b ?},z15\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w9,0:3\],{ ?z25\.b ?- ?z28\.b ?},z14\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3,vgx2\],{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w11,0:3\],{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,4:7\],{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{ ?z30\.b ?- ?z31\.b ?},{ ?z0\.b ?- ?z1\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z1\.b ?},{ ?z30\.b ?- ?z31\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w10,4:7\],{ ?z22\.b ?- ?z23\.b ?},{ ?z18\.b ?- ?z19\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3,vgx4\],{ ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w11,0:3\],{ ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,4:7\],{ ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{ ?z28\.b ?- ?z31\.b ?},{ ?z0\.b ?- ?z3\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z3\.b ?},{ ?z28\.b ?- ?z31\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w11,0:3\],{ ?z16\.b ?- ?z19\.b ?},{ ?z24\.b ?- ?z27\.b ?}'
diff --git a/gas/testsuite/gas/aarch64/sme2-15-invalid.l b/gas/testsuite/gas/aarch64/sme2-15-invalid.l
index 54fd066..330afaa 100644
--- a/gas/testsuite/gas/aarch64/sme2-15-invalid.l
+++ b/gas/testsuite/gas/aarch64/sme2-15-invalid.l
@@ -1,97 +1,97 @@
 [^ :]+: Assembler messages:
-[^ :]+:[0-9]+: Error: expected a register at operand 1 -- `bfdot 0,{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a register at operand 1 -- `bfdot 0,{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
 [^ :]+:[0-9]+: Error: expected '{' at operand 2 -- `bfdot za\.s\[w8,0\],0,z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: expected a register or register list at operand 3 -- `bfdot za\.s\[w8,0\],{z0\.h-z1\.h},0'
+[^ :]+:[0-9]+: Error: expected a register or register list at operand 3 -- `bfdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},0'
 [^ :]+:[0-9]+: Error: missing braces at operand 2 -- `bfdot za\.h\[w8,0\],z0\.h,z0\.h'
-[^ :]+:[0-9]+: Error: operand mismatch -- `bfdot za\.h\[w8,0\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: operand mismatch -- `bfdot za\.h\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	bfdot za\.s\[w8, 0\], {z0\.h-z1\.h}, z0\.h
-[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfdot za\.s\[w7,0\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfdot za\.s\[w12,0\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `bfdot za\.s\[w8,-1\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `bfdot za\.s\[w8,8\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `bfdot za\.s\[w8,0\],{z0\.h-z2\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `bfdot za\.s\[w8,0\],{z1\.h-z2\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `bfdot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h\[-1\]'
-[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `bfdot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h\[4\]'
-[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `bfdot za\.s\[w8,0\],{z0\.h-z1\.h},z16\.h\[0\]'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfdot za\.s\[w7,0\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfdot za\.s\[w12,0\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `bfdot za\.s\[w8,-1\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `bfdot za\.s\[w8,8\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `bfdot za\.s\[w8,0\],{z1\.h-z4\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `bfdot za\.s\[w8,0\],{z2\.h-z5\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `bfdot za\.s\[w8,0\],{z3\.h-z6\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `bfdot za\.s\[w8,0\],{z0\.h-z3\.h},z0\.h\[-1\]'
-[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `bfdot za\.s\[w8,0\],{z0\.h-z3\.h},z0\.h\[4\]'
-[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `bfdot za\.s\[w8,0\],{z0\.h-z3\.h},z16\.h\[0\]'
-[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `bfdot za\.s\[w8,0,vgx4\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `bfdot za\.s\[w8,0,vgx2\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: operand mismatch -- `bfdot za\[w8,0\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfdot za\.s\[w7,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfdot za\.s\[w12,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `bfdot za\.s\[w8,-1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `bfdot za\.s\[w8,8\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `bfdot za\.s\[w8,0\],{ ?z0\.h ?- ?z2\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `bfdot za\.s\[w8,0\],{ ?z1\.h ?- ?z2\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `bfdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[-1\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `bfdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[4\]'
+[^ :]+:[0-9]+: Error: z0 ?- ?z15 expected at operand 3 -- `bfdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z16\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfdot za\.s\[w7,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfdot za\.s\[w12,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `bfdot za\.s\[w8,-1\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `bfdot za\.s\[w8,8\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `bfdot za\.s\[w8,0\],{ ?z1\.h ?- ?z4\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `bfdot za\.s\[w8,0\],{ ?z2\.h ?- ?z5\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `bfdot za\.s\[w8,0\],{ ?z3\.h ?- ?z6\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `bfdot za\.s\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[-1\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `bfdot za\.s\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[4\]'
+[^ :]+:[0-9]+: Error: z0 ?- ?z15 expected at operand 3 -- `bfdot za\.s\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},z16\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `bfdot za\.s\[w8,0,vgx4\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `bfdot za\.s\[w8,0,vgx2\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `bfdot za\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	bfdot za\.s\[w8, 0\], {z0\.h-z1\.h}, z0\.h\[0\]
-[^ :]+:[0-9]+: Error: missing type suffix at operand 2 -- `bfdot za\.s\[w8,0\],{z0-z1},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: operand mismatch -- `bfdot za\.s\[w8,0\],{z0\.h-z1\.h},z0\[0\]'
+[^ :]+:[0-9]+: Error: missing type suffix at operand 2 -- `bfdot za\.s\[w8,0\],{ ?z0 ?- ?z1 ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `bfdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\[0\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	bfdot za\.s\[w8, 0\], {z0\.h-z1\.h}, z0\.h\[0\]
-[^ :]+:[0-9]+: Error: operand mismatch -- `bfdot za\.h\[w8,0\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `bfdot za\.h\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	bfdot za\.s\[w8, 0\], {z0\.h-z1\.h}, z0\.h\[0\]
-[^ :]+:[0-9]+: Error: operand mismatch -- `bfdot za\.h\[w8,0\],{z0\.s-z1\.s},z0\.s\[0\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `bfdot za\.h\[w8,0\],{ ?z0\.s ?- ?z1\.s ?},z0\.s\[0\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	bfdot za\.s\[w8, 0\], {z0\.h-z1\.h}, z0\.h\[0\]
-[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `bfdot za\.s\[w8,0\],{z0\.h-z2\.h},z0\.h'
-[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 2 -- `bfdot za\.s\[w8,0\],{z0\.h-z4\.h},z0\.h'
-[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `bfdot za\.s\[w8,0\],{z0\.h,z1\.h,z2\.h},z0\.h'
-[^ :]+:[0-9]+: Error: invalid register list at operand 2 -- `bfdot za\.s\[w8,0\],{z0\.h,z1\.h,z5\.h},z0\.h'
-[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `bfdot za\.s\[w8,0,vgx4\],{z0\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `bfdot za\.s\[w8,0,vgx2\],{z0\.h-z3\.h},z0\.h'
-[^ :]+:[0-9]+: Error: operand mismatch -- `bfdot za\[w8,0\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `bfdot za\.s\[w8,0\],{ ?z0\.h ?- ?z2\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 2 -- `bfdot za\.s\[w8,0\],{ ?z0\.h ?- ?z4\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `bfdot za\.s\[w8,0\],{ ?z0\.h,z1\.h,z2\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: invalid register list at operand 2 -- `bfdot za\.s\[w8,0\],{ ?z0\.h,z1\.h,z5\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `bfdot za\.s\[w8,0,vgx4\],{ ?z0\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `bfdot za\.s\[w8,0,vgx2\],{ ?z0\.h ?- ?z3\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: operand mismatch -- `bfdot za\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	bfdot za\.s\[w8, 0\], {z0\.h-z1\.h}, z0\.h
-[^ :]+:[0-9]+: Error: missing type suffix at operand 2 -- `bfdot za\.s\[w8,0\],{z0-z1},z0\.h'
-[^ :]+:[0-9]+: Error: operand mismatch -- `bfdot za\.s\[w8,0\],{z0\.h-z1\.h},z0'
+[^ :]+:[0-9]+: Error: missing type suffix at operand 2 -- `bfdot za\.s\[w8,0\],{ ?z0 ?- ?z1 ?},z0\.h'
+[^ :]+:[0-9]+: Error: operand mismatch -- `bfdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	bfdot za\.s\[w8, 0\], {z0\.h-z1\.h}, z0\.h
-[^ :]+:[0-9]+: Error: operand mismatch -- `bfdot za\[w8,0\],{z0\.h-z1\.h},z0'
+[^ :]+:[0-9]+: Error: operand mismatch -- `bfdot za\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	bfdot za\.s\[w8, 0\], {z0\.h-z1\.h}, z0\.h
-[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfdot za\.s\[w7,0\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfdot za\.s\[w12,0\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `bfdot za\.s\[w8,-1\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `bfdot za\.s\[w8,8\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `bfdot za\.s\[w8,0\],{z1\.h-z2\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `bfdot za\.s\[w8,0\],{z0\.h-z1\.h},{z15\.h-z16\.h}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `bfdot za\.s\[w8,0\],{z0\.h-z1\.h},{z31\.h,z0\.h}'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfdot za\.s\[w7,0\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfdot za\.s\[w12,0\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `bfdot za\.s\[w8,-1\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `bfdot za\.s\[w8,8\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `bfdot za\.s\[w8,0\],{z1\.h-z4\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `bfdot za\.s\[w8,0\],{z2\.h-z5\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `bfdot za\.s\[w8,0\],{z3\.h-z6\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `bfdot za\.s\[w8,0\],{z0\.h-z3\.h},{z15\.h-z18\.h}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `bfdot za\.s\[w8,0\],{z0\.h-z3\.h},{z29\.h,z30\.h,z31\.h,z0\.h}'
-[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `bfdot za\.s\[w8,0\],{z0\.h-z2\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `bfdot za\.s\[w8,0\],{z0\.h-z3\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `bfdot za\.s\[w8,0\],{z0\.h-z1\.h},{z0\.h-z2\.h}'
-[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `bfdot za\.s\[w8,0\],{z0\.h-z1\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 3 -- `bfdot za\.s\[w8,0\],{z0\.h-z1\.h},{z0\.h-z4\.h}'
-[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `bfdot za\.s\[w8,0,vgx4\],{z0\.h-z1\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `bfdot za\.s\[w8,0,vgx4\],{z0\.h-z3\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `bfdot za\.s\[w8,0,vgx2\],{z0\.h-z1\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `bfdot za\.s\[w8,0,vgx2\],{z0\.h-z3\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: operand mismatch -- `bfdot za\[w8,0\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfdot za\.s\[w7,0\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfdot za\.s\[w12,0\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `bfdot za\.s\[w8,-1\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `bfdot za\.s\[w8,8\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `bfdot za\.s\[w8,0\],{ ?z1\.h ?- ?z2\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `bfdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},{ ?z15\.h ?- ?z16\.h ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `bfdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},{ ?z31\.h,z0\.h ?}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfdot za\.s\[w7,0\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfdot za\.s\[w12,0\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `bfdot za\.s\[w8,-1\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `bfdot za\.s\[w8,8\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `bfdot za\.s\[w8,0\],{ ?z1\.h ?- ?z4\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `bfdot za\.s\[w8,0\],{ ?z2\.h ?- ?z5\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `bfdot za\.s\[w8,0\],{ ?z3\.h ?- ?z6\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `bfdot za\.s\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},{ ?z15\.h ?- ?z18\.h ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `bfdot za\.s\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},{ ?z29\.h,z30\.h,z31\.h,z0\.h ?}'
+[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `bfdot za\.s\[w8,0\],{ ?z0\.h ?- ?z2\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `bfdot za\.s\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `bfdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z2\.h ?}'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `bfdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 3 -- `bfdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z4\.h ?}'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `bfdot za\.s\[w8,0,vgx4\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `bfdot za\.s\[w8,0,vgx4\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `bfdot za\.s\[w8,0,vgx2\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `bfdot za\.s\[w8,0,vgx2\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: operand mismatch -- `bfdot za\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	bfdot za\.s\[w8, 0\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
-[^ :]+:[0-9]+: Error: operand mismatch -- `bfdot za\[w8,0\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: operand mismatch -- `bfdot za\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	bfdot za\.s\[w8, 0\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
-[^ :]+:[0-9]+: Error: the last offset is equal to the first offset at operand 1 -- `bfdot za\.s\[w8,0:0\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: expected a single offset rather than a range at operand 1 -- `bfdot za\.s\[w8,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: expected a single offset rather than a range at operand 1 -- `bfdot za\.s\[w8,0:2\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: expected a single offset rather than a range at operand 1 -- `bfdot za\.s\[w8,0:3\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: the last offset is less than the first offset at operand 1 -- `bfdot za\.s\[w8,1:0\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: expected a constant immediate offset at operand 1 -- `bfdot za\.s\[w8,foo:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: expected a constant immediate offset at operand 1 -- `bfdot za\.s\[w8,1:foo\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: expected a constant immediate offset at operand 1 -- `bfdot za\.s\[w8,foo:bar\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: the last offset is equal to the first offset at operand 1 -- `bfdot za\.s\[w8,0:0\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: expected a single offset rather than a range at operand 1 -- `bfdot za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: expected a single offset rather than a range at operand 1 -- `bfdot za\.s\[w8,0:2\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: expected a single offset rather than a range at operand 1 -- `bfdot za\.s\[w8,0:3\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: the last offset is less than the first offset at operand 1 -- `bfdot za\.s\[w8,1:0\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: expected a constant immediate offset at operand 1 -- `bfdot za\.s\[w8,foo:1\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: expected a constant immediate offset at operand 1 -- `bfdot za\.s\[w8,1:foo\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: expected a constant immediate offset at operand 1 -- `bfdot za\.s\[w8,foo:bar\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
diff --git a/gas/testsuite/gas/aarch64/sme2-15-noarch.l b/gas/testsuite/gas/aarch64/sme2-15-noarch.l
index 70bfb96..0895748 100644
--- a/gas/testsuite/gas/aarch64/sme2-15-noarch.l
+++ b/gas/testsuite/gas/aarch64/sme2-15-noarch.l
@@ -1,187 +1,187 @@
 [^ :]+: Assembler messages:
-[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0,vgx2\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfdot ZA\.s\[W8,0,VGx2\],{Z0\.h-Z1\.h},Z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfdot ZA\.S\[W8,0,VGX2\],{Z0\.H-Z1\.H},Z0\.H\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w11,0\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,7\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{z30\.h-z31\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{z0\.h-z1\.h},z15\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h\[3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w10,2\],{z14\.h-z15\.h},z13\.h\[1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0,vgx4\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfdot ZA\.s\[W8,0,VGx4\],{Z0\.h-Z3\.h},Z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfdot ZA\.S\[W8,0,VGX4\],{Z0\.H-Z3\.H},Z0\.H\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w11,0\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,7\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{z28\.h-z31\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{z0\.h-z3\.h},z15\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{z0\.h-z3\.h},z0\.h\[3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w9,1\],{z4\.h-z7\.h},z10\.h\[2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0,vgx2\],{z0\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfdot ZA\.s\[W8,0,VGx2\],{Z0\.h-Z1\.h},Z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfdot ZA\.S\[W8,0,VGX2\],{Z0\.H-Z1\.H},Z0\.H'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w11,0\],{z0\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,7\],{z0\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{z30\.h-z31\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{z31\.h,z0\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{z31\.h-z0\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{z0\.h-z1\.h},z15\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w9,3\],{z21\.h-z22\.h},z9\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{z0\.h-z3\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0,vgx4\],{z0\.h-z3\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfdot ZA\.s\[W8,0,VGx4\],{Z0\.h-Z3\.h},Z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfdot ZA\.S\[W8,0,VGX4\],{Z0\.H-Z3\.H},Z0\.H'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w11,0\],{z0\.h-z3\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,7\],{z0\.h-z3\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{z28\.h-z31\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{z30\.h,z31\.h,z0\.h,z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{z30\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{z31\.h,z0\.h,z1\.h,z2\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{z31\.h-z2\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{z0\.h-z3\.h},z15\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w10,5\],{z17\.h-z20\.h},z3\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0,vgx2\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfdot ZA\.s\[W8,0,VGx2\],{Z0\.h-Z1\.h},{Z0\.h-Z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfdot ZA\.S\[W8,0,VGX2\],{Z0\.H-Z1\.H},{Z0\.H-Z1\.H}'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w11,0\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,7\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{z30\.h-z31\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{z0\.h-z1\.h},{z30\.h-z31\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w10,1\],{z22\.h-z23\.h},{z18\.h-z19\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0,vgx4\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfdot ZA\.s\[W8,0,VGx4\],{Z0\.h-Z3\.h},{Z0\.h-Z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfdot ZA\.S\[W8,0,VGX4\],{Z0\.H-Z3\.H},{Z0\.H-Z3\.H}'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w11,0\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,7\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{z28\.h-z31\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{z0\.h-z3\.h},{z28\.h-z31\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w11,3\],{z16\.h-z19\.h},{z24\.h-z27\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0,vgx2\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fdot ZA\.s\[W8,0,VGx2\],{Z0\.h-Z1\.h},Z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fdot ZA\.S\[W8,0,VGX2\],{Z0\.H-Z1\.H},Z0\.H\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w11,0\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,7\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{z30\.h-z31\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{z0\.h-z1\.h},z15\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h\[3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w10,2\],{z14\.h-z15\.h},z13\.h\[1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0,vgx4\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fdot ZA\.s\[W8,0,VGx4\],{Z0\.h-Z3\.h},Z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fdot ZA\.S\[W8,0,VGX4\],{Z0\.H-Z3\.H},Z0\.H\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w11,0\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,7\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{z28\.h-z31\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{z0\.h-z3\.h},z15\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{z0\.h-z3\.h},z0\.h\[3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w9,1\],{z4\.h-z7\.h},z10\.h\[2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0,vgx2\],{z0\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `fdot ZA\.s\[W8,0,VGx2\],{Z0\.h-Z1\.h},Z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `fdot ZA\.S\[W8,0,VGX2\],{Z0\.H-Z1\.H},Z0\.H'
-[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w11,0\],{z0\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,7\],{z0\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{z30\.h-z31\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{z31\.h,z0\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{z31\.h-z0\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{z0\.h-z1\.h},z15\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w9,3\],{z21\.h-z22\.h},z9\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{z0\.h-z3\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0,vgx4\],{z0\.h-z3\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `fdot ZA\.s\[W8,0,VGx4\],{Z0\.h-Z3\.h},Z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `fdot ZA\.S\[W8,0,VGX4\],{Z0\.H-Z3\.H},Z0\.H'
-[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w11,0\],{z0\.h-z3\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,7\],{z0\.h-z3\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{z28\.h-z31\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{z30\.h,z31\.h,z0\.h,z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{z30\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{z31\.h,z0\.h,z1\.h,z2\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{z31\.h-z2\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{z0\.h-z3\.h},z15\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w10,5\],{z17\.h-z20\.h},z3\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0,vgx2\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fdot ZA\.s\[W8,0,VGx2\],{Z0\.h-Z1\.h},{Z0\.h-Z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fdot ZA\.S\[W8,0,VGX2\],{Z0\.H-Z1\.H},{Z0\.H-Z1\.H}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w11,0\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,7\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{z30\.h-z31\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{z0\.h-z1\.h},{z30\.h-z31\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w10,1\],{z22\.h-z23\.h},{z18\.h-z19\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0,vgx4\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fdot ZA\.s\[W8,0,VGx4\],{Z0\.h-Z3\.h},{Z0\.h-Z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fdot ZA\.S\[W8,0,VGX4\],{Z0\.H-Z3\.H},{Z0\.H-Z3\.H}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w11,0\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,7\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{z28\.h-z31\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{z0\.h-z3\.h},{z28\.h-z31\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w11,3\],{z16\.h-z19\.h},{z24\.h-z27\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{z0\.b-z1\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0,vgx2\],{z0\.b-z1\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `usdot ZA\.s\[W8,0,VGx2\],{Z0\.b-Z1\.b},Z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `usdot ZA\.S\[W8,0,VGX2\],{Z0\.B-Z1\.B},Z0\.B\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w11,0\],{z0\.b-z1\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,7\],{z0\.b-z1\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{z30\.b-z31\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{z0\.b-z1\.b},z15\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{z0\.b-z1\.b},z0\.b\[3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w10,2\],{z14\.b-z15\.b},z13\.b\[1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{z0\.b-z3\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0,vgx4\],{z0\.b-z3\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `usdot ZA\.s\[W8,0,VGx4\],{Z0\.b-Z3\.b},Z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `usdot ZA\.S\[W8,0,VGX4\],{Z0\.B-Z3\.B},Z0\.B\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w11,0\],{z0\.b-z3\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,7\],{z0\.b-z3\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{z28\.b-z31\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{z0\.b-z3\.b},z15\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{z0\.b-z3\.b},z0\.b\[3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w9,1\],{z4\.b-z7\.b},z10\.b\[2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{z0\.b-z1\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0,vgx2\],{z0\.b-z1\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `usdot ZA\.s\[W8,0,VGx2\],{Z0\.b-Z1\.b},Z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `usdot ZA\.S\[W8,0,VGX2\],{Z0\.B-Z1\.B},Z0\.B'
-[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w11,0\],{z0\.b-z1\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,7\],{z0\.b-z1\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{z30\.b-z31\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{z31\.b,z0\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{z31\.b-z0\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{z0\.b-z1\.b},z15\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w9,3\],{z21\.b-z22\.b},z9\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{z0\.b-z3\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0,vgx4\],{z0\.b-z3\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `usdot ZA\.s\[W8,0,VGx4\],{Z0\.b-Z3\.b},Z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `usdot ZA\.S\[W8,0,VGX4\],{Z0\.B-Z3\.B},Z0\.B'
-[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w11,0\],{z0\.b-z3\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,7\],{z0\.b-z3\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{z28\.b-z31\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{z30\.b,z31\.b,z0\.b,z1\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{z30\.b-z1\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{z31\.b,z0\.b,z1\.b,z2\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{z31\.b-z2\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{z0\.b-z3\.b},z15\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w10,5\],{z17\.b-z20\.b},z3\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0,vgx2\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `usdot ZA\.s\[W8,0,VGx2\],{Z0\.b-Z1\.b},{Z0\.b-Z1\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `usdot ZA\.S\[W8,0,VGX2\],{Z0\.B-Z1\.B},{Z0\.B-Z1\.B}'
-[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w11,0\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,7\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{z30\.b-z31\.b},{z0\.b-z1\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{z0\.b-z1\.b},{z30\.b-z31\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w10,1\],{z22\.b-z23\.b},{z18\.b-z19\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0,vgx4\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `usdot ZA\.s\[W8,0,VGx4\],{Z0\.b-Z3\.b},{Z0\.b-Z3\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `usdot ZA\.S\[W8,0,VGX4\],{Z0\.B-Z3\.B},{Z0\.B-Z3\.B}'
-[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w11,0\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,7\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{z28\.b-z31\.b},{z0\.b-z3\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{z0\.b-z3\.b},{z28\.b-z31\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w11,3\],{z16\.b-z19\.b},{z24\.b-z27\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0,vgx2\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot ZA\.s\[W8,0,VGx2\],{ ?Z0\.h ?- ?Z1\.h ?},Z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot ZA\.S\[W8,0,VGX2\],{ ?Z0\.H ?- ?Z1\.H ?},Z0\.H\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w11,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,7\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{ ?z30\.h ?- ?z31\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w10,2\],{ ?z14\.h ?- ?z15\.h ?},z13\.h\[1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0,vgx4\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot ZA\.s\[W8,0,VGx4\],{ ?Z0\.h ?- ?Z3\.h ?},Z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot ZA\.S\[W8,0,VGX4\],{ ?Z0\.H ?- ?Z3\.H ?},Z0\.H\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w11,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,7\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{ ?z28\.h ?- ?z31\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w9,1\],{ ?z4\.h ?- ?z7\.h ?},z10\.h\[2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0,vgx2\],{ ?z0\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot ZA\.s\[W8,0,VGx2\],{ ?Z0\.h ?- ?Z1\.h ?},Z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot ZA\.S\[W8,0,VGX2\],{ ?Z0\.H ?- ?Z1\.H ?},Z0\.H'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w11,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,7\],{ ?z0\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{ ?z30\.h ?- ?z31\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{ ?z31\.h,z0\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{ ?z31\.h ?- ?z0\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w9,3\],{ ?z21\.h ?- ?z22\.h ?},z9\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0,vgx4\],{ ?z0\.h ?- ?z3\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot ZA\.s\[W8,0,VGx4\],{ ?Z0\.h ?- ?Z3\.h ?},Z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot ZA\.S\[W8,0,VGX4\],{ ?Z0\.H ?- ?Z3\.H ?},Z0\.H'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w11,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,7\],{ ?z0\.h ?- ?z3\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{ ?z28\.h ?- ?z31\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{ ?z30\.h,z31\.h,z0\.h,z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{ ?z30\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{ ?z31\.h,z0\.h,z1\.h,z2\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{ ?z31\.h ?- ?z2\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w10,5\],{ ?z17\.h ?- ?z20\.h ?},z3\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0,vgx2\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot ZA\.s\[W8,0,VGx2\],{ ?Z0\.h ?- ?Z1\.h ?},{ ?Z0\.h ?- ?Z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot ZA\.S\[W8,0,VGX2\],{ ?Z0\.H ?- ?Z1\.H ?},{ ?Z0\.H ?- ?Z1\.H ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w11,0\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,7\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{ ?z30\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},{ ?z30\.h ?- ?z31\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w10,1\],{ ?z22\.h ?- ?z23\.h ?},{ ?z18\.h ?- ?z19\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0,vgx4\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot ZA\.s\[W8,0,VGx4\],{ ?Z0\.h ?- ?Z3\.h ?},{ ?Z0\.h ?- ?Z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot ZA\.S\[W8,0,VGX4\],{ ?Z0\.H ?- ?Z3\.H ?},{ ?Z0\.H ?- ?Z3\.H ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w11,0\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,7\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{ ?z28\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},{ ?z28\.h ?- ?z31\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w11,3\],{ ?z16\.h ?- ?z19\.h ?},{ ?z24\.h ?- ?z27\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0,vgx2\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot ZA\.s\[W8,0,VGx2\],{ ?Z0\.h ?- ?Z1\.h ?},Z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot ZA\.S\[W8,0,VGX2\],{ ?Z0\.H ?- ?Z1\.H ?},Z0\.H\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w11,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,7\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{ ?z30\.h ?- ?z31\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w10,2\],{ ?z14\.h ?- ?z15\.h ?},z13\.h\[1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0,vgx4\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot ZA\.s\[W8,0,VGx4\],{ ?Z0\.h ?- ?Z3\.h ?},Z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot ZA\.S\[W8,0,VGX4\],{ ?Z0\.H ?- ?Z3\.H ?},Z0\.H\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w11,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,7\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{ ?z28\.h ?- ?z31\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w9,1\],{ ?z4\.h ?- ?z7\.h ?},z10\.h\[2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0,vgx2\],{ ?z0\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot ZA\.s\[W8,0,VGx2\],{ ?Z0\.h ?- ?Z1\.h ?},Z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot ZA\.S\[W8,0,VGX2\],{ ?Z0\.H ?- ?Z1\.H ?},Z0\.H'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w11,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,7\],{ ?z0\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{ ?z30\.h ?- ?z31\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{ ?z31\.h,z0\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{ ?z31\.h ?- ?z0\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w9,3\],{ ?z21\.h ?- ?z22\.h ?},z9\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0,vgx4\],{ ?z0\.h ?- ?z3\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot ZA\.s\[W8,0,VGx4\],{ ?Z0\.h ?- ?Z3\.h ?},Z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot ZA\.S\[W8,0,VGX4\],{ ?Z0\.H ?- ?Z3\.H ?},Z0\.H'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w11,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,7\],{ ?z0\.h ?- ?z3\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{ ?z28\.h ?- ?z31\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{ ?z30\.h,z31\.h,z0\.h,z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{ ?z30\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{ ?z31\.h,z0\.h,z1\.h,z2\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{ ?z31\.h ?- ?z2\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w10,5\],{ ?z17\.h ?- ?z20\.h ?},z3\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0,vgx2\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot ZA\.s\[W8,0,VGx2\],{ ?Z0\.h ?- ?Z1\.h ?},{ ?Z0\.h ?- ?Z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot ZA\.S\[W8,0,VGX2\],{ ?Z0\.H ?- ?Z1\.H ?},{ ?Z0\.H ?- ?Z1\.H ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w11,0\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,7\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{ ?z30\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},{ ?z30\.h ?- ?z31\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w10,1\],{ ?z22\.h ?- ?z23\.h ?},{ ?z18\.h ?- ?z19\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0,vgx4\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot ZA\.s\[W8,0,VGx4\],{ ?Z0\.h ?- ?Z3\.h ?},{ ?Z0\.h ?- ?Z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot ZA\.S\[W8,0,VGX4\],{ ?Z0\.H ?- ?Z3\.H ?},{ ?Z0\.H ?- ?Z3\.H ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w11,0\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,7\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{ ?z28\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},{ ?z28\.h ?- ?z31\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w11,3\],{ ?z16\.h ?- ?z19\.h ?},{ ?z24\.h ?- ?z27\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0,vgx2\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot ZA\.s\[W8,0,VGx2\],{ ?Z0\.b ?- ?Z1\.b ?},Z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot ZA\.S\[W8,0,VGX2\],{ ?Z0\.B ?- ?Z1\.B ?},Z0\.B\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w11,0\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,7\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{ ?z30\.b ?- ?z31\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{ ?z0\.b ?- ?z1\.b ?},z15\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w10,2\],{ ?z14\.b ?- ?z15\.b ?},z13\.b\[1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0,vgx4\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot ZA\.s\[W8,0,VGx4\],{ ?Z0\.b ?- ?Z3\.b ?},Z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot ZA\.S\[W8,0,VGX4\],{ ?Z0\.B ?- ?Z3\.B ?},Z0\.B\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w11,0\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,7\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{ ?z28\.b ?- ?z31\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{ ?z0\.b ?- ?z3\.b ?},z15\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w9,1\],{ ?z4\.b ?- ?z7\.b ?},z10\.b\[2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{ ?z0\.b ?- ?z1\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0,vgx2\],{ ?z0\.b ?- ?z1\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot ZA\.s\[W8,0,VGx2\],{ ?Z0\.b ?- ?Z1\.b ?},Z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot ZA\.S\[W8,0,VGX2\],{ ?Z0\.B ?- ?Z1\.B ?},Z0\.B'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w11,0\],{ ?z0\.b ?- ?z1\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,7\],{ ?z0\.b ?- ?z1\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{ ?z30\.b ?- ?z31\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{ ?z31\.b,z0\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{ ?z31\.b ?- ?z0\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{ ?z0\.b ?- ?z1\.b ?},z15\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w9,3\],{ ?z21\.b ?- ?z22\.b ?},z9\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{ ?z0\.b ?- ?z3\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0,vgx4\],{ ?z0\.b ?- ?z3\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot ZA\.s\[W8,0,VGx4\],{ ?Z0\.b ?- ?Z3\.b ?},Z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot ZA\.S\[W8,0,VGX4\],{ ?Z0\.B ?- ?Z3\.B ?},Z0\.B'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w11,0\],{ ?z0\.b ?- ?z3\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,7\],{ ?z0\.b ?- ?z3\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{ ?z28\.b ?- ?z31\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{ ?z30\.b,z31\.b,z0\.b,z1\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{ ?z30\.b ?- ?z1\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{ ?z31\.b,z0\.b,z1\.b,z2\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{ ?z31\.b ?- ?z2\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{ ?z0\.b ?- ?z3\.b ?},z15\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w10,5\],{ ?z17\.b ?- ?z20\.b ?},z3\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0,vgx2\],{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot ZA\.s\[W8,0,VGx2\],{ ?Z0\.b ?- ?Z1\.b ?},{ ?Z0\.b ?- ?Z1\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot ZA\.S\[W8,0,VGX2\],{ ?Z0\.B ?- ?Z1\.B ?},{ ?Z0\.B ?- ?Z1\.B ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w11,0\],{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,7\],{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{ ?z30\.b ?- ?z31\.b ?},{ ?z0\.b ?- ?z1\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{ ?z0\.b ?- ?z1\.b ?},{ ?z30\.b ?- ?z31\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w10,1\],{ ?z22\.b ?- ?z23\.b ?},{ ?z18\.b ?- ?z19\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{ ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0,vgx4\],{ ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot ZA\.s\[W8,0,VGx4\],{ ?Z0\.b ?- ?Z3\.b ?},{ ?Z0\.b ?- ?Z3\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot ZA\.S\[W8,0,VGX4\],{ ?Z0\.B ?- ?Z3\.B ?},{ ?Z0\.B ?- ?Z3\.B ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w11,0\],{ ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,7\],{ ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{ ?z28\.b ?- ?z31\.b ?},{ ?z0\.b ?- ?z3\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{ ?z0\.b ?- ?z3\.b ?},{ ?z28\.b ?- ?z31\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w11,3\],{ ?z16\.b ?- ?z19\.b ?},{ ?z24\.b ?- ?z27\.b ?}'
diff --git a/gas/testsuite/gas/aarch64/sme2-16-invalid.l b/gas/testsuite/gas/aarch64/sme2-16-invalid.l
index 44e0f1a..1f33a83 100644
--- a/gas/testsuite/gas/aarch64/sme2-16-invalid.l
+++ b/gas/testsuite/gas/aarch64/sme2-16-invalid.l
@@ -1,97 +1,97 @@
 [^ :]+: Assembler messages:
-[^ :]+:[0-9]+: Error: expected a register at operand 1 -- `sdot 0,{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a register at operand 1 -- `sdot 0,{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
 [^ :]+:[0-9]+: Error: expected '{' at operand 2 -- `sdot za\.s\[w8,0\],0,z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: expected a register or register list at operand 3 -- `sdot za\.s\[w8,0\],{z0\.h-z1\.h},0'
+[^ :]+:[0-9]+: Error: expected a register or register list at operand 3 -- `sdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},0'
 [^ :]+:[0-9]+: Error: missing braces at operand 2 -- `sdot za\.h\[w8,0\],z0\.h,z0\.h'
-[^ :]+:[0-9]+: Error: operand mismatch -- `sdot za\.h\[w8,0\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: operand mismatch -- `sdot za\.h\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	sdot za\.s\[w8, 0\], {z0\.h-z1\.h}, z0\.h
-[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `sdot za\.s\[w7,0\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `sdot za\.s\[w12,0\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `sdot za\.s\[w8,-1\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `sdot za\.s\[w8,8\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `sdot za\.s\[w8,0\],{z0\.h-z2\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sdot za\.s\[w8,0\],{z1\.h-z2\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `sdot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h\[-1\]'
-[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `sdot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h\[4\]'
-[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `sdot za\.s\[w8,0\],{z0\.h-z1\.h},z16\.h\[0\]'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `sdot za\.s\[w7,0\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `sdot za\.s\[w12,0\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `sdot za\.s\[w8,-1\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `sdot za\.s\[w8,8\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sdot za\.s\[w8,0\],{z1\.h-z4\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sdot za\.s\[w8,0\],{z2\.h-z5\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sdot za\.s\[w8,0\],{z3\.h-z6\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `sdot za\.s\[w8,0\],{z0\.h-z3\.h},z0\.h\[-1\]'
-[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `sdot za\.s\[w8,0\],{z0\.h-z3\.h},z0\.h\[4\]'
-[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `sdot za\.s\[w8,0\],{z0\.h-z3\.h},z16\.h\[0\]'
-[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `sdot za\.s\[w8,0,vgx4\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `sdot za\.s\[w8,0,vgx2\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: operand mismatch -- `sdot za\[w8,0\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `sdot za\.s\[w7,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `sdot za\.s\[w12,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `sdot za\.s\[w8,-1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `sdot za\.s\[w8,8\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `sdot za\.s\[w8,0\],{ ?z0\.h ?- ?z2\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sdot za\.s\[w8,0\],{ ?z1\.h ?- ?z2\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `sdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[-1\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `sdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[4\]'
+[^ :]+:[0-9]+: Error: z0 ?- ?z15 expected at operand 3 -- `sdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z16\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `sdot za\.s\[w7,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `sdot za\.s\[w12,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `sdot za\.s\[w8,-1\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `sdot za\.s\[w8,8\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sdot za\.s\[w8,0\],{ ?z1\.h ?- ?z4\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sdot za\.s\[w8,0\],{ ?z2\.h ?- ?z5\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sdot za\.s\[w8,0\],{ ?z3\.h ?- ?z6\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `sdot za\.s\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[-1\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `sdot za\.s\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[4\]'
+[^ :]+:[0-9]+: Error: z0 ?- ?z15 expected at operand 3 -- `sdot za\.s\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},z16\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `sdot za\.s\[w8,0,vgx4\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `sdot za\.s\[w8,0,vgx2\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `sdot za\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	sdot za\.s\[w8, 0\], {z0\.h-z1\.h}, z0\.h\[0\]
-[^ :]+:[0-9]+: Error: missing type suffix at operand 2 -- `sdot za\.s\[w8,0\],{z0-z1},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: operand mismatch -- `sdot za\.s\[w8,0\],{z0\.h-z1\.h},z0\[0\]'
+[^ :]+:[0-9]+: Error: missing type suffix at operand 2 -- `sdot za\.s\[w8,0\],{ ?z0 ?- ?z1 ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `sdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\[0\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	sdot za\.s\[w8, 0\], {z0\.h-z1\.h}, z0\.h\[0\]
-[^ :]+:[0-9]+: Error: operand mismatch -- `sdot za\.h\[w8,0\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `sdot za\.h\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	sdot za\.s\[w8, 0\], {z0\.h-z1\.h}, z0\.h\[0\]
-[^ :]+:[0-9]+: Error: operand mismatch -- `sdot za\.h\[w8,0\],{z0\.s-z1\.s},z0\.s\[0\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `sdot za\.h\[w8,0\],{ ?z0\.s ?- ?z1\.s ?},z0\.s\[0\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	sdot za\.s\[w8, 0\], {z0\.h-z1\.h}, z0\.h\[0\]
-[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `sdot za\.s\[w8,0\],{z0\.h-z2\.h},z0\.h'
-[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 2 -- `sdot za\.s\[w8,0\],{z0\.h-z4\.h},z0\.h'
-[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `sdot za\.s\[w8,0\],{z0\.h,z1\.h,z2\.h},z0\.h'
-[^ :]+:[0-9]+: Error: invalid register list at operand 2 -- `sdot za\.s\[w8,0\],{z0\.h,z1\.h,z5\.h},z0\.h'
-[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `sdot za\.s\[w8,0,vgx4\],{z0\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `sdot za\.s\[w8,0,vgx2\],{z0\.h-z3\.h},z0\.h'
-[^ :]+:[0-9]+: Error: operand mismatch -- `sdot za\[w8,0\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `sdot za\.s\[w8,0\],{ ?z0\.h ?- ?z2\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 2 -- `sdot za\.s\[w8,0\],{ ?z0\.h ?- ?z4\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `sdot za\.s\[w8,0\],{ ?z0\.h,z1\.h,z2\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: invalid register list at operand 2 -- `sdot za\.s\[w8,0\],{ ?z0\.h,z1\.h,z5\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `sdot za\.s\[w8,0,vgx4\],{ ?z0\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `sdot za\.s\[w8,0,vgx2\],{ ?z0\.h ?- ?z3\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: operand mismatch -- `sdot za\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	sdot za\.s\[w8, 0\], {z0\.h-z1\.h}, z0\.h
-[^ :]+:[0-9]+: Error: missing type suffix at operand 2 -- `sdot za\.s\[w8,0\],{z0-z1},z0\.h'
-[^ :]+:[0-9]+: Error: operand mismatch -- `sdot za\.s\[w8,0\],{z0\.h-z1\.h},z0'
+[^ :]+:[0-9]+: Error: missing type suffix at operand 2 -- `sdot za\.s\[w8,0\],{ ?z0 ?- ?z1 ?},z0\.h'
+[^ :]+:[0-9]+: Error: operand mismatch -- `sdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	sdot za\.s\[w8, 0\], {z0\.h-z1\.h}, z0\.h
-[^ :]+:[0-9]+: Error: operand mismatch -- `sdot za\[w8,0\],{z0\.h-z1\.h},z0'
+[^ :]+:[0-9]+: Error: operand mismatch -- `sdot za\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	sdot za\.s\[w8, 0\], {z0\.h-z1\.h}, z0\.h
-[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `sdot za\.s\[w7,0\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `sdot za\.s\[w12,0\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `sdot za\.s\[w8,-1\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `sdot za\.s\[w8,8\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sdot za\.s\[w8,0\],{z1\.h-z2\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `sdot za\.s\[w8,0\],{z0\.h-z1\.h},{z15\.h-z16\.h}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `sdot za\.s\[w8,0\],{z0\.h-z1\.h},{z31\.h,z0\.h}'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `sdot za\.s\[w7,0\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `sdot za\.s\[w12,0\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `sdot za\.s\[w8,-1\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `sdot za\.s\[w8,8\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sdot za\.s\[w8,0\],{z1\.h-z4\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sdot za\.s\[w8,0\],{z2\.h-z5\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sdot za\.s\[w8,0\],{z3\.h-z6\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `sdot za\.s\[w8,0\],{z0\.h-z3\.h},{z15\.h-z18\.h}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `sdot za\.s\[w8,0\],{z0\.h-z3\.h},{z29\.h,z30\.h,z31\.h,z0\.h}'
-[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `sdot za\.s\[w8,0\],{z0\.h-z2\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `sdot za\.s\[w8,0\],{z0\.h-z3\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `sdot za\.s\[w8,0\],{z0\.h-z1\.h},{z0\.h-z2\.h}'
-[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `sdot za\.s\[w8,0\],{z0\.h-z1\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 3 -- `sdot za\.s\[w8,0\],{z0\.h-z1\.h},{z0\.h-z4\.h}'
-[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `sdot za\.s\[w8,0,vgx4\],{z0\.h-z1\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `sdot za\.s\[w8,0,vgx4\],{z0\.h-z3\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `sdot za\.s\[w8,0,vgx2\],{z0\.h-z1\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `sdot za\.s\[w8,0,vgx2\],{z0\.h-z3\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: operand mismatch -- `sdot za\[w8,0\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `sdot za\.s\[w7,0\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `sdot za\.s\[w12,0\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `sdot za\.s\[w8,-1\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `sdot za\.s\[w8,8\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sdot za\.s\[w8,0\],{ ?z1\.h ?- ?z2\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `sdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},{ ?z15\.h ?- ?z16\.h ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `sdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},{ ?z31\.h,z0\.h ?}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `sdot za\.s\[w7,0\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `sdot za\.s\[w12,0\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `sdot za\.s\[w8,-1\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `sdot za\.s\[w8,8\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sdot za\.s\[w8,0\],{ ?z1\.h ?- ?z4\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sdot za\.s\[w8,0\],{ ?z2\.h ?- ?z5\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sdot za\.s\[w8,0\],{ ?z3\.h ?- ?z6\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `sdot za\.s\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},{ ?z15\.h ?- ?z18\.h ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `sdot za\.s\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},{ ?z29\.h,z30\.h,z31\.h,z0\.h ?}'
+[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `sdot za\.s\[w8,0\],{ ?z0\.h ?- ?z2\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `sdot za\.s\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `sdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z2\.h ?}'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `sdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 3 -- `sdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z4\.h ?}'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `sdot za\.s\[w8,0,vgx4\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `sdot za\.s\[w8,0,vgx4\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `sdot za\.s\[w8,0,vgx2\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `sdot za\.s\[w8,0,vgx2\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: operand mismatch -- `sdot za\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	sdot za\.s\[w8, 0\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
-[^ :]+:[0-9]+: Error: operand mismatch -- `sdot za\[w8,0\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: operand mismatch -- `sdot za\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	sdot za\.s\[w8, 0\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
-[^ :]+:[0-9]+: Error: the last offset is equal to the first offset at operand 1 -- `sdot za\.s\[w8,0:0\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: expected a single offset rather than a range at operand 1 -- `sdot za\.s\[w8,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: expected a single offset rather than a range at operand 1 -- `sdot za\.s\[w8,0:2\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: expected a single offset rather than a range at operand 1 -- `sdot za\.s\[w8,0:3\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: the last offset is less than the first offset at operand 1 -- `sdot za\.s\[w8,1:0\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: expected a constant immediate offset at operand 1 -- `sdot za\.s\[w8,foo:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: expected a constant immediate offset at operand 1 -- `sdot za\.s\[w8,1:foo\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: expected a constant immediate offset at operand 1 -- `sdot za\.s\[w8,foo:bar\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: the last offset is equal to the first offset at operand 1 -- `sdot za\.s\[w8,0:0\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: expected a single offset rather than a range at operand 1 -- `sdot za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: expected a single offset rather than a range at operand 1 -- `sdot za\.s\[w8,0:2\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: expected a single offset rather than a range at operand 1 -- `sdot za\.s\[w8,0:3\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: the last offset is less than the first offset at operand 1 -- `sdot za\.s\[w8,1:0\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: expected a constant immediate offset at operand 1 -- `sdot za\.s\[w8,foo:1\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: expected a constant immediate offset at operand 1 -- `sdot za\.s\[w8,1:foo\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: expected a constant immediate offset at operand 1 -- `sdot za\.s\[w8,foo:bar\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
diff --git a/gas/testsuite/gas/aarch64/sme2-16-noarch.l b/gas/testsuite/gas/aarch64/sme2-16-noarch.l
index bebc1cc..639b490 100644
--- a/gas/testsuite/gas/aarch64/sme2-16-noarch.l
+++ b/gas/testsuite/gas/aarch64/sme2-16-noarch.l
@@ -1,249 +1,249 @@
 [^ :]+: Assembler messages:
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0,vgx2\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.s\[W8,0,VGx2\],{Z0\.h-Z1\.h},Z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.S\[W8,0,VGX2\],{Z0\.H-Z1\.H},Z0\.H\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w11,0\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,7\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z30\.h-z31\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z0\.h-z1\.h},z15\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h\[3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w10,2\],{z14\.h-z15\.h},z13\.h\[1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0,vgx4\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.s\[W8,0,VGx4\],{Z0\.h-Z3\.h},Z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.S\[W8,0,VGX4\],{Z0\.H-Z3\.H},Z0\.H\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w11,0\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,7\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z28\.h-z31\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z0\.h-z3\.h},z15\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z0\.h-z3\.h},z0\.h\[3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w9,1\],{z4\.h-z7\.h},z10\.h\[2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0,vgx2\],{z0\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.s\[W8,0,VGx2\],{Z0\.h-Z1\.h},Z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.S\[W8,0,VGX2\],{Z0\.H-Z1\.H},Z0\.H'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w11,0\],{z0\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,7\],{z0\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z30\.h-z31\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z31\.h,z0\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z31\.h-z0\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z0\.h-z1\.h},z15\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w9,3\],{z21\.h-z22\.h},z9\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z0\.h-z3\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0,vgx4\],{z0\.h-z3\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.s\[W8,0,VGx4\],{Z0\.h-Z3\.h},Z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.S\[W8,0,VGX4\],{Z0\.H-Z3\.H},Z0\.H'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w11,0\],{z0\.h-z3\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,7\],{z0\.h-z3\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z28\.h-z31\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z30\.h,z31\.h,z0\.h,z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z30\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z31\.h,z0\.h,z1\.h,z2\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z31\.h-z2\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z0\.h-z3\.h},z15\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w10,5\],{z17\.h-z20\.h},z3\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0,vgx2\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.s\[W8,0,VGx2\],{Z0\.h-Z1\.h},{Z0\.h-Z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.S\[W8,0,VGX2\],{Z0\.H-Z1\.H},{Z0\.H-Z1\.H}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w11,0\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,7\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z30\.h-z31\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z0\.h-z1\.h},{z30\.h-z31\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w10,1\],{z22\.h-z23\.h},{z18\.h-z19\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0,vgx4\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.s\[W8,0,VGx4\],{Z0\.h-Z3\.h},{Z0\.h-Z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.S\[W8,0,VGX4\],{Z0\.H-Z3\.H},{Z0\.H-Z3\.H}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w11,0\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,7\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z28\.h-z31\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z0\.h-z3\.h},{z28\.h-z31\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w11,3\],{z16\.h-z19\.h},{z24\.h-z27\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z0\.b-z1\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0,vgx2\],{z0\.b-z1\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.s\[W8,0,VGx2\],{Z0\.b-Z1\.b},Z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.S\[W8,0,VGX2\],{Z0\.B-Z1\.B},Z0\.B\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w11,0\],{z0\.b-z1\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,7\],{z0\.b-z1\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z30\.b-z31\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z0\.b-z1\.b},z15\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z0\.b-z1\.b},z0\.b\[3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w10,2\],{z14\.b-z15\.b},z13\.b\[1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z0\.b-z3\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0,vgx4\],{z0\.b-z3\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.s\[W8,0,VGx4\],{Z0\.b-Z3\.b},Z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.S\[W8,0,VGX4\],{Z0\.B-Z3\.B},Z0\.B\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w11,0\],{z0\.b-z3\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,7\],{z0\.b-z3\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z28\.b-z31\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z0\.b-z3\.b},z15\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z0\.b-z3\.b},z0\.b\[3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w9,1\],{z4\.b-z7\.b},z10\.b\[2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z0\.b-z1\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0,vgx2\],{z0\.b-z1\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.s\[W8,0,VGx2\],{Z0\.b-Z1\.b},Z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.S\[W8,0,VGX2\],{Z0\.B-Z1\.B},Z0\.B'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w11,0\],{z0\.b-z1\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,7\],{z0\.b-z1\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z30\.b-z31\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z31\.b,z0\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z31\.b-z0\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z0\.b-z1\.b},z15\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w9,3\],{z21\.b-z22\.b},z9\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z0\.b-z3\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0,vgx4\],{z0\.b-z3\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.s\[W8,0,VGx4\],{Z0\.b-Z3\.b},Z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.S\[W8,0,VGX4\],{Z0\.B-Z3\.B},Z0\.B'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w11,0\],{z0\.b-z3\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,7\],{z0\.b-z3\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z28\.b-z31\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z30\.b,z31\.b,z0\.b,z1\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z30\.b-z1\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z31\.b,z0\.b,z1\.b,z2\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z31\.b-z2\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z0\.b-z3\.b},z15\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w10,5\],{z17\.b-z20\.b},z3\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0,vgx2\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.s\[W8,0,VGx2\],{Z0\.b-Z1\.b},{Z0\.b-Z1\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.S\[W8,0,VGX2\],{Z0\.B-Z1\.B},{Z0\.B-Z1\.B}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w11,0\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,7\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z30\.b-z31\.b},{z0\.b-z1\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z0\.b-z1\.b},{z30\.b-z31\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w10,1\],{z22\.b-z23\.b},{z18\.b-z19\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0,vgx4\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.s\[W8,0,VGx4\],{Z0\.b-Z3\.b},{Z0\.b-Z3\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.S\[W8,0,VGX4\],{Z0\.B-Z3\.B},{Z0\.B-Z3\.B}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w11,0\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,7\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z28\.b-z31\.b},{z0\.b-z3\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z0\.b-z3\.b},{z28\.b-z31\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w11,3\],{z16\.b-z19\.b},{z24\.b-z27\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0,vgx2\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.s\[W8,0,VGx2\],{Z0\.h-Z1\.h},Z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.S\[W8,0,VGX2\],{Z0\.H-Z1\.H},Z0\.H\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w11,0\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,7\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z30\.h-z31\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z0\.h-z1\.h},z15\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h\[3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w10,2\],{z14\.h-z15\.h},z13\.h\[1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0,vgx4\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.s\[W8,0,VGx4\],{Z0\.h-Z3\.h},Z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.S\[W8,0,VGX4\],{Z0\.H-Z3\.H},Z0\.H\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w11,0\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,7\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z28\.h-z31\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z0\.h-z3\.h},z15\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z0\.h-z3\.h},z0\.h\[3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w9,1\],{z4\.h-z7\.h},z10\.h\[2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0,vgx2\],{z0\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.s\[W8,0,VGx2\],{Z0\.h-Z1\.h},Z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.S\[W8,0,VGX2\],{Z0\.H-Z1\.H},Z0\.H'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w11,0\],{z0\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,7\],{z0\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z30\.h-z31\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z31\.h,z0\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z31\.h-z0\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z0\.h-z1\.h},z15\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w9,3\],{z21\.h-z22\.h},z9\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z0\.h-z3\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0,vgx4\],{z0\.h-z3\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.s\[W8,0,VGx4\],{Z0\.h-Z3\.h},Z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.S\[W8,0,VGX4\],{Z0\.H-Z3\.H},Z0\.H'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w11,0\],{z0\.h-z3\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,7\],{z0\.h-z3\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z28\.h-z31\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z30\.h,z31\.h,z0\.h,z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z30\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z31\.h,z0\.h,z1\.h,z2\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z31\.h-z2\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z0\.h-z3\.h},z15\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w10,5\],{z17\.h-z20\.h},z3\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0,vgx2\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.s\[W8,0,VGx2\],{Z0\.h-Z1\.h},{Z0\.h-Z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.S\[W8,0,VGX2\],{Z0\.H-Z1\.H},{Z0\.H-Z1\.H}'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w11,0\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,7\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z30\.h-z31\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z0\.h-z1\.h},{z30\.h-z31\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w10,1\],{z22\.h-z23\.h},{z18\.h-z19\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0,vgx4\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.s\[W8,0,VGx4\],{Z0\.h-Z3\.h},{Z0\.h-Z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.S\[W8,0,VGX4\],{Z0\.H-Z3\.H},{Z0\.H-Z3\.H}'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w11,0\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,7\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z28\.h-z31\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z0\.h-z3\.h},{z28\.h-z31\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w11,3\],{z16\.h-z19\.h},{z24\.h-z27\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z0\.b-z1\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0,vgx2\],{z0\.b-z1\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.s\[W8,0,VGx2\],{Z0\.b-Z1\.b},Z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.S\[W8,0,VGX2\],{Z0\.B-Z1\.B},Z0\.B\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w11,0\],{z0\.b-z1\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,7\],{z0\.b-z1\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z30\.b-z31\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z0\.b-z1\.b},z15\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z0\.b-z1\.b},z0\.b\[3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w10,2\],{z14\.b-z15\.b},z13\.b\[1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z0\.b-z3\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0,vgx4\],{z0\.b-z3\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.s\[W8,0,VGx4\],{Z0\.b-Z3\.b},Z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.S\[W8,0,VGX4\],{Z0\.B-Z3\.B},Z0\.B\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w11,0\],{z0\.b-z3\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,7\],{z0\.b-z3\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z28\.b-z31\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z0\.b-z3\.b},z15\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z0\.b-z3\.b},z0\.b\[3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w9,1\],{z4\.b-z7\.b},z10\.b\[2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z0\.b-z1\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0,vgx2\],{z0\.b-z1\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.s\[W8,0,VGx2\],{Z0\.b-Z1\.b},Z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.S\[W8,0,VGX2\],{Z0\.B-Z1\.B},Z0\.B'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w11,0\],{z0\.b-z1\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,7\],{z0\.b-z1\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z30\.b-z31\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z31\.b,z0\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z31\.b-z0\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z0\.b-z1\.b},z15\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w9,3\],{z21\.b-z22\.b},z9\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z0\.b-z3\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0,vgx4\],{z0\.b-z3\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.s\[W8,0,VGx4\],{Z0\.b-Z3\.b},Z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.S\[W8,0,VGX4\],{Z0\.B-Z3\.B},Z0\.B'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w11,0\],{z0\.b-z3\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,7\],{z0\.b-z3\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z28\.b-z31\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z30\.b,z31\.b,z0\.b,z1\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z30\.b-z1\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z31\.b,z0\.b,z1\.b,z2\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z31\.b-z2\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z0\.b-z3\.b},z15\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w10,5\],{z17\.b-z20\.b},z3\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0,vgx2\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.s\[W8,0,VGx2\],{Z0\.b-Z1\.b},{Z0\.b-Z1\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.S\[W8,0,VGX2\],{Z0\.B-Z1\.B},{Z0\.B-Z1\.B}'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w11,0\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,7\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z30\.b-z31\.b},{z0\.b-z1\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z0\.b-z1\.b},{z30\.b-z31\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w10,1\],{z22\.b-z23\.b},{z18\.b-z19\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0,vgx4\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.s\[W8,0,VGx4\],{Z0\.b-Z3\.b},{Z0\.b-Z3\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.S\[W8,0,VGX4\],{Z0\.B-Z3\.B},{Z0\.B-Z3\.B}'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w11,0\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,7\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z28\.b-z31\.b},{z0\.b-z3\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z0\.b-z3\.b},{z28\.b-z31\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w11,3\],{z16\.b-z19\.b},{z24\.b-z27\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0,vgx2\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.s\[W8,0,VGx2\],{ ?Z0\.h ?- ?Z1\.h ?},Z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.S\[W8,0,VGX2\],{ ?Z0\.H ?- ?Z1\.H ?},Z0\.H\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w11,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,7\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{ ?z30\.h ?- ?z31\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w10,2\],{ ?z14\.h ?- ?z15\.h ?},z13\.h\[1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0,vgx4\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.s\[W8,0,VGx4\],{ ?Z0\.h ?- ?Z3\.h ?},Z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.S\[W8,0,VGX4\],{ ?Z0\.H ?- ?Z3\.H ?},Z0\.H\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w11,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,7\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{ ?z28\.h ?- ?z31\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w9,1\],{ ?z4\.h ?- ?z7\.h ?},z10\.h\[2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0,vgx2\],{ ?z0\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.s\[W8,0,VGx2\],{ ?Z0\.h ?- ?Z1\.h ?},Z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.S\[W8,0,VGX2\],{ ?Z0\.H ?- ?Z1\.H ?},Z0\.H'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w11,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,7\],{ ?z0\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{ ?z30\.h ?- ?z31\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{ ?z31\.h,z0\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{ ?z31\.h ?- ?z0\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w9,3\],{ ?z21\.h ?- ?z22\.h ?},z9\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0,vgx4\],{ ?z0\.h ?- ?z3\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.s\[W8,0,VGx4\],{ ?Z0\.h ?- ?Z3\.h ?},Z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.S\[W8,0,VGX4\],{ ?Z0\.H ?- ?Z3\.H ?},Z0\.H'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w11,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,7\],{ ?z0\.h ?- ?z3\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{ ?z28\.h ?- ?z31\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{ ?z30\.h,z31\.h,z0\.h,z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{ ?z30\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{ ?z31\.h,z0\.h,z1\.h,z2\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{ ?z31\.h ?- ?z2\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w10,5\],{ ?z17\.h ?- ?z20\.h ?},z3\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0,vgx2\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.s\[W8,0,VGx2\],{ ?Z0\.h ?- ?Z1\.h ?},{ ?Z0\.h ?- ?Z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.S\[W8,0,VGX2\],{ ?Z0\.H ?- ?Z1\.H ?},{ ?Z0\.H ?- ?Z1\.H ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w11,0\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,7\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{ ?z30\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},{ ?z30\.h ?- ?z31\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w10,1\],{ ?z22\.h ?- ?z23\.h ?},{ ?z18\.h ?- ?z19\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0,vgx4\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.s\[W8,0,VGx4\],{ ?Z0\.h ?- ?Z3\.h ?},{ ?Z0\.h ?- ?Z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.S\[W8,0,VGX4\],{ ?Z0\.H ?- ?Z3\.H ?},{ ?Z0\.H ?- ?Z3\.H ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w11,0\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,7\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{ ?z28\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},{ ?z28\.h ?- ?z31\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w11,3\],{ ?z16\.h ?- ?z19\.h ?},{ ?z24\.h ?- ?z27\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0,vgx2\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.s\[W8,0,VGx2\],{ ?Z0\.b ?- ?Z1\.b ?},Z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.S\[W8,0,VGX2\],{ ?Z0\.B ?- ?Z1\.B ?},Z0\.B\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w11,0\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,7\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{ ?z30\.b ?- ?z31\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{ ?z0\.b ?- ?z1\.b ?},z15\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w10,2\],{ ?z14\.b ?- ?z15\.b ?},z13\.b\[1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0,vgx4\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.s\[W8,0,VGx4\],{ ?Z0\.b ?- ?Z3\.b ?},Z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.S\[W8,0,VGX4\],{ ?Z0\.B ?- ?Z3\.B ?},Z0\.B\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w11,0\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,7\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{ ?z28\.b ?- ?z31\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{ ?z0\.b ?- ?z3\.b ?},z15\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w9,1\],{ ?z4\.b ?- ?z7\.b ?},z10\.b\[2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{ ?z0\.b ?- ?z1\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0,vgx2\],{ ?z0\.b ?- ?z1\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.s\[W8,0,VGx2\],{ ?Z0\.b ?- ?Z1\.b ?},Z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.S\[W8,0,VGX2\],{ ?Z0\.B ?- ?Z1\.B ?},Z0\.B'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w11,0\],{ ?z0\.b ?- ?z1\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,7\],{ ?z0\.b ?- ?z1\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{ ?z30\.b ?- ?z31\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{ ?z31\.b,z0\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{ ?z31\.b ?- ?z0\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{ ?z0\.b ?- ?z1\.b ?},z15\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w9,3\],{ ?z21\.b ?- ?z22\.b ?},z9\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{ ?z0\.b ?- ?z3\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0,vgx4\],{ ?z0\.b ?- ?z3\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.s\[W8,0,VGx4\],{ ?Z0\.b ?- ?Z3\.b ?},Z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.S\[W8,0,VGX4\],{ ?Z0\.B ?- ?Z3\.B ?},Z0\.B'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w11,0\],{ ?z0\.b ?- ?z3\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,7\],{ ?z0\.b ?- ?z3\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{ ?z28\.b ?- ?z31\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{ ?z30\.b,z31\.b,z0\.b,z1\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{ ?z30\.b ?- ?z1\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{ ?z31\.b,z0\.b,z1\.b,z2\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{ ?z31\.b ?- ?z2\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{ ?z0\.b ?- ?z3\.b ?},z15\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w10,5\],{ ?z17\.b ?- ?z20\.b ?},z3\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0,vgx2\],{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.s\[W8,0,VGx2\],{ ?Z0\.b ?- ?Z1\.b ?},{ ?Z0\.b ?- ?Z1\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.S\[W8,0,VGX2\],{ ?Z0\.B ?- ?Z1\.B ?},{ ?Z0\.B ?- ?Z1\.B ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w11,0\],{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,7\],{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{ ?z30\.b ?- ?z31\.b ?},{ ?z0\.b ?- ?z1\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{ ?z0\.b ?- ?z1\.b ?},{ ?z30\.b ?- ?z31\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w10,1\],{ ?z22\.b ?- ?z23\.b ?},{ ?z18\.b ?- ?z19\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{ ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0,vgx4\],{ ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.s\[W8,0,VGx4\],{ ?Z0\.b ?- ?Z3\.b ?},{ ?Z0\.b ?- ?Z3\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.S\[W8,0,VGX4\],{ ?Z0\.B ?- ?Z3\.B ?},{ ?Z0\.B ?- ?Z3\.B ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w11,0\],{ ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,7\],{ ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{ ?z28\.b ?- ?z31\.b ?},{ ?z0\.b ?- ?z3\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{ ?z0\.b ?- ?z3\.b ?},{ ?z28\.b ?- ?z31\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w11,3\],{ ?z16\.b ?- ?z19\.b ?},{ ?z24\.b ?- ?z27\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0,vgx2\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.s\[W8,0,VGx2\],{ ?Z0\.h ?- ?Z1\.h ?},Z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.S\[W8,0,VGX2\],{ ?Z0\.H ?- ?Z1\.H ?},Z0\.H\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w11,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,7\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{ ?z30\.h ?- ?z31\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w10,2\],{ ?z14\.h ?- ?z15\.h ?},z13\.h\[1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0,vgx4\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.s\[W8,0,VGx4\],{ ?Z0\.h ?- ?Z3\.h ?},Z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.S\[W8,0,VGX4\],{ ?Z0\.H ?- ?Z3\.H ?},Z0\.H\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w11,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,7\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{ ?z28\.h ?- ?z31\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w9,1\],{ ?z4\.h ?- ?z7\.h ?},z10\.h\[2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0,vgx2\],{ ?z0\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.s\[W8,0,VGx2\],{ ?Z0\.h ?- ?Z1\.h ?},Z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.S\[W8,0,VGX2\],{ ?Z0\.H ?- ?Z1\.H ?},Z0\.H'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w11,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,7\],{ ?z0\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{ ?z30\.h ?- ?z31\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{ ?z31\.h,z0\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{ ?z31\.h ?- ?z0\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w9,3\],{ ?z21\.h ?- ?z22\.h ?},z9\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0,vgx4\],{ ?z0\.h ?- ?z3\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.s\[W8,0,VGx4\],{ ?Z0\.h ?- ?Z3\.h ?},Z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.S\[W8,0,VGX4\],{ ?Z0\.H ?- ?Z3\.H ?},Z0\.H'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w11,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,7\],{ ?z0\.h ?- ?z3\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{ ?z28\.h ?- ?z31\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{ ?z30\.h,z31\.h,z0\.h,z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{ ?z30\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{ ?z31\.h,z0\.h,z1\.h,z2\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{ ?z31\.h ?- ?z2\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w10,5\],{ ?z17\.h ?- ?z20\.h ?},z3\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0,vgx2\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.s\[W8,0,VGx2\],{ ?Z0\.h ?- ?Z1\.h ?},{ ?Z0\.h ?- ?Z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.S\[W8,0,VGX2\],{ ?Z0\.H ?- ?Z1\.H ?},{ ?Z0\.H ?- ?Z1\.H ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w11,0\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,7\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{ ?z30\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},{ ?z30\.h ?- ?z31\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w10,1\],{ ?z22\.h ?- ?z23\.h ?},{ ?z18\.h ?- ?z19\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0,vgx4\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.s\[W8,0,VGx4\],{ ?Z0\.h ?- ?Z3\.h ?},{ ?Z0\.h ?- ?Z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.S\[W8,0,VGX4\],{ ?Z0\.H ?- ?Z3\.H ?},{ ?Z0\.H ?- ?Z3\.H ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w11,0\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,7\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{ ?z28\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},{ ?z28\.h ?- ?z31\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w11,3\],{ ?z16\.h ?- ?z19\.h ?},{ ?z24\.h ?- ?z27\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0,vgx2\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.s\[W8,0,VGx2\],{ ?Z0\.b ?- ?Z1\.b ?},Z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.S\[W8,0,VGX2\],{ ?Z0\.B ?- ?Z1\.B ?},Z0\.B\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w11,0\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,7\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{ ?z30\.b ?- ?z31\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{ ?z0\.b ?- ?z1\.b ?},z15\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w10,2\],{ ?z14\.b ?- ?z15\.b ?},z13\.b\[1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0,vgx4\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.s\[W8,0,VGx4\],{ ?Z0\.b ?- ?Z3\.b ?},Z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.S\[W8,0,VGX4\],{ ?Z0\.B ?- ?Z3\.B ?},Z0\.B\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w11,0\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,7\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{ ?z28\.b ?- ?z31\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{ ?z0\.b ?- ?z3\.b ?},z15\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w9,1\],{ ?z4\.b ?- ?z7\.b ?},z10\.b\[2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{ ?z0\.b ?- ?z1\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0,vgx2\],{ ?z0\.b ?- ?z1\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.s\[W8,0,VGx2\],{ ?Z0\.b ?- ?Z1\.b ?},Z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.S\[W8,0,VGX2\],{ ?Z0\.B ?- ?Z1\.B ?},Z0\.B'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w11,0\],{ ?z0\.b ?- ?z1\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,7\],{ ?z0\.b ?- ?z1\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{ ?z30\.b ?- ?z31\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{ ?z31\.b,z0\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{ ?z31\.b ?- ?z0\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{ ?z0\.b ?- ?z1\.b ?},z15\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w9,3\],{ ?z21\.b ?- ?z22\.b ?},z9\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{ ?z0\.b ?- ?z3\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0,vgx4\],{ ?z0\.b ?- ?z3\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.s\[W8,0,VGx4\],{ ?Z0\.b ?- ?Z3\.b ?},Z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.S\[W8,0,VGX4\],{ ?Z0\.B ?- ?Z3\.B ?},Z0\.B'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w11,0\],{ ?z0\.b ?- ?z3\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,7\],{ ?z0\.b ?- ?z3\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{ ?z28\.b ?- ?z31\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{ ?z30\.b,z31\.b,z0\.b,z1\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{ ?z30\.b ?- ?z1\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{ ?z31\.b,z0\.b,z1\.b,z2\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{ ?z31\.b ?- ?z2\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{ ?z0\.b ?- ?z3\.b ?},z15\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w10,5\],{ ?z17\.b ?- ?z20\.b ?},z3\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0,vgx2\],{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.s\[W8,0,VGx2\],{ ?Z0\.b ?- ?Z1\.b ?},{ ?Z0\.b ?- ?Z1\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.S\[W8,0,VGX2\],{ ?Z0\.B ?- ?Z1\.B ?},{ ?Z0\.B ?- ?Z1\.B ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w11,0\],{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,7\],{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{ ?z30\.b ?- ?z31\.b ?},{ ?z0\.b ?- ?z1\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{ ?z0\.b ?- ?z1\.b ?},{ ?z30\.b ?- ?z31\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w10,1\],{ ?z22\.b ?- ?z23\.b ?},{ ?z18\.b ?- ?z19\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{ ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0,vgx4\],{ ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.s\[W8,0,VGx4\],{ ?Z0\.b ?- ?Z3\.b ?},{ ?Z0\.b ?- ?Z3\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.S\[W8,0,VGX4\],{ ?Z0\.B ?- ?Z3\.B ?},{ ?Z0\.B ?- ?Z3\.B ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w11,0\],{ ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,7\],{ ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{ ?z28\.b ?- ?z31\.b ?},{ ?z0\.b ?- ?z3\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{ ?z0\.b ?- ?z3\.b ?},{ ?z28\.b ?- ?z31\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w11,3\],{ ?z16\.b ?- ?z19\.b ?},{ ?z24\.b ?- ?z27\.b ?}'
diff --git a/gas/testsuite/gas/aarch64/sme2-17-invalid.l b/gas/testsuite/gas/aarch64/sme2-17-invalid.l
index b1f5923..e247fb5 100644
--- a/gas/testsuite/gas/aarch64/sme2-17-invalid.l
+++ b/gas/testsuite/gas/aarch64/sme2-17-invalid.l
@@ -1,20 +1,20 @@
 [^ :]+: Assembler messages:
-[^ :]+:[0-9]+: Error: expected a register at operand 1 -- `sudot 0,{z0\.b-z1\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: expected a register at operand 1 -- `sudot 0,{ ?z0\.b ?- ?z1\.b ?},z0\.b\[0\]'
 [^ :]+:[0-9]+: Error: expected '{' at operand 2 -- `sudot za\.s\[w8,0\],0,z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `sudot za\.s\[w8,0\],{z0\.b-z1\.b},0'
-[^ :]+:[0-9]+: Error: operand mismatch -- `sudot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `sudot za\.s\[w8,0\],{ ?z0\.b ?- ?z1\.b ?},0'
+[^ :]+:[0-9]+: Error: operand mismatch -- `sudot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	sudot za\.s\[w8, 0\], {z0\.b-z1\.b}, z0\.b\[0\]
-[^ :]+:[0-9]+: Error: operand mismatch -- `sudot za\.s\[w8,0\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `sudot za\.s\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	sudot za\.s\[w8, 0\], {z0\.b-z3\.b}, z0\.b\[0\]
-[^ :]+:[0-9]+: Error: operand mismatch -- `sudot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: operand mismatch -- `sudot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	sudot za\.s\[w8, 0\], {z0\.b-z1\.b}, z0\.b
-[^ :]+:[0-9]+: Error: operand mismatch -- `sudot za\.s\[w8,0\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: operand mismatch -- `sudot za\.s\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	sudot za\.s\[w8, 0\], {z0\.b-z3\.b}, z0\.b
-[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `sudot za\.s\[w8,0\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `sudot za\.s\[w8,0\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `sudot za\.s\[w8,0\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
-[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `sudot za\.s\[w8,0\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `sudot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `sudot za\.s\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `sudot za\.s\[w8,0\],{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?}'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `sudot za\.s\[w8,0\],{ ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?}'
diff --git a/gas/testsuite/gas/aarch64/sme2-17-noarch.l b/gas/testsuite/gas/aarch64/sme2-17-noarch.l
index f3f2f53..14c51ae 100644
--- a/gas/testsuite/gas/aarch64/sme2-17-noarch.l
+++ b/gas/testsuite/gas/aarch64/sme2-17-noarch.l
@@ -1,45 +1,45 @@
 [^ :]+: Assembler messages:
-[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{z0\.b-z1\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0,vgx2\],{z0\.b-z1\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `sudot ZA\.s\[W8,0,VGx2\],{Z0\.b-Z1\.b},Z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `sudot ZA\.S\[W8,0,VGX2\],{Z0\.B-Z1\.B},Z0\.B\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w11,0\],{z0\.b-z1\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,7\],{z0\.b-z1\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{z30\.b-z31\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{z0\.b-z1\.b},z15\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{z0\.b-z1\.b},z0\.b\[3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w10,2\],{z14\.b-z15\.b},z13\.b\[1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{z0\.b-z3\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0,vgx4\],{z0\.b-z3\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `sudot ZA\.s\[W8,0,VGx4\],{Z0\.b-Z3\.b},Z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `sudot ZA\.S\[W8,0,VGX4\],{Z0\.B-Z3\.B},Z0\.B\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w11,0\],{z0\.b-z3\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,7\],{z0\.b-z3\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{z28\.b-z31\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{z0\.b-z3\.b},z15\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{z0\.b-z3\.b},z0\.b\[3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w9,1\],{z4\.b-z7\.b},z10\.b\[2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{z0\.b-z1\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0,vgx2\],{z0\.b-z1\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `sudot ZA\.s\[W8,0,VGx2\],{Z0\.b-Z1\.b},Z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `sudot ZA\.S\[W8,0,VGX2\],{Z0\.B-Z1\.B},Z0\.B'
-[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w11,0\],{z0\.b-z1\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,7\],{z0\.b-z1\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{z30\.b-z31\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{z31\.b,z0\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{z31\.b-z0\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{z0\.b-z1\.b},z15\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w9,3\],{z21\.b-z22\.b},z9\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{z0\.b-z3\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0,vgx4\],{z0\.b-z3\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `sudot ZA\.s\[W8,0,VGx4\],{Z0\.b-Z3\.b},Z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `sudot ZA\.S\[W8,0,VGX4\],{Z0\.B-Z3\.B},Z0\.B'
-[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w11,0\],{z0\.b-z3\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,7\],{z0\.b-z3\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{z28\.b-z31\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{z30\.b,z31\.b,z0\.b,z1\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{z30\.b-z1\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{z31\.b,z0\.b,z1\.b,z2\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{z31\.b-z2\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{z0\.b-z3\.b},z15\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w10,5\],{z17\.b-z20\.b},z3\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0,vgx2\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot ZA\.s\[W8,0,VGx2\],{ ?Z0\.b ?- ?Z1\.b ?},Z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot ZA\.S\[W8,0,VGX2\],{ ?Z0\.B ?- ?Z1\.B ?},Z0\.B\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w11,0\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,7\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{ ?z30\.b ?- ?z31\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{ ?z0\.b ?- ?z1\.b ?},z15\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w10,2\],{ ?z14\.b ?- ?z15\.b ?},z13\.b\[1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0,vgx4\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot ZA\.s\[W8,0,VGx4\],{ ?Z0\.b ?- ?Z3\.b ?},Z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot ZA\.S\[W8,0,VGX4\],{ ?Z0\.B ?- ?Z3\.B ?},Z0\.B\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w11,0\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,7\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{ ?z28\.b ?- ?z31\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{ ?z0\.b ?- ?z3\.b ?},z15\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w9,1\],{ ?z4\.b ?- ?z7\.b ?},z10\.b\[2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{ ?z0\.b ?- ?z1\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0,vgx2\],{ ?z0\.b ?- ?z1\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot ZA\.s\[W8,0,VGx2\],{ ?Z0\.b ?- ?Z1\.b ?},Z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot ZA\.S\[W8,0,VGX2\],{ ?Z0\.B ?- ?Z1\.B ?},Z0\.B'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w11,0\],{ ?z0\.b ?- ?z1\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,7\],{ ?z0\.b ?- ?z1\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{ ?z30\.b ?- ?z31\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{ ?z31\.b,z0\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{ ?z31\.b ?- ?z0\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{ ?z0\.b ?- ?z1\.b ?},z15\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w9,3\],{ ?z21\.b ?- ?z22\.b ?},z9\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{ ?z0\.b ?- ?z3\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0,vgx4\],{ ?z0\.b ?- ?z3\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot ZA\.s\[W8,0,VGx4\],{ ?Z0\.b ?- ?Z3\.b ?},Z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot ZA\.S\[W8,0,VGX4\],{ ?Z0\.B ?- ?Z3\.B ?},Z0\.B'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w11,0\],{ ?z0\.b ?- ?z3\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,7\],{ ?z0\.b ?- ?z3\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{ ?z28\.b ?- ?z31\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{ ?z30\.b,z31\.b,z0\.b,z1\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{ ?z30\.b ?- ?z1\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{ ?z31\.b,z0\.b,z1\.b,z2\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{ ?z31\.b ?- ?z2\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{ ?z0\.b ?- ?z3\.b ?},z15\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w10,5\],{ ?z17\.b ?- ?z20\.b ?},z3\.b'
diff --git a/gas/testsuite/gas/aarch64/sme2-18-invalid.l b/gas/testsuite/gas/aarch64/sme2-18-invalid.l
index ea824cb..a4a9487 100644
--- a/gas/testsuite/gas/aarch64/sme2-18-invalid.l
+++ b/gas/testsuite/gas/aarch64/sme2-18-invalid.l
@@ -1,21 +1,21 @@
 [^ :]+: Assembler messages:
-[^ :]+:[0-9]+: Error: expected a ZA array vector at operand 1 -- `bfvdot 0,{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a ZA array vector at operand 1 -- `bfvdot 0,{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
 [^ :]+:[0-9]+: Error: expected '{' at operand 2 -- `bfvdot za\.s\[w8,0\],0,z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `bfvdot za\.s\[w8,0\],{z0\.h-z1\.h},0'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `bfvdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},0'
 [^ :]+:[0-9]+: Error: missing braces at operand 2 -- `fvdot za\.h\[w8,0\],z0\.h,z0\.h'
-[^ :]+:[0-9]+: Error: operand 3 must be an indexed SVE vector register -- `fvdot za\.h\[w8,0\],{z0\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: operand mismatch -- `fvdot za\.s\[w8,0\],{z0\.b-z1\.h},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: operand 3 must be an indexed SVE vector register -- `fvdot za\.h\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: operand mismatch -- `fvdot za\.s\[w8,0\],{ ?z0\.b ?- ?z1\.h ?},z0\.b\[0\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	fvdot za\.h\[w8, 0\], {z0\.b-z1\.b}, z0\.b\[0\]
-[^ :]+:[0-9]+: Error: expected a single offset rather than a range at operand 1 -- `fvdot za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: operand 1 must have a vector group size of 2 -- `fvdot za\.s\[w8,0,vgx4\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fvdot za\.s\[w7,0\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fvdot za\.s\[w12,0\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fvdot za\.s\[w8,-1\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fvdot za\.s\[w8,8\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `fvdot za\.s\[w8,0\],{z0\.h-z2\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `fvdot za\.s\[w8,0\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fvdot za\.s\[w8,0\],{z1\.h-z2\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `fvdot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h\[-1\]'
-[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `fvdot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h\[4\]'
-[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `fvdot za\.s\[w8,0\],{z0\.h-z1\.h},z16\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a single offset rather than a range at operand 1 -- `fvdot za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: operand 1 must have a vector group size of 2 -- `fvdot za\.s\[w8,0,vgx4\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fvdot za\.s\[w7,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fvdot za\.s\[w12,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fvdot za\.s\[w8,-1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fvdot za\.s\[w8,8\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `fvdot za\.s\[w8,0\],{ ?z0\.h ?- ?z2\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `fvdot za\.s\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fvdot za\.s\[w8,0\],{ ?z1\.h ?- ?z2\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `fvdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[-1\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `fvdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[4\]'
+[^ :]+:[0-9]+: Error: z0 ?- ?z15 expected at operand 3 -- `fvdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z16\.h\[0\]'
diff --git a/gas/testsuite/gas/aarch64/sme2-18-noarch.l b/gas/testsuite/gas/aarch64/sme2-18-noarch.l
index 525e395..e9ebbec 100644
--- a/gas/testsuite/gas/aarch64/sme2-18-noarch.l
+++ b/gas/testsuite/gas/aarch64/sme2-18-noarch.l
@@ -1,21 +1,21 @@
 [^ :]+: Assembler messages:
-[^ :]+:[0-9]+: Error: selected processor does not support `bfvdot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfvdot za\.s\[w8,0,vgx2\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfvdot ZA\.s\[W8,0,VGx2\],{Z0\.h-Z1\.h},Z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfvdot ZA\.S\[W8,0,VGX2\],{Z0\.H-Z1\.H},Z0\.H\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfvdot za\.s\[w11,0\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfvdot za\.s\[w8,7\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfvdot za\.s\[w8,0\],{z30\.h-z31\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfvdot za\.s\[w8,0\],{z0\.h-z1\.h},z15\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfvdot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h\[3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfvdot za\.s\[w10,2\],{z14\.h-z15\.h},z13\.h\[1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fvdot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fvdot za\.s\[w8,0,vgx2\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fvdot ZA\.s\[W8,0,VGx2\],{Z0\.h-Z1\.h},Z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fvdot ZA\.S\[W8,0,VGX2\],{Z0\.H-Z1\.H},Z0\.H\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fvdot za\.s\[w11,0\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fvdot za\.s\[w8,7\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fvdot za\.s\[w8,0\],{z30\.h-z31\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fvdot za\.s\[w8,0\],{z0\.h-z1\.h},z15\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fvdot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h\[3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fvdot za\.s\[w10,2\],{z14\.h-z15\.h},z13\.h\[1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfvdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfvdot za\.s\[w8,0,vgx2\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfvdot ZA\.s\[W8,0,VGx2\],{ ?Z0\.h ?- ?Z1\.h ?},Z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfvdot ZA\.S\[W8,0,VGX2\],{ ?Z0\.H ?- ?Z1\.H ?},Z0\.H\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfvdot za\.s\[w11,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfvdot za\.s\[w8,7\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfvdot za\.s\[w8,0\],{ ?z30\.h ?- ?z31\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfvdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfvdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfvdot za\.s\[w10,2\],{ ?z14\.h ?- ?z15\.h ?},z13\.h\[1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fvdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fvdot za\.s\[w8,0,vgx2\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fvdot ZA\.s\[W8,0,VGx2\],{ ?Z0\.h ?- ?Z1\.h ?},Z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fvdot ZA\.S\[W8,0,VGX2\],{ ?Z0\.H ?- ?Z1\.H ?},Z0\.H\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fvdot za\.s\[w11,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fvdot za\.s\[w8,7\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fvdot za\.s\[w8,0\],{ ?z30\.h ?- ?z31\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fvdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fvdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fvdot za\.s\[w10,2\],{ ?z14\.h ?- ?z15\.h ?},z13\.h\[1\]'
diff --git a/gas/testsuite/gas/aarch64/sme2-19-invalid.l b/gas/testsuite/gas/aarch64/sme2-19-invalid.l
index 936e6f5..0f62e4c 100644
--- a/gas/testsuite/gas/aarch64/sme2-19-invalid.l
+++ b/gas/testsuite/gas/aarch64/sme2-19-invalid.l
@@ -1,36 +1,36 @@
 [^ :]+: Assembler messages:
-[^ :]+:[0-9]+: Error: expected a ZA array vector at operand 1 -- `svdot 0,{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a ZA array vector at operand 1 -- `svdot 0,{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
 [^ :]+:[0-9]+: Error: expected '{' at operand 2 -- `svdot za\.s\[w8,0\],0,z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `svdot za\.s\[w8,0\],{z0\.h-z1\.h},0'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `svdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},0'
 [^ :]+:[0-9]+: Error: missing braces at operand 2 -- `svdot za\.h\[w8,0\],z0\.h,z0\.h'
-[^ :]+:[0-9]+: Error: operand 3 must be an indexed SVE vector register -- `svdot za\.h\[w8,0\],{z0\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: expected a single offset rather than a range at operand 1 -- `svdot za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: operand 1 must have a vector group size of 2 -- `svdot za\.s\[w8,0,vgx4\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `svdot za\.s\[w7,0\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `svdot za\.s\[w12,0\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `svdot za\.s\[w8,-1\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `svdot za\.s\[w8,8\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `svdot za\.s\[w8,0\],{z0\.h-z2\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `svdot za\.s\[w8,0\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `svdot za\.s\[w8,0\],{z1\.h-z2\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `svdot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h\[-1\]'
-[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `svdot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h\[4\]'
-[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `svdot za\.s\[w8,0\],{z0\.h-z1\.h},z16\.h\[0\]'
-[^ :]+:[0-9]+: Error: operand mismatch -- `svdot za\.s\[w8,0:1\],{z0\.b-z3\.b},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: operand 3 must be an indexed SVE vector register -- `svdot za\.h\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: expected a single offset rather than a range at operand 1 -- `svdot za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: operand 1 must have a vector group size of 2 -- `svdot za\.s\[w8,0,vgx4\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `svdot za\.s\[w7,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `svdot za\.s\[w12,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `svdot za\.s\[w8,-1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `svdot za\.s\[w8,8\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `svdot za\.s\[w8,0\],{ ?z0\.h ?- ?z2\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `svdot za\.s\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `svdot za\.s\[w8,0\],{ ?z1\.h ?- ?z2\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `svdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[-1\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `svdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[4\]'
+[^ :]+:[0-9]+: Error: z0 ?- ?z15 expected at operand 3 -- `svdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z16\.h\[0\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `svdot za\.s\[w8,0:1\],{ ?z0\.b ?- ?z3\.b ?},z0\.h\[0\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	svdot za\.s\[w8, 0:1\], {z0\.b-z3\.b}, z0\.b\[0\]
-[^ :]+:[0-9]+: Error: operand mismatch -- `svdot za\.s\[w8,0,vgx4\],{z0\.b-z3\.b},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `svdot za\.s\[w8,0,vgx4\],{ ?z0\.b ?- ?z3\.b ?},z0\.h\[0\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	svdot za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
-[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `svdot za\.s\[w7,0\],{z0\.b-z3\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `svdot za\.s\[w12,0\],{z0\.b-z3\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `svdot za\.s\[w8,-1\],{z0\.b-z3\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `svdot za\.s\[w8,8\],{z0\.b-z3\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `svdot za\.s\[w8,0\],{z0\.b-z1\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `svdot za\.s\[w8,0\],{z0\.b-z2\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `svdot za\.s\[w8,0\],{z1\.b-z4\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `svdot za\.s\[w8,0\],{z2\.b-z5\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `svdot za\.s\[w8,0\],{z3\.b-z6\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `svdot za\.s\[w8,0\],{z0\.b-z3\.b},z0\.b\[-1\]'
-[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `svdot za\.s\[w8,0\],{z0\.b-z3\.b},z0\.b\[4\]'
-[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `svdot za\.s\[w8,0\],{z0\.b-z3\.b},z16\.b\[0\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `svdot za\.s\[w7,0\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `svdot za\.s\[w12,0\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `svdot za\.s\[w8,-1\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `svdot za\.s\[w8,8\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `svdot za\.s\[w8,0\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `svdot za\.s\[w8,0\],{ ?z0\.b ?- ?z2\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `svdot za\.s\[w8,0\],{ ?z1\.b ?- ?z4\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `svdot za\.s\[w8,0\],{ ?z2\.b ?- ?z5\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `svdot za\.s\[w8,0\],{ ?z3\.b ?- ?z6\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `svdot za\.s\[w8,0\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[-1\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `svdot za\.s\[w8,0\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[4\]'
+[^ :]+:[0-9]+: Error: z0 ?- ?z15 expected at operand 3 -- `svdot za\.s\[w8,0\],{ ?z0\.b ?- ?z3\.b ?},z16\.b\[0\]'
diff --git a/gas/testsuite/gas/aarch64/sme2-19-noarch.l b/gas/testsuite/gas/aarch64/sme2-19-noarch.l
index c4d760e..7a57070 100644
--- a/gas/testsuite/gas/aarch64/sme2-19-noarch.l
+++ b/gas/testsuite/gas/aarch64/sme2-19-noarch.l
@@ -1,41 +1,41 @@
 [^ :]+: Assembler messages:
-[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.s\[w8,0,vgx2\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `svdot ZA\.s\[W8,0,VGx2\],{Z0\.h-Z1\.h},Z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `svdot ZA\.S\[W8,0,VGX2\],{Z0\.H-Z1\.H},Z0\.H\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.s\[w11,0\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.s\[w8,7\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.s\[w8,0\],{z30\.h-z31\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.s\[w8,0\],{z0\.h-z1\.h},z15\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h\[3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.s\[w10,2\],{z14\.h-z15\.h},z13\.h\[1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.s\[w8,0\],{z0\.b-z3\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.s\[w8,0,vgx4\],{z0\.b-z3\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `svdot ZA\.s\[W8,0,VGx4\],{Z0\.b-Z3\.b},Z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `svdot ZA\.S\[W8,0,VGX4\],{Z0\.B-Z3\.B},Z0\.B\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.s\[w11,0\],{z0\.b-z3\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.s\[w8,7\],{z0\.b-z3\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.s\[w8,0\],{z28\.b-z31\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.s\[w8,0\],{z0\.b-z3\.b},z15\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.s\[w8,0\],{z0\.b-z3\.b},z0\.b\[3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.s\[w9,1\],{z4\.b-z7\.b},z10\.b\[2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.s\[w8,0,vgx2\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `uvdot ZA\.s\[W8,0,VGx2\],{Z0\.h-Z1\.h},Z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `uvdot ZA\.S\[W8,0,VGX2\],{Z0\.H-Z1\.H},Z0\.H\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.s\[w11,0\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.s\[w8,7\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.s\[w8,0\],{z30\.h-z31\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.s\[w8,0\],{z0\.h-z1\.h},z15\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h\[3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.s\[w10,2\],{z14\.h-z15\.h},z13\.h\[1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.s\[w8,0\],{z0\.b-z3\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.s\[w8,0,vgx4\],{z0\.b-z3\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `uvdot ZA\.s\[W8,0,VGx4\],{Z0\.b-Z3\.b},Z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `uvdot ZA\.S\[W8,0,VGX4\],{Z0\.B-Z3\.B},Z0\.B\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.s\[w11,0\],{z0\.b-z3\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.s\[w8,7\],{z0\.b-z3\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.s\[w8,0\],{z28\.b-z31\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.s\[w8,0\],{z0\.b-z3\.b},z15\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.s\[w8,0\],{z0\.b-z3\.b},z0\.b\[3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.s\[w9,1\],{z4\.b-z7\.b},z10\.b\[2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.s\[w8,0,vgx2\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `svdot ZA\.s\[W8,0,VGx2\],{ ?Z0\.h ?- ?Z1\.h ?},Z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `svdot ZA\.S\[W8,0,VGX2\],{ ?Z0\.H ?- ?Z1\.H ?},Z0\.H\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.s\[w11,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.s\[w8,7\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.s\[w8,0\],{ ?z30\.h ?- ?z31\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.s\[w10,2\],{ ?z14\.h ?- ?z15\.h ?},z13\.h\[1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.s\[w8,0\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.s\[w8,0,vgx4\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `svdot ZA\.s\[W8,0,VGx4\],{ ?Z0\.b ?- ?Z3\.b ?},Z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `svdot ZA\.S\[W8,0,VGX4\],{ ?Z0\.B ?- ?Z3\.B ?},Z0\.B\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.s\[w11,0\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.s\[w8,7\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.s\[w8,0\],{ ?z28\.b ?- ?z31\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.s\[w8,0\],{ ?z0\.b ?- ?z3\.b ?},z15\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.s\[w8,0\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.s\[w9,1\],{ ?z4\.b ?- ?z7\.b ?},z10\.b\[2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.s\[w8,0,vgx2\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `uvdot ZA\.s\[W8,0,VGx2\],{ ?Z0\.h ?- ?Z1\.h ?},Z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `uvdot ZA\.S\[W8,0,VGX2\],{ ?Z0\.H ?- ?Z1\.H ?},Z0\.H\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.s\[w11,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.s\[w8,7\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.s\[w8,0\],{ ?z30\.h ?- ?z31\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.s\[w10,2\],{ ?z14\.h ?- ?z15\.h ?},z13\.h\[1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.s\[w8,0\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.s\[w8,0,vgx4\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `uvdot ZA\.s\[W8,0,VGx4\],{ ?Z0\.b ?- ?Z3\.b ?},Z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `uvdot ZA\.S\[W8,0,VGX4\],{ ?Z0\.B ?- ?Z3\.B ?},Z0\.B\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.s\[w11,0\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.s\[w8,7\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.s\[w8,0\],{ ?z28\.b ?- ?z31\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.s\[w8,0\],{ ?z0\.b ?- ?z3\.b ?},z15\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.s\[w8,0\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.s\[w9,1\],{ ?z4\.b ?- ?z7\.b ?},z10\.b\[2\]'
diff --git a/gas/testsuite/gas/aarch64/sme2-2-invalid.l b/gas/testsuite/gas/aarch64/sme2-2-invalid.l
index 8f2801f..1f761ca 100644
--- a/gas/testsuite/gas/aarch64/sme2-2-invalid.l
+++ b/gas/testsuite/gas/aarch64/sme2-2-invalid.l
@@ -1,229 +1,229 @@
 [^ :]+: Assembler messages:
 [^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `ld1b 0,pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: expected an SVE predicate register at operand 2 -- `ld1b {z0\.b-z1\.b},0,\[x0\]'
-[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b {z0\.b-z1\.b},pn8/z,0'
-[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 1 -- `ld1b {z0\.b},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 1 -- `ld1b {z0\.b-z2\.b},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z1\.b-z2\.b},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ld1b {z0\.b-z1\.b},p8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: operand mismatch -- `ld1b {z0\.b-z1\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: expected an SVE predicate register at operand 2 -- `ld1b { ?z0\.b ?- ?z1\.b ?},0,\[x0\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b { ?z0\.b ?- ?z1\.b ?},pn8/z,0'
+[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 1 -- `ld1b { ?z0\.b ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 1 -- `ld1b { ?z0\.b ?- ?z2\.b ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b { ?z1\.b ?- ?z2\.b ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ld1b { ?z0\.b ?- ?z1\.b ?},p8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `ld1b { ?z0\.b ?- ?z1\.b ?},pn8,\[x0\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	ld1b {z0\.b-z1\.b}, pn8/z, \[x0\]
-[^ :]+:[0-9]+: Error: operand mismatch -- `ld1b {z0\.b-z1\.b},pn8/m,\[x0\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `ld1b { ?z0\.b ?- ?z1\.b ?},pn8/m,\[x0\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	ld1b {z0\.b-z1\.b}, pn8/z, \[x0\]
-[^ :]+:[0-9]+: Error: operand mismatch -- `ld1b {z0\.b-z1\.b},pn8\.b,\[x0\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `ld1b { ?z0\.b ?- ?z1\.b ?},pn8\.b,\[x0\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	ld1b {z0\.b-z1\.b}, pn8/z, \[x0\]
-[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `ld1b {z0\.b-z1\.b},pn7/z,\[x0\]'
-[^ :]+:[0-9]+: Error: expected a 64-bit base register at operand 3 -- `ld1b {z0\.b-z1\.b},pn8/z,\[w0\]'
-[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ld1b {z0\.b-z1\.b},pn8/z,\[xzr\]'
-[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b {z0\.b-z1\.b},pn8/z,\[x0,#1\]'
-[^ :]+:[0-9]+: Error: immediate offset out of range -16 to 14 at operand 3 -- `ld1b {z0\.b-z1\.b},pn8/z,\[x0,#-32,mul vl\]'
-[^ :]+:[0-9]+: Error: immediate offset out of range -16 to 14 at operand 3 -- `ld1b {z0\.b-z1\.b},pn8/z,\[x0,#-18,mul vl\]'
-[^ :]+:[0-9]+: Error: immediate value must be a multiple of 2 at operand 3 -- `ld1b {z0\.b-z1\.b},pn8/z,\[x0,#-15,mul vl\]'
-[^ :]+:[0-9]+: Error: immediate value must be a multiple of 2 at operand 3 -- `ld1b {z0\.b-z1\.b},pn8/z,\[x0,#-1,mul vl\]'
-[^ :]+:[0-9]+: Error: immediate value must be a multiple of 2 at operand 3 -- `ld1b {z0\.b-z1\.b},pn8/z,\[x0,#1,mul vl\]'
-[^ :]+:[0-9]+: Error: immediate value must be a multiple of 2 at operand 3 -- `ld1b {z0\.b-z1\.b},pn8/z,\[x0,#13,mul vl\]'
-[^ :]+:[0-9]+: Error: immediate offset out of range -16 to 14 at operand 3 -- `ld1b {z0\.b-z1\.b},pn8/z,\[x0,#15,mul vl\]'
-[^ :]+:[0-9]+: Error: immediate offset out of range -16 to 14 at operand 3 -- `ld1b {z0\.b-z1\.b},pn8/z,\[x0,#16,mul vl\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z1\.b-z4\.b},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z2\.b-z5\.b},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z3\.b-z6\.b},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ld1b {z0\.b-z3\.b},p8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: operand mismatch -- `ld1b {z0\.b-z3\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `ld1b { ?z0\.b ?- ?z1\.b ?},pn7/z,\[x0\]'
+[^ :]+:[0-9]+: Error: expected a 64-bit base register at operand 3 -- `ld1b { ?z0\.b ?- ?z1\.b ?},pn8/z,\[w0\]'
+[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ld1b { ?z0\.b ?- ?z1\.b ?},pn8/z,\[xzr\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b { ?z0\.b ?- ?z1\.b ?},pn8/z,\[x0,#1\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range -16 to 14 at operand 3 -- `ld1b { ?z0\.b ?- ?z1\.b ?},pn8/z,\[x0,#-32,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range -16 to 14 at operand 3 -- `ld1b { ?z0\.b ?- ?z1\.b ?},pn8/z,\[x0,#-18,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate value must be a multiple of 2 at operand 3 -- `ld1b { ?z0\.b ?- ?z1\.b ?},pn8/z,\[x0,#-15,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate value must be a multiple of 2 at operand 3 -- `ld1b { ?z0\.b ?- ?z1\.b ?},pn8/z,\[x0,#-1,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate value must be a multiple of 2 at operand 3 -- `ld1b { ?z0\.b ?- ?z1\.b ?},pn8/z,\[x0,#1,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate value must be a multiple of 2 at operand 3 -- `ld1b { ?z0\.b ?- ?z1\.b ?},pn8/z,\[x0,#13,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range -16 to 14 at operand 3 -- `ld1b { ?z0\.b ?- ?z1\.b ?},pn8/z,\[x0,#15,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range -16 to 14 at operand 3 -- `ld1b { ?z0\.b ?- ?z1\.b ?},pn8/z,\[x0,#16,mul vl\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b { ?z1\.b ?- ?z4\.b ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b { ?z2\.b ?- ?z5\.b ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b { ?z3\.b ?- ?z6\.b ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ld1b { ?z0\.b ?- ?z3\.b ?},p8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `ld1b { ?z0\.b ?- ?z3\.b ?},pn8,\[x0\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	ld1b {z0\.b-z3\.b}, pn8/z, \[x0\]
-[^ :]+:[0-9]+: Error: operand mismatch -- `ld1b {z0\.b-z3\.b},pn8/m,\[x0\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `ld1b { ?z0\.b ?- ?z3\.b ?},pn8/m,\[x0\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	ld1b {z0\.b-z3\.b}, pn8/z, \[x0\]
-[^ :]+:[0-9]+: Error: operand mismatch -- `ld1b {z0\.b-z3\.b},pn8\.b,\[x0\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `ld1b { ?z0\.b ?- ?z3\.b ?},pn8\.b,\[x0\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	ld1b {z0\.b-z3\.b}, pn8/z, \[x0\]
-[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `ld1b {z0\.b-z3\.b},pn0/z,\[x0\]'
-[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `ld1b {z0\.b-z3\.b},pn7/z,\[x0\]'
-[^ :]+:[0-9]+: Error: expected a 64-bit base register at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[w0\]'
-[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[xzr\]'
-[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[x0,#4\]'
-[^ :]+:[0-9]+: Error: immediate offset out of range -32 to 28 at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[x0,#-36,mul vl\]'
-[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[x0,#-31,mul vl\]'
-[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[x0,#-30,mul vl\]'
-[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[x0,#-29,mul vl\]'
-[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[x0,#-14,mul vl\]'
-[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[x0,#-3,mul vl\]'
-[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[x0,#-2,mul vl\]'
-[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[x0,#-1,mul vl\]'
-[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[x0,#1,mul vl\]'
-[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[x0,#2,mul vl\]'
-[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[x0,#3,mul vl\]'
-[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[x0,#14,mul vl\]'
-[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[x0,#25,mul vl\]'
-[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[x0,#26,mul vl\]'
-[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[x0,#27,mul vl\]'
-[^ :]+:[0-9]+: Error: immediate offset out of range -32 to 28 at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[x0,#29,mul vl\]'
-[^ :]+:[0-9]+: Error: immediate offset out of range -32 to 28 at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[x0,#30,mul vl\]'
-[^ :]+:[0-9]+: Error: immediate offset out of range -32 to 28 at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[x0,#31,mul vl\]'
-[^ :]+:[0-9]+: Error: immediate offset out of range -32 to 28 at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[x0,#32,mul vl\]'
-[^ :]+:[0-9]+: Error: type mismatch in vector register list at operand 1 -- `ld1b {z0\.b,z8\.b,z16\.s},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: type mismatch in vector register list at operand 1 -- `ld1b {z0\.b,z4\.b,z8\.s},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1b {z0\.b,z2\.b},pn8/z,\[x0\]`
-[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1b {z0\.b,z3\.b},pn8/z,\[x0\]`
-[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1b {z0\.b,z4\.b},pn8/z,\[x0\]`
-[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1b {z0\.b,z5\.b},pn8/z,\[x0\]`
-[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1b {z0\.b,z6\.b},pn8/z,\[x0\]`
-[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1b {z0\.b,z7\.b},pn8/z,\[x0\]`
-[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1b {z0\.b,z9\.b},pn8/z,\[x0\]`
-[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1b {z0\.b,z15\.b},pn8/z,\[x0\]`
-[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1b {z0\.b,z16\.b},pn8/z,\[x0\]`
-[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1b {z0\.b,z23\.b},pn8/z,\[x0\]`
-[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1b {z0\.b,z24\.b},pn8/z,\[x0\]`
-[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1b {z0\.b,z31\.b},pn8/z,\[x0\]`
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z8\.b,z16\.b},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z9\.b,z17\.b},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z10\.b,z18\.b},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z11\.b,z19\.b},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z12\.b,z20\.b},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z13\.b,z21\.b},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z14\.b,z22\.b},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z15\.b,z23\.b},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z24\.b,z0\.b},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z25\.b,z1\.b},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z26\.b,z2\.b},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z27\.b,z3\.b},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z28\.b,z4\.b},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z29\.b,z5\.b},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z30\.b,z6\.b},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z31\.b,z7\.b},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1b {z8\.b,z0\.b},pn8/z,\[x0\]`
-[^ :]+:[0-9]+: Error: type mismatch in vector register list at operand 1 -- `ld1b {z0\.h,z8\.b},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: type mismatch in vector register list at operand 1 -- `ld1b {z0\.b,z8\.h},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: operand mismatch -- `ld1b {z0\.h,z8\.h},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `ld1b { ?z0\.b ?- ?z3\.b ?},pn0/z,\[x0\]'
+[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `ld1b { ?z0\.b ?- ?z3\.b ?},pn7/z,\[x0\]'
+[^ :]+:[0-9]+: Error: expected a 64-bit base register at operand 3 -- `ld1b { ?z0\.b ?- ?z3\.b ?},pn8/z,\[w0\]'
+[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ld1b { ?z0\.b ?- ?z3\.b ?},pn8/z,\[xzr\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b { ?z0\.b ?- ?z3\.b ?},pn8/z,\[x0,#4\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range -32 to 28 at operand 3 -- `ld1b { ?z0\.b ?- ?z3\.b ?},pn8/z,\[x0,#-36,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b { ?z0\.b ?- ?z3\.b ?},pn8/z,\[x0,#-31,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b { ?z0\.b ?- ?z3\.b ?},pn8/z,\[x0,#-30,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b { ?z0\.b ?- ?z3\.b ?},pn8/z,\[x0,#-29,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b { ?z0\.b ?- ?z3\.b ?},pn8/z,\[x0,#-14,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b { ?z0\.b ?- ?z3\.b ?},pn8/z,\[x0,#-3,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b { ?z0\.b ?- ?z3\.b ?},pn8/z,\[x0,#-2,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b { ?z0\.b ?- ?z3\.b ?},pn8/z,\[x0,#-1,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b { ?z0\.b ?- ?z3\.b ?},pn8/z,\[x0,#1,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b { ?z0\.b ?- ?z3\.b ?},pn8/z,\[x0,#2,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b { ?z0\.b ?- ?z3\.b ?},pn8/z,\[x0,#3,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b { ?z0\.b ?- ?z3\.b ?},pn8/z,\[x0,#14,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b { ?z0\.b ?- ?z3\.b ?},pn8/z,\[x0,#25,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b { ?z0\.b ?- ?z3\.b ?},pn8/z,\[x0,#26,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b { ?z0\.b ?- ?z3\.b ?},pn8/z,\[x0,#27,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range -32 to 28 at operand 3 -- `ld1b { ?z0\.b ?- ?z3\.b ?},pn8/z,\[x0,#29,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range -32 to 28 at operand 3 -- `ld1b { ?z0\.b ?- ?z3\.b ?},pn8/z,\[x0,#30,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range -32 to 28 at operand 3 -- `ld1b { ?z0\.b ?- ?z3\.b ?},pn8/z,\[x0,#31,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range -32 to 28 at operand 3 -- `ld1b { ?z0\.b ?- ?z3\.b ?},pn8/z,\[x0,#32,mul vl\]'
+[^ :]+:[0-9]+: Error: type mismatch in vector register list at operand 1 -- `ld1b { ?z0\.b,z8\.b,z16\.s ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: type mismatch in vector register list at operand 1 -- `ld1b { ?z0\.b,z4\.b,z8\.s ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1b { ?z0\.b,z2\.b ?},pn8/z,\[x0\]`
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1b { ?z0\.b,z3\.b ?},pn8/z,\[x0\]`
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1b { ?z0\.b,z4\.b ?},pn8/z,\[x0\]`
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1b { ?z0\.b,z5\.b ?},pn8/z,\[x0\]`
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1b { ?z0\.b,z6\.b ?},pn8/z,\[x0\]`
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1b { ?z0\.b,z7\.b ?},pn8/z,\[x0\]`
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1b { ?z0\.b,z9\.b ?},pn8/z,\[x0\]`
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1b { ?z0\.b,z15\.b ?},pn8/z,\[x0\]`
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1b { ?z0\.b,z16\.b ?},pn8/z,\[x0\]`
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1b { ?z0\.b,z23\.b ?},pn8/z,\[x0\]`
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1b { ?z0\.b,z24\.b ?},pn8/z,\[x0\]`
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1b { ?z0\.b,z31\.b ?},pn8/z,\[x0\]`
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b { ?z8\.b,z16\.b ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b { ?z9\.b,z17\.b ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b { ?z10\.b,z18\.b ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b { ?z11\.b,z19\.b ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b { ?z12\.b,z20\.b ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b { ?z13\.b,z21\.b ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b { ?z14\.b,z22\.b ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b { ?z15\.b,z23\.b ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b { ?z24\.b,z0\.b ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b { ?z25\.b,z1\.b ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b { ?z26\.b,z2\.b ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b { ?z27\.b,z3\.b ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b { ?z28\.b,z4\.b ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b { ?z29\.b,z5\.b ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b { ?z30\.b,z6\.b ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b { ?z31\.b,z7\.b ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1b { ?z8\.b,z0\.b ?},pn8/z,\[x0\]`
+[^ :]+:[0-9]+: Error: type mismatch in vector register list at operand 1 -- `ld1b { ?z0\.h,z8\.b ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: type mismatch in vector register list at operand 1 -- `ld1b { ?z0\.b,z8\.h ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `ld1b { ?z0\.h,z8\.h ?},pn8/z,\[x0\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	ld1b {z0\.b, z8\.b}, pn8/z, \[x0\]
-[^ :]+:[0-9]+: Error: missing type suffix at operand 1 -- `ld1b {z0,z8},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ld1b {z0\.b,z8\.b},p8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: expected a 64-bit base register at operand 3 -- `ld1b {z0\.b,z8\.b},pn8/z,\[w0\]'
-[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ld1b {z0\.b,z8\.b},pn8/z,\[xzr\]'
-[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b {z0\.b,z8\.b},pn8/z,\[x0,#-16\]'
-[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b {z0\.b,z8\.b},pn8/z,\[x0,#-1\]'
-[^ :]+:[0-9]+: Error: immediate offset out of range -16 to 14 at operand 3 -- `ld1b {z0\.b,z8\.b},pn8/z,\[x0,#-32,mul vl\]'
-[^ :]+:[0-9]+: Error: immediate offset out of range -16 to 14 at operand 3 -- `ld1b {z0\.b,z8\.b},pn8/z,\[x0,#-17,mul vl\]'
-[^ :]+:[0-9]+: Error: immediate value must be a multiple of 2 at operand 3 -- `ld1b {z0\.b,z8\.b},pn8/z,\[x0,#-15,mul vl\]'
-[^ :]+:[0-9]+: Error: immediate value must be a multiple of 2 at operand 3 -- `ld1b {z0\.b,z8\.b},pn8/z,\[x0,#-1,mul vl\]'
-[^ :]+:[0-9]+: Error: immediate value must be a multiple of 2 at operand 3 -- `ld1b {z0\.b,z8\.b},pn8/z,\[x0,#13,mul vl\]'
-[^ :]+:[0-9]+: Error: immediate offset out of range -16 to 14 at operand 3 -- `ld1b {z0\.b,z8\.b},pn8/z,\[x0,#15,mul vl\]'
-[^ :]+:[0-9]+: Error: immediate offset out of range -16 to 14 at operand 3 -- `ld1b {z0\.b,z8\.b},pn8/z,\[x0,#16,mul vl\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z4\.b,z8\.b,z12\.b,z16\.b},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z5\.b,z9\.b,z13\.b,z17\.b},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z6\.b,z10\.b,z14\.b,z18\.b},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z7\.b,z11\.b,z15\.b,z19\.b},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z8\.b,z12\.b,z16\.b,z20\.b},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z9\.b,z13\.b,z17\.b,z21\.b},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z10\.b,z14\.b,z18\.b,z22\.b},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z11\.b,z15\.b,z19\.b,z23\.b},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z12\.b,z16\.b,z20\.b,z24\.b},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z13\.b,z17\.b,z21\.b,z25\.b},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z14\.b,z18\.b,z22\.b,z26\.b},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z15\.b,z19\.b,z23\.b,z27\.b},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z20\.b,z24\.b,z28\.b,z0\.b},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 4 at operand 1 -- `ld1b {z0\.b,z2\.b,z4\.b,z6\.b},pn8/z,\[x0\]`
-[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 4 at operand 1 -- `ld1b {z0\.b,z3\.b,z6\.b,z9\.b},pn8/z,\[x0\]`
-[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 4 at operand 1 -- `ld1b {z0\.b,z8\.b,z16\.b,z24\.b},pn8/z,\[x0\]`
-[^ :]+:[0-9]+: Error: invalid register list at operand 1 -- `ld1b {z0\.b,z4\.b,z5\.b,z6\.b},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: invalid register list at operand 1 -- `ld1b {z0\.b,z4\.b,z8\.b,z9\.b},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: invalid register list at operand 1 -- `ld1b {z0\.b,z1\.b,z3\.b,z7\.b},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: type mismatch in vector register list at operand 1 -- `ld1b {z0\.h,z4\.h,z8\.b,z12\.b},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: type mismatch in vector register list at operand 1 -- `ld1b {z0\.b,z4\.b,z8\.h,z12\.h},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: operand mismatch -- `ld1b {z0\.h,z4\.h,z8\.h,z12\.h},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: missing type suffix at operand 1 -- `ld1b { ?z0,z8 ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ld1b { ?z0\.b,z8\.b ?},p8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: expected a 64-bit base register at operand 3 -- `ld1b { ?z0\.b,z8\.b ?},pn8/z,\[w0\]'
+[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ld1b { ?z0\.b,z8\.b ?},pn8/z,\[xzr\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b { ?z0\.b,z8\.b ?},pn8/z,\[x0,#-16\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b { ?z0\.b,z8\.b ?},pn8/z,\[x0,#-1\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range -16 to 14 at operand 3 -- `ld1b { ?z0\.b,z8\.b ?},pn8/z,\[x0,#-32,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range -16 to 14 at operand 3 -- `ld1b { ?z0\.b,z8\.b ?},pn8/z,\[x0,#-17,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate value must be a multiple of 2 at operand 3 -- `ld1b { ?z0\.b,z8\.b ?},pn8/z,\[x0,#-15,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate value must be a multiple of 2 at operand 3 -- `ld1b { ?z0\.b,z8\.b ?},pn8/z,\[x0,#-1,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate value must be a multiple of 2 at operand 3 -- `ld1b { ?z0\.b,z8\.b ?},pn8/z,\[x0,#13,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range -16 to 14 at operand 3 -- `ld1b { ?z0\.b,z8\.b ?},pn8/z,\[x0,#15,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range -16 to 14 at operand 3 -- `ld1b { ?z0\.b,z8\.b ?},pn8/z,\[x0,#16,mul vl\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b { ?z4\.b,z8\.b,z12\.b,z16\.b ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b { ?z5\.b,z9\.b,z13\.b,z17\.b ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b { ?z6\.b,z10\.b,z14\.b,z18\.b ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b { ?z7\.b,z11\.b,z15\.b,z19\.b ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b { ?z8\.b,z12\.b,z16\.b,z20\.b ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b { ?z9\.b,z13\.b,z17\.b,z21\.b ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b { ?z10\.b,z14\.b,z18\.b,z22\.b ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b { ?z11\.b,z15\.b,z19\.b,z23\.b ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b { ?z12\.b,z16\.b,z20\.b,z24\.b ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b { ?z13\.b,z17\.b,z21\.b,z25\.b ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b { ?z14\.b,z18\.b,z22\.b,z26\.b ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b { ?z15\.b,z19\.b,z23\.b,z27\.b ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b { ?z20\.b,z24\.b,z28\.b,z0\.b ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 4 at operand 1 -- `ld1b { ?z0\.b,z2\.b,z4\.b,z6\.b ?},pn8/z,\[x0\]`
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 4 at operand 1 -- `ld1b { ?z0\.b,z3\.b,z6\.b,z9\.b ?},pn8/z,\[x0\]`
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 4 at operand 1 -- `ld1b { ?z0\.b,z8\.b,z16\.b,z24\.b ?},pn8/z,\[x0\]`
+[^ :]+:[0-9]+: Error: invalid register list at operand 1 -- `ld1b { ?z0\.b,z4\.b,z5\.b,z6\.b ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: invalid register list at operand 1 -- `ld1b { ?z0\.b,z4\.b,z8\.b,z9\.b ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: invalid register list at operand 1 -- `ld1b { ?z0\.b,z1\.b,z3\.b,z7\.b ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: type mismatch in vector register list at operand 1 -- `ld1b { ?z0\.h,z4\.h,z8\.b,z12\.b ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: type mismatch in vector register list at operand 1 -- `ld1b { ?z0\.b,z4\.b,z8\.h,z12\.h ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `ld1b { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn8/z,\[x0\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	ld1b {z0\.b, z4\.b, z8\.b, z12\.b}, pn8/z, \[x0\]
-[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},p8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: expected a 64-bit base register at operand 3 -- `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[w0\]'
-[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[xzr\]'
-[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,#-32\]'
-[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,#-1\]'
-[^ :]+:[0-9]+: Error: immediate offset out of range -32 to 28 at operand 3 -- `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,#-64,mul vl\]'
-[^ :]+:[0-9]+: Error: immediate offset out of range -32 to 28 at operand 3 -- `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,#-36,mul vl\]'
-[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,#-31,mul vl\]'
-[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,#-3,mul vl\]'
-[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,#-2,mul vl\]'
-[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,#-1,mul vl\]'
-[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,#1,mul vl\]'
-[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,#2,mul vl\]'
-[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,#3,mul vl\]'
-[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,#25,mul vl\]'
-[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,#26,mul vl\]'
-[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,#27,mul vl\]'
-[^ :]+:[0-9]+: Error: immediate offset out of range -32 to 28 at operand 3 -- `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,#29,mul vl\]'
-[^ :]+:[0-9]+: Error: immediate offset out of range -32 to 28 at operand 3 -- `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,#32,mul vl\]'
-[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 1 -- `ld1b {z0\.b-z2\.b},pn8/z,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z1\.b-z2\.b},pn8/z,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ld1b {z0\.b-z1\.b},p8/z,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: operand mismatch -- `ld1b {z0\.b-z1\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ld1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},p8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: expected a 64-bit base register at operand 3 -- `ld1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8/z,\[w0\]'
+[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ld1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8/z,\[xzr\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8/z,\[x0,#-32\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8/z,\[x0,#-1\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range -32 to 28 at operand 3 -- `ld1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8/z,\[x0,#-64,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range -32 to 28 at operand 3 -- `ld1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8/z,\[x0,#-36,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8/z,\[x0,#-31,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8/z,\[x0,#-3,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8/z,\[x0,#-2,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8/z,\[x0,#-1,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8/z,\[x0,#1,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8/z,\[x0,#2,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8/z,\[x0,#3,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8/z,\[x0,#25,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8/z,\[x0,#26,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8/z,\[x0,#27,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range -32 to 28 at operand 3 -- `ld1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8/z,\[x0,#29,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range -32 to 28 at operand 3 -- `ld1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8/z,\[x0,#32,mul vl\]'
+[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 1 -- `ld1b { ?z0\.b ?- ?z2\.b ?},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b { ?z1\.b ?- ?z2\.b ?},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ld1b { ?z0\.b ?- ?z1\.b ?},p8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `ld1b { ?z0\.b ?- ?z1\.b ?},pn8,\[x0,x1\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	ld1b {z0\.b-z1\.b}, pn8/z, \[x0, x1\]
-[^ :]+:[0-9]+: Error: operand mismatch -- `ld1b {z0\.b-z1\.b},pn8/m,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `ld1b { ?z0\.b ?- ?z1\.b ?},pn8/m,\[x0,x1\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	ld1b {z0\.b-z1\.b}, pn8/z, \[x0, x1\]
-[^ :]+:[0-9]+: Error: operand mismatch -- `ld1b {z0\.b-z1\.b},pn8\.b,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `ld1b { ?z0\.b ?- ?z1\.b ?},pn8\.b,\[x0,x1\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	ld1b {z0\.b-z1\.b}, pn8/z, \[x0, x1\]
-[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `ld1b {z0\.b-z1\.b},pn0/z,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `ld1b {z0\.b-z1\.b},pn7/z,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: expected a 64-bit base register at operand 3 -- `ld1b {z0\.b-z1\.b},pn8/z,\[w0,w1\]'
-[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ld1b {z0\.b-z1\.b},pn8/z,\[xzr,x1\]'
-[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ld1b {z0\.b-z1\.b},pn8/z,\[sp,sp\]'
-[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b {z0\.b-z1\.b},pn8/z,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b {z0\.b-z1\.b},pn8/z,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b {z0\.b-z1\.b},pn8/z,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b {z0\.b-z1\.b},pn8/z,\[x0,x1,lsl#4\]'
-[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b {z0\.b-z1\.b},pn8/z,\[x0,w1,sxtw\]'
-[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b {z0\.b-z1\.b},pn8/z,\[x0,w1,uxtw\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z1\.b-z4\.b},pn8/z,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z2\.b-z5\.b},pn8/z,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z3\.b-z6\.b},pn8/z,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ld1b {z0\.b-z3\.b},p8/z,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: operand mismatch -- `ld1b {z0\.b-z3\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `ld1b { ?z0\.b ?- ?z1\.b ?},pn0/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `ld1b { ?z0\.b ?- ?z1\.b ?},pn7/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: expected a 64-bit base register at operand 3 -- `ld1b { ?z0\.b ?- ?z1\.b ?},pn8/z,\[w0,w1\]'
+[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ld1b { ?z0\.b ?- ?z1\.b ?},pn8/z,\[xzr,x1\]'
+[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ld1b { ?z0\.b ?- ?z1\.b ?},pn8/z,\[sp,sp\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b { ?z0\.b ?- ?z1\.b ?},pn8/z,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b { ?z0\.b ?- ?z1\.b ?},pn8/z,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b { ?z0\.b ?- ?z1\.b ?},pn8/z,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b { ?z0\.b ?- ?z1\.b ?},pn8/z,\[x0,x1,lsl ?#4\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b { ?z0\.b ?- ?z1\.b ?},pn8/z,\[x0,w1,sxtw\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b { ?z0\.b ?- ?z1\.b ?},pn8/z,\[x0,w1,uxtw\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b { ?z1\.b ?- ?z4\.b ?},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b { ?z2\.b ?- ?z5\.b ?},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b { ?z3\.b ?- ?z6\.b ?},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ld1b { ?z0\.b ?- ?z3\.b ?},p8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `ld1b { ?z0\.b ?- ?z3\.b ?},pn8,\[x0,x1\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	ld1b {z0\.b-z3\.b}, pn8/z, \[x0, x1\]
-[^ :]+:[0-9]+: Error: operand mismatch -- `ld1b {z0\.b-z3\.b},pn8/m,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `ld1b { ?z0\.b ?- ?z3\.b ?},pn8/m,\[x0,x1\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	ld1b {z0\.b-z3\.b}, pn8/z, \[x0, x1\]
-[^ :]+:[0-9]+: Error: operand mismatch -- `ld1b {z0\.b-z3\.b},pn8\.b,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `ld1b { ?z0\.b ?- ?z3\.b ?},pn8\.b,\[x0,x1\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	ld1b {z0\.b-z3\.b}, pn8/z, \[x0, x1\]
-[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `ld1b {z0\.b-z3\.b},pn0/z,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `ld1b {z0\.b-z3\.b},pn7/z,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: expected a 64-bit base register at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[w0,w1\]'
-[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[xzr,x1\]'
-[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[sp,sp\]'
-[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[x0,x1,lsl#4\]'
-[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[x0,w1,sxtw\]'
-[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[x0,w1,uxtw\]'
-[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1b {z0\.b,z2\.b},pn8/z,\[x0,x1\]`
-[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1b {z0\.b,z3\.b},pn8/z,\[x0,x1\]`
-[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1b {z0\.b,z4\.b},pn8/z,\[x0,x1\]`
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z8\.b,z16\.b},pn8/z,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z24\.b,z0\.b},pn8/z,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1b {z8\.b,z0\.b},pn8/z,\[x0,x1\]`
-[^ :]+:[0-9]+: Error: operand mismatch -- `ld1b {z0\.h,z8\.h},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `ld1b { ?z0\.b ?- ?z3\.b ?},pn0/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `ld1b { ?z0\.b ?- ?z3\.b ?},pn7/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: expected a 64-bit base register at operand 3 -- `ld1b { ?z0\.b ?- ?z3\.b ?},pn8/z,\[w0,w1\]'
+[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ld1b { ?z0\.b ?- ?z3\.b ?},pn8/z,\[xzr,x1\]'
+[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ld1b { ?z0\.b ?- ?z3\.b ?},pn8/z,\[sp,sp\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b { ?z0\.b ?- ?z3\.b ?},pn8/z,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b { ?z0\.b ?- ?z3\.b ?},pn8/z,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b { ?z0\.b ?- ?z3\.b ?},pn8/z,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b { ?z0\.b ?- ?z3\.b ?},pn8/z,\[x0,x1,lsl ?#4\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b { ?z0\.b ?- ?z3\.b ?},pn8/z,\[x0,w1,sxtw\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b { ?z0\.b ?- ?z3\.b ?},pn8/z,\[x0,w1,uxtw\]'
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1b { ?z0\.b,z2\.b ?},pn8/z,\[x0,x1\]`
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1b { ?z0\.b,z3\.b ?},pn8/z,\[x0,x1\]`
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1b { ?z0\.b,z4\.b ?},pn8/z,\[x0,x1\]`
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b { ?z8\.b,z16\.b ?},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b { ?z24\.b,z0\.b ?},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1b { ?z8\.b,z0\.b ?},pn8/z,\[x0,x1\]`
+[^ :]+:[0-9]+: Error: operand mismatch -- `ld1b { ?z0\.h,z8\.h ?},pn8/z,\[x0,x1\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	ld1b {z0\.b, z8\.b}, pn8/z, \[x0, x1\]
-[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ld1b {z0\.b,z8\.b},p8/z,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: expected a 64-bit base register at operand 3 -- `ld1b {z0\.b,z8\.b},pn8/z,\[w0,w30\]'
-[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ld1b {z0\.b,z8\.b},pn8/z,\[xzr,xzr\]'
-[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ld1b {z0\.b,z8\.b},pn8/z,\[x0,sp\]'
-[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b {z0\.b,z8\.b},pn8/z,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z4\.b,z8\.b,z12\.b,z16\.b},pn8/z,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z20\.b,z24\.b,z28\.b,z0\.b},pn8/z,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: operand mismatch -- `ld1b {z0\.h,z4\.h,z8\.h,z12\.h},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ld1b { ?z0\.b,z8\.b ?},p8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: expected a 64-bit base register at operand 3 -- `ld1b { ?z0\.b,z8\.b ?},pn8/z,\[w0,w30\]'
+[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ld1b { ?z0\.b,z8\.b ?},pn8/z,\[xzr,xzr\]'
+[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ld1b { ?z0\.b,z8\.b ?},pn8/z,\[x0,sp\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b { ?z0\.b,z8\.b ?},pn8/z,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b { ?z4\.b,z8\.b,z12\.b,z16\.b ?},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b { ?z20\.b,z24\.b,z28\.b,z0\.b ?},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `ld1b { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn8/z,\[x0,x1\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	ld1b {z0\.b, z4\.b, z8\.b, z12\.b}, pn8/z, \[x0, x1\]
-[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},p8/z,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: expected a 64-bit base register at operand 3 -- `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[w0,w30\]'
-[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[xzr,xzr\]'
-[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,sp\]'
-[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ld1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},p8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: expected a 64-bit base register at operand 3 -- `ld1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8/z,\[w0,w30\]'
+[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ld1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8/z,\[xzr,xzr\]'
+[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ld1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8/z,\[x0,sp\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8/z,\[x0,x1,lsl ?#1\]'
diff --git a/gas/testsuite/gas/aarch64/sme2-2-noarch.l b/gas/testsuite/gas/aarch64/sme2-2-noarch.l
index 48b6049..39467e0 100644
--- a/gas/testsuite/gas/aarch64/sme2-2-noarch.l
+++ b/gas/testsuite/gas/aarch64/sme2-2-noarch.l
@@ -1,481 +1,481 @@
 [^ :]+: Assembler messages:
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b-z1\.b},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b-z1\.b},pn8/z,\[x0,#0,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {Z0\.B-Z1\.B},PN8/Z,\[X0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z30\.b-z31\.b},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b-z1\.b},pn15/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b-z1\.b},pn8/z,\[x30\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b-z1\.b},pn8/z,\[sp\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b-z1\.b},pn8/z,\[x0,#-16,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b-z1\.b},pn8/z,\[x0,#14,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z12\.b-z13\.b},pn13/z,\[x11,#-10,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b-z3\.b},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b-z3\.b},pn8/z,\[x0,#0,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {Z0\.B-Z3\.B},PN8/Z,\[X0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z28\.b-z31\.b},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b-z3\.b},pn15/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b-z3\.b},pn8/z,\[x30\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b-z3\.b},pn8/z,\[sp\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b-z3\.b},pn8/z,\[x0,#-32,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b-z3\.b},pn8/z,\[x0,#28,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z8\.b-z11\.b},pn11/z,\[x17,#20,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b,z8\.b},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b,z8\.b},pn8/z,\[x0,#0,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {Z0\.B,Z8\.B},PN8/Z,\[X0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z1\.b,z9\.b},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z2\.b,z10\.b},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z3\.b,z11\.b},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z4\.b,z12\.b},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z5\.b,z13\.b},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z6\.b,z14\.b},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z7\.b,z15\.b},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z16\.b,z24\.b},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z17\.b,z25\.b},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z18\.b,z26\.b},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z19\.b,z27\.b},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z20\.b,z28\.b},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z21\.b,z29\.b},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z22\.b,z30\.b},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z23\.b,z31\.b},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b,z8\.b},pn15/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b,z8\.b},pn8/z,\[x30\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b,z8\.b},pn8/z,\[sp\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b,z8\.b},pn8/z,\[x0,#-16,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b,z8\.b},pn8/z,\[x0,#14,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z3\.b,z11\.b},pn10/z,\[x22,#6,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,#0,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {Z0\.B,Z4\.B,Z8\.B,Z12\.B},PN8/Z,\[X0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z1\.b,z5\.b,z9\.b,z13\.b},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z2\.b,z6\.b,z10\.b,z14\.b},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z3\.b,z7\.b,z11\.b,z15\.b},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z16\.b,z20\.b,z24\.b,z28\.b},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z17\.b,z21\.b,z25\.b,z29\.b},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z18\.b,z22\.b,z26\.b,z30\.b},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z19\.b,z23\.b,z27\.b,z31\.b},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn15/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x30\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[sp\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,#-32,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,#28,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z2\.b,z6\.b,z10\.b,z14\.b},pn14/z,\[x29,#8,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b-z1\.b},pn8/z,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b-z1\.b},pn8/z,\[x0,x1,lsl#0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {Z0\.B-Z1\.B},PN8/Z,\[X0,X1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z30\.b-z31\.b},pn8/z,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b-z1\.b},pn15/z,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b-z1\.b},pn8/z,\[x30,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b-z1\.b},pn8/z,\[sp,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b-z1\.b},pn8/z,\[x0,x30\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b-z1\.b},pn8/z,\[x0,xzr\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z14\.b-z15\.b},pn9/z,\[x26,x3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b-z3\.b},pn8/z,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b-z3\.b},pn8/z,\[x0,x1,lsl#0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {Z0\.B-Z3\.B},PN8/Z,\[X0,X1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z28\.b-z31\.b},pn8/z,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b-z3\.b},pn15/z,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b-z3\.b},pn8/z,\[x30,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b-z3\.b},pn8/z,\[sp,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b-z3\.b},pn8/z,\[x0,x30\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b-z3\.b},pn8/z,\[x0,xzr\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z8\.b-z11\.b},pn11/z,\[x27,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b,z8\.b},pn8/z,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b,z8\.b},pn8/z,\[x0,x1,lsl#0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {Z0\.B,Z8\.B},PN8/Z,\[X0,X1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z1\.b,z9\.b},pn8/z,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z2\.b,z10\.b},pn8/z,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z3\.b,z11\.b},pn8/z,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z4\.b,z12\.b},pn8/z,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z5\.b,z13\.b},pn8/z,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z6\.b,z14\.b},pn8/z,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z7\.b,z15\.b},pn8/z,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z16\.b,z24\.b},pn8/z,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z17\.b,z25\.b},pn8/z,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z18\.b,z26\.b},pn8/z,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z19\.b,z27\.b},pn8/z,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z20\.b,z28\.b},pn8/z,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z21\.b,z29\.b},pn8/z,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z22\.b,z30\.b},pn8/z,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z23\.b,z31\.b},pn8/z,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b,z8\.b},pn15/z,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b,z8\.b},pn8/z,\[x30,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b,z8\.b},pn8/z,\[sp,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b,z8\.b},pn8/z,\[x0,x30\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b,z8\.b},pn8/z,\[x0,xzr\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z5\.b,z13\.b},pn14/z,\[x15,x24\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,x1,lsl#0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {Z0\.B,Z4\.B,Z8\.B,Z12\.B},PN8/Z,\[X0,X1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z1\.b,z5\.b,z9\.b,z13\.b},pn8/z,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z2\.b,z6\.b,z10\.b,z14\.b},pn8/z,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z3\.b,z7\.b,z11\.b,z15\.b},pn8/z,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z16\.b,z20\.b,z24\.b,z28\.b},pn8/z,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z17\.b,z21\.b,z25\.b,z29\.b},pn8/z,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z18\.b,z22\.b,z26\.b,z30\.b},pn8/z,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z19\.b,z23\.b,z27\.b,z31\.b},pn8/z,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn15/z,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x30,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[sp,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,x30\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,xzr\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z17\.b,z21\.b,z25\.b,z29\.b},pn11/z,\[x4,x6\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b-z1\.b},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b-z1\.b},pn8/z,\[x0,#0,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {Z0\.B-Z1\.B},PN8/Z,\[X0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z30\.b-z31\.b},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b-z1\.b},pn15/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b-z1\.b},pn8/z,\[x30\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b-z1\.b},pn8/z,\[sp\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b-z1\.b},pn8/z,\[x0,#-16,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b-z1\.b},pn8/z,\[x0,#14,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z12\.b-z13\.b},pn13/z,\[x11,#-10,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b-z3\.b},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b-z3\.b},pn8/z,\[x0,#0,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {Z0\.B-Z3\.B},PN8/Z,\[X0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z28\.b-z31\.b},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b-z3\.b},pn15/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b-z3\.b},pn8/z,\[x30\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b-z3\.b},pn8/z,\[sp\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b-z3\.b},pn8/z,\[x0,#-32,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b-z3\.b},pn8/z,\[x0,#28,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z8\.b-z11\.b},pn11/z,\[x17,#20,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b,z8\.b},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b,z8\.b},pn8/z,\[x0,#0,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {Z0\.B,Z8\.B},PN8/Z,\[X0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z1\.b,z9\.b},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z2\.b,z10\.b},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z3\.b,z11\.b},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z4\.b,z12\.b},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z5\.b,z13\.b},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z6\.b,z14\.b},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z7\.b,z15\.b},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z16\.b,z24\.b},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z17\.b,z25\.b},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z18\.b,z26\.b},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z19\.b,z27\.b},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z20\.b,z28\.b},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z21\.b,z29\.b},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z22\.b,z30\.b},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z23\.b,z31\.b},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b,z8\.b},pn15/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b,z8\.b},pn8/z,\[x30\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b,z8\.b},pn8/z,\[sp\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b,z8\.b},pn8/z,\[x0,#-16,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b,z8\.b},pn8/z,\[x0,#14,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z3\.b,z11\.b},pn10/z,\[x22,#6,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,#0,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {Z0\.B,Z4\.B,Z8\.B,Z12\.B},PN8/Z,\[X0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z1\.b,z5\.b,z9\.b,z13\.b},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z2\.b,z6\.b,z10\.b,z14\.b},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z3\.b,z7\.b,z11\.b,z15\.b},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z16\.b,z20\.b,z24\.b,z28\.b},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z17\.b,z21\.b,z25\.b,z29\.b},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z18\.b,z22\.b,z26\.b,z30\.b},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z19\.b,z23\.b,z27\.b,z31\.b},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b,z4\.b,z8\.b,z12\.b},pn15/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x30\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[sp\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,#-32,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,#28,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z2\.b,z6\.b,z10\.b,z14\.b},pn14/z,\[x29,#8,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b-z1\.b},pn8/z,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b-z1\.b},pn8/z,\[x0,x1,lsl#0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {Z0\.B-Z1\.B},PN8/Z,\[X0,X1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z30\.b-z31\.b},pn8/z,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b-z1\.b},pn15/z,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b-z1\.b},pn8/z,\[x30,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b-z1\.b},pn8/z,\[sp,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b-z1\.b},pn8/z,\[x0,x30\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b-z1\.b},pn8/z,\[x0,xzr\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z14\.b-z15\.b},pn9/z,\[x26,x3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b-z3\.b},pn8/z,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b-z3\.b},pn8/z,\[x0,x1,lsl#0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {Z0\.B-Z3\.B},PN8/Z,\[X0,X1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z28\.b-z31\.b},pn8/z,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b-z3\.b},pn15/z,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b-z3\.b},pn8/z,\[x30,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b-z3\.b},pn8/z,\[sp,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b-z3\.b},pn8/z,\[x0,x30\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b-z3\.b},pn8/z,\[x0,xzr\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z8\.b-z11\.b},pn11/z,\[x27,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b,z8\.b},pn8/z,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b,z8\.b},pn8/z,\[x0,x1,lsl#0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {Z0\.B,Z8\.B},PN8/Z,\[X0,X1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z1\.b,z9\.b},pn8/z,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z2\.b,z10\.b},pn8/z,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z3\.b,z11\.b},pn8/z,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z4\.b,z12\.b},pn8/z,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z5\.b,z13\.b},pn8/z,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z6\.b,z14\.b},pn8/z,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z7\.b,z15\.b},pn8/z,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z16\.b,z24\.b},pn8/z,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z17\.b,z25\.b},pn8/z,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z18\.b,z26\.b},pn8/z,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z19\.b,z27\.b},pn8/z,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z20\.b,z28\.b},pn8/z,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z21\.b,z29\.b},pn8/z,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z22\.b,z30\.b},pn8/z,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z23\.b,z31\.b},pn8/z,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b,z8\.b},pn15/z,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b,z8\.b},pn8/z,\[x30,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b,z8\.b},pn8/z,\[sp,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b,z8\.b},pn8/z,\[x0,x30\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b,z8\.b},pn8/z,\[x0,xzr\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z5\.b,z13\.b},pn14/z,\[x15,x24\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,x1,lsl#0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {Z0\.B,Z4\.B,Z8\.B,Z12\.B},PN8/Z,\[X0,X1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z1\.b,z5\.b,z9\.b,z13\.b},pn8/z,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z2\.b,z6\.b,z10\.b,z14\.b},pn8/z,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z3\.b,z7\.b,z11\.b,z15\.b},pn8/z,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z16\.b,z20\.b,z24\.b,z28\.b},pn8/z,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z17\.b,z21\.b,z25\.b,z29\.b},pn8/z,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z18\.b,z22\.b,z26\.b,z30\.b},pn8/z,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z19\.b,z23\.b,z27\.b,z31\.b},pn8/z,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b,z4\.b,z8\.b,z12\.b},pn15/z,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x30,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[sp,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,x30\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,xzr\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z17\.b,z21\.b,z25\.b,z29\.b},pn11/z,\[x4,x6\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b-z1\.b},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b-z1\.b},pn8,\[x0,#0,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {Z0\.B-Z1\.B},PN8,\[X0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z30\.b-z31\.b},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b-z1\.b},pn15,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b-z1\.b},pn8,\[x30\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b-z1\.b},pn8,\[sp\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b-z1\.b},pn8,\[x0,#-16,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b-z1\.b},pn8,\[x0,#14,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z12\.b-z13\.b},pn13,\[x11,#-10,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b-z3\.b},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b-z3\.b},pn8,\[x0,#0,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {Z0\.B-Z3\.B},PN8,\[X0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z28\.b-z31\.b},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b-z3\.b},pn15,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b-z3\.b},pn8,\[x30\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b-z3\.b},pn8,\[sp\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b-z3\.b},pn8,\[x0,#-32,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b-z3\.b},pn8,\[x0,#28,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z8\.b-z11\.b},pn11,\[x17,#20,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b,z8\.b},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b,z8\.b},pn8,\[x0,#0,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {Z0\.B,Z8\.B},PN8,\[X0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z1\.b,z9\.b},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z2\.b,z10\.b},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z3\.b,z11\.b},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z4\.b,z12\.b},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z5\.b,z13\.b},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z6\.b,z14\.b},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z7\.b,z15\.b},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z16\.b,z24\.b},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z17\.b,z25\.b},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z18\.b,z26\.b},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z19\.b,z27\.b},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z20\.b,z28\.b},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z21\.b,z29\.b},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z22\.b,z30\.b},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z23\.b,z31\.b},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b,z8\.b},pn15,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b,z8\.b},pn8,\[x30\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b,z8\.b},pn8,\[sp\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b,z8\.b},pn8,\[x0,#-16,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b,z8\.b},pn8,\[x0,#14,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z3\.b,z11\.b},pn10,\[x22,#6,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8,\[x0,#0,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {Z0\.B,Z4\.B,Z8\.B,Z12\.B},PN8,\[X0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z1\.b,z5\.b,z9\.b,z13\.b},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z2\.b,z6\.b,z10\.b,z14\.b},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z3\.b,z7\.b,z11\.b,z15\.b},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z16\.b,z20\.b,z24\.b,z28\.b},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z17\.b,z21\.b,z25\.b,z29\.b},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z18\.b,z22\.b,z26\.b,z30\.b},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z19\.b,z23\.b,z27\.b,z31\.b},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b,z4\.b,z8\.b,z12\.b},pn15,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8,\[x30\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8,\[sp\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8,\[x0,#-32,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8,\[x0,#28,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z2\.b,z6\.b,z10\.b,z14\.b},pn14,\[x29,#8,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b-z1\.b},pn8,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b-z1\.b},pn8,\[x0,x1,lsl#0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {Z0\.B-Z1\.B},PN8,\[X0,X1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z30\.b-z31\.b},pn8,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b-z1\.b},pn15,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b-z1\.b},pn8,\[x30,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b-z1\.b},pn8,\[sp,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b-z1\.b},pn8,\[x0,x30\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b-z1\.b},pn8,\[x0,xzr\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z14\.b-z15\.b},pn9,\[x26,x3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b-z3\.b},pn8,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b-z3\.b},pn8,\[x0,x1,lsl#0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {Z0\.B-Z3\.B},PN8,\[X0,X1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z28\.b-z31\.b},pn8,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b-z3\.b},pn15,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b-z3\.b},pn8,\[x30,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b-z3\.b},pn8,\[sp,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b-z3\.b},pn8,\[x0,x30\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b-z3\.b},pn8,\[x0,xzr\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z8\.b-z11\.b},pn11,\[x27,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b,z8\.b},pn8,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b,z8\.b},pn8,\[x0,x1,lsl#0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {Z0\.B,Z8\.B},PN8,\[X0,X1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z1\.b,z9\.b},pn8,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z2\.b,z10\.b},pn8,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z3\.b,z11\.b},pn8,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z4\.b,z12\.b},pn8,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z5\.b,z13\.b},pn8,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z6\.b,z14\.b},pn8,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z7\.b,z15\.b},pn8,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z16\.b,z24\.b},pn8,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z17\.b,z25\.b},pn8,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z18\.b,z26\.b},pn8,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z19\.b,z27\.b},pn8,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z20\.b,z28\.b},pn8,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z21\.b,z29\.b},pn8,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z22\.b,z30\.b},pn8,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z23\.b,z31\.b},pn8,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b,z8\.b},pn15,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b,z8\.b},pn8,\[x30,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b,z8\.b},pn8,\[sp,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b,z8\.b},pn8,\[x0,x30\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b,z8\.b},pn8,\[x0,xzr\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z5\.b,z13\.b},pn14,\[x15,x24\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8,\[x0,x1,lsl#0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {Z0\.B,Z4\.B,Z8\.B,Z12\.B},PN8,\[X0,X1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z1\.b,z5\.b,z9\.b,z13\.b},pn8,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z2\.b,z6\.b,z10\.b,z14\.b},pn8,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z3\.b,z7\.b,z11\.b,z15\.b},pn8,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z16\.b,z20\.b,z24\.b,z28\.b},pn8,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z17\.b,z21\.b,z25\.b,z29\.b},pn8,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z18\.b,z22\.b,z26\.b,z30\.b},pn8,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z19\.b,z23\.b,z27\.b,z31\.b},pn8,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b,z4\.b,z8\.b,z12\.b},pn15,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8,\[x30,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8,\[sp,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8,\[x0,x30\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8,\[x0,xzr\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z17\.b,z21\.b,z25\.b,z29\.b},pn11,\[x4,x6\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b-z1\.b},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b-z1\.b},pn8,\[x0,#0,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {Z0\.B-Z1\.B},PN8,\[X0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z30\.b-z31\.b},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b-z1\.b},pn15,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b-z1\.b},pn8,\[x30\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b-z1\.b},pn8,\[sp\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b-z1\.b},pn8,\[x0,#-16,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b-z1\.b},pn8,\[x0,#14,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z12\.b-z13\.b},pn13,\[x11,#-10,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b-z3\.b},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b-z3\.b},pn8,\[x0,#0,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {Z0\.B-Z3\.B},PN8,\[X0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z28\.b-z31\.b},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b-z3\.b},pn15,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b-z3\.b},pn8,\[x30\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b-z3\.b},pn8,\[sp\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b-z3\.b},pn8,\[x0,#-32,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b-z3\.b},pn8,\[x0,#28,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z8\.b-z11\.b},pn11,\[x17,#20,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b,z8\.b},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b,z8\.b},pn8,\[x0,#0,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {Z0\.B,Z8\.B},PN8,\[X0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z1\.b,z9\.b},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z2\.b,z10\.b},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z3\.b,z11\.b},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z4\.b,z12\.b},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z5\.b,z13\.b},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z6\.b,z14\.b},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z7\.b,z15\.b},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z16\.b,z24\.b},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z17\.b,z25\.b},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z18\.b,z26\.b},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z19\.b,z27\.b},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z20\.b,z28\.b},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z21\.b,z29\.b},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z22\.b,z30\.b},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z23\.b,z31\.b},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b,z8\.b},pn15,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b,z8\.b},pn8,\[x30\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b,z8\.b},pn8,\[sp\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b,z8\.b},pn8,\[x0,#-16,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b,z8\.b},pn8,\[x0,#14,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z3\.b,z11\.b},pn10,\[x22,#6,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8,\[x0,#0,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {Z0\.B,Z4\.B,Z8\.B,Z12\.B},PN8,\[X0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z1\.b,z5\.b,z9\.b,z13\.b},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z2\.b,z6\.b,z10\.b,z14\.b},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z3\.b,z7\.b,z11\.b,z15\.b},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z16\.b,z20\.b,z24\.b,z28\.b},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z17\.b,z21\.b,z25\.b,z29\.b},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z18\.b,z22\.b,z26\.b,z30\.b},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z19\.b,z23\.b,z27\.b,z31\.b},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b,z4\.b,z8\.b,z12\.b},pn15,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8,\[x30\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8,\[sp\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8,\[x0,#-32,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8,\[x0,#28,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z2\.b,z6\.b,z10\.b,z14\.b},pn14,\[x29,#8,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b-z1\.b},pn8,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b-z1\.b},pn8,\[x0,x1,lsl#0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {Z0\.B-Z1\.B},PN8,\[X0,X1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z30\.b-z31\.b},pn8,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b-z1\.b},pn15,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b-z1\.b},pn8,\[x30,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b-z1\.b},pn8,\[sp,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b-z1\.b},pn8,\[x0,x30\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b-z1\.b},pn8,\[x0,xzr\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z14\.b-z15\.b},pn9,\[x26,x3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b-z3\.b},pn8,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b-z3\.b},pn8,\[x0,x1,lsl#0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {Z0\.B-Z3\.B},PN8,\[X0,X1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z28\.b-z31\.b},pn8,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b-z3\.b},pn15,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b-z3\.b},pn8,\[x30,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b-z3\.b},pn8,\[sp,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b-z3\.b},pn8,\[x0,x30\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b-z3\.b},pn8,\[x0,xzr\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z8\.b-z11\.b},pn11,\[x27,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b,z8\.b},pn8,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b,z8\.b},pn8,\[x0,x1,lsl#0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {Z0\.B,Z8\.B},PN8,\[X0,X1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z1\.b,z9\.b},pn8,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z2\.b,z10\.b},pn8,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z3\.b,z11\.b},pn8,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z4\.b,z12\.b},pn8,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z5\.b,z13\.b},pn8,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z6\.b,z14\.b},pn8,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z7\.b,z15\.b},pn8,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z16\.b,z24\.b},pn8,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z17\.b,z25\.b},pn8,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z18\.b,z26\.b},pn8,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z19\.b,z27\.b},pn8,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z20\.b,z28\.b},pn8,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z21\.b,z29\.b},pn8,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z22\.b,z30\.b},pn8,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z23\.b,z31\.b},pn8,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b,z8\.b},pn15,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b,z8\.b},pn8,\[x30,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b,z8\.b},pn8,\[sp,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b,z8\.b},pn8,\[x0,x30\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b,z8\.b},pn8,\[x0,xzr\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z5\.b,z13\.b},pn14,\[x15,x24\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8,\[x0,x1,lsl#0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {Z0\.B,Z4\.B,Z8\.B,Z12\.B},PN8,\[X0,X1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z1\.b,z5\.b,z9\.b,z13\.b},pn8,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z2\.b,z6\.b,z10\.b,z14\.b},pn8,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z3\.b,z7\.b,z11\.b,z15\.b},pn8,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z16\.b,z20\.b,z24\.b,z28\.b},pn8,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z17\.b,z21\.b,z25\.b,z29\.b},pn8,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z18\.b,z22\.b,z26\.b,z30\.b},pn8,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z19\.b,z23\.b,z27\.b,z31\.b},pn8,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b,z4\.b,z8\.b,z12\.b},pn15,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8,\[x30,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8,\[sp,x1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8,\[x0,x30\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8,\[x0,xzr\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z17\.b,z21\.b,z25\.b,z29\.b},pn11,\[x4,x6\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z0\.b ?- ?z1\.b ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z0\.b ?- ?z1\.b ?},pn8/z,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?Z0\.B ?- ?Z1\.B ?},PN8/Z,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z30\.b ?- ?z31\.b ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z0\.b ?- ?z1\.b ?},pn15/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z0\.b ?- ?z1\.b ?},pn8/z,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z0\.b ?- ?z1\.b ?},pn8/z,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z0\.b ?- ?z1\.b ?},pn8/z,\[x0,#-16,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z0\.b ?- ?z1\.b ?},pn8/z,\[x0,#14,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z12\.b ?- ?z13\.b ?},pn13/z,\[x11,#-10,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z0\.b ?- ?z3\.b ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z0\.b ?- ?z3\.b ?},pn8/z,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?Z0\.B ?- ?Z3\.B ?},PN8/Z,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z28\.b ?- ?z31\.b ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z0\.b ?- ?z3\.b ?},pn15/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z0\.b ?- ?z3\.b ?},pn8/z,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z0\.b ?- ?z3\.b ?},pn8/z,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z0\.b ?- ?z3\.b ?},pn8/z,\[x0,#-32,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z0\.b ?- ?z3\.b ?},pn8/z,\[x0,#28,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z8\.b ?- ?z11\.b ?},pn11/z,\[x17,#20,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z0\.b,z8\.b ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z0\.b,z8\.b ?},pn8/z,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?Z0\.B,Z8\.B ?},PN8/Z,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z1\.b,z9\.b ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z2\.b,z10\.b ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z3\.b,z11\.b ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z4\.b,z12\.b ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z5\.b,z13\.b ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z6\.b,z14\.b ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z7\.b,z15\.b ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z16\.b,z24\.b ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z17\.b,z25\.b ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z18\.b,z26\.b ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z19\.b,z27\.b ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z20\.b,z28\.b ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z21\.b,z29\.b ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z22\.b,z30\.b ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z23\.b,z31\.b ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z0\.b,z8\.b ?},pn15/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z0\.b,z8\.b ?},pn8/z,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z0\.b,z8\.b ?},pn8/z,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z0\.b,z8\.b ?},pn8/z,\[x0,#-16,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z0\.b,z8\.b ?},pn8/z,\[x0,#14,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z3\.b,z11\.b ?},pn10/z,\[x22,#6,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8/z,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?Z0\.B,Z4\.B,Z8\.B,Z12\.B ?},PN8/Z,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z1\.b,z5\.b,z9\.b,z13\.b ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z2\.b,z6\.b,z10\.b,z14\.b ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z3\.b,z7\.b,z11\.b,z15\.b ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z16\.b,z20\.b,z24\.b,z28\.b ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z17\.b,z21\.b,z25\.b,z29\.b ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z18\.b,z22\.b,z26\.b,z30\.b ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z19\.b,z23\.b,z27\.b,z31\.b ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn15/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8/z,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8/z,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8/z,\[x0,#-32,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8/z,\[x0,#28,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z2\.b,z6\.b,z10\.b,z14\.b ?},pn14/z,\[x29,#8,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z0\.b ?- ?z1\.b ?},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z0\.b ?- ?z1\.b ?},pn8/z,\[x0,x1,lsl ?#0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?Z0\.B ?- ?Z1\.B ?},PN8/Z,\[X0,X1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z30\.b ?- ?z31\.b ?},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z0\.b ?- ?z1\.b ?},pn15/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z0\.b ?- ?z1\.b ?},pn8/z,\[x30,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z0\.b ?- ?z1\.b ?},pn8/z,\[sp,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z0\.b ?- ?z1\.b ?},pn8/z,\[x0,x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z0\.b ?- ?z1\.b ?},pn8/z,\[x0,xzr\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z14\.b ?- ?z15\.b ?},pn9/z,\[x26,x3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z0\.b ?- ?z3\.b ?},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z0\.b ?- ?z3\.b ?},pn8/z,\[x0,x1,lsl ?#0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?Z0\.B ?- ?Z3\.B ?},PN8/Z,\[X0,X1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z28\.b ?- ?z31\.b ?},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z0\.b ?- ?z3\.b ?},pn15/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z0\.b ?- ?z3\.b ?},pn8/z,\[x30,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z0\.b ?- ?z3\.b ?},pn8/z,\[sp,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z0\.b ?- ?z3\.b ?},pn8/z,\[x0,x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z0\.b ?- ?z3\.b ?},pn8/z,\[x0,xzr\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z8\.b ?- ?z11\.b ?},pn11/z,\[x27,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z0\.b,z8\.b ?},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z0\.b,z8\.b ?},pn8/z,\[x0,x1,lsl ?#0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?Z0\.B,Z8\.B ?},PN8/Z,\[X0,X1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z1\.b,z9\.b ?},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z2\.b,z10\.b ?},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z3\.b,z11\.b ?},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z4\.b,z12\.b ?},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z5\.b,z13\.b ?},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z6\.b,z14\.b ?},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z7\.b,z15\.b ?},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z16\.b,z24\.b ?},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z17\.b,z25\.b ?},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z18\.b,z26\.b ?},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z19\.b,z27\.b ?},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z20\.b,z28\.b ?},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z21\.b,z29\.b ?},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z22\.b,z30\.b ?},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z23\.b,z31\.b ?},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z0\.b,z8\.b ?},pn15/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z0\.b,z8\.b ?},pn8/z,\[x30,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z0\.b,z8\.b ?},pn8/z,\[sp,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z0\.b,z8\.b ?},pn8/z,\[x0,x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z0\.b,z8\.b ?},pn8/z,\[x0,xzr\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z5\.b,z13\.b ?},pn14/z,\[x15,x24\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8/z,\[x0,x1,lsl ?#0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?Z0\.B,Z4\.B,Z8\.B,Z12\.B ?},PN8/Z,\[X0,X1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z1\.b,z5\.b,z9\.b,z13\.b ?},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z2\.b,z6\.b,z10\.b,z14\.b ?},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z3\.b,z7\.b,z11\.b,z15\.b ?},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z16\.b,z20\.b,z24\.b,z28\.b ?},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z17\.b,z21\.b,z25\.b,z29\.b ?},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z18\.b,z22\.b,z26\.b,z30\.b ?},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z19\.b,z23\.b,z27\.b,z31\.b ?},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn15/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8/z,\[x30,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8/z,\[sp,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8/z,\[x0,x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8/z,\[x0,xzr\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z17\.b,z21\.b,z25\.b,z29\.b ?},pn11/z,\[x4,x6\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.b ?- ?z1\.b ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.b ?- ?z1\.b ?},pn8/z,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?Z0\.B ?- ?Z1\.B ?},PN8/Z,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z30\.b ?- ?z31\.b ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.b ?- ?z1\.b ?},pn15/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.b ?- ?z1\.b ?},pn8/z,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.b ?- ?z1\.b ?},pn8/z,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.b ?- ?z1\.b ?},pn8/z,\[x0,#-16,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.b ?- ?z1\.b ?},pn8/z,\[x0,#14,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z12\.b ?- ?z13\.b ?},pn13/z,\[x11,#-10,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.b ?- ?z3\.b ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.b ?- ?z3\.b ?},pn8/z,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?Z0\.B ?- ?Z3\.B ?},PN8/Z,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z28\.b ?- ?z31\.b ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.b ?- ?z3\.b ?},pn15/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.b ?- ?z3\.b ?},pn8/z,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.b ?- ?z3\.b ?},pn8/z,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.b ?- ?z3\.b ?},pn8/z,\[x0,#-32,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.b ?- ?z3\.b ?},pn8/z,\[x0,#28,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z8\.b ?- ?z11\.b ?},pn11/z,\[x17,#20,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.b,z8\.b ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.b,z8\.b ?},pn8/z,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?Z0\.B,Z8\.B ?},PN8/Z,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z1\.b,z9\.b ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z2\.b,z10\.b ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z3\.b,z11\.b ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z4\.b,z12\.b ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z5\.b,z13\.b ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z6\.b,z14\.b ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z7\.b,z15\.b ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z16\.b,z24\.b ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z17\.b,z25\.b ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z18\.b,z26\.b ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z19\.b,z27\.b ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z20\.b,z28\.b ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z21\.b,z29\.b ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z22\.b,z30\.b ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z23\.b,z31\.b ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.b,z8\.b ?},pn15/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.b,z8\.b ?},pn8/z,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.b,z8\.b ?},pn8/z,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.b,z8\.b ?},pn8/z,\[x0,#-16,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.b,z8\.b ?},pn8/z,\[x0,#14,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z3\.b,z11\.b ?},pn10/z,\[x22,#6,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8/z,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?Z0\.B,Z4\.B,Z8\.B,Z12\.B ?},PN8/Z,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z1\.b,z5\.b,z9\.b,z13\.b ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z2\.b,z6\.b,z10\.b,z14\.b ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z3\.b,z7\.b,z11\.b,z15\.b ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z16\.b,z20\.b,z24\.b,z28\.b ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z17\.b,z21\.b,z25\.b,z29\.b ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z18\.b,z22\.b,z26\.b,z30\.b ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z19\.b,z23\.b,z27\.b,z31\.b ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn15/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8/z,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8/z,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8/z,\[x0,#-32,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8/z,\[x0,#28,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z2\.b,z6\.b,z10\.b,z14\.b ?},pn14/z,\[x29,#8,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.b ?- ?z1\.b ?},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.b ?- ?z1\.b ?},pn8/z,\[x0,x1,lsl ?#0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?Z0\.B ?- ?Z1\.B ?},PN8/Z,\[X0,X1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z30\.b ?- ?z31\.b ?},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.b ?- ?z1\.b ?},pn15/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.b ?- ?z1\.b ?},pn8/z,\[x30,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.b ?- ?z1\.b ?},pn8/z,\[sp,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.b ?- ?z1\.b ?},pn8/z,\[x0,x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.b ?- ?z1\.b ?},pn8/z,\[x0,xzr\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z14\.b ?- ?z15\.b ?},pn9/z,\[x26,x3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.b ?- ?z3\.b ?},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.b ?- ?z3\.b ?},pn8/z,\[x0,x1,lsl ?#0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?Z0\.B ?- ?Z3\.B ?},PN8/Z,\[X0,X1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z28\.b ?- ?z31\.b ?},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.b ?- ?z3\.b ?},pn15/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.b ?- ?z3\.b ?},pn8/z,\[x30,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.b ?- ?z3\.b ?},pn8/z,\[sp,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.b ?- ?z3\.b ?},pn8/z,\[x0,x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.b ?- ?z3\.b ?},pn8/z,\[x0,xzr\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z8\.b ?- ?z11\.b ?},pn11/z,\[x27,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.b,z8\.b ?},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.b,z8\.b ?},pn8/z,\[x0,x1,lsl ?#0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?Z0\.B,Z8\.B ?},PN8/Z,\[X0,X1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z1\.b,z9\.b ?},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z2\.b,z10\.b ?},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z3\.b,z11\.b ?},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z4\.b,z12\.b ?},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z5\.b,z13\.b ?},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z6\.b,z14\.b ?},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z7\.b,z15\.b ?},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z16\.b,z24\.b ?},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z17\.b,z25\.b ?},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z18\.b,z26\.b ?},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z19\.b,z27\.b ?},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z20\.b,z28\.b ?},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z21\.b,z29\.b ?},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z22\.b,z30\.b ?},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z23\.b,z31\.b ?},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.b,z8\.b ?},pn15/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.b,z8\.b ?},pn8/z,\[x30,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.b,z8\.b ?},pn8/z,\[sp,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.b,z8\.b ?},pn8/z,\[x0,x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.b,z8\.b ?},pn8/z,\[x0,xzr\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z5\.b,z13\.b ?},pn14/z,\[x15,x24\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8/z,\[x0,x1,lsl ?#0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?Z0\.B,Z4\.B,Z8\.B,Z12\.B ?},PN8/Z,\[X0,X1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z1\.b,z5\.b,z9\.b,z13\.b ?},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z2\.b,z6\.b,z10\.b,z14\.b ?},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z3\.b,z7\.b,z11\.b,z15\.b ?},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z16\.b,z20\.b,z24\.b,z28\.b ?},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z17\.b,z21\.b,z25\.b,z29\.b ?},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z18\.b,z22\.b,z26\.b,z30\.b ?},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z19\.b,z23\.b,z27\.b,z31\.b ?},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn15/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8/z,\[x30,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8/z,\[sp,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8/z,\[x0,x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8/z,\[x0,xzr\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z17\.b,z21\.b,z25\.b,z29\.b ?},pn11/z,\[x4,x6\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z0\.b ?- ?z1\.b ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z0\.b ?- ?z1\.b ?},pn8,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?Z0\.B ?- ?Z1\.B ?},PN8,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z30\.b ?- ?z31\.b ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z0\.b ?- ?z1\.b ?},pn15,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z0\.b ?- ?z1\.b ?},pn8,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z0\.b ?- ?z1\.b ?},pn8,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z0\.b ?- ?z1\.b ?},pn8,\[x0,#-16,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z0\.b ?- ?z1\.b ?},pn8,\[x0,#14,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z12\.b ?- ?z13\.b ?},pn13,\[x11,#-10,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z0\.b ?- ?z3\.b ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z0\.b ?- ?z3\.b ?},pn8,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?Z0\.B ?- ?Z3\.B ?},PN8,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z28\.b ?- ?z31\.b ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z0\.b ?- ?z3\.b ?},pn15,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z0\.b ?- ?z3\.b ?},pn8,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z0\.b ?- ?z3\.b ?},pn8,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z0\.b ?- ?z3\.b ?},pn8,\[x0,#-32,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z0\.b ?- ?z3\.b ?},pn8,\[x0,#28,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z8\.b ?- ?z11\.b ?},pn11,\[x17,#20,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z0\.b,z8\.b ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z0\.b,z8\.b ?},pn8,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?Z0\.B,Z8\.B ?},PN8,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z1\.b,z9\.b ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z2\.b,z10\.b ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z3\.b,z11\.b ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z4\.b,z12\.b ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z5\.b,z13\.b ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z6\.b,z14\.b ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z7\.b,z15\.b ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z16\.b,z24\.b ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z17\.b,z25\.b ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z18\.b,z26\.b ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z19\.b,z27\.b ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z20\.b,z28\.b ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z21\.b,z29\.b ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z22\.b,z30\.b ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z23\.b,z31\.b ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z0\.b,z8\.b ?},pn15,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z0\.b,z8\.b ?},pn8,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z0\.b,z8\.b ?},pn8,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z0\.b,z8\.b ?},pn8,\[x0,#-16,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z0\.b,z8\.b ?},pn8,\[x0,#14,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z3\.b,z11\.b ?},pn10,\[x22,#6,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?Z0\.B,Z4\.B,Z8\.B,Z12\.B ?},PN8,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z1\.b,z5\.b,z9\.b,z13\.b ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z2\.b,z6\.b,z10\.b,z14\.b ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z3\.b,z7\.b,z11\.b,z15\.b ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z16\.b,z20\.b,z24\.b,z28\.b ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z17\.b,z21\.b,z25\.b,z29\.b ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z18\.b,z22\.b,z26\.b,z30\.b ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z19\.b,z23\.b,z27\.b,z31\.b ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn15,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8,\[x0,#-32,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8,\[x0,#28,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z2\.b,z6\.b,z10\.b,z14\.b ?},pn14,\[x29,#8,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z0\.b ?- ?z1\.b ?},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z0\.b ?- ?z1\.b ?},pn8,\[x0,x1,lsl ?#0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?Z0\.B ?- ?Z1\.B ?},PN8,\[X0,X1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z30\.b ?- ?z31\.b ?},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z0\.b ?- ?z1\.b ?},pn15,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z0\.b ?- ?z1\.b ?},pn8,\[x30,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z0\.b ?- ?z1\.b ?},pn8,\[sp,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z0\.b ?- ?z1\.b ?},pn8,\[x0,x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z0\.b ?- ?z1\.b ?},pn8,\[x0,xzr\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z14\.b ?- ?z15\.b ?},pn9,\[x26,x3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z0\.b ?- ?z3\.b ?},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z0\.b ?- ?z3\.b ?},pn8,\[x0,x1,lsl ?#0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?Z0\.B ?- ?Z3\.B ?},PN8,\[X0,X1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z28\.b ?- ?z31\.b ?},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z0\.b ?- ?z3\.b ?},pn15,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z0\.b ?- ?z3\.b ?},pn8,\[x30,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z0\.b ?- ?z3\.b ?},pn8,\[sp,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z0\.b ?- ?z3\.b ?},pn8,\[x0,x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z0\.b ?- ?z3\.b ?},pn8,\[x0,xzr\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z8\.b ?- ?z11\.b ?},pn11,\[x27,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z0\.b,z8\.b ?},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z0\.b,z8\.b ?},pn8,\[x0,x1,lsl ?#0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?Z0\.B,Z8\.B ?},PN8,\[X0,X1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z1\.b,z9\.b ?},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z2\.b,z10\.b ?},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z3\.b,z11\.b ?},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z4\.b,z12\.b ?},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z5\.b,z13\.b ?},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z6\.b,z14\.b ?},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z7\.b,z15\.b ?},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z16\.b,z24\.b ?},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z17\.b,z25\.b ?},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z18\.b,z26\.b ?},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z19\.b,z27\.b ?},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z20\.b,z28\.b ?},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z21\.b,z29\.b ?},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z22\.b,z30\.b ?},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z23\.b,z31\.b ?},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z0\.b,z8\.b ?},pn15,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z0\.b,z8\.b ?},pn8,\[x30,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z0\.b,z8\.b ?},pn8,\[sp,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z0\.b,z8\.b ?},pn8,\[x0,x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z0\.b,z8\.b ?},pn8,\[x0,xzr\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z5\.b,z13\.b ?},pn14,\[x15,x24\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8,\[x0,x1,lsl ?#0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?Z0\.B,Z4\.B,Z8\.B,Z12\.B ?},PN8,\[X0,X1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z1\.b,z5\.b,z9\.b,z13\.b ?},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z2\.b,z6\.b,z10\.b,z14\.b ?},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z3\.b,z7\.b,z11\.b,z15\.b ?},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z16\.b,z20\.b,z24\.b,z28\.b ?},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z17\.b,z21\.b,z25\.b,z29\.b ?},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z18\.b,z22\.b,z26\.b,z30\.b ?},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z19\.b,z23\.b,z27\.b,z31\.b ?},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn15,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8,\[x30,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8,\[sp,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8,\[x0,x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8,\[x0,xzr\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z17\.b,z21\.b,z25\.b,z29\.b ?},pn11,\[x4,x6\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.b ?- ?z1\.b ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.b ?- ?z1\.b ?},pn8,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?Z0\.B ?- ?Z1\.B ?},PN8,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z30\.b ?- ?z31\.b ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.b ?- ?z1\.b ?},pn15,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.b ?- ?z1\.b ?},pn8,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.b ?- ?z1\.b ?},pn8,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.b ?- ?z1\.b ?},pn8,\[x0,#-16,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.b ?- ?z1\.b ?},pn8,\[x0,#14,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z12\.b ?- ?z13\.b ?},pn13,\[x11,#-10,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.b ?- ?z3\.b ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.b ?- ?z3\.b ?},pn8,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?Z0\.B ?- ?Z3\.B ?},PN8,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z28\.b ?- ?z31\.b ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.b ?- ?z3\.b ?},pn15,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.b ?- ?z3\.b ?},pn8,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.b ?- ?z3\.b ?},pn8,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.b ?- ?z3\.b ?},pn8,\[x0,#-32,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.b ?- ?z3\.b ?},pn8,\[x0,#28,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z8\.b ?- ?z11\.b ?},pn11,\[x17,#20,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.b,z8\.b ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.b,z8\.b ?},pn8,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?Z0\.B,Z8\.B ?},PN8,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z1\.b,z9\.b ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z2\.b,z10\.b ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z3\.b,z11\.b ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z4\.b,z12\.b ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z5\.b,z13\.b ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z6\.b,z14\.b ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z7\.b,z15\.b ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z16\.b,z24\.b ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z17\.b,z25\.b ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z18\.b,z26\.b ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z19\.b,z27\.b ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z20\.b,z28\.b ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z21\.b,z29\.b ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z22\.b,z30\.b ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z23\.b,z31\.b ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.b,z8\.b ?},pn15,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.b,z8\.b ?},pn8,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.b,z8\.b ?},pn8,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.b,z8\.b ?},pn8,\[x0,#-16,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.b,z8\.b ?},pn8,\[x0,#14,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z3\.b,z11\.b ?},pn10,\[x22,#6,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?Z0\.B,Z4\.B,Z8\.B,Z12\.B ?},PN8,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z1\.b,z5\.b,z9\.b,z13\.b ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z2\.b,z6\.b,z10\.b,z14\.b ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z3\.b,z7\.b,z11\.b,z15\.b ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z16\.b,z20\.b,z24\.b,z28\.b ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z17\.b,z21\.b,z25\.b,z29\.b ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z18\.b,z22\.b,z26\.b,z30\.b ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z19\.b,z23\.b,z27\.b,z31\.b ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn15,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8,\[x0,#-32,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8,\[x0,#28,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z2\.b,z6\.b,z10\.b,z14\.b ?},pn14,\[x29,#8,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.b ?- ?z1\.b ?},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.b ?- ?z1\.b ?},pn8,\[x0,x1,lsl ?#0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?Z0\.B ?- ?Z1\.B ?},PN8,\[X0,X1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z30\.b ?- ?z31\.b ?},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.b ?- ?z1\.b ?},pn15,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.b ?- ?z1\.b ?},pn8,\[x30,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.b ?- ?z1\.b ?},pn8,\[sp,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.b ?- ?z1\.b ?},pn8,\[x0,x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.b ?- ?z1\.b ?},pn8,\[x0,xzr\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z14\.b ?- ?z15\.b ?},pn9,\[x26,x3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.b ?- ?z3\.b ?},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.b ?- ?z3\.b ?},pn8,\[x0,x1,lsl ?#0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?Z0\.B ?- ?Z3\.B ?},PN8,\[X0,X1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z28\.b ?- ?z31\.b ?},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.b ?- ?z3\.b ?},pn15,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.b ?- ?z3\.b ?},pn8,\[x30,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.b ?- ?z3\.b ?},pn8,\[sp,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.b ?- ?z3\.b ?},pn8,\[x0,x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.b ?- ?z3\.b ?},pn8,\[x0,xzr\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z8\.b ?- ?z11\.b ?},pn11,\[x27,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.b,z8\.b ?},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.b,z8\.b ?},pn8,\[x0,x1,lsl ?#0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?Z0\.B,Z8\.B ?},PN8,\[X0,X1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z1\.b,z9\.b ?},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z2\.b,z10\.b ?},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z3\.b,z11\.b ?},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z4\.b,z12\.b ?},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z5\.b,z13\.b ?},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z6\.b,z14\.b ?},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z7\.b,z15\.b ?},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z16\.b,z24\.b ?},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z17\.b,z25\.b ?},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z18\.b,z26\.b ?},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z19\.b,z27\.b ?},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z20\.b,z28\.b ?},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z21\.b,z29\.b ?},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z22\.b,z30\.b ?},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z23\.b,z31\.b ?},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.b,z8\.b ?},pn15,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.b,z8\.b ?},pn8,\[x30,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.b,z8\.b ?},pn8,\[sp,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.b,z8\.b ?},pn8,\[x0,x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.b,z8\.b ?},pn8,\[x0,xzr\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z5\.b,z13\.b ?},pn14,\[x15,x24\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8,\[x0,x1,lsl ?#0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?Z0\.B,Z4\.B,Z8\.B,Z12\.B ?},PN8,\[X0,X1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z1\.b,z5\.b,z9\.b,z13\.b ?},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z2\.b,z6\.b,z10\.b,z14\.b ?},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z3\.b,z7\.b,z11\.b,z15\.b ?},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z16\.b,z20\.b,z24\.b,z28\.b ?},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z17\.b,z21\.b,z25\.b,z29\.b ?},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z18\.b,z22\.b,z26\.b,z30\.b ?},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z19\.b,z23\.b,z27\.b,z31\.b ?},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn15,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8,\[x30,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8,\[sp,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8,\[x0,x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8,\[x0,xzr\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z17\.b,z21\.b,z25\.b,z29\.b ?},pn11,\[x4,x6\]'
diff --git a/gas/testsuite/gas/aarch64/sme2-20-invalid.l b/gas/testsuite/gas/aarch64/sme2-20-invalid.l
index cea4476..1e33ee6 100644
--- a/gas/testsuite/gas/aarch64/sme2-20-invalid.l
+++ b/gas/testsuite/gas/aarch64/sme2-20-invalid.l
@@ -1,27 +1,27 @@
 [^ :]+: Assembler messages:
-[^ :]+:[0-9]+: Error: expected a ZA array vector at operand 1 -- `suvdot 0,{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: expected a ZA array vector at operand 1 -- `suvdot 0,{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]'
 [^ :]+:[0-9]+: Error: expected '{' at operand 2 -- `suvdot za\.s\[w8,0\],0,z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `suvdot za\.s\[w8,0\],{z0\.b-z3\.b},0'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `suvdot za\.s\[w8,0\],{ ?z0\.b ?- ?z3\.b ?},0'
 [^ :]+:[0-9]+: Error: missing braces at operand 2 -- `suvdot za\.h\[w8,0\],z0\.h,z0\.h'
-[^ :]+:[0-9]+: Error: operand 3 must be an indexed SVE vector register -- `suvdot za\.h\[w8,0\],{z0\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: operand mismatch -- `suvdot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: operand 3 must be an indexed SVE vector register -- `suvdot za\.h\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: operand mismatch -- `suvdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	suvdot za\.s\[w8, 0\], {z0\.b-z1\.b}, z0\.b\[0\]
-[^ :]+:[0-9]+: Error: operand mismatch -- `suvdot za\.s\[w8,0:1\],{z0\.b-z3\.b},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `suvdot za\.s\[w8,0:1\],{ ?z0\.b ?- ?z3\.b ?},z0\.h\[0\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	suvdot za\.s\[w8, 0:1\], {z0\.b-z3\.b}, z0\.b\[0\]
-[^ :]+:[0-9]+: Error: operand mismatch -- `suvdot za\.s\[w8,0,vgx4\],{z0\.b-z3\.b},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `suvdot za\.s\[w8,0,vgx4\],{ ?z0\.b ?- ?z3\.b ?},z0\.h\[0\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	suvdot za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
-[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `suvdot za\.s\[w7,0\],{z0\.b-z3\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `suvdot za\.s\[w12,0\],{z0\.b-z3\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `suvdot za\.s\[w8,-1\],{z0\.b-z3\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `suvdot za\.s\[w8,8\],{z0\.b-z3\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `suvdot za\.s\[w8,0\],{z0\.b-z1\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `suvdot za\.s\[w8,0\],{z0\.b-z2\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `suvdot za\.s\[w8,0\],{z1\.b-z4\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `suvdot za\.s\[w8,0\],{z2\.b-z5\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `suvdot za\.s\[w8,0\],{z3\.b-z6\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `suvdot za\.s\[w8,0\],{z0\.b-z3\.b},z0\.b\[-1\]'
-[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `suvdot za\.s\[w8,0\],{z0\.b-z3\.b},z0\.b\[4\]'
-[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `suvdot za\.s\[w8,0\],{z0\.b-z3\.b},z16\.b\[0\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `suvdot za\.s\[w7,0\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `suvdot za\.s\[w12,0\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `suvdot za\.s\[w8,-1\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `suvdot za\.s\[w8,8\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `suvdot za\.s\[w8,0\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `suvdot za\.s\[w8,0\],{ ?z0\.b ?- ?z2\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `suvdot za\.s\[w8,0\],{ ?z1\.b ?- ?z4\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `suvdot za\.s\[w8,0\],{ ?z2\.b ?- ?z5\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `suvdot za\.s\[w8,0\],{ ?z3\.b ?- ?z6\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `suvdot za\.s\[w8,0\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[-1\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `suvdot za\.s\[w8,0\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[4\]'
+[^ :]+:[0-9]+: Error: z0 ?- ?z15 expected at operand 3 -- `suvdot za\.s\[w8,0\],{ ?z0\.b ?- ?z3\.b ?},z16\.b\[0\]'
diff --git a/gas/testsuite/gas/aarch64/sme2-20-noarch.l b/gas/testsuite/gas/aarch64/sme2-20-noarch.l
index 8b268d3..5bc80d5 100644
--- a/gas/testsuite/gas/aarch64/sme2-20-noarch.l
+++ b/gas/testsuite/gas/aarch64/sme2-20-noarch.l
@@ -1,21 +1,21 @@
 [^ :]+: Assembler messages:
-[^ :]+:[0-9]+: Error: selected processor does not support `suvdot za\.s\[w8,0\],{z0\.b-z3\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `suvdot za\.s\[w8,0,vgx4\],{z0\.b-z3\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `suvdot ZA\.s\[W8,0,VGx4\],{Z0\.b-Z3\.b},Z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `suvdot ZA\.S\[W8,0,VGX4\],{Z0\.B-Z3\.B},Z0\.B\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `suvdot za\.s\[w11,0\],{z0\.b-z3\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `suvdot za\.s\[w8,7\],{z0\.b-z3\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `suvdot za\.s\[w8,0\],{z28\.b-z31\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `suvdot za\.s\[w8,0\],{z0\.b-z3\.b},z15\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `suvdot za\.s\[w8,0\],{z0\.b-z3\.b},z0\.b\[3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `suvdot za\.s\[w9,1\],{z4\.b-z7\.b},z10\.b\[2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `usvdot za\.s\[w8,0\],{z0\.b-z3\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `usvdot za\.s\[w8,0,vgx4\],{z0\.b-z3\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `usvdot ZA\.s\[W8,0,VGx4\],{Z0\.b-Z3\.b},Z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `usvdot ZA\.S\[W8,0,VGX4\],{Z0\.B-Z3\.B},Z0\.B\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `usvdot za\.s\[w11,0\],{z0\.b-z3\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `usvdot za\.s\[w8,7\],{z0\.b-z3\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `usvdot za\.s\[w8,0\],{z28\.b-z31\.b},z0\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `usvdot za\.s\[w8,0\],{z0\.b-z3\.b},z15\.b\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `usvdot za\.s\[w8,0\],{z0\.b-z3\.b},z0\.b\[3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `usvdot za\.s\[w9,1\],{z4\.b-z7\.b},z10\.b\[2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `suvdot za\.s\[w8,0\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `suvdot za\.s\[w8,0,vgx4\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `suvdot ZA\.s\[W8,0,VGx4\],{ ?Z0\.b ?- ?Z3\.b ?},Z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `suvdot ZA\.S\[W8,0,VGX4\],{ ?Z0\.B ?- ?Z3\.B ?},Z0\.B\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `suvdot za\.s\[w11,0\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `suvdot za\.s\[w8,7\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `suvdot za\.s\[w8,0\],{ ?z28\.b ?- ?z31\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `suvdot za\.s\[w8,0\],{ ?z0\.b ?- ?z3\.b ?},z15\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `suvdot za\.s\[w8,0\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `suvdot za\.s\[w9,1\],{ ?z4\.b ?- ?z7\.b ?},z10\.b\[2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usvdot za\.s\[w8,0\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usvdot za\.s\[w8,0,vgx4\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usvdot ZA\.s\[W8,0,VGx4\],{ ?Z0\.b ?- ?Z3\.b ?},Z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usvdot ZA\.S\[W8,0,VGX4\],{ ?Z0\.B ?- ?Z3\.B ?},Z0\.B\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usvdot za\.s\[w11,0\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usvdot za\.s\[w8,7\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usvdot za\.s\[w8,0\],{ ?z28\.b ?- ?z31\.b ?},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usvdot za\.s\[w8,0\],{ ?z0\.b ?- ?z3\.b ?},z15\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usvdot za\.s\[w8,0\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usvdot za\.s\[w9,1\],{ ?z4\.b ?- ?z7\.b ?},z10\.b\[2\]'
diff --git a/gas/testsuite/gas/aarch64/sme2-22-invalid.l b/gas/testsuite/gas/aarch64/sme2-22-invalid.l
index 6f799c1..0dbbf6c 100644
--- a/gas/testsuite/gas/aarch64/sme2-22-invalid.l
+++ b/gas/testsuite/gas/aarch64/sme2-22-invalid.l
@@ -1,27 +1,27 @@
 [^ :]+: Assembler messages:
 [^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `fclamp 0,z0\.h,z0\.h'
-[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 2 -- `fclamp {z0\.h-z1\.h},0,z0\.h'
-[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `fclamp {z0\.h-z1\.h},z0\.h,0'
-[^ :]+:[0-9]+: Error: operand mismatch -- `fclamp {z0\.b-z1\.b},z0\.b,z0\.b'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 2 -- `fclamp { ?z0\.h ?- ?z1\.h ?},0,z0\.h'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `fclamp { ?z0\.h ?- ?z1\.h ?},z0\.h,0'
+[^ :]+:[0-9]+: Error: operand mismatch -- `fclamp { ?z0\.b ?- ?z1\.b ?},z0\.b,z0\.b'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	fclamp {z0\.h-z1\.h}, z0\.h, z0\.h
 [^ :]+:[0-9]+: Info:    other valid variant\(s\):
 [^ :]+:[0-9]+: Info:    	fclamp {z0\.s-z1\.s}, z0\.s, z0\.s
 [^ :]+:[0-9]+: Info:    	fclamp {z0\.d-z1\.d}, z0\.d, z0\.d
-[^ :]+:[0-9]+: Error: operand mismatch -- `fclamp {z0\.b-z3\.b},z0\.b,z0\.b'
+[^ :]+:[0-9]+: Error: operand mismatch -- `fclamp { ?z0\.b ?- ?z3\.b ?},z0\.b,z0\.b'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	fclamp {z0\.h-z3\.h}, z0\.h, z0\.h
 [^ :]+:[0-9]+: Info:    other valid variant\(s\):
 [^ :]+:[0-9]+: Info:    	fclamp {z0\.s-z3\.s}, z0\.s, z0\.s
 [^ :]+:[0-9]+: Info:    	fclamp {z0\.d-z3\.d}, z0\.d, z0\.d
-[^ :]+:[0-9]+: Error: operand mismatch -- `fclamp {z0\.q-z1\.q},z0\.q,z0\.q'
+[^ :]+:[0-9]+: Error: operand mismatch -- `fclamp { ?z0\.q ?- ?z1\.q ?},z0\.q,z0\.q'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	fclamp {z0\.h-z1\.h}, z0\.h, z0\.h
 [^ :]+:[0-9]+: Info:    other valid variant\(s\):
 [^ :]+:[0-9]+: Info:    	fclamp {z0\.s-z1\.s}, z0\.s, z0\.s
 [^ :]+:[0-9]+: Info:    	fclamp {z0\.d-z1\.d}, z0\.d, z0\.d
-[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 1 -- `fclamp {z0\.h-z2\.h},z0\.h,z0\.h'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `fclamp {z1\.h-z2\.h},z0\.h,z0\.h'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `fclamp {z1\.h-z4\.h},z0\.h,z0\.h'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `fclamp {z2\.h-z5\.h},z0\.h,z0\.h'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `fclamp {z3\.h-z6\.h},z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 1 -- `fclamp { ?z0\.h ?- ?z2\.h ?},z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `fclamp { ?z1\.h ?- ?z2\.h ?},z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `fclamp { ?z1\.h ?- ?z4\.h ?},z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `fclamp { ?z2\.h ?- ?z5\.h ?},z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `fclamp { ?z3\.h ?- ?z6\.h ?},z0\.h,z0\.h'
diff --git a/gas/testsuite/gas/aarch64/sme2-22-noarch.l b/gas/testsuite/gas/aarch64/sme2-22-noarch.l
index f313ad0..4d6e445 100644
--- a/gas/testsuite/gas/aarch64/sme2-22-noarch.l
+++ b/gas/testsuite/gas/aarch64/sme2-22-noarch.l
@@ -1,111 +1,111 @@
 [^ :]+: Assembler messages:
-[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z0\.h-z1\.h},z0\.h,z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z30\.h-z31\.h},z0\.h,z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z0\.h-z1\.h},z31\.h,z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z0\.h-z1\.h},z0\.h,z31\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z8\.h-z9\.h},z26\.h,z4\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z0\.s-z1\.s},z0\.s,z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z30\.s-z31\.s},z0\.s,z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z0\.s-z1\.s},z31\.s,z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z0\.s-z1\.s},z0\.s,z31\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z18\.s-z19\.s},z9\.s,z14\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z0\.d-z1\.d},z0\.d,z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z30\.d-z31\.d},z0\.d,z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z0\.d-z1\.d},z31\.d,z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z0\.d-z1\.d},z0\.d,z31\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z10\.d-z11\.d},z11\.d,z22\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z0\.h-z3\.h},z0\.h,z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z28\.h-z31\.h},z0\.h,z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z0\.h-z3\.h},z31\.h,z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z0\.h-z3\.h},z0\.h,z31\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z20\.h-z23\.h},z15\.h,z17\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z0\.s-z3\.s},z0\.s,z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z28\.s-z31\.s},z0\.s,z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z0\.s-z3\.s},z31\.s,z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z0\.s-z3\.s},z0\.s,z31\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z24\.s-z27\.s},z29\.s,z6\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z0\.d-z3\.d},z0\.d,z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z28\.d-z31\.d},z0\.d,z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z0\.d-z3\.d},z31\.d,z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z0\.d-z3\.d},z0\.d,z31\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z8\.d-z11\.d},z7\.d,z30\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.b-z1\.b},z0\.b,z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z30\.b-z31\.b},z0\.b,z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.b-z1\.b},z31\.b,z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.b-z1\.b},z0\.b,z31\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z2\.b-z3\.b},z21\.b,z9\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.h-z1\.h},z0\.h,z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z30\.h-z31\.h},z0\.h,z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.h-z1\.h},z31\.h,z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.h-z1\.h},z0\.h,z31\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z8\.h-z9\.h},z26\.h,z4\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.s-z1\.s},z0\.s,z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z30\.s-z31\.s},z0\.s,z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.s-z1\.s},z31\.s,z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.s-z1\.s},z0\.s,z31\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z18\.s-z19\.s},z9\.s,z14\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.d-z1\.d},z0\.d,z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z30\.d-z31\.d},z0\.d,z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.d-z1\.d},z31\.d,z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.d-z1\.d},z0\.d,z31\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z10\.d-z11\.d},z11\.d,z22\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.b-z3\.b},z0\.b,z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z28\.b-z31\.b},z0\.b,z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.b-z3\.b},z31\.b,z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.b-z3\.b},z0\.b,z31\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z4\.b-z7\.b},z19\.b,z26\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.h-z3\.h},z0\.h,z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z28\.h-z31\.h},z0\.h,z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.h-z3\.h},z31\.h,z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.h-z3\.h},z0\.h,z31\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z20\.h-z23\.h},z15\.h,z17\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.s-z3\.s},z0\.s,z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z28\.s-z31\.s},z0\.s,z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.s-z3\.s},z31\.s,z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.s-z3\.s},z0\.s,z31\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z24\.s-z27\.s},z29\.s,z6\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.d-z3\.d},z0\.d,z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z28\.d-z31\.d},z0\.d,z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.d-z3\.d},z31\.d,z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.d-z3\.d},z0\.d,z31\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z8\.d-z11\.d},z7\.d,z30\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.b-z1\.b},z0\.b,z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z30\.b-z31\.b},z0\.b,z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.b-z1\.b},z31\.b,z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.b-z1\.b},z0\.b,z31\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z2\.b-z3\.b},z21\.b,z9\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.h-z1\.h},z0\.h,z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z30\.h-z31\.h},z0\.h,z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.h-z1\.h},z31\.h,z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.h-z1\.h},z0\.h,z31\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z8\.h-z9\.h},z26\.h,z4\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.s-z1\.s},z0\.s,z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z30\.s-z31\.s},z0\.s,z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.s-z1\.s},z31\.s,z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.s-z1\.s},z0\.s,z31\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z18\.s-z19\.s},z9\.s,z14\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.d-z1\.d},z0\.d,z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z30\.d-z31\.d},z0\.d,z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.d-z1\.d},z31\.d,z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.d-z1\.d},z0\.d,z31\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z10\.d-z11\.d},z11\.d,z22\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.b-z3\.b},z0\.b,z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z28\.b-z31\.b},z0\.b,z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.b-z3\.b},z31\.b,z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.b-z3\.b},z0\.b,z31\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z4\.b-z7\.b},z19\.b,z26\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.h-z3\.h},z0\.h,z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z28\.h-z31\.h},z0\.h,z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.h-z3\.h},z31\.h,z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.h-z3\.h},z0\.h,z31\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z20\.h-z23\.h},z15\.h,z17\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.s-z3\.s},z0\.s,z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z28\.s-z31\.s},z0\.s,z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.s-z3\.s},z31\.s,z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.s-z3\.s},z0\.s,z31\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z24\.s-z27\.s},z29\.s,z6\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.d-z3\.d},z0\.d,z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z28\.d-z31\.d},z0\.d,z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.d-z3\.d},z31\.d,z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.d-z3\.d},z0\.d,z31\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z8\.d-z11\.d},z7\.d,z30\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp { ?z0\.h ?- ?z1\.h ?},z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp { ?z30\.h ?- ?z31\.h ?},z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp { ?z0\.h ?- ?z1\.h ?},z31\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp { ?z0\.h ?- ?z1\.h ?},z0\.h,z31\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp { ?z8\.h ?- ?z9\.h ?},z26\.h,z4\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp { ?z0\.s ?- ?z1\.s ?},z0\.s,z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp { ?z30\.s ?- ?z31\.s ?},z0\.s,z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp { ?z0\.s ?- ?z1\.s ?},z31\.s,z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp { ?z0\.s ?- ?z1\.s ?},z0\.s,z31\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp { ?z18\.s ?- ?z19\.s ?},z9\.s,z14\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp { ?z0\.d ?- ?z1\.d ?},z0\.d,z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp { ?z30\.d ?- ?z31\.d ?},z0\.d,z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp { ?z0\.d ?- ?z1\.d ?},z31\.d,z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp { ?z0\.d ?- ?z1\.d ?},z0\.d,z31\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp { ?z10\.d ?- ?z11\.d ?},z11\.d,z22\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp { ?z0\.h ?- ?z3\.h ?},z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp { ?z28\.h ?- ?z31\.h ?},z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp { ?z0\.h ?- ?z3\.h ?},z31\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp { ?z0\.h ?- ?z3\.h ?},z0\.h,z31\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp { ?z20\.h ?- ?z23\.h ?},z15\.h,z17\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp { ?z0\.s ?- ?z3\.s ?},z0\.s,z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp { ?z28\.s ?- ?z31\.s ?},z0\.s,z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp { ?z0\.s ?- ?z3\.s ?},z31\.s,z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp { ?z0\.s ?- ?z3\.s ?},z0\.s,z31\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp { ?z24\.s ?- ?z27\.s ?},z29\.s,z6\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp { ?z0\.d ?- ?z3\.d ?},z0\.d,z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp { ?z28\.d ?- ?z31\.d ?},z0\.d,z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp { ?z0\.d ?- ?z3\.d ?},z31\.d,z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp { ?z0\.d ?- ?z3\.d ?},z0\.d,z31\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp { ?z8\.d ?- ?z11\.d ?},z7\.d,z30\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp { ?z0\.b ?- ?z1\.b ?},z0\.b,z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp { ?z30\.b ?- ?z31\.b ?},z0\.b,z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp { ?z0\.b ?- ?z1\.b ?},z31\.b,z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp { ?z0\.b ?- ?z1\.b ?},z0\.b,z31\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp { ?z2\.b ?- ?z3\.b ?},z21\.b,z9\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp { ?z0\.h ?- ?z1\.h ?},z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp { ?z30\.h ?- ?z31\.h ?},z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp { ?z0\.h ?- ?z1\.h ?},z31\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp { ?z0\.h ?- ?z1\.h ?},z0\.h,z31\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp { ?z8\.h ?- ?z9\.h ?},z26\.h,z4\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp { ?z0\.s ?- ?z1\.s ?},z0\.s,z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp { ?z30\.s ?- ?z31\.s ?},z0\.s,z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp { ?z0\.s ?- ?z1\.s ?},z31\.s,z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp { ?z0\.s ?- ?z1\.s ?},z0\.s,z31\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp { ?z18\.s ?- ?z19\.s ?},z9\.s,z14\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp { ?z0\.d ?- ?z1\.d ?},z0\.d,z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp { ?z30\.d ?- ?z31\.d ?},z0\.d,z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp { ?z0\.d ?- ?z1\.d ?},z31\.d,z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp { ?z0\.d ?- ?z1\.d ?},z0\.d,z31\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp { ?z10\.d ?- ?z11\.d ?},z11\.d,z22\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp { ?z0\.b ?- ?z3\.b ?},z0\.b,z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp { ?z28\.b ?- ?z31\.b ?},z0\.b,z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp { ?z0\.b ?- ?z3\.b ?},z31\.b,z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp { ?z0\.b ?- ?z3\.b ?},z0\.b,z31\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp { ?z4\.b ?- ?z7\.b ?},z19\.b,z26\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp { ?z0\.h ?- ?z3\.h ?},z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp { ?z28\.h ?- ?z31\.h ?},z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp { ?z0\.h ?- ?z3\.h ?},z31\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp { ?z0\.h ?- ?z3\.h ?},z0\.h,z31\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp { ?z20\.h ?- ?z23\.h ?},z15\.h,z17\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp { ?z0\.s ?- ?z3\.s ?},z0\.s,z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp { ?z28\.s ?- ?z31\.s ?},z0\.s,z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp { ?z0\.s ?- ?z3\.s ?},z31\.s,z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp { ?z0\.s ?- ?z3\.s ?},z0\.s,z31\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp { ?z24\.s ?- ?z27\.s ?},z29\.s,z6\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp { ?z0\.d ?- ?z3\.d ?},z0\.d,z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp { ?z28\.d ?- ?z31\.d ?},z0\.d,z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp { ?z0\.d ?- ?z3\.d ?},z31\.d,z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp { ?z0\.d ?- ?z3\.d ?},z0\.d,z31\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp { ?z8\.d ?- ?z11\.d ?},z7\.d,z30\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp { ?z0\.b ?- ?z1\.b ?},z0\.b,z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp { ?z30\.b ?- ?z31\.b ?},z0\.b,z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp { ?z0\.b ?- ?z1\.b ?},z31\.b,z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp { ?z0\.b ?- ?z1\.b ?},z0\.b,z31\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp { ?z2\.b ?- ?z3\.b ?},z21\.b,z9\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp { ?z0\.h ?- ?z1\.h ?},z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp { ?z30\.h ?- ?z31\.h ?},z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp { ?z0\.h ?- ?z1\.h ?},z31\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp { ?z0\.h ?- ?z1\.h ?},z0\.h,z31\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp { ?z8\.h ?- ?z9\.h ?},z26\.h,z4\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp { ?z0\.s ?- ?z1\.s ?},z0\.s,z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp { ?z30\.s ?- ?z31\.s ?},z0\.s,z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp { ?z0\.s ?- ?z1\.s ?},z31\.s,z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp { ?z0\.s ?- ?z1\.s ?},z0\.s,z31\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp { ?z18\.s ?- ?z19\.s ?},z9\.s,z14\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp { ?z0\.d ?- ?z1\.d ?},z0\.d,z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp { ?z30\.d ?- ?z31\.d ?},z0\.d,z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp { ?z0\.d ?- ?z1\.d ?},z31\.d,z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp { ?z0\.d ?- ?z1\.d ?},z0\.d,z31\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp { ?z10\.d ?- ?z11\.d ?},z11\.d,z22\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp { ?z0\.b ?- ?z3\.b ?},z0\.b,z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp { ?z28\.b ?- ?z31\.b ?},z0\.b,z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp { ?z0\.b ?- ?z3\.b ?},z31\.b,z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp { ?z0\.b ?- ?z3\.b ?},z0\.b,z31\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp { ?z4\.b ?- ?z7\.b ?},z19\.b,z26\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp { ?z0\.h ?- ?z3\.h ?},z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp { ?z28\.h ?- ?z31\.h ?},z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp { ?z0\.h ?- ?z3\.h ?},z31\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp { ?z0\.h ?- ?z3\.h ?},z0\.h,z31\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp { ?z20\.h ?- ?z23\.h ?},z15\.h,z17\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp { ?z0\.s ?- ?z3\.s ?},z0\.s,z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp { ?z28\.s ?- ?z31\.s ?},z0\.s,z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp { ?z0\.s ?- ?z3\.s ?},z31\.s,z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp { ?z0\.s ?- ?z3\.s ?},z0\.s,z31\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp { ?z24\.s ?- ?z27\.s ?},z29\.s,z6\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp { ?z0\.d ?- ?z3\.d ?},z0\.d,z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp { ?z28\.d ?- ?z31\.d ?},z0\.d,z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp { ?z0\.d ?- ?z3\.d ?},z31\.d,z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp { ?z0\.d ?- ?z3\.d ?},z0\.d,z31\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp { ?z8\.d ?- ?z11\.d ?},z7\.d,z30\.d'
diff --git a/gas/testsuite/gas/aarch64/sme2-23-invalid.l b/gas/testsuite/gas/aarch64/sme2-23-invalid.l
index b3e9312..9508247 100644
--- a/gas/testsuite/gas/aarch64/sme2-23-invalid.l
+++ b/gas/testsuite/gas/aarch64/sme2-23-invalid.l
@@ -1,14 +1,14 @@
 [^ :]+: Assembler messages:
-[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `fcvtzs 0,{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: expected '{' at operand 2 -- `fcvtzs {z0\.s,z1\.s},0'
-[^ :]+:[0-9]+: Error: operand mismatch -- `fcvtzs {z0\.s,z1\.s},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `fcvtzs 0,{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: expected '{' at operand 2 -- `fcvtzs { ?z0\.s,z1\.s ?},0'
+[^ :]+:[0-9]+: Error: operand mismatch -- `fcvtzs { ?z0\.s,z1\.s ?},{ ?z0\.h ?- ?z1\.h ?}'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	fcvtzs {z0\.s-z1\.s}, {z0\.s-z1\.s}
-[^ :]+:[0-9]+: Error: operand mismatch -- `fcvtzs {z30\.h,z31\.h},{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: operand mismatch -- `fcvtzs { ?z30\.h,z31\.h ?},{ ?z0\.s ?- ?z1\.s ?}'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	fcvtzs {z30\.s-z31\.s}, {z0\.s-z1\.s}
-[^ :]+:[0-9]+: Error: operand mismatch -- `fcvtzs {z0\.d,z1\.d},{z30\.d-z31\.d}'
+[^ :]+:[0-9]+: Error: operand mismatch -- `fcvtzs { ?z0\.d,z1\.d ?},{ ?z30\.d ?- ?z31\.d ?}'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	fcvtzs {z0\.s-z1\.s}, {z30\.s-z31\.s}
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `fcvtzs {z1\.s,z2\.s},{z30\.s-z31\.s}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fcvtzs {z0\.s,z1\.s},{z29\.s-z30\.s}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `fcvtzs { ?z1\.s,z2\.s ?},{ ?z30\.s ?- ?z31\.s ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fcvtzs { ?z0\.s,z1\.s ?},{ ?z29\.s ?- ?z30\.s ?}'
diff --git a/gas/testsuite/gas/aarch64/sme2-23-noarch.l b/gas/testsuite/gas/aarch64/sme2-23-noarch.l
index 033e87a..0d7c05f 100644
--- a/gas/testsuite/gas/aarch64/sme2-23-noarch.l
+++ b/gas/testsuite/gas/aarch64/sme2-23-noarch.l
@@ -1,65 +1,65 @@
 [^ :]+: Assembler messages:
-[^ :]+:[0-9]+: Error: selected processor does not support `fcvtzs {z0\.s,z1\.s},{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fcvtzs {z30\.s,z31\.s},{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fcvtzs {z0\.s,z1\.s},{z30\.s-z31\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fcvtzs {z10\.s,z11\.s},{z26\.s-z27\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fcvtzs {z0\.s-z3\.s},{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fcvtzs {z28\.s-z31\.s},{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fcvtzs {z0\.s-z3\.s},{z28\.s-z31\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fcvtzs {z24\.s-z27\.s},{z8\.s-z11\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fcvtzu {z0\.s,z1\.s},{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fcvtzu {z30\.s,z31\.s},{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fcvtzu {z0\.s,z1\.s},{z30\.s-z31\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fcvtzu {z12\.s,z13\.s},{z14\.s-z15\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fcvtzu {z0\.s-z3\.s},{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fcvtzu {z28\.s-z31\.s},{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fcvtzu {z0\.s-z3\.s},{z28\.s-z31\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fcvtzu {z16\.s-z19\.s},{z12\.s-z15\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `frinta {z0\.s,z1\.s},{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `frinta {z30\.s,z31\.s},{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `frinta {z0\.s,z1\.s},{z30\.s-z31\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `frinta {z10\.s,z11\.s},{z26\.s-z27\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `frinta {z0\.s-z3\.s},{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `frinta {z28\.s-z31\.s},{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `frinta {z0\.s-z3\.s},{z28\.s-z31\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `frinta {z24\.s-z27\.s},{z8\.s-z11\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `frintm {z0\.s,z1\.s},{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `frintm {z30\.s,z31\.s},{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `frintm {z0\.s,z1\.s},{z30\.s-z31\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `frintm {z10\.s,z11\.s},{z26\.s-z27\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `frintm {z0\.s-z3\.s},{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `frintm {z28\.s-z31\.s},{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `frintm {z0\.s-z3\.s},{z28\.s-z31\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `frintm {z24\.s-z27\.s},{z8\.s-z11\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `frintn {z0\.s,z1\.s},{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `frintn {z30\.s,z31\.s},{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `frintn {z0\.s,z1\.s},{z30\.s-z31\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `frintn {z10\.s,z11\.s},{z26\.s-z27\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `frintn {z0\.s-z3\.s},{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `frintn {z28\.s-z31\.s},{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `frintn {z0\.s-z3\.s},{z28\.s-z31\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `frintn {z24\.s-z27\.s},{z8\.s-z11\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `frintp {z0\.s,z1\.s},{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `frintp {z30\.s,z31\.s},{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `frintp {z0\.s,z1\.s},{z30\.s-z31\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `frintp {z10\.s,z11\.s},{z26\.s-z27\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `frintp {z0\.s-z3\.s},{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `frintp {z28\.s-z31\.s},{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `frintp {z0\.s-z3\.s},{z28\.s-z31\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `frintp {z24\.s-z27\.s},{z8\.s-z11\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `scvtf {z0\.s,z1\.s},{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `scvtf {z30\.s,z31\.s},{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `scvtf {z0\.s,z1\.s},{z30\.s-z31\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `scvtf {z10\.s,z11\.s},{z26\.s-z27\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `scvtf {z0\.s-z3\.s},{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `scvtf {z28\.s-z31\.s},{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `scvtf {z0\.s-z3\.s},{z28\.s-z31\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `scvtf {z24\.s-z27\.s},{z8\.s-z11\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `ucvtf {z0\.s,z1\.s},{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `ucvtf {z30\.s,z31\.s},{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `ucvtf {z0\.s,z1\.s},{z30\.s-z31\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `ucvtf {z10\.s,z11\.s},{z26\.s-z27\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `ucvtf {z0\.s-z3\.s},{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `ucvtf {z28\.s-z31\.s},{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `ucvtf {z0\.s-z3\.s},{z28\.s-z31\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `ucvtf {z24\.s-z27\.s},{z8\.s-z11\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fcvtzs { ?z0\.s,z1\.s ?},{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fcvtzs { ?z30\.s,z31\.s ?},{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fcvtzs { ?z0\.s,z1\.s ?},{ ?z30\.s ?- ?z31\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fcvtzs { ?z10\.s,z11\.s ?},{ ?z26\.s ?- ?z27\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fcvtzs { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fcvtzs { ?z28\.s ?- ?z31\.s ?},{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fcvtzs { ?z0\.s ?- ?z3\.s ?},{ ?z28\.s ?- ?z31\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fcvtzs { ?z24\.s ?- ?z27\.s ?},{ ?z8\.s ?- ?z11\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fcvtzu { ?z0\.s,z1\.s ?},{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fcvtzu { ?z30\.s,z31\.s ?},{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fcvtzu { ?z0\.s,z1\.s ?},{ ?z30\.s ?- ?z31\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fcvtzu { ?z12\.s,z13\.s ?},{ ?z14\.s ?- ?z15\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fcvtzu { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fcvtzu { ?z28\.s ?- ?z31\.s ?},{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fcvtzu { ?z0\.s ?- ?z3\.s ?},{ ?z28\.s ?- ?z31\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fcvtzu { ?z16\.s ?- ?z19\.s ?},{ ?z12\.s ?- ?z15\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `frinta { ?z0\.s,z1\.s ?},{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `frinta { ?z30\.s,z31\.s ?},{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `frinta { ?z0\.s,z1\.s ?},{ ?z30\.s ?- ?z31\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `frinta { ?z10\.s,z11\.s ?},{ ?z26\.s ?- ?z27\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `frinta { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `frinta { ?z28\.s ?- ?z31\.s ?},{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `frinta { ?z0\.s ?- ?z3\.s ?},{ ?z28\.s ?- ?z31\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `frinta { ?z24\.s ?- ?z27\.s ?},{ ?z8\.s ?- ?z11\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `frintm { ?z0\.s,z1\.s ?},{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `frintm { ?z30\.s,z31\.s ?},{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `frintm { ?z0\.s,z1\.s ?},{ ?z30\.s ?- ?z31\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `frintm { ?z10\.s,z11\.s ?},{ ?z26\.s ?- ?z27\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `frintm { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `frintm { ?z28\.s ?- ?z31\.s ?},{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `frintm { ?z0\.s ?- ?z3\.s ?},{ ?z28\.s ?- ?z31\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `frintm { ?z24\.s ?- ?z27\.s ?},{ ?z8\.s ?- ?z11\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `frintn { ?z0\.s,z1\.s ?},{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `frintn { ?z30\.s,z31\.s ?},{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `frintn { ?z0\.s,z1\.s ?},{ ?z30\.s ?- ?z31\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `frintn { ?z10\.s,z11\.s ?},{ ?z26\.s ?- ?z27\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `frintn { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `frintn { ?z28\.s ?- ?z31\.s ?},{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `frintn { ?z0\.s ?- ?z3\.s ?},{ ?z28\.s ?- ?z31\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `frintn { ?z24\.s ?- ?z27\.s ?},{ ?z8\.s ?- ?z11\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `frintp { ?z0\.s,z1\.s ?},{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `frintp { ?z30\.s,z31\.s ?},{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `frintp { ?z0\.s,z1\.s ?},{ ?z30\.s ?- ?z31\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `frintp { ?z10\.s,z11\.s ?},{ ?z26\.s ?- ?z27\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `frintp { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `frintp { ?z28\.s ?- ?z31\.s ?},{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `frintp { ?z0\.s ?- ?z3\.s ?},{ ?z28\.s ?- ?z31\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `frintp { ?z24\.s ?- ?z27\.s ?},{ ?z8\.s ?- ?z11\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `scvtf { ?z0\.s,z1\.s ?},{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `scvtf { ?z30\.s,z31\.s ?},{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `scvtf { ?z0\.s,z1\.s ?},{ ?z30\.s ?- ?z31\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `scvtf { ?z10\.s,z11\.s ?},{ ?z26\.s ?- ?z27\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `scvtf { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `scvtf { ?z28\.s ?- ?z31\.s ?},{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `scvtf { ?z0\.s ?- ?z3\.s ?},{ ?z28\.s ?- ?z31\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `scvtf { ?z24\.s ?- ?z27\.s ?},{ ?z8\.s ?- ?z11\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `ucvtf { ?z0\.s,z1\.s ?},{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `ucvtf { ?z30\.s,z31\.s ?},{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `ucvtf { ?z0\.s,z1\.s ?},{ ?z30\.s ?- ?z31\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `ucvtf { ?z10\.s,z11\.s ?},{ ?z26\.s ?- ?z27\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `ucvtf { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `ucvtf { ?z28\.s ?- ?z31\.s ?},{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `ucvtf { ?z0\.s ?- ?z3\.s ?},{ ?z28\.s ?- ?z31\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `ucvtf { ?z24\.s ?- ?z27\.s ?},{ ?z8\.s ?- ?z11\.s ?}'
diff --git a/gas/testsuite/gas/aarch64/sme2-24-invalid.l b/gas/testsuite/gas/aarch64/sme2-24-invalid.l
index 82dd0fb..b1ba1d3 100644
--- a/gas/testsuite/gas/aarch64/sme2-24-invalid.l
+++ b/gas/testsuite/gas/aarch64/sme2-24-invalid.l
@@ -1,22 +1,22 @@
 [^ :]+: Assembler messages:
-[^ :]+:[0-9]+: Error: expected a register at operand 1 -- `bfcvt 0,{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: expected a register at operand 1 -- `bfcvt 0,{ ?z0\.s ?- ?z1\.s ?}'
 [^ :]+:[0-9]+: Error: expected a register or register list at operand 2 -- `bfcvt z0\.h,0'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `bfcvt z0\.h,{z1\.s-z2\.s}'
-[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `bfcvtn z0\.h,{z0\.s-z2\.s}'
-[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `bfcvt z0\.h,{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: operand mismatch -- `bfcvtn z0\.s,{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `bfcvt z0\.h,{ ?z1\.s ?- ?z2\.s ?}'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `bfcvtn z0\.h,{ ?z0\.s ?- ?z2\.s ?}'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `bfcvt z0\.h,{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: operand mismatch -- `bfcvtn z0\.s,{ ?z0\.s ?- ?z3\.s ?}'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	bfcvtn z0\.h, {z0\.s-z3\.s}
-[^ :]+:[0-9]+: Error: operand mismatch -- `bfcvt z0\.s,{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: operand mismatch -- `bfcvt z0\.s,{ ?z0\.h ?- ?z3\.h ?}'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	bfcvt z0\.b, {z0\.h-z3\.h}
-[^ :]+:[0-9]+: Error: operand mismatch -- `fcvt z0\.s,{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: operand mismatch -- `fcvt z0\.s,{ ?z0\.h ?- ?z1\.h ?}'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	fcvt z0\.b, {z0\.h-z1\.h}
-[^ :]+:[0-9]+: Error: operand mismatch -- `fcvt z0\.s,{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: operand mismatch -- `fcvt z0\.s,{ ?z0\.s ?- ?z1\.s ?}'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	fcvt z0\.h, {z0\.s-z1\.s}
-[^ :]+:[0-9]+: Error: operand mismatch -- `fcvt z0\.d,{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: operand mismatch -- `fcvt z0\.d,{ ?z0\.s ?- ?z1\.s ?}'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	fcvt z0\.h, {z0\.s-z1\.s}
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fcvt z0\.h,{z1\.s-z2\.s}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fcvt z0\.h,{ ?z1\.s ?- ?z2\.s ?}'
diff --git a/gas/testsuite/gas/aarch64/sme2-24-noarch.l b/gas/testsuite/gas/aarch64/sme2-24-noarch.l
index ef23b8b..bf5cc90 100644
--- a/gas/testsuite/gas/aarch64/sme2-24-noarch.l
+++ b/gas/testsuite/gas/aarch64/sme2-24-noarch.l
@@ -1,17 +1,17 @@
 [^ :]+: Assembler messages:
-[^ :]+:[0-9]+: Error: selected processor does not support `bfcvt z0\.h,{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfcvt z31\.h,{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfcvt z0\.h,{z30\.s-z31\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfcvt z14\.h,{z20\.s-z21\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfcvtn z0\.h,{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfcvtn z31\.h,{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfcvtn z0\.h,{z30\.s-z31\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `bfcvtn z26\.h,{z14\.s-z15\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fcvt z0\.h,{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fcvt z31\.h,{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fcvt z0\.h,{z30\.s-z31\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fcvt z29\.h,{z6\.s-z7\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fcvtn z0\.h,{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fcvtn z31\.h,{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fcvtn z0\.h,{z30\.s-z31\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fcvtn z29\.h,{z6\.s-z7\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfcvt z0\.h,{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfcvt z31\.h,{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfcvt z0\.h,{ ?z30\.s ?- ?z31\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfcvt z14\.h,{ ?z20\.s ?- ?z21\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfcvtn z0\.h,{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfcvtn z31\.h,{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfcvtn z0\.h,{ ?z30\.s ?- ?z31\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfcvtn z26\.h,{ ?z14\.s ?- ?z15\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fcvt z0\.h,{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fcvt z31\.h,{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fcvt z0\.h,{ ?z30\.s ?- ?z31\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fcvt z29\.h,{ ?z6\.s ?- ?z7\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fcvtn z0\.h,{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fcvtn z31\.h,{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fcvtn z0\.h,{ ?z30\.s ?- ?z31\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fcvtn z29\.h,{ ?z6\.s ?- ?z7\.s ?}'
diff --git a/gas/testsuite/gas/aarch64/sme2-25-invalid.l b/gas/testsuite/gas/aarch64/sme2-25-invalid.l
index 5b18a2a..f2b2bf2 100644
--- a/gas/testsuite/gas/aarch64/sme2-25-invalid.l
+++ b/gas/testsuite/gas/aarch64/sme2-25-invalid.l
@@ -1,48 +1,48 @@
 [^ :]+: Assembler messages:
-[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `sqcvt 0,{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `sqcvt 0,{ ?z0\.s ?- ?z1\.s ?}'
 [^ :]+:[0-9]+: Error: expected '{' at operand 2 -- `sqcvt z0\.h,0'
-[^ :]+:[0-9]+: Error: operand mismatch -- `sqcvt z0\.s,{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: operand mismatch -- `sqcvt z0\.s,{ ?z0\.s ?- ?z1\.s ?}'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	sqcvt z0\.b, {z0\.s-z1\.s}
 [^ :]+:[0-9]+: Info:    other valid variant\(s\):
 [^ :]+:[0-9]+: Info:    	sqcvt z0\.h, {z0\.d-z1\.d}
-[^ :]+:[0-9]+: Error: operand mismatch -- `sqcvt z0\.b,{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: operand mismatch -- `sqcvt z0\.b,{ ?z0\.d ?- ?z1\.d ?}'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	sqcvt z0\.b, {z0\.s-z1\.s}
 [^ :]+:[0-9]+: Info:    other valid variant\(s\):
 [^ :]+:[0-9]+: Info:    	sqcvt z0\.h, {z0\.d-z1\.d}
-[^ :]+:[0-9]+: Error: operand mismatch -- `sqcvt z0\.s,{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: operand mismatch -- `sqcvt z0\.s,{ ?z0\.d ?- ?z1\.d ?}'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	sqcvt z0\.h, {z0\.d-z1\.d}
 [^ :]+:[0-9]+: Info:    other valid variant\(s\):
 [^ :]+:[0-9]+: Info:    	sqcvt z0\.b, {z0\.s-z1\.s}
-[^ :]+:[0-9]+: Error: operand mismatch -- `sqcvt z0\.s,{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: operand mismatch -- `sqcvt z0\.s,{ ?z0\.s ?- ?z3\.s ?}'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	sqcvt z0\.b, {z0\.s-z3\.s}
 [^ :]+:[0-9]+: Info:    other valid variant\(s\):
 [^ :]+:[0-9]+: Info:    	sqcvt z0\.h, {z0\.d-z3\.d}
-[^ :]+:[0-9]+: Error: operand mismatch -- `sqcvt z0\.b,{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: operand mismatch -- `sqcvt z0\.b,{ ?z0\.d ?- ?z3\.d ?}'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	sqcvt z0\.b, {z0\.s-z3\.s}
 [^ :]+:[0-9]+: Info:    other valid variant\(s\):
 [^ :]+:[0-9]+: Info:    	sqcvt z0\.h, {z0\.d-z3\.d}
-[^ :]+:[0-9]+: Error: operand mismatch -- `sqcvt z0\.s,{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: operand mismatch -- `sqcvt z0\.s,{ ?z0\.d ?- ?z3\.d ?}'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	sqcvt z0\.h, {z0\.d-z3\.d}
 [^ :]+:[0-9]+: Info:    other valid variant\(s\):
 [^ :]+:[0-9]+: Info:    	sqcvt z0\.b, {z0\.s-z3\.s}
-[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `sqcvt z0\.h,{z0\.s-z2\.s}'
-[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `sqcvt z0\.h,{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: the register list must have a stride of 1 at operand 2 -- `sqcvt z0\.h,{z0\.s,z8\.s}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqcvt z0\.h,{z1\.s-z2\.s}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqcvt z0\.h,{z31\.s,z0\.s}'
-[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `sqcvt z0\.b,{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `sqcvt z0\.b,{z0\.s-z2\.s}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqcvt z0\.b,{z1\.s-z4\.s}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqcvt z0\.b,{z2\.s-z5\.s}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqcvt z0\.b,{z3\.s-z6\.s}'
-[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `sqcvt z0\.h,{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `sqcvt z0\.h,{z0\.d-z2\.d}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqcvt z0\.h,{z1\.d-z4\.d}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqcvt z0\.h,{z2\.d-z5\.d}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqcvt z0\.h,{z3\.d-z6\.d}'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `sqcvt z0\.h,{ ?z0\.s ?- ?z2\.s ?}'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `sqcvt z0\.h,{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 at operand 2 -- `sqcvt z0\.h,{ ?z0\.s,z8\.s ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqcvt z0\.h,{ ?z1\.s ?- ?z2\.s ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqcvt z0\.h,{ ?z31\.s,z0\.s ?}'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `sqcvt z0\.b,{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `sqcvt z0\.b,{ ?z0\.s ?- ?z2\.s ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqcvt z0\.b,{ ?z1\.s ?- ?z4\.s ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqcvt z0\.b,{ ?z2\.s ?- ?z5\.s ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqcvt z0\.b,{ ?z3\.s ?- ?z6\.s ?}'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `sqcvt z0\.h,{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `sqcvt z0\.h,{ ?z0\.d ?- ?z2\.d ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqcvt z0\.h,{ ?z1\.d ?- ?z4\.d ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqcvt z0\.h,{ ?z2\.d ?- ?z5\.d ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqcvt z0\.h,{ ?z3\.d ?- ?z6\.d ?}'
diff --git a/gas/testsuite/gas/aarch64/sme2-25-noarch.l b/gas/testsuite/gas/aarch64/sme2-25-noarch.l
index 66998ff..5ec313c 100644
--- a/gas/testsuite/gas/aarch64/sme2-25-noarch.l
+++ b/gas/testsuite/gas/aarch64/sme2-25-noarch.l
@@ -1,37 +1,37 @@
 [^ :]+: Assembler messages:
-[^ :]+:[0-9]+: Error: selected processor does not support `sqcvt z0\.h,{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqcvt z31\.h,{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqcvt z0\.h,{z30\.s-z31\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqcvt z19\.h,{z14\.s-z15\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqcvt z0\.b,{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqcvt z31\.b,{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqcvt z0\.b,{z28\.s-z31\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqcvt z11\.b,{z20\.s-z23\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqcvt z0\.h,{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqcvt z31\.h,{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqcvt z0\.h,{z28\.d-z31\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqcvt z22\.h,{z4\.d-z7\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtu z0\.h,{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtu z31\.h,{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtu z0\.h,{z30\.s-z31\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtu z19\.h,{z14\.s-z15\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtu z0\.b,{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtu z31\.b,{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtu z0\.b,{z28\.s-z31\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtu z11\.b,{z20\.s-z23\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtu z0\.h,{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtu z31\.h,{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtu z0\.h,{z28\.d-z31\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtu z22\.h,{z4\.d-z7\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `uqcvt z0\.h,{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `uqcvt z31\.h,{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `uqcvt z0\.h,{z30\.s-z31\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `uqcvt z19\.h,{z14\.s-z15\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `uqcvt z0\.b,{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `uqcvt z31\.b,{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `uqcvt z0\.b,{z28\.s-z31\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `uqcvt z11\.b,{z20\.s-z23\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `uqcvt z0\.h,{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `uqcvt z31\.h,{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `uqcvt z0\.h,{z28\.d-z31\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `uqcvt z22\.h,{z4\.d-z7\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqcvt z0\.h,{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqcvt z31\.h,{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqcvt z0\.h,{ ?z30\.s ?- ?z31\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqcvt z19\.h,{ ?z14\.s ?- ?z15\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqcvt z0\.b,{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqcvt z31\.b,{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqcvt z0\.b,{ ?z28\.s ?- ?z31\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqcvt z11\.b,{ ?z20\.s ?- ?z23\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqcvt z0\.h,{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqcvt z31\.h,{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqcvt z0\.h,{ ?z28\.d ?- ?z31\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqcvt z22\.h,{ ?z4\.d ?- ?z7\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtu z0\.h,{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtu z31\.h,{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtu z0\.h,{ ?z30\.s ?- ?z31\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtu z19\.h,{ ?z14\.s ?- ?z15\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtu z0\.b,{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtu z31\.b,{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtu z0\.b,{ ?z28\.s ?- ?z31\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtu z11\.b,{ ?z20\.s ?- ?z23\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtu z0\.h,{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtu z31\.h,{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtu z0\.h,{ ?z28\.d ?- ?z31\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtu z22\.h,{ ?z4\.d ?- ?z7\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `uqcvt z0\.h,{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `uqcvt z31\.h,{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `uqcvt z0\.h,{ ?z30\.s ?- ?z31\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `uqcvt z19\.h,{ ?z14\.s ?- ?z15\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `uqcvt z0\.b,{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `uqcvt z31\.b,{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `uqcvt z0\.b,{ ?z28\.s ?- ?z31\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `uqcvt z11\.b,{ ?z20\.s ?- ?z23\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `uqcvt z0\.h,{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `uqcvt z31\.h,{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `uqcvt z0\.h,{ ?z28\.d ?- ?z31\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `uqcvt z22\.h,{ ?z4\.d ?- ?z7\.d ?}'
diff --git a/gas/testsuite/gas/aarch64/sme2-26-invalid.l b/gas/testsuite/gas/aarch64/sme2-26-invalid.l
index 08c2f7f..f2fc429 100644
--- a/gas/testsuite/gas/aarch64/sme2-26-invalid.l
+++ b/gas/testsuite/gas/aarch64/sme2-26-invalid.l
@@ -1,13 +1,13 @@
 [^ :]+: Assembler messages:
-[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `sqcvtn 0,{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `sqcvtn 0,{ ?z0\.s ?- ?z3\.s ?}'
 [^ :]+:[0-9]+: Error: expected '{' at operand 2 -- `sqcvtn z0\.b,0'
-[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `sqcvtn z0\.b,{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `sqcvtn z0\.b,{z0\.s-z2\.s}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqcvtn z0\.b,{z1\.s-z4\.s}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqcvtn z0\.b,{z2\.s-z5\.s}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqcvtn z0\.b,{z3\.s-z6\.s}'
-[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `sqcvtn z0\.h,{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `sqcvtn z0\.h,{z0\.d-z2\.d}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqcvtn z0\.h,{z1\.d-z4\.d}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqcvtn z0\.h,{z2\.d-z5\.d}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqcvtn z0\.h,{z3\.d-z6\.d}'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `sqcvtn z0\.b,{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `sqcvtn z0\.b,{ ?z0\.s ?- ?z2\.s ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqcvtn z0\.b,{ ?z1\.s ?- ?z4\.s ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqcvtn z0\.b,{ ?z2\.s ?- ?z5\.s ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqcvtn z0\.b,{ ?z3\.s ?- ?z6\.s ?}'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `sqcvtn z0\.h,{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `sqcvtn z0\.h,{ ?z0\.d ?- ?z2\.d ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqcvtn z0\.h,{ ?z1\.d ?- ?z4\.d ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqcvtn z0\.h,{ ?z2\.d ?- ?z5\.d ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqcvtn z0\.h,{ ?z3\.d ?- ?z6\.d ?}'
diff --git a/gas/testsuite/gas/aarch64/sme2-26-noarch.l b/gas/testsuite/gas/aarch64/sme2-26-noarch.l
index b1bd489..8039403 100644
--- a/gas/testsuite/gas/aarch64/sme2-26-noarch.l
+++ b/gas/testsuite/gas/aarch64/sme2-26-noarch.l
@@ -1,25 +1,25 @@
 [^ :]+: Assembler messages:
-[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtn z0\.b,{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtn z31\.b,{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtn z0\.b,{z28\.s-z31\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtn z11\.b,{z20\.s-z23\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtn z0\.h,{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtn z31\.h,{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtn z0\.h,{z28\.d-z31\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtn z22\.h,{z4\.d-z7\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtun z0\.b,{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtun z31\.b,{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtun z0\.b,{z28\.s-z31\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtun z11\.b,{z20\.s-z23\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtun z0\.h,{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtun z31\.h,{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtun z0\.h,{z28\.d-z31\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtun z22\.h,{z4\.d-z7\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `uqcvtn z0\.b,{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `uqcvtn z31\.b,{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `uqcvtn z0\.b,{z28\.s-z31\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `uqcvtn z11\.b,{z20\.s-z23\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `uqcvtn z0\.h,{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `uqcvtn z31\.h,{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `uqcvtn z0\.h,{z28\.d-z31\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `uqcvtn z22\.h,{z4\.d-z7\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtn z0\.b,{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtn z31\.b,{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtn z0\.b,{ ?z28\.s ?- ?z31\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtn z11\.b,{ ?z20\.s ?- ?z23\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtn z0\.h,{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtn z31\.h,{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtn z0\.h,{ ?z28\.d ?- ?z31\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtn z22\.h,{ ?z4\.d ?- ?z7\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtun z0\.b,{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtun z31\.b,{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtun z0\.b,{ ?z28\.s ?- ?z31\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtun z11\.b,{ ?z20\.s ?- ?z23\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtun z0\.h,{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtun z31\.h,{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtun z0\.h,{ ?z28\.d ?- ?z31\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtun z22\.h,{ ?z4\.d ?- ?z7\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `uqcvtn z0\.b,{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `uqcvtn z31\.b,{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `uqcvtn z0\.b,{ ?z28\.s ?- ?z31\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `uqcvtn z11\.b,{ ?z20\.s ?- ?z23\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `uqcvtn z0\.h,{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `uqcvtn z31\.h,{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `uqcvtn z0\.h,{ ?z28\.d ?- ?z31\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `uqcvtn z22\.h,{ ?z4\.d ?- ?z7\.d ?}'
diff --git a/gas/testsuite/gas/aarch64/sme2-27-invalid.l b/gas/testsuite/gas/aarch64/sme2-27-invalid.l
index 9efaa04..465cbe2 100644
--- a/gas/testsuite/gas/aarch64/sme2-27-invalid.l
+++ b/gas/testsuite/gas/aarch64/sme2-27-invalid.l
@@ -1,30 +1,30 @@
 [^ :]+: Assembler messages:
-[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `sqrshr 0,{z0\.s-z1\.s},#1'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `sqrshr 0,{ ?z0\.s ?- ?z1\.s ?},#1'
 [^ :]+:[0-9]+: Error: expected '{' at operand 2 -- `sqrshr z0\.h,0,#1'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqrshr z0\.h,{z1\.s-z2\.s},#1'
-[^ :]+:[0-9]+: Error: immediate value out of range 1 to 16 at operand 3 -- `sqrshr z0\.h,{z0\.s-z1\.s},#0'
-[^ :]+:[0-9]+: Error: immediate value out of range 1 to 16 at operand 3 -- `sqrshr z0\.h,{z0\.s-z1\.s},#17'
-[^ :]+:[0-9]+: Error: operand mismatch -- `sqrshr z0\.s,{z0\.d-z1\.d},#1'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqrshr z0\.h,{ ?z1\.s ?- ?z2\.s ?},#1'
+[^ :]+:[0-9]+: Error: immediate value out of range 1 to 16 at operand 3 -- `sqrshr z0\.h,{ ?z0\.s ?- ?z1\.s ?},#0'
+[^ :]+:[0-9]+: Error: immediate value out of range 1 to 16 at operand 3 -- `sqrshr z0\.h,{ ?z0\.s ?- ?z1\.s ?},#17'
+[^ :]+:[0-9]+: Error: operand mismatch -- `sqrshr z0\.s,{ ?z0\.d ?- ?z1\.d ?},#1'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	sqrshr z0\.h, {z0\.d-z1\.d}, #1
 [^ :]+:[0-9]+: Info:    other valid variant\(s\):
 [^ :]+:[0-9]+: Info:    	sqrshr z0\.b, {z0\.s-z1\.s}, #1
-[^ :]+:[0-9]+: Error: immediate operand required at operand 3 -- `sqrshr z0\.h,{z0\.s-z1\.s},x0'
-[^ :]+:[0-9]+: Error: immediate operand required at operand 3 -- `sqrshr z0\.h,{z0\.s-z1\.s},z0\.s'
-[^ :]+:[0-9]+: Error: immediate operand required at operand 3 -- `sqrshr z0\.h,{z0\.s-z1\.s},p0'
-[^ :]+:[0-9]+: Error: immediate operand required at operand 3 -- `sqrshr z0\.h,{z0\.s-z1\.s},pn0'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqrshr z0\.b,{z1\.s-z4\.s},#1'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqrshr z0\.b,{z2\.s-z5\.s},#1'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqrshr z0\.b,{z3\.s-z6\.s},#1'
-[^ :]+:[0-9]+: Error: immediate value out of range 1 to 32 at operand 3 -- `sqrshr z0\.b,{z0\.s-z3\.s},#-1'
-[^ :]+:[0-9]+: Error: immediate value out of range 1 to 32 at operand 3 -- `sqrshr z0\.b,{z0\.s-z3\.s},#0'
-[^ :]+:[0-9]+: Error: immediate value out of range 1 to 32 at operand 3 -- `sqrshr z0\.b,{z0\.s-z3\.s},#33'
-[^ :]+:[0-9]+: Error: operand mismatch -- `sqrshr z0\.b,{z0\.d-z3\.d},#1'
+[^ :]+:[0-9]+: Error: immediate operand required at operand 3 -- `sqrshr z0\.h,{ ?z0\.s ?- ?z1\.s ?},x0'
+[^ :]+:[0-9]+: Error: immediate operand required at operand 3 -- `sqrshr z0\.h,{ ?z0\.s ?- ?z1\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: immediate operand required at operand 3 -- `sqrshr z0\.h,{ ?z0\.s ?- ?z1\.s ?},p0'
+[^ :]+:[0-9]+: Error: immediate operand required at operand 3 -- `sqrshr z0\.h,{ ?z0\.s ?- ?z1\.s ?},pn0'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqrshr z0\.b,{ ?z1\.s ?- ?z4\.s ?},#1'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqrshr z0\.b,{ ?z2\.s ?- ?z5\.s ?},#1'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqrshr z0\.b,{ ?z3\.s ?- ?z6\.s ?},#1'
+[^ :]+:[0-9]+: Error: immediate value out of range 1 to 32 at operand 3 -- `sqrshr z0\.b,{ ?z0\.s ?- ?z3\.s ?},#-1'
+[^ :]+:[0-9]+: Error: immediate value out of range 1 to 32 at operand 3 -- `sqrshr z0\.b,{ ?z0\.s ?- ?z3\.s ?},#0'
+[^ :]+:[0-9]+: Error: immediate value out of range 1 to 32 at operand 3 -- `sqrshr z0\.b,{ ?z0\.s ?- ?z3\.s ?},#33'
+[^ :]+:[0-9]+: Error: operand mismatch -- `sqrshr z0\.b,{ ?z0\.d ?- ?z3\.d ?},#1'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	sqrshr z0\.b, {z0\.s-z3\.s}, #1
 [^ :]+:[0-9]+: Info:    other valid variant\(s\):
 [^ :]+:[0-9]+: Info:    	sqrshr z0\.h, {z0\.d-z3\.d}, #1
-[^ :]+:[0-9]+: Error: operand mismatch -- `sqrshr z0\.b,{z0\.d-z3\.d},#65'
+[^ :]+:[0-9]+: Error: operand mismatch -- `sqrshr z0\.b,{ ?z0\.d ?- ?z3\.d ?},#65'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	sqrshr z0\.b, {z0\.s-z3\.s}, #65
 [^ :]+:[0-9]+: Info:    other valid variant\(s\):
diff --git a/gas/testsuite/gas/aarch64/sme2-27-noarch.l b/gas/testsuite/gas/aarch64/sme2-27-noarch.l
index 72213e0..957d85b 100644
--- a/gas/testsuite/gas/aarch64/sme2-27-noarch.l
+++ b/gas/testsuite/gas/aarch64/sme2-27-noarch.l
@@ -1,50 +1,50 @@
 [^ :]+: Assembler messages:
-[^ :]+:[0-9]+: Error: selected processor does not support `sqrshr z0\.h,{z0\.s-z1\.s},#1'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqrshr z31\.h,{z0\.s-z1\.s},#1'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqrshr z0\.h,{z30\.s-z31\.s},#1'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqrshr z0\.h,{z0\.s-z1\.s},#16'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqrshr z14\.h,{z22\.s-z23\.s},#7'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqrshr z0\.h,{z0\.s-z1\.s},#x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqrshr z0\.h,{z0\.s-z1\.s},#z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqrshr z0\.h,{z0\.s-z1\.s},#p0'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqrshr z0\.h,{z0\.s-z1\.s},#pn0'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqrshr z0\.b,{z0\.s-z3\.s},#1'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqrshr z31\.b,{z0\.s-z3\.s},#1'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqrshr z0\.b,{z28\.s-z31\.s},#1'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqrshr z0\.b,{z0\.s-z3\.s},#32'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqrshr z6\.b,{z12\.s-z15\.s},#25'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqrshr z0\.h,{z0\.d-z3\.d},#1'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqrshr z31\.h,{z0\.d-z3\.d},#1'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqrshr z0\.h,{z28\.d-z31\.d},#1'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqrshr z0\.h,{z0\.d-z3\.d},#64'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqrshr z25\.h,{z20\.d-z23\.d},#50'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqrshru z0\.h,{z0\.s-z1\.s},#1'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqrshru z31\.h,{z0\.s-z1\.s},#1'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqrshru z0\.h,{z30\.s-z31\.s},#1'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqrshru z0\.h,{z0\.s-z1\.s},#16'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqrshru z14\.h,{z22\.s-z23\.s},#7'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqrshru z0\.b,{z0\.s-z3\.s},#1'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqrshru z31\.b,{z0\.s-z3\.s},#1'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqrshru z0\.b,{z28\.s-z31\.s},#1'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqrshru z0\.b,{z0\.s-z3\.s},#32'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqrshru z6\.b,{z12\.s-z15\.s},#25'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqrshru z0\.h,{z0\.d-z3\.d},#1'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqrshru z31\.h,{z0\.d-z3\.d},#1'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqrshru z0\.h,{z28\.d-z31\.d},#1'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqrshru z0\.h,{z0\.d-z3\.d},#64'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqrshru z25\.h,{z20\.d-z23\.d},#50'
-[^ :]+:[0-9]+: Error: selected processor does not support `uqrshr z0\.h,{z0\.s-z1\.s},#1'
-[^ :]+:[0-9]+: Error: selected processor does not support `uqrshr z31\.h,{z0\.s-z1\.s},#1'
-[^ :]+:[0-9]+: Error: selected processor does not support `uqrshr z0\.h,{z30\.s-z31\.s},#1'
-[^ :]+:[0-9]+: Error: selected processor does not support `uqrshr z0\.h,{z0\.s-z1\.s},#16'
-[^ :]+:[0-9]+: Error: selected processor does not support `uqrshr z14\.h,{z22\.s-z23\.s},#7'
-[^ :]+:[0-9]+: Error: selected processor does not support `uqrshr z0\.b,{z0\.s-z3\.s},#1'
-[^ :]+:[0-9]+: Error: selected processor does not support `uqrshr z31\.b,{z0\.s-z3\.s},#1'
-[^ :]+:[0-9]+: Error: selected processor does not support `uqrshr z0\.b,{z28\.s-z31\.s},#1'
-[^ :]+:[0-9]+: Error: selected processor does not support `uqrshr z0\.b,{z0\.s-z3\.s},#32'
-[^ :]+:[0-9]+: Error: selected processor does not support `uqrshr z6\.b,{z12\.s-z15\.s},#25'
-[^ :]+:[0-9]+: Error: selected processor does not support `uqrshr z0\.h,{z0\.d-z3\.d},#1'
-[^ :]+:[0-9]+: Error: selected processor does not support `uqrshr z31\.h,{z0\.d-z3\.d},#1'
-[^ :]+:[0-9]+: Error: selected processor does not support `uqrshr z0\.h,{z28\.d-z31\.d},#1'
-[^ :]+:[0-9]+: Error: selected processor does not support `uqrshr z0\.h,{z0\.d-z3\.d},#64'
-[^ :]+:[0-9]+: Error: selected processor does not support `uqrshr z25\.h,{z20\.d-z23\.d},#50'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshr z0\.h,{ ?z0\.s ?- ?z1\.s ?},#1'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshr z31\.h,{ ?z0\.s ?- ?z1\.s ?},#1'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshr z0\.h,{ ?z30\.s ?- ?z31\.s ?},#1'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshr z0\.h,{ ?z0\.s ?- ?z1\.s ?},#16'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshr z14\.h,{ ?z22\.s ?- ?z23\.s ?},#7'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshr z0\.h,{ ?z0\.s ?- ?z1\.s ?},#x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshr z0\.h,{ ?z0\.s ?- ?z1\.s ?},#z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshr z0\.h,{ ?z0\.s ?- ?z1\.s ?},#p0'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshr z0\.h,{ ?z0\.s ?- ?z1\.s ?},#pn0'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshr z0\.b,{ ?z0\.s ?- ?z3\.s ?},#1'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshr z31\.b,{ ?z0\.s ?- ?z3\.s ?},#1'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshr z0\.b,{ ?z28\.s ?- ?z31\.s ?},#1'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshr z0\.b,{ ?z0\.s ?- ?z3\.s ?},#32'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshr z6\.b,{ ?z12\.s ?- ?z15\.s ?},#25'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshr z0\.h,{ ?z0\.d ?- ?z3\.d ?},#1'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshr z31\.h,{ ?z0\.d ?- ?z3\.d ?},#1'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshr z0\.h,{ ?z28\.d ?- ?z31\.d ?},#1'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshr z0\.h,{ ?z0\.d ?- ?z3\.d ?},#64'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshr z25\.h,{ ?z20\.d ?- ?z23\.d ?},#50'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshru z0\.h,{ ?z0\.s ?- ?z1\.s ?},#1'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshru z31\.h,{ ?z0\.s ?- ?z1\.s ?},#1'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshru z0\.h,{ ?z30\.s ?- ?z31\.s ?},#1'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshru z0\.h,{ ?z0\.s ?- ?z1\.s ?},#16'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshru z14\.h,{ ?z22\.s ?- ?z23\.s ?},#7'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshru z0\.b,{ ?z0\.s ?- ?z3\.s ?},#1'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshru z31\.b,{ ?z0\.s ?- ?z3\.s ?},#1'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshru z0\.b,{ ?z28\.s ?- ?z31\.s ?},#1'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshru z0\.b,{ ?z0\.s ?- ?z3\.s ?},#32'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshru z6\.b,{ ?z12\.s ?- ?z15\.s ?},#25'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshru z0\.h,{ ?z0\.d ?- ?z3\.d ?},#1'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshru z31\.h,{ ?z0\.d ?- ?z3\.d ?},#1'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshru z0\.h,{ ?z28\.d ?- ?z31\.d ?},#1'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshru z0\.h,{ ?z0\.d ?- ?z3\.d ?},#64'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshru z25\.h,{ ?z20\.d ?- ?z23\.d ?},#50'
+[^ :]+:[0-9]+: Error: selected processor does not support `uqrshr z0\.h,{ ?z0\.s ?- ?z1\.s ?},#1'
+[^ :]+:[0-9]+: Error: selected processor does not support `uqrshr z31\.h,{ ?z0\.s ?- ?z1\.s ?},#1'
+[^ :]+:[0-9]+: Error: selected processor does not support `uqrshr z0\.h,{ ?z30\.s ?- ?z31\.s ?},#1'
+[^ :]+:[0-9]+: Error: selected processor does not support `uqrshr z0\.h,{ ?z0\.s ?- ?z1\.s ?},#16'
+[^ :]+:[0-9]+: Error: selected processor does not support `uqrshr z14\.h,{ ?z22\.s ?- ?z23\.s ?},#7'
+[^ :]+:[0-9]+: Error: selected processor does not support `uqrshr z0\.b,{ ?z0\.s ?- ?z3\.s ?},#1'
+[^ :]+:[0-9]+: Error: selected processor does not support `uqrshr z31\.b,{ ?z0\.s ?- ?z3\.s ?},#1'
+[^ :]+:[0-9]+: Error: selected processor does not support `uqrshr z0\.b,{ ?z28\.s ?- ?z31\.s ?},#1'
+[^ :]+:[0-9]+: Error: selected processor does not support `uqrshr z0\.b,{ ?z0\.s ?- ?z3\.s ?},#32'
+[^ :]+:[0-9]+: Error: selected processor does not support `uqrshr z6\.b,{ ?z12\.s ?- ?z15\.s ?},#25'
+[^ :]+:[0-9]+: Error: selected processor does not support `uqrshr z0\.h,{ ?z0\.d ?- ?z3\.d ?},#1'
+[^ :]+:[0-9]+: Error: selected processor does not support `uqrshr z31\.h,{ ?z0\.d ?- ?z3\.d ?},#1'
+[^ :]+:[0-9]+: Error: selected processor does not support `uqrshr z0\.h,{ ?z28\.d ?- ?z31\.d ?},#1'
+[^ :]+:[0-9]+: Error: selected processor does not support `uqrshr z0\.h,{ ?z0\.d ?- ?z3\.d ?},#64'
+[^ :]+:[0-9]+: Error: selected processor does not support `uqrshr z25\.h,{ ?z20\.d ?- ?z23\.d ?},#50'
diff --git a/gas/testsuite/gas/aarch64/sme2-28-invalid.l b/gas/testsuite/gas/aarch64/sme2-28-invalid.l
index 615f8c35..7cf236f 100644
--- a/gas/testsuite/gas/aarch64/sme2-28-invalid.l
+++ b/gas/testsuite/gas/aarch64/sme2-28-invalid.l
@@ -1,18 +1,18 @@
 [^ :]+: Assembler messages:
-[^ :]+:[0-9]+: Error: expected a register at operand 1 -- `sqrshrn 0,{z0\.s-z3\.s},#1'
+[^ :]+:[0-9]+: Error: expected a register at operand 1 -- `sqrshrn 0,{ ?z0\.s ?- ?z3\.s ?},#1'
 [^ :]+:[0-9]+: Error: expected '{' at operand 2 -- `sqrshrn z0\.b,0,#1'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqrshrn z0\.b,{z1\.s-z4\.s},#1'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqrshrn z0\.b,{z2\.s-z5\.s},#1'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqrshrn z0\.b,{z3\.s-z6\.s},#1'
-[^ :]+:[0-9]+: Error: immediate value out of range 1 to 32 at operand 3 -- `sqrshrn z0\.b,{z0\.s-z3\.s},#-1'
-[^ :]+:[0-9]+: Error: immediate value out of range 1 to 32 at operand 3 -- `sqrshrn z0\.b,{z0\.s-z3\.s},#0'
-[^ :]+:[0-9]+: Error: immediate value out of range 1 to 32 at operand 3 -- `sqrshrn z0\.b,{z0\.s-z3\.s},#33'
-[^ :]+:[0-9]+: Error: operand mismatch -- `sqrshrn z0\.b,{z0\.d-z3\.d},#1'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqrshrn z0\.b,{ ?z1\.s ?- ?z4\.s ?},#1'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqrshrn z0\.b,{ ?z2\.s ?- ?z5\.s ?},#1'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqrshrn z0\.b,{ ?z3\.s ?- ?z6\.s ?},#1'
+[^ :]+:[0-9]+: Error: immediate value out of range 1 to 32 at operand 3 -- `sqrshrn z0\.b,{ ?z0\.s ?- ?z3\.s ?},#-1'
+[^ :]+:[0-9]+: Error: immediate value out of range 1 to 32 at operand 3 -- `sqrshrn z0\.b,{ ?z0\.s ?- ?z3\.s ?},#0'
+[^ :]+:[0-9]+: Error: immediate value out of range 1 to 32 at operand 3 -- `sqrshrn z0\.b,{ ?z0\.s ?- ?z3\.s ?},#33'
+[^ :]+:[0-9]+: Error: operand mismatch -- `sqrshrn z0\.b,{ ?z0\.d ?- ?z3\.d ?},#1'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	sqrshrn z0\.b, {z0\.s-z3\.s}, #1
 [^ :]+:[0-9]+: Info:    other valid variant\(s\):
 [^ :]+:[0-9]+: Info:    	sqrshrn z0\.h, {z0\.d-z3\.d}, #1
-[^ :]+:[0-9]+: Error: operand mismatch -- `sqrshrn z0\.b,{z0\.d-z3\.d},#65'
+[^ :]+:[0-9]+: Error: operand mismatch -- `sqrshrn z0\.b,{ ?z0\.d ?- ?z3\.d ?},#65'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	sqrshrn z0\.b, {z0\.s-z3\.s}, #65
 [^ :]+:[0-9]+: Info:    other valid variant\(s\):
diff --git a/gas/testsuite/gas/aarch64/sme2-28-noarch.l b/gas/testsuite/gas/aarch64/sme2-28-noarch.l
index a3762f1..30d4574 100644
--- a/gas/testsuite/gas/aarch64/sme2-28-noarch.l
+++ b/gas/testsuite/gas/aarch64/sme2-28-noarch.l
@@ -1,26 +1,26 @@
 [^ :]+: Assembler messages:
-[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrn z0\.b,{z0\.s-z3\.s},#1'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrn z31\.b,{z0\.s-z3\.s},#1'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrn z0\.b,{z28\.s-z31\.s},#1'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrn z0\.b,{z0\.s-z3\.s},#32'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrn z6\.b,{z12\.s-z15\.s},#25'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrn z0\.h,{z0\.d-z3\.d},#1'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrn z31\.h,{z0\.d-z3\.d},#1'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrn z0\.h,{z28\.d-z31\.d},#1'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrn z0\.h,{z0\.d-z3\.d},#64'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrn z25\.h,{z20\.d-z23\.d},#50'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrun z0\.b,{z0\.s-z3\.s},#1'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrun z31\.b,{z0\.s-z3\.s},#1'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrun z0\.b,{z28\.s-z31\.s},#1'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrun z0\.b,{z0\.s-z3\.s},#32'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrun z6\.b,{z12\.s-z15\.s},#25'
-[^ :]+:[0-9]+: Error: selected processor does not support `uqrshrn z0\.b,{z0\.s-z3\.s},#1'
-[^ :]+:[0-9]+: Error: selected processor does not support `uqrshrn z31\.b,{z0\.s-z3\.s},#1'
-[^ :]+:[0-9]+: Error: selected processor does not support `uqrshrn z0\.b,{z28\.s-z31\.s},#1'
-[^ :]+:[0-9]+: Error: selected processor does not support `uqrshrn z0\.b,{z0\.s-z3\.s},#32'
-[^ :]+:[0-9]+: Error: selected processor does not support `uqrshrn z6\.b,{z12\.s-z15\.s},#25'
-[^ :]+:[0-9]+: Error: selected processor does not support `uqrshrn z0\.h,{z0\.d-z3\.d},#1'
-[^ :]+:[0-9]+: Error: selected processor does not support `uqrshrn z31\.h,{z0\.d-z3\.d},#1'
-[^ :]+:[0-9]+: Error: selected processor does not support `uqrshrn z0\.h,{z28\.d-z31\.d},#1'
-[^ :]+:[0-9]+: Error: selected processor does not support `uqrshrn z0\.h,{z0\.d-z3\.d},#64'
-[^ :]+:[0-9]+: Error: selected processor does not support `uqrshrn z25\.h,{z20\.d-z23\.d},#50'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrn z0\.b,{ ?z0\.s ?- ?z3\.s ?},#1'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrn z31\.b,{ ?z0\.s ?- ?z3\.s ?},#1'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrn z0\.b,{ ?z28\.s ?- ?z31\.s ?},#1'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrn z0\.b,{ ?z0\.s ?- ?z3\.s ?},#32'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrn z6\.b,{ ?z12\.s ?- ?z15\.s ?},#25'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrn z0\.h,{ ?z0\.d ?- ?z3\.d ?},#1'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrn z31\.h,{ ?z0\.d ?- ?z3\.d ?},#1'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrn z0\.h,{ ?z28\.d ?- ?z31\.d ?},#1'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrn z0\.h,{ ?z0\.d ?- ?z3\.d ?},#64'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrn z25\.h,{ ?z20\.d ?- ?z23\.d ?},#50'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrun z0\.b,{ ?z0\.s ?- ?z3\.s ?},#1'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrun z31\.b,{ ?z0\.s ?- ?z3\.s ?},#1'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrun z0\.b,{ ?z28\.s ?- ?z31\.s ?},#1'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrun z0\.b,{ ?z0\.s ?- ?z3\.s ?},#32'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrun z6\.b,{ ?z12\.s ?- ?z15\.s ?},#25'
+[^ :]+:[0-9]+: Error: selected processor does not support `uqrshrn z0\.b,{ ?z0\.s ?- ?z3\.s ?},#1'
+[^ :]+:[0-9]+: Error: selected processor does not support `uqrshrn z31\.b,{ ?z0\.s ?- ?z3\.s ?},#1'
+[^ :]+:[0-9]+: Error: selected processor does not support `uqrshrn z0\.b,{ ?z28\.s ?- ?z31\.s ?},#1'
+[^ :]+:[0-9]+: Error: selected processor does not support `uqrshrn z0\.b,{ ?z0\.s ?- ?z3\.s ?},#32'
+[^ :]+:[0-9]+: Error: selected processor does not support `uqrshrn z6\.b,{ ?z12\.s ?- ?z15\.s ?},#25'
+[^ :]+:[0-9]+: Error: selected processor does not support `uqrshrn z0\.h,{ ?z0\.d ?- ?z3\.d ?},#1'
+[^ :]+:[0-9]+: Error: selected processor does not support `uqrshrn z31\.h,{ ?z0\.d ?- ?z3\.d ?},#1'
+[^ :]+:[0-9]+: Error: selected processor does not support `uqrshrn z0\.h,{ ?z28\.d ?- ?z31\.d ?},#1'
+[^ :]+:[0-9]+: Error: selected processor does not support `uqrshrn z0\.h,{ ?z0\.d ?- ?z3\.d ?},#64'
+[^ :]+:[0-9]+: Error: selected processor does not support `uqrshrn z25\.h,{ ?z20\.d ?- ?z23\.d ?},#50'
diff --git a/gas/testsuite/gas/aarch64/sme2-29-invalid.l b/gas/testsuite/gas/aarch64/sme2-29-invalid.l
index 893866c..c7b9f0a 100644
--- a/gas/testsuite/gas/aarch64/sme2-29-invalid.l
+++ b/gas/testsuite/gas/aarch64/sme2-29-invalid.l
@@ -1,37 +1,37 @@
 [^ :]+: Assembler messages:
 [^ :]+:[0-9]+: Error: expected '{' at operand 1 -- `sunpk 0,z0\.b'
-[^ :]+:[0-9]+: Error: expected a register or register list at operand 2 -- `sunpk {z0\.h,z1\.h},0'
+[^ :]+:[0-9]+: Error: expected a register or register list at operand 2 -- `sunpk { ?z0\.h,z1\.h ?},0'
 [^ :]+:[0-9]+: Error: missing braces at operand 1 -- `sunpk z0\.b,z0\.b'
-[^ :]+:[0-9]+: Error: operand mismatch -- `sunpk {z0\.b,z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: operand mismatch -- `sunpk { ?z0\.b,z1\.b ?},z0\.b'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	sunpk {z0\.h-z1\.h}, z0\.b
 [^ :]+:[0-9]+: Info:    other valid variant\(s\):
 [^ :]+:[0-9]+: Info:    	sunpk {z0\.s-z1\.s}, z0\.h
 [^ :]+:[0-9]+: Info:    	sunpk {z0\.d-z1\.d}, z0\.s
-[^ :]+:[0-9]+: Error: operand mismatch -- `sunpk {z0\.h,z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: operand mismatch -- `sunpk { ?z0\.h,z1\.h ?},z0\.h'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	sunpk {z0\.h-z1\.h}, z0\.b
 [^ :]+:[0-9]+: Info:    other valid variant\(s\):
 [^ :]+:[0-9]+: Info:    	sunpk {z0\.s-z1\.s}, z0\.h
 [^ :]+:[0-9]+: Info:    	sunpk {z0\.d-z1\.d}, z0\.s
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `sunpk {z1\.h,z2\.h},z0\.b'
-[^ :]+:[0-9]+: Error: operand mismatch -- `sunpk {z0\.b,z2\.b},z0\.b'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `sunpk { ?z1\.h,z2\.h ?},z0\.b'
+[^ :]+:[0-9]+: Error: operand mismatch -- `sunpk { ?z0\.b,z2\.b ?},z0\.b'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	sunpk {z0\.h, z2\.h}, z0\.b
 [^ :]+:[0-9]+: Info:    other valid variant\(s\):
 [^ :]+:[0-9]+: Info:    	sunpk {z0\.s, z2\.s}, z0\.h
 [^ :]+:[0-9]+: Info:    	sunpk {z0\.d, z2\.d}, z0\.s
-[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 1 -- `sunpk {z1\.h-z3\.h},{z0\.b-z1\.b}'
-[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 1 -- `sunpk {z2\.h-z4\.h},{z0\.b-z1\.b}'
-[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 1 -- `sunpk {z3\.h-z5\.h},{z0\.b-z1\.b}'
-[^ :]+:[0-9]+: Error: operand mismatch -- `sunpk {z0\.s-z3\.s},z0\.b'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 1 -- `sunpk { ?z1\.h ?- ?z3\.h ?},{ ?z0\.b ?- ?z1\.b ?}'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 1 -- `sunpk { ?z2\.h ?- ?z4\.h ?},{ ?z0\.b ?- ?z1\.b ?}'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 1 -- `sunpk { ?z3\.h ?- ?z5\.h ?},{ ?z0\.b ?- ?z1\.b ?}'
+[^ :]+:[0-9]+: Error: operand mismatch -- `sunpk { ?z0\.s ?- ?z3\.s ?},z0\.b'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	sunpk {z0\.h-z3\.h}, z0\.b
 [^ :]+:[0-9]+: Info:    other valid variant\(s\):
 [^ :]+:[0-9]+: Info:    	sunpk {z0\.s-z3\.s}, z0\.h
 [^ :]+:[0-9]+: Info:    	sunpk {z0\.d-z3\.d}, z0\.s
-[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 2 -- `sunpk {z0\.s-z3\.s},{x0\.s-x1\.s}'
-[^ :]+:[0-9]+: Error: operand mismatch -- `sunpk {z0\.s-z3\.s},{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 2 -- `sunpk { ?z0\.s ?- ?z3\.s ?},{ ?x0\.s ?- ?x1\.s ?}'
+[^ :]+:[0-9]+: Error: operand mismatch -- `sunpk { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?}'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	sunpk {z0\.s-z3\.s}, {z0\.h-z3\.h}
 [^ :]+:[0-9]+: Info:    other valid variant\(s\):
diff --git a/gas/testsuite/gas/aarch64/sme2-29-noarch.l b/gas/testsuite/gas/aarch64/sme2-29-noarch.l
index 2777e16..dad71cd 100644
--- a/gas/testsuite/gas/aarch64/sme2-29-noarch.l
+++ b/gas/testsuite/gas/aarch64/sme2-29-noarch.l
@@ -1,37 +1,37 @@
 [^ :]+: Assembler messages:
-[^ :]+:[0-9]+: Error: selected processor does not support `sunpk {z0\.h,z1\.h},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `sunpk {z30\.h,z31\.h},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `sunpk {z0\.h,z1\.h},z31\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `sunpk {z0\.h-z3\.h},{z0\.b-z1\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sunpk {z28\.h-z31\.h},{z0\.b-z1\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sunpk {z0\.h-z3\.h},{z30\.b-z31\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sunpk {z0\.s,z1\.s},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `sunpk {z30\.s,z31\.s},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `sunpk {z0\.s,z1\.s},z31\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `sunpk {z0\.s-z3\.s},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sunpk {z28\.s-z31\.s},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sunpk {z0\.s-z3\.s},{z30\.h-z31\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sunpk {z0\.d,z1\.d},z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `sunpk {z30\.d,z31\.d},z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `sunpk {z0\.d,z1\.d},z31\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `sunpk {z0\.d-z3\.d},{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sunpk {z28\.d-z31\.d},{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sunpk {z0\.d-z3\.d},{z30\.s-z31\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `uunpk {z0\.h,z1\.h},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `uunpk {z30\.h,z31\.h},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `uunpk {z0\.h,z1\.h},z31\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `uunpk {z0\.h-z3\.h},{z0\.b-z1\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `uunpk {z28\.h-z31\.h},{z0\.b-z1\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `uunpk {z0\.h-z3\.h},{z30\.b-z31\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `uunpk {z0\.s,z1\.s},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `uunpk {z30\.s,z31\.s},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `uunpk {z0\.s,z1\.s},z31\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `uunpk {z0\.s-z3\.s},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `uunpk {z28\.s-z31\.s},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `uunpk {z0\.s-z3\.s},{z30\.h-z31\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `uunpk {z0\.d,z1\.d},z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `uunpk {z30\.d,z31\.d},z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `uunpk {z0\.d,z1\.d},z31\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `uunpk {z0\.d-z3\.d},{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `uunpk {z28\.d-z31\.d},{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `uunpk {z0\.d-z3\.d},{z30\.s-z31\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sunpk { ?z0\.h,z1\.h ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sunpk { ?z30\.h,z31\.h ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sunpk { ?z0\.h,z1\.h ?},z31\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sunpk { ?z0\.h ?- ?z3\.h ?},{ ?z0\.b ?- ?z1\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sunpk { ?z28\.h ?- ?z31\.h ?},{ ?z0\.b ?- ?z1\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sunpk { ?z0\.h ?- ?z3\.h ?},{ ?z30\.b ?- ?z31\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sunpk { ?z0\.s,z1\.s ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sunpk { ?z30\.s,z31\.s ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sunpk { ?z0\.s,z1\.s ?},z31\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sunpk { ?z0\.s ?- ?z3\.s ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sunpk { ?z28\.s ?- ?z31\.s ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sunpk { ?z0\.s ?- ?z3\.s ?},{ ?z30\.h ?- ?z31\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sunpk { ?z0\.d,z1\.d ?},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `sunpk { ?z30\.d,z31\.d ?},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `sunpk { ?z0\.d,z1\.d ?},z31\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `sunpk { ?z0\.d ?- ?z3\.d ?},{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sunpk { ?z28\.d ?- ?z31\.d ?},{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sunpk { ?z0\.d ?- ?z3\.d ?},{ ?z30\.s ?- ?z31\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `uunpk { ?z0\.h,z1\.h ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `uunpk { ?z30\.h,z31\.h ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `uunpk { ?z0\.h,z1\.h ?},z31\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `uunpk { ?z0\.h ?- ?z3\.h ?},{ ?z0\.b ?- ?z1\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `uunpk { ?z28\.h ?- ?z31\.h ?},{ ?z0\.b ?- ?z1\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `uunpk { ?z0\.h ?- ?z3\.h ?},{ ?z30\.b ?- ?z31\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `uunpk { ?z0\.s,z1\.s ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `uunpk { ?z30\.s,z31\.s ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `uunpk { ?z0\.s,z1\.s ?},z31\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `uunpk { ?z0\.s ?- ?z3\.s ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `uunpk { ?z28\.s ?- ?z31\.s ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `uunpk { ?z0\.s ?- ?z3\.s ?},{ ?z30\.h ?- ?z31\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `uunpk { ?z0\.d,z1\.d ?},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `uunpk { ?z30\.d,z31\.d ?},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `uunpk { ?z0\.d,z1\.d ?},z31\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `uunpk { ?z0\.d ?- ?z3\.d ?},{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `uunpk { ?z28\.d ?- ?z31\.d ?},{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `uunpk { ?z0\.d ?- ?z3\.d ?},{ ?z30\.s ?- ?z31\.s ?}'
diff --git a/gas/testsuite/gas/aarch64/sme2-3-invalid.l b/gas/testsuite/gas/aarch64/sme2-3-invalid.l
index 90345d4..b9fb6d6 100644
--- a/gas/testsuite/gas/aarch64/sme2-3-invalid.l
+++ b/gas/testsuite/gas/aarch64/sme2-3-invalid.l
@@ -1,75 +1,75 @@
 [^ :]+: Assembler messages:
 [^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `ld1d 0,pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: expected an SVE predicate register at operand 2 -- `ld1d {z0\.d-z1\.d},0,\[x0\]'
-[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1d {z0\.d-z1\.d},pn8/z,0'
-[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 1 -- `ld1d {z0\.d-z2\.d},pn8/z,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1d {z1\.d-z2\.d},pn8/z,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ld1d {z0\.d-z1\.d},p8/z,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: operand mismatch -- `ld1d {z0\.d-z1\.d},pn8,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: expected an SVE predicate register at operand 2 -- `ld1d { ?z0\.d ?- ?z1\.d ?},0,\[x0\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1d { ?z0\.d ?- ?z1\.d ?},pn8/z,0'
+[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 1 -- `ld1d { ?z0\.d ?- ?z2\.d ?},pn8/z,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1d { ?z1\.d ?- ?z2\.d ?},pn8/z,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ld1d { ?z0\.d ?- ?z1\.d ?},p8/z,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `ld1d { ?z0\.d ?- ?z1\.d ?},pn8,\[x0,x1,lsl ?#3\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	ld1d {z0\.d-z1\.d}, pn8/z, \[x0, x1, lsl #3\]
-[^ :]+:[0-9]+: Error: operand mismatch -- `ld1d {z0\.d-z1\.d},pn8/m,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `ld1d { ?z0\.d ?- ?z1\.d ?},pn8/m,\[x0,x1,lsl ?#3\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	ld1d {z0\.d-z1\.d}, pn8/z, \[x0, x1, lsl #3\]
-[^ :]+:[0-9]+: Error: operand mismatch -- `ld1d {z0\.d-z1\.d},pn8\.d,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `ld1d { ?z0\.d ?- ?z1\.d ?},pn8\.d,\[x0,x1,lsl ?#3\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	ld1d {z0\.d-z1\.d}, pn8/z, \[x0, x1, lsl #3\]
-[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `ld1d {z0\.d-z1\.d},pn0/z,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `ld1d {z0\.d-z1\.d},pn7/z,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: expected a 64-bit base register at operand 3 -- `ld1d {z0\.d-z1\.d},pn8/z,\[w0,w1,lsl#3\]'
-[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ld1d {z0\.d-z1\.d},pn8/z,\[xzr,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ld1d {z0\.d-z1\.d},pn8/z,\[sp,sp,lsl#3\]'
-[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1d {z0\.d-z1\.d},pn8/z,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1d {z0\.d-z1\.d},pn8/z,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1d {z0\.d-z1\.d},pn8/z,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1d {z0\.d-z1\.d},pn8/z,\[x0,x1,lsl#4\]'
-[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1d {z0\.d-z1\.d},pn8/z,\[x0,w1,sxtw#3\]'
-[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1d {z0\.d-z1\.d},pn8/z,\[x0,w1,uxtw#3\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1d {z1\.d-z4\.d},pn8/z,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1d {z2\.d-z5\.d},pn8/z,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1d {z3\.d-z6\.d},pn8/z,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ld1d {z0\.d-z3\.d},p8/z,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: operand mismatch -- `ld1d {z0\.d-z3\.d},pn8,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `ld1d { ?z0\.d ?- ?z1\.d ?},pn0/z,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `ld1d { ?z0\.d ?- ?z1\.d ?},pn7/z,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: expected a 64-bit base register at operand 3 -- `ld1d { ?z0\.d ?- ?z1\.d ?},pn8/z,\[w0,w1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ld1d { ?z0\.d ?- ?z1\.d ?},pn8/z,\[xzr,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ld1d { ?z0\.d ?- ?z1\.d ?},pn8/z,\[sp,sp,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1d { ?z0\.d ?- ?z1\.d ?},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1d { ?z0\.d ?- ?z1\.d ?},pn8/z,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1d { ?z0\.d ?- ?z1\.d ?},pn8/z,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1d { ?z0\.d ?- ?z1\.d ?},pn8/z,\[x0,x1,lsl ?#4\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1d { ?z0\.d ?- ?z1\.d ?},pn8/z,\[x0,w1,sxtw ?#3\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1d { ?z0\.d ?- ?z1\.d ?},pn8/z,\[x0,w1,uxtw ?#3\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1d { ?z1\.d ?- ?z4\.d ?},pn8/z,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1d { ?z2\.d ?- ?z5\.d ?},pn8/z,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1d { ?z3\.d ?- ?z6\.d ?},pn8/z,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ld1d { ?z0\.d ?- ?z3\.d ?},p8/z,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `ld1d { ?z0\.d ?- ?z3\.d ?},pn8,\[x0,x1,lsl ?#3\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	ld1d {z0\.d-z3\.d}, pn8/z, \[x0, x1, lsl #3\]
-[^ :]+:[0-9]+: Error: operand mismatch -- `ld1d {z0\.d-z3\.d},pn8/m,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `ld1d { ?z0\.d ?- ?z3\.d ?},pn8/m,\[x0,x1,lsl ?#3\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	ld1d {z0\.d-z3\.d}, pn8/z, \[x0, x1, lsl #3\]
-[^ :]+:[0-9]+: Error: operand mismatch -- `ld1d {z0\.d-z3\.d},pn8\.d,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `ld1d { ?z0\.d ?- ?z3\.d ?},pn8\.d,\[x0,x1,lsl ?#3\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	ld1d {z0\.d-z3\.d}, pn8/z, \[x0, x1, lsl #3\]
-[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `ld1d {z0\.d-z3\.d},pn0/z,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `ld1d {z0\.d-z3\.d},pn7/z,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: expected a 64-bit base register at operand 3 -- `ld1d {z0\.d-z3\.d},pn8/z,\[w0,w1,lsl#3\]'
-[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ld1d {z0\.d-z3\.d},pn8/z,\[xzr,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ld1d {z0\.d-z3\.d},pn8/z,\[sp,sp,lsl#3\]'
-[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1d {z0\.d-z3\.d},pn8/z,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1d {z0\.d-z3\.d},pn8/z,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1d {z0\.d-z3\.d},pn8/z,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1d {z0\.d-z3\.d},pn8/z,\[x0,x1,lsl#4\]'
-[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1d {z0\.d-z3\.d},pn8/z,\[x0,w1,sxtw#3\]'
-[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1d {z0\.d-z3\.d},pn8/z,\[x0,w1,uxtw#3\]'
-[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1d {z0\.d,z2\.d},pn8/z,\[x0,x1,lsl#3\]`
-[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1d {z0\.d,z3\.d},pn8/z,\[x0,x1,lsl#3\]`
-[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1d {z0\.d,z4\.d},pn8/z,\[x0,x1,lsl#3\]`
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1d {z8\.d,z16\.d},pn8/z,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1d {z24\.d,z0\.d},pn8/z,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1d {z8\.d,z0\.d},pn8/z,\[x0,x1,lsl#3\]`
-[^ :]+:[0-9]+: Error: operand mismatch -- `ld1d {z0\.h,z8\.h},pn8/z,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `ld1d { ?z0\.d ?- ?z3\.d ?},pn0/z,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `ld1d { ?z0\.d ?- ?z3\.d ?},pn7/z,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: expected a 64-bit base register at operand 3 -- `ld1d { ?z0\.d ?- ?z3\.d ?},pn8/z,\[w0,w1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ld1d { ?z0\.d ?- ?z3\.d ?},pn8/z,\[xzr,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ld1d { ?z0\.d ?- ?z3\.d ?},pn8/z,\[sp,sp,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1d { ?z0\.d ?- ?z3\.d ?},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1d { ?z0\.d ?- ?z3\.d ?},pn8/z,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1d { ?z0\.d ?- ?z3\.d ?},pn8/z,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1d { ?z0\.d ?- ?z3\.d ?},pn8/z,\[x0,x1,lsl ?#4\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1d { ?z0\.d ?- ?z3\.d ?},pn8/z,\[x0,w1,sxtw ?#3\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1d { ?z0\.d ?- ?z3\.d ?},pn8/z,\[x0,w1,uxtw ?#3\]'
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1d { ?z0\.d,z2\.d ?},pn8/z,\[x0,x1,lsl ?#3\]`
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1d { ?z0\.d,z3\.d ?},pn8/z,\[x0,x1,lsl ?#3\]`
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1d { ?z0\.d,z4\.d ?},pn8/z,\[x0,x1,lsl ?#3\]`
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1d { ?z8\.d,z16\.d ?},pn8/z,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1d { ?z24\.d,z0\.d ?},pn8/z,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1d { ?z8\.d,z0\.d ?},pn8/z,\[x0,x1,lsl ?#3\]`
+[^ :]+:[0-9]+: Error: operand mismatch -- `ld1d { ?z0\.h,z8\.h ?},pn8/z,\[x0,x1,lsl ?#3\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	ld1d {z0\.d, z8\.d}, pn8/z, \[x0, x1, lsl #3\]
-[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ld1d {z0\.d,z8\.d},p8/z,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: expected a 64-bit base register at operand 3 -- `ld1d {z0\.d,z8\.d},pn8/z,\[w0,w30,lsl#3\]'
-[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ld1d {z0\.d,z8\.d},pn8/z,\[xzr,xzr,lsl#3\]'
-[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ld1d {z0\.d,z8\.d},pn8/z,\[x0,sp,lsl#3\]'
-[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1d {z0\.d,z8\.d},pn8/z,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1d {z4\.d,z8\.d,z12\.d,z16\.d},pn8/z,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1d {z20\.d,z24\.d,z28\.d,z0\.d},pn8/z,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: operand mismatch -- `ld1d {z0\.h,z4\.h,z8\.h,z12\.h},pn8/z,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ld1d { ?z0\.d,z8\.d ?},p8/z,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: expected a 64-bit base register at operand 3 -- `ld1d { ?z0\.d,z8\.d ?},pn8/z,\[w0,w30,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ld1d { ?z0\.d,z8\.d ?},pn8/z,\[xzr,xzr,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ld1d { ?z0\.d,z8\.d ?},pn8/z,\[x0,sp,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1d { ?z0\.d,z8\.d ?},pn8/z,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1d { ?z4\.d,z8\.d,z12\.d,z16\.d ?},pn8/z,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1d { ?z20\.d,z24\.d,z28\.d,z0\.d ?},pn8/z,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `ld1d { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn8/z,\[x0,x1,lsl ?#3\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	ld1d {z0\.d, z4\.d, z8\.d, z12\.d}, pn8/z, \[x0, x1, lsl #3\]
-[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ld1d {z0\.d,z4\.d,z8\.d,z12\.d},p8/z,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: expected a 64-bit base register at operand 3 -- `ld1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8/z,\[w0,w30,lsl#3\]'
-[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ld1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8/z,\[xzr,xzr,lsl#3\]'
-[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ld1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8/z,\[x0,sp,lsl#3\]'
-[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8/z,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ld1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},p8/z,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: expected a 64-bit base register at operand 3 -- `ld1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn8/z,\[w0,w30,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ld1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn8/z,\[xzr,xzr,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ld1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn8/z,\[x0,sp,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn8/z,\[x0,x1,lsl ?#1\]'
diff --git a/gas/testsuite/gas/aarch64/sme2-3-noarch.l b/gas/testsuite/gas/aarch64/sme2-3-noarch.l
index 16eba8f..1b744dd 100644
--- a/gas/testsuite/gas/aarch64/sme2-3-noarch.l
+++ b/gas/testsuite/gas/aarch64/sme2-3-noarch.l
@@ -1,481 +1,481 @@
 [^ :]+: Assembler messages:
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d-z1\.d},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d-z1\.d},pn8/z,\[x0,#0,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {Z0\.D-Z1\.D},PN8/Z,\[X0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z30\.d-z31\.d},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d-z1\.d},pn15/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d-z1\.d},pn8/z,\[x30\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d-z1\.d},pn8/z,\[sp\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d-z1\.d},pn8/z,\[x0,#-16,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d-z1\.d},pn8/z,\[x0,#14,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z12\.d-z13\.d},pn13/z,\[x11,#-10,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d-z3\.d},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d-z3\.d},pn8/z,\[x0,#0,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {Z0\.D-Z3\.D},PN8/Z,\[X0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z28\.d-z31\.d},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d-z3\.d},pn15/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d-z3\.d},pn8/z,\[x30\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d-z3\.d},pn8/z,\[sp\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d-z3\.d},pn8/z,\[x0,#-32,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d-z3\.d},pn8/z,\[x0,#28,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z8\.d-z11\.d},pn11/z,\[x17,#20,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d,z8\.d},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d,z8\.d},pn8/z,\[x0,#0,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {Z0\.D,Z8\.D},PN8/Z,\[X0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z1\.d,z9\.d},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z2\.d,z10\.d},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z3\.d,z11\.d},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z4\.d,z12\.d},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z5\.d,z13\.d},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z6\.d,z14\.d},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z7\.d,z15\.d},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z16\.d,z24\.d},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z17\.d,z25\.d},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z18\.d,z26\.d},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z19\.d,z27\.d},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z20\.d,z28\.d},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z21\.d,z29\.d},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z22\.d,z30\.d},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z23\.d,z31\.d},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d,z8\.d},pn15/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d,z8\.d},pn8/z,\[x30\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d,z8\.d},pn8/z,\[sp\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d,z8\.d},pn8/z,\[x0,#-16,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d,z8\.d},pn8/z,\[x0,#14,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z3\.d,z11\.d},pn10/z,\[x22,#6,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8/z,\[x0,#0,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {Z0\.D,Z4\.D,Z8\.D,Z12\.D},PN8/Z,\[X0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z1\.d,z5\.d,z9\.d,z13\.d},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z2\.d,z6\.d,z10\.d,z14\.d},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z3\.d,z7\.d,z11\.d,z15\.d},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z16\.d,z20\.d,z24\.d,z28\.d},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z17\.d,z21\.d,z25\.d,z29\.d},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z18\.d,z22\.d,z26\.d,z30\.d},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z19\.d,z23\.d,z27\.d,z31\.d},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d,z4\.d,z8\.d,z12\.d},pn15/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8/z,\[x30\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8/z,\[sp\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8/z,\[x0,#-32,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8/z,\[x0,#28,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z2\.d,z6\.d,z10\.d,z14\.d},pn14/z,\[x29,#8,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d-z1\.d},pn8/z,\[x0,x1,lsl 3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d-z1\.d},pn8/z,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {Z0\.D-Z1\.D},PN8/Z,\[X0,X1,LSL#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z30\.d-z31\.d},pn8/z,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d-z1\.d},pn15/z,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d-z1\.d},pn8/z,\[x30,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d-z1\.d},pn8/z,\[sp,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d-z1\.d},pn8/z,\[x0,x30,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d-z1\.d},pn8/z,\[x0,xzr,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z14\.d-z15\.d},pn9/z,\[x26,x3,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d-z3\.d},pn8/z,\[x0,x1,lsl 3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d-z3\.d},pn8/z,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {Z0\.D-Z3\.D},PN8/Z,\[X0,X1,LSL#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z28\.d-z31\.d},pn8/z,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d-z3\.d},pn15/z,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d-z3\.d},pn8/z,\[x30,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d-z3\.d},pn8/z,\[sp,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d-z3\.d},pn8/z,\[x0,x30,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d-z3\.d},pn8/z,\[x0,xzr,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z8\.d-z11\.d},pn11/z,\[x27,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d,z8\.d},pn8/z,\[x0,x1,lsl 3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d,z8\.d},pn8/z,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {Z0\.D,Z8\.D},PN8/Z,\[X0,X1,LSL#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z1\.d,z9\.d},pn8/z,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z2\.d,z10\.d},pn8/z,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z3\.d,z11\.d},pn8/z,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z4\.d,z12\.d},pn8/z,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z5\.d,z13\.d},pn8/z,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z6\.d,z14\.d},pn8/z,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z7\.d,z15\.d},pn8/z,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z16\.d,z24\.d},pn8/z,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z17\.d,z25\.d},pn8/z,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z18\.d,z26\.d},pn8/z,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z19\.d,z27\.d},pn8/z,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z20\.d,z28\.d},pn8/z,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z21\.d,z29\.d},pn8/z,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z22\.d,z30\.d},pn8/z,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z23\.d,z31\.d},pn8/z,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d,z8\.d},pn15/z,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d,z8\.d},pn8/z,\[x30,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d,z8\.d},pn8/z,\[sp,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d,z8\.d},pn8/z,\[x0,x30,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d,z8\.d},pn8/z,\[x0,xzr,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z5\.d,z13\.d},pn14/z,\[x15,x24,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8/z,\[x0,x1,lsl 3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8/z,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {Z0\.D,Z4\.D,Z8\.D,Z12\.D},PN8/Z,\[X0,X1,LSL#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z1\.d,z5\.d,z9\.d,z13\.d},pn8/z,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z2\.d,z6\.d,z10\.d,z14\.d},pn8/z,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z3\.d,z7\.d,z11\.d,z15\.d},pn8/z,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z16\.d,z20\.d,z24\.d,z28\.d},pn8/z,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z17\.d,z21\.d,z25\.d,z29\.d},pn8/z,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z18\.d,z22\.d,z26\.d,z30\.d},pn8/z,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z19\.d,z23\.d,z27\.d,z31\.d},pn8/z,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d,z4\.d,z8\.d,z12\.d},pn15/z,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8/z,\[x30,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8/z,\[sp,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8/z,\[x0,x30,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8/z,\[x0,xzr,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z17\.d,z21\.d,z25\.d,z29\.d},pn11/z,\[x4,x6,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d-z1\.d},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d-z1\.d},pn8/z,\[x0,#0,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {Z0\.D-Z1\.D},PN8/Z,\[X0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z30\.d-z31\.d},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d-z1\.d},pn15/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d-z1\.d},pn8/z,\[x30\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d-z1\.d},pn8/z,\[sp\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d-z1\.d},pn8/z,\[x0,#-16,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d-z1\.d},pn8/z,\[x0,#14,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z12\.d-z13\.d},pn13/z,\[x11,#-10,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d-z3\.d},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d-z3\.d},pn8/z,\[x0,#0,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {Z0\.D-Z3\.D},PN8/Z,\[X0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z28\.d-z31\.d},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d-z3\.d},pn15/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d-z3\.d},pn8/z,\[x30\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d-z3\.d},pn8/z,\[sp\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d-z3\.d},pn8/z,\[x0,#-32,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d-z3\.d},pn8/z,\[x0,#28,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z8\.d-z11\.d},pn11/z,\[x17,#20,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d,z8\.d},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d,z8\.d},pn8/z,\[x0,#0,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {Z0\.D,Z8\.D},PN8/Z,\[X0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z1\.d,z9\.d},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z2\.d,z10\.d},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z3\.d,z11\.d},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z4\.d,z12\.d},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z5\.d,z13\.d},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z6\.d,z14\.d},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z7\.d,z15\.d},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z16\.d,z24\.d},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z17\.d,z25\.d},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z18\.d,z26\.d},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z19\.d,z27\.d},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z20\.d,z28\.d},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z21\.d,z29\.d},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z22\.d,z30\.d},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z23\.d,z31\.d},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d,z8\.d},pn15/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d,z8\.d},pn8/z,\[x30\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d,z8\.d},pn8/z,\[sp\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d,z8\.d},pn8/z,\[x0,#-16,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d,z8\.d},pn8/z,\[x0,#14,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z3\.d,z11\.d},pn10/z,\[x22,#6,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8/z,\[x0,#0,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {Z0\.D,Z4\.D,Z8\.D,Z12\.D},PN8/Z,\[X0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z1\.d,z5\.d,z9\.d,z13\.d},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z2\.d,z6\.d,z10\.d,z14\.d},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z3\.d,z7\.d,z11\.d,z15\.d},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z16\.d,z20\.d,z24\.d,z28\.d},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z17\.d,z21\.d,z25\.d,z29\.d},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z18\.d,z22\.d,z26\.d,z30\.d},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z19\.d,z23\.d,z27\.d,z31\.d},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d,z4\.d,z8\.d,z12\.d},pn15/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8/z,\[x30\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8/z,\[sp\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8/z,\[x0,#-32,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8/z,\[x0,#28,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z2\.d,z6\.d,z10\.d,z14\.d},pn14/z,\[x29,#8,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d-z1\.d},pn8/z,\[x0,x1,lsl 3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d-z1\.d},pn8/z,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {Z0\.D-Z1\.D},PN8/Z,\[X0,X1,LSL#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z30\.d-z31\.d},pn8/z,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d-z1\.d},pn15/z,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d-z1\.d},pn8/z,\[x30,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d-z1\.d},pn8/z,\[sp,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d-z1\.d},pn8/z,\[x0,x30,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d-z1\.d},pn8/z,\[x0,xzr,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z14\.d-z15\.d},pn9/z,\[x26,x3,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d-z3\.d},pn8/z,\[x0,x1,lsl 3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d-z3\.d},pn8/z,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {Z0\.D-Z3\.D},PN8/Z,\[X0,X1,LSL#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z28\.d-z31\.d},pn8/z,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d-z3\.d},pn15/z,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d-z3\.d},pn8/z,\[x30,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d-z3\.d},pn8/z,\[sp,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d-z3\.d},pn8/z,\[x0,x30,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d-z3\.d},pn8/z,\[x0,xzr,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z8\.d-z11\.d},pn11/z,\[x27,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d,z8\.d},pn8/z,\[x0,x1,lsl 3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d,z8\.d},pn8/z,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {Z0\.D,Z8\.D},PN8/Z,\[X0,X1,LSL#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z1\.d,z9\.d},pn8/z,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z2\.d,z10\.d},pn8/z,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z3\.d,z11\.d},pn8/z,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z4\.d,z12\.d},pn8/z,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z5\.d,z13\.d},pn8/z,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z6\.d,z14\.d},pn8/z,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z7\.d,z15\.d},pn8/z,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z16\.d,z24\.d},pn8/z,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z17\.d,z25\.d},pn8/z,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z18\.d,z26\.d},pn8/z,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z19\.d,z27\.d},pn8/z,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z20\.d,z28\.d},pn8/z,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z21\.d,z29\.d},pn8/z,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z22\.d,z30\.d},pn8/z,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z23\.d,z31\.d},pn8/z,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d,z8\.d},pn15/z,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d,z8\.d},pn8/z,\[x30,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d,z8\.d},pn8/z,\[sp,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d,z8\.d},pn8/z,\[x0,x30,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d,z8\.d},pn8/z,\[x0,xzr,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z5\.d,z13\.d},pn14/z,\[x15,x24,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8/z,\[x0,x1,lsl 3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8/z,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {Z0\.D,Z4\.D,Z8\.D,Z12\.D},PN8/Z,\[X0,X1,LSL#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z1\.d,z5\.d,z9\.d,z13\.d},pn8/z,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z2\.d,z6\.d,z10\.d,z14\.d},pn8/z,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z3\.d,z7\.d,z11\.d,z15\.d},pn8/z,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z16\.d,z20\.d,z24\.d,z28\.d},pn8/z,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z17\.d,z21\.d,z25\.d,z29\.d},pn8/z,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z18\.d,z22\.d,z26\.d,z30\.d},pn8/z,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z19\.d,z23\.d,z27\.d,z31\.d},pn8/z,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d,z4\.d,z8\.d,z12\.d},pn15/z,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8/z,\[x30,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8/z,\[sp,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8/z,\[x0,x30,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8/z,\[x0,xzr,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z17\.d,z21\.d,z25\.d,z29\.d},pn11/z,\[x4,x6,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d-z1\.d},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d-z1\.d},pn8,\[x0,#0,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {Z0\.D-Z1\.D},PN8,\[X0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z30\.d-z31\.d},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d-z1\.d},pn15,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d-z1\.d},pn8,\[x30\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d-z1\.d},pn8,\[sp\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d-z1\.d},pn8,\[x0,#-16,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d-z1\.d},pn8,\[x0,#14,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z12\.d-z13\.d},pn13,\[x11,#-10,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d-z3\.d},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d-z3\.d},pn8,\[x0,#0,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {Z0\.D-Z3\.D},PN8,\[X0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z28\.d-z31\.d},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d-z3\.d},pn15,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d-z3\.d},pn8,\[x30\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d-z3\.d},pn8,\[sp\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d-z3\.d},pn8,\[x0,#-32,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d-z3\.d},pn8,\[x0,#28,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z8\.d-z11\.d},pn11,\[x17,#20,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d,z8\.d},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d,z8\.d},pn8,\[x0,#0,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {Z0\.D,Z8\.D},PN8,\[X0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z1\.d,z9\.d},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z2\.d,z10\.d},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z3\.d,z11\.d},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z4\.d,z12\.d},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z5\.d,z13\.d},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z6\.d,z14\.d},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z7\.d,z15\.d},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z16\.d,z24\.d},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z17\.d,z25\.d},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z18\.d,z26\.d},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z19\.d,z27\.d},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z20\.d,z28\.d},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z21\.d,z29\.d},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z22\.d,z30\.d},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z23\.d,z31\.d},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d,z8\.d},pn15,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d,z8\.d},pn8,\[x30\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d,z8\.d},pn8,\[sp\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d,z8\.d},pn8,\[x0,#-16,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d,z8\.d},pn8,\[x0,#14,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z3\.d,z11\.d},pn10,\[x22,#6,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8,\[x0,#0,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {Z0\.D,Z4\.D,Z8\.D,Z12\.D},PN8,\[X0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z1\.d,z5\.d,z9\.d,z13\.d},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z2\.d,z6\.d,z10\.d,z14\.d},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z3\.d,z7\.d,z11\.d,z15\.d},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z16\.d,z20\.d,z24\.d,z28\.d},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z17\.d,z21\.d,z25\.d,z29\.d},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z18\.d,z22\.d,z26\.d,z30\.d},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z19\.d,z23\.d,z27\.d,z31\.d},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d,z4\.d,z8\.d,z12\.d},pn15,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8,\[x30\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8,\[sp\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8,\[x0,#-32,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8,\[x0,#28,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z2\.d,z6\.d,z10\.d,z14\.d},pn14,\[x29,#8,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d-z1\.d},pn8,\[x0,x1,lsl 3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d-z1\.d},pn8,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {Z0\.D-Z1\.D},PN8,\[X0,X1,LSL#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z30\.d-z31\.d},pn8,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d-z1\.d},pn15,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d-z1\.d},pn8,\[x30,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d-z1\.d},pn8,\[sp,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d-z1\.d},pn8,\[x0,x30,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d-z1\.d},pn8,\[x0,xzr,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z14\.d-z15\.d},pn9,\[x26,x3,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d-z3\.d},pn8,\[x0,x1,lsl 3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d-z3\.d},pn8,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {Z0\.D-Z3\.D},PN8,\[X0,X1,LSL#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z28\.d-z31\.d},pn8,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d-z3\.d},pn15,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d-z3\.d},pn8,\[x30,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d-z3\.d},pn8,\[sp,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d-z3\.d},pn8,\[x0,x30,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d-z3\.d},pn8,\[x0,xzr,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z8\.d-z11\.d},pn11,\[x27,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d,z8\.d},pn8,\[x0,x1,lsl 3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d,z8\.d},pn8,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {Z0\.D,Z8\.D},PN8,\[X0,X1,LSL#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z1\.d,z9\.d},pn8,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z2\.d,z10\.d},pn8,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z3\.d,z11\.d},pn8,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z4\.d,z12\.d},pn8,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z5\.d,z13\.d},pn8,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z6\.d,z14\.d},pn8,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z7\.d,z15\.d},pn8,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z16\.d,z24\.d},pn8,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z17\.d,z25\.d},pn8,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z18\.d,z26\.d},pn8,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z19\.d,z27\.d},pn8,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z20\.d,z28\.d},pn8,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z21\.d,z29\.d},pn8,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z22\.d,z30\.d},pn8,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z23\.d,z31\.d},pn8,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d,z8\.d},pn15,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d,z8\.d},pn8,\[x30,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d,z8\.d},pn8,\[sp,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d,z8\.d},pn8,\[x0,x30,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d,z8\.d},pn8,\[x0,xzr,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z5\.d,z13\.d},pn14,\[x15,x24,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8,\[x0,x1,lsl 3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {Z0\.D,Z4\.D,Z8\.D,Z12\.D},PN8,\[X0,X1,LSL#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z1\.d,z5\.d,z9\.d,z13\.d},pn8,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z2\.d,z6\.d,z10\.d,z14\.d},pn8,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z3\.d,z7\.d,z11\.d,z15\.d},pn8,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z16\.d,z20\.d,z24\.d,z28\.d},pn8,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z17\.d,z21\.d,z25\.d,z29\.d},pn8,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z18\.d,z22\.d,z26\.d,z30\.d},pn8,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z19\.d,z23\.d,z27\.d,z31\.d},pn8,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d,z4\.d,z8\.d,z12\.d},pn15,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8,\[x30,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8,\[sp,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8,\[x0,x30,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8,\[x0,xzr,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z17\.d,z21\.d,z25\.d,z29\.d},pn11,\[x4,x6,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d-z1\.d},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d-z1\.d},pn8,\[x0,#0,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {Z0\.D-Z1\.D},PN8,\[X0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z30\.d-z31\.d},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d-z1\.d},pn15,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d-z1\.d},pn8,\[x30\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d-z1\.d},pn8,\[sp\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d-z1\.d},pn8,\[x0,#-16,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d-z1\.d},pn8,\[x0,#14,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z12\.d-z13\.d},pn13,\[x11,#-10,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d-z3\.d},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d-z3\.d},pn8,\[x0,#0,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {Z0\.D-Z3\.D},PN8,\[X0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z28\.d-z31\.d},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d-z3\.d},pn15,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d-z3\.d},pn8,\[x30\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d-z3\.d},pn8,\[sp\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d-z3\.d},pn8,\[x0,#-32,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d-z3\.d},pn8,\[x0,#28,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z8\.d-z11\.d},pn11,\[x17,#20,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d,z8\.d},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d,z8\.d},pn8,\[x0,#0,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {Z0\.D,Z8\.D},PN8,\[X0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z1\.d,z9\.d},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z2\.d,z10\.d},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z3\.d,z11\.d},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z4\.d,z12\.d},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z5\.d,z13\.d},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z6\.d,z14\.d},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z7\.d,z15\.d},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z16\.d,z24\.d},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z17\.d,z25\.d},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z18\.d,z26\.d},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z19\.d,z27\.d},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z20\.d,z28\.d},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z21\.d,z29\.d},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z22\.d,z30\.d},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z23\.d,z31\.d},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d,z8\.d},pn15,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d,z8\.d},pn8,\[x30\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d,z8\.d},pn8,\[sp\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d,z8\.d},pn8,\[x0,#-16,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d,z8\.d},pn8,\[x0,#14,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z3\.d,z11\.d},pn10,\[x22,#6,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8,\[x0,#0,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {Z0\.D,Z4\.D,Z8\.D,Z12\.D},PN8,\[X0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z1\.d,z5\.d,z9\.d,z13\.d},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z2\.d,z6\.d,z10\.d,z14\.d},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z3\.d,z7\.d,z11\.d,z15\.d},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z16\.d,z20\.d,z24\.d,z28\.d},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z17\.d,z21\.d,z25\.d,z29\.d},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z18\.d,z22\.d,z26\.d,z30\.d},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z19\.d,z23\.d,z27\.d,z31\.d},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d,z4\.d,z8\.d,z12\.d},pn15,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8,\[x30\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8,\[sp\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8,\[x0,#-32,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8,\[x0,#28,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z2\.d,z6\.d,z10\.d,z14\.d},pn14,\[x29,#8,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d-z1\.d},pn8,\[x0,x1,lsl 3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d-z1\.d},pn8,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {Z0\.D-Z1\.D},PN8,\[X0,X1,LSL#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z30\.d-z31\.d},pn8,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d-z1\.d},pn15,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d-z1\.d},pn8,\[x30,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d-z1\.d},pn8,\[sp,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d-z1\.d},pn8,\[x0,x30,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d-z1\.d},pn8,\[x0,xzr,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z14\.d-z15\.d},pn9,\[x26,x3,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d-z3\.d},pn8,\[x0,x1,lsl 3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d-z3\.d},pn8,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {Z0\.D-Z3\.D},PN8,\[X0,X1,LSL#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z28\.d-z31\.d},pn8,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d-z3\.d},pn15,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d-z3\.d},pn8,\[x30,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d-z3\.d},pn8,\[sp,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d-z3\.d},pn8,\[x0,x30,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d-z3\.d},pn8,\[x0,xzr,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z8\.d-z11\.d},pn11,\[x27,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d,z8\.d},pn8,\[x0,x1,lsl 3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d,z8\.d},pn8,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {Z0\.D,Z8\.D},PN8,\[X0,X1,LSL#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z1\.d,z9\.d},pn8,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z2\.d,z10\.d},pn8,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z3\.d,z11\.d},pn8,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z4\.d,z12\.d},pn8,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z5\.d,z13\.d},pn8,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z6\.d,z14\.d},pn8,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z7\.d,z15\.d},pn8,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z16\.d,z24\.d},pn8,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z17\.d,z25\.d},pn8,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z18\.d,z26\.d},pn8,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z19\.d,z27\.d},pn8,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z20\.d,z28\.d},pn8,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z21\.d,z29\.d},pn8,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z22\.d,z30\.d},pn8,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z23\.d,z31\.d},pn8,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d,z8\.d},pn15,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d,z8\.d},pn8,\[x30,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d,z8\.d},pn8,\[sp,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d,z8\.d},pn8,\[x0,x30,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d,z8\.d},pn8,\[x0,xzr,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z5\.d,z13\.d},pn14,\[x15,x24,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8,\[x0,x1,lsl 3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {Z0\.D,Z4\.D,Z8\.D,Z12\.D},PN8,\[X0,X1,LSL#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z1\.d,z5\.d,z9\.d,z13\.d},pn8,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z2\.d,z6\.d,z10\.d,z14\.d},pn8,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z3\.d,z7\.d,z11\.d,z15\.d},pn8,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z16\.d,z20\.d,z24\.d,z28\.d},pn8,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z17\.d,z21\.d,z25\.d,z29\.d},pn8,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z18\.d,z22\.d,z26\.d,z30\.d},pn8,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z19\.d,z23\.d,z27\.d,z31\.d},pn8,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d,z4\.d,z8\.d,z12\.d},pn15,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8,\[x30,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8,\[sp,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8,\[x0,x30,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8,\[x0,xzr,lsl#3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z17\.d,z21\.d,z25\.d,z29\.d},pn11,\[x4,x6,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z0\.d ?- ?z1\.d ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z0\.d ?- ?z1\.d ?},pn8/z,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?Z0\.D ?- ?Z1\.D ?},PN8/Z,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z30\.d ?- ?z31\.d ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z0\.d ?- ?z1\.d ?},pn15/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z0\.d ?- ?z1\.d ?},pn8/z,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z0\.d ?- ?z1\.d ?},pn8/z,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z0\.d ?- ?z1\.d ?},pn8/z,\[x0,#-16,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z0\.d ?- ?z1\.d ?},pn8/z,\[x0,#14,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z12\.d ?- ?z13\.d ?},pn13/z,\[x11,#-10,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z0\.d ?- ?z3\.d ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z0\.d ?- ?z3\.d ?},pn8/z,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?Z0\.D ?- ?Z3\.D ?},PN8/Z,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z28\.d ?- ?z31\.d ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z0\.d ?- ?z3\.d ?},pn15/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z0\.d ?- ?z3\.d ?},pn8/z,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z0\.d ?- ?z3\.d ?},pn8/z,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z0\.d ?- ?z3\.d ?},pn8/z,\[x0,#-32,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z0\.d ?- ?z3\.d ?},pn8/z,\[x0,#28,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z8\.d ?- ?z11\.d ?},pn11/z,\[x17,#20,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z0\.d,z8\.d ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z0\.d,z8\.d ?},pn8/z,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?Z0\.D,Z8\.D ?},PN8/Z,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z1\.d,z9\.d ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z2\.d,z10\.d ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z3\.d,z11\.d ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z4\.d,z12\.d ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z5\.d,z13\.d ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z6\.d,z14\.d ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z7\.d,z15\.d ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z16\.d,z24\.d ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z17\.d,z25\.d ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z18\.d,z26\.d ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z19\.d,z27\.d ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z20\.d,z28\.d ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z21\.d,z29\.d ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z22\.d,z30\.d ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z23\.d,z31\.d ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z0\.d,z8\.d ?},pn15/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z0\.d,z8\.d ?},pn8/z,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z0\.d,z8\.d ?},pn8/z,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z0\.d,z8\.d ?},pn8/z,\[x0,#-16,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z0\.d,z8\.d ?},pn8/z,\[x0,#14,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z3\.d,z11\.d ?},pn10/z,\[x22,#6,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn8/z,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?Z0\.D,Z4\.D,Z8\.D,Z12\.D ?},PN8/Z,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z1\.d,z5\.d,z9\.d,z13\.d ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z2\.d,z6\.d,z10\.d,z14\.d ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z3\.d,z7\.d,z11\.d,z15\.d ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z16\.d,z20\.d,z24\.d,z28\.d ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z17\.d,z21\.d,z25\.d,z29\.d ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z18\.d,z22\.d,z26\.d,z30\.d ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z19\.d,z23\.d,z27\.d,z31\.d ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn15/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn8/z,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn8/z,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn8/z,\[x0,#-32,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn8/z,\[x0,#28,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z2\.d,z6\.d,z10\.d,z14\.d ?},pn14/z,\[x29,#8,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z0\.d ?- ?z1\.d ?},pn8/z,\[x0,x1,lsl 3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z0\.d ?- ?z1\.d ?},pn8/z,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?Z0\.D ?- ?Z1\.D ?},PN8/Z,\[X0,X1,LSL ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z30\.d ?- ?z31\.d ?},pn8/z,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z0\.d ?- ?z1\.d ?},pn15/z,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z0\.d ?- ?z1\.d ?},pn8/z,\[x30,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z0\.d ?- ?z1\.d ?},pn8/z,\[sp,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z0\.d ?- ?z1\.d ?},pn8/z,\[x0,x30,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z0\.d ?- ?z1\.d ?},pn8/z,\[x0,xzr,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z14\.d ?- ?z15\.d ?},pn9/z,\[x26,x3,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z0\.d ?- ?z3\.d ?},pn8/z,\[x0,x1,lsl 3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z0\.d ?- ?z3\.d ?},pn8/z,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?Z0\.D ?- ?Z3\.D ?},PN8/Z,\[X0,X1,LSL ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z28\.d ?- ?z31\.d ?},pn8/z,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z0\.d ?- ?z3\.d ?},pn15/z,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z0\.d ?- ?z3\.d ?},pn8/z,\[x30,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z0\.d ?- ?z3\.d ?},pn8/z,\[sp,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z0\.d ?- ?z3\.d ?},pn8/z,\[x0,x30,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z0\.d ?- ?z3\.d ?},pn8/z,\[x0,xzr,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z8\.d ?- ?z11\.d ?},pn11/z,\[x27,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z0\.d,z8\.d ?},pn8/z,\[x0,x1,lsl 3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z0\.d,z8\.d ?},pn8/z,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?Z0\.D,Z8\.D ?},PN8/Z,\[X0,X1,LSL ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z1\.d,z9\.d ?},pn8/z,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z2\.d,z10\.d ?},pn8/z,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z3\.d,z11\.d ?},pn8/z,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z4\.d,z12\.d ?},pn8/z,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z5\.d,z13\.d ?},pn8/z,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z6\.d,z14\.d ?},pn8/z,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z7\.d,z15\.d ?},pn8/z,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z16\.d,z24\.d ?},pn8/z,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z17\.d,z25\.d ?},pn8/z,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z18\.d,z26\.d ?},pn8/z,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z19\.d,z27\.d ?},pn8/z,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z20\.d,z28\.d ?},pn8/z,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z21\.d,z29\.d ?},pn8/z,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z22\.d,z30\.d ?},pn8/z,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z23\.d,z31\.d ?},pn8/z,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z0\.d,z8\.d ?},pn15/z,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z0\.d,z8\.d ?},pn8/z,\[x30,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z0\.d,z8\.d ?},pn8/z,\[sp,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z0\.d,z8\.d ?},pn8/z,\[x0,x30,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z0\.d,z8\.d ?},pn8/z,\[x0,xzr,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z5\.d,z13\.d ?},pn14/z,\[x15,x24,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn8/z,\[x0,x1,lsl 3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn8/z,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?Z0\.D,Z4\.D,Z8\.D,Z12\.D ?},PN8/Z,\[X0,X1,LSL ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z1\.d,z5\.d,z9\.d,z13\.d ?},pn8/z,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z2\.d,z6\.d,z10\.d,z14\.d ?},pn8/z,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z3\.d,z7\.d,z11\.d,z15\.d ?},pn8/z,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z16\.d,z20\.d,z24\.d,z28\.d ?},pn8/z,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z17\.d,z21\.d,z25\.d,z29\.d ?},pn8/z,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z18\.d,z22\.d,z26\.d,z30\.d ?},pn8/z,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z19\.d,z23\.d,z27\.d,z31\.d ?},pn8/z,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn15/z,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn8/z,\[x30,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn8/z,\[sp,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn8/z,\[x0,x30,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn8/z,\[x0,xzr,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z17\.d,z21\.d,z25\.d,z29\.d ?},pn11/z,\[x4,x6,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d ?- ?z1\.d ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d ?- ?z1\.d ?},pn8/z,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?Z0\.D ?- ?Z1\.D ?},PN8/Z,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z30\.d ?- ?z31\.d ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d ?- ?z1\.d ?},pn15/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d ?- ?z1\.d ?},pn8/z,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d ?- ?z1\.d ?},pn8/z,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d ?- ?z1\.d ?},pn8/z,\[x0,#-16,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d ?- ?z1\.d ?},pn8/z,\[x0,#14,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z12\.d ?- ?z13\.d ?},pn13/z,\[x11,#-10,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d ?- ?z3\.d ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d ?- ?z3\.d ?},pn8/z,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?Z0\.D ?- ?Z3\.D ?},PN8/Z,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z28\.d ?- ?z31\.d ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d ?- ?z3\.d ?},pn15/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d ?- ?z3\.d ?},pn8/z,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d ?- ?z3\.d ?},pn8/z,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d ?- ?z3\.d ?},pn8/z,\[x0,#-32,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d ?- ?z3\.d ?},pn8/z,\[x0,#28,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z8\.d ?- ?z11\.d ?},pn11/z,\[x17,#20,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d,z8\.d ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d,z8\.d ?},pn8/z,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?Z0\.D,Z8\.D ?},PN8/Z,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z1\.d,z9\.d ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z2\.d,z10\.d ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z3\.d,z11\.d ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z4\.d,z12\.d ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z5\.d,z13\.d ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z6\.d,z14\.d ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z7\.d,z15\.d ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z16\.d,z24\.d ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z17\.d,z25\.d ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z18\.d,z26\.d ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z19\.d,z27\.d ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z20\.d,z28\.d ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z21\.d,z29\.d ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z22\.d,z30\.d ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z23\.d,z31\.d ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d,z8\.d ?},pn15/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d,z8\.d ?},pn8/z,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d,z8\.d ?},pn8/z,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d,z8\.d ?},pn8/z,\[x0,#-16,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d,z8\.d ?},pn8/z,\[x0,#14,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z3\.d,z11\.d ?},pn10/z,\[x22,#6,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn8/z,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?Z0\.D,Z4\.D,Z8\.D,Z12\.D ?},PN8/Z,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z1\.d,z5\.d,z9\.d,z13\.d ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z2\.d,z6\.d,z10\.d,z14\.d ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z3\.d,z7\.d,z11\.d,z15\.d ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z16\.d,z20\.d,z24\.d,z28\.d ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z17\.d,z21\.d,z25\.d,z29\.d ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z18\.d,z22\.d,z26\.d,z30\.d ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z19\.d,z23\.d,z27\.d,z31\.d ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn15/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn8/z,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn8/z,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn8/z,\[x0,#-32,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn8/z,\[x0,#28,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z2\.d,z6\.d,z10\.d,z14\.d ?},pn14/z,\[x29,#8,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d ?- ?z1\.d ?},pn8/z,\[x0,x1,lsl 3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d ?- ?z1\.d ?},pn8/z,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?Z0\.D ?- ?Z1\.D ?},PN8/Z,\[X0,X1,LSL ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z30\.d ?- ?z31\.d ?},pn8/z,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d ?- ?z1\.d ?},pn15/z,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d ?- ?z1\.d ?},pn8/z,\[x30,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d ?- ?z1\.d ?},pn8/z,\[sp,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d ?- ?z1\.d ?},pn8/z,\[x0,x30,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d ?- ?z1\.d ?},pn8/z,\[x0,xzr,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z14\.d ?- ?z15\.d ?},pn9/z,\[x26,x3,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d ?- ?z3\.d ?},pn8/z,\[x0,x1,lsl 3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d ?- ?z3\.d ?},pn8/z,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?Z0\.D ?- ?Z3\.D ?},PN8/Z,\[X0,X1,LSL ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z28\.d ?- ?z31\.d ?},pn8/z,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d ?- ?z3\.d ?},pn15/z,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d ?- ?z3\.d ?},pn8/z,\[x30,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d ?- ?z3\.d ?},pn8/z,\[sp,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d ?- ?z3\.d ?},pn8/z,\[x0,x30,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d ?- ?z3\.d ?},pn8/z,\[x0,xzr,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z8\.d ?- ?z11\.d ?},pn11/z,\[x27,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d,z8\.d ?},pn8/z,\[x0,x1,lsl 3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d,z8\.d ?},pn8/z,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?Z0\.D,Z8\.D ?},PN8/Z,\[X0,X1,LSL ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z1\.d,z9\.d ?},pn8/z,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z2\.d,z10\.d ?},pn8/z,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z3\.d,z11\.d ?},pn8/z,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z4\.d,z12\.d ?},pn8/z,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z5\.d,z13\.d ?},pn8/z,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z6\.d,z14\.d ?},pn8/z,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z7\.d,z15\.d ?},pn8/z,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z16\.d,z24\.d ?},pn8/z,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z17\.d,z25\.d ?},pn8/z,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z18\.d,z26\.d ?},pn8/z,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z19\.d,z27\.d ?},pn8/z,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z20\.d,z28\.d ?},pn8/z,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z21\.d,z29\.d ?},pn8/z,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z22\.d,z30\.d ?},pn8/z,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z23\.d,z31\.d ?},pn8/z,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d,z8\.d ?},pn15/z,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d,z8\.d ?},pn8/z,\[x30,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d,z8\.d ?},pn8/z,\[sp,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d,z8\.d ?},pn8/z,\[x0,x30,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d,z8\.d ?},pn8/z,\[x0,xzr,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z5\.d,z13\.d ?},pn14/z,\[x15,x24,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn8/z,\[x0,x1,lsl 3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn8/z,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?Z0\.D,Z4\.D,Z8\.D,Z12\.D ?},PN8/Z,\[X0,X1,LSL ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z1\.d,z5\.d,z9\.d,z13\.d ?},pn8/z,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z2\.d,z6\.d,z10\.d,z14\.d ?},pn8/z,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z3\.d,z7\.d,z11\.d,z15\.d ?},pn8/z,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z16\.d,z20\.d,z24\.d,z28\.d ?},pn8/z,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z17\.d,z21\.d,z25\.d,z29\.d ?},pn8/z,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z18\.d,z22\.d,z26\.d,z30\.d ?},pn8/z,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z19\.d,z23\.d,z27\.d,z31\.d ?},pn8/z,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn15/z,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn8/z,\[x30,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn8/z,\[sp,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn8/z,\[x0,x30,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn8/z,\[x0,xzr,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z17\.d,z21\.d,z25\.d,z29\.d ?},pn11/z,\[x4,x6,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z0\.d ?- ?z1\.d ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z0\.d ?- ?z1\.d ?},pn8,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?Z0\.D ?- ?Z1\.D ?},PN8,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z30\.d ?- ?z31\.d ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z0\.d ?- ?z1\.d ?},pn15,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z0\.d ?- ?z1\.d ?},pn8,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z0\.d ?- ?z1\.d ?},pn8,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z0\.d ?- ?z1\.d ?},pn8,\[x0,#-16,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z0\.d ?- ?z1\.d ?},pn8,\[x0,#14,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z12\.d ?- ?z13\.d ?},pn13,\[x11,#-10,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z0\.d ?- ?z3\.d ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z0\.d ?- ?z3\.d ?},pn8,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?Z0\.D ?- ?Z3\.D ?},PN8,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z28\.d ?- ?z31\.d ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z0\.d ?- ?z3\.d ?},pn15,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z0\.d ?- ?z3\.d ?},pn8,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z0\.d ?- ?z3\.d ?},pn8,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z0\.d ?- ?z3\.d ?},pn8,\[x0,#-32,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z0\.d ?- ?z3\.d ?},pn8,\[x0,#28,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z8\.d ?- ?z11\.d ?},pn11,\[x17,#20,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z0\.d,z8\.d ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z0\.d,z8\.d ?},pn8,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?Z0\.D,Z8\.D ?},PN8,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z1\.d,z9\.d ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z2\.d,z10\.d ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z3\.d,z11\.d ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z4\.d,z12\.d ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z5\.d,z13\.d ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z6\.d,z14\.d ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z7\.d,z15\.d ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z16\.d,z24\.d ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z17\.d,z25\.d ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z18\.d,z26\.d ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z19\.d,z27\.d ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z20\.d,z28\.d ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z21\.d,z29\.d ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z22\.d,z30\.d ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z23\.d,z31\.d ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z0\.d,z8\.d ?},pn15,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z0\.d,z8\.d ?},pn8,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z0\.d,z8\.d ?},pn8,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z0\.d,z8\.d ?},pn8,\[x0,#-16,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z0\.d,z8\.d ?},pn8,\[x0,#14,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z3\.d,z11\.d ?},pn10,\[x22,#6,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn8,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?Z0\.D,Z4\.D,Z8\.D,Z12\.D ?},PN8,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z1\.d,z5\.d,z9\.d,z13\.d ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z2\.d,z6\.d,z10\.d,z14\.d ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z3\.d,z7\.d,z11\.d,z15\.d ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z16\.d,z20\.d,z24\.d,z28\.d ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z17\.d,z21\.d,z25\.d,z29\.d ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z18\.d,z22\.d,z26\.d,z30\.d ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z19\.d,z23\.d,z27\.d,z31\.d ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn15,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn8,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn8,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn8,\[x0,#-32,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn8,\[x0,#28,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z2\.d,z6\.d,z10\.d,z14\.d ?},pn14,\[x29,#8,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z0\.d ?- ?z1\.d ?},pn8,\[x0,x1,lsl 3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z0\.d ?- ?z1\.d ?},pn8,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?Z0\.D ?- ?Z1\.D ?},PN8,\[X0,X1,LSL ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z30\.d ?- ?z31\.d ?},pn8,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z0\.d ?- ?z1\.d ?},pn15,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z0\.d ?- ?z1\.d ?},pn8,\[x30,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z0\.d ?- ?z1\.d ?},pn8,\[sp,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z0\.d ?- ?z1\.d ?},pn8,\[x0,x30,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z0\.d ?- ?z1\.d ?},pn8,\[x0,xzr,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z14\.d ?- ?z15\.d ?},pn9,\[x26,x3,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z0\.d ?- ?z3\.d ?},pn8,\[x0,x1,lsl 3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z0\.d ?- ?z3\.d ?},pn8,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?Z0\.D ?- ?Z3\.D ?},PN8,\[X0,X1,LSL ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z28\.d ?- ?z31\.d ?},pn8,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z0\.d ?- ?z3\.d ?},pn15,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z0\.d ?- ?z3\.d ?},pn8,\[x30,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z0\.d ?- ?z3\.d ?},pn8,\[sp,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z0\.d ?- ?z3\.d ?},pn8,\[x0,x30,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z0\.d ?- ?z3\.d ?},pn8,\[x0,xzr,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z8\.d ?- ?z11\.d ?},pn11,\[x27,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z0\.d,z8\.d ?},pn8,\[x0,x1,lsl 3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z0\.d,z8\.d ?},pn8,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?Z0\.D,Z8\.D ?},PN8,\[X0,X1,LSL ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z1\.d,z9\.d ?},pn8,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z2\.d,z10\.d ?},pn8,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z3\.d,z11\.d ?},pn8,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z4\.d,z12\.d ?},pn8,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z5\.d,z13\.d ?},pn8,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z6\.d,z14\.d ?},pn8,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z7\.d,z15\.d ?},pn8,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z16\.d,z24\.d ?},pn8,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z17\.d,z25\.d ?},pn8,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z18\.d,z26\.d ?},pn8,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z19\.d,z27\.d ?},pn8,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z20\.d,z28\.d ?},pn8,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z21\.d,z29\.d ?},pn8,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z22\.d,z30\.d ?},pn8,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z23\.d,z31\.d ?},pn8,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z0\.d,z8\.d ?},pn15,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z0\.d,z8\.d ?},pn8,\[x30,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z0\.d,z8\.d ?},pn8,\[sp,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z0\.d,z8\.d ?},pn8,\[x0,x30,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z0\.d,z8\.d ?},pn8,\[x0,xzr,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z5\.d,z13\.d ?},pn14,\[x15,x24,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn8,\[x0,x1,lsl 3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn8,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?Z0\.D,Z4\.D,Z8\.D,Z12\.D ?},PN8,\[X0,X1,LSL ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z1\.d,z5\.d,z9\.d,z13\.d ?},pn8,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z2\.d,z6\.d,z10\.d,z14\.d ?},pn8,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z3\.d,z7\.d,z11\.d,z15\.d ?},pn8,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z16\.d,z20\.d,z24\.d,z28\.d ?},pn8,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z17\.d,z21\.d,z25\.d,z29\.d ?},pn8,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z18\.d,z22\.d,z26\.d,z30\.d ?},pn8,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z19\.d,z23\.d,z27\.d,z31\.d ?},pn8,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn15,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn8,\[x30,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn8,\[sp,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn8,\[x0,x30,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn8,\[x0,xzr,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z17\.d,z21\.d,z25\.d,z29\.d ?},pn11,\[x4,x6,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d ?- ?z1\.d ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d ?- ?z1\.d ?},pn8,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?Z0\.D ?- ?Z1\.D ?},PN8,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z30\.d ?- ?z31\.d ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d ?- ?z1\.d ?},pn15,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d ?- ?z1\.d ?},pn8,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d ?- ?z1\.d ?},pn8,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d ?- ?z1\.d ?},pn8,\[x0,#-16,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d ?- ?z1\.d ?},pn8,\[x0,#14,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z12\.d ?- ?z13\.d ?},pn13,\[x11,#-10,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d ?- ?z3\.d ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d ?- ?z3\.d ?},pn8,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?Z0\.D ?- ?Z3\.D ?},PN8,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z28\.d ?- ?z31\.d ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d ?- ?z3\.d ?},pn15,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d ?- ?z3\.d ?},pn8,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d ?- ?z3\.d ?},pn8,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d ?- ?z3\.d ?},pn8,\[x0,#-32,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d ?- ?z3\.d ?},pn8,\[x0,#28,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z8\.d ?- ?z11\.d ?},pn11,\[x17,#20,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d,z8\.d ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d,z8\.d ?},pn8,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?Z0\.D,Z8\.D ?},PN8,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z1\.d,z9\.d ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z2\.d,z10\.d ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z3\.d,z11\.d ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z4\.d,z12\.d ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z5\.d,z13\.d ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z6\.d,z14\.d ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z7\.d,z15\.d ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z16\.d,z24\.d ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z17\.d,z25\.d ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z18\.d,z26\.d ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z19\.d,z27\.d ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z20\.d,z28\.d ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z21\.d,z29\.d ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z22\.d,z30\.d ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z23\.d,z31\.d ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d,z8\.d ?},pn15,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d,z8\.d ?},pn8,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d,z8\.d ?},pn8,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d,z8\.d ?},pn8,\[x0,#-16,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d,z8\.d ?},pn8,\[x0,#14,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z3\.d,z11\.d ?},pn10,\[x22,#6,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn8,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?Z0\.D,Z4\.D,Z8\.D,Z12\.D ?},PN8,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z1\.d,z5\.d,z9\.d,z13\.d ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z2\.d,z6\.d,z10\.d,z14\.d ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z3\.d,z7\.d,z11\.d,z15\.d ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z16\.d,z20\.d,z24\.d,z28\.d ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z17\.d,z21\.d,z25\.d,z29\.d ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z18\.d,z22\.d,z26\.d,z30\.d ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z19\.d,z23\.d,z27\.d,z31\.d ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn15,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn8,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn8,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn8,\[x0,#-32,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn8,\[x0,#28,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z2\.d,z6\.d,z10\.d,z14\.d ?},pn14,\[x29,#8,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d ?- ?z1\.d ?},pn8,\[x0,x1,lsl 3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d ?- ?z1\.d ?},pn8,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?Z0\.D ?- ?Z1\.D ?},PN8,\[X0,X1,LSL ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z30\.d ?- ?z31\.d ?},pn8,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d ?- ?z1\.d ?},pn15,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d ?- ?z1\.d ?},pn8,\[x30,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d ?- ?z1\.d ?},pn8,\[sp,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d ?- ?z1\.d ?},pn8,\[x0,x30,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d ?- ?z1\.d ?},pn8,\[x0,xzr,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z14\.d ?- ?z15\.d ?},pn9,\[x26,x3,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d ?- ?z3\.d ?},pn8,\[x0,x1,lsl 3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d ?- ?z3\.d ?},pn8,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?Z0\.D ?- ?Z3\.D ?},PN8,\[X0,X1,LSL ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z28\.d ?- ?z31\.d ?},pn8,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d ?- ?z3\.d ?},pn15,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d ?- ?z3\.d ?},pn8,\[x30,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d ?- ?z3\.d ?},pn8,\[sp,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d ?- ?z3\.d ?},pn8,\[x0,x30,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d ?- ?z3\.d ?},pn8,\[x0,xzr,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z8\.d ?- ?z11\.d ?},pn11,\[x27,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d,z8\.d ?},pn8,\[x0,x1,lsl 3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d,z8\.d ?},pn8,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?Z0\.D,Z8\.D ?},PN8,\[X0,X1,LSL ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z1\.d,z9\.d ?},pn8,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z2\.d,z10\.d ?},pn8,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z3\.d,z11\.d ?},pn8,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z4\.d,z12\.d ?},pn8,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z5\.d,z13\.d ?},pn8,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z6\.d,z14\.d ?},pn8,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z7\.d,z15\.d ?},pn8,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z16\.d,z24\.d ?},pn8,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z17\.d,z25\.d ?},pn8,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z18\.d,z26\.d ?},pn8,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z19\.d,z27\.d ?},pn8,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z20\.d,z28\.d ?},pn8,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z21\.d,z29\.d ?},pn8,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z22\.d,z30\.d ?},pn8,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z23\.d,z31\.d ?},pn8,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d,z8\.d ?},pn15,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d,z8\.d ?},pn8,\[x30,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d,z8\.d ?},pn8,\[sp,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d,z8\.d ?},pn8,\[x0,x30,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d,z8\.d ?},pn8,\[x0,xzr,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z5\.d,z13\.d ?},pn14,\[x15,x24,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn8,\[x0,x1,lsl 3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn8,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?Z0\.D,Z4\.D,Z8\.D,Z12\.D ?},PN8,\[X0,X1,LSL ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z1\.d,z5\.d,z9\.d,z13\.d ?},pn8,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z2\.d,z6\.d,z10\.d,z14\.d ?},pn8,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z3\.d,z7\.d,z11\.d,z15\.d ?},pn8,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z16\.d,z20\.d,z24\.d,z28\.d ?},pn8,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z17\.d,z21\.d,z25\.d,z29\.d ?},pn8,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z18\.d,z22\.d,z26\.d,z30\.d ?},pn8,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z19\.d,z23\.d,z27\.d,z31\.d ?},pn8,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn15,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn8,\[x30,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn8,\[sp,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn8,\[x0,x30,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn8,\[x0,xzr,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z17\.d,z21\.d,z25\.d,z29\.d ?},pn11,\[x4,x6,lsl ?#3\]'
diff --git a/gas/testsuite/gas/aarch64/sme2-30-invalid.l b/gas/testsuite/gas/aarch64/sme2-30-invalid.l
index 6805ddb..660d922 100644
--- a/gas/testsuite/gas/aarch64/sme2-30-invalid.l
+++ b/gas/testsuite/gas/aarch64/sme2-30-invalid.l
@@ -1,29 +1,29 @@
 [^ :]+: Assembler messages:
 [^ :]+:[0-9]+: Error: expected '{' at operand 1 -- `uzp 0,z0\.b,z0\.b'
-[^ :]+:[0-9]+: Error: expected a register or register list at operand 2 -- `uzp {z0\.b-z1\.b},0,z0\.b'
-[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `uzp {z0\.b-z1\.b},z0\.b,0'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `uzp {z1\.b-z2\.b},z0\.b,z0\.b'
-[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 1 -- `uzp {z0\.b-z2\.b},z0\.b,z0\.b'
-[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 1 -- `uzp {z0\.b-z3\.b},z0\.b,z0\.b'
-[^ :]+:[0-9]+: Error: unexpected characters following instruction at operand 2 -- `uzp {z0\.b-z1\.b},{z0\.b-z1\.b},{z0\.b,z1\.b}'
-[^ :]+:[0-9]+: Error: operand mismatch -- `uzp {z0\.h-z1\.h},z0\.b,z0\.b'
+[^ :]+:[0-9]+: Error: expected a register or register list at operand 2 -- `uzp { ?z0\.b ?- ?z1\.b ?},0,z0\.b'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `uzp { ?z0\.b ?- ?z1\.b ?},z0\.b,0'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `uzp { ?z1\.b ?- ?z2\.b ?},z0\.b,z0\.b'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 1 -- `uzp { ?z0\.b ?- ?z2\.b ?},z0\.b,z0\.b'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 1 -- `uzp { ?z0\.b ?- ?z3\.b ?},z0\.b,z0\.b'
+[^ :]+:[0-9]+: Error: unexpected characters following instruction at operand 2 -- `uzp { ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b,z1\.b ?}'
+[^ :]+:[0-9]+: Error: operand mismatch -- `uzp { ?z0\.h ?- ?z1\.h ?},z0\.b,z0\.b'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	uzp {z0\.b-z1\.b}, z0\.b, z0\.b
 [^ :]+:[0-9]+: Info:    other valid variant\(s\):
 [^ :]+:[0-9]+: Info:    	uzp {z0\.h-z1\.h}, z0\.h, z0\.h
 [^ :]+:[0-9]+: Info:    	uzp {z0\.s-z1\.s}, z0\.s, z0\.s
 [^ :]+:[0-9]+: Info:    	uzp {z0\.d-z1\.d}, z0\.d, z0\.d
-[^ :]+:[0-9]+: Error: operand mismatch -- `uzp {z0\.q-z3\.q},z0\.b,z0\.b'
+[^ :]+:[0-9]+: Error: operand mismatch -- `uzp { ?z0\.q ?- ?z3\.q ?},z0\.b,z0\.b'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	uzp {z0\.b-z3\.b}, z0\.b, z0\.b
 [^ :]+:[0-9]+: Info:    other valid variant\(s\):
 [^ :]+:[0-9]+: Info:    	uzp {z0\.h-z3\.h}, z0\.h, z0\.h
 [^ :]+:[0-9]+: Info:    	uzp {z0\.s-z3\.s}, z0\.s, z0\.s
 [^ :]+:[0-9]+: Info:    	uzp {z0\.d-z3\.d}, z0\.d, z0\.d
-[^ :]+:[0-9]+: Error: unexpected characters following instruction at operand 2 -- `uzp {z0\.b-z3\.b},{z0\.b-z1\.b},{z2\.b-z3\.b}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `uzp {z1\.b-z4\.b},{z0\.b-z3\.b}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `uzp {z2\.b-z5\.b},{z0\.b-z3\.b}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `uzp {z3\.b-z6\.b},{z0\.b-z3\.b}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `uzp {z0\.b-z3\.b},{z1\.b-z4\.b}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `uzp {z0\.b-z3\.b},{z2\.b-z5\.b}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `uzp {z0\.b-z3\.b},{z3\.b-z6\.b}'
+[^ :]+:[0-9]+: Error: unexpected characters following instruction at operand 2 -- `uzp { ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z1\.b ?},{ ?z2\.b ?- ?z3\.b ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `uzp { ?z1\.b ?- ?z4\.b ?},{ ?z0\.b ?- ?z3\.b ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `uzp { ?z2\.b ?- ?z5\.b ?},{ ?z0\.b ?- ?z3\.b ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `uzp { ?z3\.b ?- ?z6\.b ?},{ ?z0\.b ?- ?z3\.b ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `uzp { ?z0\.b ?- ?z3\.b ?},{ ?z1\.b ?- ?z4\.b ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `uzp { ?z0\.b ?- ?z3\.b ?},{ ?z2\.b ?- ?z5\.b ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `uzp { ?z0\.b ?- ?z3\.b ?},{ ?z3\.b ?- ?z6\.b ?}'
diff --git a/gas/testsuite/gas/aarch64/sme2-30-noarch.l b/gas/testsuite/gas/aarch64/sme2-30-noarch.l
index e3ddd70..c94a181 100644
--- a/gas/testsuite/gas/aarch64/sme2-30-noarch.l
+++ b/gas/testsuite/gas/aarch64/sme2-30-noarch.l
@@ -1,91 +1,91 @@
 [^ :]+: Assembler messages:
-[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z0\.b-z1\.b},z0\.b,z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z30\.b-z31\.b},z0\.b,z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z0\.b-z1\.b},z31\.b,z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z0\.b-z1\.b},z0\.b,z31\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z18\.b-z19\.b},z11\.b,z25\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z0\.h-z1\.h},z0\.h,z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z30\.h-z31\.h},z0\.h,z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z0\.h-z1\.h},z31\.h,z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z0\.h-z1\.h},z0\.h,z31\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z6\.h-z7\.h},z8\.h,z22\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z0\.s-z1\.s},z0\.s,z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z30\.s-z31\.s},z0\.s,z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z0\.s-z1\.s},z31\.s,z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z0\.s-z1\.s},z0\.s,z31\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z24\.s-z25\.s},z19\.s,z2\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z0\.d-z1\.d},z0\.d,z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z30\.d-z31\.d},z0\.d,z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z0\.d-z1\.d},z31\.d,z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z0\.d-z1\.d},z0\.d,z31\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z2\.d-z3\.d},z29\.d,z5\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z0\.q-z1\.q},z0\.q,z0\.q'
-[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z30\.q-z31\.q},z0\.q,z0\.q'
-[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z0\.q-z1\.q},z31\.q,z0\.q'
-[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z0\.q-z1\.q},z0\.q,z31\.q'
-[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z14\.q-z15\.q},z24\.q,z9\.q'
-[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z0\.b-z3\.b},{z0\.b-z3\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z28\.b-z31\.b},{z0\.b-z3\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z0\.b-z3\.b},{z28\.b-z31\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z4\.b-z7\.b},{z24\.b-z27\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z28\.h-z31\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z0\.h-z3\.h},{z28\.h-z31\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z16\.h-z19\.h},{z8\.h-z11\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z0\.s-z3\.s},{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z28\.s-z31\.s},{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z0\.s-z3\.s},{z28\.s-z31\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z20\.s-z23\.s},{z12\.s-z15\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z0\.d-z3\.d},{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z28\.d-z31\.d},{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z0\.d-z3\.d},{z28\.d-z31\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z8\.d-z11\.d},{z16\.d-z19\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z0\.q-z3\.q},{z0\.q-z3\.q}'
-[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z28\.q-z31\.q},{z0\.q-z3\.q}'
-[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z0\.q-z3\.q},{z28\.q-z31\.q}'
-[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z12\.q-z15\.q},{z4\.q-z7\.q}'
-[^ :]+:[0-9]+: Error: selected processor does not support `zip {z0\.b-z1\.b},z0\.b,z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `zip {z30\.b-z31\.b},z0\.b,z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `zip {z0\.b-z1\.b},z31\.b,z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `zip {z0\.b-z1\.b},z0\.b,z31\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `zip {z18\.b-z19\.b},z11\.b,z25\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `zip {z0\.h-z1\.h},z0\.h,z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `zip {z30\.h-z31\.h},z0\.h,z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `zip {z0\.h-z1\.h},z31\.h,z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `zip {z0\.h-z1\.h},z0\.h,z31\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `zip {z6\.h-z7\.h},z8\.h,z22\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `zip {z0\.s-z1\.s},z0\.s,z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `zip {z30\.s-z31\.s},z0\.s,z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `zip {z0\.s-z1\.s},z31\.s,z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `zip {z0\.s-z1\.s},z0\.s,z31\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `zip {z24\.s-z25\.s},z19\.s,z2\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `zip {z0\.d-z1\.d},z0\.d,z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `zip {z30\.d-z31\.d},z0\.d,z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `zip {z0\.d-z1\.d},z31\.d,z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `zip {z0\.d-z1\.d},z0\.d,z31\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `zip {z2\.d-z3\.d},z29\.d,z5\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `zip {z0\.q-z1\.q},z0\.q,z0\.q'
-[^ :]+:[0-9]+: Error: selected processor does not support `zip {z30\.q-z31\.q},z0\.q,z0\.q'
-[^ :]+:[0-9]+: Error: selected processor does not support `zip {z0\.q-z1\.q},z31\.q,z0\.q'
-[^ :]+:[0-9]+: Error: selected processor does not support `zip {z0\.q-z1\.q},z0\.q,z31\.q'
-[^ :]+:[0-9]+: Error: selected processor does not support `zip {z14\.q-z15\.q},z24\.q,z9\.q'
-[^ :]+:[0-9]+: Error: selected processor does not support `zip {z0\.b-z3\.b},{z0\.b-z3\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `zip {z28\.b-z31\.b},{z0\.b-z3\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `zip {z0\.b-z3\.b},{z28\.b-z31\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `zip {z4\.b-z7\.b},{z24\.b-z27\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `zip {z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `zip {z28\.h-z31\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `zip {z0\.h-z3\.h},{z28\.h-z31\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `zip {z16\.h-z19\.h},{z8\.h-z11\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `zip {z0\.s-z3\.s},{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `zip {z28\.s-z31\.s},{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `zip {z0\.s-z3\.s},{z28\.s-z31\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `zip {z20\.s-z23\.s},{z12\.s-z15\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `zip {z0\.d-z3\.d},{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `zip {z28\.d-z31\.d},{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `zip {z0\.d-z3\.d},{z28\.d-z31\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `zip {z8\.d-z11\.d},{z16\.d-z19\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `zip {z0\.q-z3\.q},{z0\.q-z3\.q}'
-[^ :]+:[0-9]+: Error: selected processor does not support `zip {z28\.q-z31\.q},{z0\.q-z3\.q}'
-[^ :]+:[0-9]+: Error: selected processor does not support `zip {z0\.q-z3\.q},{z28\.q-z31\.q}'
-[^ :]+:[0-9]+: Error: selected processor does not support `zip {z12\.q-z15\.q},{z4\.q-z7\.q}'
+[^ :]+:[0-9]+: Error: selected processor does not support `uzp { ?z0\.b ?- ?z1\.b ?},z0\.b,z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `uzp { ?z30\.b ?- ?z31\.b ?},z0\.b,z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `uzp { ?z0\.b ?- ?z1\.b ?},z31\.b,z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `uzp { ?z0\.b ?- ?z1\.b ?},z0\.b,z31\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `uzp { ?z18\.b ?- ?z19\.b ?},z11\.b,z25\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `uzp { ?z0\.h ?- ?z1\.h ?},z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `uzp { ?z30\.h ?- ?z31\.h ?},z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `uzp { ?z0\.h ?- ?z1\.h ?},z31\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `uzp { ?z0\.h ?- ?z1\.h ?},z0\.h,z31\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `uzp { ?z6\.h ?- ?z7\.h ?},z8\.h,z22\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `uzp { ?z0\.s ?- ?z1\.s ?},z0\.s,z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `uzp { ?z30\.s ?- ?z31\.s ?},z0\.s,z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `uzp { ?z0\.s ?- ?z1\.s ?},z31\.s,z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `uzp { ?z0\.s ?- ?z1\.s ?},z0\.s,z31\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `uzp { ?z24\.s ?- ?z25\.s ?},z19\.s,z2\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `uzp { ?z0\.d ?- ?z1\.d ?},z0\.d,z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `uzp { ?z30\.d ?- ?z31\.d ?},z0\.d,z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `uzp { ?z0\.d ?- ?z1\.d ?},z31\.d,z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `uzp { ?z0\.d ?- ?z1\.d ?},z0\.d,z31\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `uzp { ?z2\.d ?- ?z3\.d ?},z29\.d,z5\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `uzp { ?z0\.q ?- ?z1\.q ?},z0\.q,z0\.q'
+[^ :]+:[0-9]+: Error: selected processor does not support `uzp { ?z30\.q ?- ?z31\.q ?},z0\.q,z0\.q'
+[^ :]+:[0-9]+: Error: selected processor does not support `uzp { ?z0\.q ?- ?z1\.q ?},z31\.q,z0\.q'
+[^ :]+:[0-9]+: Error: selected processor does not support `uzp { ?z0\.q ?- ?z1\.q ?},z0\.q,z31\.q'
+[^ :]+:[0-9]+: Error: selected processor does not support `uzp { ?z14\.q ?- ?z15\.q ?},z24\.q,z9\.q'
+[^ :]+:[0-9]+: Error: selected processor does not support `uzp { ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `uzp { ?z28\.b ?- ?z31\.b ?},{ ?z0\.b ?- ?z3\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `uzp { ?z0\.b ?- ?z3\.b ?},{ ?z28\.b ?- ?z31\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `uzp { ?z4\.b ?- ?z7\.b ?},{ ?z24\.b ?- ?z27\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `uzp { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `uzp { ?z28\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `uzp { ?z0\.h ?- ?z3\.h ?},{ ?z28\.h ?- ?z31\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `uzp { ?z16\.h ?- ?z19\.h ?},{ ?z8\.h ?- ?z11\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `uzp { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `uzp { ?z28\.s ?- ?z31\.s ?},{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `uzp { ?z0\.s ?- ?z3\.s ?},{ ?z28\.s ?- ?z31\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `uzp { ?z20\.s ?- ?z23\.s ?},{ ?z12\.s ?- ?z15\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `uzp { ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `uzp { ?z28\.d ?- ?z31\.d ?},{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `uzp { ?z0\.d ?- ?z3\.d ?},{ ?z28\.d ?- ?z31\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `uzp { ?z8\.d ?- ?z11\.d ?},{ ?z16\.d ?- ?z19\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `uzp { ?z0\.q ?- ?z3\.q ?},{ ?z0\.q ?- ?z3\.q ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `uzp { ?z28\.q ?- ?z31\.q ?},{ ?z0\.q ?- ?z3\.q ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `uzp { ?z0\.q ?- ?z3\.q ?},{ ?z28\.q ?- ?z31\.q ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `uzp { ?z12\.q ?- ?z15\.q ?},{ ?z4\.q ?- ?z7\.q ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `zip { ?z0\.b ?- ?z1\.b ?},z0\.b,z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `zip { ?z30\.b ?- ?z31\.b ?},z0\.b,z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `zip { ?z0\.b ?- ?z1\.b ?},z31\.b,z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `zip { ?z0\.b ?- ?z1\.b ?},z0\.b,z31\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `zip { ?z18\.b ?- ?z19\.b ?},z11\.b,z25\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `zip { ?z0\.h ?- ?z1\.h ?},z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `zip { ?z30\.h ?- ?z31\.h ?},z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `zip { ?z0\.h ?- ?z1\.h ?},z31\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `zip { ?z0\.h ?- ?z1\.h ?},z0\.h,z31\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `zip { ?z6\.h ?- ?z7\.h ?},z8\.h,z22\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `zip { ?z0\.s ?- ?z1\.s ?},z0\.s,z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `zip { ?z30\.s ?- ?z31\.s ?},z0\.s,z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `zip { ?z0\.s ?- ?z1\.s ?},z31\.s,z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `zip { ?z0\.s ?- ?z1\.s ?},z0\.s,z31\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `zip { ?z24\.s ?- ?z25\.s ?},z19\.s,z2\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `zip { ?z0\.d ?- ?z1\.d ?},z0\.d,z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `zip { ?z30\.d ?- ?z31\.d ?},z0\.d,z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `zip { ?z0\.d ?- ?z1\.d ?},z31\.d,z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `zip { ?z0\.d ?- ?z1\.d ?},z0\.d,z31\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `zip { ?z2\.d ?- ?z3\.d ?},z29\.d,z5\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `zip { ?z0\.q ?- ?z1\.q ?},z0\.q,z0\.q'
+[^ :]+:[0-9]+: Error: selected processor does not support `zip { ?z30\.q ?- ?z31\.q ?},z0\.q,z0\.q'
+[^ :]+:[0-9]+: Error: selected processor does not support `zip { ?z0\.q ?- ?z1\.q ?},z31\.q,z0\.q'
+[^ :]+:[0-9]+: Error: selected processor does not support `zip { ?z0\.q ?- ?z1\.q ?},z0\.q,z31\.q'
+[^ :]+:[0-9]+: Error: selected processor does not support `zip { ?z14\.q ?- ?z15\.q ?},z24\.q,z9\.q'
+[^ :]+:[0-9]+: Error: selected processor does not support `zip { ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `zip { ?z28\.b ?- ?z31\.b ?},{ ?z0\.b ?- ?z3\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `zip { ?z0\.b ?- ?z3\.b ?},{ ?z28\.b ?- ?z31\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `zip { ?z4\.b ?- ?z7\.b ?},{ ?z24\.b ?- ?z27\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `zip { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `zip { ?z28\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `zip { ?z0\.h ?- ?z3\.h ?},{ ?z28\.h ?- ?z31\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `zip { ?z16\.h ?- ?z19\.h ?},{ ?z8\.h ?- ?z11\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `zip { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `zip { ?z28\.s ?- ?z31\.s ?},{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `zip { ?z0\.s ?- ?z3\.s ?},{ ?z28\.s ?- ?z31\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `zip { ?z20\.s ?- ?z23\.s ?},{ ?z12\.s ?- ?z15\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `zip { ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `zip { ?z28\.d ?- ?z31\.d ?},{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `zip { ?z0\.d ?- ?z3\.d ?},{ ?z28\.d ?- ?z31\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `zip { ?z8\.d ?- ?z11\.d ?},{ ?z16\.d ?- ?z19\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `zip { ?z0\.q ?- ?z3\.q ?},{ ?z0\.q ?- ?z3\.q ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `zip { ?z28\.q ?- ?z31\.q ?},{ ?z0\.q ?- ?z3\.q ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `zip { ?z0\.q ?- ?z3\.q ?},{ ?z28\.q ?- ?z31\.q ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `zip { ?z12\.q ?- ?z15\.q ?},{ ?z4\.q ?- ?z7\.q ?}'
diff --git a/gas/testsuite/gas/aarch64/sme2-4-invalid.l b/gas/testsuite/gas/aarch64/sme2-4-invalid.l
index d763939..db40ceb 100644
--- a/gas/testsuite/gas/aarch64/sme2-4-invalid.l
+++ b/gas/testsuite/gas/aarch64/sme2-4-invalid.l
@@ -1,75 +1,75 @@
 [^ :]+: Assembler messages:
 [^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `ld1h 0,pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: expected an SVE predicate register at operand 2 -- `ld1h {z0\.h-z1\.h},0,\[x0\]'
-[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1h {z0\.h-z1\.h},pn8/z,0'
-[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 1 -- `ld1h {z0\.h-z2\.h},pn8/z,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1h {z1\.h-z2\.h},pn8/z,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ld1h {z0\.h-z1\.h},p8/z,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: operand mismatch -- `ld1h {z0\.h-z1\.h},pn8,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: expected an SVE predicate register at operand 2 -- `ld1h { ?z0\.h ?- ?z1\.h ?},0,\[x0\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1h { ?z0\.h ?- ?z1\.h ?},pn8/z,0'
+[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 1 -- `ld1h { ?z0\.h ?- ?z2\.h ?},pn8/z,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1h { ?z1\.h ?- ?z2\.h ?},pn8/z,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ld1h { ?z0\.h ?- ?z1\.h ?},p8/z,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `ld1h { ?z0\.h ?- ?z1\.h ?},pn8,\[x0,x1,lsl ?#1\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	ld1h {z0\.h-z1\.h}, pn8/z, \[x0, x1, lsl #1\]
-[^ :]+:[0-9]+: Error: operand mismatch -- `ld1h {z0\.h-z1\.h},pn8/m,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `ld1h { ?z0\.h ?- ?z1\.h ?},pn8/m,\[x0,x1,lsl ?#1\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	ld1h {z0\.h-z1\.h}, pn8/z, \[x0, x1, lsl #1\]
-[^ :]+:[0-9]+: Error: operand mismatch -- `ld1h {z0\.h-z1\.h},pn8\.h,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `ld1h { ?z0\.h ?- ?z1\.h ?},pn8\.h,\[x0,x1,lsl ?#1\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	ld1h {z0\.h-z1\.h}, pn8/z, \[x0, x1, lsl #1\]
-[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `ld1h {z0\.h-z1\.h},pn0/z,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `ld1h {z0\.h-z1\.h},pn7/z,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: expected a 64-bit base register at operand 3 -- `ld1h {z0\.h-z1\.h},pn8/z,\[w0,w1,lsl#1\]'
-[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ld1h {z0\.h-z1\.h},pn8/z,\[xzr,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ld1h {z0\.h-z1\.h},pn8/z,\[sp,sp,lsl#1\]'
-[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1h {z0\.h-z1\.h},pn8/z,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1h {z0\.h-z1\.h},pn8/z,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1h {z0\.h-z1\.h},pn8/z,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1h {z0\.h-z1\.h},pn8/z,\[x0,x1,lsl#4\]'
-[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1h {z0\.h-z1\.h},pn8/z,\[x0,w1,sxtw#1\]'
-[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1h {z0\.h-z1\.h},pn8/z,\[x0,w1,uxtw#1\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1h {z1\.h-z4\.h},pn8/z,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1h {z2\.h-z5\.h},pn8/z,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1h {z3\.h-z6\.h},pn8/z,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ld1h {z0\.h-z3\.h},p8/z,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: operand mismatch -- `ld1h {z0\.h-z3\.h},pn8,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `ld1h { ?z0\.h ?- ?z1\.h ?},pn0/z,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `ld1h { ?z0\.h ?- ?z1\.h ?},pn7/z,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: expected a 64-bit base register at operand 3 -- `ld1h { ?z0\.h ?- ?z1\.h ?},pn8/z,\[w0,w1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ld1h { ?z0\.h ?- ?z1\.h ?},pn8/z,\[xzr,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ld1h { ?z0\.h ?- ?z1\.h ?},pn8/z,\[sp,sp,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1h { ?z0\.h ?- ?z1\.h ?},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1h { ?z0\.h ?- ?z1\.h ?},pn8/z,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1h { ?z0\.h ?- ?z1\.h ?},pn8/z,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1h { ?z0\.h ?- ?z1\.h ?},pn8/z,\[x0,x1,lsl ?#4\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1h { ?z0\.h ?- ?z1\.h ?},pn8/z,\[x0,w1,sxtw ?#1\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1h { ?z0\.h ?- ?z1\.h ?},pn8/z,\[x0,w1,uxtw ?#1\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1h { ?z1\.h ?- ?z4\.h ?},pn8/z,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1h { ?z2\.h ?- ?z5\.h ?},pn8/z,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1h { ?z3\.h ?- ?z6\.h ?},pn8/z,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ld1h { ?z0\.h ?- ?z3\.h ?},p8/z,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `ld1h { ?z0\.h ?- ?z3\.h ?},pn8,\[x0,x1,lsl ?#1\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	ld1h {z0\.h-z3\.h}, pn8/z, \[x0, x1, lsl #1\]
-[^ :]+:[0-9]+: Error: operand mismatch -- `ld1h {z0\.h-z3\.h},pn8/m,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `ld1h { ?z0\.h ?- ?z3\.h ?},pn8/m,\[x0,x1,lsl ?#1\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	ld1h {z0\.h-z3\.h}, pn8/z, \[x0, x1, lsl #1\]
-[^ :]+:[0-9]+: Error: operand mismatch -- `ld1h {z0\.h-z3\.h},pn8\.h,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `ld1h { ?z0\.h ?- ?z3\.h ?},pn8\.h,\[x0,x1,lsl ?#1\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	ld1h {z0\.h-z3\.h}, pn8/z, \[x0, x1, lsl #1\]
-[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `ld1h {z0\.h-z3\.h},pn0/z,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `ld1h {z0\.h-z3\.h},pn7/z,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: expected a 64-bit base register at operand 3 -- `ld1h {z0\.h-z3\.h},pn8/z,\[w0,w1,lsl#1\]'
-[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ld1h {z0\.h-z3\.h},pn8/z,\[xzr,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ld1h {z0\.h-z3\.h},pn8/z,\[sp,sp,lsl#1\]'
-[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1h {z0\.h-z3\.h},pn8/z,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1h {z0\.h-z3\.h},pn8/z,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1h {z0\.h-z3\.h},pn8/z,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1h {z0\.h-z3\.h},pn8/z,\[x0,x1,lsl#4\]'
-[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1h {z0\.h-z3\.h},pn8/z,\[x0,w1,sxtw#1\]'
-[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1h {z0\.h-z3\.h},pn8/z,\[x0,w1,uxtw#1\]'
-[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1h {z0\.h,z2\.h},pn8/z,\[x0,x1,lsl#1\]`
-[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1h {z0\.h,z3\.h},pn8/z,\[x0,x1,lsl#1\]`
-[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1h {z0\.h,z4\.h},pn8/z,\[x0,x1,lsl#1\]`
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1h {z8\.h,z16\.h},pn8/z,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1h {z24\.h,z0\.h},pn8/z,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1h {z8\.h,z0\.h},pn8/z,\[x0,x1,lsl#1\]`
-[^ :]+:[0-9]+: Error: operand mismatch -- `ld1h {z0\.d,z8\.d},pn8/z,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `ld1h { ?z0\.h ?- ?z3\.h ?},pn0/z,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `ld1h { ?z0\.h ?- ?z3\.h ?},pn7/z,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: expected a 64-bit base register at operand 3 -- `ld1h { ?z0\.h ?- ?z3\.h ?},pn8/z,\[w0,w1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ld1h { ?z0\.h ?- ?z3\.h ?},pn8/z,\[xzr,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ld1h { ?z0\.h ?- ?z3\.h ?},pn8/z,\[sp,sp,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1h { ?z0\.h ?- ?z3\.h ?},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1h { ?z0\.h ?- ?z3\.h ?},pn8/z,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1h { ?z0\.h ?- ?z3\.h ?},pn8/z,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1h { ?z0\.h ?- ?z3\.h ?},pn8/z,\[x0,x1,lsl ?#4\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1h { ?z0\.h ?- ?z3\.h ?},pn8/z,\[x0,w1,sxtw ?#1\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1h { ?z0\.h ?- ?z3\.h ?},pn8/z,\[x0,w1,uxtw ?#1\]'
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1h { ?z0\.h,z2\.h ?},pn8/z,\[x0,x1,lsl ?#1\]`
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1h { ?z0\.h,z3\.h ?},pn8/z,\[x0,x1,lsl ?#1\]`
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1h { ?z0\.h,z4\.h ?},pn8/z,\[x0,x1,lsl ?#1\]`
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1h { ?z8\.h,z16\.h ?},pn8/z,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1h { ?z24\.h,z0\.h ?},pn8/z,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1h { ?z8\.h,z0\.h ?},pn8/z,\[x0,x1,lsl ?#1\]`
+[^ :]+:[0-9]+: Error: operand mismatch -- `ld1h { ?z0\.d,z8\.d ?},pn8/z,\[x0,x1,lsl ?#1\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	ld1h {z0\.h, z8\.h}, pn8/z, \[x0, x1, lsl #1\]
-[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ld1h {z0\.h,z8\.h},p8/z,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: expected a 64-bit base register at operand 3 -- `ld1h {z0\.h,z8\.h},pn8/z,\[w0,w30,lsl#1\]'
-[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ld1h {z0\.h,z8\.h},pn8/z,\[xzr,xzr,lsl#1\]'
-[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ld1h {z0\.h,z8\.h},pn8/z,\[x0,sp,lsl#1\]'
-[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1h {z0\.h,z8\.h},pn8/z,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1h {z4\.h,z8\.h,z12\.h,z16\.h},pn8/z,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1h {z20\.h,z24\.h,z28\.h,z0\.h},pn8/z,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: operand mismatch -- `ld1h {z0\.d,z4\.d,z8\.d,z12\.d},pn8/z,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ld1h { ?z0\.h,z8\.h ?},p8/z,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: expected a 64-bit base register at operand 3 -- `ld1h { ?z0\.h,z8\.h ?},pn8/z,\[w0,w30,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ld1h { ?z0\.h,z8\.h ?},pn8/z,\[xzr,xzr,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ld1h { ?z0\.h,z8\.h ?},pn8/z,\[x0,sp,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1h { ?z0\.h,z8\.h ?},pn8/z,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1h { ?z4\.h,z8\.h,z12\.h,z16\.h ?},pn8/z,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1h { ?z20\.h,z24\.h,z28\.h,z0\.h ?},pn8/z,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `ld1h { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn8/z,\[x0,x1,lsl ?#1\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	ld1h {z0\.h, z4\.h, z8\.h, z12\.h}, pn8/z, \[x0, x1, lsl #1\]
-[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ld1h {z0\.h,z4\.h,z8\.h,z12\.h},p8/z,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: expected a 64-bit base register at operand 3 -- `ld1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8/z,\[w0,w30,lsl#1\]'
-[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ld1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8/z,\[xzr,xzr,lsl#1\]'
-[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ld1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8/z,\[x0,sp,lsl#1\]'
-[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8/z,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ld1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},p8/z,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: expected a 64-bit base register at operand 3 -- `ld1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn8/z,\[w0,w30,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ld1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn8/z,\[xzr,xzr,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ld1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn8/z,\[x0,sp,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn8/z,\[x0,x1,lsl ?#3\]'
diff --git a/gas/testsuite/gas/aarch64/sme2-4-noarch.l b/gas/testsuite/gas/aarch64/sme2-4-noarch.l
index c061de8..8d2c3ff 100644
--- a/gas/testsuite/gas/aarch64/sme2-4-noarch.l
+++ b/gas/testsuite/gas/aarch64/sme2-4-noarch.l
@@ -1,481 +1,481 @@
 [^ :]+: Assembler messages:
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h-z1\.h},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h-z1\.h},pn8/z,\[x0,#0,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {Z0\.H-Z1\.H},PN8/Z,\[X0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z30\.h-z31\.h},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h-z1\.h},pn15/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h-z1\.h},pn8/z,\[x30\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h-z1\.h},pn8/z,\[sp\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h-z1\.h},pn8/z,\[x0,#-16,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h-z1\.h},pn8/z,\[x0,#14,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z12\.h-z13\.h},pn13/z,\[x11,#-10,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h-z3\.h},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h-z3\.h},pn8/z,\[x0,#0,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {Z0\.H-Z3\.H},PN8/Z,\[X0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z28\.h-z31\.h},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h-z3\.h},pn15/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h-z3\.h},pn8/z,\[x30\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h-z3\.h},pn8/z,\[sp\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h-z3\.h},pn8/z,\[x0,#-32,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h-z3\.h},pn8/z,\[x0,#28,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z8\.h-z11\.h},pn11/z,\[x17,#20,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h,z8\.h},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h,z8\.h},pn8/z,\[x0,#0,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {Z0\.H,Z8\.H},PN8/Z,\[X0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z1\.h,z9\.h},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z2\.h,z10\.h},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z3\.h,z11\.h},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z4\.h,z12\.h},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z5\.h,z13\.h},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z6\.h,z14\.h},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z7\.h,z15\.h},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z16\.h,z24\.h},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z17\.h,z25\.h},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z18\.h,z26\.h},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z19\.h,z27\.h},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z20\.h,z28\.h},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z21\.h,z29\.h},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z22\.h,z30\.h},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z23\.h,z31\.h},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h,z8\.h},pn15/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h,z8\.h},pn8/z,\[x30\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h,z8\.h},pn8/z,\[sp\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h,z8\.h},pn8/z,\[x0,#-16,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h,z8\.h},pn8/z,\[x0,#14,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z3\.h,z11\.h},pn10/z,\[x22,#6,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8/z,\[x0,#0,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {Z0\.H,Z4\.H,Z8\.H,Z12\.H},PN8/Z,\[X0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z1\.h,z5\.h,z9\.h,z13\.h},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z2\.h,z6\.h,z10\.h,z14\.h},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z3\.h,z7\.h,z11\.h,z15\.h},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z16\.h,z20\.h,z24\.h,z28\.h},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z17\.h,z21\.h,z25\.h,z29\.h},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z18\.h,z22\.h,z26\.h,z30\.h},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z19\.h,z23\.h,z27\.h,z31\.h},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h,z4\.h,z8\.h,z12\.h},pn15/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8/z,\[x30\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8/z,\[sp\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8/z,\[x0,#-32,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8/z,\[x0,#28,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z2\.h,z6\.h,z10\.h,z14\.h},pn14/z,\[x29,#8,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h-z1\.h},pn8/z,\[x0,x1,lsl 1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h-z1\.h},pn8/z,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {Z0\.H-Z1\.H},PN8/Z,\[X0,X1,LSL#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z30\.h-z31\.h},pn8/z,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h-z1\.h},pn15/z,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h-z1\.h},pn8/z,\[x30,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h-z1\.h},pn8/z,\[sp,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h-z1\.h},pn8/z,\[x0,x30,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h-z1\.h},pn8/z,\[x0,xzr,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z14\.h-z15\.h},pn9/z,\[x26,x3,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h-z3\.h},pn8/z,\[x0,x1,lsl 1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h-z3\.h},pn8/z,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {Z0\.H-Z3\.H},PN8/Z,\[X0,X1,LSL#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z28\.h-z31\.h},pn8/z,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h-z3\.h},pn15/z,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h-z3\.h},pn8/z,\[x30,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h-z3\.h},pn8/z,\[sp,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h-z3\.h},pn8/z,\[x0,x30,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h-z3\.h},pn8/z,\[x0,xzr,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z8\.h-z11\.h},pn11/z,\[x27,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h,z8\.h},pn8/z,\[x0,x1,lsl 1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h,z8\.h},pn8/z,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {Z0\.H,Z8\.H},PN8/Z,\[X0,X1,LSL#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z1\.h,z9\.h},pn8/z,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z2\.h,z10\.h},pn8/z,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z3\.h,z11\.h},pn8/z,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z4\.h,z12\.h},pn8/z,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z5\.h,z13\.h},pn8/z,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z6\.h,z14\.h},pn8/z,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z7\.h,z15\.h},pn8/z,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z16\.h,z24\.h},pn8/z,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z17\.h,z25\.h},pn8/z,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z18\.h,z26\.h},pn8/z,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z19\.h,z27\.h},pn8/z,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z20\.h,z28\.h},pn8/z,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z21\.h,z29\.h},pn8/z,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z22\.h,z30\.h},pn8/z,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z23\.h,z31\.h},pn8/z,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h,z8\.h},pn15/z,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h,z8\.h},pn8/z,\[x30,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h,z8\.h},pn8/z,\[sp,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h,z8\.h},pn8/z,\[x0,x30,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h,z8\.h},pn8/z,\[x0,xzr,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z5\.h,z13\.h},pn14/z,\[x15,x24,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8/z,\[x0,x1,lsl 1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8/z,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {Z0\.H,Z4\.H,Z8\.H,Z12\.H},PN8/Z,\[X0,X1,LSL#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z1\.h,z5\.h,z9\.h,z13\.h},pn8/z,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z2\.h,z6\.h,z10\.h,z14\.h},pn8/z,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z3\.h,z7\.h,z11\.h,z15\.h},pn8/z,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z16\.h,z20\.h,z24\.h,z28\.h},pn8/z,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z17\.h,z21\.h,z25\.h,z29\.h},pn8/z,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z18\.h,z22\.h,z26\.h,z30\.h},pn8/z,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z19\.h,z23\.h,z27\.h,z31\.h},pn8/z,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h,z4\.h,z8\.h,z12\.h},pn15/z,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8/z,\[x30,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8/z,\[sp,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8/z,\[x0,x30,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8/z,\[x0,xzr,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z17\.h,z21\.h,z25\.h,z29\.h},pn11/z,\[x4,x6,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h-z1\.h},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h-z1\.h},pn8/z,\[x0,#0,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {Z0\.H-Z1\.H},PN8/Z,\[X0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z30\.h-z31\.h},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h-z1\.h},pn15/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h-z1\.h},pn8/z,\[x30\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h-z1\.h},pn8/z,\[sp\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h-z1\.h},pn8/z,\[x0,#-16,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h-z1\.h},pn8/z,\[x0,#14,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z12\.h-z13\.h},pn13/z,\[x11,#-10,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h-z3\.h},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h-z3\.h},pn8/z,\[x0,#0,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {Z0\.H-Z3\.H},PN8/Z,\[X0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z28\.h-z31\.h},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h-z3\.h},pn15/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h-z3\.h},pn8/z,\[x30\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h-z3\.h},pn8/z,\[sp\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h-z3\.h},pn8/z,\[x0,#-32,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h-z3\.h},pn8/z,\[x0,#28,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z8\.h-z11\.h},pn11/z,\[x17,#20,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h,z8\.h},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h,z8\.h},pn8/z,\[x0,#0,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {Z0\.H,Z8\.H},PN8/Z,\[X0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z1\.h,z9\.h},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z2\.h,z10\.h},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z3\.h,z11\.h},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z4\.h,z12\.h},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z5\.h,z13\.h},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z6\.h,z14\.h},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z7\.h,z15\.h},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z16\.h,z24\.h},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z17\.h,z25\.h},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z18\.h,z26\.h},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z19\.h,z27\.h},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z20\.h,z28\.h},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z21\.h,z29\.h},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z22\.h,z30\.h},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z23\.h,z31\.h},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h,z8\.h},pn15/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h,z8\.h},pn8/z,\[x30\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h,z8\.h},pn8/z,\[sp\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h,z8\.h},pn8/z,\[x0,#-16,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h,z8\.h},pn8/z,\[x0,#14,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z3\.h,z11\.h},pn10/z,\[x22,#6,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8/z,\[x0,#0,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {Z0\.H,Z4\.H,Z8\.H,Z12\.H},PN8/Z,\[X0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z1\.h,z5\.h,z9\.h,z13\.h},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z2\.h,z6\.h,z10\.h,z14\.h},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z3\.h,z7\.h,z11\.h,z15\.h},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z16\.h,z20\.h,z24\.h,z28\.h},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z17\.h,z21\.h,z25\.h,z29\.h},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z18\.h,z22\.h,z26\.h,z30\.h},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z19\.h,z23\.h,z27\.h,z31\.h},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h,z4\.h,z8\.h,z12\.h},pn15/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8/z,\[x30\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8/z,\[sp\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8/z,\[x0,#-32,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8/z,\[x0,#28,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z2\.h,z6\.h,z10\.h,z14\.h},pn14/z,\[x29,#8,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h-z1\.h},pn8/z,\[x0,x1,lsl 1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h-z1\.h},pn8/z,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {Z0\.H-Z1\.H},PN8/Z,\[X0,X1,LSL#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z30\.h-z31\.h},pn8/z,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h-z1\.h},pn15/z,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h-z1\.h},pn8/z,\[x30,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h-z1\.h},pn8/z,\[sp,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h-z1\.h},pn8/z,\[x0,x30,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h-z1\.h},pn8/z,\[x0,xzr,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z14\.h-z15\.h},pn9/z,\[x26,x3,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h-z3\.h},pn8/z,\[x0,x1,lsl 1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h-z3\.h},pn8/z,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {Z0\.H-Z3\.H},PN8/Z,\[X0,X1,LSL#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z28\.h-z31\.h},pn8/z,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h-z3\.h},pn15/z,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h-z3\.h},pn8/z,\[x30,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h-z3\.h},pn8/z,\[sp,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h-z3\.h},pn8/z,\[x0,x30,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h-z3\.h},pn8/z,\[x0,xzr,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z8\.h-z11\.h},pn11/z,\[x27,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h,z8\.h},pn8/z,\[x0,x1,lsl 1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h,z8\.h},pn8/z,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {Z0\.H,Z8\.H},PN8/Z,\[X0,X1,LSL#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z1\.h,z9\.h},pn8/z,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z2\.h,z10\.h},pn8/z,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z3\.h,z11\.h},pn8/z,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z4\.h,z12\.h},pn8/z,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z5\.h,z13\.h},pn8/z,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z6\.h,z14\.h},pn8/z,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z7\.h,z15\.h},pn8/z,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z16\.h,z24\.h},pn8/z,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z17\.h,z25\.h},pn8/z,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z18\.h,z26\.h},pn8/z,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z19\.h,z27\.h},pn8/z,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z20\.h,z28\.h},pn8/z,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z21\.h,z29\.h},pn8/z,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z22\.h,z30\.h},pn8/z,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z23\.h,z31\.h},pn8/z,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h,z8\.h},pn15/z,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h,z8\.h},pn8/z,\[x30,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h,z8\.h},pn8/z,\[sp,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h,z8\.h},pn8/z,\[x0,x30,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h,z8\.h},pn8/z,\[x0,xzr,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z5\.h,z13\.h},pn14/z,\[x15,x24,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8/z,\[x0,x1,lsl 1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8/z,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {Z0\.H,Z4\.H,Z8\.H,Z12\.H},PN8/Z,\[X0,X1,LSL#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z1\.h,z5\.h,z9\.h,z13\.h},pn8/z,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z2\.h,z6\.h,z10\.h,z14\.h},pn8/z,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z3\.h,z7\.h,z11\.h,z15\.h},pn8/z,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z16\.h,z20\.h,z24\.h,z28\.h},pn8/z,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z17\.h,z21\.h,z25\.h,z29\.h},pn8/z,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z18\.h,z22\.h,z26\.h,z30\.h},pn8/z,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z19\.h,z23\.h,z27\.h,z31\.h},pn8/z,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h,z4\.h,z8\.h,z12\.h},pn15/z,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8/z,\[x30,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8/z,\[sp,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8/z,\[x0,x30,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8/z,\[x0,xzr,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z17\.h,z21\.h,z25\.h,z29\.h},pn11/z,\[x4,x6,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h-z1\.h},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h-z1\.h},pn8,\[x0,#0,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {Z0\.H-Z1\.H},PN8,\[X0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z30\.h-z31\.h},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h-z1\.h},pn15,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h-z1\.h},pn8,\[x30\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h-z1\.h},pn8,\[sp\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h-z1\.h},pn8,\[x0,#-16,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h-z1\.h},pn8,\[x0,#14,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z12\.h-z13\.h},pn13,\[x11,#-10,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h-z3\.h},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h-z3\.h},pn8,\[x0,#0,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {Z0\.H-Z3\.H},PN8,\[X0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z28\.h-z31\.h},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h-z3\.h},pn15,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h-z3\.h},pn8,\[x30\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h-z3\.h},pn8,\[sp\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h-z3\.h},pn8,\[x0,#-32,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h-z3\.h},pn8,\[x0,#28,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z8\.h-z11\.h},pn11,\[x17,#20,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h,z8\.h},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h,z8\.h},pn8,\[x0,#0,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {Z0\.H,Z8\.H},PN8,\[X0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z1\.h,z9\.h},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z2\.h,z10\.h},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z3\.h,z11\.h},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z4\.h,z12\.h},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z5\.h,z13\.h},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z6\.h,z14\.h},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z7\.h,z15\.h},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z16\.h,z24\.h},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z17\.h,z25\.h},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z18\.h,z26\.h},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z19\.h,z27\.h},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z20\.h,z28\.h},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z21\.h,z29\.h},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z22\.h,z30\.h},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z23\.h,z31\.h},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h,z8\.h},pn15,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h,z8\.h},pn8,\[x30\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h,z8\.h},pn8,\[sp\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h,z8\.h},pn8,\[x0,#-16,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h,z8\.h},pn8,\[x0,#14,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z3\.h,z11\.h},pn10,\[x22,#6,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8,\[x0,#0,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {Z0\.H,Z4\.H,Z8\.H,Z12\.H},PN8,\[X0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z1\.h,z5\.h,z9\.h,z13\.h},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z2\.h,z6\.h,z10\.h,z14\.h},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z3\.h,z7\.h,z11\.h,z15\.h},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z16\.h,z20\.h,z24\.h,z28\.h},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z17\.h,z21\.h,z25\.h,z29\.h},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z18\.h,z22\.h,z26\.h,z30\.h},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z19\.h,z23\.h,z27\.h,z31\.h},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h,z4\.h,z8\.h,z12\.h},pn15,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8,\[x30\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8,\[sp\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8,\[x0,#-32,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8,\[x0,#28,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z2\.h,z6\.h,z10\.h,z14\.h},pn14,\[x29,#8,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h-z1\.h},pn8,\[x0,x1,lsl 1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h-z1\.h},pn8,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {Z0\.H-Z1\.H},PN8,\[X0,X1,LSL#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z30\.h-z31\.h},pn8,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h-z1\.h},pn15,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h-z1\.h},pn8,\[x30,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h-z1\.h},pn8,\[sp,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h-z1\.h},pn8,\[x0,x30,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h-z1\.h},pn8,\[x0,xzr,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z14\.h-z15\.h},pn9,\[x26,x3,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h-z3\.h},pn8,\[x0,x1,lsl 1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h-z3\.h},pn8,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {Z0\.H-Z3\.H},PN8,\[X0,X1,LSL#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z28\.h-z31\.h},pn8,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h-z3\.h},pn15,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h-z3\.h},pn8,\[x30,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h-z3\.h},pn8,\[sp,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h-z3\.h},pn8,\[x0,x30,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h-z3\.h},pn8,\[x0,xzr,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z8\.h-z11\.h},pn11,\[x27,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h,z8\.h},pn8,\[x0,x1,lsl 1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h,z8\.h},pn8,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {Z0\.H,Z8\.H},PN8,\[X0,X1,LSL#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z1\.h,z9\.h},pn8,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z2\.h,z10\.h},pn8,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z3\.h,z11\.h},pn8,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z4\.h,z12\.h},pn8,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z5\.h,z13\.h},pn8,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z6\.h,z14\.h},pn8,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z7\.h,z15\.h},pn8,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z16\.h,z24\.h},pn8,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z17\.h,z25\.h},pn8,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z18\.h,z26\.h},pn8,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z19\.h,z27\.h},pn8,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z20\.h,z28\.h},pn8,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z21\.h,z29\.h},pn8,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z22\.h,z30\.h},pn8,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z23\.h,z31\.h},pn8,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h,z8\.h},pn15,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h,z8\.h},pn8,\[x30,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h,z8\.h},pn8,\[sp,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h,z8\.h},pn8,\[x0,x30,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h,z8\.h},pn8,\[x0,xzr,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z5\.h,z13\.h},pn14,\[x15,x24,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8,\[x0,x1,lsl 1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {Z0\.H,Z4\.H,Z8\.H,Z12\.H},PN8,\[X0,X1,LSL#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z1\.h,z5\.h,z9\.h,z13\.h},pn8,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z2\.h,z6\.h,z10\.h,z14\.h},pn8,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z3\.h,z7\.h,z11\.h,z15\.h},pn8,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z16\.h,z20\.h,z24\.h,z28\.h},pn8,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z17\.h,z21\.h,z25\.h,z29\.h},pn8,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z18\.h,z22\.h,z26\.h,z30\.h},pn8,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z19\.h,z23\.h,z27\.h,z31\.h},pn8,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h,z4\.h,z8\.h,z12\.h},pn15,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8,\[x30,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8,\[sp,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8,\[x0,x30,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8,\[x0,xzr,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z17\.h,z21\.h,z25\.h,z29\.h},pn11,\[x4,x6,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h-z1\.h},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h-z1\.h},pn8,\[x0,#0,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {Z0\.H-Z1\.H},PN8,\[X0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z30\.h-z31\.h},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h-z1\.h},pn15,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h-z1\.h},pn8,\[x30\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h-z1\.h},pn8,\[sp\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h-z1\.h},pn8,\[x0,#-16,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h-z1\.h},pn8,\[x0,#14,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z12\.h-z13\.h},pn13,\[x11,#-10,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h-z3\.h},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h-z3\.h},pn8,\[x0,#0,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {Z0\.H-Z3\.H},PN8,\[X0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z28\.h-z31\.h},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h-z3\.h},pn15,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h-z3\.h},pn8,\[x30\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h-z3\.h},pn8,\[sp\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h-z3\.h},pn8,\[x0,#-32,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h-z3\.h},pn8,\[x0,#28,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z8\.h-z11\.h},pn11,\[x17,#20,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h,z8\.h},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h,z8\.h},pn8,\[x0,#0,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {Z0\.H,Z8\.H},PN8,\[X0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z1\.h,z9\.h},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z2\.h,z10\.h},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z3\.h,z11\.h},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z4\.h,z12\.h},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z5\.h,z13\.h},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z6\.h,z14\.h},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z7\.h,z15\.h},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z16\.h,z24\.h},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z17\.h,z25\.h},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z18\.h,z26\.h},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z19\.h,z27\.h},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z20\.h,z28\.h},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z21\.h,z29\.h},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z22\.h,z30\.h},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z23\.h,z31\.h},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h,z8\.h},pn15,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h,z8\.h},pn8,\[x30\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h,z8\.h},pn8,\[sp\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h,z8\.h},pn8,\[x0,#-16,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h,z8\.h},pn8,\[x0,#14,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z3\.h,z11\.h},pn10,\[x22,#6,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8,\[x0,#0,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {Z0\.H,Z4\.H,Z8\.H,Z12\.H},PN8,\[X0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z1\.h,z5\.h,z9\.h,z13\.h},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z2\.h,z6\.h,z10\.h,z14\.h},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z3\.h,z7\.h,z11\.h,z15\.h},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z16\.h,z20\.h,z24\.h,z28\.h},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z17\.h,z21\.h,z25\.h,z29\.h},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z18\.h,z22\.h,z26\.h,z30\.h},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z19\.h,z23\.h,z27\.h,z31\.h},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h,z4\.h,z8\.h,z12\.h},pn15,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8,\[x30\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8,\[sp\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8,\[x0,#-32,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8,\[x0,#28,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z2\.h,z6\.h,z10\.h,z14\.h},pn14,\[x29,#8,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h-z1\.h},pn8,\[x0,x1,lsl 1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h-z1\.h},pn8,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {Z0\.H-Z1\.H},PN8,\[X0,X1,LSL#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z30\.h-z31\.h},pn8,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h-z1\.h},pn15,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h-z1\.h},pn8,\[x30,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h-z1\.h},pn8,\[sp,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h-z1\.h},pn8,\[x0,x30,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h-z1\.h},pn8,\[x0,xzr,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z14\.h-z15\.h},pn9,\[x26,x3,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h-z3\.h},pn8,\[x0,x1,lsl 1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h-z3\.h},pn8,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {Z0\.H-Z3\.H},PN8,\[X0,X1,LSL#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z28\.h-z31\.h},pn8,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h-z3\.h},pn15,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h-z3\.h},pn8,\[x30,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h-z3\.h},pn8,\[sp,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h-z3\.h},pn8,\[x0,x30,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h-z3\.h},pn8,\[x0,xzr,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z8\.h-z11\.h},pn11,\[x27,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h,z8\.h},pn8,\[x0,x1,lsl 1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h,z8\.h},pn8,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {Z0\.H,Z8\.H},PN8,\[X0,X1,LSL#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z1\.h,z9\.h},pn8,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z2\.h,z10\.h},pn8,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z3\.h,z11\.h},pn8,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z4\.h,z12\.h},pn8,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z5\.h,z13\.h},pn8,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z6\.h,z14\.h},pn8,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z7\.h,z15\.h},pn8,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z16\.h,z24\.h},pn8,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z17\.h,z25\.h},pn8,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z18\.h,z26\.h},pn8,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z19\.h,z27\.h},pn8,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z20\.h,z28\.h},pn8,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z21\.h,z29\.h},pn8,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z22\.h,z30\.h},pn8,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z23\.h,z31\.h},pn8,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h,z8\.h},pn15,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h,z8\.h},pn8,\[x30,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h,z8\.h},pn8,\[sp,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h,z8\.h},pn8,\[x0,x30,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h,z8\.h},pn8,\[x0,xzr,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z5\.h,z13\.h},pn14,\[x15,x24,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8,\[x0,x1,lsl 1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {Z0\.H,Z4\.H,Z8\.H,Z12\.H},PN8,\[X0,X1,LSL#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z1\.h,z5\.h,z9\.h,z13\.h},pn8,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z2\.h,z6\.h,z10\.h,z14\.h},pn8,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z3\.h,z7\.h,z11\.h,z15\.h},pn8,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z16\.h,z20\.h,z24\.h,z28\.h},pn8,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z17\.h,z21\.h,z25\.h,z29\.h},pn8,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z18\.h,z22\.h,z26\.h,z30\.h},pn8,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z19\.h,z23\.h,z27\.h,z31\.h},pn8,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h,z4\.h,z8\.h,z12\.h},pn15,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8,\[x30,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8,\[sp,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8,\[x0,x30,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8,\[x0,xzr,lsl#1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z17\.h,z21\.h,z25\.h,z29\.h},pn11,\[x4,x6,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z0\.h ?- ?z1\.h ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z0\.h ?- ?z1\.h ?},pn8/z,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?Z0\.H ?- ?Z1\.H ?},PN8/Z,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z30\.h ?- ?z31\.h ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z0\.h ?- ?z1\.h ?},pn15/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z0\.h ?- ?z1\.h ?},pn8/z,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z0\.h ?- ?z1\.h ?},pn8/z,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z0\.h ?- ?z1\.h ?},pn8/z,\[x0,#-16,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z0\.h ?- ?z1\.h ?},pn8/z,\[x0,#14,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z12\.h ?- ?z13\.h ?},pn13/z,\[x11,#-10,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z0\.h ?- ?z3\.h ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z0\.h ?- ?z3\.h ?},pn8/z,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?Z0\.H ?- ?Z3\.H ?},PN8/Z,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z28\.h ?- ?z31\.h ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z0\.h ?- ?z3\.h ?},pn15/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z0\.h ?- ?z3\.h ?},pn8/z,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z0\.h ?- ?z3\.h ?},pn8/z,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z0\.h ?- ?z3\.h ?},pn8/z,\[x0,#-32,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z0\.h ?- ?z3\.h ?},pn8/z,\[x0,#28,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z8\.h ?- ?z11\.h ?},pn11/z,\[x17,#20,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z0\.h,z8\.h ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z0\.h,z8\.h ?},pn8/z,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?Z0\.H,Z8\.H ?},PN8/Z,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z1\.h,z9\.h ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z2\.h,z10\.h ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z3\.h,z11\.h ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z4\.h,z12\.h ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z5\.h,z13\.h ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z6\.h,z14\.h ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z7\.h,z15\.h ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z16\.h,z24\.h ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z17\.h,z25\.h ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z18\.h,z26\.h ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z19\.h,z27\.h ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z20\.h,z28\.h ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z21\.h,z29\.h ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z22\.h,z30\.h ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z23\.h,z31\.h ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z0\.h,z8\.h ?},pn15/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z0\.h,z8\.h ?},pn8/z,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z0\.h,z8\.h ?},pn8/z,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z0\.h,z8\.h ?},pn8/z,\[x0,#-16,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z0\.h,z8\.h ?},pn8/z,\[x0,#14,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z3\.h,z11\.h ?},pn10/z,\[x22,#6,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn8/z,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?Z0\.H,Z4\.H,Z8\.H,Z12\.H ?},PN8/Z,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z1\.h,z5\.h,z9\.h,z13\.h ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z2\.h,z6\.h,z10\.h,z14\.h ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z3\.h,z7\.h,z11\.h,z15\.h ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z16\.h,z20\.h,z24\.h,z28\.h ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z17\.h,z21\.h,z25\.h,z29\.h ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z18\.h,z22\.h,z26\.h,z30\.h ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z19\.h,z23\.h,z27\.h,z31\.h ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn15/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn8/z,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn8/z,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn8/z,\[x0,#-32,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn8/z,\[x0,#28,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z2\.h,z6\.h,z10\.h,z14\.h ?},pn14/z,\[x29,#8,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z0\.h ?- ?z1\.h ?},pn8/z,\[x0,x1,lsl 1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z0\.h ?- ?z1\.h ?},pn8/z,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?Z0\.H ?- ?Z1\.H ?},PN8/Z,\[X0,X1,LSL ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z30\.h ?- ?z31\.h ?},pn8/z,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z0\.h ?- ?z1\.h ?},pn15/z,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z0\.h ?- ?z1\.h ?},pn8/z,\[x30,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z0\.h ?- ?z1\.h ?},pn8/z,\[sp,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z0\.h ?- ?z1\.h ?},pn8/z,\[x0,x30,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z0\.h ?- ?z1\.h ?},pn8/z,\[x0,xzr,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z14\.h ?- ?z15\.h ?},pn9/z,\[x26,x3,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z0\.h ?- ?z3\.h ?},pn8/z,\[x0,x1,lsl 1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z0\.h ?- ?z3\.h ?},pn8/z,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?Z0\.H ?- ?Z3\.H ?},PN8/Z,\[X0,X1,LSL ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z28\.h ?- ?z31\.h ?},pn8/z,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z0\.h ?- ?z3\.h ?},pn15/z,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z0\.h ?- ?z3\.h ?},pn8/z,\[x30,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z0\.h ?- ?z3\.h ?},pn8/z,\[sp,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z0\.h ?- ?z3\.h ?},pn8/z,\[x0,x30,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z0\.h ?- ?z3\.h ?},pn8/z,\[x0,xzr,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z8\.h ?- ?z11\.h ?},pn11/z,\[x27,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z0\.h,z8\.h ?},pn8/z,\[x0,x1,lsl 1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z0\.h,z8\.h ?},pn8/z,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?Z0\.H,Z8\.H ?},PN8/Z,\[X0,X1,LSL ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z1\.h,z9\.h ?},pn8/z,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z2\.h,z10\.h ?},pn8/z,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z3\.h,z11\.h ?},pn8/z,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z4\.h,z12\.h ?},pn8/z,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z5\.h,z13\.h ?},pn8/z,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z6\.h,z14\.h ?},pn8/z,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z7\.h,z15\.h ?},pn8/z,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z16\.h,z24\.h ?},pn8/z,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z17\.h,z25\.h ?},pn8/z,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z18\.h,z26\.h ?},pn8/z,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z19\.h,z27\.h ?},pn8/z,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z20\.h,z28\.h ?},pn8/z,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z21\.h,z29\.h ?},pn8/z,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z22\.h,z30\.h ?},pn8/z,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z23\.h,z31\.h ?},pn8/z,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z0\.h,z8\.h ?},pn15/z,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z0\.h,z8\.h ?},pn8/z,\[x30,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z0\.h,z8\.h ?},pn8/z,\[sp,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z0\.h,z8\.h ?},pn8/z,\[x0,x30,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z0\.h,z8\.h ?},pn8/z,\[x0,xzr,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z5\.h,z13\.h ?},pn14/z,\[x15,x24,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn8/z,\[x0,x1,lsl 1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn8/z,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?Z0\.H,Z4\.H,Z8\.H,Z12\.H ?},PN8/Z,\[X0,X1,LSL ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z1\.h,z5\.h,z9\.h,z13\.h ?},pn8/z,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z2\.h,z6\.h,z10\.h,z14\.h ?},pn8/z,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z3\.h,z7\.h,z11\.h,z15\.h ?},pn8/z,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z16\.h,z20\.h,z24\.h,z28\.h ?},pn8/z,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z17\.h,z21\.h,z25\.h,z29\.h ?},pn8/z,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z18\.h,z22\.h,z26\.h,z30\.h ?},pn8/z,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z19\.h,z23\.h,z27\.h,z31\.h ?},pn8/z,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn15/z,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn8/z,\[x30,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn8/z,\[sp,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn8/z,\[x0,x30,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn8/z,\[x0,xzr,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z17\.h,z21\.h,z25\.h,z29\.h ?},pn11/z,\[x4,x6,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.h ?- ?z1\.h ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.h ?- ?z1\.h ?},pn8/z,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?Z0\.H ?- ?Z1\.H ?},PN8/Z,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z30\.h ?- ?z31\.h ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.h ?- ?z1\.h ?},pn15/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.h ?- ?z1\.h ?},pn8/z,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.h ?- ?z1\.h ?},pn8/z,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.h ?- ?z1\.h ?},pn8/z,\[x0,#-16,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.h ?- ?z1\.h ?},pn8/z,\[x0,#14,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z12\.h ?- ?z13\.h ?},pn13/z,\[x11,#-10,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.h ?- ?z3\.h ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.h ?- ?z3\.h ?},pn8/z,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?Z0\.H ?- ?Z3\.H ?},PN8/Z,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z28\.h ?- ?z31\.h ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.h ?- ?z3\.h ?},pn15/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.h ?- ?z3\.h ?},pn8/z,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.h ?- ?z3\.h ?},pn8/z,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.h ?- ?z3\.h ?},pn8/z,\[x0,#-32,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.h ?- ?z3\.h ?},pn8/z,\[x0,#28,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z8\.h ?- ?z11\.h ?},pn11/z,\[x17,#20,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.h,z8\.h ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.h,z8\.h ?},pn8/z,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?Z0\.H,Z8\.H ?},PN8/Z,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z1\.h,z9\.h ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z2\.h,z10\.h ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z3\.h,z11\.h ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z4\.h,z12\.h ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z5\.h,z13\.h ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z6\.h,z14\.h ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z7\.h,z15\.h ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z16\.h,z24\.h ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z17\.h,z25\.h ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z18\.h,z26\.h ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z19\.h,z27\.h ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z20\.h,z28\.h ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z21\.h,z29\.h ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z22\.h,z30\.h ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z23\.h,z31\.h ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.h,z8\.h ?},pn15/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.h,z8\.h ?},pn8/z,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.h,z8\.h ?},pn8/z,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.h,z8\.h ?},pn8/z,\[x0,#-16,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.h,z8\.h ?},pn8/z,\[x0,#14,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z3\.h,z11\.h ?},pn10/z,\[x22,#6,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn8/z,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?Z0\.H,Z4\.H,Z8\.H,Z12\.H ?},PN8/Z,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z1\.h,z5\.h,z9\.h,z13\.h ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z2\.h,z6\.h,z10\.h,z14\.h ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z3\.h,z7\.h,z11\.h,z15\.h ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z16\.h,z20\.h,z24\.h,z28\.h ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z17\.h,z21\.h,z25\.h,z29\.h ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z18\.h,z22\.h,z26\.h,z30\.h ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z19\.h,z23\.h,z27\.h,z31\.h ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn15/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn8/z,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn8/z,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn8/z,\[x0,#-32,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn8/z,\[x0,#28,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z2\.h,z6\.h,z10\.h,z14\.h ?},pn14/z,\[x29,#8,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.h ?- ?z1\.h ?},pn8/z,\[x0,x1,lsl 1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.h ?- ?z1\.h ?},pn8/z,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?Z0\.H ?- ?Z1\.H ?},PN8/Z,\[X0,X1,LSL ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z30\.h ?- ?z31\.h ?},pn8/z,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.h ?- ?z1\.h ?},pn15/z,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.h ?- ?z1\.h ?},pn8/z,\[x30,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.h ?- ?z1\.h ?},pn8/z,\[sp,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.h ?- ?z1\.h ?},pn8/z,\[x0,x30,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.h ?- ?z1\.h ?},pn8/z,\[x0,xzr,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z14\.h ?- ?z15\.h ?},pn9/z,\[x26,x3,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.h ?- ?z3\.h ?},pn8/z,\[x0,x1,lsl 1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.h ?- ?z3\.h ?},pn8/z,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?Z0\.H ?- ?Z3\.H ?},PN8/Z,\[X0,X1,LSL ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z28\.h ?- ?z31\.h ?},pn8/z,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.h ?- ?z3\.h ?},pn15/z,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.h ?- ?z3\.h ?},pn8/z,\[x30,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.h ?- ?z3\.h ?},pn8/z,\[sp,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.h ?- ?z3\.h ?},pn8/z,\[x0,x30,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.h ?- ?z3\.h ?},pn8/z,\[x0,xzr,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z8\.h ?- ?z11\.h ?},pn11/z,\[x27,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.h,z8\.h ?},pn8/z,\[x0,x1,lsl 1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.h,z8\.h ?},pn8/z,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?Z0\.H,Z8\.H ?},PN8/Z,\[X0,X1,LSL ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z1\.h,z9\.h ?},pn8/z,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z2\.h,z10\.h ?},pn8/z,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z3\.h,z11\.h ?},pn8/z,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z4\.h,z12\.h ?},pn8/z,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z5\.h,z13\.h ?},pn8/z,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z6\.h,z14\.h ?},pn8/z,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z7\.h,z15\.h ?},pn8/z,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z16\.h,z24\.h ?},pn8/z,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z17\.h,z25\.h ?},pn8/z,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z18\.h,z26\.h ?},pn8/z,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z19\.h,z27\.h ?},pn8/z,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z20\.h,z28\.h ?},pn8/z,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z21\.h,z29\.h ?},pn8/z,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z22\.h,z30\.h ?},pn8/z,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z23\.h,z31\.h ?},pn8/z,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.h,z8\.h ?},pn15/z,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.h,z8\.h ?},pn8/z,\[x30,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.h,z8\.h ?},pn8/z,\[sp,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.h,z8\.h ?},pn8/z,\[x0,x30,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.h,z8\.h ?},pn8/z,\[x0,xzr,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z5\.h,z13\.h ?},pn14/z,\[x15,x24,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn8/z,\[x0,x1,lsl 1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn8/z,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?Z0\.H,Z4\.H,Z8\.H,Z12\.H ?},PN8/Z,\[X0,X1,LSL ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z1\.h,z5\.h,z9\.h,z13\.h ?},pn8/z,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z2\.h,z6\.h,z10\.h,z14\.h ?},pn8/z,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z3\.h,z7\.h,z11\.h,z15\.h ?},pn8/z,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z16\.h,z20\.h,z24\.h,z28\.h ?},pn8/z,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z17\.h,z21\.h,z25\.h,z29\.h ?},pn8/z,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z18\.h,z22\.h,z26\.h,z30\.h ?},pn8/z,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z19\.h,z23\.h,z27\.h,z31\.h ?},pn8/z,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn15/z,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn8/z,\[x30,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn8/z,\[sp,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn8/z,\[x0,x30,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn8/z,\[x0,xzr,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z17\.h,z21\.h,z25\.h,z29\.h ?},pn11/z,\[x4,x6,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z0\.h ?- ?z1\.h ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z0\.h ?- ?z1\.h ?},pn8,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?Z0\.H ?- ?Z1\.H ?},PN8,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z30\.h ?- ?z31\.h ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z0\.h ?- ?z1\.h ?},pn15,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z0\.h ?- ?z1\.h ?},pn8,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z0\.h ?- ?z1\.h ?},pn8,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z0\.h ?- ?z1\.h ?},pn8,\[x0,#-16,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z0\.h ?- ?z1\.h ?},pn8,\[x0,#14,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z12\.h ?- ?z13\.h ?},pn13,\[x11,#-10,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z0\.h ?- ?z3\.h ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z0\.h ?- ?z3\.h ?},pn8,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?Z0\.H ?- ?Z3\.H ?},PN8,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z28\.h ?- ?z31\.h ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z0\.h ?- ?z3\.h ?},pn15,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z0\.h ?- ?z3\.h ?},pn8,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z0\.h ?- ?z3\.h ?},pn8,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z0\.h ?- ?z3\.h ?},pn8,\[x0,#-32,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z0\.h ?- ?z3\.h ?},pn8,\[x0,#28,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z8\.h ?- ?z11\.h ?},pn11,\[x17,#20,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z0\.h,z8\.h ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z0\.h,z8\.h ?},pn8,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?Z0\.H,Z8\.H ?},PN8,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z1\.h,z9\.h ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z2\.h,z10\.h ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z3\.h,z11\.h ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z4\.h,z12\.h ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z5\.h,z13\.h ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z6\.h,z14\.h ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z7\.h,z15\.h ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z16\.h,z24\.h ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z17\.h,z25\.h ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z18\.h,z26\.h ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z19\.h,z27\.h ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z20\.h,z28\.h ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z21\.h,z29\.h ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z22\.h,z30\.h ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z23\.h,z31\.h ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z0\.h,z8\.h ?},pn15,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z0\.h,z8\.h ?},pn8,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z0\.h,z8\.h ?},pn8,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z0\.h,z8\.h ?},pn8,\[x0,#-16,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z0\.h,z8\.h ?},pn8,\[x0,#14,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z3\.h,z11\.h ?},pn10,\[x22,#6,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn8,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?Z0\.H,Z4\.H,Z8\.H,Z12\.H ?},PN8,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z1\.h,z5\.h,z9\.h,z13\.h ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z2\.h,z6\.h,z10\.h,z14\.h ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z3\.h,z7\.h,z11\.h,z15\.h ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z16\.h,z20\.h,z24\.h,z28\.h ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z17\.h,z21\.h,z25\.h,z29\.h ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z18\.h,z22\.h,z26\.h,z30\.h ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z19\.h,z23\.h,z27\.h,z31\.h ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn15,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn8,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn8,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn8,\[x0,#-32,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn8,\[x0,#28,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z2\.h,z6\.h,z10\.h,z14\.h ?},pn14,\[x29,#8,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z0\.h ?- ?z1\.h ?},pn8,\[x0,x1,lsl 1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z0\.h ?- ?z1\.h ?},pn8,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?Z0\.H ?- ?Z1\.H ?},PN8,\[X0,X1,LSL ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z30\.h ?- ?z31\.h ?},pn8,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z0\.h ?- ?z1\.h ?},pn15,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z0\.h ?- ?z1\.h ?},pn8,\[x30,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z0\.h ?- ?z1\.h ?},pn8,\[sp,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z0\.h ?- ?z1\.h ?},pn8,\[x0,x30,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z0\.h ?- ?z1\.h ?},pn8,\[x0,xzr,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z14\.h ?- ?z15\.h ?},pn9,\[x26,x3,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z0\.h ?- ?z3\.h ?},pn8,\[x0,x1,lsl 1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z0\.h ?- ?z3\.h ?},pn8,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?Z0\.H ?- ?Z3\.H ?},PN8,\[X0,X1,LSL ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z28\.h ?- ?z31\.h ?},pn8,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z0\.h ?- ?z3\.h ?},pn15,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z0\.h ?- ?z3\.h ?},pn8,\[x30,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z0\.h ?- ?z3\.h ?},pn8,\[sp,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z0\.h ?- ?z3\.h ?},pn8,\[x0,x30,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z0\.h ?- ?z3\.h ?},pn8,\[x0,xzr,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z8\.h ?- ?z11\.h ?},pn11,\[x27,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z0\.h,z8\.h ?},pn8,\[x0,x1,lsl 1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z0\.h,z8\.h ?},pn8,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?Z0\.H,Z8\.H ?},PN8,\[X0,X1,LSL ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z1\.h,z9\.h ?},pn8,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z2\.h,z10\.h ?},pn8,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z3\.h,z11\.h ?},pn8,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z4\.h,z12\.h ?},pn8,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z5\.h,z13\.h ?},pn8,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z6\.h,z14\.h ?},pn8,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z7\.h,z15\.h ?},pn8,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z16\.h,z24\.h ?},pn8,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z17\.h,z25\.h ?},pn8,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z18\.h,z26\.h ?},pn8,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z19\.h,z27\.h ?},pn8,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z20\.h,z28\.h ?},pn8,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z21\.h,z29\.h ?},pn8,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z22\.h,z30\.h ?},pn8,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z23\.h,z31\.h ?},pn8,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z0\.h,z8\.h ?},pn15,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z0\.h,z8\.h ?},pn8,\[x30,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z0\.h,z8\.h ?},pn8,\[sp,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z0\.h,z8\.h ?},pn8,\[x0,x30,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z0\.h,z8\.h ?},pn8,\[x0,xzr,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z5\.h,z13\.h ?},pn14,\[x15,x24,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn8,\[x0,x1,lsl 1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn8,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?Z0\.H,Z4\.H,Z8\.H,Z12\.H ?},PN8,\[X0,X1,LSL ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z1\.h,z5\.h,z9\.h,z13\.h ?},pn8,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z2\.h,z6\.h,z10\.h,z14\.h ?},pn8,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z3\.h,z7\.h,z11\.h,z15\.h ?},pn8,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z16\.h,z20\.h,z24\.h,z28\.h ?},pn8,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z17\.h,z21\.h,z25\.h,z29\.h ?},pn8,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z18\.h,z22\.h,z26\.h,z30\.h ?},pn8,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z19\.h,z23\.h,z27\.h,z31\.h ?},pn8,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn15,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn8,\[x30,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn8,\[sp,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn8,\[x0,x30,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn8,\[x0,xzr,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z17\.h,z21\.h,z25\.h,z29\.h ?},pn11,\[x4,x6,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.h ?- ?z1\.h ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.h ?- ?z1\.h ?},pn8,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?Z0\.H ?- ?Z1\.H ?},PN8,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z30\.h ?- ?z31\.h ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.h ?- ?z1\.h ?},pn15,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.h ?- ?z1\.h ?},pn8,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.h ?- ?z1\.h ?},pn8,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.h ?- ?z1\.h ?},pn8,\[x0,#-16,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.h ?- ?z1\.h ?},pn8,\[x0,#14,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z12\.h ?- ?z13\.h ?},pn13,\[x11,#-10,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.h ?- ?z3\.h ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.h ?- ?z3\.h ?},pn8,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?Z0\.H ?- ?Z3\.H ?},PN8,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z28\.h ?- ?z31\.h ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.h ?- ?z3\.h ?},pn15,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.h ?- ?z3\.h ?},pn8,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.h ?- ?z3\.h ?},pn8,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.h ?- ?z3\.h ?},pn8,\[x0,#-32,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.h ?- ?z3\.h ?},pn8,\[x0,#28,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z8\.h ?- ?z11\.h ?},pn11,\[x17,#20,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.h,z8\.h ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.h,z8\.h ?},pn8,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?Z0\.H,Z8\.H ?},PN8,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z1\.h,z9\.h ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z2\.h,z10\.h ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z3\.h,z11\.h ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z4\.h,z12\.h ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z5\.h,z13\.h ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z6\.h,z14\.h ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z7\.h,z15\.h ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z16\.h,z24\.h ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z17\.h,z25\.h ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z18\.h,z26\.h ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z19\.h,z27\.h ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z20\.h,z28\.h ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z21\.h,z29\.h ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z22\.h,z30\.h ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z23\.h,z31\.h ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.h,z8\.h ?},pn15,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.h,z8\.h ?},pn8,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.h,z8\.h ?},pn8,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.h,z8\.h ?},pn8,\[x0,#-16,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.h,z8\.h ?},pn8,\[x0,#14,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z3\.h,z11\.h ?},pn10,\[x22,#6,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn8,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?Z0\.H,Z4\.H,Z8\.H,Z12\.H ?},PN8,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z1\.h,z5\.h,z9\.h,z13\.h ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z2\.h,z6\.h,z10\.h,z14\.h ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z3\.h,z7\.h,z11\.h,z15\.h ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z16\.h,z20\.h,z24\.h,z28\.h ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z17\.h,z21\.h,z25\.h,z29\.h ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z18\.h,z22\.h,z26\.h,z30\.h ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z19\.h,z23\.h,z27\.h,z31\.h ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn15,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn8,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn8,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn8,\[x0,#-32,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn8,\[x0,#28,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z2\.h,z6\.h,z10\.h,z14\.h ?},pn14,\[x29,#8,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.h ?- ?z1\.h ?},pn8,\[x0,x1,lsl 1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.h ?- ?z1\.h ?},pn8,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?Z0\.H ?- ?Z1\.H ?},PN8,\[X0,X1,LSL ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z30\.h ?- ?z31\.h ?},pn8,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.h ?- ?z1\.h ?},pn15,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.h ?- ?z1\.h ?},pn8,\[x30,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.h ?- ?z1\.h ?},pn8,\[sp,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.h ?- ?z1\.h ?},pn8,\[x0,x30,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.h ?- ?z1\.h ?},pn8,\[x0,xzr,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z14\.h ?- ?z15\.h ?},pn9,\[x26,x3,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.h ?- ?z3\.h ?},pn8,\[x0,x1,lsl 1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.h ?- ?z3\.h ?},pn8,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?Z0\.H ?- ?Z3\.H ?},PN8,\[X0,X1,LSL ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z28\.h ?- ?z31\.h ?},pn8,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.h ?- ?z3\.h ?},pn15,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.h ?- ?z3\.h ?},pn8,\[x30,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.h ?- ?z3\.h ?},pn8,\[sp,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.h ?- ?z3\.h ?},pn8,\[x0,x30,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.h ?- ?z3\.h ?},pn8,\[x0,xzr,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z8\.h ?- ?z11\.h ?},pn11,\[x27,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.h,z8\.h ?},pn8,\[x0,x1,lsl 1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.h,z8\.h ?},pn8,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?Z0\.H,Z8\.H ?},PN8,\[X0,X1,LSL ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z1\.h,z9\.h ?},pn8,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z2\.h,z10\.h ?},pn8,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z3\.h,z11\.h ?},pn8,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z4\.h,z12\.h ?},pn8,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z5\.h,z13\.h ?},pn8,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z6\.h,z14\.h ?},pn8,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z7\.h,z15\.h ?},pn8,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z16\.h,z24\.h ?},pn8,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z17\.h,z25\.h ?},pn8,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z18\.h,z26\.h ?},pn8,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z19\.h,z27\.h ?},pn8,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z20\.h,z28\.h ?},pn8,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z21\.h,z29\.h ?},pn8,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z22\.h,z30\.h ?},pn8,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z23\.h,z31\.h ?},pn8,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.h,z8\.h ?},pn15,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.h,z8\.h ?},pn8,\[x30,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.h,z8\.h ?},pn8,\[sp,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.h,z8\.h ?},pn8,\[x0,x30,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.h,z8\.h ?},pn8,\[x0,xzr,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z5\.h,z13\.h ?},pn14,\[x15,x24,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn8,\[x0,x1,lsl 1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn8,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?Z0\.H,Z4\.H,Z8\.H,Z12\.H ?},PN8,\[X0,X1,LSL ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z1\.h,z5\.h,z9\.h,z13\.h ?},pn8,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z2\.h,z6\.h,z10\.h,z14\.h ?},pn8,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z3\.h,z7\.h,z11\.h,z15\.h ?},pn8,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z16\.h,z20\.h,z24\.h,z28\.h ?},pn8,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z17\.h,z21\.h,z25\.h,z29\.h ?},pn8,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z18\.h,z22\.h,z26\.h,z30\.h ?},pn8,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z19\.h,z23\.h,z27\.h,z31\.h ?},pn8,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn15,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn8,\[x30,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn8,\[sp,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn8,\[x0,x30,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn8,\[x0,xzr,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z17\.h,z21\.h,z25\.h,z29\.h ?},pn11,\[x4,x6,lsl ?#1\]'
diff --git a/gas/testsuite/gas/aarch64/sme2-5-invalid.l b/gas/testsuite/gas/aarch64/sme2-5-invalid.l
index c2a6dbc..51bb6c0 100644
--- a/gas/testsuite/gas/aarch64/sme2-5-invalid.l
+++ b/gas/testsuite/gas/aarch64/sme2-5-invalid.l
@@ -1,75 +1,75 @@
 [^ :]+: Assembler messages:
 [^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `ld1w 0,pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: expected an SVE predicate register at operand 2 -- `ld1w {z0\.s-z1\.s},0,\[x0\]'
-[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1w {z0\.s-z1\.s},pn8/z,0'
-[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 1 -- `ld1w {z0\.s-z2\.s},pn8/z,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1w {z1\.s-z2\.s},pn8/z,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ld1w {z0\.s-z1\.s},p8/z,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: operand mismatch -- `ld1w {z0\.s-z1\.s},pn8,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: expected an SVE predicate register at operand 2 -- `ld1w { ?z0\.s ?- ?z1\.s ?},0,\[x0\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1w { ?z0\.s ?- ?z1\.s ?},pn8/z,0'
+[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 1 -- `ld1w { ?z0\.s ?- ?z2\.s ?},pn8/z,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1w { ?z1\.s ?- ?z2\.s ?},pn8/z,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ld1w { ?z0\.s ?- ?z1\.s ?},p8/z,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `ld1w { ?z0\.s ?- ?z1\.s ?},pn8,\[x0,x1,lsl ?#2\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	ld1w {z0\.s-z1\.s}, pn8/z, \[x0, x1, lsl #2\]
-[^ :]+:[0-9]+: Error: operand mismatch -- `ld1w {z0\.s-z1\.s},pn8/m,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `ld1w { ?z0\.s ?- ?z1\.s ?},pn8/m,\[x0,x1,lsl ?#2\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	ld1w {z0\.s-z1\.s}, pn8/z, \[x0, x1, lsl #2\]
-[^ :]+:[0-9]+: Error: operand mismatch -- `ld1w {z0\.s-z1\.s},pn8\.s,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `ld1w { ?z0\.s ?- ?z1\.s ?},pn8\.s,\[x0,x1,lsl ?#2\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	ld1w {z0\.s-z1\.s}, pn8/z, \[x0, x1, lsl #2\]
-[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `ld1w {z0\.s-z1\.s},pn0/z,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `ld1w {z0\.s-z1\.s},pn7/z,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: expected a 64-bit base register at operand 3 -- `ld1w {z0\.s-z1\.s},pn8/z,\[w0,w1,lsl#2\]'
-[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ld1w {z0\.s-z1\.s},pn8/z,\[xzr,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ld1w {z0\.s-z1\.s},pn8/z,\[sp,sp,lsl#2\]'
-[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1w {z0\.s-z1\.s},pn8/z,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1w {z0\.s-z1\.s},pn8/z,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1w {z0\.s-z1\.s},pn8/z,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1w {z0\.s-z1\.s},pn8/z,\[x0,x1,lsl#4\]'
-[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1w {z0\.s-z1\.s},pn8/z,\[x0,w1,sxtw#2\]'
-[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1w {z0\.s-z1\.s},pn8/z,\[x0,w1,uxtw#2\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1w {z1\.s-z4\.s},pn8/z,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1w {z2\.s-z5\.s},pn8/z,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1w {z3\.s-z6\.s},pn8/z,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ld1w {z0\.s-z3\.s},p8/z,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: operand mismatch -- `ld1w {z0\.s-z3\.s},pn8,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `ld1w { ?z0\.s ?- ?z1\.s ?},pn0/z,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `ld1w { ?z0\.s ?- ?z1\.s ?},pn7/z,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: expected a 64-bit base register at operand 3 -- `ld1w { ?z0\.s ?- ?z1\.s ?},pn8/z,\[w0,w1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ld1w { ?z0\.s ?- ?z1\.s ?},pn8/z,\[xzr,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ld1w { ?z0\.s ?- ?z1\.s ?},pn8/z,\[sp,sp,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1w { ?z0\.s ?- ?z1\.s ?},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1w { ?z0\.s ?- ?z1\.s ?},pn8/z,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1w { ?z0\.s ?- ?z1\.s ?},pn8/z,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1w { ?z0\.s ?- ?z1\.s ?},pn8/z,\[x0,x1,lsl ?#4\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1w { ?z0\.s ?- ?z1\.s ?},pn8/z,\[x0,w1,sxtw ?#2\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1w { ?z0\.s ?- ?z1\.s ?},pn8/z,\[x0,w1,uxtw ?#2\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1w { ?z1\.s ?- ?z4\.s ?},pn8/z,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1w { ?z2\.s ?- ?z5\.s ?},pn8/z,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1w { ?z3\.s ?- ?z6\.s ?},pn8/z,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ld1w { ?z0\.s ?- ?z3\.s ?},p8/z,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `ld1w { ?z0\.s ?- ?z3\.s ?},pn8,\[x0,x1,lsl ?#2\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	ld1w {z0\.s-z3\.s}, pn8/z, \[x0, x1, lsl #2\]
-[^ :]+:[0-9]+: Error: operand mismatch -- `ld1w {z0\.s-z3\.s},pn8/m,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `ld1w { ?z0\.s ?- ?z3\.s ?},pn8/m,\[x0,x1,lsl ?#2\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	ld1w {z0\.s-z3\.s}, pn8/z, \[x0, x1, lsl #2\]
-[^ :]+:[0-9]+: Error: operand mismatch -- `ld1w {z0\.s-z3\.s},pn8\.s,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `ld1w { ?z0\.s ?- ?z3\.s ?},pn8\.s,\[x0,x1,lsl ?#2\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	ld1w {z0\.s-z3\.s}, pn8/z, \[x0, x1, lsl #2\]
-[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `ld1w {z0\.s-z3\.s},pn0/z,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `ld1w {z0\.s-z3\.s},pn7/z,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: expected a 64-bit base register at operand 3 -- `ld1w {z0\.s-z3\.s},pn8/z,\[w0,w1,lsl#2\]'
-[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ld1w {z0\.s-z3\.s},pn8/z,\[xzr,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ld1w {z0\.s-z3\.s},pn8/z,\[sp,sp,lsl#2\]'
-[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1w {z0\.s-z3\.s},pn8/z,\[x0,x1\]'
-[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1w {z0\.s-z3\.s},pn8/z,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1w {z0\.s-z3\.s},pn8/z,\[x0,x1,lsl#3\]'
-[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1w {z0\.s-z3\.s},pn8/z,\[x0,x1,lsl#4\]'
-[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1w {z0\.s-z3\.s},pn8/z,\[x0,w1,sxtw#2\]'
-[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1w {z0\.s-z3\.s},pn8/z,\[x0,w1,uxtw#2\]'
-[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1w {z0\.s,z2\.s},pn8/z,\[x0,x1,lsl#2\]`
-[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1w {z0\.s,z3\.s},pn8/z,\[x0,x1,lsl#2\]`
-[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1w {z0\.s,z4\.s},pn8/z,\[x0,x1,lsl#2\]`
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1w {z8\.s,z16\.s},pn8/z,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1w {z24\.s,z0\.s},pn8/z,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1w {z8\.s,z0\.s},pn8/z,\[x0,x1,lsl#2\]`
-[^ :]+:[0-9]+: Error: operand mismatch -- `ld1w {z0\.h,z8\.h},pn8/z,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `ld1w { ?z0\.s ?- ?z3\.s ?},pn0/z,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `ld1w { ?z0\.s ?- ?z3\.s ?},pn7/z,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: expected a 64-bit base register at operand 3 -- `ld1w { ?z0\.s ?- ?z3\.s ?},pn8/z,\[w0,w1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ld1w { ?z0\.s ?- ?z3\.s ?},pn8/z,\[xzr,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ld1w { ?z0\.s ?- ?z3\.s ?},pn8/z,\[sp,sp,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1w { ?z0\.s ?- ?z3\.s ?},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1w { ?z0\.s ?- ?z3\.s ?},pn8/z,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1w { ?z0\.s ?- ?z3\.s ?},pn8/z,\[x0,x1,lsl ?#3\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1w { ?z0\.s ?- ?z3\.s ?},pn8/z,\[x0,x1,lsl ?#4\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1w { ?z0\.s ?- ?z3\.s ?},pn8/z,\[x0,w1,sxtw ?#2\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1w { ?z0\.s ?- ?z3\.s ?},pn8/z,\[x0,w1,uxtw ?#2\]'
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1w { ?z0\.s,z2\.s ?},pn8/z,\[x0,x1,lsl ?#2\]`
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1w { ?z0\.s,z3\.s ?},pn8/z,\[x0,x1,lsl ?#2\]`
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1w { ?z0\.s,z4\.s ?},pn8/z,\[x0,x1,lsl ?#2\]`
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1w { ?z8\.s,z16\.s ?},pn8/z,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1w { ?z24\.s,z0\.s ?},pn8/z,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1w { ?z8\.s,z0\.s ?},pn8/z,\[x0,x1,lsl ?#2\]`
+[^ :]+:[0-9]+: Error: operand mismatch -- `ld1w { ?z0\.h,z8\.h ?},pn8/z,\[x0,x1,lsl ?#2\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	ld1w {z0\.s, z8\.s}, pn8/z, \[x0, x1, lsl #2\]
-[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ld1w {z0\.s,z8\.s},p8/z,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: expected a 64-bit base register at operand 3 -- `ld1w {z0\.s,z8\.s},pn8/z,\[w0,w30,lsl#2\]'
-[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ld1w {z0\.s,z8\.s},pn8/z,\[xzr,xzr,lsl#2\]'
-[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ld1w {z0\.s,z8\.s},pn8/z,\[x0,sp,lsl#2\]'
-[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1w {z0\.s,z8\.s},pn8/z,\[x0,x1,lsl#1\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1w {z4\.s,z8\.s,z12\.s,z16\.s},pn8/z,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1w {z20\.s,z24\.s,z28\.s,z0\.s},pn8/z,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: operand mismatch -- `ld1w {z0\.h,z4\.h,z8\.h,z12\.h},pn8/z,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ld1w { ?z0\.s,z8\.s ?},p8/z,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: expected a 64-bit base register at operand 3 -- `ld1w { ?z0\.s,z8\.s ?},pn8/z,\[w0,w30,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ld1w { ?z0\.s,z8\.s ?},pn8/z,\[xzr,xzr,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ld1w { ?z0\.s,z8\.s ?},pn8/z,\[x0,sp,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1w { ?z0\.s,z8\.s ?},pn8/z,\[x0,x1,lsl ?#1\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1w { ?z4\.s,z8\.s,z12\.s,z16\.s ?},pn8/z,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1w { ?z20\.s,z24\.s,z28\.s,z0\.s ?},pn8/z,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `ld1w { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn8/z,\[x0,x1,lsl ?#2\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	ld1w {z0\.s, z4\.s, z8\.s, z12\.s}, pn8/z, \[x0, x1, lsl #2\]
-[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ld1w {z0\.s,z4\.s,z8\.s,z12\.s},p8/z,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: expected a 64-bit base register at operand 3 -- `ld1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8/z,\[w0,w30,lsl#2\]'
-[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ld1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8/z,\[xzr,xzr,lsl#2\]'
-[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ld1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8/z,\[x0,sp,lsl#2\]'
-[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8/z,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ld1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},p8/z,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: expected a 64-bit base register at operand 3 -- `ld1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn8/z,\[w0,w30,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ld1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn8/z,\[xzr,xzr,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ld1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn8/z,\[x0,sp,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn8/z,\[x0,x1,lsl ?#1\]'
diff --git a/gas/testsuite/gas/aarch64/sme2-5-noarch.l b/gas/testsuite/gas/aarch64/sme2-5-noarch.l
index 6eebd64..badd777 100644
--- a/gas/testsuite/gas/aarch64/sme2-5-noarch.l
+++ b/gas/testsuite/gas/aarch64/sme2-5-noarch.l
@@ -1,481 +1,481 @@
 [^ :]+: Assembler messages:
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s-z1\.s},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s-z1\.s},pn8/z,\[x0,#0,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {Z0\.S-Z1\.S},PN8/Z,\[X0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z30\.s-z31\.s},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s-z1\.s},pn15/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s-z1\.s},pn8/z,\[x30\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s-z1\.s},pn8/z,\[sp\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s-z1\.s},pn8/z,\[x0,#-16,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s-z1\.s},pn8/z,\[x0,#14,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z12\.s-z13\.s},pn13/z,\[x11,#-10,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s-z3\.s},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s-z3\.s},pn8/z,\[x0,#0,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {Z0\.S-Z3\.S},PN8/Z,\[X0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z28\.s-z31\.s},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s-z3\.s},pn15/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s-z3\.s},pn8/z,\[x30\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s-z3\.s},pn8/z,\[sp\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s-z3\.s},pn8/z,\[x0,#-32,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s-z3\.s},pn8/z,\[x0,#28,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z8\.s-z11\.s},pn11/z,\[x17,#20,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s,z8\.s},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s,z8\.s},pn8/z,\[x0,#0,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {Z0\.S,Z8\.S},PN8/Z,\[X0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z1\.s,z9\.s},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z2\.s,z10\.s},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z3\.s,z11\.s},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z4\.s,z12\.s},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z5\.s,z13\.s},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z6\.s,z14\.s},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z7\.s,z15\.s},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z16\.s,z24\.s},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z17\.s,z25\.s},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z18\.s,z26\.s},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z19\.s,z27\.s},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z20\.s,z28\.s},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z21\.s,z29\.s},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z22\.s,z30\.s},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z23\.s,z31\.s},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s,z8\.s},pn15/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s,z8\.s},pn8/z,\[x30\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s,z8\.s},pn8/z,\[sp\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s,z8\.s},pn8/z,\[x0,#-16,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s,z8\.s},pn8/z,\[x0,#14,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z3\.s,z11\.s},pn10/z,\[x22,#6,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8/z,\[x0,#0,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {Z0\.S,Z4\.S,Z8\.S,Z12\.S},PN8/Z,\[X0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z1\.s,z5\.s,z9\.s,z13\.s},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z2\.s,z6\.s,z10\.s,z14\.s},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z3\.s,z7\.s,z11\.s,z15\.s},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z16\.s,z20\.s,z24\.s,z28\.s},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z17\.s,z21\.s,z25\.s,z29\.s},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z18\.s,z22\.s,z26\.s,z30\.s},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z19\.s,z23\.s,z27\.s,z31\.s},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s,z4\.s,z8\.s,z12\.s},pn15/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8/z,\[x30\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8/z,\[sp\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8/z,\[x0,#-32,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8/z,\[x0,#28,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z2\.s,z6\.s,z10\.s,z14\.s},pn14/z,\[x29,#8,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s-z1\.s},pn8/z,\[x0,x1,lsl 2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s-z1\.s},pn8/z,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {Z0\.S-Z1\.S},PN8/Z,\[X0,X1,LSL#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z30\.s-z31\.s},pn8/z,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s-z1\.s},pn15/z,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s-z1\.s},pn8/z,\[x30,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s-z1\.s},pn8/z,\[sp,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s-z1\.s},pn8/z,\[x0,x30,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s-z1\.s},pn8/z,\[x0,xzr,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z14\.s-z15\.s},pn9/z,\[x26,x3,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s-z3\.s},pn8/z,\[x0,x1,lsl 2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s-z3\.s},pn8/z,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {Z0\.S-Z3\.S},PN8/Z,\[X0,X1,LSL#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z28\.s-z31\.s},pn8/z,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s-z3\.s},pn15/z,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s-z3\.s},pn8/z,\[x30,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s-z3\.s},pn8/z,\[sp,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s-z3\.s},pn8/z,\[x0,x30,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s-z3\.s},pn8/z,\[x0,xzr,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z8\.s-z11\.s},pn11/z,\[x27,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s,z8\.s},pn8/z,\[x0,x1,lsl 2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s,z8\.s},pn8/z,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {Z0\.S,Z8\.S},PN8/Z,\[X0,X1,LSL#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z1\.s,z9\.s},pn8/z,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z2\.s,z10\.s},pn8/z,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z3\.s,z11\.s},pn8/z,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z4\.s,z12\.s},pn8/z,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z5\.s,z13\.s},pn8/z,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z6\.s,z14\.s},pn8/z,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z7\.s,z15\.s},pn8/z,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z16\.s,z24\.s},pn8/z,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z17\.s,z25\.s},pn8/z,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z18\.s,z26\.s},pn8/z,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z19\.s,z27\.s},pn8/z,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z20\.s,z28\.s},pn8/z,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z21\.s,z29\.s},pn8/z,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z22\.s,z30\.s},pn8/z,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z23\.s,z31\.s},pn8/z,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s,z8\.s},pn15/z,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s,z8\.s},pn8/z,\[x30,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s,z8\.s},pn8/z,\[sp,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s,z8\.s},pn8/z,\[x0,x30,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s,z8\.s},pn8/z,\[x0,xzr,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z5\.s,z13\.s},pn14/z,\[x15,x24,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8/z,\[x0,x1,lsl 2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8/z,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {Z0\.S,Z4\.S,Z8\.S,Z12\.S},PN8/Z,\[X0,X1,LSL#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z1\.s,z5\.s,z9\.s,z13\.s},pn8/z,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z2\.s,z6\.s,z10\.s,z14\.s},pn8/z,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z3\.s,z7\.s,z11\.s,z15\.s},pn8/z,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z16\.s,z20\.s,z24\.s,z28\.s},pn8/z,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z17\.s,z21\.s,z25\.s,z29\.s},pn8/z,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z18\.s,z22\.s,z26\.s,z30\.s},pn8/z,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z19\.s,z23\.s,z27\.s,z31\.s},pn8/z,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s,z4\.s,z8\.s,z12\.s},pn15/z,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8/z,\[x30,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8/z,\[sp,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8/z,\[x0,x30,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8/z,\[x0,xzr,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z17\.s,z21\.s,z25\.s,z29\.s},pn11/z,\[x4,x6,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s-z1\.s},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s-z1\.s},pn8/z,\[x0,#0,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {Z0\.S-Z1\.S},PN8/Z,\[X0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z30\.s-z31\.s},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s-z1\.s},pn15/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s-z1\.s},pn8/z,\[x30\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s-z1\.s},pn8/z,\[sp\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s-z1\.s},pn8/z,\[x0,#-16,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s-z1\.s},pn8/z,\[x0,#14,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z12\.s-z13\.s},pn13/z,\[x11,#-10,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s-z3\.s},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s-z3\.s},pn8/z,\[x0,#0,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {Z0\.S-Z3\.S},PN8/Z,\[X0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z28\.s-z31\.s},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s-z3\.s},pn15/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s-z3\.s},pn8/z,\[x30\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s-z3\.s},pn8/z,\[sp\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s-z3\.s},pn8/z,\[x0,#-32,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s-z3\.s},pn8/z,\[x0,#28,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z8\.s-z11\.s},pn11/z,\[x17,#20,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s,z8\.s},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s,z8\.s},pn8/z,\[x0,#0,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {Z0\.S,Z8\.S},PN8/Z,\[X0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z1\.s,z9\.s},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z2\.s,z10\.s},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z3\.s,z11\.s},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z4\.s,z12\.s},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z5\.s,z13\.s},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z6\.s,z14\.s},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z7\.s,z15\.s},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z16\.s,z24\.s},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z17\.s,z25\.s},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z18\.s,z26\.s},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z19\.s,z27\.s},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z20\.s,z28\.s},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z21\.s,z29\.s},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z22\.s,z30\.s},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z23\.s,z31\.s},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s,z8\.s},pn15/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s,z8\.s},pn8/z,\[x30\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s,z8\.s},pn8/z,\[sp\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s,z8\.s},pn8/z,\[x0,#-16,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s,z8\.s},pn8/z,\[x0,#14,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z3\.s,z11\.s},pn10/z,\[x22,#6,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8/z,\[x0,#0,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {Z0\.S,Z4\.S,Z8\.S,Z12\.S},PN8/Z,\[X0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z1\.s,z5\.s,z9\.s,z13\.s},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z2\.s,z6\.s,z10\.s,z14\.s},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z3\.s,z7\.s,z11\.s,z15\.s},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z16\.s,z20\.s,z24\.s,z28\.s},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z17\.s,z21\.s,z25\.s,z29\.s},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z18\.s,z22\.s,z26\.s,z30\.s},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z19\.s,z23\.s,z27\.s,z31\.s},pn8/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s,z4\.s,z8\.s,z12\.s},pn15/z,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8/z,\[x30\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8/z,\[sp\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8/z,\[x0,#-32,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8/z,\[x0,#28,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z2\.s,z6\.s,z10\.s,z14\.s},pn14/z,\[x29,#8,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s-z1\.s},pn8/z,\[x0,x1,lsl 2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s-z1\.s},pn8/z,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {Z0\.S-Z1\.S},PN8/Z,\[X0,X1,LSL#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z30\.s-z31\.s},pn8/z,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s-z1\.s},pn15/z,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s-z1\.s},pn8/z,\[x30,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s-z1\.s},pn8/z,\[sp,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s-z1\.s},pn8/z,\[x0,x30,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s-z1\.s},pn8/z,\[x0,xzr,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z14\.s-z15\.s},pn9/z,\[x26,x3,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s-z3\.s},pn8/z,\[x0,x1,lsl 2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s-z3\.s},pn8/z,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {Z0\.S-Z3\.S},PN8/Z,\[X0,X1,LSL#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z28\.s-z31\.s},pn8/z,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s-z3\.s},pn15/z,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s-z3\.s},pn8/z,\[x30,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s-z3\.s},pn8/z,\[sp,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s-z3\.s},pn8/z,\[x0,x30,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s-z3\.s},pn8/z,\[x0,xzr,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z8\.s-z11\.s},pn11/z,\[x27,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s,z8\.s},pn8/z,\[x0,x1,lsl 2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s,z8\.s},pn8/z,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {Z0\.S,Z8\.S},PN8/Z,\[X0,X1,LSL#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z1\.s,z9\.s},pn8/z,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z2\.s,z10\.s},pn8/z,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z3\.s,z11\.s},pn8/z,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z4\.s,z12\.s},pn8/z,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z5\.s,z13\.s},pn8/z,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z6\.s,z14\.s},pn8/z,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z7\.s,z15\.s},pn8/z,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z16\.s,z24\.s},pn8/z,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z17\.s,z25\.s},pn8/z,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z18\.s,z26\.s},pn8/z,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z19\.s,z27\.s},pn8/z,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z20\.s,z28\.s},pn8/z,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z21\.s,z29\.s},pn8/z,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z22\.s,z30\.s},pn8/z,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z23\.s,z31\.s},pn8/z,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s,z8\.s},pn15/z,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s,z8\.s},pn8/z,\[x30,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s,z8\.s},pn8/z,\[sp,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s,z8\.s},pn8/z,\[x0,x30,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s,z8\.s},pn8/z,\[x0,xzr,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z5\.s,z13\.s},pn14/z,\[x15,x24,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8/z,\[x0,x1,lsl 2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8/z,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {Z0\.S,Z4\.S,Z8\.S,Z12\.S},PN8/Z,\[X0,X1,LSL#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z1\.s,z5\.s,z9\.s,z13\.s},pn8/z,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z2\.s,z6\.s,z10\.s,z14\.s},pn8/z,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z3\.s,z7\.s,z11\.s,z15\.s},pn8/z,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z16\.s,z20\.s,z24\.s,z28\.s},pn8/z,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z17\.s,z21\.s,z25\.s,z29\.s},pn8/z,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z18\.s,z22\.s,z26\.s,z30\.s},pn8/z,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z19\.s,z23\.s,z27\.s,z31\.s},pn8/z,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s,z4\.s,z8\.s,z12\.s},pn15/z,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8/z,\[x30,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8/z,\[sp,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8/z,\[x0,x30,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8/z,\[x0,xzr,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z17\.s,z21\.s,z25\.s,z29\.s},pn11/z,\[x4,x6,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s-z1\.s},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s-z1\.s},pn8,\[x0,#0,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {Z0\.S-Z1\.S},PN8,\[X0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z30\.s-z31\.s},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s-z1\.s},pn15,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s-z1\.s},pn8,\[x30\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s-z1\.s},pn8,\[sp\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s-z1\.s},pn8,\[x0,#-16,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s-z1\.s},pn8,\[x0,#14,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z12\.s-z13\.s},pn13,\[x11,#-10,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s-z3\.s},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s-z3\.s},pn8,\[x0,#0,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {Z0\.S-Z3\.S},PN8,\[X0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z28\.s-z31\.s},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s-z3\.s},pn15,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s-z3\.s},pn8,\[x30\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s-z3\.s},pn8,\[sp\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s-z3\.s},pn8,\[x0,#-32,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s-z3\.s},pn8,\[x0,#28,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z8\.s-z11\.s},pn11,\[x17,#20,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s,z8\.s},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s,z8\.s},pn8,\[x0,#0,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {Z0\.S,Z8\.S},PN8,\[X0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z1\.s,z9\.s},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z2\.s,z10\.s},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z3\.s,z11\.s},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z4\.s,z12\.s},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z5\.s,z13\.s},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z6\.s,z14\.s},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z7\.s,z15\.s},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z16\.s,z24\.s},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z17\.s,z25\.s},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z18\.s,z26\.s},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z19\.s,z27\.s},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z20\.s,z28\.s},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z21\.s,z29\.s},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z22\.s,z30\.s},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z23\.s,z31\.s},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s,z8\.s},pn15,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s,z8\.s},pn8,\[x30\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s,z8\.s},pn8,\[sp\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s,z8\.s},pn8,\[x0,#-16,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s,z8\.s},pn8,\[x0,#14,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z3\.s,z11\.s},pn10,\[x22,#6,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8,\[x0,#0,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {Z0\.S,Z4\.S,Z8\.S,Z12\.S},PN8,\[X0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z1\.s,z5\.s,z9\.s,z13\.s},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z2\.s,z6\.s,z10\.s,z14\.s},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z3\.s,z7\.s,z11\.s,z15\.s},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z16\.s,z20\.s,z24\.s,z28\.s},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z17\.s,z21\.s,z25\.s,z29\.s},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z18\.s,z22\.s,z26\.s,z30\.s},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z19\.s,z23\.s,z27\.s,z31\.s},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s,z4\.s,z8\.s,z12\.s},pn15,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8,\[x30\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8,\[sp\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8,\[x0,#-32,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8,\[x0,#28,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z2\.s,z6\.s,z10\.s,z14\.s},pn14,\[x29,#8,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s-z1\.s},pn8,\[x0,x1,lsl 2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s-z1\.s},pn8,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {Z0\.S-Z1\.S},PN8,\[X0,X1,LSL#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z30\.s-z31\.s},pn8,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s-z1\.s},pn15,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s-z1\.s},pn8,\[x30,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s-z1\.s},pn8,\[sp,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s-z1\.s},pn8,\[x0,x30,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s-z1\.s},pn8,\[x0,xzr,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z14\.s-z15\.s},pn9,\[x26,x3,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s-z3\.s},pn8,\[x0,x1,lsl 2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s-z3\.s},pn8,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {Z0\.S-Z3\.S},PN8,\[X0,X1,LSL#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z28\.s-z31\.s},pn8,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s-z3\.s},pn15,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s-z3\.s},pn8,\[x30,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s-z3\.s},pn8,\[sp,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s-z3\.s},pn8,\[x0,x30,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s-z3\.s},pn8,\[x0,xzr,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z8\.s-z11\.s},pn11,\[x27,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s,z8\.s},pn8,\[x0,x1,lsl 2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s,z8\.s},pn8,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {Z0\.S,Z8\.S},PN8,\[X0,X1,LSL#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z1\.s,z9\.s},pn8,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z2\.s,z10\.s},pn8,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z3\.s,z11\.s},pn8,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z4\.s,z12\.s},pn8,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z5\.s,z13\.s},pn8,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z6\.s,z14\.s},pn8,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z7\.s,z15\.s},pn8,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z16\.s,z24\.s},pn8,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z17\.s,z25\.s},pn8,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z18\.s,z26\.s},pn8,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z19\.s,z27\.s},pn8,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z20\.s,z28\.s},pn8,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z21\.s,z29\.s},pn8,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z22\.s,z30\.s},pn8,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z23\.s,z31\.s},pn8,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s,z8\.s},pn15,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s,z8\.s},pn8,\[x30,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s,z8\.s},pn8,\[sp,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s,z8\.s},pn8,\[x0,x30,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s,z8\.s},pn8,\[x0,xzr,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z5\.s,z13\.s},pn14,\[x15,x24,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8,\[x0,x1,lsl 2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {Z0\.S,Z4\.S,Z8\.S,Z12\.S},PN8,\[X0,X1,LSL#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z1\.s,z5\.s,z9\.s,z13\.s},pn8,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z2\.s,z6\.s,z10\.s,z14\.s},pn8,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z3\.s,z7\.s,z11\.s,z15\.s},pn8,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z16\.s,z20\.s,z24\.s,z28\.s},pn8,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z17\.s,z21\.s,z25\.s,z29\.s},pn8,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z18\.s,z22\.s,z26\.s,z30\.s},pn8,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z19\.s,z23\.s,z27\.s,z31\.s},pn8,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s,z4\.s,z8\.s,z12\.s},pn15,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8,\[x30,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8,\[sp,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8,\[x0,x30,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8,\[x0,xzr,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z17\.s,z21\.s,z25\.s,z29\.s},pn11,\[x4,x6,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s-z1\.s},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s-z1\.s},pn8,\[x0,#0,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {Z0\.S-Z1\.S},PN8,\[X0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z30\.s-z31\.s},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s-z1\.s},pn15,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s-z1\.s},pn8,\[x30\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s-z1\.s},pn8,\[sp\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s-z1\.s},pn8,\[x0,#-16,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s-z1\.s},pn8,\[x0,#14,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z12\.s-z13\.s},pn13,\[x11,#-10,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s-z3\.s},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s-z3\.s},pn8,\[x0,#0,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {Z0\.S-Z3\.S},PN8,\[X0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z28\.s-z31\.s},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s-z3\.s},pn15,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s-z3\.s},pn8,\[x30\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s-z3\.s},pn8,\[sp\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s-z3\.s},pn8,\[x0,#-32,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s-z3\.s},pn8,\[x0,#28,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z8\.s-z11\.s},pn11,\[x17,#20,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s,z8\.s},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s,z8\.s},pn8,\[x0,#0,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {Z0\.S,Z8\.S},PN8,\[X0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z1\.s,z9\.s},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z2\.s,z10\.s},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z3\.s,z11\.s},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z4\.s,z12\.s},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z5\.s,z13\.s},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z6\.s,z14\.s},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z7\.s,z15\.s},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z16\.s,z24\.s},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z17\.s,z25\.s},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z18\.s,z26\.s},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z19\.s,z27\.s},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z20\.s,z28\.s},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z21\.s,z29\.s},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z22\.s,z30\.s},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z23\.s,z31\.s},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s,z8\.s},pn15,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s,z8\.s},pn8,\[x30\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s,z8\.s},pn8,\[sp\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s,z8\.s},pn8,\[x0,#-16,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s,z8\.s},pn8,\[x0,#14,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z3\.s,z11\.s},pn10,\[x22,#6,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8,\[x0,#0,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {Z0\.S,Z4\.S,Z8\.S,Z12\.S},PN8,\[X0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z1\.s,z5\.s,z9\.s,z13\.s},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z2\.s,z6\.s,z10\.s,z14\.s},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z3\.s,z7\.s,z11\.s,z15\.s},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z16\.s,z20\.s,z24\.s,z28\.s},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z17\.s,z21\.s,z25\.s,z29\.s},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z18\.s,z22\.s,z26\.s,z30\.s},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z19\.s,z23\.s,z27\.s,z31\.s},pn8,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s,z4\.s,z8\.s,z12\.s},pn15,\[x0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8,\[x30\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8,\[sp\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8,\[x0,#-32,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8,\[x0,#28,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z2\.s,z6\.s,z10\.s,z14\.s},pn14,\[x29,#8,mul vl\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s-z1\.s},pn8,\[x0,x1,lsl 2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s-z1\.s},pn8,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {Z0\.S-Z1\.S},PN8,\[X0,X1,LSL#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z30\.s-z31\.s},pn8,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s-z1\.s},pn15,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s-z1\.s},pn8,\[x30,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s-z1\.s},pn8,\[sp,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s-z1\.s},pn8,\[x0,x30,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s-z1\.s},pn8,\[x0,xzr,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z14\.s-z15\.s},pn9,\[x26,x3,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s-z3\.s},pn8,\[x0,x1,lsl 2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s-z3\.s},pn8,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {Z0\.S-Z3\.S},PN8,\[X0,X1,LSL#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z28\.s-z31\.s},pn8,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s-z3\.s},pn15,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s-z3\.s},pn8,\[x30,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s-z3\.s},pn8,\[sp,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s-z3\.s},pn8,\[x0,x30,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s-z3\.s},pn8,\[x0,xzr,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z8\.s-z11\.s},pn11,\[x27,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s,z8\.s},pn8,\[x0,x1,lsl 2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s,z8\.s},pn8,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {Z0\.S,Z8\.S},PN8,\[X0,X1,LSL#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z1\.s,z9\.s},pn8,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z2\.s,z10\.s},pn8,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z3\.s,z11\.s},pn8,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z4\.s,z12\.s},pn8,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z5\.s,z13\.s},pn8,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z6\.s,z14\.s},pn8,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z7\.s,z15\.s},pn8,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z16\.s,z24\.s},pn8,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z17\.s,z25\.s},pn8,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z18\.s,z26\.s},pn8,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z19\.s,z27\.s},pn8,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z20\.s,z28\.s},pn8,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z21\.s,z29\.s},pn8,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z22\.s,z30\.s},pn8,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z23\.s,z31\.s},pn8,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s,z8\.s},pn15,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s,z8\.s},pn8,\[x30,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s,z8\.s},pn8,\[sp,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s,z8\.s},pn8,\[x0,x30,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s,z8\.s},pn8,\[x0,xzr,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z5\.s,z13\.s},pn14,\[x15,x24,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8,\[x0,x1,lsl 2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {Z0\.S,Z4\.S,Z8\.S,Z12\.S},PN8,\[X0,X1,LSL#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z1\.s,z5\.s,z9\.s,z13\.s},pn8,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z2\.s,z6\.s,z10\.s,z14\.s},pn8,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z3\.s,z7\.s,z11\.s,z15\.s},pn8,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z16\.s,z20\.s,z24\.s,z28\.s},pn8,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z17\.s,z21\.s,z25\.s,z29\.s},pn8,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z18\.s,z22\.s,z26\.s,z30\.s},pn8,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z19\.s,z23\.s,z27\.s,z31\.s},pn8,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s,z4\.s,z8\.s,z12\.s},pn15,\[x0,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8,\[x30,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8,\[sp,x1,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8,\[x0,x30,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8,\[x0,xzr,lsl#2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z17\.s,z21\.s,z25\.s,z29\.s},pn11,\[x4,x6,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z0\.s ?- ?z1\.s ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z0\.s ?- ?z1\.s ?},pn8/z,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?Z0\.S ?- ?Z1\.S ?},PN8/Z,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z30\.s ?- ?z31\.s ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z0\.s ?- ?z1\.s ?},pn15/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z0\.s ?- ?z1\.s ?},pn8/z,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z0\.s ?- ?z1\.s ?},pn8/z,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z0\.s ?- ?z1\.s ?},pn8/z,\[x0,#-16,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z0\.s ?- ?z1\.s ?},pn8/z,\[x0,#14,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z12\.s ?- ?z13\.s ?},pn13/z,\[x11,#-10,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z0\.s ?- ?z3\.s ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z0\.s ?- ?z3\.s ?},pn8/z,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?Z0\.S ?- ?Z3\.S ?},PN8/Z,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z28\.s ?- ?z31\.s ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z0\.s ?- ?z3\.s ?},pn15/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z0\.s ?- ?z3\.s ?},pn8/z,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z0\.s ?- ?z3\.s ?},pn8/z,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z0\.s ?- ?z3\.s ?},pn8/z,\[x0,#-32,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z0\.s ?- ?z3\.s ?},pn8/z,\[x0,#28,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z8\.s ?- ?z11\.s ?},pn11/z,\[x17,#20,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z0\.s,z8\.s ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z0\.s,z8\.s ?},pn8/z,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?Z0\.S,Z8\.S ?},PN8/Z,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z1\.s,z9\.s ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z2\.s,z10\.s ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z3\.s,z11\.s ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z4\.s,z12\.s ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z5\.s,z13\.s ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z6\.s,z14\.s ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z7\.s,z15\.s ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z16\.s,z24\.s ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z17\.s,z25\.s ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z18\.s,z26\.s ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z19\.s,z27\.s ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z20\.s,z28\.s ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z21\.s,z29\.s ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z22\.s,z30\.s ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z23\.s,z31\.s ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z0\.s,z8\.s ?},pn15/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z0\.s,z8\.s ?},pn8/z,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z0\.s,z8\.s ?},pn8/z,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z0\.s,z8\.s ?},pn8/z,\[x0,#-16,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z0\.s,z8\.s ?},pn8/z,\[x0,#14,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z3\.s,z11\.s ?},pn10/z,\[x22,#6,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn8/z,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?Z0\.S,Z4\.S,Z8\.S,Z12\.S ?},PN8/Z,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z1\.s,z5\.s,z9\.s,z13\.s ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z2\.s,z6\.s,z10\.s,z14\.s ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z3\.s,z7\.s,z11\.s,z15\.s ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z16\.s,z20\.s,z24\.s,z28\.s ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z17\.s,z21\.s,z25\.s,z29\.s ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z18\.s,z22\.s,z26\.s,z30\.s ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z19\.s,z23\.s,z27\.s,z31\.s ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn15/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn8/z,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn8/z,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn8/z,\[x0,#-32,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn8/z,\[x0,#28,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z2\.s,z6\.s,z10\.s,z14\.s ?},pn14/z,\[x29,#8,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z0\.s ?- ?z1\.s ?},pn8/z,\[x0,x1,lsl 2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z0\.s ?- ?z1\.s ?},pn8/z,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?Z0\.S ?- ?Z1\.S ?},PN8/Z,\[X0,X1,LSL ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z30\.s ?- ?z31\.s ?},pn8/z,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z0\.s ?- ?z1\.s ?},pn15/z,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z0\.s ?- ?z1\.s ?},pn8/z,\[x30,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z0\.s ?- ?z1\.s ?},pn8/z,\[sp,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z0\.s ?- ?z1\.s ?},pn8/z,\[x0,x30,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z0\.s ?- ?z1\.s ?},pn8/z,\[x0,xzr,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z14\.s ?- ?z15\.s ?},pn9/z,\[x26,x3,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z0\.s ?- ?z3\.s ?},pn8/z,\[x0,x1,lsl 2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z0\.s ?- ?z3\.s ?},pn8/z,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?Z0\.S ?- ?Z3\.S ?},PN8/Z,\[X0,X1,LSL ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z28\.s ?- ?z31\.s ?},pn8/z,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z0\.s ?- ?z3\.s ?},pn15/z,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z0\.s ?- ?z3\.s ?},pn8/z,\[x30,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z0\.s ?- ?z3\.s ?},pn8/z,\[sp,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z0\.s ?- ?z3\.s ?},pn8/z,\[x0,x30,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z0\.s ?- ?z3\.s ?},pn8/z,\[x0,xzr,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z8\.s ?- ?z11\.s ?},pn11/z,\[x27,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z0\.s,z8\.s ?},pn8/z,\[x0,x1,lsl 2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z0\.s,z8\.s ?},pn8/z,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?Z0\.S,Z8\.S ?},PN8/Z,\[X0,X1,LSL ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z1\.s,z9\.s ?},pn8/z,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z2\.s,z10\.s ?},pn8/z,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z3\.s,z11\.s ?},pn8/z,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z4\.s,z12\.s ?},pn8/z,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z5\.s,z13\.s ?},pn8/z,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z6\.s,z14\.s ?},pn8/z,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z7\.s,z15\.s ?},pn8/z,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z16\.s,z24\.s ?},pn8/z,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z17\.s,z25\.s ?},pn8/z,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z18\.s,z26\.s ?},pn8/z,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z19\.s,z27\.s ?},pn8/z,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z20\.s,z28\.s ?},pn8/z,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z21\.s,z29\.s ?},pn8/z,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z22\.s,z30\.s ?},pn8/z,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z23\.s,z31\.s ?},pn8/z,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z0\.s,z8\.s ?},pn15/z,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z0\.s,z8\.s ?},pn8/z,\[x30,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z0\.s,z8\.s ?},pn8/z,\[sp,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z0\.s,z8\.s ?},pn8/z,\[x0,x30,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z0\.s,z8\.s ?},pn8/z,\[x0,xzr,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z5\.s,z13\.s ?},pn14/z,\[x15,x24,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn8/z,\[x0,x1,lsl 2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn8/z,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?Z0\.S,Z4\.S,Z8\.S,Z12\.S ?},PN8/Z,\[X0,X1,LSL ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z1\.s,z5\.s,z9\.s,z13\.s ?},pn8/z,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z2\.s,z6\.s,z10\.s,z14\.s ?},pn8/z,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z3\.s,z7\.s,z11\.s,z15\.s ?},pn8/z,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z16\.s,z20\.s,z24\.s,z28\.s ?},pn8/z,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z17\.s,z21\.s,z25\.s,z29\.s ?},pn8/z,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z18\.s,z22\.s,z26\.s,z30\.s ?},pn8/z,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z19\.s,z23\.s,z27\.s,z31\.s ?},pn8/z,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn15/z,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn8/z,\[x30,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn8/z,\[sp,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn8/z,\[x0,x30,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn8/z,\[x0,xzr,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z17\.s,z21\.s,z25\.s,z29\.s ?},pn11/z,\[x4,x6,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s ?- ?z1\.s ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s ?- ?z1\.s ?},pn8/z,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?Z0\.S ?- ?Z1\.S ?},PN8/Z,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z30\.s ?- ?z31\.s ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s ?- ?z1\.s ?},pn15/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s ?- ?z1\.s ?},pn8/z,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s ?- ?z1\.s ?},pn8/z,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s ?- ?z1\.s ?},pn8/z,\[x0,#-16,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s ?- ?z1\.s ?},pn8/z,\[x0,#14,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z12\.s ?- ?z13\.s ?},pn13/z,\[x11,#-10,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s ?- ?z3\.s ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s ?- ?z3\.s ?},pn8/z,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?Z0\.S ?- ?Z3\.S ?},PN8/Z,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z28\.s ?- ?z31\.s ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s ?- ?z3\.s ?},pn15/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s ?- ?z3\.s ?},pn8/z,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s ?- ?z3\.s ?},pn8/z,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s ?- ?z3\.s ?},pn8/z,\[x0,#-32,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s ?- ?z3\.s ?},pn8/z,\[x0,#28,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z8\.s ?- ?z11\.s ?},pn11/z,\[x17,#20,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s,z8\.s ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s,z8\.s ?},pn8/z,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?Z0\.S,Z8\.S ?},PN8/Z,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z1\.s,z9\.s ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z2\.s,z10\.s ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z3\.s,z11\.s ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z4\.s,z12\.s ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z5\.s,z13\.s ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z6\.s,z14\.s ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z7\.s,z15\.s ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z16\.s,z24\.s ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z17\.s,z25\.s ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z18\.s,z26\.s ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z19\.s,z27\.s ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z20\.s,z28\.s ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z21\.s,z29\.s ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z22\.s,z30\.s ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z23\.s,z31\.s ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s,z8\.s ?},pn15/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s,z8\.s ?},pn8/z,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s,z8\.s ?},pn8/z,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s,z8\.s ?},pn8/z,\[x0,#-16,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s,z8\.s ?},pn8/z,\[x0,#14,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z3\.s,z11\.s ?},pn10/z,\[x22,#6,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn8/z,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?Z0\.S,Z4\.S,Z8\.S,Z12\.S ?},PN8/Z,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z1\.s,z5\.s,z9\.s,z13\.s ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z2\.s,z6\.s,z10\.s,z14\.s ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z3\.s,z7\.s,z11\.s,z15\.s ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z16\.s,z20\.s,z24\.s,z28\.s ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z17\.s,z21\.s,z25\.s,z29\.s ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z18\.s,z22\.s,z26\.s,z30\.s ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z19\.s,z23\.s,z27\.s,z31\.s ?},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn15/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn8/z,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn8/z,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn8/z,\[x0,#-32,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn8/z,\[x0,#28,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z2\.s,z6\.s,z10\.s,z14\.s ?},pn14/z,\[x29,#8,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s ?- ?z1\.s ?},pn8/z,\[x0,x1,lsl 2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s ?- ?z1\.s ?},pn8/z,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?Z0\.S ?- ?Z1\.S ?},PN8/Z,\[X0,X1,LSL ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z30\.s ?- ?z31\.s ?},pn8/z,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s ?- ?z1\.s ?},pn15/z,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s ?- ?z1\.s ?},pn8/z,\[x30,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s ?- ?z1\.s ?},pn8/z,\[sp,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s ?- ?z1\.s ?},pn8/z,\[x0,x30,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s ?- ?z1\.s ?},pn8/z,\[x0,xzr,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z14\.s ?- ?z15\.s ?},pn9/z,\[x26,x3,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s ?- ?z3\.s ?},pn8/z,\[x0,x1,lsl 2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s ?- ?z3\.s ?},pn8/z,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?Z0\.S ?- ?Z3\.S ?},PN8/Z,\[X0,X1,LSL ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z28\.s ?- ?z31\.s ?},pn8/z,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s ?- ?z3\.s ?},pn15/z,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s ?- ?z3\.s ?},pn8/z,\[x30,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s ?- ?z3\.s ?},pn8/z,\[sp,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s ?- ?z3\.s ?},pn8/z,\[x0,x30,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s ?- ?z3\.s ?},pn8/z,\[x0,xzr,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z8\.s ?- ?z11\.s ?},pn11/z,\[x27,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s,z8\.s ?},pn8/z,\[x0,x1,lsl 2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s,z8\.s ?},pn8/z,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?Z0\.S,Z8\.S ?},PN8/Z,\[X0,X1,LSL ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z1\.s,z9\.s ?},pn8/z,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z2\.s,z10\.s ?},pn8/z,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z3\.s,z11\.s ?},pn8/z,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z4\.s,z12\.s ?},pn8/z,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z5\.s,z13\.s ?},pn8/z,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z6\.s,z14\.s ?},pn8/z,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z7\.s,z15\.s ?},pn8/z,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z16\.s,z24\.s ?},pn8/z,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z17\.s,z25\.s ?},pn8/z,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z18\.s,z26\.s ?},pn8/z,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z19\.s,z27\.s ?},pn8/z,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z20\.s,z28\.s ?},pn8/z,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z21\.s,z29\.s ?},pn8/z,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z22\.s,z30\.s ?},pn8/z,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z23\.s,z31\.s ?},pn8/z,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s,z8\.s ?},pn15/z,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s,z8\.s ?},pn8/z,\[x30,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s,z8\.s ?},pn8/z,\[sp,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s,z8\.s ?},pn8/z,\[x0,x30,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s,z8\.s ?},pn8/z,\[x0,xzr,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z5\.s,z13\.s ?},pn14/z,\[x15,x24,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn8/z,\[x0,x1,lsl 2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn8/z,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?Z0\.S,Z4\.S,Z8\.S,Z12\.S ?},PN8/Z,\[X0,X1,LSL ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z1\.s,z5\.s,z9\.s,z13\.s ?},pn8/z,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z2\.s,z6\.s,z10\.s,z14\.s ?},pn8/z,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z3\.s,z7\.s,z11\.s,z15\.s ?},pn8/z,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z16\.s,z20\.s,z24\.s,z28\.s ?},pn8/z,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z17\.s,z21\.s,z25\.s,z29\.s ?},pn8/z,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z18\.s,z22\.s,z26\.s,z30\.s ?},pn8/z,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z19\.s,z23\.s,z27\.s,z31\.s ?},pn8/z,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn15/z,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn8/z,\[x30,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn8/z,\[sp,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn8/z,\[x0,x30,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn8/z,\[x0,xzr,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z17\.s,z21\.s,z25\.s,z29\.s ?},pn11/z,\[x4,x6,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z0\.s ?- ?z1\.s ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z0\.s ?- ?z1\.s ?},pn8,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?Z0\.S ?- ?Z1\.S ?},PN8,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z30\.s ?- ?z31\.s ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z0\.s ?- ?z1\.s ?},pn15,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z0\.s ?- ?z1\.s ?},pn8,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z0\.s ?- ?z1\.s ?},pn8,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z0\.s ?- ?z1\.s ?},pn8,\[x0,#-16,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z0\.s ?- ?z1\.s ?},pn8,\[x0,#14,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z12\.s ?- ?z13\.s ?},pn13,\[x11,#-10,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z0\.s ?- ?z3\.s ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z0\.s ?- ?z3\.s ?},pn8,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?Z0\.S ?- ?Z3\.S ?},PN8,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z28\.s ?- ?z31\.s ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z0\.s ?- ?z3\.s ?},pn15,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z0\.s ?- ?z3\.s ?},pn8,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z0\.s ?- ?z3\.s ?},pn8,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z0\.s ?- ?z3\.s ?},pn8,\[x0,#-32,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z0\.s ?- ?z3\.s ?},pn8,\[x0,#28,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z8\.s ?- ?z11\.s ?},pn11,\[x17,#20,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z0\.s,z8\.s ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z0\.s,z8\.s ?},pn8,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?Z0\.S,Z8\.S ?},PN8,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z1\.s,z9\.s ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z2\.s,z10\.s ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z3\.s,z11\.s ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z4\.s,z12\.s ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z5\.s,z13\.s ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z6\.s,z14\.s ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z7\.s,z15\.s ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z16\.s,z24\.s ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z17\.s,z25\.s ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z18\.s,z26\.s ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z19\.s,z27\.s ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z20\.s,z28\.s ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z21\.s,z29\.s ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z22\.s,z30\.s ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z23\.s,z31\.s ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z0\.s,z8\.s ?},pn15,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z0\.s,z8\.s ?},pn8,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z0\.s,z8\.s ?},pn8,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z0\.s,z8\.s ?},pn8,\[x0,#-16,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z0\.s,z8\.s ?},pn8,\[x0,#14,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z3\.s,z11\.s ?},pn10,\[x22,#6,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn8,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?Z0\.S,Z4\.S,Z8\.S,Z12\.S ?},PN8,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z1\.s,z5\.s,z9\.s,z13\.s ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z2\.s,z6\.s,z10\.s,z14\.s ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z3\.s,z7\.s,z11\.s,z15\.s ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z16\.s,z20\.s,z24\.s,z28\.s ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z17\.s,z21\.s,z25\.s,z29\.s ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z18\.s,z22\.s,z26\.s,z30\.s ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z19\.s,z23\.s,z27\.s,z31\.s ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn15,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn8,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn8,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn8,\[x0,#-32,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn8,\[x0,#28,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z2\.s,z6\.s,z10\.s,z14\.s ?},pn14,\[x29,#8,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z0\.s ?- ?z1\.s ?},pn8,\[x0,x1,lsl 2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z0\.s ?- ?z1\.s ?},pn8,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?Z0\.S ?- ?Z1\.S ?},PN8,\[X0,X1,LSL ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z30\.s ?- ?z31\.s ?},pn8,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z0\.s ?- ?z1\.s ?},pn15,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z0\.s ?- ?z1\.s ?},pn8,\[x30,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z0\.s ?- ?z1\.s ?},pn8,\[sp,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z0\.s ?- ?z1\.s ?},pn8,\[x0,x30,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z0\.s ?- ?z1\.s ?},pn8,\[x0,xzr,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z14\.s ?- ?z15\.s ?},pn9,\[x26,x3,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z0\.s ?- ?z3\.s ?},pn8,\[x0,x1,lsl 2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z0\.s ?- ?z3\.s ?},pn8,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?Z0\.S ?- ?Z3\.S ?},PN8,\[X0,X1,LSL ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z28\.s ?- ?z31\.s ?},pn8,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z0\.s ?- ?z3\.s ?},pn15,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z0\.s ?- ?z3\.s ?},pn8,\[x30,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z0\.s ?- ?z3\.s ?},pn8,\[sp,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z0\.s ?- ?z3\.s ?},pn8,\[x0,x30,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z0\.s ?- ?z3\.s ?},pn8,\[x0,xzr,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z8\.s ?- ?z11\.s ?},pn11,\[x27,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z0\.s,z8\.s ?},pn8,\[x0,x1,lsl 2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z0\.s,z8\.s ?},pn8,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?Z0\.S,Z8\.S ?},PN8,\[X0,X1,LSL ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z1\.s,z9\.s ?},pn8,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z2\.s,z10\.s ?},pn8,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z3\.s,z11\.s ?},pn8,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z4\.s,z12\.s ?},pn8,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z5\.s,z13\.s ?},pn8,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z6\.s,z14\.s ?},pn8,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z7\.s,z15\.s ?},pn8,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z16\.s,z24\.s ?},pn8,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z17\.s,z25\.s ?},pn8,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z18\.s,z26\.s ?},pn8,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z19\.s,z27\.s ?},pn8,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z20\.s,z28\.s ?},pn8,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z21\.s,z29\.s ?},pn8,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z22\.s,z30\.s ?},pn8,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z23\.s,z31\.s ?},pn8,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z0\.s,z8\.s ?},pn15,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z0\.s,z8\.s ?},pn8,\[x30,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z0\.s,z8\.s ?},pn8,\[sp,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z0\.s,z8\.s ?},pn8,\[x0,x30,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z0\.s,z8\.s ?},pn8,\[x0,xzr,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z5\.s,z13\.s ?},pn14,\[x15,x24,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn8,\[x0,x1,lsl 2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn8,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?Z0\.S,Z4\.S,Z8\.S,Z12\.S ?},PN8,\[X0,X1,LSL ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z1\.s,z5\.s,z9\.s,z13\.s ?},pn8,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z2\.s,z6\.s,z10\.s,z14\.s ?},pn8,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z3\.s,z7\.s,z11\.s,z15\.s ?},pn8,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z16\.s,z20\.s,z24\.s,z28\.s ?},pn8,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z17\.s,z21\.s,z25\.s,z29\.s ?},pn8,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z18\.s,z22\.s,z26\.s,z30\.s ?},pn8,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z19\.s,z23\.s,z27\.s,z31\.s ?},pn8,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn15,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn8,\[x30,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn8,\[sp,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn8,\[x0,x30,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn8,\[x0,xzr,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z17\.s,z21\.s,z25\.s,z29\.s ?},pn11,\[x4,x6,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s ?- ?z1\.s ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s ?- ?z1\.s ?},pn8,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?Z0\.S ?- ?Z1\.S ?},PN8,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z30\.s ?- ?z31\.s ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s ?- ?z1\.s ?},pn15,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s ?- ?z1\.s ?},pn8,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s ?- ?z1\.s ?},pn8,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s ?- ?z1\.s ?},pn8,\[x0,#-16,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s ?- ?z1\.s ?},pn8,\[x0,#14,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z12\.s ?- ?z13\.s ?},pn13,\[x11,#-10,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s ?- ?z3\.s ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s ?- ?z3\.s ?},pn8,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?Z0\.S ?- ?Z3\.S ?},PN8,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z28\.s ?- ?z31\.s ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s ?- ?z3\.s ?},pn15,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s ?- ?z3\.s ?},pn8,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s ?- ?z3\.s ?},pn8,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s ?- ?z3\.s ?},pn8,\[x0,#-32,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s ?- ?z3\.s ?},pn8,\[x0,#28,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z8\.s ?- ?z11\.s ?},pn11,\[x17,#20,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s,z8\.s ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s,z8\.s ?},pn8,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?Z0\.S,Z8\.S ?},PN8,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z1\.s,z9\.s ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z2\.s,z10\.s ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z3\.s,z11\.s ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z4\.s,z12\.s ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z5\.s,z13\.s ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z6\.s,z14\.s ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z7\.s,z15\.s ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z16\.s,z24\.s ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z17\.s,z25\.s ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z18\.s,z26\.s ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z19\.s,z27\.s ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z20\.s,z28\.s ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z21\.s,z29\.s ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z22\.s,z30\.s ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z23\.s,z31\.s ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s,z8\.s ?},pn15,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s,z8\.s ?},pn8,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s,z8\.s ?},pn8,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s,z8\.s ?},pn8,\[x0,#-16,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s,z8\.s ?},pn8,\[x0,#14,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z3\.s,z11\.s ?},pn10,\[x22,#6,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn8,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?Z0\.S,Z4\.S,Z8\.S,Z12\.S ?},PN8,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z1\.s,z5\.s,z9\.s,z13\.s ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z2\.s,z6\.s,z10\.s,z14\.s ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z3\.s,z7\.s,z11\.s,z15\.s ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z16\.s,z20\.s,z24\.s,z28\.s ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z17\.s,z21\.s,z25\.s,z29\.s ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z18\.s,z22\.s,z26\.s,z30\.s ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z19\.s,z23\.s,z27\.s,z31\.s ?},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn15,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn8,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn8,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn8,\[x0,#-32,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn8,\[x0,#28,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z2\.s,z6\.s,z10\.s,z14\.s ?},pn14,\[x29,#8,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s ?- ?z1\.s ?},pn8,\[x0,x1,lsl 2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s ?- ?z1\.s ?},pn8,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?Z0\.S ?- ?Z1\.S ?},PN8,\[X0,X1,LSL ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z30\.s ?- ?z31\.s ?},pn8,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s ?- ?z1\.s ?},pn15,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s ?- ?z1\.s ?},pn8,\[x30,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s ?- ?z1\.s ?},pn8,\[sp,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s ?- ?z1\.s ?},pn8,\[x0,x30,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s ?- ?z1\.s ?},pn8,\[x0,xzr,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z14\.s ?- ?z15\.s ?},pn9,\[x26,x3,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s ?- ?z3\.s ?},pn8,\[x0,x1,lsl 2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s ?- ?z3\.s ?},pn8,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?Z0\.S ?- ?Z3\.S ?},PN8,\[X0,X1,LSL ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z28\.s ?- ?z31\.s ?},pn8,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s ?- ?z3\.s ?},pn15,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s ?- ?z3\.s ?},pn8,\[x30,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s ?- ?z3\.s ?},pn8,\[sp,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s ?- ?z3\.s ?},pn8,\[x0,x30,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s ?- ?z3\.s ?},pn8,\[x0,xzr,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z8\.s ?- ?z11\.s ?},pn11,\[x27,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s,z8\.s ?},pn8,\[x0,x1,lsl 2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s,z8\.s ?},pn8,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?Z0\.S,Z8\.S ?},PN8,\[X0,X1,LSL ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z1\.s,z9\.s ?},pn8,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z2\.s,z10\.s ?},pn8,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z3\.s,z11\.s ?},pn8,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z4\.s,z12\.s ?},pn8,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z5\.s,z13\.s ?},pn8,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z6\.s,z14\.s ?},pn8,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z7\.s,z15\.s ?},pn8,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z16\.s,z24\.s ?},pn8,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z17\.s,z25\.s ?},pn8,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z18\.s,z26\.s ?},pn8,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z19\.s,z27\.s ?},pn8,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z20\.s,z28\.s ?},pn8,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z21\.s,z29\.s ?},pn8,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z22\.s,z30\.s ?},pn8,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z23\.s,z31\.s ?},pn8,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s,z8\.s ?},pn15,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s,z8\.s ?},pn8,\[x30,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s,z8\.s ?},pn8,\[sp,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s,z8\.s ?},pn8,\[x0,x30,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s,z8\.s ?},pn8,\[x0,xzr,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z5\.s,z13\.s ?},pn14,\[x15,x24,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn8,\[x0,x1,lsl 2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn8,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?Z0\.S,Z4\.S,Z8\.S,Z12\.S ?},PN8,\[X0,X1,LSL ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z1\.s,z5\.s,z9\.s,z13\.s ?},pn8,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z2\.s,z6\.s,z10\.s,z14\.s ?},pn8,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z3\.s,z7\.s,z11\.s,z15\.s ?},pn8,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z16\.s,z20\.s,z24\.s,z28\.s ?},pn8,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z17\.s,z21\.s,z25\.s,z29\.s ?},pn8,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z18\.s,z22\.s,z26\.s,z30\.s ?},pn8,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z19\.s,z23\.s,z27\.s,z31\.s ?},pn8,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn15,\[x0,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn8,\[x30,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn8,\[sp,x1,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn8,\[x0,x30,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn8,\[x0,xzr,lsl ?#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z17\.s,z21\.s,z25\.s,z29\.s ?},pn11,\[x4,x6,lsl ?#2\]'
diff --git a/gas/testsuite/gas/aarch64/sme2-6-invalid.l b/gas/testsuite/gas/aarch64/sme2-6-invalid.l
index cac3ec4..652ab22 100644
--- a/gas/testsuite/gas/aarch64/sme2-6-invalid.l
+++ b/gas/testsuite/gas/aarch64/sme2-6-invalid.l
@@ -40,7 +40,7 @@
 [^ :]+:[0-9]+: Error: missing register index at operand 2 -- `pext p8\.b,pn8'
 [^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 2 -- `pext p8\.b,pn8\[-1\]'
 [^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 2 -- `pext p8\.b,pn8\[4\]'
-[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 2 -- `pext p8\.b,pn8\[1<<32\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 2 -- `pext p8\.b,pn8\[1 ?<< ?32\]'
 [^ :]+:[0-9]+: Error: operand mismatch -- `pext p8\.b,pn8\.b\[0\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	pext p8\.b, pn8\[0\]
@@ -55,22 +55,22 @@
 [^ :]+:[0-9]+: Info:    	pext p8\.h, pn8\[0\]
 [^ :]+:[0-9]+: Info:    	pext p8\.s, pn8\[0\]
 [^ :]+:[0-9]+: Info:    	pext p8\.d, pn8\[0\]
-[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 1 -- `pext {p0\.b-p2\.b},pn8\[0\]'
-[^ :]+:[0-9]+: Error: missing type suffix at operand 1 -- `pext {p0-p1},pn8\[0\]'
-[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `pext {p0\.b-p1\.b},pn7\[0\]'
-[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `pext {p0\.b-p1\.b},pn0\[0\]'
-[^ :]+:[0-9]+: Error: missing register index at operand 2 -- `pext {p0\.b-p1\.b},pn8'
-[^ :]+:[0-9]+: Error: expected a predicate-as-counter rather than predicate-as-mask register at operand 2 -- `pext {p0\.b-p1\.b},p0\[0\]'
-[^ :]+:[0-9]+: Error: operand mismatch -- `pext {p0\.b-p1\.b},pn8\.b\[0\]'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 1 -- `pext { ?p0\.b ?- ?p2\.b ?},pn8\[0\]'
+[^ :]+:[0-9]+: Error: missing type suffix at operand 1 -- `pext { ?p0 ?- ?p1 ?},pn8\[0\]'
+[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `pext { ?p0\.b ?- ?p1\.b ?},pn7\[0\]'
+[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `pext { ?p0\.b ?- ?p1\.b ?},pn0\[0\]'
+[^ :]+:[0-9]+: Error: missing register index at operand 2 -- `pext { ?p0\.b ?- ?p1\.b ?},pn8'
+[^ :]+:[0-9]+: Error: expected a predicate-as-counter rather than predicate-as-mask register at operand 2 -- `pext { ?p0\.b ?- ?p1\.b ?},p0\[0\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `pext { ?p0\.b ?- ?p1\.b ?},pn8\.b\[0\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	pext {p0\.b-p1\.b}, pn8\[0\]
 [^ :]+:[0-9]+: Info:    other valid variant\(s\):
 [^ :]+:[0-9]+: Info:    	pext {p0\.h-p1\.h}, pn8\[0\]
 [^ :]+:[0-9]+: Info:    	pext {p0\.s-p1\.s}, pn8\[0\]
 [^ :]+:[0-9]+: Info:    	pext {p0\.d-p1\.d}, pn8\[0\]
-[^ :]+:[0-9]+: Error: register element index out of range 0 to 1 at operand 2 -- `pext {p0\.b-p1\.b},pn8\[-1\]'
-[^ :]+:[0-9]+: Error: register element index out of range 0 to 1 at operand 2 -- `pext {p0\.b-p1\.b},pn8\[2\]'
-[^ :]+:[0-9]+: Error: register element index out of range 0 to 1 at operand 2 -- `pext {p0\.b-p1\.b},pn8\[1<<32\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 1 at operand 2 -- `pext { ?p0\.b ?- ?p1\.b ?},pn8\[-1\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 1 at operand 2 -- `pext { ?p0\.b ?- ?p1\.b ?},pn8\[2\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 1 at operand 2 -- `pext { ?p0\.b ?- ?p1\.b ?},pn8\[1 ?<< ?32\]'
 [^ :]+:[0-9]+: Error: expected an SVE predicate register at operand 1 -- `ptrue 0'
 [^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 1 -- `ptrue pn0\.b'
 [^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 1 -- `ptrue pn7\.b'
@@ -88,49 +88,49 @@
 [^ :]+:[0-9]+: Info:    	ptrue pn8\.h
 [^ :]+:[0-9]+: Info:    	ptrue pn8\.s
 [^ :]+:[0-9]+: Info:    	ptrue pn8\.d
-[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `sel 0,pn8,{z0\.b-z1\.b},{z0\.b-z1\.b}'
-[^ :]+:[0-9]+: Error: expected an SVE predicate-as-counter register at operand 2 -- `sel {z0\.b-z1\.b},0,{z0\.b-z1\.b},{z0\.b-z1\.b}'
-[^ :]+:[0-9]+: Error: expected '{' at operand 3 -- `sel {z0\.b-z1\.b},pn8,0,{z0\.b-z1\.b}'
-[^ :]+:[0-9]+: Error: expected '{' at operand 4 -- `sel {z0\.b-z1\.b},pn8,{z0\.b-z1\.b},0'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `sel {z1\.b-z2\.b},pn8,{z0\.b-z1\.b},{z0\.b-z1\.b}'
-[^ :]+:[0-9]+: Error: expected a predicate-as-counter rather than predicate-as-mask register at operand 2 -- `sel {z0\.b-z1\.b},p8,{z0\.b-z1\.b},{z0\.b-z1\.b}'
-[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `sel {z0\.b-z1\.b},pn7,{z0\.b-z1\.b},{z0\.b-z1\.b}'
-[^ :]+:[0-9]+: Error: operand mismatch -- `sel {z0\.b-z1\.b},pn8/z,{z0\.b-z1\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `sel 0,pn8,{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?}'
+[^ :]+:[0-9]+: Error: expected an SVE predicate-as-counter register at operand 2 -- `sel { ?z0\.b ?- ?z1\.b ?},0,{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?}'
+[^ :]+:[0-9]+: Error: expected '{' at operand 3 -- `sel { ?z0\.b ?- ?z1\.b ?},pn8,0,{ ?z0\.b ?- ?z1\.b ?}'
+[^ :]+:[0-9]+: Error: expected '{' at operand 4 -- `sel { ?z0\.b ?- ?z1\.b ?},pn8,{ ?z0\.b ?- ?z1\.b ?},0'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `sel { ?z1\.b ?- ?z2\.b ?},pn8,{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?}'
+[^ :]+:[0-9]+: Error: expected a predicate-as-counter rather than predicate-as-mask register at operand 2 -- `sel { ?z0\.b ?- ?z1\.b ?},p8,{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?}'
+[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `sel { ?z0\.b ?- ?z1\.b ?},pn7,{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?}'
+[^ :]+:[0-9]+: Error: operand mismatch -- `sel { ?z0\.b ?- ?z1\.b ?},pn8/z,{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?}'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	sel {z0\.b-z1\.b}, pn8, {z0\.b-z1\.b}, {z0\.b-z1\.b}
 [^ :]+:[0-9]+: Info:    other valid variant\(s\):
 [^ :]+:[0-9]+: Info:    	sel {z0\.h-z1\.h}, pn8, {z0\.h-z1\.h}, {z0\.h-z1\.h}
 [^ :]+:[0-9]+: Info:    	sel {z0\.s-z1\.s}, pn8, {z0\.s-z1\.s}, {z0\.s-z1\.s}
 [^ :]+:[0-9]+: Info:    	sel {z0\.d-z1\.d}, pn8, {z0\.d-z1\.d}, {z0\.d-z1\.d}
-[^ :]+:[0-9]+: Error: operand mismatch -- `sel {z0\.b-z1\.b},pn8/m,{z0\.b-z1\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: operand mismatch -- `sel { ?z0\.b ?- ?z1\.b ?},pn8/m,{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?}'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	sel {z0\.b-z1\.b}, pn8, {z0\.b-z1\.b}, {z0\.b-z1\.b}
 [^ :]+:[0-9]+: Info:    other valid variant\(s\):
 [^ :]+:[0-9]+: Info:    	sel {z0\.h-z1\.h}, pn8, {z0\.h-z1\.h}, {z0\.h-z1\.h}
 [^ :]+:[0-9]+: Info:    	sel {z0\.s-z1\.s}, pn8, {z0\.s-z1\.s}, {z0\.s-z1\.s}
 [^ :]+:[0-9]+: Info:    	sel {z0\.d-z1\.d}, pn8, {z0\.d-z1\.d}, {z0\.d-z1\.d}
-[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `sel {z0\.b-z1\.b},pn0,{z0\.b-z1\.b},{z0\.b-z1\.b}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `sel {z0\.b-z1\.b},pn8,{z11\.b-z12\.b},{z0\.b-z1\.b}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 4 -- `sel {z0\.b-z1\.b},pn8,{z0\.b-z1\.b},{z17\.b-z18\.b}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `sel {z1\.b-z4\.b},pn8,{z0\.b-z3\.b},{z0\.b-z3\.b}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `sel {z10\.b-z13\.b},pn8,{z0\.b-z3\.b},{z0\.b-z3\.b}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `sel {z15\.b-z18\.b},pn8,{z0\.b-z3\.b},{z0\.b-z3\.b}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `sel {z0\.b-z3\.b},pn8,{z1\.b-z4\.b},{z0\.b-z3\.b}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `sel {z0\.b-z3\.b},pn8,{z22\.b-z25\.b},{z0\.b-z3\.b}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `sel {z0\.b-z3\.b},pn8,{z27\.b-z30\.b},{z0\.b-z3\.b}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 4 -- `sel {z0\.b-z3\.b},pn8,{z0\.b-z3\.b},{z5\.b-z8\.b}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 4 -- `sel {z0\.b-z3\.b},pn8,{z0\.b-z3\.b},{z14\.b-z17\.b}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 4 -- `sel {z0\.b-z3\.b},pn8,{z0\.b-z3\.b},{z19\.b-z22\.b}'
-[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `sel {z0\.b-z1\.b},pn8,{z0\.b-z3\.b},{z0\.b-z3\.b}'
-[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `sel {z0\.b-z3\.b},pn8,{z0\.b-z1\.b},{z0\.b-z3\.b}'
-[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 4 -- `sel {z0\.b-z3\.b},pn8,{z0\.b-z3\.b},{z0\.b-z1\.b}'
-[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 1 -- `sel {z0\.b-z2\.b},pn8,{z0\.b-z3\.b},{z0\.b-z3\.b}'
-[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `sel {z0\.b-z3\.b},pn8,{z0\.b-z2\.b},{z0\.b-z3\.b}'
-[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 4 -- `sel {z0\.b-z3\.b},pn8,{z0\.b-z3\.b},{z0\.b-z2\.b}'
-[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 1 -- `sel {z0\.b-z2\.b},pn8,{z0\.b-z1\.b},{z0\.b-z1\.b}'
-[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `sel {z0\.b-z1\.b},pn8,{z0\.b-z2\.b},{z0\.b-z1\.b}'
-[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 4 -- `sel {z0\.b-z1\.b},pn8,{z0\.b-z1\.b},{z0\.b-z2\.b}'
-[^ :]+:[0-9]+: Error: operand mismatch -- `sel {z0\.q-z1\.q},pn8,{z0\.q-z1\.q},{z0\.q-z1\.q}'
+[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `sel { ?z0\.b ?- ?z1\.b ?},pn0,{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `sel { ?z0\.b ?- ?z1\.b ?},pn8,{ ?z11\.b ?- ?z12\.b ?},{ ?z0\.b ?- ?z1\.b ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 4 -- `sel { ?z0\.b ?- ?z1\.b ?},pn8,{ ?z0\.b ?- ?z1\.b ?},{ ?z17\.b ?- ?z18\.b ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `sel { ?z1\.b ?- ?z4\.b ?},pn8,{ ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `sel { ?z10\.b ?- ?z13\.b ?},pn8,{ ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `sel { ?z15\.b ?- ?z18\.b ?},pn8,{ ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `sel { ?z0\.b ?- ?z3\.b ?},pn8,{ ?z1\.b ?- ?z4\.b ?},{ ?z0\.b ?- ?z3\.b ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `sel { ?z0\.b ?- ?z3\.b ?},pn8,{ ?z22\.b ?- ?z25\.b ?},{ ?z0\.b ?- ?z3\.b ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `sel { ?z0\.b ?- ?z3\.b ?},pn8,{ ?z27\.b ?- ?z30\.b ?},{ ?z0\.b ?- ?z3\.b ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 4 -- `sel { ?z0\.b ?- ?z3\.b ?},pn8,{ ?z0\.b ?- ?z3\.b ?},{ ?z5\.b ?- ?z8\.b ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 4 -- `sel { ?z0\.b ?- ?z3\.b ?},pn8,{ ?z0\.b ?- ?z3\.b ?},{ ?z14\.b ?- ?z17\.b ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 4 -- `sel { ?z0\.b ?- ?z3\.b ?},pn8,{ ?z0\.b ?- ?z3\.b ?},{ ?z19\.b ?- ?z22\.b ?}'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `sel { ?z0\.b ?- ?z1\.b ?},pn8,{ ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?}'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `sel { ?z0\.b ?- ?z3\.b ?},pn8,{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z3\.b ?}'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 4 -- `sel { ?z0\.b ?- ?z3\.b ?},pn8,{ ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z1\.b ?}'
+[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 1 -- `sel { ?z0\.b ?- ?z2\.b ?},pn8,{ ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?}'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `sel { ?z0\.b ?- ?z3\.b ?},pn8,{ ?z0\.b ?- ?z2\.b ?},{ ?z0\.b ?- ?z3\.b ?}'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 4 -- `sel { ?z0\.b ?- ?z3\.b ?},pn8,{ ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z2\.b ?}'
+[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 1 -- `sel { ?z0\.b ?- ?z2\.b ?},pn8,{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?}'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `sel { ?z0\.b ?- ?z1\.b ?},pn8,{ ?z0\.b ?- ?z2\.b ?},{ ?z0\.b ?- ?z1\.b ?}'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 4 -- `sel { ?z0\.b ?- ?z1\.b ?},pn8,{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z2\.b ?}'
+[^ :]+:[0-9]+: Error: operand mismatch -- `sel { ?z0\.q ?- ?z1\.q ?},pn8,{ ?z0\.q ?- ?z1\.q ?},{ ?z0\.q ?- ?z1\.q ?}'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	sel {z0\.b-z1\.b}, pn8, {z0\.b-z1\.b}, {z0\.b-z1\.b}
 [^ :]+:[0-9]+: Info:    other valid variant\(s\):
diff --git a/gas/testsuite/gas/aarch64/sme2-6-noarch.l b/gas/testsuite/gas/aarch64/sme2-6-noarch.l
index 173e99a..b521215 100644
--- a/gas/testsuite/gas/aarch64/sme2-6-noarch.l
+++ b/gas/testsuite/gas/aarch64/sme2-6-noarch.l
@@ -51,42 +51,42 @@
 [^ :]+:[0-9]+: Error: selected processor does not support `pext p0\.d,pn15\[0\]'
 [^ :]+:[0-9]+: Error: selected processor does not support `pext p0\.d,pn8\[3\]'
 [^ :]+:[0-9]+: Error: selected processor does not support `pext p7\.d,pn9\[1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `pext {p0\.b,p1\.b},pn8\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `pext {p0\.b-p1\.b},pn8\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `pext {P0\.B-P1\.B},PN8\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `pext {p14\.b-p15\.b},pn8\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `pext {p15\.b,p0\.b},pn8\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `pext {p15\.b-p0\.b},pn8\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `pext {p0\.b-p1\.b},pn15\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `pext {p0\.b-p1\.b},pn8\[1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `pext {p7\.b-p8\.b},pn12\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `pext {p0\.h,p1\.h},pn8\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `pext {p0\.h-p1\.h},pn8\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `pext {P0\.H-P1\.H},PN8\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `pext {p14\.h-p15\.h},pn8\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `pext {p15\.h,p0\.h},pn8\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `pext {p15\.h-p0\.h},pn8\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `pext {p0\.h-p1\.h},pn15\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `pext {p0\.h-p1\.h},pn8\[1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `pext {p2\.h-p3\.h},pn14\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `pext {p0\.s,p1\.s},pn8\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `pext {p0\.s-p1\.s},pn8\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `pext {P0\.S-P1\.S},PN8\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `pext {p14\.s-p15\.s},pn8\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `pext {p15\.s,p0\.s},pn8\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `pext {p15\.s-p0\.s},pn8\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `pext {p0\.s-p1\.s},pn15\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `pext {p0\.s-p1\.s},pn8\[1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `pext {p5\.s-p6\.s},pn13\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `pext {p0\.d,p1\.d},pn8\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `pext {p0\.d-p1\.d},pn8\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `pext {P0\.D-P1\.D},PN8\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `pext {p14\.d-p15\.d},pn8\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `pext {p15\.d,p0\.d},pn8\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `pext {p15\.d-p0\.d},pn8\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `pext {p0\.d-p1\.d},pn15\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `pext {p0\.d-p1\.d},pn8\[1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `pext {p12\.d-p13\.d},pn9\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext { ?p0\.b,p1\.b ?},pn8\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext { ?p0\.b ?- ?p1\.b ?},pn8\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext { ?P0\.B ?- ?P1\.B ?},PN8\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext { ?p14\.b ?- ?p15\.b ?},pn8\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext { ?p15\.b,p0\.b ?},pn8\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext { ?p15\.b ?- ?p0\.b ?},pn8\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext { ?p0\.b ?- ?p1\.b ?},pn15\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext { ?p0\.b ?- ?p1\.b ?},pn8\[1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext { ?p7\.b ?- ?p8\.b ?},pn12\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext { ?p0\.h,p1\.h ?},pn8\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext { ?p0\.h ?- ?p1\.h ?},pn8\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext { ?P0\.H ?- ?P1\.H ?},PN8\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext { ?p14\.h ?- ?p15\.h ?},pn8\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext { ?p15\.h,p0\.h ?},pn8\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext { ?p15\.h ?- ?p0\.h ?},pn8\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext { ?p0\.h ?- ?p1\.h ?},pn15\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext { ?p0\.h ?- ?p1\.h ?},pn8\[1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext { ?p2\.h ?- ?p3\.h ?},pn14\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext { ?p0\.s,p1\.s ?},pn8\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext { ?p0\.s ?- ?p1\.s ?},pn8\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext { ?P0\.S ?- ?P1\.S ?},PN8\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext { ?p14\.s ?- ?p15\.s ?},pn8\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext { ?p15\.s,p0\.s ?},pn8\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext { ?p15\.s ?- ?p0\.s ?},pn8\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext { ?p0\.s ?- ?p1\.s ?},pn15\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext { ?p0\.s ?- ?p1\.s ?},pn8\[1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext { ?p5\.s ?- ?p6\.s ?},pn13\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext { ?p0\.d,p1\.d ?},pn8\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext { ?p0\.d ?- ?p1\.d ?},pn8\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext { ?P0\.D ?- ?P1\.D ?},PN8\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext { ?p14\.d ?- ?p15\.d ?},pn8\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext { ?p15\.d,p0\.d ?},pn8\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext { ?p15\.d ?- ?p0\.d ?},pn8\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext { ?p0\.d ?- ?p1\.d ?},pn15\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext { ?p0\.d ?- ?p1\.d ?},pn8\[1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext { ?p12\.d ?- ?p13\.d ?},pn9\[0\]'
 [^ :]+:[0-9]+: Error: selected processor does not support `ptrue pn8\.b'
 [^ :]+:[0-9]+: Error: selected processor does not support `ptrue pn11\.b'
 [^ :]+:[0-9]+: Error: selected processor does not support `ptrue pn15\.b'
@@ -99,47 +99,47 @@
 [^ :]+:[0-9]+: Error: selected processor does not support `ptrue pn8\.d'
 [^ :]+:[0-9]+: Error: selected processor does not support `ptrue pn12\.d'
 [^ :]+:[0-9]+: Error: selected processor does not support `ptrue pn15\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `sel {z0\.b-z1\.b},pn8,{z0\.b-z1\.b},{z0\.b-z1\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sel {z30\.b-z31\.b},pn8,{z0\.b-z1\.b},{z0\.b-z1\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sel {z0\.b-z1\.b},pn15,{z0\.b-z1\.b},{z0\.b-z1\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sel {z0\.b-z1\.b},pn8,{z30\.b-z31\.b},{z0\.b-z1\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sel {z0\.b-z1\.b},pn8,{z0\.b-z1\.b},{z30\.b-z31\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sel {z2\.b-z3\.b},pn12,{z6\.b-z7\.b},{z10\.b-z11\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sel {z0\.h-z1\.h},pn8,{z0\.h-z1\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sel {z30\.h-z31\.h},pn8,{z0\.h-z1\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sel {z0\.h-z1\.h},pn15,{z0\.h-z1\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sel {z0\.h-z1\.h},pn8,{z30\.h-z31\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sel {z0\.h-z1\.h},pn8,{z0\.h-z1\.h},{z30\.h-z31\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sel {z12\.h-z13\.h},pn9,{z14\.h-z15\.h},{z16\.h-z17\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sel {z0\.s-z1\.s},pn8,{z0\.s-z1\.s},{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sel {z30\.s-z31\.s},pn8,{z0\.s-z1\.s},{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sel {z0\.s-z1\.s},pn15,{z0\.s-z1\.s},{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sel {z0\.s-z1\.s},pn8,{z30\.s-z31\.s},{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sel {z0\.s-z1\.s},pn8,{z0\.s-z1\.s},{z30\.s-z31\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sel {z18\.s-z19\.s},pn11,{z22\.s-z23\.s},{z24\.s-z25\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sel {z0\.d-z1\.d},pn8,{z0\.d-z1\.d},{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sel {z30\.d-z31\.d},pn8,{z0\.d-z1\.d},{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sel {z0\.d-z1\.d},pn15,{z0\.d-z1\.d},{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sel {z0\.d-z1\.d},pn8,{z30\.d-z31\.d},{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sel {z0\.d-z1\.d},pn8,{z0\.d-z1\.d},{z30\.d-z31\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sel {z8\.d-z9\.d},pn14,{z26\.d-z27\.d},{z28\.d-z29\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sel {z0\.b-z3\.b},pn8,{z0\.b-z3\.b},{z0\.b-z3\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sel {z28\.b-z31\.b},pn8,{z0\.b-z3\.b},{z0\.b-z3\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sel {z0\.b-z3\.b},pn8,{z28\.b-z31\.b},{z0\.b-z3\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sel {z0\.b-z3\.b},pn8,{z0\.b-z3\.b},{z28\.b-z31\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sel {z4\.b-z7\.b},pn10,{z8\.b-z11\.b},{z12\.b-z15\.b}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sel {z0\.h-z3\.h},pn8,{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sel {z28\.h-z31\.h},pn8,{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sel {z0\.h-z3\.h},pn8,{z28\.h-z31\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sel {z0\.h-z3\.h},pn8,{z0\.h-z3\.h},{z28\.h-z31\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sel {z8\.h-z11\.h},pn10,{z16\.h-z19\.h},{z20\.h-z23\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sel {z0\.s-z3\.s},pn8,{z0\.s-z3\.s},{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sel {z28\.s-z31\.s},pn8,{z0\.s-z3\.s},{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sel {z0\.s-z3\.s},pn8,{z28\.s-z31\.s},{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sel {z0\.s-z3\.s},pn8,{z0\.s-z3\.s},{z28\.s-z31\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sel {z16\.s-z19\.s},pn10,{z20\.s-z23\.s},{z24\.s-z27\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sel {z0\.d-z3\.d},pn8,{z0\.d-z3\.d},{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sel {z28\.d-z31\.d},pn8,{z0\.d-z3\.d},{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sel {z0\.d-z3\.d},pn8,{z28\.d-z31\.d},{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sel {z0\.d-z3\.d},pn8,{z0\.d-z3\.d},{z28\.d-z31\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sel {z20\.d-z23\.d},pn10,{z4\.d-z7\.d},{z8\.d-z11\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel { ?z0\.b ?- ?z1\.b ?},pn8,{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel { ?z30\.b ?- ?z31\.b ?},pn8,{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel { ?z0\.b ?- ?z1\.b ?},pn15,{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel { ?z0\.b ?- ?z1\.b ?},pn8,{ ?z30\.b ?- ?z31\.b ?},{ ?z0\.b ?- ?z1\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel { ?z0\.b ?- ?z1\.b ?},pn8,{ ?z0\.b ?- ?z1\.b ?},{ ?z30\.b ?- ?z31\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel { ?z2\.b ?- ?z3\.b ?},pn12,{ ?z6\.b ?- ?z7\.b ?},{ ?z10\.b ?- ?z11\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel { ?z0\.h ?- ?z1\.h ?},pn8,{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel { ?z30\.h ?- ?z31\.h ?},pn8,{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel { ?z0\.h ?- ?z1\.h ?},pn15,{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel { ?z0\.h ?- ?z1\.h ?},pn8,{ ?z30\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel { ?z0\.h ?- ?z1\.h ?},pn8,{ ?z0\.h ?- ?z1\.h ?},{ ?z30\.h ?- ?z31\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel { ?z12\.h ?- ?z13\.h ?},pn9,{ ?z14\.h ?- ?z15\.h ?},{ ?z16\.h ?- ?z17\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel { ?z0\.s ?- ?z1\.s ?},pn8,{ ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel { ?z30\.s ?- ?z31\.s ?},pn8,{ ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel { ?z0\.s ?- ?z1\.s ?},pn15,{ ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel { ?z0\.s ?- ?z1\.s ?},pn8,{ ?z30\.s ?- ?z31\.s ?},{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel { ?z0\.s ?- ?z1\.s ?},pn8,{ ?z0\.s ?- ?z1\.s ?},{ ?z30\.s ?- ?z31\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel { ?z18\.s ?- ?z19\.s ?},pn11,{ ?z22\.s ?- ?z23\.s ?},{ ?z24\.s ?- ?z25\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel { ?z0\.d ?- ?z1\.d ?},pn8,{ ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel { ?z30\.d ?- ?z31\.d ?},pn8,{ ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel { ?z0\.d ?- ?z1\.d ?},pn15,{ ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel { ?z0\.d ?- ?z1\.d ?},pn8,{ ?z30\.d ?- ?z31\.d ?},{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel { ?z0\.d ?- ?z1\.d ?},pn8,{ ?z0\.d ?- ?z1\.d ?},{ ?z30\.d ?- ?z31\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel { ?z8\.d ?- ?z9\.d ?},pn14,{ ?z26\.d ?- ?z27\.d ?},{ ?z28\.d ?- ?z29\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel { ?z0\.b ?- ?z3\.b ?},pn8,{ ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel { ?z28\.b ?- ?z31\.b ?},pn8,{ ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel { ?z0\.b ?- ?z3\.b ?},pn8,{ ?z28\.b ?- ?z31\.b ?},{ ?z0\.b ?- ?z3\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel { ?z0\.b ?- ?z3\.b ?},pn8,{ ?z0\.b ?- ?z3\.b ?},{ ?z28\.b ?- ?z31\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel { ?z4\.b ?- ?z7\.b ?},pn10,{ ?z8\.b ?- ?z11\.b ?},{ ?z12\.b ?- ?z15\.b ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel { ?z0\.h ?- ?z3\.h ?},pn8,{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel { ?z28\.h ?- ?z31\.h ?},pn8,{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel { ?z0\.h ?- ?z3\.h ?},pn8,{ ?z28\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel { ?z0\.h ?- ?z3\.h ?},pn8,{ ?z0\.h ?- ?z3\.h ?},{ ?z28\.h ?- ?z31\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel { ?z8\.h ?- ?z11\.h ?},pn10,{ ?z16\.h ?- ?z19\.h ?},{ ?z20\.h ?- ?z23\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel { ?z0\.s ?- ?z3\.s ?},pn8,{ ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel { ?z28\.s ?- ?z31\.s ?},pn8,{ ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel { ?z0\.s ?- ?z3\.s ?},pn8,{ ?z28\.s ?- ?z31\.s ?},{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel { ?z0\.s ?- ?z3\.s ?},pn8,{ ?z0\.s ?- ?z3\.s ?},{ ?z28\.s ?- ?z31\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel { ?z16\.s ?- ?z19\.s ?},pn10,{ ?z20\.s ?- ?z23\.s ?},{ ?z24\.s ?- ?z27\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel { ?z0\.d ?- ?z3\.d ?},pn8,{ ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel { ?z28\.d ?- ?z31\.d ?},pn8,{ ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel { ?z0\.d ?- ?z3\.d ?},pn8,{ ?z28\.d ?- ?z31\.d ?},{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel { ?z0\.d ?- ?z3\.d ?},pn8,{ ?z0\.d ?- ?z3\.d ?},{ ?z28\.d ?- ?z31\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel { ?z20\.d ?- ?z23\.d ?},pn10,{ ?z4\.d ?- ?z7\.d ?},{ ?z8\.d ?- ?z11\.d ?}'
diff --git a/gas/testsuite/gas/aarch64/sme2-8-invalid.l b/gas/testsuite/gas/aarch64/sme2-8-invalid.l
index aef9b1a..3477af0 100644
--- a/gas/testsuite/gas/aarch64/sme2-8-invalid.l
+++ b/gas/testsuite/gas/aarch64/sme2-8-invalid.l
@@ -2,13 +2,13 @@
 [^ :]+:[0-9]+: Error: expected '{' at operand 1 -- `zero 0'
 [^ :]+:[0-9]+: Error: expected '{' at operand 1 -- `zero zt0'
 [^ :]+:[0-9]+: Error: syntax error in register list at operand 1 -- `zero {'
-[^ :]+:[0-9]+: Error: expected ZT0 or a ZA mask at operand 1 -- `zero {foo}'
-[^ :]+:[0-9]+: Error: expected ZT0 or a ZA mask at operand 1 -- `zero {zt}'
-[^ :]+:[0-9]+: Error: expected ZT0 or a ZA mask at operand 1 -- `zero {x0}'
-[^ :]+:[0-9]+: Error: expected ZT0 or a ZA mask at operand 1 -- `zero {z0}'
-[^ :]+:[0-9]+: Error: expected '}' after ZT0 at operand 1 -- `zero {zt0'
-[^ :]+:[0-9]+: Error: expected '}' after ZT0 at operand 1 -- `zero {zt0\.b}'
-[^ :]+:[0-9]+: Error: expected '}' after ZT0 at operand 1 -- `zero {zt0,zt0}'
+[^ :]+:[0-9]+: Error: expected ZT0 or a ZA mask at operand 1 -- `zero { ?foo ?}'
+[^ :]+:[0-9]+: Error: expected ZT0 or a ZA mask at operand 1 -- `zero { ?zt ?}'
+[^ :]+:[0-9]+: Error: expected ZT0 or a ZA mask at operand 1 -- `zero { ?x0 ?}'
+[^ :]+:[0-9]+: Error: expected ZT0 or a ZA mask at operand 1 -- `zero { ?z0 ?}'
+[^ :]+:[0-9]+: Error: expected '}' after ZT0 at operand 1 -- `zero { ?zt0'
+[^ :]+:[0-9]+: Error: expected '}' after ZT0 at operand 1 -- `zero { ?zt0\.b ?}'
+[^ :]+:[0-9]+: Error: expected '}' after ZT0 at operand 1 -- `zero { ?zt0,zt0 ?}'
 [^ :]+:[0-9]+: Error: operand 1 must be an integer register -- `movt 0,zt0\[0\]'
 [^ :]+:[0-9]+: Error: expected a register at operand 2 -- `movt x0,0'
 [^ :]+:[0-9]+: Error: expected an SVE vector register at operand 2 -- `movt zt0,x0'
@@ -79,49 +79,49 @@
 [^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `luti2 0,zt0,z0\[0\]'
 [^ :]+:[0-9]+: Error: expected a register at operand 2 -- `luti2 z0\.b,0,z0\[0\]'
 [^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `luti2 z0\.b,zt0,0'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `luti2 {z1\.b-z2\.b},zt0,z0\[0\]'
-[^ :]+:[0-9]+: Error: unexpected register type at operand 2 -- `luti2 {z0\.b-z1\.b},z0,z0\[0\]'
-[^ :]+:[0-9]+: Error: unexpected register type at operand 2 -- `luti2 {z0\.b-z1\.b},za,z0\[0\]'
-[^ :]+:[0-9]+: Error: operand mismatch -- `luti2 {z0\.h-z1\.h},zt0,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `luti2 { ?z1\.b ?- ?z2\.b ?},zt0,z0\[0\]'
+[^ :]+:[0-9]+: Error: unexpected register type at operand 2 -- `luti2 { ?z0\.b ?- ?z1\.b ?},z0,z0\[0\]'
+[^ :]+:[0-9]+: Error: unexpected register type at operand 2 -- `luti2 { ?z0\.b ?- ?z1\.b ?},za,z0\[0\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `luti2 { ?z0\.h ?- ?z1\.h ?},zt0,z0\.h\[0\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	luti2 {z0\.h-z1\.h}, zt0, z0\[0\]
 [^ :]+:[0-9]+: Info:    other valid variant\(s\):
 [^ :]+:[0-9]+: Info:    	luti2 {z0\.b-z1\.b}, zt0, z0\[0\]
 [^ :]+:[0-9]+: Info:    	luti2 {z0\.s-z1\.s}, zt0, z0\[0\]
-[^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `luti2 {z0\.h-z1\.h},zt0,z0\[-1\]'
-[^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `luti2 {z0\.h-z1\.h},zt0,z0\[8\]'
-[^ :]+:[0-9]+: Error: operand mismatch -- `luti2 {z0\.d-z1\.d},zt0,z0\[0\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `luti2 { ?z0\.h ?- ?z1\.h ?},zt0,z0\[-1\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `luti2 { ?z0\.h ?- ?z1\.h ?},zt0,z0\[8\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `luti2 { ?z0\.d ?- ?z1\.d ?},zt0,z0\[0\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	luti2 {z0\.b-z1\.b}, zt0, z0\[0\]
 [^ :]+:[0-9]+: Info:    other valid variant\(s\):
 [^ :]+:[0-9]+: Info:    	luti2 {z0\.h-z1\.h}, zt0, z0\[0\]
 [^ :]+:[0-9]+: Info:    	luti2 {z0\.s-z1\.s}, zt0, z0\[0\]
-[^ :]+:[0-9]+: Error: operand mismatch -- `luti2 {z0\.q-z1\.q},zt0,z0\[0\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `luti2 { ?z0\.q ?- ?z1\.q ?},zt0,z0\[0\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	luti2 {z0\.b-z1\.b}, zt0, z0\[0\]
 [^ :]+:[0-9]+: Info:    other valid variant\(s\):
 [^ :]+:[0-9]+: Info:    	luti2 {z0\.h-z1\.h}, zt0, z0\[0\]
 [^ :]+:[0-9]+: Info:    	luti2 {z0\.s-z1\.s}, zt0, z0\[0\]
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `luti2 {z1\.s-z4\.s},zt0,z0\[0\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `luti2 {z2\.s-z5\.s},zt0,z0\[0\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `luti2 {z3\.s-z6\.s},zt0,z0\[0\]'
-[^ :]+:[0-9]+: Error: unexpected register type at operand 2 -- `luti2 {z0\.s-z3\.s},z0,z0\[0\]'
-[^ :]+:[0-9]+: Error: unexpected register type at operand 2 -- `luti2 {z0\.b-z3\.b},za,z0\[0\]'
-[^ :]+:[0-9]+: Error: operand mismatch -- `luti2 {z0\.b-z3\.b},zt0,z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `luti2 { ?z1\.s ?- ?z4\.s ?},zt0,z0\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `luti2 { ?z2\.s ?- ?z5\.s ?},zt0,z0\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `luti2 { ?z3\.s ?- ?z6\.s ?},zt0,z0\[0\]'
+[^ :]+:[0-9]+: Error: unexpected register type at operand 2 -- `luti2 { ?z0\.s ?- ?z3\.s ?},z0,z0\[0\]'
+[^ :]+:[0-9]+: Error: unexpected register type at operand 2 -- `luti2 { ?z0\.b ?- ?z3\.b ?},za,z0\[0\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `luti2 { ?z0\.b ?- ?z3\.b ?},zt0,z0\.b\[0\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	luti2 {z0\.b-z3\.b}, zt0, z0\[0\]
 [^ :]+:[0-9]+: Info:    other valid variant\(s\):
 [^ :]+:[0-9]+: Info:    	luti2 {z0\.h-z3\.h}, zt0, z0\[0\]
 [^ :]+:[0-9]+: Info:    	luti2 {z0\.s-z3\.s}, zt0, z0\[0\]
-[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `luti2 {z0\.b-z3\.b},zt0,z0\[-1\]'
-[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `luti2 {z0\.b-z3\.b},zt0,z0\[4\]'
-[^ :]+:[0-9]+: Error: operand mismatch -- `luti2 {z0\.d-z3\.d},zt0,z0\[0\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `luti2 { ?z0\.b ?- ?z3\.b ?},zt0,z0\[-1\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `luti2 { ?z0\.b ?- ?z3\.b ?},zt0,z0\[4\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `luti2 { ?z0\.d ?- ?z3\.d ?},zt0,z0\[0\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	luti2 {z0\.b-z3\.b}, zt0, z0\[0\]
 [^ :]+:[0-9]+: Info:    other valid variant\(s\):
 [^ :]+:[0-9]+: Info:    	luti2 {z0\.h-z3\.h}, zt0, z0\[0\]
 [^ :]+:[0-9]+: Info:    	luti2 {z0\.s-z3\.s}, zt0, z0\[0\]
-[^ :]+:[0-9]+: Error: operand mismatch -- `luti2 {z0\.q-z3\.q},zt0,z0\[0\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `luti2 { ?z0\.q ?- ?z3\.q ?},zt0,z0\[0\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	luti2 {z0\.b-z3\.b}, zt0, z0\[0\]
 [^ :]+:[0-9]+: Info:    other valid variant\(s\):
@@ -157,50 +157,50 @@
 [^ :]+:[0-9]+: Info:    	luti4 z0\.h, zt0, z0\[0\]
 [^ :]+:[0-9]+: Info:    	luti4 z0\.s, zt0, z0\[0\]
 [^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `luti4 z0\.h,zt0,zt0'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `luti4 {z1\.h-z2\.h},zt0,z0\[0\]'
-[^ :]+:[0-9]+: Error: unexpected register type at operand 2 -- `luti4 {z0\.h-z1\.h},z0,z0\[0\]'
-[^ :]+:[0-9]+: Error: unexpected register type at operand 2 -- `luti4 {z0\.h-z1\.h},za,z0\[0\]'
-[^ :]+:[0-9]+: Error: operand mismatch -- `luti4 {z0\.h-z1\.h},zt0,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `luti4 { ?z1\.h ?- ?z2\.h ?},zt0,z0\[0\]'
+[^ :]+:[0-9]+: Error: unexpected register type at operand 2 -- `luti4 { ?z0\.h ?- ?z1\.h ?},z0,z0\[0\]'
+[^ :]+:[0-9]+: Error: unexpected register type at operand 2 -- `luti4 { ?z0\.h ?- ?z1\.h ?},za,z0\[0\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `luti4 { ?z0\.h ?- ?z1\.h ?},zt0,z0\.h\[0\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	luti4 {z0\.h-z1\.h}, zt0, z0\[0\]
 [^ :]+:[0-9]+: Info:    other valid variant\(s\):
 [^ :]+:[0-9]+: Info:    	luti4 {z0\.b-z1\.b}, zt0, z0\[0\]
 [^ :]+:[0-9]+: Info:    	luti4 {z0\.s-z1\.s}, zt0, z0\[0\]
-[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `luti4 {z0\.h-z1\.h},zt0,z0\[-1\]'
-[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `luti4 {z0\.h-z1\.h},zt0,z0\[4\]'
-[^ :]+:[0-9]+: Error: operand mismatch -- `luti4 {z0\.d-z1\.d},zt0,z0\[0\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `luti4 { ?z0\.h ?- ?z1\.h ?},zt0,z0\[-1\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `luti4 { ?z0\.h ?- ?z1\.h ?},zt0,z0\[4\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `luti4 { ?z0\.d ?- ?z1\.d ?},zt0,z0\[0\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	luti4 {z0\.b-z1\.b}, zt0, z0\[0\]
 [^ :]+:[0-9]+: Info:    other valid variant\(s\):
 [^ :]+:[0-9]+: Info:    	luti4 {z0\.h-z1\.h}, zt0, z0\[0\]
 [^ :]+:[0-9]+: Info:    	luti4 {z0\.s-z1\.s}, zt0, z0\[0\]
-[^ :]+:[0-9]+: Error: operand mismatch -- `luti4 {z0\.q-z1\.q},zt0,z0\[0\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `luti4 { ?z0\.q ?- ?z1\.q ?},zt0,z0\[0\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	luti4 {z0\.b-z1\.b}, zt0, z0\[0\]
 [^ :]+:[0-9]+: Info:    other valid variant\(s\):
 [^ :]+:[0-9]+: Info:    	luti4 {z0\.h-z1\.h}, zt0, z0\[0\]
 [^ :]+:[0-9]+: Info:    	luti4 {z0\.s-z1\.s}, zt0, z0\[0\]
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `luti4 {z1\.s-z4\.s},zt0,z0\[0\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `luti4 {z2\.s-z5\.s},zt0,z0\[0\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `luti4 {z3\.s-z6\.s},zt0,z0\[0\]'
-[^ :]+:[0-9]+: Error: unexpected register type at operand 2 -- `luti4 {z0\.s-z3\.s},z0,z0\[0\]'
-[^ :]+:[0-9]+: Error: unexpected register type at operand 2 -- `luti4 {z0\.s-z3\.s},za,z0\[0\]'
-[^ :]+:[0-9]+: Error: operand mismatch -- `luti4 {z0\.s-z3\.s},zt0,z0\.s\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `luti4 { ?z1\.s ?- ?z4\.s ?},zt0,z0\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `luti4 { ?z2\.s ?- ?z5\.s ?},zt0,z0\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `luti4 { ?z3\.s ?- ?z6\.s ?},zt0,z0\[0\]'
+[^ :]+:[0-9]+: Error: unexpected register type at operand 2 -- `luti4 { ?z0\.s ?- ?z3\.s ?},z0,z0\[0\]'
+[^ :]+:[0-9]+: Error: unexpected register type at operand 2 -- `luti4 { ?z0\.s ?- ?z3\.s ?},za,z0\[0\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `luti4 { ?z0\.s ?- ?z3\.s ?},zt0,z0\.s\[0\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	luti4 {z0\.s-z3\.s}, zt0, z0\[0\]
 [^ :]+:[0-9]+: Info:    other valid variant\(s\):
 [^ :]+:[0-9]+: Info:    	luti4 {z0\.b-z3\.b}, zt0, z0\[0\]
 [^ :]+:[0-9]+: Info:    	luti4 {z0\.h-z3\.h}, zt0, z0\[0\]
-[^ :]+:[0-9]+: Error: register element index out of range 0 to 1 at operand 3 -- `luti4 {z0\.s-z3\.s},zt0,z0\[-1\]'
-[^ :]+:[0-9]+: Error: register element index out of range 0 to 1 at operand 3 -- `luti4 {z0\.s-z3\.s},zt0,z0\[2\]'
-[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 1 -- `luti4 {z0\.b-z3\.b},zt0,z0\[0\]'
-[^ :]+:[0-9]+: Error: operand mismatch -- `luti4 {z0\.d-z3\.d},zt0,z0\[0\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 1 at operand 3 -- `luti4 { ?z0\.s ?- ?z3\.s ?},zt0,z0\[-1\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 1 at operand 3 -- `luti4 { ?z0\.s ?- ?z3\.s ?},zt0,z0\[2\]'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 1 -- `luti4 { ?z0\.b ?- ?z3\.b ?},zt0,z0\[0\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `luti4 { ?z0\.d ?- ?z3\.d ?},zt0,z0\[0\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	luti4 {z0\.b-z3\.b}, zt0, z0\[0\]
 [^ :]+:[0-9]+: Info:    other valid variant\(s\):
 [^ :]+:[0-9]+: Info:    	luti4 {z0\.h-z3\.h}, zt0, z0\[0\]
 [^ :]+:[0-9]+: Info:    	luti4 {z0\.s-z3\.s}, zt0, z0\[0\]
-[^ :]+:[0-9]+: Error: operand mismatch -- `luti4 {z0\.q-z3\.q},zt0,z0\[0\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `luti4 { ?z0\.q ?- ?z3\.q ?},zt0,z0\[0\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	luti4 {z0\.b-z3\.b}, zt0, z0\[0\]
 [^ :]+:[0-9]+: Info:    other valid variant\(s\):
diff --git a/gas/testsuite/gas/aarch64/sme2-8-noarch.l b/gas/testsuite/gas/aarch64/sme2-8-noarch.l
index 994b359..149725d 100644
--- a/gas/testsuite/gas/aarch64/sme2-8-noarch.l
+++ b/gas/testsuite/gas/aarch64/sme2-8-noarch.l
@@ -1,6 +1,6 @@
 [^ :]+: Assembler messages:
-[^ :]+:[0-9]+: Error: selected processor does not support `zero {zt0}'
-[^ :]+:[0-9]+: Error: selected processor does not support `zero {ZT0}'
+[^ :]+:[0-9]+: Error: selected processor does not support `zero { ?zt0 ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `zero { ?ZT0 ?}'
 [^ :]+:[0-9]+: Error: selected processor does not support `movt x0,zt0\[0\]'
 [^ :]+:[0-9]+: Error: selected processor does not support `movt X0,ZT0\[0\]'
 [^ :]+:[0-9]+: Error: selected processor does not support `movt x30,zt0\[0\]'
@@ -39,32 +39,32 @@
 [^ :]+:[0-9]+: Error: selected processor does not support `luti2 z31\.s,zt0,z0\[0\]'
 [^ :]+:[0-9]+: Error: selected processor does not support `luti2 z0\.s,zt0,z31\[0\]'
 [^ :]+:[0-9]+: Error: selected processor does not support `luti2 z0\.s,zt0,z0\[15\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `luti2 {z0\.b-z1\.b},zt0,z0\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `luti2 {Z0\.B-Z1\.B},ZT0,Z0\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `luti2 {z30\.b-z31\.b},zt0,z0\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `luti2 {z0\.b-z1\.b},zt0,z31\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `luti2 {z0\.b-z1\.b},zt0,z0\[7\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `luti2 {z0\.h-z1\.h},zt0,z0\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `luti2 {z30\.h-z31\.h},zt0,z0\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `luti2 {z0\.h-z1\.h},zt0,z31\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `luti2 {z0\.h-z1\.h},zt0,z0\[7\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `luti2 {z0\.s-z1\.s},zt0,z0\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `luti2 {z30\.s-z31\.s},zt0,z0\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `luti2 {z0\.s-z1\.s},zt0,z31\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `luti2 {z0\.s-z1\.s},zt0,z0\[7\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `luti2 {z0\.b-z3\.b},zt0,z0\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `luti2 {Z0\.B-Z3\.B},ZT0,Z0\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `luti2 {z28\.b-z31\.b},zt0,z0\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `luti2 {z0\.b-z3\.b},zt0,z31\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `luti2 {z0\.b-z3\.b},zt0,z0\[3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `luti2 {z0\.h-z3\.h},zt0,z0\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `luti2 {z28\.h-z31\.h},zt0,z0\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `luti2 {z0\.h-z3\.h},zt0,z31\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `luti2 {z0\.h-z3\.h},zt0,z0\[3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `luti2 {z0\.s-z3\.s},zt0,z0\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `luti2 {z28\.s-z31\.s},zt0,z0\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `luti2 {z0\.s-z3\.s},zt0,z31\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `luti2 {z0\.s-z3\.s},zt0,z0\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti2 { ?z0\.b ?- ?z1\.b ?},zt0,z0\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti2 { ?Z0\.B ?- ?Z1\.B ?},ZT0,Z0\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti2 { ?z30\.b ?- ?z31\.b ?},zt0,z0\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti2 { ?z0\.b ?- ?z1\.b ?},zt0,z31\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti2 { ?z0\.b ?- ?z1\.b ?},zt0,z0\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti2 { ?z0\.h ?- ?z1\.h ?},zt0,z0\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti2 { ?z30\.h ?- ?z31\.h ?},zt0,z0\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti2 { ?z0\.h ?- ?z1\.h ?},zt0,z31\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti2 { ?z0\.h ?- ?z1\.h ?},zt0,z0\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti2 { ?z0\.s ?- ?z1\.s ?},zt0,z0\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti2 { ?z30\.s ?- ?z31\.s ?},zt0,z0\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti2 { ?z0\.s ?- ?z1\.s ?},zt0,z31\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti2 { ?z0\.s ?- ?z1\.s ?},zt0,z0\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti2 { ?z0\.b ?- ?z3\.b ?},zt0,z0\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti2 { ?Z0\.B ?- ?Z3\.B ?},ZT0,Z0\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti2 { ?z28\.b ?- ?z31\.b ?},zt0,z0\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti2 { ?z0\.b ?- ?z3\.b ?},zt0,z31\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti2 { ?z0\.b ?- ?z3\.b ?},zt0,z0\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti2 { ?z0\.h ?- ?z3\.h ?},zt0,z0\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti2 { ?z28\.h ?- ?z31\.h ?},zt0,z0\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti2 { ?z0\.h ?- ?z3\.h ?},zt0,z31\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti2 { ?z0\.h ?- ?z3\.h ?},zt0,z0\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti2 { ?z0\.s ?- ?z3\.s ?},zt0,z0\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti2 { ?z28\.s ?- ?z31\.s ?},zt0,z0\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti2 { ?z0\.s ?- ?z3\.s ?},zt0,z31\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti2 { ?z0\.s ?- ?z3\.s ?},zt0,z0\[3\]'
 [^ :]+:[0-9]+: Error: selected processor does not support `luti4 z0\.b,zt0,z0\[0\]'
 [^ :]+:[0-9]+: Error: selected processor does not support `luti4 Z0\.b,ZT0,Z0\[0\]'
 [^ :]+:[0-9]+: Error: selected processor does not support `luti4 z31\.b,zt0,z0\[0\]'
@@ -79,26 +79,26 @@
 [^ :]+:[0-9]+: Error: selected processor does not support `luti4 z31\.s,zt0,z0\[0\]'
 [^ :]+:[0-9]+: Error: selected processor does not support `luti4 z0\.s,zt0,z31\[0\]'
 [^ :]+:[0-9]+: Error: selected processor does not support `luti4 z0\.s,zt0,z0\[7\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `luti4 {z0\.b-z1\.b},zt0,z0\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `luti4 {Z0\.b-Z1\.b},ZT0,Z0\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `luti4 {z30\.b-z31\.b},zt0,z0\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `luti4 {z0\.b-z1\.b},zt0,z31\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `luti4 {z0\.b-z1\.b},zt0,z0\[3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `luti4 {z0\.h-z1\.h},zt0,z0\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `luti4 {Z0\.H-Z1\.H},ZT0,Z0\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `luti4 {z30\.h-z31\.h},zt0,z0\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `luti4 {z0\.h-z1\.h},zt0,z31\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `luti4 {z0\.h-z1\.h},zt0,z0\[3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `luti4 {z0\.s-z1\.s},zt0,z0\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `luti4 {z30\.s-z31\.s},zt0,z0\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `luti4 {z0\.s-z1\.s},zt0,z31\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `luti4 {z0\.s-z1\.s},zt0,z0\[3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `luti4 {z0\.h-z3\.h},zt0,z0\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `luti4 {Z0\.H-Z3\.H},ZT0,Z0\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `luti4 {z28\.h-z31\.h},zt0,z0\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `luti4 {z0\.h-z3\.h},zt0,z31\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `luti4 {z0\.h-z3\.h},zt0,z0\[1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `luti4 {z0\.s-z3\.s},zt0,z0\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `luti4 {z28\.s-z31\.s},zt0,z0\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `luti4 {z0\.s-z3\.s},zt0,z31\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `luti4 {z0\.s-z3\.s},zt0,z0\[1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti4 { ?z0\.b ?- ?z1\.b ?},zt0,z0\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti4 { ?Z0\.b ?- ?Z1\.b ?},ZT0,Z0\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti4 { ?z30\.b ?- ?z31\.b ?},zt0,z0\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti4 { ?z0\.b ?- ?z1\.b ?},zt0,z31\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti4 { ?z0\.b ?- ?z1\.b ?},zt0,z0\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti4 { ?z0\.h ?- ?z1\.h ?},zt0,z0\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti4 { ?Z0\.H ?- ?Z1\.H ?},ZT0,Z0\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti4 { ?z30\.h ?- ?z31\.h ?},zt0,z0\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti4 { ?z0\.h ?- ?z1\.h ?},zt0,z31\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti4 { ?z0\.h ?- ?z1\.h ?},zt0,z0\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti4 { ?z0\.s ?- ?z1\.s ?},zt0,z0\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti4 { ?z30\.s ?- ?z31\.s ?},zt0,z0\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti4 { ?z0\.s ?- ?z1\.s ?},zt0,z31\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti4 { ?z0\.s ?- ?z1\.s ?},zt0,z0\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti4 { ?z0\.h ?- ?z3\.h ?},zt0,z0\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti4 { ?Z0\.H ?- ?Z3\.H ?},ZT0,Z0\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti4 { ?z28\.h ?- ?z31\.h ?},zt0,z0\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti4 { ?z0\.h ?- ?z3\.h ?},zt0,z31\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti4 { ?z0\.h ?- ?z3\.h ?},zt0,z0\[1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti4 { ?z0\.s ?- ?z3\.s ?},zt0,z0\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti4 { ?z28\.s ?- ?z31\.s ?},zt0,z0\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti4 { ?z0\.s ?- ?z3\.s ?},zt0,z31\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti4 { ?z0\.s ?- ?z3\.s ?},zt0,z0\[1\]'
diff --git a/gas/testsuite/gas/aarch64/sme2-9-invalid.l b/gas/testsuite/gas/aarch64/sme2-9-invalid.l
index 0063e94..9de408e 100644
--- a/gas/testsuite/gas/aarch64/sme2-9-invalid.l
+++ b/gas/testsuite/gas/aarch64/sme2-9-invalid.l
@@ -1,175 +1,175 @@
 [^ :]+: Assembler messages:
-[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `add 0,{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `add 0,{ ?z0\.s ?- ?z1\.s ?}'
 [^ :]+:[0-9]+: Error: expected '{' at operand 2 -- `add za\.s\[w8,0\],0'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.s\[w7,0\],{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.s\[w12,0\],{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.s\[w8,-1\],{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.s\[w8,8\],{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `add za\.s\[w8,0\],{z0\.s-z2\.s}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `add za\.s\[w8,0\],{z1\.s-z2\.s}'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.s\[w7,0\],{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.s\[w12,0\],{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.s\[w8,-1\],{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.s\[w8,8\],{z1\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `add za\.s\[w8,0\],{z1\.s-z4\.s}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `add za\.s\[w8,0\],{z2\.s-z5\.s}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `add za\.s\[w8,0\],{z3\.s-z6\.s}'
-[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `add za\.s\[w8,0,vgx4\],{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `add za\.s\[w8,0,vgx2\],{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: operand mismatch -- `add za\[w8,0\],{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.s\[w7,0\],{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.s\[w12,0\],{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.s\[w8,-1\],{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.s\[w8,8\],{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `add za\.s\[w8,0\],{ ?z0\.s ?- ?z2\.s ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `add za\.s\[w8,0\],{ ?z1\.s ?- ?z2\.s ?}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.s\[w7,0\],{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.s\[w12,0\],{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.s\[w8,-1\],{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.s\[w8,8\],{ ?z1\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `add za\.s\[w8,0\],{ ?z1\.s ?- ?z4\.s ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `add za\.s\[w8,0\],{ ?z2\.s ?- ?z5\.s ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `add za\.s\[w8,0\],{ ?z3\.s ?- ?z6\.s ?}'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `add za\.s\[w8,0,vgx4\],{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `add za\.s\[w8,0,vgx2\],{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: operand mismatch -- `add za\[w8,0\],{ ?z0\.s ?- ?z1\.s ?}'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	add za\.s\[w8, 0\], {z0\.s-z1\.s}
 [^ :]+:[0-9]+: Info:    other valid variant\(s\):
 [^ :]+:[0-9]+: Info:    	add za\.d\[w8, 0\], {z0\.d-z1\.d}
-[^ :]+:[0-9]+: Error: missing type suffix at operand 2 -- `add za\.s\[w8,0\],{z0-z1}'
-[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `add 0,{z0\.s-z1\.s},z0\.s'
+[^ :]+:[0-9]+: Error: missing type suffix at operand 2 -- `add za\.s\[w8,0\],{ ?z0 ?- ?z1 ?}'
+[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `add 0,{ ?z0\.s ?- ?z1\.s ?},z0\.s'
 [^ :]+:[0-9]+: Error: expected '{' at operand 2 -- `add za\.s\[w8,0\],0,z0\.s'
-[^ :]+:[0-9]+: Error: expected a register or register list at operand 3 -- `add za\.s\[w8,0\],{z0\.s-z1\.s},0'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.s\[w0,0\],{z0\.s-z1\.s},z0\.s'
-[^ :]+:[0-9]+: Error: expected a 32-bit selection register at operand 1 -- `add za\.s\[w31,0\],{z0\.s-z1\.s},z0\.s'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.s\[w8,1<<63\],{z0\.s-z1\.s},z0\.s'
-[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `add za\.s\[w8,0\],{z0\.s-z1\.s},z31\.s'
-[^ :]+:[0-9]+: Error: the last offset is equal to the first offset at operand 1 -- `add za\.s\[w8,0:0\],{z0\.s-z1\.s},z0\.s'
-[^ :]+:[0-9]+: Error: the last offset is less than the first offset at operand 1 -- `add za\.s\[w8,0:-1\],{z0\.s-z1\.s},z0\.s'
-[^ :]+:[0-9]+: Error: expected a single offset rather than a range at operand 1 -- `add za\.s\[w8,0:1\],{z0\.s-z1\.s},z0\.s'
-[^ :]+:[0-9]+: Error: expected a single offset rather than a range at operand 1 -- `add za\.s\[w8,0:100\],{z0\.s-z1\.s},z0\.s'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.s\[w7,0\],{z0\.s-z1\.s},z0\.s'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.s\[w12,0\],{z0\.s-z1\.s},z0\.s'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.s\[w8,-1\],{z0\.s-z1\.s},z0\.s'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.s\[w8,8\],{z0\.s-z1\.s},z0\.s'
-[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `add za\.s\[w8,0\],{z0\.s-z1\.s},z16\.s'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.s\[w7,0\],{z0\.s-z3\.s},z0\.s'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.s\[w12,0\],{z0\.s-z3\.s},z0\.s'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.s\[w8,-1\],{z0\.s-z3\.s},z0\.s'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.s\[w8,8\],{z0\.s-z3\.s},z0\.s'
-[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `add za\.s\[w8,0\],{z0\.s-z3\.s},z16\.s'
-[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `add za\.s\[w8,0\],{z0\.s-z2\.s},z0\.s'
-[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 2 -- `add za\.s\[w8,0\],{z0\.s-z4\.s},z0\.s'
-[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `add za\.s\[w8,0\],{z0\.s,z1\.s,z2\.s},z0\.s'
-[^ :]+:[0-9]+: Error: invalid register list at operand 2 -- `add za\.s\[w8,0\],{z0\.s,z1\.s,z5\.s},z0\.s'
-[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `add za\.s\[w8,0,vgx4\],{z0\.s-z1\.s},z0\.s'
-[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `add za\.s\[w8,0,vgx2\],{z0\.s-z3\.s},z0\.s'
-[^ :]+:[0-9]+: Error: operand mismatch -- `add za\[w8,0\],{z0\.s-z1\.s},z0\.s'
+[^ :]+:[0-9]+: Error: expected a register or register list at operand 3 -- `add za\.s\[w8,0\],{ ?z0\.s ?- ?z1\.s ?},0'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.s\[w0,0\],{ ?z0\.s ?- ?z1\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: expected a 32-bit selection register at operand 1 -- `add za\.s\[w31,0\],{ ?z0\.s ?- ?z1\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.s\[w8,1<<63\],{ ?z0\.s ?- ?z1\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: z0 ?- ?z15 expected at operand 3 -- `add za\.s\[w8,0\],{ ?z0\.s ?- ?z1\.s ?},z31\.s'
+[^ :]+:[0-9]+: Error: the last offset is equal to the first offset at operand 1 -- `add za\.s\[w8,0:0\],{ ?z0\.s ?- ?z1\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: the last offset is less than the first offset at operand 1 -- `add za\.s\[w8,0:-1\],{ ?z0\.s ?- ?z1\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: expected a single offset rather than a range at operand 1 -- `add za\.s\[w8,0:1\],{ ?z0\.s ?- ?z1\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: expected a single offset rather than a range at operand 1 -- `add za\.s\[w8,0:100\],{ ?z0\.s ?- ?z1\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.s\[w7,0\],{ ?z0\.s ?- ?z1\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.s\[w12,0\],{ ?z0\.s ?- ?z1\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.s\[w8,-1\],{ ?z0\.s ?- ?z1\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.s\[w8,8\],{ ?z0\.s ?- ?z1\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: z0 ?- ?z15 expected at operand 3 -- `add za\.s\[w8,0\],{ ?z0\.s ?- ?z1\.s ?},z16\.s'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.s\[w7,0\],{ ?z0\.s ?- ?z3\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.s\[w12,0\],{ ?z0\.s ?- ?z3\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.s\[w8,-1\],{ ?z0\.s ?- ?z3\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.s\[w8,8\],{ ?z0\.s ?- ?z3\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: z0 ?- ?z15 expected at operand 3 -- `add za\.s\[w8,0\],{ ?z0\.s ?- ?z3\.s ?},z16\.s'
+[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `add za\.s\[w8,0\],{ ?z0\.s ?- ?z2\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 2 -- `add za\.s\[w8,0\],{ ?z0\.s ?- ?z4\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `add za\.s\[w8,0\],{ ?z0\.s,z1\.s,z2\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: invalid register list at operand 2 -- `add za\.s\[w8,0\],{ ?z0\.s,z1\.s,z5\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `add za\.s\[w8,0,vgx4\],{ ?z0\.s ?- ?z1\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `add za\.s\[w8,0,vgx2\],{ ?z0\.s ?- ?z3\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: operand mismatch -- `add za\[w8,0\],{ ?z0\.s ?- ?z1\.s ?},z0\.s'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	add za\.s\[w8, 0\], {z0\.s-z1\.s}, z0\.s
 [^ :]+:[0-9]+: Info:    other valid variant\(s\):
 [^ :]+:[0-9]+: Info:    	add za\.d\[w8, 0\], {z0\.d-z1\.d}, z0\.d
-[^ :]+:[0-9]+: Error: missing type suffix at operand 2 -- `add za\.s\[w8,0\],{z0-z1},z0\.s'
-[^ :]+:[0-9]+: Error: operand mismatch -- `add za\.s\[w8,0\],{z0\.s-z1\.s},z0'
+[^ :]+:[0-9]+: Error: missing type suffix at operand 2 -- `add za\.s\[w8,0\],{ ?z0 ?- ?z1 ?},z0\.s'
+[^ :]+:[0-9]+: Error: operand mismatch -- `add za\.s\[w8,0\],{ ?z0\.s ?- ?z1\.s ?},z0'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	add za\.s\[w8, 0\], {z0\.s-z1\.s}, z0\.s
 [^ :]+:[0-9]+: Info:    other valid variant\(s\):
 [^ :]+:[0-9]+: Info:    	add za\.d\[w8, 0\], {z0\.d-z1\.d}, z0\.d
-[^ :]+:[0-9]+: Error: operand mismatch -- `add za\[w8,0\],{z0\.s-z1\.s},z0'
+[^ :]+:[0-9]+: Error: operand mismatch -- `add za\[w8,0\],{ ?z0\.s ?- ?z1\.s ?},z0'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	add za\.s\[w8, 0\], {z0\.s-z1\.s}, z0\.s
 [^ :]+:[0-9]+: Info:    other valid variant\(s\):
 [^ :]+:[0-9]+: Info:    	add za\.d\[w8, 0\], {z0\.d-z1\.d}, z0\.d
-[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.s\[w7,0\],{z0\.s-z1\.s},{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.s\[w12,0\],{z0\.s-z1\.s},{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.s\[w8,-1\],{z0\.s-z1\.s},{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.s\[w8,8\],{z0\.s-z1\.s},{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `add za\.s\[w8,0\],{z1\.s-z2\.s},{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `add za\.s\[w8,0\],{z0\.s-z1\.s},{z15\.s-z16\.s}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `add za\.s\[w8,0\],{z0\.s-z1\.s},{z31\.s,z0\.s}'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.s\[w7,0\],{z0\.s-z3\.s},{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.s\[w12,0\],{z0\.s-z3\.s},{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.s\[w8,-1\],{z0\.s-z3\.s},{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.s\[w8,8\],{z0\.s-z3\.s},{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `add za\.s\[w8,0\],{z1\.s-z4\.s},{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `add za\.s\[w8,0\],{z2\.s-z5\.s},{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `add za\.s\[w8,0\],{z3\.s-z6\.s},{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `add za\.s\[w8,0\],{z0\.s-z3\.s},{z15\.s-z18\.s}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `add za\.s\[w8,0\],{z0\.s-z3\.s},{z29\.s,z30\.s,z31\.s,z0\.s}'
-[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `add za\.s\[w8,0\],{z0\.s-z2\.s},{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `add za\.s\[w8,0\],{z0\.s-z3\.s},{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `add za\.s\[w8,0\],{z0\.s-z1\.s},{z0\.s-z2\.s}'
-[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `add za\.s\[w8,0\],{z0\.s-z1\.s},{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 3 -- `add za\.s\[w8,0\],{z0\.s-z1\.s},{z0\.s-z4\.s}'
-[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `add za\.s\[w8,0,vgx4\],{z0\.s-z1\.s},{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `add za\.s\[w8,0,vgx4\],{z0\.s-z3\.s},{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `add za\.s\[w8,0,vgx2\],{z0\.s-z1\.s},{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `add za\.s\[w8,0,vgx2\],{z0\.s-z3\.s},{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: operand mismatch -- `add za\[w8,0\],{z0\.s-z1\.s},{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.s\[w7,0\],{ ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.s\[w12,0\],{ ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.s\[w8,-1\],{ ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.s\[w8,8\],{ ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `add za\.s\[w8,0\],{ ?z1\.s ?- ?z2\.s ?},{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `add za\.s\[w8,0\],{ ?z0\.s ?- ?z1\.s ?},{ ?z15\.s ?- ?z16\.s ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `add za\.s\[w8,0\],{ ?z0\.s ?- ?z1\.s ?},{ ?z31\.s,z0\.s ?}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.s\[w7,0\],{ ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.s\[w12,0\],{ ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.s\[w8,-1\],{ ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.s\[w8,8\],{ ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `add za\.s\[w8,0\],{ ?z1\.s ?- ?z4\.s ?},{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `add za\.s\[w8,0\],{ ?z2\.s ?- ?z5\.s ?},{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `add za\.s\[w8,0\],{ ?z3\.s ?- ?z6\.s ?},{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `add za\.s\[w8,0\],{ ?z0\.s ?- ?z3\.s ?},{ ?z15\.s ?- ?z18\.s ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `add za\.s\[w8,0\],{ ?z0\.s ?- ?z3\.s ?},{ ?z29\.s,z30\.s,z31\.s,z0\.s ?}'
+[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `add za\.s\[w8,0\],{ ?z0\.s ?- ?z2\.s ?},{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `add za\.s\[w8,0\],{ ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `add za\.s\[w8,0\],{ ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z2\.s ?}'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `add za\.s\[w8,0\],{ ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 3 -- `add za\.s\[w8,0\],{ ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z4\.s ?}'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `add za\.s\[w8,0,vgx4\],{ ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `add za\.s\[w8,0,vgx4\],{ ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `add za\.s\[w8,0,vgx2\],{ ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `add za\.s\[w8,0,vgx2\],{ ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: operand mismatch -- `add za\[w8,0\],{ ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?}'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	add za\.s\[w8, 0\], {z0\.s-z1\.s}, {z0\.s-z1\.s}
 [^ :]+:[0-9]+: Info:    other valid variant\(s\):
 [^ :]+:[0-9]+: Info:    	add za\.d\[w8, 0\], {z0\.d-z1\.d}, {z0\.d-z1\.d}
-[^ :]+:[0-9]+: Error: operand mismatch -- `add za\[w8,0\],{z0\.s-z3\.s},{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: operand mismatch -- `add za\[w8,0\],{ ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?}'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	add za\.s\[w8, 0\], {z0\.s-z3\.s}, {z0\.s-z3\.s}
 [^ :]+:[0-9]+: Info:    other valid variant\(s\):
 [^ :]+:[0-9]+: Info:    	add za\.d\[w8, 0\], {z0\.d-z3\.d}, {z0\.d-z3\.d}
-[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `add {z0\.b-z1\.b},{z0\.b-z2\.b},z0\.b'
-[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `add {z0\.b-z1\.b},{z0\.b-z3\.b},z0\.b'
-[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 1 -- `add {z0\.b-z2\.b},{z0\.b-z2\.b},z0\.b'
-[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `add {z0\.b-z1\.b},{z2\.b-z3\.b},z0\.b'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `add {z1\.b-z2\.b},{z1\.b-z2\.b},z0\.b'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `add {z31\.b,z0\.b},{z31\.b,z0\.b},z0\.b'
-[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `add {z0\.b-z1\.b},{z0\.b-z1\.b},z16\.b'
-[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `add {z0\.b-z1\.b},{z0\.b-z1\.b},z31\.b'
-[^ :]+:[0-9]+: Error: operand mismatch -- `add {z0\.b-z1\.b},{z0\.h-z1\.h},z0\.b'
+[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `add { ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z2\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `add { ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z3\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 1 -- `add { ?z0\.b ?- ?z2\.b ?},{ ?z0\.b ?- ?z2\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `add { ?z0\.b ?- ?z1\.b ?},{ ?z2\.b ?- ?z3\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `add { ?z1\.b ?- ?z2\.b ?},{ ?z1\.b ?- ?z2\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `add { ?z31\.b,z0\.b ?},{ ?z31\.b,z0\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: z0 ?- ?z15 expected at operand 3 -- `add { ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?},z16\.b'
+[^ :]+:[0-9]+: Error: z0 ?- ?z15 expected at operand 3 -- `add { ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?},z31\.b'
+[^ :]+:[0-9]+: Error: operand mismatch -- `add { ?z0\.b ?- ?z1\.b ?},{ ?z0\.h ?- ?z1\.h ?},z0\.b'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	add {z0\.b-z1\.b}, {z0\.b-z1\.b}, z0\.b
 [^ :]+:[0-9]+: Info:    other valid variant\(s\):
 [^ :]+:[0-9]+: Info:    	add {z0\.h-z1\.h}, {z0\.h-z1\.h}, z0\.h
 [^ :]+:[0-9]+: Info:    	add {z0\.s-z1\.s}, {z0\.s-z1\.s}, z0\.s
 [^ :]+:[0-9]+: Info:    	add {z0\.d-z1\.d}, {z0\.d-z1\.d}, z0\.d
-[^ :]+:[0-9]+: Error: operand mismatch -- `add {z0\.b-z1\.b},{z0\.b-z1\.b},z0\.h'
+[^ :]+:[0-9]+: Error: operand mismatch -- `add { ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?},z0\.h'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	add {z0\.b-z1\.b}, {z0\.b-z1\.b}, z0\.b
 [^ :]+:[0-9]+: Info:    other valid variant\(s\):
 [^ :]+:[0-9]+: Info:    	add {z0\.h-z1\.h}, {z0\.h-z1\.h}, z0\.h
 [^ :]+:[0-9]+: Info:    	add {z0\.s-z1\.s}, {z0\.s-z1\.s}, z0\.s
 [^ :]+:[0-9]+: Info:    	add {z0\.d-z1\.d}, {z0\.d-z1\.d}, z0\.d
-[^ :]+:[0-9]+: Error: operand mismatch -- `add {z0\.q-z1\.q},{z0\.q-z1\.q},z0\.q'
+[^ :]+:[0-9]+: Error: operand mismatch -- `add { ?z0\.q ?- ?z1\.q ?},{ ?z0\.q ?- ?z1\.q ?},z0\.q'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	add {z0\.b-z1\.b}, {z0\.b-z1\.b}, z0\.b
 [^ :]+:[0-9]+: Info:    other valid variant\(s\):
 [^ :]+:[0-9]+: Info:    	add {z0\.h-z1\.h}, {z0\.h-z1\.h}, z0\.h
 [^ :]+:[0-9]+: Info:    	add {z0\.s-z1\.s}, {z0\.s-z1\.s}, z0\.s
 [^ :]+:[0-9]+: Info:    	add {z0\.d-z1\.d}, {z0\.d-z1\.d}, z0\.d
-[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `add {z0\.b-z3\.b},{z0\.b-z2\.b},z0\.b'
-[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `add {z0\.b-z3\.b},{z0\.b-z1\.b},z0\.b'
-[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `add {z0\.b-z3\.b},{z2\.b-z5\.b},z0\.b'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `add {z1\.b-z4\.b},{z1\.b-z4\.b},z0\.b'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `add {z2\.b-z5\.b},{z2\.b-z5\.b},z0\.b'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `add {z3\.b-z6\.b},{z3\.b-z6\.b},z0\.b'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `add {z31\.b,z0\.b,z1\.b,z2\.b},{z31\.b,z0\.b,z1\.b,z2\.b},z0\.b'
-[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `add {z0\.b-z3\.b},{z0\.b-z3\.b},z16\.b'
-[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `add {z0\.b-z3\.b},{z0\.b-z3\.b},z31\.b'
-[^ :]+:[0-9]+: Error: operand mismatch -- `add {z0\.b-z3\.b},{z0\.h-z3\.h},z0\.b'
+[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `add { ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z2\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `add { ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z1\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `add { ?z0\.b ?- ?z3\.b ?},{ ?z2\.b ?- ?z5\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `add { ?z1\.b ?- ?z4\.b ?},{ ?z1\.b ?- ?z4\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `add { ?z2\.b ?- ?z5\.b ?},{ ?z2\.b ?- ?z5\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `add { ?z3\.b ?- ?z6\.b ?},{ ?z3\.b ?- ?z6\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `add { ?z31\.b,z0\.b,z1\.b,z2\.b ?},{ ?z31\.b,z0\.b,z1\.b,z2\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: z0 ?- ?z15 expected at operand 3 -- `add { ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?},z16\.b'
+[^ :]+:[0-9]+: Error: z0 ?- ?z15 expected at operand 3 -- `add { ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?},z31\.b'
+[^ :]+:[0-9]+: Error: operand mismatch -- `add { ?z0\.b ?- ?z3\.b ?},{ ?z0\.h ?- ?z3\.h ?},z0\.b'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	add {z0\.b-z3\.b}, {z0\.b-z3\.b}, z0\.b
 [^ :]+:[0-9]+: Info:    other valid variant\(s\):
 [^ :]+:[0-9]+: Info:    	add {z0\.h-z3\.h}, {z0\.h-z3\.h}, z0\.h
 [^ :]+:[0-9]+: Info:    	add {z0\.s-z3\.s}, {z0\.s-z3\.s}, z0\.s
 [^ :]+:[0-9]+: Info:    	add {z0\.d-z3\.d}, {z0\.d-z3\.d}, z0\.d
-[^ :]+:[0-9]+: Error: operand mismatch -- `add {z0\.b-z3\.b},{z0\.b-z3\.b},z0\.h'
+[^ :]+:[0-9]+: Error: operand mismatch -- `add { ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?},z0\.h'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	add {z0\.b-z3\.b}, {z0\.b-z3\.b}, z0\.b
 [^ :]+:[0-9]+: Info:    other valid variant\(s\):
 [^ :]+:[0-9]+: Info:    	add {z0\.h-z3\.h}, {z0\.h-z3\.h}, z0\.h
 [^ :]+:[0-9]+: Info:    	add {z0\.s-z3\.s}, {z0\.s-z3\.s}, z0\.s
 [^ :]+:[0-9]+: Info:    	add {z0\.d-z3\.d}, {z0\.d-z3\.d}, z0\.d
-[^ :]+:[0-9]+: Error: operand mismatch -- `add {z0\.q-z3\.q},{z0\.q-z3\.q},z0\.q'
+[^ :]+:[0-9]+: Error: operand mismatch -- `add { ?z0\.q ?- ?z3\.q ?},{ ?z0\.q ?- ?z3\.q ?},z0\.q'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	add {z0\.b-z3\.b}, {z0\.b-z3\.b}, z0\.b
 [^ :]+:[0-9]+: Info:    other valid variant\(s\):
 [^ :]+:[0-9]+: Info:    	add {z0\.h-z3\.h}, {z0\.h-z3\.h}, z0\.h
 [^ :]+:[0-9]+: Info:    	add {z0\.s-z3\.s}, {z0\.s-z3\.s}, z0\.s
 [^ :]+:[0-9]+: Info:    	add {z0\.d-z3\.d}, {z0\.d-z3\.d}, z0\.d
-[^ :]+:[0-9]+: Error: expected a register at operand 1 -- `sub {z0\.b-z1\.b},{z0\.b-z1\.b},z0\.b'
-[^ :]+:[0-9]+: Error: expected a register at operand 1 -- `sub {z0\.h-z1\.h},{z0\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: expected a register at operand 1 -- `sub {z0\.s-z1\.s},{z0\.s-z1\.s},z0\.s'
-[^ :]+:[0-9]+: Error: expected a register at operand 1 -- `sub {z0\.d-z1\.d},{z0\.d-z1\.d},z0\.d'
-[^ :]+:[0-9]+: Error: expected a register at operand 1 -- `sub {z0\.b-z3\.b},{z0\.b-z3\.b},z0\.b'
-[^ :]+:[0-9]+: Error: expected a register at operand 1 -- `sub {z0\.h-z3\.h},{z0\.h-z3\.h},z0\.h'
-[^ :]+:[0-9]+: Error: expected a register at operand 1 -- `sub {z0\.s-z3\.s},{z0\.s-z3\.s},z0\.s'
-[^ :]+:[0-9]+: Error: expected a register at operand 1 -- `sub {z0\.d-z3\.d},{z0\.d-z3\.d},z0\.d'
-[^ :]+:[0-9]+: Error: operand mismatch -- `fadd za\.b\[w8,0\],{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: expected a register at operand 1 -- `sub { ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: expected a register at operand 1 -- `sub { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: expected a register at operand 1 -- `sub { ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: expected a register at operand 1 -- `sub { ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: expected a register at operand 1 -- `sub { ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: expected a register at operand 1 -- `sub { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: expected a register at operand 1 -- `sub { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: expected a register at operand 1 -- `sub { ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: operand mismatch -- `fadd za\.b\[w8,0\],{ ?z0\.b ?- ?z1\.b ?}'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	fadd za\.s\[w8, 0\], {z0\.s-z1\.s}
 [^ :]+:[0-9]+: Info:    other valid variant\(s\):
 [^ :]+:[0-9]+: Info:    	fadd za\.d\[w8, 0\], {z0\.d-z1\.d}
-[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.h\[w8,0\],{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.h\[w8,0\],{ ?z0\.h ?- ?z1\.h ?}'
diff --git a/gas/testsuite/gas/aarch64/sme2-9-noarch.l b/gas/testsuite/gas/aarch64/sme2-9-noarch.l
index 1a2ad07..c92cfe6 100644
--- a/gas/testsuite/gas/aarch64/sme2-9-noarch.l
+++ b/gas/testsuite/gas/aarch64/sme2-9-noarch.l
@@ -1,177 +1,177 @@
 [^ :]+: Assembler messages:
-[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0\],{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0,vgx2\],{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.s\[W8,0,VGx2\],{Z0\.s-Z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.S\[W8,0,VGX2\],{Z0\.S-Z1\.S}'
-[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w11,0\],{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,7\],{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0\],{z30\.s-z31\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w10,3\],{z10\.s-z11\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0\],{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0,vgx4\],{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.s\[W8,0,VGx4\],{Z0\.s-Z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.S\[W8,0,VGX4\],{Z0\.S-Z3\.S}'
-[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w11,0\],{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,7\],{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0\],{z28\.s-z31\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w11,1\],{z12\.s-z15\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0\],{z0\.s-z1\.s},z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0,vgx2\],{z0\.s-z1\.s},z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.s\[W8,0,VGx2\],{Z0\.s-Z1\.s},Z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.S\[W8,0,VGX2\],{Z0\.S-Z1\.S},Z0\.S'
-[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w11,0\],{z0\.s-z1\.s},z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,7\],{z0\.s-z1\.s},z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0\],{z30\.s-z31\.s},z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0\],{z31\.s,z0\.s},z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0\],{z31\.s-z0\.s},z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0\],{z0\.s-z1\.s},z15\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w9,5\],{z9\.s-z10\.s},z6\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0\],{z0\.s-z3\.s},z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0,vgx4\],{z0\.s-z3\.s},z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.s\[W8,0,VGx4\],{Z0\.s-Z3\.s},Z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.S\[W8,0,VGX4\],{Z0\.S-Z3\.S},Z0\.S'
-[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w11,0\],{z0\.s-z3\.s},z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,7\],{z0\.s-z3\.s},z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0\],{z28\.s-z31\.s},z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0\],{z31\.s,z0\.s,z1\.s,z2\.s},z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0\],{z31\.s-z2\.s},z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0\],{z0\.s-z3\.s},z15\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w11,2\],{z23\.s-z26\.s},z13\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0\],{z0\.s-z1\.s},{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0,vgx2\],{z0\.s-z1\.s},{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.s\[W8,0,VGx2\],{Z0\.s-Z1\.s},{Z0\.s-Z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.S\[W8,0,VGX2\],{Z0\.S-Z1\.S},{Z0\.S-Z1\.S}'
-[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w11,0\],{z0\.s-z1\.s},{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,7\],{z0\.s-z1\.s},{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0\],{z30\.s-z31\.s},{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0\],{z0\.s-z1\.s},{z30\.s-z31\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w10,1\],{z22\.s-z23\.s},{z18\.s-z19\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0\],{z0\.s-z3\.s},{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0,vgx4\],{z0\.s-z3\.s},{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.s\[W8,0,VGx4\],{Z0\.s-Z3\.s},{Z0\.s-Z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.S\[W8,0,VGX4\],{Z0\.S-Z3\.S},{Z0\.S-Z3\.S}'
-[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w11,0\],{z0\.s-z3\.s},{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,7\],{z0\.s-z3\.s},{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0\],{z28\.s-z31\.s},{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0\],{z0\.s-z3\.s},{z28\.s-z31\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w11,3\],{z16\.s-z19\.s},{z24\.s-z27\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `add {z0\.b-z1\.b},{z0\.b-z1\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `add {z30\.b-z31\.b},{z30\.b-z31\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `add {z0\.b-z1\.b},{z0\.b-z1\.b},z15\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `add {z14\.b-z15\.b},{z14\.b-z15\.b},z5\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `add {z0\.h-z1\.h},{z0\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `add {z30\.h-z31\.h},{z30\.h-z31\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `add {z0\.h-z1\.h},{z0\.h-z1\.h},z15\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `add {z20\.h-z21\.h},{z20\.h-z21\.h},z11\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `add {z0\.s-z1\.s},{z0\.s-z1\.s},z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `add {z30\.s-z31\.s},{z30\.s-z31\.s},z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `add {z0\.s-z1\.s},{z0\.s-z1\.s},z15\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `add {z2\.s-z3\.s},{z2\.s-z3\.s},z9\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `add {z0\.d-z1\.d},{z0\.d-z1\.d},z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `add {z30\.d-z31\.d},{z30\.d-z31\.d},z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `add {z0\.d-z1\.d},{z0\.d-z1\.d},z15\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `add {z28\.d-z29\.d},{z28\.d-z29\.d},z1\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `add {z0\.b-z3\.b},{z0\.b-z3\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `add {z28\.b-z31\.b},{z28\.b-z31\.b},z0\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `add {z0\.b-z3\.b},{z0\.b-z3\.b},z15\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `add {z24\.b-z27\.b},{z24\.b-z27\.b},z5\.b'
-[^ :]+:[0-9]+: Error: selected processor does not support `add {z0\.h-z3\.h},{z0\.h-z3\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `add {z28\.h-z31\.h},{z28\.h-z31\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `add {z0\.h-z3\.h},{z0\.h-z3\.h},z15\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `add {z20\.h-z23\.h},{z20\.h-z23\.h},z11\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `add {z0\.s-z3\.s},{z0\.s-z3\.s},z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `add {z28\.s-z31\.s},{z28\.s-z31\.s},z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `add {z0\.s-z3\.s},{z0\.s-z3\.s},z15\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `add {z4\.s-z7\.s},{z4\.s-z7\.s},z9\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `add {z0\.d-z3\.d},{z0\.d-z3\.d},z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `add {z28\.d-z31\.d},{z28\.d-z31\.d},z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `add {z0\.d-z3\.d},{z0\.d-z3\.d},z15\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `add {z16\.d-z19\.d},{z16\.d-z19\.d},z3\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0\],{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0,vgx2\],{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sub ZA\.s\[W8,0,VGx2\],{Z0\.s-Z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sub ZA\.S\[W8,0,VGX2\],{Z0\.S-Z1\.S}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w11,0\],{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,7\],{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0\],{z30\.s-z31\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w10,3\],{z10\.s-z11\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0\],{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0,vgx4\],{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sub ZA\.s\[W8,0,VGx4\],{Z0\.s-Z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sub ZA\.S\[W8,0,VGX4\],{Z0\.S-Z3\.S}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w11,0\],{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,7\],{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0\],{z28\.s-z31\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w11,1\],{z12\.s-z15\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0\],{z0\.s-z1\.s},z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0,vgx2\],{z0\.s-z1\.s},z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `sub ZA\.s\[W8,0,VGx2\],{Z0\.s-Z1\.s},Z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `sub ZA\.S\[W8,0,VGX2\],{Z0\.S-Z1\.S},Z0\.S'
-[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w11,0\],{z0\.s-z1\.s},z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,7\],{z0\.s-z1\.s},z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0\],{z30\.s-z31\.s},z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0\],{z31\.s,z0\.s},z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0\],{z31\.s-z0\.s},z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0\],{z0\.s-z1\.s},z15\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w9,5\],{z9\.s-z10\.s},z6\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0\],{z0\.s-z3\.s},z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0,vgx4\],{z0\.s-z3\.s},z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `sub ZA\.s\[W8,0,VGx4\],{Z0\.s-Z3\.s},Z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `sub ZA\.S\[W8,0,VGX4\],{Z0\.S-Z3\.S},Z0\.S'
-[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w11,0\],{z0\.s-z3\.s},z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,7\],{z0\.s-z3\.s},z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0\],{z28\.s-z31\.s},z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0\],{z31\.s,z0\.s,z1\.s,z2\.s},z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0\],{z31\.s-z2\.s},z0\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0\],{z0\.s-z3\.s},z15\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w11,2\],{z23\.s-z26\.s},z13\.s'
-[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0\],{z0\.s-z1\.s},{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0,vgx2\],{z0\.s-z1\.s},{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sub ZA\.s\[W8,0,VGx2\],{Z0\.s-Z1\.s},{Z0\.s-Z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sub ZA\.S\[W8,0,VGX2\],{Z0\.S-Z1\.S},{Z0\.S-Z1\.S}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w11,0\],{z0\.s-z1\.s},{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,7\],{z0\.s-z1\.s},{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0\],{z30\.s-z31\.s},{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0\],{z0\.s-z1\.s},{z30\.s-z31\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w10,1\],{z22\.s-z23\.s},{z18\.s-z19\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0\],{z0\.s-z3\.s},{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0,vgx4\],{z0\.s-z3\.s},{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sub ZA\.s\[W8,0,VGx4\],{Z0\.s-Z3\.s},{Z0\.s-Z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sub ZA\.S\[W8,0,VGX4\],{Z0\.S-Z3\.S},{Z0\.S-Z3\.S}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w11,0\],{z0\.s-z3\.s},{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,7\],{z0\.s-z3\.s},{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0\],{z28\.s-z31\.s},{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0\],{z0\.s-z3\.s},{z28\.s-z31\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w11,3\],{z16\.s-z19\.s},{z24\.s-z27\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.s\[w8,0\],{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.s\[w8,0,vgx2\],{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fadd ZA\.s\[W8,0,VGx2\],{Z0\.s-Z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fadd ZA\.S\[W8,0,VGX2\],{Z0\.S-Z1\.S}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.s\[w11,0\],{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.s\[w8,7\],{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.s\[w8,0\],{z30\.s-z31\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.s\[w10,3\],{z10\.s-z11\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.s\[w8,0\],{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.s\[w8,0,vgx4\],{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fadd ZA\.s\[W8,0,VGx4\],{Z0\.s-Z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fadd ZA\.S\[W8,0,VGX4\],{Z0\.S-Z3\.S}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.s\[w11,0\],{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.s\[w8,7\],{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.s\[w8,0\],{z28\.s-z31\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.s\[w11,1\],{z12\.s-z15\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.s\[w8,0\],{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.s\[w8,0,vgx2\],{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fsub ZA\.s\[W8,0,VGx2\],{Z0\.s-Z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fsub ZA\.S\[W8,0,VGX2\],{Z0\.S-Z1\.S}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.s\[w11,0\],{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.s\[w8,7\],{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.s\[w8,0\],{z30\.s-z31\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.s\[w10,3\],{z10\.s-z11\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.s\[w8,0\],{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.s\[w8,0,vgx4\],{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fsub ZA\.s\[W8,0,VGx4\],{Z0\.s-Z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fsub ZA\.S\[W8,0,VGX4\],{Z0\.S-Z3\.S}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.s\[w11,0\],{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.s\[w8,7\],{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.s\[w8,0\],{z28\.s-z31\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.s\[w11,1\],{z12\.s-z15\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0\],{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0,vgx2\],{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.s\[W8,0,VGx2\],{ ?Z0\.s ?- ?Z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.S\[W8,0,VGX2\],{ ?Z0\.S ?- ?Z1\.S ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w11,0\],{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,7\],{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0\],{ ?z30\.s ?- ?z31\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w10,3\],{ ?z10\.s ?- ?z11\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0\],{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0,vgx4\],{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.s\[W8,0,VGx4\],{ ?Z0\.s ?- ?Z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.S\[W8,0,VGX4\],{ ?Z0\.S ?- ?Z3\.S ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w11,0\],{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,7\],{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0\],{ ?z28\.s ?- ?z31\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w11,1\],{ ?z12\.s ?- ?z15\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0\],{ ?z0\.s ?- ?z1\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0,vgx2\],{ ?z0\.s ?- ?z1\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.s\[W8,0,VGx2\],{ ?Z0\.s ?- ?Z1\.s ?},Z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.S\[W8,0,VGX2\],{ ?Z0\.S ?- ?Z1\.S ?},Z0\.S'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w11,0\],{ ?z0\.s ?- ?z1\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,7\],{ ?z0\.s ?- ?z1\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0\],{ ?z30\.s ?- ?z31\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0\],{ ?z31\.s,z0\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0\],{ ?z31\.s ?- ?z0\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0\],{ ?z0\.s ?- ?z1\.s ?},z15\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w9,5\],{ ?z9\.s ?- ?z10\.s ?},z6\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0\],{ ?z0\.s ?- ?z3\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0,vgx4\],{ ?z0\.s ?- ?z3\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.s\[W8,0,VGx4\],{ ?Z0\.s ?- ?Z3\.s ?},Z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.S\[W8,0,VGX4\],{ ?Z0\.S ?- ?Z3\.S ?},Z0\.S'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w11,0\],{ ?z0\.s ?- ?z3\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,7\],{ ?z0\.s ?- ?z3\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0\],{ ?z28\.s ?- ?z31\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0\],{ ?z31\.s,z0\.s,z1\.s,z2\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0\],{ ?z31\.s ?- ?z2\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0\],{ ?z0\.s ?- ?z3\.s ?},z15\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w11,2\],{ ?z23\.s ?- ?z26\.s ?},z13\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0\],{ ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0,vgx2\],{ ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.s\[W8,0,VGx2\],{ ?Z0\.s ?- ?Z1\.s ?},{ ?Z0\.s ?- ?Z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.S\[W8,0,VGX2\],{ ?Z0\.S ?- ?Z1\.S ?},{ ?Z0\.S ?- ?Z1\.S ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w11,0\],{ ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,7\],{ ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0\],{ ?z30\.s ?- ?z31\.s ?},{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0\],{ ?z0\.s ?- ?z1\.s ?},{ ?z30\.s ?- ?z31\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w10,1\],{ ?z22\.s ?- ?z23\.s ?},{ ?z18\.s ?- ?z19\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0\],{ ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0,vgx4\],{ ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.s\[W8,0,VGx4\],{ ?Z0\.s ?- ?Z3\.s ?},{ ?Z0\.s ?- ?Z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.S\[W8,0,VGX4\],{ ?Z0\.S ?- ?Z3\.S ?},{ ?Z0\.S ?- ?Z3\.S ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w11,0\],{ ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,7\],{ ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0\],{ ?z28\.s ?- ?z31\.s ?},{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0\],{ ?z0\.s ?- ?z3\.s ?},{ ?z28\.s ?- ?z31\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w11,3\],{ ?z16\.s ?- ?z19\.s ?},{ ?z24\.s ?- ?z27\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add { ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `add { ?z30\.b ?- ?z31\.b ?},{ ?z30\.b ?- ?z31\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `add { ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?},z15\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `add { ?z14\.b ?- ?z15\.b ?},{ ?z14\.b ?- ?z15\.b ?},z5\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `add { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `add { ?z30\.h ?- ?z31\.h ?},{ ?z30\.h ?- ?z31\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `add { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `add { ?z20\.h ?- ?z21\.h ?},{ ?z20\.h ?- ?z21\.h ?},z11\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `add { ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `add { ?z30\.s ?- ?z31\.s ?},{ ?z30\.s ?- ?z31\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `add { ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?},z15\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `add { ?z2\.s ?- ?z3\.s ?},{ ?z2\.s ?- ?z3\.s ?},z9\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `add { ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `add { ?z30\.d ?- ?z31\.d ?},{ ?z30\.d ?- ?z31\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `add { ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?},z15\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `add { ?z28\.d ?- ?z29\.d ?},{ ?z28\.d ?- ?z29\.d ?},z1\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `add { ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `add { ?z28\.b ?- ?z31\.b ?},{ ?z28\.b ?- ?z31\.b ?},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `add { ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?},z15\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `add { ?z24\.b ?- ?z27\.b ?},{ ?z24\.b ?- ?z27\.b ?},z5\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `add { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `add { ?z28\.h ?- ?z31\.h ?},{ ?z28\.h ?- ?z31\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `add { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `add { ?z20\.h ?- ?z23\.h ?},{ ?z20\.h ?- ?z23\.h ?},z11\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `add { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `add { ?z28\.s ?- ?z31\.s ?},{ ?z28\.s ?- ?z31\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `add { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?},z15\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `add { ?z4\.s ?- ?z7\.s ?},{ ?z4\.s ?- ?z7\.s ?},z9\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `add { ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `add { ?z28\.d ?- ?z31\.d ?},{ ?z28\.d ?- ?z31\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `add { ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?},z15\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `add { ?z16\.d ?- ?z19\.d ?},{ ?z16\.d ?- ?z19\.d ?},z3\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0\],{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0,vgx2\],{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sub ZA\.s\[W8,0,VGx2\],{ ?Z0\.s ?- ?Z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sub ZA\.S\[W8,0,VGX2\],{ ?Z0\.S ?- ?Z1\.S ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w11,0\],{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,7\],{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0\],{ ?z30\.s ?- ?z31\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w10,3\],{ ?z10\.s ?- ?z11\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0\],{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0,vgx4\],{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sub ZA\.s\[W8,0,VGx4\],{ ?Z0\.s ?- ?Z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sub ZA\.S\[W8,0,VGX4\],{ ?Z0\.S ?- ?Z3\.S ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w11,0\],{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,7\],{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0\],{ ?z28\.s ?- ?z31\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w11,1\],{ ?z12\.s ?- ?z15\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0\],{ ?z0\.s ?- ?z1\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0,vgx2\],{ ?z0\.s ?- ?z1\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `sub ZA\.s\[W8,0,VGx2\],{ ?Z0\.s ?- ?Z1\.s ?},Z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `sub ZA\.S\[W8,0,VGX2\],{ ?Z0\.S ?- ?Z1\.S ?},Z0\.S'
+[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w11,0\],{ ?z0\.s ?- ?z1\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,7\],{ ?z0\.s ?- ?z1\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0\],{ ?z30\.s ?- ?z31\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0\],{ ?z31\.s,z0\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0\],{ ?z31\.s ?- ?z0\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0\],{ ?z0\.s ?- ?z1\.s ?},z15\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w9,5\],{ ?z9\.s ?- ?z10\.s ?},z6\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0\],{ ?z0\.s ?- ?z3\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0,vgx4\],{ ?z0\.s ?- ?z3\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `sub ZA\.s\[W8,0,VGx4\],{ ?Z0\.s ?- ?Z3\.s ?},Z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `sub ZA\.S\[W8,0,VGX4\],{ ?Z0\.S ?- ?Z3\.S ?},Z0\.S'
+[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w11,0\],{ ?z0\.s ?- ?z3\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,7\],{ ?z0\.s ?- ?z3\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0\],{ ?z28\.s ?- ?z31\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0\],{ ?z31\.s,z0\.s,z1\.s,z2\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0\],{ ?z31\.s ?- ?z2\.s ?},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0\],{ ?z0\.s ?- ?z3\.s ?},z15\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w11,2\],{ ?z23\.s ?- ?z26\.s ?},z13\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0\],{ ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0,vgx2\],{ ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sub ZA\.s\[W8,0,VGx2\],{ ?Z0\.s ?- ?Z1\.s ?},{ ?Z0\.s ?- ?Z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sub ZA\.S\[W8,0,VGX2\],{ ?Z0\.S ?- ?Z1\.S ?},{ ?Z0\.S ?- ?Z1\.S ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w11,0\],{ ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,7\],{ ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0\],{ ?z30\.s ?- ?z31\.s ?},{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0\],{ ?z0\.s ?- ?z1\.s ?},{ ?z30\.s ?- ?z31\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w10,1\],{ ?z22\.s ?- ?z23\.s ?},{ ?z18\.s ?- ?z19\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0\],{ ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0,vgx4\],{ ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sub ZA\.s\[W8,0,VGx4\],{ ?Z0\.s ?- ?Z3\.s ?},{ ?Z0\.s ?- ?Z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sub ZA\.S\[W8,0,VGX4\],{ ?Z0\.S ?- ?Z3\.S ?},{ ?Z0\.S ?- ?Z3\.S ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w11,0\],{ ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,7\],{ ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0\],{ ?z28\.s ?- ?z31\.s ?},{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0\],{ ?z0\.s ?- ?z3\.s ?},{ ?z28\.s ?- ?z31\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w11,3\],{ ?z16\.s ?- ?z19\.s ?},{ ?z24\.s ?- ?z27\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.s\[w8,0\],{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.s\[w8,0,vgx2\],{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fadd ZA\.s\[W8,0,VGx2\],{ ?Z0\.s ?- ?Z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fadd ZA\.S\[W8,0,VGX2\],{ ?Z0\.S ?- ?Z1\.S ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.s\[w11,0\],{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.s\[w8,7\],{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.s\[w8,0\],{ ?z30\.s ?- ?z31\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.s\[w10,3\],{ ?z10\.s ?- ?z11\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.s\[w8,0\],{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.s\[w8,0,vgx4\],{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fadd ZA\.s\[W8,0,VGx4\],{ ?Z0\.s ?- ?Z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fadd ZA\.S\[W8,0,VGX4\],{ ?Z0\.S ?- ?Z3\.S ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.s\[w11,0\],{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.s\[w8,7\],{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.s\[w8,0\],{ ?z28\.s ?- ?z31\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.s\[w11,1\],{ ?z12\.s ?- ?z15\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.s\[w8,0\],{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.s\[w8,0,vgx2\],{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fsub ZA\.s\[W8,0,VGx2\],{ ?Z0\.s ?- ?Z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fsub ZA\.S\[W8,0,VGX2\],{ ?Z0\.S ?- ?Z1\.S ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.s\[w11,0\],{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.s\[w8,7\],{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.s\[w8,0\],{ ?z30\.s ?- ?z31\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.s\[w10,3\],{ ?z10\.s ?- ?z11\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.s\[w8,0\],{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.s\[w8,0,vgx4\],{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fsub ZA\.s\[W8,0,VGx4\],{ ?Z0\.s ?- ?Z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fsub ZA\.S\[W8,0,VGX4\],{ ?Z0\.S ?- ?Z3\.S ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.s\[w11,0\],{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.s\[w8,7\],{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.s\[w8,0\],{ ?z28\.s ?- ?z31\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.s\[w11,1\],{ ?z12\.s ?- ?z15\.s ?}'
diff --git a/gas/testsuite/gas/aarch64/sme2-f64f64-1-invalid.l b/gas/testsuite/gas/aarch64/sme2-f64f64-1-invalid.l
index 60ee8bd..a7e3ac0 100644
--- a/gas/testsuite/gas/aarch64/sme2-f64f64-1-invalid.l
+++ b/gas/testsuite/gas/aarch64/sme2-f64f64-1-invalid.l
@@ -1,26 +1,26 @@
 [^ :]+: Assembler messages:
-[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fadd za\.d\[w7,0\],{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fadd za\.d\[w12,0\],{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fadd za\.d\[w8,-1\],{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fadd za\.d\[w8,8\],{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `fadd za\.d\[w8,0\],{z0\.d-z2\.d}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fadd za\.d\[w8,0\],{z1\.d-z2\.d}'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fadd za\.d\[w7,0\],{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fadd za\.d\[w12,0\],{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fadd za\.d\[w8,-1\],{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fadd za\.d\[w8,8\],{z1\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fadd za\.d\[w8,0\],{z1\.d-z4\.d}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fadd za\.d\[w8,0\],{z2\.d-z5\.d}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fadd za\.d\[w8,0\],{z3\.d-z6\.d}'
-[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `fadd za\.d\[w8,0,vgx4\],{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `fadd za\.d\[w8,0,vgx2\],{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: operand mismatch -- `fadd za\[w8,0\],{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fadd za\.d\[w7,0\],{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fadd za\.d\[w12,0\],{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fadd za\.d\[w8,-1\],{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fadd za\.d\[w8,8\],{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `fadd za\.d\[w8,0\],{ ?z0\.d ?- ?z2\.d ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fadd za\.d\[w8,0\],{ ?z1\.d ?- ?z2\.d ?}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fadd za\.d\[w7,0\],{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fadd za\.d\[w12,0\],{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fadd za\.d\[w8,-1\],{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fadd za\.d\[w8,8\],{ ?z1\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fadd za\.d\[w8,0\],{ ?z1\.d ?- ?z4\.d ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fadd za\.d\[w8,0\],{ ?z2\.d ?- ?z5\.d ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fadd za\.d\[w8,0\],{ ?z3\.d ?- ?z6\.d ?}'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `fadd za\.d\[w8,0,vgx4\],{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `fadd za\.d\[w8,0,vgx2\],{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: operand mismatch -- `fadd za\[w8,0\],{ ?z0\.d ?- ?z1\.d ?}'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	fadd za\.d\[w8, 0\], {z0\.d-z1\.d}
 [^ :]+:[0-9]+: Info:    other valid variant\(s\):
 [^ :]+:[0-9]+: Info:    	fadd za\.s\[w8, 0\], {z0\.s-z1\.s}
-[^ :]+:[0-9]+: Error: missing type suffix at operand 2 -- `fadd za\.d\[w8,0\],{z0-z1}'
-[^ :]+:[0-9]+: Error: operand mismatch -- `fadd za\.d\[w8,0\],{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: missing type suffix at operand 2 -- `fadd za\.d\[w8,0\],{ ?z0 ?- ?z1 ?}'
+[^ :]+:[0-9]+: Error: operand mismatch -- `fadd za\.d\[w8,0\],{ ?z0\.s ?- ?z1\.s ?}'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	fadd za\.s\[w8, 0\], {z0\.s-z1\.s}
 [^ :]+:[0-9]+: Info:    other valid variant\(s\):
diff --git a/gas/testsuite/gas/aarch64/sme2-f64f64-1-noarch.l b/gas/testsuite/gas/aarch64/sme2-f64f64-1-noarch.l
index f3750f5..220d8f6 100644
--- a/gas/testsuite/gas/aarch64/sme2-f64f64-1-noarch.l
+++ b/gas/testsuite/gas/aarch64/sme2-f64f64-1-noarch.l
@@ -1,33 +1,33 @@
 [^ :]+: Assembler messages:
-[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.d\[w8,0\],{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.d\[w8,0,vgx2\],{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fadd ZA\.d\[W8,0,VGx2\],{Z0\.d-Z1\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fadd ZA\.D\[W8,0,VGX2\],{Z0\.D-Z1\.D}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.d\[w11,0\],{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.d\[w8,7\],{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.d\[w8,0\],{z30\.d-z31\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.d\[w10,3\],{z10\.d-z11\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.d\[w8,0\],{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.d\[w8,0,vgx4\],{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fadd ZA\.d\[W8,0,VGx4\],{Z0\.d-Z3\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fadd ZA\.D\[W8,0,VGX4\],{Z0\.D-Z3\.D}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.d\[w11,0\],{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.d\[w8,7\],{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.d\[w8,0\],{z28\.d-z31\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.d\[w11,1\],{z12\.d-z15\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.d\[w8,0\],{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.d\[w8,0,vgx2\],{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fsub ZA\.d\[W8,0,VGx2\],{Z0\.d-Z1\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fsub ZA\.D\[W8,0,VGX2\],{Z0\.D-Z1\.D}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.d\[w11,0\],{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.d\[w8,7\],{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.d\[w8,0\],{z30\.d-z31\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.d\[w10,3\],{z10\.d-z11\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.d\[w8,0\],{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.d\[w8,0,vgx4\],{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fsub ZA\.d\[W8,0,VGx4\],{Z0\.d-Z3\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fsub ZA\.D\[W8,0,VGX4\],{Z0\.D-Z3\.D}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.d\[w11,0\],{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.d\[w8,7\],{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.d\[w8,0\],{z28\.d-z31\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.d\[w11,1\],{z12\.d-z15\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.d\[w8,0\],{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.d\[w8,0,vgx2\],{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fadd ZA\.d\[W8,0,VGx2\],{ ?Z0\.d ?- ?Z1\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fadd ZA\.D\[W8,0,VGX2\],{ ?Z0\.D ?- ?Z1\.D ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.d\[w11,0\],{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.d\[w8,7\],{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.d\[w8,0\],{ ?z30\.d ?- ?z31\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.d\[w10,3\],{ ?z10\.d ?- ?z11\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.d\[w8,0\],{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.d\[w8,0,vgx4\],{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fadd ZA\.d\[W8,0,VGx4\],{ ?Z0\.d ?- ?Z3\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fadd ZA\.D\[W8,0,VGX4\],{ ?Z0\.D ?- ?Z3\.D ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.d\[w11,0\],{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.d\[w8,7\],{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.d\[w8,0\],{ ?z28\.d ?- ?z31\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.d\[w11,1\],{ ?z12\.d ?- ?z15\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.d\[w8,0\],{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.d\[w8,0,vgx2\],{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fsub ZA\.d\[W8,0,VGx2\],{ ?Z0\.d ?- ?Z1\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fsub ZA\.D\[W8,0,VGX2\],{ ?Z0\.D ?- ?Z1\.D ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.d\[w11,0\],{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.d\[w8,7\],{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.d\[w8,0\],{ ?z30\.d ?- ?z31\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.d\[w10,3\],{ ?z10\.d ?- ?z11\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.d\[w8,0\],{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.d\[w8,0,vgx4\],{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fsub ZA\.d\[W8,0,VGx4\],{ ?Z0\.d ?- ?Z3\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fsub ZA\.D\[W8,0,VGX4\],{ ?Z0\.D ?- ?Z3\.D ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.d\[w11,0\],{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.d\[w8,7\],{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.d\[w8,0\],{ ?z28\.d ?- ?z31\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.d\[w11,1\],{ ?z12\.d ?- ?z15\.d ?}'
diff --git a/gas/testsuite/gas/aarch64/sme2-f64f64-2-invalid.l b/gas/testsuite/gas/aarch64/sme2-f64f64-2-invalid.l
index 97b0db1..45ba11a 100644
--- a/gas/testsuite/gas/aarch64/sme2-f64f64-2-invalid.l
+++ b/gas/testsuite/gas/aarch64/sme2-f64f64-2-invalid.l
@@ -1,97 +1,97 @@
 [^ :]+: Assembler messages:
-[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.d\[w7,0\],{z0\.d-z1\.d},z0\.d\[0\]'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.d\[w12,0\],{z0\.d-z1\.d},z0\.d\[0\]'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.d\[w8,-1\],{z0\.d-z1\.d},z0\.d\[0\]'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.d\[w8,8\],{z0\.d-z1\.d},z0\.d\[0\]'
-[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `fmla za\.d\[w8,0,vgx4\],{z0\.d-z1\.d},z0\.d\[0\]'
-[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `fmla za\.d\[w8,0\],{z0\.d-z2\.d},z0\.d\[0\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fmla za\.d\[w8,0\],{z1\.d-z2\.d},z0\.d\[0\]'
-[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `fmla za\.d\[w8,0\],{z0\.d-z1\.d},z16\.d\[0\]'
-[^ :]+:[0-9]+: Error: register element index out of range 0 to 1 at operand 3 -- `fmla za\.d\[w8,0\],{z0\.d-z1\.d},z0\.d\[-1\]'
-[^ :]+:[0-9]+: Error: register element index out of range 0 to 1 at operand 3 -- `fmla za\.d\[w8,0\],{z0\.d-z1\.d},z0\.d\[2\]'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.d\[w7,0\],{z0\.d-z3\.d},z0\.d\[0\]'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.d\[w12,0\],{z0\.d-z3\.d},z0\.d\[0\]'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.d\[w8,-1\],{z0\.d-z3\.d},z0\.d\[0\]'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.d\[w8,8\],{z0\.d-z3\.d},z0\.d\[0\]'
-[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `fmla za\.d\[w8,0,vgx2\],{z0\.d-z3\.d},z0\.d\[0\]'
-[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 2 -- `fmla za\.d\[w8,0\],{z0\.d-z4\.d},z0\.d\[0\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fmla za\.d\[w8,0\],{z1\.d-z4\.d},z0\.d\[0\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fmla za\.d\[w8,0\],{z2\.d-z5\.d},z0\.d\[0\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fmla za\.d\[w8,0\],{z3\.d-z6\.d},z0\.d\[0\]'
-[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `fmla za\.d\[w8,0\],{z0\.d-z3\.d},z16\.d\[0\]'
-[^ :]+:[0-9]+: Error: register element index out of range 0 to 1 at operand 3 -- `fmla za\.d\[w8,0\],{z0\.d-z3\.d},z0\.d\[-1\]'
-[^ :]+:[0-9]+: Error: register element index out of range 0 to 1 at operand 3 -- `fmla za\.d\[w8,0\],{z0\.d-z3\.d},z0\.d\[2\]'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.d\[w0,0\],{z0\.d-z1\.d},z0\.d'
-[^ :]+:[0-9]+: Error: expected a 32-bit selection register at operand 1 -- `fmla za\.d\[w31,0\],{z0\.d-z1\.d},z0\.d'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.d\[w8,1<<63\],{z0\.d-z1\.d},z0\.d'
-[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `fmla za\.d\[w8,0\],{z0\.d-z1\.d},z31\.d'
-[^ :]+:[0-9]+: Error: the last offset is equal to the first offset at operand 1 -- `fmla za\.d\[w8,0:0\],{z0\.d-z1\.d},z0\.d'
-[^ :]+:[0-9]+: Error: the last offset is less than the first offset at operand 1 -- `fmla za\.d\[w8,0:-1\],{z0\.d-z1\.d},z0\.d'
-[^ :]+:[0-9]+: Error: expected a single offset rather than a range at operand 1 -- `fmla za\.d\[w8,0:1\],{z0\.d-z1\.d},z0\.d'
-[^ :]+:[0-9]+: Error: expected a single offset rather than a range at operand 1 -- `fmla za\.d\[w8,0:100\],{z0\.d-z1\.d},z0\.d'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.d\[w7,0\],{z0\.d-z1\.d},z0\.d'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.d\[w12,0\],{z0\.d-z1\.d},z0\.d'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.d\[w8,-1\],{z0\.d-z1\.d},z0\.d'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.d\[w8,8\],{z0\.d-z1\.d},z0\.d'
-[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `fmla za\.d\[w8,0\],{z0\.d-z1\.d},z16\.d'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.d\[w7,0\],{z0\.d-z3\.d},z0\.d'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.d\[w12,0\],{z0\.d-z3\.d},z0\.d'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.d\[w8,-1\],{z0\.d-z3\.d},z0\.d'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.d\[w8,8\],{z0\.d-z3\.d},z0\.d'
-[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `fmla za\.d\[w8,0\],{z0\.d-z3\.d},z16\.d'
-[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `fmla za\.d\[w8,0\],{z0\.d-z2\.d},z0\.d'
-[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 2 -- `fmla za\.d\[w8,0\],{z0\.d-z4\.d},z0\.d'
-[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `fmla za\.d\[w8,0\],{z0\.d,z1\.d,z2\.d},z0\.d'
-[^ :]+:[0-9]+: Error: invalid register list at operand 2 -- `fmla za\.d\[w8,0\],{z0\.d,z1\.d,z5\.d},z0\.d'
-[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `fmla za\.d\[w8,0,vgx4\],{z0\.d-z1\.d},z0\.d'
-[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `fmla za\.d\[w8,0,vgx2\],{z0\.d-z3\.d},z0\.d'
-[^ :]+:[0-9]+: Error: operand mismatch -- `fmla za\[w8,0\],{z0\.d-z1\.d},z0\.d'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.d\[w7,0\],{ ?z0\.d ?- ?z1\.d ?},z0\.d\[0\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.d\[w12,0\],{ ?z0\.d ?- ?z1\.d ?},z0\.d\[0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.d\[w8,-1\],{ ?z0\.d ?- ?z1\.d ?},z0\.d\[0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.d\[w8,8\],{ ?z0\.d ?- ?z1\.d ?},z0\.d\[0\]'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `fmla za\.d\[w8,0,vgx4\],{ ?z0\.d ?- ?z1\.d ?},z0\.d\[0\]'
+[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `fmla za\.d\[w8,0\],{ ?z0\.d ?- ?z2\.d ?},z0\.d\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fmla za\.d\[w8,0\],{ ?z1\.d ?- ?z2\.d ?},z0\.d\[0\]'
+[^ :]+:[0-9]+: Error: z0 ?- ?z15 expected at operand 3 -- `fmla za\.d\[w8,0\],{ ?z0\.d ?- ?z1\.d ?},z16\.d\[0\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 1 at operand 3 -- `fmla za\.d\[w8,0\],{ ?z0\.d ?- ?z1\.d ?},z0\.d\[-1\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 1 at operand 3 -- `fmla za\.d\[w8,0\],{ ?z0\.d ?- ?z1\.d ?},z0\.d\[2\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.d\[w7,0\],{ ?z0\.d ?- ?z3\.d ?},z0\.d\[0\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.d\[w12,0\],{ ?z0\.d ?- ?z3\.d ?},z0\.d\[0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.d\[w8,-1\],{ ?z0\.d ?- ?z3\.d ?},z0\.d\[0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.d\[w8,8\],{ ?z0\.d ?- ?z3\.d ?},z0\.d\[0\]'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `fmla za\.d\[w8,0,vgx2\],{ ?z0\.d ?- ?z3\.d ?},z0\.d\[0\]'
+[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 2 -- `fmla za\.d\[w8,0\],{ ?z0\.d ?- ?z4\.d ?},z0\.d\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fmla za\.d\[w8,0\],{ ?z1\.d ?- ?z4\.d ?},z0\.d\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fmla za\.d\[w8,0\],{ ?z2\.d ?- ?z5\.d ?},z0\.d\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fmla za\.d\[w8,0\],{ ?z3\.d ?- ?z6\.d ?},z0\.d\[0\]'
+[^ :]+:[0-9]+: Error: z0 ?- ?z15 expected at operand 3 -- `fmla za\.d\[w8,0\],{ ?z0\.d ?- ?z3\.d ?},z16\.d\[0\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 1 at operand 3 -- `fmla za\.d\[w8,0\],{ ?z0\.d ?- ?z3\.d ?},z0\.d\[-1\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 1 at operand 3 -- `fmla za\.d\[w8,0\],{ ?z0\.d ?- ?z3\.d ?},z0\.d\[2\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.d\[w0,0\],{ ?z0\.d ?- ?z1\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: expected a 32-bit selection register at operand 1 -- `fmla za\.d\[w31,0\],{ ?z0\.d ?- ?z1\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.d\[w8,1<<63\],{ ?z0\.d ?- ?z1\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: z0 ?- ?z15 expected at operand 3 -- `fmla za\.d\[w8,0\],{ ?z0\.d ?- ?z1\.d ?},z31\.d'
+[^ :]+:[0-9]+: Error: the last offset is equal to the first offset at operand 1 -- `fmla za\.d\[w8,0:0\],{ ?z0\.d ?- ?z1\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: the last offset is less than the first offset at operand 1 -- `fmla za\.d\[w8,0:-1\],{ ?z0\.d ?- ?z1\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: expected a single offset rather than a range at operand 1 -- `fmla za\.d\[w8,0:1\],{ ?z0\.d ?- ?z1\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: expected a single offset rather than a range at operand 1 -- `fmla za\.d\[w8,0:100\],{ ?z0\.d ?- ?z1\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.d\[w7,0\],{ ?z0\.d ?- ?z1\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.d\[w12,0\],{ ?z0\.d ?- ?z1\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.d\[w8,-1\],{ ?z0\.d ?- ?z1\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.d\[w8,8\],{ ?z0\.d ?- ?z1\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: z0 ?- ?z15 expected at operand 3 -- `fmla za\.d\[w8,0\],{ ?z0\.d ?- ?z1\.d ?},z16\.d'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.d\[w7,0\],{ ?z0\.d ?- ?z3\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.d\[w12,0\],{ ?z0\.d ?- ?z3\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.d\[w8,-1\],{ ?z0\.d ?- ?z3\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.d\[w8,8\],{ ?z0\.d ?- ?z3\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: z0 ?- ?z15 expected at operand 3 -- `fmla za\.d\[w8,0\],{ ?z0\.d ?- ?z3\.d ?},z16\.d'
+[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `fmla za\.d\[w8,0\],{ ?z0\.d ?- ?z2\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 2 -- `fmla za\.d\[w8,0\],{ ?z0\.d ?- ?z4\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `fmla za\.d\[w8,0\],{ ?z0\.d,z1\.d,z2\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: invalid register list at operand 2 -- `fmla za\.d\[w8,0\],{ ?z0\.d,z1\.d,z5\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `fmla za\.d\[w8,0,vgx4\],{ ?z0\.d ?- ?z1\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `fmla za\.d\[w8,0,vgx2\],{ ?z0\.d ?- ?z3\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: operand mismatch -- `fmla za\[w8,0\],{ ?z0\.d ?- ?z1\.d ?},z0\.d'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	fmla za\.d\[w8, 0\], {z0\.d-z1\.d}, z0\.d
 [^ :]+:[0-9]+: Info:    other valid variant\(s\):
 [^ :]+:[0-9]+: Info:    	fmla za\.s\[w8, 0\], {z0\.s-z1\.s}, z0\.s
-[^ :]+:[0-9]+: Error: missing type suffix at operand 2 -- `fmla za\.d\[w8,0\],{z0-z1},z0\.d'
-[^ :]+:[0-9]+: Error: operand mismatch -- `fmla za\.d\[w8,0\],{z0\.d-z1\.d},z0'
+[^ :]+:[0-9]+: Error: missing type suffix at operand 2 -- `fmla za\.d\[w8,0\],{ ?z0 ?- ?z1 ?},z0\.d'
+[^ :]+:[0-9]+: Error: operand mismatch -- `fmla za\.d\[w8,0\],{ ?z0\.d ?- ?z1\.d ?},z0'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	fmla za\.d\[w8, 0\], {z0\.d-z1\.d}, z0\.d
 [^ :]+:[0-9]+: Info:    other valid variant\(s\):
 [^ :]+:[0-9]+: Info:    	fmla za\.s\[w8, 0\], {z0\.s-z1\.s}, z0\.s
-[^ :]+:[0-9]+: Error: operand mismatch -- `fmla za\[w8,0\],{z0\.d-z1\.d},z0'
+[^ :]+:[0-9]+: Error: operand mismatch -- `fmla za\[w8,0\],{ ?z0\.d ?- ?z1\.d ?},z0'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	fmla za\.d\[w8, 0\], {z0\.d-z1\.d}, z0\.d
 [^ :]+:[0-9]+: Info:    other valid variant\(s\):
 [^ :]+:[0-9]+: Info:    	fmla za\.s\[w8, 0\], {z0\.s-z1\.s}, z0\.s
-[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.d\[w7,0\],{z0\.d-z1\.d},{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.d\[w12,0\],{z0\.d-z1\.d},{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.d\[w8,-1\],{z0\.d-z1\.d},{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.d\[w8,8\],{z0\.d-z1\.d},{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fmla za\.d\[w8,0\],{z1\.d-z2\.d},{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `fmla za\.d\[w8,0\],{z0\.d-z1\.d},{z15\.d-z16\.d}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `fmla za\.d\[w8,0\],{z0\.d-z1\.d},{z31\.d,z0\.d}'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.d\[w7,0\],{z0\.d-z3\.d},{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.d\[w12,0\],{z0\.d-z3\.d},{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.d\[w8,-1\],{z0\.d-z3\.d},{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.d\[w8,8\],{z0\.d-z3\.d},{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fmla za\.d\[w8,0\],{z1\.d-z4\.d},{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fmla za\.d\[w8,0\],{z2\.d-z5\.d},{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fmla za\.d\[w8,0\],{z3\.d-z6\.d},{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `fmla za\.d\[w8,0\],{z0\.d-z3\.d},{z15\.d-z18\.d}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `fmla za\.d\[w8,0\],{z0\.d-z3\.d},{z29\.d,z30\.d,z31\.d,z0\.d}'
-[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `fmla za\.d\[w8,0\],{z0\.d-z2\.d},{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `fmla za\.d\[w8,0\],{z0\.d-z3\.d},{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `fmla za\.d\[w8,0\],{z0\.d-z1\.d},{z0\.d-z2\.d}'
-[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `fmla za\.d\[w8,0\],{z0\.d-z1\.d},{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 3 -- `fmla za\.d\[w8,0\],{z0\.d-z1\.d},{z0\.d-z4\.d}'
-[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `fmla za\.d\[w8,0,vgx4\],{z0\.d-z1\.d},{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `fmla za\.d\[w8,0,vgx4\],{z0\.d-z3\.d},{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `fmla za\.d\[w8,0,vgx2\],{z0\.d-z1\.d},{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `fmla za\.d\[w8,0,vgx2\],{z0\.d-z3\.d},{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: operand mismatch -- `fmla za\[w8,0\],{z0\.d-z1\.d},{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.d\[w7,0\],{ ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.d\[w12,0\],{ ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.d\[w8,-1\],{ ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.d\[w8,8\],{ ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fmla za\.d\[w8,0\],{ ?z1\.d ?- ?z2\.d ?},{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `fmla za\.d\[w8,0\],{ ?z0\.d ?- ?z1\.d ?},{ ?z15\.d ?- ?z16\.d ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `fmla za\.d\[w8,0\],{ ?z0\.d ?- ?z1\.d ?},{ ?z31\.d,z0\.d ?}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.d\[w7,0\],{ ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.d\[w12,0\],{ ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.d\[w8,-1\],{ ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.d\[w8,8\],{ ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fmla za\.d\[w8,0\],{ ?z1\.d ?- ?z4\.d ?},{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fmla za\.d\[w8,0\],{ ?z2\.d ?- ?z5\.d ?},{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fmla za\.d\[w8,0\],{ ?z3\.d ?- ?z6\.d ?},{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `fmla za\.d\[w8,0\],{ ?z0\.d ?- ?z3\.d ?},{ ?z15\.d ?- ?z18\.d ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `fmla za\.d\[w8,0\],{ ?z0\.d ?- ?z3\.d ?},{ ?z29\.d,z30\.d,z31\.d,z0\.d ?}'
+[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `fmla za\.d\[w8,0\],{ ?z0\.d ?- ?z2\.d ?},{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `fmla za\.d\[w8,0\],{ ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `fmla za\.d\[w8,0\],{ ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z2\.d ?}'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `fmla za\.d\[w8,0\],{ ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 3 -- `fmla za\.d\[w8,0\],{ ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z4\.d ?}'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `fmla za\.d\[w8,0,vgx4\],{ ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `fmla za\.d\[w8,0,vgx4\],{ ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `fmla za\.d\[w8,0,vgx2\],{ ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `fmla za\.d\[w8,0,vgx2\],{ ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: operand mismatch -- `fmla za\[w8,0\],{ ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?}'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	fmla za\.d\[w8, 0\], {z0\.d-z1\.d}, {z0\.d-z1\.d}
 [^ :]+:[0-9]+: Info:    other valid variant\(s\):
 [^ :]+:[0-9]+: Info:    	fmla za\.s\[w8, 0\], {z0\.s-z1\.s}, {z0\.s-z1\.s}
-[^ :]+:[0-9]+: Error: operand mismatch -- `fmla za\[w8,0\],{z0\.d-z3\.d},{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: operand mismatch -- `fmla za\[w8,0\],{ ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?}'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	fmla za\.d\[w8, 0\], {z0\.d-z3\.d}, {z0\.d-z3\.d}
 [^ :]+:[0-9]+: Info:    other valid variant\(s\):
diff --git a/gas/testsuite/gas/aarch64/sme2-f64f64-2-noarch.l b/gas/testsuite/gas/aarch64/sme2-f64f64-2-noarch.l
index 5ab290d..0d76ba4 100644
--- a/gas/testsuite/gas/aarch64/sme2-f64f64-2-noarch.l
+++ b/gas/testsuite/gas/aarch64/sme2-f64f64-2-noarch.l
@@ -1,117 +1,117 @@
 [^ :]+: Assembler messages:
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{z0\.d-z1\.d},z0\.d\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0,vgx2\],{z0\.d-z1\.d},z0\.d\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla ZA\.d\[W8,0,VGx2\],{Z0\.d-Z1\.d},Z0\.d\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w11,0\],{z0\.d-z1\.d},z0\.d\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,7\],{z0\.d-z1\.d},z0\.d\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{z30\.d-z31\.d},z0\.d\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{z0\.d-z1\.d},z15\.d\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{z0\.d-z1\.d},z0\.d\[1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w10,2\],{z6\.d-z7\.d},z5\.d\[1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{z0\.d-z3\.d},z0\.d\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0,vgx4\],{z0\.d-z3\.d},z0\.d\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla ZA\.D\[W8,0,VGX4\],{Z0\.D-Z3\.D},Z0\.D\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w11,0\],{z0\.d-z3\.d},z0\.d\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,7\],{z0\.d-z3\.d},z0\.d\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{z28\.d-z31\.d},z0\.d\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{z0\.d-z3\.d},z15\.d\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{z0\.d-z3\.d},z0\.d\[1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w9,3\],{z8\.d-z11\.d},z14\.d\[1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{z0\.d-z1\.d},z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0,vgx2\],{z0\.d-z1\.d},z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla ZA\.d\[W8,0,VGx2\],{Z0\.d-Z1\.d},Z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla ZA\.D\[W8,0,VGX2\],{Z0\.D-Z1\.D},Z0\.D'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w11,0\],{z0\.d-z1\.d},z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,7\],{z0\.d-z1\.d},z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{z30\.d-z31\.d},z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{z31\.d,z0\.d},z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{z31\.d-z0\.d},z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{z0\.d-z1\.d},z15\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w9,5\],{z9\.d-z10\.d},z6\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{z0\.d-z3\.d},z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0,vgx4\],{z0\.d-z3\.d},z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla ZA\.d\[W8,0,VGx4\],{Z0\.d-Z3\.d},Z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla ZA\.D\[W8,0,VGX4\],{Z0\.D-Z3\.D},Z0\.D'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w11,0\],{z0\.d-z3\.d},z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,7\],{z0\.d-z3\.d},z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{z28\.d-z31\.d},z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{z31\.d,z0\.d,z1\.d,z2\.d},z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{z31\.d-z2\.d},z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{z0\.d-z3\.d},z15\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w11,2\],{z23\.d-z26\.d},z13\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{z0\.d-z1\.d},{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0,vgx2\],{z0\.d-z1\.d},{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla ZA\.d\[W8,0,VGx2\],{Z0\.d-Z1\.d},{Z0\.d-Z1\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla ZA\.D\[W8,0,VGX2\],{Z0\.D-Z1\.D},{Z0\.D-Z1\.D}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w11,0\],{z0\.d-z1\.d},{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,7\],{z0\.d-z1\.d},{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{z30\.d-z31\.d},{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{z0\.d-z1\.d},{z30\.d-z31\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w10,1\],{z22\.d-z23\.d},{z18\.d-z19\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{z0\.d-z3\.d},{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0,vgx4\],{z0\.d-z3\.d},{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla ZA\.d\[W8,0,VGx4\],{Z0\.d-Z3\.d},{Z0\.d-Z3\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla ZA\.D\[W8,0,VGX4\],{Z0\.D-Z3\.D},{Z0\.D-Z3\.D}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w11,0\],{z0\.d-z3\.d},{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,7\],{z0\.d-z3\.d},{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{z28\.d-z31\.d},{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{z0\.d-z3\.d},{z28\.d-z31\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w11,3\],{z16\.d-z19\.d},{z24\.d-z27\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{z0\.d-z1\.d},z0\.d\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0,vgx2\],{z0\.d-z1\.d},z0\.d\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls ZA\.d\[W8,0,VGx2\],{Z0\.d-Z1\.d},Z0\.d\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w11,0\],{z0\.d-z1\.d},z0\.d\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,7\],{z0\.d-z1\.d},z0\.d\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{z30\.d-z31\.d},z0\.d\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{z0\.d-z1\.d},z15\.d\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{z0\.d-z1\.d},z0\.d\[1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w10,2\],{z6\.d-z7\.d},z5\.d\[1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{z0\.d-z3\.d},z0\.d\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0,vgx4\],{z0\.d-z3\.d},z0\.d\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls ZA\.D\[W8,0,VGX4\],{Z0\.D-Z3\.D},Z0\.D\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w11,0\],{z0\.d-z3\.d},z0\.d\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,7\],{z0\.d-z3\.d},z0\.d\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{z28\.d-z31\.d},z0\.d\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{z0\.d-z3\.d},z15\.d\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{z0\.d-z3\.d},z0\.d\[1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w9,3\],{z8\.d-z11\.d},z14\.d\[1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{z0\.d-z1\.d},z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0,vgx2\],{z0\.d-z1\.d},z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls ZA\.d\[W8,0,VGx2\],{Z0\.d-Z1\.d},Z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls ZA\.D\[W8,0,VGX2\],{Z0\.D-Z1\.D},Z0\.D'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w11,0\],{z0\.d-z1\.d},z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,7\],{z0\.d-z1\.d},z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{z30\.d-z31\.d},z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{z31\.d,z0\.d},z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{z31\.d-z0\.d},z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{z0\.d-z1\.d},z15\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w9,5\],{z9\.d-z10\.d},z6\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{z0\.d-z3\.d},z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0,vgx4\],{z0\.d-z3\.d},z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls ZA\.d\[W8,0,VGx4\],{Z0\.d-Z3\.d},Z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls ZA\.D\[W8,0,VGX4\],{Z0\.D-Z3\.D},Z0\.D'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w11,0\],{z0\.d-z3\.d},z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,7\],{z0\.d-z3\.d},z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{z28\.d-z31\.d},z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{z31\.d,z0\.d,z1\.d,z2\.d},z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{z31\.d-z2\.d},z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{z0\.d-z3\.d},z15\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w11,2\],{z23\.d-z26\.d},z13\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{z0\.d-z1\.d},{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0,vgx2\],{z0\.d-z1\.d},{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls ZA\.d\[W8,0,VGx2\],{Z0\.d-Z1\.d},{Z0\.d-Z1\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls ZA\.D\[W8,0,VGX2\],{Z0\.D-Z1\.D},{Z0\.D-Z1\.D}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w11,0\],{z0\.d-z1\.d},{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,7\],{z0\.d-z1\.d},{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{z30\.d-z31\.d},{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{z0\.d-z1\.d},{z30\.d-z31\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w10,1\],{z22\.d-z23\.d},{z18\.d-z19\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{z0\.d-z3\.d},{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0,vgx4\],{z0\.d-z3\.d},{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls ZA\.d\[W8,0,VGx4\],{Z0\.d-Z3\.d},{Z0\.d-Z3\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls ZA\.D\[W8,0,VGX4\],{Z0\.D-Z3\.D},{Z0\.D-Z3\.D}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w11,0\],{z0\.d-z3\.d},{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,7\],{z0\.d-z3\.d},{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{z28\.d-z31\.d},{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{z0\.d-z3\.d},{z28\.d-z31\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w11,3\],{z16\.d-z19\.d},{z24\.d-z27\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{ ?z0\.d ?- ?z1\.d ?},z0\.d\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0,vgx2\],{ ?z0\.d ?- ?z1\.d ?},z0\.d\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla ZA\.d\[W8,0,VGx2\],{ ?Z0\.d ?- ?Z1\.d ?},Z0\.d\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w11,0\],{ ?z0\.d ?- ?z1\.d ?},z0\.d\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,7\],{ ?z0\.d ?- ?z1\.d ?},z0\.d\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{ ?z30\.d ?- ?z31\.d ?},z0\.d\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{ ?z0\.d ?- ?z1\.d ?},z15\.d\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{ ?z0\.d ?- ?z1\.d ?},z0\.d\[1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w10,2\],{ ?z6\.d ?- ?z7\.d ?},z5\.d\[1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{ ?z0\.d ?- ?z3\.d ?},z0\.d\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0,vgx4\],{ ?z0\.d ?- ?z3\.d ?},z0\.d\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla ZA\.D\[W8,0,VGX4\],{ ?Z0\.D ?- ?Z3\.D ?},Z0\.D\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w11,0\],{ ?z0\.d ?- ?z3\.d ?},z0\.d\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,7\],{ ?z0\.d ?- ?z3\.d ?},z0\.d\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{ ?z28\.d ?- ?z31\.d ?},z0\.d\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{ ?z0\.d ?- ?z3\.d ?},z15\.d\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{ ?z0\.d ?- ?z3\.d ?},z0\.d\[1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w9,3\],{ ?z8\.d ?- ?z11\.d ?},z14\.d\[1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{ ?z0\.d ?- ?z1\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0,vgx2\],{ ?z0\.d ?- ?z1\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla ZA\.d\[W8,0,VGx2\],{ ?Z0\.d ?- ?Z1\.d ?},Z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla ZA\.D\[W8,0,VGX2\],{ ?Z0\.D ?- ?Z1\.D ?},Z0\.D'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w11,0\],{ ?z0\.d ?- ?z1\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,7\],{ ?z0\.d ?- ?z1\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{ ?z30\.d ?- ?z31\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{ ?z31\.d,z0\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{ ?z31\.d ?- ?z0\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{ ?z0\.d ?- ?z1\.d ?},z15\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w9,5\],{ ?z9\.d ?- ?z10\.d ?},z6\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{ ?z0\.d ?- ?z3\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0,vgx4\],{ ?z0\.d ?- ?z3\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla ZA\.d\[W8,0,VGx4\],{ ?Z0\.d ?- ?Z3\.d ?},Z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla ZA\.D\[W8,0,VGX4\],{ ?Z0\.D ?- ?Z3\.D ?},Z0\.D'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w11,0\],{ ?z0\.d ?- ?z3\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,7\],{ ?z0\.d ?- ?z3\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{ ?z28\.d ?- ?z31\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{ ?z31\.d,z0\.d,z1\.d,z2\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{ ?z31\.d ?- ?z2\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{ ?z0\.d ?- ?z3\.d ?},z15\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w11,2\],{ ?z23\.d ?- ?z26\.d ?},z13\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{ ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0,vgx2\],{ ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla ZA\.d\[W8,0,VGx2\],{ ?Z0\.d ?- ?Z1\.d ?},{ ?Z0\.d ?- ?Z1\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla ZA\.D\[W8,0,VGX2\],{ ?Z0\.D ?- ?Z1\.D ?},{ ?Z0\.D ?- ?Z1\.D ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w11,0\],{ ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,7\],{ ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{ ?z30\.d ?- ?z31\.d ?},{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{ ?z0\.d ?- ?z1\.d ?},{ ?z30\.d ?- ?z31\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w10,1\],{ ?z22\.d ?- ?z23\.d ?},{ ?z18\.d ?- ?z19\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{ ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0,vgx4\],{ ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla ZA\.d\[W8,0,VGx4\],{ ?Z0\.d ?- ?Z3\.d ?},{ ?Z0\.d ?- ?Z3\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla ZA\.D\[W8,0,VGX4\],{ ?Z0\.D ?- ?Z3\.D ?},{ ?Z0\.D ?- ?Z3\.D ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w11,0\],{ ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,7\],{ ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{ ?z28\.d ?- ?z31\.d ?},{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{ ?z0\.d ?- ?z3\.d ?},{ ?z28\.d ?- ?z31\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w11,3\],{ ?z16\.d ?- ?z19\.d ?},{ ?z24\.d ?- ?z27\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{ ?z0\.d ?- ?z1\.d ?},z0\.d\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0,vgx2\],{ ?z0\.d ?- ?z1\.d ?},z0\.d\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls ZA\.d\[W8,0,VGx2\],{ ?Z0\.d ?- ?Z1\.d ?},Z0\.d\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w11,0\],{ ?z0\.d ?- ?z1\.d ?},z0\.d\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,7\],{ ?z0\.d ?- ?z1\.d ?},z0\.d\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{ ?z30\.d ?- ?z31\.d ?},z0\.d\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{ ?z0\.d ?- ?z1\.d ?},z15\.d\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{ ?z0\.d ?- ?z1\.d ?},z0\.d\[1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w10,2\],{ ?z6\.d ?- ?z7\.d ?},z5\.d\[1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{ ?z0\.d ?- ?z3\.d ?},z0\.d\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0,vgx4\],{ ?z0\.d ?- ?z3\.d ?},z0\.d\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls ZA\.D\[W8,0,VGX4\],{ ?Z0\.D ?- ?Z3\.D ?},Z0\.D\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w11,0\],{ ?z0\.d ?- ?z3\.d ?},z0\.d\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,7\],{ ?z0\.d ?- ?z3\.d ?},z0\.d\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{ ?z28\.d ?- ?z31\.d ?},z0\.d\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{ ?z0\.d ?- ?z3\.d ?},z15\.d\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{ ?z0\.d ?- ?z3\.d ?},z0\.d\[1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w9,3\],{ ?z8\.d ?- ?z11\.d ?},z14\.d\[1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{ ?z0\.d ?- ?z1\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0,vgx2\],{ ?z0\.d ?- ?z1\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls ZA\.d\[W8,0,VGx2\],{ ?Z0\.d ?- ?Z1\.d ?},Z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls ZA\.D\[W8,0,VGX2\],{ ?Z0\.D ?- ?Z1\.D ?},Z0\.D'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w11,0\],{ ?z0\.d ?- ?z1\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,7\],{ ?z0\.d ?- ?z1\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{ ?z30\.d ?- ?z31\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{ ?z31\.d,z0\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{ ?z31\.d ?- ?z0\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{ ?z0\.d ?- ?z1\.d ?},z15\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w9,5\],{ ?z9\.d ?- ?z10\.d ?},z6\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{ ?z0\.d ?- ?z3\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0,vgx4\],{ ?z0\.d ?- ?z3\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls ZA\.d\[W8,0,VGx4\],{ ?Z0\.d ?- ?Z3\.d ?},Z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls ZA\.D\[W8,0,VGX4\],{ ?Z0\.D ?- ?Z3\.D ?},Z0\.D'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w11,0\],{ ?z0\.d ?- ?z3\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,7\],{ ?z0\.d ?- ?z3\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{ ?z28\.d ?- ?z31\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{ ?z31\.d,z0\.d,z1\.d,z2\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{ ?z31\.d ?- ?z2\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{ ?z0\.d ?- ?z3\.d ?},z15\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w11,2\],{ ?z23\.d ?- ?z26\.d ?},z13\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{ ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0,vgx2\],{ ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls ZA\.d\[W8,0,VGx2\],{ ?Z0\.d ?- ?Z1\.d ?},{ ?Z0\.d ?- ?Z1\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls ZA\.D\[W8,0,VGX2\],{ ?Z0\.D ?- ?Z1\.D ?},{ ?Z0\.D ?- ?Z1\.D ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w11,0\],{ ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,7\],{ ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{ ?z30\.d ?- ?z31\.d ?},{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{ ?z0\.d ?- ?z1\.d ?},{ ?z30\.d ?- ?z31\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w10,1\],{ ?z22\.d ?- ?z23\.d ?},{ ?z18\.d ?- ?z19\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{ ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0,vgx4\],{ ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls ZA\.d\[W8,0,VGx4\],{ ?Z0\.d ?- ?Z3\.d ?},{ ?Z0\.d ?- ?Z3\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls ZA\.D\[W8,0,VGX4\],{ ?Z0\.D ?- ?Z3\.D ?},{ ?Z0\.D ?- ?Z3\.D ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w11,0\],{ ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,7\],{ ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{ ?z28\.d ?- ?z31\.d ?},{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{ ?z0\.d ?- ?z3\.d ?},{ ?z28\.d ?- ?z31\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w11,3\],{ ?z16\.d ?- ?z19\.d ?},{ ?z24\.d ?- ?z27\.d ?}'
diff --git a/gas/testsuite/gas/aarch64/sme2-faminmax-bad.l b/gas/testsuite/gas/aarch64/sme2-faminmax-bad.l
index 513b430..7dfd085 100644
--- a/gas/testsuite/gas/aarch64/sme2-faminmax-bad.l
+++ b/gas/testsuite/gas/aarch64/sme2-faminmax-bad.l
@@ -1,49 +1,49 @@
 [^ :]+: Assembler messages:
-.*: Error: selected processor does not support `famax {z0.h-z1.h},{z0.h-z1.h},{z0.h-z1.h}'
-.*: Error: selected processor does not support `famax {z30.h-z31.h},{z30.h-z31.h},{z0.h-z1.h}'
-.*: Error: selected processor does not support `famax {z0.h-z1.h},{z0.h-z1.h},{z30.h-z31.h}'
-.*: Error: selected processor does not support `famax {z18.h-z19.h},{z18.h-z19.h},{z26.h-z27.h}'
-.*: Error: selected processor does not support `famax {z0.s-z1.s},{z0.s-z1.s},{z0.s-z1.s}'
-.*: Error: selected processor does not support `famax {z30.s-z31.s},{z30.s-z31.s},{z0.s-z1.s}'
-.*: Error: selected processor does not support `famax {z0.s-z1.s},{z0.s-z1.s},{z30.s-z31.s}'
-.*: Error: selected processor does not support `famax {z4.s-z5.s},{z4.s-z5.s},{z10.s-z11.s}'
-.*: Error: selected processor does not support `famax {z0.d-z1.d},{z0.d-z1.d},{z0.d-z1.d}'
-.*: Error: selected processor does not support `famax {z30.d-z31.d},{z30.d-z31.d},{z0.d-z1.d}'
-.*: Error: selected processor does not support `famax {z0.d-z1.d},{z0.d-z1.d},{z30.d-z31.d}'
-.*: Error: selected processor does not support `famax {z28.d-z29.d},{z28.d-z29.d},{z8.d-z9.d}'
-.*: Error: selected processor does not support `famax {z0.h-z3.h},{z0.h-z3.h},{z0.h-z3.h}'
-.*: Error: selected processor does not support `famax {z28.h-z31.h},{z28.h-z31.h},{z0.h-z3.h}'
-.*: Error: selected processor does not support `famax {z0.h-z3.h},{z0.h-z3.h},{z28.h-z31.h}'
-.*: Error: selected processor does not support `famax {z16.h-z19.h},{z16.h-z19.h},{z20.h-z23.h}'
-.*: Error: selected processor does not support `famax {z0.s-z3.s},{z0.s-z3.s},{z0.s-z3.s}'
-.*: Error: selected processor does not support `famax {z28.s-z31.s},{z28.s-z31.s},{z0.s-z3.s}'
-.*: Error: selected processor does not support `famax {z0.s-z3.s},{z0.s-z3.s},{z28.s-z31.s}'
-.*: Error: selected processor does not support `famax {z24.s-z27.s},{z24.s-z27.s},{z4.s-z7.s}'
-.*: Error: selected processor does not support `famax {z0.d-z3.d},{z0.d-z3.d},{z0.d-z3.d}'
-.*: Error: selected processor does not support `famax {z28.d-z31.d},{z28.d-z31.d},{z0.d-z3.d}'
-.*: Error: selected processor does not support `famax {z0.d-z3.d},{z0.d-z3.d},{z28.d-z31.d}'
-.*: Error: selected processor does not support `famax {z12.d-z15.d},{z12.d-z15.d},{z8.d-z11.d}'
-.*: Error: selected processor does not support `famin {z0.h-z1.h},{z0.h-z1.h},{z0.h-z1.h}'
-.*: Error: selected processor does not support `famin {z30.h-z31.h},{z30.h-z31.h},{z0.h-z1.h}'
-.*: Error: selected processor does not support `famin {z0.h-z1.h},{z0.h-z1.h},{z30.h-z31.h}'
-.*: Error: selected processor does not support `famin {z18.h-z19.h},{z18.h-z19.h},{z26.h-z27.h}'
-.*: Error: selected processor does not support `famin {z0.s-z1.s},{z0.s-z1.s},{z0.s-z1.s}'
-.*: Error: selected processor does not support `famin {z30.s-z31.s},{z30.s-z31.s},{z0.s-z1.s}'
-.*: Error: selected processor does not support `famin {z0.s-z1.s},{z0.s-z1.s},{z30.s-z31.s}'
-.*: Error: selected processor does not support `famin {z4.s-z5.s},{z4.s-z5.s},{z10.s-z11.s}'
-.*: Error: selected processor does not support `famin {z0.d-z1.d},{z0.d-z1.d},{z0.d-z1.d}'
-.*: Error: selected processor does not support `famin {z30.d-z31.d},{z30.d-z31.d},{z0.d-z1.d}'
-.*: Error: selected processor does not support `famin {z0.d-z1.d},{z0.d-z1.d},{z30.d-z31.d}'
-.*: Error: selected processor does not support `famin {z28.d-z29.d},{z28.d-z29.d},{z8.d-z9.d}'
-.*: Error: selected processor does not support `famin {z0.h-z3.h},{z0.h-z3.h},{z0.h-z3.h}'
-.*: Error: selected processor does not support `famin {z28.h-z31.h},{z28.h-z31.h},{z0.h-z3.h}'
-.*: Error: selected processor does not support `famin {z0.h-z3.h},{z0.h-z3.h},{z28.h-z31.h}'
-.*: Error: selected processor does not support `famin {z16.h-z19.h},{z16.h-z19.h},{z20.h-z23.h}'
-.*: Error: selected processor does not support `famin {z0.s-z3.s},{z0.s-z3.s},{z0.s-z3.s}'
-.*: Error: selected processor does not support `famin {z28.s-z31.s},{z28.s-z31.s},{z0.s-z3.s}'
-.*: Error: selected processor does not support `famin {z0.s-z3.s},{z0.s-z3.s},{z28.s-z31.s}'
-.*: Error: selected processor does not support `famin {z24.s-z27.s},{z24.s-z27.s},{z4.s-z7.s}'
-.*: Error: selected processor does not support `famin {z0.d-z3.d},{z0.d-z3.d},{z0.d-z3.d}'
-.*: Error: selected processor does not support `famin {z28.d-z31.d},{z28.d-z31.d},{z0.d-z3.d}'
-.*: Error: selected processor does not support `famin {z0.d-z3.d},{z0.d-z3.d},{z28.d-z31.d}'
-.*: Error: selected processor does not support `famin {z12.d-z15.d},{z12.d-z15.d},{z8.d-z11.d}'
+.*: Error: selected processor does not support `famax { ?z0.h ?- ?z1.h ?},{ ?z0.h ?- ?z1.h ?},{ ?z0.h ?- ?z1.h ?}'
+.*: Error: selected processor does not support `famax { ?z30.h ?- ?z31.h ?},{ ?z30.h ?- ?z31.h ?},{ ?z0.h ?- ?z1.h ?}'
+.*: Error: selected processor does not support `famax { ?z0.h ?- ?z1.h ?},{ ?z0.h ?- ?z1.h ?},{ ?z30.h ?- ?z31.h ?}'
+.*: Error: selected processor does not support `famax { ?z18.h ?- ?z19.h ?},{ ?z18.h ?- ?z19.h ?},{ ?z26.h ?- ?z27.h ?}'
+.*: Error: selected processor does not support `famax { ?z0.s ?- ?z1.s ?},{ ?z0.s ?- ?z1.s ?},{ ?z0.s ?- ?z1.s ?}'
+.*: Error: selected processor does not support `famax { ?z30.s ?- ?z31.s ?},{ ?z30.s ?- ?z31.s ?},{ ?z0.s ?- ?z1.s ?}'
+.*: Error: selected processor does not support `famax { ?z0.s ?- ?z1.s ?},{ ?z0.s ?- ?z1.s ?},{ ?z30.s ?- ?z31.s ?}'
+.*: Error: selected processor does not support `famax { ?z4.s ?- ?z5.s ?},{ ?z4.s ?- ?z5.s ?},{ ?z10.s ?- ?z11.s ?}'
+.*: Error: selected processor does not support `famax { ?z0.d ?- ?z1.d ?},{ ?z0.d ?- ?z1.d ?},{ ?z0.d ?- ?z1.d ?}'
+.*: Error: selected processor does not support `famax { ?z30.d ?- ?z31.d ?},{ ?z30.d ?- ?z31.d ?},{ ?z0.d ?- ?z1.d ?}'
+.*: Error: selected processor does not support `famax { ?z0.d ?- ?z1.d ?},{ ?z0.d ?- ?z1.d ?},{ ?z30.d ?- ?z31.d ?}'
+.*: Error: selected processor does not support `famax { ?z28.d ?- ?z29.d ?},{ ?z28.d ?- ?z29.d ?},{ ?z8.d ?- ?z9.d ?}'
+.*: Error: selected processor does not support `famax { ?z0.h ?- ?z3.h ?},{ ?z0.h ?- ?z3.h ?},{ ?z0.h ?- ?z3.h ?}'
+.*: Error: selected processor does not support `famax { ?z28.h ?- ?z31.h ?},{ ?z28.h ?- ?z31.h ?},{ ?z0.h ?- ?z3.h ?}'
+.*: Error: selected processor does not support `famax { ?z0.h ?- ?z3.h ?},{ ?z0.h ?- ?z3.h ?},{ ?z28.h ?- ?z31.h ?}'
+.*: Error: selected processor does not support `famax { ?z16.h ?- ?z19.h ?},{ ?z16.h ?- ?z19.h ?},{ ?z20.h ?- ?z23.h ?}'
+.*: Error: selected processor does not support `famax { ?z0.s ?- ?z3.s ?},{ ?z0.s ?- ?z3.s ?},{ ?z0.s ?- ?z3.s ?}'
+.*: Error: selected processor does not support `famax { ?z28.s ?- ?z31.s ?},{ ?z28.s ?- ?z31.s ?},{ ?z0.s ?- ?z3.s ?}'
+.*: Error: selected processor does not support `famax { ?z0.s ?- ?z3.s ?},{ ?z0.s ?- ?z3.s ?},{ ?z28.s ?- ?z31.s ?}'
+.*: Error: selected processor does not support `famax { ?z24.s ?- ?z27.s ?},{ ?z24.s ?- ?z27.s ?},{ ?z4.s ?- ?z7.s ?}'
+.*: Error: selected processor does not support `famax { ?z0.d ?- ?z3.d ?},{ ?z0.d ?- ?z3.d ?},{ ?z0.d ?- ?z3.d ?}'
+.*: Error: selected processor does not support `famax { ?z28.d ?- ?z31.d ?},{ ?z28.d ?- ?z31.d ?},{ ?z0.d ?- ?z3.d ?}'
+.*: Error: selected processor does not support `famax { ?z0.d ?- ?z3.d ?},{ ?z0.d ?- ?z3.d ?},{ ?z28.d ?- ?z31.d ?}'
+.*: Error: selected processor does not support `famax { ?z12.d ?- ?z15.d ?},{ ?z12.d ?- ?z15.d ?},{ ?z8.d ?- ?z11.d ?}'
+.*: Error: selected processor does not support `famin { ?z0.h ?- ?z1.h ?},{ ?z0.h ?- ?z1.h ?},{ ?z0.h ?- ?z1.h ?}'
+.*: Error: selected processor does not support `famin { ?z30.h ?- ?z31.h ?},{ ?z30.h ?- ?z31.h ?},{ ?z0.h ?- ?z1.h ?}'
+.*: Error: selected processor does not support `famin { ?z0.h ?- ?z1.h ?},{ ?z0.h ?- ?z1.h ?},{ ?z30.h ?- ?z31.h ?}'
+.*: Error: selected processor does not support `famin { ?z18.h ?- ?z19.h ?},{ ?z18.h ?- ?z19.h ?},{ ?z26.h ?- ?z27.h ?}'
+.*: Error: selected processor does not support `famin { ?z0.s ?- ?z1.s ?},{ ?z0.s ?- ?z1.s ?},{ ?z0.s ?- ?z1.s ?}'
+.*: Error: selected processor does not support `famin { ?z30.s ?- ?z31.s ?},{ ?z30.s ?- ?z31.s ?},{ ?z0.s ?- ?z1.s ?}'
+.*: Error: selected processor does not support `famin { ?z0.s ?- ?z1.s ?},{ ?z0.s ?- ?z1.s ?},{ ?z30.s ?- ?z31.s ?}'
+.*: Error: selected processor does not support `famin { ?z4.s ?- ?z5.s ?},{ ?z4.s ?- ?z5.s ?},{ ?z10.s ?- ?z11.s ?}'
+.*: Error: selected processor does not support `famin { ?z0.d ?- ?z1.d ?},{ ?z0.d ?- ?z1.d ?},{ ?z0.d ?- ?z1.d ?}'
+.*: Error: selected processor does not support `famin { ?z30.d ?- ?z31.d ?},{ ?z30.d ?- ?z31.d ?},{ ?z0.d ?- ?z1.d ?}'
+.*: Error: selected processor does not support `famin { ?z0.d ?- ?z1.d ?},{ ?z0.d ?- ?z1.d ?},{ ?z30.d ?- ?z31.d ?}'
+.*: Error: selected processor does not support `famin { ?z28.d ?- ?z29.d ?},{ ?z28.d ?- ?z29.d ?},{ ?z8.d ?- ?z9.d ?}'
+.*: Error: selected processor does not support `famin { ?z0.h ?- ?z3.h ?},{ ?z0.h ?- ?z3.h ?},{ ?z0.h ?- ?z3.h ?}'
+.*: Error: selected processor does not support `famin { ?z28.h ?- ?z31.h ?},{ ?z28.h ?- ?z31.h ?},{ ?z0.h ?- ?z3.h ?}'
+.*: Error: selected processor does not support `famin { ?z0.h ?- ?z3.h ?},{ ?z0.h ?- ?z3.h ?},{ ?z28.h ?- ?z31.h ?}'
+.*: Error: selected processor does not support `famin { ?z16.h ?- ?z19.h ?},{ ?z16.h ?- ?z19.h ?},{ ?z20.h ?- ?z23.h ?}'
+.*: Error: selected processor does not support `famin { ?z0.s ?- ?z3.s ?},{ ?z0.s ?- ?z3.s ?},{ ?z0.s ?- ?z3.s ?}'
+.*: Error: selected processor does not support `famin { ?z28.s ?- ?z31.s ?},{ ?z28.s ?- ?z31.s ?},{ ?z0.s ?- ?z3.s ?}'
+.*: Error: selected processor does not support `famin { ?z0.s ?- ?z3.s ?},{ ?z0.s ?- ?z3.s ?},{ ?z28.s ?- ?z31.s ?}'
+.*: Error: selected processor does not support `famin { ?z24.s ?- ?z27.s ?},{ ?z24.s ?- ?z27.s ?},{ ?z4.s ?- ?z7.s ?}'
+.*: Error: selected processor does not support `famin { ?z0.d ?- ?z3.d ?},{ ?z0.d ?- ?z3.d ?},{ ?z0.d ?- ?z3.d ?}'
+.*: Error: selected processor does not support `famin { ?z28.d ?- ?z31.d ?},{ ?z28.d ?- ?z31.d ?},{ ?z0.d ?- ?z3.d ?}'
+.*: Error: selected processor does not support `famin { ?z0.d ?- ?z3.d ?},{ ?z0.d ?- ?z3.d ?},{ ?z28.d ?- ?z31.d ?}'
+.*: Error: selected processor does not support `famin { ?z12.d ?- ?z15.d ?},{ ?z12.d ?- ?z15.d ?},{ ?z8.d ?- ?z11.d ?}'
diff --git a/gas/testsuite/gas/aarch64/sme2-faminmax-illegal.l b/gas/testsuite/gas/aarch64/sme2-faminmax-illegal.l
index 6eb0a00..fe3e22e 100644
--- a/gas/testsuite/gas/aarch64/sme2-faminmax-illegal.l
+++ b/gas/testsuite/gas/aarch64/sme2-faminmax-illegal.l
@@ -1,87 +1,87 @@
 [^ :]+: Assembler messages:
-[^ :]+:[0-9]+: Error: operand mismatch -- `famax {z18\.h-z19\.h},{z18\.h-z19\.h},{z30\.s-z31\.s}'
+[^ :]+:[0-9]+: Error: operand mismatch -- `famax { ?z18\.h ?- ?z19\.h ?},{ ?z18\.h ?- ?z19\.h ?},{ ?z30\.s ?- ?z31\.s ?}'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	famax {z18\.h-z19\.h}, {z18\.h-z19\.h}, {z30\.h-z31\.h}
 [^ :]+:[0-9]+: Info:    other valid variant\(s\):
 [^ :]+:[0-9]+: Info:    	famax {z18\.s-z19\.s}, {z18\.s-z19\.s}, {z30\.s-z31\.s}
 [^ :]+:[0-9]+: Info:    	famax {z18\.d-z19\.d}, {z18\.d-z19\.d}, {z30\.d-z31\.d}
-[^ :]+:[0-9]+: Error: operand mismatch -- `famax {z30\.s-z31\.s},{z30\.s-z31\.s},{z18\.h-z19\.h}'
+[^ :]+:[0-9]+: Error: operand mismatch -- `famax { ?z30\.s ?- ?z31\.s ?},{ ?z30\.s ?- ?z31\.s ?},{ ?z18\.h ?- ?z19\.h ?}'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	famax {z30\.s-z31\.s}, {z30\.s-z31\.s}, {z18\.s-z19\.s}
 [^ :]+:[0-9]+: Info:    other valid variant\(s\):
 [^ :]+:[0-9]+: Info:    	famax {z30\.h-z31\.h}, {z30\.h-z31\.h}, {z18\.h-z19\.h}
 [^ :]+:[0-9]+: Info:    	famax {z30\.d-z31\.d}, {z30\.d-z31\.d}, {z18\.d-z19\.d}
-[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `famax {z24\.s-z27\.s},{z24\.s-z27\.s},{z30\.s-z31\.s}'
-[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `famax {z30\.h-z31\.h},{z30\.h-z31\.h},{z24\.h-z27\.h}'
-[^ :]+:[0-9]+: Error: operand mismatch -- `famin {z18\.h-z19\.h},{z18\.h-z19\.h},{z30\.s-z31\.s}'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `famax { ?z24\.s ?- ?z27\.s ?},{ ?z24\.s ?- ?z27\.s ?},{ ?z30\.s ?- ?z31\.s ?}'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `famax { ?z30\.h ?- ?z31\.h ?},{ ?z30\.h ?- ?z31\.h ?},{ ?z24\.h ?- ?z27\.h ?}'
+[^ :]+:[0-9]+: Error: operand mismatch -- `famin { ?z18\.h ?- ?z19\.h ?},{ ?z18\.h ?- ?z19\.h ?},{ ?z30\.s ?- ?z31\.s ?}'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	famin {z18\.h-z19\.h}, {z18\.h-z19\.h}, {z30\.h-z31\.h}
 [^ :]+:[0-9]+: Info:    other valid variant\(s\):
 [^ :]+:[0-9]+: Info:    	famin {z18\.s-z19\.s}, {z18\.s-z19\.s}, {z30\.s-z31\.s}
 [^ :]+:[0-9]+: Info:    	famin {z18\.d-z19\.d}, {z18\.d-z19\.d}, {z30\.d-z31\.d}
-[^ :]+:[0-9]+: Error: operand mismatch -- `famin {z30\.s-z31\.s},{z30\.s-z31\.s},{z18\.h-z19\.h}'
+[^ :]+:[0-9]+: Error: operand mismatch -- `famin { ?z30\.s ?- ?z31\.s ?},{ ?z30\.s ?- ?z31\.s ?},{ ?z18\.h ?- ?z19\.h ?}'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	famin {z30\.s-z31\.s}, {z30\.s-z31\.s}, {z18\.s-z19\.s}
 [^ :]+:[0-9]+: Info:    other valid variant\(s\):
 [^ :]+:[0-9]+: Info:    	famin {z30\.h-z31\.h}, {z30\.h-z31\.h}, {z18\.h-z19\.h}
 [^ :]+:[0-9]+: Info:    	famin {z30\.d-z31\.d}, {z30\.d-z31\.d}, {z18\.d-z19\.d}
-[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `famin {z24\.s-z27\.s},{z24\.s-z27\.s},{z30\.s-z31\.s}'
-[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `famin {z30\.h-z31\.h},{z30\.h-z31\.h},{z24\.h-z27\.h}'
-[^ :]+:[0-9]+: Error: operand mismatch -- `famax {z18\.b-z19\.b},{z18\.b-z19\.b},{z30\.b-z31\.b}'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `famin { ?z24\.s ?- ?z27\.s ?},{ ?z24\.s ?- ?z27\.s ?},{ ?z30\.s ?- ?z31\.s ?}'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `famin { ?z30\.h ?- ?z31\.h ?},{ ?z30\.h ?- ?z31\.h ?},{ ?z24\.h ?- ?z27\.h ?}'
+[^ :]+:[0-9]+: Error: operand mismatch -- `famax { ?z18\.b ?- ?z19\.b ?},{ ?z18\.b ?- ?z19\.b ?},{ ?z30\.b ?- ?z31\.b ?}'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	famax {z18\.h-z19\.h}, {z18\.h-z19\.h}, {z30\.h-z31\.h}
 [^ :]+:[0-9]+: Info:    other valid variant\(s\):
 [^ :]+:[0-9]+: Info:    	famax {z18\.s-z19\.s}, {z18\.s-z19\.s}, {z30\.s-z31\.s}
 [^ :]+:[0-9]+: Info:    	famax {z18\.d-z19\.d}, {z18\.d-z19\.d}, {z30\.d-z31\.d}
-[^ :]+:[0-9]+: Error: operand mismatch -- `famax {z24\.b-z27\.b},{z24\.b-z27\.b},{z19\.b-z22\.b}'
+[^ :]+:[0-9]+: Error: operand mismatch -- `famax { ?z24\.b ?- ?z27\.b ?},{ ?z24\.b ?- ?z27\.b ?},{ ?z19\.b ?- ?z22\.b ?}'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	famax {z24\.h-z27\.h}, {z24\.h-z27\.h}, {z19\.h-z22\.h}
 [^ :]+:[0-9]+: Info:    other valid variant\(s\):
 [^ :]+:[0-9]+: Info:    	famax {z24\.s-z27\.s}, {z24\.s-z27\.s}, {z19\.s-z22\.s}
 [^ :]+:[0-9]+: Info:    	famax {z24\.d-z27\.d}, {z24\.d-z27\.d}, {z19\.d-z22\.d}
-[^ :]+:[0-9]+: Error: operand mismatch -- `famin {z18\.b-z19\.b},{z18\.b-z19\.b},{z30\.b-z31\.b}'
+[^ :]+:[0-9]+: Error: operand mismatch -- `famin { ?z18\.b ?- ?z19\.b ?},{ ?z18\.b ?- ?z19\.b ?},{ ?z30\.b ?- ?z31\.b ?}'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	famin {z18\.h-z19\.h}, {z18\.h-z19\.h}, {z30\.h-z31\.h}
 [^ :]+:[0-9]+: Info:    other valid variant\(s\):
 [^ :]+:[0-9]+: Info:    	famin {z18\.s-z19\.s}, {z18\.s-z19\.s}, {z30\.s-z31\.s}
 [^ :]+:[0-9]+: Info:    	famin {z18\.d-z19\.d}, {z18\.d-z19\.d}, {z30\.d-z31\.d}
-[^ :]+:[0-9]+: Error: operand mismatch -- `famin {z24\.b-z27\.b},{z24\.b-z27\.b},{z19\.b-z22\.b}'
+[^ :]+:[0-9]+: Error: operand mismatch -- `famin { ?z24\.b ?- ?z27\.b ?},{ ?z24\.b ?- ?z27\.b ?},{ ?z19\.b ?- ?z22\.b ?}'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	famin {z24\.h-z27\.h}, {z24\.h-z27\.h}, {z19\.h-z22\.h}
 [^ :]+:[0-9]+: Info:    other valid variant\(s\):
 [^ :]+:[0-9]+: Info:    	famin {z24\.s-z27\.s}, {z24\.s-z27\.s}, {z19\.s-z22\.s}
 [^ :]+:[0-9]+: Info:    	famin {z24\.d-z27\.d}, {z24\.d-z27\.d}, {z19\.d-z22\.d}
-[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 1 -- `famax {z18\.h-z20\.h},{z18\.h-z20\.h},{z30\.h-z31\.h}'
-[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 1 -- `famax {z27\.s-z31\.s},{z27\.s-z31\.s},{z16\.s-z20\.s}'
-[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `famax {z27\.s-z28\.s},{z27\.s-z30\.s},{z16\.s-z17\.s}'
-[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 1 -- `famin {z18\.h-z20\.h},{z18\.h-z20\.h},{z30\.h-z31\.h}'
-[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 1 -- `famin {z27\.s-z31\.s},{z27\.s-z31\.s},{z16\.s-z20\.s}'
-[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `famin {z27\.s-z28\.s},{z27\.s-z30\.s},{z16\.s-z17\.s}'
-[^ :]+:[0-9]+: Error: comma expected between operands at operand 2 -- `famax {z18\.h-z19\.h}'
-[^ :]+:[0-9]+: Error: comma expected between operands at operand 3 -- `famax {z18\.h-z19\.h},{z18\.h-z19\.h}'
-[^ :]+:[0-9]+: Error: unexpected characters following instruction at operand 3 -- `famax {z18\.h-z19\.h},{z18\.h-z19\.h},{z12\.h-z13\.h},{z12\.h-z13\.h}'
-[^ :]+:[0-9]+: Error: comma expected between operands at operand 2 -- `famin {z18\.h-z19\.h}'
-[^ :]+:[0-9]+: Error: comma expected between operands at operand 3 -- `famin {z18\.h-z19\.h},{z18\.h-z19\.h}'
-[^ :]+:[0-9]+: Error: unexpected characters following instruction at operand 3 -- `famin {z18\.h-z19\.h},{z18\.h-z19\.h},{z12\.h-z13\.h},{z12\.h-z13\.h}'
-[^ :]+:[0-9]+: Error: unexpected character `t' in element size at operand 3 -- `famax {z18\.h-z19\.h},{z18\.h-z19\.h},{z30\.t-z31\.t}'
-[^ :]+:[0-9]+: Error: unexpected character `t' in element size at operand 1 -- `famax {z18\.t-z19\.t},{z18\.h-z19\.h},{z30\.h-z31\.h}'
-[^ :]+:[0-9]+: Error: unexpected character `t' in element size at operand 3 -- `famin {z18\.h-z19\.h},{z18\.h-z19\.h},{z30\.t-z31\.t}'
-[^ :]+:[0-9]+: Error: unexpected character `t' in element size at operand 1 -- `famin {z18\.t-z19\.t},{z18\.h-z19\.h},{z30\.h-z31\.h}'
-[^ :]+:[0-9]+: Error: syntax error in register list at operand 3 -- `famax {z18\.h-z19\.h},{z18\.h-z19\.h},\{30\.h-z31\.h}'
-[^ :]+:[0-9]+: Error: syntax error in register list at operand 2 -- `famax {z18\.h-z19\.h},\{18\.h-z19\.h},{z30\.h-z31\.h}'
-[^ :]+:[0-9]+: Error: syntax error in register list at operand 1 -- `famax {z18\.h-19\.h},{z18\.h-z19\.h},{z30\.h-z31\.h}'
-[^ :]+:[0-9]+: Error: missing type suffix at operand 3 -- `famax {z18\.h-z19\.h},{z18\.h-z19\.h},{z30-z31\.h}'
-[^ :]+:[0-9]+: Error: missing type suffix at operand 2 -- `famax {z18\.h-z19\.h},{z18-z19\.h},{z30\.h-z31\.h}'
-[^ :]+:[0-9]+: Error: missing type suffix at operand 1 -- `famax {z18-z19\.h},{z18\.h-z19\.h},{z30\.h-z31\.h}'
-[^ :]+:[0-9]+: Error: syntax error in register list at operand 3 -- `famin {z18\.h-z19\.h},{z18\.h-z19\.h},\{30\.h-z31\.h}'
-[^ :]+:[0-9]+: Error: syntax error in register list at operand 2 -- `famin {z18\.h-z19\.h},\{18\.h-z19\.h},{z30\.h-z31\.h}'
-[^ :]+:[0-9]+: Error: syntax error in register list at operand 1 -- `famin {z18\.h-19\.h},{z18\.h-z19\.h},{z30\.h-z31\.h}'
-[^ :]+:[0-9]+: Error: missing type suffix at operand 3 -- `famin {z18\.h-z19\.h},{z18\.h-z19\.h},{z30-z31\.h}'
-[^ :]+:[0-9]+: Error: missing type suffix at operand 2 -- `famin {z18\.h-z19\.h},{z18-z19\.h},{z30\.h-z31\.h}'
-[^ :]+:[0-9]+: Error: missing type suffix at operand 1 -- `famin {z18-z19\.h},{z18\.h-z19\.h},{z30\.h-z31\.h}'
-[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `famax {z18\.h-z19\.h},{z18\.h-z19\.h},{z34\.h-z35\.h}'
-[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `famax {z34\.h-z35\.h},{z34\.h-z35\.h},{z18\.h-z19\.h}'
-[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `famin {z18\.h-z19\.h},{z18\.h-z19\.h},{z34\.h-z35\.h}'
-[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `famin {z34\.h-z35\.h},{z34\.h-z35\.h},{z18\.h-z19\.h}'
-[^ :]+:[0-9]+: Warning: SVE `movprfx' compatible instruction expected -- `famax {z18\.h-z19\.h},{z18\.h-z19\.h},{z30\.h-z31\.h}'
-[^ :]+:[0-9]+: Warning: SVE `movprfx' compatible instruction expected -- `famin {z18\.h-z19\.h},{z18\.h-z19\.h},{z30\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 1 -- `famax { ?z18\.h ?- ?z20\.h ?},{ ?z18\.h ?- ?z20\.h ?},{ ?z30\.h ?- ?z31\.h ?}'
+[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 1 -- `famax { ?z27\.s ?- ?z31\.s ?},{ ?z27\.s ?- ?z31\.s ?},{ ?z16\.s ?- ?z20\.s ?}'
+[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `famax { ?z27\.s ?- ?z28\.s ?},{ ?z27\.s ?- ?z30\.s ?},{ ?z16\.s ?- ?z17\.s ?}'
+[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 1 -- `famin { ?z18\.h ?- ?z20\.h ?},{ ?z18\.h ?- ?z20\.h ?},{ ?z30\.h ?- ?z31\.h ?}'
+[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 1 -- `famin { ?z27\.s ?- ?z31\.s ?},{ ?z27\.s ?- ?z31\.s ?},{ ?z16\.s ?- ?z20\.s ?}'
+[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `famin { ?z27\.s ?- ?z28\.s ?},{ ?z27\.s ?- ?z30\.s ?},{ ?z16\.s ?- ?z17\.s ?}'
+[^ :]+:[0-9]+: Error: comma expected between operands at operand 2 -- `famax { ?z18\.h ?- ?z19\.h ?}'
+[^ :]+:[0-9]+: Error: comma expected between operands at operand 3 -- `famax { ?z18\.h ?- ?z19\.h ?},{ ?z18\.h ?- ?z19\.h ?}'
+[^ :]+:[0-9]+: Error: unexpected characters following instruction at operand 3 -- `famax { ?z18\.h ?- ?z19\.h ?},{ ?z18\.h ?- ?z19\.h ?},{ ?z12\.h ?- ?z13\.h ?},{ ?z12\.h ?- ?z13\.h ?}'
+[^ :]+:[0-9]+: Error: comma expected between operands at operand 2 -- `famin { ?z18\.h ?- ?z19\.h ?}'
+[^ :]+:[0-9]+: Error: comma expected between operands at operand 3 -- `famin { ?z18\.h ?- ?z19\.h ?},{ ?z18\.h ?- ?z19\.h ?}'
+[^ :]+:[0-9]+: Error: unexpected characters following instruction at operand 3 -- `famin { ?z18\.h ?- ?z19\.h ?},{ ?z18\.h ?- ?z19\.h ?},{ ?z12\.h ?- ?z13\.h ?},{ ?z12\.h ?- ?z13\.h ?}'
+[^ :]+:[0-9]+: Error: unexpected character `t' in element size at operand 3 -- `famax { ?z18\.h ?- ?z19\.h ?},{ ?z18\.h ?- ?z19\.h ?},{ ?z30\.t ?- ?z31\.t ?}'
+[^ :]+:[0-9]+: Error: unexpected character `t' in element size at operand 1 -- `famax { ?z18\.t ?- ?z19\.t ?},{ ?z18\.h ?- ?z19\.h ?},{ ?z30\.h ?- ?z31\.h ?}'
+[^ :]+:[0-9]+: Error: unexpected character `t' in element size at operand 3 -- `famin { ?z18\.h ?- ?z19\.h ?},{ ?z18\.h ?- ?z19\.h ?},{ ?z30\.t ?- ?z31\.t ?}'
+[^ :]+:[0-9]+: Error: unexpected character `t' in element size at operand 1 -- `famin { ?z18\.t ?- ?z19\.t ?},{ ?z18\.h ?- ?z19\.h ?},{ ?z30\.h ?- ?z31\.h ?}'
+[^ :]+:[0-9]+: Error: syntax error in register list at operand 3 -- `famax { ?z18\.h ?- ?z19\.h ?},{ ?z18\.h ?- ?z19\.h ?},\{ ?30\.h ?- ?z31\.h ?}'
+[^ :]+:[0-9]+: Error: syntax error in register list at operand 2 -- `famax { ?z18\.h ?- ?z19\.h ?},\{ ?18\.h ?- ?z19\.h ?},{ ?z30\.h ?- ?z31\.h ?}'
+[^ :]+:[0-9]+: Error: syntax error in register list at operand 1 -- `famax { ?z18\.h ?- ?19\.h ?},{ ?z18\.h ?- ?z19\.h ?},{ ?z30\.h ?- ?z31\.h ?}'
+[^ :]+:[0-9]+: Error: missing type suffix at operand 3 -- `famax { ?z18\.h ?- ?z19\.h ?},{ ?z18\.h ?- ?z19\.h ?},{ ?z30 ?- ?z31\.h ?}'
+[^ :]+:[0-9]+: Error: missing type suffix at operand 2 -- `famax { ?z18\.h ?- ?z19\.h ?},{ ?z18 ?- ?z19\.h ?},{ ?z30\.h ?- ?z31\.h ?}'
+[^ :]+:[0-9]+: Error: missing type suffix at operand 1 -- `famax { ?z18 ?- ?z19\.h ?},{ ?z18\.h ?- ?z19\.h ?},{ ?z30\.h ?- ?z31\.h ?}'
+[^ :]+:[0-9]+: Error: syntax error in register list at operand 3 -- `famin { ?z18\.h ?- ?z19\.h ?},{ ?z18\.h ?- ?z19\.h ?},\{ ?30\.h ?- ?z31\.h ?}'
+[^ :]+:[0-9]+: Error: syntax error in register list at operand 2 -- `famin { ?z18\.h ?- ?z19\.h ?},\{ ?18\.h ?- ?z19\.h ?},{ ?z30\.h ?- ?z31\.h ?}'
+[^ :]+:[0-9]+: Error: syntax error in register list at operand 1 -- `famin { ?z18\.h ?- ?19\.h ?},{ ?z18\.h ?- ?z19\.h ?},{ ?z30\.h ?- ?z31\.h ?}'
+[^ :]+:[0-9]+: Error: missing type suffix at operand 3 -- `famin { ?z18\.h ?- ?z19\.h ?},{ ?z18\.h ?- ?z19\.h ?},{ ?z30 ?- ?z31\.h ?}'
+[^ :]+:[0-9]+: Error: missing type suffix at operand 2 -- `famin { ?z18\.h ?- ?z19\.h ?},{ ?z18 ?- ?z19\.h ?},{ ?z30\.h ?- ?z31\.h ?}'
+[^ :]+:[0-9]+: Error: missing type suffix at operand 1 -- `famin { ?z18 ?- ?z19\.h ?},{ ?z18\.h ?- ?z19\.h ?},{ ?z30\.h ?- ?z31\.h ?}'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `famax { ?z18\.h ?- ?z19\.h ?},{ ?z18\.h ?- ?z19\.h ?},{ ?z34\.h ?- ?z35\.h ?}'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `famax { ?z34\.h ?- ?z35\.h ?},{ ?z34\.h ?- ?z35\.h ?},{ ?z18\.h ?- ?z19\.h ?}'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `famin { ?z18\.h ?- ?z19\.h ?},{ ?z18\.h ?- ?z19\.h ?},{ ?z34\.h ?- ?z35\.h ?}'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `famin { ?z34\.h ?- ?z35\.h ?},{ ?z34\.h ?- ?z35\.h ?},{ ?z18\.h ?- ?z19\.h ?}'
+[^ :]+:[0-9]+: Warning: SVE `movprfx' compatible instruction expected -- `famax { ?z18\.h ?- ?z19\.h ?},{ ?z18\.h ?- ?z19\.h ?},{ ?z30\.h ?- ?z31\.h ?}'
+[^ :]+:[0-9]+: Warning: SVE `movprfx' compatible instruction expected -- `famin { ?z18\.h ?- ?z19\.h ?},{ ?z18\.h ?- ?z19\.h ?},{ ?z30\.h ?- ?z31\.h ?}'
diff --git a/gas/testsuite/gas/aarch64/sme2-fp8-fail.l b/gas/testsuite/gas/aarch64/sme2-fp8-fail.l
index f25fd60..3612c88 100644
--- a/gas/testsuite/gas/aarch64/sme2-fp8-fail.l
+++ b/gas/testsuite/gas/aarch64/sme2-fp8-fail.l
@@ -175,99 +175,99 @@
 [^:]+:64:  Info: macro invoked from here
 [^:]+:60: Error: start register out of range at operand 2 -- `fcvt z4.b,{z3.s-z6.s}'
 [^:]+:64:  Info: macro invoked from here
-[^:]+:69: Error: operand 2 must be the same register as operand 1 -- `fscale {z0.h-z1.h},{z2.h-z3.h},z2.h'
+[^:]+:69: Error: operand 2 must be the same register as operand 1 -- `fscale { ?z0.h ?- ?z1.h ?},{ ?z2.h ?- ?z3.h ?},z2.h'
 [^:]+:81:  Info: macro invoked from here
-[^:]+:71: Error: start register out of range at operand 1 -- `fscale {z1.h-z2.h},{z1.h-z2.h},z3.h'
+[^:]+:71: Error: start register out of range at operand 1 -- `fscale { ?z1.h ?- ?z2.h ?},{ ?z1.h ?- ?z2.h ?},z3.h'
 [^:]+:81:  Info: macro invoked from here
-[^:]+:74: Error: operand 2 must be the same register as operand 1 -- `fscale {z0.h-z3.h},{z1.h-z4.h},z4.h'
+[^:]+:74: Error: operand 2 must be the same register as operand 1 -- `fscale { ?z0.h ?- ?z3.h ?},{ ?z1.h ?- ?z4.h ?},z4.h'
 [^:]+:81:  Info: macro invoked from here
-[^:]+:76: Error: start register out of range at operand 1 -- `fscale {z1.h-z4.h},{z1.h-z4.h},z4.h'
+[^:]+:76: Error: start register out of range at operand 1 -- `fscale { ?z1.h ?- ?z4.h ?},{ ?z1.h ?- ?z4.h ?},z4.h'
 [^:]+:81:  Info: macro invoked from here
-[^:]+:77: Error: start register out of range at operand 1 -- `fscale {z2.h-z5.h},{z2.h-z5.h},z4.h'
+[^:]+:77: Error: start register out of range at operand 1 -- `fscale { ?z2.h ?- ?z5.h ?},{ ?z2.h ?- ?z5.h ?},z4.h'
 [^:]+:81:  Info: macro invoked from here
-[^:]+:78: Error: start register out of range at operand 1 -- `fscale {z3.h-z6.h},{z3.h-z6.h},z4.h'
+[^:]+:78: Error: start register out of range at operand 1 -- `fscale { ?z3.h ?- ?z6.h ?},{ ?z3.h ?- ?z6.h ?},z4.h'
 [^:]+:81:  Info: macro invoked from here
-[^:]+:69: Error: operand 2 must be the same register as operand 1 -- `fscale {z0.s-z1.s},{z2.s-z3.s},z2.s'
+[^:]+:69: Error: operand 2 must be the same register as operand 1 -- `fscale { ?z0.s ?- ?z1.s ?},{ ?z2.s ?- ?z3.s ?},z2.s'
 [^:]+:82:  Info: macro invoked from here
-[^:]+:71: Error: start register out of range at operand 1 -- `fscale {z1.s-z2.s},{z1.s-z2.s},z3.s'
+[^:]+:71: Error: start register out of range at operand 1 -- `fscale { ?z1.s ?- ?z2.s ?},{ ?z1.s ?- ?z2.s ?},z3.s'
 [^:]+:82:  Info: macro invoked from here
-[^:]+:74: Error: operand 2 must be the same register as operand 1 -- `fscale {z0.s-z3.s},{z1.s-z4.s},z4.s'
+[^:]+:74: Error: operand 2 must be the same register as operand 1 -- `fscale { ?z0.s ?- ?z3.s ?},{ ?z1.s ?- ?z4.s ?},z4.s'
 [^:]+:82:  Info: macro invoked from here
-[^:]+:76: Error: start register out of range at operand 1 -- `fscale {z1.s-z4.s},{z1.s-z4.s},z4.s'
+[^:]+:76: Error: start register out of range at operand 1 -- `fscale { ?z1.s ?- ?z4.s ?},{ ?z1.s ?- ?z4.s ?},z4.s'
 [^:]+:82:  Info: macro invoked from here
-[^:]+:77: Error: start register out of range at operand 1 -- `fscale {z2.s-z5.s},{z2.s-z5.s},z4.s'
+[^:]+:77: Error: start register out of range at operand 1 -- `fscale { ?z2.s ?- ?z5.s ?},{ ?z2.s ?- ?z5.s ?},z4.s'
 [^:]+:82:  Info: macro invoked from here
-[^:]+:78: Error: start register out of range at operand 1 -- `fscale {z3.s-z6.s},{z3.s-z6.s},z4.s'
+[^:]+:78: Error: start register out of range at operand 1 -- `fscale { ?z3.s ?- ?z6.s ?},{ ?z3.s ?- ?z6.s ?},z4.s'
 [^:]+:82:  Info: macro invoked from here
-[^:]+:69: Error: operand 2 must be the same register as operand 1 -- `fscale {z0.d-z1.d},{z2.d-z3.d},z2.d'
+[^:]+:69: Error: operand 2 must be the same register as operand 1 -- `fscale { ?z0.d ?- ?z1.d ?},{ ?z2.d ?- ?z3.d ?},z2.d'
 [^:]+:83:  Info: macro invoked from here
-[^:]+:71: Error: start register out of range at operand 1 -- `fscale {z1.d-z2.d},{z1.d-z2.d},z3.d'
+[^:]+:71: Error: start register out of range at operand 1 -- `fscale { ?z1.d ?- ?z2.d ?},{ ?z1.d ?- ?z2.d ?},z3.d'
 [^:]+:83:  Info: macro invoked from here
-[^:]+:74: Error: operand 2 must be the same register as operand 1 -- `fscale {z0.d-z3.d},{z1.d-z4.d},z4.d'
+[^:]+:74: Error: operand 2 must be the same register as operand 1 -- `fscale { ?z0.d ?- ?z3.d ?},{ ?z1.d ?- ?z4.d ?},z4.d'
 [^:]+:83:  Info: macro invoked from here
-[^:]+:76: Error: start register out of range at operand 1 -- `fscale {z1.d-z4.d},{z1.d-z4.d},z4.d'
+[^:]+:76: Error: start register out of range at operand 1 -- `fscale { ?z1.d ?- ?z4.d ?},{ ?z1.d ?- ?z4.d ?},z4.d'
 [^:]+:83:  Info: macro invoked from here
-[^:]+:77: Error: start register out of range at operand 1 -- `fscale {z2.d-z5.d},{z2.d-z5.d},z4.d'
+[^:]+:77: Error: start register out of range at operand 1 -- `fscale { ?z2.d ?- ?z5.d ?},{ ?z2.d ?- ?z5.d ?},z4.d'
 [^:]+:83:  Info: macro invoked from here
-[^:]+:78: Error: start register out of range at operand 1 -- `fscale {z3.d-z6.d},{z3.d-z6.d},z4.d'
+[^:]+:78: Error: start register out of range at operand 1 -- `fscale { ?z3.d ?- ?z6.d ?},{ ?z3.d ?- ?z6.d ?},z4.d'
 [^:]+:83:  Info: macro invoked from here
-[^:]+:88: Error: operand 2 must be the same register as operand 1 -- `fscale {z0.h-z1.h},{z1.h-z2.h},{z2.h-z3.h}'
+[^:]+:88: Error: operand 2 must be the same register as operand 1 -- `fscale { ?z0.h ?- ?z1.h ?},{ ?z1.h ?- ?z2.h ?},{ ?z2.h ?- ?z3.h ?}'
 [^:]+:104:  Info: macro invoked from here
-[^:]+:90: Error: start register out of range at operand 1 -- `fscale {z1.h-z2.h},{z1.h-z2.h},{z2.h-z3.h}'
+[^:]+:90: Error: start register out of range at operand 1 -- `fscale { ?z1.h ?- ?z2.h ?},{ ?z1.h ?- ?z2.h ?},{ ?z2.h ?- ?z3.h ?}'
 [^:]+:104:  Info: macro invoked from here
-[^:]+:91: Error: start register out of range at operand 1 -- `fscale {z1.h-z2.h},{z1.h-z2.h},{z3.h-z4.h}'
+[^:]+:91: Error: start register out of range at operand 1 -- `fscale { ?z1.h ?- ?z2.h ?},{ ?z1.h ?- ?z2.h ?},{ ?z3.h ?- ?z4.h ?}'
 [^:]+:104:  Info: macro invoked from here
-[^:]+:94: Error: operand 2 must be the same register as operand 1 -- `fscale {z0.h-z3.h},{z1.h-z4.h},{z4.h-z7.h}'
+[^:]+:94: Error: operand 2 must be the same register as operand 1 -- `fscale { ?z0.h ?- ?z3.h ?},{ ?z1.h ?- ?z4.h ?},{ ?z4.h ?- ?z7.h ?}'
 [^:]+:104:  Info: macro invoked from here
-[^:]+:96: Error: start register out of range at operand 1 -- `fscale {z1.h-z4.h},{z1.h-z4.h},{z4.h-z7.h}'
+[^:]+:96: Error: start register out of range at operand 1 -- `fscale { ?z1.h ?- ?z4.h ?},{ ?z1.h ?- ?z4.h ?},{ ?z4.h ?- ?z7.h ?}'
 [^:]+:104:  Info: macro invoked from here
-[^:]+:97: Error: start register out of range at operand 1 -- `fscale {z2.h-z5.h},{z2.h-z5.h},{z4.h-z7.h}'
+[^:]+:97: Error: start register out of range at operand 1 -- `fscale { ?z2.h ?- ?z5.h ?},{ ?z2.h ?- ?z5.h ?},{ ?z4.h ?- ?z7.h ?}'
 [^:]+:104:  Info: macro invoked from here
-[^:]+:98: Error: start register out of range at operand 1 -- `fscale {z3.h-z6.h},{z3.h-z6.h},{z4.h-z7.h}'
+[^:]+:98: Error: start register out of range at operand 1 -- `fscale { ?z3.h ?- ?z6.h ?},{ ?z3.h ?- ?z6.h ?},{ ?z4.h ?- ?z7.h ?}'
 [^:]+:104:  Info: macro invoked from here
-[^:]+:99: Error: start register out of range at operand 3 -- `fscale {z0.h-z3.h},{z0.h-z3.h},{z5.h-z8.h}'
+[^:]+:99: Error: start register out of range at operand 3 -- `fscale { ?z0.h ?- ?z3.h ?},{ ?z0.h ?- ?z3.h ?},{ ?z5.h ?- ?z8.h ?}'
 [^:]+:104:  Info: macro invoked from here
-[^:]+:100: Error: start register out of range at operand 3 -- `fscale {z0.h-z3.h},{z0.h-z3.h},{z6.h-z9.h}'
+[^:]+:100: Error: start register out of range at operand 3 -- `fscale { ?z0.h ?- ?z3.h ?},{ ?z0.h ?- ?z3.h ?},{ ?z6.h ?- ?z9.h ?}'
 [^:]+:104:  Info: macro invoked from here
-[^:]+:101: Error: start register out of range at operand 3 -- `fscale {z0.h-z3.h},{z0.h-z3.h},{z7.h-z10.h}'
+[^:]+:101: Error: start register out of range at operand 3 -- `fscale { ?z0.h ?- ?z3.h ?},{ ?z0.h ?- ?z3.h ?},{ ?z7.h ?- ?z10.h ?}'
 [^:]+:104:  Info: macro invoked from here
-[^:]+:88: Error: operand 2 must be the same register as operand 1 -- `fscale {z0.s-z1.s},{z1.s-z2.s},{z2.s-z3.s}'
+[^:]+:88: Error: operand 2 must be the same register as operand 1 -- `fscale { ?z0.s ?- ?z1.s ?},{ ?z1.s ?- ?z2.s ?},{ ?z2.s ?- ?z3.s ?}'
 [^:]+:105:  Info: macro invoked from here
-[^:]+:90: Error: start register out of range at operand 1 -- `fscale {z1.s-z2.s},{z1.s-z2.s},{z2.s-z3.s}'
+[^:]+:90: Error: start register out of range at operand 1 -- `fscale { ?z1.s ?- ?z2.s ?},{ ?z1.s ?- ?z2.s ?},{ ?z2.s ?- ?z3.s ?}'
 [^:]+:105:  Info: macro invoked from here
-[^:]+:91: Error: start register out of range at operand 1 -- `fscale {z1.s-z2.s},{z1.s-z2.s},{z3.s-z4.s}'
+[^:]+:91: Error: start register out of range at operand 1 -- `fscale { ?z1.s ?- ?z2.s ?},{ ?z1.s ?- ?z2.s ?},{ ?z3.s ?- ?z4.s ?}'
 [^:]+:105:  Info: macro invoked from here
-[^:]+:94: Error: operand 2 must be the same register as operand 1 -- `fscale {z0.s-z3.s},{z1.s-z4.s},{z4.s-z7.s}'
+[^:]+:94: Error: operand 2 must be the same register as operand 1 -- `fscale { ?z0.s ?- ?z3.s ?},{ ?z1.s ?- ?z4.s ?},{ ?z4.s ?- ?z7.s ?}'
 [^:]+:105:  Info: macro invoked from here
-[^:]+:96: Error: start register out of range at operand 1 -- `fscale {z1.s-z4.s},{z1.s-z4.s},{z4.s-z7.s}'
+[^:]+:96: Error: start register out of range at operand 1 -- `fscale { ?z1.s ?- ?z4.s ?},{ ?z1.s ?- ?z4.s ?},{ ?z4.s ?- ?z7.s ?}'
 [^:]+:105:  Info: macro invoked from here
-[^:]+:97: Error: start register out of range at operand 1 -- `fscale {z2.s-z5.s},{z2.s-z5.s},{z4.s-z7.s}'
+[^:]+:97: Error: start register out of range at operand 1 -- `fscale { ?z2.s ?- ?z5.s ?},{ ?z2.s ?- ?z5.s ?},{ ?z4.s ?- ?z7.s ?}'
 [^:]+:105:  Info: macro invoked from here
-[^:]+:98: Error: start register out of range at operand 1 -- `fscale {z3.s-z6.s},{z3.s-z6.s},{z4.s-z7.s}'
+[^:]+:98: Error: start register out of range at operand 1 -- `fscale { ?z3.s ?- ?z6.s ?},{ ?z3.s ?- ?z6.s ?},{ ?z4.s ?- ?z7.s ?}'
 [^:]+:105:  Info: macro invoked from here
-[^:]+:99: Error: start register out of range at operand 3 -- `fscale {z0.s-z3.s},{z0.s-z3.s},{z5.s-z8.s}'
+[^:]+:99: Error: start register out of range at operand 3 -- `fscale { ?z0.s ?- ?z3.s ?},{ ?z0.s ?- ?z3.s ?},{ ?z5.s ?- ?z8.s ?}'
 [^:]+:105:  Info: macro invoked from here
-[^:]+:100: Error: start register out of range at operand 3 -- `fscale {z0.s-z3.s},{z0.s-z3.s},{z6.s-z9.s}'
+[^:]+:100: Error: start register out of range at operand 3 -- `fscale { ?z0.s ?- ?z3.s ?},{ ?z0.s ?- ?z3.s ?},{ ?z6.s ?- ?z9.s ?}'
 [^:]+:105:  Info: macro invoked from here
-[^:]+:101: Error: start register out of range at operand 3 -- `fscale {z0.s-z3.s},{z0.s-z3.s},{z7.s-z10.s}'
+[^:]+:101: Error: start register out of range at operand 3 -- `fscale { ?z0.s ?- ?z3.s ?},{ ?z0.s ?- ?z3.s ?},{ ?z7.s ?- ?z10.s ?}'
 [^:]+:105:  Info: macro invoked from here
-[^:]+:88: Error: operand 2 must be the same register as operand 1 -- `fscale {z0.d-z1.d},{z1.d-z2.d},{z2.d-z3.d}'
+[^:]+:88: Error: operand 2 must be the same register as operand 1 -- `fscale { ?z0.d ?- ?z1.d ?},{ ?z1.d ?- ?z2.d ?},{ ?z2.d ?- ?z3.d ?}'
 [^:]+:106:  Info: macro invoked from here
-[^:]+:90: Error: start register out of range at operand 1 -- `fscale {z1.d-z2.d},{z1.d-z2.d},{z2.d-z3.d}'
+[^:]+:90: Error: start register out of range at operand 1 -- `fscale { ?z1.d ?- ?z2.d ?},{ ?z1.d ?- ?z2.d ?},{ ?z2.d ?- ?z3.d ?}'
 [^:]+:106:  Info: macro invoked from here
-[^:]+:91: Error: start register out of range at operand 1 -- `fscale {z1.d-z2.d},{z1.d-z2.d},{z3.d-z4.d}'
+[^:]+:91: Error: start register out of range at operand 1 -- `fscale { ?z1.d ?- ?z2.d ?},{ ?z1.d ?- ?z2.d ?},{ ?z3.d ?- ?z4.d ?}'
 [^:]+:106:  Info: macro invoked from here
-[^:]+:94: Error: operand 2 must be the same register as operand 1 -- `fscale {z0.d-z3.d},{z1.d-z4.d},{z4.d-z7.d}'
+[^:]+:94: Error: operand 2 must be the same register as operand 1 -- `fscale { ?z0.d ?- ?z3.d ?},{ ?z1.d ?- ?z4.d ?},{ ?z4.d ?- ?z7.d ?}'
 [^:]+:106:  Info: macro invoked from here
-[^:]+:96: Error: start register out of range at operand 1 -- `fscale {z1.d-z4.d},{z1.d-z4.d},{z4.d-z7.d}'
+[^:]+:96: Error: start register out of range at operand 1 -- `fscale { ?z1.d ?- ?z4.d ?},{ ?z1.d ?- ?z4.d ?},{ ?z4.d ?- ?z7.d ?}'
 [^:]+:106:  Info: macro invoked from here
-[^:]+:97: Error: start register out of range at operand 1 -- `fscale {z2.d-z5.d},{z2.d-z5.d},{z4.d-z7.d}'
+[^:]+:97: Error: start register out of range at operand 1 -- `fscale { ?z2.d ?- ?z5.d ?},{ ?z2.d ?- ?z5.d ?},{ ?z4.d ?- ?z7.d ?}'
 [^:]+:106:  Info: macro invoked from here
-[^:]+:98: Error: start register out of range at operand 1 -- `fscale {z3.d-z6.d},{z3.d-z6.d},{z4.d-z7.d}'
+[^:]+:98: Error: start register out of range at operand 1 -- `fscale { ?z3.d ?- ?z6.d ?},{ ?z3.d ?- ?z6.d ?},{ ?z4.d ?- ?z7.d ?}'
 [^:]+:106:  Info: macro invoked from here
-[^:]+:99: Error: start register out of range at operand 3 -- `fscale {z0.d-z3.d},{z0.d-z3.d},{z5.d-z8.d}'
+[^:]+:99: Error: start register out of range at operand 3 -- `fscale { ?z0.d ?- ?z3.d ?},{ ?z0.d ?- ?z3.d ?},{ ?z5.d ?- ?z8.d ?}'
 [^:]+:106:  Info: macro invoked from here
-[^:]+:100: Error: start register out of range at operand 3 -- `fscale {z0.d-z3.d},{z0.d-z3.d},{z6.d-z9.d}'
+[^:]+:100: Error: start register out of range at operand 3 -- `fscale { ?z0.d ?- ?z3.d ?},{ ?z0.d ?- ?z3.d ?},{ ?z6.d ?- ?z9.d ?}'
 [^:]+:106:  Info: macro invoked from here
-[^:]+:101: Error: start register out of range at operand 3 -- `fscale {z0.d-z3.d},{z0.d-z3.d},{z7.d-z10.d}'
+[^:]+:101: Error: start register out of range at operand 3 -- `fscale { ?z0.d ?- ?z3.d ?},{ ?z0.d ?- ?z3.d ?},{ ?z7.d ?- ?z10.d ?}'
 [^:]+:106:  Info: macro invoked from here
diff --git a/gas/testsuite/gas/aarch64/sme2-i16i64-1-invalid.l b/gas/testsuite/gas/aarch64/sme2-i16i64-1-invalid.l
index d9d537a..2ff72ce 100644
--- a/gas/testsuite/gas/aarch64/sme2-i16i64-1-invalid.l
+++ b/gas/testsuite/gas/aarch64/sme2-i16i64-1-invalid.l
@@ -1,110 +1,110 @@
 [^ :]+: Assembler messages:
-[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.d\[w7,0\],{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.d\[w12,0\],{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.d\[w8,-1\],{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.d\[w8,8\],{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `add za\.d\[w8,0\],{z0\.d-z2\.d}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `add za\.d\[w8,0\],{z1\.d-z2\.d}'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.d\[w7,0\],{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.d\[w12,0\],{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.d\[w8,-1\],{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.d\[w8,8\],{z1\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `add za\.d\[w8,0\],{z1\.d-z4\.d}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `add za\.d\[w8,0\],{z2\.d-z5\.d}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `add za\.d\[w8,0\],{z3\.d-z6\.d}'
-[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `add za\.d\[w8,0,vgx4\],{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `add za\.d\[w8,0,vgx2\],{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: operand mismatch -- `add za\[w8,0\],{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.d\[w7,0\],{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.d\[w12,0\],{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.d\[w8,-1\],{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.d\[w8,8\],{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `add za\.d\[w8,0\],{ ?z0\.d ?- ?z2\.d ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `add za\.d\[w8,0\],{ ?z1\.d ?- ?z2\.d ?}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.d\[w7,0\],{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.d\[w12,0\],{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.d\[w8,-1\],{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.d\[w8,8\],{ ?z1\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `add za\.d\[w8,0\],{ ?z1\.d ?- ?z4\.d ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `add za\.d\[w8,0\],{ ?z2\.d ?- ?z5\.d ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `add za\.d\[w8,0\],{ ?z3\.d ?- ?z6\.d ?}'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `add za\.d\[w8,0,vgx4\],{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `add za\.d\[w8,0,vgx2\],{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: operand mismatch -- `add za\[w8,0\],{ ?z0\.d ?- ?z1\.d ?}'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	add za\.d\[w8, 0\], {z0\.d-z1\.d}
 [^ :]+:[0-9]+: Info:    other valid variant\(s\):
 [^ :]+:[0-9]+: Info:    	add za\.s\[w8, 0\], {z0\.s-z1\.s}
-[^ :]+:[0-9]+: Error: missing type suffix at operand 2 -- `add za\.d\[w8,0\],{z0-z1}'
-[^ :]+:[0-9]+: Error: operand mismatch -- `add za\.d\[w8,0\],{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: missing type suffix at operand 2 -- `add za\.d\[w8,0\],{ ?z0 ?- ?z1 ?}'
+[^ :]+:[0-9]+: Error: operand mismatch -- `add za\.d\[w8,0\],{ ?z0\.s ?- ?z1\.s ?}'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	add za\.s\[w8, 0\], {z0\.s-z1\.s}
 [^ :]+:[0-9]+: Info:    other valid variant\(s\):
 [^ :]+:[0-9]+: Info:    	add za\.d\[w8, 0\], {z0\.d-z1\.d}
-[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.d\[w0,0\],{z0\.d-z1\.d},z0\.d'
-[^ :]+:[0-9]+: Error: expected a 32-bit selection register at operand 1 -- `add za\.d\[w31,0\],{z0\.d-z1\.d},z0\.d'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.d\[w8,1<<63\],{z0\.d-z1\.d},z0\.d'
-[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `add za\.d\[w8,0\],{z0\.d-z1\.d},z31\.d'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.d\[w7,0\],{z0\.d-z1\.d},z0\.d'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.d\[w12,0\],{z0\.d-z1\.d},z0\.d'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.d\[w8,-1\],{z0\.d-z1\.d},z0\.d'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.d\[w8,8\],{z0\.d-z1\.d},z0\.d'
-[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `add za\.d\[w8,0\],{z0\.d-z1\.d},z16\.d'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.d\[w7,0\],{z0\.d-z3\.d},z0\.d'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.d\[w12,0\],{z0\.d-z3\.d},z0\.d'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.d\[w8,-1\],{z0\.d-z3\.d},z0\.d'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.d\[w8,8\],{z0\.d-z3\.d},z0\.d'
-[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `add za\.d\[w8,0\],{z0\.d-z3\.d},z16\.d'
-[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `add za\.d\[w8,0\],{z0\.d-z2\.d},z0\.d'
-[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 2 -- `add za\.d\[w8,0\],{z0\.d-z4\.d},z0\.d'
-[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `add za\.d\[w8,0\],{z0\.d,z1\.d,z2\.d},z0\.d'
-[^ :]+:[0-9]+: Error: invalid register list at operand 2 -- `add za\.d\[w8,0\],{z0\.d,z1\.d,z5\.d},z0\.d'
-[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `add za\.d\[w8,0,vgx4\],{z0\.d-z1\.d},z0\.d'
-[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `add za\.d\[w8,0,vgx2\],{z0\.d-z3\.d},z0\.d'
-[^ :]+:[0-9]+: Error: operand mismatch -- `add za\[w8,0\],{z0\.d-z1\.d},z0\.d'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.d\[w0,0\],{ ?z0\.d ?- ?z1\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: expected a 32-bit selection register at operand 1 -- `add za\.d\[w31,0\],{ ?z0\.d ?- ?z1\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.d\[w8,1<<63\],{ ?z0\.d ?- ?z1\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: z0 ?- ?z15 expected at operand 3 -- `add za\.d\[w8,0\],{ ?z0\.d ?- ?z1\.d ?},z31\.d'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.d\[w7,0\],{ ?z0\.d ?- ?z1\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.d\[w12,0\],{ ?z0\.d ?- ?z1\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.d\[w8,-1\],{ ?z0\.d ?- ?z1\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.d\[w8,8\],{ ?z0\.d ?- ?z1\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: z0 ?- ?z15 expected at operand 3 -- `add za\.d\[w8,0\],{ ?z0\.d ?- ?z1\.d ?},z16\.d'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.d\[w7,0\],{ ?z0\.d ?- ?z3\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.d\[w12,0\],{ ?z0\.d ?- ?z3\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.d\[w8,-1\],{ ?z0\.d ?- ?z3\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.d\[w8,8\],{ ?z0\.d ?- ?z3\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: z0 ?- ?z15 expected at operand 3 -- `add za\.d\[w8,0\],{ ?z0\.d ?- ?z3\.d ?},z16\.d'
+[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `add za\.d\[w8,0\],{ ?z0\.d ?- ?z2\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 2 -- `add za\.d\[w8,0\],{ ?z0\.d ?- ?z4\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `add za\.d\[w8,0\],{ ?z0\.d,z1\.d,z2\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: invalid register list at operand 2 -- `add za\.d\[w8,0\],{ ?z0\.d,z1\.d,z5\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `add za\.d\[w8,0,vgx4\],{ ?z0\.d ?- ?z1\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `add za\.d\[w8,0,vgx2\],{ ?z0\.d ?- ?z3\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: operand mismatch -- `add za\[w8,0\],{ ?z0\.d ?- ?z1\.d ?},z0\.d'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	add za\.d\[w8, 0\], {z0\.d-z1\.d}, z0\.d
 [^ :]+:[0-9]+: Info:    other valid variant\(s\):
 [^ :]+:[0-9]+: Info:    	add za\.s\[w8, 0\], {z0\.s-z1\.s}, z0\.s
-[^ :]+:[0-9]+: Error: missing type suffix at operand 2 -- `add za\.d\[w8,0\],{z0-z1},z0\.d'
-[^ :]+:[0-9]+: Error: operand mismatch -- `add za\.d\[w8,0\],{z0\.d-z1\.d},z0'
+[^ :]+:[0-9]+: Error: missing type suffix at operand 2 -- `add za\.d\[w8,0\],{ ?z0 ?- ?z1 ?},z0\.d'
+[^ :]+:[0-9]+: Error: operand mismatch -- `add za\.d\[w8,0\],{ ?z0\.d ?- ?z1\.d ?},z0'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	add za\.d\[w8, 0\], {z0\.d-z1\.d}, z0\.d
 [^ :]+:[0-9]+: Info:    other valid variant\(s\):
 [^ :]+:[0-9]+: Info:    	add za\.s\[w8, 0\], {z0\.s-z1\.s}, z0\.s
-[^ :]+:[0-9]+: Error: operand mismatch -- `add za\[w8,0\],{z0\.d-z1\.d},z0'
+[^ :]+:[0-9]+: Error: operand mismatch -- `add za\[w8,0\],{ ?z0\.d ?- ?z1\.d ?},z0'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	add za\.d\[w8, 0\], {z0\.d-z1\.d}, z0\.d
 [^ :]+:[0-9]+: Info:    other valid variant\(s\):
 [^ :]+:[0-9]+: Info:    	add za\.s\[w8, 0\], {z0\.s-z1\.s}, z0\.s
-[^ :]+:[0-9]+: Error: operand mismatch -- `add za\.s\[w8,0\],{z0\.d-z1\.d},z0\.s'
+[^ :]+:[0-9]+: Error: operand mismatch -- `add za\.s\[w8,0\],{ ?z0\.d ?- ?z1\.d ?},z0\.s'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	add za\.s\[w8, 0\], {z0\.s-z1\.s}, z0\.s
 [^ :]+:[0-9]+: Info:    other valid variant\(s\):
 [^ :]+:[0-9]+: Info:    	add za\.d\[w8, 0\], {z0\.d-z1\.d}, z0\.d
-[^ :]+:[0-9]+: Error: operand mismatch -- `add za\.d\[w8,0\],{z0\.s-z1\.s},z0\.d'
+[^ :]+:[0-9]+: Error: operand mismatch -- `add za\.d\[w8,0\],{ ?z0\.s ?- ?z1\.s ?},z0\.d'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	add za\.d\[w8, 0\], {z0\.d-z1\.d}, z0\.d
 [^ :]+:[0-9]+: Info:    other valid variant\(s\):
 [^ :]+:[0-9]+: Info:    	add za\.s\[w8, 0\], {z0\.s-z1\.s}, z0\.s
-[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.d\[w0,0\],{z0\.d-z1\.d},{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: expected a 32-bit selection register at operand 1 -- `add za\.d\[w31,0\],{z0\.d-z1\.d},{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.d\[w8,1<<63\],{z0\.d-z1\.d},{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.d\[w7,0\],{z0\.d-z1\.d},{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.d\[w12,0\],{z0\.d-z1\.d},{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.d\[w8,-1\],{z0\.d-z1\.d},{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.d\[w8,8\],{z0\.d-z1\.d},{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.d\[w8,8\],{z1\.d-z2\.d},{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `add za\.d\[w8,0\],{z0\.d-z1\.d},{z15\.d-z16\.d}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `add za\.d\[w8,0\],{z0\.d-z1\.d},{z31\.d,z0\.d}'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.d\[w7,0\],{z0\.d-z3\.d},{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.d\[w12,0\],{z0\.d-z3\.d},{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.d\[w8,-1\],{z0\.d-z3\.d},{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.d\[w8,8\],{z0\.d-z3\.d},{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `add za\.d\[w8,0\],{z1\.d-z4\.d},{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `add za\.d\[w8,0\],{z2\.d-z5\.d},{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `add za\.d\[w8,0\],{z3\.d-z6\.d},{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `add za\.d\[w8,0\],{z0\.d-z3\.d},{z15\.d-z18\.d}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `add za\.d\[w8,0\],{z0\.d-z3\.d},{z29\.d,z30\.d,z31\.d,z0\.d}'
-[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `add za\.d\[w8,0\],{z0\.d-z2\.d},{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `add za\.d\[w8,0\],{z0\.d-z3\.d},{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `add za\.d\[w8,0\],{z0\.d-z1\.d},{z0\.d-z2\.d}'
-[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `add za\.d\[w8,0\],{z0\.d-z1\.d},{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 3 -- `add za\.d\[w8,0\],{z0\.d-z1\.d},{z0\.d-z4\.d}'
-[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `add za\.d\[w8,0,vgx4\],{z0\.d-z1\.d},{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `add za\.d\[w8,0,vgx4\],{z0\.d-z3\.d},{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `add za\.d\[w8,0,vgx2\],{z0\.d-z1\.d},{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `add za\.d\[w8,0,vgx2\],{z0\.d-z3\.d},{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: operand mismatch -- `add za\[w8,0\],{z0\.d-z1\.d},{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.d\[w0,0\],{ ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: expected a 32-bit selection register at operand 1 -- `add za\.d\[w31,0\],{ ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.d\[w8,1<<63\],{ ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.d\[w7,0\],{ ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.d\[w12,0\],{ ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.d\[w8,-1\],{ ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.d\[w8,8\],{ ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.d\[w8,8\],{ ?z1\.d ?- ?z2\.d ?},{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `add za\.d\[w8,0\],{ ?z0\.d ?- ?z1\.d ?},{ ?z15\.d ?- ?z16\.d ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `add za\.d\[w8,0\],{ ?z0\.d ?- ?z1\.d ?},{ ?z31\.d,z0\.d ?}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.d\[w7,0\],{ ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.d\[w12,0\],{ ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.d\[w8,-1\],{ ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.d\[w8,8\],{ ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `add za\.d\[w8,0\],{ ?z1\.d ?- ?z4\.d ?},{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `add za\.d\[w8,0\],{ ?z2\.d ?- ?z5\.d ?},{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `add za\.d\[w8,0\],{ ?z3\.d ?- ?z6\.d ?},{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `add za\.d\[w8,0\],{ ?z0\.d ?- ?z3\.d ?},{ ?z15\.d ?- ?z18\.d ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `add za\.d\[w8,0\],{ ?z0\.d ?- ?z3\.d ?},{ ?z29\.d,z30\.d,z31\.d,z0\.d ?}'
+[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `add za\.d\[w8,0\],{ ?z0\.d ?- ?z2\.d ?},{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `add za\.d\[w8,0\],{ ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `add za\.d\[w8,0\],{ ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z2\.d ?}'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `add za\.d\[w8,0\],{ ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 3 -- `add za\.d\[w8,0\],{ ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z4\.d ?}'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `add za\.d\[w8,0,vgx4\],{ ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `add za\.d\[w8,0,vgx4\],{ ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `add za\.d\[w8,0,vgx2\],{ ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `add za\.d\[w8,0,vgx2\],{ ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: operand mismatch -- `add za\[w8,0\],{ ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?}'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	add za\.d\[w8, 0\], {z0\.d-z1\.d}, {z0\.d-z1\.d}
 [^ :]+:[0-9]+: Info:    other valid variant\(s\):
 [^ :]+:[0-9]+: Info:    	add za\.s\[w8, 0\], {z0\.s-z1\.s}, {z0\.s-z1\.s}
-[^ :]+:[0-9]+: Error: operand mismatch -- `add za\[w8,0\],{z0\.d-z3\.d},{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: operand mismatch -- `add za\[w8,0\],{ ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?}'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	add za\.d\[w8, 0\], {z0\.d-z3\.d}, {z0\.d-z3\.d}
 [^ :]+:[0-9]+: Info:    other valid variant\(s\):
diff --git a/gas/testsuite/gas/aarch64/sme2-i16i64-1-noarch.l b/gas/testsuite/gas/aarch64/sme2-i16i64-1-noarch.l
index bbdccc7..c178efe 100644
--- a/gas/testsuite/gas/aarch64/sme2-i16i64-1-noarch.l
+++ b/gas/testsuite/gas/aarch64/sme2-i16i64-1-noarch.l
@@ -1,57 +1,57 @@
 [^ :]+: Assembler messages:
-[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0\],{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0,vgx2\],{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.d\[W8,0,VGx2\],{Z0\.d-Z1\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.D\[W8,0,VGX2\],{Z0\.D-Z1\.D}'
-[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w11,0\],{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,7\],{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0\],{z30\.d-z31\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w10,3\],{z10\.d-z11\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0\],{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0,vgx4\],{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.d\[W8,0,VGx4\],{Z0\.d-Z3\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.D\[W8,0,VGX4\],{Z0\.D-Z3\.D}'
-[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w11,0\],{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,7\],{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0\],{z28\.d-z31\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w11,1\],{z12\.d-z15\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0\],{z0\.d-z1\.d},z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0,vgx2\],{z0\.d-z1\.d},z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.d\[W8,0,VGx2\],{Z0\.d-Z1\.d},Z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.D\[W8,0,VGX2\],{Z0\.D-Z1\.D},Z0\.D'
-[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w11,0\],{z0\.d-z1\.d},z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,7\],{z0\.d-z1\.d},z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0\],{z30\.d-z31\.d},z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0\],{z31\.d,z0\.d},z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0\],{z31\.d-z0\.d},z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0\],{z0\.d-z1\.d},z15\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w9,5\],{z9\.d-z10\.d},z6\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0\],{z0\.d-z3\.d},z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0,vgx4\],{z0\.d-z3\.d},z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.d\[W8,0,VGx4\],{Z0\.d-Z3\.d},Z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.D\[W8,0,VGX4\],{Z0\.D-Z3\.D},Z0\.D'
-[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w11,0\],{z0\.d-z3\.d},z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,7\],{z0\.d-z3\.d},z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0\],{z28\.d-z31\.d},z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0\],{z31\.d,z0\.d,z1\.d,z2\.d},z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0\],{z31\.d-z2\.d},z0\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0\],{z0\.d-z3\.d},z15\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w11,2\],{z23\.d-z26\.d},z13\.d'
-[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0\],{z0\.d-z1\.d},{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0,vgx2\],{z0\.d-z1\.d},{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.d\[W8,0,VGx2\],{Z0\.d-Z1\.d},{Z0\.d-Z1\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.D\[W8,0,VGX2\],{Z0\.D-Z1\.D},{Z0\.D-Z1\.D}'
-[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w11,0\],{z0\.d-z1\.d},{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,7\],{z0\.d-z1\.d},{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0\],{z30\.d-z31\.d},{z0\.d-z1\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0\],{z0\.d-z1\.d},{z30\.d-z31\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w10,1\],{z22\.d-z23\.d},{z18\.d-z19\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0\],{z0\.d-z3\.d},{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0,vgx4\],{z0\.d-z3\.d},{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.d\[W8,0,VGx4\],{Z0\.d-Z3\.d},{Z0\.d-Z3\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.D\[W8,0,VGX4\],{Z0\.D-Z3\.D},{Z0\.D-Z3\.D}'
-[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w11,0\],{z0\.d-z3\.d},{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,7\],{z0\.d-z3\.d},{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0\],{z28\.d-z31\.d},{z0\.d-z3\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0\],{z0\.d-z3\.d},{z28\.d-z31\.d}'
-[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w11,3\],{z16\.d-z19\.d},{z24\.d-z27\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0\],{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0,vgx2\],{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.d\[W8,0,VGx2\],{ ?Z0\.d ?- ?Z1\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.D\[W8,0,VGX2\],{ ?Z0\.D ?- ?Z1\.D ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w11,0\],{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,7\],{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0\],{ ?z30\.d ?- ?z31\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w10,3\],{ ?z10\.d ?- ?z11\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0\],{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0,vgx4\],{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.d\[W8,0,VGx4\],{ ?Z0\.d ?- ?Z3\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.D\[W8,0,VGX4\],{ ?Z0\.D ?- ?Z3\.D ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w11,0\],{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,7\],{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0\],{ ?z28\.d ?- ?z31\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w11,1\],{ ?z12\.d ?- ?z15\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0\],{ ?z0\.d ?- ?z1\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0,vgx2\],{ ?z0\.d ?- ?z1\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.d\[W8,0,VGx2\],{ ?Z0\.d ?- ?Z1\.d ?},Z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.D\[W8,0,VGX2\],{ ?Z0\.D ?- ?Z1\.D ?},Z0\.D'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w11,0\],{ ?z0\.d ?- ?z1\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,7\],{ ?z0\.d ?- ?z1\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0\],{ ?z30\.d ?- ?z31\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0\],{ ?z31\.d,z0\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0\],{ ?z31\.d ?- ?z0\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0\],{ ?z0\.d ?- ?z1\.d ?},z15\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w9,5\],{ ?z9\.d ?- ?z10\.d ?},z6\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0\],{ ?z0\.d ?- ?z3\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0,vgx4\],{ ?z0\.d ?- ?z3\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.d\[W8,0,VGx4\],{ ?Z0\.d ?- ?Z3\.d ?},Z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.D\[W8,0,VGX4\],{ ?Z0\.D ?- ?Z3\.D ?},Z0\.D'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w11,0\],{ ?z0\.d ?- ?z3\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,7\],{ ?z0\.d ?- ?z3\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0\],{ ?z28\.d ?- ?z31\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0\],{ ?z31\.d,z0\.d,z1\.d,z2\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0\],{ ?z31\.d ?- ?z2\.d ?},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0\],{ ?z0\.d ?- ?z3\.d ?},z15\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w11,2\],{ ?z23\.d ?- ?z26\.d ?},z13\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0\],{ ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0,vgx2\],{ ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.d\[W8,0,VGx2\],{ ?Z0\.d ?- ?Z1\.d ?},{ ?Z0\.d ?- ?Z1\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.D\[W8,0,VGX2\],{ ?Z0\.D ?- ?Z1\.D ?},{ ?Z0\.D ?- ?Z1\.D ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w11,0\],{ ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,7\],{ ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0\],{ ?z30\.d ?- ?z31\.d ?},{ ?z0\.d ?- ?z1\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0\],{ ?z0\.d ?- ?z1\.d ?},{ ?z30\.d ?- ?z31\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w10,1\],{ ?z22\.d ?- ?z23\.d ?},{ ?z18\.d ?- ?z19\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0\],{ ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0,vgx4\],{ ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.d\[W8,0,VGx4\],{ ?Z0\.d ?- ?Z3\.d ?},{ ?Z0\.d ?- ?Z3\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.D\[W8,0,VGX4\],{ ?Z0\.D ?- ?Z3\.D ?},{ ?Z0\.D ?- ?Z3\.D ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w11,0\],{ ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,7\],{ ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0\],{ ?z28\.d ?- ?z31\.d ?},{ ?z0\.d ?- ?z3\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0\],{ ?z0\.d ?- ?z3\.d ?},{ ?z28\.d ?- ?z31\.d ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w11,3\],{ ?z16\.d ?- ?z19\.d ?},{ ?z24\.d ?- ?z27\.d ?}'
diff --git a/gas/testsuite/gas/aarch64/sme2-i16i64-2-invalid.l b/gas/testsuite/gas/aarch64/sme2-i16i64-2-invalid.l
index 280f685..dd81d56 100644
--- a/gas/testsuite/gas/aarch64/sme2-i16i64-2-invalid.l
+++ b/gas/testsuite/gas/aarch64/sme2-i16i64-2-invalid.l
@@ -13,7 +13,7 @@
 [^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 1 -- `smlall za\.d\[w8,2:5\],z0\.h,z0\.h\[0\]'
 [^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 1 -- `smlall za\.d\[w8,3:6\],z0\.h,z0\.h\[0\]'
 [^ :]+:[0-9]+: Error: immediate offset out of range 0 to 12 at operand 1 -- `smlall za\.d\[w8,16:19\],z0\.h,z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `smlall za\.d\[w8,0:3\],z0\.h,z16\.h\[0\]'
+[^ :]+:[0-9]+: Error: z0 ?- ?z15 expected at operand 3 -- `smlall za\.d\[w8,0:3\],z0\.h,z16\.h\[0\]'
 [^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `smlall za\.d\[w8,0:3\],z0\.h,z0\.h\[-1\]'
 [^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `smlall za\.d\[w8,0:3\],z0\.h,z0\.h\[8\]'
 [^ :]+:[0-9]+: Error: operand mismatch -- `smlall za\.d\[w8,0:3\],z0\.b,z0\.b\[0\]'
@@ -22,74 +22,74 @@
 [^ :]+:[0-9]+: Error: operand mismatch -- `smlall za\.d\[w8,0:3\],z0\.d,z0\.d\[0\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	smlall za\.d\[w8, 0:3\], z0\.h, z0\.h\[0\]
-[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `smlall za\.d\[w7,0:3\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `smlall za\.d\[w12,0:3\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `smlall za\.d\[w8,0\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `smlall za\.d\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `smlall za\.d\[w8,0:2\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `smlall za\.d\[w8,0:3,vgx4\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 1 -- `smlall za\.d\[w8,1:4\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 1 -- `smlall za\.d\[w8,2:5\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 1 -- `smlall za\.d\[w8,3:6\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 4 at operand 1 -- `smlall za\.d\[w8,8:11\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `smlall za\.d\[w8,0:3\],{z1\.h-z2\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `smlall za\.d\[w8,0:3\],{z0\.h-z1\.h},z16\.h\[0\]'
-[^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `smlall za\.d\[w8,0:3\],{z0\.h-z1\.h},z0\.h\[-1\]'
-[^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `smlall za\.d\[w8,0:3\],{z0\.h-z1\.h},z0\.h\[8\]'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `smlall za\.d\[w7,0:3\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `smlall za\.d\[w12,0:3\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `smlall za\.d\[w8,0\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `smlall za\.d\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `smlall za\.d\[w8,0:2\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `smlall za\.d\[w8,0:3,vgx2\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 1 -- `smlall za\.d\[w8,1:4\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 1 -- `smlall za\.d\[w8,2:5\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 1 -- `smlall za\.d\[w8,3:6\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 4 at operand 1 -- `smlall za\.d\[w8,8:11\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `smlall za\.d\[w8,0:3\],{z1\.h-z4\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `smlall za\.d\[w8,0:3\],{z2\.h-z5\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `smlall za\.d\[w8,0:3\],{z3\.h-z6\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `smlall za\.d\[w8,0:3\],{z0\.h-z3\.h},z16\.h\[0\]'
-[^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `smlall za\.d\[w8,0:3\],{z0\.h-z3\.h},z0\.h\[-1\]'
-[^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `smlall za\.d\[w8,0:3\],{z0\.h-z3\.h},z0\.h\[8\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `smlall za\.d\[w7,0:3\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `smlall za\.d\[w12,0:3\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `smlall za\.d\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `smlall za\.d\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `smlall za\.d\[w8,0:2\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `smlall za\.d\[w8,0:3,vgx4\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 1 -- `smlall za\.d\[w8,1:4\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 1 -- `smlall za\.d\[w8,2:5\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 1 -- `smlall za\.d\[w8,3:6\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 4 at operand 1 -- `smlall za\.d\[w8,8:11\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `smlall za\.d\[w8,0:3\],{ ?z1\.h ?- ?z2\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: z0 ?- ?z15 expected at operand 3 -- `smlall za\.d\[w8,0:3\],{ ?z0\.h ?- ?z1\.h ?},z16\.h\[0\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `smlall za\.d\[w8,0:3\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[-1\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `smlall za\.d\[w8,0:3\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[8\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `smlall za\.d\[w7,0:3\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `smlall za\.d\[w12,0:3\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `smlall za\.d\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `smlall za\.d\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `smlall za\.d\[w8,0:2\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `smlall za\.d\[w8,0:3,vgx2\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 1 -- `smlall za\.d\[w8,1:4\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 1 -- `smlall za\.d\[w8,2:5\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 1 -- `smlall za\.d\[w8,3:6\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 4 at operand 1 -- `smlall za\.d\[w8,8:11\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `smlall za\.d\[w8,0:3\],{ ?z1\.h ?- ?z4\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `smlall za\.d\[w8,0:3\],{ ?z2\.h ?- ?z5\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `smlall za\.d\[w8,0:3\],{ ?z3\.h ?- ?z6\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: z0 ?- ?z15 expected at operand 3 -- `smlall za\.d\[w8,0:3\],{ ?z0\.h ?- ?z3\.h ?},z16\.h\[0\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `smlall za\.d\[w8,0:3\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[-1\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `smlall za\.d\[w8,0:3\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[8\]'
 [^ :]+:[0-9]+: Error: unexpected vector group size at operand 1 -- `smlall za\.d\[w8,0:3,vgx2\],z0\.h,z0\.h'
 [^ :]+:[0-9]+: Error: unexpected vector group size at operand 1 -- `smlall za\.d\[w8,0:3,vgx4\],z0\.h,z0\.h'
 [^ :]+:[0-9]+: Error: immediate offset out of range 0 to 12 at operand 1 -- `smlall za\.d\[w8,16:19\],z0\.h,z0\.h'
-[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `smlall za\.d\[w8,0:3\],z0\.h,z16\.h'
-[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `smlall za\.d\[w8,0:3,vgx4\],{z0\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 4 at operand 1 -- `smlall za\.d\[w8,8:11\],{z0\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `smlall za\.d\[w8,0:3\],{z0\.h-z2\.h},z0\.h'
-[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `smlall za\.d\[w8,0:3\],{z0\.h-z1\.h},z16\.h'
-[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `smlall za\.d\[w8,0:3,vgx2\],{z0\.h-z3\.h},z0\.h'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 4 at operand 1 -- `smlall za\.d\[w8,8:11\],{z0\.h-z3\.h},z0\.h'
-[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `smlall za\.d\[w8,0:3\],{z0\.h-z3\.h},z16\.h'
-[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `smlall za\.d\[w8,0:3,vgx4\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 4 at operand 1 -- `smlall za\.d\[w8,8:11\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `smlall za\.d\[w8,0:3\],{z1\.h-z2\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `smlall za\.d\[w8,0:3\],{z0\.h-z1\.h},{z1\.h-z2\.h}'
-[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `smlall za\.d\[w8,0:3,vgx2\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 4 at operand 1 -- `smlall za\.d\[w8,8:11\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `smlall za\.d\[w8,0:3\],{z1\.h-z4\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `smlall za\.d\[w8,0:3\],{z2\.h-z5\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `smlall za\.d\[w8,0:3\],{z3\.h-z6\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `smlall za\.d\[w8,0:3\],{z0\.h-z3\.h},{z1\.h-z4\.h}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `smlall za\.d\[w8,0:3\],{z0\.h-z3\.h},{z2\.h-z5\.h}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `smlall za\.d\[w8,0:3\],{z0\.h-z3\.h},{z3\.h-z6\.h}'
+[^ :]+:[0-9]+: Error: z0 ?- ?z15 expected at operand 3 -- `smlall za\.d\[w8,0:3\],z0\.h,z16\.h'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `smlall za\.d\[w8,0:3,vgx4\],{ ?z0\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 4 at operand 1 -- `smlall za\.d\[w8,8:11\],{ ?z0\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `smlall za\.d\[w8,0:3\],{ ?z0\.h ?- ?z2\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: z0 ?- ?z15 expected at operand 3 -- `smlall za\.d\[w8,0:3\],{ ?z0\.h ?- ?z1\.h ?},z16\.h'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `smlall za\.d\[w8,0:3,vgx2\],{ ?z0\.h ?- ?z3\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 4 at operand 1 -- `smlall za\.d\[w8,8:11\],{ ?z0\.h ?- ?z3\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: z0 ?- ?z15 expected at operand 3 -- `smlall za\.d\[w8,0:3\],{ ?z0\.h ?- ?z3\.h ?},z16\.h'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `smlall za\.d\[w8,0:3,vgx4\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 4 at operand 1 -- `smlall za\.d\[w8,8:11\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `smlall za\.d\[w8,0:3\],{ ?z1\.h ?- ?z2\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `smlall za\.d\[w8,0:3\],{ ?z0\.h ?- ?z1\.h ?},{ ?z1\.h ?- ?z2\.h ?}'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `smlall za\.d\[w8,0:3,vgx2\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 4 at operand 1 -- `smlall za\.d\[w8,8:11\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `smlall za\.d\[w8,0:3\],{ ?z1\.h ?- ?z4\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `smlall za\.d\[w8,0:3\],{ ?z2\.h ?- ?z5\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `smlall za\.d\[w8,0:3\],{ ?z3\.h ?- ?z6\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `smlall za\.d\[w8,0:3\],{ ?z0\.h ?- ?z3\.h ?},{ ?z1\.h ?- ?z4\.h ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `smlall za\.d\[w8,0:3\],{ ?z0\.h ?- ?z3\.h ?},{ ?z2\.h ?- ?z5\.h ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `smlall za\.d\[w8,0:3\],{ ?z0\.h ?- ?z3\.h ?},{ ?z3\.h ?- ?z6\.h ?}'
 [^ :]+:[0-9]+: Error: operand mismatch -- `sumlall za\.d\[w8,0:3\],z0\.h,z0\.h\[0\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	sumlall za\.s\[w8, 0:3\], z0\.b, z0\.b\[0\]
-[^ :]+:[0-9]+: Error: operand mismatch -- `sumlall za\.d\[w8,0:3\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `sumlall za\.d\[w8,0:3\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	sumlall za\.s\[w8, 0:3\], {z0\.b-z1\.b}, z0\.b\[0\]
-[^ :]+:[0-9]+: Error: operand mismatch -- `sumlall za\.d\[w8,0:3\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `sumlall za\.d\[w8,0:3\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	sumlall za\.s\[w8, 0:3\], {z0\.b-z3\.b}, z0\.b\[0\]
 [^ :]+:[0-9]+: Error: operand 3 must be an indexed SVE vector register -- `sumlall za\.d\[w8,0:3\],z0\.h,z0\.h'
-[^ :]+:[0-9]+: Error: operand mismatch -- `sumlall za\.d\[w8,0:3\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: operand mismatch -- `sumlall za\.d\[w8,0:3\],{ ?z0\.h ?- ?z1\.h ?},z0\.h'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	sumlall za\.s\[w8, 0:3\], {z0\.b-z1\.b}, z0\.b
-[^ :]+:[0-9]+: Error: operand mismatch -- `sumlall za\.d\[w8,0:3\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: operand mismatch -- `sumlall za\.d\[w8,0:3\],{ ?z0\.h ?- ?z3\.h ?},z0\.h'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	sumlall za\.s\[w8, 0:3\], {z0\.b-z3\.b}, z0\.b
-[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `sumlall za\.d\[w8,0:3\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `sumlall za\.d\[w8,0:3\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `sumlall za\.d\[w8,0:3\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `sumlall za\.d\[w8,0:3\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
diff --git a/gas/testsuite/gas/aarch64/sme2-i16i64-2-noarch.l b/gas/testsuite/gas/aarch64/sme2-i16i64-2-noarch.l
index c78057f..f384850 100644
--- a/gas/testsuite/gas/aarch64/sme2-i16i64-2-noarch.l
+++ b/gas/testsuite/gas/aarch64/sme2-i16i64-2-noarch.l
@@ -6,62 +6,62 @@
 [^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],z0\.h,z15\.h\[0\]'
 [^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],z0\.h,z0\.h\[7\]'
 [^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w9,8:11\],z21\.h,z9\.h\[3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3,vgx2\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w11,0:3\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,4:7\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z30\.h-z31\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z0\.h-z1\.h},z15\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z0\.h-z1\.h},z0\.h\[7\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w9,4:7\],{z18\.h-z19\.h},z9\.h\[2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3,vgx4\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w11,0:3\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,4:7\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z28\.h-z31\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z0\.h-z3\.h},z15\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z0\.h-z3\.h},z0\.h\[7\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w10,0:3\],{z24\.h-z27\.h},z14\.h\[6\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3,vgx2\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w11,0:3\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,4:7\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{ ?z30\.h ?- ?z31\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{ ?z0\.h ?- ?z1\.h ?},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w9,4:7\],{ ?z18\.h ?- ?z19\.h ?},z9\.h\[2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3,vgx4\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w11,0:3\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,4:7\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{ ?z28\.h ?- ?z31\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{ ?z0\.h ?- ?z3\.h ?},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w10,0:3\],{ ?z24\.h ?- ?z27\.h ?},z14\.h\[6\]'
 [^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],z0\.h,z0\.h'
 [^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w11,0:3\],z0\.h,z0\.h'
 [^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,12:15\],z0\.h,z0\.h'
 [^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],z31\.h,z0\.h'
 [^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],z0\.h,z15\.h'
 [^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w10,4:7\],z25\.h,z7\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z0\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3,vgx2\],{z0\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w11,0:3\],{z0\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,4:7\],{z0\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z30\.h-z31\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z31\.h,z0\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z31\.h-z0\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z0\.h-z1\.h},z15\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w9,4:7\],{z19\.h-z20\.h},z13\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z0\.h-z3\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3,vgx4\],{z0\.h-z3\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w11,0:3\],{z0\.h-z3\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,4:7\],{z0\.h-z3\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z28\.h-z31\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z29\.h-z0\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z30\.h,z31\.h,z0\.h,z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z30\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z31\.h-z2\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z0\.h-z3\.h},z15\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w9,0:3\],{z25\.h-z28\.h},z14\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3,vgx2\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w11,0:3\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,4:7\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z30\.h-z31\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z0\.h-z1\.h},{z30\.h-z31\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w10,4:7\],{z22\.h-z23\.h},{z18\.h-z19\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3,vgx4\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w11,0:3\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,4:7\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z28\.h-z31\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z0\.h-z3\.h},{z28\.h-z31\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w11,0:3\],{z16\.h-z19\.h},{z24\.h-z27\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{ ?z0\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3,vgx2\],{ ?z0\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w11,0:3\],{ ?z0\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,4:7\],{ ?z0\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{ ?z30\.h ?- ?z31\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{ ?z31\.h,z0\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{ ?z31\.h ?- ?z0\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{ ?z0\.h ?- ?z1\.h ?},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w9,4:7\],{ ?z19\.h ?- ?z20\.h ?},z13\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{ ?z0\.h ?- ?z3\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3,vgx4\],{ ?z0\.h ?- ?z3\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w11,0:3\],{ ?z0\.h ?- ?z3\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,4:7\],{ ?z0\.h ?- ?z3\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{ ?z28\.h ?- ?z31\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{ ?z29\.h ?- ?z0\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{ ?z30\.h,z31\.h,z0\.h,z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{ ?z30\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{ ?z31\.h ?- ?z2\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{ ?z0\.h ?- ?z3\.h ?},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w9,0:3\],{ ?z25\.h ?- ?z28\.h ?},z14\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3,vgx2\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w11,0:3\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,4:7\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{ ?z30\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{ ?z0\.h ?- ?z1\.h ?},{ ?z30\.h ?- ?z31\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w10,4:7\],{ ?z22\.h ?- ?z23\.h ?},{ ?z18\.h ?- ?z19\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3,vgx4\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w11,0:3\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,4:7\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{ ?z28\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{ ?z0\.h ?- ?z3\.h ?},{ ?z28\.h ?- ?z31\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w11,0:3\],{ ?z16\.h ?- ?z19\.h ?},{ ?z24\.h ?- ?z27\.h ?}'
 [^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],z0\.h,z0\.h\[0\]'
 [^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w11,0:3\],z0\.h,z0\.h\[0\]'
 [^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,12:15\],z0\.h,z0\.h\[0\]'
@@ -69,62 +69,62 @@
 [^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],z0\.h,z15\.h\[0\]'
 [^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],z0\.h,z0\.h\[7\]'
 [^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w9,8:11\],z21\.h,z9\.h\[3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3,vgx2\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w11,0:3\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,4:7\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z30\.h-z31\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z0\.h-z1\.h},z15\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z0\.h-z1\.h},z0\.h\[7\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w9,4:7\],{z18\.h-z19\.h},z9\.h\[2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3,vgx4\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w11,0:3\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,4:7\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z28\.h-z31\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z0\.h-z3\.h},z15\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z0\.h-z3\.h},z0\.h\[7\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w10,0:3\],{z24\.h-z27\.h},z14\.h\[6\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3,vgx2\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w11,0:3\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,4:7\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{ ?z30\.h ?- ?z31\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{ ?z0\.h ?- ?z1\.h ?},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w9,4:7\],{ ?z18\.h ?- ?z19\.h ?},z9\.h\[2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3,vgx4\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w11,0:3\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,4:7\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{ ?z28\.h ?- ?z31\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{ ?z0\.h ?- ?z3\.h ?},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w10,0:3\],{ ?z24\.h ?- ?z27\.h ?},z14\.h\[6\]'
 [^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],z0\.h,z0\.h'
 [^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w11,0:3\],z0\.h,z0\.h'
 [^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,12:15\],z0\.h,z0\.h'
 [^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],z31\.h,z0\.h'
 [^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],z0\.h,z15\.h'
 [^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w10,4:7\],z25\.h,z7\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z0\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3,vgx2\],{z0\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w11,0:3\],{z0\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,4:7\],{z0\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z30\.h-z31\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z31\.h,z0\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z31\.h-z0\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z0\.h-z1\.h},z15\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w9,4:7\],{z19\.h-z20\.h},z13\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z0\.h-z3\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3,vgx4\],{z0\.h-z3\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w11,0:3\],{z0\.h-z3\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,4:7\],{z0\.h-z3\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z28\.h-z31\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z29\.h-z0\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z30\.h,z31\.h,z0\.h,z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z30\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z31\.h-z2\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z0\.h-z3\.h},z15\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w9,0:3\],{z25\.h-z28\.h},z14\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3,vgx2\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w11,0:3\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,4:7\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z30\.h-z31\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z0\.h-z1\.h},{z30\.h-z31\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w10,4:7\],{z22\.h-z23\.h},{z18\.h-z19\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3,vgx4\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w11,0:3\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,4:7\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z28\.h-z31\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z0\.h-z3\.h},{z28\.h-z31\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w11,0:3\],{z16\.h-z19\.h},{z24\.h-z27\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{ ?z0\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3,vgx2\],{ ?z0\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w11,0:3\],{ ?z0\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,4:7\],{ ?z0\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{ ?z30\.h ?- ?z31\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{ ?z31\.h,z0\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{ ?z31\.h ?- ?z0\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{ ?z0\.h ?- ?z1\.h ?},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w9,4:7\],{ ?z19\.h ?- ?z20\.h ?},z13\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{ ?z0\.h ?- ?z3\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3,vgx4\],{ ?z0\.h ?- ?z3\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w11,0:3\],{ ?z0\.h ?- ?z3\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,4:7\],{ ?z0\.h ?- ?z3\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{ ?z28\.h ?- ?z31\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{ ?z29\.h ?- ?z0\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{ ?z30\.h,z31\.h,z0\.h,z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{ ?z30\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{ ?z31\.h ?- ?z2\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{ ?z0\.h ?- ?z3\.h ?},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w9,0:3\],{ ?z25\.h ?- ?z28\.h ?},z14\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3,vgx2\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w11,0:3\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,4:7\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{ ?z30\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{ ?z0\.h ?- ?z1\.h ?},{ ?z30\.h ?- ?z31\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w10,4:7\],{ ?z22\.h ?- ?z23\.h ?},{ ?z18\.h ?- ?z19\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3,vgx4\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w11,0:3\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,4:7\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{ ?z28\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{ ?z0\.h ?- ?z3\.h ?},{ ?z28\.h ?- ?z31\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w11,0:3\],{ ?z16\.h ?- ?z19\.h ?},{ ?z24\.h ?- ?z27\.h ?}'
 [^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],z0\.h,z0\.h\[0\]'
 [^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w11,0:3\],z0\.h,z0\.h\[0\]'
 [^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,12:15\],z0\.h,z0\.h\[0\]'
@@ -132,62 +132,62 @@
 [^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],z0\.h,z15\.h\[0\]'
 [^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],z0\.h,z0\.h\[7\]'
 [^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w9,8:11\],z21\.h,z9\.h\[3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3,vgx2\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w11,0:3\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,4:7\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z30\.h-z31\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z0\.h-z1\.h},z15\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z0\.h-z1\.h},z0\.h\[7\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w9,4:7\],{z18\.h-z19\.h},z9\.h\[5\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3,vgx4\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w11,0:3\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,4:7\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z28\.h-z31\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z0\.h-z3\.h},z15\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z0\.h-z3\.h},z0\.h\[7\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w10,0:3\],{z24\.h-z27\.h},z14\.h\[1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3,vgx2\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w11,0:3\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,4:7\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{ ?z30\.h ?- ?z31\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{ ?z0\.h ?- ?z1\.h ?},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w9,4:7\],{ ?z18\.h ?- ?z19\.h ?},z9\.h\[5\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3,vgx4\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w11,0:3\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,4:7\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{ ?z28\.h ?- ?z31\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{ ?z0\.h ?- ?z3\.h ?},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w10,0:3\],{ ?z24\.h ?- ?z27\.h ?},z14\.h\[1\]'
 [^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],z0\.h,z0\.h'
 [^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w11,0:3\],z0\.h,z0\.h'
 [^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,12:15\],z0\.h,z0\.h'
 [^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],z31\.h,z0\.h'
 [^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],z0\.h,z15\.h'
 [^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w10,4:7\],z25\.h,z7\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z0\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3,vgx2\],{z0\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w11,0:3\],{z0\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,4:7\],{z0\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z30\.h-z31\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z31\.h,z0\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z31\.h-z0\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z0\.h-z1\.h},z15\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w9,4:7\],{z19\.h-z20\.h},z13\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z0\.h-z3\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3,vgx4\],{z0\.h-z3\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w11,0:3\],{z0\.h-z3\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,4:7\],{z0\.h-z3\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z28\.h-z31\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z29\.h-z0\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z30\.h,z31\.h,z0\.h,z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z30\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z31\.h-z2\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z0\.h-z3\.h},z15\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w9,0:3\],{z25\.h-z28\.h},z14\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3,vgx2\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w11,0:3\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,4:7\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z30\.h-z31\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z0\.h-z1\.h},{z30\.h-z31\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w10,4:7\],{z22\.h-z23\.h},{z18\.h-z19\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3,vgx4\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w11,0:3\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,4:7\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z28\.h-z31\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z0\.h-z3\.h},{z28\.h-z31\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w11,0:3\],{z16\.h-z19\.h},{z24\.h-z27\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{ ?z0\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3,vgx2\],{ ?z0\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w11,0:3\],{ ?z0\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,4:7\],{ ?z0\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{ ?z30\.h ?- ?z31\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{ ?z31\.h,z0\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{ ?z31\.h ?- ?z0\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{ ?z0\.h ?- ?z1\.h ?},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w9,4:7\],{ ?z19\.h ?- ?z20\.h ?},z13\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{ ?z0\.h ?- ?z3\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3,vgx4\],{ ?z0\.h ?- ?z3\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w11,0:3\],{ ?z0\.h ?- ?z3\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,4:7\],{ ?z0\.h ?- ?z3\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{ ?z28\.h ?- ?z31\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{ ?z29\.h ?- ?z0\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{ ?z30\.h,z31\.h,z0\.h,z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{ ?z30\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{ ?z31\.h ?- ?z2\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{ ?z0\.h ?- ?z3\.h ?},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w9,0:3\],{ ?z25\.h ?- ?z28\.h ?},z14\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3,vgx2\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w11,0:3\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,4:7\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{ ?z30\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{ ?z0\.h ?- ?z1\.h ?},{ ?z30\.h ?- ?z31\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w10,4:7\],{ ?z22\.h ?- ?z23\.h ?},{ ?z18\.h ?- ?z19\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3,vgx4\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w11,0:3\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,4:7\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{ ?z28\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{ ?z0\.h ?- ?z3\.h ?},{ ?z28\.h ?- ?z31\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w11,0:3\],{ ?z16\.h ?- ?z19\.h ?},{ ?z24\.h ?- ?z27\.h ?}'
 [^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],z0\.h,z0\.h\[0\]'
 [^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w11,0:3\],z0\.h,z0\.h\[0\]'
 [^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,12:15\],z0\.h,z0\.h\[0\]'
@@ -195,59 +195,59 @@
 [^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],z0\.h,z15\.h\[0\]'
 [^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],z0\.h,z0\.h\[7\]'
 [^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w9,8:11\],z21\.h,z9\.h\[3\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3,vgx2\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w11,0:3\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,4:7\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z30\.h-z31\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z0\.h-z1\.h},z15\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z0\.h-z1\.h},z0\.h\[7\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w9,4:7\],{z18\.h-z19\.h},z9\.h\[2\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3,vgx4\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w11,0:3\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,4:7\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z28\.h-z31\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z0\.h-z3\.h},z15\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z0\.h-z3\.h},z0\.h\[7\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w10,0:3\],{z24\.h-z27\.h},z14\.h\[6\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3,vgx2\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w11,0:3\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,4:7\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{ ?z30\.h ?- ?z31\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{ ?z0\.h ?- ?z1\.h ?},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w9,4:7\],{ ?z18\.h ?- ?z19\.h ?},z9\.h\[2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3,vgx4\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w11,0:3\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,4:7\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{ ?z28\.h ?- ?z31\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{ ?z0\.h ?- ?z3\.h ?},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w10,0:3\],{ ?z24\.h ?- ?z27\.h ?},z14\.h\[6\]'
 [^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],z0\.h,z0\.h'
 [^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w11,0:3\],z0\.h,z0\.h'
 [^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,12:15\],z0\.h,z0\.h'
 [^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],z31\.h,z0\.h'
 [^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],z0\.h,z15\.h'
 [^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w10,4:7\],z25\.h,z7\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z0\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3,vgx2\],{z0\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w11,0:3\],{z0\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,4:7\],{z0\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z30\.h-z31\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z31\.h,z0\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z31\.h-z0\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z0\.h-z1\.h},z15\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w9,4:7\],{z19\.h-z20\.h},z13\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z0\.h-z3\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3,vgx4\],{z0\.h-z3\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w11,0:3\],{z0\.h-z3\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,4:7\],{z0\.h-z3\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z28\.h-z31\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z29\.h-z0\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z30\.h,z31\.h,z0\.h,z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z30\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z31\.h-z2\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z0\.h-z3\.h},z15\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w9,0:3\],{z25\.h-z28\.h},z14\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3,vgx2\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w11,0:3\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,4:7\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z30\.h-z31\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z0\.h-z1\.h},{z30\.h-z31\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w10,4:7\],{z22\.h-z23\.h},{z18\.h-z19\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3,vgx4\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w11,0:3\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,4:7\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z28\.h-z31\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z0\.h-z3\.h},{z28\.h-z31\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w11,0:3\],{z16\.h-z19\.h},{z24\.h-z27\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{ ?z0\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3,vgx2\],{ ?z0\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w11,0:3\],{ ?z0\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,4:7\],{ ?z0\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{ ?z30\.h ?- ?z31\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{ ?z31\.h,z0\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{ ?z31\.h ?- ?z0\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{ ?z0\.h ?- ?z1\.h ?},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w9,4:7\],{ ?z19\.h ?- ?z20\.h ?},z13\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{ ?z0\.h ?- ?z3\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3,vgx4\],{ ?z0\.h ?- ?z3\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w11,0:3\],{ ?z0\.h ?- ?z3\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,4:7\],{ ?z0\.h ?- ?z3\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{ ?z28\.h ?- ?z31\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{ ?z29\.h ?- ?z0\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{ ?z30\.h,z31\.h,z0\.h,z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{ ?z30\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{ ?z31\.h ?- ?z2\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{ ?z0\.h ?- ?z3\.h ?},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w9,0:3\],{ ?z25\.h ?- ?z28\.h ?},z14\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3,vgx2\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w11,0:3\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,4:7\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{ ?z30\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{ ?z0\.h ?- ?z1\.h ?},{ ?z30\.h ?- ?z31\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w10,4:7\],{ ?z22\.h ?- ?z23\.h ?},{ ?z18\.h ?- ?z19\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3,vgx4\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w11,0:3\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,4:7\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{ ?z28\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{ ?z0\.h ?- ?z3\.h ?},{ ?z28\.h ?- ?z31\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w11,0:3\],{ ?z16\.h ?- ?z19\.h ?},{ ?z24\.h ?- ?z27\.h ?}'
diff --git a/gas/testsuite/gas/aarch64/sme2-i16i64-3-invalid.l b/gas/testsuite/gas/aarch64/sme2-i16i64-3-invalid.l
index dfbb8f9..8ffc9c1 100644
--- a/gas/testsuite/gas/aarch64/sme2-i16i64-3-invalid.l
+++ b/gas/testsuite/gas/aarch64/sme2-i16i64-3-invalid.l
@@ -1,19 +1,19 @@
 [^ :]+: Assembler messages:
-[^ :]+:[0-9]+: Error: register element index out of range 0 to 1 at operand 3 -- `sdot za\.d\[w8,0\],{z0\.h-z1\.h},z0\.h\[-1\]'
-[^ :]+:[0-9]+: Error: register element index out of range 0 to 1 at operand 3 -- `sdot za\.d\[w8,0\],{z0\.h-z1\.h},z0\.h\[2\]'
-[^ :]+:[0-9]+: Error: register element index out of range 0 to 1 at operand 3 -- `sdot za\.d\[w8,0\],{z0\.h-z3\.h},z0\.h\[-1\]'
-[^ :]+:[0-9]+: Error: register element index out of range 0 to 1 at operand 3 -- `sdot za\.d\[w8,0\],{z0\.h-z3\.h},z0\.h\[2\]'
-[^ :]+:[0-9]+: Error: operand mismatch -- `sudot za\.d\[w8,0\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 1 at operand 3 -- `sdot za\.d\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[-1\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 1 at operand 3 -- `sdot za\.d\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[2\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 1 at operand 3 -- `sdot za\.d\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[-1\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 1 at operand 3 -- `sdot za\.d\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[2\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `sudot za\.d\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	sudot za\.s\[w8, 0\], {z0\.b-z1\.b}, z0\.b\[0\]
-[^ :]+:[0-9]+: Error: operand mismatch -- `sudot za\.d\[w8,0\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `sudot za\.d\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	sudot za\.s\[w8, 0\], {z0\.b-z3\.b}, z0\.b\[0\]
-[^ :]+:[0-9]+: Error: operand mismatch -- `sudot za\.d\[w8,0\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: operand mismatch -- `sudot za\.d\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	sudot za\.s\[w8, 0\], {z0\.b-z1\.b}, z0\.b
-[^ :]+:[0-9]+: Error: operand mismatch -- `sudot za\.d\[w8,0\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: operand mismatch -- `sudot za\.d\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	sudot za\.s\[w8, 0\], {z0\.b-z3\.b}, z0\.b
-[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `sudot za\.d\[w8,0\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `sudot za\.d\[w8,0\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `sudot za\.d\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `sudot za\.d\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
diff --git a/gas/testsuite/gas/aarch64/sme2-i16i64-3-noarch.l b/gas/testsuite/gas/aarch64/sme2-i16i64-3-noarch.l
index 432d194..50eb94a 100644
--- a/gas/testsuite/gas/aarch64/sme2-i16i64-3-noarch.l
+++ b/gas/testsuite/gas/aarch64/sme2-i16i64-3-noarch.l
@@ -1,125 +1,125 @@
 [^ :]+: Assembler messages:
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0,vgx2\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.d\[W8,0,VGx2\],{Z0\.h-Z1\.h},Z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.D\[W8,0,VGX2\],{Z0\.H-Z1\.H},Z0\.H\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w11,0\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,7\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{z30\.h-z31\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{z0\.h-z1\.h},z15\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{z0\.h-z1\.h},z0\.h\[1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w10,2\],{z14\.h-z15\.h},z13\.h\[1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0,vgx4\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.d\[W8,0,VGx4\],{Z0\.h-Z3\.h},Z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.D\[W8,0,VGX4\],{Z0\.H-Z3\.H},Z0\.H\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w11,0\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,7\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{z28\.h-z31\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{z0\.h-z3\.h},z15\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{z0\.h-z3\.h},z0\.h\[1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w9,1\],{z4\.h-z7\.h},z10\.h\[1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{z0\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0,vgx2\],{z0\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.d\[W8,0,VGx2\],{Z0\.h-Z1\.h},Z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.D\[W8,0,VGX2\],{Z0\.H-Z1\.H},Z0\.H'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w11,0\],{z0\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,7\],{z0\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{z30\.h-z31\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{z31\.h,z0\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{z31\.h-z0\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{z0\.h-z1\.h},z15\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w9,3\],{z21\.h-z22\.h},z9\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{z0\.h-z3\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0,vgx4\],{z0\.h-z3\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.d\[W8,0,VGx4\],{Z0\.h-Z3\.h},Z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.D\[W8,0,VGX4\],{Z0\.H-Z3\.H},Z0\.H'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w11,0\],{z0\.h-z3\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,7\],{z0\.h-z3\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{z28\.h-z31\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{z30\.h,z31\.h,z0\.h,z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{z30\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{z31\.h,z0\.h,z1\.h,z2\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{z31\.h-z2\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{z0\.h-z3\.h},z15\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w10,5\],{z17\.h-z20\.h},z3\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0,vgx2\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.d\[W8,0,VGx2\],{Z0\.h-Z1\.h},{Z0\.h-Z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.D\[W8,0,VGX2\],{Z0\.H-Z1\.H},{Z0\.H-Z1\.H}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w11,0\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,7\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{z30\.h-z31\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{z0\.h-z1\.h},{z30\.h-z31\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w10,1\],{z22\.h-z23\.h},{z18\.h-z19\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0,vgx4\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.d\[W8,0,VGx4\],{Z0\.h-Z3\.h},{Z0\.h-Z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.D\[W8,0,VGX4\],{Z0\.H-Z3\.H},{Z0\.H-Z3\.H}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w11,0\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,7\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{z28\.h-z31\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{z0\.h-z3\.h},{z28\.h-z31\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w11,3\],{z16\.h-z19\.h},{z24\.h-z27\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0,vgx2\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.d\[W8,0,VGx2\],{Z0\.h-Z1\.h},Z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.D\[W8,0,VGX2\],{Z0\.H-Z1\.H},Z0\.H\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w11,0\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,7\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{z30\.h-z31\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{z0\.h-z1\.h},z15\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{z0\.h-z1\.h},z0\.h\[1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w10,2\],{z14\.h-z15\.h},z13\.h\[1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0,vgx4\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.d\[W8,0,VGx4\],{Z0\.h-Z3\.h},Z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.D\[W8,0,VGX4\],{Z0\.H-Z3\.H},Z0\.H\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w11,0\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,7\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{z28\.h-z31\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{z0\.h-z3\.h},z15\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{z0\.h-z3\.h},z0\.h\[1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w9,1\],{z4\.h-z7\.h},z10\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{z0\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0,vgx2\],{z0\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.d\[W8,0,VGx2\],{Z0\.h-Z1\.h},Z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.D\[W8,0,VGX2\],{Z0\.H-Z1\.H},Z0\.H'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w11,0\],{z0\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,7\],{z0\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{z30\.h-z31\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{z31\.h,z0\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{z31\.h-z0\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{z0\.h-z1\.h},z15\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w9,3\],{z21\.h-z22\.h},z9\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{z0\.h-z3\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0,vgx4\],{z0\.h-z3\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.d\[W8,0,VGx4\],{Z0\.h-Z3\.h},Z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.D\[W8,0,VGX4\],{Z0\.H-Z3\.H},Z0\.H'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w11,0\],{z0\.h-z3\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,7\],{z0\.h-z3\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{z28\.h-z31\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{z30\.h,z31\.h,z0\.h,z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{z30\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{z31\.h,z0\.h,z1\.h,z2\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{z31\.h-z2\.h},z0\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{z0\.h-z3\.h},z15\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w10,5\],{z17\.h-z20\.h},z3\.h'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0,vgx2\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.d\[W8,0,VGx2\],{Z0\.h-Z1\.h},{Z0\.h-Z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.D\[W8,0,VGX2\],{Z0\.H-Z1\.H},{Z0\.H-Z1\.H}'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w11,0\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,7\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{z30\.h-z31\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{z0\.h-z1\.h},{z30\.h-z31\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w10,1\],{z22\.h-z23\.h},{z18\.h-z19\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0,vgx4\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.d\[W8,0,VGx4\],{Z0\.h-Z3\.h},{Z0\.h-Z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.D\[W8,0,VGX4\],{Z0\.H-Z3\.H},{Z0\.H-Z3\.H}'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w11,0\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,7\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{z28\.h-z31\.h},{z0\.h-z3\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{z0\.h-z3\.h},{z28\.h-z31\.h}'
-[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w11,3\],{z16\.h-z19\.h},{z24\.h-z27\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0,vgx2\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.d\[W8,0,VGx2\],{ ?Z0\.h ?- ?Z1\.h ?},Z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.D\[W8,0,VGX2\],{ ?Z0\.H ?- ?Z1\.H ?},Z0\.H\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w11,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,7\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{ ?z30\.h ?- ?z31\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w10,2\],{ ?z14\.h ?- ?z15\.h ?},z13\.h\[1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0,vgx4\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.d\[W8,0,VGx4\],{ ?Z0\.h ?- ?Z3\.h ?},Z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.D\[W8,0,VGX4\],{ ?Z0\.H ?- ?Z3\.H ?},Z0\.H\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w11,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,7\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{ ?z28\.h ?- ?z31\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w9,1\],{ ?z4\.h ?- ?z7\.h ?},z10\.h\[1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0,vgx2\],{ ?z0\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.d\[W8,0,VGx2\],{ ?Z0\.h ?- ?Z1\.h ?},Z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.D\[W8,0,VGX2\],{ ?Z0\.H ?- ?Z1\.H ?},Z0\.H'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w11,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,7\],{ ?z0\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{ ?z30\.h ?- ?z31\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{ ?z31\.h,z0\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{ ?z31\.h ?- ?z0\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w9,3\],{ ?z21\.h ?- ?z22\.h ?},z9\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0,vgx4\],{ ?z0\.h ?- ?z3\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.d\[W8,0,VGx4\],{ ?Z0\.h ?- ?Z3\.h ?},Z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.D\[W8,0,VGX4\],{ ?Z0\.H ?- ?Z3\.H ?},Z0\.H'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w11,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,7\],{ ?z0\.h ?- ?z3\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{ ?z28\.h ?- ?z31\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{ ?z30\.h,z31\.h,z0\.h,z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{ ?z30\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{ ?z31\.h,z0\.h,z1\.h,z2\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{ ?z31\.h ?- ?z2\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w10,5\],{ ?z17\.h ?- ?z20\.h ?},z3\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0,vgx2\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.d\[W8,0,VGx2\],{ ?Z0\.h ?- ?Z1\.h ?},{ ?Z0\.h ?- ?Z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.D\[W8,0,VGX2\],{ ?Z0\.H ?- ?Z1\.H ?},{ ?Z0\.H ?- ?Z1\.H ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w11,0\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,7\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{ ?z30\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},{ ?z30\.h ?- ?z31\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w10,1\],{ ?z22\.h ?- ?z23\.h ?},{ ?z18\.h ?- ?z19\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0,vgx4\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.d\[W8,0,VGx4\],{ ?Z0\.h ?- ?Z3\.h ?},{ ?Z0\.h ?- ?Z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.D\[W8,0,VGX4\],{ ?Z0\.H ?- ?Z3\.H ?},{ ?Z0\.H ?- ?Z3\.H ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w11,0\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,7\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{ ?z28\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},{ ?z28\.h ?- ?z31\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w11,3\],{ ?z16\.h ?- ?z19\.h ?},{ ?z24\.h ?- ?z27\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0,vgx2\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.d\[W8,0,VGx2\],{ ?Z0\.h ?- ?Z1\.h ?},Z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.D\[W8,0,VGX2\],{ ?Z0\.H ?- ?Z1\.H ?},Z0\.H\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w11,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,7\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{ ?z30\.h ?- ?z31\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w10,2\],{ ?z14\.h ?- ?z15\.h ?},z13\.h\[1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0,vgx4\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.d\[W8,0,VGx4\],{ ?Z0\.h ?- ?Z3\.h ?},Z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.D\[W8,0,VGX4\],{ ?Z0\.H ?- ?Z3\.H ?},Z0\.H\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w11,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,7\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{ ?z28\.h ?- ?z31\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w9,1\],{ ?z4\.h ?- ?z7\.h ?},z10\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0,vgx2\],{ ?z0\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.d\[W8,0,VGx2\],{ ?Z0\.h ?- ?Z1\.h ?},Z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.D\[W8,0,VGX2\],{ ?Z0\.H ?- ?Z1\.H ?},Z0\.H'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w11,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,7\],{ ?z0\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{ ?z30\.h ?- ?z31\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{ ?z31\.h,z0\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{ ?z31\.h ?- ?z0\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w9,3\],{ ?z21\.h ?- ?z22\.h ?},z9\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0,vgx4\],{ ?z0\.h ?- ?z3\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.d\[W8,0,VGx4\],{ ?Z0\.h ?- ?Z3\.h ?},Z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.D\[W8,0,VGX4\],{ ?Z0\.H ?- ?Z3\.H ?},Z0\.H'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w11,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,7\],{ ?z0\.h ?- ?z3\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{ ?z28\.h ?- ?z31\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{ ?z30\.h,z31\.h,z0\.h,z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{ ?z30\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{ ?z31\.h,z0\.h,z1\.h,z2\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{ ?z31\.h ?- ?z2\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w10,5\],{ ?z17\.h ?- ?z20\.h ?},z3\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0,vgx2\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.d\[W8,0,VGx2\],{ ?Z0\.h ?- ?Z1\.h ?},{ ?Z0\.h ?- ?Z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.D\[W8,0,VGX2\],{ ?Z0\.H ?- ?Z1\.H ?},{ ?Z0\.H ?- ?Z1\.H ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w11,0\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,7\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{ ?z30\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},{ ?z30\.h ?- ?z31\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w10,1\],{ ?z22\.h ?- ?z23\.h ?},{ ?z18\.h ?- ?z19\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0,vgx4\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.d\[W8,0,VGx4\],{ ?Z0\.h ?- ?Z3\.h ?},{ ?Z0\.h ?- ?Z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.D\[W8,0,VGX4\],{ ?Z0\.H ?- ?Z3\.H ?},{ ?Z0\.H ?- ?Z3\.H ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w11,0\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,7\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{ ?z28\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},{ ?z28\.h ?- ?z31\.h ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w11,3\],{ ?z16\.h ?- ?z19\.h ?},{ ?z24\.h ?- ?z27\.h ?}'
diff --git a/gas/testsuite/gas/aarch64/sme2-i16i64-4-invalid.l b/gas/testsuite/gas/aarch64/sme2-i16i64-4-invalid.l
index c33f15e..741064a 100644
--- a/gas/testsuite/gas/aarch64/sme2-i16i64-4-invalid.l
+++ b/gas/testsuite/gas/aarch64/sme2-i16i64-4-invalid.l
@@ -1,11 +1,11 @@
 [^ :]+: Assembler messages:
-[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `svdot za\.d\[w8,0\],{z0\.h-z1\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: register element index out of range 0 to 1 at operand 3 -- `svdot za\.d\[w8,0\],{z0\.h-z3\.h},z0\.h\[-1\]'
-[^ :]+:[0-9]+: Error: register element index out of range 0 to 1 at operand 3 -- `svdot za\.d\[w8,0\],{z0\.h-z3\.h},z0\.h\[2\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `svdot za\.d\[w8,0\],{z1\.h-z4\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `svdot za\.d\[w8,0\],{z2\.h-z5\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `svdot za\.d\[w8,0\],{z3\.h-z6\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: operand 3 must be an indexed SVE vector register -- `svdot za\.d\[w8,0\],{z0\.h-z1\.h},z0\.h'
-[^ :]+:[0-9]+: Error: operand 3 must be an indexed SVE vector register -- `svdot za\.d\[w8,0\],{z0\.h-z3\.h},z0\.h'
-[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `svdot za\.d\[w8,0\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
-[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `svdot za\.d\[w8,0\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `svdot za\.d\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 1 at operand 3 -- `svdot za\.d\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[-1\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 1 at operand 3 -- `svdot za\.d\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[2\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `svdot za\.d\[w8,0\],{ ?z1\.h ?- ?z4\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `svdot za\.d\[w8,0\],{ ?z2\.h ?- ?z5\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `svdot za\.d\[w8,0\],{ ?z3\.h ?- ?z6\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: operand 3 must be an indexed SVE vector register -- `svdot za\.d\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: operand 3 must be an indexed SVE vector register -- `svdot za\.d\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `svdot za\.d\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `svdot za\.d\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}'
diff --git a/gas/testsuite/gas/aarch64/sme2-i16i64-4-noarch.l b/gas/testsuite/gas/aarch64/sme2-i16i64-4-noarch.l
index 4b27662..4fd2fd5 100644
--- a/gas/testsuite/gas/aarch64/sme2-i16i64-4-noarch.l
+++ b/gas/testsuite/gas/aarch64/sme2-i16i64-4-noarch.l
@@ -1,21 +1,21 @@
 [^ :]+: Assembler messages:
-[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.d\[w8,0\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.d\[w8,0,vgx4\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `svdot ZA\.d\[W8,0,VGx4\],{Z0\.h-Z3\.h},Z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `svdot ZA\.D\[W8,0,VGX4\],{Z0\.H-Z3\.H},Z0\.H\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.d\[w11,0\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.d\[w8,7\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.d\[w8,0\],{z28\.h-z31\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.d\[w8,0\],{z0\.h-z3\.h},z15\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.d\[w8,0\],{z0\.h-z3\.h},z0\.h\[1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.d\[w9,1\],{z4\.h-z7\.h},z10\.h\[1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.d\[w8,0\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.d\[w8,0,vgx4\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `uvdot ZA\.d\[W8,0,VGx4\],{Z0\.h-Z3\.h},Z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `uvdot ZA\.D\[W8,0,VGX4\],{Z0\.H-Z3\.H},Z0\.H\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.d\[w11,0\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.d\[w8,7\],{z0\.h-z3\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.d\[w8,0\],{z28\.h-z31\.h},z0\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.d\[w8,0\],{z0\.h-z3\.h},z15\.h\[0\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.d\[w8,0\],{z0\.h-z3\.h},z0\.h\[1\]'
-[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.d\[w9,1\],{z4\.h-z7\.h},z10\.h\[1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.d\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.d\[w8,0,vgx4\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `svdot ZA\.d\[W8,0,VGx4\],{ ?Z0\.h ?- ?Z3\.h ?},Z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `svdot ZA\.D\[W8,0,VGX4\],{ ?Z0\.H ?- ?Z3\.H ?},Z0\.H\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.d\[w11,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.d\[w8,7\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.d\[w8,0\],{ ?z28\.h ?- ?z31\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.d\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.d\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.d\[w9,1\],{ ?z4\.h ?- ?z7\.h ?},z10\.h\[1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.d\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.d\[w8,0,vgx4\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `uvdot ZA\.d\[W8,0,VGx4\],{ ?Z0\.h ?- ?Z3\.h ?},Z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `uvdot ZA\.D\[W8,0,VGX4\],{ ?Z0\.H ?- ?Z3\.H ?},Z0\.H\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.d\[w11,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.d\[w8,7\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.d\[w8,0\],{ ?z28\.h ?- ?z31\.h ?},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.d\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.d\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.d\[w9,1\],{ ?z4\.h ?- ?z7\.h ?},z10\.h\[1\]'
diff --git a/gas/testsuite/gas/aarch64/sme2-lutv2-bad.l b/gas/testsuite/gas/aarch64/sme2-lutv2-bad.l
index 7883722..a73996e 100644
--- a/gas/testsuite/gas/aarch64/sme2-lutv2-bad.l
+++ b/gas/testsuite/gas/aarch64/sme2-lutv2-bad.l
@@ -4,12 +4,12 @@
 .*: Error: selected processor does not support `movt zt0\[3,mul vl\],z0'
 .*: Error: selected processor does not support `movt zt0\[3,mul vl\],z31'
 .*: Error: selected processor does not support `movt zt0\[2,mul vl\],z25'
-.*: Error: selected processor does not support `luti4 {z0.b-z3.b},zt0,{z0-z1}'
-.*: Error: selected processor does not support `luti4 {z28.b-z31.b},zt0,{z0-z1}'
-.*: Error: selected processor does not support `luti4 {z0.b-z3.b},zt0,{z30-z31}'
-.*: Error: selected processor does not support `luti4 {z20.b-z23.b},zt0,{z12-z13}'
-.*: Error: selected processor does not support `luti4 {z0.b,z4.b,z8.b,z12.b},zt0,{z0-z1}'
-.*: Error: selected processor does not support `luti4 {z19.b,z23.b,z27.b,z31.b},zt0,{z0-z1}'
-.*: Error: selected processor does not support `luti4 {z0.b,z4.b,z8.b,z12.b},zt0,{z30-z31}'
-.*: Error: selected processor does not support `luti4 {z17.b,z21.b,z25.b,z29.b},zt0,{z12-z13}'
-.*: Error: selected processor does not support `luti4 {z20.b,z21.b,z22.b,z23.b},zt0,{z12-z13}'
+.*: Error: selected processor does not support `luti4 { ?z0.b ?- ?z3.b ?},zt0,{ ?z0 ?- ?z1 ?}'
+.*: Error: selected processor does not support `luti4 { ?z28.b ?- ?z31.b ?},zt0,{ ?z0 ?- ?z1 ?}'
+.*: Error: selected processor does not support `luti4 { ?z0.b ?- ?z3.b ?},zt0,{ ?z30 ?- ?z31 ?}'
+.*: Error: selected processor does not support `luti4 { ?z20.b ?- ?z23.b ?},zt0,{ ?z12 ?- ?z13 ?}'
+.*: Error: selected processor does not support `luti4 { ?z0.b,z4.b,z8.b,z12.b ?},zt0,{ ?z0 ?- ?z1 ?}'
+.*: Error: selected processor does not support `luti4 { ?z19.b,z23.b,z27.b,z31.b ?},zt0,{ ?z0 ?- ?z1 ?}'
+.*: Error: selected processor does not support `luti4 { ?z0.b,z4.b,z8.b,z12.b ?},zt0,{ ?z30 ?- ?z31 ?}'
+.*: Error: selected processor does not support `luti4 { ?z17.b,z21.b,z25.b,z29.b ?},zt0,{ ?z12 ?- ?z13 ?}'
+.*: Error: selected processor does not support `luti4 { ?z20.b,z21.b,z22.b,z23.b ?},zt0,{ ?z12 ?- ?z13 ?}'
diff --git a/gas/testsuite/gas/aarch64/sme2-lutv2-illegal.l b/gas/testsuite/gas/aarch64/sme2-lutv2-illegal.l
index 4495a9a..e889dae 100644
--- a/gas/testsuite/gas/aarch64/sme2-lutv2-illegal.l
+++ b/gas/testsuite/gas/aarch64/sme2-lutv2-illegal.l
@@ -1,25 +1,25 @@
 [^ :]+: Assembler messages:
-[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `luti4 {z20.b-z23.h},zt0,{z13-z14}'
-[^ :]+:[0-9]+: Error: type mismatch in vector register list at operand 1 -- `luti4 {z19.b,z23.b,z27.b,z31.h},zt0,{z13-z14}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `luti4 { ?z20.b ?- ?z23.h ?},zt0,{ ?z13 ?- ?z14 ?}'
+[^ :]+:[0-9]+: Error: type mismatch in vector register list at operand 1 -- `luti4 { ?z19.b,z23.b,z27.b,z31.h ?},zt0,{ ?z13 ?- ?z14 ?}'
 [^ :]+:[0-9]+: Error: unexpected register type at operand 1 -- `movt z3,zt0'
 [^ :]+:[0-9]+: Error: unexpected register type at operand 1 -- `movt z3\[0\],zt0'
 [^ :]+:[0-9]+: Error: operand 1 must be an integer register -- `movt zt1,z25'
-[^ :]+:[0-9]+: Error: expected a vector register at operand 1 -- `luti4 zt0,\{z0.b-z3.b\},\{z0-z1\}'
-[^ :]+:[0-9]+: Error: expected a register at operand 2 -- `luti4 \{z0.b-z3.b\},\{z0.b-z1.b\}\{z0-z1\}'
-[^ :]+:[0-9]+: Error: syntax error in register list at operand 1 -- `luti4 \{\},zt0,\{z12-z13\}'
-[^ :]+:[0-9]+: Error: invalid vector register in list at operand 3 -- `luti4 \{z20.b-z23.b\},zt0,\{\}'
-[^ :]+:[0-9]+: Error: unexpected register type at operand 2 -- `luti4 \{z20.b-z23.b\},z3,\{z12-z13\}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `luti4 \{z19.b-z22.b\},zt0,\{z12-z13\}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `luti4 \{z20.b-z23.b\},zt0,\{z13-z14\}'
-[^ :]+:[0-9]+: Error: expected a vector register at operand 1 -- `luti4 zt0,{z0.b,z4.b,z8.b,z12.b},{z0-z1}'
-[^ :]+:[0-9]+: Error: expected a register at operand 2 -- `luti4 {z0.b,z4.b,z8.b,z12.b},{z0.b-z1.b}{z0-z1}'
-[^ :]+:[0-9]+: Error: invalid vector register in list at operand 3 -- `luti4 {z19.b,z23.b,z27.b,z31.b},zt0,{}'
-[^ :]+:[0-9]+: Error: unexpected register type at operand 2 -- `luti4 {z19.b,z23.b,z27.b,z31.b},z3,{z12-z13}'
-[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `luti4 {z19.b,z23.b,z27.b,z31.b},zt0,{z13-z14}'
-[^ :]+:[0-9]+: Error: operand mismatch -- `luti4 \{z20.s-z23.s\},zt0,\{z20-z21\}'
+[^ :]+:[0-9]+: Error: expected a vector register at operand 1 -- `luti4 zt0,\{ ?z0.b ?- ?z3.b\ ?},\{ ?z0 ?- ?z1\ ?}'
+[^ :]+:[0-9]+: Error: expected a register at operand 2 -- `luti4 \{ ?z0.b ?- ?z3.b\ ?},\{ ?z0.b ?- ?z1.b\ ?} ?\{ ?z0 ?- ?z1\ ?}'
+[^ :]+:[0-9]+: Error: syntax error in register list at operand 1 -- `luti4 \{ ?\ ?},zt0,\{ ?z12 ?- ?z13\ ?}'
+[^ :]+:[0-9]+: Error: invalid vector register in list at operand 3 -- `luti4 \{ ?z20.b ?- ?z23.b\ ?},zt0,\{ ?\ ?}'
+[^ :]+:[0-9]+: Error: unexpected register type at operand 2 -- `luti4 \{ ?z20.b ?- ?z23.b\ ?},z3,\{ ?z12 ?- ?z13\ ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `luti4 \{ ?z19.b ?- ?z22.b\ ?},zt0,\{ ?z12 ?- ?z13\ ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `luti4 \{ ?z20.b ?- ?z23.b\ ?},zt0,\{ ?z13 ?- ?z14\ ?}'
+[^ :]+:[0-9]+: Error: expected a vector register at operand 1 -- `luti4 zt0,{ ?z0.b,z4.b,z8.b,z12.b ?},{ ?z0 ?- ?z1 ?}'
+[^ :]+:[0-9]+: Error: expected a register at operand 2 -- `luti4 { ?z0.b,z4.b,z8.b,z12.b ?},{ ?z0.b ?- ?z1.b ?} ?{ ?z0 ?- ?z1 ?}'
+[^ :]+:[0-9]+: Error: invalid vector register in list at operand 3 -- `luti4 { ?z19.b,z23.b,z27.b,z31.b ?},zt0,{ ? ?}'
+[^ :]+:[0-9]+: Error: unexpected register type at operand 2 -- `luti4 { ?z19.b,z23.b,z27.b,z31.b ?},z3,{ ?z12 ?- ?z13 ?}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `luti4 { ?z19.b,z23.b,z27.b,z31.b ?},zt0,{ ?z13 ?- ?z14 ?}'
+[^ :]+:[0-9]+: Error: operand mismatch -- `luti4 \{ ?z20.s ?- ?z23.s\ ?},zt0,\{ ?z20 ?- ?z21\ ?}'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	luti4 {z20.b-z23.b}, zt0, {z20-z21}
-[^ :]+:[0-9]+: Error: operand mismatch -- `luti4 {z19.s,z23.s,z27.s,z31.s},zt0,{z20-z21}'
+[^ :]+:[0-9]+: Error: operand mismatch -- `luti4 { ?z19.s,z23.s,z27.s,z31.s ?},zt0,{ ?z20 ?- ?z21 ?}'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	luti4 {z19.b, z23.b, z27.b, z31.b}, zt0, {z20-z21}
 [^ :]+:[0-9]+: Error: comma expected between operands at operand 2 -- `movt zt0.b,z31'
@@ -28,43 +28,43 @@
 [^ :]+:[0-9]+: Error: comma expected between operands at operand 2 -- `movt zt0\[1,mul vl\]'
 [^ :]+:[0-9]+: Error: unexpected characters following instruction at operand 2 -- `movt zt0,z23,z31'
 [^ :]+:[0-9]+: Error: unexpected characters following instruction at operand 2 -- `movt zt0\[1,mul vl\],z23,z31'
-[^ :]+:[0-9]+: Error: comma expected between operands at operand 2 -- `luti4 \{z20.b-z23.b\}'
-[^ :]+:[0-9]+: Error: comma expected between operands at operand 3 -- `luti4 \{z20.b-z23.b\},zt0'
-[^ :]+:[0-9]+: Error: unexpected characters following instruction at operand 3 -- `luti4 \{z20.b-z23.b\},zt0,\{z12-z13\},\{z20-z21\}'
-[^ :]+:[0-9]+: Error: comma expected between operands at operand 2 -- `luti4 {z19.b,z23.b,z27.b,z31.b}'
-[^ :]+:[0-9]+: Error: comma expected between operands at operand 3 -- `luti4 {z19.b,z23.b,z27.b,z31.b},zt0'
-[^ :]+:[0-9]+: Error: comma expected between operands at operand 3 -- `luti4 {z19.b,z23.b,z27.b,z31.b},zt0{z12-z13},{z20-z21}'
+[^ :]+:[0-9]+: Error: comma expected between operands at operand 2 -- `luti4 \{ ?z20.b ?- ?z23.b\ ?}'
+[^ :]+:[0-9]+: Error: comma expected between operands at operand 3 -- `luti4 \{ ?z20.b ?- ?z23.b\ ?},zt0'
+[^ :]+:[0-9]+: Error: unexpected characters following instruction at operand 3 -- `luti4 \{ ?z20.b ?- ?z23.b\ ?},zt0,\{ ?z12 ?- ?z13\ ?},\{ ?z20 ?- ?z21\ ?}'
+[^ :]+:[0-9]+: Error: comma expected between operands at operand 2 -- `luti4 { ?z19.b,z23.b,z27.b,z31.b ?}'
+[^ :]+:[0-9]+: Error: comma expected between operands at operand 3 -- `luti4 { ?z19.b,z23.b,z27.b,z31.b ?},zt0'
+[^ :]+:[0-9]+: Error: comma expected between operands at operand 3 -- `luti4 { ?z19.b,z23.b,z27.b,z31.b ?},zt0 ?{ ?z12 ?- ?z13 ?},{ ?z20 ?- ?z21 ?}'
 [^ :]+:[0-9]+: Error: operand 1 must be an integer register -- `movt zy0,z16'
 [^ :]+:[0-9]+: Error: operand 1 must be an integer register -- `movt zt1,z16'
 [^ :]+:[0-9]+: Error: operand 1 must be an integer register -- `movt zy0\[1,mul vl\],z16'
 [^ :]+:[0-9]+: Error: expected an SVE vector register at operand 2 -- `movt zt0,y16'
 [^ :]+:[0-9]+: Error: expected an SVE vector register at operand 2 -- `movt zt0\[1,mul vl\],y16'
-[^ :]+:[0-9]+: Error: operand 1 must be a list of SVE vector registers -- `luti4 \{z20.b-y23.b\},zt0,\{z12-z13\}'
-[^ :]+:[0-9]+: Error: unexpected character `x' in element size at operand 1 -- `luti4 \{z20.x-z23.b\},zt0,\{z12-z13\}'
-[^ :]+:[0-9]+: Error: expected a register at operand 2 -- `luti4 \{z20.b-z23.b\},zy0,\{z12-z13\}'
-[^ :]+:[0-9]+: Error: operand 1 must be a list of SVE vector registers -- `luti4 \{z20.b-y23.b\},zt0,\{y12-z13\}'
-[^ :]+:[0-9]+: Error: operand 1 must be a list of SVE vector registers -- `luti4 {z19.b,z23.b,z27.b,y31.b},zt0,{z12-z13}'
-[^ :]+:[0-9]+: Error: unexpected character `x' in element size at operand 1 -- `luti4 {z19.x,z23.b,z27.b,z31.b},zt0,{z12-z13}'
-[^ :]+:[0-9]+: Error: expected a register at operand 2 -- `luti4 {z19.b,z23.b,z27.b,z31.b},zy0,{z12-z13}'
-[^ :]+:[0-9]+: Error: invalid vector register in list at operand 3 -- `luti4 {z19.b,z23.b,z27.b,z31.b},zt0,{y12-z13}'
-[^ :]+:[0-9]+: Error: missing type suffix at operand 1 -- `luti4 \{z20-z23.b\},zt0,\{z12-z13\}'
-[^ :]+:[0-9]+: Error: type mismatch in vector register list at operand 1 -- `luti4 {z19.b,z23,z27.b,z31.b},zt0,{z12-z13}'
+[^ :]+:[0-9]+: Error: operand 1 must be a list of SVE vector registers -- `luti4 \{ ?z20.b ?- ?y23.b\ ?},zt0,\{ ?z12 ?- ?z13\ ?}'
+[^ :]+:[0-9]+: Error: unexpected character `x' in element size at operand 1 -- `luti4 \{ ?z20.x ?- ?z23.b\ ?},zt0,\{ ?z12 ?- ?z13\ ?}'
+[^ :]+:[0-9]+: Error: expected a register at operand 2 -- `luti4 \{ ?z20.b ?- ?z23.b\ ?},zy0,\{ ?z12 ?- ?z13\ ?}'
+[^ :]+:[0-9]+: Error: operand 1 must be a list of SVE vector registers -- `luti4 \{ ?z20.b ?- ?y23.b\ ?},zt0,\{ ?y12 ?- ?z13\ ?}'
+[^ :]+:[0-9]+: Error: operand 1 must be a list of SVE vector registers -- `luti4 { ?z19.b,z23.b,z27.b,y31.b ?},zt0,{ ?z12 ?- ?z13 ?}'
+[^ :]+:[0-9]+: Error: unexpected character `x' in element size at operand 1 -- `luti4 { ?z19.x,z23.b,z27.b,z31.b ?},zt0,{ ?z12 ?- ?z13 ?}'
+[^ :]+:[0-9]+: Error: expected a register at operand 2 -- `luti4 { ?z19.b,z23.b,z27.b,z31.b ?},zy0,{ ?z12 ?- ?z13 ?}'
+[^ :]+:[0-9]+: Error: invalid vector register in list at operand 3 -- `luti4 { ?z19.b,z23.b,z27.b,z31.b ?},zt0,{ ?y12 ?- ?z13 ?}'
+[^ :]+:[0-9]+: Error: missing type suffix at operand 1 -- `luti4 \{ ?z20 ?- ?z23.b\ ?},zt0,\{ ?z12 ?- ?z13\ ?}'
+[^ :]+:[0-9]+: Error: type mismatch in vector register list at operand 1 -- `luti4 { ?z19.b,z23,z27.b,z31.b ?},zt0,{ ?z12 ?- ?z13 ?}'
 [^ :]+:[0-9]+: Error: operand 1 must be an integer register -- `movt zt,z25.b'
-[^ :]+:[0-9]+: Error: end of vector register list not found at operand 3 -- `luti4 {z20.b-z23.b},zt0,{z12.b-z13.b}'
-[^ :]+:[0-9]+: Error: end of vector register list not found at operand 3 -- `luti4 {z19.b,z23.b,z27.b,z31.b},zt0,{z12.b-z13.b}'
+[^ :]+:[0-9]+: Error: end of vector register list not found at operand 3 -- `luti4 { ?z20.b ?- ?z23.b ?},zt0,{ ?z12.b ?- ?z13.b ?}'
+[^ :]+:[0-9]+: Error: end of vector register list not found at operand 3 -- `luti4 { ?z19.b,z23.b,z27.b,z31.b ?},zt0,{ ?z12.b ?- ?z13.b ?}'
 [^ :]+:[0-9]+: Error: operand 2 must be an SVE vector register -- `movt zt0,z25\[1\]'
 [^ :]+:[0-9]+: Error: operand 2 must be an SVE vector register -- `movt zt0,z25\[1,mul vl\]'
 [^ :]+:[0-9]+: Error: expected an SVE vector register at operand 2 -- `movt zt0\[2,mul vl\],z32'
 [^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 1 -- `movt zt0\[4,mul vl\],z25'
 [^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 1 -- `movt zt0\[-1,mul vl\],z25'
-[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `luti4 {z32.b-z36.b},zt0,{z12-z13}'
-[^ :]+:[0-9]+: Error: invalid vector register in list at operand 3 -- `luti4 {z20.b-z23.b},zt0,{z32-z33}'
-[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `luti4 {z32.b,z36.b,z40.b,z44.b},zt0,{z12-z13}'
-[^ :]+:[0-9]+: Error: invalid vector register in list at operand 3 -- `luti4 {z19.b,z23.b,z27.b,z31.b},zt0,{z32-z33}'
-[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 1 -- `luti4 {z20.b-z24.b},zt0,{z12-z13}'
-[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 1 -- `luti4 {z20.b-z22.b},zt0,{z12-z13}'
-[^ :]+:[0-9]+: Error: invalid register stride at operand 1 -- `luti4 {z20.b-z23.b},zt0,{z12-z14}'
-[^ :]+:[0-9]+: Error: invalid range in vector register list at operand 3 -- `luti4 {z20.b-z23.b},zt0,{z12-z12}'
-[^ :]+:[0-9]+: Error: invalid register list at operand 1 -- `luti4 {z19.b,z24.b,z27.b,z31.b},zt0,{z12-z13}'
-[^ :]+:[0-9]+: Error: invalid register list at operand 1 -- `luti4 {z19.b,z22.b,z27.b,z31.b},zt0,{z12-z13}'
-[^ :]+:[0-9]+: Error: the register list must have a stride of 1 at operand 1 -- `luti4 {z19.b,z23.b,z27.b,z31.b},zt0,{z12-z14}'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `luti4 { ?z32.b ?- ?z36.b ?},zt0,{ ?z12 ?- ?z13 ?}'
+[^ :]+:[0-9]+: Error: invalid vector register in list at operand 3 -- `luti4 { ?z20.b ?- ?z23.b ?},zt0,{ ?z32 ?- ?z33 ?}'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `luti4 { ?z32.b,z36.b,z40.b,z44.b ?},zt0,{ ?z12 ?- ?z13 ?}'
+[^ :]+:[0-9]+: Error: invalid vector register in list at operand 3 -- `luti4 { ?z19.b,z23.b,z27.b,z31.b ?},zt0,{ ?z32 ?- ?z33 ?}'
+[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 1 -- `luti4 { ?z20.b ?- ?z24.b ?},zt0,{ ?z12 ?- ?z13 ?}'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 1 -- `luti4 { ?z20.b ?- ?z22.b ?},zt0,{ ?z12 ?- ?z13 ?}'
+[^ :]+:[0-9]+: Error: invalid register stride at operand 1 -- `luti4 { ?z20.b ?- ?z23.b ?},zt0,{ ?z12 ?- ?z14 ?}'
+[^ :]+:[0-9]+: Error: invalid range in vector register list at operand 3 -- `luti4 { ?z20.b ?- ?z23.b ?},zt0,{ ?z12 ?- ?z12 ?}'
+[^ :]+:[0-9]+: Error: invalid register list at operand 1 -- `luti4 { ?z19.b,z24.b,z27.b,z31.b ?},zt0,{ ?z12 ?- ?z13 ?}'
+[^ :]+:[0-9]+: Error: invalid register list at operand 1 -- `luti4 { ?z19.b,z22.b,z27.b,z31.b ?},zt0,{ ?z12 ?- ?z13 ?}'
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 at operand 1 -- `luti4 { ?z19.b,z23.b,z27.b,z31.b ?},zt0,{ ?z12 ?- ?z14 ?}'
diff --git a/gas/testsuite/gas/aarch64/sme2p1-2-bad.l b/gas/testsuite/gas/aarch64/sme2p1-2-bad.l
index 8fd4039..27a1f74 100644
--- a/gas/testsuite/gas/aarch64/sme2p1-2-bad.l
+++ b/gas/testsuite/gas/aarch64/sme2p1-2-bad.l
@@ -1,62 +1,62 @@
 .*: Assembler messages:
-.*: Error: the register list must have a stride of 1 or 8 at operand 1 -- `luti2 {z0.b,z7.b},zt0,z0\[0\]`
-.*: Error: the register list must have a stride of 1 at operand 1 -- `luti2 {Z0.s,Z8.s},ZT0,Z0\[0\]'
-.*: Error: operand mismatch -- `luti2 {z7.d,z15.d},zt0,z0\[0\]'
+.*: Error: the register list must have a stride of 1 or 8 at operand 1 -- `luti2 { ?z0.b,z7.b ?},zt0,z0\[0\]`
+.*: Error: the register list must have a stride of 1 at operand 1 -- `luti2 { ?Z0.s,Z8.s ?},ZT0,Z0\[0\]'
+.*: Error: operand mismatch -- `luti2 { ?z7.d,z15.d ?},zt0,z0\[0\]'
 .*: Info:    did you mean this\?
 .*: Info:    	luti2 {z7.b, z15.b}, zt0, z0\[0\]
 .*: Info:    other valid variant\(s\):
 .*: Info:    	luti2 {z7.h, z15.h}, zt0, z0\[0\]
 .*: Info:    	luti2 {z7.s, z15.s}, zt0, z0\[0\]
-.*: Error: operand 3 must be an indexed SVE vector register -- `luti2 {z16.b,z24.b},zt0,z0'
-.*: Error: register element index out of range 0 to 7 at operand 3 -- `luti2 {z23.b,z31.b},zt0,z0\[8\]'
-.*: Error: register element index out of range 0 to 7 at operand 3 -- `luti2 {z0.b,z8.b},zt0,z31\[15\]'
-.*: Error: unexpected register type at operand 2 -- `luti2 {z0.b,z8.b},z0\[7\]'
-.*: Error: the register list must have a stride of 1 or 8 at operand 1 -- `luti2 {z8.b,z24.b},zt0,z31\[0\]`
-.*: Error: invalid register list at operand 1 -- `luti2 {z24.b,z24.b},zt0,z0\[7\]'
-.*: Error: the register list must have a stride of 1 or 8 at operand 1 -- `luti2 {z4.h,z16.h},zt0,z20\[4\]`
-.*: Error: the register list must have a stride of 1 or 8 at operand 1 -- `luti2 {z20.h,z22.h},zt0,z12\[2\]`
-.*: Error: invalid register list at operand 1 -- `luti2 {z0.b,z3.b,z18.b,z1.b},zt0,z0\[0\]'
-.*: Error: the register list must have a stride of 1 at operand 1 -- `luti2 {Z0.s,Z4.s,Z8.s,Z12.s},ZT0,Z0\[0\]'
-.*: Error: operand mismatch -- `luti2 {z3.d,z7.d,z11.d,z15.d},zt0,z0\[0\]'
+.*: Error: operand 3 must be an indexed SVE vector register -- `luti2 { ?z16.b,z24.b ?},zt0,z0'
+.*: Error: register element index out of range 0 to 7 at operand 3 -- `luti2 { ?z23.b,z31.b ?},zt0,z0\[8\]'
+.*: Error: register element index out of range 0 to 7 at operand 3 -- `luti2 { ?z0.b,z8.b ?},zt0,z31\[15\]'
+.*: Error: unexpected register type at operand 2 -- `luti2 { ?z0.b,z8.b ?},z0\[7\]'
+.*: Error: the register list must have a stride of 1 or 8 at operand 1 -- `luti2 { ?z8.b,z24.b ?},zt0,z31\[0\]`
+.*: Error: invalid register list at operand 1 -- `luti2 { ?z24.b,z24.b ?},zt0,z0\[7\]'
+.*: Error: the register list must have a stride of 1 or 8 at operand 1 -- `luti2 { ?z4.h,z16.h ?},zt0,z20\[4\]`
+.*: Error: the register list must have a stride of 1 or 8 at operand 1 -- `luti2 { ?z20.h,z22.h ?},zt0,z12\[2\]`
+.*: Error: invalid register list at operand 1 -- `luti2 { ?z0.b,z3.b,z18.b,z1.b ?},zt0,z0\[0\]'
+.*: Error: the register list must have a stride of 1 at operand 1 -- `luti2 { ?Z0.s,Z4.s,Z8.s,Z12.s ?},ZT0,Z0\[0\]'
+.*: Error: operand mismatch -- `luti2 { ?z3.d,z7.d,z11.d,z15.d ?},zt0,z0\[0\]'
 .*: Info:    did you mean this\?
 .*: Info:    	luti2 {z3.b, z7.b, z11.b, z15.b}, zt0, z0\[0\]
 .*: Info:    other valid variant\(s\):
 .*: Info:    	luti2 {z3.h, z7.h, z11.h, z15.h}, zt0, z0\[0\]
 .*: Info:    	luti2 {z3.s, z7.s, z11.s, z15.s}, zt0, z0\[0\]
-.*: Error: operand 3 must be an indexed SVE vector register -- `luti2 {z16.h,z20.h,z24.h,z28.h},zt0,z0'
-.*: Error: register element index out of range 0 to 3 at operand 3 -- `luti2 {z19.h,z23.h,z27.h,z31.h},zt0,z0\[5\]'
-.*: Error: start register out of range at operand 1 -- `luti2 {z10.b,z14.b,z18.b,z22.b},zt0,z31\[0\]'
-.*: Error: invalid register list at operand 1 -- `luti2 {z20.b,z24.b,z28.b,z30.b},z0\[3\]'
-.*: Error: invalid register list at operand 1 -- `luti2 {z4.b,z7.b,z11.b,z18.b},zt0,z31\[0\]'
-.*: Error: type mismatch in vector register list at operand 1 -- `luti2 {z6.b,z0.s,z2.d,z28.h},zt0,z0\[7\]'
-.*: Error: the register list must have a stride of 1 or 8 at operand 1 -- `luti4 {z0.b,z7.b},zt0,z0\[0\]`
-.*: Error: the register list must have a stride of 1 at operand 1 -- `luti2 {Z0.s,Z8.s},ZT0,Z0\[0\]'
-.*: Error: operand mismatch -- `luti4 {z7.d,z15.d},zt0,z0\[0\]'
+.*: Error: operand 3 must be an indexed SVE vector register -- `luti2 { ?z16.h,z20.h,z24.h,z28.h ?},zt0,z0'
+.*: Error: register element index out of range 0 to 3 at operand 3 -- `luti2 { ?z19.h,z23.h,z27.h,z31.h ?},zt0,z0\[5\]'
+.*: Error: start register out of range at operand 1 -- `luti2 { ?z10.b,z14.b,z18.b,z22.b ?},zt0,z31\[0\]'
+.*: Error: invalid register list at operand 1 -- `luti2 { ?z20.b,z24.b,z28.b,z30.b ?},z0\[3\]'
+.*: Error: invalid register list at operand 1 -- `luti2 { ?z4.b,z7.b,z11.b,z18.b ?},zt0,z31\[0\]'
+.*: Error: type mismatch in vector register list at operand 1 -- `luti2 { ?z6.b,z0.s,z2.d,z28.h ?},zt0,z0\[7\]'
+.*: Error: the register list must have a stride of 1 or 8 at operand 1 -- `luti4 { ?z0.b,z7.b ?},zt0,z0\[0\]`
+.*: Error: the register list must have a stride of 1 at operand 1 -- `luti2 { ?Z0.s,Z8.s ?},ZT0,Z0\[0\]'
+.*: Error: operand mismatch -- `luti4 { ?z7.d,z15.d ?},zt0,z0\[0\]'
 .*: Info:    did you mean this\?
 .*: Info:    	luti4 {z7.b, z15.b}, zt0, z0\[0\]
 .*: Info:    other valid variant\(s\):
 .*: Info:    	luti4 {z7.h, z15.h}, zt0, z0\[0\]
 .*: Info:    	luti4 {z7.s, z15.s}, zt0, z0\[0\]
-.*: Error: missing braces at operand 3 -- `luti4 {z16.b,z24.b},zt0,z0'
-.*: Error: register element index out of range 0 to 3 at operand 3 -- `luti4 {z23.b,z31.b},zt0,z0\[8\]'
-.*: Error: register element index out of range 0 to 3 at operand 3 -- `luti4 {z0.b,z8.b},zt0,z31\[15\]'
-.*: Error: unexpected register type at operand 2 -- `luti4 {z0.b,z8.b},z0\[7\]'
-.*: Error: the register list must have a stride of 1 or 8 at operand 1 -- `luti4 {z8.b,z24.b},zt0,z31\[0\]`
-.*: Error: invalid register list at operand 1 -- `luti4 {z24.b,z24.b},zt0,z0\[7\]'
-.*: Error: the register list must have a stride of 1 or 8 at operand 1 -- `luti4 {z4.h,z16.h},zt0,z20\[4\]`
-.*: Error: the register list must have a stride of 1 or 8 at operand 1 -- `luti4 {z20.h,z22.h},zt0,z12\[2\]`
-.*: Error: the register list must have a stride of 1 at operand 1 -- `luti4 {z0.s,z4.s,z8.s,z12.s},zt0,z0\[0\]'
-.*: Error: invalid register list at operand 1 -- `luti4 {z0.b,z3.b,z18.b,z1.b},zt0,z0\[0\]'
-.*: Error: the register list must have a stride of 1 at operand 1 -- `luti2 {Z0.s,Z4.s,Z8.s,Z12.s},ZT0,Z0\[0\]'
-.*: Error: operand mismatch -- `luti4 {z3.d,z7.d,z11.d,z15.d},zt0,z0\[0\]'
+.*: Error: missing braces at operand 3 -- `luti4 { ?z16.b,z24.b ?},zt0,z0'
+.*: Error: register element index out of range 0 to 3 at operand 3 -- `luti4 { ?z23.b,z31.b ?},zt0,z0\[8\]'
+.*: Error: register element index out of range 0 to 3 at operand 3 -- `luti4 { ?z0.b,z8.b ?},zt0,z31\[15\]'
+.*: Error: unexpected register type at operand 2 -- `luti4 { ?z0.b,z8.b ?},z0\[7\]'
+.*: Error: the register list must have a stride of 1 or 8 at operand 1 -- `luti4 { ?z8.b,z24.b ?},zt0,z31\[0\]`
+.*: Error: invalid register list at operand 1 -- `luti4 { ?z24.b,z24.b ?},zt0,z0\[7\]'
+.*: Error: the register list must have a stride of 1 or 8 at operand 1 -- `luti4 { ?z4.h,z16.h ?},zt0,z20\[4\]`
+.*: Error: the register list must have a stride of 1 or 8 at operand 1 -- `luti4 { ?z20.h,z22.h ?},zt0,z12\[2\]`
+.*: Error: the register list must have a stride of 1 at operand 1 -- `luti4 { ?z0.s,z4.s,z8.s,z12.s ?},zt0,z0\[0\]'
+.*: Error: invalid register list at operand 1 -- `luti4 { ?z0.b,z3.b,z18.b,z1.b ?},zt0,z0\[0\]'
+.*: Error: the register list must have a stride of 1 at operand 1 -- `luti2 { ?Z0.s,Z4.s,Z8.s,Z12.s ?},ZT0,Z0\[0\]'
+.*: Error: operand mismatch -- `luti4 { ?z3.d,z7.d,z11.d,z15.d ?},zt0,z0\[0\]'
 .*: Info:    did you mean this\?
 .*: Info:    	luti4 {z3.b, z7.b, z11.b, z15.b}, zt0, z0\[0\]
 .*: Info:    other valid variant\(s\):
 .*: Info:    	luti4 {z3.h, z7.h, z11.h, z15.h}, zt0, z0\[0\]
 .*: Info:    	luti4 {z3.s, z7.s, z11.s, z15.s}, zt0, z0\[0\]
-.*: Error: missing braces at operand 3 -- `luti4 {z16.h,z20.h,z24.h,z28.h},zt0,z0'
-.*: Error: register element index out of range 0 to 1 at operand 3 -- `luti4 {z19.h,z23.h,z27.h,z31.h},zt0,z0\[5\]'
-.*: Error: expected a list of 2 registers at operand 1 -- `luti4 {z10.b,z14.b,z18.b,z22.b},zt0,z31\[0\]'
-.*: Error: invalid register list at operand 1 -- `luti4 {z20.b,z24.b,z28.b,z30.b},z0\[3\]'
-.*: Error: invalid register list at operand 1 -- `luti4 {z4.b,z7.b,z11.b,z18.b},zt0,z31\[0\]'
-.*: Error: type mismatch in vector register list at operand 1 -- `luti4 {z6.b,z0.s,z2.d,z28.h},zt0,z0\[7\]'
+.*: Error: missing braces at operand 3 -- `luti4 { ?z16.h,z20.h,z24.h,z28.h ?},zt0,z0'
+.*: Error: register element index out of range 0 to 1 at operand 3 -- `luti4 { ?z19.h,z23.h,z27.h,z31.h ?},zt0,z0\[5\]'
+.*: Error: expected a list of 2 registers at operand 1 -- `luti4 { ?z10.b,z14.b,z18.b,z22.b ?},zt0,z31\[0\]'
+.*: Error: invalid register list at operand 1 -- `luti4 { ?z20.b,z24.b,z28.b,z30.b ?},z0\[3\]'
+.*: Error: invalid register list at operand 1 -- `luti4 { ?z4.b,z7.b,z11.b,z18.b ?},zt0,z31\[0\]'
+.*: Error: type mismatch in vector register list at operand 1 -- `luti4 { ?z6.b,z0.s,z2.d,z28.h ?},zt0,z0\[7\]'
diff --git a/gas/testsuite/gas/aarch64/sme2p1-3-bad.l b/gas/testsuite/gas/aarch64/sme2p1-3-bad.l
index 8b7019f..94dc67b 100644
--- a/gas/testsuite/gas/aarch64/sme2p1-3-bad.l
+++ b/gas/testsuite/gas/aarch64/sme2p1-3-bad.l
@@ -1,30 +1,30 @@
 .*: Assembler messages:
-.*: Error: operand mismatch -- `movaz {z0.s-z1.s},za.d\[w8,0,vgx2\]'
+.*: Error: operand mismatch -- `movaz {z0.s ?- ?z1.s},za.d\[w8,0,vgx2\]'
 .*: Info:    did you mean this\?
 .*: Info:    	movaz {z0.d-z1.d}, za.d\[w8, 0, vgx2\]
-.*: Error: operand mismatch -- `movaz {z30.h-z31.h},za.d\[w8,0,vgx2\]'
+.*: Error: operand mismatch -- `movaz {z30.h ?- ?z31.h},za.d\[w8,0,vgx2\]'
 .*: Info:    did you mean this\?
 .*: Info:    	movaz {z30.d-z31.d}, za.d\[w8, 0, vgx2\]
-.*: Error: operand mismatch -- `movaz {z0.b-z1.b},za.b\[w11,0,vgx2\]'
+.*: Error: operand mismatch -- `movaz {z0.b ?- ?z1.b},za.b\[w11,0,vgx2\]'
 .*: Info:    did you mean this\?
 .*: Info:    	movaz {z0.d-z1.d}, za.d\[w11, 0, vgx2\]
-.*: Error: expected a selection register in the range w8-w11 at operand 2 -- `movaz {z0.d-z1.d},za.d\[w13,7,vgx2\]'
-.*: Error: immediate offset out of range 0 to 7 at operand 2 -- `movaz {z30.d-z31.d},za.d\[w11,15,vgx2\]'
-.*: Error: invalid vector group size at operand 2 -- `movaz {z14.d-z15.d},za.d\[w9,4,vgx3\]'
-.*: Error: missing immediate offset at operand 2 -- `movaz {z6.d-z7.d},za.d\[w10\]'
-.*: Error: missing immediate offset at operand 2 -- `movaz {z2.d-z4.d},za.d\[w10 6\]'
-.*: Error: operand mismatch -- `movaz {z0.s-z3.s},za.d\[w8,0,vgx4\]'
+.*: Error: expected a selection register in the range w8-w11 at operand 2 -- `movaz {z0.d ?- ?z1.d},za.d\[w13,7,vgx2\]'
+.*: Error: immediate offset out of range 0 to 7 at operand 2 -- `movaz {z30.d ?- ?z31.d},za.d\[w11,15,vgx2\]'
+.*: Error: invalid vector group size at operand 2 -- `movaz {z14.d ?- ?z15.d},za.d\[w9,4,vgx3\]'
+.*: Error: missing immediate offset at operand 2 -- `movaz {z6.d ?- ?z7.d},za.d\[w10\]'
+.*: Error: missing immediate offset at operand 2 -- `movaz {z2.d ?- ?z4.d},za.d\[w10 6\]'
+.*: Error: operand mismatch -- `movaz {z0.s ?- ?z3.s},za.d\[w8,0,vgx4\]'
 .*: Info:    did you mean this\?
 .*: Info:    	movaz {z0.d-z3.d}, za.d\[w8, 0, vgx4\]
-.*: Error: operand mismatch -- `movaz {z28.h-z31.h},za.d\[w8,0,vgx4\]'
+.*: Error: operand mismatch -- `movaz {z28.h ?- ?z31.h},za.d\[w8,0,vgx4\]'
 .*: Info:    did you mean this\?
 .*: Info:    	movaz {z28.d-z31.d}, za.d\[w8, 0, vgx4\]
-.*: Error: operand mismatch -- `movaz {z0.b-z3.b},za.b\[w11,0,vgx4\]'
+.*: Error: operand mismatch -- `movaz {z0.b ?- ?z3.b},za.b\[w11,0,vgx4\]'
 .*: Info:    did you mean this\?
 .*: Info:    	movaz {z0.d-z3.d}, za.d\[w11, 0, vgx4\]
-.*: Error: expected a selection register in the range w8-w11 at operand 2 -- `movaz {z0.d-z3.d},za.d\[w14,7,vgx4\]'
-.*: Error: invalid vector group size at operand 2 -- `movaz {z28.d-z31.d},za.d\[w11,11,vgx3\]'
-.*: Error: start register out of range at operand 1 -- `movaz {z14.d-z17.d},za.d\[w9,4,vgx4\]'
-.*: Error: too many registers in vector register list at operand 1 -- `movaz {z4.d-z8.d},za.d\[w10,3,vgx4\]'
+.*: Error: expected a selection register in the range w8-w11 at operand 2 -- `movaz {z0.d ?- ?z3.d},za.d\[w14,7,vgx4\]'
+.*: Error: invalid vector group size at operand 2 -- `movaz {z28.d ?- ?z31.d},za.d\[w11,11,vgx3\]'
+.*: Error: start register out of range at operand 1 -- `movaz {z14.d ?- ?z17.d},za.d\[w9,4,vgx4\]'
+.*: Error: too many registers in vector register list at operand 1 -- `movaz {z4.d ?- ?z8.d},za.d\[w10,3,vgx4\]'
 .*: Error: missing immediate offset at operand 2 -- `movaz {z0.d,z3.d},za.d\[w10\]'
 .*: Error: the register list must have a stride of 1 at operand 1 -- `movaz {z1.d,z4.d},za.d\[w10,20\]'
diff --git a/gas/testsuite/gas/aarch64/sve-invalid.l b/gas/testsuite/gas/aarch64/sve-invalid.l
index 3dcb063..6b5f38f 100644
--- a/gas/testsuite/gas/aarch64/sve-invalid.l
+++ b/gas/testsuite/gas/aarch64/sve-invalid.l
@@ -232,9 +232,9 @@
 .*: Error: missing type suffix at operand 1 -- `ld1w z0,p1/z,\[x1\]'
 .*: Error: missing type suffix at operand 1 -- `ld1d z0,p1/z,\[x1\]'
 .*: Error: missing type suffix at operand 1 -- `ldff1b z0,p1/z,\[x1,xzr\]'
-.*: Error: missing type suffix at operand 1 -- `ldff1h z0,p1/z,\[x1,xzr,lsl#1\]'
-.*: Error: missing type suffix at operand 1 -- `ldff1w z0,p1/z,\[x1,xzr,lsl#2\]'
-.*: Error: missing type suffix at operand 1 -- `ldff1d z0,p1/z,\[x1,xzr,lsl#3\]'
+.*: Error: missing type suffix at operand 1 -- `ldff1h z0,p1/z,\[x1,xzr,lsl ?#1\]'
+.*: Error: missing type suffix at operand 1 -- `ldff1w z0,p1/z,\[x1,xzr,lsl ?#2\]'
+.*: Error: missing type suffix at operand 1 -- `ldff1d z0,p1/z,\[x1,xzr,lsl ?#3\]'
 .*: Error: missing type suffix at operand 1 -- `ldnf1b z0,p1/z,\[x1\]'
 .*: Error: missing type suffix at operand 1 -- `ldnf1h z0,p1/z,\[x1\]'
 .*: Error: missing type suffix at operand 1 -- `ldnf1w z0,p1/z,\[x1\]'
@@ -256,9 +256,9 @@
 .*: Error: missing type suffix at operand 1 -- `ld1w {z0},p1/z,\[x1\]'
 .*: Error: missing type suffix at operand 1 -- `ld1d {z0},p1/z,\[x1\]'
 .*: Error: missing type suffix at operand 1 -- `ldff1b {z0},p1/z,\[x1,xzr\]'
-.*: Error: missing type suffix at operand 1 -- `ldff1h {z0},p1/z,\[x1,xzr,lsl#1\]'
-.*: Error: missing type suffix at operand 1 -- `ldff1w {z0},p1/z,\[x1,xzr,lsl#2\]'
-.*: Error: missing type suffix at operand 1 -- `ldff1d {z0},p1/z,\[x1,xzr,lsl#3\]'
+.*: Error: missing type suffix at operand 1 -- `ldff1h {z0},p1/z,\[x1,xzr,lsl ?#1\]'
+.*: Error: missing type suffix at operand 1 -- `ldff1w {z0},p1/z,\[x1,xzr,lsl ?#2\]'
+.*: Error: missing type suffix at operand 1 -- `ldff1d {z0},p1/z,\[x1,xzr,lsl ?#3\]'
 .*: Error: missing type suffix at operand 1 -- `ldnf1b {z0},p1/z,\[x1\]'
 .*: Error: missing type suffix at operand 1 -- `ldnf1h {z0},p1/z,\[x1\]'
 .*: Error: missing type suffix at operand 1 -- `ldnf1w {z0},p1/z,\[x1\]'
@@ -292,8 +292,8 @@
 .*: Error: type mismatch in vector register list at operand 1 -- `ld2b {z0\.s,z1\.d},p1/z,\[x1\]'
 .*: Error: type mismatch in vector register list at operand 1 -- `ld2b {z0\.d,z1},p1/z,\[x1\]'
 .*: Error: immediate offset out of range -8 to 7 at operand 3 -- `ld1b z0\.b,p1/z,\[x1,#-9,mul vl\]'
-.*: Error: only 'MUL VL' is permitted at operand 3 -- `ld1b z0\.b,p1/z,\[x1,#0,mul#1\]'
-.*: Error: '\]' expected at operand 3 -- `ld1b z0\.b,p1/z,\[x1,#0,mul vl#1\]'
+.*: Error: only 'MUL VL' is permitted at operand 3 -- `ld1b z0\.b,p1/z,\[x1,#0,mul ?#1\]'
+.*: Error: '\]' expected at operand 3 -- `ld1b z0\.b,p1/z,\[x1,#0,mul vl ?#1\]'
 .*: Error: constant offset required at operand 3 -- `ld1b z0\.b,p1/z,\[x1,#foo,mul vl\]'
 .*: Error: invalid addressing mode at operand 3 -- `ld1b z0\.b,p1/z,\[x1,#1\]'
 .*: Error: invalid addressing mode at operand 3 -- `ld1b z0\.b,p1/z,\[x1,#7,mul vl\]!'
@@ -367,91 +367,91 @@
 .*: Error: immediate offset out of range 0 to 504 at operand 3 -- `ld1rd z0\.d,p1/z,\[x1,#512\]'
 .*: Error: register offset not allowed in pre-indexed addressing mode at operand 3 -- `ld1b z0\.b,p1/z,\[x1,x2\]!'
 .*: Error: invalid addressing mode at operand 3 -- `ld1b z0\.b,p1/z,\[x1\],x2'
-.*: Error: invalid addressing mode at operand 3 -- `ld1b z0\.b,p1/z,\[x1,x2,lsl#1\]'
-.*: Error: invalid addressing mode at operand 3 -- `ld1b z0\.b,p1/z,\[x1,x2,lsl#2\]'
-.*: Error: invalid addressing mode at operand 3 -- `ld1b z0\.b,p1/z,\[x1,x2,lsl#3\]'
+.*: Error: invalid addressing mode at operand 3 -- `ld1b z0\.b,p1/z,\[x1,x2,lsl ?#1\]'
+.*: Error: invalid addressing mode at operand 3 -- `ld1b z0\.b,p1/z,\[x1,x2,lsl ?#2\]'
+.*: Error: invalid addressing mode at operand 3 -- `ld1b z0\.b,p1/z,\[x1,x2,lsl ?#3\]'
 .*: Error: constant shift amount required at operand 3 -- `ld1b z0\.b,p1/z,\[x1,x2,lsl x3\]'
 .*: Error: invalid addressing mode at operand 3 -- `ld1b z0\.b,p1/z,\[x1,w2,sxtw\]'
 .*: Error: invalid addressing mode at operand 3 -- `ld1b z0\.b,p1/z,\[x1,w2,uxtw\]'
 .*: Error: invalid addressing mode at operand 3 -- `ld1h z0\.h,p1/z,\[x1,x2\]'
-.*: Error: register offset not allowed in pre-indexed addressing mode at operand 3 -- `ld1h z0\.h,p1/z,\[x1,x2,lsl#1\]!'
-.*: Error: invalid addressing mode at operand 3 -- `ld1h z0\.h,p1/z,\[x1,x2,lsl#2\]'
-.*: Error: invalid addressing mode at operand 3 -- `ld1h z0\.h,p1/z,\[x1,x2,lsl#3\]'
+.*: Error: register offset not allowed in pre-indexed addressing mode at operand 3 -- `ld1h z0\.h,p1/z,\[x1,x2,lsl ?#1\]!'
+.*: Error: invalid addressing mode at operand 3 -- `ld1h z0\.h,p1/z,\[x1,x2,lsl ?#2\]'
+.*: Error: invalid addressing mode at operand 3 -- `ld1h z0\.h,p1/z,\[x1,x2,lsl ?#3\]'
 .*: Error: constant shift amount required at operand 3 -- `ld1h z0\.h,p1/z,\[x1,x2,lsl x3\]'
 .*: Error: invalid addressing mode at operand 3 -- `ld1h z0\.h,p1/z,\[x1,w2,sxtw\]'
 .*: Error: invalid addressing mode at operand 3 -- `ld1h z0\.h,p1/z,\[x1,w2,uxtw\]'
 .*: Error: invalid addressing mode at operand 3 -- `ld1w z0\.s,p1/z,\[x1,x2\]'
-.*: Error: invalid addressing mode at operand 3 -- `ld1w z0\.s,p1/z,\[x1,x2,lsl#1\]'
-.*: Error: register offset not allowed in pre-indexed addressing mode at operand 3 -- `ld1w z0\.s,p1/z,\[x1,x2,lsl#2\]!'
-.*: Error: invalid addressing mode at operand 3 -- `ld1w z0\.s,p1/z,\[x1,x2,lsl#3\]'
+.*: Error: invalid addressing mode at operand 3 -- `ld1w z0\.s,p1/z,\[x1,x2,lsl ?#1\]'
+.*: Error: register offset not allowed in pre-indexed addressing mode at operand 3 -- `ld1w z0\.s,p1/z,\[x1,x2,lsl ?#2\]!'
+.*: Error: invalid addressing mode at operand 3 -- `ld1w z0\.s,p1/z,\[x1,x2,lsl ?#3\]'
 .*: Error: constant shift amount required at operand 3 -- `ld1w z0\.s,p1/z,\[x1,x2,lsl x3\]'
 .*: Error: invalid addressing mode at operand 3 -- `ld1w z0\.s,p1/z,\[x1,w2,sxtw\]'
 .*: Error: invalid addressing mode at operand 3 -- `ld1w z0\.s,p1/z,\[x1,w2,uxtw\]'
 .*: Error: invalid addressing mode at operand 3 -- `ld1d z0\.d,p1/z,\[x1,x2\]'
-.*: Error: invalid addressing mode at operand 3 -- `ld1d z0\.d,p1/z,\[x1,x2,lsl#1\]'
-.*: Error: invalid addressing mode at operand 3 -- `ld1d z0\.d,p1/z,\[x1,x2,lsl#2\]'
-.*: Error: register offset not allowed in pre-indexed addressing mode at operand 3 -- `ld1d z0\.d,p1/z,\[x1,x2,lsl#3\]!'
+.*: Error: invalid addressing mode at operand 3 -- `ld1d z0\.d,p1/z,\[x1,x2,lsl ?#1\]'
+.*: Error: invalid addressing mode at operand 3 -- `ld1d z0\.d,p1/z,\[x1,x2,lsl ?#2\]'
+.*: Error: register offset not allowed in pre-indexed addressing mode at operand 3 -- `ld1d z0\.d,p1/z,\[x1,x2,lsl ?#3\]!'
 .*: Error: constant shift amount required at operand 3 -- `ld1d z0\.d,p1/z,\[x1,x2,lsl x3\]'
 .*: Error: invalid addressing mode at operand 3 -- `ld1d z0\.d,p1/z,\[x1,w2,sxtw\]'
 .*: Error: invalid addressing mode at operand 3 -- `ld1d z0\.d,p1/z,\[x1,w2,uxtw\]'
-.*: Error: invalid addressing mode at operand 3 -- `ld1b z0\.d,p1/z,\[x1,z2\.d,lsl#1\]'
-.*: Error: invalid addressing mode at operand 3 -- `ld1b z0\.d,p1/z,\[x1,z2\.d,lsl#2\]'
-.*: Error: invalid addressing mode at operand 3 -- `ld1b z0\.d,p1/z,\[x1,z2\.d,lsl#3\]'
+.*: Error: invalid addressing mode at operand 3 -- `ld1b z0\.d,p1/z,\[x1,z2\.d,lsl ?#1\]'
+.*: Error: invalid addressing mode at operand 3 -- `ld1b z0\.d,p1/z,\[x1,z2\.d,lsl ?#2\]'
+.*: Error: invalid addressing mode at operand 3 -- `ld1b z0\.d,p1/z,\[x1,z2\.d,lsl ?#3\]'
 .*: Error: constant shift amount required at operand 3 -- `ld1b z0\.d,p1/z,\[x1,z2\.d,lsl x3\]'
-.*: Error: invalid addressing mode at operand 3 -- `ld1h z0\.d,p1/z,\[x1,z2\.d,lsl#2\]'
-.*: Error: invalid addressing mode at operand 3 -- `ld1h z0\.d,p1/z,\[x1,z2\.d,lsl#3\]'
+.*: Error: invalid addressing mode at operand 3 -- `ld1h z0\.d,p1/z,\[x1,z2\.d,lsl ?#2\]'
+.*: Error: invalid addressing mode at operand 3 -- `ld1h z0\.d,p1/z,\[x1,z2\.d,lsl ?#3\]'
 .*: Error: constant shift amount required at operand 3 -- `ld1h z0\.d,p1/z,\[x1,z2\.d,lsl x3\]'
-.*: Error: invalid addressing mode at operand 3 -- `ld1w z0\.d,p1/z,\[x1,z2\.d,lsl#1\]'
-.*: Error: invalid addressing mode at operand 3 -- `ld1w z0\.d,p1/z,\[x1,z2\.d,lsl#3\]'
+.*: Error: invalid addressing mode at operand 3 -- `ld1w z0\.d,p1/z,\[x1,z2\.d,lsl ?#1\]'
+.*: Error: invalid addressing mode at operand 3 -- `ld1w z0\.d,p1/z,\[x1,z2\.d,lsl ?#3\]'
 .*: Error: constant shift amount required at operand 3 -- `ld1w z0\.d,p1/z,\[x1,z2\.d,lsl x3\]'
-.*: Error: invalid addressing mode at operand 3 -- `ld1d z0\.d,p1/z,\[x1,z2\.d,lsl#1\]'
-.*: Error: invalid addressing mode at operand 3 -- `ld1d z0\.d,p1/z,\[x1,z2\.d,lsl#2\]'
+.*: Error: invalid addressing mode at operand 3 -- `ld1d z0\.d,p1/z,\[x1,z2\.d,lsl ?#1\]'
+.*: Error: invalid addressing mode at operand 3 -- `ld1d z0\.d,p1/z,\[x1,z2\.d,lsl ?#2\]'
 .*: Error: constant shift amount required at operand 3 -- `ld1d z0\.d,p1/z,\[x1,z2\.d,lsl x3\]'
-.*: Error: invalid addressing mode at operand 3 -- `ld1b z0\.s,p1/z,\[x1,z2\.s,sxtw#1\]'
-.*: Error: invalid addressing mode at operand 3 -- `ld1b z0\.s,p1/z,\[x1,z2\.s,sxtw#2\]'
-.*: Error: invalid addressing mode at operand 3 -- `ld1b z0\.s,p1/z,\[x1,z2\.s,sxtw#3\]'
+.*: Error: invalid addressing mode at operand 3 -- `ld1b z0\.s,p1/z,\[x1,z2\.s,sxtw ?#1\]'
+.*: Error: invalid addressing mode at operand 3 -- `ld1b z0\.s,p1/z,\[x1,z2\.s,sxtw ?#2\]'
+.*: Error: invalid addressing mode at operand 3 -- `ld1b z0\.s,p1/z,\[x1,z2\.s,sxtw ?#3\]'
 .*: Error: constant shift amount required at operand 3 -- `ld1b z0\.s,p1/z,\[x1,z2\.s,sxtw x3\]'
-.*: Error: invalid addressing mode at operand 3 -- `ld1h z0\.s,p1/z,\[x1,z2\.s,sxtw#2\]'
-.*: Error: invalid addressing mode at operand 3 -- `ld1h z0\.s,p1/z,\[x1,z2\.s,sxtw#3\]'
+.*: Error: invalid addressing mode at operand 3 -- `ld1h z0\.s,p1/z,\[x1,z2\.s,sxtw ?#2\]'
+.*: Error: invalid addressing mode at operand 3 -- `ld1h z0\.s,p1/z,\[x1,z2\.s,sxtw ?#3\]'
 .*: Error: constant shift amount required at operand 3 -- `ld1h z0\.s,p1/z,\[x1,z2\.s,sxtw x3\]'
-.*: Error: invalid addressing mode at operand 3 -- `ld1w z0\.s,p1/z,\[x1,z2\.s,sxtw#1\]'
-.*: Error: invalid addressing mode at operand 3 -- `ld1w z0\.s,p1/z,\[x1,z2\.s,sxtw#3\]'
+.*: Error: invalid addressing mode at operand 3 -- `ld1w z0\.s,p1/z,\[x1,z2\.s,sxtw ?#1\]'
+.*: Error: invalid addressing mode at operand 3 -- `ld1w z0\.s,p1/z,\[x1,z2\.s,sxtw ?#3\]'
 .*: Error: constant shift amount required at operand 3 -- `ld1w z0\.s,p1/z,\[x1,z2\.s,sxtw x3\]'
-.*: Error: invalid addressing mode at operand 3 -- `ld1b z0\.s,p1/z,\[x1,z2\.s,uxtw#1\]'
-.*: Error: invalid addressing mode at operand 3 -- `ld1b z0\.s,p1/z,\[x1,z2\.s,uxtw#2\]'
-.*: Error: invalid addressing mode at operand 3 -- `ld1b z0\.s,p1/z,\[x1,z2\.s,uxtw#3\]'
+.*: Error: invalid addressing mode at operand 3 -- `ld1b z0\.s,p1/z,\[x1,z2\.s,uxtw ?#1\]'
+.*: Error: invalid addressing mode at operand 3 -- `ld1b z0\.s,p1/z,\[x1,z2\.s,uxtw ?#2\]'
+.*: Error: invalid addressing mode at operand 3 -- `ld1b z0\.s,p1/z,\[x1,z2\.s,uxtw ?#3\]'
 .*: Error: constant shift amount required at operand 3 -- `ld1b z0\.s,p1/z,\[x1,z2\.s,uxtw x3\]'
-.*: Error: invalid addressing mode at operand 3 -- `ld1h z0\.s,p1/z,\[x1,z2\.s,uxtw#2\]'
-.*: Error: invalid addressing mode at operand 3 -- `ld1h z0\.s,p1/z,\[x1,z2\.s,uxtw#3\]'
+.*: Error: invalid addressing mode at operand 3 -- `ld1h z0\.s,p1/z,\[x1,z2\.s,uxtw ?#2\]'
+.*: Error: invalid addressing mode at operand 3 -- `ld1h z0\.s,p1/z,\[x1,z2\.s,uxtw ?#3\]'
 .*: Error: constant shift amount required at operand 3 -- `ld1h z0\.s,p1/z,\[x1,z2\.s,uxtw x3\]'
-.*: Error: invalid addressing mode at operand 3 -- `ld1w z0\.s,p1/z,\[x1,z2\.s,uxtw#1\]'
-.*: Error: invalid addressing mode at operand 3 -- `ld1w z0\.s,p1/z,\[x1,z2\.s,uxtw#3\]'
+.*: Error: invalid addressing mode at operand 3 -- `ld1w z0\.s,p1/z,\[x1,z2\.s,uxtw ?#1\]'
+.*: Error: invalid addressing mode at operand 3 -- `ld1w z0\.s,p1/z,\[x1,z2\.s,uxtw ?#3\]'
 .*: Error: constant shift amount required at operand 3 -- `ld1w z0\.s,p1/z,\[x1,z2\.s,uxtw x3\]'
-.*: Error: invalid addressing mode at operand 3 -- `ld1b z0\.d,p1/z,\[x1,z2\.d,sxtw#1\]'
-.*: Error: invalid addressing mode at operand 3 -- `ld1b z0\.d,p1/z,\[x1,z2\.d,sxtw#2\]'
-.*: Error: invalid addressing mode at operand 3 -- `ld1b z0\.d,p1/z,\[x1,z2\.d,sxtw#3\]'
+.*: Error: invalid addressing mode at operand 3 -- `ld1b z0\.d,p1/z,\[x1,z2\.d,sxtw ?#1\]'
+.*: Error: invalid addressing mode at operand 3 -- `ld1b z0\.d,p1/z,\[x1,z2\.d,sxtw ?#2\]'
+.*: Error: invalid addressing mode at operand 3 -- `ld1b z0\.d,p1/z,\[x1,z2\.d,sxtw ?#3\]'
 .*: Error: constant shift amount required at operand 3 -- `ld1b z0\.d,p1/z,\[x1,z2\.d,sxtw x3\]'
-.*: Error: invalid addressing mode at operand 3 -- `ld1h z0\.d,p1/z,\[x1,z2\.d,sxtw#2\]'
-.*: Error: invalid addressing mode at operand 3 -- `ld1h z0\.d,p1/z,\[x1,z2\.d,sxtw#3\]'
+.*: Error: invalid addressing mode at operand 3 -- `ld1h z0\.d,p1/z,\[x1,z2\.d,sxtw ?#2\]'
+.*: Error: invalid addressing mode at operand 3 -- `ld1h z0\.d,p1/z,\[x1,z2\.d,sxtw ?#3\]'
 .*: Error: constant shift amount required at operand 3 -- `ld1h z0\.d,p1/z,\[x1,z2\.d,sxtw x3\]'
-.*: Error: invalid addressing mode at operand 3 -- `ld1w z0\.d,p1/z,\[x1,z2\.d,sxtw#1\]'
-.*: Error: invalid addressing mode at operand 3 -- `ld1w z0\.d,p1/z,\[x1,z2\.d,sxtw#3\]'
+.*: Error: invalid addressing mode at operand 3 -- `ld1w z0\.d,p1/z,\[x1,z2\.d,sxtw ?#1\]'
+.*: Error: invalid addressing mode at operand 3 -- `ld1w z0\.d,p1/z,\[x1,z2\.d,sxtw ?#3\]'
 .*: Error: constant shift amount required at operand 3 -- `ld1w z0\.d,p1/z,\[x1,z2\.d,sxtw x3\]'
-.*: Error: invalid addressing mode at operand 3 -- `ld1d z0\.d,p1/z,\[x1,z2\.d,sxtw#1\]'
-.*: Error: invalid addressing mode at operand 3 -- `ld1d z0\.d,p1/z,\[x1,z2\.d,sxtw#2\]'
+.*: Error: invalid addressing mode at operand 3 -- `ld1d z0\.d,p1/z,\[x1,z2\.d,sxtw ?#1\]'
+.*: Error: invalid addressing mode at operand 3 -- `ld1d z0\.d,p1/z,\[x1,z2\.d,sxtw ?#2\]'
 .*: Error: constant shift amount required at operand 3 -- `ld1d z0\.d,p1/z,\[x1,z2\.d,sxtw x3\]'
-.*: Error: invalid addressing mode at operand 3 -- `ld1b z0\.d,p1/z,\[x1,z2\.d,uxtw#1\]'
-.*: Error: invalid addressing mode at operand 3 -- `ld1b z0\.d,p1/z,\[x1,z2\.d,uxtw#2\]'
-.*: Error: invalid addressing mode at operand 3 -- `ld1b z0\.d,p1/z,\[x1,z2\.d,uxtw#3\]'
+.*: Error: invalid addressing mode at operand 3 -- `ld1b z0\.d,p1/z,\[x1,z2\.d,uxtw ?#1\]'
+.*: Error: invalid addressing mode at operand 3 -- `ld1b z0\.d,p1/z,\[x1,z2\.d,uxtw ?#2\]'
+.*: Error: invalid addressing mode at operand 3 -- `ld1b z0\.d,p1/z,\[x1,z2\.d,uxtw ?#3\]'
 .*: Error: constant shift amount required at operand 3 -- `ld1b z0\.d,p1/z,\[x1,z2\.d,uxtw x3\]'
-.*: Error: invalid addressing mode at operand 3 -- `ld1h z0\.d,p1/z,\[x1,z2\.d,uxtw#2\]'
-.*: Error: invalid addressing mode at operand 3 -- `ld1h z0\.d,p1/z,\[x1,z2\.d,uxtw#3\]'
+.*: Error: invalid addressing mode at operand 3 -- `ld1h z0\.d,p1/z,\[x1,z2\.d,uxtw ?#2\]'
+.*: Error: invalid addressing mode at operand 3 -- `ld1h z0\.d,p1/z,\[x1,z2\.d,uxtw ?#3\]'
 .*: Error: constant shift amount required at operand 3 -- `ld1h z0\.d,p1/z,\[x1,z2\.d,uxtw x3\]'
-.*: Error: invalid addressing mode at operand 3 -- `ld1w z0\.d,p1/z,\[x1,z2\.d,uxtw#1\]'
-.*: Error: invalid addressing mode at operand 3 -- `ld1w z0\.d,p1/z,\[x1,z2\.d,uxtw#3\]'
+.*: Error: invalid addressing mode at operand 3 -- `ld1w z0\.d,p1/z,\[x1,z2\.d,uxtw ?#1\]'
+.*: Error: invalid addressing mode at operand 3 -- `ld1w z0\.d,p1/z,\[x1,z2\.d,uxtw ?#3\]'
 .*: Error: constant shift amount required at operand 3 -- `ld1w z0\.d,p1/z,\[x1,z2\.d,uxtw x3\]'
-.*: Error: invalid addressing mode at operand 3 -- `ld1d z0\.d,p1/z,\[x1,z2\.d,uxtw#1\]'
-.*: Error: invalid addressing mode at operand 3 -- `ld1d z0\.d,p1/z,\[x1,z2\.d,uxtw#2\]'
+.*: Error: invalid addressing mode at operand 3 -- `ld1d z0\.d,p1/z,\[x1,z2\.d,uxtw ?#1\]'
+.*: Error: invalid addressing mode at operand 3 -- `ld1d z0\.d,p1/z,\[x1,z2\.d,uxtw ?#2\]'
 .*: Error: constant shift amount required at operand 3 -- `ld1d z0\.d,p1/z,\[x1,z2\.d,uxtw x3\]'
 .*: Error: immediate offset out of range 0 to 31 at operand 3 -- `ld1b z0\.d,p1/z,\[z2\.d,#-1\]'
 .*: Error: constant offset required at operand 3 -- `ld1b z0\.d,p1/z,\[z2\.d,#foo\]'
@@ -478,8 +478,8 @@
 .*: Error: immediate value must be a multiple of 8 at operand 3 -- `ld1d z0\.d,p1/z,\[z2\.d,#4\]'
 .*: Error: invalid addressing mode at operand 3 -- `ld1d z0\.d,p1/z,\[z2\.d,#8,mul vl\]'
 .*: Error: immediate offset out of range 0 to 248 at operand 3 -- `ld1d z0\.d,p1/z,\[z2\.d,#256\]'
-.*: Error: shift amount out of range 0 to 63 at operand 2 -- `adr z0\.s,\[z1\.s,z2\.s,lsl#-1\]'
-.*: Error: invalid addressing mode at operand 2 -- `adr z0\.s,\[z1\.s,z2\.s,lsl#4\]'
+.*: Error: shift amount out of range 0 to 63 at operand 2 -- `adr z0\.s,\[z1\.s,z2\.s,lsl ?#-1\]'
+.*: Error: invalid addressing mode at operand 2 -- `adr z0\.s,\[z1\.s,z2\.s,lsl ?#4\]'
 .*: Error: constant shift amount required at operand 2 -- `adr z0\.s,\[z1\.s,z2\.s,lsl x3\]'
 .*: Error: offset has different size from base at operand 2 -- `adr z0\.s,\[z1\.s,z2\.d\]'
 .*: Error: offset has different size from base at operand 2 -- `adr z0\.s,\[z1\.s,x2\]'
@@ -489,16 +489,16 @@
 .*: Error: invalid addressing mode at operand 2 -- `adr z0\.s,\[x1,z2\.d\]'
 .*: Error: invalid addressing mode at operand 2 -- `adr z0\.s,\[z1\.d,x2\]'
 .*: Error: invalid addressing mode at operand 2 -- `adr z0\.s,\[x1,x2\]'
-.*: Error: shift amount out of range 0 to 63 at operand 2 -- `adr z0\.d,\[z1\.d,z2\.d,lsl#-1\]'
-.*: Error: invalid addressing mode at operand 2 -- `adr z0\.d,\[z1\.d,z2\.d,lsl#4\]'
+.*: Error: shift amount out of range 0 to 63 at operand 2 -- `adr z0\.d,\[z1\.d,z2\.d,lsl ?#-1\]'
+.*: Error: invalid addressing mode at operand 2 -- `adr z0\.d,\[z1\.d,z2\.d,lsl ?#4\]'
 .*: Error: constant shift amount required at operand 2 -- `adr z0\.d,\[z1\.d,z2\.d,lsl x3\]'
 .*: Error: invalid addressing mode at operand 2 -- `adr z0\.s,\[z1\.s,z2\.s,sxtw\]'
-.*: Error: shift amount out of range 0 to 63 at operand 2 -- `adr z0\.d,\[z1\.d,z2\.d,sxtw#-1\]'
-.*: Error: invalid addressing mode at operand 2 -- `adr z0\.d,\[z1\.d,z2\.d,sxtw#4\]'
+.*: Error: shift amount out of range 0 to 63 at operand 2 -- `adr z0\.d,\[z1\.d,z2\.d,sxtw ?#-1\]'
+.*: Error: invalid addressing mode at operand 2 -- `adr z0\.d,\[z1\.d,z2\.d,sxtw ?#4\]'
 .*: Error: constant shift amount required at operand 2 -- `adr z0\.d,\[z1\.d,z2\.d,sxtw x3\]'
 .*: Error: invalid addressing mode at operand 2 -- `adr z0\.s,\[z1\.s,z2\.s,uxtw\]'
-.*: Error: shift amount out of range 0 to 63 at operand 2 -- `adr z0\.d,\[z1\.d,z2\.d,uxtw#-1\]'
-.*: Error: invalid addressing mode at operand 2 -- `adr z0\.d,\[z1\.d,z2\.d,uxtw#4\]'
+.*: Error: shift amount out of range 0 to 63 at operand 2 -- `adr z0\.d,\[z1\.d,z2\.d,uxtw ?#-1\]'
+.*: Error: invalid addressing mode at operand 2 -- `adr z0\.d,\[z1\.d,z2\.d,uxtw ?#4\]'
 .*: Error: constant shift amount required at operand 2 -- `adr z0\.d,\[z1\.d,z2\.d,uxtw x3\]'
 .*: Error: index register xzr is not allowed at operand 3 -- `ld1b z0\.b,p0/z,\[x1,xzr\]'
 .*: Error: index register xzr is not allowed at operand 3 -- `ld1b z0\.h,p0/z,\[x1,xzr\]'
@@ -507,70 +507,70 @@
 .*: Error: index register xzr is not allowed at operand 3 -- `ld1sb z0\.h,p0/z,\[x1,xzr\]'
 .*: Error: index register xzr is not allowed at operand 3 -- `ld1sb z0\.s,p0/z,\[x1,xzr\]'
 .*: Error: index register xzr is not allowed at operand 3 -- `ld1sb z0\.d,p0/z,\[x1,xzr\]'
-.*: Error: index register xzr is not allowed at operand 3 -- `ld1h z0\.h,p0/z,\[x1,xzr,lsl#1\]'
-.*: Error: index register xzr is not allowed at operand 3 -- `ld1h z0\.s,p0/z,\[x1,xzr,lsl#1\]'
-.*: Error: index register xzr is not allowed at operand 3 -- `ld1h z0\.d,p0/z,\[x1,xzr,lsl#1\]'
-.*: Error: index register xzr is not allowed at operand 3 -- `ld1sh z0\.s,p0/z,\[x1,xzr,lsl#1\]'
-.*: Error: index register xzr is not allowed at operand 3 -- `ld1sh z0\.d,p0/z,\[x1,xzr,lsl#1\]'
-.*: Error: index register xzr is not allowed at operand 3 -- `ld1w z0\.s,p0/z,\[x1,xzr,lsl#2\]'
-.*: Error: index register xzr is not allowed at operand 3 -- `ld1w z0\.d,p0/z,\[x1,xzr,lsl#2\]'
-.*: Error: index register xzr is not allowed at operand 3 -- `ld1sw z0\.d,p0/z,\[x1,xzr,lsl#2\]'
-.*: Error: index register xzr is not allowed at operand 3 -- `ld1d z0\.d,p0/z,\[x1,xzr,lsl#3\]'
+.*: Error: index register xzr is not allowed at operand 3 -- `ld1h z0\.h,p0/z,\[x1,xzr,lsl ?#1\]'
+.*: Error: index register xzr is not allowed at operand 3 -- `ld1h z0\.s,p0/z,\[x1,xzr,lsl ?#1\]'
+.*: Error: index register xzr is not allowed at operand 3 -- `ld1h z0\.d,p0/z,\[x1,xzr,lsl ?#1\]'
+.*: Error: index register xzr is not allowed at operand 3 -- `ld1sh z0\.s,p0/z,\[x1,xzr,lsl ?#1\]'
+.*: Error: index register xzr is not allowed at operand 3 -- `ld1sh z0\.d,p0/z,\[x1,xzr,lsl ?#1\]'
+.*: Error: index register xzr is not allowed at operand 3 -- `ld1w z0\.s,p0/z,\[x1,xzr,lsl ?#2\]'
+.*: Error: index register xzr is not allowed at operand 3 -- `ld1w z0\.d,p0/z,\[x1,xzr,lsl ?#2\]'
+.*: Error: index register xzr is not allowed at operand 3 -- `ld1sw z0\.d,p0/z,\[x1,xzr,lsl ?#2\]'
+.*: Error: index register xzr is not allowed at operand 3 -- `ld1d z0\.d,p0/z,\[x1,xzr,lsl ?#3\]'
 .*: Error: index register xzr is not allowed at operand 3 -- `ld2b {z0\.b-z1\.b},p0/z,\[x1,xzr\]'
-.*: Error: index register xzr is not allowed at operand 3 -- `ld2h {z0\.h-z1\.h},p0/z,\[x1,xzr,lsl#1\]'
-.*: Error: index register xzr is not allowed at operand 3 -- `ld2w {z0\.s-z1\.s},p0/z,\[x1,xzr,lsl#2\]'
-.*: Error: index register xzr is not allowed at operand 3 -- `ld2d {z0\.d-z1\.d},p0/z,\[x1,xzr,lsl#3\]'
+.*: Error: index register xzr is not allowed at operand 3 -- `ld2h {z0\.h-z1\.h},p0/z,\[x1,xzr,lsl ?#1\]'
+.*: Error: index register xzr is not allowed at operand 3 -- `ld2w {z0\.s-z1\.s},p0/z,\[x1,xzr,lsl ?#2\]'
+.*: Error: index register xzr is not allowed at operand 3 -- `ld2d {z0\.d-z1\.d},p0/z,\[x1,xzr,lsl ?#3\]'
 .*: Error: index register xzr is not allowed at operand 3 -- `ld3b {z0\.b-z2\.b},p0/z,\[x1,xzr\]'
-.*: Error: index register xzr is not allowed at operand 3 -- `ld3h {z0\.h-z2\.h},p0/z,\[x1,xzr,lsl#1\]'
-.*: Error: index register xzr is not allowed at operand 3 -- `ld3w {z0\.s-z2\.s},p0/z,\[x1,xzr,lsl#2\]'
-.*: Error: index register xzr is not allowed at operand 3 -- `ld3d {z0\.d-z2\.d},p0/z,\[x1,xzr,lsl#3\]'
+.*: Error: index register xzr is not allowed at operand 3 -- `ld3h {z0\.h-z2\.h},p0/z,\[x1,xzr,lsl ?#1\]'
+.*: Error: index register xzr is not allowed at operand 3 -- `ld3w {z0\.s-z2\.s},p0/z,\[x1,xzr,lsl ?#2\]'
+.*: Error: index register xzr is not allowed at operand 3 -- `ld3d {z0\.d-z2\.d},p0/z,\[x1,xzr,lsl ?#3\]'
 .*: Error: index register xzr is not allowed at operand 3 -- `ld4b {z0\.b-z3\.b},p0/z,\[x1,xzr\]'
-.*: Error: index register xzr is not allowed at operand 3 -- `ld4h {z0\.h-z3\.h},p0/z,\[x1,xzr,lsl#1\]'
-.*: Error: index register xzr is not allowed at operand 3 -- `ld4w {z0\.s-z3\.s},p0/z,\[x1,xzr,lsl#2\]'
-.*: Error: index register xzr is not allowed at operand 3 -- `ld4d {z0\.d-z3\.d},p0/z,\[x1,xzr,lsl#3\]'
+.*: Error: index register xzr is not allowed at operand 3 -- `ld4h {z0\.h-z3\.h},p0/z,\[x1,xzr,lsl ?#1\]'
+.*: Error: index register xzr is not allowed at operand 3 -- `ld4w {z0\.s-z3\.s},p0/z,\[x1,xzr,lsl ?#2\]'
+.*: Error: index register xzr is not allowed at operand 3 -- `ld4d {z0\.d-z3\.d},p0/z,\[x1,xzr,lsl ?#3\]'
 .*: Error: index register xzr is not allowed at operand 3 -- `ldnt1b z0\.b,p0/z,\[x1,xzr\]'
-.*: Error: index register xzr is not allowed at operand 3 -- `ldnt1h z0\.h,p0/z,\[x1,xzr,lsl#1\]'
-.*: Error: index register xzr is not allowed at operand 3 -- `ldnt1w z0\.s,p0/z,\[x1,xzr,lsl#2\]'
-.*: Error: index register xzr is not allowed at operand 3 -- `ldnt1d z0\.d,p0/z,\[x1,xzr,lsl#3\]'
+.*: Error: index register xzr is not allowed at operand 3 -- `ldnt1h z0\.h,p0/z,\[x1,xzr,lsl ?#1\]'
+.*: Error: index register xzr is not allowed at operand 3 -- `ldnt1w z0\.s,p0/z,\[x1,xzr,lsl ?#2\]'
+.*: Error: index register xzr is not allowed at operand 3 -- `ldnt1d z0\.d,p0/z,\[x1,xzr,lsl ?#3\]'
 .*: Error: index register xzr is not allowed at operand 3 -- `st1b z0\.b,p0,\[x1,xzr\]'
 .*: Error: index register xzr is not allowed at operand 3 -- `st1b z0\.h,p0,\[x1,xzr\]'
 .*: Error: index register xzr is not allowed at operand 3 -- `st1b z0\.s,p0,\[x1,xzr\]'
 .*: Error: index register xzr is not allowed at operand 3 -- `st1b z0\.d,p0,\[x1,xzr\]'
-.*: Error: index register xzr is not allowed at operand 3 -- `st1h z0\.h,p0,\[x1,xzr,lsl#1\]'
-.*: Error: index register xzr is not allowed at operand 3 -- `st1h z0\.s,p0,\[x1,xzr,lsl#1\]'
-.*: Error: index register xzr is not allowed at operand 3 -- `st1h z0\.d,p0,\[x1,xzr,lsl#1\]'
-.*: Error: index register xzr is not allowed at operand 3 -- `st1w z0\.s,p0,\[x1,xzr,lsl#2\]'
-.*: Error: index register xzr is not allowed at operand 3 -- `st1w z0\.d,p0,\[x1,xzr,lsl#2\]'
-.*: Error: index register xzr is not allowed at operand 3 -- `st1d z0\.d,p0,\[x1,xzr,lsl#3\]'
+.*: Error: index register xzr is not allowed at operand 3 -- `st1h z0\.h,p0,\[x1,xzr,lsl ?#1\]'
+.*: Error: index register xzr is not allowed at operand 3 -- `st1h z0\.s,p0,\[x1,xzr,lsl ?#1\]'
+.*: Error: index register xzr is not allowed at operand 3 -- `st1h z0\.d,p0,\[x1,xzr,lsl ?#1\]'
+.*: Error: index register xzr is not allowed at operand 3 -- `st1w z0\.s,p0,\[x1,xzr,lsl ?#2\]'
+.*: Error: index register xzr is not allowed at operand 3 -- `st1w z0\.d,p0,\[x1,xzr,lsl ?#2\]'
+.*: Error: index register xzr is not allowed at operand 3 -- `st1d z0\.d,p0,\[x1,xzr,lsl ?#3\]'
 .*: Error: index register xzr is not allowed at operand 3 -- `st2b {z0\.b-z1\.b},p0,\[x1,xzr\]'
-.*: Error: index register xzr is not allowed at operand 3 -- `st2h {z0\.h-z1\.h},p0,\[x1,xzr,lsl#1\]'
-.*: Error: index register xzr is not allowed at operand 3 -- `st2w {z0\.s-z1\.s},p0,\[x1,xzr,lsl#2\]'
-.*: Error: index register xzr is not allowed at operand 3 -- `st2d {z0\.d-z1\.d},p0,\[x1,xzr,lsl#3\]'
+.*: Error: index register xzr is not allowed at operand 3 -- `st2h {z0\.h-z1\.h},p0,\[x1,xzr,lsl ?#1\]'
+.*: Error: index register xzr is not allowed at operand 3 -- `st2w {z0\.s-z1\.s},p0,\[x1,xzr,lsl ?#2\]'
+.*: Error: index register xzr is not allowed at operand 3 -- `st2d {z0\.d-z1\.d},p0,\[x1,xzr,lsl ?#3\]'
 .*: Error: index register xzr is not allowed at operand 3 -- `st3b {z0\.b-z2\.b},p0,\[x1,xzr\]'
-.*: Error: index register xzr is not allowed at operand 3 -- `st3h {z0\.h-z2\.h},p0,\[x1,xzr,lsl#1\]'
-.*: Error: index register xzr is not allowed at operand 3 -- `st3w {z0\.s-z2\.s},p0,\[x1,xzr,lsl#2\]'
-.*: Error: index register xzr is not allowed at operand 3 -- `st3d {z0\.d-z2\.d},p0,\[x1,xzr,lsl#3\]'
+.*: Error: index register xzr is not allowed at operand 3 -- `st3h {z0\.h-z2\.h},p0,\[x1,xzr,lsl ?#1\]'
+.*: Error: index register xzr is not allowed at operand 3 -- `st3w {z0\.s-z2\.s},p0,\[x1,xzr,lsl ?#2\]'
+.*: Error: index register xzr is not allowed at operand 3 -- `st3d {z0\.d-z2\.d},p0,\[x1,xzr,lsl ?#3\]'
 .*: Error: index register xzr is not allowed at operand 3 -- `st4b {z0\.b-z3\.b},p0,\[x1,xzr\]'
-.*: Error: index register xzr is not allowed at operand 3 -- `st4h {z0\.h-z3\.h},p0,\[x1,xzr,lsl#1\]'
-.*: Error: index register xzr is not allowed at operand 3 -- `st4w {z0\.s-z3\.s},p0,\[x1,xzr,lsl#2\]'
-.*: Error: index register xzr is not allowed at operand 3 -- `st4d {z0\.d-z3\.d},p0,\[x1,xzr,lsl#3\]'
+.*: Error: index register xzr is not allowed at operand 3 -- `st4h {z0\.h-z3\.h},p0,\[x1,xzr,lsl ?#1\]'
+.*: Error: index register xzr is not allowed at operand 3 -- `st4w {z0\.s-z3\.s},p0,\[x1,xzr,lsl ?#2\]'
+.*: Error: index register xzr is not allowed at operand 3 -- `st4d {z0\.d-z3\.d},p0,\[x1,xzr,lsl ?#3\]'
 .*: Error: index register xzr is not allowed at operand 3 -- `stnt1b z0\.b,p0,\[x1,xzr\]'
-.*: Error: index register xzr is not allowed at operand 3 -- `stnt1h z0\.h,p0,\[x1,xzr,lsl#1\]'
-.*: Error: index register xzr is not allowed at operand 3 -- `stnt1w z0\.s,p0,\[x1,xzr,lsl#2\]'
-.*: Error: index register xzr is not allowed at operand 3 -- `stnt1d z0\.d,p0,\[x1,xzr,lsl#3\]'
+.*: Error: index register xzr is not allowed at operand 3 -- `stnt1h z0\.h,p0,\[x1,xzr,lsl ?#1\]'
+.*: Error: index register xzr is not allowed at operand 3 -- `stnt1w z0\.s,p0,\[x1,xzr,lsl ?#2\]'
+.*: Error: index register xzr is not allowed at operand 3 -- `stnt1d z0\.d,p0,\[x1,xzr,lsl ?#3\]'
 .*: Error: index register xzr is not allowed at operand 3 -- `prfb pldl1keep,p0,\[x1,xzr\]'
-.*: Error: index register xzr is not allowed at operand 3 -- `prfh pldl1keep,p0,\[x1,xzr,lsl#1\]'
-.*: Error: index register xzr is not allowed at operand 3 -- `prfw pldl1keep,p0,\[x1,xzr,lsl#2\]'
-.*: Error: index register xzr is not allowed at operand 3 -- `prfd pldl1keep,p0,\[x1,xzr,lsl#3\]'
+.*: Error: index register xzr is not allowed at operand 3 -- `prfh pldl1keep,p0,\[x1,xzr,lsl ?#1\]'
+.*: Error: index register xzr is not allowed at operand 3 -- `prfw pldl1keep,p0,\[x1,xzr,lsl ?#2\]'
+.*: Error: index register xzr is not allowed at operand 3 -- `prfd pldl1keep,p0,\[x1,xzr,lsl ?#3\]'
 .*: Error: immediate too big for element size at operand 3 -- `add z0\.b,z0\.b,#-257'
 .*: Error: immediate too big for element size at operand 3 -- `add z0\.b,z0\.b,#256'
-.*: Error: no shift amount allowed for 8-bit constants at operand 3 -- `add z0\.b,z0\.b,#1,lsl#1'
-.*: Error: no shift amount allowed for 8-bit constants at operand 3 -- `add z0\.b,z0\.b,#0,lsl#8'
-.*: Error: no shift amount allowed for 8-bit constants at operand 3 -- `add z0\.b,z0\.b,#1,lsl#8'
+.*: Error: no shift amount allowed for 8-bit constants at operand 3 -- `add z0\.b,z0\.b,#1,lsl ?#1'
+.*: Error: no shift amount allowed for 8-bit constants at operand 3 -- `add z0\.b,z0\.b,#0,lsl ?#8'
+.*: Error: no shift amount allowed for 8-bit constants at operand 3 -- `add z0\.b,z0\.b,#1,lsl ?#8'
 .*: Error: immediate too big for element size at operand 3 -- `add z0\.h,z0\.h,#-65537'
-.*: Error: invalid arithmetic immediate at operand 3 -- `add z0\.h,z0\.h,#-65536\+257'
+.*: Error: invalid arithmetic immediate at operand 3 -- `add z0\.h,z0\.h,#-65536 ?\+ ?257'
 .*: Error: invalid arithmetic immediate at operand 3 -- `add z0\.h,z0\.h,#-32767'
-.*: Error: invalid arithmetic immediate at operand 3 -- `add z0\.h,z0\.h,#-32768\+255'
+.*: Error: invalid arithmetic immediate at operand 3 -- `add z0\.h,z0\.h,#-32768 ?\+ ?255'
 .*: Error: invalid arithmetic immediate at operand 3 -- `add z0\.h,z0\.h,#-257'
 .*: Error: invalid arithmetic immediate at operand 3 -- `add z0\.h,z0\.h,#-255'
 .*: Error: invalid arithmetic immediate at operand 3 -- `add z0\.h,z0\.h,#-129'
@@ -580,14 +580,14 @@
 .*: Error: invalid arithmetic immediate at operand 3 -- `add z0\.h,z0\.h,#257'
 .*: Error: invalid arithmetic immediate at operand 3 -- `add z0\.h,z0\.h,#32768-255'
 .*: Error: invalid arithmetic immediate at operand 3 -- `add z0\.h,z0\.h,#32767'
-.*: Error: invalid arithmetic immediate at operand 3 -- `add z0\.h,z0\.h,#65536-255'
-.*: Error: invalid arithmetic immediate at operand 3 -- `add z0\.h,z0\.h,#65536-129'
-.*: Error: invalid arithmetic immediate at operand 3 -- `add z0\.h,z0\.h,#65536-128'
+.*: Error: invalid arithmetic immediate at operand 3 -- `add z0\.h,z0\.h,#65536 ?- ?255'
+.*: Error: invalid arithmetic immediate at operand 3 -- `add z0\.h,z0\.h,#65536 ?- ?129'
+.*: Error: invalid arithmetic immediate at operand 3 -- `add z0\.h,z0\.h,#65536 ?- ?128'
 .*: Error: invalid arithmetic immediate at operand 3 -- `add z0\.h,z0\.h,#65535'
 .*: Error: immediate too big for element size at operand 3 -- `add z0\.h,z0\.h,#65536'
-.*: Error: shift amount must be 0 or 8 at operand 3 -- `add z0\.h,z0\.h,#1,lsl#1'
-.*: Error: immediate too big for element size at operand 3 -- `add z0\.h,z0\.h,#-257,lsl#8'
-.*: Error: immediate too big for element size at operand 3 -- `add z0\.h,z0\.h,#256,lsl#8'
+.*: Error: shift amount must be 0 or 8 at operand 3 -- `add z0\.h,z0\.h,#1,lsl ?#1'
+.*: Error: immediate too big for element size at operand 3 -- `add z0\.h,z0\.h,#-257,lsl ?#8'
+.*: Error: immediate too big for element size at operand 3 -- `add z0\.h,z0\.h,#256,lsl ?#8'
 .*: Error: invalid arithmetic immediate at operand 3 -- `add z0\.s,z0\.s,#-256'
 .*: Error: invalid arithmetic immediate at operand 3 -- `add z0\.s,z0\.s,#-255'
 .*: Error: invalid arithmetic immediate at operand 3 -- `add z0\.s,z0\.s,#-129'
@@ -598,9 +598,9 @@
 .*: Error: invalid arithmetic immediate at operand 3 -- `add z0\.s,z0\.s,#32767'
 .*: Error: invalid arithmetic immediate at operand 3 -- `add z0\.s,z0\.s,#65536'
 .*: Error: immediate too big for element size at operand 3 -- `add z0\.s,z0\.s,#0x100000000'
-.*: Error: shift amount must be 0 or 8 at operand 3 -- `add z0\.s,z0\.s,#1,lsl#1'
-.*: Error: invalid arithmetic immediate at operand 3 -- `add z0\.s,z0\.s,#-1,lsl#8'
-.*: Error: invalid arithmetic immediate at operand 3 -- `add z0\.s,z0\.s,#256,lsl#8'
+.*: Error: shift amount must be 0 or 8 at operand 3 -- `add z0\.s,z0\.s,#1,lsl ?#1'
+.*: Error: invalid arithmetic immediate at operand 3 -- `add z0\.s,z0\.s,#-1,lsl ?#8'
+.*: Error: invalid arithmetic immediate at operand 3 -- `add z0\.s,z0\.s,#256,lsl ?#8'
 .*: Error: invalid arithmetic immediate at operand 3 -- `add z0\.d,z0\.d,#-256'
 .*: Error: invalid arithmetic immediate at operand 3 -- `add z0\.d,z0\.d,#-255'
 .*: Error: invalid arithmetic immediate at operand 3 -- `add z0\.d,z0\.d,#-129'
@@ -611,17 +611,17 @@
 .*: Error: invalid arithmetic immediate at operand 3 -- `add z0\.d,z0\.d,#32767'
 .*: Error: invalid arithmetic immediate at operand 3 -- `add z0\.d,z0\.d,#65536'
 .*: Error: invalid arithmetic immediate at operand 3 -- `add z0\.d,z0\.d,#0x100000000'
-.*: Error: shift amount must be 0 or 8 at operand 3 -- `add z0\.d,z0\.d,#1,lsl#1'
-.*: Error: invalid arithmetic immediate at operand 3 -- `add z0\.d,z0\.d,#-1,lsl#8'
-.*: Error: invalid arithmetic immediate at operand 3 -- `add z0\.d,z0\.d,#256,lsl#8'
+.*: Error: shift amount must be 0 or 8 at operand 3 -- `add z0\.d,z0\.d,#1,lsl ?#1'
+.*: Error: invalid arithmetic immediate at operand 3 -- `add z0\.d,z0\.d,#-1,lsl ?#8'
+.*: Error: invalid arithmetic immediate at operand 3 -- `add z0\.d,z0\.d,#256,lsl ?#8'
 .*: Error: immediate too big for element size at operand 2 -- `dup z0\.b,#-257'
 .*: Error: immediate too big for element size at operand 2 -- `dup z0\.b,#256'
-.*: Error: no shift amount allowed for 8-bit constants at operand 2 -- `dup z0\.b,#1,lsl#1'
-.*: Error: no shift amount allowed for 8-bit constants at operand 2 -- `dup z0\.b,#0,lsl#8'
-.*: Error: no shift amount allowed for 8-bit constants at operand 2 -- `dup z0\.b,#1,lsl#8'
+.*: Error: no shift amount allowed for 8-bit constants at operand 2 -- `dup z0\.b,#1,lsl ?#1'
+.*: Error: no shift amount allowed for 8-bit constants at operand 2 -- `dup z0\.b,#0,lsl ?#8'
+.*: Error: no shift amount allowed for 8-bit constants at operand 2 -- `dup z0\.b,#1,lsl ?#8'
 .*: Error: immediate too big for element size at operand 2 -- `dup z0\.h,#-65537'
 .*: Error: invalid arithmetic immediate at operand 2 -- `dup z0\.h,#-32767'
-.*: Error: invalid arithmetic immediate at operand 2 -- `dup z0\.h,#-32768\+255'
+.*: Error: invalid arithmetic immediate at operand 2 -- `dup z0\.h,#-32768 ?\+ ?255'
 .*: Error: invalid arithmetic immediate at operand 2 -- `dup z0\.h,#-257'
 .*: Error: invalid arithmetic immediate at operand 2 -- `dup z0\.h,#-255'
 .*: Error: invalid arithmetic immediate at operand 2 -- `dup z0\.h,#-129'
@@ -630,16 +630,16 @@
 .*: Error: invalid arithmetic immediate at operand 2 -- `dup z0\.h,#257'
 .*: Error: invalid arithmetic immediate at operand 2 -- `dup z0\.h,#32768-255'
 .*: Error: invalid arithmetic immediate at operand 2 -- `dup z0\.h,#32767'
-.*: Error: invalid arithmetic immediate at operand 2 -- `dup z0\.h,#65536-255'
-.*: Error: invalid arithmetic immediate at operand 2 -- `dup z0\.h,#65536-129'
+.*: Error: invalid arithmetic immediate at operand 2 -- `dup z0\.h,#65536 ?- ?255'
+.*: Error: invalid arithmetic immediate at operand 2 -- `dup z0\.h,#65536 ?- ?129'
 .*: Error: immediate too big for element size at operand 2 -- `dup z0\.h,#65536'
-.*: Error: shift amount must be 0 or 8 at operand 2 -- `dup z0\.h,#1,lsl#1'
-.*: Error: immediate too big for element size at operand 2 -- `dup z0\.h,#-257,lsl#8'
-.*: Error: immediate too big for element size at operand 2 -- `dup z0\.h,#256,lsl#8'
+.*: Error: shift amount must be 0 or 8 at operand 2 -- `dup z0\.h,#1,lsl ?#1'
+.*: Error: immediate too big for element size at operand 2 -- `dup z0\.h,#-257,lsl ?#8'
+.*: Error: immediate too big for element size at operand 2 -- `dup z0\.h,#256,lsl ?#8'
 .*: Error: invalid arithmetic immediate at operand 2 -- `dup z0\.s,#-65536'
 .*: Error: invalid arithmetic immediate at operand 2 -- `dup z0\.s,#-32769'
 .*: Error: invalid arithmetic immediate at operand 2 -- `dup z0\.s,#-32767'
-.*: Error: invalid arithmetic immediate at operand 2 -- `dup z0\.s,#-32768\+255'
+.*: Error: invalid arithmetic immediate at operand 2 -- `dup z0\.s,#-32768 ?\+ ?255'
 .*: Error: invalid arithmetic immediate at operand 2 -- `dup z0\.s,#-257'
 .*: Error: invalid arithmetic immediate at operand 2 -- `dup z0\.s,#-255'
 .*: Error: invalid arithmetic immediate at operand 2 -- `dup z0\.s,#-129'
@@ -652,13 +652,13 @@
 .*: Error: invalid arithmetic immediate at operand 2 -- `dup z0\.s,#65536'
 .*: Error: invalid arithmetic immediate at operand 2 -- `dup z0\.s,#0xffffff7f'
 .*: Error: immediate too big for element size at operand 2 -- `dup z0\.s,#0x100000000'
-.*: Error: shift amount must be 0 or 8 at operand 2 -- `dup z0\.s,#1,lsl#1'
-.*: Error: invalid arithmetic immediate at operand 2 -- `dup z0\.s,#-129,lsl#8'
-.*: Error: invalid arithmetic immediate at operand 2 -- `dup z0\.s,#128,lsl#8'
+.*: Error: shift amount must be 0 or 8 at operand 2 -- `dup z0\.s,#1,lsl ?#1'
+.*: Error: invalid arithmetic immediate at operand 2 -- `dup z0\.s,#-129,lsl ?#8'
+.*: Error: invalid arithmetic immediate at operand 2 -- `dup z0\.s,#128,lsl ?#8'
 .*: Error: invalid arithmetic immediate at operand 2 -- `dup z0\.d,#-65536'
 .*: Error: invalid arithmetic immediate at operand 2 -- `dup z0\.d,#-32769'
 .*: Error: invalid arithmetic immediate at operand 2 -- `dup z0\.d,#-32767'
-.*: Error: invalid arithmetic immediate at operand 2 -- `dup z0\.d,#-32768\+255'
+.*: Error: invalid arithmetic immediate at operand 2 -- `dup z0\.d,#-32768 ?\+ ?255'
 .*: Error: invalid arithmetic immediate at operand 2 -- `dup z0\.d,#-257'
 .*: Error: invalid arithmetic immediate at operand 2 -- `dup z0\.d,#-255'
 .*: Error: invalid arithmetic immediate at operand 2 -- `dup z0\.d,#-129'
@@ -671,9 +671,9 @@
 .*: Error: invalid arithmetic immediate at operand 2 -- `dup z0\.d,#65536'
 .*: Error: invalid arithmetic immediate at operand 2 -- `dup z0\.d,#0xffffff7f'
 .*: Error: invalid arithmetic immediate at operand 2 -- `dup z0\.d,#0x100000000'
-.*: Error: shift amount must be 0 or 8 at operand 2 -- `dup z0\.d,#1,lsl#1'
-.*: Error: invalid arithmetic immediate at operand 2 -- `dup z0\.d,#-129,lsl#8'
-.*: Error: invalid arithmetic immediate at operand 2 -- `dup z0\.d,#128,lsl#8'
+.*: Error: shift amount must be 0 or 8 at operand 2 -- `dup z0\.d,#1,lsl ?#1'
+.*: Error: invalid arithmetic immediate at operand 2 -- `dup z0\.d,#-129,lsl ?#8'
+.*: Error: invalid arithmetic immediate at operand 2 -- `dup z0\.d,#128,lsl ?#8'
 .*: Error: immediate out of range at operand 3 -- `and z0\.b,z0\.b,#0x0101'
 .*: Error: immediate out of range at operand 3 -- `and z0\.b,z0\.b,#0x01010101'
 .*: Error: immediate out of range at operand 3 -- `and z0\.b,z0\.b,#0x0101010101010101'
@@ -846,9 +846,9 @@
 .*: Error: operand 2 must be an enumeration value such as POW2 -- `cntb x0,#32'
 .*: Error: immediate operand required at operand 2 -- `cntb x0,x0'
 .*: Error: immediate operand required at operand 2 -- `cntb x0,z0\.s'
-.*: Error: operand 2 must be an enumeration value such as POW2 -- `cntb x0,mul#1'
-.*: Error: multiplier out of range 1 to 16 at operand 2 -- `cntb x0,pow2,mul#0'
-.*: Error: multiplier out of range 1 to 16 at operand 2 -- `cntb x0,pow2,mul#17'
+.*: Error: operand 2 must be an enumeration value such as POW2 -- `cntb x0,mul ?#1'
+.*: Error: multiplier out of range 1 to 16 at operand 2 -- `cntb x0,pow2,mul ?#0'
+.*: Error: multiplier out of range 1 to 16 at operand 2 -- `cntb x0,pow2,mul ?#17'
 .*: Error: shift expression expected at operand 2 -- `cntb x0,pow2,#1'
 .*: Error: operand 1 must be an enumeration value such as PLDL1KEEP -- `prfb pldl0keep,p1,\[x0\]'
 .*: Error: operand 1 must be an enumeration value such as PLDL1KEEP -- `prfb pldl4keep,p1,\[x0\]'
@@ -1133,21 +1133,21 @@
 .*: Info:    did you mean this\?
 .*: Info:    	ld1rqb {z0\.b}, p0/z, \[x0\]
 .*: Error: index register xzr is not allowed at operand 3 -- `ld1rqb {z0\.b},p0/z,\[x0,xzr\]'
-.*: Error: invalid addressing mode at operand 3 -- `ld1rqb {z0\.b},p0/z,\[x0,x1,lsl#1\]'
-.*: Error: invalid addressing mode at operand 3 -- `ld1rqb {z0\.b},p0/z,\[x0,x1,lsl#2\]'
-.*: Error: invalid addressing mode at operand 3 -- `ld1rqb {z0\.b},p0/z,\[x0,x1,lsl#3\]'
-.*: Error: index register xzr is not allowed at operand 3 -- `ld1rqh {z0\.h},p0/z,\[x0,xzr,lsl#1\]'
+.*: Error: invalid addressing mode at operand 3 -- `ld1rqb {z0\.b},p0/z,\[x0,x1,lsl ?#1\]'
+.*: Error: invalid addressing mode at operand 3 -- `ld1rqb {z0\.b},p0/z,\[x0,x1,lsl ?#2\]'
+.*: Error: invalid addressing mode at operand 3 -- `ld1rqb {z0\.b},p0/z,\[x0,x1,lsl ?#3\]'
+.*: Error: index register xzr is not allowed at operand 3 -- `ld1rqh {z0\.h},p0/z,\[x0,xzr,lsl ?#1\]'
 .*: Error: invalid addressing mode at operand 3 -- `ld1rqh {z0\.h},p0/z,\[x0,x1\]'
-.*: Error: invalid addressing mode at operand 3 -- `ld1rqh {z0\.h},p0/z,\[x0,x1,lsl#2\]'
-.*: Error: invalid addressing mode at operand 3 -- `ld1rqh {z0\.h},p0/z,\[x0,x1,lsl#3\]'
-.*: Error: index register xzr is not allowed at operand 3 -- `ld1rqw {z0\.s},p0/z,\[x0,xzr,lsl#2\]'
+.*: Error: invalid addressing mode at operand 3 -- `ld1rqh {z0\.h},p0/z,\[x0,x1,lsl ?#2\]'
+.*: Error: invalid addressing mode at operand 3 -- `ld1rqh {z0\.h},p0/z,\[x0,x1,lsl ?#3\]'
+.*: Error: index register xzr is not allowed at operand 3 -- `ld1rqw {z0\.s},p0/z,\[x0,xzr,lsl ?#2\]'
 .*: Error: invalid addressing mode at operand 3 -- `ld1rqw {z0\.s},p0/z,\[x0,x1\]'
-.*: Error: invalid addressing mode at operand 3 -- `ld1rqw {z0\.s},p0/z,\[x0,x1,lsl#1\]'
-.*: Error: invalid addressing mode at operand 3 -- `ld1rqw {z0\.s},p0/z,\[x0,x1,lsl#3\]'
-.*: Error: index register xzr is not allowed at operand 3 -- `ld1rqd {z0\.d},p0/z,\[x0,xzr,lsl#3\]'
+.*: Error: invalid addressing mode at operand 3 -- `ld1rqw {z0\.s},p0/z,\[x0,x1,lsl ?#1\]'
+.*: Error: invalid addressing mode at operand 3 -- `ld1rqw {z0\.s},p0/z,\[x0,x1,lsl ?#3\]'
+.*: Error: index register xzr is not allowed at operand 3 -- `ld1rqd {z0\.d},p0/z,\[x0,xzr,lsl ?#3\]'
 .*: Error: invalid addressing mode at operand 3 -- `ld1rqd {z0\.d},p0/z,\[x0,x1\]'
-.*: Error: invalid addressing mode at operand 3 -- `ld1rqd {z0\.d},p0/z,\[x0,x1,lsl#1\]'
-.*: Error: invalid addressing mode at operand 3 -- `ld1rqd {z0\.d},p0/z,\[x0,x1,lsl#2\]'
+.*: Error: invalid addressing mode at operand 3 -- `ld1rqd {z0\.d},p0/z,\[x0,x1,lsl ?#1\]'
+.*: Error: invalid addressing mode at operand 3 -- `ld1rqd {z0\.d},p0/z,\[x0,x1,lsl ?#2\]'
 .*: Error: operand mismatch -- `sdot z0\.b,z1\.b,z2\.b'
 .*: Info:    did you mean this\?
 .*: Info:    	sdot z0\.s, z1\.b, z2\.b
diff --git a/gas/testsuite/gas/aarch64/sve-reg-diagnostic.l b/gas/testsuite/gas/aarch64/sve-reg-diagnostic.l
index 435d52a..72dfa05 100644
--- a/gas/testsuite/gas/aarch64/sve-reg-diagnostic.l
+++ b/gas/testsuite/gas/aarch64/sve-reg-diagnostic.l
@@ -9,7 +9,7 @@
 .*: Error: invalid base register at operand 2 -- `ldr x1,\[p0\]'
 .*: Error: invalid base register at operand 2 -- `ldr x1,\[p0\.b\]'
 .*: Error: invalid shift amount at operand 2 -- `ldr x0,\[x1,x2,lsl p0\.b\]'
-.*: Error: invalid shift amount at operand 2 -- `ldr x0,\[x1,x2,lsl#p0\.b\]'
+.*: Error: invalid shift amount at operand 2 -- `ldr x0,\[x1,x2,lsl ?#p0\.b\]'
 .*: Error: immediate out of range at operand 3 -- `and x0,x0,#x0'
 .*: Error: immediate out of range at operand 3 -- `and x0,x0,s0'
 .*: Error: immediate out of range at operand 3 -- `and x0,x0,#s0'
diff --git a/gas/testsuite/gas/aarch64/sve2-fp8-fail.l b/gas/testsuite/gas/aarch64/sve2-fp8-fail.l
index ab48ff4..19ecc00 100644
--- a/gas/testsuite/gas/aarch64/sve2-fp8-fail.l
+++ b/gas/testsuite/gas/aarch64/sve2-fp8-fail.l
@@ -127,35 +127,35 @@
 [^:]+:37:  Info: macro invoked from here
 [^:]+:17: Error: expected an SVE vector register at operand 2 -- `f2cvtlt z0.h,p0/z,z1.d'
 [^:]+:37:  Info: macro invoked from here
-[^:]+:23: Error: operand mismatch -- `bfcvtn z1.h,{z0.h-z1.h}'
+[^:]+:23: Error: operand mismatch -- `bfcvtn z1.h,{ ?z0.h ?- ?z1.h ?}'
 [^:]+:39:  Info: macro invoked from here
-[^:]+:24: Error: operand mismatch -- `bfcvtn z0.s,{z0.h-z1.h}'
+[^:]+:24: Error: operand mismatch -- `bfcvtn z0.s,{ ?z0.h ?- ?z1.h ?}'
 [^:]+:39:  Info: macro invoked from here
-[^:]+:25: Error: operand mismatch -- `bfcvtn z7.d,{z0.h-z1.h}'
+[^:]+:25: Error: operand mismatch -- `bfcvtn z7.d,{ ?z0.h ?- ?z1.h ?}'
 [^:]+:39:  Info: macro invoked from here
-[^:]+:27: Error: start register out of range at operand 2 -- `bfcvtn z0.b,{z1.h-z2.h}'
+[^:]+:27: Error: start register out of range at operand 2 -- `bfcvtn z0.b,{ ?z1.h ?- ?z2.h ?}'
 [^:]+:39:  Info: macro invoked from here
-[^:]+:23: Error: operand mismatch -- `fcvtn z1.h,{z0.h-z1.h}'
+[^:]+:23: Error: operand mismatch -- `fcvtn z1.h,{ ?z0.h ?- ?z1.h ?}'
 [^:]+:40:  Info: macro invoked from here
-[^:]+:24: Error: operand mismatch -- `fcvtn z0.s,{z0.h-z1.h}'
+[^:]+:24: Error: operand mismatch -- `fcvtn z0.s,{ ?z0.h ?- ?z1.h ?}'
 [^:]+:40:  Info: macro invoked from here
-[^:]+:25: Error: operand mismatch -- `fcvtn z7.d,{z0.h-z1.h}'
+[^:]+:25: Error: operand mismatch -- `fcvtn z7.d,{ ?z0.h ?- ?z1.h ?}'
 [^:]+:40:  Info: macro invoked from here
-[^:]+:27: Error: start register out of range at operand 2 -- `fcvtn z0.b,{z1.h-z2.h}'
+[^:]+:27: Error: start register out of range at operand 2 -- `fcvtn z0.b,{ ?z1.h ?- ?z2.h ?}'
 [^:]+:40:  Info: macro invoked from here
-[^:]+:23: Error: operand mismatch -- `fcvtnb z1.h,{z0.s-z1.s}'
+[^:]+:23: Error: operand mismatch -- `fcvtnb z1.h,{ ?z0.s ?- ?z1.s ?}'
 [^:]+:41:  Info: macro invoked from here
-[^:]+:24: Error: operand mismatch -- `fcvtnb z0.s,{z0.s-z1.s}'
+[^:]+:24: Error: operand mismatch -- `fcvtnb z0.s,{ ?z0.s ?- ?z1.s ?}'
 [^:]+:41:  Info: macro invoked from here
-[^:]+:25: Error: operand mismatch -- `fcvtnb z7.d,{z0.s-z1.s}'
+[^:]+:25: Error: operand mismatch -- `fcvtnb z7.d,{ ?z0.s ?- ?z1.s ?}'
 [^:]+:41:  Info: macro invoked from here
-[^:]+:27: Error: start register out of range at operand 2 -- `fcvtnb z0.b,{z1.s-z2.s}'
+[^:]+:27: Error: start register out of range at operand 2 -- `fcvtnb z0.b,{ ?z1.s ?- ?z2.s ?}'
 [^:]+:41:  Info: macro invoked from here
-[^:]+:23: Error: operand mismatch -- `fcvtnt z1.h,{z0.s-z1.s}'
+[^:]+:23: Error: operand mismatch -- `fcvtnt z1.h,{ ?z0.s ?- ?z1.s ?}'
 [^:]+:42:  Info: macro invoked from here
-[^:]+:24: Error: operand mismatch -- `fcvtnt z0.s,{z0.s-z1.s}'
+[^:]+:24: Error: operand mismatch -- `fcvtnt z0.s,{ ?z0.s ?- ?z1.s ?}'
 [^:]+:42:  Info: macro invoked from here
-[^:]+:25: Error: operand mismatch -- `fcvtnt z7.d,{z0.s-z1.s}'
+[^:]+:25: Error: operand mismatch -- `fcvtnt z7.d,{ ?z0.s ?- ?z1.s ?}'
 [^:]+:42:  Info: macro invoked from here
-[^:]+:27: Error: start register out of range at operand 2 -- `fcvtnt z0.b,{z1.s-z2.s}'
+[^:]+:27: Error: start register out of range at operand 2 -- `fcvtnt z0.b,{ ?z1.s ?- ?z2.s ?}'
 [^:]+:42:  Info: macro invoked from here
diff --git a/gas/testsuite/gas/aarch64/sve2-lut-bad.l b/gas/testsuite/gas/aarch64/sve2-lut-bad.l
index 8bbdc3e..18c730e 100644
--- a/gas/testsuite/gas/aarch64/sve2-lut-bad.l
+++ b/gas/testsuite/gas/aarch64/sve2-lut-bad.l
@@ -1,34 +1,34 @@
 [^ :]+: Assembler messages:
-.*: Error: selected processor does not support `luti2 z0.b,{z0.b},z0\[0\]'
-.*: Error: selected processor does not support `luti2 z31.b,{z0.b},z0\[0\]'
-.*: Error: selected processor does not support `luti2 z0.b,{z31.b},z0\[0\]'
-.*: Error: selected processor does not support `luti2 z0.b,{z0.b},z31\[0\]'
-.*: Error: selected processor does not support `luti2 z0.b,{z0.b},z0\[3\]'
-.*: Error: selected processor does not support `luti2 z4.b,{z9.b},z15\[2\]'
-.*: Error: selected processor does not support `luti2 z0.h,{z0.h},z0\[0\]'
-.*: Error: selected processor does not support `luti2 z31.h,{z0.h},z0\[0\]'
-.*: Error: selected processor does not support `luti2 z0.h,{z31.h},z0\[0\]'
-.*: Error: selected processor does not support `luti2 z0.h,{z0.h},z31\[0\]'
-.*: Error: selected processor does not support `luti2 z0.h,{z0.h},z0\[7\]'
-.*: Error: selected processor does not support `luti2 z4.h,{z9.h},z15\[2\]'
-.*: Error: selected processor does not support `luti2 z4.h,{z9.h},z15\[1\]'
-.*: Error: selected processor does not support `luti2 z4.h,{z9.h},z15\[4\]'
-.*: Error: selected processor does not support `luti4 z0.b,{z0.b},z0\[0\]'
-.*: Error: selected processor does not support `luti4 z31.b,{z0.b},z0\[0\]'
-.*: Error: selected processor does not support `luti4 z0.b,{z31.b},z0\[0\]'
-.*: Error: selected processor does not support `luti4 z0.b,{z0.b},z31\[0\]'
-.*: Error: selected processor does not support `luti4 z0.b,{z0.b},z0\[1\]'
-.*: Error: selected processor does not support `luti4 z4.b,{z9.b},z15\[1\]'
-.*: Error: selected processor does not support `luti4 z0.h,{z0.h},z0\[0\]'
-.*: Error: selected processor does not support `luti4 z31.h,{z0.h},z0\[0\]'
-.*: Error: selected processor does not support `luti4 z0.h,{z30.h},z0\[0\]'
-.*: Error: selected processor does not support `luti4 z0.h,{z0.h},z31\[0\]'
-.*: Error: selected processor does not support `luti4 z0.h,{z0.h},z0\[3\]'
-.*: Error: selected processor does not support `luti4 z4.h,{z9.h},z15\[2\]'
-.*: Error: selected processor does not support `luti4 z0.h,{z0.h,z1.h},z0\[0\]'
-.*: Error: selected processor does not support `luti4 z31.h,{z0.h,z1.h},z0\[0\]'
-.*: Error: selected processor does not support `luti4 z0.h,{z30.h,z31.h},z0\[0\]'
-.*: Error: selected processor does not support `luti4 z0.h,{z31.h,z0.h},z0\[0\]'
-.*: Error: selected processor does not support `luti4 z0.h,{z0.h,z1.h},z31\[0\]'
-.*: Error: selected processor does not support `luti4 z0.h,{z0.h,z1.h},z0\[3\]'
-.*: Error: selected processor does not support `luti4 z4.h,{z9.h,z10.h},z15\[2\]'
+.*: Error: selected processor does not support `luti2 z0.b,{ ?z0.b ?},z0\[0\]'
+.*: Error: selected processor does not support `luti2 z31.b,{ ?z0.b ?},z0\[0\]'
+.*: Error: selected processor does not support `luti2 z0.b,{ ?z31.b ?},z0\[0\]'
+.*: Error: selected processor does not support `luti2 z0.b,{ ?z0.b ?},z31\[0\]'
+.*: Error: selected processor does not support `luti2 z0.b,{ ?z0.b ?},z0\[3\]'
+.*: Error: selected processor does not support `luti2 z4.b,{ ?z9.b ?},z15\[2\]'
+.*: Error: selected processor does not support `luti2 z0.h,{ ?z0.h ?},z0\[0\]'
+.*: Error: selected processor does not support `luti2 z31.h,{ ?z0.h ?},z0\[0\]'
+.*: Error: selected processor does not support `luti2 z0.h,{ ?z31.h ?},z0\[0\]'
+.*: Error: selected processor does not support `luti2 z0.h,{ ?z0.h ?},z31\[0\]'
+.*: Error: selected processor does not support `luti2 z0.h,{ ?z0.h ?},z0\[7\]'
+.*: Error: selected processor does not support `luti2 z4.h,{ ?z9.h ?},z15\[2\]'
+.*: Error: selected processor does not support `luti2 z4.h,{ ?z9.h ?},z15\[1\]'
+.*: Error: selected processor does not support `luti2 z4.h,{ ?z9.h ?},z15\[4\]'
+.*: Error: selected processor does not support `luti4 z0.b,{ ?z0.b ?},z0\[0\]'
+.*: Error: selected processor does not support `luti4 z31.b,{ ?z0.b ?},z0\[0\]'
+.*: Error: selected processor does not support `luti4 z0.b,{ ?z31.b ?},z0\[0\]'
+.*: Error: selected processor does not support `luti4 z0.b,{ ?z0.b ?},z31\[0\]'
+.*: Error: selected processor does not support `luti4 z0.b,{ ?z0.b ?},z0\[1\]'
+.*: Error: selected processor does not support `luti4 z4.b,{ ?z9.b ?},z15\[1\]'
+.*: Error: selected processor does not support `luti4 z0.h,{ ?z0.h ?},z0\[0\]'
+.*: Error: selected processor does not support `luti4 z31.h,{ ?z0.h ?},z0\[0\]'
+.*: Error: selected processor does not support `luti4 z0.h,{ ?z30.h ?},z0\[0\]'
+.*: Error: selected processor does not support `luti4 z0.h,{ ?z0.h ?},z31\[0\]'
+.*: Error: selected processor does not support `luti4 z0.h,{ ?z0.h ?},z0\[3\]'
+.*: Error: selected processor does not support `luti4 z4.h,{ ?z9.h ?},z15\[2\]'
+.*: Error: selected processor does not support `luti4 z0.h,{ ?z0.h,z1.h ?},z0\[0\]'
+.*: Error: selected processor does not support `luti4 z31.h,{ ?z0.h,z1.h ?},z0\[0\]'
+.*: Error: selected processor does not support `luti4 z0.h,{ ?z30.h,z31.h ?},z0\[0\]'
+.*: Error: selected processor does not support `luti4 z0.h,{ ?z31.h,z0.h ?},z0\[0\]'
+.*: Error: selected processor does not support `luti4 z0.h,{ ?z0.h,z1.h ?},z31\[0\]'
+.*: Error: selected processor does not support `luti4 z0.h,{ ?z0.h,z1.h ?},z0\[3\]'
+.*: Error: selected processor does not support `luti4 z4.h,{ ?z9.h,z10.h ?},z15\[2\]'
diff --git a/gas/testsuite/gas/aarch64/sve2-lut-illegal.l b/gas/testsuite/gas/aarch64/sve2-lut-illegal.l
index bd6e419..500d323 100644
--- a/gas/testsuite/gas/aarch64/sve2-lut-illegal.l
+++ b/gas/testsuite/gas/aarch64/sve2-lut-illegal.l
@@ -1,212 +1,212 @@
 [^ :]+: Assembler messages:
-[^ :]+:[0-9]+: Error: operand mismatch -- `luti2 z2\.b,\{z5\.h\},z7\[1\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `luti2 z2\.b,\{ ?z5\.h\ ?},z7\[1\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	luti2 z2\.b, \{z5\.b\}, z7\[1\]
-[^ :]+:[0-9]+: Error: operand mismatch -- `luti2 z2\.h,\{z5\.b\},z7\[1\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `luti2 z2\.h,\{ ?z5\.b\ ?},z7\[1\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	luti2 z2\.b, \{z5\.b\}, z7\[1\]
-[^ :]+:[0-9]+: Error: operand mismatch -- `luti4 z2\.b,\{z5\.h\},z7\[1\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `luti4 z2\.b,\{ ?z5\.h\ ?},z7\[1\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	luti4 z2\.b, \{z5\.b\}, z7\[1\]
-[^ :]+:[0-9]+: Error: operand mismatch -- `luti4 z2\.h,\{z5\.b\},z7\[1\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `luti4 z2\.h,\{ ?z5\.b\ ?},z7\[1\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	luti4 z2\.b, \{z5\.b\}, z7\[1\]
-[^ :]+:[0-9]+: Error: operand mismatch -- `luti4 z2\.b,\{z5\.h,z6\.h\},z12\[1\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `luti4 z2\.b,\{ ?z5\.h,z6\.h\ ?},z12\[1\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	luti4 z2\.b, \{z5\.b-z6\.b\}, z12\[1\]
-[^ :]+:[0-9]+: Error: operand mismatch -- `luti4 z2\.h,\{z5\.b,z6\.b\},z12\[1\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `luti4 z2\.h,\{ ?z5\.b,z6\.b\ ?},z12\[1\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	luti4 z2\.b, \{z5\.b-z6\.b\}, z12\[1\]
-[^ :]+:[0-9]+: Error: type mismatch in vector register list at operand 2 -- `luti4 z2\.b,\{z5\.b,z6\.h\},z12\[1\]'
-[^ :]+:[0-9]+: Error: type mismatch in vector register list at operand 2 -- `luti4 z2\.h,\{z5\.h,z6\.b\},z12\[1\]'
-[^ :]+:[0-9]+: Error: syntax error in register list at operand 2 -- `luti2 z5\.b,\{\},z7\[1\]'
+[^ :]+:[0-9]+: Error: type mismatch in vector register list at operand 2 -- `luti4 z2\.b,\{ ?z5\.b,z6\.h\ ?},z12\[1\]'
+[^ :]+:[0-9]+: Error: type mismatch in vector register list at operand 2 -- `luti4 z2\.h,\{ ?z5\.h,z6\.b\ ?},z12\[1\]'
+[^ :]+:[0-9]+: Error: syntax error in register list at operand 2 -- `luti2 z5\.b,\{ ?\ ?},z7\[1\]'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: unexpected register type at operand 2 -- `luti2 \{z5\.b\},z6\.b,z7\[1\]'
+[^ :]+:[0-9]+: Error: unexpected register type at operand 2 -- `luti2 \{ ?z5\.b\ ?},z6\.b,z7\[1\]'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: expected a single-register list at operand 2 -- `luti2 z5\.b,\{z7\.b,z8\.b\},z9\[1\]'
+[^ :]+:[0-9]+: Error: expected a single-register list at operand 2 -- `luti2 z5\.b,\{ ?z7\.b,z8\.b\ ?},z9\[1\]'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: syntax error in register list at operand 2 -- `luti2 z5\.h,\{\},z7\[1\]'
+[^ :]+:[0-9]+: Error: syntax error in register list at operand 2 -- `luti2 z5\.h,\{ ?\ ?},z7\[1\]'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: unexpected register type at operand 2 -- `luti2 \{z5\.h\},z6\.h,z7\[1\]'
+[^ :]+:[0-9]+: Error: unexpected register type at operand 2 -- `luti2 \{ ?z5\.h\ ?},z6\.h,z7\[1\]'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: expected a single-register list at operand 2 -- `luti2 z5\.h,\{z7\.h,z8\.h\},z9\[1\]'
+[^ :]+:[0-9]+: Error: expected a single-register list at operand 2 -- `luti2 z5\.h,\{ ?z7\.h,z8\.h\ ?},z9\[1\]'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: syntax error in register list at operand 2 -- `luti4 z5\.b,\{\},z7\[1\]'
+[^ :]+:[0-9]+: Error: syntax error in register list at operand 2 -- `luti4 z5\.b,\{ ?\ ?},z7\[1\]'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: unexpected register type at operand 2 -- `luti4 \{z5\.b\},z6\.b,z7\[1\]'
+[^ :]+:[0-9]+: Error: unexpected register type at operand 2 -- `luti4 \{ ?z5\.b\ ?},z6\.b,z7\[1\]'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: expected a single-register list at operand 2 -- `luti4 z5\.b,\{z7\.b,z8\.b\},z9\[1\]'
+[^ :]+:[0-9]+: Error: expected a single-register list at operand 2 -- `luti4 z5\.b,\{ ?z7\.b,z8\.b\ ?},z9\[1\]'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: syntax error in register list at operand 2 -- `luti4 z5\.h,\{\},z7\[1\]'
-[^ :]+:[0-9]+: Error: unexpected register type at operand 2 -- `luti4 \{z5\.h\},z6\.h,z7\[1\]'
-[^ :]+:[0-9]+: Error: the register list must have a stride of 1 at operand 2 -- `luti4 z5\.h,\{z7\.h,z9\.h\},z3\[3\]'
-[^ :]+:[0-9]+: Error: operand mismatch -- `luti2 z5\.s,\{z7\.s\},z9\[1\]'
+[^ :]+:[0-9]+: Error: syntax error in register list at operand 2 -- `luti4 z5\.h,\{ ?\ ?},z7\[1\]'
+[^ :]+:[0-9]+: Error: unexpected register type at operand 2 -- `luti4 \{ ?z5\.h\ ?},z6\.h,z7\[1\]'
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 at operand 2 -- `luti4 z5\.h,\{ ?z7\.h,z9\.h\ ?},z3\[3\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `luti2 z5\.s,\{ ?z7\.s\ ?},z9\[1\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	luti2 z5\.b, \{z7\.b\}, z9\[1\]
-[^ :]+:[0-9]+: Error: operand mismatch -- `luti4 z5\.s,\{z7\.s\},z9\[1\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `luti4 z5\.s,\{ ?z7\.s\ ?},z9\[1\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	luti4 z5\.b, \{z7\.b\}, z9\[1\]
-[^ :]+:[0-9]+: Error: operand mismatch -- `luti4 z5\.s,\{z7\.s,z8\.s\},z9\[1\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `luti4 z5\.s,\{ ?z7\.s,z8\.s\ ?},z9\[1\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	luti4 z5\.b, \{z7\.b-z8\.b\}, z9\[1\]
 [^ :]+:[0-9]+: Error: comma expected between operands at operand 2 -- `luti2 z5\.b'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: comma expected between operands at operand 3 -- `luti2 z5\.b,\{z7\.b\}'
+[^ :]+:[0-9]+: Error: comma expected between operands at operand 3 -- `luti2 z5\.b,\{ ?z7\.b\ ?}'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: unexpected characters following instruction at operand 3 -- `luti2 z5\.b,\{z7\.b\},z9\[1\],z11\.b'
+[^ :]+:[0-9]+: Error: unexpected characters following instruction at operand 3 -- `luti2 z5\.b,\{ ?z7\.b\ ?},z9\[1\],z11\.b'
 [^ :]+:[0-9]+:  Info: macro invoked from here
 [^ :]+:[0-9]+: Error: comma expected between operands at operand 2 -- `luti2 z5\.h'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: comma expected between operands at operand 3 -- `luti2 z5\.h,\{z7\.h\}'
+[^ :]+:[0-9]+: Error: comma expected between operands at operand 3 -- `luti2 z5\.h,\{ ?z7\.h\ ?}'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: unexpected characters following instruction at operand 3 -- `luti2 z5\.h,\{z7\.h\},z9\[1\],z11\.h'
+[^ :]+:[0-9]+: Error: unexpected characters following instruction at operand 3 -- `luti2 z5\.h,\{ ?z7\.h\ ?},z9\[1\],z11\.h'
 [^ :]+:[0-9]+:  Info: macro invoked from here
 [^ :]+:[0-9]+: Error: comma expected between operands at operand 2 -- `luti4 z5\.b'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: comma expected between operands at operand 3 -- `luti4 z5\.b,\{z7\.b\}'
+[^ :]+:[0-9]+: Error: comma expected between operands at operand 3 -- `luti4 z5\.b,\{ ?z7\.b\ ?}'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: unexpected characters following instruction at operand 3 -- `luti4 z5\.b,\{z7\.b\},z9\[1\],z11\.b'
+[^ :]+:[0-9]+: Error: unexpected characters following instruction at operand 3 -- `luti4 z5\.b,\{ ?z7\.b\ ?},z9\[1\],z11\.b'
 [^ :]+:[0-9]+:  Info: macro invoked from here
 [^ :]+:[0-9]+: Error: comma expected between operands at operand 2 -- `luti4 z5\.h'
-[^ :]+:[0-9]+: Error: comma expected between operands at operand 3 -- `luti4 z5\.h,\{z7\.h\}'
-[^ :]+:[0-9]+: Error: unexpected characters following instruction at operand 3 -- `luti4 z5\.h,\{z7\.h\},z9\[1\],z11\.h'
-[^ :]+:[0-9]+: Error: comma expected between operands at operand 3 -- `luti4 z5\.h,\{z7\.h,z8\.h\}'
-[^ :]+:[0-9]+: Error: unexpected characters following instruction at operand 3 -- `luti4 z5\.h,\{z7\.h,z8\.h\},z9\[1\],z11\.h'
-[^ :]+:[0-9]+: Error: unexpected character `t' in element size at operand 1 -- `luti2 z5\.t,\{z7\.b},z9\[1\]'
+[^ :]+:[0-9]+: Error: comma expected between operands at operand 3 -- `luti4 z5\.h,\{ ?z7\.h\ ?}'
+[^ :]+:[0-9]+: Error: unexpected characters following instruction at operand 3 -- `luti4 z5\.h,\{ ?z7\.h\ ?},z9\[1\],z11\.h'
+[^ :]+:[0-9]+: Error: comma expected between operands at operand 3 -- `luti4 z5\.h,\{ ?z7\.h,z8\.h\ ?}'
+[^ :]+:[0-9]+: Error: unexpected characters following instruction at operand 3 -- `luti4 z5\.h,\{ ?z7\.h,z8\.h\ ?},z9\[1\],z11\.h'
+[^ :]+:[0-9]+: Error: unexpected character `t' in element size at operand 1 -- `luti2 z5\.t,\{ ?z7\.b ?},z9\[1\]'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: unexpected character `t' in element size at operand 2 -- `luti2 z5\.b,\{z7\.t},z9\[1\]'
+[^ :]+:[0-9]+: Error: unexpected character `t' in element size at operand 2 -- `luti2 z5\.b,\{ ?z7\.t ?},z9\[1\]'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: operand 3 must be an indexed SVE vector register -- `luti2 z5\.b,\{z7\.b},z9\.b'
+[^ :]+:[0-9]+: Error: operand 3 must be an indexed SVE vector register -- `luti2 z5\.b,\{ ?z7\.b ?},z9\.b'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: unexpected character `t' in element size at operand 1 -- `luti2 z5\.t,\{z7\.h},z9\[1\]'
+[^ :]+:[0-9]+: Error: unexpected character `t' in element size at operand 1 -- `luti2 z5\.t,\{ ?z7\.h ?},z9\[1\]'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: unexpected character `t' in element size at operand 2 -- `luti2 z5\.h,\{z7\.t},z9\[1\]'
+[^ :]+:[0-9]+: Error: unexpected character `t' in element size at operand 2 -- `luti2 z5\.h,\{ ?z7\.t ?},z9\[1\]'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: operand 3 must be an indexed SVE vector register -- `luti2 z5\.h,\{z7\.h},z9\.h'
+[^ :]+:[0-9]+: Error: operand 3 must be an indexed SVE vector register -- `luti2 z5\.h,\{ ?z7\.h ?},z9\.h'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: unexpected character `t' in element size at operand 1 -- `luti4 z5\.t,\{z7\.b},z9\[1\]'
+[^ :]+:[0-9]+: Error: unexpected character `t' in element size at operand 1 -- `luti4 z5\.t,\{ ?z7\.b ?},z9\[1\]'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: unexpected character `t' in element size at operand 2 -- `luti4 z5\.b,\{z7\.t},z9\[1\]'
+[^ :]+:[0-9]+: Error: unexpected character `t' in element size at operand 2 -- `luti4 z5\.b,\{ ?z7\.t ?},z9\[1\]'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: operand 3 must be an indexed SVE vector register -- `luti4 z5\.b,\{z7\.b},z9\.b'
+[^ :]+:[0-9]+: Error: operand 3 must be an indexed SVE vector register -- `luti4 z5\.b,\{ ?z7\.b ?},z9\.b'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: unexpected character `t' in element size at operand 1 -- `luti4 z5\.t,\{z7\.h,z8\.h},z9\[1\]'
-[^ :]+:[0-9]+: Error: unexpected character `t' in element size at operand 2 -- `luti4 z5\.h,\{z7\.t,z8\.h},z9\[1\]'
-[^ :]+:[0-9]+: Error: unexpected character `t' in element size at operand 2 -- `luti4 z5\.h,\{z7\.h,z8\.t},z9\[1\]'
-[^ :]+:[0-9]+: Error: operand 3 must be an indexed SVE vector register -- `luti4 z5\.h,\{z7\.h,z8\.h},z9\.h'
-[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `luti2 5.b,\{z7.b\},z9\[1\]'
+[^ :]+:[0-9]+: Error: unexpected character `t' in element size at operand 1 -- `luti4 z5\.t,\{ ?z7\.h,z8\.h ?},z9\[1\]'
+[^ :]+:[0-9]+: Error: unexpected character `t' in element size at operand 2 -- `luti4 z5\.h,\{ ?z7\.t,z8\.h ?},z9\[1\]'
+[^ :]+:[0-9]+: Error: unexpected character `t' in element size at operand 2 -- `luti4 z5\.h,\{ ?z7\.h,z8\.t ?},z9\[1\]'
+[^ :]+:[0-9]+: Error: operand 3 must be an indexed SVE vector register -- `luti4 z5\.h,\{ ?z7\.h,z8\.h ?},z9\.h'
+[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `luti2 5.b,\{ ?z7.b\ ?},z9\[1\]'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: missing type suffix at operand 2 -- `luti2 z5.b,\{z7\},z9\[1\]'
+[^ :]+:[0-9]+: Error: missing type suffix at operand 2 -- `luti2 z5.b,\{ ?z7\ ?},z9\[1\]'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: syntax error in register list at operand 2 -- `luti2 z5.b,\{7.b\},z9\[1\]'
+[^ :]+:[0-9]+: Error: syntax error in register list at operand 2 -- `luti2 z5.b,\{ ?7.b\ ?},z9\[1\]'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `luti2 z5.b,\{z7.b\},9\[1\]'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `luti2 z5.b,\{ ?z7.b\ ?},9\[1\]'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `luti2 5.h,\{z7.h\},z9\[1\]'
+[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `luti2 5.h,\{ ?z7.h\ ?},z9\[1\]'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: missing type suffix at operand 2 -- `luti2 z5.h,\{z7\},z9\[1\]'
+[^ :]+:[0-9]+: Error: missing type suffix at operand 2 -- `luti2 z5.h,\{ ?z7\ ?},z9\[1\]'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: syntax error in register list at operand 2 -- `luti2 z5.h,\{7.h\},z9\[1\]'
+[^ :]+:[0-9]+: Error: syntax error in register list at operand 2 -- `luti2 z5.h,\{ ?7.h\ ?},z9\[1\]'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `luti2 z5.h,\{z7.h\},9\[1\]'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `luti2 z5.h,\{ ?z7.h\ ?},9\[1\]'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `luti4 5\.b,\{z7.b},z9\[1\]'
+[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `luti4 5\.b,\{ ?z7.b ?},z9\[1\]'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: missing type suffix at operand 2 -- `luti4 z5\.b,\{z7\},z9\[1\]'
+[^ :]+:[0-9]+: Error: missing type suffix at operand 2 -- `luti4 z5\.b,\{ ?z7\ ?},z9\[1\]'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: syntax error in register list at operand 2 -- `luti4 z5\.b,\{7\.b\},z9\[1\]'
+[^ :]+:[0-9]+: Error: syntax error in register list at operand 2 -- `luti4 z5\.b,\{ ?7\.b\ ?},z9\[1\]'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `luti4 z5\.b,\{z7\.b\},9\[1\]'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `luti4 z5\.b,\{ ?z7\.b\ ?},9\[1\]'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: type mismatch in vector register list at operand 2 -- `luti4 z5\.h,\{z7,z8\.h\},z9\[1\]'
-[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `luti4 5\.h,\{z7\.h,z8\.h},z9\[1\]'
-[^ :]+:[0-9]+: Error: syntax error in register list at operand 2 -- `luti4 z5\.h,\{7\.h,z8\.h\},z9\[1\]'
-[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `luti4 z5\.h,\{z7\.h,z8\.h\},9\[1\]'
-[^ :]+:[0-9]+: Error: operand mismatch -- `luti2 z5\.b,\{z7\.b\},z9\.b\[2\]'
+[^ :]+:[0-9]+: Error: type mismatch in vector register list at operand 2 -- `luti4 z5\.h,\{ ?z7,z8\.h\ ?},z9\[1\]'
+[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `luti4 5\.h,\{ ?z7\.h,z8\.h ?},z9\[1\]'
+[^ :]+:[0-9]+: Error: syntax error in register list at operand 2 -- `luti4 z5\.h,\{ ?7\.h,z8\.h\ ?},z9\[1\]'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `luti4 z5\.h,\{ ?z7\.h,z8\.h\ ?},9\[1\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `luti2 z5\.b,\{ ?z7\.b\ ?},z9\.b\[2\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	luti2 z5\.b, \{z7\.b\}, z9\[2\]
-[^ :]+:[0-9]+: Error: operand mismatch -- `luti2 z5\.h,\{z7\.h\},z9\.h\[2\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `luti2 z5\.h,\{ ?z7\.h\ ?},z9\.h\[2\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	luti2 z5\.h, \{z7\.h\}, z9\[2\]
-[^ :]+:[0-9]+: Error: operand mismatch -- `luti4 z5\.b,\{z7\.b\},z9\.b\[1\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `luti4 z5\.b,\{ ?z7\.b\ ?},z9\.b\[1\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	luti4 z5\.b, \{z7\.b\}, z9\[1\]
-[^ :]+:[0-9]+: Error: operand mismatch -- `luti4 z5\.h,\{z7\.h\},z9\.h\[2\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `luti4 z5\.h,\{ ?z7\.h\ ?},z9\.h\[2\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	luti4 z5\.h, \{z7\.h\}, z9\[2\]
-[^ :]+:[0-9]+: Error: operand mismatch -- `luti4 z5\.h,\{z7\.h,z8\.h\},z9\.h\[2\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `luti4 z5\.h,\{ ?z7\.h,z8\.h\ ?},z9\.h\[2\]'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	luti4 z5\.h, \{z7\.h-z8\.h\}, z9\[2\]
-[^ :]+:[0-9]+: Error: missing braces at operand 1 -- `luti2 z4\.b\[2\],\{z9\.b\},z15'
+[^ :]+:[0-9]+: Error: missing braces at operand 1 -- `luti2 z4\.b\[2\],\{ ?z9\.b\ ?},z15'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: missing braces at operand 1 -- `luti2 z4\[2\],\{z9\.b\},z15'
+[^ :]+:[0-9]+: Error: missing braces at operand 1 -- `luti2 z4\[2\],\{ ?z9\.b\ ?},z15'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: index not allowed inside register list at operand 2 -- `luti2 z4.b,\{z9.b\[2\]\},z15'
+[^ :]+:[0-9]+: Error: index not allowed inside register list at operand 2 -- `luti2 z4.b,\{ ?z9.b\[2\]\ ?},z15'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: missing braces at operand 1 -- `luti2 z4\[2\],\{z9\[2\]\},z15'
+[^ :]+:[0-9]+: Error: missing braces at operand 1 -- `luti2 z4\[2\],\{ ?z9\[2\]\ ?},z15'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: missing braces at operand 1 -- `luti2 z4\.h\[2\],\{z9\.h\},z15'
+[^ :]+:[0-9]+: Error: missing braces at operand 1 -- `luti2 z4\.h\[2\],\{ ?z9\.h\ ?},z15'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: missing braces at operand 1 -- `luti2 z4\[2\],\{z9\.h\},z15'
+[^ :]+:[0-9]+: Error: missing braces at operand 1 -- `luti2 z4\[2\],\{ ?z9\.h\ ?},z15'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: index not allowed inside register list at operand 2 -- `luti2 z4.h,\{z9.h\[2\]\},z15'
+[^ :]+:[0-9]+: Error: index not allowed inside register list at operand 2 -- `luti2 z4.h,\{ ?z9.h\[2\]\ ?},z15'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: missing braces at operand 1 -- `luti2 z4\[2\],\{z9\[2\]\},z15'
+[^ :]+:[0-9]+: Error: missing braces at operand 1 -- `luti2 z4\[2\],\{ ?z9\[2\]\ ?},z15'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: missing braces at operand 1 -- `luti4 z4\.b\[2\],\{z9\.b\},z15'
+[^ :]+:[0-9]+: Error: missing braces at operand 1 -- `luti4 z4\.b\[2\],\{ ?z9\.b\ ?},z15'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: missing braces at operand 1 -- `luti4 z4\[2\],\{z9\.b\},z15'
+[^ :]+:[0-9]+: Error: missing braces at operand 1 -- `luti4 z4\[2\],\{ ?z9\.b\ ?},z15'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: index not allowed inside register list at operand 2 -- `luti4 z4.b,\{z9.b\[2\]\},z15'
+[^ :]+:[0-9]+: Error: index not allowed inside register list at operand 2 -- `luti4 z4.b,\{ ?z9.b\[2\]\ ?},z15'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: missing braces at operand 1 -- `luti4 z4\[2\],\{z9\[2\]\},z15'
+[^ :]+:[0-9]+: Error: missing braces at operand 1 -- `luti4 z4\[2\],\{ ?z9\[2\]\ ?},z15'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: missing braces at operand 1 -- `luti4 z4\.h\[2\],\{z9.h,z10.h\},z15'
-[^ :]+:[0-9]+: Error: missing braces at operand 1 -- `luti4 z4\[2\],\{z9.h,z10.h\},z15'
-[^ :]+:[0-9]+: Error: index not allowed inside register list at operand 2 -- `luti4 z4.h,\{z9.h,z10.h\[2\]\},z15'
-[^ :]+:[0-9]+: Error: missing braces at operand 1 -- `luti4 z4\[2\],\{z9,z10\[2\]\},z15'
-[^ :]+:[0-9]+: Error: operand 3 must be an indexed SVE vector register -- `luti2 z4.b,\{z9.b\},z15.b'
-[^ :]+:[0-9]+: Error: operand 3 must be an indexed SVE vector register -- `luti2 z4.b,\{z9.b\},z15'
-[^ :]+:[0-9]+: Error: operand 3 must be an indexed SVE vector register -- `luti2 z4.h,\{z9.h\},z15.h'
-[^ :]+:[0-9]+: Error: operand 3 must be an indexed SVE vector register -- `luti2 z4.h,\{z9.h\},z15'
-[^ :]+:[0-9]+: Error: operand 3 must be an indexed SVE vector register -- `luti4 z4.b,\{z9.b\},z15.b'
-[^ :]+:[0-9]+: Error: operand 3 must be an indexed SVE vector register -- `luti4 z4.b,\{z9.b\},z15'
-[^ :]+:[0-9]+: Error: operand 3 must be an indexed SVE vector register -- `luti4 z4.h,\{z9.h\},z15.h'
-[^ :]+:[0-9]+: Error: operand 3 must be an indexed SVE vector register -- `luti4 z4.h,\{z9.h\},z15'
-[^ :]+:[0-9]+: Error: operand 3 must be an indexed SVE vector register -- `luti4 z4.h,\{z9.h,z10.h\},z15.h'
-[^ :]+:[0-9]+: Error: operand 3 must be an indexed SVE vector register -- `luti4 z4.h,\{z9.h,z10.h\},z15'
-[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `luti2 z32.b,\{z9.b\},z15\[1\]'
+[^ :]+:[0-9]+: Error: missing braces at operand 1 -- `luti4 z4\.h\[2\],\{ ?z9.h,z10.h\ ?},z15'
+[^ :]+:[0-9]+: Error: missing braces at operand 1 -- `luti4 z4\[2\],\{ ?z9.h,z10.h\ ?},z15'
+[^ :]+:[0-9]+: Error: index not allowed inside register list at operand 2 -- `luti4 z4.h,\{ ?z9.h,z10.h\[2\]\ ?},z15'
+[^ :]+:[0-9]+: Error: missing braces at operand 1 -- `luti4 z4\[2\],\{ ?z9,z10\[2\]\ ?},z15'
+[^ :]+:[0-9]+: Error: operand 3 must be an indexed SVE vector register -- `luti2 z4.b,\{ ?z9.b\ ?},z15.b'
+[^ :]+:[0-9]+: Error: operand 3 must be an indexed SVE vector register -- `luti2 z4.b,\{ ?z9.b\ ?},z15'
+[^ :]+:[0-9]+: Error: operand 3 must be an indexed SVE vector register -- `luti2 z4.h,\{ ?z9.h\ ?},z15.h'
+[^ :]+:[0-9]+: Error: operand 3 must be an indexed SVE vector register -- `luti2 z4.h,\{ ?z9.h\ ?},z15'
+[^ :]+:[0-9]+: Error: operand 3 must be an indexed SVE vector register -- `luti4 z4.b,\{ ?z9.b\ ?},z15.b'
+[^ :]+:[0-9]+: Error: operand 3 must be an indexed SVE vector register -- `luti4 z4.b,\{ ?z9.b\ ?},z15'
+[^ :]+:[0-9]+: Error: operand 3 must be an indexed SVE vector register -- `luti4 z4.h,\{ ?z9.h\ ?},z15.h'
+[^ :]+:[0-9]+: Error: operand 3 must be an indexed SVE vector register -- `luti4 z4.h,\{ ?z9.h\ ?},z15'
+[^ :]+:[0-9]+: Error: operand 3 must be an indexed SVE vector register -- `luti4 z4.h,\{ ?z9.h,z10.h\ ?},z15.h'
+[^ :]+:[0-9]+: Error: operand 3 must be an indexed SVE vector register -- `luti4 z4.h,\{ ?z9.h,z10.h\ ?},z15'
+[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `luti2 z32.b,\{ ?z9.b\ ?},z15\[1\]'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 2 -- `luti2 z4.b,\{z32.b\},z4\[1\]'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 2 -- `luti2 z4.b,\{ ?z32.b\ ?},z4\[1\]'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `luti2 z4.b,\{z9.b\},z32\[1\]'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `luti2 z4.b,\{ ?z9.b\ ?},z32\[1\]'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `luti2 z2.b,\{z9.b\},z4\[4\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `luti2 z2.b,\{ ?z9.b\ ?},z4\[4\]'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `luti2 z4.b,\{z9.b\},z15\[-1\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `luti2 z4.b,\{ ?z9.b\ ?},z15\[-1\]'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `luti2 z32.h,\{z9.h\},z15\[1\]'
+[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `luti2 z32.h,\{ ?z9.h\ ?},z15\[1\]'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 2 -- `luti2 z4.h,\{z32.h\},z4\[1\]'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 2 -- `luti2 z4.h,\{ ?z32.h\ ?},z4\[1\]'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `luti2 z4.h,\{z9.h\},z32\[1\]'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `luti2 z4.h,\{ ?z9.h\ ?},z32\[1\]'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `luti2 z2.h,\{z9.h\},z4\[8\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `luti2 z2.h,\{ ?z9.h\ ?},z4\[8\]'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `luti2 z4.h,\{z9.h\},z15\[-1\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `luti2 z4.h,\{ ?z9.h\ ?},z15\[-1\]'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `luti4 z32.b,\{z9.b\},z15\[1\]'
+[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `luti4 z32.b,\{ ?z9.b\ ?},z15\[1\]'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 2 -- `luti4 z4.b,\{z32.b\},z4\[1\]'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 2 -- `luti4 z4.b,\{ ?z32.b\ ?},z4\[1\]'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `luti4 z4.b,\{z9.b\},z32\[1\]'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `luti4 z4.b,\{ ?z9.b\ ?},z32\[1\]'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: register element index out of range 0 to 1 at operand 3 -- `luti4 z2.b,\{z9.b\},z4\[2\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 1 at operand 3 -- `luti4 z2.b,\{ ?z9.b\ ?},z4\[2\]'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: register element index out of range 0 to 1 at operand 3 -- `luti4 z4.b,\{z9.b\},z15\[-1\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 1 at operand 3 -- `luti4 z4.b,\{ ?z9.b\ ?},z15\[-1\]'
 [^ :]+:[0-9]+:  Info: macro invoked from here
-[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `luti4 z32.h,\{z9.h\},z4\[2\]'
-[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 2 -- `luti4 z4.h,\{z32.h\},z15\[2\]'
-[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `luti4 z4.h,\{z9.h\},z32\[2\]'
-[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `luti4 z2.h,\{z9.h\},z15\[4\]'
-[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `luti4 z4.h,\{z9.h\},z15\[-1\]'
+[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `luti4 z32.h,\{ ?z9.h\ ?},z4\[2\]'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 2 -- `luti4 z4.h,\{ ?z32.h\ ?},z15\[2\]'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `luti4 z4.h,\{ ?z9.h\ ?},z32\[2\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `luti4 z2.h,\{ ?z9.h\ ?},z15\[4\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `luti4 z4.h,\{ ?z9.h\ ?},z15\[-1\]'
diff --git a/gas/testsuite/gas/aarch64/sve2-sme2-2-invalid.l b/gas/testsuite/gas/aarch64/sve2-sme2-2-invalid.l
index 161ea7a..9250190 100644
--- a/gas/testsuite/gas/aarch64/sve2-sme2-2-invalid.l
+++ b/gas/testsuite/gas/aarch64/sve2-sme2-2-invalid.l
@@ -1,25 +1,25 @@
 [^ :]+: Assembler messages:
-[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 1 -- `whilege {p0\.b},x0,x0'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `whilege {p1\.b-p2\.b},x0,x0'
-[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 1 -- `whilege {p0\.b-p2\.b},x0,x0'
-[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 1 -- `whilege {p0\.b-p3\.b},x0,x0'
-[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `whilege {p15\.b-p0\.b},x0,x0'
-[^ :]+:[0-9]+: Error: the register list must have a stride of 1 at operand 1 -- `whilege {p0\.b,p8\.b},x0,x0'
-[^ :]+:[0-9]+: Error: expected a predicate-as-mask rather than predicate-as-counter register at operand 1 -- `whilege {pn0\.b-pn1\.b},x0,x0'
-[^ :]+:[0-9]+: Error: missing type suffix at operand 1 -- `whilege {p0-p1},x0,x0'
-[^ :]+:[0-9]+: Error: operand mismatch -- `whilege {p0\.q-p1\.q},x0,x0'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 1 -- `whilege { ?p0\.b ?},x0,x0'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `whilege { ?p1\.b ?- ?p2\.b ?},x0,x0'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 1 -- `whilege { ?p0\.b ?- ?p2\.b ?},x0,x0'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 1 -- `whilege { ?p0\.b ?- ?p3\.b ?},x0,x0'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `whilege { ?p15\.b ?- ?p0\.b ?},x0,x0'
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 at operand 1 -- `whilege { ?p0\.b,p8\.b ?},x0,x0'
+[^ :]+:[0-9]+: Error: expected a predicate-as-mask rather than predicate-as-counter register at operand 1 -- `whilege { ?pn0\.b ?- ?pn1\.b ?},x0,x0'
+[^ :]+:[0-9]+: Error: missing type suffix at operand 1 -- `whilege { ?p0 ?- ?p1 ?},x0,x0'
+[^ :]+:[0-9]+: Error: operand mismatch -- `whilege { ?p0\.q ?- ?p1\.q ?},x0,x0'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	whilege {p0\.b-p1\.b}, x0, x0
 [^ :]+:[0-9]+: Info:    other valid variant\(s\):
 [^ :]+:[0-9]+: Info:    	whilege {p0\.h-p1\.h}, x0, x0
 [^ :]+:[0-9]+: Info:    	whilege {p0\.s-p1\.s}, x0, x0
 [^ :]+:[0-9]+: Info:    	whilege {p0\.d-p1\.d}, x0, x0
-[^ :]+:[0-9]+: Error: operand mismatch -- `whilege {p0\.b-p1\.b},w0,w0'
+[^ :]+:[0-9]+: Error: operand mismatch -- `whilege { ?p0\.b ?- ?p1\.b ?},w0,w0'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	whilege {p0\.b-p1\.b}, x0, x0
 [^ :]+:[0-9]+: Info:    other valid variant\(s\):
 [^ :]+:[0-9]+: Info:    	whilege {p0\.h-p1\.h}, x0, x0
 [^ :]+:[0-9]+: Info:    	whilege {p0\.s-p1\.s}, x0, x0
 [^ :]+:[0-9]+: Info:    	whilege {p0\.d-p1\.d}, x0, x0
-[^ :]+:[0-9]+: Error: expected an integer or zero register at operand 2 -- `whilege {p0\.b-p1\.b},sp,x0'
-[^ :]+:[0-9]+: Error: expected an integer or zero register at operand 3 -- `whilege {p0\.b-p1\.b},x0,sp'
+[^ :]+:[0-9]+: Error: expected an integer or zero register at operand 2 -- `whilege { ?p0\.b ?- ?p1\.b ?},sp,x0'
+[^ :]+:[0-9]+: Error: expected an integer or zero register at operand 3 -- `whilege { ?p0\.b ?- ?p1\.b ?},x0,sp'
diff --git a/gas/testsuite/gas/aarch64/sve2-sme2-2-noarch.l b/gas/testsuite/gas/aarch64/sve2-sme2-2-noarch.l
index 3152dd8..e5d7b43 100644
--- a/gas/testsuite/gas/aarch64/sve2-sme2-2-noarch.l
+++ b/gas/testsuite/gas/aarch64/sve2-sme2-2-noarch.l
@@ -1,257 +1,257 @@
 [^ :]+: Assembler messages:
-[^ :]+:[0-9]+: Error: selected processor does not support `whilege {p0\.b-p1\.b},x0,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilege {P0\.B-P1\.B},X0,X0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilege {p14\.b-p15\.b},x0,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilege {p0\.b-p1\.b},x30,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilege {p0\.b-p1\.b},xzr,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilege {p0\.b-p1\.b},x0,x30'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilege {p0\.b-p1\.b},x0,xzr'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilege {p4\.b-p5\.b},x17,x19'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilege {p0\.h-p1\.h},x0,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilege {P0\.h-P1\.h},X0,X0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilege {p14\.h-p15\.h},x0,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilege {p0\.h-p1\.h},x30,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilege {p0\.h-p1\.h},xzr,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilege {p0\.h-p1\.h},x0,x30'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilege {p0\.h-p1\.h},x0,xzr'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilege {p4\.h-p5\.h},x17,x19'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilege {p0\.s-p1\.s},x0,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilege {P0\.s-P1\.s},X0,X0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilege {p14\.s-p15\.s},x0,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilege {p0\.s-p1\.s},x30,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilege {p0\.s-p1\.s},xzr,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilege {p0\.s-p1\.s},x0,x30'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilege {p0\.s-p1\.s},x0,xzr'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilege {p4\.s-p5\.s},x17,x19'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilege {p0\.d-p1\.d},x0,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilege {P0\.d-P1\.d},X0,X0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilege {p14\.d-p15\.d},x0,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilege {p0\.d-p1\.d},x30,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilege {p0\.d-p1\.d},xzr,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilege {p0\.d-p1\.d},x0,x30'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilege {p0\.d-p1\.d},x0,xzr'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilege {p4\.d-p5\.d},x17,x19'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilegt {p0\.b-p1\.b},x0,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilegt {P0\.B-P1\.B},X0,X0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilegt {p14\.b-p15\.b},x0,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilegt {p0\.b-p1\.b},x30,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilegt {p0\.b-p1\.b},xzr,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilegt {p0\.b-p1\.b},x0,x30'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilegt {p0\.b-p1\.b},x0,xzr'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilegt {p4\.b-p5\.b},x17,x19'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilegt {p0\.h-p1\.h},x0,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilegt {P0\.h-P1\.h},X0,X0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilegt {p14\.h-p15\.h},x0,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilegt {p0\.h-p1\.h},x30,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilegt {p0\.h-p1\.h},xzr,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilegt {p0\.h-p1\.h},x0,x30'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilegt {p0\.h-p1\.h},x0,xzr'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilegt {p4\.h-p5\.h},x17,x19'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilegt {p0\.s-p1\.s},x0,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilegt {P0\.s-P1\.s},X0,X0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilegt {p14\.s-p15\.s},x0,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilegt {p0\.s-p1\.s},x30,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilegt {p0\.s-p1\.s},xzr,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilegt {p0\.s-p1\.s},x0,x30'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilegt {p0\.s-p1\.s},x0,xzr'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilegt {p4\.s-p5\.s},x17,x19'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilegt {p0\.d-p1\.d},x0,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilegt {P0\.d-P1\.d},X0,X0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilegt {p14\.d-p15\.d},x0,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilegt {p0\.d-p1\.d},x30,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilegt {p0\.d-p1\.d},xzr,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilegt {p0\.d-p1\.d},x0,x30'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilegt {p0\.d-p1\.d},x0,xzr'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilegt {p4\.d-p5\.d},x17,x19'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilehi {p0\.b-p1\.b},x0,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilehi {P0\.B-P1\.B},X0,X0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilehi {p14\.b-p15\.b},x0,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilehi {p0\.b-p1\.b},x30,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilehi {p0\.b-p1\.b},xzr,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilehi {p0\.b-p1\.b},x0,x30'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilehi {p0\.b-p1\.b},x0,xzr'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilehi {p4\.b-p5\.b},x17,x19'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilehi {p0\.h-p1\.h},x0,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilehi {P0\.h-P1\.h},X0,X0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilehi {p14\.h-p15\.h},x0,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilehi {p0\.h-p1\.h},x30,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilehi {p0\.h-p1\.h},xzr,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilehi {p0\.h-p1\.h},x0,x30'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilehi {p0\.h-p1\.h},x0,xzr'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilehi {p4\.h-p5\.h},x17,x19'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilehi {p0\.s-p1\.s},x0,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilehi {P0\.s-P1\.s},X0,X0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilehi {p14\.s-p15\.s},x0,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilehi {p0\.s-p1\.s},x30,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilehi {p0\.s-p1\.s},xzr,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilehi {p0\.s-p1\.s},x0,x30'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilehi {p0\.s-p1\.s},x0,xzr'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilehi {p4\.s-p5\.s},x17,x19'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilehi {p0\.d-p1\.d},x0,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilehi {P0\.d-P1\.d},X0,X0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilehi {p14\.d-p15\.d},x0,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilehi {p0\.d-p1\.d},x30,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilehi {p0\.d-p1\.d},xzr,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilehi {p0\.d-p1\.d},x0,x30'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilehi {p0\.d-p1\.d},x0,xzr'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilehi {p4\.d-p5\.d},x17,x19'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilehs {p0\.b-p1\.b},x0,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilehs {P0\.B-P1\.B},X0,X0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilehs {p14\.b-p15\.b},x0,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilehs {p0\.b-p1\.b},x30,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilehs {p0\.b-p1\.b},xzr,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilehs {p0\.b-p1\.b},x0,x30'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilehs {p0\.b-p1\.b},x0,xzr'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilehs {p4\.b-p5\.b},x17,x19'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilehs {p0\.h-p1\.h},x0,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilehs {P0\.h-P1\.h},X0,X0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilehs {p14\.h-p15\.h},x0,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilehs {p0\.h-p1\.h},x30,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilehs {p0\.h-p1\.h},xzr,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilehs {p0\.h-p1\.h},x0,x30'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilehs {p0\.h-p1\.h},x0,xzr'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilehs {p4\.h-p5\.h},x17,x19'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilehs {p0\.s-p1\.s},x0,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilehs {P0\.s-P1\.s},X0,X0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilehs {p14\.s-p15\.s},x0,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilehs {p0\.s-p1\.s},x30,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilehs {p0\.s-p1\.s},xzr,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilehs {p0\.s-p1\.s},x0,x30'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilehs {p0\.s-p1\.s},x0,xzr'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilehs {p4\.s-p5\.s},x17,x19'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilehs {p0\.d-p1\.d},x0,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilehs {P0\.d-P1\.d},X0,X0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilehs {p14\.d-p15\.d},x0,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilehs {p0\.d-p1\.d},x30,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilehs {p0\.d-p1\.d},xzr,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilehs {p0\.d-p1\.d},x0,x30'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilehs {p0\.d-p1\.d},x0,xzr'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilehs {p4\.d-p5\.d},x17,x19'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilele {p0\.b-p1\.b},x0,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilele {P0\.B-P1\.B},X0,X0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilele {p14\.b-p15\.b},x0,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilele {p0\.b-p1\.b},x30,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilele {p0\.b-p1\.b},xzr,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilele {p0\.b-p1\.b},x0,x30'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilele {p0\.b-p1\.b},x0,xzr'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilele {p4\.b-p5\.b},x17,x19'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilele {p0\.h-p1\.h},x0,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilele {P0\.h-P1\.h},X0,X0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilele {p14\.h-p15\.h},x0,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilele {p0\.h-p1\.h},x30,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilele {p0\.h-p1\.h},xzr,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilele {p0\.h-p1\.h},x0,x30'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilele {p0\.h-p1\.h},x0,xzr'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilele {p4\.h-p5\.h},x17,x19'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilele {p0\.s-p1\.s},x0,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilele {P0\.s-P1\.s},X0,X0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilele {p14\.s-p15\.s},x0,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilele {p0\.s-p1\.s},x30,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilele {p0\.s-p1\.s},xzr,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilele {p0\.s-p1\.s},x0,x30'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilele {p0\.s-p1\.s},x0,xzr'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilele {p4\.s-p5\.s},x17,x19'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilele {p0\.d-p1\.d},x0,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilele {P0\.d-P1\.d},X0,X0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilele {p14\.d-p15\.d},x0,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilele {p0\.d-p1\.d},x30,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilele {p0\.d-p1\.d},xzr,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilele {p0\.d-p1\.d},x0,x30'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilele {p0\.d-p1\.d},x0,xzr'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilele {p4\.d-p5\.d},x17,x19'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilelo {p0\.b-p1\.b},x0,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilelo {P0\.B-P1\.B},X0,X0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilelo {p14\.b-p15\.b},x0,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilelo {p0\.b-p1\.b},x30,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilelo {p0\.b-p1\.b},xzr,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilelo {p0\.b-p1\.b},x0,x30'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilelo {p0\.b-p1\.b},x0,xzr'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilelo {p4\.b-p5\.b},x17,x19'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilelo {p0\.h-p1\.h},x0,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilelo {P0\.h-P1\.h},X0,X0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilelo {p14\.h-p15\.h},x0,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilelo {p0\.h-p1\.h},x30,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilelo {p0\.h-p1\.h},xzr,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilelo {p0\.h-p1\.h},x0,x30'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilelo {p0\.h-p1\.h},x0,xzr'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilelo {p4\.h-p5\.h},x17,x19'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilelo {p0\.s-p1\.s},x0,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilelo {P0\.s-P1\.s},X0,X0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilelo {p14\.s-p15\.s},x0,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilelo {p0\.s-p1\.s},x30,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilelo {p0\.s-p1\.s},xzr,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilelo {p0\.s-p1\.s},x0,x30'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilelo {p0\.s-p1\.s},x0,xzr'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilelo {p4\.s-p5\.s},x17,x19'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilelo {p0\.d-p1\.d},x0,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilelo {P0\.d-P1\.d},X0,X0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilelo {p14\.d-p15\.d},x0,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilelo {p0\.d-p1\.d},x30,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilelo {p0\.d-p1\.d},xzr,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilelo {p0\.d-p1\.d},x0,x30'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilelo {p0\.d-p1\.d},x0,xzr'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilelo {p4\.d-p5\.d},x17,x19'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilels {p0\.b-p1\.b},x0,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilels {P0\.B-P1\.B},X0,X0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilels {p14\.b-p15\.b},x0,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilels {p0\.b-p1\.b},x30,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilels {p0\.b-p1\.b},xzr,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilels {p0\.b-p1\.b},x0,x30'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilels {p0\.b-p1\.b},x0,xzr'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilels {p4\.b-p5\.b},x17,x19'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilels {p0\.h-p1\.h},x0,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilels {P0\.h-P1\.h},X0,X0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilels {p14\.h-p15\.h},x0,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilels {p0\.h-p1\.h},x30,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilels {p0\.h-p1\.h},xzr,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilels {p0\.h-p1\.h},x0,x30'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilels {p0\.h-p1\.h},x0,xzr'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilels {p4\.h-p5\.h},x17,x19'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilels {p0\.s-p1\.s},x0,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilels {P0\.s-P1\.s},X0,X0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilels {p14\.s-p15\.s},x0,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilels {p0\.s-p1\.s},x30,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilels {p0\.s-p1\.s},xzr,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilels {p0\.s-p1\.s},x0,x30'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilels {p0\.s-p1\.s},x0,xzr'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilels {p4\.s-p5\.s},x17,x19'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilels {p0\.d-p1\.d},x0,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilels {P0\.d-P1\.d},X0,X0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilels {p14\.d-p15\.d},x0,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilels {p0\.d-p1\.d},x30,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilels {p0\.d-p1\.d},xzr,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilels {p0\.d-p1\.d},x0,x30'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilels {p0\.d-p1\.d},x0,xzr'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilels {p4\.d-p5\.d},x17,x19'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilelt {p0\.b-p1\.b},x0,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilelt {P0\.B-P1\.B},X0,X0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilelt {p14\.b-p15\.b},x0,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilelt {p0\.b-p1\.b},x30,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilelt {p0\.b-p1\.b},xzr,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilelt {p0\.b-p1\.b},x0,x30'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilelt {p0\.b-p1\.b},x0,xzr'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilelt {p4\.b-p5\.b},x17,x19'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilelt {p0\.h-p1\.h},x0,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilelt {P0\.h-P1\.h},X0,X0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilelt {p14\.h-p15\.h},x0,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilelt {p0\.h-p1\.h},x30,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilelt {p0\.h-p1\.h},xzr,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilelt {p0\.h-p1\.h},x0,x30'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilelt {p0\.h-p1\.h},x0,xzr'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilelt {p4\.h-p5\.h},x17,x19'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilelt {p0\.s-p1\.s},x0,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilelt {P0\.s-P1\.s},X0,X0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilelt {p14\.s-p15\.s},x0,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilelt {p0\.s-p1\.s},x30,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilelt {p0\.s-p1\.s},xzr,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilelt {p0\.s-p1\.s},x0,x30'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilelt {p0\.s-p1\.s},x0,xzr'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilelt {p4\.s-p5\.s},x17,x19'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilelt {p0\.d-p1\.d},x0,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilelt {P0\.d-P1\.d},X0,X0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilelt {p14\.d-p15\.d},x0,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilelt {p0\.d-p1\.d},x30,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilelt {p0\.d-p1\.d},xzr,x0'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilelt {p0\.d-p1\.d},x0,x30'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilelt {p0\.d-p1\.d},x0,xzr'
-[^ :]+:[0-9]+: Error: selected processor does not support `whilelt {p4\.d-p5\.d},x17,x19'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege { ?p0\.b ?- ?p1\.b ?},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege { ?P0\.B ?- ?P1\.B ?},X0,X0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege { ?p14\.b ?- ?p15\.b ?},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege { ?p0\.b ?- ?p1\.b ?},x30,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege { ?p0\.b ?- ?p1\.b ?},xzr,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege { ?p0\.b ?- ?p1\.b ?},x0,x30'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege { ?p0\.b ?- ?p1\.b ?},x0,xzr'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege { ?p4\.b ?- ?p5\.b ?},x17,x19'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege { ?p0\.h ?- ?p1\.h ?},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege { ?P0\.h ?- ?P1\.h ?},X0,X0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege { ?p14\.h ?- ?p15\.h ?},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege { ?p0\.h ?- ?p1\.h ?},x30,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege { ?p0\.h ?- ?p1\.h ?},xzr,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege { ?p0\.h ?- ?p1\.h ?},x0,x30'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege { ?p0\.h ?- ?p1\.h ?},x0,xzr'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege { ?p4\.h ?- ?p5\.h ?},x17,x19'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege { ?p0\.s ?- ?p1\.s ?},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege { ?P0\.s ?- ?P1\.s ?},X0,X0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege { ?p14\.s ?- ?p15\.s ?},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege { ?p0\.s ?- ?p1\.s ?},x30,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege { ?p0\.s ?- ?p1\.s ?},xzr,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege { ?p0\.s ?- ?p1\.s ?},x0,x30'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege { ?p0\.s ?- ?p1\.s ?},x0,xzr'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege { ?p4\.s ?- ?p5\.s ?},x17,x19'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege { ?p0\.d ?- ?p1\.d ?},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege { ?P0\.d ?- ?P1\.d ?},X0,X0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege { ?p14\.d ?- ?p15\.d ?},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege { ?p0\.d ?- ?p1\.d ?},x30,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege { ?p0\.d ?- ?p1\.d ?},xzr,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege { ?p0\.d ?- ?p1\.d ?},x0,x30'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege { ?p0\.d ?- ?p1\.d ?},x0,xzr'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege { ?p4\.d ?- ?p5\.d ?},x17,x19'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt { ?p0\.b ?- ?p1\.b ?},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt { ?P0\.B ?- ?P1\.B ?},X0,X0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt { ?p14\.b ?- ?p15\.b ?},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt { ?p0\.b ?- ?p1\.b ?},x30,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt { ?p0\.b ?- ?p1\.b ?},xzr,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt { ?p0\.b ?- ?p1\.b ?},x0,x30'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt { ?p0\.b ?- ?p1\.b ?},x0,xzr'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt { ?p4\.b ?- ?p5\.b ?},x17,x19'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt { ?p0\.h ?- ?p1\.h ?},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt { ?P0\.h ?- ?P1\.h ?},X0,X0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt { ?p14\.h ?- ?p15\.h ?},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt { ?p0\.h ?- ?p1\.h ?},x30,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt { ?p0\.h ?- ?p1\.h ?},xzr,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt { ?p0\.h ?- ?p1\.h ?},x0,x30'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt { ?p0\.h ?- ?p1\.h ?},x0,xzr'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt { ?p4\.h ?- ?p5\.h ?},x17,x19'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt { ?p0\.s ?- ?p1\.s ?},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt { ?P0\.s ?- ?P1\.s ?},X0,X0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt { ?p14\.s ?- ?p15\.s ?},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt { ?p0\.s ?- ?p1\.s ?},x30,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt { ?p0\.s ?- ?p1\.s ?},xzr,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt { ?p0\.s ?- ?p1\.s ?},x0,x30'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt { ?p0\.s ?- ?p1\.s ?},x0,xzr'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt { ?p4\.s ?- ?p5\.s ?},x17,x19'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt { ?p0\.d ?- ?p1\.d ?},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt { ?P0\.d ?- ?P1\.d ?},X0,X0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt { ?p14\.d ?- ?p15\.d ?},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt { ?p0\.d ?- ?p1\.d ?},x30,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt { ?p0\.d ?- ?p1\.d ?},xzr,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt { ?p0\.d ?- ?p1\.d ?},x0,x30'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt { ?p0\.d ?- ?p1\.d ?},x0,xzr'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt { ?p4\.d ?- ?p5\.d ?},x17,x19'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi { ?p0\.b ?- ?p1\.b ?},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi { ?P0\.B ?- ?P1\.B ?},X0,X0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi { ?p14\.b ?- ?p15\.b ?},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi { ?p0\.b ?- ?p1\.b ?},x30,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi { ?p0\.b ?- ?p1\.b ?},xzr,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi { ?p0\.b ?- ?p1\.b ?},x0,x30'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi { ?p0\.b ?- ?p1\.b ?},x0,xzr'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi { ?p4\.b ?- ?p5\.b ?},x17,x19'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi { ?p0\.h ?- ?p1\.h ?},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi { ?P0\.h ?- ?P1\.h ?},X0,X0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi { ?p14\.h ?- ?p15\.h ?},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi { ?p0\.h ?- ?p1\.h ?},x30,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi { ?p0\.h ?- ?p1\.h ?},xzr,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi { ?p0\.h ?- ?p1\.h ?},x0,x30'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi { ?p0\.h ?- ?p1\.h ?},x0,xzr'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi { ?p4\.h ?- ?p5\.h ?},x17,x19'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi { ?p0\.s ?- ?p1\.s ?},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi { ?P0\.s ?- ?P1\.s ?},X0,X0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi { ?p14\.s ?- ?p15\.s ?},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi { ?p0\.s ?- ?p1\.s ?},x30,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi { ?p0\.s ?- ?p1\.s ?},xzr,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi { ?p0\.s ?- ?p1\.s ?},x0,x30'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi { ?p0\.s ?- ?p1\.s ?},x0,xzr'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi { ?p4\.s ?- ?p5\.s ?},x17,x19'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi { ?p0\.d ?- ?p1\.d ?},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi { ?P0\.d ?- ?P1\.d ?},X0,X0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi { ?p14\.d ?- ?p15\.d ?},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi { ?p0\.d ?- ?p1\.d ?},x30,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi { ?p0\.d ?- ?p1\.d ?},xzr,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi { ?p0\.d ?- ?p1\.d ?},x0,x30'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi { ?p0\.d ?- ?p1\.d ?},x0,xzr'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi { ?p4\.d ?- ?p5\.d ?},x17,x19'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs { ?p0\.b ?- ?p1\.b ?},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs { ?P0\.B ?- ?P1\.B ?},X0,X0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs { ?p14\.b ?- ?p15\.b ?},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs { ?p0\.b ?- ?p1\.b ?},x30,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs { ?p0\.b ?- ?p1\.b ?},xzr,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs { ?p0\.b ?- ?p1\.b ?},x0,x30'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs { ?p0\.b ?- ?p1\.b ?},x0,xzr'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs { ?p4\.b ?- ?p5\.b ?},x17,x19'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs { ?p0\.h ?- ?p1\.h ?},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs { ?P0\.h ?- ?P1\.h ?},X0,X0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs { ?p14\.h ?- ?p15\.h ?},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs { ?p0\.h ?- ?p1\.h ?},x30,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs { ?p0\.h ?- ?p1\.h ?},xzr,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs { ?p0\.h ?- ?p1\.h ?},x0,x30'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs { ?p0\.h ?- ?p1\.h ?},x0,xzr'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs { ?p4\.h ?- ?p5\.h ?},x17,x19'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs { ?p0\.s ?- ?p1\.s ?},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs { ?P0\.s ?- ?P1\.s ?},X0,X0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs { ?p14\.s ?- ?p15\.s ?},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs { ?p0\.s ?- ?p1\.s ?},x30,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs { ?p0\.s ?- ?p1\.s ?},xzr,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs { ?p0\.s ?- ?p1\.s ?},x0,x30'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs { ?p0\.s ?- ?p1\.s ?},x0,xzr'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs { ?p4\.s ?- ?p5\.s ?},x17,x19'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs { ?p0\.d ?- ?p1\.d ?},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs { ?P0\.d ?- ?P1\.d ?},X0,X0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs { ?p14\.d ?- ?p15\.d ?},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs { ?p0\.d ?- ?p1\.d ?},x30,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs { ?p0\.d ?- ?p1\.d ?},xzr,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs { ?p0\.d ?- ?p1\.d ?},x0,x30'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs { ?p0\.d ?- ?p1\.d ?},x0,xzr'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs { ?p4\.d ?- ?p5\.d ?},x17,x19'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele { ?p0\.b ?- ?p1\.b ?},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele { ?P0\.B ?- ?P1\.B ?},X0,X0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele { ?p14\.b ?- ?p15\.b ?},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele { ?p0\.b ?- ?p1\.b ?},x30,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele { ?p0\.b ?- ?p1\.b ?},xzr,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele { ?p0\.b ?- ?p1\.b ?},x0,x30'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele { ?p0\.b ?- ?p1\.b ?},x0,xzr'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele { ?p4\.b ?- ?p5\.b ?},x17,x19'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele { ?p0\.h ?- ?p1\.h ?},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele { ?P0\.h ?- ?P1\.h ?},X0,X0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele { ?p14\.h ?- ?p15\.h ?},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele { ?p0\.h ?- ?p1\.h ?},x30,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele { ?p0\.h ?- ?p1\.h ?},xzr,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele { ?p0\.h ?- ?p1\.h ?},x0,x30'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele { ?p0\.h ?- ?p1\.h ?},x0,xzr'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele { ?p4\.h ?- ?p5\.h ?},x17,x19'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele { ?p0\.s ?- ?p1\.s ?},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele { ?P0\.s ?- ?P1\.s ?},X0,X0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele { ?p14\.s ?- ?p15\.s ?},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele { ?p0\.s ?- ?p1\.s ?},x30,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele { ?p0\.s ?- ?p1\.s ?},xzr,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele { ?p0\.s ?- ?p1\.s ?},x0,x30'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele { ?p0\.s ?- ?p1\.s ?},x0,xzr'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele { ?p4\.s ?- ?p5\.s ?},x17,x19'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele { ?p0\.d ?- ?p1\.d ?},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele { ?P0\.d ?- ?P1\.d ?},X0,X0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele { ?p14\.d ?- ?p15\.d ?},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele { ?p0\.d ?- ?p1\.d ?},x30,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele { ?p0\.d ?- ?p1\.d ?},xzr,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele { ?p0\.d ?- ?p1\.d ?},x0,x30'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele { ?p0\.d ?- ?p1\.d ?},x0,xzr'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele { ?p4\.d ?- ?p5\.d ?},x17,x19'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo { ?p0\.b ?- ?p1\.b ?},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo { ?P0\.B ?- ?P1\.B ?},X0,X0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo { ?p14\.b ?- ?p15\.b ?},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo { ?p0\.b ?- ?p1\.b ?},x30,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo { ?p0\.b ?- ?p1\.b ?},xzr,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo { ?p0\.b ?- ?p1\.b ?},x0,x30'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo { ?p0\.b ?- ?p1\.b ?},x0,xzr'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo { ?p4\.b ?- ?p5\.b ?},x17,x19'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo { ?p0\.h ?- ?p1\.h ?},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo { ?P0\.h ?- ?P1\.h ?},X0,X0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo { ?p14\.h ?- ?p15\.h ?},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo { ?p0\.h ?- ?p1\.h ?},x30,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo { ?p0\.h ?- ?p1\.h ?},xzr,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo { ?p0\.h ?- ?p1\.h ?},x0,x30'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo { ?p0\.h ?- ?p1\.h ?},x0,xzr'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo { ?p4\.h ?- ?p5\.h ?},x17,x19'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo { ?p0\.s ?- ?p1\.s ?},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo { ?P0\.s ?- ?P1\.s ?},X0,X0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo { ?p14\.s ?- ?p15\.s ?},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo { ?p0\.s ?- ?p1\.s ?},x30,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo { ?p0\.s ?- ?p1\.s ?},xzr,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo { ?p0\.s ?- ?p1\.s ?},x0,x30'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo { ?p0\.s ?- ?p1\.s ?},x0,xzr'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo { ?p4\.s ?- ?p5\.s ?},x17,x19'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo { ?p0\.d ?- ?p1\.d ?},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo { ?P0\.d ?- ?P1\.d ?},X0,X0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo { ?p14\.d ?- ?p15\.d ?},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo { ?p0\.d ?- ?p1\.d ?},x30,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo { ?p0\.d ?- ?p1\.d ?},xzr,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo { ?p0\.d ?- ?p1\.d ?},x0,x30'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo { ?p0\.d ?- ?p1\.d ?},x0,xzr'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo { ?p4\.d ?- ?p5\.d ?},x17,x19'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels { ?p0\.b ?- ?p1\.b ?},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels { ?P0\.B ?- ?P1\.B ?},X0,X0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels { ?p14\.b ?- ?p15\.b ?},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels { ?p0\.b ?- ?p1\.b ?},x30,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels { ?p0\.b ?- ?p1\.b ?},xzr,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels { ?p0\.b ?- ?p1\.b ?},x0,x30'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels { ?p0\.b ?- ?p1\.b ?},x0,xzr'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels { ?p4\.b ?- ?p5\.b ?},x17,x19'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels { ?p0\.h ?- ?p1\.h ?},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels { ?P0\.h ?- ?P1\.h ?},X0,X0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels { ?p14\.h ?- ?p15\.h ?},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels { ?p0\.h ?- ?p1\.h ?},x30,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels { ?p0\.h ?- ?p1\.h ?},xzr,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels { ?p0\.h ?- ?p1\.h ?},x0,x30'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels { ?p0\.h ?- ?p1\.h ?},x0,xzr'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels { ?p4\.h ?- ?p5\.h ?},x17,x19'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels { ?p0\.s ?- ?p1\.s ?},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels { ?P0\.s ?- ?P1\.s ?},X0,X0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels { ?p14\.s ?- ?p15\.s ?},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels { ?p0\.s ?- ?p1\.s ?},x30,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels { ?p0\.s ?- ?p1\.s ?},xzr,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels { ?p0\.s ?- ?p1\.s ?},x0,x30'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels { ?p0\.s ?- ?p1\.s ?},x0,xzr'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels { ?p4\.s ?- ?p5\.s ?},x17,x19'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels { ?p0\.d ?- ?p1\.d ?},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels { ?P0\.d ?- ?P1\.d ?},X0,X0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels { ?p14\.d ?- ?p15\.d ?},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels { ?p0\.d ?- ?p1\.d ?},x30,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels { ?p0\.d ?- ?p1\.d ?},xzr,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels { ?p0\.d ?- ?p1\.d ?},x0,x30'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels { ?p0\.d ?- ?p1\.d ?},x0,xzr'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels { ?p4\.d ?- ?p5\.d ?},x17,x19'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt { ?p0\.b ?- ?p1\.b ?},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt { ?P0\.B ?- ?P1\.B ?},X0,X0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt { ?p14\.b ?- ?p15\.b ?},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt { ?p0\.b ?- ?p1\.b ?},x30,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt { ?p0\.b ?- ?p1\.b ?},xzr,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt { ?p0\.b ?- ?p1\.b ?},x0,x30'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt { ?p0\.b ?- ?p1\.b ?},x0,xzr'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt { ?p4\.b ?- ?p5\.b ?},x17,x19'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt { ?p0\.h ?- ?p1\.h ?},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt { ?P0\.h ?- ?P1\.h ?},X0,X0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt { ?p14\.h ?- ?p15\.h ?},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt { ?p0\.h ?- ?p1\.h ?},x30,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt { ?p0\.h ?- ?p1\.h ?},xzr,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt { ?p0\.h ?- ?p1\.h ?},x0,x30'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt { ?p0\.h ?- ?p1\.h ?},x0,xzr'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt { ?p4\.h ?- ?p5\.h ?},x17,x19'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt { ?p0\.s ?- ?p1\.s ?},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt { ?P0\.s ?- ?P1\.s ?},X0,X0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt { ?p14\.s ?- ?p15\.s ?},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt { ?p0\.s ?- ?p1\.s ?},x30,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt { ?p0\.s ?- ?p1\.s ?},xzr,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt { ?p0\.s ?- ?p1\.s ?},x0,x30'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt { ?p0\.s ?- ?p1\.s ?},x0,xzr'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt { ?p4\.s ?- ?p5\.s ?},x17,x19'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt { ?p0\.d ?- ?p1\.d ?},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt { ?P0\.d ?- ?P1\.d ?},X0,X0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt { ?p14\.d ?- ?p15\.d ?},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt { ?p0\.d ?- ?p1\.d ?},x30,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt { ?p0\.d ?- ?p1\.d ?},xzr,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt { ?p0\.d ?- ?p1\.d ?},x0,x30'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt { ?p0\.d ?- ?p1\.d ?},x0,xzr'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt { ?p4\.d ?- ?p5\.d ?},x17,x19'
diff --git a/gas/testsuite/gas/aarch64/sve2-sme2-5-invalid.l b/gas/testsuite/gas/aarch64/sve2-sme2-5-invalid.l
index e08001c..4b5d0e5 100644
--- a/gas/testsuite/gas/aarch64/sve2-sme2-5-invalid.l
+++ b/gas/testsuite/gas/aarch64/sve2-sme2-5-invalid.l
@@ -1,27 +1,27 @@
 [^ :]+: Assembler messages:
-[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `sqcvtn 0,{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `sqcvtn 0,{ ?z0\.s ?- ?z1\.s ?}'
 [^ :]+:[0-9]+: Error: expected '{' at operand 2 -- `sqcvtn z0\.h,0'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqcvtn z0\.h,{z1\.s-z2\.s}'
-[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `sqcvtun z0\.h,{z0\.s-z2\.s}'
-[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `sqcvtn z0\.h,{z0\.s-z3\.s}'
-[^ :]+:[0-9]+: Error: operand mismatch -- `sqcvtun z0\.s,{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqcvtn z0\.h,{ ?z1\.s ?- ?z2\.s ?}'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `sqcvtun z0\.h,{ ?z0\.s ?- ?z2\.s ?}'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `sqcvtn z0\.h,{ ?z0\.s ?- ?z3\.s ?}'
+[^ :]+:[0-9]+: Error: operand mismatch -- `sqcvtun z0\.s,{ ?z0\.s ?- ?z3\.s ?}'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	sqcvtun z0\.b, {z0\.s-z3\.s}
 [^ :]+:[0-9]+: Info:    other valid variant\(s\):
 [^ :]+:[0-9]+: Info:    	sqcvtun z0\.h, {z0\.d-z3\.d}
-[^ :]+:[0-9]+: Error: operand mismatch -- `sqcvtn z0\.s,{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: operand mismatch -- `sqcvtn z0\.s,{ ?z0\.h ?- ?z3\.h ?}'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	sqcvtn z0\.b, {z0\.s-z3\.s}
 [^ :]+:[0-9]+: Info:    other valid variant\(s\):
 [^ :]+:[0-9]+: Info:    	sqcvtn z0\.h, {z0\.d-z3\.d}
-[^ :]+:[0-9]+: Error: operand mismatch -- `sqcvtun z0\.b,{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: operand mismatch -- `sqcvtun z0\.b,{ ?z0\.h ?- ?z1\.h ?}'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	sqcvtun z0\.b, {z0\.s-z1\.s}
 [^ :]+:[0-9]+: Info:    other valid variant\(s\):
 [^ :]+:[0-9]+: Info:    	sqcvtun z0\.h, {z0\.d-z1\.d}
-[^ :]+:[0-9]+: Error: operand mismatch -- `sqcvtn z0\.s,{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: operand mismatch -- `sqcvtn z0\.s,{ ?z0\.d ?- ?z1\.d ?}'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	sqcvtn z0\.h, {z0\.d-z1\.d}
 [^ :]+:[0-9]+: Info:    other valid variant\(s\):
 [^ :]+:[0-9]+: Info:    	sqcvtn z0\.b, {z0\.s-z1\.s}
-[^ :]+:[0-9]+: Warning: SVE `movprfx' compatible instruction expected -- `sqcvtn z0\.h,{z2\.s-z3\.s}'
+[^ :]+:[0-9]+: Warning: SVE `movprfx' compatible instruction expected -- `sqcvtn z0\.h,{ ?z2\.s ?- ?z3\.s ?}'
diff --git a/gas/testsuite/gas/aarch64/sve2-sme2-5-noarch.l b/gas/testsuite/gas/aarch64/sve2-sme2-5-noarch.l
index de50d04..f1bf93a 100644
--- a/gas/testsuite/gas/aarch64/sve2-sme2-5-noarch.l
+++ b/gas/testsuite/gas/aarch64/sve2-sme2-5-noarch.l
@@ -1,13 +1,13 @@
 [^ :]+: Assembler messages:
-[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtn z0\.h,{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtn z31\.h,{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtn z0\.h,{z30\.s-z31\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtn z14\.h,{z20\.s-z21\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtun z0\.h,{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtun z31\.h,{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtun z0\.h,{z30\.s-z31\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtun z26\.h,{z14\.s-z15\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `uqcvtn z0\.h,{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `uqcvtn z31\.h,{z0\.s-z1\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `uqcvtn z0\.h,{z30\.s-z31\.s}'
-[^ :]+:[0-9]+: Error: selected processor does not support `uqcvtn z29\.h,{z6\.s-z7\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtn z0\.h,{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtn z31\.h,{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtn z0\.h,{ ?z30\.s ?- ?z31\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtn z14\.h,{ ?z20\.s ?- ?z21\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtun z0\.h,{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtun z31\.h,{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtun z0\.h,{ ?z30\.s ?- ?z31\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtun z26\.h,{ ?z14\.s ?- ?z15\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `uqcvtn z0\.h,{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `uqcvtn z31\.h,{ ?z0\.s ?- ?z1\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `uqcvtn z0\.h,{ ?z30\.s ?- ?z31\.s ?}'
+[^ :]+:[0-9]+: Error: selected processor does not support `uqcvtn z29\.h,{ ?z6\.s ?- ?z7\.s ?}'
diff --git a/gas/testsuite/gas/aarch64/sve2-sme2-6-invalid.l b/gas/testsuite/gas/aarch64/sve2-sme2-6-invalid.l
index 0f70210..7792afa 100644
--- a/gas/testsuite/gas/aarch64/sve2-sme2-6-invalid.l
+++ b/gas/testsuite/gas/aarch64/sve2-sme2-6-invalid.l
@@ -1,20 +1,20 @@
 [^ :]+: Assembler messages:
-[^ :]+:[0-9]+: Error: expected a register at operand 1 -- `sqrshrn 0,{z0\.s-z1\.s},#1'
+[^ :]+:[0-9]+: Error: expected a register at operand 1 -- `sqrshrn 0,{ ?z0\.s ?- ?z1\.s ?},#1'
 [^ :]+:[0-9]+: Error: expected '{' at operand 2 -- `sqrshrn z0\.h,0,#1'
-[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqrshrn z0\.h,{z1\.s-z2\.s},#1'
-[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `sqrshrn z0\.h,{z0\.s-z2\.s},#1'
-[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `sqrshrn z0\.h,{z0\.s-z3\.s},#1'
-[^ :]+:[0-9]+: Error: immediate value out of range 1 to 16 at operand 3 -- `sqrshrn z0\.h,{z0\.s-z1\.s},#0'
-[^ :]+:[0-9]+: Error: immediate value out of range 1 to 16 at operand 3 -- `sqrshrn z0\.h,{z0\.s-z1\.s},#17'
-[^ :]+:[0-9]+: Error: immediate operand required at operand 3 -- `sqrshrn z0\.h,{z0\.s-z1\.s},x0'
-[^ :]+:[0-9]+: Error: operand mismatch -- `sqrshrn z0\.b,{z0\.h-z1\.h},#1'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqrshrn z0\.h,{ ?z1\.s ?- ?z2\.s ?},#1'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `sqrshrn z0\.h,{ ?z0\.s ?- ?z2\.s ?},#1'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `sqrshrn z0\.h,{ ?z0\.s ?- ?z3\.s ?},#1'
+[^ :]+:[0-9]+: Error: immediate value out of range 1 to 16 at operand 3 -- `sqrshrn z0\.h,{ ?z0\.s ?- ?z1\.s ?},#0'
+[^ :]+:[0-9]+: Error: immediate value out of range 1 to 16 at operand 3 -- `sqrshrn z0\.h,{ ?z0\.s ?- ?z1\.s ?},#17'
+[^ :]+:[0-9]+: Error: immediate operand required at operand 3 -- `sqrshrn z0\.h,{ ?z0\.s ?- ?z1\.s ?},x0'
+[^ :]+:[0-9]+: Error: operand mismatch -- `sqrshrn z0\.b,{ ?z0\.h ?- ?z1\.h ?},#1'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	sqrshrn z0\.b, {z0\.s-z1\.s}, #1
 [^ :]+:[0-9]+: Info:    other valid variant\(s\):
 [^ :]+:[0-9]+: Info:    	sqrshrn z0\.h, {z0\.d-z1\.d}, #1
-[^ :]+:[0-9]+: Error: operand mismatch -- `sqrshrn z0\.s,{z0\.d-z1\.d},#1'
+[^ :]+:[0-9]+: Error: operand mismatch -- `sqrshrn z0\.s,{ ?z0\.d ?- ?z1\.d ?},#1'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	sqrshrn z0\.h, {z0\.d-z1\.d}, #1
 [^ :]+:[0-9]+: Info:    other valid variant\(s\):
 [^ :]+:[0-9]+: Info:    	sqrshrn z0\.b, {z0\.s-z1\.s}, #1
-[^ :]+:[0-9]+: Warning: SVE `movprfx' compatible instruction expected -- `sqrshrn z0\.h,{z2\.s-z3\.s},#1'
+[^ :]+:[0-9]+: Warning: SVE `movprfx' compatible instruction expected -- `sqrshrn z0\.h,{ ?z2\.s ?- ?z3\.s ?},#1'
diff --git a/gas/testsuite/gas/aarch64/sve2-sme2-6-noarch.l b/gas/testsuite/gas/aarch64/sve2-sme2-6-noarch.l
index 07f95d9..ee01e80 100644
--- a/gas/testsuite/gas/aarch64/sve2-sme2-6-noarch.l
+++ b/gas/testsuite/gas/aarch64/sve2-sme2-6-noarch.l
@@ -1,16 +1,16 @@
 [^ :]+: Assembler messages:
-[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrn z0\.h,{z0\.s-z1\.s},#1'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrn z31\.h,{z0\.s-z1\.s},#1'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrn z0\.h,{z30\.s-z31\.s},#1'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrn z0\.h,{z0\.s-z1\.s},#16'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrn z1\.h,{z26\.s-z27\.s},#14'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrun z0\.h,{z0\.s-z1\.s},#1'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrun z31\.h,{z0\.s-z1\.s},#1'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrun z0\.h,{z30\.s-z31\.s},#1'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrun z0\.h,{z0\.s-z1\.s},#16'
-[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrun z15\.h,{z6\.s-z7\.s},#9'
-[^ :]+:[0-9]+: Error: selected processor does not support `uqrshrn z0\.h,{z0\.s-z1\.s},#1'
-[^ :]+:[0-9]+: Error: selected processor does not support `uqrshrn z31\.h,{z0\.s-z1\.s},#1'
-[^ :]+:[0-9]+: Error: selected processor does not support `uqrshrn z0\.h,{z30\.s-z31\.s},#1'
-[^ :]+:[0-9]+: Error: selected processor does not support `uqrshrn z0\.h,{z0\.s-z1\.s},#16'
-[^ :]+:[0-9]+: Error: selected processor does not support `uqrshrn z18\.h,{z2\.s-z3\.s},#6'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrn z0\.h,{ ?z0\.s ?- ?z1\.s ?},#1'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrn z31\.h,{ ?z0\.s ?- ?z1\.s ?},#1'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrn z0\.h,{ ?z30\.s ?- ?z31\.s ?},#1'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrn z0\.h,{ ?z0\.s ?- ?z1\.s ?},#16'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrn z1\.h,{ ?z26\.s ?- ?z27\.s ?},#14'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrun z0\.h,{ ?z0\.s ?- ?z1\.s ?},#1'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrun z31\.h,{ ?z0\.s ?- ?z1\.s ?},#1'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrun z0\.h,{ ?z30\.s ?- ?z31\.s ?},#1'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrun z0\.h,{ ?z0\.s ?- ?z1\.s ?},#16'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrun z15\.h,{ ?z6\.s ?- ?z7\.s ?},#9'
+[^ :]+:[0-9]+: Error: selected processor does not support `uqrshrn z0\.h,{ ?z0\.s ?- ?z1\.s ?},#1'
+[^ :]+:[0-9]+: Error: selected processor does not support `uqrshrn z31\.h,{ ?z0\.s ?- ?z1\.s ?},#1'
+[^ :]+:[0-9]+: Error: selected processor does not support `uqrshrn z0\.h,{ ?z30\.s ?- ?z31\.s ?},#1'
+[^ :]+:[0-9]+: Error: selected processor does not support `uqrshrn z0\.h,{ ?z0\.s ?- ?z1\.s ?},#16'
+[^ :]+:[0-9]+: Error: selected processor does not support `uqrshrn z18\.h,{ ?z2\.s ?- ?z3\.s ?},#6'
diff --git a/gas/testsuite/gas/aarch64/sve2-sme2-7-invalid.l b/gas/testsuite/gas/aarch64/sve2-sme2-7-invalid.l
index 69e7ac8..afe2a2b 100644
--- a/gas/testsuite/gas/aarch64/sve2-sme2-7-invalid.l
+++ b/gas/testsuite/gas/aarch64/sve2-sme2-7-invalid.l
@@ -8,7 +8,7 @@
 [^ :]+:[0-9]+: Info:    other valid variant\(s\):
 [^ :]+:[0-9]+: Info:    	fclamp z0\.s, z0\.s, z0\.s
 [^ :]+:[0-9]+: Info:    	fclamp z0\.d, z0\.d, z0\.d
-[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 2 -- `fclamp z0\.h,{z0\.h,z0\.h}'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 2 -- `fclamp z0\.h,{ ?z0\.h,z0\.h ?}'
 [^ :]+:[0-9]+: Error: operand mismatch -- `fclamp z0\.s,z0\.h,z0\.h'
 [^ :]+:[0-9]+: Info:    did you mean this\?
 [^ :]+:[0-9]+: Info:    	fclamp z0\.h, z0\.h, z0\.h
diff --git a/gas/testsuite/gas/aarch64/sve2p1-4-invalid.l b/gas/testsuite/gas/aarch64/sve2p1-4-invalid.l
index c903664..6305000 100644
--- a/gas/testsuite/gas/aarch64/sve2p1-4-invalid.l
+++ b/gas/testsuite/gas/aarch64/sve2p1-4-invalid.l
@@ -1,8 +1,8 @@
 .*: Assembler messages:
-.*: Error: p0-p7 expected at operand 2 -- `ld1q {Z0.Q},P8/Z,\[Z0.D,x0\]'
-.*: Error: invalid base register at operand 3 -- `ld1q {Z0.Q},P0/Z,\[Z31.Q,x0\]'
-.*: Error: invalid addressing mode at operand 3 -- `ld1q {Z0.Q},P0/Z,\[Z0.D,x31\]'
-.*: Error: operand mismatch -- `ld1q {Z31.D},P7/Z,\[Z31.D,x30\]'
+.*: Error: p0-p7 expected at operand 2 -- `ld1q { ?Z0.Q ?},P8/Z,\[Z0.D,x0\]'
+.*: Error: invalid base register at operand 3 -- `ld1q { ?Z0.Q ?},P0/Z,\[Z31.Q,x0\]'
+.*: Error: invalid addressing mode at operand 3 -- `ld1q { ?Z0.Q ?},P0/Z,\[Z0.D,x31\]'
+.*: Error: operand mismatch -- `ld1q { ?Z31.D ?},P7/Z,\[Z31.D,x30\]'
 .*: Info:    did you mean this\?
 .*: Info:    	ld1q {z31.q}, p7/z, \[z31.d, x30\]
 .*: Error: invalid offset register at operand 3 -- `ld1q Z0.Q,P0/Z,\[Z0.D,sp\]'
@@ -33,39 +33,39 @@
 .*: Error: type mismatch in vector register list at operand 1 -- `ld4q {Z28.Q,Z29.Q,Z30.D,Z31.Q},p7/Z,\[x30,#-4,MUL VL\]'
 .*: Error: type mismatch in vector register list at operand 1 -- `ld4q {Z28.Q,Z29.Q,Z30.D,Z31.Q},p7/Z,\[x30,#-100,MUL VL\]'
 .*: Error: type mismatch in vector register list at operand 1 -- `ld4q {Z28.Q,Z29.Q,Z30.D,Z31.Q},p7/Z,\[xzr,#-100,MUL VL\]'
-.*: Error: invalid addressing mode at operand 3 -- `ld2q {Z0.Q,Z1.Q},p0/Z,\[x0,x0,LSL#3\]'
-.*: Error: invalid addressing mode at operand 3 -- `ld2q {Z0.Q,Z1.Q},p0/Z,\[sp,x0,LSL#3\]'
-.*: Error: invalid offset register at operand 3 -- `ld2q {Z0.Q,Z1.Q},p0/Z,\[x0,sp,LSL#3\]'
-.*: Error: invalid register list at operand 1 -- `ld2q {Z31.Q,Z31.Q},p0/Z,\[x0,x0,LSL#4\]'
-.*: Error: index register xzr is not allowed at operand 3 -- `ld2q {Z31.Q,Z0.Q},p0/Z,\[x0,xzr,LSL#2\]'
-.*: Error: p0-p7 expected at operand 2 -- `ld2q {Z0.Q,Z1.Q},p8/Z,\[x0,x0,LSL#4\]'
-.*: Error: invalid base register at operand 3 -- `ld2q {Z0.Q,Z1.Q},p0/Z,\[x31,x0,LSL#4\]'
-.*: Error: only 'MUL VL' is permitted at operand 3 -- `ld2q {Z0.Q,Z1.Q},p0/Z,\[x0,x31,LSL#4\]'
-.*: Error: invalid base register at operand 3 -- `ld2q {Z30.Q,Z31.Q},p7/Z,\[x31,x31,LSL#4\]'
+.*: Error: invalid addressing mode at operand 3 -- `ld2q {Z0.Q,Z1.Q},p0/Z,\[x0,x0,LSL ?#3\]'
+.*: Error: invalid addressing mode at operand 3 -- `ld2q {Z0.Q,Z1.Q},p0/Z,\[sp,x0,LSL ?#3\]'
+.*: Error: invalid offset register at operand 3 -- `ld2q {Z0.Q,Z1.Q},p0/Z,\[x0,sp,LSL ?#3\]'
+.*: Error: invalid register list at operand 1 -- `ld2q {Z31.Q,Z31.Q},p0/Z,\[x0,x0,LSL ?#4\]'
+.*: Error: index register xzr is not allowed at operand 3 -- `ld2q {Z31.Q,Z0.Q},p0/Z,\[x0,xzr,LSL ?#2\]'
+.*: Error: p0-p7 expected at operand 2 -- `ld2q {Z0.Q,Z1.Q},p8/Z,\[x0,x0,LSL ?#4\]'
+.*: Error: invalid base register at operand 3 -- `ld2q {Z0.Q,Z1.Q},p0/Z,\[x31,x0,LSL ?#4\]'
+.*: Error: only 'MUL VL' is permitted at operand 3 -- `ld2q {Z0.Q,Z1.Q},p0/Z,\[x0,x31,LSL ?#4\]'
+.*: Error: invalid base register at operand 3 -- `ld2q {Z30.Q,Z31.Q},p7/Z,\[x31,x31,LSL ?#4\]'
 .*: Error: shift expression expected at operand 3 -- `ld3q {Z0.Q,Z1.Q,Z2.Q},p0/Z,\[x0,x0,#4\]'
 .*: Error: shift expression expected at operand 3 -- `ld3q {Z0.Q,Z1.Q,Z2.Q},p0/Z,\[sp,x0,#4\]'
 .*: Error: invalid offset register at operand 3 -- `ld3q {Z0.Q,Z1.Q,Z2.Q},p0/Z,\[x0,sp,#4\]'
-.*: Error: invalid addressing mode at operand 3 -- `ld3q {Z29.Q,Z30.Q,Z31.Q},p0/Z,\[x0,x0,LSL#2\]'
-.*: Error: index register xzr is not allowed at operand 3 -- `ld3q {Z29.Q,Z30.Q,Z31.Q},p0/Z,\[x0,xzr,LSL#3\]'
-.*: Error: operand mismatch -- `ld3q {Z0.Q,Z1.Q,Z2.Q},p7/M,\[x0,x0,LSL#4\]'
+.*: Error: invalid addressing mode at operand 3 -- `ld3q {Z29.Q,Z30.Q,Z31.Q},p0/Z,\[x0,x0,LSL ?#2\]'
+.*: Error: index register xzr is not allowed at operand 3 -- `ld3q {Z29.Q,Z30.Q,Z31.Q},p0/Z,\[x0,xzr,LSL ?#3\]'
+.*: Error: operand mismatch -- `ld3q {Z0.Q,Z1.Q,Z2.Q},p7/M,\[x0,x0,LSL ?#4\]'
 .*: Info:    did you mean this\?
 .*: Info:    	ld3q {z0.q-z2.q}, p7/z, \[x0, x0, lsl #4\]
-.*: Error: p0-p7 expected at operand 2 -- `ld3q {Z0.Q,Z1.Q,Z2.Q},p8/Z,\[x30,x0,LSL#4\]'
-.*: Error: invalid register list at operand 1 -- `ld3q {Z4.Q,Z1.Q,Z2.Q},p0/Z,\[x31,x30,LSL#4\]'
-.*: Error: type mismatch in vector register list at operand 1 -- `ld3q {Z29.D,Z30.Q,Z31.Q},p7/Z,\[x31,x30,LSL#4\]'
-.*: Error: invalid register list at operand 1 -- `ld4q {Z1.Q,Z1.Q,Z2.Q,Z3.Q},p0/Z,\[x0,x0,LSL#4\]'
-.*: Error: invalid register list at operand 1 -- `ld4q {Z1.Q,Z1.Q,Z2.Q,Z3.Q},p0/Z,\[sp,x0,LSL#4\]'
-.*: Error: invalid register list at operand 1 -- `ld4q {Z1.Q,Z1.Q,Z2.Q,Z3.Q},p0/Z,\[x0,sp,LSL#4\]'
-.*: Error: invalid register list at operand 1 -- `ld4q {Z30.Q,Z29.Q,Z30.Q,Z31.Q},p8/Z,\[x0,x0,LSL#4\]'
-.*: Error: index register xzr is not allowed at operand 3 -- `ld4q {Z28.Q,Z29.Q,Z30.Q,Z31.Q},p7/Z,\[x0,xzr,LSL#4\]'
-.*: Error: invalid addressing mode at operand 3 -- `ld4q {Z0.Q,Z1.Q,Z2.Q,Z3.Q},p7/Z,\[x0,x0,LSL#2\]'
-.*: Error: invalid base register at operand 3 -- `ld4q {Z0.Q,Z1.Q,Z2.Q,Z3.Q},p0/Z,\[x31,x0,LSL#4\]'
-.*: Error: type mismatch in vector register list at operand 1 -- `ld4q {Z0.Q,Z1.Q,Z2.D,Z3.Q},p0/Z,\[x1,x30,LSL#4\]'
-.*: Error: invalid register list at operand 1 -- `ld4q {Z2.Q,Z29.Q,Z30.Q,Z31.Q},p7/Z,\[x30,x30,LSL#4\]'
-.*: Error: p0-p7 expected at operand 2 -- `st1q {Z0.Q},P8,\[Z0.D,x0\]'
-.*: Error: invalid base register at operand 3 -- `st1q {Z0.Q},P0,\[Z31.Q,x0\]'
-.*: Error: invalid addressing mode at operand 3 -- `st1q {Z0.Q},P0,\[Z0.D,x31\]'
-.*: Error: operand mismatch -- `st1q {Z31.D},P7,\[Z31.D,x30\]'
+.*: Error: p0-p7 expected at operand 2 -- `ld3q {Z0.Q,Z1.Q,Z2.Q},p8/Z,\[x30,x0,LSL ?#4\]'
+.*: Error: invalid register list at operand 1 -- `ld3q {Z4.Q,Z1.Q,Z2.Q},p0/Z,\[x31,x30,LSL ?#4\]'
+.*: Error: type mismatch in vector register list at operand 1 -- `ld3q {Z29.D,Z30.Q,Z31.Q},p7/Z,\[x31,x30,LSL ?#4\]'
+.*: Error: invalid register list at operand 1 -- `ld4q {Z1.Q,Z1.Q,Z2.Q,Z3.Q},p0/Z,\[x0,x0,LSL ?#4\]'
+.*: Error: invalid register list at operand 1 -- `ld4q {Z1.Q,Z1.Q,Z2.Q,Z3.Q},p0/Z,\[sp,x0,LSL ?#4\]'
+.*: Error: invalid register list at operand 1 -- `ld4q {Z1.Q,Z1.Q,Z2.Q,Z3.Q},p0/Z,\[x0,sp,LSL ?#4\]'
+.*: Error: invalid register list at operand 1 -- `ld4q {Z30.Q,Z29.Q,Z30.Q,Z31.Q},p8/Z,\[x0,x0,LSL ?#4\]'
+.*: Error: index register xzr is not allowed at operand 3 -- `ld4q {Z28.Q,Z29.Q,Z30.Q,Z31.Q},p7/Z,\[x0,xzr,LSL ?#4\]'
+.*: Error: invalid addressing mode at operand 3 -- `ld4q {Z0.Q,Z1.Q,Z2.Q,Z3.Q},p7/Z,\[x0,x0,LSL ?#2\]'
+.*: Error: invalid base register at operand 3 -- `ld4q {Z0.Q,Z1.Q,Z2.Q,Z3.Q},p0/Z,\[x31,x0,LSL ?#4\]'
+.*: Error: type mismatch in vector register list at operand 1 -- `ld4q {Z0.Q,Z1.Q,Z2.D,Z3.Q},p0/Z,\[x1,x30,LSL ?#4\]'
+.*: Error: invalid register list at operand 1 -- `ld4q {Z2.Q,Z29.Q,Z30.Q,Z31.Q},p7/Z,\[x30,x30,LSL ?#4\]'
+.*: Error: p0-p7 expected at operand 2 -- `st1q { ?Z0.Q ?},P8,\[Z0.D,x0\]'
+.*: Error: invalid base register at operand 3 -- `st1q { ?Z0.Q ?},P0,\[Z31.Q,x0\]'
+.*: Error: invalid addressing mode at operand 3 -- `st1q { ?Z0.Q ?},P0,\[Z0.D,x31\]'
+.*: Error: operand mismatch -- `st1q { ?Z31.D ?},P7,\[Z31.D,x30\]'
 .*: Info:    did you mean this\?
 .*: Info:    	st1q {z31.q}, p7, \[z31.d, x30\]
 .*: Error: invalid offset register at operand 3 -- `st1q Z0.Q,P0,\[Z0.D,sp\]'
@@ -94,29 +94,29 @@
 .*: Error: type mismatch in vector register list at operand 1 -- `st4q {Z28.Q,Z29.Q,Z30.D,Z31.Q},p7,\[x30,#-4,MUL VL\]'
 .*: Error: type mismatch in vector register list at operand 1 -- `st4q {Z28.Q,Z29.Q,Z30.D,Z31.Q},p7,\[x30,#-100,MUL VL\]'
 .*: Error: type mismatch in vector register list at operand 1 -- `st4q {Z28.Q,Z29.Q,Z30.D,Z31.Q},p7,\[xzr,#-100,MUL VL\]'
-.*: Error: invalid addressing mode at operand 3 -- `st2q {Z0.Q,Z1.Q},p0,\[x0,x0,LSL#3\]'
-.*: Error: invalid addressing mode at operand 3 -- `st2q {Z0.Q,Z1.Q},p0,\[sp,x0,LSL#3\]'
-.*: Error: invalid offset register at operand 3 -- `st2q {Z0.Q,Z1.Q},p0,\[x0,sp,LSL#3\]'
-.*: Error: invalid register list at operand 1 -- `st2q {Z31.Q,Z31.Q},p0,\[x0,x0,LSL#4\]'
-.*: Error: index register xzr is not allowed at operand 3 -- `st2q {Z30.Q,Z31.Q},p0,\[x0,xzr,LSL#2\]'
-.*: Error: p0-p7 expected at operand 2 -- `st2q {Z0.Q,Z1.Q},p8,\[x0,x0,LSL#4\]'
-.*: Error: invalid base register at operand 3 -- `st2q {Z0.Q,Z1.Q},p0,\[x31,x0,LSL#4\]'
-.*: Error: only 'MUL VL' is permitted at operand 3 -- `st2q {Z0.Q,Z1.Q},p0,\[x0,x31,LSL#4\]'
-.*: Error: invalid base register at operand 3 -- `st2q {Z30.Q,Z31.Q},p7,\[x31,x31,LSL#4\]'
+.*: Error: invalid addressing mode at operand 3 -- `st2q {Z0.Q,Z1.Q},p0,\[x0,x0,LSL ?#3\]'
+.*: Error: invalid addressing mode at operand 3 -- `st2q {Z0.Q,Z1.Q},p0,\[sp,x0,LSL ?#3\]'
+.*: Error: invalid offset register at operand 3 -- `st2q {Z0.Q,Z1.Q},p0,\[x0,sp,LSL ?#3\]'
+.*: Error: invalid register list at operand 1 -- `st2q {Z31.Q,Z31.Q},p0,\[x0,x0,LSL ?#4\]'
+.*: Error: index register xzr is not allowed at operand 3 -- `st2q {Z30.Q,Z31.Q},p0,\[x0,xzr,LSL ?#2\]'
+.*: Error: p0-p7 expected at operand 2 -- `st2q {Z0.Q,Z1.Q},p8,\[x0,x0,LSL ?#4\]'
+.*: Error: invalid base register at operand 3 -- `st2q {Z0.Q,Z1.Q},p0,\[x31,x0,LSL ?#4\]'
+.*: Error: only 'MUL VL' is permitted at operand 3 -- `st2q {Z0.Q,Z1.Q},p0,\[x0,x31,LSL ?#4\]'
+.*: Error: invalid base register at operand 3 -- `st2q {Z30.Q,Z31.Q},p7,\[x31,x31,LSL ?#4\]'
 .*: Error: shift expression expected at operand 3 -- `st3q {Z0.Q,Z1.Q,Z2.Q},p0,\[x0,x0,#4\]'
 .*: Error: shift expression expected at operand 3 -- `st3q {Z0.Q,Z1.Q,Z2.Q},p0,\[sp,x0,#4\]'
 .*: Error: invalid offset register at operand 3 -- `st3q {Z0.Q,Z1.Q,Z2.Q},p0,\[x0,sp,#4\]'
-.*: Error: invalid addressing mode at operand 3 -- `st3q {Z29.Q,Z30.Q,Z31.Q},p0,\[x0,x0,LSL#2\]'
-.*: Error: index register xzr is not allowed at operand 3 -- `st3q {Z29.Q,Z30.Q,Z31.Q},p0,\[x0,xzr,LSL#3\]'
-.*: Error: p0-p7 expected at operand 2 -- `st3q {Z0.Q,Z1.Q,Z2.Q},p8,\[x30,x0,LSL#4\]'
-.*: Error: invalid register list at operand 1 -- `st3q {Z4.Q,Z1.Q,Z2.Q},p0,\[x31,x30,LSL#4\]'
-.*: Error: type mismatch in vector register list at operand 1 -- `st3q {Z29.D,Z30.Q,Z31.Q},p7,\[x31,x30,LSL#4\]'
-.*: Error: invalid register list at operand 1 -- `st4q {Z1.Q,Z1.Q,Z2.Q,Z3.Q},p0,\[x0,x0,LSL#4\]'
-.*: Error: invalid register list at operand 1 -- `st4q {Z1.Q,Z1.Q,Z2.Q,Z3.Q},p0,\[sp,x0,LSL#4\]'
-.*: Error: invalid register list at operand 1 -- `st4q {Z1.Q,Z1.Q,Z2.Q,Z3.Q},p0,\[x0,sp,LSL#4\]'
-.*: Error: invalid register list at operand 1 -- `st4q {Z30.Q,Z29.Q,Z30.Q,Z31.Q},p8,\[x0,x0,LSL#4\]'
-.*: Error: index register xzr is not allowed at operand 3 -- `st4q {Z28.Q,Z29.Q,Z30.Q,Z31.Q},p7,\[x0,xzr,LSL#4\]'
-.*: Error: invalid addressing mode at operand 3 -- `st4q {Z0.Q,Z1.Q,Z2.Q,Z3.Q},p7,\[x0,x0,LSL#2\]'
-.*: Error: invalid base register at operand 3 -- `st4q {Z0.Q,Z1.Q,Z2.Q,Z3.Q},p0,\[x31,x0,LSL#4\]'
-.*: Error: type mismatch in vector register list at operand 1 -- `st4q {Z0.Q,Z1.Q,Z2.D,Z3.Q},p0,\[x1,x30,LSL#4\]'
-.*: Error: invalid register list at operand 1 -- `st4q {Z2.Q,Z29.Q,Z30.Q,Z31.Q},p7,\[x30,x30,LSL#4\]'
+.*: Error: invalid addressing mode at operand 3 -- `st3q {Z29.Q,Z30.Q,Z31.Q},p0,\[x0,x0,LSL ?#2\]'
+.*: Error: index register xzr is not allowed at operand 3 -- `st3q {Z29.Q,Z30.Q,Z31.Q},p0,\[x0,xzr,LSL ?#3\]'
+.*: Error: p0-p7 expected at operand 2 -- `st3q {Z0.Q,Z1.Q,Z2.Q},p8,\[x30,x0,LSL ?#4\]'
+.*: Error: invalid register list at operand 1 -- `st3q {Z4.Q,Z1.Q,Z2.Q},p0,\[x31,x30,LSL ?#4\]'
+.*: Error: type mismatch in vector register list at operand 1 -- `st3q {Z29.D,Z30.Q,Z31.Q},p7,\[x31,x30,LSL ?#4\]'
+.*: Error: invalid register list at operand 1 -- `st4q {Z1.Q,Z1.Q,Z2.Q,Z3.Q},p0,\[x0,x0,LSL ?#4\]'
+.*: Error: invalid register list at operand 1 -- `st4q {Z1.Q,Z1.Q,Z2.Q,Z3.Q},p0,\[sp,x0,LSL ?#4\]'
+.*: Error: invalid register list at operand 1 -- `st4q {Z1.Q,Z1.Q,Z2.Q,Z3.Q},p0,\[x0,sp,LSL ?#4\]'
+.*: Error: invalid register list at operand 1 -- `st4q {Z30.Q,Z29.Q,Z30.Q,Z31.Q},p8,\[x0,x0,LSL ?#4\]'
+.*: Error: index register xzr is not allowed at operand 3 -- `st4q {Z28.Q,Z29.Q,Z30.Q,Z31.Q},p7,\[x0,xzr,LSL ?#4\]'
+.*: Error: invalid addressing mode at operand 3 -- `st4q {Z0.Q,Z1.Q,Z2.Q,Z3.Q},p7,\[x0,x0,LSL ?#2\]'
+.*: Error: invalid base register at operand 3 -- `st4q {Z0.Q,Z1.Q,Z2.Q,Z3.Q},p0,\[x31,x0,LSL ?#4\]'
+.*: Error: type mismatch in vector register list at operand 1 -- `st4q {Z0.Q,Z1.Q,Z2.D,Z3.Q},p0,\[x1,x30,LSL ?#4\]'
+.*: Error: invalid register list at operand 1 -- `st4q {Z2.Q,Z29.Q,Z30.Q,Z31.Q},p7,\[x30,x30,LSL ?#4\]'
diff --git a/gas/testsuite/gas/aarch64/sve2p1-6-invalid.l b/gas/testsuite/gas/aarch64/sve2p1-6-invalid.l
index f37a3a0..249bcd4 100644
--- a/gas/testsuite/gas/aarch64/sve2p1-6-invalid.l
+++ b/gas/testsuite/gas/aarch64/sve2p1-6-invalid.l
@@ -7,7 +7,7 @@
 .*: Info:    	tblq z0.s, {z0.s}, z0.s
 .*: Info:    	tblq z0.d, {z0.d}, z0.d
 .*: Error: expected a single-register list at operand 2 -- `tblq z0.s,{z0.s,z1.s},z0.s'
-.*: Error: expected a single-register list at operand 2 -- `tblq z0.s,{z0.s-z1.s},z0.s'
+.*: Error: expected a single-register list at operand 2 -- `tblq z0.s,{z0.s ?- ?z1.s},z0.s'
 .*: Error: operand mismatch -- `tblq z0.s,{z31.s},z0.b'
 .*: Info:    did you mean this\?
 .*: Info:    	tblq z0.s, {z31.s}, z0.s
@@ -25,7 +25,7 @@
 .*: Info:    	tbxq z31.s, z0.s, z0.s
 .*: Info:    	tbxq z31.d, z0.d, z0.d
 .*: Error: expected an SVE vector register at operand 2 -- `tbxq z0.s,{z0.s,z1.s},z0.s'
-.*: Error: expected an SVE vector register at operand 2 -- `tbxq z0.h,{z0.h-z1.h},z0.h'
+.*: Error: expected an SVE vector register at operand 2 -- `tbxq z0.h,{z0.h ?- ?z1.h},z0.h'
 .*: Error: expected an SVE vector register at operand 1 -- `tbxq {z0.s},z31.s,z0.b'
 .*: Error: expected an SVE vector register at operand 2 -- `tbxq z0.b,{z0.b},{z31.b}'
 .*: Error: expected an SVE vector register at operand 2 -- `uzpq1 z0.s,{z0.b},z0.b'
@@ -37,7 +37,7 @@
 .*: Info:    	uzpq1 z31.s, z0.s, z0.s
 .*: Info:    	uzpq1 z31.d, z0.d, z0.d
 .*: Error: expected an SVE vector register at operand 2 -- `uzpq1 z0.s,{z0.s,z1.s},z0.s'
-.*: Error: expected an SVE vector register at operand 2 -- `uzpq1 z0.h,{z0.h-z1.h},z0.h'
+.*: Error: expected an SVE vector register at operand 2 -- `uzpq1 z0.h,{z0.h ?- ?z1.h},z0.h'
 .*: Error: expected an SVE vector register at operand 1 -- `uzpq1 {z0.s},z31.s,z0.b'
 .*: Error: expected an SVE vector register at operand 2 -- `uzpq1 z0.b,{z0.b},{z31.b}'
 .*: Error: expected an SVE vector register at operand 2 -- `uzpq2 z0.s,{z0.b},z0.b'
@@ -49,7 +49,7 @@
 .*: Info:    	uzpq2 z31.s, z0.s, z0.s
 .*: Info:    	uzpq2 z31.d, z0.d, z0.d
 .*: Error: expected an SVE vector register at operand 2 -- `uzpq2 z0.s,{z0.s,z1.s},z0.s'
-.*: Error: expected an SVE vector register at operand 2 -- `uzpq2 z0.h,{z0.h-z1.h},z0.h'
+.*: Error: expected an SVE vector register at operand 2 -- `uzpq2 z0.h,{z0.h ?- ?z1.h},z0.h'
 .*: Error: expected an SVE vector register at operand 1 -- `uzpq2 {z0.s},z31.s,z0.b'
 .*: Error: expected an SVE vector register at operand 2 -- `uzpq2 z0.b,{z0.b},{z31.b}'
 .*: Error: expected an SVE vector register at operand 2 -- `zipq1 z0.s,{z0.b},z0.b'
@@ -61,7 +61,7 @@
 .*: Info:    	zipq1 z31.s, z0.s, z0.s
 .*: Info:    	zipq1 z31.d, z0.d, z0.d
 .*: Error: expected an SVE vector register at operand 2 -- `zipq1 z0.s,{z0.s,z1.s},z0.s'
-.*: Error: expected an SVE vector register at operand 2 -- `zipq1 z0.h,{z0.b-z1.h},z0.h'
+.*: Error: expected an SVE vector register at operand 2 -- `zipq1 z0.h,{z0.b ?- ?z1.h},z0.h'
 .*: Error: expected an SVE vector register at operand 1 -- `zipq1 {z0.s},z31.s,z0.b'
 .*: Error: expected an SVE vector register at operand 2 -- `zipq1 z0.b,{z0.b},{z31.b}'
 .*: Error: expected an SVE vector register at operand 2 -- `zipq2 z0.s,{z0.b},z0.b'
@@ -73,6 +73,6 @@
 .*: Info:    	zipq2 z31.s, z0.s, z0.s
 .*: Info:    	zipq2 z31.d, z0.d, z0.d
 .*: Error: expected an SVE vector register at operand 2 -- `zipq2 z0.s,{z0.s,z1.s},z0.s'
-.*: Error: expected an SVE vector register at operand 2 -- `zipq2 z0.h,{z0.b-z1.h},z0.h'
+.*: Error: expected an SVE vector register at operand 2 -- `zipq2 z0.h,{z0.b ?- ?z1.h},z0.h'
 .*: Error: expected an SVE vector register at operand 1 -- `zipq2 {z0.s},z31.s,z0.b'
 .*: Error: expected an SVE vector register at operand 2 -- `zipq2 z0.b,{z0.b},{z31.b}'
diff --git a/gas/testsuite/gas/aarch64/tail_padding.d b/gas/testsuite/gas/aarch64/tail_padding.d
index acb4ff2..12f2f6f 100644
--- a/gas/testsuite/gas/aarch64/tail_padding.d
+++ b/gas/testsuite/gas/aarch64/tail_padding.d
@@ -11,10 +11,10 @@ Section Headers:
        Size              EntSize          Flags  Link  Info  Align
   \[ 0\]                   NULL             0000000000000000  00000000
        0000000000000000  0000000000000000           0     0     0
-  \[ 1\] \.text             PROGBITS         0000000000000000  00000040
+  \[ 1\] \.text             PROGBITS         0000000000000000  000000..
        0000000000000000  0000000000000000  AX       0     0     1
-  \[ 2\] \.data             PROGBITS         0000000000000000  00000040
+  \[ 2\] \.data             PROGBITS         0000000000000000  000000..
        0000000000000008  0000000000000000  WA       0     0     64
-  \[ 3\] \.bss              NOBITS           0000000000000000  00000080
+  \[ 3\] \.bss              NOBITS           0000000000000000  000000..
        000000000000000c  0000000000000000  WA       0     0     64
 #...
diff --git a/gas/testsuite/gas/aarch64/verbose-error.l b/gas/testsuite/gas/aarch64/verbose-error.l
index 188dadf..c5c7450 100644
--- a/gas/testsuite/gas/aarch64/verbose-error.l
+++ b/gas/testsuite/gas/aarch64/verbose-error.l
@@ -6,7 +6,7 @@
 [^:]*:5: Info:    other valid variant\(s\):
 [^:]*:5: Info:    	ubfm x0, x1, #8, #31
 [^:]*:6: Error: immediate value out of range 0 to 31 at operand 4 -- `bfm w0,w1,8,43'
-[^:]*:7: Error: invalid shift amount at operand 2 -- `strb w7,\[x30,x0,lsl#1\]'
+[^:]*:7: Error: invalid shift amount at operand 2 -- `strb w7,\[x30,x0,lsl ?#1\]'
 [^:]*:8: Error: invalid addressing mode at operand 2 -- `st2 {v4.2d,v5.2d},\[x3,#3\]'
 [^:]*:9: Error: the top half of a 128-bit FP/SIMD register is expected at operand 1 -- `fmov v1.D\[0\],x0'
 [^:]*:10: Error: expected a single-register list at operand 1 -- `ld1r \{v1.4s,v2.4s,v3.4s\},\[x3\],x4'
@@ -26,7 +26,7 @@
 [^:]*:13: Info:    	urecpe v0.2s, v7.2s
 [^:]*:13: Info:    other valid variant\(s\):
 [^:]*:13: Info:    	urecpe v0.4s, v7.4s
-[^:]*:14: Error: operand mismatch -- `adds w0,wsp,x0,uxtx#1'
+[^:]*:14: Error: operand mismatch -- `adds w0,wsp,x0,uxtx ?#1'
 [^:]*:14: Info:    did you mean this\?
 [^:]*:14: Info:    	adds w0, wsp, w0, uxtx #1
 [^:]*:14: Info:    other valid variant\(s\):
diff --git a/gas/testsuite/gas/all/end-no-dot.l b/gas/testsuite/gas/all/end-no-dot.l
new file mode 100644
index 0000000..fa47ae3
--- /dev/null
+++ b/gas/testsuite/gas/all/end-no-dot.l
@@ -0,0 +1,3 @@
+# No diagnostics should appear for anything past "end".
+>3<
+>4<
diff --git a/gas/testsuite/gas/all/end-no-dot.s b/gas/testsuite/gas/all/end-no-dot.s
new file mode 100644
index 0000000..bee10c8
--- /dev/null
+++ b/gas/testsuite/gas/all/end-no-dot.s
@@ -0,0 +1,11 @@
+	if 0
+	end a b c
+	endif
+
+	irpc n,34
+	print ">\n<"
+	endr
+
+	end q r, s
+	"\z"
+	äöü'\
\ No newline at end of file
diff --git a/gas/testsuite/gas/all/end.l b/gas/testsuite/gas/all/end.l
new file mode 100644
index 0000000..e18518d
--- /dev/null
+++ b/gas/testsuite/gas/all/end.l
@@ -0,0 +1,3 @@
+# No diagnostics should appear for anything past .end.
+>1<
+>2<
diff --git a/gas/testsuite/gas/all/end.s b/gas/testsuite/gas/all/end.s
new file mode 100644
index 0000000..3090792
--- /dev/null
+++ b/gas/testsuite/gas/all/end.s
@@ -0,0 +1,11 @@
+	.if 0
+	.end a b c
+	.endif
+
+	.irpc n,12
+	.print ">\n<"
+	.endr
+
+	.end q r, s
+	"\z"
+	äöü'\
\ No newline at end of file
diff --git a/gas/testsuite/gas/all/gas.exp b/gas/testsuite/gas/all/gas.exp
index d42d8df..5fff61f 100644
--- a/gas/testsuite/gas/all/gas.exp
+++ b/gas/testsuite/gas/all/gas.exp
@@ -464,6 +464,30 @@ switch -glob $target_triplet {
 	run_dump_test weakref1w
     }
 }
+
+# .end works differently on some targets. Also make sure to test the dot-less
+# form on targets setting NO_PSEUDO_DOT (and not overriding the directive).
+switch -glob $target_triplet {
+    alpha*-*-* { }
+    hppa*-*-* { }
+    iq2000-*-* { }
+    microblaze-*-* { }
+    mips*-*-* { }
+    score*-*-* { }
+    xtensa*-*-* { }
+    m68hc1*-*-* -
+    s12z-*-*    -
+    spu-*-*     -
+    xgate-*-*   -
+    z80-*-* {
+	run_list_test "end"
+	run_list_test "end-no-dot"
+    }
+    default {
+	run_list_test "end"
+    }
+}
+
 gas_test_error "weakref2.s" "" "e: would close weakref loop: e => a => b => c => d => e"
 gas_test_error "weakref3.s" "" "a: would close weakref loop: a => b => c => d => e => a"
 gas_test_error "weakref4.s" "" "is already defined"
@@ -477,6 +501,7 @@ if [is_elf_format] {
 }
 
 run_dump_test quoted-sym-names
+run_dump_test quoted-label-blank
 
 # Targets where # is not a line comment character don't transform
 # "# <line> <file>" into .linefile (PR gas/29120).
diff --git a/gas/testsuite/gas/all/quoted-label-blank.d b/gas/testsuite/gas/all/quoted-label-blank.d
new file mode 100644
index 0000000..92b5eca
--- /dev/null
+++ b/gas/testsuite/gas/all/quoted-label-blank.d
@@ -0,0 +1,9 @@
+#nm: --extern-only --numeric-sort
+#name: quoted label name followed by whitespace
+# No quoted strings handling (TC_STRING_ESCAPES set to 0):
+#notarget: powerpc*-*-aix* powerpc*-*-beos* powerpc-*-macos* rs6000-*-*
+# Certain LABELS_WITHOUT_COLONS targets:
+#notarget: mmix-*-* tic54*-*-* z80-*-*
+
+#...
+0+00 D blank-after
diff --git a/gas/testsuite/gas/all/quoted-label-blank.s b/gas/testsuite/gas/all/quoted-label-blank.s
new file mode 100644
index 0000000..530b6fc
--- /dev/null
+++ b/gas/testsuite/gas/all/quoted-label-blank.s
@@ -0,0 +1,4 @@
+	.data
+	.globl	"blank-after"
+"blank-after" :
+	.byte 0
diff --git a/gas/testsuite/gas/arm/addthumb2err.l b/gas/testsuite/gas/arm/addthumb2err.l
index c77d551..f8568a8 100644
--- a/gas/testsuite/gas/arm/addthumb2err.l
+++ b/gas/testsuite/gas/arm/addthumb2err.l
@@ -1,21 +1,21 @@
 [^:]*: Assembler messages:
-[^:]*:9: Error: shift value over 3 not allowed in thumb mode -- `add sp,sp,r0,LSL#4'
-[^:]*:10: Error: only LSL shift allowed in thumb mode -- `add sp,sp,r0,LSR#3'
-[^:]*:11: Error: only LSL shift allowed in thumb mode -- `add sp,sp,r0,ASR#3'
-[^:]*:12: Error: only LSL shift allowed in thumb mode -- `add sp,sp,r0,ROR#3'
+[^:]*:9: Error: shift value over 3 not allowed in thumb mode -- `add sp,sp,r0,LSL ?#4'
+[^:]*:10: Error: only LSL shift allowed in thumb mode -- `add sp,sp,r0,LSR ?#3'
+[^:]*:11: Error: only LSL shift allowed in thumb mode -- `add sp,sp,r0,ASR ?#3'
+[^:]*:12: Error: only LSL shift allowed in thumb mode -- `add sp,sp,r0,ROR ?#3'
 [^:]*:13: Error: only LSL shift allowed in thumb mode -- `add sp,sp,r0,RRX'
-[^:]*:14: Error: shift value over 3 not allowed in thumb mode -- `adds sp,sp,r0,LSL#4'
-[^:]*:15: Error: only LSL shift allowed in thumb mode -- `adds sp,sp,r0,LSR#3'
-[^:]*:16: Error: only LSL shift allowed in thumb mode -- `adds sp,sp,r0,ASR#3'
-[^:]*:17: Error: only LSL shift allowed in thumb mode -- `adds sp,sp,r0,ROR#3'
+[^:]*:14: Error: shift value over 3 not allowed in thumb mode -- `adds sp,sp,r0,LSL ?#4'
+[^:]*:15: Error: only LSL shift allowed in thumb mode -- `adds sp,sp,r0,LSR ?#3'
+[^:]*:16: Error: only LSL shift allowed in thumb mode -- `adds sp,sp,r0,ASR ?#3'
+[^:]*:17: Error: only LSL shift allowed in thumb mode -- `adds sp,sp,r0,ROR ?#3'
 [^:]*:18: Error: only LSL shift allowed in thumb mode -- `adds sp,sp,r0,RRX'
-[^:]*:19: Error: shift value over 3 not allowed in thumb mode -- `sub sp,sp,r0,LSL#4'
-[^:]*:20: Error: only LSL shift allowed in thumb mode -- `sub sp,sp,r0,LSR#3'
-[^:]*:21: Error: only LSL shift allowed in thumb mode -- `sub sp,sp,r0,ASR#3'
-[^:]*:22: Error: only LSL shift allowed in thumb mode -- `sub sp,sp,r0,ROR#3'
+[^:]*:19: Error: shift value over 3 not allowed in thumb mode -- `sub sp,sp,r0,LSL ?#4'
+[^:]*:20: Error: only LSL shift allowed in thumb mode -- `sub sp,sp,r0,LSR ?#3'
+[^:]*:21: Error: only LSL shift allowed in thumb mode -- `sub sp,sp,r0,ASR ?#3'
+[^:]*:22: Error: only LSL shift allowed in thumb mode -- `sub sp,sp,r0,ROR ?#3'
 [^:]*:23: Error: only LSL shift allowed in thumb mode -- `sub sp,sp,r0,RRX'
-[^:]*:24: Error: shift value over 3 not allowed in thumb mode -- `subs sp,sp,r0,LSL#4'
-[^:]*:25: Error: only LSL shift allowed in thumb mode -- `subs sp,sp,r0,LSR#3'
-[^:]*:26: Error: only LSL shift allowed in thumb mode -- `subs sp,sp,r0,ASR#3'
-[^:]*:27: Error: only LSL shift allowed in thumb mode -- `subs sp,sp,r0,ROR#3'
+[^:]*:24: Error: shift value over 3 not allowed in thumb mode -- `subs sp,sp,r0,LSL ?#4'
+[^:]*:25: Error: only LSL shift allowed in thumb mode -- `subs sp,sp,r0,LSR ?#3'
+[^:]*:26: Error: only LSL shift allowed in thumb mode -- `subs sp,sp,r0,ASR ?#3'
+[^:]*:27: Error: only LSL shift allowed in thumb mode -- `subs sp,sp,r0,ROR ?#3'
 [^:]*:28: Error: only LSL shift allowed in thumb mode -- `subs sp,sp,r0,RRX'
diff --git a/gas/testsuite/gas/arm/arch7em-bad.l b/gas/testsuite/gas/arm/arch7em-bad.l
index 5ae3b26..642eb60 100644
--- a/gas/testsuite/gas/arm/arch7em-bad.l
+++ b/gas/testsuite/gas/arm/arch7em-bad.l
@@ -3,10 +3,10 @@
 [^:]*:9: Error: selected processor does not support `pkhbt r9,r0,r0' in Thumb mode
 [^:]*:10: Error: selected processor does not support `pkhbt r0,r9,r0' in Thumb mode
 [^:]*:11: Error: selected processor does not support `pkhbt r0,r0,r9' in Thumb mode
-[^:]*:12: Error: selected processor does not support `pkhbt r0,r0,r0,lsl#0x14' in Thumb mode
-[^:]*:13: Error: selected processor does not support `pkhbt r0,r0,r0,lsl#3' in Thumb mode
+[^:]*:12: Error: selected processor does not support `pkhbt r0,r0,r0,lsl ?#0x14' in Thumb mode
+[^:]*:13: Error: selected processor does not support `pkhbt r0,r0,r0,lsl ?#3' in Thumb mode
 [^:]*:14: Error: selected processor does not support `pkhtb r1,r2,r3' in Thumb mode
-[^:]*:15: Error: selected processor does not support `pkhtb r1,r2,r3,asr#0x11' in Thumb mode
+[^:]*:15: Error: selected processor does not support `pkhtb r1,r2,r3,asr ?#0x11' in Thumb mode
 [^:]*:18: Error: selected processor does not support `qadd r1,r2,r3' in Thumb mode
 [^:]*:19: Error: selected processor does not support `qadd16 r1,r2,r3' in Thumb mode
 [^:]*:20: Error: selected processor does not support `qadd8 r1,r2,r3' in Thumb mode
@@ -121,10 +121,10 @@
 [^:]*:143: Error: selected processor does not support `uxtb16 r1,r2' in Thumb mode
 [^:]*:144: Error: selected processor does not support `uxtb16 r8,r9' in Thumb mode
 [^:]*:147: Error: selected processor does not support `sxtab r0,r0,r0' in Thumb mode
-[^:]*:148: Error: selected processor does not support `sxtab r0,r0,r0,ror#0' in Thumb mode
-[^:]*:149: Error: selected processor does not support `sxtab r9,r0,r0,ror#8' in Thumb mode
-[^:]*:150: Error: selected processor does not support `sxtab r0,r9,r0,ror#16' in Thumb mode
-[^:]*:151: Error: selected processor does not support `sxtab r0,r0,r9,ror#24' in Thumb mode
+[^:]*:148: Error: selected processor does not support `sxtab r0,r0,r0,ror ?#0' in Thumb mode
+[^:]*:149: Error: selected processor does not support `sxtab r9,r0,r0,ror ?#8' in Thumb mode
+[^:]*:150: Error: selected processor does not support `sxtab r0,r9,r0,ror ?#16' in Thumb mode
+[^:]*:151: Error: selected processor does not support `sxtab r0,r0,r9,ror ?#24' in Thumb mode
 [^:]*:153: Error: selected processor does not support `sxtab16 r1,r2,r3' in Thumb mode
 [^:]*:154: Error: selected processor does not support `sxtah r1,r2,r3' in Thumb mode
 [^:]*:155: Error: selected processor does not support `uxtab r1,r2,r3' in Thumb mode
diff --git a/gas/testsuite/gas/arm/armv2-mp-bad.l b/gas/testsuite/gas/arm/armv2-mp-bad.l
index eb97135..d0159b0 100644
--- a/gas/testsuite/gas/arm/armv2-mp-bad.l
+++ b/gas/testsuite/gas/arm/armv2-mp-bad.l
@@ -1,3 +1,3 @@
 Assembler messages:
 [^:]*: extension does not apply to the base architecture
-[^:]*: unrecognized option -march=armv2\+mp
+[^:]*: unrecognized option .*-march=armv2\+mp.*
diff --git a/gas/testsuite/gas/arm/ccs-symver.d b/gas/testsuite/gas/arm/ccs-symver.d
new file mode 100644
index 0000000..c1255ab
--- /dev/null
+++ b/gas/testsuite/gas/arm/ccs-symver.d
@@ -0,0 +1,10 @@
+#name: .symver in CCS mode
+#as: -mccs
+#readelf: -sW
+# This test is only valid on ELF based ports.
+#notarget: *-*-pe *-*-wince
+
+#...
+ +[0-9]+: +0+ +1 +OBJECT +GLOBAL +DEFAULT +[0-9]+ +foo
+ +[0-9]+: +0+ +1 +OBJECT +GLOBAL +DEFAULT +[0-9]+ +foo@version1
+#pass
diff --git a/gas/testsuite/gas/arm/ccs-symver.s b/gas/testsuite/gas/arm/ccs-symver.s
new file mode 100644
index 0000000..00a96f5
--- /dev/null
+++ b/gas/testsuite/gas/arm/ccs-symver.s
@@ -0,0 +1,7 @@
+	.data
+	.globl foo
+	.type foo,@object
+foo:
+	.byte 0
+	.size foo,.-foo
+	.symver foo,foo@version1;remove
diff --git a/gas/testsuite/gas/arm/dotprod-legacy-arch.l b/gas/testsuite/gas/arm/dotprod-legacy-arch.l
index a627a36..7bbdf63 100644
--- a/gas/testsuite/gas/arm/dotprod-legacy-arch.l
+++ b/gas/testsuite/gas/arm/dotprod-legacy-arch.l
@@ -1,3 +1,3 @@
 Assembler messages:
 [^:]*: extension does not apply to the base architecture
-[^:]*: unrecognized option -march=armv8.1-a\+dotprod
+[^:]*: unrecognized option .*-march=armv8\.1-a\+dotprod.*
diff --git a/gas/testsuite/gas/arm/ehabi-pacbti-m.d b/gas/testsuite/gas/arm/ehabi-pacbti-m.d
index 1b13020..dca7abd 100644
--- a/gas/testsuite/gas/arm/ehabi-pacbti-m.d
+++ b/gas/testsuite/gas/arm/ehabi-pacbti-m.d
@@ -4,7 +4,7 @@
 #readelf: -u
 #target: [is_elf_format]
 
-Unwind section '.ARM.exidx' at offset 0x5c contains 1 entry:
+Unwind section '.ARM.exidx' at offset 0x[0-9a-f]+ contains 1 entry:
 
 0x0: @0x0
   Compact model index: 1
diff --git a/gas/testsuite/gas/arm/forbid-armv7-idiv-ext.l b/gas/testsuite/gas/arm/forbid-armv7-idiv-ext.l
index 76208d2..a6fc3dc 100644
--- a/gas/testsuite/gas/arm/forbid-armv7-idiv-ext.l
+++ b/gas/testsuite/gas/arm/forbid-armv7-idiv-ext.l
@@ -1,3 +1,3 @@
 Assembler messages:
 [^:]*: extension does not apply to the base architecture
-[^:]*: unrecognized option -march=armv7\+idiv
+[^:]*: unrecognized option .*-march=armv7\+idiv.*
diff --git a/gas/testsuite/gas/arm/group-reloc-ldrs-encoding-bad.s b/gas/testsuite/gas/arm/group-reloc-ldrs-encoding-bad.s
index 7799bf1..ac7a90f 100644
--- a/gas/testsuite/gas/arm/group-reloc-ldrs-encoding-bad.s
+++ b/gas/testsuite/gas/arm/group-reloc-ldrs-encoding-bad.s
@@ -14,7 +14,7 @@
 
 	.macro ldrtest load store sym offset
 
-	ldrtest2 \load \sym "\offset"
+	ldrtest2 \load \sym \offset
 
 	\store	r0, [r0, #:pc_g1:(\sym \offset)]
 	\store	r0, [r0, #:pc_g2:(\sym \offset)]
diff --git a/gas/testsuite/gas/arm/group-reloc-ldrs.s b/gas/testsuite/gas/arm/group-reloc-ldrs.s
index 96655e1..fa74e7e 100644
--- a/gas/testsuite/gas/arm/group-reloc-ldrs.s
+++ b/gas/testsuite/gas/arm/group-reloc-ldrs.s
@@ -14,7 +14,7 @@
 
 	.macro ldrtest load store sym offset
 
-	ldrtest2 \load \sym "\offset"
+	ldrtest2 \load \sym \offset
 
 	\store	r0, [r0, #:pc_g1:(\sym \offset)]
 	\store	r0, [r0, #:pc_g2:(\sym \offset)]
diff --git a/gas/testsuite/gas/arm/mve-vldr-bad-1.l b/gas/testsuite/gas/arm/mve-vldr-bad-1.l
index 34743bd..de665e9 100644
--- a/gas/testsuite/gas/arm/mve-vldr-bad-1.l
+++ b/gas/testsuite/gas/arm/mve-vldr-bad-1.l
@@ -103,20 +103,20 @@
 [^:]*:88: Error: vector predicated instruction should be in VPT/VPST block -- `vldrdt.u64 q0,\[r0,q1\]'
 [^:]*:90: Error: instruction missing MVE vector predication code -- `vldrd.u64 q0,\[r0,q1\]'
 [^:]*:92: Error: shift expression expected -- `vldrb.u8 q0,\[r0,q1,#0\]'
-[^:]*:93: Error: can not shift offsets when accessing less than half-word -- `vldrb.u8 q0,\[r0,q1,UXTW#1\]'
-[^:]*:94: Error: can not shift offsets when accessing less than half-word -- `vldrb.u16 q0,\[r0,q1,UXTW#1\]'
-[^:]*:95: Error: can not shift offsets when accessing less than half-word -- `vldrb.u32 q0,\[r0,q1,UXTW#1\]'
+[^:]*:93: Error: can not shift offsets when accessing less than half-word -- `vldrb.u8 q0,\[r0,q1,UXTW ?#1\]'
+[^:]*:94: Error: can not shift offsets when accessing less than half-word -- `vldrb.u16 q0,\[r0,q1,UXTW ?#1\]'
+[^:]*:95: Error: can not shift offsets when accessing less than half-word -- `vldrb.u32 q0,\[r0,q1,UXTW ?#1\]'
 [^:]*:96: Error: shift expression expected -- `vldrh.u16 q0,\[r0,q1,#1\]'
-[^:]*:97: Error: shift immediate must be 1, 2 or 3 for half-word, word or double-word accesses respectively -- `vldrh.u16 q0,\[r0,q1,UXTW#2\]'
-[^:]*:98: Error: shift immediate must be 1, 2 or 3 for half-word, word or double-word accesses respectively -- `vldrh.u32 q0,\[r0,q1,UXTW#2\]'
-[^:]*:99: Error: shift immediate must be 1, 2 or 3 for half-word, word or double-word accesses respectively -- `vldrh.u16 q0,\[r0,q1,UXTW#3\]'
-[^:]*:100: Error: shift immediate must be 1, 2 or 3 for half-word, word or double-word accesses respectively -- `vldrh.u32 q0,\[r0,q1,UXTW#3\]'
+[^:]*:97: Error: shift immediate must be 1, 2 or 3 for half-word, word or double-word accesses respectively -- `vldrh.u16 q0,\[r0,q1,UXTW ?#2\]'
+[^:]*:98: Error: shift immediate must be 1, 2 or 3 for half-word, word or double-word accesses respectively -- `vldrh.u32 q0,\[r0,q1,UXTW ?#2\]'
+[^:]*:99: Error: shift immediate must be 1, 2 or 3 for half-word, word or double-word accesses respectively -- `vldrh.u16 q0,\[r0,q1,UXTW ?#3\]'
+[^:]*:100: Error: shift immediate must be 1, 2 or 3 for half-word, word or double-word accesses respectively -- `vldrh.u32 q0,\[r0,q1,UXTW ?#3\]'
 [^:]*:101: Error: shift expression expected -- `vldrw.u32 q0,\[r0,q1,#2\]'
-[^:]*:102: Error: shift immediate must be 1, 2 or 3 for half-word, word or double-word accesses respectively -- `vldrw.u32 q0,\[r0,q1,UXTW#1\]'
-[^:]*:103: Error: shift immediate must be 1, 2 or 3 for half-word, word or double-word accesses respectively -- `vldrw.u32 q0,\[r0,q1,UXTW#3\]'
+[^:]*:102: Error: shift immediate must be 1, 2 or 3 for half-word, word or double-word accesses respectively -- `vldrw.u32 q0,\[r0,q1,UXTW ?#1\]'
+[^:]*:103: Error: shift immediate must be 1, 2 or 3 for half-word, word or double-word accesses respectively -- `vldrw.u32 q0,\[r0,q1,UXTW ?#3\]'
 [^:]*:104: Error: shift expression expected -- `vldrd.u64 q0,\[r0,q1,#3\]'
-[^:]*:105: Error: shift immediate must be 1, 2 or 3 for half-word, word or double-word accesses respectively -- `vldrd.u64 q0,\[r0,q1,UXTW#1\]'
-[^:]*:106: Error: shift immediate must be 1, 2 or 3 for half-word, word or double-word accesses respectively -- `vldrd.u64 q0,\[r0,q1,UXTW#2\]'
-[^:]*:107: Error: shift immediate must be 1, 2 or 3 for half-word, word or double-word accesses respectively -- `vldrd.u64 q0,\[r0,q1,UXTW#4\]'
+[^:]*:105: Error: shift immediate must be 1, 2 or 3 for half-word, word or double-word accesses respectively -- `vldrd.u64 q0,\[r0,q1,UXTW ?#1\]'
+[^:]*:106: Error: shift immediate must be 1, 2 or 3 for half-word, word or double-word accesses respectively -- `vldrd.u64 q0,\[r0,q1,UXTW ?#2\]'
+[^:]*:107: Error: shift immediate must be 1, 2 or 3 for half-word, word or double-word accesses respectively -- `vldrd.u64 q0,\[r0,q1,UXTW ?#4\]'
 
 
diff --git a/gas/testsuite/gas/arm/mve-vldr-bad-3.l b/gas/testsuite/gas/arm/mve-vldr-bad-3.l
index cc759ad..bf513da 100644
--- a/gas/testsuite/gas/arm/mve-vldr-bad-3.l
+++ b/gas/testsuite/gas/arm/mve-vldr-bad-3.l
@@ -161,27 +161,27 @@
 [^:]*:139: Error: bad element type for instruction -- `vldrb.p32 q0,\[r2,q3\]'
 [^:]*:139: Error: bad element type for instruction -- `vldrb.p64 q0,\[r2,q3\]'
 [^:]*:139: Error: bad element type for instruction -- `vldrb.s8 q0,\[r2,q3\]'
-[^:]*:142: Error: bad element type for instruction -- `vldrh.8 q0,\[r2,q3,uxtw#1\]'
-[^:]*:142: Error: bad element type for instruction -- `vldrh.32 q0,\[r2,q3,uxtw#1\]'
-[^:]*:142: Error: bad element type for instruction -- `vldrh.64 q0,\[r2,q3,uxtw#1\]'
-[^:]*:142: Error: bad element type for instruction -- `vldrh.f32 q0,\[r2,q3,uxtw#1\]'
-[^:]*:142: Error: bad element type for instruction -- `vldrh.f64 q0,\[r2,q3,uxtw#1\]'
-[^:]*:142: Error: bad element type for instruction -- `vldrh.p32 q0,\[r2,q3,uxtw#1\]'
-[^:]*:142: Error: bad element type for instruction -- `vldrh.p64 q0,\[r2,q3,uxtw#1\]'
-[^:]*:142: Error: bad element type for instruction -- `vldrh.s16 q0,\[r2,q3,uxtw#1\]'
-[^:]*:145: Error: bad element type for instruction -- `vldrw.8 q0,\[r2,q3,uxtw#2\]'
-[^:]*:145: Error: bad element type for instruction -- `vldrw.16 q0,\[r2,q3,uxtw#2\]'
-[^:]*:145: Error: bad element type for instruction -- `vldrw.64 q0,\[r2,q3,uxtw#2\]'
-[^:]*:145: Error: bad element type for instruction -- `vldrw.f16 q0,\[r2,q3,uxtw#2\]'
-[^:]*:145: Error: bad element type for instruction -- `vldrw.f64 q0,\[r2,q3,uxtw#2\]'
-[^:]*:145: Error: bad element type for instruction -- `vldrw.p16 q0,\[r2,q3,uxtw#2\]'
-[^:]*:145: Error: bad element type for instruction -- `vldrw.p64 q0,\[r2,q3,uxtw#2\]'
-[^:]*:145: Error: bad element type for instruction -- `vldrw.s32 q0,\[r2,q3,uxtw#2\]'
-[^:]*:148: Error: bad element type for instruction -- `vldrd.8 q0,\[r2,q3,uxtw#3\]'
-[^:]*:148: Error: bad element type for instruction -- `vldrd.16 q0,\[r2,q3,uxtw#3\]'
-[^:]*:148: Error: bad element type for instruction -- `vldrd.32 q0,\[r2,q3,uxtw#3\]'
-[^:]*:148: Error: bad element type for instruction -- `vldrd.f16 q0,\[r2,q3,uxtw#3\]'
-[^:]*:148: Error: bad element type for instruction -- `vldrd.f32 q0,\[r2,q3,uxtw#3\]'
-[^:]*:148: Error: bad element type for instruction -- `vldrd.p16 q0,\[r2,q3,uxtw#3\]'
-[^:]*:148: Error: bad element type for instruction -- `vldrd.p32 q0,\[r2,q3,uxtw#3\]'
-[^:]*:148: Error: bad element type for instruction -- `vldrd.s64 q0,\[r2,q3,uxtw#3\]'
+[^:]*:142: Error: bad element type for instruction -- `vldrh.8 q0,\[r2,q3,uxtw ?#1\]'
+[^:]*:142: Error: bad element type for instruction -- `vldrh.32 q0,\[r2,q3,uxtw ?#1\]'
+[^:]*:142: Error: bad element type for instruction -- `vldrh.64 q0,\[r2,q3,uxtw ?#1\]'
+[^:]*:142: Error: bad element type for instruction -- `vldrh.f32 q0,\[r2,q3,uxtw ?#1\]'
+[^:]*:142: Error: bad element type for instruction -- `vldrh.f64 q0,\[r2,q3,uxtw ?#1\]'
+[^:]*:142: Error: bad element type for instruction -- `vldrh.p32 q0,\[r2,q3,uxtw ?#1\]'
+[^:]*:142: Error: bad element type for instruction -- `vldrh.p64 q0,\[r2,q3,uxtw ?#1\]'
+[^:]*:142: Error: bad element type for instruction -- `vldrh.s16 q0,\[r2,q3,uxtw ?#1\]'
+[^:]*:145: Error: bad element type for instruction -- `vldrw.8 q0,\[r2,q3,uxtw ?#2\]'
+[^:]*:145: Error: bad element type for instruction -- `vldrw.16 q0,\[r2,q3,uxtw ?#2\]'
+[^:]*:145: Error: bad element type for instruction -- `vldrw.64 q0,\[r2,q3,uxtw ?#2\]'
+[^:]*:145: Error: bad element type for instruction -- `vldrw.f16 q0,\[r2,q3,uxtw ?#2\]'
+[^:]*:145: Error: bad element type for instruction -- `vldrw.f64 q0,\[r2,q3,uxtw ?#2\]'
+[^:]*:145: Error: bad element type for instruction -- `vldrw.p16 q0,\[r2,q3,uxtw ?#2\]'
+[^:]*:145: Error: bad element type for instruction -- `vldrw.p64 q0,\[r2,q3,uxtw ?#2\]'
+[^:]*:145: Error: bad element type for instruction -- `vldrw.s32 q0,\[r2,q3,uxtw ?#2\]'
+[^:]*:148: Error: bad element type for instruction -- `vldrd.8 q0,\[r2,q3,uxtw ?#3\]'
+[^:]*:148: Error: bad element type for instruction -- `vldrd.16 q0,\[r2,q3,uxtw ?#3\]'
+[^:]*:148: Error: bad element type for instruction -- `vldrd.32 q0,\[r2,q3,uxtw ?#3\]'
+[^:]*:148: Error: bad element type for instruction -- `vldrd.f16 q0,\[r2,q3,uxtw ?#3\]'
+[^:]*:148: Error: bad element type for instruction -- `vldrd.f32 q0,\[r2,q3,uxtw ?#3\]'
+[^:]*:148: Error: bad element type for instruction -- `vldrd.p16 q0,\[r2,q3,uxtw ?#3\]'
+[^:]*:148: Error: bad element type for instruction -- `vldrd.p32 q0,\[r2,q3,uxtw ?#3\]'
+[^:]*:148: Error: bad element type for instruction -- `vldrd.s64 q0,\[r2,q3,uxtw ?#3\]'
diff --git a/gas/testsuite/gas/arm/mve-vstr-bad-1.l b/gas/testsuite/gas/arm/mve-vstr-bad-1.l
index 3b0f97c..6d34c1e 100644
--- a/gas/testsuite/gas/arm/mve-vstr-bad-1.l
+++ b/gas/testsuite/gas/arm/mve-vstr-bad-1.l
@@ -45,7 +45,7 @@
 [^:]*:4: Warning: instruction is UNPREDICTABLE in an IT block
 [^:]*:36: *Info: macro .*
 [^:]*:39: Error: shift expression expected -- `vstrh.16 q0,\[r0,q1,#1\]'
-[^:]*:40: Error: shift immediate must be 1, 2 or 3 for half-word, word or double-word accesses respectively -- `vstrh.16 q0,\[r0,q1,UXTW#2\]'
+[^:]*:40: Error: shift immediate must be 1, 2 or 3 for half-word, word or double-word accesses respectively -- `vstrh.16 q0,\[r0,q1,UXTW ?#2\]'
 [^:]*:41: Error: bad element type for instruction -- `vstrw.8 q0,\[r0,q1\]'
 [^:]*:42: Error: bad element type for instruction -- `vstrw.u8 q0,\[r0,q1\]'
 [^:]*:43: Error: bad element type for instruction -- `vstrw.s8 q0,\[r0,q1\]'
@@ -71,8 +71,8 @@
 [^:]*:4: Warning: instruction is UNPREDICTABLE in an IT block
 [^:]*:53: *Info: macro .*
 [^:]*:56: Error: shift expression expected -- `vstrw.32 q0,\[r0,q1,#2\]'
-[^:]*:57: Error: shift immediate must be 1, 2 or 3 for half-word, word or double-word accesses respectively -- `vstrw.32 q0,\[r0,q1,UXTW#1\]'
-[^:]*:58: Error: shift immediate must be 1, 2 or 3 for half-word, word or double-word accesses respectively -- `vstrw.32 q0,\[r0,q1,UXTW#3\]'
+[^:]*:57: Error: shift immediate must be 1, 2 or 3 for half-word, word or double-word accesses respectively -- `vstrw.32 q0,\[r0,q1,UXTW ?#1\]'
+[^:]*:58: Error: shift immediate must be 1, 2 or 3 for half-word, word or double-word accesses respectively -- `vstrw.32 q0,\[r0,q1,UXTW ?#3\]'
 [^:]*:59: Error: bad element type for instruction -- `vstrd.8 q0,\[r0,q1\]'
 [^:]*:60: Error: bad element type for instruction -- `vstrd.u8 q0,\[r0,q1\]'
 [^:]*:61: Error: bad element type for instruction -- `vstrd.s8 q0,\[r0,q1\]'
@@ -100,9 +100,9 @@
 [^:]*:77: Warning: instruction is UNPREDICTABLE in an IT block
 [^:]*:83: *Info: macro .*
 [^:]*:84: Error: shift expression expected -- `vstrd.64 q0,\[r0,q1,#3\]'
-[^:]*:85: Error: shift immediate must be 1, 2 or 3 for half-word, word or double-word accesses respectively -- `vstrd.64 q0,\[r0,q1,UXTW#1\]'
-[^:]*:86: Error: shift immediate must be 1, 2 or 3 for half-word, word or double-word accesses respectively -- `vstrd.64 q0,\[r0,q1,UXTW#2\]'
-[^:]*:87: Error: shift immediate must be 1, 2 or 3 for half-word, word or double-word accesses respectively -- `vstrd.64 q0,\[r0,q1,UXTW#4\]'
+[^:]*:85: Error: shift immediate must be 1, 2 or 3 for half-word, word or double-word accesses respectively -- `vstrd.64 q0,\[r0,q1,UXTW ?#1\]'
+[^:]*:86: Error: shift immediate must be 1, 2 or 3 for half-word, word or double-word accesses respectively -- `vstrd.64 q0,\[r0,q1,UXTW ?#2\]'
+[^:]*:87: Error: shift immediate must be 1, 2 or 3 for half-word, word or double-word accesses respectively -- `vstrd.64 q0,\[r0,q1,UXTW ?#4\]'
 [^:]*:90: Error: syntax error -- `vstrbeq.32 q0,\[r0,q1\]'
 [^:]*:91: Error: syntax error -- `vstrbeq.32 q0,\[r0,q1\]'
 [^:]*:93: Error: syntax error -- `vstrbeq.32 q0,\[r0,q1\]'
diff --git a/gas/testsuite/gas/arm/neon-ldst-align-bad.l b/gas/testsuite/gas/arm/neon-ldst-align-bad.l
index 5d32ace..8deefdb1 100644
--- a/gas/testsuite/gas/arm/neon-ldst-align-bad.l
+++ b/gas/testsuite/gas/arm/neon-ldst-align-bad.l
@@ -1,3 +1,3 @@
 [^:]*: Assembler messages:
-[^:]*:1: Error: bad alignment -- `vld1.8 {d0},\[r0:128\]'
-[^:]*:2: Error: bad alignment -- `vld1.8 {q0},\[r0:256\]'
+[^:]*:1: Error: bad alignment -- `vld1.8 {d0},\[r0 ?:128\]'
+[^:]*:2: Error: bad alignment -- `vld1.8 {q0},\[r0 ?:256\]'
diff --git a/gas/testsuite/gas/arm/shift-bad.l b/gas/testsuite/gas/arm/shift-bad.l
index 3c9fb6e..667f14b 100644
--- a/gas/testsuite/gas/arm/shift-bad.l
+++ b/gas/testsuite/gas/arm/shift-bad.l
@@ -1,9 +1,9 @@
 .*shift-bad.s: Assembler messages:
-.*shift-bad.s:2: Error: extraneous shift as part of operand to shift insn -- `asr r0,r1,r2,ror#5'
+.*shift-bad.s:2: Error: extraneous shift as part of operand to shift insn -- `asr r0,r1,r2,ror ?#5'
 .*shift-bad.s:3: Error: extraneous shift as part of operand to shift insn -- `ror r0,r1,r2,lsl r3'
-.*shift-bad.s:7: Error: extraneous shift as part of operand to shift insn -- `ror r0,r0,r2,lsl#1'
-.*shift-bad.s:8: Error: extraneous shift as part of operand to shift insn -- `lsl r0,r0,r2,lsl#1'
+.*shift-bad.s:7: Error: extraneous shift as part of operand to shift insn -- `ror r0,r0,r2,lsl ?#1'
+.*shift-bad.s:8: Error: extraneous shift as part of operand to shift insn -- `lsl r0,r0,r2,lsl ?#1'
 .*shift-bad.s:9: Error: extraneous shift as part of operand to shift insn -- `lsl r0,r0,r2,asr r0'
-.*shift-bad.s:13: Error: extraneous shift as part of operand to shift insn -- `ror r0,r1,r2,lsl#1'
-.*shift-bad.s:14: Error: extraneous shift as part of operand to shift insn -- `lsl r0,r1,r2,lsl#1'
+.*shift-bad.s:13: Error: extraneous shift as part of operand to shift insn -- `ror r0,r1,r2,lsl ?#1'
+.*shift-bad.s:14: Error: extraneous shift as part of operand to shift insn -- `lsl r0,r1,r2,lsl ?#1'
 .*shift-bad.s:15: Error: extraneous shift as part of operand to shift insn -- `lsl r0,r1,r2,asr r0'
diff --git a/gas/testsuite/gas/arm/sp-pc-validations-bad-t-v8a.l b/gas/testsuite/gas/arm/sp-pc-validations-bad-t-v8a.l
index eb93970..7969ce5 100644
--- a/gas/testsuite/gas/arm/sp-pc-validations-bad-t-v8a.l
+++ b/gas/testsuite/gas/arm/sp-pc-validations-bad-t-v8a.l
@@ -131,7 +131,7 @@
 [^:]*:12: IT blocks containing more than one conditional instruction are performance deprecated in ARMv8-A and ARMv8-R
 [^:]*:21: *Info: macro .*
 [^:]*:45: *Info: macro .*
-[^:]*:12: Error: branch must be last instruction in IT block -- `ldreq.w r15,\[r0,r1,LSL#2\]'
+[^:]*:12: Error: branch must be last instruction in IT block -- `ldreq.w r15,\[r0,r1,LSL ?#2\]'
 [^:]*:21: *Info: macro .*
 [^:]*:45: *Info: macro .*
 [^:]*:48: Error: r15 not allowed here -- `ldrb pc,\[r0,#4\]'
@@ -144,8 +144,8 @@
 [^:]*:66: Error: r15 not allowed here -- `ldrb pc,\[r0,r1\]'
 [^:]*:67: Error: cannot use register index with PC-relative addressing -- `ldrb r0,\[pc,r1\]'
 [^:]*:68: Error: r15 not allowed here -- `ldrb r0,\[r1,pc\]'
-[^:]*:69: Error: r15 not allowed here -- `ldrb.w pc,\[r0,r1,LSL#1\]'
-[^:]*:71: Error: r15 not allowed here -- `ldrb.w r2,\[r0,pc,LSL#2\]'
+[^:]*:69: Error: r15 not allowed here -- `ldrb.w pc,\[r0,r1,LSL ?#1\]'
+[^:]*:71: Error: r15 not allowed here -- `ldrb.w r2,\[r0,pc,LSL ?#2\]'
 [^:]*:75: Error: r15 not allowed here -- `ldrbt pc,\[r0,#4\]'
 [^:]*:79: Error: r15 not allowed here -- `ldrd pc,r0,\[r1\]'
 [^:]*:81: Error: r12 not allowed here -- `ldrd r12,\[r1\]'
@@ -184,8 +184,8 @@
 [^:]*:149: Error: r15 not allowed here -- `ldrh pc,\[r0,r1\]'
 [^:]*:150: Error: cannot use register index with PC-relative addressing -- `ldrh r0,\[pc,r1\]'
 [^:]*:151: Error: r15 not allowed here -- `ldrh r0,\[r1,pc\]'
-[^:]*:152: Error: r15 not allowed here -- `ldrh.w pc,\[r0,r1,LSL#1\]'
-[^:]*:154: Error: r15 not allowed here -- `ldrh.w r2,\[r0,pc,LSL#1\]'
+[^:]*:152: Error: r15 not allowed here -- `ldrh.w pc,\[r0,r1,LSL ?#1\]'
+[^:]*:154: Error: r15 not allowed here -- `ldrh.w r2,\[r0,pc,LSL ?#1\]'
 [^:]*:158: Error: r15 not allowed here -- `ldrht pc,\[r0,#4\]'
 [^:]*:162: Error: r15 not allowed here -- `ldrsb pc,\[r0,#4\]'
 [^:]*:165: Error: r15 not allowed here -- `ldrsb pc,\[r0,#-4\]'
@@ -196,8 +196,8 @@
 [^:]*:179: Error: r15 not allowed here -- `ldrsb pc,\[r0,r1\]'
 [^:]*:180: Error: cannot use register index with PC-relative addressing -- `ldrsb r0,\[pc,r1\]'
 [^:]*:181: Error: r15 not allowed here -- `ldrsb r0,\[r1,pc\]'
-[^:]*:182: Error: r15 not allowed here -- `ldrsb.w pc,\[r0,r1,LSL#2\]'
-[^:]*:185: Error: r15 not allowed here -- `ldrsb.w r2,\[r0,pc,LSL#2\]'
+[^:]*:182: Error: r15 not allowed here -- `ldrsb.w pc,\[r0,r1,LSL ?#2\]'
+[^:]*:185: Error: r15 not allowed here -- `ldrsb.w r2,\[r0,pc,LSL ?#2\]'
 [^:]*:190: Error: r15 not allowed here -- `ldrsbt pc,\[r0,#4\]'
 [^:]*:195: Error: r15 not allowed here -- `ldrsh pc,\[r0,#4\]'
 [^:]*:197: Error: r15 not allowed here -- `ldrsh pc,\[r0,#-4\]'
@@ -207,8 +207,8 @@
 [^:]*:210: Error: r15 not allowed here -- `ldrsh pc,\[r0,r1\]'
 [^:]*:211: Error: cannot use register index with PC-relative addressing -- `ldrsh r0,\[pc,r1\]'
 [^:]*:212: Error: r15 not allowed here -- `ldrsh r0,\[r1,pc\]'
-[^:]*:214: Error: r15 not allowed here -- `ldrsh.w pc,\[r0,r1,LSL#3\]'
-[^:]*:217: Error: r15 not allowed here -- `ldrsh.w r0,\[r1,pc,LSL#3\]'
+[^:]*:214: Error: r15 not allowed here -- `ldrsh.w pc,\[r0,r1,LSL ?#3\]'
+[^:]*:217: Error: r15 not allowed here -- `ldrsh.w r0,\[r1,pc,LSL ?#3\]'
 [^:]*:221: Error: r15 not allowed here -- `ldrsht pc,\[r0,#4\]'
 [^:]*:226: Error: r15 not allowed here -- `ldrt pc,\[r0,#4\]'
 [^:]*:232: Error: r15 not allowed here -- `str pc,\[r0,#4\]'
@@ -217,7 +217,7 @@
 [^:]*:235: Error: cannot use post-indexing with PC-relative addressing -- `str r0,\[pc\],#4'
 [^:]*:236: Error: cannot use writeback with PC-relative addressing -- `str r0,\[pc,#4\]!'
 [^:]*:239: Error: cannot use register index with PC-relative addressing -- `str.w r0,\[pc,r1\]'
-[^:]*:240: Error: cannot use register index with PC-relative addressing -- `str.w r0,\[pc,r1,LSL#2\]'
+[^:]*:240: Error: cannot use register index with PC-relative addressing -- `str.w r0,\[pc,r1,LSL ?#2\]'
 [^:]*:246: Error: cannot use register index with PC-relative addressing -- `strb.w r0,\[pc,#4\]'
 [^:]*:247: Error: r15 not allowed here -- `strb.w pc,\[r0,#4\]'
 [^:]*:249: Error: cannot use register index with PC-relative addressing -- `strb r0,\[pc,#-4\]'
@@ -227,11 +227,11 @@
 [^:]*:253: Error: r15 not allowed here -- `strb pc,\[r0\],#4'
 [^:]*:254: Error: r15 not allowed here -- `strb pc,\[r0,#4\]!'
 [^:]*:260: Error: cannot use register index with PC-relative addressing -- `strb.w r0,\[pc,r1\]'
-[^:]*:261: Error: cannot use register index with PC-relative addressing -- `strb.w r0,\[pc,r1,LSL#2\]'
+[^:]*:261: Error: cannot use register index with PC-relative addressing -- `strb.w r0,\[pc,r1,LSL ?#2\]'
 [^:]*:262: Error: r15 not allowed here -- `strb.w pc,\[r0,r1\]'
-[^:]*:263: Error: r15 not allowed here -- `strb.w pc,\[r0,r1,LSL#2\]'
+[^:]*:263: Error: r15 not allowed here -- `strb.w pc,\[r0,r1,LSL ?#2\]'
 [^:]*:266: Error: r15 not allowed here -- `strb.w r0,\[r1,pc\]'
-[^:]*:267: Error: r15 not allowed here -- `strb.w r0,\[r1,pc,LSL#2\]'
+[^:]*:267: Error: r15 not allowed here -- `strb.w r0,\[r1,pc,LSL ?#2\]'
 [^:]*:272: Error: cannot use register index with PC-relative addressing -- `strbt r0,\[pc,#4\]'
 [^:]*:273: Error: r15 not allowed here -- `strbt pc,\[r0,#4\]'
 [^:]*:277: Error: cannot use register index with PC-relative addressing -- `strd r0,r1,\[pc,#4\]'
@@ -265,7 +265,7 @@
 [^:]*:335: Error: cannot use post-indexing with PC-relative addressing -- `strh r0,\[pc\],#4'
 [^:]*:336: Error: cannot use writeback with PC-relative addressing -- `strh r0,\[pc,#4\]!'
 [^:]*:339: Error: cannot use register index with PC-relative addressing -- `strh.w r0,\[pc,r1\]'
-[^:]*:340: Error: cannot use register index with PC-relative addressing -- `strh.w r0,\[pc,r1,LSL#2\]'
+[^:]*:340: Error: cannot use register index with PC-relative addressing -- `strh.w r0,\[pc,r1,LSL ?#2\]'
 [^:]*:341: Error: r15 not allowed here -- `strh.w pc,\[r0,#4\]'
 [^:]*:342: Error: r15 not allowed here -- `strh.w pc,\[r0\]'
 [^:]*:345: Error: r15 not allowed here -- `strh pc,\[r0,#-4\]'
@@ -273,8 +273,8 @@
 [^:]*:347: Error: r15 not allowed here -- `strh pc,\[r0,#4\]!'
 [^:]*:351: Error: r15 not allowed here -- `strh.w pc,\[r0,r1\]'
 [^:]*:353: Error: r15 not allowed here -- `strh.w r0,\[r1,pc\]'
-[^:]*:355: Error: r15 not allowed here -- `strh.w pc,\[r0,r1,LSL#2\]'
-[^:]*:357: Error: r15 not allowed here -- `strh.w r0,\[r1,pc,LSL#2\]'
+[^:]*:355: Error: r15 not allowed here -- `strh.w pc,\[r0,r1,LSL ?#2\]'
+[^:]*:357: Error: r15 not allowed here -- `strh.w r0,\[r1,pc,LSL ?#2\]'
 [^:]*:361: Error: cannot use register index with PC-relative addressing -- `strht r0,\[pc,#4\]'
 [^:]*:362: Error: r15 not allowed here -- `strht pc,\[r0,#4\]'
 [^:]*:363: Error: cannot use register index with PC-relative addressing -- `strht sp,\[pc,#4\]'
diff --git a/gas/testsuite/gas/arm/sp-pc-validations-bad-t.l b/gas/testsuite/gas/arm/sp-pc-validations-bad-t.l
index f5354b0..b804c8c 100644
--- a/gas/testsuite/gas/arm/sp-pc-validations-bad-t.l
+++ b/gas/testsuite/gas/arm/sp-pc-validations-bad-t.l
@@ -41,7 +41,7 @@
 [^:]*:12: Error: branch must be last instruction in IT block -- `ldreq.w r15,\[r0,r1\]'
 [^:]*:21: *Info: macro .*
 [^:]*:44: *Info: macro .*
-[^:]*:12: Error: branch must be last instruction in IT block -- `ldreq.w r15,\[r0,r1,LSL#2\]'
+[^:]*:12: Error: branch must be last instruction in IT block -- `ldreq.w r15,\[r0,r1,LSL ?#2\]'
 [^:]*:21: *Info: macro .*
 [^:]*:45: *Info: macro .*
 [^:]*:48: Error: r15 not allowed here -- `ldrb pc,\[r0,#4\]'
@@ -59,10 +59,10 @@
 [^:]*:66: Error: r15 not allowed here -- `ldrb pc,\[r0,r1\]'
 [^:]*:67: Error: cannot use register index with PC-relative addressing -- `ldrb r0,\[pc,r1\]'
 [^:]*:68: Error: r15 not allowed here -- `ldrb r0,\[r1,pc\]'
-[^:]*:69: Error: r15 not allowed here -- `ldrb.w pc,\[r0,r1,LSL#1\]'
+[^:]*:69: Error: r15 not allowed here -- `ldrb.w pc,\[r0,r1,LSL ?#1\]'
 [^:]*:70: Error: r13 not allowed here -- `ldrb.w sp,\[r0,r1\]'
-[^:]*:71: Error: r15 not allowed here -- `ldrb.w r2,\[r0,pc,LSL#2\]'
-[^:]*:72: Error: r13 not allowed here -- `ldrb.w r2,\[r0,sp,LSL#2\]'
+[^:]*:71: Error: r15 not allowed here -- `ldrb.w r2,\[r0,pc,LSL ?#2\]'
+[^:]*:72: Error: r13 not allowed here -- `ldrb.w r2,\[r0,sp,LSL ?#2\]'
 [^:]*:75: Error: r15 not allowed here -- `ldrbt pc,\[r0,#4\]'
 [^:]*:76: Error: r13 not allowed here -- `ldrbt sp,\[r0,#4\]'
 [^:]*:79: Error: r15 not allowed here -- `ldrd pc,r0,\[r1\]'
@@ -123,10 +123,10 @@
 [^:]*:149: Error: r15 not allowed here -- `ldrh pc,\[r0,r1\]'
 [^:]*:150: Error: cannot use register index with PC-relative addressing -- `ldrh r0,\[pc,r1\]'
 [^:]*:151: Error: r15 not allowed here -- `ldrh r0,\[r1,pc\]'
-[^:]*:152: Error: r15 not allowed here -- `ldrh.w pc,\[r0,r1,LSL#1\]'
-[^:]*:153: Error: r13 not allowed here -- `ldrh.w sp,\[r0,r1,LSL#1\]'
-[^:]*:154: Error: r15 not allowed here -- `ldrh.w r2,\[r0,pc,LSL#1\]'
-[^:]*:155: Error: r13 not allowed here -- `ldrh.w r2,\[r0,sp,LSL#1\]'
+[^:]*:152: Error: r15 not allowed here -- `ldrh.w pc,\[r0,r1,LSL ?#1\]'
+[^:]*:153: Error: r13 not allowed here -- `ldrh.w sp,\[r0,r1,LSL ?#1\]'
+[^:]*:154: Error: r15 not allowed here -- `ldrh.w r2,\[r0,pc,LSL ?#1\]'
+[^:]*:155: Error: r13 not allowed here -- `ldrh.w r2,\[r0,sp,LSL ?#1\]'
 [^:]*:158: Error: r15 not allowed here -- `ldrht pc,\[r0,#4\]'
 [^:]*:159: Error: r13 not allowed here -- `ldrht sp,\[r0,#4\]'
 [^:]*:162: Error: r15 not allowed here -- `ldrsb pc,\[r0,#4\]'
@@ -144,10 +144,10 @@
 [^:]*:179: Error: r15 not allowed here -- `ldrsb pc,\[r0,r1\]'
 [^:]*:180: Error: cannot use register index with PC-relative addressing -- `ldrsb r0,\[pc,r1\]'
 [^:]*:181: Error: r15 not allowed here -- `ldrsb r0,\[r1,pc\]'
-[^:]*:182: Error: r15 not allowed here -- `ldrsb.w pc,\[r0,r1,LSL#2\]'
-[^:]*:184: Error: r13 not allowed here -- `ldrsb.w sp,\[r0,r1,LSL#2\]'
-[^:]*:185: Error: r15 not allowed here -- `ldrsb.w r2,\[r0,pc,LSL#2\]'
-[^:]*:186: Error: r13 not allowed here -- `ldrsb.w r2,\[r0,sp,LSL#2\]'
+[^:]*:182: Error: r15 not allowed here -- `ldrsb.w pc,\[r0,r1,LSL ?#2\]'
+[^:]*:184: Error: r13 not allowed here -- `ldrsb.w sp,\[r0,r1,LSL ?#2\]'
+[^:]*:185: Error: r15 not allowed here -- `ldrsb.w r2,\[r0,pc,LSL ?#2\]'
+[^:]*:186: Error: r13 not allowed here -- `ldrsb.w r2,\[r0,sp,LSL ?#2\]'
 [^:]*:190: Error: r15 not allowed here -- `ldrsbt pc,\[r0,#4\]'
 [^:]*:191: Error: r13 not allowed here -- `ldrsbt sp,\[r0,#4\]'
 [^:]*:195: Error: r15 not allowed here -- `ldrsh pc,\[r0,#4\]'
@@ -164,10 +164,10 @@
 [^:]*:210: Error: r15 not allowed here -- `ldrsh pc,\[r0,r1\]'
 [^:]*:211: Error: cannot use register index with PC-relative addressing -- `ldrsh r0,\[pc,r1\]'
 [^:]*:212: Error: r15 not allowed here -- `ldrsh r0,\[r1,pc\]'
-[^:]*:214: Error: r15 not allowed here -- `ldrsh.w pc,\[r0,r1,LSL#3\]'
-[^:]*:215: Error: r13 not allowed here -- `ldrsh.w sp,\[r0,r1,LSL#3\]'
-[^:]*:216: Error: r13 not allowed here -- `ldrsh.w r0,\[r1,sp,LSL#3\]'
-[^:]*:217: Error: r15 not allowed here -- `ldrsh.w r0,\[r1,pc,LSL#3\]'
+[^:]*:214: Error: r15 not allowed here -- `ldrsh.w pc,\[r0,r1,LSL ?#3\]'
+[^:]*:215: Error: r13 not allowed here -- `ldrsh.w sp,\[r0,r1,LSL ?#3\]'
+[^:]*:216: Error: r13 not allowed here -- `ldrsh.w r0,\[r1,sp,LSL ?#3\]'
+[^:]*:217: Error: r15 not allowed here -- `ldrsh.w r0,\[r1,pc,LSL ?#3\]'
 [^:]*:221: Error: r15 not allowed here -- `ldrsht pc,\[r0,#4\]'
 [^:]*:222: Error: r13 not allowed here -- `ldrsht sp,\[r0,#4\]'
 [^:]*:226: Error: r15 not allowed here -- `ldrt pc,\[r0,#4\]'
@@ -178,7 +178,7 @@
 [^:]*:235: Error: cannot use post-indexing with PC-relative addressing -- `str r0,\[pc\],#4'
 [^:]*:236: Error: cannot use writeback with PC-relative addressing -- `str r0,\[pc,#4\]!'
 [^:]*:239: Error: cannot use register index with PC-relative addressing -- `str.w r0,\[pc,r1\]'
-[^:]*:240: Error: cannot use register index with PC-relative addressing -- `str.w r0,\[pc,r1,LSL#2\]'
+[^:]*:240: Error: cannot use register index with PC-relative addressing -- `str.w r0,\[pc,r1,LSL ?#2\]'
 [^:]*:246: Error: cannot use register index with PC-relative addressing -- `strb.w r0,\[pc,#4\]'
 [^:]*:247: Error: r15 not allowed here -- `strb.w pc,\[r0,#4\]'
 [^:]*:248: Error: r13 not allowed here -- `strb.w sp,\[r0,#4\]'
@@ -192,15 +192,15 @@
 [^:]*:256: Error: r13 not allowed here -- `strb sp,\[r0\],#4'
 [^:]*:257: Error: r13 not allowed here -- `strb sp,\[r0,#4\]!'
 [^:]*:260: Error: cannot use register index with PC-relative addressing -- `strb.w r0,\[pc,r1\]'
-[^:]*:261: Error: cannot use register index with PC-relative addressing -- `strb.w r0,\[pc,r1,LSL#2\]'
+[^:]*:261: Error: cannot use register index with PC-relative addressing -- `strb.w r0,\[pc,r1,LSL ?#2\]'
 [^:]*:262: Error: r15 not allowed here -- `strb.w pc,\[r0,r1\]'
-[^:]*:263: Error: r15 not allowed here -- `strb.w pc,\[r0,r1,LSL#2\]'
+[^:]*:263: Error: r15 not allowed here -- `strb.w pc,\[r0,r1,LSL ?#2\]'
 [^:]*:264: Error: r13 not allowed here -- `strb.w sp,\[r0,r1\]'
-[^:]*:265: Error: r13 not allowed here -- `strb.w sp,\[r0,r1,LSL#2\]'
+[^:]*:265: Error: r13 not allowed here -- `strb.w sp,\[r0,r1,LSL ?#2\]'
 [^:]*:266: Error: r15 not allowed here -- `strb.w r0,\[r1,pc\]'
-[^:]*:267: Error: r15 not allowed here -- `strb.w r0,\[r1,pc,LSL#2\]'
+[^:]*:267: Error: r15 not allowed here -- `strb.w r0,\[r1,pc,LSL ?#2\]'
 [^:]*:268: Error: r13 not allowed here -- `strb.w r0,\[r1,sp\]'
-[^:]*:269: Error: r13 not allowed here -- `strb.w r0,\[r1,sp,LSL#2\]'
+[^:]*:269: Error: r13 not allowed here -- `strb.w r0,\[r1,sp,LSL ?#2\]'
 [^:]*:272: Error: cannot use register index with PC-relative addressing -- `strbt r0,\[pc,#4\]'
 [^:]*:273: Error: r15 not allowed here -- `strbt pc,\[r0,#4\]'
 [^:]*:274: Error: r13 not allowed here -- `strbt sp,\[r0,#4\]'
@@ -252,7 +252,7 @@
 [^:]*:335: Error: cannot use post-indexing with PC-relative addressing -- `strh r0,\[pc\],#4'
 [^:]*:336: Error: cannot use writeback with PC-relative addressing -- `strh r0,\[pc,#4\]!'
 [^:]*:339: Error: cannot use register index with PC-relative addressing -- `strh.w r0,\[pc,r1\]'
-[^:]*:340: Error: cannot use register index with PC-relative addressing -- `strh.w r0,\[pc,r1,LSL#2\]'
+[^:]*:340: Error: cannot use register index with PC-relative addressing -- `strh.w r0,\[pc,r1,LSL ?#2\]'
 [^:]*:341: Error: r15 not allowed here -- `strh.w pc,\[r0,#4\]'
 [^:]*:342: Error: r15 not allowed here -- `strh.w pc,\[r0\]'
 [^:]*:343: Error: r13 not allowed here -- `strh.w sp,\[r0,#4\]'
@@ -267,10 +267,10 @@
 [^:]*:352: Error: r13 not allowed here -- `strh.w sp,\[r0,r1\]'
 [^:]*:353: Error: r15 not allowed here -- `strh.w r0,\[r1,pc\]'
 [^:]*:354: Error: r13 not allowed here -- `strh.w r0,\[r1,sp\]'
-[^:]*:355: Error: r15 not allowed here -- `strh.w pc,\[r0,r1,LSL#2\]'
-[^:]*:356: Error: r13 not allowed here -- `strh.w sp,\[r0,r1,LSL#2\]'
-[^:]*:357: Error: r15 not allowed here -- `strh.w r0,\[r1,pc,LSL#2\]'
-[^:]*:358: Error: r13 not allowed here -- `strh.w r0,\[r1,sp,LSL#2\]'
+[^:]*:355: Error: r15 not allowed here -- `strh.w pc,\[r0,r1,LSL ?#2\]'
+[^:]*:356: Error: r13 not allowed here -- `strh.w sp,\[r0,r1,LSL ?#2\]'
+[^:]*:357: Error: r15 not allowed here -- `strh.w r0,\[r1,pc,LSL ?#2\]'
+[^:]*:358: Error: r13 not allowed here -- `strh.w r0,\[r1,sp,LSL ?#2\]'
 [^:]*:361: Error: cannot use register index with PC-relative addressing -- `strht r0,\[pc,#4\]'
 [^:]*:362: Error: r15 not allowed here -- `strht pc,\[r0,#4\]'
 [^:]*:363: Error: r13 not allowed here -- `strht sp,\[pc,#4\]'
diff --git a/gas/testsuite/gas/arm/sp-pc-validations-bad.l b/gas/testsuite/gas/arm/sp-pc-validations-bad.l
index 6e0a52b..26ae2de 100644
--- a/gas/testsuite/gas/arm/sp-pc-validations-bad.l
+++ b/gas/testsuite/gas/arm/sp-pc-validations-bad.l
@@ -1,27 +1,27 @@
 [^:]*: Assembler messages:
-[^:]*:11: Error: cannot use register index with PC-relative addressing -- `ldr r0,\[r1,pc,LSL#2\]'
-[^:]*:12: Error: cannot use register index with PC-relative addressing -- `ldr r0,\[r1,pc,LSL#2\]!'
-[^:]*:13: Error: cannot use register index with PC-relative addressing -- `ldr r0,\[r1\],pc,LSL#2'
-[^:]*:14: Error: cannot use register index with PC-relative addressing -- `ldr r0,\[pc,r1,LSL#2\]!'
-[^:]*:15: Error: cannot use register index with PC-relative addressing -- `ldr r0,\[pc\],r1,LSL#2'
+[^:]*:11: Error: cannot use register index with PC-relative addressing -- `ldr r0,\[r1,pc,LSL ?#2\]'
+[^:]*:12: Error: cannot use register index with PC-relative addressing -- `ldr r0,\[r1,pc,LSL ?#2\]!'
+[^:]*:13: Error: cannot use register index with PC-relative addressing -- `ldr r0,\[r1\],pc,LSL ?#2'
+[^:]*:14: Error: cannot use register index with PC-relative addressing -- `ldr r0,\[pc,r1,LSL ?#2\]!'
+[^:]*:15: Error: cannot use register index with PC-relative addressing -- `ldr r0,\[pc\],r1,LSL ?#2'
 [^:]*:18: Error: r15 not allowed here -- `ldrb pc,\[r0,#4\]'
 [^:]*:19: Error: r15 not allowed here -- `ldrb pc,\[r0\],#4'
 [^:]*:20: Error: r15 not allowed here -- `ldrb pc,\[r0,#4\]!'
 [^:]*:23: Error: r15 not allowed here -- `ldrb pc,label'
 [^:]*:24: Error: r15 not allowed here -- `ldrb pc,\[pc,#-0\]'
-[^:]*:27: Error: r15 not allowed here -- `ldrb pc,\[r0,r1,LSL#2\]'
-[^:]*:28: Error: r15 not allowed here -- `ldrb pc,\[r0,r1,LSL#2\]!'
-[^:]*:29: Error: r15 not allowed here -- `ldrb pc,\[r0\],r1,LSL#2'
-[^:]*:30: Error: cannot use register index with PC-relative addressing -- `ldrb r0,\[r1,pc,LSL#2\]'
-[^:]*:31: Error: cannot use register index with PC-relative addressing -- `ldrb r0,\[r1,pc,LSL#2\]!'
-[^:]*:32: Error: cannot use register index with PC-relative addressing -- `ldrb r0,\[r1\],pc,LSL#2'
-[^:]*:33: Error: cannot use register index with PC-relative addressing -- `ldrb r0,\[pc,r1,LSL#2\]!'
-[^:]*:34: Error: cannot use register index with PC-relative addressing -- `ldrb r0,\[pc\],r1,LSL#2'
+[^:]*:27: Error: r15 not allowed here -- `ldrb pc,\[r0,r1,LSL ?#2\]'
+[^:]*:28: Error: r15 not allowed here -- `ldrb pc,\[r0,r1,LSL ?#2\]!'
+[^:]*:29: Error: r15 not allowed here -- `ldrb pc,\[r0\],r1,LSL ?#2'
+[^:]*:30: Error: cannot use register index with PC-relative addressing -- `ldrb r0,\[r1,pc,LSL ?#2\]'
+[^:]*:31: Error: cannot use register index with PC-relative addressing -- `ldrb r0,\[r1,pc,LSL ?#2\]!'
+[^:]*:32: Error: cannot use register index with PC-relative addressing -- `ldrb r0,\[r1\],pc,LSL ?#2'
+[^:]*:33: Error: cannot use register index with PC-relative addressing -- `ldrb r0,\[pc,r1,LSL ?#2\]!'
+[^:]*:34: Error: cannot use register index with PC-relative addressing -- `ldrb r0,\[pc\],r1,LSL ?#2'
 [^:]*:37: Error: r15 not allowed here -- `ldrbt pc,\[r0\],#4'
 [^:]*:38: Error: cannot use register index with PC-relative addressing -- `ldrbt r0,\[pc\],#4'
-[^:]*:39: Error: r15 not allowed here -- `ldrbt pc,\[r0\],r1,LSL#4'
-[^:]*:40: Error: cannot use register index with PC-relative addressing -- `ldrbt r0,\[pc\],r1,LSL#4'
-[^:]*:41: Error: cannot use register index with PC-relative addressing -- `ldrbt r0,\[r1\],pc,LSL#4'
+[^:]*:39: Error: r15 not allowed here -- `ldrbt pc,\[r0\],r1,LSL ?#4'
+[^:]*:40: Error: cannot use register index with PC-relative addressing -- `ldrbt r0,\[pc\],r1,LSL ?#4'
+[^:]*:41: Error: cannot use register index with PC-relative addressing -- `ldrbt r0,\[r1\],pc,LSL ?#4'
 [^:]*:44: Error: r15 not allowed here -- `ldrd r0,pc,\[r1,#4\]'
 [^:]*:45: Error: r15 not allowed here -- `ldrd r0,pc,\[r1\],#4'
 [^:]*:46: Error: r15 not allowed here -- `ldrd r0,pc,\[r1,#4\]!'
@@ -98,32 +98,32 @@
 [^:]*:153: Error: cannot use register index with PC-relative addressing -- `ldrsht r0,\[r1\],pc'
 [^:]*:156: Error: r15 not allowed here -- `ldrt pc,\[r0\],#4'
 [^:]*:157: Error: cannot use register index with PC-relative addressing -- `ldrt r0,\[pc\],#4'
-[^:]*:158: Error: r15 not allowed here -- `ldrt pc,\[r0\],r1,LSL#4'
-[^:]*:159: Error: cannot use register index with PC-relative addressing -- `ldrt r0,\[pc\],r1,LSL#4'
-[^:]*:160: Error: cannot use register index with PC-relative addressing -- `ldrt r0,\[r1\],pc,LSL#4'
+[^:]*:158: Error: r15 not allowed here -- `ldrt pc,\[r0\],r1,LSL ?#4'
+[^:]*:159: Error: cannot use register index with PC-relative addressing -- `ldrt r0,\[pc\],r1,LSL ?#4'
+[^:]*:160: Error: cannot use register index with PC-relative addressing -- `ldrt r0,\[r1\],pc,LSL ?#4'
 [^:]*:166: Error: cannot use register index with PC-relative addressing -- `str r0,\[pc\],#4'
 [^:]*:167: Error: cannot use register index with PC-relative addressing -- `str r0,\[pc,#4\]!'
-[^:]*:170: Error: cannot use register index with PC-relative addressing -- `str r0,\[r1,pc,LSL#4\]'
-[^:]*:171: Error: cannot use register index with PC-relative addressing -- `str r0,\[r1,pc,LSL#4\]!'
-[^:]*:172: Error: cannot use register index with PC-relative addressing -- `str r0,\[r1\],pc,LSL#4'
+[^:]*:170: Error: cannot use register index with PC-relative addressing -- `str r0,\[r1,pc,LSL ?#4\]'
+[^:]*:171: Error: cannot use register index with PC-relative addressing -- `str r0,\[r1,pc,LSL ?#4\]!'
+[^:]*:172: Error: cannot use register index with PC-relative addressing -- `str r0,\[r1\],pc,LSL ?#4'
 [^:]*:175: Error: r15 not allowed here -- `strb pc,\[r0,#4\]'
 [^:]*:176: Error: r15 not allowed here -- `strb pc,\[r0\],#4'
 [^:]*:177: Error: r15 not allowed here -- `strb pc,\[r0,#4\]!'
 [^:]*:178: Error: cannot use register index with PC-relative addressing -- `strb r0,\[pc\],#4'
 [^:]*:179: Error: cannot use register index with PC-relative addressing -- `strb r0,\[pc,#4\]!'
-[^:]*:182: Error: r15 not allowed here -- `strb pc,\[r0,r1,LSL#4\]'
-[^:]*:183: Error: r15 not allowed here -- `strb pc,\[r0,r1,LSL#4\]!'
-[^:]*:184: Error: r15 not allowed here -- `strb pc,\[r0\],r1,LSL#4'
-[^:]*:185: Error: cannot use register index with PC-relative addressing -- `strb r1,\[r0,pc,LSL#4\]'
-[^:]*:186: Error: cannot use register index with PC-relative addressing -- `strb r1,\[r0,pc,LSL#4\]!'
-[^:]*:187: Error: cannot use register index with PC-relative addressing -- `strb r1,\[r0\],pc,LSL#4'
-[^:]*:188: Error: cannot use register index with PC-relative addressing -- `strb r0,\[pc,r1,LSL#4\]!'
-[^:]*:189: Error: cannot use register index with PC-relative addressing -- `strb r0,\[pc\],r1,LSL#4'
+[^:]*:182: Error: r15 not allowed here -- `strb pc,\[r0,r1,LSL ?#4\]'
+[^:]*:183: Error: r15 not allowed here -- `strb pc,\[r0,r1,LSL ?#4\]!'
+[^:]*:184: Error: r15 not allowed here -- `strb pc,\[r0\],r1,LSL ?#4'
+[^:]*:185: Error: cannot use register index with PC-relative addressing -- `strb r1,\[r0,pc,LSL ?#4\]'
+[^:]*:186: Error: cannot use register index with PC-relative addressing -- `strb r1,\[r0,pc,LSL ?#4\]!'
+[^:]*:187: Error: cannot use register index with PC-relative addressing -- `strb r1,\[r0\],pc,LSL ?#4'
+[^:]*:188: Error: cannot use register index with PC-relative addressing -- `strb r0,\[pc,r1,LSL ?#4\]!'
+[^:]*:189: Error: cannot use register index with PC-relative addressing -- `strb r0,\[pc\],r1,LSL ?#4'
 [^:]*:192: Error: r15 not allowed here -- `strbt pc,\[r0\],#4'
 [^:]*:193: Error: cannot use register index with PC-relative addressing -- `strbt r0,\[pc\],#4'
-[^:]*:194: Error: r15 not allowed here -- `strbt pc,\[r0\],r1,LSL#4'
-[^:]*:195: Error: cannot use register index with PC-relative addressing -- `strbt r0,\[pc\],r1,LSL#4'
-[^:]*:196: Error: cannot use register index with PC-relative addressing -- `strbt r0,\[r1\],pc,LSL#4'
+[^:]*:194: Error: r15 not allowed here -- `strbt pc,\[r0\],r1,LSL ?#4'
+[^:]*:195: Error: cannot use register index with PC-relative addressing -- `strbt r0,\[pc\],r1,LSL ?#4'
+[^:]*:196: Error: cannot use register index with PC-relative addressing -- `strbt r0,\[r1\],pc,LSL ?#4'
 [^:]*:199: Error: r15 not allowed here -- `strd r0,pc,\[r1,#4\]'
 [^:]*:200: Error: r15 not allowed here -- `strd r0,pc,\[r1\],#4'
 [^:]*:201: Error: r15 not allowed here -- `strd r0,pc,\[r1,#4\]!'
@@ -167,5 +167,5 @@
 [^:]*:255: Error: cannot use register index with PC-relative addressing -- `strht r0,\[pc\],r1'
 [^:]*:256: Error: cannot use register index with PC-relative addressing -- `strht r0,\[r1\],pc'
 [^:]*:259: Error: cannot use register index with PC-relative addressing -- `strt r0,\[pc\],#4'
-[^:]*:260: Error: cannot use register index with PC-relative addressing -- `strt r0,\[pc\],r1,LSL#4'
-[^:]*:261: Error: cannot use register index with PC-relative addressing -- `strt r0,\[r1\],pc,LSL#4'
+[^:]*:260: Error: cannot use register index with PC-relative addressing -- `strt r0,\[pc\],r1,LSL ?#4'
+[^:]*:261: Error: cannot use register index with PC-relative addressing -- `strt r0,\[r1\],pc,LSL ?#4'
diff --git a/gas/testsuite/gas/arm/t16-bad.l b/gas/testsuite/gas/arm/t16-bad.l
index 6222706..8d8a0db 100644
--- a/gas/testsuite/gas/arm/t16-bad.l
+++ b/gas/testsuite/gas/arm/t16-bad.l
@@ -7,7 +7,7 @@
 [^:]*:36: *Info: macro .*
 [^:]*:16: Error: unshifted register required -- `tst r0,#12'
 [^:]*:36: *Info: macro .*
-[^:]*:17: Error: unshifted register required -- `tst r0,r1,lsl#2'
+[^:]*:17: Error: unshifted register required -- `tst r0,r1,lsl ?#2'
 [^:]*:36: *Info: macro .*
 [^:]*:18: Error: unshifted register required -- `tst r0,r1,lsl r3'
 [^:]*:36: *Info: macro .*
@@ -19,7 +19,7 @@
 [^:]*:37: *Info: macro .*
 [^:]*:16: Error: unshifted register required -- `cmn r0,#12'
 [^:]*:37: *Info: macro .*
-[^:]*:17: Error: unshifted register required -- `cmn r0,r1,lsl#2'
+[^:]*:17: Error: unshifted register required -- `cmn r0,r1,lsl ?#2'
 [^:]*:37: *Info: macro .*
 [^:]*:18: Error: unshifted register required -- `cmn r0,r1,lsl r3'
 [^:]*:37: *Info: macro .*
@@ -31,7 +31,7 @@
 [^:]*:38: *Info: macro .*
 [^:]*:16: Error: unshifted register required -- `mvn r0,#12'
 [^:]*:38: *Info: macro .*
-[^:]*:17: Error: unshifted register required -- `mvn r0,r1,lsl#2'
+[^:]*:17: Error: unshifted register required -- `mvn r0,r1,lsl ?#2'
 [^:]*:38: *Info: macro .*
 [^:]*:18: Error: unshifted register required -- `mvn r0,r1,lsl r3'
 [^:]*:38: *Info: macro .*
@@ -57,7 +57,7 @@
 [^:]*:12: Error: lo register required -- `sxtb r0,r8'
 [^:]*:21: *Info: macro .*
 [^:]*:43: *Info: macro .*
-[^:]*:22: Error: Thumb encoding does not support rotation -- `sxtb r0,r1,ror#8'
+[^:]*:22: Error: Thumb encoding does not support rotation -- `sxtb r0,r1,ror ?#8'
 [^:]*:43: *Info: macro .*
 [^:]*:11: Error: lo register required -- `sxth r8,r0'
 [^:]*:21: *Info: macro .*
@@ -65,7 +65,7 @@
 [^:]*:12: Error: lo register required -- `sxth r0,r8'
 [^:]*:21: *Info: macro .*
 [^:]*:44: *Info: macro .*
-[^:]*:22: Error: Thumb encoding does not support rotation -- `sxth r0,r1,ror#8'
+[^:]*:22: Error: Thumb encoding does not support rotation -- `sxth r0,r1,ror ?#8'
 [^:]*:44: *Info: macro .*
 [^:]*:11: Error: lo register required -- `uxtb r8,r0'
 [^:]*:21: *Info: macro .*
@@ -73,7 +73,7 @@
 [^:]*:12: Error: lo register required -- `uxtb r0,r8'
 [^:]*:21: *Info: macro .*
 [^:]*:45: *Info: macro .*
-[^:]*:22: Error: Thumb encoding does not support rotation -- `uxtb r0,r1,ror#8'
+[^:]*:22: Error: Thumb encoding does not support rotation -- `uxtb r0,r1,ror ?#8'
 [^:]*:45: *Info: macro .*
 [^:]*:11: Error: lo register required -- `uxth r8,r0'
 [^:]*:21: *Info: macro .*
@@ -81,7 +81,7 @@
 [^:]*:12: Error: lo register required -- `uxth r0,r8'
 [^:]*:21: *Info: macro .*
 [^:]*:46: *Info: macro .*
-[^:]*:22: Error: Thumb encoding does not support rotation -- `uxth r0,r1,ror#8'
+[^:]*:22: Error: Thumb encoding does not support rotation -- `uxth r0,r1,ror ?#8'
 [^:]*:46: *Info: macro .*
 [^:]*:25: Error: dest must overlap one source register -- `adc r1,r2,r3'
 [^:]*:30: *Info: macro .*
@@ -94,7 +94,7 @@
 [^:]*:48: *Info: macro .*
 [^:]*:31: Error: unshifted register required -- `adc r0,#12'
 [^:]*:48: *Info: macro .*
-[^:]*:32: Error: unshifted register required -- `adc r0,r1,lsl#2'
+[^:]*:32: Error: unshifted register required -- `adc r0,r1,lsl ?#2'
 [^:]*:48: *Info: macro .*
 [^:]*:33: Error: unshifted register required -- `adc r0,r1,lsl r3'
 [^:]*:48: *Info: macro .*
@@ -109,7 +109,7 @@
 [^:]*:49: *Info: macro .*
 [^:]*:31: Error: unshifted register required -- `and r0,#12'
 [^:]*:49: *Info: macro .*
-[^:]*:32: Error: unshifted register required -- `and r0,r1,lsl#2'
+[^:]*:32: Error: unshifted register required -- `and r0,r1,lsl ?#2'
 [^:]*:49: *Info: macro .*
 [^:]*:33: Error: unshifted register required -- `and r0,r1,lsl r3'
 [^:]*:49: *Info: macro .*
@@ -124,7 +124,7 @@
 [^:]*:50: *Info: macro .*
 [^:]*:31: Error: unshifted register required -- `bic r0,#12'
 [^:]*:50: *Info: macro .*
-[^:]*:32: Error: unshifted register required -- `bic r0,r1,lsl#2'
+[^:]*:32: Error: unshifted register required -- `bic r0,r1,lsl ?#2'
 [^:]*:50: *Info: macro .*
 [^:]*:33: Error: unshifted register required -- `bic r0,r1,lsl r3'
 [^:]*:50: *Info: macro .*
@@ -139,7 +139,7 @@
 [^:]*:51: *Info: macro .*
 [^:]*:31: Error: unshifted register required -- `eor r0,#12'
 [^:]*:51: *Info: macro .*
-[^:]*:32: Error: unshifted register required -- `eor r0,r1,lsl#2'
+[^:]*:32: Error: unshifted register required -- `eor r0,r1,lsl ?#2'
 [^:]*:51: *Info: macro .*
 [^:]*:33: Error: unshifted register required -- `eor r0,r1,lsl r3'
 [^:]*:51: *Info: macro .*
@@ -154,7 +154,7 @@
 [^:]*:52: *Info: macro .*
 [^:]*:31: Error: unshifted register required -- `orr r0,#12'
 [^:]*:52: *Info: macro .*
-[^:]*:32: Error: unshifted register required -- `orr r0,r1,lsl#2'
+[^:]*:32: Error: unshifted register required -- `orr r0,r1,lsl ?#2'
 [^:]*:52: *Info: macro .*
 [^:]*:33: Error: unshifted register required -- `orr r0,r1,lsl r3'
 [^:]*:52: *Info: macro .*
@@ -169,7 +169,7 @@
 [^:]*:53: *Info: macro .*
 [^:]*:31: Error: unshifted register required -- `sbc r0,#12'
 [^:]*:53: *Info: macro .*
-[^:]*:32: Error: unshifted register required -- `sbc r0,r1,lsl#2'
+[^:]*:32: Error: unshifted register required -- `sbc r0,r1,lsl ?#2'
 [^:]*:53: *Info: macro .*
 [^:]*:33: Error: unshifted register required -- `sbc r0,r1,lsl r3'
 [^:]*:53: *Info: macro .*
@@ -220,7 +220,7 @@
 [^:]*:60: *Info: macro .*
 [^:]*:65: *Info: macro .*
 [^:]*:66: Error: ror #imm not supported -- `ror r0,r1,#12'
-[^:]*:69: Error: unshifted register required -- `add r0,r1,lsl#2'
+[^:]*:69: Error: unshifted register required -- `add r0,r1,lsl ?#2'
 [^:]*:70: Error: unshifted register required -- `add r0,r1,lsl r3'
 [^:]*:71: Error: lo register required -- `add r8,r0,#1'
 [^:]*:72: Error: lo register required -- `add r0,r8,#1'
@@ -236,7 +236,7 @@
 [^:]*:27: Error: lo register required -- `sub r0,r8'
 [^:]*:30: *Info: macro .*
 [^:]*:80: *Info: macro .*
-[^:]*:32: Error: unshifted register required -- `sub r0,r1,lsl#2'
+[^:]*:32: Error: unshifted register required -- `sub r0,r1,lsl ?#2'
 [^:]*:80: *Info: macro .*
 [^:]*:33: Error: unshifted register required -- `sub r0,r1,lsl r3'
 [^:]*:80: *Info: macro .*
@@ -246,10 +246,10 @@
 [^:]*:84: Error: lo register required -- `sub r8,r1,r2'
 [^:]*:85: Error: lo register required -- `sub r1,r8,r2'
 [^:]*:86: Error: lo register required -- `sub r1,r2,r8'
-[^:]*:88: Error: shifts in CMP/MOV instructions are only supported in unified syntax -- `cmp r0,r1,lsl#2'
+[^:]*:88: Error: shifts in CMP/MOV instructions are only supported in unified syntax -- `cmp r0,r1,lsl ?#2'
 [^:]*:89: Error: shifts in CMP/MOV instructions are only supported in unified syntax -- `cmp r0,r1,lsl r3'
 [^:]*:90: Error: only lo regs allowed with immediate -- `cmp r8,#255'
-[^:]*:92: Error: shifts in CMP/MOV instructions are only supported in unified syntax -- `mov r0,r1,lsl#2'
+[^:]*:92: Error: shifts in CMP/MOV instructions are only supported in unified syntax -- `mov r0,r1,lsl ?#2'
 [^:]*:93: Error: shifts in CMP/MOV instructions are only supported in unified syntax -- `mov r0,r1,lsl r3'
 [^:]*:94: Error: only lo regs allowed with immediate -- `mov r8,#255'
 [^:]*:98: Error: lo register required -- `ldr r8,\[r0\]'
@@ -364,8 +364,8 @@
 [^:]*:113: *Info: macro .*
 [^:]*:104: Error: Thumb does not support this addressing mode -- `strh r0,\[r1\],r2'
 [^:]*:113: *Info: macro .*
-[^:]*:115: Error: Thumb does not support this addressing mode -- `ldr r0,\[r1,r2,lsl#1\]'
-[^:]*:116: Error: Thumb does not support this addressing mode -- `str r0,\[r1,r2,lsl#1\]'
+[^:]*:115: Error: Thumb does not support this addressing mode -- `ldr r0,\[r1,r2,lsl ?#1\]'
+[^:]*:116: Error: Thumb does not support this addressing mode -- `str r0,\[r1,r2,lsl ?#1\]'
 [^:]*:119: Error: lo register required -- `ldmia r8!,{r1,r2}'
 [^:]*:120: Error: lo register required -- `ldmia r7!,{r8}'
 [^:]*:121: Warning: this instruction will write back the base register
diff --git a/gas/testsuite/gas/arm/thumb2_bad_reg.l b/gas/testsuite/gas/arm/thumb2_bad_reg.l
index 1bdc4ed..d47cd4f 100644
--- a/gas/testsuite/gas/arm/thumb2_bad_reg.l
+++ b/gas/testsuite/gas/arm/thumb2_bad_reg.l
@@ -514,7 +514,7 @@
 [^:]*:[0-9]+: Error: r15 not allowed here -- `ssat r15,#1,r0'
 [^:]*:[0-9]+: Error: r13 not allowed here -- `ssat r0,#1,r13'
 [^:]*:[0-9]+: Error: r15 not allowed here -- `ssat r0,#1,r15'
-[^:]*:[0-9]+: Error: shift expression is too large -- `ssat r1,#1,r3,asr#32'
+[^:]*:[0-9]+: Error: shift expression is too large -- `ssat r1,#1,r3,asr ?#32'
 [^:]*:[0-9]+: Error: r13 not allowed here -- `ssat16 r13,#1,r0'
 [^:]*:[0-9]+: Error: r15 not allowed here -- `ssat16 r15,#1,r0'
 [^:]*:[0-9]+: Error: r13 not allowed here -- `ssat16 r0,#1,r13'
@@ -742,7 +742,7 @@
 [^:]*:[0-9]+: Error: r15 not allowed here -- `usat r15,#1,r0'
 [^:]*:[0-9]+: Error: r13 not allowed here -- `usat r0,#1,r13'
 [^:]*:[0-9]+: Error: r15 not allowed here -- `usat r0,#1,r15'
-[^:]*:[0-9]+: Error: shift expression is too large -- `usat r1,#1,r3,asr#32'
+[^:]*:[0-9]+: Error: shift expression is too large -- `usat r1,#1,r3,asr ?#32'
 [^:]*:[0-9]+: Error: r13 not allowed here -- `usat16 r13,#1,r0'
 [^:]*:[0-9]+: Error: r15 not allowed here -- `usat16 r15,#1,r0'
 [^:]*:[0-9]+: Error: r13 not allowed here -- `usat16 r0,#1,r13'
diff --git a/gas/testsuite/gas/bfin/allinsn16.s b/gas/testsuite/gas/bfin/allinsn16.s
index bf00cb5..4a1636d 100644
--- a/gas/testsuite/gas/bfin/allinsn16.s
+++ b/gas/testsuite/gas/bfin/allinsn16.s
@@ -12,16 +12,16 @@
 # iterate 0x20 times
 .macro _dw b, i, e
 	.if \i < \e
-		__dw \b, \i, (\i + 0x40)
-		_dw \b, (\i + 0x40), \e
+		__dw \b, \i, \i + 0x40
+		_dw \b, \i + 0x40, \e
 	.endif
 .endm
 
 # iterate 0x4 times
 .macro dw b, i, e
 	.if \i < \e
-		_dw \b, \i, (\i + 0x800)
-		dw \b, (\i + 0x800), \e
+		_dw \b, \i, \i + 0x800
+		dw \b, \i + 0x800, \e
 	.endif
 .endm
 
diff --git a/gas/testsuite/gas/i386/avx10_2-256-1-intel.d b/gas/testsuite/gas/i386/avx10_2-256-1-intel.d
new file mode 100644
index 0000000..9aad8f8
--- /dev/null
+++ b/gas/testsuite/gas/i386/avx10_2-256-1-intel.d
@@ -0,0 +1,151 @@
+#objdump: -dw -Mintel
+#name: i386 AVX10.2/256 media insns (Intel disassembly)
+#source: avx10_2-256-1.s
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+#...
+[a-f0-9]+ <_intel>:
+\s*[a-f0-9]+:\s*62 f2 57 2f 50 f4\s+vpdpbssd ymm6\{k7\},ymm5,ymm4
+\s*[a-f0-9]+:\s*62 f2 57 0f 50 f4\s+vpdpbssd xmm6\{k7\},xmm5,xmm4
+\s*[a-f0-9]+:\s*62 f2 57 2f 50 b4 f4 00 00 00 10\s+vpdpbssd ymm6\{k7\},ymm5,YMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 57 38 50 31\s+vpdpbssd ymm6,ymm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 57 2f 50 71 7f\s+vpdpbssd ymm6\{k7\},ymm5,YMMWORD PTR \[ecx\+0xfe0\]
+\s*[a-f0-9]+:\s*62 f2 57 bf 50 72 80\s+vpdpbssd ymm6\{k7\}\{z\},ymm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f2 57 0f 50 b4 f4 00 00 00 10\s+vpdpbssd xmm6\{k7\},xmm5,XMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 57 18 50 31\s+vpdpbssd xmm6,xmm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 57 0f 50 71 7f\s+vpdpbssd xmm6\{k7\},xmm5,XMMWORD PTR \[ecx\+0x7f0\]
+\s*[a-f0-9]+:\s*62 f2 57 9f 50 72 80\s+vpdpbssd xmm6\{k7\}\{z\},xmm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f2 57 2f 51 f4\s+vpdpbssds ymm6\{k7\},ymm5,ymm4
+\s*[a-f0-9]+:\s*62 f2 57 0f 51 f4\s+vpdpbssds xmm6\{k7\},xmm5,xmm4
+\s*[a-f0-9]+:\s*62 f2 57 2f 51 b4 f4 00 00 00 10\s+vpdpbssds ymm6\{k7\},ymm5,YMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 57 38 51 31\s+vpdpbssds ymm6,ymm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 57 2f 51 71 7f\s+vpdpbssds ymm6\{k7\},ymm5,YMMWORD PTR \[ecx\+0xfe0\]
+\s*[a-f0-9]+:\s*62 f2 57 bf 51 72 80\s+vpdpbssds ymm6\{k7\}\{z\},ymm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f2 57 0f 51 b4 f4 00 00 00 10\s+vpdpbssds xmm6\{k7\},xmm5,XMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 57 18 51 31\s+vpdpbssds xmm6,xmm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 57 0f 51 71 7f\s+vpdpbssds xmm6\{k7\},xmm5,XMMWORD PTR \[ecx\+0x7f0\]
+\s*[a-f0-9]+:\s*62 f2 57 9f 51 72 80\s+vpdpbssds xmm6\{k7\}\{z\},xmm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f2 56 2f 50 f4\s+vpdpbsud ymm6\{k7\},ymm5,ymm4
+\s*[a-f0-9]+:\s*62 f2 56 0f 50 f4\s+vpdpbsud xmm6\{k7\},xmm5,xmm4
+\s*[a-f0-9]+:\s*62 f2 56 2f 50 b4 f4 00 00 00 10\s+vpdpbsud ymm6\{k7\},ymm5,YMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 56 38 50 31\s+vpdpbsud ymm6,ymm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 56 2f 50 71 7f\s+vpdpbsud ymm6\{k7\},ymm5,YMMWORD PTR \[ecx\+0xfe0\]
+\s*[a-f0-9]+:\s*62 f2 56 bf 50 72 80\s+vpdpbsud ymm6\{k7\}\{z\},ymm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f2 56 0f 50 b4 f4 00 00 00 10\s+vpdpbsud xmm6\{k7\},xmm5,XMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 56 18 50 31\s+vpdpbsud xmm6,xmm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 56 0f 50 71 7f\s+vpdpbsud xmm6\{k7\},xmm5,XMMWORD PTR \[ecx\+0x7f0\]
+\s*[a-f0-9]+:\s*62 f2 56 9f 50 72 80\s+vpdpbsud xmm6\{k7\}\{z\},xmm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f2 56 2f 51 f4\s+vpdpbsuds ymm6\{k7\},ymm5,ymm4
+\s*[a-f0-9]+:\s*62 f2 56 0f 51 f4\s+vpdpbsuds xmm6\{k7\},xmm5,xmm4
+\s*[a-f0-9]+:\s*62 f2 56 2f 51 b4 f4 00 00 00 10\s+vpdpbsuds ymm6\{k7\},ymm5,YMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 56 38 51 31\s+vpdpbsuds ymm6,ymm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 56 2f 51 71 7f\s+vpdpbsuds ymm6\{k7\},ymm5,YMMWORD PTR \[ecx\+0xfe0\]
+\s*[a-f0-9]+:\s*62 f2 56 bf 51 72 80\s+vpdpbsuds ymm6\{k7\}\{z\},ymm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f2 56 0f 51 b4 f4 00 00 00 10\s+vpdpbsuds xmm6\{k7\},xmm5,XMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 56 18 51 31\s+vpdpbsuds xmm6,xmm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 56 0f 51 71 7f\s+vpdpbsuds xmm6\{k7\},xmm5,XMMWORD PTR \[ecx\+0x7f0\]
+\s*[a-f0-9]+:\s*62 f2 56 9f 51 72 80\s+vpdpbsuds xmm6\{k7\}\{z\},xmm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f2 54 2f 50 f4\s+vpdpbuud ymm6\{k7\},ymm5,ymm4
+\s*[a-f0-9]+:\s*62 f2 54 0f 50 f4\s+vpdpbuud xmm6\{k7\},xmm5,xmm4
+\s*[a-f0-9]+:\s*62 f2 54 2f 50 b4 f4 00 00 00 10\s+vpdpbuud ymm6\{k7\},ymm5,YMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 54 38 50 31\s+vpdpbuud ymm6,ymm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 54 2f 50 71 7f\s+vpdpbuud ymm6\{k7\},ymm5,YMMWORD PTR \[ecx\+0xfe0\]
+\s*[a-f0-9]+:\s*62 f2 54 bf 50 72 80\s+vpdpbuud ymm6\{k7\}\{z\},ymm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f2 54 0f 50 b4 f4 00 00 00 10\s+vpdpbuud xmm6\{k7\},xmm5,XMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 54 18 50 31\s+vpdpbuud xmm6,xmm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 54 0f 50 71 7f\s+vpdpbuud xmm6\{k7\},xmm5,XMMWORD PTR \[ecx\+0x7f0\]
+\s*[a-f0-9]+:\s*62 f2 54 9f 50 72 80\s+vpdpbuud xmm6\{k7\}\{z\},xmm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f2 54 2f 51 f4\s+vpdpbuuds ymm6\{k7\},ymm5,ymm4
+\s*[a-f0-9]+:\s*62 f2 54 0f 51 f4\s+vpdpbuuds xmm6\{k7\},xmm5,xmm4
+\s*[a-f0-9]+:\s*62 f2 54 2f 51 b4 f4 00 00 00 10\s+vpdpbuuds ymm6\{k7\},ymm5,YMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 54 38 51 31\s+vpdpbuuds ymm6,ymm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 54 2f 51 71 7f\s+vpdpbuuds ymm6\{k7\},ymm5,YMMWORD PTR \[ecx\+0xfe0\]
+\s*[a-f0-9]+:\s*62 f2 54 bf 51 72 80\s+vpdpbuuds ymm6\{k7\}\{z\},ymm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f2 54 0f 51 b4 f4 00 00 00 10\s+vpdpbuuds xmm6\{k7\},xmm5,XMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 54 18 51 31\s+vpdpbuuds xmm6,xmm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 54 0f 51 71 7f\s+vpdpbuuds xmm6\{k7\},xmm5,XMMWORD PTR \[ecx\+0x7f0\]
+\s*[a-f0-9]+:\s*62 f2 54 9f 51 72 80\s+vpdpbuuds xmm6\{k7\}\{z\},xmm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f2 56 2f d2 f4\s+vpdpwsud ymm6\{k7\},ymm5,ymm4
+\s*[a-f0-9]+:\s*62 f2 56 0f d2 f4\s+vpdpwsud xmm6\{k7\},xmm5,xmm4
+\s*[a-f0-9]+:\s*62 f2 56 2f d2 b4 f4 00 00 00 10\s+vpdpwsud ymm6\{k7\},ymm5,YMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 56 38 d2 31\s+vpdpwsud ymm6,ymm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 56 2f d2 71 7f\s+vpdpwsud ymm6\{k7\},ymm5,YMMWORD PTR \[ecx\+0xfe0\]
+\s*[a-f0-9]+:\s*62 f2 56 bf d2 72 80\s+vpdpwsud ymm6\{k7\}\{z\},ymm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f2 56 0f d2 b4 f4 00 00 00 10\s+vpdpwsud xmm6\{k7\},xmm5,XMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 56 18 d2 31\s+vpdpwsud xmm6,xmm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 56 0f d2 71 7f\s+vpdpwsud xmm6\{k7\},xmm5,XMMWORD PTR \[ecx\+0x7f0\]
+\s*[a-f0-9]+:\s*62 f2 56 9f d2 72 80\s+vpdpwsud xmm6\{k7\}\{z\},xmm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f2 56 2f d3 f4\s+vpdpwsuds ymm6\{k7\},ymm5,ymm4
+\s*[a-f0-9]+:\s*62 f2 56 0f d3 f4\s+vpdpwsuds xmm6\{k7\},xmm5,xmm4
+\s*[a-f0-9]+:\s*62 f2 56 2f d3 b4 f4 00 00 00 10\s+vpdpwsuds ymm6\{k7\},ymm5,YMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 56 38 d3 31\s+vpdpwsuds ymm6,ymm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 56 2f d3 71 7f\s+vpdpwsuds ymm6\{k7\},ymm5,YMMWORD PTR \[ecx\+0xfe0\]
+\s*[a-f0-9]+:\s*62 f2 56 bf d3 72 80\s+vpdpwsuds ymm6\{k7\}\{z\},ymm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f2 56 0f d3 b4 f4 00 00 00 10\s+vpdpwsuds xmm6\{k7\},xmm5,XMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 56 18 d3 31\s+vpdpwsuds xmm6,xmm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 56 0f d3 71 7f\s+vpdpwsuds xmm6\{k7\},xmm5,XMMWORD PTR \[ecx\+0x7f0\]
+\s*[a-f0-9]+:\s*62 f2 56 9f d3 72 80\s+vpdpwsuds xmm6\{k7\}\{z\},xmm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f2 55 2f d2 f4\s+vpdpwusd ymm6\{k7\},ymm5,ymm4
+\s*[a-f0-9]+:\s*62 f2 55 0f d2 f4\s+vpdpwusd xmm6\{k7\},xmm5,xmm4
+\s*[a-f0-9]+:\s*62 f2 55 2f d2 b4 f4 00 00 00 10\s+vpdpwusd ymm6\{k7\},ymm5,YMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 55 38 d2 31\s+vpdpwusd ymm6,ymm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 55 2f d2 71 7f\s+vpdpwusd ymm6\{k7\},ymm5,YMMWORD PTR \[ecx\+0xfe0\]
+\s*[a-f0-9]+:\s*62 f2 55 bf d2 72 80\s+vpdpwusd ymm6\{k7\}\{z\},ymm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f2 55 0f d2 b4 f4 00 00 00 10\s+vpdpwusd xmm6\{k7\},xmm5,XMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 55 18 d2 31\s+vpdpwusd xmm6,xmm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 55 0f d2 71 7f\s+vpdpwusd xmm6\{k7\},xmm5,XMMWORD PTR \[ecx\+0x7f0\]
+\s*[a-f0-9]+:\s*62 f2 55 9f d2 72 80\s+vpdpwusd xmm6\{k7\}\{z\},xmm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f2 55 2f d3 f4\s+vpdpwusds ymm6\{k7\},ymm5,ymm4
+\s*[a-f0-9]+:\s*62 f2 55 0f d3 f4\s+vpdpwusds xmm6\{k7\},xmm5,xmm4
+\s*[a-f0-9]+:\s*62 f2 55 2f d3 b4 f4 00 00 00 10\s+vpdpwusds ymm6\{k7\},ymm5,YMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 55 38 d3 31\s+vpdpwusds ymm6,ymm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 55 2f d3 71 7f\s+vpdpwusds ymm6\{k7\},ymm5,YMMWORD PTR \[ecx\+0xfe0\]
+\s*[a-f0-9]+:\s*62 f2 55 bf d3 72 80\s+vpdpwusds ymm6\{k7\}\{z\},ymm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f2 55 0f d3 b4 f4 00 00 00 10\s+vpdpwusds xmm6\{k7\},xmm5,XMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 55 18 d3 31\s+vpdpwusds xmm6,xmm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 55 0f d3 71 7f\s+vpdpwusds xmm6\{k7\},xmm5,XMMWORD PTR \[ecx\+0x7f0\]
+\s*[a-f0-9]+:\s*62 f2 55 9f d3 72 80\s+vpdpwusds xmm6\{k7\}\{z\},xmm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f2 54 2f d2 f4\s+vpdpwuud ymm6\{k7\},ymm5,ymm4
+\s*[a-f0-9]+:\s*62 f2 54 0f d2 f4\s+vpdpwuud xmm6\{k7\},xmm5,xmm4
+\s*[a-f0-9]+:\s*62 f2 54 2f d2 b4 f4 00 00 00 10\s+vpdpwuud ymm6\{k7\},ymm5,YMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 54 38 d2 31\s+vpdpwuud ymm6,ymm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 54 2f d2 71 7f\s+vpdpwuud ymm6\{k7\},ymm5,YMMWORD PTR \[ecx\+0xfe0\]
+\s*[a-f0-9]+:\s*62 f2 54 bf d2 72 80\s+vpdpwuud ymm6\{k7\}\{z\},ymm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f2 54 0f d2 b4 f4 00 00 00 10\s+vpdpwuud xmm6\{k7\},xmm5,XMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 54 18 d2 31\s+vpdpwuud xmm6,xmm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 54 0f d2 71 7f\s+vpdpwuud xmm6\{k7\},xmm5,XMMWORD PTR \[ecx\+0x7f0\]
+\s*[a-f0-9]+:\s*62 f2 54 9f d2 72 80\s+vpdpwuud xmm6\{k7\}\{z\},xmm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f2 54 2f d3 f4\s+vpdpwuuds ymm6\{k7\},ymm5,ymm4
+\s*[a-f0-9]+:\s*62 f2 54 0f d3 f4\s+vpdpwuuds xmm6\{k7\},xmm5,xmm4
+\s*[a-f0-9]+:\s*62 f2 54 2f d3 b4 f4 00 00 00 10\s+vpdpwuuds ymm6\{k7\},ymm5,YMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 54 38 d3 31\s+vpdpwuuds ymm6,ymm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 54 2f d3 71 7f\s+vpdpwuuds ymm6\{k7\},ymm5,YMMWORD PTR \[ecx\+0xfe0\]
+\s*[a-f0-9]+:\s*62 f2 54 bf d3 72 80\s+vpdpwuuds ymm6\{k7\}\{z\},ymm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f2 54 0f d3 b4 f4 00 00 00 10\s+vpdpwuuds xmm6\{k7\},xmm5,XMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 54 18 d3 31\s+vpdpwuuds xmm6,xmm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 54 0f d3 71 7f\s+vpdpwuuds xmm6\{k7\},xmm5,XMMWORD PTR \[ecx\+0x7f0\]
+\s*[a-f0-9]+:\s*62 f2 54 9f d3 72 80\s+vpdpwuuds xmm6\{k7\}\{z\},xmm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f2 54 2f 52 f4\s+vdpphps ymm6\{k7\},ymm5,ymm4
+\s*[a-f0-9]+:\s*62 f2 54 0f 52 f4\s+vdpphps xmm6\{k7\},xmm5,xmm4
+\s*[a-f0-9]+:\s*62 f2 54 2f 52 b4 f4 00 00 00 10\s+vdpphps ymm6\{k7\},ymm5,YMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 54 38 52 31\s+vdpphps ymm6,ymm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 54 2f 52 71 7f\s+vdpphps ymm6\{k7\},ymm5,YMMWORD PTR \[ecx\+0xfe0\]
+\s*[a-f0-9]+:\s*62 f2 54 bf 52 72 80\s+vdpphps ymm6\{k7\}\{z\},ymm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f2 54 0f 52 b4 f4 00 00 00 10\s+vdpphps xmm6\{k7\},xmm5,XMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 54 18 52 31\s+vdpphps xmm6,xmm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 54 0f 52 71 7f\s+vdpphps xmm6\{k7\},xmm5,XMMWORD PTR \[ecx\+0x7f0\]
+\s*[a-f0-9]+:\s*62 f2 54 9f 52 72 80\s+vdpphps xmm6\{k7\}\{z\},xmm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f3 56 0f 42 f4 7b\s+vmpsadbw xmm6\{k7\},xmm5,xmm4,0x7b
+\s*[a-f0-9]+:\s*62 f3 56 2f 42 f4 7b\s+vmpsadbw ymm6\{k7\},ymm5,ymm4,0x7b
+\s*[a-f0-9]+:\s*62 f3 56 2f 42 b4 f4 00 00 00 10 7b\s+vmpsadbw ymm6\{k7\},ymm5,YMMWORD PTR \[esp\+esi\*8\+0x10000000\],0x7b
+\s*[a-f0-9]+:\s*62 f3 56 2f 42 31 7b\s+vmpsadbw ymm6\{k7\},ymm5,YMMWORD PTR \[ecx\],0x7b
+\s*[a-f0-9]+:\s*62 f3 56 2f 42 71 7f 7b\s+vmpsadbw ymm6\{k7\},ymm5,YMMWORD PTR \[ecx\+0xfe0\],0x7b
+\s*[a-f0-9]+:\s*62 f3 56 af 42 72 80 7b\s+vmpsadbw ymm6\{k7\}\{z\},ymm5,YMMWORD PTR \[edx-0x1000\],0x7b
+\s*[a-f0-9]+:\s*62 f3 56 0f 42 b4 f4 00 00 00 10 7b\s+vmpsadbw xmm6\{k7\},xmm5,XMMWORD PTR \[esp\+esi\*8\+0x10000000\],0x7b
+\s*[a-f0-9]+:\s*62 f3 56 0f 42 31 7b\s+vmpsadbw xmm6\{k7\},xmm5,XMMWORD PTR \[ecx\],0x7b
+\s*[a-f0-9]+:\s*62 f3 56 0f 42 71 7f 7b\s+vmpsadbw xmm6\{k7\},xmm5,XMMWORD PTR \[ecx\+0x7f0\],0x7b
+\s*[a-f0-9]+:\s*62 f3 56 8f 42 72 80 7b\s+vmpsadbw xmm6\{k7\}\{z\},xmm5,XMMWORD PTR \[edx-0x800\],0x7b
+#pass
diff --git a/gas/testsuite/gas/i386/avx10_2-256-1.d b/gas/testsuite/gas/i386/avx10_2-256-1.d
new file mode 100644
index 0000000..b3485e6
--- /dev/null
+++ b/gas/testsuite/gas/i386/avx10_2-256-1.d
@@ -0,0 +1,149 @@
+#objdump: -dw
+#name: i386 AVX10.2/256 media insns
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+0+ <_start>:
+\s*[a-f0-9]+:\s*62 f2 57 2f 50 f4\s+vpdpbssd %ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 57 0f 50 f4\s+vpdpbssd %xmm4,%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 57 2f 50 b4 f4 00 00 00 10\s+vpdpbssd 0x10000000\(%esp,%esi,8\),%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 57 38 50 31\s+vpdpbssd \(%ecx\)\{1to8\},%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 57 2f 50 71 7f\s+vpdpbssd 0xfe0\(%ecx\),%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 57 bf 50 72 80\s+vpdpbssd -0x200\(%edx\)\{1to8\},%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 57 0f 50 b4 f4 00 00 00 10\s+vpdpbssd 0x10000000\(%esp,%esi,8\),%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 57 18 50 31\s+vpdpbssd \(%ecx\)\{1to4\},%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f2 57 0f 50 71 7f\s+vpdpbssd 0x7f0\(%ecx\),%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 57 9f 50 72 80\s+vpdpbssd -0x200\(%edx\)\{1to4\},%xmm5,%xmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 57 2f 51 f4\s+vpdpbssds %ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 57 0f 51 f4\s+vpdpbssds %xmm4,%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 57 2f 51 b4 f4 00 00 00 10\s+vpdpbssds 0x10000000\(%esp,%esi,8\),%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 57 38 51 31\s+vpdpbssds \(%ecx\)\{1to8\},%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 57 2f 51 71 7f\s+vpdpbssds 0xfe0\(%ecx\),%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 57 bf 51 72 80\s+vpdpbssds -0x200\(%edx\)\{1to8\},%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 57 0f 51 b4 f4 00 00 00 10\s+vpdpbssds 0x10000000\(%esp,%esi,8\),%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 57 18 51 31\s+vpdpbssds \(%ecx\)\{1to4\},%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f2 57 0f 51 71 7f\s+vpdpbssds 0x7f0\(%ecx\),%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 57 9f 51 72 80\s+vpdpbssds -0x200\(%edx\)\{1to4\},%xmm5,%xmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 56 2f 50 f4\s+vpdpbsud %ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 56 0f 50 f4\s+vpdpbsud %xmm4,%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 56 2f 50 b4 f4 00 00 00 10\s+vpdpbsud 0x10000000\(%esp,%esi,8\),%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 56 38 50 31\s+vpdpbsud \(%ecx\)\{1to8\},%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 56 2f 50 71 7f\s+vpdpbsud 0xfe0\(%ecx\),%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 56 bf 50 72 80\s+vpdpbsud -0x200\(%edx\)\{1to8\},%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 56 0f 50 b4 f4 00 00 00 10\s+vpdpbsud 0x10000000\(%esp,%esi,8\),%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 56 18 50 31\s+vpdpbsud \(%ecx\)\{1to4\},%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f2 56 0f 50 71 7f\s+vpdpbsud 0x7f0\(%ecx\),%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 56 9f 50 72 80\s+vpdpbsud -0x200\(%edx\)\{1to4\},%xmm5,%xmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 56 2f 51 f4\s+vpdpbsuds %ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 56 0f 51 f4\s+vpdpbsuds %xmm4,%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 56 2f 51 b4 f4 00 00 00 10\s+vpdpbsuds 0x10000000\(%esp,%esi,8\),%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 56 38 51 31\s+vpdpbsuds \(%ecx\)\{1to8\},%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 56 2f 51 71 7f\s+vpdpbsuds 0xfe0\(%ecx\),%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 56 bf 51 72 80\s+vpdpbsuds -0x200\(%edx\)\{1to8\},%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 56 0f 51 b4 f4 00 00 00 10\s+vpdpbsuds 0x10000000\(%esp,%esi,8\),%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 56 18 51 31\s+vpdpbsuds \(%ecx\)\{1to4\},%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f2 56 0f 51 71 7f\s+vpdpbsuds 0x7f0\(%ecx\),%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 56 9f 51 72 80\s+vpdpbsuds -0x200\(%edx\)\{1to4\},%xmm5,%xmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 54 2f 50 f4\s+vpdpbuud %ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 54 0f 50 f4\s+vpdpbuud %xmm4,%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 54 2f 50 b4 f4 00 00 00 10\s+vpdpbuud 0x10000000\(%esp,%esi,8\),%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 54 38 50 31\s+vpdpbuud \(%ecx\)\{1to8\},%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 54 2f 50 71 7f\s+vpdpbuud 0xfe0\(%ecx\),%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 54 bf 50 72 80\s+vpdpbuud -0x200\(%edx\)\{1to8\},%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 54 0f 50 b4 f4 00 00 00 10\s+vpdpbuud 0x10000000\(%esp,%esi,8\),%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 54 18 50 31\s+vpdpbuud \(%ecx\)\{1to4\},%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f2 54 0f 50 71 7f\s+vpdpbuud 0x7f0\(%ecx\),%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 54 9f 50 72 80\s+vpdpbuud -0x200\(%edx\)\{1to4\},%xmm5,%xmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 54 2f 51 f4\s+vpdpbuuds %ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 54 0f 51 f4\s+vpdpbuuds %xmm4,%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 54 2f 51 b4 f4 00 00 00 10\s+vpdpbuuds 0x10000000\(%esp,%esi,8\),%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 54 38 51 31\s+vpdpbuuds \(%ecx\)\{1to8\},%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 54 2f 51 71 7f\s+vpdpbuuds 0xfe0\(%ecx\),%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 54 bf 51 72 80\s+vpdpbuuds -0x200\(%edx\)\{1to8\},%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 54 0f 51 b4 f4 00 00 00 10\s+vpdpbuuds 0x10000000\(%esp,%esi,8\),%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 54 18 51 31\s+vpdpbuuds \(%ecx\)\{1to4\},%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f2 54 0f 51 71 7f\s+vpdpbuuds 0x7f0\(%ecx\),%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 54 9f 51 72 80\s+vpdpbuuds -0x200\(%edx\)\{1to4\},%xmm5,%xmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 56 2f d2 f4\s+vpdpwsud %ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 56 0f d2 f4\s+vpdpwsud %xmm4,%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 56 2f d2 b4 f4 00 00 00 10\s+vpdpwsud 0x10000000\(%esp,%esi,8\),%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 56 38 d2 31\s+vpdpwsud \(%ecx\)\{1to8\},%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 56 2f d2 71 7f\s+vpdpwsud 0xfe0\(%ecx\),%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 56 bf d2 72 80\s+vpdpwsud -0x200\(%edx\)\{1to8\},%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 56 0f d2 b4 f4 00 00 00 10\s+vpdpwsud 0x10000000\(%esp,%esi,8\),%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 56 18 d2 31\s+vpdpwsud \(%ecx\)\{1to4\},%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f2 56 0f d2 71 7f\s+vpdpwsud 0x7f0\(%ecx\),%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 56 9f d2 72 80\s+vpdpwsud -0x200\(%edx\)\{1to4\},%xmm5,%xmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 56 2f d3 f4\s+vpdpwsuds %ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 56 0f d3 f4\s+vpdpwsuds %xmm4,%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 56 2f d3 b4 f4 00 00 00 10\s+vpdpwsuds 0x10000000\(%esp,%esi,8\),%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 56 38 d3 31\s+vpdpwsuds \(%ecx\)\{1to8\},%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 56 2f d3 71 7f\s+vpdpwsuds 0xfe0\(%ecx\),%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 56 bf d3 72 80\s+vpdpwsuds -0x200\(%edx\)\{1to8\},%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 56 0f d3 b4 f4 00 00 00 10\s+vpdpwsuds 0x10000000\(%esp,%esi,8\),%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 56 18 d3 31\s+vpdpwsuds \(%ecx\)\{1to4\},%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f2 56 0f d3 71 7f\s+vpdpwsuds 0x7f0\(%ecx\),%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 56 9f d3 72 80\s+vpdpwsuds -0x200\(%edx\)\{1to4\},%xmm5,%xmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 55 2f d2 f4\s+vpdpwusd %ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 55 0f d2 f4\s+vpdpwusd %xmm4,%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 55 2f d2 b4 f4 00 00 00 10\s+vpdpwusd 0x10000000\(%esp,%esi,8\),%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 55 38 d2 31\s+vpdpwusd \(%ecx\)\{1to8\},%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 55 2f d2 71 7f\s+vpdpwusd 0xfe0\(%ecx\),%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 55 bf d2 72 80\s+vpdpwusd -0x200\(%edx\)\{1to8\},%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 55 0f d2 b4 f4 00 00 00 10\s+vpdpwusd 0x10000000\(%esp,%esi,8\),%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 55 18 d2 31\s+vpdpwusd \(%ecx\)\{1to4\},%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f2 55 0f d2 71 7f\s+vpdpwusd 0x7f0\(%ecx\),%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 55 9f d2 72 80\s+vpdpwusd -0x200\(%edx\)\{1to4\},%xmm5,%xmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 55 2f d3 f4\s+vpdpwusds %ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 55 0f d3 f4\s+vpdpwusds %xmm4,%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 55 2f d3 b4 f4 00 00 00 10\s+vpdpwusds 0x10000000\(%esp,%esi,8\),%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 55 38 d3 31\s+vpdpwusds \(%ecx\)\{1to8\},%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 55 2f d3 71 7f\s+vpdpwusds 0xfe0\(%ecx\),%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 55 bf d3 72 80\s+vpdpwusds -0x200\(%edx\)\{1to8\},%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 55 0f d3 b4 f4 00 00 00 10\s+vpdpwusds 0x10000000\(%esp,%esi,8\),%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 55 18 d3 31\s+vpdpwusds \(%ecx\)\{1to4\},%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f2 55 0f d3 71 7f\s+vpdpwusds 0x7f0\(%ecx\),%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 55 9f d3 72 80\s+vpdpwusds -0x200\(%edx\)\{1to4\},%xmm5,%xmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 54 2f d2 f4\s+vpdpwuud %ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 54 0f d2 f4\s+vpdpwuud %xmm4,%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 54 2f d2 b4 f4 00 00 00 10\s+vpdpwuud 0x10000000\(%esp,%esi,8\),%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 54 38 d2 31\s+vpdpwuud \(%ecx\)\{1to8\},%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 54 2f d2 71 7f\s+vpdpwuud 0xfe0\(%ecx\),%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 54 bf d2 72 80\s+vpdpwuud -0x200\(%edx\)\{1to8\},%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 54 0f d2 b4 f4 00 00 00 10\s+vpdpwuud 0x10000000\(%esp,%esi,8\),%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 54 18 d2 31\s+vpdpwuud \(%ecx\)\{1to4\},%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f2 54 0f d2 71 7f\s+vpdpwuud 0x7f0\(%ecx\),%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 54 9f d2 72 80\s+vpdpwuud -0x200\(%edx\)\{1to4\},%xmm5,%xmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 54 2f d3 f4\s+vpdpwuuds %ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 54 0f d3 f4\s+vpdpwuuds %xmm4,%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 54 2f d3 b4 f4 00 00 00 10\s+vpdpwuuds 0x10000000\(%esp,%esi,8\),%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 54 38 d3 31\s+vpdpwuuds \(%ecx\)\{1to8\},%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 54 2f d3 71 7f\s+vpdpwuuds 0xfe0\(%ecx\),%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 54 bf d3 72 80\s+vpdpwuuds -0x200\(%edx\)\{1to8\},%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 54 0f d3 b4 f4 00 00 00 10\s+vpdpwuuds 0x10000000\(%esp,%esi,8\),%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 54 18 d3 31\s+vpdpwuuds \(%ecx\)\{1to4\},%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f2 54 0f d3 71 7f\s+vpdpwuuds 0x7f0\(%ecx\),%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 54 9f d3 72 80\s+vpdpwuuds -0x200\(%edx\)\{1to4\},%xmm5,%xmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 54 2f 52 f4\s+vdpphps %ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 54 0f 52 f4\s+vdpphps %xmm4,%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 54 2f 52 b4 f4 00 00 00 10\s+vdpphps 0x10000000\(%esp,%esi,8\),%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 54 38 52 31\s+vdpphps \(%ecx\)\{1to8\},%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 54 2f 52 71 7f\s+vdpphps 0xfe0\(%ecx\),%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 54 bf 52 72 80\s+vdpphps -0x200\(%edx\)\{1to8\},%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 54 0f 52 b4 f4 00 00 00 10\s+vdpphps 0x10000000\(%esp,%esi,8\),%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 54 18 52 31\s+vdpphps \(%ecx\)\{1to4\},%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f2 54 0f 52 71 7f\s+vdpphps 0x7f0\(%ecx\),%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 54 9f 52 72 80\s+vdpphps -0x200\(%edx\)\{1to4\},%xmm5,%xmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f3 56 0f 42 f4 7b\s+vmpsadbw \$0x7b,%xmm4,%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f3 56 2f 42 f4 7b\s+vmpsadbw \$0x7b,%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f3 56 2f 42 b4 f4 00 00 00 10 7b\s+vmpsadbw \$0x7b,0x10000000\(%esp,%esi,8\),%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f3 56 2f 42 31 7b\s+vmpsadbw \$0x7b,\(%ecx\),%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f3 56 2f 42 71 7f 7b\s+vmpsadbw \$0x7b,0xfe0\(%ecx\),%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f3 56 af 42 72 80 7b\s+vmpsadbw \$0x7b,-0x1000\(%edx\),%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f3 56 0f 42 b4 f4 00 00 00 10 7b\s+vmpsadbw \$0x7b,0x10000000\(%esp,%esi,8\),%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f3 56 0f 42 31 7b\s+vmpsadbw \$0x7b,\(%ecx\),%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f3 56 0f 42 71 7f 7b\s+vmpsadbw \$0x7b,0x7f0\(%ecx\),%xmm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f3 56 8f 42 72 80 7b\s+vmpsadbw \$0x7b,-0x800\(%edx\),%xmm5,%xmm6\{%k7\}\{z\}
+#pass
diff --git a/gas/testsuite/gas/i386/avx10_2-256-1.s b/gas/testsuite/gas/i386/avx10_2-256-1.s
new file mode 100644
index 0000000..b1b30bd
--- /dev/null
+++ b/gas/testsuite/gas/i386/avx10_2-256-1.s
@@ -0,0 +1,111 @@
+# Check 32bit AVX10.2/256 instructions
+
+	.arch generic32
+	.arch .avx10.2/256
+	.text
+_start:
+	.irp m, ss, su, uu
+	.irp s, "", s
+	vpdpb\m\()d\s	%ymm4, %ymm5, %ymm6{%k7}
+	vpdpb\m\()d\s	%xmm4, %xmm5, %xmm6{%k7}
+	vpdpb\m\()d\s	0x10000000(%esp, %esi, 8), %ymm5, %ymm6{%k7}
+	vpdpb\m\()d\s	(%ecx){1to8}, %ymm5, %ymm6
+	vpdpb\m\()d\s	4064(%ecx), %ymm5, %ymm6{%k7}
+	vpdpb\m\()d\s	-512(%edx){1to8}, %ymm5, %ymm6{%k7}{z}
+	vpdpb\m\()d\s	0x10000000(%esp, %esi, 8), %xmm5, %xmm6{%k7}
+	vpdpb\m\()d\s	(%ecx){1to4}, %xmm5, %xmm6
+	vpdpb\m\()d\s	2032(%ecx), %xmm5, %xmm6{%k7}
+	vpdpb\m\()d\s	-512(%edx){1to4}, %xmm5, %xmm6{%k7}{z}
+	.endr
+	.endr
+
+	.irp m, su, us, uu
+	.irp s, "", s
+	vpdpw\m\()d\s	%ymm4, %ymm5, %ymm6{%k7}
+	vpdpw\m\()d\s	%xmm4, %xmm5, %xmm6{%k7}
+	vpdpw\m\()d\s	0x10000000(%esp, %esi, 8), %ymm5, %ymm6{%k7}
+	vpdpw\m\()d\s	(%ecx){1to8}, %ymm5, %ymm6
+	vpdpw\m\()d\s	4064(%ecx), %ymm5, %ymm6{%k7}
+	vpdpw\m\()d\s	-512(%edx){1to8}, %ymm5, %ymm6{%k7}{z}
+	vpdpw\m\()d\s	0x10000000(%esp, %esi, 8), %xmm5, %xmm6{%k7}
+	vpdpw\m\()d\s	(%ecx){1to4}, %xmm5, %xmm6
+	vpdpw\m\()d\s	2032(%ecx), %xmm5, %xmm6{%k7}
+	vpdpw\m\()d\s	-512(%edx){1to4}, %xmm5, %xmm6{%k7}{z}
+	.endr
+	.endr
+
+	vdpphps	%ymm4, %ymm5, %ymm6{%k7}
+	vdpphps	%xmm4, %xmm5, %xmm6{%k7}
+	vdpphps	0x10000000(%esp, %esi, 8), %ymm5, %ymm6{%k7}
+	vdpphps	(%ecx){1to8}, %ymm5, %ymm6
+	vdpphps	4064(%ecx), %ymm5, %ymm6{%k7}
+	vdpphps	-512(%edx){1to8}, %ymm5, %ymm6{%k7}{z}
+	vdpphps	0x10000000(%esp, %esi, 8), %xmm5, %xmm6{%k7}
+	vdpphps	(%ecx){1to4}, %xmm5, %xmm6
+	vdpphps	2032(%ecx), %xmm5, %xmm6{%k7}
+	vdpphps	-512(%edx){1to4}, %xmm5, %xmm6{%k7}{z}
+
+	vmpsadbw	$123, %xmm4, %xmm5, %xmm6{%k7}
+	vmpsadbw	$123, %ymm4, %ymm5, %ymm6{%k7}
+	vmpsadbw	$123, 0x10000000(%esp, %esi, 8), %ymm5, %ymm6{%k7}
+	vmpsadbw	$123, (%ecx), %ymm5, %ymm6{%k7}
+	vmpsadbw	$123, 4064(%ecx), %ymm5, %ymm6{%k7}
+	vmpsadbw	$123, -4096(%edx), %ymm5, %ymm6{%k7}{z}
+	vmpsadbw	$123, 0x10000000(%esp, %esi, 8), %xmm5, %xmm6{%k7}
+	vmpsadbw	$123, (%ecx), %xmm5, %xmm6{%k7}
+	vmpsadbw	$123, 2032(%ecx), %xmm5, %xmm6{%k7}
+	vmpsadbw	$123, -2048(%edx), %xmm5, %xmm6{%k7}{z}
+
+_intel:
+	.intel_syntax noprefix
+	.irp m, ss, su, uu
+	.irp s, "", s
+	vpdpb\m\()d\s	ymm6{k7}, ymm5, ymm4
+	vpdpb\m\()d\s	xmm6{k7}, xmm5, xmm4
+	vpdpb\m\()d\s	ymm6{k7}, ymm5, YMMWORD PTR [esp+esi*8+0x10000000]
+	vpdpb\m\()d\s	ymm6, ymm5, DWORD PTR [ecx]{1to8}
+	vpdpb\m\()d\s	ymm6{k7}, ymm5, YMMWORD PTR [ecx+4064]
+	vpdpb\m\()d\s	ymm6{k7}{z}, ymm5, DWORD PTR [edx-512]{1to8}
+	vpdpb\m\()d\s	xmm6{k7}, xmm5, XMMWORD PTR [esp+esi*8+0x10000000]
+	vpdpb\m\()d\s	xmm6, xmm5, DWORD PTR [ecx]{1to4}
+	vpdpb\m\()d\s	xmm6{k7}, xmm5, XMMWORD PTR [ecx+2032]
+	vpdpb\m\()d\s	xmm6{k7}{z}, xmm5, DWORD PTR [edx-512]{1to4}
+	.endr
+	.endr
+
+	.irp m, su, us, uu
+	.irp s, "", s
+	vpdpw\m\()d\s	ymm6{k7}, ymm5, ymm4
+	vpdpw\m\()d\s	xmm6{k7}, xmm5, xmm4
+	vpdpw\m\()d\s	ymm6{k7}, ymm5, YMMWORD PTR [esp+esi*8+0x10000000]
+	vpdpw\m\()d\s	ymm6, ymm5, DWORD PTR [ecx]{1to8}
+	vpdpw\m\()d\s	ymm6{k7}, ymm5, YMMWORD PTR [ecx+4064]
+	vpdpw\m\()d\s	ymm6{k7}{z}, ymm5, DWORD PTR [edx-512]{1to8}
+	vpdpw\m\()d\s	xmm6{k7}, xmm5, XMMWORD PTR [esp+esi*8+0x10000000]
+	vpdpw\m\()d\s	xmm6, xmm5, DWORD PTR [ecx]{1to4}
+	vpdpw\m\()d\s	xmm6{k7}, xmm5, XMMWORD PTR [ecx+2032]
+	vpdpw\m\()d\s	xmm6{k7}{z}, xmm5, DWORD PTR [edx-512]{1to4}
+	.endr
+	.endr
+
+	vdpphps	ymm6{k7}, ymm5, ymm4
+	vdpphps	xmm6{k7}, xmm5, xmm4
+	vdpphps	ymm6{k7}, ymm5, YMMWORD PTR [esp+esi*8+0x10000000]
+	vdpphps	ymm6, ymm5, DWORD PTR [ecx]{1to8}
+	vdpphps	ymm6{k7}, ymm5, YMMWORD PTR [ecx+4064]
+	vdpphps	ymm6{k7}{z}, ymm5, DWORD PTR [edx-512]{1to8}
+	vdpphps	xmm6{k7}, xmm5, XMMWORD PTR [esp+esi*8+0x10000000]
+	vdpphps	xmm6, xmm5, DWORD PTR [ecx]{1to4}
+	vdpphps	xmm6{k7}, xmm5, XMMWORD PTR [ecx+2032]
+	vdpphps	xmm6{k7}{z}, xmm5, DWORD PTR [edx-512]{1to4}
+
+	vmpsadbw	xmm6{k7}, xmm5, xmm4, 123
+	vmpsadbw	ymm6{k7}, ymm5, ymm4, 123
+	vmpsadbw	ymm6{k7}, ymm5, YMMWORD PTR [esp+esi*8+0x10000000], 123
+	vmpsadbw	ymm6{k7}, ymm5, YMMWORD PTR [ecx], 123
+	vmpsadbw	ymm6{k7}, ymm5, YMMWORD PTR [ecx+4064], 123
+	vmpsadbw	ymm6{k7}{z}, ymm5, YMMWORD PTR [edx-4096], 123
+	vmpsadbw	xmm6{k7}, xmm5, XMMWORD PTR [esp+esi*8+0x10000000], 123
+	vmpsadbw	xmm6{k7}, xmm5, XMMWORD PTR [ecx], 123
+	vmpsadbw	xmm6{k7}, xmm5, XMMWORD PTR [ecx+2032], 123
+	vmpsadbw	xmm6{k7}{z}, xmm5, XMMWORD PTR [edx-2048], 123
diff --git a/gas/testsuite/gas/i386/avx10_2-512-1-intel.d b/gas/testsuite/gas/i386/avx10_2-512-1-intel.d
new file mode 100644
index 0000000..27a36d2
--- /dev/null
+++ b/gas/testsuite/gas/i386/avx10_2-512-1-intel.d
@@ -0,0 +1,81 @@
+#objdump: -dw -Mintel
+#name: i386 AVX10.2/512 media insns (Intel disassembly)
+#source: avx10_2-512-1.s
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+#...
+[a-f0-9]+ <_intel>:
+\s*[a-f0-9]+:\s*62 f2 57 48 50 f4\s+vpdpbssd zmm6,zmm5,zmm4
+\s*[a-f0-9]+:\s*62 f2 57 4f 50 b4 f4 00 00 00 10\s+vpdpbssd zmm6\{k7\},zmm5,ZMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 57 58 50 31\s+vpdpbssd zmm6,zmm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 57 48 50 71 7f\s+vpdpbssd zmm6,zmm5,ZMMWORD PTR \[ecx\+0x1fc0\]
+\s*[a-f0-9]+:\s*62 f2 57 df 50 72 80\s+vpdpbssd zmm6\{k7\}\{z\},zmm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f2 57 48 51 f4\s+vpdpbssds zmm6,zmm5,zmm4
+\s*[a-f0-9]+:\s*62 f2 57 4f 51 b4 f4 00 00 00 10\s+vpdpbssds zmm6\{k7\},zmm5,ZMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 57 58 51 31\s+vpdpbssds zmm6,zmm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 57 48 51 71 7f\s+vpdpbssds zmm6,zmm5,ZMMWORD PTR \[ecx\+0x1fc0\]
+\s*[a-f0-9]+:\s*62 f2 57 df 51 72 80\s+vpdpbssds zmm6\{k7\}\{z\},zmm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f2 56 48 50 f4\s+vpdpbsud zmm6,zmm5,zmm4
+\s*[a-f0-9]+:\s*62 f2 56 4f 50 b4 f4 00 00 00 10\s+vpdpbsud zmm6\{k7\},zmm5,ZMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 56 58 50 31\s+vpdpbsud zmm6,zmm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 56 48 50 71 7f\s+vpdpbsud zmm6,zmm5,ZMMWORD PTR \[ecx\+0x1fc0\]
+\s*[a-f0-9]+:\s*62 f2 56 df 50 72 80\s+vpdpbsud zmm6\{k7\}\{z\},zmm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f2 56 48 51 f4\s+vpdpbsuds zmm6,zmm5,zmm4
+\s*[a-f0-9]+:\s*62 f2 56 4f 51 b4 f4 00 00 00 10\s+vpdpbsuds zmm6\{k7\},zmm5,ZMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 56 58 51 31\s+vpdpbsuds zmm6,zmm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 56 48 51 71 7f\s+vpdpbsuds zmm6,zmm5,ZMMWORD PTR \[ecx\+0x1fc0\]
+\s*[a-f0-9]+:\s*62 f2 56 df 51 72 80\s+vpdpbsuds zmm6\{k7\}\{z\},zmm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f2 54 48 50 f4\s+vpdpbuud zmm6,zmm5,zmm4
+\s*[a-f0-9]+:\s*62 f2 54 4f 50 b4 f4 00 00 00 10\s+vpdpbuud zmm6\{k7\},zmm5,ZMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 54 58 50 31\s+vpdpbuud zmm6,zmm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 54 48 50 71 7f\s+vpdpbuud zmm6,zmm5,ZMMWORD PTR \[ecx\+0x1fc0\]
+\s*[a-f0-9]+:\s*62 f2 54 df 50 72 80\s+vpdpbuud zmm6\{k7\}\{z\},zmm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f2 54 48 51 f4\s+vpdpbuuds zmm6,zmm5,zmm4
+\s*[a-f0-9]+:\s*62 f2 54 4f 51 b4 f4 00 00 00 10\s+vpdpbuuds zmm6\{k7\},zmm5,ZMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 54 58 51 31\s+vpdpbuuds zmm6,zmm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 54 48 51 71 7f\s+vpdpbuuds zmm6,zmm5,ZMMWORD PTR \[ecx\+0x1fc0\]
+\s*[a-f0-9]+:\s*62 f2 54 df 51 72 80\s+vpdpbuuds zmm6\{k7\}\{z\},zmm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f2 56 48 d2 f4\s+vpdpwsud zmm6,zmm5,zmm4
+\s*[a-f0-9]+:\s*62 f2 56 4f d2 b4 f4 00 00 00 10\s+vpdpwsud zmm6\{k7\},zmm5,ZMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 56 58 d2 31\s+vpdpwsud zmm6,zmm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 56 48 d2 71 7f\s+vpdpwsud zmm6,zmm5,ZMMWORD PTR \[ecx\+0x1fc0\]
+\s*[a-f0-9]+:\s*62 f2 56 df d2 72 80\s+vpdpwsud zmm6\{k7\}\{z\},zmm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f2 56 48 d3 f4\s+vpdpwsuds zmm6,zmm5,zmm4
+\s*[a-f0-9]+:\s*62 f2 56 4f d3 b4 f4 00 00 00 10\s+vpdpwsuds zmm6\{k7\},zmm5,ZMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 56 58 d3 31\s+vpdpwsuds zmm6,zmm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 56 48 d3 71 7f\s+vpdpwsuds zmm6,zmm5,ZMMWORD PTR \[ecx\+0x1fc0\]
+\s*[a-f0-9]+:\s*62 f2 56 df d3 72 80\s+vpdpwsuds zmm6\{k7\}\{z\},zmm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f2 55 48 d2 f4\s+vpdpwusd zmm6,zmm5,zmm4
+\s*[a-f0-9]+:\s*62 f2 55 4f d2 b4 f4 00 00 00 10\s+vpdpwusd zmm6\{k7\},zmm5,ZMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 55 58 d2 31\s+vpdpwusd zmm6,zmm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 55 48 d2 71 7f\s+vpdpwusd zmm6,zmm5,ZMMWORD PTR \[ecx\+0x1fc0\]
+\s*[a-f0-9]+:\s*62 f2 55 df d2 72 80\s+vpdpwusd zmm6\{k7\}\{z\},zmm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f2 55 48 d3 f4\s+vpdpwusds zmm6,zmm5,zmm4
+\s*[a-f0-9]+:\s*62 f2 55 4f d3 b4 f4 00 00 00 10\s+vpdpwusds zmm6\{k7\},zmm5,ZMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 55 58 d3 31\s+vpdpwusds zmm6,zmm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 55 48 d3 71 7f\s+vpdpwusds zmm6,zmm5,ZMMWORD PTR \[ecx\+0x1fc0\]
+\s*[a-f0-9]+:\s*62 f2 55 df d3 72 80\s+vpdpwusds zmm6\{k7\}\{z\},zmm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f2 54 48 d2 f4\s+vpdpwuud zmm6,zmm5,zmm4
+\s*[a-f0-9]+:\s*62 f2 54 4f d2 b4 f4 00 00 00 10\s+vpdpwuud zmm6\{k7\},zmm5,ZMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 54 58 d2 31\s+vpdpwuud zmm6,zmm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 54 48 d2 71 7f\s+vpdpwuud zmm6,zmm5,ZMMWORD PTR \[ecx\+0x1fc0\]
+\s*[a-f0-9]+:\s*62 f2 54 df d2 72 80\s+vpdpwuud zmm6\{k7\}\{z\},zmm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f2 54 48 d3 f4\s+vpdpwuuds zmm6,zmm5,zmm4
+\s*[a-f0-9]+:\s*62 f2 54 4f d3 b4 f4 00 00 00 10\s+vpdpwuuds zmm6\{k7\},zmm5,ZMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 54 58 d3 31\s+vpdpwuuds zmm6,zmm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 54 48 d3 71 7f\s+vpdpwuuds zmm6,zmm5,ZMMWORD PTR \[ecx\+0x1fc0\]
+\s*[a-f0-9]+:\s*62 f2 54 df d3 72 80\s+vpdpwuuds zmm6\{k7\}\{z\},zmm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f2 54 48 52 f4\s+vdpphps zmm6,zmm5,zmm4
+\s*[a-f0-9]+:\s*62 f2 54 4f 52 b4 f4 00 00 00 10\s+vdpphps zmm6\{k7\},zmm5,ZMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 f2 54 58 52 31\s+vdpphps zmm6,zmm5,DWORD BCST \[ecx\]
+\s*[a-f0-9]+:\s*62 f2 54 48 52 71 7f\s+vdpphps zmm6,zmm5,ZMMWORD PTR \[ecx\+0x1fc0\]
+\s*[a-f0-9]+:\s*62 f2 54 df 52 72 80\s+vdpphps zmm6\{k7\}\{z\},zmm5,DWORD BCST \[edx-0x200\]
+\s*[a-f0-9]+:\s*62 f3 56 48 42 f4 7b\s+vmpsadbw zmm6,zmm5,zmm4,0x7b
+\s*[a-f0-9]+:\s*62 f3 56 4f 42 b4 f4 00 00 00 10 7b\s+vmpsadbw zmm6\{k7\},zmm5,ZMMWORD PTR \[esp\+esi\*8\+0x10000000\],0x7b
+\s*[a-f0-9]+:\s*62 f3 56 48 42 31 7b\s+vmpsadbw zmm6,zmm5,ZMMWORD PTR \[ecx\],0x7b
+\s*[a-f0-9]+:\s*62 f3 56 48 42 71 7f 7b\s+vmpsadbw zmm6,zmm5,ZMMWORD PTR \[ecx\+0x1fc0\],0x7b
+\s*[a-f0-9]+:\s*62 f3 56 cf 42 72 80 7b\s+vmpsadbw zmm6\{k7\}\{z\},zmm5,ZMMWORD PTR \[edx-0x2000\],0x7b
+#pass
diff --git a/gas/testsuite/gas/i386/avx10_2-512-1.d b/gas/testsuite/gas/i386/avx10_2-512-1.d
new file mode 100644
index 0000000..746c77a
--- /dev/null
+++ b/gas/testsuite/gas/i386/avx10_2-512-1.d
@@ -0,0 +1,79 @@
+#objdump: -dw
+#name: i386 AVX10.2/512 media insns
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+0+ <_start>:
+\s*[a-f0-9]+:\s*62 f2 57 48 50 f4\s+vpdpbssd %zmm4,%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 57 4f 50 b4 f4 00 00 00 10\s+vpdpbssd 0x10000000\(%esp,%esi,8\),%zmm5,%zmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 57 58 50 31\s+vpdpbssd \(%ecx\)\{1to16\},%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 57 48 50 71 7f\s+vpdpbssd 0x1fc0\(%ecx\),%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 57 df 50 72 80\s+vpdpbssd -0x200\(%edx\)\{1to16\},%zmm5,%zmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 57 48 51 f4\s+vpdpbssds %zmm4,%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 57 4f 51 b4 f4 00 00 00 10\s+vpdpbssds 0x10000000\(%esp,%esi,8\),%zmm5,%zmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 57 58 51 31\s+vpdpbssds \(%ecx\)\{1to16\},%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 57 48 51 71 7f\s+vpdpbssds 0x1fc0\(%ecx\),%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 57 df 51 72 80\s+vpdpbssds -0x200\(%edx\)\{1to16\},%zmm5,%zmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 56 48 50 f4\s+vpdpbsud %zmm4,%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 56 4f 50 b4 f4 00 00 00 10\s+vpdpbsud 0x10000000\(%esp,%esi,8\),%zmm5,%zmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 56 58 50 31\s+vpdpbsud \(%ecx\)\{1to16\},%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 56 48 50 71 7f\s+vpdpbsud 0x1fc0\(%ecx\),%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 56 df 50 72 80\s+vpdpbsud -0x200\(%edx\)\{1to16\},%zmm5,%zmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 56 48 51 f4\s+vpdpbsuds %zmm4,%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 56 4f 51 b4 f4 00 00 00 10\s+vpdpbsuds 0x10000000\(%esp,%esi,8\),%zmm5,%zmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 56 58 51 31\s+vpdpbsuds \(%ecx\)\{1to16\},%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 56 48 51 71 7f\s+vpdpbsuds 0x1fc0\(%ecx\),%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 56 df 51 72 80\s+vpdpbsuds -0x200\(%edx\)\{1to16\},%zmm5,%zmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 54 48 50 f4\s+vpdpbuud %zmm4,%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 54 4f 50 b4 f4 00 00 00 10\s+vpdpbuud 0x10000000\(%esp,%esi,8\),%zmm5,%zmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 54 58 50 31\s+vpdpbuud \(%ecx\)\{1to16\},%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 54 48 50 71 7f\s+vpdpbuud 0x1fc0\(%ecx\),%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 54 df 50 72 80\s+vpdpbuud -0x200\(%edx\)\{1to16\},%zmm5,%zmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 54 48 51 f4\s+vpdpbuuds %zmm4,%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 54 4f 51 b4 f4 00 00 00 10\s+vpdpbuuds 0x10000000\(%esp,%esi,8\),%zmm5,%zmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 54 58 51 31\s+vpdpbuuds \(%ecx\)\{1to16\},%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 54 48 51 71 7f\s+vpdpbuuds 0x1fc0\(%ecx\),%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 54 df 51 72 80\s+vpdpbuuds -0x200\(%edx\)\{1to16\},%zmm5,%zmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 56 48 d2 f4\s+vpdpwsud %zmm4,%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 56 4f d2 b4 f4 00 00 00 10\s+vpdpwsud 0x10000000\(%esp,%esi,8\),%zmm5,%zmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 56 58 d2 31\s+vpdpwsud \(%ecx\)\{1to16\},%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 56 48 d2 71 7f\s+vpdpwsud 0x1fc0\(%ecx\),%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 56 df d2 72 80\s+vpdpwsud -0x200\(%edx\)\{1to16\},%zmm5,%zmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 56 48 d3 f4\s+vpdpwsuds %zmm4,%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 56 4f d3 b4 f4 00 00 00 10\s+vpdpwsuds 0x10000000\(%esp,%esi,8\),%zmm5,%zmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 56 58 d3 31\s+vpdpwsuds \(%ecx\)\{1to16\},%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 56 48 d3 71 7f\s+vpdpwsuds 0x1fc0\(%ecx\),%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 56 df d3 72 80\s+vpdpwsuds -0x200\(%edx\)\{1to16\},%zmm5,%zmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 55 48 d2 f4\s+vpdpwusd %zmm4,%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 55 4f d2 b4 f4 00 00 00 10\s+vpdpwusd 0x10000000\(%esp,%esi,8\),%zmm5,%zmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 55 58 d2 31\s+vpdpwusd \(%ecx\)\{1to16\},%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 55 48 d2 71 7f\s+vpdpwusd 0x1fc0\(%ecx\),%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 55 df d2 72 80\s+vpdpwusd -0x200\(%edx\)\{1to16\},%zmm5,%zmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 55 48 d3 f4\s+vpdpwusds %zmm4,%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 55 4f d3 b4 f4 00 00 00 10\s+vpdpwusds 0x10000000\(%esp,%esi,8\),%zmm5,%zmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 55 58 d3 31\s+vpdpwusds \(%ecx\)\{1to16\},%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 55 48 d3 71 7f\s+vpdpwusds 0x1fc0\(%ecx\),%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 55 df d3 72 80\s+vpdpwusds -0x200\(%edx\)\{1to16\},%zmm5,%zmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 54 48 d2 f4\s+vpdpwuud %zmm4,%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 54 4f d2 b4 f4 00 00 00 10\s+vpdpwuud 0x10000000\(%esp,%esi,8\),%zmm5,%zmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 54 58 d2 31\s+vpdpwuud \(%ecx\)\{1to16\},%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 54 48 d2 71 7f\s+vpdpwuud 0x1fc0\(%ecx\),%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 54 df d2 72 80\s+vpdpwuud -0x200\(%edx\)\{1to16\},%zmm5,%zmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 54 48 d3 f4\s+vpdpwuuds %zmm4,%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 54 4f d3 b4 f4 00 00 00 10\s+vpdpwuuds 0x10000000\(%esp,%esi,8\),%zmm5,%zmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 54 58 d3 31\s+vpdpwuuds \(%ecx\)\{1to16\},%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 54 48 d3 71 7f\s+vpdpwuuds 0x1fc0\(%ecx\),%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 54 df d3 72 80\s+vpdpwuuds -0x200\(%edx\)\{1to16\},%zmm5,%zmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 54 48 52 f4\s+vdpphps %zmm4,%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 54 4f 52 b4 f4 00 00 00 10\s+vdpphps 0x10000000\(%esp,%esi,8\),%zmm5,%zmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 54 58 52 31\s+vdpphps \(%ecx\)\{1to16\},%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 54 48 52 71 7f\s+vdpphps 0x1fc0\(%ecx\),%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f2 54 df 52 72 80\s+vdpphps -0x200\(%edx\)\{1to16\},%zmm5,%zmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f3 56 48 42 f4 7b\s+vmpsadbw \$0x7b,%zmm4,%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f3 56 4f 42 b4 f4 00 00 00 10 7b\s+vmpsadbw \$0x7b,0x10000000\(%esp,%esi,8\),%zmm5,%zmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f3 56 48 42 31 7b\s+vmpsadbw \$0x7b,\(%ecx\),%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f3 56 48 42 71 7f 7b\s+vmpsadbw \$0x7b,0x1fc0\(%ecx\),%zmm5,%zmm6
+\s*[a-f0-9]+:\s*62 f3 56 cf 42 72 80 7b\s+vmpsadbw \$0x7b,-0x2000\(%edx\),%zmm5,%zmm6\{%k7\}\{z\}
+#pass
diff --git a/gas/testsuite/gas/i386/avx10_2-512-1.s b/gas/testsuite/gas/i386/avx10_2-512-1.s
new file mode 100644
index 0000000..9133c03
--- /dev/null
+++ b/gas/testsuite/gas/i386/avx10_2-512-1.s
@@ -0,0 +1,71 @@
+# Check 32bit AVX10.2/512 instructions
+
+	.arch generic32
+	.arch .avx10.2/512
+	.text
+_start:
+	.irp m, ss, su, uu
+	.irp s, "", s
+	vpdpb\m\()d\s	%zmm4, %zmm5, %zmm6
+	vpdpb\m\()d\s	0x10000000(%esp, %esi, 8), %zmm5, %zmm6{%k7}
+	vpdpb\m\()d\s	(%ecx){1to16}, %zmm5, %zmm6
+	vpdpb\m\()d\s	8128(%ecx), %zmm5, %zmm6
+	vpdpb\m\()d\s	-512(%edx){1to16}, %zmm5, %zmm6{%k7}{z}
+	.endr
+	.endr
+
+	.irp m, su, us, uu
+	.irp s, "", s
+	vpdpw\m\()d\s	%zmm4, %zmm5, %zmm6
+	vpdpw\m\()d\s	0x10000000(%esp, %esi, 8), %zmm5, %zmm6{%k7}
+	vpdpw\m\()d\s	(%ecx){1to16}, %zmm5, %zmm6
+	vpdpw\m\()d\s	8128(%ecx), %zmm5, %zmm6
+	vpdpw\m\()d\s	-512(%edx){1to16}, %zmm5, %zmm6{%k7}{z}
+	.endr
+	.endr
+
+	vdpphps	%zmm4, %zmm5, %zmm6
+	vdpphps	0x10000000(%esp, %esi, 8), %zmm5, %zmm6{%k7}
+	vdpphps	(%ecx){1to16}, %zmm5, %zmm6
+	vdpphps	8128(%ecx), %zmm5, %zmm6
+	vdpphps	-512(%edx){1to16}, %zmm5, %zmm6{%k7}{z}
+
+	vmpsadbw	$123, %zmm4, %zmm5, %zmm6
+	vmpsadbw	$123, 0x10000000(%esp, %esi, 8), %zmm5, %zmm6{%k7}
+	vmpsadbw	$123, (%ecx), %zmm5, %zmm6
+	vmpsadbw	$123, 8128(%ecx), %zmm5, %zmm6
+	vmpsadbw	$123, -8192(%edx), %zmm5, %zmm6{%k7}{z}
+
+_intel:
+	.intel_syntax noprefix
+	.irp m, ss, su, uu
+	.irp s, "", s
+	vpdpb\m\()d\s	zmm6, zmm5, zmm4
+	vpdpb\m\()d\s	zmm6{k7}, zmm5, ZMMWORD PTR [esp+esi*8+0x10000000]
+	vpdpb\m\()d\s	zmm6, zmm5, DWORD PTR [ecx]{1to16}
+	vpdpb\m\()d\s	zmm6, zmm5, ZMMWORD PTR [ecx+8128]
+	vpdpb\m\()d\s	zmm6{k7}{z}, zmm5, DWORD PTR [edx-512]{1to16}
+	.endr
+	.endr
+
+	.irp m, su, us, uu
+	.irp s, "", s
+	vpdpw\m\()d\s	zmm6, zmm5, zmm4
+	vpdpw\m\()d\s	zmm6{k7}, zmm5, ZMMWORD PTR [esp+esi*8+0x10000000]
+	vpdpw\m\()d\s	zmm6, zmm5, DWORD PTR [ecx]{1to16}
+	vpdpw\m\()d\s	zmm6, zmm5, ZMMWORD PTR [ecx+8128]
+	vpdpw\m\()d\s	zmm6{k7}{z}, zmm5, DWORD PTR [edx-512]{1to16}
+	.endr
+	.endr
+
+	vdpphps	zmm6, zmm5, zmm4
+	vdpphps	zmm6{k7}, zmm5, ZMMWORD PTR [esp+esi*8+0x10000000]
+	vdpphps	zmm6, zmm5, DWORD PTR [ecx]{1to16}
+	vdpphps	zmm6, zmm5, ZMMWORD PTR [ecx+8128]
+	vdpphps	zmm6{k7}{z}, zmm5, DWORD PTR [edx-512]{1to16}
+
+	vmpsadbw	zmm6, zmm5, zmm4, 123
+	vmpsadbw	zmm6{k7}, zmm5, ZMMWORD PTR [esp+esi*8+0x10000000], 123
+	vmpsadbw	zmm6, zmm5, ZMMWORD PTR [ecx], 123
+	vmpsadbw	zmm6, zmm5, ZMMWORD PTR [ecx+8128], 123
+	vmpsadbw	zmm6{k7}{z}, zmm5, ZMMWORD PTR [edx-8192], 123
diff --git a/gas/testsuite/gas/i386/avx10_2-evex-promote.d b/gas/testsuite/gas/i386/avx10_2-evex-promote.d
new file mode 100644
index 0000000..ba3ef92
--- /dev/null
+++ b/gas/testsuite/gas/i386/avx10_2-evex-promote.d
@@ -0,0 +1,113 @@
+#objdump: -dw
+#name: i386 AVX10.2/256 evex promote insns
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+0+ <_start>:
+\s*[a-f0-9]+:\s*c4 e2 57 50 f4\s+vpdpbssd %ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 53 50 f4\s+vpdpbssd %xmm4,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 57 50 31\s+vpdpbssd \(%ecx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 53 50 31\s+vpdpbssd \(%ecx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f2 57 28 50 f4\s+\{evex\} vpdpbssd %ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 57 08 50 f4\s+\{evex\} vpdpbssd %xmm4,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f2 57 28 50 31\s+\{evex\} vpdpbssd \(%ecx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 57 08 50 31\s+\{evex\} vpdpbssd \(%ecx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 57 51 f4\s+vpdpbssds %ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 53 51 f4\s+vpdpbssds %xmm4,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 57 51 31\s+vpdpbssds \(%ecx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 53 51 31\s+vpdpbssds \(%ecx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f2 57 28 51 f4\s+\{evex\} vpdpbssds %ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 57 08 51 f4\s+\{evex\} vpdpbssds %xmm4,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f2 57 28 51 31\s+\{evex\} vpdpbssds \(%ecx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 57 08 51 31\s+\{evex\} vpdpbssds \(%ecx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 56 50 f4\s+vpdpbsud %ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 52 50 f4\s+vpdpbsud %xmm4,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 56 50 31\s+vpdpbsud \(%ecx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 52 50 31\s+vpdpbsud \(%ecx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f2 56 28 50 f4\s+\{evex\} vpdpbsud %ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 56 08 50 f4\s+\{evex\} vpdpbsud %xmm4,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f2 56 28 50 31\s+\{evex\} vpdpbsud \(%ecx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 56 08 50 31\s+\{evex\} vpdpbsud \(%ecx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 56 51 f4\s+vpdpbsuds %ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 52 51 f4\s+vpdpbsuds %xmm4,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 56 51 31\s+vpdpbsuds \(%ecx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 52 51 31\s+vpdpbsuds \(%ecx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f2 56 28 51 f4\s+\{evex\} vpdpbsuds %ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 56 08 51 f4\s+\{evex\} vpdpbsuds %xmm4,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f2 56 28 51 31\s+\{evex\} vpdpbsuds \(%ecx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 56 08 51 31\s+\{evex\} vpdpbsuds \(%ecx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 54 50 f4\s+vpdpbuud %ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 50 50 f4\s+vpdpbuud %xmm4,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 54 50 31\s+vpdpbuud \(%ecx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 50 50 31\s+vpdpbuud \(%ecx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f2 54 28 50 f4\s+\{evex\} vpdpbuud %ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 54 08 50 f4\s+\{evex\} vpdpbuud %xmm4,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f2 54 28 50 31\s+\{evex\} vpdpbuud \(%ecx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 54 08 50 31\s+\{evex\} vpdpbuud \(%ecx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 54 51 f4\s+vpdpbuuds %ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 50 51 f4\s+vpdpbuuds %xmm4,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 54 51 31\s+vpdpbuuds \(%ecx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 50 51 31\s+vpdpbuuds \(%ecx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f2 54 28 51 f4\s+\{evex\} vpdpbuuds %ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 54 08 51 f4\s+\{evex\} vpdpbuuds %xmm4,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f2 54 28 51 31\s+\{evex\} vpdpbuuds \(%ecx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 54 08 51 31\s+\{evex\} vpdpbuuds \(%ecx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 56 d2 f4\s+vpdpwsud %ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 52 d2 f4\s+vpdpwsud %xmm4,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 56 d2 31\s+vpdpwsud \(%ecx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 52 d2 31\s+vpdpwsud \(%ecx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f2 56 28 d2 f4\s+\{evex\} vpdpwsud %ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 56 08 d2 f4\s+\{evex\} vpdpwsud %xmm4,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f2 56 28 d2 31\s+\{evex\} vpdpwsud \(%ecx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 56 08 d2 31\s+\{evex\} vpdpwsud \(%ecx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 56 d3 f4\s+vpdpwsuds %ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 52 d3 f4\s+vpdpwsuds %xmm4,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 56 d3 31\s+vpdpwsuds \(%ecx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 52 d3 31\s+vpdpwsuds \(%ecx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f2 56 28 d3 f4\s+\{evex\} vpdpwsuds %ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 56 08 d3 f4\s+\{evex\} vpdpwsuds %xmm4,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f2 56 28 d3 31\s+\{evex\} vpdpwsuds \(%ecx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 56 08 d3 31\s+\{evex\} vpdpwsuds \(%ecx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 55 d2 f4\s+vpdpwusd %ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 51 d2 f4\s+vpdpwusd %xmm4,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 55 d2 31\s+vpdpwusd \(%ecx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 51 d2 31\s+vpdpwusd \(%ecx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f2 55 28 d2 f4\s+\{evex\} vpdpwusd %ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 55 08 d2 f4\s+\{evex\} vpdpwusd %xmm4,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f2 55 28 d2 31\s+\{evex\} vpdpwusd \(%ecx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 55 08 d2 31\s+\{evex\} vpdpwusd \(%ecx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 55 d3 f4\s+vpdpwusds %ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 51 d3 f4\s+vpdpwusds %xmm4,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 55 d3 31\s+vpdpwusds \(%ecx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 51 d3 31\s+vpdpwusds \(%ecx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f2 55 28 d3 f4\s+\{evex\} vpdpwusds %ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 55 08 d3 f4\s+\{evex\} vpdpwusds %xmm4,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f2 55 28 d3 31\s+\{evex\} vpdpwusds \(%ecx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 55 08 d3 31\s+\{evex\} vpdpwusds \(%ecx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 54 d2 f4\s+vpdpwuud %ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 50 d2 f4\s+vpdpwuud %xmm4,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 54 d2 31\s+vpdpwuud \(%ecx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 50 d2 31\s+vpdpwuud \(%ecx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f2 54 28 d2 f4\s+\{evex\} vpdpwuud %ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 54 08 d2 f4\s+\{evex\} vpdpwuud %xmm4,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f2 54 28 d2 31\s+\{evex\} vpdpwuud \(%ecx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 54 08 d2 31\s+\{evex\} vpdpwuud \(%ecx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 54 d3 f4\s+vpdpwuuds %ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 50 d3 f4\s+vpdpwuuds %xmm4,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 54 d3 31\s+vpdpwuuds \(%ecx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 50 d3 31\s+vpdpwuuds \(%ecx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f2 54 28 d3 f4\s+\{evex\} vpdpwuuds %ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 54 08 d3 f4\s+\{evex\} vpdpwuuds %xmm4,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f2 54 28 d3 31\s+\{evex\} vpdpwuuds \(%ecx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 54 08 d3 31\s+\{evex\} vpdpwuuds \(%ecx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e3 51 42 f4 7b\s+vmpsadbw \$0x7b,%xmm4,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e3 55 42 f4 7b\s+vmpsadbw \$0x7b,%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e3 51 42 31 7b\s+vmpsadbw \$0x7b,\(%ecx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e3 55 42 31 7b\s+vmpsadbw \$0x7b,\(%ecx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f3 56 08 42 f4 7b\s+\{evex\} vmpsadbw \$0x7b,%xmm4,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f3 56 28 42 f4 7b\s+\{evex\} vmpsadbw \$0x7b,%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f3 56 08 42 31 7b\s+\{evex\} vmpsadbw \$0x7b,\(%ecx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f3 56 28 42 31 7b\s+\{evex\} vmpsadbw \$0x7b,\(%ecx\),%ymm5,%ymm6
+#pass
diff --git a/gas/testsuite/gas/i386/avx10_2-evex-promote.s b/gas/testsuite/gas/i386/avx10_2-evex-promote.s
new file mode 100644
index 0000000..2f68815
--- /dev/null
+++ b/gas/testsuite/gas/i386/avx10_2-evex-promote.s
@@ -0,0 +1,42 @@
+# Check AVX10.2/256 evex promoted instructions
+
+	.arch generic32
+	.arch .avx10.2/256
+	.arch .avx_vnni_int16
+	.arch .avx_vnni_int8
+	.text
+_start:
+	.irp m, ss, su, uu
+	.irp s, "", s
+	vpdpb\m\()d\s	%ymm4, %ymm5, %ymm6
+	vpdpb\m\()d\s	%xmm4, %xmm5, %xmm6
+	vpdpb\m\()d\s	(%ecx), %ymm5, %ymm6
+	vpdpb\m\()d\s	(%ecx), %xmm5, %xmm6
+	{evex} vpdpb\m\()d\s	%ymm4, %ymm5, %ymm6
+	{evex} vpdpb\m\()d\s	%xmm4, %xmm5, %xmm6
+	{evex} vpdpb\m\()d\s	(%ecx), %ymm5, %ymm6
+	{evex} vpdpb\m\()d\s	(%ecx), %xmm5, %xmm6
+	.endr
+	.endr
+
+	.irp m, su, us, uu
+	.irp s, "", s
+	vpdpw\m\()d\s	%ymm4, %ymm5, %ymm6
+	vpdpw\m\()d\s	%xmm4, %xmm5, %xmm6
+	vpdpw\m\()d\s	(%ecx), %ymm5, %ymm6
+	vpdpw\m\()d\s	(%ecx), %xmm5, %xmm6
+	{evex} vpdpw\m\()d\s	%ymm4, %ymm5, %ymm6
+	{evex} vpdpw\m\()d\s	%xmm4, %xmm5, %xmm6
+	{evex} vpdpw\m\()d\s	(%ecx), %ymm5, %ymm6
+	{evex} vpdpw\m\()d\s	(%ecx), %xmm5, %xmm6
+	.endr
+	.endr
+
+	vmpsadbw	$123, %xmm4, %xmm5, %xmm6
+	vmpsadbw	$123, %ymm4, %ymm5, %ymm6
+	vmpsadbw	$123, (%ecx), %xmm5, %xmm6
+	vmpsadbw	$123, (%ecx), %ymm5, %ymm6
+	{evex} vmpsadbw	$123, %xmm4, %xmm5, %xmm6
+	{evex} vmpsadbw	$123, %ymm4, %ymm5, %ymm6
+	{evex} vmpsadbw	$123, (%ecx), %xmm5, %xmm6
+	{evex} vmpsadbw	$123, (%ecx), %ymm5, %ymm6
diff --git a/gas/testsuite/gas/i386/avx10_2-rounding-intel.d b/gas/testsuite/gas/i386/avx10_2-rounding-intel.d
new file mode 100644
index 0000000..f40c296
--- /dev/null
+++ b/gas/testsuite/gas/i386/avx10_2-rounding-intel.d
@@ -0,0 +1,452 @@
+#objdump: -dw -Mintel
+#name: i386 AVX10.2 insns rounding (Intel disassembly)
+#source: avx10_2-rounding.s
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+#...
+[a-f0-9]+ <_intel>:
+\s*[a-f0-9]+:\s*62 f1 d1 18 c2 ec 7b\s+vcmppd k5,ymm5,ymm4\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f1 d1 1f c2 ec 7b\s+vcmppd k5\{k7\},ymm5,ymm4\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f2 f9 18 42 f5\s+vgetexppd ymm6,ymm5\{sae\}
+\s*[a-f0-9]+:\s*62 f2 f9 1f 42 f5\s+vgetexppd ymm6\{k7\},ymm5\{sae\}
+\s*[a-f0-9]+:\s*62 f2 f9 9f 42 f5\s+vgetexppd ymm6\{k7\}\{z\},ymm5\{sae\}
+\s*[a-f0-9]+:\s*62 f1 f9 18 51 f5\s+vsqrtpd ymm6,ymm5\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f1 f9 3f 51 f5\s+vsqrtpd ymm6\{k7\},ymm5\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f1 f9 ff 51 f5\s+vsqrtpd ymm6\{k7\}\{z\},ymm5\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f3 50 18 c2 ec 7b\s+vcmpph k5,ymm5,ymm4\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 50 1f c2 ec 7b\s+vcmpph k5\{k7\},ymm5,ymm4\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f6 79 18 42 f5\s+vgetexpph ymm6,ymm5\{sae\}
+\s*[a-f0-9]+:\s*62 f6 79 1f 42 f5\s+vgetexpph ymm6\{k7\},ymm5\{sae\}
+\s*[a-f0-9]+:\s*62 f6 79 9f 42 f5\s+vgetexpph ymm6\{k7\}\{z\},ymm5\{sae\}
+\s*[a-f0-9]+:\s*62 f5 78 18 51 f5\s+vsqrtph ymm6,ymm5\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f5 78 3f 51 f5\s+vsqrtph ymm6\{k7\},ymm5\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f5 78 ff 51 f5\s+vsqrtph ymm6\{k7\}\{z\},ymm5\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f1 50 18 c2 ec 7b\s+vcmpps k5,ymm5,ymm4\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f1 50 1f c2 ec 7b\s+vcmpps k5\{k7\},ymm5,ymm4\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f2 79 18 42 f5\s+vgetexpps ymm6,ymm5\{sae\}
+\s*[a-f0-9]+:\s*62 f2 79 1f 42 f5\s+vgetexpps ymm6\{k7\},ymm5\{sae\}
+\s*[a-f0-9]+:\s*62 f2 79 9f 42 f5\s+vgetexpps ymm6\{k7\}\{z\},ymm5\{sae\}
+\s*[a-f0-9]+:\s*62 f1 78 18 51 f5\s+vsqrtps ymm6,ymm5\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f1 78 3f 51 f5\s+vsqrtps ymm6\{k7\},ymm5\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f1 78 ff 51 f5\s+vsqrtps ymm6\{k7\}\{z\},ymm5\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f1 d1 18 58 f4\s+vaddpd ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f1 d1 3f 58 f4\s+vaddpd ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f1 d1 ff 58 f4\s+vaddpd ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f5 50 18 58 f4\s+vaddph ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f5 50 3f 58 f4\s+vaddph ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f5 50 ff 58 f4\s+vaddph ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f1 50 18 58 f4\s+vaddps ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f1 50 3f 58 f4\s+vaddps ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f1 50 ff 58 f4\s+vaddps ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f1 d1 18 5e f4\s+vdivpd ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f1 d1 3f 5e f4\s+vdivpd ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f1 d1 ff 5e f4\s+vdivpd ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f5 50 18 5e f4\s+vdivph ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f5 50 3f 5e f4\s+vdivph ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f5 50 ff 5e f4\s+vdivph ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f1 50 18 5e f4\s+vdivps ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f1 50 3f 5e f4\s+vdivps ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f1 50 ff 5e f4\s+vdivps ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f1 d1 18 59 f4\s+vmulpd ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f1 d1 3f 59 f4\s+vmulpd ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f1 d1 ff 59 f4\s+vmulpd ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f5 50 18 59 f4\s+vmulph ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f5 50 3f 59 f4\s+vmulph ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f5 50 ff 59 f4\s+vmulph ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f1 50 18 59 f4\s+vmulps ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f1 50 3f 59 f4\s+vmulps ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f1 50 ff 59 f4\s+vmulps ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f2 d1 18 2c f4\s+vscalefpd ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f2 d1 3f 2c f4\s+vscalefpd ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f2 d1 ff 2c f4\s+vscalefpd ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f6 51 18 2c f4\s+vscalefph ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f6 51 3f 2c f4\s+vscalefph ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f6 51 ff 2c f4\s+vscalefph ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f2 51 18 2c f4\s+vscalefps ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f2 51 3f 2c f4\s+vscalefps ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f2 51 ff 2c f4\s+vscalefps ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f1 d1 18 5c f4\s+vsubpd ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f1 d1 3f 5c f4\s+vsubpd ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f1 d1 ff 5c f4\s+vsubpd ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f5 50 18 5c f4\s+vsubph ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f5 50 3f 5c f4\s+vsubph ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f5 50 ff 5c f4\s+vsubph ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f1 50 18 5c f4\s+vsubps ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f1 50 3f 5c f4\s+vsubps ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f1 50 ff 5c f4\s+vsubps ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f1 d1 18 5f f4\s+vmaxpd ymm6,ymm5,ymm4\{sae\}
+\s*[a-f0-9]+:\s*62 f1 d1 1f 5f f4\s+vmaxpd ymm6\{k7\},ymm5,ymm4\{sae\}
+\s*[a-f0-9]+:\s*62 f1 d1 9f 5f f4\s+vmaxpd ymm6\{k7\}\{z\},ymm5,ymm4\{sae\}
+\s*[a-f0-9]+:\s*62 f5 50 18 5f f4\s+vmaxph ymm6,ymm5,ymm4\{sae\}
+\s*[a-f0-9]+:\s*62 f5 50 1f 5f f4\s+vmaxph ymm6\{k7\},ymm5,ymm4\{sae\}
+\s*[a-f0-9]+:\s*62 f5 50 9f 5f f4\s+vmaxph ymm6\{k7\}\{z\},ymm5,ymm4\{sae\}
+\s*[a-f0-9]+:\s*62 f1 50 18 5f f4\s+vmaxps ymm6,ymm5,ymm4\{sae\}
+\s*[a-f0-9]+:\s*62 f1 50 1f 5f f4\s+vmaxps ymm6\{k7\},ymm5,ymm4\{sae\}
+\s*[a-f0-9]+:\s*62 f1 50 9f 5f f4\s+vmaxps ymm6\{k7\}\{z\},ymm5,ymm4\{sae\}
+\s*[a-f0-9]+:\s*62 f1 d1 18 5d f4\s+vminpd ymm6,ymm5,ymm4\{sae\}
+\s*[a-f0-9]+:\s*62 f1 d1 1f 5d f4\s+vminpd ymm6\{k7\},ymm5,ymm4\{sae\}
+\s*[a-f0-9]+:\s*62 f1 d1 9f 5d f4\s+vminpd ymm6\{k7\}\{z\},ymm5,ymm4\{sae\}
+\s*[a-f0-9]+:\s*62 f5 50 18 5d f4\s+vminph ymm6,ymm5,ymm4\{sae\}
+\s*[a-f0-9]+:\s*62 f5 50 1f 5d f4\s+vminph ymm6\{k7\},ymm5,ymm4\{sae\}
+\s*[a-f0-9]+:\s*62 f5 50 9f 5d f4\s+vminph ymm6\{k7\}\{z\},ymm5,ymm4\{sae\}
+\s*[a-f0-9]+:\s*62 f1 50 18 5d f4\s+vminps ymm6,ymm5,ymm4\{sae\}
+\s*[a-f0-9]+:\s*62 f1 50 1f 5d f4\s+vminps ymm6\{k7\},ymm5,ymm4\{sae\}
+\s*[a-f0-9]+:\s*62 f1 50 9f 5d f4\s+vminps ymm6\{k7\}\{z\},ymm5,ymm4\{sae\}
+\s*[a-f0-9]+:\s*62 f3 f9 18 26 f5 7b\s+vgetmantpd ymm6,ymm5\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 f9 1f 26 f5 7b\s+vgetmantpd ymm6\{k7\},ymm5\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 f9 9f 26 f5 7b\s+vgetmantpd ymm6\{k7\}\{z\},ymm5\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 78 18 26 f5 7b\s+vgetmantph ymm6,ymm5\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 78 1f 26 f5 7b\s+vgetmantph ymm6\{k7\},ymm5\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 78 9f 26 f5 7b\s+vgetmantph ymm6\{k7\}\{z\},ymm5\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 79 18 26 f5 7b\s+vgetmantps ymm6,ymm5\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 79 1f 26 f5 7b\s+vgetmantps ymm6\{k7\},ymm5\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 79 9f 26 f5 7b\s+vgetmantps ymm6\{k7\}\{z\},ymm5\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 f9 18 56 f5 7b\s+vreducepd ymm6,ymm5\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 f9 1f 56 f5 7b\s+vreducepd ymm6\{k7\},ymm5\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 f9 9f 56 f5 7b\s+vreducepd ymm6\{k7\}\{z\},ymm5\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 78 18 56 f5 7b\s+vreduceph ymm6,ymm5\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 78 1f 56 f5 7b\s+vreduceph ymm6\{k7\},ymm5\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 78 9f 56 f5 7b\s+vreduceph ymm6\{k7\}\{z\},ymm5\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 79 18 56 f5 7b\s+vreduceps ymm6,ymm5\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 79 1f 56 f5 7b\s+vreduceps ymm6\{k7\},ymm5\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 79 9f 56 f5 7b\s+vreduceps ymm6\{k7\}\{z\},ymm5\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 f9 18 09 f5 7b\s+vrndscalepd ymm6,ymm5\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 f9 1f 09 f5 7b\s+vrndscalepd ymm6\{k7\},ymm5\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 f9 9f 09 f5 7b\s+vrndscalepd ymm6\{k7\}\{z\},ymm5\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 78 18 08 f5 7b\s+vrndscaleph ymm6,ymm5\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 78 1f 08 f5 7b\s+vrndscaleph ymm6\{k7\},ymm5\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 78 9f 08 f5 7b\s+vrndscaleph ymm6\{k7\}\{z\},ymm5\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 79 18 08 f5 7b\s+vrndscaleps ymm6,ymm5\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 79 1f 08 f5 7b\s+vrndscaleps ymm6\{k7\},ymm5\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 79 9f 08 f5 7b\s+vrndscaleps ymm6\{k7\}\{z\},ymm5\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f2 d1 18 98 f4\s+vfmadd132pd ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f2 d1 3f 98 f4\s+vfmadd132pd ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f2 d1 ff 98 f4\s+vfmadd132pd ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f6 51 18 98 f4\s+vfmadd132ph ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f6 51 3f 98 f4\s+vfmadd132ph ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f6 51 ff 98 f4\s+vfmadd132ph ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f2 51 18 98 f4\s+vfmadd132ps ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f2 51 3f 98 f4\s+vfmadd132ps ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f2 51 ff 98 f4\s+vfmadd132ps ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f2 d1 18 a8 f4\s+vfmadd213pd ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f2 d1 3f a8 f4\s+vfmadd213pd ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f2 d1 ff a8 f4\s+vfmadd213pd ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f6 51 18 a8 f4\s+vfmadd213ph ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f6 51 3f a8 f4\s+vfmadd213ph ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f6 51 ff a8 f4\s+vfmadd213ph ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f2 51 18 a8 f4\s+vfmadd213ps ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f2 51 3f a8 f4\s+vfmadd213ps ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f2 51 ff a8 f4\s+vfmadd213ps ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f2 d1 18 b8 f4\s+vfmadd231pd ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f2 d1 3f b8 f4\s+vfmadd231pd ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f2 d1 ff b8 f4\s+vfmadd231pd ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f6 51 18 b8 f4\s+vfmadd231ph ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f6 51 3f b8 f4\s+vfmadd231ph ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f6 51 ff b8 f4\s+vfmadd231ph ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f2 51 18 b8 f4\s+vfmadd231ps ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f2 51 3f b8 f4\s+vfmadd231ps ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f2 51 ff b8 f4\s+vfmadd231ps ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f2 d1 18 96 f4\s+vfmaddsub132pd ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f2 d1 3f 96 f4\s+vfmaddsub132pd ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f2 d1 ff 96 f4\s+vfmaddsub132pd ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f6 51 18 96 f4\s+vfmaddsub132ph ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f6 51 3f 96 f4\s+vfmaddsub132ph ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f6 51 ff 96 f4\s+vfmaddsub132ph ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f2 51 18 96 f4\s+vfmaddsub132ps ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f2 51 3f 96 f4\s+vfmaddsub132ps ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f2 51 ff 96 f4\s+vfmaddsub132ps ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f2 d1 18 a6 f4\s+vfmaddsub213pd ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f2 d1 3f a6 f4\s+vfmaddsub213pd ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f2 d1 ff a6 f4\s+vfmaddsub213pd ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f6 51 18 a6 f4\s+vfmaddsub213ph ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f6 51 3f a6 f4\s+vfmaddsub213ph ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f6 51 ff a6 f4\s+vfmaddsub213ph ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f2 51 18 a6 f4\s+vfmaddsub213ps ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f2 51 3f a6 f4\s+vfmaddsub213ps ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f2 51 ff a6 f4\s+vfmaddsub213ps ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f2 d1 18 b6 f4\s+vfmaddsub231pd ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f2 d1 3f b6 f4\s+vfmaddsub231pd ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f2 d1 ff b6 f4\s+vfmaddsub231pd ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f6 51 18 b6 f4\s+vfmaddsub231ph ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f6 51 3f b6 f4\s+vfmaddsub231ph ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f6 51 ff b6 f4\s+vfmaddsub231ph ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f2 51 18 b6 f4\s+vfmaddsub231ps ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f2 51 3f b6 f4\s+vfmaddsub231ps ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f2 51 ff b6 f4\s+vfmaddsub231ps ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f2 d1 18 9a f4\s+vfmsub132pd ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f2 d1 3f 9a f4\s+vfmsub132pd ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f2 d1 ff 9a f4\s+vfmsub132pd ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f6 51 18 9a f4\s+vfmsub132ph ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f6 51 3f 9a f4\s+vfmsub132ph ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f6 51 ff 9a f4\s+vfmsub132ph ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f2 51 18 9a f4\s+vfmsub132ps ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f2 51 3f 9a f4\s+vfmsub132ps ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f2 51 ff 9a f4\s+vfmsub132ps ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f2 d1 18 aa f4\s+vfmsub213pd ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f2 d1 3f aa f4\s+vfmsub213pd ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f2 d1 ff aa f4\s+vfmsub213pd ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f6 51 18 aa f4\s+vfmsub213ph ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f6 51 3f aa f4\s+vfmsub213ph ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f6 51 ff aa f4\s+vfmsub213ph ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f2 51 18 aa f4\s+vfmsub213ps ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f2 51 3f aa f4\s+vfmsub213ps ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f2 51 ff aa f4\s+vfmsub213ps ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f2 d1 18 ba f4\s+vfmsub231pd ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f2 d1 3f ba f4\s+vfmsub231pd ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f2 d1 ff ba f4\s+vfmsub231pd ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f6 51 18 ba f4\s+vfmsub231ph ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f6 51 3f ba f4\s+vfmsub231ph ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f6 51 ff ba f4\s+vfmsub231ph ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f2 51 18 ba f4\s+vfmsub231ps ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f2 51 3f ba f4\s+vfmsub231ps ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f2 51 ff ba f4\s+vfmsub231ps ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f2 d1 18 97 f4\s+vfmsubadd132pd ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f2 d1 3f 97 f4\s+vfmsubadd132pd ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f2 d1 ff 97 f4\s+vfmsubadd132pd ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f6 51 18 97 f4\s+vfmsubadd132ph ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f6 51 3f 97 f4\s+vfmsubadd132ph ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f6 51 ff 97 f4\s+vfmsubadd132ph ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f2 51 18 97 f4\s+vfmsubadd132ps ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f2 51 3f 97 f4\s+vfmsubadd132ps ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f2 51 ff 97 f4\s+vfmsubadd132ps ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f2 d1 18 a7 f4\s+vfmsubadd213pd ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f2 d1 3f a7 f4\s+vfmsubadd213pd ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f2 d1 ff a7 f4\s+vfmsubadd213pd ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f6 51 18 a7 f4\s+vfmsubadd213ph ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f6 51 3f a7 f4\s+vfmsubadd213ph ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f6 51 ff a7 f4\s+vfmsubadd213ph ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f2 51 18 a7 f4\s+vfmsubadd213ps ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f2 51 3f a7 f4\s+vfmsubadd213ps ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f2 51 ff a7 f4\s+vfmsubadd213ps ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f2 d1 18 b7 f4\s+vfmsubadd231pd ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f2 d1 3f b7 f4\s+vfmsubadd231pd ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f2 d1 ff b7 f4\s+vfmsubadd231pd ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f6 51 18 b7 f4\s+vfmsubadd231ph ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f6 51 3f b7 f4\s+vfmsubadd231ph ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f6 51 ff b7 f4\s+vfmsubadd231ph ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f2 51 18 b7 f4\s+vfmsubadd231ps ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f2 51 3f b7 f4\s+vfmsubadd231ps ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f2 51 ff b7 f4\s+vfmsubadd231ps ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f2 d1 18 9c f4\s+vfnmadd132pd ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f2 d1 3f 9c f4\s+vfnmadd132pd ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f2 d1 ff 9c f4\s+vfnmadd132pd ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f6 51 18 9c f4\s+vfnmadd132ph ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f6 51 3f 9c f4\s+vfnmadd132ph ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f6 51 ff 9c f4\s+vfnmadd132ph ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f2 51 18 9c f4\s+vfnmadd132ps ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f2 51 3f 9c f4\s+vfnmadd132ps ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f2 51 ff 9c f4\s+vfnmadd132ps ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f2 d1 18 ac f4\s+vfnmadd213pd ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f2 d1 3f ac f4\s+vfnmadd213pd ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f2 d1 ff ac f4\s+vfnmadd213pd ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f6 51 18 ac f4\s+vfnmadd213ph ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f6 51 3f ac f4\s+vfnmadd213ph ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f6 51 ff ac f4\s+vfnmadd213ph ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f2 51 18 ac f4\s+vfnmadd213ps ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f2 51 3f ac f4\s+vfnmadd213ps ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f2 51 ff ac f4\s+vfnmadd213ps ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f2 d1 18 bc f4\s+vfnmadd231pd ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f2 d1 3f bc f4\s+vfnmadd231pd ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f2 d1 ff bc f4\s+vfnmadd231pd ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f6 51 18 bc f4\s+vfnmadd231ph ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f6 51 3f bc f4\s+vfnmadd231ph ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f6 51 ff bc f4\s+vfnmadd231ph ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f2 51 18 bc f4\s+vfnmadd231ps ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f2 51 3f bc f4\s+vfnmadd231ps ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f2 51 ff bc f4\s+vfnmadd231ps ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f2 d1 18 9e f4\s+vfnmsub132pd ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f2 d1 3f 9e f4\s+vfnmsub132pd ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f2 d1 ff 9e f4\s+vfnmsub132pd ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f6 51 18 9e f4\s+vfnmsub132ph ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f6 51 3f 9e f4\s+vfnmsub132ph ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f6 51 ff 9e f4\s+vfnmsub132ph ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f2 51 18 9e f4\s+vfnmsub132ps ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f2 51 3f 9e f4\s+vfnmsub132ps ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f2 51 ff 9e f4\s+vfnmsub132ps ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f2 d1 18 ae f4\s+vfnmsub213pd ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f2 d1 3f ae f4\s+vfnmsub213pd ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f2 d1 ff ae f4\s+vfnmsub213pd ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f6 51 18 ae f4\s+vfnmsub213ph ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f6 51 3f ae f4\s+vfnmsub213ph ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f6 51 ff ae f4\s+vfnmsub213ph ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f2 51 18 ae f4\s+vfnmsub213ps ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f2 51 3f ae f4\s+vfnmsub213ps ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f2 51 ff ae f4\s+vfnmsub213ps ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f2 d1 18 be f4\s+vfnmsub231pd ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f2 d1 3f be f4\s+vfnmsub231pd ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f2 d1 ff be f4\s+vfnmsub231pd ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f6 51 18 be f4\s+vfnmsub231ph ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f6 51 3f be f4\s+vfnmsub231ph ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f6 51 ff be f4\s+vfnmsub231ph ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f2 51 18 be f4\s+vfnmsub231ps ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f2 51 3f be f4\s+vfnmsub231ps ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f2 51 ff be f4\s+vfnmsub231ps ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f3 d1 18 54 f4 7b\s+vfixupimmpd ymm6,ymm5,ymm4\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 d1 1f 54 f4 7b\s+vfixupimmpd ymm6\{k7\},ymm5,ymm4\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 d1 9f 54 f4 7b\s+vfixupimmpd ymm6\{k7\}\{z\},ymm5,ymm4\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 51 18 54 f4 7b\s+vfixupimmps ymm6,ymm5,ymm4\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 51 1f 54 f4 7b\s+vfixupimmps ymm6\{k7\},ymm5,ymm4\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 51 9f 54 f4 7b\s+vfixupimmps ymm6\{k7\}\{z\},ymm5,ymm4\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 d1 18 50 f4 7b\s+vrangepd ymm6,ymm5,ymm4\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 d1 1f 50 f4 7b\s+vrangepd ymm6\{k7\},ymm5,ymm4\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 d1 9f 50 f4 7b\s+vrangepd ymm6\{k7\}\{z\},ymm5,ymm4\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 51 18 50 f4 7b\s+vrangeps ymm6,ymm5,ymm4\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 51 1f 50 f4 7b\s+vrangeps ymm6\{k7\},ymm5,ymm4\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f3 51 9f 50 f4 7b\s+vrangeps ymm6\{k7\}\{z\},ymm5,ymm4\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 f6 53 18 56 f4\s+vfcmaddcph ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f6 53 3f 56 f4\s+vfcmaddcph ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f6 53 ff 56 f4\s+vfcmaddcph ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f6 53 18 d6 f4\s+vfcmulcph ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f6 53 3f d6 f4\s+vfcmulcph ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f6 53 ff d6 f4\s+vfcmulcph ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f6 52 18 56 f4\s+vfmaddcph ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f6 52 3f 56 f4\s+vfmaddcph ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f6 52 ff 56 f4\s+vfmaddcph ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f6 52 18 d6 f4\s+vfmulcph ymm6,ymm5,ymm4\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f6 52 3f d6 f4\s+vfmulcph ymm6\{k7\},ymm5,ymm4\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f6 52 ff d6 f4\s+vfmulcph ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f5 78 18 5b f5\s+vcvtdq2ph xmm6,ymm5\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f5 78 3f 5b f5\s+vcvtdq2ph xmm6\{k7\},ymm5\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f5 78 ff 5b f5\s+vcvtdq2ph xmm6\{k7\}\{z\},ymm5\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f1 78 18 5b f5\s+vcvtdq2ps ymm6,ymm5\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f1 78 3f 5b f5\s+vcvtdq2ps ymm6\{k7\},ymm5\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f1 78 ff 5b f5\s+vcvtdq2ps ymm6\{k7\}\{z\},ymm5\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f5 7b 18 7a f5\s+vcvtudq2ph xmm6,ymm5\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f5 7b 3f 7a f5\s+vcvtudq2ph xmm6\{k7\},ymm5\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f5 7b ff 7a f5\s+vcvtudq2ph xmm6\{k7\}\{z\},ymm5\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f1 7b 18 7a f5\s+vcvtudq2ps ymm6,ymm5\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f1 7b 3f 7a f5\s+vcvtudq2ps ymm6\{k7\},ymm5\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f1 7b ff 7a f5\s+vcvtudq2ps ymm6\{k7\}\{z\},ymm5\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f1 fb 18 e6 f5\s+vcvtpd2dq xmm6,ymm5\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f1 fb 3f e6 f5\s+vcvtpd2dq xmm6\{k7\},ymm5\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f1 fb ff e6 f5\s+vcvtpd2dq xmm6\{k7\}\{z\},ymm5\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f5 f9 18 5a f5\s+vcvtpd2ph xmm6,ymm5\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f5 f9 3f 5a f5\s+vcvtpd2ph xmm6\{k7\},ymm5\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f5 f9 ff 5a f5\s+vcvtpd2ph xmm6\{k7\}\{z\},ymm5\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f1 f9 18 5a f5\s+vcvtpd2ps xmm6,ymm5\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f1 f9 3f 5a f5\s+vcvtpd2ps xmm6\{k7\},ymm5\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f1 f9 ff 5a f5\s+vcvtpd2ps xmm6\{k7\}\{z\},ymm5\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f1 f8 18 79 f5\s+vcvtpd2udq xmm6,ymm5\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f1 f8 3f 79 f5\s+vcvtpd2udq xmm6\{k7\},ymm5\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f1 f8 ff 79 f5\s+vcvtpd2udq xmm6\{k7\}\{z\},ymm5\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f1 f9 18 7b f5\s+vcvtpd2qq ymm6,ymm5\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f1 f9 3f 7b f5\s+vcvtpd2qq ymm6\{k7\},ymm5\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f1 f9 ff 7b f5\s+vcvtpd2qq ymm6\{k7\}\{z\},ymm5\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f1 f9 18 79 f5\s+vcvtpd2uqq ymm6,ymm5\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f1 f9 3f 79 f5\s+vcvtpd2uqq ymm6\{k7\},ymm5\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f1 f9 ff 79 f5\s+vcvtpd2uqq ymm6\{k7\}\{z\},ymm5\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f5 79 18 5b f5\s+vcvtph2dq ymm6,xmm5\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f5 79 3f 5b f5\s+vcvtph2dq ymm6\{k7\},xmm5\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f5 79 ff 5b f5\s+vcvtph2dq ymm6\{k7\}\{z\},xmm5\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f5 79 18 7b f5\s+vcvtph2qq ymm6,xmm5\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f5 79 3f 7b f5\s+vcvtph2qq ymm6\{k7\},xmm5\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f5 79 ff 7b f5\s+vcvtph2qq ymm6\{k7\}\{z\},xmm5\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f5 78 18 79 f5\s+vcvtph2udq ymm6,xmm5\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f5 78 3f 79 f5\s+vcvtph2udq ymm6\{k7\},xmm5\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f5 78 ff 79 f5\s+vcvtph2udq ymm6\{k7\}\{z\},xmm5\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f5 79 18 79 f5\s+vcvtph2uqq ymm6,xmm5\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f5 79 3f 79 f5\s+vcvtph2uqq ymm6\{k7\},xmm5\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f5 79 ff 79 f5\s+vcvtph2uqq ymm6\{k7\}\{z\},xmm5\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f5 78 18 5a f5\s+vcvtph2pd ymm6,xmm5\{sae\}
+\s*[a-f0-9]+:\s*62 f5 78 1f 5a f5\s+vcvtph2pd ymm6\{k7\},xmm5\{sae\}
+\s*[a-f0-9]+:\s*62 f5 78 9f 5a f5\s+vcvtph2pd ymm6\{k7\}\{z\},xmm5\{sae\}
+\s*[a-f0-9]+:\s*62 f2 79 18 13 f5\s+vcvtph2ps ymm6,xmm5\{sae\}
+\s*[a-f0-9]+:\s*62 f2 79 1f 13 f5\s+vcvtph2ps ymm6\{k7\},xmm5\{sae\}
+\s*[a-f0-9]+:\s*62 f2 79 9f 13 f5\s+vcvtph2ps ymm6\{k7\}\{z\},xmm5\{sae\}
+\s*[a-f0-9]+:\s*62 f6 79 18 13 f5\s+vcvtph2psx ymm6,xmm5\{sae\}
+\s*[a-f0-9]+:\s*62 f6 79 1f 13 f5\s+vcvtph2psx ymm6\{k7\},xmm5\{sae\}
+\s*[a-f0-9]+:\s*62 f6 79 9f 13 f5\s+vcvtph2psx ymm6\{k7\}\{z\},xmm5\{sae\}
+\s*[a-f0-9]+:\s*62 f5 78 18 7d f5\s+vcvtph2uw ymm6,ymm5\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f5 78 3f 7d f5\s+vcvtph2uw ymm6\{k7\},ymm5\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f5 78 ff 7d f5\s+vcvtph2uw ymm6\{k7\}\{z\},ymm5\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f5 79 18 7d f5\s+vcvtph2w ymm6,ymm5\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f5 79 3f 7d f5\s+vcvtph2w ymm6\{k7\},ymm5\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f5 79 ff 7d f5\s+vcvtph2w ymm6\{k7\}\{z\},ymm5\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f1 79 18 5b f5\s+vcvtps2dq ymm6,ymm5\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f1 79 3f 5b f5\s+vcvtps2dq ymm6\{k7\},ymm5\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f1 79 ff 5b f5\s+vcvtps2dq ymm6\{k7\}\{z\},ymm5\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f1 78 18 79 f5\s+vcvtps2udq ymm6,ymm5\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f1 78 3f 79 f5\s+vcvtps2udq ymm6\{k7\},ymm5\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f1 78 ff 79 f5\s+vcvtps2udq ymm6\{k7\}\{z\},ymm5\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f1 78 18 5a f5\s+vcvtps2pd ymm6,xmm5\{sae\}
+\s*[a-f0-9]+:\s*62 f1 78 1f 5a f5\s+vcvtps2pd ymm6\{k7\},xmm5\{sae\}
+\s*[a-f0-9]+:\s*62 f1 78 9f 5a f5\s+vcvtps2pd ymm6\{k7\}\{z\},xmm5\{sae\}
+\s*[a-f0-9]+:\s*62 f5 79 18 1d f5\s+vcvtps2phx xmm6,ymm5\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f5 79 3f 1d f5\s+vcvtps2phx xmm6\{k7\},ymm5\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f5 79 ff 1d f5\s+vcvtps2phx xmm6\{k7\}\{z\},ymm5\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f1 79 18 7b f5\s+vcvtps2qq ymm6,xmm5\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f1 79 3f 7b f5\s+vcvtps2qq ymm6\{k7\},xmm5\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f1 79 ff 7b f5\s+vcvtps2qq ymm6\{k7\}\{z\},xmm5\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f1 79 18 79 f5\s+vcvtps2uqq ymm6,xmm5\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f1 79 3f 79 f5\s+vcvtps2uqq ymm6\{k7\},xmm5\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f1 79 ff 79 f5\s+vcvtps2uqq ymm6\{k7\}\{z\},xmm5\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f1 fa 18 e6 f5\s+vcvtqq2pd ymm6,ymm5\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f1 fa 3f e6 f5\s+vcvtqq2pd ymm6\{k7\},ymm5\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f1 fa ff e6 f5\s+vcvtqq2pd ymm6\{k7\}\{z\},ymm5\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f5 f8 18 5b f5\s+vcvtqq2ph xmm6,ymm5\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f5 f8 3f 5b f5\s+vcvtqq2ph xmm6\{k7\},ymm5\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f5 f8 ff 5b f5\s+vcvtqq2ph xmm6\{k7\}\{z\},ymm5\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f1 f8 18 5b f5\s+vcvtqq2ps xmm6,ymm5\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f1 f8 3f 5b f5\s+vcvtqq2ps xmm6\{k7\},ymm5\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f1 f8 ff 5b f5\s+vcvtqq2ps xmm6\{k7\}\{z\},ymm5\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f1 fa 18 7a f5\s+vcvtuqq2pd ymm6,ymm5\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f1 fa 3f 7a f5\s+vcvtuqq2pd ymm6\{k7\},ymm5\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f1 fa ff 7a f5\s+vcvtuqq2pd ymm6\{k7\}\{z\},ymm5\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f5 fb 18 7a f5\s+vcvtuqq2ph xmm6,ymm5\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f5 fb 3f 7a f5\s+vcvtuqq2ph xmm6\{k7\},ymm5\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f5 fb ff 7a f5\s+vcvtuqq2ph xmm6\{k7\}\{z\},ymm5\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f1 fb 18 7a f5\s+vcvtuqq2ps xmm6,ymm5\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f1 fb 3f 7a f5\s+vcvtuqq2ps xmm6\{k7\},ymm5\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f1 fb ff 7a f5\s+vcvtuqq2ps xmm6\{k7\}\{z\},ymm5\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f1 f9 18 e6 f5\s+vcvttpd2dq xmm6,ymm5\{sae\}
+\s*[a-f0-9]+:\s*62 f1 f9 1f e6 f5\s+vcvttpd2dq xmm6\{k7\},ymm5\{sae\}
+\s*[a-f0-9]+:\s*62 f1 f9 9f e6 f5\s+vcvttpd2dq xmm6\{k7\}\{z\},ymm5\{sae\}
+\s*[a-f0-9]+:\s*62 f1 f8 18 78 f5\s+vcvttpd2udq xmm6,ymm5\{sae\}
+\s*[a-f0-9]+:\s*62 f1 f8 1f 78 f5\s+vcvttpd2udq xmm6\{k7\},ymm5\{sae\}
+\s*[a-f0-9]+:\s*62 f1 f8 9f 78 f5\s+vcvttpd2udq xmm6\{k7\}\{z\},ymm5\{sae\}
+\s*[a-f0-9]+:\s*62 f1 f9 18 7a f5\s+vcvttpd2qq ymm6,ymm5\{sae\}
+\s*[a-f0-9]+:\s*62 f1 f9 1f 7a f5\s+vcvttpd2qq ymm6\{k7\},ymm5\{sae\}
+\s*[a-f0-9]+:\s*62 f1 f9 9f 7a f5\s+vcvttpd2qq ymm6\{k7\}\{z\},ymm5\{sae\}
+\s*[a-f0-9]+:\s*62 f1 f9 18 78 f5\s+vcvttpd2uqq ymm6,ymm5\{sae\}
+\s*[a-f0-9]+:\s*62 f1 f9 1f 78 f5\s+vcvttpd2uqq ymm6\{k7\},ymm5\{sae\}
+\s*[a-f0-9]+:\s*62 f1 f9 9f 78 f5\s+vcvttpd2uqq ymm6\{k7\}\{z\},ymm5\{sae\}
+\s*[a-f0-9]+:\s*62 f5 7a 18 5b f5\s+vcvttph2dq ymm6,xmm5\{sae\}
+\s*[a-f0-9]+:\s*62 f5 7a 1f 5b f5\s+vcvttph2dq ymm6\{k7\},xmm5\{sae\}
+\s*[a-f0-9]+:\s*62 f5 7a 9f 5b f5\s+vcvttph2dq ymm6\{k7\}\{z\},xmm5\{sae\}
+\s*[a-f0-9]+:\s*62 f5 79 18 7a f5\s+vcvttph2qq ymm6,xmm5\{sae\}
+\s*[a-f0-9]+:\s*62 f5 79 1f 7a f5\s+vcvttph2qq ymm6\{k7\},xmm5\{sae\}
+\s*[a-f0-9]+:\s*62 f5 79 9f 7a f5\s+vcvttph2qq ymm6\{k7\}\{z\},xmm5\{sae\}
+\s*[a-f0-9]+:\s*62 f5 78 18 78 f5\s+vcvttph2udq ymm6,xmm5\{sae\}
+\s*[a-f0-9]+:\s*62 f5 78 1f 78 f5\s+vcvttph2udq ymm6\{k7\},xmm5\{sae\}
+\s*[a-f0-9]+:\s*62 f5 78 9f 78 f5\s+vcvttph2udq ymm6\{k7\}\{z\},xmm5\{sae\}
+\s*[a-f0-9]+:\s*62 f5 79 18 78 f5\s+vcvttph2uqq ymm6,xmm5\{sae\}
+\s*[a-f0-9]+:\s*62 f5 79 1f 78 f5\s+vcvttph2uqq ymm6\{k7\},xmm5\{sae\}
+\s*[a-f0-9]+:\s*62 f5 79 9f 78 f5\s+vcvttph2uqq ymm6\{k7\}\{z\},xmm5\{sae\}
+\s*[a-f0-9]+:\s*62 f5 78 18 7c f5\s+vcvttph2uw ymm6,ymm5\{sae\}
+\s*[a-f0-9]+:\s*62 f5 78 1f 7c f5\s+vcvttph2uw ymm6\{k7\},ymm5\{sae\}
+\s*[a-f0-9]+:\s*62 f5 78 9f 7c f5\s+vcvttph2uw ymm6\{k7\}\{z\},ymm5\{sae\}
+\s*[a-f0-9]+:\s*62 f5 79 18 7c f5\s+vcvttph2w ymm6,ymm5\{sae\}
+\s*[a-f0-9]+:\s*62 f5 79 1f 7c f5\s+vcvttph2w ymm6\{k7\},ymm5\{sae\}
+\s*[a-f0-9]+:\s*62 f5 79 9f 7c f5\s+vcvttph2w ymm6\{k7\}\{z\},ymm5\{sae\}
+\s*[a-f0-9]+:\s*62 f1 7a 18 5b f5\s+vcvttps2dq ymm6,ymm5\{sae\}
+\s*[a-f0-9]+:\s*62 f1 7a 1f 5b f5\s+vcvttps2dq ymm6\{k7\},ymm5\{sae\}
+\s*[a-f0-9]+:\s*62 f1 7a 9f 5b f5\s+vcvttps2dq ymm6\{k7\}\{z\},ymm5\{sae\}
+\s*[a-f0-9]+:\s*62 f1 78 18 78 f5\s+vcvttps2udq ymm6,ymm5\{sae\}
+\s*[a-f0-9]+:\s*62 f1 78 1f 78 f5\s+vcvttps2udq ymm6\{k7\},ymm5\{sae\}
+\s*[a-f0-9]+:\s*62 f1 78 9f 78 f5\s+vcvttps2udq ymm6\{k7\}\{z\},ymm5\{sae\}
+\s*[a-f0-9]+:\s*62 f1 79 18 7a f5\s+vcvttps2qq ymm6,xmm5\{sae\}
+\s*[a-f0-9]+:\s*62 f1 79 1f 7a f5\s+vcvttps2qq ymm6\{k7\},xmm5\{sae\}
+\s*[a-f0-9]+:\s*62 f1 79 9f 7a f5\s+vcvttps2qq ymm6\{k7\}\{z\},xmm5\{sae\}
+\s*[a-f0-9]+:\s*62 f1 79 18 78 f5\s+vcvttps2uqq ymm6,xmm5\{sae\}
+\s*[a-f0-9]+:\s*62 f1 79 1f 78 f5\s+vcvttps2uqq ymm6\{k7\},xmm5\{sae\}
+\s*[a-f0-9]+:\s*62 f1 79 9f 78 f5\s+vcvttps2uqq ymm6\{k7\}\{z\},xmm5\{sae\}
+\s*[a-f0-9]+:\s*62 f5 7b 18 7d f5\s+vcvtuw2ph ymm6,ymm5\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f5 7b 3f 7d f5\s+vcvtuw2ph ymm6\{k7\},ymm5\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f5 7b ff 7d f5\s+vcvtuw2ph ymm6\{k7\}\{z\},ymm5\{rz-sae\}
+\s*[a-f0-9]+:\s*62 f5 7a 18 7d f5\s+vcvtw2ph ymm6,ymm5\{rn-sae\}
+\s*[a-f0-9]+:\s*62 f5 7a 3f 7d f5\s+vcvtw2ph ymm6\{k7\},ymm5\{rd-sae\}
+\s*[a-f0-9]+:\s*62 f5 7a ff 7d f5\s+vcvtw2ph ymm6\{k7\}\{z\},ymm5\{rz-sae\}
+#pass
diff --git a/gas/testsuite/gas/i386/avx10_2-rounding-inval.l b/gas/testsuite/gas/i386/avx10_2-rounding-inval.l
new file mode 100644
index 0000000..924353b
--- /dev/null
+++ b/gas/testsuite/gas/i386/avx10_2-rounding-inval.l
@@ -0,0 +1,35 @@
+.* Assembler messages:
+.*:6: Error: operand size mismatch for `vcmppd'
+.*:7: Error: operand size mismatch for `vgetexppd'
+.*:8: Error: operand size mismatch for `vsqrtpd'
+.*:9: Error: operand size mismatch for `vaddpd'
+.*:10: Error: operand size mismatch for `vmaxpd'
+.*:11: Error: operand size mismatch for `vreducepd'
+.*:12: Error: operand size mismatch for `vfmadd132pd'
+.*:13: Error: operand size mismatch for `vrangepd'
+.*:14: Error: operand size mismatch for `vfcmaddcph'
+.*:15: Error: operand size mismatch for `vcvtdq2ph'
+.*:16: Error: operand size mismatch for `vcvtdq2ps'
+.*:17: Error: operand size mismatch for `vcvtpd2dq'
+.*:18: Error: operand size mismatch for `vcvtpd2ph'
+.*:19: Error: operand size mismatch for `vcvtpd2qq'
+.*:20: Error: operand size mismatch for `vcvtph2dq'
+.*:21: Error: operand size mismatch for `vcvtph2qq'
+.*:22: Error: operand size mismatch for `vcvtph2pd'
+.*:23: Error: operand size mismatch for `vcvtph2ps'
+.*:24: Error: operand size mismatch for `vcvtph2uw'
+.*:25: Error: operand size mismatch for `vcvtps2dq'
+.*:26: Error: operand size mismatch for `vcvtps2pd'
+.*:27: Error: operand size mismatch for `vcvtps2phx'
+.*:28: Error: operand size mismatch for `vcvtps2qq'
+.*:29: Error: operand size mismatch for `vcvtqq2pd'
+.*:30: Error: operand size mismatch for `vcvtqq2ph'
+.*:31: Error: operand size mismatch for `vcvtqq2ps'
+.*:32: Error: operand size mismatch for `vcvttpd2dq'
+.*:33: Error: operand size mismatch for `vcvttpd2qq'
+.*:34: Error: operand size mismatch for `vcvttph2dq'
+.*:35: Error: operand size mismatch for `vcvttph2qq'
+.*:36: Error: operand size mismatch for `vcvttph2uw'
+.*:37: Error: operand size mismatch for `vcvttps2dq'
+.*:38: Error: operand size mismatch for `vcvttps2qq'
+.*:39: Error: operand size mismatch for `vcvtuw2ph'
diff --git a/gas/testsuite/gas/i386/avx10_2-rounding-inval.s b/gas/testsuite/gas/i386/avx10_2-rounding-inval.s
new file mode 100644
index 0000000..fbde553
--- /dev/null
+++ b/gas/testsuite/gas/i386/avx10_2-rounding-inval.s
@@ -0,0 +1,39 @@
+# Check invalid AVX10.2 instructions
+
+	.text
+	.arch .noavx10.2
+_start:
+	vcmppd	$123, {sae}, %ymm4, %ymm5, %k5
+	vgetexppd	{sae}, %ymm5, %ymm6
+	vsqrtpd	{rn-sae}, %ymm5, %ymm6
+	vaddpd	{rn-sae}, %ymm4, %ymm5, %ymm6
+	vmaxpd	{sae}, %ymm4, %ymm5, %ymm6
+	vreducepd	$123, {sae}, %ymm5, %ymm6
+	vfmadd132pd	{rn-sae}, %ymm4, %ymm5, %ymm6
+	vrangepd	$123, {sae}, %ymm4, %ymm5, %ymm6
+	vfcmaddcph	{rn-sae}, %ymm4, %ymm5, %ymm6
+	vcvtdq2ph	{rn-sae}, %ymm5, %xmm6
+	vcvtdq2ps	{rn-sae}, %ymm5, %ymm6
+	vcvtpd2dq	{rn-sae}, %ymm5, %xmm6
+	vcvtpd2ph	{rn-sae}, %ymm5, %xmm6
+	vcvtpd2qq	{rn-sae}, %ymm5, %ymm6
+	vcvtph2dq	{rn-sae}, %xmm5, %ymm6
+	vcvtph2qq	{rn-sae}, %xmm5, %ymm6
+	vcvtph2pd	{sae}, %xmm5, %ymm6
+	vcvtph2ps	{sae}, %xmm5, %ymm6
+	vcvtph2uw	{rn-sae}, %ymm5, %ymm6
+	vcvtps2dq	{rn-sae}, %ymm5, %ymm6
+	vcvtps2pd	{sae}, %xmm5, %ymm6
+	vcvtps2phx	{rn-sae}, %ymm5, %xmm6
+	vcvtps2qq	{rn-sae}, %xmm5, %ymm6
+	vcvtqq2pd	{rn-sae}, %ymm5, %ymm6
+	vcvtqq2ph	{rn-sae}, %ymm5, %xmm6
+	vcvtqq2ps	{rn-sae}, %ymm5, %xmm6
+	vcvttpd2dq	{sae}, %ymm5, %xmm6
+	vcvttpd2qq	{sae}, %ymm5, %ymm6
+	vcvttph2dq	{sae}, %xmm5, %ymm6
+	vcvttph2qq	{sae}, %xmm5, %ymm6
+	vcvttph2uw	{sae}, %ymm5, %ymm6
+	vcvttps2dq	{sae}, %ymm5, %ymm6
+	vcvttps2qq	{sae}, %xmm5, %ymm6
+	vcvtuw2ph	{rn-sae}, %ymm5, %ymm6
diff --git a/gas/testsuite/gas/i386/avx10_2-rounding.d b/gas/testsuite/gas/i386/avx10_2-rounding.d
new file mode 100644
index 0000000..30d4624
--- /dev/null
+++ b/gas/testsuite/gas/i386/avx10_2-rounding.d
@@ -0,0 +1,450 @@
+#objdump: -dw
+#name: i386 AVX10.2 rounding insns
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+0+ <_start>:
+\s*[a-f0-9]+:\s*62 f1 d1 18 c2 ec 7b\s+vcmppd \$0x7b,\{sae\},%ymm4,%ymm5,%k5
+\s*[a-f0-9]+:\s*62 f1 d1 1f c2 ec 7b\s+vcmppd \$0x7b,\{sae\},%ymm4,%ymm5,%k5\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 f9 18 42 f5\s+vgetexppd \{sae\},%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 f9 1f 42 f5\s+vgetexppd \{sae\},%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 f9 9f 42 f5\s+vgetexppd \{sae\},%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f1 f9 18 51 f5\s+vsqrtpd \{rn-sae\},%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f1 f9 3f 51 f5\s+vsqrtpd \{rd-sae\},%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f1 f9 ff 51 f5\s+vsqrtpd \{rz-sae\},%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f3 50 18 c2 ec 7b\s+vcmpph \$0x7b,\{sae\},%ymm4,%ymm5,%k5
+\s*[a-f0-9]+:\s*62 f3 50 1f c2 ec 7b\s+vcmpph \$0x7b,\{sae\},%ymm4,%ymm5,%k5\{%k7\}
+\s*[a-f0-9]+:\s*62 f6 79 18 42 f5\s+vgetexpph \{sae\},%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f6 79 1f 42 f5\s+vgetexpph \{sae\},%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f6 79 9f 42 f5\s+vgetexpph \{sae\},%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f5 78 18 51 f5\s+vsqrtph \{rn-sae\},%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f5 78 3f 51 f5\s+vsqrtph \{rd-sae\},%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f5 78 ff 51 f5\s+vsqrtph \{rz-sae\},%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f1 50 18 c2 ec 7b\s+vcmpps \$0x7b,\{sae\},%ymm4,%ymm5,%k5
+\s*[a-f0-9]+:\s*62 f1 50 1f c2 ec 7b\s+vcmpps \$0x7b,\{sae\},%ymm4,%ymm5,%k5\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 79 18 42 f5\s+vgetexpps \{sae\},%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 79 1f 42 f5\s+vgetexpps \{sae\},%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 79 9f 42 f5\s+vgetexpps \{sae\},%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f1 78 18 51 f5\s+vsqrtps \{rn-sae\},%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f1 78 3f 51 f5\s+vsqrtps \{rd-sae\},%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f1 78 ff 51 f5\s+vsqrtps \{rz-sae\},%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f1 d1 18 58 f4\s+vaddpd \{rn-sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f1 d1 3f 58 f4\s+vaddpd \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f1 d1 ff 58 f4\s+vaddpd \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f5 50 18 58 f4\s+vaddph \{rn-sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f5 50 3f 58 f4\s+vaddph \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f5 50 ff 58 f4\s+vaddph \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f1 50 18 58 f4\s+vaddps \{rn-sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f1 50 3f 58 f4\s+vaddps \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f1 50 ff 58 f4\s+vaddps \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f1 d1 18 5e f4\s+vdivpd \{rn-sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f1 d1 3f 5e f4\s+vdivpd \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f1 d1 ff 5e f4\s+vdivpd \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f5 50 18 5e f4\s+vdivph \{rn-sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f5 50 3f 5e f4\s+vdivph \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f5 50 ff 5e f4\s+vdivph \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f1 50 18 5e f4\s+vdivps \{rn-sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f1 50 3f 5e f4\s+vdivps \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f1 50 ff 5e f4\s+vdivps \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f1 d1 18 59 f4\s+vmulpd \{rn-sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f1 d1 3f 59 f4\s+vmulpd \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f1 d1 ff 59 f4\s+vmulpd \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f5 50 18 59 f4\s+vmulph \{rn-sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f5 50 3f 59 f4\s+vmulph \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f5 50 ff 59 f4\s+vmulph \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f1 50 18 59 f4\s+vmulps \{rn-sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f1 50 3f 59 f4\s+vmulps \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f1 50 ff 59 f4\s+vmulps \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 d1 18 2c f4\s+vscalefpd \{rn-sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 d1 3f 2c f4\s+vscalefpd \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 d1 ff 2c f4\s+vscalefpd \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f6 51 18 2c f4\s+vscalefph \{rn-sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f6 51 3f 2c f4\s+vscalefph \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f6 51 ff 2c f4\s+vscalefph \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 51 18 2c f4\s+vscalefps \{rn-sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 51 3f 2c f4\s+vscalefps \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 51 ff 2c f4\s+vscalefps \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f1 d1 18 5c f4\s+vsubpd \{rn-sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f1 d1 3f 5c f4\s+vsubpd \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f1 d1 ff 5c f4\s+vsubpd \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f5 50 18 5c f4\s+vsubph \{rn-sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f5 50 3f 5c f4\s+vsubph \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f5 50 ff 5c f4\s+vsubph \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f1 50 18 5c f4\s+vsubps \{rn-sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f1 50 3f 5c f4\s+vsubps \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f1 50 ff 5c f4\s+vsubps \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f1 d1 18 5f f4\s+vmaxpd \{sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f1 d1 1f 5f f4\s+vmaxpd \{sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f1 d1 9f 5f f4\s+vmaxpd \{sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f5 50 18 5f f4\s+vmaxph \{sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f5 50 1f 5f f4\s+vmaxph \{sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f5 50 9f 5f f4\s+vmaxph \{sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f1 50 18 5f f4\s+vmaxps \{sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f1 50 1f 5f f4\s+vmaxps \{sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f1 50 9f 5f f4\s+vmaxps \{sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f1 d1 18 5d f4\s+vminpd \{sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f1 d1 1f 5d f4\s+vminpd \{sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f1 d1 9f 5d f4\s+vminpd \{sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f5 50 18 5d f4\s+vminph \{sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f5 50 1f 5d f4\s+vminph \{sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f5 50 9f 5d f4\s+vminph \{sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f1 50 18 5d f4\s+vminps \{sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f1 50 1f 5d f4\s+vminps \{sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f1 50 9f 5d f4\s+vminps \{sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f3 f9 18 26 f5 7b\s+vgetmantpd \$0x7b,\{sae\},%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f3 f9 1f 26 f5 7b\s+vgetmantpd \$0x7b,\{sae\},%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f3 f9 9f 26 f5 7b\s+vgetmantpd \$0x7b,\{sae\},%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f3 78 18 26 f5 7b\s+vgetmantph \$0x7b,\{sae\},%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f3 78 1f 26 f5 7b\s+vgetmantph \$0x7b,\{sae\},%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f3 78 9f 26 f5 7b\s+vgetmantph \$0x7b,\{sae\},%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f3 79 18 26 f5 7b\s+vgetmantps \$0x7b,\{sae\},%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f3 79 1f 26 f5 7b\s+vgetmantps \$0x7b,\{sae\},%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f3 79 9f 26 f5 7b\s+vgetmantps \$0x7b,\{sae\},%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f3 f9 18 56 f5 7b\s+vreducepd \$0x7b,\{sae\},%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f3 f9 1f 56 f5 7b\s+vreducepd \$0x7b,\{sae\},%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f3 f9 9f 56 f5 7b\s+vreducepd \$0x7b,\{sae\},%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f3 78 18 56 f5 7b\s+vreduceph \$0x7b,\{sae\},%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f3 78 1f 56 f5 7b\s+vreduceph \$0x7b,\{sae\},%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f3 78 9f 56 f5 7b\s+vreduceph \$0x7b,\{sae\},%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f3 79 18 56 f5 7b\s+vreduceps \$0x7b,\{sae\},%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f3 79 1f 56 f5 7b\s+vreduceps \$0x7b,\{sae\},%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f3 79 9f 56 f5 7b\s+vreduceps \$0x7b,\{sae\},%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f3 f9 18 09 f5 7b\s+vrndscalepd \$0x7b,\{sae\},%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f3 f9 1f 09 f5 7b\s+vrndscalepd \$0x7b,\{sae\},%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f3 f9 9f 09 f5 7b\s+vrndscalepd \$0x7b,\{sae\},%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f3 78 18 08 f5 7b\s+vrndscaleph \$0x7b,\{sae\},%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f3 78 1f 08 f5 7b\s+vrndscaleph \$0x7b,\{sae\},%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f3 78 9f 08 f5 7b\s+vrndscaleph \$0x7b,\{sae\},%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f3 79 18 08 f5 7b\s+vrndscaleps \$0x7b,\{sae\},%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f3 79 1f 08 f5 7b\s+vrndscaleps \$0x7b,\{sae\},%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f3 79 9f 08 f5 7b\s+vrndscaleps \$0x7b,\{sae\},%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 d1 18 98 f4\s+vfmadd132pd \{rn-sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 d1 3f 98 f4\s+vfmadd132pd \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 d1 ff 98 f4\s+vfmadd132pd \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f6 51 18 98 f4\s+vfmadd132ph \{rn-sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f6 51 3f 98 f4\s+vfmadd132ph \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f6 51 ff 98 f4\s+vfmadd132ph \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 51 18 98 f4\s+vfmadd132ps \{rn-sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 51 3f 98 f4\s+vfmadd132ps \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 51 ff 98 f4\s+vfmadd132ps \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 d1 18 a8 f4\s+vfmadd213pd \{rn-sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 d1 3f a8 f4\s+vfmadd213pd \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 d1 ff a8 f4\s+vfmadd213pd \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f6 51 18 a8 f4\s+vfmadd213ph \{rn-sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f6 51 3f a8 f4\s+vfmadd213ph \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f6 51 ff a8 f4\s+vfmadd213ph \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 51 18 a8 f4\s+vfmadd213ps \{rn-sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 51 3f a8 f4\s+vfmadd213ps \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 51 ff a8 f4\s+vfmadd213ps \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 d1 18 b8 f4\s+vfmadd231pd \{rn-sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 d1 3f b8 f4\s+vfmadd231pd \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 d1 ff b8 f4\s+vfmadd231pd \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f6 51 18 b8 f4\s+vfmadd231ph \{rn-sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f6 51 3f b8 f4\s+vfmadd231ph \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f6 51 ff b8 f4\s+vfmadd231ph \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 51 18 b8 f4\s+vfmadd231ps \{rn-sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 51 3f b8 f4\s+vfmadd231ps \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 51 ff b8 f4\s+vfmadd231ps \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 d1 18 96 f4\s+vfmaddsub132pd \{rn-sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 d1 3f 96 f4\s+vfmaddsub132pd \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 d1 ff 96 f4\s+vfmaddsub132pd \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f6 51 18 96 f4\s+vfmaddsub132ph \{rn-sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f6 51 3f 96 f4\s+vfmaddsub132ph \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f6 51 ff 96 f4\s+vfmaddsub132ph \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 51 18 96 f4\s+vfmaddsub132ps \{rn-sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 51 3f 96 f4\s+vfmaddsub132ps \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 51 ff 96 f4\s+vfmaddsub132ps \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 d1 18 a6 f4\s+vfmaddsub213pd \{rn-sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 d1 3f a6 f4\s+vfmaddsub213pd \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 d1 ff a6 f4\s+vfmaddsub213pd \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f6 51 18 a6 f4\s+vfmaddsub213ph \{rn-sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f6 51 3f a6 f4\s+vfmaddsub213ph \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f6 51 ff a6 f4\s+vfmaddsub213ph \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 51 18 a6 f4\s+vfmaddsub213ps \{rn-sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 51 3f a6 f4\s+vfmaddsub213ps \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 51 ff a6 f4\s+vfmaddsub213ps \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 d1 18 b6 f4\s+vfmaddsub231pd \{rn-sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 d1 3f b6 f4\s+vfmaddsub231pd \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 d1 ff b6 f4\s+vfmaddsub231pd \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f6 51 18 b6 f4\s+vfmaddsub231ph \{rn-sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f6 51 3f b6 f4\s+vfmaddsub231ph \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f6 51 ff b6 f4\s+vfmaddsub231ph \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 51 18 b6 f4\s+vfmaddsub231ps \{rn-sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 51 3f b6 f4\s+vfmaddsub231ps \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 51 ff b6 f4\s+vfmaddsub231ps \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 d1 18 9a f4\s+vfmsub132pd \{rn-sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 d1 3f 9a f4\s+vfmsub132pd \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 d1 ff 9a f4\s+vfmsub132pd \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f6 51 18 9a f4\s+vfmsub132ph \{rn-sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f6 51 3f 9a f4\s+vfmsub132ph \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f6 51 ff 9a f4\s+vfmsub132ph \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 51 18 9a f4\s+vfmsub132ps \{rn-sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 51 3f 9a f4\s+vfmsub132ps \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 51 ff 9a f4\s+vfmsub132ps \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 d1 18 aa f4\s+vfmsub213pd \{rn-sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 d1 3f aa f4\s+vfmsub213pd \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 d1 ff aa f4\s+vfmsub213pd \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f6 51 18 aa f4\s+vfmsub213ph \{rn-sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f6 51 3f aa f4\s+vfmsub213ph \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f6 51 ff aa f4\s+vfmsub213ph \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 51 18 aa f4\s+vfmsub213ps \{rn-sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 51 3f aa f4\s+vfmsub213ps \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 51 ff aa f4\s+vfmsub213ps \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 d1 18 ba f4\s+vfmsub231pd \{rn-sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 d1 3f ba f4\s+vfmsub231pd \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 d1 ff ba f4\s+vfmsub231pd \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f6 51 18 ba f4\s+vfmsub231ph \{rn-sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f6 51 3f ba f4\s+vfmsub231ph \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f6 51 ff ba f4\s+vfmsub231ph \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 51 18 ba f4\s+vfmsub231ps \{rn-sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 51 3f ba f4\s+vfmsub231ps \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 51 ff ba f4\s+vfmsub231ps \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 d1 18 97 f4\s+vfmsubadd132pd \{rn-sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 d1 3f 97 f4\s+vfmsubadd132pd \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 d1 ff 97 f4\s+vfmsubadd132pd \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f6 51 18 97 f4\s+vfmsubadd132ph \{rn-sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f6 51 3f 97 f4\s+vfmsubadd132ph \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f6 51 ff 97 f4\s+vfmsubadd132ph \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 51 18 97 f4\s+vfmsubadd132ps \{rn-sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 51 3f 97 f4\s+vfmsubadd132ps \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 51 ff 97 f4\s+vfmsubadd132ps \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 d1 18 a7 f4\s+vfmsubadd213pd \{rn-sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 d1 3f a7 f4\s+vfmsubadd213pd \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 d1 ff a7 f4\s+vfmsubadd213pd \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f6 51 18 a7 f4\s+vfmsubadd213ph \{rn-sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f6 51 3f a7 f4\s+vfmsubadd213ph \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f6 51 ff a7 f4\s+vfmsubadd213ph \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 51 18 a7 f4\s+vfmsubadd213ps \{rn-sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 51 3f a7 f4\s+vfmsubadd213ps \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 51 ff a7 f4\s+vfmsubadd213ps \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 d1 18 b7 f4\s+vfmsubadd231pd \{rn-sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 d1 3f b7 f4\s+vfmsubadd231pd \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 d1 ff b7 f4\s+vfmsubadd231pd \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f6 51 18 b7 f4\s+vfmsubadd231ph \{rn-sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f6 51 3f b7 f4\s+vfmsubadd231ph \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f6 51 ff b7 f4\s+vfmsubadd231ph \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 51 18 b7 f4\s+vfmsubadd231ps \{rn-sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 51 3f b7 f4\s+vfmsubadd231ps \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 51 ff b7 f4\s+vfmsubadd231ps \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 d1 18 9c f4\s+vfnmadd132pd \{rn-sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 d1 3f 9c f4\s+vfnmadd132pd \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 d1 ff 9c f4\s+vfnmadd132pd \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f6 51 18 9c f4\s+vfnmadd132ph \{rn-sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f6 51 3f 9c f4\s+vfnmadd132ph \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f6 51 ff 9c f4\s+vfnmadd132ph \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 51 18 9c f4\s+vfnmadd132ps \{rn-sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 51 3f 9c f4\s+vfnmadd132ps \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 51 ff 9c f4\s+vfnmadd132ps \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 d1 18 ac f4\s+vfnmadd213pd \{rn-sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 d1 3f ac f4\s+vfnmadd213pd \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 d1 ff ac f4\s+vfnmadd213pd \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f6 51 18 ac f4\s+vfnmadd213ph \{rn-sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f6 51 3f ac f4\s+vfnmadd213ph \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f6 51 ff ac f4\s+vfnmadd213ph \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 51 18 ac f4\s+vfnmadd213ps \{rn-sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 51 3f ac f4\s+vfnmadd213ps \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 51 ff ac f4\s+vfnmadd213ps \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 d1 18 bc f4\s+vfnmadd231pd \{rn-sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 d1 3f bc f4\s+vfnmadd231pd \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 d1 ff bc f4\s+vfnmadd231pd \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f6 51 18 bc f4\s+vfnmadd231ph \{rn-sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f6 51 3f bc f4\s+vfnmadd231ph \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f6 51 ff bc f4\s+vfnmadd231ph \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 51 18 bc f4\s+vfnmadd231ps \{rn-sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 51 3f bc f4\s+vfnmadd231ps \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 51 ff bc f4\s+vfnmadd231ps \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 d1 18 9e f4\s+vfnmsub132pd \{rn-sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 d1 3f 9e f4\s+vfnmsub132pd \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 d1 ff 9e f4\s+vfnmsub132pd \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f6 51 18 9e f4\s+vfnmsub132ph \{rn-sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f6 51 3f 9e f4\s+vfnmsub132ph \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f6 51 ff 9e f4\s+vfnmsub132ph \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 51 18 9e f4\s+vfnmsub132ps \{rn-sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 51 3f 9e f4\s+vfnmsub132ps \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 51 ff 9e f4\s+vfnmsub132ps \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 d1 18 ae f4\s+vfnmsub213pd \{rn-sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 d1 3f ae f4\s+vfnmsub213pd \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 d1 ff ae f4\s+vfnmsub213pd \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f6 51 18 ae f4\s+vfnmsub213ph \{rn-sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f6 51 3f ae f4\s+vfnmsub213ph \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f6 51 ff ae f4\s+vfnmsub213ph \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 51 18 ae f4\s+vfnmsub213ps \{rn-sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 51 3f ae f4\s+vfnmsub213ps \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 51 ff ae f4\s+vfnmsub213ps \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 d1 18 be f4\s+vfnmsub231pd \{rn-sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 d1 3f be f4\s+vfnmsub231pd \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 d1 ff be f4\s+vfnmsub231pd \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f6 51 18 be f4\s+vfnmsub231ph \{rn-sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f6 51 3f be f4\s+vfnmsub231ph \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f6 51 ff be f4\s+vfnmsub231ph \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 51 18 be f4\s+vfnmsub231ps \{rn-sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 51 3f be f4\s+vfnmsub231ps \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 51 ff be f4\s+vfnmsub231ps \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f3 d1 18 54 f4 7b\s+vfixupimmpd \$0x7b,\{sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f3 d1 1f 54 f4 7b\s+vfixupimmpd \$0x7b,\{sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f3 d1 9f 54 f4 7b\s+vfixupimmpd \$0x7b,\{sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f3 51 18 54 f4 7b\s+vfixupimmps \$0x7b,\{sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f3 51 1f 54 f4 7b\s+vfixupimmps \$0x7b,\{sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f3 51 9f 54 f4 7b\s+vfixupimmps \$0x7b,\{sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f3 d1 18 50 f4 7b\s+vrangepd \$0x7b,\{sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f3 d1 1f 50 f4 7b\s+vrangepd \$0x7b,\{sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f3 d1 9f 50 f4 7b\s+vrangepd \$0x7b,\{sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f3 51 18 50 f4 7b\s+vrangeps \$0x7b,\{sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f3 51 1f 50 f4 7b\s+vrangeps \$0x7b,\{sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f3 51 9f 50 f4 7b\s+vrangeps \$0x7b,\{sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f6 53 18 56 f4\s+vfcmaddcph \{rn-sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f6 53 3f 56 f4\s+vfcmaddcph \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f6 53 ff 56 f4\s+vfcmaddcph \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f6 53 18 d6 f4\s+vfcmulcph \{rn-sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f6 53 3f d6 f4\s+vfcmulcph \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f6 53 ff d6 f4\s+vfcmulcph \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f6 52 18 56 f4\s+vfmaddcph \{rn-sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f6 52 3f 56 f4\s+vfmaddcph \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f6 52 ff 56 f4\s+vfmaddcph \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f6 52 18 d6 f4\s+vfmulcph \{rn-sae\},%ymm4,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f6 52 3f d6 f4\s+vfmulcph \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f6 52 ff d6 f4\s+vfmulcph \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f5 78 18 5b f5\s+vcvtdq2ph \{rn-sae\},%ymm5,%xmm6
+\s*[a-f0-9]+:\s*62 f5 78 3f 5b f5\s+vcvtdq2ph \{rd-sae\},%ymm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f5 78 ff 5b f5\s+vcvtdq2ph \{rz-sae\},%ymm5,%xmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f1 78 18 5b f5\s+vcvtdq2ps \{rn-sae\},%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f1 78 3f 5b f5\s+vcvtdq2ps \{rd-sae\},%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f1 78 ff 5b f5\s+vcvtdq2ps \{rz-sae\},%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f5 7b 18 7a f5\s+vcvtudq2ph \{rn-sae\},%ymm5,%xmm6
+\s*[a-f0-9]+:\s*62 f5 7b 3f 7a f5\s+vcvtudq2ph \{rd-sae\},%ymm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f5 7b ff 7a f5\s+vcvtudq2ph \{rz-sae\},%ymm5,%xmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f1 7b 18 7a f5\s+vcvtudq2ps \{rn-sae\},%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f1 7b 3f 7a f5\s+vcvtudq2ps \{rd-sae\},%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f1 7b ff 7a f5\s+vcvtudq2ps \{rz-sae\},%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f1 fb 18 e6 f5\s+vcvtpd2dq \{rn-sae\},%ymm5,%xmm6
+\s*[a-f0-9]+:\s*62 f1 fb 3f e6 f5\s+vcvtpd2dq \{rd-sae\},%ymm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f1 fb ff e6 f5\s+vcvtpd2dq \{rz-sae\},%ymm5,%xmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f5 f9 18 5a f5\s+vcvtpd2ph \{rn-sae\},%ymm5,%xmm6
+\s*[a-f0-9]+:\s*62 f5 f9 3f 5a f5\s+vcvtpd2ph \{rd-sae\},%ymm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f5 f9 ff 5a f5\s+vcvtpd2ph \{rz-sae\},%ymm5,%xmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f1 f9 18 5a f5\s+vcvtpd2ps \{rn-sae\},%ymm5,%xmm6
+\s*[a-f0-9]+:\s*62 f1 f9 3f 5a f5\s+vcvtpd2ps \{rd-sae\},%ymm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f1 f9 ff 5a f5\s+vcvtpd2ps \{rz-sae\},%ymm5,%xmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f1 f8 18 79 f5\s+vcvtpd2udq \{rn-sae\},%ymm5,%xmm6
+\s*[a-f0-9]+:\s*62 f1 f8 3f 79 f5\s+vcvtpd2udq \{rd-sae\},%ymm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f1 f8 ff 79 f5\s+vcvtpd2udq \{rz-sae\},%ymm5,%xmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f1 f9 18 7b f5\s+vcvtpd2qq \{rn-sae\},%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f1 f9 3f 7b f5\s+vcvtpd2qq \{rd-sae\},%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f1 f9 ff 7b f5\s+vcvtpd2qq \{rz-sae\},%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f1 f9 18 79 f5\s+vcvtpd2uqq \{rn-sae\},%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f1 f9 3f 79 f5\s+vcvtpd2uqq \{rd-sae\},%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f1 f9 ff 79 f5\s+vcvtpd2uqq \{rz-sae\},%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f5 79 18 5b f5\s+vcvtph2dq \{rn-sae\},%xmm5,%ymm6
+\s*[a-f0-9]+:\s*62 f5 79 3f 5b f5\s+vcvtph2dq \{rd-sae\},%xmm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f5 79 ff 5b f5\s+vcvtph2dq \{rz-sae\},%xmm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f5 79 18 7b f5\s+vcvtph2qq \{rn-sae\},%xmm5,%ymm6
+\s*[a-f0-9]+:\s*62 f5 79 3f 7b f5\s+vcvtph2qq \{rd-sae\},%xmm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f5 79 ff 7b f5\s+vcvtph2qq \{rz-sae\},%xmm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f5 78 18 79 f5\s+vcvtph2udq \{rn-sae\},%xmm5,%ymm6
+\s*[a-f0-9]+:\s*62 f5 78 3f 79 f5\s+vcvtph2udq \{rd-sae\},%xmm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f5 78 ff 79 f5\s+vcvtph2udq \{rz-sae\},%xmm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f5 79 18 79 f5\s+vcvtph2uqq \{rn-sae\},%xmm5,%ymm6
+\s*[a-f0-9]+:\s*62 f5 79 3f 79 f5\s+vcvtph2uqq \{rd-sae\},%xmm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f5 79 ff 79 f5\s+vcvtph2uqq \{rz-sae\},%xmm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f5 78 18 5a f5\s+vcvtph2pd \{sae\},%xmm5,%ymm6
+\s*[a-f0-9]+:\s*62 f5 78 1f 5a f5\s+vcvtph2pd \{sae\},%xmm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f5 78 9f 5a f5\s+vcvtph2pd \{sae\},%xmm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f2 79 18 13 f5\s+vcvtph2ps \{sae\},%xmm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 79 1f 13 f5\s+vcvtph2ps \{sae\},%xmm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f2 79 9f 13 f5\s+vcvtph2ps \{sae\},%xmm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f6 79 18 13 f5\s+vcvtph2psx \{sae\},%xmm5,%ymm6
+\s*[a-f0-9]+:\s*62 f6 79 1f 13 f5\s+vcvtph2psx \{sae\},%xmm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f6 79 9f 13 f5\s+vcvtph2psx \{sae\},%xmm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f5 78 18 7d f5\s+vcvtph2uw \{rn-sae\},%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f5 78 3f 7d f5\s+vcvtph2uw \{rd-sae\},%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f5 78 ff 7d f5\s+vcvtph2uw \{rz-sae\},%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f5 79 18 7d f5\s+vcvtph2w \{rn-sae\},%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f5 79 3f 7d f5\s+vcvtph2w \{rd-sae\},%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f5 79 ff 7d f5\s+vcvtph2w \{rz-sae\},%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f1 79 18 5b f5\s+vcvtps2dq \{rn-sae\},%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f1 79 3f 5b f5\s+vcvtps2dq \{rd-sae\},%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f1 79 ff 5b f5\s+vcvtps2dq \{rz-sae\},%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f1 78 18 79 f5\s+vcvtps2udq \{rn-sae\},%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f1 78 3f 79 f5\s+vcvtps2udq \{rd-sae\},%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f1 78 ff 79 f5\s+vcvtps2udq \{rz-sae\},%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f1 78 18 5a f5\s+vcvtps2pd \{sae\},%xmm5,%ymm6
+\s*[a-f0-9]+:\s*62 f1 78 1f 5a f5\s+vcvtps2pd \{sae\},%xmm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f1 78 9f 5a f5\s+vcvtps2pd \{sae\},%xmm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f5 79 18 1d f5\s+vcvtps2phx \{rn-sae\},%ymm5,%xmm6
+\s*[a-f0-9]+:\s*62 f5 79 3f 1d f5\s+vcvtps2phx \{rd-sae\},%ymm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f5 79 ff 1d f5\s+vcvtps2phx \{rz-sae\},%ymm5,%xmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f1 79 18 7b f5\s+vcvtps2qq \{rn-sae\},%xmm5,%ymm6
+\s*[a-f0-9]+:\s*62 f1 79 3f 7b f5\s+vcvtps2qq \{rd-sae\},%xmm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f1 79 ff 7b f5\s+vcvtps2qq \{rz-sae\},%xmm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f1 79 18 79 f5\s+vcvtps2uqq \{rn-sae\},%xmm5,%ymm6
+\s*[a-f0-9]+:\s*62 f1 79 3f 79 f5\s+vcvtps2uqq \{rd-sae\},%xmm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f1 79 ff 79 f5\s+vcvtps2uqq \{rz-sae\},%xmm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f1 fa 18 e6 f5\s+vcvtqq2pd \{rn-sae\},%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f1 fa 3f e6 f5\s+vcvtqq2pd \{rd-sae\},%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f1 fa ff e6 f5\s+vcvtqq2pd \{rz-sae\},%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f5 f8 18 5b f5\s+vcvtqq2ph \{rn-sae\},%ymm5,%xmm6
+\s*[a-f0-9]+:\s*62 f5 f8 3f 5b f5\s+vcvtqq2ph \{rd-sae\},%ymm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f5 f8 ff 5b f5\s+vcvtqq2ph \{rz-sae\},%ymm5,%xmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f1 f8 18 5b f5\s+vcvtqq2ps \{rn-sae\},%ymm5,%xmm6
+\s*[a-f0-9]+:\s*62 f1 f8 3f 5b f5\s+vcvtqq2ps \{rd-sae\},%ymm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f1 f8 ff 5b f5\s+vcvtqq2ps \{rz-sae\},%ymm5,%xmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f1 fa 18 7a f5\s+vcvtuqq2pd \{rn-sae\},%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f1 fa 3f 7a f5\s+vcvtuqq2pd \{rd-sae\},%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f1 fa ff 7a f5\s+vcvtuqq2pd \{rz-sae\},%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f5 fb 18 7a f5\s+vcvtuqq2ph \{rn-sae\},%ymm5,%xmm6
+\s*[a-f0-9]+:\s*62 f5 fb 3f 7a f5\s+vcvtuqq2ph \{rd-sae\},%ymm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f5 fb ff 7a f5\s+vcvtuqq2ph \{rz-sae\},%ymm5,%xmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f1 fb 18 7a f5\s+vcvtuqq2ps \{rn-sae\},%ymm5,%xmm6
+\s*[a-f0-9]+:\s*62 f1 fb 3f 7a f5\s+vcvtuqq2ps \{rd-sae\},%ymm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f1 fb ff 7a f5\s+vcvtuqq2ps \{rz-sae\},%ymm5,%xmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f1 f9 18 e6 f5\s+vcvttpd2dq \{sae\},%ymm5,%xmm6
+\s*[a-f0-9]+:\s*62 f1 f9 1f e6 f5\s+vcvttpd2dq \{sae\},%ymm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f1 f9 9f e6 f5\s+vcvttpd2dq \{sae\},%ymm5,%xmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f1 f8 18 78 f5\s+vcvttpd2udq \{sae\},%ymm5,%xmm6
+\s*[a-f0-9]+:\s*62 f1 f8 1f 78 f5\s+vcvttpd2udq \{sae\},%ymm5,%xmm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f1 f8 9f 78 f5\s+vcvttpd2udq \{sae\},%ymm5,%xmm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f1 f9 18 7a f5\s+vcvttpd2qq \{sae\},%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f1 f9 1f 7a f5\s+vcvttpd2qq \{sae\},%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f1 f9 9f 7a f5\s+vcvttpd2qq \{sae\},%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f1 f9 18 78 f5\s+vcvttpd2uqq \{sae\},%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f1 f9 1f 78 f5\s+vcvttpd2uqq \{sae\},%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f1 f9 9f 78 f5\s+vcvttpd2uqq \{sae\},%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f5 7a 18 5b f5\s+vcvttph2dq \{sae\},%xmm5,%ymm6
+\s*[a-f0-9]+:\s*62 f5 7a 1f 5b f5\s+vcvttph2dq \{sae\},%xmm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f5 7a 9f 5b f5\s+vcvttph2dq \{sae\},%xmm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f5 79 18 7a f5\s+vcvttph2qq \{sae\},%xmm5,%ymm6
+\s*[a-f0-9]+:\s*62 f5 79 1f 7a f5\s+vcvttph2qq \{sae\},%xmm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f5 79 9f 7a f5\s+vcvttph2qq \{sae\},%xmm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f5 78 18 78 f5\s+vcvttph2udq \{sae\},%xmm5,%ymm6
+\s*[a-f0-9]+:\s*62 f5 78 1f 78 f5\s+vcvttph2udq \{sae\},%xmm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f5 78 9f 78 f5\s+vcvttph2udq \{sae\},%xmm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f5 79 18 78 f5\s+vcvttph2uqq \{sae\},%xmm5,%ymm6
+\s*[a-f0-9]+:\s*62 f5 79 1f 78 f5\s+vcvttph2uqq \{sae\},%xmm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f5 79 9f 78 f5\s+vcvttph2uqq \{sae\},%xmm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f5 78 18 7c f5\s+vcvttph2uw \{sae\},%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f5 78 1f 7c f5\s+vcvttph2uw \{sae\},%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f5 78 9f 7c f5\s+vcvttph2uw \{sae\},%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f5 79 18 7c f5\s+vcvttph2w \{sae\},%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f5 79 1f 7c f5\s+vcvttph2w \{sae\},%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f5 79 9f 7c f5\s+vcvttph2w \{sae\},%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f1 7a 18 5b f5\s+vcvttps2dq \{sae\},%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f1 7a 1f 5b f5\s+vcvttps2dq \{sae\},%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f1 7a 9f 5b f5\s+vcvttps2dq \{sae\},%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f1 78 18 78 f5\s+vcvttps2udq \{sae\},%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f1 78 1f 78 f5\s+vcvttps2udq \{sae\},%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f1 78 9f 78 f5\s+vcvttps2udq \{sae\},%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f1 79 18 7a f5\s+vcvttps2qq \{sae\},%xmm5,%ymm6
+\s*[a-f0-9]+:\s*62 f1 79 1f 7a f5\s+vcvttps2qq \{sae\},%xmm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f1 79 9f 7a f5\s+vcvttps2qq \{sae\},%xmm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f1 79 18 78 f5\s+vcvttps2uqq \{sae\},%xmm5,%ymm6
+\s*[a-f0-9]+:\s*62 f1 79 1f 78 f5\s+vcvttps2uqq \{sae\},%xmm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f1 79 9f 78 f5\s+vcvttps2uqq \{sae\},%xmm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f5 7b 18 7d f5\s+vcvtuw2ph \{rn-sae\},%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f5 7b 3f 7d f5\s+vcvtuw2ph \{rd-sae\},%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f5 7b ff 7d f5\s+vcvtuw2ph \{rz-sae\},%ymm5,%ymm6\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 f5 7a 18 7d f5\s+vcvtw2ph \{rn-sae\},%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f5 7a 3f 7d f5\s+vcvtw2ph \{rd-sae\},%ymm5,%ymm6\{%k7\}
+\s*[a-f0-9]+:\s*62 f5 7a ff 7d f5\s+vcvtw2ph \{rz-sae\},%ymm5,%ymm6\{%k7\}\{z\}
+#pass
diff --git a/gas/testsuite/gas/i386/avx10_2-rounding.s b/gas/testsuite/gas/i386/avx10_2-rounding.s
new file mode 100644
index 0000000..048e715
--- /dev/null
+++ b/gas/testsuite/gas/i386/avx10_2-rounding.s
@@ -0,0 +1,351 @@
+# Check 32bit AVX10.2 instructions
+
+	.text
+_start:
+	.irp m, pd, ph, ps
+	vcmp\m	$123, {sae}, %ymm4, %ymm5, %k5
+	vcmp\m	$123, {sae}, %ymm4, %ymm5, %k5{%k7}
+	vgetexp\m	{sae}, %ymm5, %ymm6
+	vgetexp\m	{sae}, %ymm5, %ymm6{%k7}
+	vgetexp\m	{sae}, %ymm5, %ymm6{%k7}{z}
+	vsqrt\m	{rn-sae}, %ymm5, %ymm6
+	vsqrt\m	{rd-sae}, %ymm5, %ymm6{%k7}
+	vsqrt\m	{rz-sae}, %ymm5, %ymm6{%k7}{z}
+	.endr
+
+	.irp a, add, div, mul, scalef, sub
+	.irp m, pd, ph, ps
+	v\a\m	{rn-sae}, %ymm4, %ymm5, %ymm6
+	v\a\m	{rd-sae}, %ymm4, %ymm5, %ymm6{%k7}
+	v\a\m	{rz-sae}, %ymm4, %ymm5, %ymm6{%k7}{z}
+	.endr
+	.endr
+
+	.irp a, max, min
+	.irp m, pd, ph, ps
+	v\a\m	{sae}, %ymm4, %ymm5, %ymm6
+	v\a\m	{sae}, %ymm4, %ymm5, %ymm6{%k7}
+	v\a\m	{sae}, %ymm4, %ymm5, %ymm6{%k7}{z}
+	.endr
+	.endr
+
+	.irp a, getmant, reduce, rndscale
+	.irp m, pd, ph, ps
+	v\a\m	$123, {sae}, %ymm5, %ymm6
+	v\a\m	$123, {sae}, %ymm5, %ymm6{%k7}
+	v\a\m	$123, {sae}, %ymm5, %ymm6{%k7}{z}
+	.endr
+	.endr
+
+	.irp a, madd, maddsub, msub, msubadd, nmadd, nmsub
+	.irp n, 132, 213, 231
+	.irp m, pd, ph, ps
+	vf\a\n\m	{rn-sae}, %ymm4, %ymm5, %ymm6
+	vf\a\n\m	{rd-sae}, %ymm4, %ymm5, %ymm6{%k7}
+	vf\a\n\m	{rz-sae}, %ymm4, %ymm5, %ymm6{%k7}{z}
+	.endr
+	.endr
+	.endr
+
+	.irp a, fixupimm, range
+	.irp m, pd, ps
+	v\a\m	$123, {sae}, %ymm4, %ymm5, %ymm6
+	v\a\m	$123, {sae}, %ymm4, %ymm5, %ymm6{%k7}
+	v\a\m	$123, {sae}, %ymm4, %ymm5, %ymm6{%k7}{z}
+	.endr
+	.endr
+
+	.irp a, cmadd, cmul, madd, mul
+	vf\a\()cph	{rn-sae}, %ymm4, %ymm5, %ymm6
+	vf\a\()cph	{rd-sae}, %ymm4, %ymm5, %ymm6{%k7}
+	vf\a\()cph	{rz-sae}, %ymm4, %ymm5, %ymm6{%k7}{z}
+	.endr
+
+	.irp n, dq, udq
+	vcvt\n\()2ph	{rn-sae}, %ymm5, %xmm6
+	vcvt\n\()2ph	{rd-sae}, %ymm5, %xmm6{%k7}
+	vcvt\n\()2ph	{rz-sae}, %ymm5, %xmm6{%k7}{z}
+
+	vcvt\n\()2ps	{rn-sae}, %ymm5, %ymm6
+	vcvt\n\()2ps	{rd-sae}, %ymm5, %ymm6{%k7}
+	vcvt\n\()2ps	{rz-sae}, %ymm5, %ymm6{%k7}{z}
+	.endr
+
+	.irp m, dq, ph, ps, udq
+	vcvtpd2\m	{rn-sae}, %ymm5, %xmm6
+	vcvtpd2\m	{rd-sae}, %ymm5, %xmm6{%k7}
+	vcvtpd2\m	{rz-sae}, %ymm5, %xmm6{%k7}{z}
+	.endr
+
+	.irp m, qq, uqq
+	vcvtpd2\m	{rn-sae}, %ymm5, %ymm6
+	vcvtpd2\m	{rd-sae}, %ymm5, %ymm6{%k7}
+	vcvtpd2\m	{rz-sae}, %ymm5, %ymm6{%k7}{z}
+	.endr
+
+	.irp m, dq, qq, udq, uqq
+	vcvtph2\m	{rn-sae}, %xmm5, %ymm6
+	vcvtph2\m	{rd-sae}, %xmm5, %ymm6{%k7}
+	vcvtph2\m	{rz-sae}, %xmm5, %ymm6{%k7}{z}
+	.endr
+
+	.irp m, pd, ps, psx
+	vcvtph2\m	{sae}, %xmm5, %ymm6
+	vcvtph2\m	{sae}, %xmm5, %ymm6{%k7}
+	vcvtph2\m	{sae}, %xmm5, %ymm6{%k7}{z}
+	.endr
+
+	.irp m, uw, w
+	vcvtph2\m	{rn-sae}, %ymm5, %ymm6
+	vcvtph2\m	{rd-sae}, %ymm5, %ymm6{%k7}
+	vcvtph2\m	{rz-sae}, %ymm5, %ymm6{%k7}{z}
+	.endr
+
+	.irp m, dq, udq
+	vcvtps2\m	{rn-sae}, %ymm5, %ymm6
+	vcvtps2\m	{rd-sae}, %ymm5, %ymm6{%k7}
+	vcvtps2\m	{rz-sae}, %ymm5, %ymm6{%k7}{z}
+	.endr
+
+	vcvtps2pd	{sae}, %xmm5, %ymm6
+	vcvtps2pd	{sae}, %xmm5, %ymm6{%k7}
+	vcvtps2pd	{sae}, %xmm5, %ymm6{%k7}{z}
+
+	vcvtps2phx	{rn-sae}, %ymm5, %xmm6
+	vcvtps2phx	{rd-sae}, %ymm5, %xmm6{%k7}
+	vcvtps2phx	{rz-sae}, %ymm5, %xmm6{%k7}{z}
+
+	.irp m, qq, uqq
+	vcvtps2\m	{rn-sae}, %xmm5, %ymm6
+	vcvtps2\m	{rd-sae}, %xmm5, %ymm6{%k7}
+	vcvtps2\m	{rz-sae}, %xmm5, %ymm6{%k7}{z}
+	.endr
+
+	.irp n, qq, uqq
+	vcvt\n\()2pd	{rn-sae}, %ymm5, %ymm6
+	vcvt\n\()2pd	{rd-sae}, %ymm5, %ymm6{%k7}
+	vcvt\n\()2pd	{rz-sae}, %ymm5, %ymm6{%k7}{z}
+
+	.irp m, ph, ps
+	vcvt\n\()2\m	{rn-sae}, %ymm5, %xmm6
+	vcvt\n\()2\m	{rd-sae}, %ymm5, %xmm6{%k7}
+	vcvt\n\()2\m	{rz-sae}, %ymm5, %xmm6{%k7}{z}
+	.endr
+	.endr
+
+	.irp m, dq, udq
+	vcvttpd2\m	{sae}, %ymm5, %xmm6
+	vcvttpd2\m	{sae}, %ymm5, %xmm6{%k7}
+	vcvttpd2\m	{sae}, %ymm5, %xmm6{%k7}{z}
+	.endr
+
+	.irp m, qq, uqq
+	vcvttpd2\m	{sae}, %ymm5, %ymm6
+	vcvttpd2\m	{sae}, %ymm5, %ymm6{%k7}
+	vcvttpd2\m	{sae}, %ymm5, %ymm6{%k7}{z}
+	.endr
+
+	.irp m, dq, qq, udq, uqq
+	vcvttph2\m	{sae}, %xmm5, %ymm6
+	vcvttph2\m	{sae}, %xmm5, %ymm6{%k7}
+	vcvttph2\m	{sae}, %xmm5, %ymm6{%k7}{z}
+	.endr
+
+	.irp m, uw, w
+	vcvttph2\m	{sae}, %ymm5, %ymm6
+	vcvttph2\m	{sae}, %ymm5, %ymm6{%k7}
+	vcvttph2\m	{sae}, %ymm5, %ymm6{%k7}{z}
+	.endr
+
+	.irp m, dq, udq
+	vcvttps2\m	{sae}, %ymm5, %ymm6
+	vcvttps2\m	{sae}, %ymm5, %ymm6{%k7}
+	vcvttps2\m	{sae}, %ymm5, %ymm6{%k7}{z}
+	.endr
+
+	.irp m, qq, uqq
+	vcvttps2\m	{sae}, %xmm5, %ymm6
+	vcvttps2\m	{sae}, %xmm5, %ymm6{%k7}
+	vcvttps2\m	{sae}, %xmm5, %ymm6{%k7}{z}
+	.endr
+
+	.irp n, uw, w
+	vcvt\n\()2ph	{rn-sae}, %ymm5, %ymm6
+	vcvt\n\()2ph	{rd-sae}, %ymm5, %ymm6{%k7}
+	vcvt\n\()2ph	{rz-sae}, %ymm5, %ymm6{%k7}{z}
+	.endr
+
+_intel:
+	.intel_syntax noprefix
+	.irp m, pd, ph, ps
+	vcmp\m	k5, ymm5, ymm4{sae}, 123
+	vcmp\m	k5{k7}, ymm5, ymm4{sae}, 123
+	vgetexp\m	ymm6, ymm5{sae}
+	vgetexp\m	ymm6{k7}, ymm5{sae}
+	vgetexp\m	ymm6{k7}{z}, ymm5{sae}
+	vsqrt\m	ymm6, ymm5{rn-sae}
+	vsqrt\m	ymm6{k7}, ymm5{rd-sae}
+	vsqrt\m	ymm6{k7}{z}, ymm5{rz-sae}
+	.endr
+
+	.irp a, add, div, mul, scalef, sub
+	.irp m, pd, ph, ps
+	v\a\m	ymm6, ymm5, ymm4{rn-sae}
+	v\a\m	ymm6{k7}, ymm5, ymm4{rd-sae}
+	v\a\m	ymm6{k7}{z}, ymm5, ymm4{rz-sae}
+	.endr
+	.endr
+
+	.irp a, max, min
+	.irp m, pd, ph, ps
+	v\a\m	ymm6, ymm5, ymm4{sae}
+	v\a\m	ymm6{k7}, ymm5, ymm4{sae}
+	v\a\m	ymm6{k7}{z}, ymm5, ymm4{sae}
+	.endr
+	.endr
+
+	.irp a, getmant, reduce, rndscale
+	.irp m, pd, ph, ps
+	v\a\m	ymm6, ymm5{sae}, 123
+	v\a\m	ymm6{k7}, ymm5{sae}, 123
+	v\a\m	ymm6{k7}{z}, ymm5{sae}, 123
+	.endr
+	.endr
+
+	.irp a, madd, maddsub, msub, msubadd, nmadd, nmsub
+	.irp n, 132, 213, 231
+	.irp m, pd, ph, ps
+	vf\a\n\m	ymm6, ymm5, ymm4{rn-sae}
+	vf\a\n\m	ymm6{k7}, ymm5, ymm4{rd-sae}
+	vf\a\n\m	ymm6{k7}{z}, ymm5, ymm4{rz-sae}
+	.endr
+	.endr
+	.endr
+
+	.irp a, fixupimm, range
+	.irp m, pd, ps
+	v\a\m	ymm6, ymm5, ymm4{sae}, 123
+	v\a\m	ymm6{k7}, ymm5, ymm4{sae}, 123
+	v\a\m	ymm6{k7}{z}, ymm5, ymm4{sae}, 123
+	.endr
+	.endr
+
+	.irp a, cmadd, cmul, madd, mul
+	vf\a\()cph	ymm6, ymm5, ymm4{rn-sae}
+	vf\a\()cph	ymm6{k7}, ymm5, ymm4{rd-sae}
+	vf\a\()cph	ymm6{k7}{z}, ymm5, ymm4{rz-sae}
+	.endr
+
+	.irp n, dq, udq
+	vcvt\n\()2ph	xmm6, ymm5{rn-sae}
+	vcvt\n\()2ph	xmm6{k7}, ymm5{rd-sae}
+	vcvt\n\()2ph	xmm6{k7}{z}, ymm5{rz-sae}
+
+	vcvt\n\()2ps	ymm6, ymm5{rn-sae}
+	vcvt\n\()2ps	ymm6{k7}, ymm5{rd-sae}
+	vcvt\n\()2ps	ymm6{k7}{z}, ymm5{rz-sae}
+	.endr
+
+	.irp m, dq, ph, ps, udq
+	vcvtpd2\m	xmm6, ymm5{rn-sae}
+	vcvtpd2\m	xmm6{k7}, ymm5{rd-sae}
+	vcvtpd2\m	xmm6{k7}{z}, ymm5{rz-sae}
+	.endr
+
+	.irp m, qq, uqq
+	vcvtpd2\m	ymm6, ymm5{rn-sae}
+	vcvtpd2\m	ymm6{k7}, ymm5{rd-sae}
+	vcvtpd2\m	ymm6{k7}{z}, ymm5{rz-sae}
+	.endr
+
+	.irp m, dq, qq, udq, uqq
+	vcvtph2\m	ymm6, xmm5{rn-sae}
+	vcvtph2\m	ymm6{k7}, xmm5{rd-sae}
+	vcvtph2\m	ymm6{k7}{z}, xmm5{rz-sae}
+	.endr
+
+	.irp m, pd, ps, psx
+	vcvtph2\m	ymm6, xmm5{sae}
+	vcvtph2\m	ymm6{k7}, xmm5{sae}
+	vcvtph2\m	ymm6{k7}{z}, xmm5{sae}
+	.endr
+
+	.irp m, uw, w
+	vcvtph2\m	ymm6, ymm5{rn-sae}
+	vcvtph2\m	ymm6{k7}, ymm5{rd-sae}
+	vcvtph2\m	ymm6{k7}{z}, ymm5{rz-sae}
+	.endr
+
+	.irp m, dq, udq
+	vcvtps2\m	ymm6, ymm5{rn-sae}
+	vcvtps2\m	ymm6{k7}, ymm5{rd-sae}
+	vcvtps2\m	ymm6{k7}{z}, ymm5{rz-sae}
+	.endr
+
+	vcvtps2pd	ymm6, xmm5{sae}
+	vcvtps2pd	ymm6{k7}, xmm5{sae}
+	vcvtps2pd	ymm6{k7}{z}, xmm5{sae}
+
+	vcvtps2phx	xmm6, ymm5{rn-sae}
+	vcvtps2phx	xmm6{k7}, ymm5{rd-sae}
+	vcvtps2phx	xmm6{k7}{z}, ymm5{rz-sae}
+
+	.irp m, qq, uqq
+	vcvtps2\m	ymm6, xmm5{rn-sae}
+	vcvtps2\m	ymm6{k7}, xmm5{rd-sae}
+	vcvtps2\m	ymm6{k7}{z}, xmm5{rz-sae}
+	.endr
+
+	.irp n, qq, uqq
+	vcvt\n\()2pd	ymm6, ymm5{rn-sae}
+	vcvt\n\()2pd	ymm6{k7}, ymm5{rd-sae}
+	vcvt\n\()2pd	ymm6{k7}{z}, ymm5{rz-sae}
+
+	.irp m, ph, ps
+	vcvt\n\()2\m	xmm6, ymm5{rn-sae}
+	vcvt\n\()2\m	xmm6{k7}, ymm5{rd-sae}
+	vcvt\n\()2\m	xmm6{k7}{z}, ymm5{rz-sae}
+	.endr
+	.endr
+
+	.irp m, dq, udq
+	vcvttpd2\m	xmm6, ymm5{sae}
+	vcvttpd2\m	xmm6{k7}, ymm5{sae}
+	vcvttpd2\m	xmm6{k7}{z}, ymm5{sae}
+	.endr
+
+	.irp m, qq, uqq
+	vcvttpd2\m	ymm6, ymm5{sae}
+	vcvttpd2\m	ymm6{k7}, ymm5{sae}
+	vcvttpd2\m	ymm6{k7}{z}, ymm5{sae}
+	.endr
+
+	.irp m, dq, qq, udq, uqq
+	vcvttph2\m	ymm6, xmm5{sae}
+	vcvttph2\m	ymm6{k7}, xmm5{sae}
+	vcvttph2\m	ymm6{k7}{z}, xmm5{sae}
+	.endr
+
+	.irp m, uw, w
+	vcvttph2\m	ymm6, ymm5{sae}
+	vcvttph2\m	ymm6{k7}, ymm5{sae}
+	vcvttph2\m	ymm6{k7}{z}, ymm5{sae}
+	.endr
+
+	.irp m, dq, udq
+	vcvttps2\m	ymm6, ymm5{sae}
+	vcvttps2\m	ymm6{k7}, ymm5{sae}
+	vcvttps2\m	ymm6{k7}{z}, ymm5{sae}
+	.endr
+
+	.irp m, qq, uqq
+	vcvttps2\m	ymm6, xmm5{sae}
+	vcvttps2\m	ymm6{k7}, xmm5{sae}
+	vcvttps2\m	ymm6{k7}{z}, xmm5{sae}
+	.endr
+
+	.irp n, uw, w
+	vcvt\n\()2ph	ymm6, ymm5{rn-sae}
+	vcvt\n\()2ph	ymm6{k7}, ymm5{rd-sae}
+	vcvt\n\()2ph	ymm6{k7}{z}, ymm5{rz-sae}
+	.endr
diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp
index 3e707b3..699e200 100644
--- a/gas/testsuite/gas/i386/i386.exp
+++ b/gas/testsuite/gas/i386/i386.exp
@@ -519,6 +519,14 @@ if [gas_32_check] then {
     run_list_test "pbndkb-inval"
     run_list_test "user_msr-inval"
     run_list_test "apx-push2pop2-inval"
+    run_dump_test "avx10_2-rounding"
+    run_dump_test "avx10_2-rounding-intel"
+    run_list_test "avx10_2-rounding-inval"
+    run_dump_test "avx10_2-evex-promote"
+    run_dump_test "avx10_2-512-1"
+    run_dump_test "avx10_2-512-1-intel"
+    run_dump_test "avx10_2-256-1"
+    run_dump_test "avx10_2-256-1-intel"
     run_list_test "sg"
     run_dump_test "clzero"
     run_dump_test "invlpgb"
@@ -696,10 +704,11 @@ if [gas_32_check] then {
 	run_dump_test "tlsd"
 	run_dump_test "tlspic"
 	run_dump_test "tlsnopic"
+	run_dump_test "tls"
 	run_list_test "inval-tls"
 	run_dump_test "bss"
 	run_dump_test "reloc32"
-	run_list_test "reloc32" "--defsym _bad_=1"
+	run_list_test "reloc32" "--defsym _bad_=1 -mtls-check=no"
 	run_dump_test "intel-got32"
 	run_dump_test "intel-movs32"
 	run_dump_test "intel-movs16"
diff --git a/gas/testsuite/gas/i386/ilp32/ilp32.exp b/gas/testsuite/gas/i386/ilp32/ilp32.exp
index a301738..18befcc 100644
--- a/gas/testsuite/gas/i386/ilp32/ilp32.exp
+++ b/gas/testsuite/gas/i386/ilp32/ilp32.exp
@@ -37,8 +37,9 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_x32_check] &
 	}
     }
 
-    run_list_test "reloc64" "--defsym _bad_=1"
+    run_list_test "reloc64" "--defsym _bad_=1 -mtls-check=no"
     run_list_test "reloc-2"
+    run_list_test "x32-inval-tls" "-I${srcdir}/$subdir"
 
     set ASFLAGS "$old_ASFLAGS"
 }
diff --git a/gas/testsuite/gas/i386/ilp32/reloc64.d b/gas/testsuite/gas/i386/ilp32/reloc64.d
index e2c461f..84b6aac 100644
--- a/gas/testsuite/gas/i386/ilp32/reloc64.d
+++ b/gas/testsuite/gas/i386/ilp32/reloc64.d
@@ -1,4 +1,4 @@
-#as: -mx86-used-note=no --generate-missing-build-notes=no
+#as: -mx86-used-note=no --generate-missing-build-notes=no -mtls-check=no
 #objdump: -Drw
 #name: x86-64 (ILP32) relocs
 
diff --git a/gas/testsuite/gas/i386/ilp32/x32-inval-tls.l b/gas/testsuite/gas/i386/ilp32/x32-inval-tls.l
new file mode 100644
index 0000000..f3807c8
--- /dev/null
+++ b/gas/testsuite/gas/i386/ilp32/x32-inval-tls.l
@@ -0,0 +1,38 @@
+.*: Assembler messages:
+.*:3: Error: @GOTTPOFF operator cannot be used with `kmovq'
+.*:4: Error: @TLSLD operator cannot be used with `kmovq'
+.*:7: Error: @TLSGD operator cannot be used with `add'
+.*:8: Error: @TLSGD operator requires `%rdi' as dest register
+.*:9: Error: @TLSGD operator requires `%rip' as base register
+.*:10: Error: @TLSGD operator requires base register
+.*:11: Error: @TLSGD operator requires `%rip' as base register
+.*:12: Error: @TLSGD operator requires `%rdi' as dest register
+.*:15: Error: @TLSLD operator cannot be used with `add'
+.*:16: Error: @TLSLD operator requires `%rdi' as dest register
+.*:17: Error: @TLSLD operator requires `%rip' as base register
+.*:18: Error: @TLSLD operator requires base register
+.*:19: Error: @TLSLD operator requires `%rip' as base register
+.*:20: Error: @TLSLD operator requires `%rdi' as dest register
+.*:23: Error: @TLSDESC operator cannot be used with `add'
+.*:24: Error: @TLSDESC operator requires `%rip' as base register
+.*:25: Error: @TLSDESC operator requires `%rip' as base register
+.*:27: Error: @TLSDESC operator requires 32-bit or 64-bit dest register
+.*:30: Error: @GOTTPOFF operator cannot be used with `sub'
+.*:31: Error: @GOTTPOFF operator cannot be used with `xor'
+.*:32: Error: @GOTTPOFF operator requires `%rip' as base register
+.*:33: Error: @GOTTPOFF operator requires `%rip' as base register
+.*:34: Error: @GOTTPOFF operator requires 32-bit or 64-bit dest register
+.*:35: Error: @GOTTPOFF operator can be used with `add', but format is wrong
+.*:36: Error: @GOTTPOFF operator can be used with `add', but format is wrong
+.*:37: Error: @GOTTPOFF operator can be used with `add', but format is wrong
+.*:38: Error: @GOTTPOFF operator can be used with `add', but format is wrong
+.*:39: Error: @GOTTPOFF operator requires `%rip' as base register
+.*:40: Error: @GOTTPOFF operator can be used with `mov', but format is wrong
+.*:41: Error: @GOTTPOFF operator can be used with `mov', but format is wrong
+.*:42: Error: @GOTTPOFF operator can be used with `mov', but format is wrong
+.*:43: Error: @GOTTPOFF operator can be used with `mov', but format is wrong
+.*:44: Error: @GOTTPOFF operator can be used with `mov', but format is wrong
+.*:48: Error: @TLSCALL operator cannot be used with `lea'
+.*:49: Error: @TLSCALL operator requires `%eax/%rax' as base register
+.*:49: Error: 0-byte relocation cannot be applied to 4-byte field
+.*:50: Error: `\*foo@tlscall\(%ax\)' is not a valid base/index expression
diff --git a/gas/testsuite/gas/i386/ilp32/x32-inval-tls.s b/gas/testsuite/gas/i386/ilp32/x32-inval-tls.s
new file mode 100644
index 0000000..b1d967f
--- /dev/null
+++ b/gas/testsuite/gas/i386/ilp32/x32-inval-tls.s
@@ -0,0 +1 @@
+.include "../x86-64-inval-tls.s"
diff --git a/gas/testsuite/gas/i386/ilp32/x32-tls.d b/gas/testsuite/gas/i386/ilp32/x32-tls.d
index ab4da5c..ac7d136 100644
--- a/gas/testsuite/gas/i386/ilp32/x32-tls.d
+++ b/gas/testsuite/gas/i386/ilp32/x32-tls.d
@@ -1,3 +1,4 @@
+#as: -mtls-check=no
 #objdump: -dw
 #name: x86-64 (ILP32) TLS
 
diff --git a/gas/testsuite/gas/i386/ilp32/x86-64-tls.d b/gas/testsuite/gas/i386/ilp32/x86-64-tls.d
new file mode 100644
index 0000000..a2261f5
--- /dev/null
+++ b/gas/testsuite/gas/i386/ilp32/x86-64-tls.d
@@ -0,0 +1,4 @@
+#source: ../x86-64-tls.s
+#objdump: -drw
+#name: x86-64 (ILP32) TLS
+#dump: ../x86-64-tls.d
diff --git a/gas/testsuite/gas/i386/inval-tls.l b/gas/testsuite/gas/i386/inval-tls.l
index 59e7c30..e20ba7a 100644
--- a/gas/testsuite/gas/i386/inval-tls.l
+++ b/gas/testsuite/gas/i386/inval-tls.l
@@ -1,3 +1,70 @@
-.*: Assembler messages:
-.*:3: Error: .* `kmovd'
-.*:4: Error: .* `kmovd'
+.*ssembler messages:
+.* Error: @GOTNTPOFF operator cannot be used with `kmovd'
+.* Error: @TLSGD operator cannot be used with `add'
+.* Error: @TLSGD operator requires `%ebx' as index register
+.* Error: @TLSGD operator requires scale factor of 1
+.* Error: @TLSGD operator requires no base register
+.*: Error: @TLSGD operator requires `%eax' as dest register
+.*: Error: @TLSGD operator requires `%eax' as dest register
+.*: Error: @TLSGD operator requires `%eax' as base register
+.*: Error: @TLSGD operator requires 32-bit dest register
+.*: Error: @TLSLDM operator cannot be used with `add'
+.*: Error: @TLSLDM operator requires `%eax' as dest register
+.*: Error: @TLSLDM operator requires `%eax' as base register
+.*: Error: @TLSLDM operator requires no SIB
+.*: Error: @TLSLDM operator requires 32-bit dest register
+.*: Error: @TLSDESC operator cannot be used with `add'
+.*: Error: @TLSDESC operator requires `%ebx' as base register
+.*: Error: @TLSDESC operator requires no SIB
+.*: Error: @TLSDESC operator requires 32-bit dest register
+.*: Error: @INDNTPOFF operator cannot be used with `sub'
+.*: Error: @INDNTPOFF operator requires no base/index register
+.*: Error: @INDNTPOFF operator requires no base/index register
+.*: Error: @INDNTPOFF operator requires 32-bit dest register
+.*: Error: @INDNTPOFF operator can be used with `add', but format is wrong
+.*: Error: @INDNTPOFF operator can be used with `add', but format is wrong
+.*: Error: @INDNTPOFF operator can be used with `add', but format is wrong
+.*: Error: @INDNTPOFF operator can be used with `add', but format is wrong
+.*: Error: @INDNTPOFF operator can be used with `mov', but format is wrong
+.*: Error: @INDNTPOFF operator can be used with `mov', but format is wrong
+.*: Error: @INDNTPOFF operator can be used with `mov', but format is wrong
+.*: Error: @INDNTPOFF operator can be used with `mov', but format is wrong
+.*: Error: @INDNTPOFF operator can be used with `mov', but format is wrong
+.*: Error: @GOTNTPOFF operator cannot be used with `lea'
+.*: Error: @GOTNTPOFF operator requires base register
+.*: Error: @GOTNTPOFF operator cannot be used with `lea'
+.*: Error: @GOTNTPOFF operator can be used with `sub', but format is wrong
+.*: Error: @GOTNTPOFF operator can be used with `sub', but format is wrong
+.*: Error: @GOTNTPOFF operator can be used with `sub', but format is wrong
+.*: Error: @GOTNTPOFF operator can be used with `sub', but format is wrong
+.*: Error: @GOTNTPOFF operator can be used with `add', but format is wrong
+.*: Error: @GOTNTPOFF operator can be used with `add', but format is wrong
+.*: Error: @GOTNTPOFF operator can be used with `add', but format is wrong
+.*: Error: @GOTNTPOFF operator can be used with `add', but format is wrong
+.*: Error: @GOTNTPOFF operator requires base register
+.*: Error: @GOTNTPOFF operator can be used with `mov', but format is wrong
+.*: Error: @GOTNTPOFF operator can be used with `mov', but format is wrong
+.*: Error: @GOTNTPOFF operator can be used with `mov', but format is wrong
+.*: Error: @GOTNTPOFF operator can be used with `mov', but format is wrong
+.*: Error: @GOTNTPOFF operator can be used with `mov', but format is wrong
+.*: Error: @GOTTPOFF operator cannot be used with `lea'
+.*: Error: @GOTTPOFF operator requires base register
+.*: Error: @GOTTPOFF operator requires 32-bit dest register
+.*: Error: @GOTTPOFF operator can be used with `sub', but format is wrong
+.*: Error: @GOTTPOFF operator can be used with `sub', but format is wrong
+.*: Error: @GOTTPOFF operator can be used with `sub', but format is wrong
+.*: Error: @GOTTPOFF operator can be used with `sub', but format is wrong
+.*: Error: @GOTTPOFF operator can be used with `add', but format is wrong
+.*: Error: @GOTTPOFF operator can be used with `add', but format is wrong
+.*: Error: @GOTTPOFF operator can be used with `add', but format is wrong
+.*: Error: @GOTTPOFF operator requires base register
+.*: Error: @GOTTPOFF operator can be used with `mov', but format is wrong
+.*: Error: @GOTTPOFF operator can be used with `mov', but format is wrong
+.*: Error: @GOTTPOFF operator can be used with `mov', but format is wrong
+.*: Error: @GOTTPOFF operator can be used with `mov', but format is wrong
+.*: Error: @GOTTPOFF operator can be used with `mov', but format is wrong
+.*: Error: @TLSCALL operator cannot be used with `lea'
+.*: Error: @TLSCALL operator requires `%eax/%rax' as base register
+.*: Error: @TLSCALL operator requires no SIB
+.*: Error: 0-byte relocation cannot be applied to 4-byte field
+.*: Error: @TLSCALL operator requires `%eax/%rax' as base register
diff --git a/gas/testsuite/gas/i386/inval-tls.s b/gas/testsuite/gas/i386/inval-tls.s
index 3fe85c3..067e9b4 100644
--- a/gas/testsuite/gas/i386/inval-tls.s
+++ b/gas/testsuite/gas/i386/inval-tls.s
@@ -1,4 +1,85 @@
 	.text
 # All the following should be illegal
 	kmovd	foo@gotntpoff(%eax), %k0
-	kmovd	foo@tpoff(%eax), %k0
+
+	/* Invalid testcase for R_386_TLS_GD.  */
+	addl foo@tlsgd(,%ebx,1), %eax
+	leal foo@tlsgd(,%ecx,1), %eax
+	leal foo@tlsgd(,%ebx,2), %eax
+	leal foo@tlsgd(%ecx,%ebx,1), %eax
+	leal foo@tlsgd(,%ebx,1), %ecx
+	leal foo@tlsgd(%ebx), %ecx
+	leal foo@tlsgd(%eax), %eax
+	lea foo@tlsgd(%ebx), %ax
+
+	/* Invalid testcase for R_386_TLS_LDM.  */
+	addl foo@tlsldm(%ebx), %eax
+	leal foo@tlsldm(%ebx), %ecx
+	leal foo@tlsldm(%eax), %eax
+	leal foo@tlsldm(,%ebx,1), %eax
+	lea foo@tlsldm(%ebx), %ax
+
+	/* Invalid testcase for R_386_TLS_GOTDESC.  */
+	addl x@tlsdesc(%ebx), %eax
+	leal x@tlsdesc(%ecx), %eax
+	leal x@tlsdesc(,%ecx,1), %eax
+	lea  x@tlsdesc(%ebx), %ax
+
+	/* Invalid testcase for R_386_TLS_IE.  */
+	subl foo@indntpoff, %ecx
+	addl foo@indntpoff(%ebx), %ecx
+	movl foo@indntpoff(%ebx), %ecx
+	add foo@indntpoff, %cx
+	addl $foo@indntpoff, %eax
+	addl %ecx, foo@indntpoff
+	addl $0x9090,foo@indntpoff
+	addl $0x90909090,foo@indntpoff
+	movl foo@indntpoff,%eax
+	movl %edx,foo@indntpoff(%eax)
+	movw %ss,foo@indntpoff(%eax)
+	movw foo@indntpoff(%eax),%ss
+	movl $0x90909090,foo@indntpoff(%eax)
+	movl $foo@indntpoff, %eax
+
+	/* Invalid testcase for R_386_TLS_GOTIE.  */
+	leal foo@gotntpoff(%ebx), %ecx
+	subl foo@gotntpoff(,%ebx,1), %ecx
+	lea foo@gotntpoff(%ebx), %cx
+	subl %ecx, foo@gotntpoff(%ebx)
+	subl $0x9090,foo@gotntpoff(%ebx)
+	subl $0x90909090,foo@gotntpoff(%eax)
+	subl $foo@gotntpoff, %eax
+	addl %ecx, foo@gotntpoff(%ebx)
+	addl $0x9090,foo@gotntpoff(%ebx)
+	addl $0x90909090,foo@gotntpoff(%eax)
+	addl $foo@gotntpoff, %eax
+	movl foo@gotntpoff,%eax
+	movl %edx,foo@gotntpoff(%eax)
+	movw %ss,foo@gotntpoff(%eax)
+	movw foo@gotntpoff(%eax),%ss
+	movl $0x90909090,foo@gotntpoff(%eax)
+	movl $foo@gotntpoff, %eax
+
+	/* Invalid testcase for R_386_TLS_IE_32.  */
+	leal foo@gottpoff(%ebx), %ecx
+	subl foo@gottpoff(,%ebx,1), %ecx
+	add foo@gottpoff(%ebx), %cx
+	subl %ecx, foo@gottpoff(%ebx)
+	subl $0x9090,foo@gottpoff(%ebx)
+	subl $0x90909090,foo@gottpoff(%eax)
+	subl $foo@gottpoff, %eax
+	addl %ecx, foo@gottpoff(%ebx)
+	addl $0x9090,foo@gottpoff(%ebx)
+	addl $0x90909090,foo@gottpoff(%eax)
+	movl foo@gottpoff,%eax
+	movl %edx,foo@gottpoff(%eax)
+	movw %ss,foo@gottpoff(%eax)
+	movw foo@gottpoff(%eax),%ss
+	movl $0x90909090,foo@gottpoff(%eax)
+	movl $foo@gottpoff, %eax
+
+	/* Invalid testcase for R_386_TLS_DESC_CALL.  */
+	leal foo@tlscall(%eax), %ebx
+	call *x@tlscall(%ebx)
+	call *x@tlscall(,%eax,1)
+	call *x@tlscall(%bx)
diff --git a/gas/testsuite/gas/i386/optimize-1.d b/gas/testsuite/gas/i386/optimize-1.d
index f496846..d50814d 100644
--- a/gas/testsuite/gas/i386/optimize-1.d
+++ b/gas/testsuite/gas/i386/optimize-1.d
@@ -166,6 +166,36 @@ Disassembly of section .text:
  +[a-f0-9]+:	66 .*	movd   %xmm1,\(%edx\)
  +[a-f0-9]+:	c5 .*	vmovd  %xmm1,%edx
  +[a-f0-9]+:	c5 .*	vmovd  %xmm1,\(%edx\)
+ +[a-f0-9]+:	66 .*	movd   %xmm1,%edx
+ +[a-f0-9]+:	f3 .*	movss  %xmm1,\(%edx\)
+ +[a-f0-9]+:	c5 .*	vmovd  %xmm1,%edx
+ +[a-f0-9]+:	c5 .*	vmovss %xmm1,\(%edx\)
+ +[a-f0-9]+:	c5 .*	vmovaps %xmm1,%xmm2
+ +[a-f0-9]+:	c5 .*	vmovups %xmm1,\(%edx\)
+ +[a-f0-9]+:	c5 .*	vmovdqa %xmm1,%xmm2
+ +[a-f0-9]+:	c5 .*	vmovdqu %xmm1,\(%edx\)
+ +[a-f0-9]+:	c5 .*	vmovaps %xmm1,%xmm2
+ +[a-f0-9]+:	c5 .*	vmovups %xmm1,\(%edx\)
+ +[a-f0-9]+:	c5 .*	vmovdqa %xmm1,%xmm2
+ +[a-f0-9]+:	c5 .*	vmovdqu %xmm1,\(%edx\)
+ +[a-f0-9]+:	c5 .*	vmovapd %xmm1,%xmm2
+ +[a-f0-9]+:	c5 .*	vmovupd %xmm1,\(%edx\)
+ +[a-f0-9]+:	c5 .*	vmovdqa %xmm1,%xmm2
+ +[a-f0-9]+:	c5 .*	vmovdqu %xmm1,\(%edx\)
+ +[a-f0-9]+:	c5 .*	vmovaps %ymm1,%ymm2
+ +[a-f0-9]+:	c5 .*	vmovups %ymm1,\(%edx\)
+ +[a-f0-9]+:	c5 .*	vmovdqa %ymm1,%ymm2
+ +[a-f0-9]+:	c5 .*	vmovdqu %ymm1,\(%edx\)
+ +[a-f0-9]+:	c5 .*	vmovapd %ymm1,%ymm2
+ +[a-f0-9]+:	c5 .*	vmovupd %ymm1,\(%edx\)
+ +[a-f0-9]+:	c5 .*	vmovdqa %ymm1,%ymm2
+ +[a-f0-9]+:	c5 .*	vmovdqu %ymm1,\(%edx\)
+ +[a-f0-9]+:	f3 .*	movss  %xmm1,%xmm2
+ +[a-f0-9]+:	f3 .*	movss  \(%ecx\),%xmm2
+ +[a-f0-9]+:	0f .*	xorps  %xmm2,%xmm2
+ +[a-f0-9]+:	c5 .*	vmovss %xmm1,%xmm2,%xmm3
+ +[a-f0-9]+:	c5 .*	vmovss \(%ecx\),%xmm2
+ +[a-f0-9]+:	c5 .*	vxorps %xmm3,%xmm3,%xmm3
  +[a-f0-9]+:	0f ba e0 0f          	bt     \$0xf,%eax
  +[a-f0-9]+:	66 0f ba e0 10       	bt     \$0x10,%ax
  +[a-f0-9]+:	0f ba f8 0f          	btc    \$0xf,%eax
diff --git a/gas/testsuite/gas/i386/optimize-1.s b/gas/testsuite/gas/i386/optimize-1.s
index ce53758..fad6393 100644
--- a/gas/testsuite/gas/i386/optimize-1.s
+++ b/gas/testsuite/gas/i386/optimize-1.s
@@ -194,6 +194,44 @@ _start:
 	vpextrd		$0, %xmm1, %edx
 	vpextrd		$0, %xmm1, (%edx)
 
+	extractps	$0, %xmm1, %edx
+	extractps	$0, %xmm1, (%edx)
+	vextractps	$0, %xmm1, %edx
+	vextractps	$0, %xmm1, (%edx)
+
+	vextractf128 $0, %ymm1, %xmm2
+	vextractf128 $0, %ymm1, (%edx)
+	vextracti128 $0, %ymm1, %xmm2
+	vextracti128 $0, %ymm1, (%edx)
+
+	vextractf32x4 $0, %ymm1, %xmm2
+	vextractf32x4 $0, %ymm1, (%edx)
+	vextracti32x4 $0, %ymm1, %xmm2
+	vextracti32x4 $0, %ymm1, (%edx)
+
+	vextractf64x2 $0, %ymm1, %xmm2
+	vextractf64x2 $0, %ymm1, (%edx)
+	vextracti64x2 $0, %ymm1, %xmm2
+	vextracti64x2 $0, %ymm1, (%edx)
+
+	vextractf32x8 $0, %zmm1, %ymm2
+	vextractf32x8 $0, %zmm1, (%edx)
+	vextracti32x8 $0, %zmm1, %ymm2
+	vextracti32x8 $0, %zmm1, (%edx)
+
+	vextractf64x4 $0, %zmm1, %ymm2
+	vextractf64x4 $0, %zmm1, (%edx)
+	vextracti64x4 $0, %zmm1, %ymm2
+	vextracti64x4 $0, %zmm1, (%edx)
+
+	insertps $0, %xmm1, %xmm2
+	insertps $0xce, (%ecx), %xmm2
+	insertps $0xff, %xmm1, %xmm2
+
+	vinsertps $0, %xmm1, %xmm2, %xmm3
+	vinsertps $0xce, (%ecx), %xmm2, %xmm2
+	vinsertps $0xff, %xmm1, %xmm2, %xmm3
+
 	bt	$15, %ax
 	bt	$16, %ax
 	btc	$15, %ax
diff --git a/gas/testsuite/gas/i386/optimize-1a.d b/gas/testsuite/gas/i386/optimize-1a.d
index b039a0d..a59c616 100644
--- a/gas/testsuite/gas/i386/optimize-1a.d
+++ b/gas/testsuite/gas/i386/optimize-1a.d
@@ -167,6 +167,36 @@ Disassembly of section .text:
  +[a-f0-9]+:	66 .*	movd   %xmm1,\(%edx\)
  +[a-f0-9]+:	c5 .*	vmovd  %xmm1,%edx
  +[a-f0-9]+:	c5 .*	vmovd  %xmm1,\(%edx\)
+ +[a-f0-9]+:	66 .*	movd   %xmm1,%edx
+ +[a-f0-9]+:	f3 .*	movss  %xmm1,\(%edx\)
+ +[a-f0-9]+:	c5 .*	vmovd  %xmm1,%edx
+ +[a-f0-9]+:	c5 .*	vmovss %xmm1,\(%edx\)
+ +[a-f0-9]+:	c5 .*	vmovaps %xmm1,%xmm2
+ +[a-f0-9]+:	c5 .*	vmovups %xmm1,\(%edx\)
+ +[a-f0-9]+:	c5 .*	vmovdqa %xmm1,%xmm2
+ +[a-f0-9]+:	c5 .*	vmovdqu %xmm1,\(%edx\)
+ +[a-f0-9]+:	c5 .*	vmovaps %xmm1,%xmm2
+ +[a-f0-9]+:	c5 .*	vmovups %xmm1,\(%edx\)
+ +[a-f0-9]+:	c5 .*	vmovdqa %xmm1,%xmm2
+ +[a-f0-9]+:	c5 .*	vmovdqu %xmm1,\(%edx\)
+ +[a-f0-9]+:	c5 .*	vmovapd %xmm1,%xmm2
+ +[a-f0-9]+:	c5 .*	vmovupd %xmm1,\(%edx\)
+ +[a-f0-9]+:	c5 .*	vmovdqa %xmm1,%xmm2
+ +[a-f0-9]+:	c5 .*	vmovdqu %xmm1,\(%edx\)
+ +[a-f0-9]+:	c5 .*	vmovaps %ymm1,%ymm2
+ +[a-f0-9]+:	c5 .*	vmovups %ymm1,\(%edx\)
+ +[a-f0-9]+:	c5 .*	vmovdqa %ymm1,%ymm2
+ +[a-f0-9]+:	c5 .*	vmovdqu %ymm1,\(%edx\)
+ +[a-f0-9]+:	c5 .*	vmovapd %ymm1,%ymm2
+ +[a-f0-9]+:	c5 .*	vmovupd %ymm1,\(%edx\)
+ +[a-f0-9]+:	c5 .*	vmovdqa %ymm1,%ymm2
+ +[a-f0-9]+:	c5 .*	vmovdqu %ymm1,\(%edx\)
+ +[a-f0-9]+:	f3 .*	movss  %xmm1,%xmm2
+ +[a-f0-9]+:	f3 .*	movss  \(%ecx\),%xmm2
+ +[a-f0-9]+:	0f .*	xorps  %xmm2,%xmm2
+ +[a-f0-9]+:	c5 .*	vmovss %xmm1,%xmm2,%xmm3
+ +[a-f0-9]+:	c5 .*	vmovss \(%ecx\),%xmm2
+ +[a-f0-9]+:	c5 .*	vxorps %xmm3,%xmm3,%xmm3
  +[a-f0-9]+:	0f ba e0 0f          	bt     \$0xf,%eax
  +[a-f0-9]+:	66 0f ba e0 10       	bt     \$0x10,%ax
  +[a-f0-9]+:	0f ba f8 0f          	btc    \$0xf,%eax
diff --git a/gas/testsuite/gas/i386/optimize-4.d b/gas/testsuite/gas/i386/optimize-4.d
index ea2c761..8d29aab 100644
--- a/gas/testsuite/gas/i386/optimize-4.d
+++ b/gas/testsuite/gas/i386/optimize-4.d
@@ -166,6 +166,36 @@ Disassembly of section .text:
  +[a-f0-9]+:	66 .*	movd   %xmm1,\(%edx\)
  +[a-f0-9]+:	c5 .*	vmovd  %xmm1,%edx
  +[a-f0-9]+:	c5 .*	vmovd  %xmm1,\(%edx\)
+ +[a-f0-9]+:	66 .*	movd   %xmm1,%edx
+ +[a-f0-9]+:	f3 .*	movss  %xmm1,\(%edx\)
+ +[a-f0-9]+:	c5 .*	vmovd  %xmm1,%edx
+ +[a-f0-9]+:	c5 .*	vmovss %xmm1,\(%edx\)
+ +[a-f0-9]+:	c5 .*	vmovaps %xmm1,%xmm2
+ +[a-f0-9]+:	c5 .*	vmovups %xmm1,\(%edx\)
+ +[a-f0-9]+:	c5 .*	vmovdqa %xmm1,%xmm2
+ +[a-f0-9]+:	c5 .*	vmovdqu %xmm1,\(%edx\)
+ +[a-f0-9]+:	c5 .*	vmovaps %xmm1,%xmm2
+ +[a-f0-9]+:	c5 .*	vmovups %xmm1,\(%edx\)
+ +[a-f0-9]+:	c5 .*	vmovdqa %xmm1,%xmm2
+ +[a-f0-9]+:	c5 .*	vmovdqu %xmm1,\(%edx\)
+ +[a-f0-9]+:	c5 .*	vmovapd %xmm1,%xmm2
+ +[a-f0-9]+:	c5 .*	vmovupd %xmm1,\(%edx\)
+ +[a-f0-9]+:	c5 .*	vmovdqa %xmm1,%xmm2
+ +[a-f0-9]+:	c5 .*	vmovdqu %xmm1,\(%edx\)
+ +[a-f0-9]+:	c5 .*	vmovaps %ymm1,%ymm2
+ +[a-f0-9]+:	c5 .*	vmovups %ymm1,\(%edx\)
+ +[a-f0-9]+:	c5 .*	vmovdqa %ymm1,%ymm2
+ +[a-f0-9]+:	c5 .*	vmovdqu %ymm1,\(%edx\)
+ +[a-f0-9]+:	c5 .*	vmovapd %ymm1,%ymm2
+ +[a-f0-9]+:	c5 .*	vmovupd %ymm1,\(%edx\)
+ +[a-f0-9]+:	c5 .*	vmovdqa %ymm1,%ymm2
+ +[a-f0-9]+:	c5 .*	vmovdqu %ymm1,\(%edx\)
+ +[a-f0-9]+:	f3 .*	movss  %xmm1,%xmm2
+ +[a-f0-9]+:	f3 .*	movss  \(%ecx\),%xmm2
+ +[a-f0-9]+:	0f .*	xorps  %xmm2,%xmm2
+ +[a-f0-9]+:	c5 .*	vmovss %xmm1,%xmm2,%xmm3
+ +[a-f0-9]+:	c5 .*	vmovss \(%ecx\),%xmm2
+ +[a-f0-9]+:	c5 .*	vxorps %xmm3,%xmm3,%xmm3
  +[a-f0-9]+:	0f ba e0 0f          	bt     \$0xf,%eax
  +[a-f0-9]+:	66 0f ba e0 10       	bt     \$0x10,%ax
  +[a-f0-9]+:	0f ba f8 0f          	btc    \$0xf,%eax
diff --git a/gas/testsuite/gas/i386/optimize-5.d b/gas/testsuite/gas/i386/optimize-5.d
index d53d2cc..162a97f 100644
--- a/gas/testsuite/gas/i386/optimize-5.d
+++ b/gas/testsuite/gas/i386/optimize-5.d
@@ -166,6 +166,36 @@ Disassembly of section .text:
  +[a-f0-9]+:	66 .*	movd   %xmm1,\(%edx\)
  +[a-f0-9]+:	c5 .*	vmovd  %xmm1,%edx
  +[a-f0-9]+:	c5 .*	vmovd  %xmm1,\(%edx\)
+ +[a-f0-9]+:	66 .*	movd   %xmm1,%edx
+ +[a-f0-9]+:	f3 .*	movss  %xmm1,\(%edx\)
+ +[a-f0-9]+:	c5 .*	vmovd  %xmm1,%edx
+ +[a-f0-9]+:	c5 .*	vmovss %xmm1,\(%edx\)
+ +[a-f0-9]+:	c5 .*	vmovaps %xmm1,%xmm2
+ +[a-f0-9]+:	c5 .*	vmovups %xmm1,\(%edx\)
+ +[a-f0-9]+:	c5 .*	vmovdqa %xmm1,%xmm2
+ +[a-f0-9]+:	c5 .*	vmovdqu %xmm1,\(%edx\)
+ +[a-f0-9]+:	c5 .*	vmovaps %xmm1,%xmm2
+ +[a-f0-9]+:	c5 .*	vmovups %xmm1,\(%edx\)
+ +[a-f0-9]+:	c5 .*	vmovdqa %xmm1,%xmm2
+ +[a-f0-9]+:	c5 .*	vmovdqu %xmm1,\(%edx\)
+ +[a-f0-9]+:	c5 .*	vmovapd %xmm1,%xmm2
+ +[a-f0-9]+:	c5 .*	vmovupd %xmm1,\(%edx\)
+ +[a-f0-9]+:	c5 .*	vmovdqa %xmm1,%xmm2
+ +[a-f0-9]+:	c5 .*	vmovdqu %xmm1,\(%edx\)
+ +[a-f0-9]+:	c5 .*	vmovaps %ymm1,%ymm2
+ +[a-f0-9]+:	c5 .*	vmovups %ymm1,\(%edx\)
+ +[a-f0-9]+:	c5 .*	vmovdqa %ymm1,%ymm2
+ +[a-f0-9]+:	c5 .*	vmovdqu %ymm1,\(%edx\)
+ +[a-f0-9]+:	c5 .*	vmovapd %ymm1,%ymm2
+ +[a-f0-9]+:	c5 .*	vmovupd %ymm1,\(%edx\)
+ +[a-f0-9]+:	c5 .*	vmovdqa %ymm1,%ymm2
+ +[a-f0-9]+:	c5 .*	vmovdqu %ymm1,\(%edx\)
+ +[a-f0-9]+:	f3 .*	movss  %xmm1,%xmm2
+ +[a-f0-9]+:	f3 .*	movss  \(%ecx\),%xmm2
+ +[a-f0-9]+:	0f .*	xorps  %xmm2,%xmm2
+ +[a-f0-9]+:	c5 .*	vmovss %xmm1,%xmm2,%xmm3
+ +[a-f0-9]+:	c5 .*	vmovss \(%ecx\),%xmm2
+ +[a-f0-9]+:	c5 .*	vxorps %xmm3,%xmm3,%xmm3
  +[a-f0-9]+:	0f ba e0 0f          	bt     \$0xf,%eax
  +[a-f0-9]+:	66 0f ba e0 10       	bt     \$0x10,%ax
  +[a-f0-9]+:	0f ba f8 0f          	btc    \$0xf,%eax
diff --git a/gas/testsuite/gas/i386/reloc32.d b/gas/testsuite/gas/i386/reloc32.d
index 263a742..ebac545 100644
--- a/gas/testsuite/gas/i386/reloc32.d
+++ b/gas/testsuite/gas/i386/reloc32.d
@@ -1,4 +1,4 @@
-#as: -mrelax-relocations=yes
+#as: -mrelax-relocations=yes -mtls-check=no
 #objdump: -Drw
 #name: i386 relocs
 
@@ -43,6 +43,7 @@ Disassembly of section \.text:
 .*[ 	]+R_386_TLS_LE[ 	]+xtrn
 .*[ 	]+R_386_TLS_LE_32[ 	]+xtrn
 .*[ 	]+R_386_TLS_LE_32[ 	]+xtrn
+.*[ 	]+R_386_PLT32[ 	]+ptr
 Disassembly of section \.data:
 #...
 .*[ 	]+R_386_32[ 	]+xtrn
diff --git a/gas/testsuite/gas/i386/reloc32.s b/gas/testsuite/gas/i386/reloc32.s
index e766a3d..5616cd5 100644
--- a/gas/testsuite/gas/i386/reloc32.s
+++ b/gas/testsuite/gas/i386/reloc32.s
@@ -162,3 +162,10 @@ bad	.byte	xtrn@tpoff
 	.long	xtrn@got + 4
 	.long	xtrn@got - 4
 bad	.long	xtrn@plt - .
+
+	.text
+	movl	$ptr@PLT, %eax
+
+	.data
+ptr:
+	.dc.a 0
diff --git a/gas/testsuite/gas/i386/reloc64.d b/gas/testsuite/gas/i386/reloc64.d
index 540a9b7..5fee029 100644
--- a/gas/testsuite/gas/i386/reloc64.d
+++ b/gas/testsuite/gas/i386/reloc64.d
@@ -1,4 +1,4 @@
-#as: -mx86-used-note=no --generate-missing-build-notes=no
+#as: -mx86-used-note=no --generate-missing-build-notes=no -mtls-check=no
 #objdump: -Drw
 #name: x86-64 relocs
 #notarget: *-*-solaris*
@@ -57,6 +57,9 @@ Disassembly of section \.text:
 .*[ 	]+R_X86_64_32[ 	]+xtrn
 .*[ 	]+R_X86_64_32S[ 	]+xtrn
 .*[ 	]+R_X86_64_32[ 	]+xtrn
+.*[ 	]+R_X86_64_GOT64[ 	]+ptr
+.*[ 	]+R_X86_64_GOTOFF64[ 	]+Ldst
+.*[ 	]+R_X86_64_PLT32[ 	]+ptr
 Disassembly of section \.data:
 #...
 .*[ 	]+R_X86_64_64[ 	]+xtrn
@@ -97,3 +100,8 @@ Disassembly of section \.data:
 .*[ 	]+R_X86_64_GOT32[ 	]+xtrn-0x4
 .*[ 	]+R_X86_64_GOT32[ 	]+xtrn\+0x4
 .*[ 	]+R_X86_64_GOTPLT64[ 	]+xtrn
+
+.* <ptr>:
+	...
+.* <Ldst>:
+	...
diff --git a/gas/testsuite/gas/i386/reloc64.s b/gas/testsuite/gas/i386/reloc64.s
index bc6f0fa..5c0f413 100644
--- a/gas/testsuite/gas/i386/reloc64.s
+++ b/gas/testsuite/gas/i386/reloc64.s
@@ -225,3 +225,14 @@ bad	.byte	xtrn@gotplt
 	vgatherdps %xmm2, xtrn(,%xmm1), %xmm0
 	addr32 vgatherdps %xmm2, xtrn(,%xmm1), %xmm0
 bad	.long	xtrn@plt - .
+
+	.text
+	movabs	$ptr@GOT, %rax
+	movabs	$Ldst@GOTOFF, %rdx
+	movq	$ptr@PLT, %rax
+
+	.data
+ptr:
+	.quad 0
+Ldst:
+	.quad 0
diff --git a/gas/testsuite/gas/i386/solaris/reloc64.d b/gas/testsuite/gas/i386/solaris/reloc64.d
index 5b4b91e..e316e78 100644
--- a/gas/testsuite/gas/i386/solaris/reloc64.d
+++ b/gas/testsuite/gas/i386/solaris/reloc64.d
@@ -1,4 +1,4 @@
-#as: -mx86-used-note=no
+#as: -mx86-used-note=no -mtls-check=no
 #source: ../reloc64.s
 #objdump: -Drw
 #name: x86-64 relocs
@@ -57,6 +57,9 @@ Disassembly of section \.text:
 .*[ 	]+R_X86_64_32[ 	]+xtrn
 .*[ 	]+R_X86_64_32S[ 	]+xtrn
 .*[ 	]+R_X86_64_32[ 	]+xtrn
+.*[ 	]+R_X86_64_GOT64[ 	]+ptr
+.*[ 	]+R_X86_64_GOTOFF64[ 	]+Ldst
+.*[ 	]+R_X86_64_PLT32[ 	]+ptr
 Disassembly of section \.data:
 #...
 .*[ 	]+R_X86_64_64[ 	]+xtrn
@@ -97,3 +100,8 @@ Disassembly of section \.data:
 .*[ 	]+R_X86_64_GOT32[ 	]+xtrn-0x4
 .*[ 	]+R_X86_64_GOT32[ 	]+xtrn\+0x4
 .*[ 	]+R_X86_64_GOTPLT64[ 	]+xtrn
+
+.* <ptr>:
+	...
+.* <Ldst>:
+	...
diff --git a/gas/testsuite/gas/i386/tls.d b/gas/testsuite/gas/i386/tls.d
new file mode 100644
index 0000000..adfe7ce
--- /dev/null
+++ b/gas/testsuite/gas/i386/tls.d
@@ -0,0 +1,25 @@
+#as:
+#objdump: -drw
+#name: Check tls relocation 32 bit-mode
+
+.*: +file format .*
+
+
+Disassembly of section .text:
+
+00000000 <_start>:
+\s*[a-f0-9]+:\s*8d 04 1d 00 00 00 00[	 ]+lea    0x0\(,%ebx,1\),%eax	3: R_386_TLS_GD	foo
+\s*[a-f0-9]+:\s*8d 81 00 00 00 00[	 ]+lea    0x0\(%ecx\),%eax	9: R_386_TLS_GD	foo
+\s*[a-f0-9]+:\s*8d 83 00 00 00 00[	 ]+lea    0x0\(%ebx\),%eax	f: R_386_TLS_LDM	foo
+\s*[a-f0-9]+:\s*8d 83 00 00 00 00[	 ]+lea    0x0\(%ebx\),%eax	15: R_386_TLS_GOTDESC	x
+\s*[a-f0-9]+:\s*a1 00 00 00 00[	 ]+mov    0x0,%eax	1a: R_386_TLS_IE	foo
+\s*[a-f0-9]+:\s*8b 1d 00 00 00 00[	 ]+mov    0x0,%ebx	20: R_386_TLS_IE	foo
+\s*[a-f0-9]+:\s*03 15 00 00 00 00[	 ]+add    0x0,%edx	26: R_386_TLS_IE	foo
+\s*[a-f0-9]+:\s*2b 8b 00 00 00 00[	 ]+sub    0x0\(%ebx\),%ecx	2c: R_386_TLS_GOTIE	foo
+\s*[a-f0-9]+:\s*8b 8b 00 00 00 00[	 ]+mov    0x0\(%ebx\),%ecx	32: R_386_TLS_GOTIE	foo
+\s*[a-f0-9]+:\s*03 8b 00 00 00 00[	 ]+add    0x0\(%ebx\),%ecx	38: R_386_TLS_GOTIE	foo
+\s*[a-f0-9]+:\s*2b 8b 00 00 00 00[	 ]+sub    0x0\(%ebx\),%ecx	3e: R_386_TLS_IE_32	foo
+\s*[a-f0-9]+:\s*8b 8b 00 00 00 00[	 ]+mov    0x0\(%ebx\),%ecx	44: R_386_TLS_IE_32	foo
+\s*[a-f0-9]+:\s*03 8b 00 00 00 00[	 ]+add    0x0\(%ebx\),%ecx	4a: R_386_TLS_IE_32	foo
+\s*[a-f0-9]+:\s*ff 10[	 ]+call   \*\(%eax\)	4e: R_386_TLS_DESC_CALL	foo
+#pass
diff --git a/gas/testsuite/gas/i386/tls.s b/gas/testsuite/gas/i386/tls.s
new file mode 100644
index 0000000..6c077ee
--- /dev/null
+++ b/gas/testsuite/gas/i386/tls.s
@@ -0,0 +1,31 @@
+# Check tls relocation 32-bit mode
+
+	.text
+_start:
+	/* R_386_TLS_GD.  */
+	leal foo@tlsgd(,%ebx,1), %eax
+	leal foo@tlsgd(%ecx), %eax
+
+	/* R_386_TLS_LDM.  */
+	leal foo@tlsldm(%ebx), %eax
+
+	/* R_386_TLS_GOTDESC.  */
+	leal x@tlsdesc(%ebx), %eax
+
+	/* R_386_TLS_IE.  */
+	movl foo@indntpoff, %eax
+	movl foo@indntpoff, %ebx
+	addl foo@indntpoff, %edx
+
+	/* R_386_TLS_GOTIE.  */
+	subl foo@gotntpoff(%ebx), %ecx
+	movl foo@gotntpoff(%ebx), %ecx
+	addl foo@gotntpoff(%ebx), %ecx
+
+	/* R_386_TLS_IE_32.  */
+	subl foo@gottpoff(%ebx), %ecx
+	movl foo@gottpoff(%ebx), %ecx
+	addl foo@gottpoff(%ebx), %ecx
+
+	/* R_386_TLS_DESC_CALL.  */
+	call *foo@tlscall(%eax)
diff --git a/gas/testsuite/gas/i386/x86-64-apx-egpr-inval.l b/gas/testsuite/gas/i386/x86-64-apx-egpr-inval.l
index b018b3f..2525565 100644
--- a/gas/testsuite/gas/i386/x86-64-apx-egpr-inval.l
+++ b/gas/testsuite/gas/i386/x86-64-apx-egpr-inval.l
@@ -187,10 +187,10 @@
 .*:195: Error: no EVEX encoding for `vrcpps'
 .*:196: Error: no EVEX encoding for `vrcpps'
 .*:197: Error: no EVEX encoding for `vrcpss'
-.*:198: Error: .* 4 bits for `vroundpd'
-.*:199: Error: .* 4 bits for `vroundps'
-.*:200: Error: .* 4 bits for `vroundsd'
-.*:201: Error: .* 4 bits for `vroundss'
+.*:198: Error: no EVEX encoding for `vroundpd'
+.*:199: Error: no EVEX encoding for `vroundps'
+.*:200: Error: no EVEX encoding for `vroundsd'
+.*:201: Error: no EVEX encoding for `vroundss'
 .*:202: Error: no EVEX encoding for `vrsqrtps'
 .*:203: Error: no EVEX encoding for `vrsqrtps'
 .*:204: Error: no EVEX encoding for `vrsqrtss'
diff --git a/gas/testsuite/gas/i386/x86-64-apx-egpr-promote-inval.l b/gas/testsuite/gas/i386/x86-64-apx-egpr-promote-inval.l
index 6f06df9..9c0b818 100644
--- a/gas/testsuite/gas/i386/x86-64-apx-egpr-promote-inval.l
+++ b/gas/testsuite/gas/i386/x86-64-apx-egpr-promote-inval.l
@@ -20,6 +20,12 @@
 .*:37: Error: .*`kmovb'.*
 .*:38: Error: .*`ldtilecfg'.*
 .*:39: Error: .*`cmpexadd'.*
+.*:42: Error: no EVEX encoding for `vbroadcastf128'
+.*:43: Error: no EVEX encoding for `vbroadcasti128'
+.*:44: Error: no EVEX encoding for `vextractf128'
+.*:45: Error: no EVEX encoding for `vextracti128'
+.*:46: Error: no EVEX encoding for `vinsertf128'
+.*:47: Error: no EVEX encoding for `vinserti128'
 GAS LISTING .*
 #...
 [ 	]*1[ 	]+\# Check illegal 64bit APX EVEX promoted instructions
diff --git a/gas/testsuite/gas/i386/x86-64-apx-egpr-promote-inval.s b/gas/testsuite/gas/i386/x86-64-apx-egpr-promote-inval.s
index 5e4e08f..d23dbd3 100644
--- a/gas/testsuite/gas/i386/x86-64-apx-egpr-promote-inval.s
+++ b/gas/testsuite/gas/i386/x86-64-apx-egpr-promote-inval.s
@@ -37,3 +37,11 @@
 	{evex} kmovb %k1, %r8d
 	{evex} ldtilecfg (%r8)
 	{evex} cmpexadd %rax, %rcx, (%r8)
+
+	.arch default
+	vbroadcastf128	(%r16),%ymm3
+	vbroadcasti128	(%r16),%ymm3
+	vextractf128	$1,%ymm3,(%r16)
+	vextracti128	$1,%ymm3,(%r16)
+	vinsertf128	$1,(%r16),%ymm3,%ymm8
+	vinserti128	$1,(%r16),%ymm3,%ymm8
diff --git a/gas/testsuite/gas/i386/x86-64-apx-evex-promoted-bad.d b/gas/testsuite/gas/i386/x86-64-apx-evex-promoted-bad.d
index 7c2efb0..667e6f2 100644
--- a/gas/testsuite/gas/i386/x86-64-apx-evex-promoted-bad.d
+++ b/gas/testsuite/gas/i386/x86-64-apx-evex-promoted-bad.d
@@ -34,9 +34,12 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:[ 	]+04 08[ 	]+.*
 [ 	]*[a-f0-9]+:[ 	]+62 f4 3c 08 8f[ 	]+\(bad\)
 [ 	]*[a-f0-9]+:[ 	]+c7[ 	]+.*
-[ 	]*[a-f0-9]+:[ 	]+62 74 7c 18 8f c0[ 	]+pop2   %rax,\(bad\)
+[ 	]*[a-f0-9]+:[ 	]+62 f4 7c 18 8f c0[ 	]+pop2   %rax,\(bad\)
 [ 	]*[a-f0-9]+:[ 	]+62 d4 24 18 8f[ 	]+\(bad\)
 [ 	]*[a-f0-9]+:[ 	]+c3[ 	]+.*
+[ 	]*[a-f0-9]+:[ 	]+62 f4 5c 18 8f[ 	]+\(bad\)
+[ 	]*[a-f0-9]+:[ 	]+c3[ 	]+.*
+[ 	]*[a-f0-9]+:[ 	]+62 f4 7c 18 8f c4[ 	]+pop2   %rsp,\(bad\)
 [ 	]*[a-f0-9]+:[ 	]+62 fc 7d 0c 60 c7[ 	]+movbe  \{bad-nf\},%r23w,%ax
 [ 	]*[a-f0-9]+:[ 	]+62 fc 79 08 60[ 	]+\(bad\)
 [ 	]*[a-f0-9]+:[ 	]+c7[ 	 ]+.*
diff --git a/gas/testsuite/gas/i386/x86-64-apx-evex-promoted-bad.s b/gas/testsuite/gas/i386/x86-64-apx-evex-promoted-bad.s
index 959e4e1..7b2df4b 100644
--- a/gas/testsuite/gas/i386/x86-64-apx-evex-promoted-bad.s
+++ b/gas/testsuite/gas/i386/x86-64-apx-evex-promoted-bad.s
@@ -44,11 +44,17 @@ _start:
 	# pop2 %rdi, %r8 set EVEX.ND=0.
 	.byte 0x62, 0xf4, 0x3c, 0x08, 0x8f, 0xc7
 
-	# pop2 %rax, %r8 set EVEX.vvvv = 1111.
-	.insn EVEX.L0.M4.W0 0x8f,  %rax, {rn-sae},%r8
+	# pop2 %rax, %rax
+	.insn EVEX.L0.NP.M4.W0 0x8f/0, %rax, {sae}, %rax
 
 	# pop2 %r11, %r11
-	.insn EVEX.L0.NP.M4.W0 0x8f/0, {sae}, %xmm11, %xmm11
+	.insn EVEX.L0.NP.M4.W0 0x8f/0, %r11, {sae}, %r11
+
+	# pop2 %rbx, %rsp
+	.insn EVEX.L0.NP.M4.W0 0x8f/0, %rbx, {sae}, %rsp
+
+	# pop2 %rsp, %rax
+	.insn EVEX.L0.NP.M4.W0 0x8f/0, %rsp, {sae}, %rax
 
 	#EVEX_MAP4 movbe %r18w,%ax set EVEX.nf = 1.
 	.insn EVEX.L0.66.M12.W0 0x60, %di, %ax {%k4}
diff --git a/gas/testsuite/gas/i386/x86-64-apx-evex-promoted-intel.d b/gas/testsuite/gas/i386/x86-64-apx-evex-promoted-intel.d
index 7666454..5419517 100644
--- a/gas/testsuite/gas/i386/x86-64-apx-evex-promoted-intel.d
+++ b/gas/testsuite/gas/i386/x86-64-apx-evex-promoted-intel.d
@@ -138,16 +138,6 @@ Disassembly of section \.text:
 [	 ]*[a-f0-9]+:[	 ]*62 da 7f 08 4b b4 87 23 01 00 00[	 ]+tileloadd tmm6,\[r31\+rax\*4\+0x123\]
 [	 ]*[a-f0-9]+:[	 ]*62 da 7d 08 4b b4 87 23 01 00 00[	 ]+tileloaddt1 tmm6,\[r31\+rax\*4\+0x123\]
 [	 ]*[a-f0-9]+:[	 ]*62 da 7e 08 4b b4 87 23 01 00 00[	 ]+tilestored[	 ]+\[r31\+rax\*4\+0x123\],tmm6
-[	 ]*[a-f0-9]+:[	 ]*62 fa 7d 28 1a 18[	 ]+vbroadcastf32x4 ymm3,XMMWORD PTR \[r16\]
-[	 ]*[a-f0-9]+:[	 ]*62 fa 7d 28 5a 18[	 ]+vbroadcasti32x4 ymm3,XMMWORD PTR \[r16\]
-[	 ]*[a-f0-9]+:[	 ]*62 fb 7d 28 19 18 01[	 ]+vextractf32x4 XMMWORD PTR \[r16\],ymm3,(0x)?1
-[	 ]*[a-f0-9]+:[	 ]*62 fb 7d 28 39 18 01[	 ]+vextracti32x4 XMMWORD PTR \[r16\],ymm3,(0x)?1
-[	 ]*[a-f0-9]+:[	 ]*62 7b 65 28 18 00 01[	 ]+vinsertf32x4 ymm8,ymm3,XMMWORD PTR \[r16\],(0x)?1
-[	 ]*[a-f0-9]+:[	 ]*62 7b 65 28 38 00 01[	 ]+vinserti32x4 ymm8,ymm3,XMMWORD PTR \[r16\],(0x)?1
-[	 ]*[a-f0-9]+:[	 ]*62 db fd 08 09 30 01[	 ]+vrndscalepd xmm6,XMMWORD PTR \[r24\],(0x)?1
-[	 ]*[a-f0-9]+:[	 ]*62 db 7d 08 08 30 02[	 ]+vrndscaleps xmm6,XMMWORD PTR \[r24\],(0x)?2
-[	 ]*[a-f0-9]+:[	 ]*62 db cd 08 0b 18 03[	 ]+vrndscalesd xmm3,xmm6,QWORD PTR \[r24\],(0x)?3
-[	 ]*[a-f0-9]+:[	 ]*62 db 4d 08 0a 18 04[	 ]+vrndscaless xmm3,xmm6,DWORD PTR \[r24\],(0x)?4
 [	 ]*[a-f0-9]+:[	 ]*62 4c 7c 08 66 8c 87 23 01 00 00[	 ]+wrssd[	 ]+\[r31\+rax\*4\+0x123\],r25d
 [	 ]*[a-f0-9]+:[	 ]*62 4c fc 08 66 bc 87 23 01 00 00[	 ]+wrssq[	 ]+\[r31\+rax\*4\+0x123\],r31
 [	 ]*[a-f0-9]+:[	 ]*62 4c 7d 08 65 8c 87 23 01 00 00[	 ]+wrussd[	 ]+\[r31\+rax\*4\+0x123\],r25d
diff --git a/gas/testsuite/gas/i386/x86-64-apx-evex-promoted-wig.d b/gas/testsuite/gas/i386/x86-64-apx-evex-promoted-wig.d
index e800205..bcdc43e 100644
--- a/gas/testsuite/gas/i386/x86-64-apx-evex-promoted-wig.d
+++ b/gas/testsuite/gas/i386/x86-64-apx-evex-promoted-wig.d
@@ -138,16 +138,6 @@ Disassembly of section \.text:
 [	 ]*[a-f0-9]+:[	 ]*62 da 7f 08 4b b4 87 23 01 00 00[	 ]+tileloadd[	 ]+0x123\(%r31,%rax,4\),%tmm6
 [	 ]*[a-f0-9]+:[	 ]*62 da 7d 08 4b b4 87 23 01 00 00[	 ]+tileloaddt1[	 ]+0x123\(%r31,%rax,4\),%tmm6
 [	 ]*[a-f0-9]+:[	 ]*62 da 7e 08 4b b4 87 23 01 00 00[	 ]+tilestored[	 ]+%tmm6,0x123\(%r31,%rax,4\)
-[	 ]*[a-f0-9]+:[	 ]*62 fa 7d 28 1a 18[	 ]+vbroadcastf32x4 \(%r16\),%ymm3
-[	 ]*[a-f0-9]+:[	 ]*62 fa 7d 28 5a 18[	 ]+vbroadcasti32x4 \(%r16\),%ymm3
-[	 ]*[a-f0-9]+:[	 ]*62 fb 7d 28 19 18 01[	 ]+vextractf32x4 \$(0x)?1,%ymm3,\(%r16\)
-[	 ]*[a-f0-9]+:[	 ]*62 fb 7d 28 39 18 01[	 ]+vextracti32x4 \$(0x)?1,%ymm3,\(%r16\)
-[	 ]*[a-f0-9]+:[	 ]*62 7b 65 28 18 00 01[	 ]+vinsertf32x4 \$(0x)?1,\(%r16\),%ymm3,%ymm8
-[	 ]*[a-f0-9]+:[	 ]*62 7b 65 28 38 00 01[	 ]+vinserti32x4 \$(0x)?1,\(%r16\),%ymm3,%ymm8
-[	 ]*[a-f0-9]+:[	 ]*62 db fd 08 09 30 01[	 ]+vrndscalepd \$0x1,\(%r24\),%xmm6
-[	 ]*[a-f0-9]+:[	 ]*62 db 7d 08 08 30 02[	 ]+vrndscaleps \$0x2,\(%r24\),%xmm6
-[	 ]*[a-f0-9]+:[	 ]*62 db cd 08 0b 18 03[	 ]+vrndscalesd \$0x3,\(%r24\),%xmm6,%xmm3
-[	 ]*[a-f0-9]+:[	 ]*62 db 4d 08 0a 18 04[	 ]+vrndscaless \$0x4,\(%r24\),%xmm6,%xmm3
 [	 ]*[a-f0-9]+:[	 ]*62 4c 7c 08 66 8c 87 23 01 00 00[	 ]+wrssd[	 ]+%r25d,0x123\(%r31,%rax,4\)
 [	 ]*[a-f0-9]+:[	 ]*62 4c fc 08 66 bc 87 23 01 00 00[	 ]+wrssq[	 ]+%r31,0x123\(%r31,%rax,4\)
 [	 ]*[a-f0-9]+:[	 ]*62 4c 7d 08 65 8c 87 23 01 00 00[	 ]+wrussd[	 ]+%r25d,0x123\(%r31,%rax,4\)
diff --git a/gas/testsuite/gas/i386/x86-64-apx-evex-promoted.d b/gas/testsuite/gas/i386/x86-64-apx-evex-promoted.d
index a8f9231..c72f701 100644
--- a/gas/testsuite/gas/i386/x86-64-apx-evex-promoted.d
+++ b/gas/testsuite/gas/i386/x86-64-apx-evex-promoted.d
@@ -138,16 +138,6 @@ Disassembly of section \.text:
 [	 ]*[a-f0-9]+:[	 ]*62 da 7f 08 4b b4 87 23 01 00 00[	 ]+tileloadd[	 ]+0x123\(%r31,%rax,4\),%tmm6
 [	 ]*[a-f0-9]+:[	 ]*62 da 7d 08 4b b4 87 23 01 00 00[	 ]+tileloaddt1[	 ]+0x123\(%r31,%rax,4\),%tmm6
 [	 ]*[a-f0-9]+:[	 ]*62 da 7e 08 4b b4 87 23 01 00 00[	 ]+tilestored[	 ]+%tmm6,0x123\(%r31,%rax,4\)
-[	 ]*[a-f0-9]+:[	 ]*62 fa 7d 28 1a 18[	 ]+vbroadcastf32x4 \(%r16\),%ymm3
-[	 ]*[a-f0-9]+:[	 ]*62 fa 7d 28 5a 18[	 ]+vbroadcasti32x4 \(%r16\),%ymm3
-[	 ]*[a-f0-9]+:[	 ]*62 fb 7d 28 19 18 01[	 ]+vextractf32x4 \$(0x)?1,%ymm3,\(%r16\)
-[	 ]*[a-f0-9]+:[	 ]*62 fb 7d 28 39 18 01[	 ]+vextracti32x4 \$(0x)?1,%ymm3,\(%r16\)
-[	 ]*[a-f0-9]+:[	 ]*62 7b 65 28 18 00 01[	 ]+vinsertf32x4 \$(0x)?1,\(%r16\),%ymm3,%ymm8
-[	 ]*[a-f0-9]+:[	 ]*62 7b 65 28 38 00 01[	 ]+vinserti32x4 \$(0x)?1,\(%r16\),%ymm3,%ymm8
-[	 ]*[a-f0-9]+:[	 ]*62 db fd 08 09 30 01[	 ]+vrndscalepd \$0x1,\(%r24\),%xmm6
-[	 ]*[a-f0-9]+:[	 ]*62 db 7d 08 08 30 02[	 ]+vrndscaleps \$0x2,\(%r24\),%xmm6
-[	 ]*[a-f0-9]+:[	 ]*62 db cd 08 0b 18 03[	 ]+vrndscalesd \$0x3,\(%r24\),%xmm6,%xmm3
-[	 ]*[a-f0-9]+:[	 ]*62 db 4d 08 0a 18 04[	 ]+vrndscaless \$0x4,\(%r24\),%xmm6,%xmm3
 [	 ]*[a-f0-9]+:[	 ]*62 4c 7c 08 66 8c 87 23 01 00 00[	 ]+wrssd[	 ]+%r25d,0x123\(%r31,%rax,4\)
 [	 ]*[a-f0-9]+:[	 ]*62 4c fc 08 66 bc 87 23 01 00 00[	 ]+wrssq[	 ]+%r31,0x123\(%r31,%rax,4\)
 [	 ]*[a-f0-9]+:[	 ]*62 4c 7d 08 65 8c 87 23 01 00 00[	 ]+wrussd[	 ]+%r25d,0x123\(%r31,%rax,4\)
diff --git a/gas/testsuite/gas/i386/x86-64-apx-evex-promoted.s b/gas/testsuite/gas/i386/x86-64-apx-evex-promoted.s
index 1ba7d72..b66ee19 100644
--- a/gas/testsuite/gas/i386/x86-64-apx-evex-promoted.s
+++ b/gas/testsuite/gas/i386/x86-64-apx-evex-promoted.s
@@ -132,16 +132,6 @@ _start:
 	tileloadd	0x123(%r31,%rax,4),%tmm6
 	tileloaddt1	0x123(%r31,%rax,4),%tmm6
 	tilestored	%tmm6,0x123(%r31,%rax,4)
-	vbroadcastf128	(%r16),%ymm3
-	vbroadcasti128	(%r16),%ymm3
-	vextractf128	$1,%ymm3,(%r16)
-	vextracti128	$1,%ymm3,(%r16)
-	vinsertf128	$1,(%r16),%ymm3,%ymm8
-	vinserti128	$1,(%r16),%ymm3,%ymm8
-	vroundpd $1,(%r24),%xmm6
-	vroundps $2,(%r24),%xmm6
-	vroundsd $3,(%r24),%xmm6,%xmm3
-	vroundss $4,(%r24),%xmm6,%xmm3
 	wrssd	%r25d,0x123(%r31,%rax,4)
 	wrssq	%r31,0x123(%r31,%rax,4)
 	wrussd	%r25d,0x123(%r31,%rax,4)
diff --git a/gas/testsuite/gas/i386/x86-64-apx-ndd-optimize.d b/gas/testsuite/gas/i386/x86-64-apx-ndd-optimize.d
index 7932b0e..0036ccc 100644
--- a/gas/testsuite/gas/i386/x86-64-apx-ndd-optimize.d
+++ b/gas/testsuite/gas/i386/x86-64-apx-ndd-optimize.d
@@ -134,6 +134,16 @@ Disassembly of section .text:
 \s*[a-f0-9]+:\s*0f 4c d1             	cmovl  %ecx,%edx
 \s*[a-f0-9]+:\s*0f 4f d1             	cmovg  %ecx,%edx
 \s*[a-f0-9]+:\s*0f 4e d1             	cmovle %ecx,%edx
+\s*[a-f0-9]+:\s*0f 40 ca             	cmovo  %edx,%ecx
+\s*[a-f0-9]+:\s*0f 40 ca             	cmovo  %edx,%ecx
+\s*[a-f0-9]+:\s*49 0f 42 ca          	cmovb  %r10,%rcx
+\s*[a-f0-9]+:\s*49 0f 42 ca          	cmovb  %r10,%rcx
+\s*[a-f0-9]+:\s*44 0f 44 ca          	cmove  %edx,%r9d
+\s*[a-f0-9]+:\s*44 0f 44 ca          	cmove  %edx,%r9d
+\s*[a-f0-9]+:\s*d5 90 4a ca          	cmovp  %r18d,%ecx
+\s*[a-f0-9]+:\s*d5 90 4a ca          	cmovp  %r18d,%ecx
+\s*[a-f0-9]+:\s*d5 c8 4f ca          	cmovg  %rdx,%r17
+\s*[a-f0-9]+:\s*d5 c8 4f ca          	cmovg  %rdx,%r17
 \s*[a-f0-9]+:\s*62 f4 7d 08 60 c0    	movbe  %ax,%ax
 \s*[a-f0-9]+:\s*49 0f c8             	bswap  %r8
 \s*[a-f0-9]+:\s*d5 98 c8             	bswap  %r16
diff --git a/gas/testsuite/gas/i386/x86-64-apx-ndd-optimize.s b/gas/testsuite/gas/i386/x86-64-apx-ndd-optimize.s
index 7a2766a..aa7a9f8 100644
--- a/gas/testsuite/gas/i386/x86-64-apx-ndd-optimize.s
+++ b/gas/testsuite/gas/i386/x86-64-apx-ndd-optimize.s
@@ -128,6 +128,16 @@ cmovnge %edx,%ecx,%edx
 cmovnl %edx,%ecx,%edx
 cmovng %edx,%ecx,%edx
 cmovnle %edx,%ecx,%edx
+cfcmovo %edx,%ecx,%ecx
+cfcmovno %ecx,%edx,%ecx
+cfcmovc %r10,%rcx,%rcx
+cfcmovnc %rcx,%r10,%rcx
+cfcmove %edx,%r9d,%r9d
+cfcmovne %r9d,%edx,%r9d
+cfcmovp %r18d,%ecx,%ecx
+cfcmovnp %ecx,%r18d,%ecx
+cfcmovg %rdx,%r17,%r17
+cfcmovng %r17,%rdx,%r17
 movbe  %ax,%ax
 movbe  %r8,%r8
 movbe  %r16,%r16
diff --git a/gas/testsuite/gas/i386/x86-64-avx10_2-256-1-intel.d b/gas/testsuite/gas/i386/x86-64-avx10_2-256-1-intel.d
new file mode 100644
index 0000000..5be75c6
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-avx10_2-256-1-intel.d
@@ -0,0 +1,151 @@
+#objdump: -dw -Mintel
+#name: x86_64 AVX10.2/256 media insns (Intel disassembly)
+#source: x86-64-avx10_2-256-1.s
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+#...
+[a-f0-9]+ <_intel>:
+\s*[a-f0-9]+:\s*62 02 17 20 50 f4\s+vpdpbssd ymm30,ymm29,ymm28
+\s*[a-f0-9]+:\s*62 02 17 00 50 f4\s+vpdpbssd xmm30,xmm29,xmm28
+\s*[a-f0-9]+:\s*62 22 17 27 50 b4 f5 00 00 00 10\s+vpdpbssd ymm30\{k7\},ymm29,YMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 17 30 50 31\s+vpdpbssd ymm30,ymm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 17 20 50 71 7f\s+vpdpbssd ymm30,ymm29,YMMWORD PTR \[rcx\+0xfe0\]
+\s*[a-f0-9]+:\s*62 62 17 b7 50 72 80\s+vpdpbssd ymm30\{k7\}\{z\},ymm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 22 17 07 50 b4 f5 00 00 00 10\s+vpdpbssd xmm30\{k7\},xmm29,XMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 17 10 50 31\s+vpdpbssd xmm30,xmm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 17 00 50 71 7f\s+vpdpbssd xmm30,xmm29,XMMWORD PTR \[rcx\+0x7f0\]
+\s*[a-f0-9]+:\s*62 62 17 97 50 72 80\s+vpdpbssd xmm30\{k7\}\{z\},xmm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 02 17 20 51 f4\s+vpdpbssds ymm30,ymm29,ymm28
+\s*[a-f0-9]+:\s*62 02 17 00 51 f4\s+vpdpbssds xmm30,xmm29,xmm28
+\s*[a-f0-9]+:\s*62 22 17 27 51 b4 f5 00 00 00 10\s+vpdpbssds ymm30\{k7\},ymm29,YMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 17 30 51 31\s+vpdpbssds ymm30,ymm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 17 20 51 71 7f\s+vpdpbssds ymm30,ymm29,YMMWORD PTR \[rcx\+0xfe0\]
+\s*[a-f0-9]+:\s*62 62 17 b7 51 72 80\s+vpdpbssds ymm30\{k7\}\{z\},ymm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 22 17 07 51 b4 f5 00 00 00 10\s+vpdpbssds xmm30\{k7\},xmm29,XMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 17 10 51 31\s+vpdpbssds xmm30,xmm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 17 00 51 71 7f\s+vpdpbssds xmm30,xmm29,XMMWORD PTR \[rcx\+0x7f0\]
+\s*[a-f0-9]+:\s*62 62 17 97 51 72 80\s+vpdpbssds xmm30\{k7\}\{z\},xmm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 02 16 20 50 f4\s+vpdpbsud ymm30,ymm29,ymm28
+\s*[a-f0-9]+:\s*62 02 16 00 50 f4\s+vpdpbsud xmm30,xmm29,xmm28
+\s*[a-f0-9]+:\s*62 22 16 27 50 b4 f5 00 00 00 10\s+vpdpbsud ymm30\{k7\},ymm29,YMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 16 30 50 31\s+vpdpbsud ymm30,ymm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 16 20 50 71 7f\s+vpdpbsud ymm30,ymm29,YMMWORD PTR \[rcx\+0xfe0\]
+\s*[a-f0-9]+:\s*62 62 16 b7 50 72 80\s+vpdpbsud ymm30\{k7\}\{z\},ymm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 22 16 07 50 b4 f5 00 00 00 10\s+vpdpbsud xmm30\{k7\},xmm29,XMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 16 10 50 31\s+vpdpbsud xmm30,xmm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 16 00 50 71 7f\s+vpdpbsud xmm30,xmm29,XMMWORD PTR \[rcx\+0x7f0\]
+\s*[a-f0-9]+:\s*62 62 16 97 50 72 80\s+vpdpbsud xmm30\{k7\}\{z\},xmm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 02 16 20 51 f4\s+vpdpbsuds ymm30,ymm29,ymm28
+\s*[a-f0-9]+:\s*62 02 16 00 51 f4\s+vpdpbsuds xmm30,xmm29,xmm28
+\s*[a-f0-9]+:\s*62 22 16 27 51 b4 f5 00 00 00 10\s+vpdpbsuds ymm30\{k7\},ymm29,YMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 16 30 51 31\s+vpdpbsuds ymm30,ymm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 16 20 51 71 7f\s+vpdpbsuds ymm30,ymm29,YMMWORD PTR \[rcx\+0xfe0\]
+\s*[a-f0-9]+:\s*62 62 16 b7 51 72 80\s+vpdpbsuds ymm30\{k7\}\{z\},ymm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 22 16 07 51 b4 f5 00 00 00 10\s+vpdpbsuds xmm30\{k7\},xmm29,XMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 16 10 51 31\s+vpdpbsuds xmm30,xmm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 16 00 51 71 7f\s+vpdpbsuds xmm30,xmm29,XMMWORD PTR \[rcx\+0x7f0\]
+\s*[a-f0-9]+:\s*62 62 16 97 51 72 80\s+vpdpbsuds xmm30\{k7\}\{z\},xmm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 02 14 20 50 f4\s+vpdpbuud ymm30,ymm29,ymm28
+\s*[a-f0-9]+:\s*62 02 14 00 50 f4\s+vpdpbuud xmm30,xmm29,xmm28
+\s*[a-f0-9]+:\s*62 22 14 27 50 b4 f5 00 00 00 10\s+vpdpbuud ymm30\{k7\},ymm29,YMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 14 30 50 31\s+vpdpbuud ymm30,ymm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 14 20 50 71 7f\s+vpdpbuud ymm30,ymm29,YMMWORD PTR \[rcx\+0xfe0\]
+\s*[a-f0-9]+:\s*62 62 14 b7 50 72 80\s+vpdpbuud ymm30\{k7\}\{z\},ymm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 22 14 07 50 b4 f5 00 00 00 10\s+vpdpbuud xmm30\{k7\},xmm29,XMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 14 10 50 31\s+vpdpbuud xmm30,xmm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 14 00 50 71 7f\s+vpdpbuud xmm30,xmm29,XMMWORD PTR \[rcx\+0x7f0\]
+\s*[a-f0-9]+:\s*62 62 14 97 50 72 80\s+vpdpbuud xmm30\{k7\}\{z\},xmm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 02 14 20 51 f4\s+vpdpbuuds ymm30,ymm29,ymm28
+\s*[a-f0-9]+:\s*62 02 14 00 51 f4\s+vpdpbuuds xmm30,xmm29,xmm28
+\s*[a-f0-9]+:\s*62 22 14 27 51 b4 f5 00 00 00 10\s+vpdpbuuds ymm30\{k7\},ymm29,YMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 14 30 51 31\s+vpdpbuuds ymm30,ymm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 14 20 51 71 7f\s+vpdpbuuds ymm30,ymm29,YMMWORD PTR \[rcx\+0xfe0\]
+\s*[a-f0-9]+:\s*62 62 14 b7 51 72 80\s+vpdpbuuds ymm30\{k7\}\{z\},ymm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 22 14 07 51 b4 f5 00 00 00 10\s+vpdpbuuds xmm30\{k7\},xmm29,XMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 14 10 51 31\s+vpdpbuuds xmm30,xmm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 14 00 51 71 7f\s+vpdpbuuds xmm30,xmm29,XMMWORD PTR \[rcx\+0x7f0\]
+\s*[a-f0-9]+:\s*62 62 14 97 51 72 80\s+vpdpbuuds xmm30\{k7\}\{z\},xmm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 02 16 20 d2 f4\s+vpdpwsud ymm30,ymm29,ymm28
+\s*[a-f0-9]+:\s*62 02 16 00 d2 f4\s+vpdpwsud xmm30,xmm29,xmm28
+\s*[a-f0-9]+:\s*62 22 16 27 d2 b4 f5 00 00 00 10\s+vpdpwsud ymm30\{k7\},ymm29,YMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 16 30 d2 31\s+vpdpwsud ymm30,ymm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 16 20 d2 71 7f\s+vpdpwsud ymm30,ymm29,YMMWORD PTR \[rcx\+0xfe0\]
+\s*[a-f0-9]+:\s*62 62 16 b7 d2 72 80\s+vpdpwsud ymm30\{k7\}\{z\},ymm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 22 16 07 d2 b4 f5 00 00 00 10\s+vpdpwsud xmm30\{k7\},xmm29,XMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 16 10 d2 31\s+vpdpwsud xmm30,xmm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 16 00 d2 71 7f\s+vpdpwsud xmm30,xmm29,XMMWORD PTR \[rcx\+0x7f0\]
+\s*[a-f0-9]+:\s*62 62 16 97 d2 72 80\s+vpdpwsud xmm30\{k7\}\{z\},xmm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 02 16 20 d3 f4\s+vpdpwsuds ymm30,ymm29,ymm28
+\s*[a-f0-9]+:\s*62 02 16 00 d3 f4\s+vpdpwsuds xmm30,xmm29,xmm28
+\s*[a-f0-9]+:\s*62 22 16 27 d3 b4 f5 00 00 00 10\s+vpdpwsuds ymm30\{k7\},ymm29,YMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 16 30 d3 31\s+vpdpwsuds ymm30,ymm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 16 20 d3 71 7f\s+vpdpwsuds ymm30,ymm29,YMMWORD PTR \[rcx\+0xfe0\]
+\s*[a-f0-9]+:\s*62 62 16 b7 d3 72 80\s+vpdpwsuds ymm30\{k7\}\{z\},ymm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 22 16 07 d3 b4 f5 00 00 00 10\s+vpdpwsuds xmm30\{k7\},xmm29,XMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 16 10 d3 31\s+vpdpwsuds xmm30,xmm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 16 00 d3 71 7f\s+vpdpwsuds xmm30,xmm29,XMMWORD PTR \[rcx\+0x7f0\]
+\s*[a-f0-9]+:\s*62 62 16 97 d3 72 80\s+vpdpwsuds xmm30\{k7\}\{z\},xmm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 02 15 20 d2 f4\s+vpdpwusd ymm30,ymm29,ymm28
+\s*[a-f0-9]+:\s*62 02 15 00 d2 f4\s+vpdpwusd xmm30,xmm29,xmm28
+\s*[a-f0-9]+:\s*62 22 15 27 d2 b4 f5 00 00 00 10\s+vpdpwusd ymm30\{k7\},ymm29,YMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 15 30 d2 31\s+vpdpwusd ymm30,ymm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 15 20 d2 71 7f\s+vpdpwusd ymm30,ymm29,YMMWORD PTR \[rcx\+0xfe0\]
+\s*[a-f0-9]+:\s*62 62 15 b7 d2 72 80\s+vpdpwusd ymm30\{k7\}\{z\},ymm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 22 15 07 d2 b4 f5 00 00 00 10\s+vpdpwusd xmm30\{k7\},xmm29,XMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 15 10 d2 31\s+vpdpwusd xmm30,xmm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 15 00 d2 71 7f\s+vpdpwusd xmm30,xmm29,XMMWORD PTR \[rcx\+0x7f0\]
+\s*[a-f0-9]+:\s*62 62 15 97 d2 72 80\s+vpdpwusd xmm30\{k7\}\{z\},xmm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 02 15 20 d3 f4\s+vpdpwusds ymm30,ymm29,ymm28
+\s*[a-f0-9]+:\s*62 02 15 00 d3 f4\s+vpdpwusds xmm30,xmm29,xmm28
+\s*[a-f0-9]+:\s*62 22 15 27 d3 b4 f5 00 00 00 10\s+vpdpwusds ymm30\{k7\},ymm29,YMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 15 30 d3 31\s+vpdpwusds ymm30,ymm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 15 20 d3 71 7f\s+vpdpwusds ymm30,ymm29,YMMWORD PTR \[rcx\+0xfe0\]
+\s*[a-f0-9]+:\s*62 62 15 b7 d3 72 80\s+vpdpwusds ymm30\{k7\}\{z\},ymm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 22 15 07 d3 b4 f5 00 00 00 10\s+vpdpwusds xmm30\{k7\},xmm29,XMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 15 10 d3 31\s+vpdpwusds xmm30,xmm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 15 00 d3 71 7f\s+vpdpwusds xmm30,xmm29,XMMWORD PTR \[rcx\+0x7f0\]
+\s*[a-f0-9]+:\s*62 62 15 97 d3 72 80\s+vpdpwusds xmm30\{k7\}\{z\},xmm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 02 14 20 d2 f4\s+vpdpwuud ymm30,ymm29,ymm28
+\s*[a-f0-9]+:\s*62 02 14 00 d2 f4\s+vpdpwuud xmm30,xmm29,xmm28
+\s*[a-f0-9]+:\s*62 22 14 27 d2 b4 f5 00 00 00 10\s+vpdpwuud ymm30\{k7\},ymm29,YMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 14 30 d2 31\s+vpdpwuud ymm30,ymm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 14 20 d2 71 7f\s+vpdpwuud ymm30,ymm29,YMMWORD PTR \[rcx\+0xfe0\]
+\s*[a-f0-9]+:\s*62 62 14 b7 d2 72 80\s+vpdpwuud ymm30\{k7\}\{z\},ymm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 22 14 07 d2 b4 f5 00 00 00 10\s+vpdpwuud xmm30\{k7\},xmm29,XMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 14 10 d2 31\s+vpdpwuud xmm30,xmm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 14 00 d2 71 7f\s+vpdpwuud xmm30,xmm29,XMMWORD PTR \[rcx\+0x7f0\]
+\s*[a-f0-9]+:\s*62 62 14 97 d2 72 80\s+vpdpwuud xmm30\{k7\}\{z\},xmm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 02 14 20 d3 f4\s+vpdpwuuds ymm30,ymm29,ymm28
+\s*[a-f0-9]+:\s*62 02 14 00 d3 f4\s+vpdpwuuds xmm30,xmm29,xmm28
+\s*[a-f0-9]+:\s*62 22 14 27 d3 b4 f5 00 00 00 10\s+vpdpwuuds ymm30\{k7\},ymm29,YMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 14 30 d3 31\s+vpdpwuuds ymm30,ymm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 14 20 d3 71 7f\s+vpdpwuuds ymm30,ymm29,YMMWORD PTR \[rcx\+0xfe0\]
+\s*[a-f0-9]+:\s*62 62 14 b7 d3 72 80\s+vpdpwuuds ymm30\{k7\}\{z\},ymm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 22 14 07 d3 b4 f5 00 00 00 10\s+vpdpwuuds xmm30\{k7\},xmm29,XMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 14 10 d3 31\s+vpdpwuuds xmm30,xmm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 14 00 d3 71 7f\s+vpdpwuuds xmm30,xmm29,XMMWORD PTR \[rcx\+0x7f0\]
+\s*[a-f0-9]+:\s*62 62 14 97 d3 72 80\s+vpdpwuuds xmm30\{k7\}\{z\},xmm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 02 14 20 52 f4\s+vdpphps ymm30,ymm29,ymm28
+\s*[a-f0-9]+:\s*62 02 14 00 52 f4\s+vdpphps xmm30,xmm29,xmm28
+\s*[a-f0-9]+:\s*62 22 14 27 52 b4 f5 00 00 00 10\s+vdpphps ymm30\{k7\},ymm29,YMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 14 30 52 31\s+vdpphps ymm30,ymm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 14 20 52 71 7f\s+vdpphps ymm30,ymm29,YMMWORD PTR \[rcx\+0xfe0\]
+\s*[a-f0-9]+:\s*62 62 14 b7 52 72 80\s+vdpphps ymm30\{k7\}\{z\},ymm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 22 14 07 52 b4 f5 00 00 00 10\s+vdpphps xmm30\{k7\},xmm29,XMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 14 10 52 31\s+vdpphps xmm30,xmm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 14 00 52 71 7f\s+vdpphps xmm30,xmm29,XMMWORD PTR \[rcx\+0x7f0\]
+\s*[a-f0-9]+:\s*62 62 14 97 52 72 80\s+vdpphps xmm30\{k7\}\{z\},xmm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 03 16 00 42 f4 7b\s+vmpsadbw xmm30,xmm29,xmm28,0x7b
+\s*[a-f0-9]+:\s*62 03 16 20 42 f4 7b\s+vmpsadbw ymm30,ymm29,ymm28,0x7b
+\s*[a-f0-9]+:\s*62 23 16 27 42 b4 f5 00 00 00 10 7b\s+vmpsadbw ymm30\{k7\},ymm29,YMMWORD PTR \[rbp\+r14\*8\+0x10000000\],0x7b
+\s*[a-f0-9]+:\s*62 43 16 20 42 31 7b\s+vmpsadbw ymm30,ymm29,YMMWORD PTR \[r9\],0x7b
+\s*[a-f0-9]+:\s*62 63 16 20 42 71 7f 7b\s+vmpsadbw ymm30,ymm29,YMMWORD PTR \[rcx\+0xfe0\],0x7b
+\s*[a-f0-9]+:\s*62 63 16 a7 42 72 80 7b\s+vmpsadbw ymm30\{k7\}\{z\},ymm29,YMMWORD PTR \[rdx-0x1000\],0x7b
+\s*[a-f0-9]+:\s*62 23 16 07 42 b4 f5 00 00 00 10 7b\s+vmpsadbw xmm30\{k7\},xmm29,XMMWORD PTR \[rbp\+r14\*8\+0x10000000\],0x7b
+\s*[a-f0-9]+:\s*62 43 16 00 42 31 7b\s+vmpsadbw xmm30,xmm29,XMMWORD PTR \[r9\],0x7b
+\s*[a-f0-9]+:\s*62 63 16 00 42 71 7f 7b\s+vmpsadbw xmm30,xmm29,XMMWORD PTR \[rcx\+0x7f0\],0x7b
+\s*[a-f0-9]+:\s*62 63 16 87 42 72 80 7b\s+vmpsadbw xmm30\{k7\}\{z\},xmm29,XMMWORD PTR \[rdx-0x800\],0x7b
+#pass
diff --git a/gas/testsuite/gas/i386/x86-64-avx10_2-256-1.d b/gas/testsuite/gas/i386/x86-64-avx10_2-256-1.d
new file mode 100644
index 0000000..a512a53
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-avx10_2-256-1.d
@@ -0,0 +1,149 @@
+#objdump: -dw
+#name: x86_64 AVX10.2/256 media insns
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+0+ <_start>:
+\s*[a-f0-9]+:\s*62 02 17 20 50 f4\s+vpdpbssd %ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 02 17 00 50 f4\s+vpdpbssd %xmm28,%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 22 17 27 50 b4 f5 00 00 00 10\s+vpdpbssd 0x10000000\(%rbp,%r14,8\),%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 17 30 50 31\s+vpdpbssd \(%r9\)\{1to8\},%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 62 17 20 50 71 7f\s+vpdpbssd 0xfe0\(%rcx\),%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 62 17 b7 50 72 80\s+vpdpbssd -0x200\(%rdx\)\{1to8\},%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 22 17 07 50 b4 f5 00 00 00 10\s+vpdpbssd 0x10000000\(%rbp,%r14,8\),%xmm29,%xmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 17 10 50 31\s+vpdpbssd \(%r9\)\{1to4\},%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 62 17 00 50 71 7f\s+vpdpbssd 0x7f0\(%rcx\),%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 62 17 97 50 72 80\s+vpdpbssd -0x200\(%rdx\)\{1to4\},%xmm29,%xmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 17 20 51 f4\s+vpdpbssds %ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 02 17 00 51 f4\s+vpdpbssds %xmm28,%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 22 17 27 51 b4 f5 00 00 00 10\s+vpdpbssds 0x10000000\(%rbp,%r14,8\),%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 17 30 51 31\s+vpdpbssds \(%r9\)\{1to8\},%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 62 17 20 51 71 7f\s+vpdpbssds 0xfe0\(%rcx\),%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 62 17 b7 51 72 80\s+vpdpbssds -0x200\(%rdx\)\{1to8\},%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 22 17 07 51 b4 f5 00 00 00 10\s+vpdpbssds 0x10000000\(%rbp,%r14,8\),%xmm29,%xmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 17 10 51 31\s+vpdpbssds \(%r9\)\{1to4\},%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 62 17 00 51 71 7f\s+vpdpbssds 0x7f0\(%rcx\),%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 62 17 97 51 72 80\s+vpdpbssds -0x200\(%rdx\)\{1to4\},%xmm29,%xmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 16 20 50 f4\s+vpdpbsud %ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 02 16 00 50 f4\s+vpdpbsud %xmm28,%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 22 16 27 50 b4 f5 00 00 00 10\s+vpdpbsud 0x10000000\(%rbp,%r14,8\),%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 16 30 50 31\s+vpdpbsud \(%r9\)\{1to8\},%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 62 16 20 50 71 7f\s+vpdpbsud 0xfe0\(%rcx\),%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 62 16 b7 50 72 80\s+vpdpbsud -0x200\(%rdx\)\{1to8\},%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 22 16 07 50 b4 f5 00 00 00 10\s+vpdpbsud 0x10000000\(%rbp,%r14,8\),%xmm29,%xmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 16 10 50 31\s+vpdpbsud \(%r9\)\{1to4\},%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 62 16 00 50 71 7f\s+vpdpbsud 0x7f0\(%rcx\),%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 62 16 97 50 72 80\s+vpdpbsud -0x200\(%rdx\)\{1to4\},%xmm29,%xmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 16 20 51 f4\s+vpdpbsuds %ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 02 16 00 51 f4\s+vpdpbsuds %xmm28,%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 22 16 27 51 b4 f5 00 00 00 10\s+vpdpbsuds 0x10000000\(%rbp,%r14,8\),%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 16 30 51 31\s+vpdpbsuds \(%r9\)\{1to8\},%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 62 16 20 51 71 7f\s+vpdpbsuds 0xfe0\(%rcx\),%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 62 16 b7 51 72 80\s+vpdpbsuds -0x200\(%rdx\)\{1to8\},%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 22 16 07 51 b4 f5 00 00 00 10\s+vpdpbsuds 0x10000000\(%rbp,%r14,8\),%xmm29,%xmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 16 10 51 31\s+vpdpbsuds \(%r9\)\{1to4\},%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 62 16 00 51 71 7f\s+vpdpbsuds 0x7f0\(%rcx\),%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 62 16 97 51 72 80\s+vpdpbsuds -0x200\(%rdx\)\{1to4\},%xmm29,%xmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 14 20 50 f4\s+vpdpbuud %ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 02 14 00 50 f4\s+vpdpbuud %xmm28,%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 22 14 27 50 b4 f5 00 00 00 10\s+vpdpbuud 0x10000000\(%rbp,%r14,8\),%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 14 30 50 31\s+vpdpbuud \(%r9\)\{1to8\},%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 62 14 20 50 71 7f\s+vpdpbuud 0xfe0\(%rcx\),%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 62 14 b7 50 72 80\s+vpdpbuud -0x200\(%rdx\)\{1to8\},%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 22 14 07 50 b4 f5 00 00 00 10\s+vpdpbuud 0x10000000\(%rbp,%r14,8\),%xmm29,%xmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 14 10 50 31\s+vpdpbuud \(%r9\)\{1to4\},%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 62 14 00 50 71 7f\s+vpdpbuud 0x7f0\(%rcx\),%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 62 14 97 50 72 80\s+vpdpbuud -0x200\(%rdx\)\{1to4\},%xmm29,%xmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 14 20 51 f4\s+vpdpbuuds %ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 02 14 00 51 f4\s+vpdpbuuds %xmm28,%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 22 14 27 51 b4 f5 00 00 00 10\s+vpdpbuuds 0x10000000\(%rbp,%r14,8\),%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 14 30 51 31\s+vpdpbuuds \(%r9\)\{1to8\},%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 62 14 20 51 71 7f\s+vpdpbuuds 0xfe0\(%rcx\),%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 62 14 b7 51 72 80\s+vpdpbuuds -0x200\(%rdx\)\{1to8\},%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 22 14 07 51 b4 f5 00 00 00 10\s+vpdpbuuds 0x10000000\(%rbp,%r14,8\),%xmm29,%xmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 14 10 51 31\s+vpdpbuuds \(%r9\)\{1to4\},%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 62 14 00 51 71 7f\s+vpdpbuuds 0x7f0\(%rcx\),%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 62 14 97 51 72 80\s+vpdpbuuds -0x200\(%rdx\)\{1to4\},%xmm29,%xmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 16 20 d2 f4\s+vpdpwsud %ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 02 16 00 d2 f4\s+vpdpwsud %xmm28,%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 22 16 27 d2 b4 f5 00 00 00 10\s+vpdpwsud 0x10000000\(%rbp,%r14,8\),%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 16 30 d2 31\s+vpdpwsud \(%r9\)\{1to8\},%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 62 16 20 d2 71 7f\s+vpdpwsud 0xfe0\(%rcx\),%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 62 16 b7 d2 72 80\s+vpdpwsud -0x200\(%rdx\)\{1to8\},%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 22 16 07 d2 b4 f5 00 00 00 10\s+vpdpwsud 0x10000000\(%rbp,%r14,8\),%xmm29,%xmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 16 10 d2 31\s+vpdpwsud \(%r9\)\{1to4\},%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 62 16 00 d2 71 7f\s+vpdpwsud 0x7f0\(%rcx\),%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 62 16 97 d2 72 80\s+vpdpwsud -0x200\(%rdx\)\{1to4\},%xmm29,%xmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 16 20 d3 f4\s+vpdpwsuds %ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 02 16 00 d3 f4\s+vpdpwsuds %xmm28,%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 22 16 27 d3 b4 f5 00 00 00 10\s+vpdpwsuds 0x10000000\(%rbp,%r14,8\),%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 16 30 d3 31\s+vpdpwsuds \(%r9\)\{1to8\},%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 62 16 20 d3 71 7f\s+vpdpwsuds 0xfe0\(%rcx\),%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 62 16 b7 d3 72 80\s+vpdpwsuds -0x200\(%rdx\)\{1to8\},%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 22 16 07 d3 b4 f5 00 00 00 10\s+vpdpwsuds 0x10000000\(%rbp,%r14,8\),%xmm29,%xmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 16 10 d3 31\s+vpdpwsuds \(%r9\)\{1to4\},%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 62 16 00 d3 71 7f\s+vpdpwsuds 0x7f0\(%rcx\),%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 62 16 97 d3 72 80\s+vpdpwsuds -0x200\(%rdx\)\{1to4\},%xmm29,%xmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 15 20 d2 f4\s+vpdpwusd %ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 02 15 00 d2 f4\s+vpdpwusd %xmm28,%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 22 15 27 d2 b4 f5 00 00 00 10\s+vpdpwusd 0x10000000\(%rbp,%r14,8\),%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 15 30 d2 31\s+vpdpwusd \(%r9\)\{1to8\},%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 62 15 20 d2 71 7f\s+vpdpwusd 0xfe0\(%rcx\),%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 62 15 b7 d2 72 80\s+vpdpwusd -0x200\(%rdx\)\{1to8\},%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 22 15 07 d2 b4 f5 00 00 00 10\s+vpdpwusd 0x10000000\(%rbp,%r14,8\),%xmm29,%xmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 15 10 d2 31\s+vpdpwusd \(%r9\)\{1to4\},%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 62 15 00 d2 71 7f\s+vpdpwusd 0x7f0\(%rcx\),%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 62 15 97 d2 72 80\s+vpdpwusd -0x200\(%rdx\)\{1to4\},%xmm29,%xmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 15 20 d3 f4\s+vpdpwusds %ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 02 15 00 d3 f4\s+vpdpwusds %xmm28,%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 22 15 27 d3 b4 f5 00 00 00 10\s+vpdpwusds 0x10000000\(%rbp,%r14,8\),%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 15 30 d3 31\s+vpdpwusds \(%r9\)\{1to8\},%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 62 15 20 d3 71 7f\s+vpdpwusds 0xfe0\(%rcx\),%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 62 15 b7 d3 72 80\s+vpdpwusds -0x200\(%rdx\)\{1to8\},%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 22 15 07 d3 b4 f5 00 00 00 10\s+vpdpwusds 0x10000000\(%rbp,%r14,8\),%xmm29,%xmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 15 10 d3 31\s+vpdpwusds \(%r9\)\{1to4\},%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 62 15 00 d3 71 7f\s+vpdpwusds 0x7f0\(%rcx\),%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 62 15 97 d3 72 80\s+vpdpwusds -0x200\(%rdx\)\{1to4\},%xmm29,%xmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 14 20 d2 f4\s+vpdpwuud %ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 02 14 00 d2 f4\s+vpdpwuud %xmm28,%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 22 14 27 d2 b4 f5 00 00 00 10\s+vpdpwuud 0x10000000\(%rbp,%r14,8\),%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 14 30 d2 31\s+vpdpwuud \(%r9\)\{1to8\},%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 62 14 20 d2 71 7f\s+vpdpwuud 0xfe0\(%rcx\),%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 62 14 b7 d2 72 80\s+vpdpwuud -0x200\(%rdx\)\{1to8\},%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 22 14 07 d2 b4 f5 00 00 00 10\s+vpdpwuud 0x10000000\(%rbp,%r14,8\),%xmm29,%xmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 14 10 d2 31\s+vpdpwuud \(%r9\)\{1to4\},%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 62 14 00 d2 71 7f\s+vpdpwuud 0x7f0\(%rcx\),%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 62 14 97 d2 72 80\s+vpdpwuud -0x200\(%rdx\)\{1to4\},%xmm29,%xmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 14 20 d3 f4\s+vpdpwuuds %ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 02 14 00 d3 f4\s+vpdpwuuds %xmm28,%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 22 14 27 d3 b4 f5 00 00 00 10\s+vpdpwuuds 0x10000000\(%rbp,%r14,8\),%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 14 30 d3 31\s+vpdpwuuds \(%r9\)\{1to8\},%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 62 14 20 d3 71 7f\s+vpdpwuuds 0xfe0\(%rcx\),%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 62 14 b7 d3 72 80\s+vpdpwuuds -0x200\(%rdx\)\{1to8\},%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 22 14 07 d3 b4 f5 00 00 00 10\s+vpdpwuuds 0x10000000\(%rbp,%r14,8\),%xmm29,%xmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 14 10 d3 31\s+vpdpwuuds \(%r9\)\{1to4\},%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 62 14 00 d3 71 7f\s+vpdpwuuds 0x7f0\(%rcx\),%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 62 14 97 d3 72 80\s+vpdpwuuds -0x200\(%rdx\)\{1to4\},%xmm29,%xmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 14 20 52 f4\s+vdpphps %ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 02 14 00 52 f4\s+vdpphps %xmm28,%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 22 14 27 52 b4 f5 00 00 00 10\s+vdpphps 0x10000000\(%rbp,%r14,8\),%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 14 30 52 31\s+vdpphps \(%r9\)\{1to8\},%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 62 14 20 52 71 7f\s+vdpphps 0xfe0\(%rcx\),%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 62 14 b7 52 72 80\s+vdpphps -0x200\(%rdx\)\{1to8\},%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 22 14 07 52 b4 f5 00 00 00 10\s+vdpphps 0x10000000\(%rbp,%r14,8\),%xmm29,%xmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 14 10 52 31\s+vdpphps \(%r9\)\{1to4\},%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 62 14 00 52 71 7f\s+vdpphps 0x7f0\(%rcx\),%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 62 14 97 52 72 80\s+vdpphps -0x200\(%rdx\)\{1to4\},%xmm29,%xmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 03 16 00 42 f4 7b\s+vmpsadbw \$0x7b,%xmm28,%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 03 16 20 42 f4 7b\s+vmpsadbw \$0x7b,%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 23 16 27 42 b4 f5 00 00 00 10 7b\s+vmpsadbw \$0x7b,0x10000000\(%rbp,%r14,8\),%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 43 16 20 42 31 7b\s+vmpsadbw \$0x7b,\(%r9\),%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 63 16 20 42 71 7f 7b\s+vmpsadbw \$0x7b,0xfe0\(%rcx\),%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 63 16 a7 42 72 80 7b\s+vmpsadbw \$0x7b,-0x1000\(%rdx\),%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 23 16 07 42 b4 f5 00 00 00 10 7b\s+vmpsadbw \$0x7b,0x10000000\(%rbp,%r14,8\),%xmm29,%xmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 43 16 00 42 31 7b\s+vmpsadbw \$0x7b,\(%r9\),%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 63 16 00 42 71 7f 7b\s+vmpsadbw \$0x7b,0x7f0\(%rcx\),%xmm29,%xmm30
+\s*[a-f0-9]+:\s*62 63 16 87 42 72 80 7b\s+vmpsadbw \$0x7b,-0x800\(%rdx\),%xmm29,%xmm30\{%k7\}\{z\}
+#pass
diff --git a/gas/testsuite/gas/i386/x86-64-avx10_2-256-1.s b/gas/testsuite/gas/i386/x86-64-avx10_2-256-1.s
new file mode 100644
index 0000000..8f58d39
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-avx10_2-256-1.s
@@ -0,0 +1,111 @@
+# Check 64bit AVX10.2/256 instructions
+
+	.arch generic64
+	.arch .avx10.2/256
+	.text
+_start:
+	.irp m, ss, su, uu
+	.irp s, "", s
+	vpdpb\m\()d\s	%ymm28, %ymm29, %ymm30
+	vpdpb\m\()d\s	%xmm28, %xmm29, %xmm30
+	vpdpb\m\()d\s	0x10000000(%rbp, %r14, 8), %ymm29, %ymm30{%k7}
+	vpdpb\m\()d\s	(%r9){1to8}, %ymm29, %ymm30
+	vpdpb\m\()d\s	4064(%rcx), %ymm29, %ymm30
+	vpdpb\m\()d\s	-512(%rdx){1to8}, %ymm29, %ymm30{%k7}{z}
+	vpdpb\m\()d\s	0x10000000(%rbp, %r14, 8), %xmm29, %xmm30{%k7}
+	vpdpb\m\()d\s	(%r9){1to4}, %xmm29, %xmm30
+	vpdpb\m\()d\s	2032(%rcx), %xmm29, %xmm30
+	vpdpb\m\()d\s	-512(%rdx){1to4}, %xmm29, %xmm30{%k7}{z}
+	.endr
+	.endr
+
+	.irp m, su, us, uu
+	.irp s, "", s
+	vpdpw\m\()d\s	%ymm28, %ymm29, %ymm30
+	vpdpw\m\()d\s	%xmm28, %xmm29, %xmm30
+	vpdpw\m\()d\s	0x10000000(%rbp, %r14, 8), %ymm29, %ymm30{%k7}
+	vpdpw\m\()d\s	(%r9){1to8}, %ymm29, %ymm30
+	vpdpw\m\()d\s	4064(%rcx), %ymm29, %ymm30
+	vpdpw\m\()d\s	-512(%rdx){1to8}, %ymm29, %ymm30{%k7}{z}
+	vpdpw\m\()d\s	0x10000000(%rbp, %r14, 8), %xmm29, %xmm30{%k7}
+	vpdpw\m\()d\s	(%r9){1to4}, %xmm29, %xmm30
+	vpdpw\m\()d\s	2032(%rcx), %xmm29, %xmm30
+	vpdpw\m\()d\s	-512(%rdx){1to4}, %xmm29, %xmm30{%k7}{z}
+	.endr
+	.endr
+
+	vdpphps	%ymm28, %ymm29, %ymm30
+	vdpphps	%xmm28, %xmm29, %xmm30
+	vdpphps	0x10000000(%rbp, %r14, 8), %ymm29, %ymm30{%k7}
+	vdpphps	(%r9){1to8}, %ymm29, %ymm30
+	vdpphps	4064(%rcx), %ymm29, %ymm30
+	vdpphps	-512(%rdx){1to8}, %ymm29, %ymm30{%k7}{z}
+	vdpphps	0x10000000(%rbp, %r14, 8), %xmm29, %xmm30{%k7}
+	vdpphps	(%r9){1to4}, %xmm29, %xmm30
+	vdpphps	2032(%rcx), %xmm29, %xmm30
+	vdpphps	-512(%rdx){1to4}, %xmm29, %xmm30{%k7}{z}
+
+	vmpsadbw	$123, %xmm28, %xmm29, %xmm30
+	vmpsadbw	$123, %ymm28, %ymm29, %ymm30
+	vmpsadbw	$123, 0x10000000(%rbp, %r14, 8), %ymm29, %ymm30{%k7}
+	vmpsadbw	$123, (%r9), %ymm29, %ymm30
+	vmpsadbw	$123, 4064(%rcx), %ymm29, %ymm30
+	vmpsadbw	$123, -4096(%rdx), %ymm29, %ymm30{%k7}{z}
+	vmpsadbw	$123, 0x10000000(%rbp, %r14, 8), %xmm29, %xmm30{%k7}
+	vmpsadbw	$123, (%r9), %xmm29, %xmm30
+	vmpsadbw	$123, 2032(%rcx), %xmm29, %xmm30
+	vmpsadbw	$123, -2048(%rdx), %xmm29, %xmm30{%k7}{z}
+
+_intel:
+	.intel_syntax noprefix
+	.irp m, ss, su, uu
+	.irp s, "", s
+	vpdpb\m\()d\s	ymm30, ymm29, ymm28
+	vpdpb\m\()d\s	xmm30, xmm29, xmm28
+	vpdpb\m\()d\s	ymm30{k7}, ymm29, YMMWORD PTR [rbp+r14*8+0x10000000]
+	vpdpb\m\()d\s	ymm30, ymm29, DWORD PTR [r9]{1to8}
+	vpdpb\m\()d\s	ymm30, ymm29, YMMWORD PTR [rcx+4064]
+	vpdpb\m\()d\s	ymm30{k7}{z}, ymm29, DWORD PTR [rdx-512]{1to8}
+	vpdpb\m\()d\s	xmm30{k7}, xmm29, XMMWORD PTR [rbp+r14*8+0x10000000]
+	vpdpb\m\()d\s	xmm30, xmm29, DWORD PTR [r9]{1to4}
+	vpdpb\m\()d\s	xmm30, xmm29, XMMWORD PTR [rcx+2032]
+	vpdpb\m\()d\s	xmm30{k7}{z}, xmm29, DWORD PTR [rdx-512]{1to4}
+	.endr
+	.endr
+
+	.irp m, su, us, uu
+	.irp s, "", s
+	vpdpw\m\()d\s	ymm30, ymm29, ymm28
+	vpdpw\m\()d\s	xmm30, xmm29, xmm28
+	vpdpw\m\()d\s	ymm30{k7}, ymm29, YMMWORD PTR [rbp+r14*8+0x10000000]
+	vpdpw\m\()d\s	ymm30, ymm29, DWORD PTR [r9]{1to8}
+	vpdpw\m\()d\s	ymm30, ymm29, YMMWORD PTR [rcx+4064]
+	vpdpw\m\()d\s	ymm30{k7}{z}, ymm29, DWORD PTR [rdx-512]{1to8}
+	vpdpw\m\()d\s	xmm30{k7}, xmm29, XMMWORD PTR [rbp+r14*8+0x10000000]
+	vpdpw\m\()d\s	xmm30, xmm29, DWORD PTR [r9]{1to4}
+	vpdpw\m\()d\s	xmm30, xmm29, XMMWORD PTR [rcx+2032]
+	vpdpw\m\()d\s	xmm30{k7}{z}, xmm29, DWORD PTR [rdx-512]{1to4}
+	.endr
+	.endr
+
+	vdpphps	ymm30, ymm29, ymm28
+	vdpphps	xmm30, xmm29, xmm28
+	vdpphps	ymm30{k7}, ymm29, YMMWORD PTR [rbp+r14*8+0x10000000]
+	vdpphps	ymm30, ymm29, DWORD PTR [r9]{1to8}
+	vdpphps	ymm30, ymm29, YMMWORD PTR [rcx+4064]
+	vdpphps	ymm30{k7}{z}, ymm29, DWORD PTR [rdx-512]{1to8}
+	vdpphps	xmm30{k7}, xmm29, XMMWORD PTR [rbp+r14*8+0x10000000]
+	vdpphps	xmm30, xmm29, DWORD PTR [r9]{1to4}
+	vdpphps	xmm30, xmm29, XMMWORD PTR [rcx+2032]
+	vdpphps	xmm30{k7}{z}, xmm29, DWORD PTR [rdx-512]{1to4}
+
+	vmpsadbw	xmm30, xmm29, xmm28, 123
+	vmpsadbw	ymm30, ymm29, ymm28, 123
+	vmpsadbw	ymm30{k7}, ymm29, YMMWORD PTR [rbp+r14*8+0x10000000], 123
+	vmpsadbw	ymm30, ymm29, YMMWORD PTR [r9], 123
+	vmpsadbw	ymm30, ymm29, YMMWORD PTR [rcx+4064], 123
+	vmpsadbw	ymm30{k7}{z}, ymm29, YMMWORD PTR [rdx-4096], 123
+	vmpsadbw	xmm30{k7}, xmm29, XMMWORD PTR [rbp+r14*8+0x10000000], 123
+	vmpsadbw	xmm30, xmm29, XMMWORD PTR [r9], 123
+	vmpsadbw	xmm30, xmm29, XMMWORD PTR [rcx+2032], 123
+	vmpsadbw	xmm30{k7}{z}, xmm29, XMMWORD PTR [rdx-2048], 123
diff --git a/gas/testsuite/gas/i386/x86-64-avx10_2-512-1-intel.d b/gas/testsuite/gas/i386/x86-64-avx10_2-512-1-intel.d
new file mode 100644
index 0000000..0049b0a
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-avx10_2-512-1-intel.d
@@ -0,0 +1,81 @@
+#objdump: -dw -Mintel
+#name: x86_64 AVX10.2/512 media insns (Intel disassembly)
+#source: x86-64-avx10_2-512-1.s
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+#...
+[a-f0-9]+ <_intel>:
+\s*[a-f0-9]+:\s*62 02 17 40 50 f4\s+vpdpbssd zmm30,zmm29,zmm28
+\s*[a-f0-9]+:\s*62 22 17 47 50 b4 f5 00 00 00 10\s+vpdpbssd zmm30\{k7\},zmm29,ZMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 17 50 50 31\s+vpdpbssd zmm30,zmm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 17 40 50 71 7f\s+vpdpbssd zmm30,zmm29,ZMMWORD PTR \[rcx\+0x1fc0\]
+\s*[a-f0-9]+:\s*62 62 17 d7 50 72 80\s+vpdpbssd zmm30\{k7\}\{z\},zmm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 02 17 40 51 f4\s+vpdpbssds zmm30,zmm29,zmm28
+\s*[a-f0-9]+:\s*62 22 17 47 51 b4 f5 00 00 00 10\s+vpdpbssds zmm30\{k7\},zmm29,ZMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 17 50 51 31\s+vpdpbssds zmm30,zmm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 17 40 51 71 7f\s+vpdpbssds zmm30,zmm29,ZMMWORD PTR \[rcx\+0x1fc0\]
+\s*[a-f0-9]+:\s*62 62 17 d7 51 72 80\s+vpdpbssds zmm30\{k7\}\{z\},zmm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 02 16 40 50 f4\s+vpdpbsud zmm30,zmm29,zmm28
+\s*[a-f0-9]+:\s*62 22 16 47 50 b4 f5 00 00 00 10\s+vpdpbsud zmm30\{k7\},zmm29,ZMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 16 50 50 31\s+vpdpbsud zmm30,zmm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 16 40 50 71 7f\s+vpdpbsud zmm30,zmm29,ZMMWORD PTR \[rcx\+0x1fc0\]
+\s*[a-f0-9]+:\s*62 62 16 d7 50 72 80\s+vpdpbsud zmm30\{k7\}\{z\},zmm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 02 16 40 51 f4\s+vpdpbsuds zmm30,zmm29,zmm28
+\s*[a-f0-9]+:\s*62 22 16 47 51 b4 f5 00 00 00 10\s+vpdpbsuds zmm30\{k7\},zmm29,ZMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 16 50 51 31\s+vpdpbsuds zmm30,zmm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 16 40 51 71 7f\s+vpdpbsuds zmm30,zmm29,ZMMWORD PTR \[rcx\+0x1fc0\]
+\s*[a-f0-9]+:\s*62 62 16 d7 51 72 80\s+vpdpbsuds zmm30\{k7\}\{z\},zmm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 02 14 40 50 f4\s+vpdpbuud zmm30,zmm29,zmm28
+\s*[a-f0-9]+:\s*62 22 14 47 50 b4 f5 00 00 00 10\s+vpdpbuud zmm30\{k7\},zmm29,ZMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 14 50 50 31\s+vpdpbuud zmm30,zmm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 14 40 50 71 7f\s+vpdpbuud zmm30,zmm29,ZMMWORD PTR \[rcx\+0x1fc0\]
+\s*[a-f0-9]+:\s*62 62 14 d7 50 72 80\s+vpdpbuud zmm30\{k7\}\{z\},zmm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 02 14 40 51 f4\s+vpdpbuuds zmm30,zmm29,zmm28
+\s*[a-f0-9]+:\s*62 22 14 47 51 b4 f5 00 00 00 10\s+vpdpbuuds zmm30\{k7\},zmm29,ZMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 14 50 51 31\s+vpdpbuuds zmm30,zmm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 14 40 51 71 7f\s+vpdpbuuds zmm30,zmm29,ZMMWORD PTR \[rcx\+0x1fc0\]
+\s*[a-f0-9]+:\s*62 62 14 d7 51 72 80\s+vpdpbuuds zmm30\{k7\}\{z\},zmm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 02 16 40 d2 f4\s+vpdpwsud zmm30,zmm29,zmm28
+\s*[a-f0-9]+:\s*62 22 16 47 d2 b4 f5 00 00 00 10\s+vpdpwsud zmm30\{k7\},zmm29,ZMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 16 50 d2 31\s+vpdpwsud zmm30,zmm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 16 40 d2 71 7f\s+vpdpwsud zmm30,zmm29,ZMMWORD PTR \[rcx\+0x1fc0\]
+\s*[a-f0-9]+:\s*62 62 16 d7 d2 72 80\s+vpdpwsud zmm30\{k7\}\{z\},zmm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 02 16 40 d3 f4\s+vpdpwsuds zmm30,zmm29,zmm28
+\s*[a-f0-9]+:\s*62 22 16 47 d3 b4 f5 00 00 00 10\s+vpdpwsuds zmm30\{k7\},zmm29,ZMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 16 50 d3 31\s+vpdpwsuds zmm30,zmm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 16 40 d3 71 7f\s+vpdpwsuds zmm30,zmm29,ZMMWORD PTR \[rcx\+0x1fc0\]
+\s*[a-f0-9]+:\s*62 62 16 d7 d3 72 80\s+vpdpwsuds zmm30\{k7\}\{z\},zmm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 02 15 40 d2 f4\s+vpdpwusd zmm30,zmm29,zmm28
+\s*[a-f0-9]+:\s*62 22 15 47 d2 b4 f5 00 00 00 10\s+vpdpwusd zmm30\{k7\},zmm29,ZMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 15 50 d2 31\s+vpdpwusd zmm30,zmm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 15 40 d2 71 7f\s+vpdpwusd zmm30,zmm29,ZMMWORD PTR \[rcx\+0x1fc0\]
+\s*[a-f0-9]+:\s*62 62 15 d7 d2 72 80\s+vpdpwusd zmm30\{k7\}\{z\},zmm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 02 15 40 d3 f4\s+vpdpwusds zmm30,zmm29,zmm28
+\s*[a-f0-9]+:\s*62 22 15 47 d3 b4 f5 00 00 00 10\s+vpdpwusds zmm30\{k7\},zmm29,ZMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 15 50 d3 31\s+vpdpwusds zmm30,zmm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 15 40 d3 71 7f\s+vpdpwusds zmm30,zmm29,ZMMWORD PTR \[rcx\+0x1fc0\]
+\s*[a-f0-9]+:\s*62 62 15 d7 d3 72 80\s+vpdpwusds zmm30\{k7\}\{z\},zmm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 02 14 40 d2 f4\s+vpdpwuud zmm30,zmm29,zmm28
+\s*[a-f0-9]+:\s*62 22 14 47 d2 b4 f5 00 00 00 10\s+vpdpwuud zmm30\{k7\},zmm29,ZMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 14 50 d2 31\s+vpdpwuud zmm30,zmm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 14 40 d2 71 7f\s+vpdpwuud zmm30,zmm29,ZMMWORD PTR \[rcx\+0x1fc0\]
+\s*[a-f0-9]+:\s*62 62 14 d7 d2 72 80\s+vpdpwuud zmm30\{k7\}\{z\},zmm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 02 14 40 d3 f4\s+vpdpwuuds zmm30,zmm29,zmm28
+\s*[a-f0-9]+:\s*62 22 14 47 d3 b4 f5 00 00 00 10\s+vpdpwuuds zmm30\{k7\},zmm29,ZMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 14 50 d3 31\s+vpdpwuuds zmm30,zmm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 14 40 d3 71 7f\s+vpdpwuuds zmm30,zmm29,ZMMWORD PTR \[rcx\+0x1fc0\]
+\s*[a-f0-9]+:\s*62 62 14 d7 d3 72 80\s+vpdpwuuds zmm30\{k7\}\{z\},zmm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 02 14 40 52 f4\s+vdpphps zmm30,zmm29,zmm28
+\s*[a-f0-9]+:\s*62 22 14 47 52 b4 f5 00 00 00 10\s+vdpphps zmm30\{k7\},zmm29,ZMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*62 42 14 50 52 31\s+vdpphps zmm30,zmm29,DWORD BCST \[r9\]
+\s*[a-f0-9]+:\s*62 62 14 40 52 71 7f\s+vdpphps zmm30,zmm29,ZMMWORD PTR \[rcx\+0x1fc0\]
+\s*[a-f0-9]+:\s*62 62 14 d7 52 72 80\s+vdpphps zmm30\{k7\}\{z\},zmm29,DWORD BCST \[rdx-0x200\]
+\s*[a-f0-9]+:\s*62 03 16 40 42 f4 7b\s+vmpsadbw zmm30,zmm29,zmm28,0x7b
+\s*[a-f0-9]+:\s*62 23 16 47 42 b4 f5 00 00 00 10 7b\s+vmpsadbw zmm30\{k7\},zmm29,ZMMWORD PTR \[rbp\+r14\*8\+0x10000000\],0x7b
+\s*[a-f0-9]+:\s*62 43 16 40 42 31 7b\s+vmpsadbw zmm30,zmm29,ZMMWORD PTR \[r9\],0x7b
+\s*[a-f0-9]+:\s*62 63 16 40 42 71 7f 7b\s+vmpsadbw zmm30,zmm29,ZMMWORD PTR \[rcx\+0x1fc0\],0x7b
+\s*[a-f0-9]+:\s*62 63 16 c7 42 72 80 7b\s+vmpsadbw zmm30\{k7\}\{z\},zmm29,ZMMWORD PTR \[rdx-0x2000\],0x7b
+#pass
diff --git a/gas/testsuite/gas/i386/x86-64-avx10_2-512-1.d b/gas/testsuite/gas/i386/x86-64-avx10_2-512-1.d
new file mode 100644
index 0000000..4c41b19
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-avx10_2-512-1.d
@@ -0,0 +1,79 @@
+#objdump: -dw
+#name: x86_64 AVX10.2/512 media insns
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+0+ <_start>:
+\s*[a-f0-9]+:\s*62 02 17 40 50 f4\s+vpdpbssd %zmm28,%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 22 17 47 50 b4 f5 00 00 00 10\s+vpdpbssd 0x10000000\(%rbp,%r14,8\),%zmm29,%zmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 17 50 50 31\s+vpdpbssd \(%r9\)\{1to16\},%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 62 17 40 50 71 7f\s+vpdpbssd 0x1fc0\(%rcx\),%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 62 17 d7 50 72 80\s+vpdpbssd -0x200\(%rdx\)\{1to16\},%zmm29,%zmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 17 40 51 f4\s+vpdpbssds %zmm28,%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 22 17 47 51 b4 f5 00 00 00 10\s+vpdpbssds 0x10000000\(%rbp,%r14,8\),%zmm29,%zmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 17 50 51 31\s+vpdpbssds \(%r9\)\{1to16\},%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 62 17 40 51 71 7f\s+vpdpbssds 0x1fc0\(%rcx\),%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 62 17 d7 51 72 80\s+vpdpbssds -0x200\(%rdx\)\{1to16\},%zmm29,%zmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 16 40 50 f4\s+vpdpbsud %zmm28,%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 22 16 47 50 b4 f5 00 00 00 10\s+vpdpbsud 0x10000000\(%rbp,%r14,8\),%zmm29,%zmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 16 50 50 31\s+vpdpbsud \(%r9\)\{1to16\},%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 62 16 40 50 71 7f\s+vpdpbsud 0x1fc0\(%rcx\),%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 62 16 d7 50 72 80\s+vpdpbsud -0x200\(%rdx\)\{1to16\},%zmm29,%zmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 16 40 51 f4\s+vpdpbsuds %zmm28,%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 22 16 47 51 b4 f5 00 00 00 10\s+vpdpbsuds 0x10000000\(%rbp,%r14,8\),%zmm29,%zmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 16 50 51 31\s+vpdpbsuds \(%r9\)\{1to16\},%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 62 16 40 51 71 7f\s+vpdpbsuds 0x1fc0\(%rcx\),%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 62 16 d7 51 72 80\s+vpdpbsuds -0x200\(%rdx\)\{1to16\},%zmm29,%zmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 14 40 50 f4\s+vpdpbuud %zmm28,%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 22 14 47 50 b4 f5 00 00 00 10\s+vpdpbuud 0x10000000\(%rbp,%r14,8\),%zmm29,%zmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 14 50 50 31\s+vpdpbuud \(%r9\)\{1to16\},%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 62 14 40 50 71 7f\s+vpdpbuud 0x1fc0\(%rcx\),%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 62 14 d7 50 72 80\s+vpdpbuud -0x200\(%rdx\)\{1to16\},%zmm29,%zmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 14 40 51 f4\s+vpdpbuuds %zmm28,%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 22 14 47 51 b4 f5 00 00 00 10\s+vpdpbuuds 0x10000000\(%rbp,%r14,8\),%zmm29,%zmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 14 50 51 31\s+vpdpbuuds \(%r9\)\{1to16\},%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 62 14 40 51 71 7f\s+vpdpbuuds 0x1fc0\(%rcx\),%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 62 14 d7 51 72 80\s+vpdpbuuds -0x200\(%rdx\)\{1to16\},%zmm29,%zmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 16 40 d2 f4\s+vpdpwsud %zmm28,%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 22 16 47 d2 b4 f5 00 00 00 10\s+vpdpwsud 0x10000000\(%rbp,%r14,8\),%zmm29,%zmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 16 50 d2 31\s+vpdpwsud \(%r9\)\{1to16\},%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 62 16 40 d2 71 7f\s+vpdpwsud 0x1fc0\(%rcx\),%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 62 16 d7 d2 72 80\s+vpdpwsud -0x200\(%rdx\)\{1to16\},%zmm29,%zmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 16 40 d3 f4\s+vpdpwsuds %zmm28,%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 22 16 47 d3 b4 f5 00 00 00 10\s+vpdpwsuds 0x10000000\(%rbp,%r14,8\),%zmm29,%zmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 16 50 d3 31\s+vpdpwsuds \(%r9\)\{1to16\},%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 62 16 40 d3 71 7f\s+vpdpwsuds 0x1fc0\(%rcx\),%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 62 16 d7 d3 72 80\s+vpdpwsuds -0x200\(%rdx\)\{1to16\},%zmm29,%zmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 15 40 d2 f4\s+vpdpwusd %zmm28,%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 22 15 47 d2 b4 f5 00 00 00 10\s+vpdpwusd 0x10000000\(%rbp,%r14,8\),%zmm29,%zmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 15 50 d2 31\s+vpdpwusd \(%r9\)\{1to16\},%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 62 15 40 d2 71 7f\s+vpdpwusd 0x1fc0\(%rcx\),%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 62 15 d7 d2 72 80\s+vpdpwusd -0x200\(%rdx\)\{1to16\},%zmm29,%zmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 15 40 d3 f4\s+vpdpwusds %zmm28,%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 22 15 47 d3 b4 f5 00 00 00 10\s+vpdpwusds 0x10000000\(%rbp,%r14,8\),%zmm29,%zmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 15 50 d3 31\s+vpdpwusds \(%r9\)\{1to16\},%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 62 15 40 d3 71 7f\s+vpdpwusds 0x1fc0\(%rcx\),%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 62 15 d7 d3 72 80\s+vpdpwusds -0x200\(%rdx\)\{1to16\},%zmm29,%zmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 14 40 d2 f4\s+vpdpwuud %zmm28,%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 22 14 47 d2 b4 f5 00 00 00 10\s+vpdpwuud 0x10000000\(%rbp,%r14,8\),%zmm29,%zmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 14 50 d2 31\s+vpdpwuud \(%r9\)\{1to16\},%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 62 14 40 d2 71 7f\s+vpdpwuud 0x1fc0\(%rcx\),%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 62 14 d7 d2 72 80\s+vpdpwuud -0x200\(%rdx\)\{1to16\},%zmm29,%zmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 14 40 d3 f4\s+vpdpwuuds %zmm28,%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 22 14 47 d3 b4 f5 00 00 00 10\s+vpdpwuuds 0x10000000\(%rbp,%r14,8\),%zmm29,%zmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 14 50 d3 31\s+vpdpwuuds \(%r9\)\{1to16\},%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 62 14 40 d3 71 7f\s+vpdpwuuds 0x1fc0\(%rcx\),%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 62 14 d7 d3 72 80\s+vpdpwuuds -0x200\(%rdx\)\{1to16\},%zmm29,%zmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 14 40 52 f4\s+vdpphps %zmm28,%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 22 14 47 52 b4 f5 00 00 00 10\s+vdpphps 0x10000000\(%rbp,%r14,8\),%zmm29,%zmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 42 14 50 52 31\s+vdpphps \(%r9\)\{1to16\},%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 62 14 40 52 71 7f\s+vdpphps 0x1fc0\(%rcx\),%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 62 14 d7 52 72 80\s+vdpphps -0x200\(%rdx\)\{1to16\},%zmm29,%zmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 03 16 40 42 f4 7b\s+vmpsadbw \$0x7b,%zmm28,%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 23 16 47 42 b4 f5 00 00 00 10 7b\s+vmpsadbw \$0x7b,0x10000000\(%rbp,%r14,8\),%zmm29,%zmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 43 16 40 42 31 7b\s+vmpsadbw \$0x7b,\(%r9\),%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 63 16 40 42 71 7f 7b\s+vmpsadbw \$0x7b,0x1fc0\(%rcx\),%zmm29,%zmm30
+\s*[a-f0-9]+:\s*62 63 16 c7 42 72 80 7b\s+vmpsadbw \$0x7b,-0x2000\(%rdx\),%zmm29,%zmm30\{%k7\}\{z\}
+#pass
diff --git a/gas/testsuite/gas/i386/x86-64-avx10_2-512-1.s b/gas/testsuite/gas/i386/x86-64-avx10_2-512-1.s
new file mode 100644
index 0000000..c2bfa2a
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-avx10_2-512-1.s
@@ -0,0 +1,71 @@
+# Check 64bit AVX10.2/512 instructions
+
+	.arch generic64
+	.arch .avx10.2/512
+	.text
+_start:
+	.irp m, ss, su, uu
+	.irp s, "", s
+	vpdpb\m\()d\s	%zmm28, %zmm29, %zmm30
+	vpdpb\m\()d\s	0x10000000(%rbp, %r14, 8), %zmm29, %zmm30{%k7}
+	vpdpb\m\()d\s	(%r9){1to16}, %zmm29, %zmm30
+	vpdpb\m\()d\s	8128(%rcx), %zmm29, %zmm30
+	vpdpb\m\()d\s	-512(%rdx){1to16}, %zmm29, %zmm30{%k7}{z}
+	.endr
+	.endr
+
+	.irp m, su, us, uu
+	.irp s, "", s
+	vpdpw\m\()d\s	%zmm28, %zmm29, %zmm30
+	vpdpw\m\()d\s	0x10000000(%rbp, %r14, 8), %zmm29, %zmm30{%k7}
+	vpdpw\m\()d\s	(%r9){1to16}, %zmm29, %zmm30
+	vpdpw\m\()d\s	8128(%rcx), %zmm29, %zmm30
+	vpdpw\m\()d\s	-512(%rdx){1to16}, %zmm29, %zmm30{%k7}{z}
+	.endr
+	.endr
+
+	vdpphps	%zmm28, %zmm29, %zmm30
+	vdpphps	0x10000000(%rbp, %r14, 8), %zmm29, %zmm30{%k7}
+	vdpphps	(%r9){1to16}, %zmm29, %zmm30
+	vdpphps	8128(%rcx), %zmm29, %zmm30
+	vdpphps	-512(%rdx){1to16}, %zmm29, %zmm30{%k7}{z}
+
+	vmpsadbw	$123, %zmm28, %zmm29, %zmm30
+	vmpsadbw	$123, 0x10000000(%rbp, %r14, 8), %zmm29, %zmm30{%k7}
+	vmpsadbw	$123, (%r9), %zmm29, %zmm30
+	vmpsadbw	$123, 8128(%rcx), %zmm29, %zmm30
+	vmpsadbw	$123, -8192(%rdx), %zmm29, %zmm30{%k7}{z}
+
+_intel:
+	.intel_syntax noprefix
+	.irp m, ss, su, uu
+	.irp s, "", s
+	vpdpb\m\()d\s	zmm30, zmm29, zmm28
+	vpdpb\m\()d\s	zmm30{k7}, zmm29, ZMMWORD PTR [rbp+r14*8+0x10000000]
+	vpdpb\m\()d\s	zmm30, zmm29, DWORD PTR [r9]{1to16}
+	vpdpb\m\()d\s	zmm30, zmm29, ZMMWORD PTR [rcx+8128]
+	vpdpb\m\()d\s	zmm30{k7}{z}, zmm29, DWORD PTR [rdx-512]{1to16}
+	.endr
+	.endr
+
+	.irp m, su, us, uu
+	.irp s, "", s
+	vpdpw\m\()d\s	zmm30, zmm29, zmm28
+	vpdpw\m\()d\s	zmm30{k7}, zmm29, ZMMWORD PTR [rbp+r14*8+0x10000000]
+	vpdpw\m\()d\s	zmm30, zmm29, DWORD PTR [r9]{1to16}
+	vpdpw\m\()d\s	zmm30, zmm29, ZMMWORD PTR [rcx+8128]
+	vpdpw\m\()d\s	zmm30{k7}{z}, zmm29, DWORD PTR [rdx-512]{1to16}
+	.endr
+	.endr
+
+	vdpphps	zmm30, zmm29, zmm28
+	vdpphps	zmm30{k7}, zmm29, ZMMWORD PTR [rbp+r14*8+0x10000000]
+	vdpphps	zmm30, zmm29, DWORD PTR [r9]{1to16}
+	vdpphps	zmm30, zmm29, ZMMWORD PTR [rcx+8128]
+	vdpphps	zmm30{k7}{z}, zmm29, DWORD PTR [rdx-512]{1to16}
+
+	vmpsadbw	zmm30, zmm29, zmm28, 123
+	vmpsadbw	zmm30{k7}, zmm29, ZMMWORD PTR [rbp+r14*8+0x10000000], 123
+	vmpsadbw	zmm30, zmm29, ZMMWORD PTR [r9], 123
+	vmpsadbw	zmm30, zmm29, ZMMWORD PTR [rcx+8128], 123
+	vmpsadbw	zmm30{k7}{z}, zmm29, ZMMWORD PTR [rdx-8192], 123
diff --git a/gas/testsuite/gas/i386/x86-64-avx10_2-evex-promote.d b/gas/testsuite/gas/i386/x86-64-avx10_2-evex-promote.d
new file mode 100644
index 0000000..1af470e
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-avx10_2-evex-promote.d
@@ -0,0 +1,113 @@
+#objdump: -dw
+#name: x86_64 AVX10.2/256 evex promote insns
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+0+ <_start>:
+\s*[a-f0-9]+:\s*c4 c2 57 50 f6\s+vpdpbssd %ymm14,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 c2 53 50 f6\s+vpdpbssd %xmm14,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 57 50 31\s+vpdpbssd \(%rcx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 53 50 31\s+vpdpbssd \(%rcx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 d2 57 28 50 f6\s+\{evex\} vpdpbssd %ymm14,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 d2 57 08 50 f6\s+\{evex\} vpdpbssd %xmm14,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f2 57 28 50 31\s+\{evex\} vpdpbssd \(%rcx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 57 08 50 31\s+\{evex\} vpdpbssd \(%rcx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 c2 57 51 f6\s+vpdpbssds %ymm14,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 c2 53 51 f6\s+vpdpbssds %xmm14,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 57 51 31\s+vpdpbssds \(%rcx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 53 51 31\s+vpdpbssds \(%rcx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 d2 57 28 51 f6\s+\{evex\} vpdpbssds %ymm14,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 d2 57 08 51 f6\s+\{evex\} vpdpbssds %xmm14,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f2 57 28 51 31\s+\{evex\} vpdpbssds \(%rcx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 57 08 51 31\s+\{evex\} vpdpbssds \(%rcx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 c2 56 50 f6\s+vpdpbsud %ymm14,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 c2 52 50 f6\s+vpdpbsud %xmm14,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 56 50 31\s+vpdpbsud \(%rcx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 52 50 31\s+vpdpbsud \(%rcx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 d2 56 28 50 f6\s+\{evex\} vpdpbsud %ymm14,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 d2 56 08 50 f6\s+\{evex\} vpdpbsud %xmm14,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f2 56 28 50 31\s+\{evex\} vpdpbsud \(%rcx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 56 08 50 31\s+\{evex\} vpdpbsud \(%rcx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 c2 56 51 f6\s+vpdpbsuds %ymm14,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 c2 52 51 f6\s+vpdpbsuds %xmm14,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 56 51 31\s+vpdpbsuds \(%rcx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 52 51 31\s+vpdpbsuds \(%rcx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 d2 56 28 51 f6\s+\{evex\} vpdpbsuds %ymm14,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 d2 56 08 51 f6\s+\{evex\} vpdpbsuds %xmm14,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f2 56 28 51 31\s+\{evex\} vpdpbsuds \(%rcx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 56 08 51 31\s+\{evex\} vpdpbsuds \(%rcx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 c2 54 50 f6\s+vpdpbuud %ymm14,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 c2 50 50 f6\s+vpdpbuud %xmm14,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 54 50 31\s+vpdpbuud \(%rcx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 50 50 31\s+vpdpbuud \(%rcx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 d2 54 28 50 f6\s+\{evex\} vpdpbuud %ymm14,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 d2 54 08 50 f6\s+\{evex\} vpdpbuud %xmm14,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f2 54 28 50 31\s+\{evex\} vpdpbuud \(%rcx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 54 08 50 31\s+\{evex\} vpdpbuud \(%rcx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 c2 54 51 f6\s+vpdpbuuds %ymm14,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 c2 50 51 f6\s+vpdpbuuds %xmm14,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 54 51 31\s+vpdpbuuds \(%rcx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 50 51 31\s+vpdpbuuds \(%rcx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 d2 54 28 51 f6\s+\{evex\} vpdpbuuds %ymm14,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 d2 54 08 51 f6\s+\{evex\} vpdpbuuds %xmm14,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f2 54 28 51 31\s+\{evex\} vpdpbuuds \(%rcx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 54 08 51 31\s+\{evex\} vpdpbuuds \(%rcx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 c2 56 d2 f6\s+vpdpwsud %ymm14,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 c2 52 d2 f6\s+vpdpwsud %xmm14,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 56 d2 31\s+vpdpwsud \(%rcx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 52 d2 31\s+vpdpwsud \(%rcx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 d2 56 28 d2 f6\s+\{evex\} vpdpwsud %ymm14,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 d2 56 08 d2 f6\s+\{evex\} vpdpwsud %xmm14,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f2 56 28 d2 31\s+\{evex\} vpdpwsud \(%rcx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 56 08 d2 31\s+\{evex\} vpdpwsud \(%rcx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 c2 56 d3 f6\s+vpdpwsuds %ymm14,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 c2 52 d3 f6\s+vpdpwsuds %xmm14,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 56 d3 31\s+vpdpwsuds \(%rcx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 52 d3 31\s+vpdpwsuds \(%rcx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 d2 56 28 d3 f6\s+\{evex\} vpdpwsuds %ymm14,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 d2 56 08 d3 f6\s+\{evex\} vpdpwsuds %xmm14,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f2 56 28 d3 31\s+\{evex\} vpdpwsuds \(%rcx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 56 08 d3 31\s+\{evex\} vpdpwsuds \(%rcx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 c2 55 d2 f6\s+vpdpwusd %ymm14,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 c2 51 d2 f6\s+vpdpwusd %xmm14,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 55 d2 31\s+vpdpwusd \(%rcx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 51 d2 31\s+vpdpwusd \(%rcx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 d2 55 28 d2 f6\s+\{evex\} vpdpwusd %ymm14,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 d2 55 08 d2 f6\s+\{evex\} vpdpwusd %xmm14,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f2 55 28 d2 31\s+\{evex\} vpdpwusd \(%rcx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 55 08 d2 31\s+\{evex\} vpdpwusd \(%rcx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 c2 55 d3 f6\s+vpdpwusds %ymm14,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 c2 51 d3 f6\s+vpdpwusds %xmm14,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 55 d3 31\s+vpdpwusds \(%rcx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 51 d3 31\s+vpdpwusds \(%rcx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 d2 55 28 d3 f6\s+\{evex\} vpdpwusds %ymm14,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 d2 55 08 d3 f6\s+\{evex\} vpdpwusds %xmm14,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f2 55 28 d3 31\s+\{evex\} vpdpwusds \(%rcx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 55 08 d3 31\s+\{evex\} vpdpwusds \(%rcx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 c2 54 d2 f6\s+vpdpwuud %ymm14,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 c2 50 d2 f6\s+vpdpwuud %xmm14,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 54 d2 31\s+vpdpwuud \(%rcx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 50 d2 31\s+vpdpwuud \(%rcx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 d2 54 28 d2 f6\s+\{evex\} vpdpwuud %ymm14,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 d2 54 08 d2 f6\s+\{evex\} vpdpwuud %xmm14,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f2 54 28 d2 31\s+\{evex\} vpdpwuud \(%rcx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 54 08 d2 31\s+\{evex\} vpdpwuud \(%rcx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 c2 54 d3 f6\s+vpdpwuuds %ymm14,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 c2 50 d3 f6\s+vpdpwuuds %xmm14,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 54 d3 31\s+vpdpwuuds \(%rcx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e2 50 d3 31\s+vpdpwuuds \(%rcx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 d2 54 28 d3 f6\s+\{evex\} vpdpwuuds %ymm14,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 d2 54 08 d3 f6\s+\{evex\} vpdpwuuds %xmm14,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f2 54 28 d3 31\s+\{evex\} vpdpwuuds \(%rcx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f2 54 08 d3 31\s+\{evex\} vpdpwuuds \(%rcx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 c3 51 42 f6 7b\s+vmpsadbw \$0x7b,%xmm14,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 c3 55 42 f6 7b\s+vmpsadbw \$0x7b,%ymm14,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*c4 e3 51 42 31 7b\s+vmpsadbw \$0x7b,\(%rcx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e3 55 42 31 7b\s+vmpsadbw \$0x7b,\(%rcx\),%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 d3 56 08 42 f6 7b\s+\{evex\} vmpsadbw \$0x7b,%xmm14,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 d3 56 28 42 f6 7b\s+\{evex\} vmpsadbw \$0x7b,%ymm14,%ymm5,%ymm6
+\s*[a-f0-9]+:\s*62 f3 56 08 42 31 7b\s+\{evex\} vmpsadbw \$0x7b,\(%rcx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*62 f3 56 28 42 31 7b\s+\{evex\} vmpsadbw \$0x7b,\(%rcx\),%ymm5,%ymm6
+#pass
diff --git a/gas/testsuite/gas/i386/x86-64-avx10_2-evex-promote.s b/gas/testsuite/gas/i386/x86-64-avx10_2-evex-promote.s
new file mode 100644
index 0000000..dfbfca8
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-avx10_2-evex-promote.s
@@ -0,0 +1,42 @@
+# Check AVX10.2/256 evex promoted instructions
+
+	.arch generic64
+	.arch .avx10.2/256
+	.arch .avx_vnni_int8
+	.arch .avx_vnni_int16
+	.text
+_start:
+	.irp m, ss, su, uu
+	.irp s, "", s
+	vpdpb\m\()d\s	%ymm14, %ymm5, %ymm6
+	vpdpb\m\()d\s	%xmm14, %xmm5, %xmm6
+	vpdpb\m\()d\s	(%rcx), %ymm5, %ymm6
+	vpdpb\m\()d\s	(%rcx), %xmm5, %xmm6
+	{evex} vpdpb\m\()d\s	%ymm14, %ymm5, %ymm6
+	{evex} vpdpb\m\()d\s	%xmm14, %xmm5, %xmm6
+	{evex} vpdpb\m\()d\s	(%rcx), %ymm5, %ymm6
+	{evex} vpdpb\m\()d\s	(%rcx), %xmm5, %xmm6
+	.endr
+	.endr
+
+	.irp m, su, us, uu
+	.irp s, "", s
+	vpdpw\m\()d\s	%ymm14, %ymm5, %ymm6
+	vpdpw\m\()d\s	%xmm14, %xmm5, %xmm6
+	vpdpw\m\()d\s	(%rcx), %ymm5, %ymm6
+	vpdpw\m\()d\s	(%rcx), %xmm5, %xmm6
+	{evex} vpdpw\m\()d\s	%ymm14, %ymm5, %ymm6
+	{evex} vpdpw\m\()d\s	%xmm14, %xmm5, %xmm6
+	{evex} vpdpw\m\()d\s	(%rcx), %ymm5, %ymm6
+	{evex} vpdpw\m\()d\s	(%rcx), %xmm5, %xmm6
+	.endr
+	.endr
+
+	vmpsadbw	$123, %xmm14, %xmm5, %xmm6
+	vmpsadbw	$123, %ymm14, %ymm5, %ymm6
+	vmpsadbw	$123, (%rcx), %xmm5, %xmm6
+	vmpsadbw	$123, (%rcx), %ymm5, %ymm6
+	{evex} vmpsadbw	$123, %xmm14, %xmm5, %xmm6
+	{evex} vmpsadbw	$123, %ymm14, %ymm5, %ymm6
+	{evex} vmpsadbw	$123, (%rcx), %xmm5, %xmm6
+	{evex} vmpsadbw	$123, (%rcx), %ymm5, %ymm6
diff --git a/gas/testsuite/gas/i386/x86-64-avx10_2-rounding-intel.d b/gas/testsuite/gas/i386/x86-64-avx10_2-rounding-intel.d
new file mode 100644
index 0000000..d5e17c2
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-avx10_2-rounding-intel.d
@@ -0,0 +1,452 @@
+#objdump: -dw -Mintel
+#name: x86_64 AVX10.2 rounding insns (Intel disassembly)
+#source: x86-64-avx10_2-rounding.s
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+0+ <_start>:
+#...
+\s*a83:\s*62 91 91 10 c2 ec 7b\s+vcmppd k5,ymm29,ymm28\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 91 91 17 c2 ec 7b\s+vcmppd k5\{k7\},ymm29,ymm28\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 02 f9 18 42 f5\s+vgetexppd ymm30,ymm29\{sae\}
+\s*[a-f0-9]+:\s*62 02 f9 1f 42 f5\s+vgetexppd ymm30\{k7\},ymm29\{sae\}
+\s*[a-f0-9]+:\s*62 02 f9 9f 42 f5\s+vgetexppd ymm30\{k7\}\{z\},ymm29\{sae\}
+\s*[a-f0-9]+:\s*62 01 f9 18 51 f5\s+vsqrtpd ymm30,ymm29\{rn-sae\}
+\s*[a-f0-9]+:\s*62 01 f9 3f 51 f5\s+vsqrtpd ymm30\{k7\},ymm29\{rd-sae\}
+\s*[a-f0-9]+:\s*62 01 f9 ff 51 f5\s+vsqrtpd ymm30\{k7\}\{z\},ymm29\{rz-sae\}
+\s*[a-f0-9]+:\s*62 93 10 10 c2 ec 7b\s+vcmpph k5,ymm29,ymm28\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 93 10 17 c2 ec 7b\s+vcmpph k5\{k7\},ymm29,ymm28\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 06 79 18 42 f5\s+vgetexpph ymm30,ymm29\{sae\}
+\s*[a-f0-9]+:\s*62 06 79 1f 42 f5\s+vgetexpph ymm30\{k7\},ymm29\{sae\}
+\s*[a-f0-9]+:\s*62 06 79 9f 42 f5\s+vgetexpph ymm30\{k7\}\{z\},ymm29\{sae\}
+\s*[a-f0-9]+:\s*62 05 78 18 51 f5\s+vsqrtph ymm30,ymm29\{rn-sae\}
+\s*[a-f0-9]+:\s*62 05 78 3f 51 f5\s+vsqrtph ymm30\{k7\},ymm29\{rd-sae\}
+\s*[a-f0-9]+:\s*62 05 78 ff 51 f5\s+vsqrtph ymm30\{k7\}\{z\},ymm29\{rz-sae\}
+\s*[a-f0-9]+:\s*62 91 10 10 c2 ec 7b\s+vcmpps k5,ymm29,ymm28\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 91 10 17 c2 ec 7b\s+vcmpps k5\{k7\},ymm29,ymm28\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 02 79 18 42 f5\s+vgetexpps ymm30,ymm29\{sae\}
+\s*[a-f0-9]+:\s*62 02 79 1f 42 f5\s+vgetexpps ymm30\{k7\},ymm29\{sae\}
+\s*[a-f0-9]+:\s*62 02 79 9f 42 f5\s+vgetexpps ymm30\{k7\}\{z\},ymm29\{sae\}
+\s*[a-f0-9]+:\s*62 01 78 18 51 f5\s+vsqrtps ymm30,ymm29\{rn-sae\}
+\s*[a-f0-9]+:\s*62 01 78 3f 51 f5\s+vsqrtps ymm30\{k7\},ymm29\{rd-sae\}
+\s*[a-f0-9]+:\s*62 01 78 ff 51 f5\s+vsqrtps ymm30\{k7\}\{z\},ymm29\{rz-sae\}
+\s*[a-f0-9]+:\s*62 01 91 10 58 f4\s+vaddpd ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 01 91 37 58 f4\s+vaddpd ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 01 91 f7 58 f4\s+vaddpd ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 05 10 10 58 f4\s+vaddph ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 05 10 37 58 f4\s+vaddph ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 05 10 f7 58 f4\s+vaddph ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 01 10 10 58 f4\s+vaddps ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 01 10 37 58 f4\s+vaddps ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 01 10 f7 58 f4\s+vaddps ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 01 91 10 5e f4\s+vdivpd ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 01 91 37 5e f4\s+vdivpd ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 01 91 f7 5e f4\s+vdivpd ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 05 10 10 5e f4\s+vdivph ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 05 10 37 5e f4\s+vdivph ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 05 10 f7 5e f4\s+vdivph ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 01 10 10 5e f4\s+vdivps ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 01 10 37 5e f4\s+vdivps ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 01 10 f7 5e f4\s+vdivps ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 01 91 10 59 f4\s+vmulpd ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 01 91 37 59 f4\s+vmulpd ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 01 91 f7 59 f4\s+vmulpd ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 05 10 10 59 f4\s+vmulph ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 05 10 37 59 f4\s+vmulph ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 05 10 f7 59 f4\s+vmulph ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 01 10 10 59 f4\s+vmulps ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 01 10 37 59 f4\s+vmulps ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 01 10 f7 59 f4\s+vmulps ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 02 91 10 2c f4\s+vscalefpd ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 02 91 37 2c f4\s+vscalefpd ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 02 91 f7 2c f4\s+vscalefpd ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 06 11 10 2c f4\s+vscalefph ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 06 11 37 2c f4\s+vscalefph ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 06 11 f7 2c f4\s+vscalefph ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 02 11 10 2c f4\s+vscalefps ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 02 11 37 2c f4\s+vscalefps ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 02 11 f7 2c f4\s+vscalefps ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 01 91 10 5c f4\s+vsubpd ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 01 91 37 5c f4\s+vsubpd ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 01 91 f7 5c f4\s+vsubpd ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 05 10 10 5c f4\s+vsubph ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 05 10 37 5c f4\s+vsubph ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 05 10 f7 5c f4\s+vsubph ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 01 10 10 5c f4\s+vsubps ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 01 10 37 5c f4\s+vsubps ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 01 10 f7 5c f4\s+vsubps ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 01 91 10 5f f4\s+vmaxpd ymm30,ymm29,ymm28\{sae\}
+\s*[a-f0-9]+:\s*62 01 91 17 5f f4\s+vmaxpd ymm30\{k7\},ymm29,ymm28\{sae\}
+\s*[a-f0-9]+:\s*62 01 91 97 5f f4\s+vmaxpd ymm30\{k7\}\{z\},ymm29,ymm28\{sae\}
+\s*[a-f0-9]+:\s*62 05 10 10 5f f4\s+vmaxph ymm30,ymm29,ymm28\{sae\}
+\s*[a-f0-9]+:\s*62 05 10 17 5f f4\s+vmaxph ymm30\{k7\},ymm29,ymm28\{sae\}
+\s*[a-f0-9]+:\s*62 05 10 97 5f f4\s+vmaxph ymm30\{k7\}\{z\},ymm29,ymm28\{sae\}
+\s*[a-f0-9]+:\s*62 01 10 10 5f f4\s+vmaxps ymm30,ymm29,ymm28\{sae\}
+\s*[a-f0-9]+:\s*62 01 10 17 5f f4\s+vmaxps ymm30\{k7\},ymm29,ymm28\{sae\}
+\s*[a-f0-9]+:\s*62 01 10 97 5f f4\s+vmaxps ymm30\{k7\}\{z\},ymm29,ymm28\{sae\}
+\s*[a-f0-9]+:\s*62 01 91 10 5d f4\s+vminpd ymm30,ymm29,ymm28\{sae\}
+\s*[a-f0-9]+:\s*62 01 91 17 5d f4\s+vminpd ymm30\{k7\},ymm29,ymm28\{sae\}
+\s*[a-f0-9]+:\s*62 01 91 97 5d f4\s+vminpd ymm30\{k7\}\{z\},ymm29,ymm28\{sae\}
+\s*[a-f0-9]+:\s*62 05 10 10 5d f4\s+vminph ymm30,ymm29,ymm28\{sae\}
+\s*[a-f0-9]+:\s*62 05 10 17 5d f4\s+vminph ymm30\{k7\},ymm29,ymm28\{sae\}
+\s*[a-f0-9]+:\s*62 05 10 97 5d f4\s+vminph ymm30\{k7\}\{z\},ymm29,ymm28\{sae\}
+\s*[a-f0-9]+:\s*62 01 10 10 5d f4\s+vminps ymm30,ymm29,ymm28\{sae\}
+\s*[a-f0-9]+:\s*62 01 10 17 5d f4\s+vminps ymm30\{k7\},ymm29,ymm28\{sae\}
+\s*[a-f0-9]+:\s*62 01 10 97 5d f4\s+vminps ymm30\{k7\}\{z\},ymm29,ymm28\{sae\}
+\s*[a-f0-9]+:\s*62 03 f9 18 26 f5 7b\s+vgetmantpd ymm30,ymm29\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 03 f9 1f 26 f5 7b\s+vgetmantpd ymm30\{k7\},ymm29\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 03 f9 9f 26 f5 7b\s+vgetmantpd ymm30\{k7\}\{z\},ymm29\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 03 78 18 26 f5 7b\s+vgetmantph ymm30,ymm29\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 03 78 1f 26 f5 7b\s+vgetmantph ymm30\{k7\},ymm29\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 03 78 9f 26 f5 7b\s+vgetmantph ymm30\{k7\}\{z\},ymm29\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 03 79 18 26 f5 7b\s+vgetmantps ymm30,ymm29\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 03 79 1f 26 f5 7b\s+vgetmantps ymm30\{k7\},ymm29\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 03 79 9f 26 f5 7b\s+vgetmantps ymm30\{k7\}\{z\},ymm29\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 03 f9 18 56 f5 7b\s+vreducepd ymm30,ymm29\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 03 f9 1f 56 f5 7b\s+vreducepd ymm30\{k7\},ymm29\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 03 f9 9f 56 f5 7b\s+vreducepd ymm30\{k7\}\{z\},ymm29\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 03 78 18 56 f5 7b\s+vreduceph ymm30,ymm29\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 03 78 1f 56 f5 7b\s+vreduceph ymm30\{k7\},ymm29\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 03 78 9f 56 f5 7b\s+vreduceph ymm30\{k7\}\{z\},ymm29\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 03 79 18 56 f5 7b\s+vreduceps ymm30,ymm29\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 03 79 1f 56 f5 7b\s+vreduceps ymm30\{k7\},ymm29\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 03 79 9f 56 f5 7b\s+vreduceps ymm30\{k7\}\{z\},ymm29\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 03 f9 18 09 f5 7b\s+vrndscalepd ymm30,ymm29\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 03 f9 1f 09 f5 7b\s+vrndscalepd ymm30\{k7\},ymm29\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 03 f9 9f 09 f5 7b\s+vrndscalepd ymm30\{k7\}\{z\},ymm29\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 03 78 18 08 f5 7b\s+vrndscaleph ymm30,ymm29\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 03 78 1f 08 f5 7b\s+vrndscaleph ymm30\{k7\},ymm29\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 03 78 9f 08 f5 7b\s+vrndscaleph ymm30\{k7\}\{z\},ymm29\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 03 79 18 08 f5 7b\s+vrndscaleps ymm30,ymm29\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 03 79 1f 08 f5 7b\s+vrndscaleps ymm30\{k7\},ymm29\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 03 79 9f 08 f5 7b\s+vrndscaleps ymm30\{k7\}\{z\},ymm29\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 02 91 10 98 f4\s+vfmadd132pd ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 02 91 37 98 f4\s+vfmadd132pd ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 02 91 f7 98 f4\s+vfmadd132pd ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 06 11 10 98 f4\s+vfmadd132ph ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 06 11 37 98 f4\s+vfmadd132ph ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 06 11 f7 98 f4\s+vfmadd132ph ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 02 11 10 98 f4\s+vfmadd132ps ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 02 11 37 98 f4\s+vfmadd132ps ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 02 11 f7 98 f4\s+vfmadd132ps ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 02 91 10 a8 f4\s+vfmadd213pd ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 02 91 37 a8 f4\s+vfmadd213pd ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 02 91 f7 a8 f4\s+vfmadd213pd ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 06 11 10 a8 f4\s+vfmadd213ph ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 06 11 37 a8 f4\s+vfmadd213ph ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 06 11 f7 a8 f4\s+vfmadd213ph ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 02 11 10 a8 f4\s+vfmadd213ps ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 02 11 37 a8 f4\s+vfmadd213ps ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 02 11 f7 a8 f4\s+vfmadd213ps ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 02 91 10 b8 f4\s+vfmadd231pd ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 02 91 37 b8 f4\s+vfmadd231pd ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 02 91 f7 b8 f4\s+vfmadd231pd ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 06 11 10 b8 f4\s+vfmadd231ph ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 06 11 37 b8 f4\s+vfmadd231ph ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 06 11 f7 b8 f4\s+vfmadd231ph ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 02 11 10 b8 f4\s+vfmadd231ps ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 02 11 37 b8 f4\s+vfmadd231ps ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 02 11 f7 b8 f4\s+vfmadd231ps ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 02 91 10 96 f4\s+vfmaddsub132pd ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 02 91 37 96 f4\s+vfmaddsub132pd ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 02 91 f7 96 f4\s+vfmaddsub132pd ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 06 11 10 96 f4\s+vfmaddsub132ph ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 06 11 37 96 f4\s+vfmaddsub132ph ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 06 11 f7 96 f4\s+vfmaddsub132ph ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 02 11 10 96 f4\s+vfmaddsub132ps ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 02 11 37 96 f4\s+vfmaddsub132ps ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 02 11 f7 96 f4\s+vfmaddsub132ps ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 02 91 10 a6 f4\s+vfmaddsub213pd ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 02 91 37 a6 f4\s+vfmaddsub213pd ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 02 91 f7 a6 f4\s+vfmaddsub213pd ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 06 11 10 a6 f4\s+vfmaddsub213ph ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 06 11 37 a6 f4\s+vfmaddsub213ph ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 06 11 f7 a6 f4\s+vfmaddsub213ph ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 02 11 10 a6 f4\s+vfmaddsub213ps ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 02 11 37 a6 f4\s+vfmaddsub213ps ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 02 11 f7 a6 f4\s+vfmaddsub213ps ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 02 91 10 b6 f4\s+vfmaddsub231pd ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 02 91 37 b6 f4\s+vfmaddsub231pd ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 02 91 f7 b6 f4\s+vfmaddsub231pd ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 06 11 10 b6 f4\s+vfmaddsub231ph ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 06 11 37 b6 f4\s+vfmaddsub231ph ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 06 11 f7 b6 f4\s+vfmaddsub231ph ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 02 11 10 b6 f4\s+vfmaddsub231ps ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 02 11 37 b6 f4\s+vfmaddsub231ps ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 02 11 f7 b6 f4\s+vfmaddsub231ps ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 02 91 10 9a f4\s+vfmsub132pd ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 02 91 37 9a f4\s+vfmsub132pd ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 02 91 f7 9a f4\s+vfmsub132pd ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 06 11 10 9a f4\s+vfmsub132ph ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 06 11 37 9a f4\s+vfmsub132ph ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 06 11 f7 9a f4\s+vfmsub132ph ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 02 11 10 9a f4\s+vfmsub132ps ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 02 11 37 9a f4\s+vfmsub132ps ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 02 11 f7 9a f4\s+vfmsub132ps ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 02 91 10 aa f4\s+vfmsub213pd ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 02 91 37 aa f4\s+vfmsub213pd ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 02 91 f7 aa f4\s+vfmsub213pd ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 06 11 10 aa f4\s+vfmsub213ph ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 06 11 37 aa f4\s+vfmsub213ph ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 06 11 f7 aa f4\s+vfmsub213ph ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 02 11 10 aa f4\s+vfmsub213ps ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 02 11 37 aa f4\s+vfmsub213ps ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 02 11 f7 aa f4\s+vfmsub213ps ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 02 91 10 ba f4\s+vfmsub231pd ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 02 91 37 ba f4\s+vfmsub231pd ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 02 91 f7 ba f4\s+vfmsub231pd ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 06 11 10 ba f4\s+vfmsub231ph ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 06 11 37 ba f4\s+vfmsub231ph ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 06 11 f7 ba f4\s+vfmsub231ph ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 02 11 10 ba f4\s+vfmsub231ps ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 02 11 37 ba f4\s+vfmsub231ps ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 02 11 f7 ba f4\s+vfmsub231ps ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 02 91 10 97 f4\s+vfmsubadd132pd ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 02 91 37 97 f4\s+vfmsubadd132pd ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 02 91 f7 97 f4\s+vfmsubadd132pd ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 06 11 10 97 f4\s+vfmsubadd132ph ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 06 11 37 97 f4\s+vfmsubadd132ph ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 06 11 f7 97 f4\s+vfmsubadd132ph ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 02 11 10 97 f4\s+vfmsubadd132ps ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 02 11 37 97 f4\s+vfmsubadd132ps ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 02 11 f7 97 f4\s+vfmsubadd132ps ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 02 91 10 a7 f4\s+vfmsubadd213pd ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 02 91 37 a7 f4\s+vfmsubadd213pd ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 02 91 f7 a7 f4\s+vfmsubadd213pd ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 06 11 10 a7 f4\s+vfmsubadd213ph ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 06 11 37 a7 f4\s+vfmsubadd213ph ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 06 11 f7 a7 f4\s+vfmsubadd213ph ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 02 11 10 a7 f4\s+vfmsubadd213ps ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 02 11 37 a7 f4\s+vfmsubadd213ps ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 02 11 f7 a7 f4\s+vfmsubadd213ps ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 02 91 10 b7 f4\s+vfmsubadd231pd ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 02 91 37 b7 f4\s+vfmsubadd231pd ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 02 91 f7 b7 f4\s+vfmsubadd231pd ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 06 11 10 b7 f4\s+vfmsubadd231ph ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 06 11 37 b7 f4\s+vfmsubadd231ph ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 06 11 f7 b7 f4\s+vfmsubadd231ph ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 02 11 10 b7 f4\s+vfmsubadd231ps ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 02 11 37 b7 f4\s+vfmsubadd231ps ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 02 11 f7 b7 f4\s+vfmsubadd231ps ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 02 91 10 9c f4\s+vfnmadd132pd ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 02 91 37 9c f4\s+vfnmadd132pd ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 02 91 f7 9c f4\s+vfnmadd132pd ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 06 11 10 9c f4\s+vfnmadd132ph ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 06 11 37 9c f4\s+vfnmadd132ph ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 06 11 f7 9c f4\s+vfnmadd132ph ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 02 11 10 9c f4\s+vfnmadd132ps ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 02 11 37 9c f4\s+vfnmadd132ps ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 02 11 f7 9c f4\s+vfnmadd132ps ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 02 91 10 ac f4\s+vfnmadd213pd ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 02 91 37 ac f4\s+vfnmadd213pd ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 02 91 f7 ac f4\s+vfnmadd213pd ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 06 11 10 ac f4\s+vfnmadd213ph ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 06 11 37 ac f4\s+vfnmadd213ph ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 06 11 f7 ac f4\s+vfnmadd213ph ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 02 11 10 ac f4\s+vfnmadd213ps ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 02 11 37 ac f4\s+vfnmadd213ps ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 02 11 f7 ac f4\s+vfnmadd213ps ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 02 91 10 bc f4\s+vfnmadd231pd ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 02 91 37 bc f4\s+vfnmadd231pd ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 02 91 f7 bc f4\s+vfnmadd231pd ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 06 11 10 bc f4\s+vfnmadd231ph ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 06 11 37 bc f4\s+vfnmadd231ph ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 06 11 f7 bc f4\s+vfnmadd231ph ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 02 11 10 bc f4\s+vfnmadd231ps ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 02 11 37 bc f4\s+vfnmadd231ps ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 02 11 f7 bc f4\s+vfnmadd231ps ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 02 91 10 9e f4\s+vfnmsub132pd ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 02 91 37 9e f4\s+vfnmsub132pd ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 02 91 f7 9e f4\s+vfnmsub132pd ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 06 11 10 9e f4\s+vfnmsub132ph ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 06 11 37 9e f4\s+vfnmsub132ph ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 06 11 f7 9e f4\s+vfnmsub132ph ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 02 11 10 9e f4\s+vfnmsub132ps ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 02 11 37 9e f4\s+vfnmsub132ps ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 02 11 f7 9e f4\s+vfnmsub132ps ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 02 91 10 ae f4\s+vfnmsub213pd ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 02 91 37 ae f4\s+vfnmsub213pd ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 02 91 f7 ae f4\s+vfnmsub213pd ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 06 11 10 ae f4\s+vfnmsub213ph ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 06 11 37 ae f4\s+vfnmsub213ph ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 06 11 f7 ae f4\s+vfnmsub213ph ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 02 11 10 ae f4\s+vfnmsub213ps ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 02 11 37 ae f4\s+vfnmsub213ps ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 02 11 f7 ae f4\s+vfnmsub213ps ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 02 91 10 be f4\s+vfnmsub231pd ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 02 91 37 be f4\s+vfnmsub231pd ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 02 91 f7 be f4\s+vfnmsub231pd ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 06 11 10 be f4\s+vfnmsub231ph ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 06 11 37 be f4\s+vfnmsub231ph ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 06 11 f7 be f4\s+vfnmsub231ph ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 02 11 10 be f4\s+vfnmsub231ps ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 02 11 37 be f4\s+vfnmsub231ps ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 02 11 f7 be f4\s+vfnmsub231ps ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 03 91 10 54 f4 7b\s+vfixupimmpd ymm30,ymm29,ymm28\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 03 91 17 54 f4 7b\s+vfixupimmpd ymm30\{k7\},ymm29,ymm28\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 03 91 97 54 f4 7b\s+vfixupimmpd ymm30\{k7\}\{z\},ymm29,ymm28\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 03 11 10 54 f4 7b\s+vfixupimmps ymm30,ymm29,ymm28\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 03 11 17 54 f4 7b\s+vfixupimmps ymm30\{k7\},ymm29,ymm28\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 03 11 97 54 f4 7b\s+vfixupimmps ymm30\{k7\}\{z\},ymm29,ymm28\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 03 91 10 50 f4 7b\s+vrangepd ymm30,ymm29,ymm28\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 03 91 17 50 f4 7b\s+vrangepd ymm30\{k7\},ymm29,ymm28\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 03 91 97 50 f4 7b\s+vrangepd ymm30\{k7\}\{z\},ymm29,ymm28\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 03 11 10 50 f4 7b\s+vrangeps ymm30,ymm29,ymm28\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 03 11 17 50 f4 7b\s+vrangeps ymm30\{k7\},ymm29,ymm28\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 03 11 97 50 f4 7b\s+vrangeps ymm30\{k7\}\{z\},ymm29,ymm28\{sae\},0x7b
+\s*[a-f0-9]+:\s*62 06 13 10 56 f4\s+vfcmaddcph ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 06 13 37 56 f4\s+vfcmaddcph ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 06 13 f7 56 f4\s+vfcmaddcph ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 06 13 10 d6 f4\s+vfcmulcph ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 06 13 37 d6 f4\s+vfcmulcph ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 06 13 f7 d6 f4\s+vfcmulcph ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 06 12 10 56 f4\s+vfmaddcph ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 06 12 37 56 f4\s+vfmaddcph ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 06 12 f7 56 f4\s+vfmaddcph ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 06 12 10 d6 f4\s+vfmulcph ymm30,ymm29,ymm28\{rn-sae\}
+\s*[a-f0-9]+:\s*62 06 12 37 d6 f4\s+vfmulcph ymm30\{k7\},ymm29,ymm28\{rd-sae\}
+\s*[a-f0-9]+:\s*62 06 12 f7 d6 f4\s+vfmulcph ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\}
+\s*[a-f0-9]+:\s*62 05 78 18 5b f5\s+vcvtdq2ph xmm30,ymm29\{rn-sae\}
+\s*[a-f0-9]+:\s*62 05 78 3f 5b f5\s+vcvtdq2ph xmm30\{k7\},ymm29\{rd-sae\}
+\s*[a-f0-9]+:\s*62 05 78 ff 5b f5\s+vcvtdq2ph xmm30\{k7\}\{z\},ymm29\{rz-sae\}
+\s*[a-f0-9]+:\s*62 01 78 18 5b f5\s+vcvtdq2ps ymm30,ymm29\{rn-sae\}
+\s*[a-f0-9]+:\s*62 01 78 3f 5b f5\s+vcvtdq2ps ymm30\{k7\},ymm29\{rd-sae\}
+\s*[a-f0-9]+:\s*62 01 78 ff 5b f5\s+vcvtdq2ps ymm30\{k7\}\{z\},ymm29\{rz-sae\}
+\s*[a-f0-9]+:\s*62 05 7b 18 7a f5\s+vcvtudq2ph xmm30,ymm29\{rn-sae\}
+\s*[a-f0-9]+:\s*62 05 7b 3f 7a f5\s+vcvtudq2ph xmm30\{k7\},ymm29\{rd-sae\}
+\s*[a-f0-9]+:\s*62 05 7b ff 7a f5\s+vcvtudq2ph xmm30\{k7\}\{z\},ymm29\{rz-sae\}
+\s*[a-f0-9]+:\s*62 01 7b 18 7a f5\s+vcvtudq2ps ymm30,ymm29\{rn-sae\}
+\s*[a-f0-9]+:\s*62 01 7b 3f 7a f5\s+vcvtudq2ps ymm30\{k7\},ymm29\{rd-sae\}
+\s*[a-f0-9]+:\s*62 01 7b ff 7a f5\s+vcvtudq2ps ymm30\{k7\}\{z\},ymm29\{rz-sae\}
+\s*[a-f0-9]+:\s*62 01 fb 18 e6 f5\s+vcvtpd2dq xmm30,ymm29\{rn-sae\}
+\s*[a-f0-9]+:\s*62 01 fb 3f e6 f5\s+vcvtpd2dq xmm30\{k7\},ymm29\{rd-sae\}
+\s*[a-f0-9]+:\s*62 01 fb ff e6 f5\s+vcvtpd2dq xmm30\{k7\}\{z\},ymm29\{rz-sae\}
+\s*[a-f0-9]+:\s*62 05 f9 18 5a f5\s+vcvtpd2ph xmm30,ymm29\{rn-sae\}
+\s*[a-f0-9]+:\s*62 05 f9 3f 5a f5\s+vcvtpd2ph xmm30\{k7\},ymm29\{rd-sae\}
+\s*[a-f0-9]+:\s*62 05 f9 ff 5a f5\s+vcvtpd2ph xmm30\{k7\}\{z\},ymm29\{rz-sae\}
+\s*[a-f0-9]+:\s*62 01 f9 18 5a f5\s+vcvtpd2ps xmm30,ymm29\{rn-sae\}
+\s*[a-f0-9]+:\s*62 01 f9 3f 5a f5\s+vcvtpd2ps xmm30\{k7\},ymm29\{rd-sae\}
+\s*[a-f0-9]+:\s*62 01 f9 ff 5a f5\s+vcvtpd2ps xmm30\{k7\}\{z\},ymm29\{rz-sae\}
+\s*[a-f0-9]+:\s*62 01 f8 18 79 f5\s+vcvtpd2udq xmm30,ymm29\{rn-sae\}
+\s*[a-f0-9]+:\s*62 01 f8 3f 79 f5\s+vcvtpd2udq xmm30\{k7\},ymm29\{rd-sae\}
+\s*[a-f0-9]+:\s*62 01 f8 ff 79 f5\s+vcvtpd2udq xmm30\{k7\}\{z\},ymm29\{rz-sae\}
+\s*[a-f0-9]+:\s*62 01 f9 18 7b f5\s+vcvtpd2qq ymm30,ymm29\{rn-sae\}
+\s*[a-f0-9]+:\s*62 01 f9 3f 7b f5\s+vcvtpd2qq ymm30\{k7\},ymm29\{rd-sae\}
+\s*[a-f0-9]+:\s*62 01 f9 ff 7b f5\s+vcvtpd2qq ymm30\{k7\}\{z\},ymm29\{rz-sae\}
+\s*[a-f0-9]+:\s*62 01 f9 18 79 f5\s+vcvtpd2uqq ymm30,ymm29\{rn-sae\}
+\s*[a-f0-9]+:\s*62 01 f9 3f 79 f5\s+vcvtpd2uqq ymm30\{k7\},ymm29\{rd-sae\}
+\s*[a-f0-9]+:\s*62 01 f9 ff 79 f5\s+vcvtpd2uqq ymm30\{k7\}\{z\},ymm29\{rz-sae\}
+\s*[a-f0-9]+:\s*62 05 79 18 5b f5\s+vcvtph2dq ymm30,xmm29\{rn-sae\}
+\s*[a-f0-9]+:\s*62 05 79 3f 5b f5\s+vcvtph2dq ymm30\{k7\},xmm29\{rd-sae\}
+\s*[a-f0-9]+:\s*62 05 79 ff 5b f5\s+vcvtph2dq ymm30\{k7\}\{z\},xmm29\{rz-sae\}
+\s*[a-f0-9]+:\s*62 05 79 18 7b f5\s+vcvtph2qq ymm30,xmm29\{rn-sae\}
+\s*[a-f0-9]+:\s*62 05 79 3f 7b f5\s+vcvtph2qq ymm30\{k7\},xmm29\{rd-sae\}
+\s*[a-f0-9]+:\s*62 05 79 ff 7b f5\s+vcvtph2qq ymm30\{k7\}\{z\},xmm29\{rz-sae\}
+\s*[a-f0-9]+:\s*62 05 78 18 79 f5\s+vcvtph2udq ymm30,xmm29\{rn-sae\}
+\s*[a-f0-9]+:\s*62 05 78 3f 79 f5\s+vcvtph2udq ymm30\{k7\},xmm29\{rd-sae\}
+\s*[a-f0-9]+:\s*62 05 78 ff 79 f5\s+vcvtph2udq ymm30\{k7\}\{z\},xmm29\{rz-sae\}
+\s*[a-f0-9]+:\s*62 05 79 18 79 f5\s+vcvtph2uqq ymm30,xmm29\{rn-sae\}
+\s*[a-f0-9]+:\s*62 05 79 3f 79 f5\s+vcvtph2uqq ymm30\{k7\},xmm29\{rd-sae\}
+\s*[a-f0-9]+:\s*62 05 79 ff 79 f5\s+vcvtph2uqq ymm30\{k7\}\{z\},xmm29\{rz-sae\}
+\s*[a-f0-9]+:\s*62 05 78 18 5a f5\s+vcvtph2pd ymm30,xmm29\{sae\}
+\s*[a-f0-9]+:\s*62 05 78 1f 5a f5\s+vcvtph2pd ymm30\{k7\},xmm29\{sae\}
+\s*[a-f0-9]+:\s*62 05 78 9f 5a f5\s+vcvtph2pd ymm30\{k7\}\{z\},xmm29\{sae\}
+\s*[a-f0-9]+:\s*62 02 79 18 13 f5\s+vcvtph2ps ymm30,xmm29\{sae\}
+\s*[a-f0-9]+:\s*62 02 79 1f 13 f5\s+vcvtph2ps ymm30\{k7\},xmm29\{sae\}
+\s*[a-f0-9]+:\s*62 02 79 9f 13 f5\s+vcvtph2ps ymm30\{k7\}\{z\},xmm29\{sae\}
+\s*[a-f0-9]+:\s*62 06 79 18 13 f5\s+vcvtph2psx ymm30,xmm29\{sae\}
+\s*[a-f0-9]+:\s*62 06 79 1f 13 f5\s+vcvtph2psx ymm30\{k7\},xmm29\{sae\}
+\s*[a-f0-9]+:\s*62 06 79 9f 13 f5\s+vcvtph2psx ymm30\{k7\}\{z\},xmm29\{sae\}
+\s*[a-f0-9]+:\s*62 05 78 18 7d f5\s+vcvtph2uw ymm30,ymm29\{rn-sae\}
+\s*[a-f0-9]+:\s*62 05 78 3f 7d f5\s+vcvtph2uw ymm30\{k7\},ymm29\{rd-sae\}
+\s*[a-f0-9]+:\s*62 05 78 ff 7d f5\s+vcvtph2uw ymm30\{k7\}\{z\},ymm29\{rz-sae\}
+\s*[a-f0-9]+:\s*62 05 79 18 7d f5\s+vcvtph2w ymm30,ymm29\{rn-sae\}
+\s*[a-f0-9]+:\s*62 05 79 3f 7d f5\s+vcvtph2w ymm30\{k7\},ymm29\{rd-sae\}
+\s*[a-f0-9]+:\s*62 05 79 ff 7d f5\s+vcvtph2w ymm30\{k7\}\{z\},ymm29\{rz-sae\}
+\s*[a-f0-9]+:\s*62 01 79 18 5b f5\s+vcvtps2dq ymm30,ymm29\{rn-sae\}
+\s*[a-f0-9]+:\s*62 01 79 3f 5b f5\s+vcvtps2dq ymm30\{k7\},ymm29\{rd-sae\}
+\s*[a-f0-9]+:\s*62 01 79 ff 5b f5\s+vcvtps2dq ymm30\{k7\}\{z\},ymm29\{rz-sae\}
+\s*[a-f0-9]+:\s*62 01 78 18 79 f5\s+vcvtps2udq ymm30,ymm29\{rn-sae\}
+\s*[a-f0-9]+:\s*62 01 78 3f 79 f5\s+vcvtps2udq ymm30\{k7\},ymm29\{rd-sae\}
+\s*[a-f0-9]+:\s*62 01 78 ff 79 f5\s+vcvtps2udq ymm30\{k7\}\{z\},ymm29\{rz-sae\}
+\s*[a-f0-9]+:\s*62 01 78 18 5a f5\s+vcvtps2pd ymm30,xmm29\{sae\}
+\s*[a-f0-9]+:\s*62 01 78 1f 5a f5\s+vcvtps2pd ymm30\{k7\},xmm29\{sae\}
+\s*[a-f0-9]+:\s*62 01 78 9f 5a f5\s+vcvtps2pd ymm30\{k7\}\{z\},xmm29\{sae\}
+\s*[a-f0-9]+:\s*62 05 79 18 1d f5\s+vcvtps2phx xmm30,ymm29\{rn-sae\}
+\s*[a-f0-9]+:\s*62 05 79 3f 1d f5\s+vcvtps2phx xmm30\{k7\},ymm29\{rd-sae\}
+\s*[a-f0-9]+:\s*62 05 79 ff 1d f5\s+vcvtps2phx xmm30\{k7\}\{z\},ymm29\{rz-sae\}
+\s*[a-f0-9]+:\s*62 01 79 18 7b f5\s+vcvtps2qq ymm30,xmm29\{rn-sae\}
+\s*[a-f0-9]+:\s*62 01 79 3f 7b f5\s+vcvtps2qq ymm30\{k7\},xmm29\{rd-sae\}
+\s*[a-f0-9]+:\s*62 01 79 ff 7b f5\s+vcvtps2qq ymm30\{k7\}\{z\},xmm29\{rz-sae\}
+\s*[a-f0-9]+:\s*62 01 79 18 79 f5\s+vcvtps2uqq ymm30,xmm29\{rn-sae\}
+\s*[a-f0-9]+:\s*62 01 79 3f 79 f5\s+vcvtps2uqq ymm30\{k7\},xmm29\{rd-sae\}
+\s*[a-f0-9]+:\s*62 01 79 ff 79 f5\s+vcvtps2uqq ymm30\{k7\}\{z\},xmm29\{rz-sae\}
+\s*[a-f0-9]+:\s*62 01 fa 18 e6 f5\s+vcvtqq2pd ymm30,ymm29\{rn-sae\}
+\s*[a-f0-9]+:\s*62 01 fa 3f e6 f5\s+vcvtqq2pd ymm30\{k7\},ymm29\{rd-sae\}
+\s*[a-f0-9]+:\s*62 01 fa ff e6 f5\s+vcvtqq2pd ymm30\{k7\}\{z\},ymm29\{rz-sae\}
+\s*[a-f0-9]+:\s*62 05 f8 18 5b f5\s+vcvtqq2ph xmm30,ymm29\{rn-sae\}
+\s*[a-f0-9]+:\s*62 05 f8 3f 5b f5\s+vcvtqq2ph xmm30\{k7\},ymm29\{rd-sae\}
+\s*[a-f0-9]+:\s*62 05 f8 ff 5b f5\s+vcvtqq2ph xmm30\{k7\}\{z\},ymm29\{rz-sae\}
+\s*[a-f0-9]+:\s*62 01 f8 18 5b f5\s+vcvtqq2ps xmm30,ymm29\{rn-sae\}
+\s*[a-f0-9]+:\s*62 01 f8 3f 5b f5\s+vcvtqq2ps xmm30\{k7\},ymm29\{rd-sae\}
+\s*[a-f0-9]+:\s*62 01 f8 ff 5b f5\s+vcvtqq2ps xmm30\{k7\}\{z\},ymm29\{rz-sae\}
+\s*[a-f0-9]+:\s*62 01 fa 18 7a f5\s+vcvtuqq2pd ymm30,ymm29\{rn-sae\}
+\s*[a-f0-9]+:\s*62 01 fa 3f 7a f5\s+vcvtuqq2pd ymm30\{k7\},ymm29\{rd-sae\}
+\s*[a-f0-9]+:\s*62 01 fa ff 7a f5\s+vcvtuqq2pd ymm30\{k7\}\{z\},ymm29\{rz-sae\}
+\s*[a-f0-9]+:\s*62 05 fb 18 7a f5\s+vcvtuqq2ph xmm30,ymm29\{rn-sae\}
+\s*[a-f0-9]+:\s*62 05 fb 3f 7a f5\s+vcvtuqq2ph xmm30\{k7\},ymm29\{rd-sae\}
+\s*[a-f0-9]+:\s*62 05 fb ff 7a f5\s+vcvtuqq2ph xmm30\{k7\}\{z\},ymm29\{rz-sae\}
+\s*[a-f0-9]+:\s*62 01 fb 18 7a f5\s+vcvtuqq2ps xmm30,ymm29\{rn-sae\}
+\s*[a-f0-9]+:\s*62 01 fb 3f 7a f5\s+vcvtuqq2ps xmm30\{k7\},ymm29\{rd-sae\}
+\s*[a-f0-9]+:\s*62 01 fb ff 7a f5\s+vcvtuqq2ps xmm30\{k7\}\{z\},ymm29\{rz-sae\}
+\s*[a-f0-9]+:\s*62 01 f9 18 e6 f5\s+vcvttpd2dq xmm30,ymm29\{sae\}
+\s*[a-f0-9]+:\s*62 01 f9 1f e6 f5\s+vcvttpd2dq xmm30\{k7\},ymm29\{sae\}
+\s*[a-f0-9]+:\s*62 01 f9 9f e6 f5\s+vcvttpd2dq xmm30\{k7\}\{z\},ymm29\{sae\}
+\s*[a-f0-9]+:\s*62 01 f8 18 78 f5\s+vcvttpd2udq xmm30,ymm29\{sae\}
+\s*[a-f0-9]+:\s*62 01 f8 1f 78 f5\s+vcvttpd2udq xmm30\{k7\},ymm29\{sae\}
+\s*[a-f0-9]+:\s*62 01 f8 9f 78 f5\s+vcvttpd2udq xmm30\{k7\}\{z\},ymm29\{sae\}
+\s*[a-f0-9]+:\s*62 01 f9 18 7a f5\s+vcvttpd2qq ymm30,ymm29\{sae\}
+\s*[a-f0-9]+:\s*62 01 f9 1f 7a f5\s+vcvttpd2qq ymm30\{k7\},ymm29\{sae\}
+\s*[a-f0-9]+:\s*62 01 f9 9f 7a f5\s+vcvttpd2qq ymm30\{k7\}\{z\},ymm29\{sae\}
+\s*[a-f0-9]+:\s*62 01 f9 18 78 f5\s+vcvttpd2uqq ymm30,ymm29\{sae\}
+\s*[a-f0-9]+:\s*62 01 f9 1f 78 f5\s+vcvttpd2uqq ymm30\{k7\},ymm29\{sae\}
+\s*[a-f0-9]+:\s*62 01 f9 9f 78 f5\s+vcvttpd2uqq ymm30\{k7\}\{z\},ymm29\{sae\}
+\s*[a-f0-9]+:\s*62 05 7a 18 5b f5\s+vcvttph2dq ymm30,xmm29\{sae\}
+\s*[a-f0-9]+:\s*62 05 7a 1f 5b f5\s+vcvttph2dq ymm30\{k7\},xmm29\{sae\}
+\s*[a-f0-9]+:\s*62 05 7a 9f 5b f5\s+vcvttph2dq ymm30\{k7\}\{z\},xmm29\{sae\}
+\s*[a-f0-9]+:\s*62 05 79 18 7a f5\s+vcvttph2qq ymm30,xmm29\{sae\}
+\s*[a-f0-9]+:\s*62 05 79 1f 7a f5\s+vcvttph2qq ymm30\{k7\},xmm29\{sae\}
+\s*[a-f0-9]+:\s*62 05 79 9f 7a f5\s+vcvttph2qq ymm30\{k7\}\{z\},xmm29\{sae\}
+\s*[a-f0-9]+:\s*62 05 78 18 78 f5\s+vcvttph2udq ymm30,xmm29\{sae\}
+\s*[a-f0-9]+:\s*62 05 78 1f 78 f5\s+vcvttph2udq ymm30\{k7\},xmm29\{sae\}
+\s*[a-f0-9]+:\s*62 05 78 9f 78 f5\s+vcvttph2udq ymm30\{k7\}\{z\},xmm29\{sae\}
+\s*[a-f0-9]+:\s*62 05 79 18 78 f5\s+vcvttph2uqq ymm30,xmm29\{sae\}
+\s*[a-f0-9]+:\s*62 05 79 1f 78 f5\s+vcvttph2uqq ymm30\{k7\},xmm29\{sae\}
+\s*[a-f0-9]+:\s*62 05 79 9f 78 f5\s+vcvttph2uqq ymm30\{k7\}\{z\},xmm29\{sae\}
+\s*[a-f0-9]+:\s*62 05 78 18 7c f5\s+vcvttph2uw ymm30,ymm29\{sae\}
+\s*[a-f0-9]+:\s*62 05 78 1f 7c f5\s+vcvttph2uw ymm30\{k7\},ymm29\{sae\}
+\s*[a-f0-9]+:\s*62 05 78 9f 7c f5\s+vcvttph2uw ymm30\{k7\}\{z\},ymm29\{sae\}
+\s*[a-f0-9]+:\s*62 05 79 18 7c f5\s+vcvttph2w ymm30,ymm29\{sae\}
+\s*[a-f0-9]+:\s*62 05 79 1f 7c f5\s+vcvttph2w ymm30\{k7\},ymm29\{sae\}
+\s*[a-f0-9]+:\s*62 05 79 9f 7c f5\s+vcvttph2w ymm30\{k7\}\{z\},ymm29\{sae\}
+\s*[a-f0-9]+:\s*62 01 7a 18 5b f5\s+vcvttps2dq ymm30,ymm29\{sae\}
+\s*[a-f0-9]+:\s*62 01 7a 1f 5b f5\s+vcvttps2dq ymm30\{k7\},ymm29\{sae\}
+\s*[a-f0-9]+:\s*62 01 7a 9f 5b f5\s+vcvttps2dq ymm30\{k7\}\{z\},ymm29\{sae\}
+\s*[a-f0-9]+:\s*62 01 78 18 78 f5\s+vcvttps2udq ymm30,ymm29\{sae\}
+\s*[a-f0-9]+:\s*62 01 78 1f 78 f5\s+vcvttps2udq ymm30\{k7\},ymm29\{sae\}
+\s*[a-f0-9]+:\s*62 01 78 9f 78 f5\s+vcvttps2udq ymm30\{k7\}\{z\},ymm29\{sae\}
+\s*[a-f0-9]+:\s*62 01 79 18 7a f5\s+vcvttps2qq ymm30,xmm29\{sae\}
+\s*[a-f0-9]+:\s*62 01 79 1f 7a f5\s+vcvttps2qq ymm30\{k7\},xmm29\{sae\}
+\s*[a-f0-9]+:\s*62 01 79 9f 7a f5\s+vcvttps2qq ymm30\{k7\}\{z\},xmm29\{sae\}
+\s*[a-f0-9]+:\s*62 01 79 18 78 f5\s+vcvttps2uqq ymm30,xmm29\{sae\}
+\s*[a-f0-9]+:\s*62 01 79 1f 78 f5\s+vcvttps2uqq ymm30\{k7\},xmm29\{sae\}
+\s*[a-f0-9]+:\s*62 01 79 9f 78 f5\s+vcvttps2uqq ymm30\{k7\}\{z\},xmm29\{sae\}
+\s*[a-f0-9]+:\s*62 05 7b 18 7d f5\s+vcvtuw2ph ymm30,ymm29\{rn-sae\}
+\s*[a-f0-9]+:\s*62 05 7b 3f 7d f5\s+vcvtuw2ph ymm30\{k7\},ymm29\{rd-sae\}
+\s*[a-f0-9]+:\s*62 05 7b ff 7d f5\s+vcvtuw2ph ymm30\{k7\}\{z\},ymm29\{rz-sae\}
+\s*[a-f0-9]+:\s*62 05 7a 18 7d f5\s+vcvtw2ph ymm30,ymm29\{rn-sae\}
+\s*[a-f0-9]+:\s*62 05 7a 3f 7d f5\s+vcvtw2ph ymm30\{k7\},ymm29\{rd-sae\}
+\s*[a-f0-9]+:\s*62 05 7a ff 7d f5\s+vcvtw2ph ymm30\{k7\}\{z\},ymm29\{rz-sae\}
+#pass
diff --git a/gas/testsuite/gas/i386/x86-64-avx10_2-rounding.d b/gas/testsuite/gas/i386/x86-64-avx10_2-rounding.d
new file mode 100644
index 0000000..2bdfbf3
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-avx10_2-rounding.d
@@ -0,0 +1,450 @@
+#objdump: -dw
+#name: x86_64 AVX10.2 rounding insns
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+0+ <_start>:
+\s*[a-f0-9]+:\s*62 91 91 10 c2 ec 7b\s+vcmppd \$0x7b,\{sae\},%ymm28,%ymm29,%k5
+\s*[a-f0-9]+:\s*62 91 91 17 c2 ec 7b\s+vcmppd \$0x7b,\{sae\},%ymm28,%ymm29,%k5\{%k7\}
+\s*[a-f0-9]+:\s*62 02 f9 18 42 f5\s+vgetexppd \{sae\},%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 02 f9 1f 42 f5\s+vgetexppd \{sae\},%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 02 f9 9f 42 f5\s+vgetexppd \{sae\},%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 01 f9 18 51 f5\s+vsqrtpd \{rn-sae\},%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 01 f9 3f 51 f5\s+vsqrtpd \{rd-sae\},%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 01 f9 ff 51 f5\s+vsqrtpd \{rz-sae\},%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 93 10 10 c2 ec 7b\s+vcmpph \$0x7b,\{sae\},%ymm28,%ymm29,%k5
+\s*[a-f0-9]+:\s*62 93 10 17 c2 ec 7b\s+vcmpph \$0x7b,\{sae\},%ymm28,%ymm29,%k5\{%k7\}
+\s*[a-f0-9]+:\s*62 06 79 18 42 f5\s+vgetexpph \{sae\},%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 06 79 1f 42 f5\s+vgetexpph \{sae\},%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 06 79 9f 42 f5\s+vgetexpph \{sae\},%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 05 78 18 51 f5\s+vsqrtph \{rn-sae\},%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 05 78 3f 51 f5\s+vsqrtph \{rd-sae\},%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 05 78 ff 51 f5\s+vsqrtph \{rz-sae\},%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 91 10 10 c2 ec 7b\s+vcmpps \$0x7b,\{sae\},%ymm28,%ymm29,%k5
+\s*[a-f0-9]+:\s*62 91 10 17 c2 ec 7b\s+vcmpps \$0x7b,\{sae\},%ymm28,%ymm29,%k5\{%k7\}
+\s*[a-f0-9]+:\s*62 02 79 18 42 f5\s+vgetexpps \{sae\},%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 02 79 1f 42 f5\s+vgetexpps \{sae\},%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 02 79 9f 42 f5\s+vgetexpps \{sae\},%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 01 78 18 51 f5\s+vsqrtps \{rn-sae\},%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 01 78 3f 51 f5\s+vsqrtps \{rd-sae\},%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 01 78 ff 51 f5\s+vsqrtps \{rz-sae\},%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 01 91 10 58 f4\s+vaddpd \{rn-sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 01 91 37 58 f4\s+vaddpd \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 01 91 f7 58 f4\s+vaddpd \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 05 10 10 58 f4\s+vaddph \{rn-sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 05 10 37 58 f4\s+vaddph \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 05 10 f7 58 f4\s+vaddph \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 01 10 10 58 f4\s+vaddps \{rn-sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 01 10 37 58 f4\s+vaddps \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 01 10 f7 58 f4\s+vaddps \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 01 91 10 5e f4\s+vdivpd \{rn-sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 01 91 37 5e f4\s+vdivpd \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 01 91 f7 5e f4\s+vdivpd \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 05 10 10 5e f4\s+vdivph \{rn-sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 05 10 37 5e f4\s+vdivph \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 05 10 f7 5e f4\s+vdivph \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 01 10 10 5e f4\s+vdivps \{rn-sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 01 10 37 5e f4\s+vdivps \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 01 10 f7 5e f4\s+vdivps \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 01 91 10 59 f4\s+vmulpd \{rn-sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 01 91 37 59 f4\s+vmulpd \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 01 91 f7 59 f4\s+vmulpd \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 05 10 10 59 f4\s+vmulph \{rn-sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 05 10 37 59 f4\s+vmulph \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 05 10 f7 59 f4\s+vmulph \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 01 10 10 59 f4\s+vmulps \{rn-sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 01 10 37 59 f4\s+vmulps \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 01 10 f7 59 f4\s+vmulps \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 91 10 2c f4\s+vscalefpd \{rn-sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 02 91 37 2c f4\s+vscalefpd \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 02 91 f7 2c f4\s+vscalefpd \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 06 11 10 2c f4\s+vscalefph \{rn-sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 06 11 37 2c f4\s+vscalefph \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 06 11 f7 2c f4\s+vscalefph \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 11 10 2c f4\s+vscalefps \{rn-sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 02 11 37 2c f4\s+vscalefps \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 02 11 f7 2c f4\s+vscalefps \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 01 91 10 5c f4\s+vsubpd \{rn-sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 01 91 37 5c f4\s+vsubpd \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 01 91 f7 5c f4\s+vsubpd \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 05 10 10 5c f4\s+vsubph \{rn-sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 05 10 37 5c f4\s+vsubph \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 05 10 f7 5c f4\s+vsubph \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 01 10 10 5c f4\s+vsubps \{rn-sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 01 10 37 5c f4\s+vsubps \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 01 10 f7 5c f4\s+vsubps \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 01 91 10 5f f4\s+vmaxpd \{sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 01 91 17 5f f4\s+vmaxpd \{sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 01 91 97 5f f4\s+vmaxpd \{sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 05 10 10 5f f4\s+vmaxph \{sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 05 10 17 5f f4\s+vmaxph \{sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 05 10 97 5f f4\s+vmaxph \{sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 01 10 10 5f f4\s+vmaxps \{sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 01 10 17 5f f4\s+vmaxps \{sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 01 10 97 5f f4\s+vmaxps \{sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 01 91 10 5d f4\s+vminpd \{sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 01 91 17 5d f4\s+vminpd \{sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 01 91 97 5d f4\s+vminpd \{sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 05 10 10 5d f4\s+vminph \{sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 05 10 17 5d f4\s+vminph \{sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 05 10 97 5d f4\s+vminph \{sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 01 10 10 5d f4\s+vminps \{sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 01 10 17 5d f4\s+vminps \{sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 01 10 97 5d f4\s+vminps \{sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 03 f9 18 26 f5 7b\s+vgetmantpd \$0x7b,\{sae\},%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 03 f9 1f 26 f5 7b\s+vgetmantpd \$0x7b,\{sae\},%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 03 f9 9f 26 f5 7b\s+vgetmantpd \$0x7b,\{sae\},%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 03 78 18 26 f5 7b\s+vgetmantph \$0x7b,\{sae\},%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 03 78 1f 26 f5 7b\s+vgetmantph \$0x7b,\{sae\},%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 03 78 9f 26 f5 7b\s+vgetmantph \$0x7b,\{sae\},%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 03 79 18 26 f5 7b\s+vgetmantps \$0x7b,\{sae\},%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 03 79 1f 26 f5 7b\s+vgetmantps \$0x7b,\{sae\},%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 03 79 9f 26 f5 7b\s+vgetmantps \$0x7b,\{sae\},%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 03 f9 18 56 f5 7b\s+vreducepd \$0x7b,\{sae\},%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 03 f9 1f 56 f5 7b\s+vreducepd \$0x7b,\{sae\},%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 03 f9 9f 56 f5 7b\s+vreducepd \$0x7b,\{sae\},%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 03 78 18 56 f5 7b\s+vreduceph \$0x7b,\{sae\},%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 03 78 1f 56 f5 7b\s+vreduceph \$0x7b,\{sae\},%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 03 78 9f 56 f5 7b\s+vreduceph \$0x7b,\{sae\},%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 03 79 18 56 f5 7b\s+vreduceps \$0x7b,\{sae\},%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 03 79 1f 56 f5 7b\s+vreduceps \$0x7b,\{sae\},%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 03 79 9f 56 f5 7b\s+vreduceps \$0x7b,\{sae\},%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 03 f9 18 09 f5 7b\s+vrndscalepd \$0x7b,\{sae\},%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 03 f9 1f 09 f5 7b\s+vrndscalepd \$0x7b,\{sae\},%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 03 f9 9f 09 f5 7b\s+vrndscalepd \$0x7b,\{sae\},%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 03 78 18 08 f5 7b\s+vrndscaleph \$0x7b,\{sae\},%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 03 78 1f 08 f5 7b\s+vrndscaleph \$0x7b,\{sae\},%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 03 78 9f 08 f5 7b\s+vrndscaleph \$0x7b,\{sae\},%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 03 79 18 08 f5 7b\s+vrndscaleps \$0x7b,\{sae\},%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 03 79 1f 08 f5 7b\s+vrndscaleps \$0x7b,\{sae\},%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 03 79 9f 08 f5 7b\s+vrndscaleps \$0x7b,\{sae\},%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 91 10 98 f4\s+vfmadd132pd \{rn-sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 02 91 37 98 f4\s+vfmadd132pd \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 02 91 f7 98 f4\s+vfmadd132pd \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 06 11 10 98 f4\s+vfmadd132ph \{rn-sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 06 11 37 98 f4\s+vfmadd132ph \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 06 11 f7 98 f4\s+vfmadd132ph \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 11 10 98 f4\s+vfmadd132ps \{rn-sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 02 11 37 98 f4\s+vfmadd132ps \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 02 11 f7 98 f4\s+vfmadd132ps \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 91 10 a8 f4\s+vfmadd213pd \{rn-sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 02 91 37 a8 f4\s+vfmadd213pd \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 02 91 f7 a8 f4\s+vfmadd213pd \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 06 11 10 a8 f4\s+vfmadd213ph \{rn-sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 06 11 37 a8 f4\s+vfmadd213ph \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 06 11 f7 a8 f4\s+vfmadd213ph \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 11 10 a8 f4\s+vfmadd213ps \{rn-sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 02 11 37 a8 f4\s+vfmadd213ps \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 02 11 f7 a8 f4\s+vfmadd213ps \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 91 10 b8 f4\s+vfmadd231pd \{rn-sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 02 91 37 b8 f4\s+vfmadd231pd \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 02 91 f7 b8 f4\s+vfmadd231pd \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 06 11 10 b8 f4\s+vfmadd231ph \{rn-sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 06 11 37 b8 f4\s+vfmadd231ph \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 06 11 f7 b8 f4\s+vfmadd231ph \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 11 10 b8 f4\s+vfmadd231ps \{rn-sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 02 11 37 b8 f4\s+vfmadd231ps \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 02 11 f7 b8 f4\s+vfmadd231ps \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 91 10 96 f4\s+vfmaddsub132pd \{rn-sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 02 91 37 96 f4\s+vfmaddsub132pd \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 02 91 f7 96 f4\s+vfmaddsub132pd \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 06 11 10 96 f4\s+vfmaddsub132ph \{rn-sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 06 11 37 96 f4\s+vfmaddsub132ph \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 06 11 f7 96 f4\s+vfmaddsub132ph \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 11 10 96 f4\s+vfmaddsub132ps \{rn-sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 02 11 37 96 f4\s+vfmaddsub132ps \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 02 11 f7 96 f4\s+vfmaddsub132ps \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 91 10 a6 f4\s+vfmaddsub213pd \{rn-sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 02 91 37 a6 f4\s+vfmaddsub213pd \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 02 91 f7 a6 f4\s+vfmaddsub213pd \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 06 11 10 a6 f4\s+vfmaddsub213ph \{rn-sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 06 11 37 a6 f4\s+vfmaddsub213ph \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 06 11 f7 a6 f4\s+vfmaddsub213ph \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 11 10 a6 f4\s+vfmaddsub213ps \{rn-sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 02 11 37 a6 f4\s+vfmaddsub213ps \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 02 11 f7 a6 f4\s+vfmaddsub213ps \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 91 10 b6 f4\s+vfmaddsub231pd \{rn-sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 02 91 37 b6 f4\s+vfmaddsub231pd \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 02 91 f7 b6 f4\s+vfmaddsub231pd \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 06 11 10 b6 f4\s+vfmaddsub231ph \{rn-sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 06 11 37 b6 f4\s+vfmaddsub231ph \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 06 11 f7 b6 f4\s+vfmaddsub231ph \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 11 10 b6 f4\s+vfmaddsub231ps \{rn-sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 02 11 37 b6 f4\s+vfmaddsub231ps \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 02 11 f7 b6 f4\s+vfmaddsub231ps \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 91 10 9a f4\s+vfmsub132pd \{rn-sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 02 91 37 9a f4\s+vfmsub132pd \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 02 91 f7 9a f4\s+vfmsub132pd \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 06 11 10 9a f4\s+vfmsub132ph \{rn-sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 06 11 37 9a f4\s+vfmsub132ph \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 06 11 f7 9a f4\s+vfmsub132ph \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 11 10 9a f4\s+vfmsub132ps \{rn-sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 02 11 37 9a f4\s+vfmsub132ps \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 02 11 f7 9a f4\s+vfmsub132ps \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 91 10 aa f4\s+vfmsub213pd \{rn-sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 02 91 37 aa f4\s+vfmsub213pd \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 02 91 f7 aa f4\s+vfmsub213pd \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 06 11 10 aa f4\s+vfmsub213ph \{rn-sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 06 11 37 aa f4\s+vfmsub213ph \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 06 11 f7 aa f4\s+vfmsub213ph \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 11 10 aa f4\s+vfmsub213ps \{rn-sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 02 11 37 aa f4\s+vfmsub213ps \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 02 11 f7 aa f4\s+vfmsub213ps \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 91 10 ba f4\s+vfmsub231pd \{rn-sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 02 91 37 ba f4\s+vfmsub231pd \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 02 91 f7 ba f4\s+vfmsub231pd \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 06 11 10 ba f4\s+vfmsub231ph \{rn-sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 06 11 37 ba f4\s+vfmsub231ph \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 06 11 f7 ba f4\s+vfmsub231ph \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 11 10 ba f4\s+vfmsub231ps \{rn-sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 02 11 37 ba f4\s+vfmsub231ps \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 02 11 f7 ba f4\s+vfmsub231ps \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 91 10 97 f4\s+vfmsubadd132pd \{rn-sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 02 91 37 97 f4\s+vfmsubadd132pd \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 02 91 f7 97 f4\s+vfmsubadd132pd \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 06 11 10 97 f4\s+vfmsubadd132ph \{rn-sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 06 11 37 97 f4\s+vfmsubadd132ph \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 06 11 f7 97 f4\s+vfmsubadd132ph \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 11 10 97 f4\s+vfmsubadd132ps \{rn-sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 02 11 37 97 f4\s+vfmsubadd132ps \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 02 11 f7 97 f4\s+vfmsubadd132ps \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 91 10 a7 f4\s+vfmsubadd213pd \{rn-sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 02 91 37 a7 f4\s+vfmsubadd213pd \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 02 91 f7 a7 f4\s+vfmsubadd213pd \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 06 11 10 a7 f4\s+vfmsubadd213ph \{rn-sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 06 11 37 a7 f4\s+vfmsubadd213ph \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 06 11 f7 a7 f4\s+vfmsubadd213ph \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 11 10 a7 f4\s+vfmsubadd213ps \{rn-sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 02 11 37 a7 f4\s+vfmsubadd213ps \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 02 11 f7 a7 f4\s+vfmsubadd213ps \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 91 10 b7 f4\s+vfmsubadd231pd \{rn-sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 02 91 37 b7 f4\s+vfmsubadd231pd \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 02 91 f7 b7 f4\s+vfmsubadd231pd \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 06 11 10 b7 f4\s+vfmsubadd231ph \{rn-sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 06 11 37 b7 f4\s+vfmsubadd231ph \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 06 11 f7 b7 f4\s+vfmsubadd231ph \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 11 10 b7 f4\s+vfmsubadd231ps \{rn-sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 02 11 37 b7 f4\s+vfmsubadd231ps \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 02 11 f7 b7 f4\s+vfmsubadd231ps \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 91 10 9c f4\s+vfnmadd132pd \{rn-sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 02 91 37 9c f4\s+vfnmadd132pd \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 02 91 f7 9c f4\s+vfnmadd132pd \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 06 11 10 9c f4\s+vfnmadd132ph \{rn-sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 06 11 37 9c f4\s+vfnmadd132ph \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 06 11 f7 9c f4\s+vfnmadd132ph \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 11 10 9c f4\s+vfnmadd132ps \{rn-sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 02 11 37 9c f4\s+vfnmadd132ps \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 02 11 f7 9c f4\s+vfnmadd132ps \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 91 10 ac f4\s+vfnmadd213pd \{rn-sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 02 91 37 ac f4\s+vfnmadd213pd \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 02 91 f7 ac f4\s+vfnmadd213pd \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 06 11 10 ac f4\s+vfnmadd213ph \{rn-sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 06 11 37 ac f4\s+vfnmadd213ph \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 06 11 f7 ac f4\s+vfnmadd213ph \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 11 10 ac f4\s+vfnmadd213ps \{rn-sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 02 11 37 ac f4\s+vfnmadd213ps \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 02 11 f7 ac f4\s+vfnmadd213ps \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 91 10 bc f4\s+vfnmadd231pd \{rn-sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 02 91 37 bc f4\s+vfnmadd231pd \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 02 91 f7 bc f4\s+vfnmadd231pd \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 06 11 10 bc f4\s+vfnmadd231ph \{rn-sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 06 11 37 bc f4\s+vfnmadd231ph \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 06 11 f7 bc f4\s+vfnmadd231ph \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 11 10 bc f4\s+vfnmadd231ps \{rn-sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 02 11 37 bc f4\s+vfnmadd231ps \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 02 11 f7 bc f4\s+vfnmadd231ps \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 91 10 9e f4\s+vfnmsub132pd \{rn-sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 02 91 37 9e f4\s+vfnmsub132pd \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 02 91 f7 9e f4\s+vfnmsub132pd \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 06 11 10 9e f4\s+vfnmsub132ph \{rn-sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 06 11 37 9e f4\s+vfnmsub132ph \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 06 11 f7 9e f4\s+vfnmsub132ph \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 11 10 9e f4\s+vfnmsub132ps \{rn-sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 02 11 37 9e f4\s+vfnmsub132ps \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 02 11 f7 9e f4\s+vfnmsub132ps \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 91 10 ae f4\s+vfnmsub213pd \{rn-sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 02 91 37 ae f4\s+vfnmsub213pd \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 02 91 f7 ae f4\s+vfnmsub213pd \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 06 11 10 ae f4\s+vfnmsub213ph \{rn-sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 06 11 37 ae f4\s+vfnmsub213ph \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 06 11 f7 ae f4\s+vfnmsub213ph \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 11 10 ae f4\s+vfnmsub213ps \{rn-sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 02 11 37 ae f4\s+vfnmsub213ps \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 02 11 f7 ae f4\s+vfnmsub213ps \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 91 10 be f4\s+vfnmsub231pd \{rn-sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 02 91 37 be f4\s+vfnmsub231pd \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 02 91 f7 be f4\s+vfnmsub231pd \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 06 11 10 be f4\s+vfnmsub231ph \{rn-sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 06 11 37 be f4\s+vfnmsub231ph \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 06 11 f7 be f4\s+vfnmsub231ph \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 11 10 be f4\s+vfnmsub231ps \{rn-sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 02 11 37 be f4\s+vfnmsub231ps \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 02 11 f7 be f4\s+vfnmsub231ps \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 03 91 10 54 f4 7b\s+vfixupimmpd \$0x7b,\{sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 03 91 17 54 f4 7b\s+vfixupimmpd \$0x7b,\{sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 03 91 97 54 f4 7b\s+vfixupimmpd \$0x7b,\{sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 03 11 10 54 f4 7b\s+vfixupimmps \$0x7b,\{sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 03 11 17 54 f4 7b\s+vfixupimmps \$0x7b,\{sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 03 11 97 54 f4 7b\s+vfixupimmps \$0x7b,\{sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 03 91 10 50 f4 7b\s+vrangepd \$0x7b,\{sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 03 91 17 50 f4 7b\s+vrangepd \$0x7b,\{sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 03 91 97 50 f4 7b\s+vrangepd \$0x7b,\{sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 03 11 10 50 f4 7b\s+vrangeps \$0x7b,\{sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 03 11 17 50 f4 7b\s+vrangeps \$0x7b,\{sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 03 11 97 50 f4 7b\s+vrangeps \$0x7b,\{sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 06 13 10 56 f4\s+vfcmaddcph \{rn-sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 06 13 37 56 f4\s+vfcmaddcph \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 06 13 f7 56 f4\s+vfcmaddcph \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 06 13 10 d6 f4\s+vfcmulcph \{rn-sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 06 13 37 d6 f4\s+vfcmulcph \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 06 13 f7 d6 f4\s+vfcmulcph \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 06 12 10 56 f4\s+vfmaddcph \{rn-sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 06 12 37 56 f4\s+vfmaddcph \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 06 12 f7 56 f4\s+vfmaddcph \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 06 12 10 d6 f4\s+vfmulcph \{rn-sae\},%ymm28,%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 06 12 37 d6 f4\s+vfmulcph \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 06 12 f7 d6 f4\s+vfmulcph \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 05 78 18 5b f5\s+vcvtdq2ph \{rn-sae\},%ymm29,%xmm30
+\s*[a-f0-9]+:\s*62 05 78 3f 5b f5\s+vcvtdq2ph \{rd-sae\},%ymm29,%xmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 05 78 ff 5b f5\s+vcvtdq2ph \{rz-sae\},%ymm29,%xmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 01 78 18 5b f5\s+vcvtdq2ps \{rn-sae\},%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 01 78 3f 5b f5\s+vcvtdq2ps \{rd-sae\},%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 01 78 ff 5b f5\s+vcvtdq2ps \{rz-sae\},%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 05 7b 18 7a f5\s+vcvtudq2ph \{rn-sae\},%ymm29,%xmm30
+\s*[a-f0-9]+:\s*62 05 7b 3f 7a f5\s+vcvtudq2ph \{rd-sae\},%ymm29,%xmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 05 7b ff 7a f5\s+vcvtudq2ph \{rz-sae\},%ymm29,%xmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 01 7b 18 7a f5\s+vcvtudq2ps \{rn-sae\},%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 01 7b 3f 7a f5\s+vcvtudq2ps \{rd-sae\},%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 01 7b ff 7a f5\s+vcvtudq2ps \{rz-sae\},%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 01 fb 18 e6 f5\s+vcvtpd2dq \{rn-sae\},%ymm29,%xmm30
+\s*[a-f0-9]+:\s*62 01 fb 3f e6 f5\s+vcvtpd2dq \{rd-sae\},%ymm29,%xmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 01 fb ff e6 f5\s+vcvtpd2dq \{rz-sae\},%ymm29,%xmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 05 f9 18 5a f5\s+vcvtpd2ph \{rn-sae\},%ymm29,%xmm30
+\s*[a-f0-9]+:\s*62 05 f9 3f 5a f5\s+vcvtpd2ph \{rd-sae\},%ymm29,%xmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 05 f9 ff 5a f5\s+vcvtpd2ph \{rz-sae\},%ymm29,%xmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 01 f9 18 5a f5\s+vcvtpd2ps \{rn-sae\},%ymm29,%xmm30
+\s*[a-f0-9]+:\s*62 01 f9 3f 5a f5\s+vcvtpd2ps \{rd-sae\},%ymm29,%xmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 01 f9 ff 5a f5\s+vcvtpd2ps \{rz-sae\},%ymm29,%xmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 01 f8 18 79 f5\s+vcvtpd2udq \{rn-sae\},%ymm29,%xmm30
+\s*[a-f0-9]+:\s*62 01 f8 3f 79 f5\s+vcvtpd2udq \{rd-sae\},%ymm29,%xmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 01 f8 ff 79 f5\s+vcvtpd2udq \{rz-sae\},%ymm29,%xmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 01 f9 18 7b f5\s+vcvtpd2qq \{rn-sae\},%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 01 f9 3f 7b f5\s+vcvtpd2qq \{rd-sae\},%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 01 f9 ff 7b f5\s+vcvtpd2qq \{rz-sae\},%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 01 f9 18 79 f5\s+vcvtpd2uqq \{rn-sae\},%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 01 f9 3f 79 f5\s+vcvtpd2uqq \{rd-sae\},%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 01 f9 ff 79 f5\s+vcvtpd2uqq \{rz-sae\},%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 05 79 18 5b f5\s+vcvtph2dq \{rn-sae\},%xmm29,%ymm30
+\s*[a-f0-9]+:\s*62 05 79 3f 5b f5\s+vcvtph2dq \{rd-sae\},%xmm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 05 79 ff 5b f5\s+vcvtph2dq \{rz-sae\},%xmm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 05 79 18 7b f5\s+vcvtph2qq \{rn-sae\},%xmm29,%ymm30
+\s*[a-f0-9]+:\s*62 05 79 3f 7b f5\s+vcvtph2qq \{rd-sae\},%xmm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 05 79 ff 7b f5\s+vcvtph2qq \{rz-sae\},%xmm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 05 78 18 79 f5\s+vcvtph2udq \{rn-sae\},%xmm29,%ymm30
+\s*[a-f0-9]+:\s*62 05 78 3f 79 f5\s+vcvtph2udq \{rd-sae\},%xmm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 05 78 ff 79 f5\s+vcvtph2udq \{rz-sae\},%xmm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 05 79 18 79 f5\s+vcvtph2uqq \{rn-sae\},%xmm29,%ymm30
+\s*[a-f0-9]+:\s*62 05 79 3f 79 f5\s+vcvtph2uqq \{rd-sae\},%xmm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 05 79 ff 79 f5\s+vcvtph2uqq \{rz-sae\},%xmm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 05 78 18 5a f5\s+vcvtph2pd \{sae\},%xmm29,%ymm30
+\s*[a-f0-9]+:\s*62 05 78 1f 5a f5\s+vcvtph2pd \{sae\},%xmm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 05 78 9f 5a f5\s+vcvtph2pd \{sae\},%xmm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 02 79 18 13 f5\s+vcvtph2ps \{sae\},%xmm29,%ymm30
+\s*[a-f0-9]+:\s*62 02 79 1f 13 f5\s+vcvtph2ps \{sae\},%xmm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 02 79 9f 13 f5\s+vcvtph2ps \{sae\},%xmm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 06 79 18 13 f5\s+vcvtph2psx \{sae\},%xmm29,%ymm30
+\s*[a-f0-9]+:\s*62 06 79 1f 13 f5\s+vcvtph2psx \{sae\},%xmm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 06 79 9f 13 f5\s+vcvtph2psx \{sae\},%xmm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 05 78 18 7d f5\s+vcvtph2uw \{rn-sae\},%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 05 78 3f 7d f5\s+vcvtph2uw \{rd-sae\},%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 05 78 ff 7d f5\s+vcvtph2uw \{rz-sae\},%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 05 79 18 7d f5\s+vcvtph2w \{rn-sae\},%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 05 79 3f 7d f5\s+vcvtph2w \{rd-sae\},%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 05 79 ff 7d f5\s+vcvtph2w \{rz-sae\},%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 01 79 18 5b f5\s+vcvtps2dq \{rn-sae\},%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 01 79 3f 5b f5\s+vcvtps2dq \{rd-sae\},%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 01 79 ff 5b f5\s+vcvtps2dq \{rz-sae\},%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 01 78 18 79 f5\s+vcvtps2udq \{rn-sae\},%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 01 78 3f 79 f5\s+vcvtps2udq \{rd-sae\},%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 01 78 ff 79 f5\s+vcvtps2udq \{rz-sae\},%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 01 78 18 5a f5\s+vcvtps2pd \{sae\},%xmm29,%ymm30
+\s*[a-f0-9]+:\s*62 01 78 1f 5a f5\s+vcvtps2pd \{sae\},%xmm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 01 78 9f 5a f5\s+vcvtps2pd \{sae\},%xmm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 05 79 18 1d f5\s+vcvtps2phx \{rn-sae\},%ymm29,%xmm30
+\s*[a-f0-9]+:\s*62 05 79 3f 1d f5\s+vcvtps2phx \{rd-sae\},%ymm29,%xmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 05 79 ff 1d f5\s+vcvtps2phx \{rz-sae\},%ymm29,%xmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 01 79 18 7b f5\s+vcvtps2qq \{rn-sae\},%xmm29,%ymm30
+\s*[a-f0-9]+:\s*62 01 79 3f 7b f5\s+vcvtps2qq \{rd-sae\},%xmm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 01 79 ff 7b f5\s+vcvtps2qq \{rz-sae\},%xmm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 01 79 18 79 f5\s+vcvtps2uqq \{rn-sae\},%xmm29,%ymm30
+\s*[a-f0-9]+:\s*62 01 79 3f 79 f5\s+vcvtps2uqq \{rd-sae\},%xmm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 01 79 ff 79 f5\s+vcvtps2uqq \{rz-sae\},%xmm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 01 fa 18 e6 f5\s+vcvtqq2pd \{rn-sae\},%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 01 fa 3f e6 f5\s+vcvtqq2pd \{rd-sae\},%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 01 fa ff e6 f5\s+vcvtqq2pd \{rz-sae\},%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 05 f8 18 5b f5\s+vcvtqq2ph \{rn-sae\},%ymm29,%xmm30
+\s*[a-f0-9]+:\s*62 05 f8 3f 5b f5\s+vcvtqq2ph \{rd-sae\},%ymm29,%xmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 05 f8 ff 5b f5\s+vcvtqq2ph \{rz-sae\},%ymm29,%xmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 01 f8 18 5b f5\s+vcvtqq2ps \{rn-sae\},%ymm29,%xmm30
+\s*[a-f0-9]+:\s*62 01 f8 3f 5b f5\s+vcvtqq2ps \{rd-sae\},%ymm29,%xmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 01 f8 ff 5b f5\s+vcvtqq2ps \{rz-sae\},%ymm29,%xmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 01 fa 18 7a f5\s+vcvtuqq2pd \{rn-sae\},%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 01 fa 3f 7a f5\s+vcvtuqq2pd \{rd-sae\},%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 01 fa ff 7a f5\s+vcvtuqq2pd \{rz-sae\},%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 05 fb 18 7a f5\s+vcvtuqq2ph \{rn-sae\},%ymm29,%xmm30
+\s*[a-f0-9]+:\s*62 05 fb 3f 7a f5\s+vcvtuqq2ph \{rd-sae\},%ymm29,%xmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 05 fb ff 7a f5\s+vcvtuqq2ph \{rz-sae\},%ymm29,%xmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 01 fb 18 7a f5\s+vcvtuqq2ps \{rn-sae\},%ymm29,%xmm30
+\s*[a-f0-9]+:\s*62 01 fb 3f 7a f5\s+vcvtuqq2ps \{rd-sae\},%ymm29,%xmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 01 fb ff 7a f5\s+vcvtuqq2ps \{rz-sae\},%ymm29,%xmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 01 f9 18 e6 f5\s+vcvttpd2dq \{sae\},%ymm29,%xmm30
+\s*[a-f0-9]+:\s*62 01 f9 1f e6 f5\s+vcvttpd2dq \{sae\},%ymm29,%xmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 01 f9 9f e6 f5\s+vcvttpd2dq \{sae\},%ymm29,%xmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 01 f8 18 78 f5\s+vcvttpd2udq \{sae\},%ymm29,%xmm30
+\s*[a-f0-9]+:\s*62 01 f8 1f 78 f5\s+vcvttpd2udq \{sae\},%ymm29,%xmm30\{%k7\}
+\s*[a-f0-9]+:\s*62 01 f8 9f 78 f5\s+vcvttpd2udq \{sae\},%ymm29,%xmm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 01 f9 18 7a f5\s+vcvttpd2qq \{sae\},%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 01 f9 1f 7a f5\s+vcvttpd2qq \{sae\},%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 01 f9 9f 7a f5\s+vcvttpd2qq \{sae\},%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 01 f9 18 78 f5\s+vcvttpd2uqq \{sae\},%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 01 f9 1f 78 f5\s+vcvttpd2uqq \{sae\},%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 01 f9 9f 78 f5\s+vcvttpd2uqq \{sae\},%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 05 7a 18 5b f5\s+vcvttph2dq \{sae\},%xmm29,%ymm30
+\s*[a-f0-9]+:\s*62 05 7a 1f 5b f5\s+vcvttph2dq \{sae\},%xmm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 05 7a 9f 5b f5\s+vcvttph2dq \{sae\},%xmm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 05 79 18 7a f5\s+vcvttph2qq \{sae\},%xmm29,%ymm30
+\s*[a-f0-9]+:\s*62 05 79 1f 7a f5\s+vcvttph2qq \{sae\},%xmm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 05 79 9f 7a f5\s+vcvttph2qq \{sae\},%xmm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 05 78 18 78 f5\s+vcvttph2udq \{sae\},%xmm29,%ymm30
+\s*[a-f0-9]+:\s*62 05 78 1f 78 f5\s+vcvttph2udq \{sae\},%xmm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 05 78 9f 78 f5\s+vcvttph2udq \{sae\},%xmm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 05 79 18 78 f5\s+vcvttph2uqq \{sae\},%xmm29,%ymm30
+\s*[a-f0-9]+:\s*62 05 79 1f 78 f5\s+vcvttph2uqq \{sae\},%xmm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 05 79 9f 78 f5\s+vcvttph2uqq \{sae\},%xmm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 05 78 18 7c f5\s+vcvttph2uw \{sae\},%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 05 78 1f 7c f5\s+vcvttph2uw \{sae\},%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 05 78 9f 7c f5\s+vcvttph2uw \{sae\},%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 05 79 18 7c f5\s+vcvttph2w \{sae\},%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 05 79 1f 7c f5\s+vcvttph2w \{sae\},%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 05 79 9f 7c f5\s+vcvttph2w \{sae\},%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 01 7a 18 5b f5\s+vcvttps2dq \{sae\},%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 01 7a 1f 5b f5\s+vcvttps2dq \{sae\},%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 01 7a 9f 5b f5\s+vcvttps2dq \{sae\},%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 01 78 18 78 f5\s+vcvttps2udq \{sae\},%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 01 78 1f 78 f5\s+vcvttps2udq \{sae\},%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 01 78 9f 78 f5\s+vcvttps2udq \{sae\},%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 01 79 18 7a f5\s+vcvttps2qq \{sae\},%xmm29,%ymm30
+\s*[a-f0-9]+:\s*62 01 79 1f 7a f5\s+vcvttps2qq \{sae\},%xmm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 01 79 9f 7a f5\s+vcvttps2qq \{sae\},%xmm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 01 79 18 78 f5\s+vcvttps2uqq \{sae\},%xmm29,%ymm30
+\s*[a-f0-9]+:\s*62 01 79 1f 78 f5\s+vcvttps2uqq \{sae\},%xmm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 01 79 9f 78 f5\s+vcvttps2uqq \{sae\},%xmm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 05 7b 18 7d f5\s+vcvtuw2ph \{rn-sae\},%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 05 7b 3f 7d f5\s+vcvtuw2ph \{rd-sae\},%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 05 7b ff 7d f5\s+vcvtuw2ph \{rz-sae\},%ymm29,%ymm30\{%k7\}\{z\}
+\s*[a-f0-9]+:\s*62 05 7a 18 7d f5\s+vcvtw2ph \{rn-sae\},%ymm29,%ymm30
+\s*[a-f0-9]+:\s*62 05 7a 3f 7d f5\s+vcvtw2ph \{rd-sae\},%ymm29,%ymm30\{%k7\}
+\s*[a-f0-9]+:\s*62 05 7a ff 7d f5\s+vcvtw2ph \{rz-sae\},%ymm29,%ymm30\{%k7\}\{z\}
+#pass
diff --git a/gas/testsuite/gas/i386/x86-64-avx10_2-rounding.s b/gas/testsuite/gas/i386/x86-64-avx10_2-rounding.s
new file mode 100644
index 0000000..eee5eab
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-avx10_2-rounding.s
@@ -0,0 +1,350 @@
+# Check 64bit AVX10.2 instructions
+
+	.text
+_start:
+	.irp m, pd, ph, ps
+	vcmp\m	$123, {sae}, %ymm28, %ymm29, %k5
+	vcmp\m	$123, {sae}, %ymm28, %ymm29, %k5{%k7}
+	vgetexp\m	{sae}, %ymm29, %ymm30
+	vgetexp\m	{sae}, %ymm29, %ymm30{%k7}
+	vgetexp\m	{sae}, %ymm29, %ymm30{%k7}{z}
+	vsqrt\m	{rn-sae}, %ymm29, %ymm30
+	vsqrt\m	{rd-sae}, %ymm29, %ymm30{%k7}
+	vsqrt\m	{rz-sae}, %ymm29, %ymm30{%k7}{z}
+	.endr
+
+	.irp a, add, div, mul, scalef, sub
+	.irp m, pd, ph, ps
+	v\a\m	{rn-sae}, %ymm28, %ymm29, %ymm30
+	v\a\m	{rd-sae}, %ymm28, %ymm29, %ymm30{%k7}
+	v\a\m	{rz-sae}, %ymm28, %ymm29, %ymm30{%k7}{z}
+	.endr
+	.endr
+
+	.irp a, max, min
+	.irp m, pd, ph, ps
+	v\a\m	{sae}, %ymm28, %ymm29, %ymm30
+	v\a\m	{sae}, %ymm28, %ymm29, %ymm30{%k7}
+	v\a\m	{sae}, %ymm28, %ymm29, %ymm30{%k7}{z}
+	.endr
+	.endr
+
+	.irp a, getmant, reduce, rndscale
+	.irp m, pd, ph, ps
+	v\a\m	$123, {sae}, %ymm29, %ymm30
+	v\a\m	$123, {sae}, %ymm29, %ymm30{%k7}
+	v\a\m	$123, {sae}, %ymm29, %ymm30{%k7}{z}
+	.endr
+	.endr
+
+	.irp a, madd, maddsub, msub, msubadd, nmadd, nmsub
+	.irp n, 132, 213, 231
+	.irp m, pd, ph, ps
+	vf\a\n\m	{rn-sae}, %ymm28, %ymm29, %ymm30
+	vf\a\n\m	{rd-sae}, %ymm28, %ymm29, %ymm30{%k7}
+	vf\a\n\m	{rz-sae}, %ymm28, %ymm29, %ymm30{%k7}{z}
+	.endr
+	.endr
+	.endr
+
+	.irp a, fixupimm, range
+	.irp m, pd, ps
+	v\a\m	$123, {sae}, %ymm28, %ymm29, %ymm30
+	v\a\m	$123, {sae}, %ymm28, %ymm29, %ymm30{%k7}
+	v\a\m	$123, {sae}, %ymm28, %ymm29, %ymm30{%k7}{z}
+	.endr
+	.endr
+
+	.irp a, cmadd, cmul, madd, mul
+	vf\a\()cph	{rn-sae}, %ymm28, %ymm29, %ymm30
+	vf\a\()cph	{rd-sae}, %ymm28, %ymm29, %ymm30{%k7}
+	vf\a\()cph	{rz-sae}, %ymm28, %ymm29, %ymm30{%k7}{z}
+	.endr
+
+	.irp n, dq, udq
+	vcvt\n\()2ph	{rn-sae}, %ymm29, %xmm30
+	vcvt\n\()2ph	{rd-sae}, %ymm29, %xmm30{%k7}
+	vcvt\n\()2ph	{rz-sae}, %ymm29, %xmm30{%k7}{z}
+
+	vcvt\n\()2ps	{rn-sae}, %ymm29, %ymm30
+	vcvt\n\()2ps	{rd-sae}, %ymm29, %ymm30{%k7}
+	vcvt\n\()2ps	{rz-sae}, %ymm29, %ymm30{%k7}{z}
+	.endr
+
+	.irp m, dq, ph, ps, udq
+	vcvtpd2\m	{rn-sae}, %ymm29, %xmm30
+	vcvtpd2\m	{rd-sae}, %ymm29, %xmm30{%k7}
+	vcvtpd2\m	{rz-sae}, %ymm29, %xmm30{%k7}{z}
+	.endr
+
+	.irp m, qq, uqq
+	vcvtpd2\m	{rn-sae}, %ymm29, %ymm30
+	vcvtpd2\m	{rd-sae}, %ymm29, %ymm30{%k7}
+	vcvtpd2\m	{rz-sae}, %ymm29, %ymm30{%k7}{z}
+	.endr
+
+	.irp m, dq, qq, udq, uqq
+	vcvtph2\m	{rn-sae}, %xmm29, %ymm30
+	vcvtph2\m	{rd-sae}, %xmm29, %ymm30{%k7}
+	vcvtph2\m	{rz-sae}, %xmm29, %ymm30{%k7}{z}
+	.endr
+
+	.irp m, pd, ps, psx
+	vcvtph2\m	{sae}, %xmm29, %ymm30
+	vcvtph2\m	{sae}, %xmm29, %ymm30{%k7}
+	vcvtph2\m	{sae}, %xmm29, %ymm30{%k7}{z}
+	.endr
+
+	.irp m, uw, w
+	vcvtph2\m	{rn-sae}, %ymm29, %ymm30
+	vcvtph2\m	{rd-sae}, %ymm29, %ymm30{%k7}
+	vcvtph2\m	{rz-sae}, %ymm29, %ymm30{%k7}{z}
+	.endr
+
+	.irp m, dq, udq
+	vcvtps2\m	{rn-sae}, %ymm29, %ymm30
+	vcvtps2\m	{rd-sae}, %ymm29, %ymm30{%k7}
+	vcvtps2\m	{rz-sae}, %ymm29, %ymm30{%k7}{z}
+	.endr
+
+	vcvtps2pd	{sae}, %xmm29, %ymm30
+	vcvtps2pd	{sae}, %xmm29, %ymm30{%k7}
+	vcvtps2pd	{sae}, %xmm29, %ymm30{%k7}{z}
+
+	vcvtps2phx	{rn-sae}, %ymm29, %xmm30
+	vcvtps2phx	{rd-sae}, %ymm29, %xmm30{%k7}
+	vcvtps2phx	{rz-sae}, %ymm29, %xmm30{%k7}{z}
+
+	.irp m, qq, uqq
+	vcvtps2\m	{rn-sae}, %xmm29, %ymm30
+	vcvtps2\m	{rd-sae}, %xmm29, %ymm30{%k7}
+	vcvtps2\m	{rz-sae}, %xmm29, %ymm30{%k7}{z}
+	.endr
+
+	.irp n, qq, uqq
+	vcvt\n\()2pd	{rn-sae}, %ymm29, %ymm30
+	vcvt\n\()2pd	{rd-sae}, %ymm29, %ymm30{%k7}
+	vcvt\n\()2pd	{rz-sae}, %ymm29, %ymm30{%k7}{z}
+
+	.irp m, ph, ps
+	vcvt\n\()2\m	{rn-sae}, %ymm29, %xmm30
+	vcvt\n\()2\m	{rd-sae}, %ymm29, %xmm30{%k7}
+	vcvt\n\()2\m	{rz-sae}, %ymm29, %xmm30{%k7}{z}
+	.endr
+	.endr
+
+	.irp m, dq, udq
+	vcvttpd2\m	{sae}, %ymm29, %xmm30
+	vcvttpd2\m	{sae}, %ymm29, %xmm30{%k7}
+	vcvttpd2\m	{sae}, %ymm29, %xmm30{%k7}{z}
+	.endr
+
+	.irp m, qq, uqq
+	vcvttpd2\m	{sae}, %ymm29, %ymm30
+	vcvttpd2\m	{sae}, %ymm29, %ymm30{%k7}
+	vcvttpd2\m	{sae}, %ymm29, %ymm30{%k7}{z}
+	.endr
+
+	.irp m, dq, qq, udq, uqq
+	vcvttph2\m	{sae}, %xmm29, %ymm30
+	vcvttph2\m	{sae}, %xmm29, %ymm30{%k7}
+	vcvttph2\m	{sae}, %xmm29, %ymm30{%k7}{z}
+	.endr
+
+	.irp m, uw, w
+	vcvttph2\m	{sae}, %ymm29, %ymm30
+	vcvttph2\m	{sae}, %ymm29, %ymm30{%k7}
+	vcvttph2\m	{sae}, %ymm29, %ymm30{%k7}{z}
+	.endr
+
+	.irp m, dq, udq
+	vcvttps2\m	{sae}, %ymm29, %ymm30
+	vcvttps2\m	{sae}, %ymm29, %ymm30{%k7}
+	vcvttps2\m	{sae}, %ymm29, %ymm30{%k7}{z}
+	.endr
+
+	.irp m, qq, uqq
+	vcvttps2\m	{sae}, %xmm29, %ymm30
+	vcvttps2\m	{sae}, %xmm29, %ymm30{%k7}
+	vcvttps2\m	{sae}, %xmm29, %ymm30{%k7}{z}
+	.endr
+
+	.irp n, uw, w
+	vcvt\n\()2ph	{rn-sae}, %ymm29, %ymm30
+	vcvt\n\()2ph	{rd-sae}, %ymm29, %ymm30{%k7}
+	vcvt\n\()2ph	{rz-sae}, %ymm29, %ymm30{%k7}{z}
+	.endr
+
+	.intel_syntax noprefix
+	.irp m, pd, ph, ps
+	vcmp\m	k5, ymm29, ymm28{sae}, 123
+	vcmp\m	k5{k7}, ymm29, ymm28{sae}, 123
+	vgetexp\m	ymm30, ymm29{sae}
+	vgetexp\m	ymm30{k7}, ymm29{sae}
+	vgetexp\m	ymm30{k7}{z}, ymm29{sae}
+	vsqrt\m	ymm30, ymm29{rn-sae}
+	vsqrt\m	ymm30{k7}, ymm29{rd-sae}
+	vsqrt\m	ymm30{k7}{z}, ymm29{rz-sae}
+	.endr
+
+	.irp a, add, div, mul, scalef, sub
+	.irp m, pd, ph, ps
+	v\a\m	ymm30, ymm29, ymm28{rn-sae}
+	v\a\m	ymm30{k7}, ymm29, ymm28{rd-sae}
+	v\a\m	ymm30{k7}{z}, ymm29, ymm28{rz-sae}
+	.endr
+	.endr
+
+	.irp a, max, min
+	.irp m, pd, ph, ps
+	v\a\m	ymm30, ymm29, ymm28{sae}
+	v\a\m	ymm30{k7}, ymm29, ymm28{sae}
+	v\a\m	ymm30{k7}{z}, ymm29, ymm28{sae}
+	.endr
+	.endr
+
+	.irp a, getmant, reduce, rndscale
+	.irp m, pd, ph, ps
+	v\a\m	ymm30, ymm29{sae}, 123
+	v\a\m	ymm30{k7}, ymm29{sae}, 123
+	v\a\m	ymm30{k7}{z}, ymm29{sae}, 123
+	.endr
+	.endr
+
+	.irp a, madd, maddsub, msub, msubadd, nmadd, nmsub
+	.irp n, 132, 213, 231
+	.irp m, pd, ph, ps
+	vf\a\n\m	ymm30, ymm29, ymm28{rn-sae}
+	vf\a\n\m	ymm30{k7}, ymm29, ymm28{rd-sae}
+	vf\a\n\m	ymm30{k7}{z}, ymm29, ymm28{rz-sae}
+	.endr
+	.endr
+	.endr
+
+	.irp a, fixupimm, range
+	.irp m, pd, ps
+	v\a\m	ymm30, ymm29, ymm28{sae}, 123
+	v\a\m	ymm30{k7}, ymm29, ymm28{sae}, 123
+	v\a\m	ymm30{k7}{z}, ymm29, ymm28{sae}, 123
+	.endr
+	.endr
+
+	.irp a, cmadd, cmul, madd, mul
+	vf\a\()cph	ymm30, ymm29, ymm28{rn-sae}
+	vf\a\()cph	ymm30{k7}, ymm29, ymm28{rd-sae}
+	vf\a\()cph	ymm30{k7}{z}, ymm29, ymm28{rz-sae}
+	.endr
+
+	.irp n, dq, udq
+	vcvt\n\()2ph	xmm30, ymm29{rn-sae}
+	vcvt\n\()2ph	xmm30{k7}, ymm29{rd-sae}
+	vcvt\n\()2ph	xmm30{k7}{z}, ymm29{rz-sae}
+
+	vcvt\n\()2ps	ymm30, ymm29{rn-sae}
+	vcvt\n\()2ps	ymm30{k7}, ymm29{rd-sae}
+	vcvt\n\()2ps	ymm30{k7}{z}, ymm29{rz-sae}
+	.endr
+
+	.irp m, dq, ph, ps, udq
+	vcvtpd2\m	xmm30, ymm29{rn-sae}
+	vcvtpd2\m	xmm30{k7}, ymm29{rd-sae}
+	vcvtpd2\m	xmm30{k7}{z}, ymm29{rz-sae}
+	.endr
+
+	.irp m, qq, uqq
+	vcvtpd2\m	ymm30, ymm29{rn-sae}
+	vcvtpd2\m	ymm30{k7}, ymm29{rd-sae}
+	vcvtpd2\m	ymm30{k7}{z}, ymm29{rz-sae}
+	.endr
+
+	.irp m, dq, qq, udq, uqq
+	vcvtph2\m	ymm30, xmm29{rn-sae}
+	vcvtph2\m	ymm30{k7}, xmm29{rd-sae}
+	vcvtph2\m	ymm30{k7}{z}, xmm29{rz-sae}
+	.endr
+
+	.irp m, pd, ps, psx
+	vcvtph2\m	ymm30, xmm29{sae}
+	vcvtph2\m	ymm30{k7}, xmm29{sae}
+	vcvtph2\m	ymm30{k7}{z}, xmm29{sae}
+	.endr
+
+	.irp m, uw, w
+	vcvtph2\m	ymm30, ymm29{rn-sae}
+	vcvtph2\m	ymm30{k7}, ymm29{rd-sae}
+	vcvtph2\m	ymm30{k7}{z}, ymm29{rz-sae}
+	.endr
+
+	.irp m, dq, udq
+	vcvtps2\m	ymm30, ymm29{rn-sae}
+	vcvtps2\m	ymm30{k7}, ymm29{rd-sae}
+	vcvtps2\m	ymm30{k7}{z}, ymm29{rz-sae}
+	.endr
+
+	vcvtps2pd	ymm30, xmm29{sae}
+	vcvtps2pd	ymm30{k7}, xmm29{sae}
+	vcvtps2pd	ymm30{k7}{z}, xmm29{sae}
+
+	vcvtps2phx	xmm30, ymm29{rn-sae}
+	vcvtps2phx	xmm30{k7}, ymm29{rd-sae}
+	vcvtps2phx	xmm30{k7}{z}, ymm29{rz-sae}
+
+	.irp m, qq, uqq
+	vcvtps2\m	ymm30, xmm29{rn-sae}
+	vcvtps2\m	ymm30{k7}, xmm29{rd-sae}
+	vcvtps2\m	ymm30{k7}{z}, xmm29{rz-sae}
+	.endr
+
+	.irp n, qq, uqq
+	vcvt\n\()2pd	ymm30, ymm29{rn-sae}
+	vcvt\n\()2pd	ymm30{k7}, ymm29{rd-sae}
+	vcvt\n\()2pd	ymm30{k7}{z}, ymm29{rz-sae}
+
+	.irp m, ph, ps
+	vcvt\n\()2\m	xmm30, ymm29{rn-sae}
+	vcvt\n\()2\m	xmm30{k7}, ymm29{rd-sae}
+	vcvt\n\()2\m	xmm30{k7}{z}, ymm29{rz-sae}
+	.endr
+	.endr
+
+	.irp m, dq, udq
+	vcvttpd2\m	xmm30, ymm29{sae}
+	vcvttpd2\m	xmm30{k7}, ymm29{sae}
+	vcvttpd2\m	xmm30{k7}{z}, ymm29{sae}
+	.endr
+
+	.irp m, qq, uqq
+	vcvttpd2\m	ymm30, ymm29{sae}
+	vcvttpd2\m	ymm30{k7}, ymm29{sae}
+	vcvttpd2\m	ymm30{k7}{z}, ymm29{sae}
+	.endr
+
+	.irp m, dq, qq, udq, uqq
+	vcvttph2\m	ymm30, xmm29{sae}
+	vcvttph2\m	ymm30{k7}, xmm29{sae}
+	vcvttph2\m	ymm30{k7}{z}, xmm29{sae}
+	.endr
+
+	.irp m, uw, w
+	vcvttph2\m	ymm30, ymm29{sae}
+	vcvttph2\m	ymm30{k7}, ymm29{sae}
+	vcvttph2\m	ymm30{k7}{z}, ymm29{sae}
+	.endr
+
+	.irp m, dq, udq
+	vcvttps2\m	ymm30, ymm29{sae}
+	vcvttps2\m	ymm30{k7}, ymm29{sae}
+	vcvttps2\m	ymm30{k7}{z}, ymm29{sae}
+	.endr
+
+	.irp m, qq, uqq
+	vcvttps2\m	ymm30, xmm29{sae}
+	vcvttps2\m	ymm30{k7}, xmm29{sae}
+	vcvttps2\m	ymm30{k7}{z}, xmm29{sae}
+	.endr
+
+	.irp n, uw, w
+	vcvt\n\()2ph	ymm30, ymm29{rn-sae}
+	vcvt\n\()2ph	ymm30{k7}, ymm29{rd-sae}
+	vcvt\n\()2ph	ymm30{k7}{z}, ymm29{rz-sae}
+	.endr
diff --git a/gas/testsuite/gas/i386/x86-64-inval-tls.l b/gas/testsuite/gas/i386/x86-64-inval-tls.l
index 4256e62..134d96b 100644
--- a/gas/testsuite/gas/i386/x86-64-inval-tls.l
+++ b/gas/testsuite/gas/i386/x86-64-inval-tls.l
@@ -1,3 +1,39 @@
 .*: Assembler messages:
-.*:3: Error: .* `kmovq'
-.*:4: Error: .* `kmovq'
+.*:3: Error: @GOTTPOFF operator cannot be used with `kmovq'
+.*:4: Error: @TLSLD operator cannot be used with `kmovq'
+.*:7: Error: @TLSGD operator cannot be used with `add'
+.*:8: Error: @TLSGD operator requires `%rdi' as dest register
+.*:9: Error: @TLSGD operator requires `%rip' as base register
+.*:10: Error: @TLSGD operator requires base register
+.*:11: Error: @TLSGD operator requires `%rip' as base register
+.*:12: Error: @TLSGD operator requires `%rdi' as dest register
+.*:15: Error: @TLSLD operator cannot be used with `add'
+.*:16: Error: @TLSLD operator requires `%rdi' as dest register
+.*:17: Error: @TLSLD operator requires `%rip' as base register
+.*:18: Error: @TLSLD operator requires base register
+.*:19: Error: @TLSLD operator requires `%rip' as base register
+.*:20: Error: @TLSLD operator requires `%rdi' as dest register
+.*:23: Error: @TLSDESC operator cannot be used with `add'
+.*:24: Error: @TLSDESC operator requires `%rip' as base register
+.*:25: Error: @TLSDESC operator requires `%rip' as base register
+.*:26: Error: @TLSDESC operator requires 64-bit dest register
+.*:27: Error: @TLSDESC operator requires 64-bit dest register
+.*:30: Error: @GOTTPOFF operator cannot be used with `sub'
+.*:31: Error: @GOTTPOFF operator cannot be used with `xor'
+.*:32: Error: @GOTTPOFF operator requires `%rip' as base register
+.*:33: Error: @GOTTPOFF operator requires `%rip' as base register
+.*:34: Error: @GOTTPOFF operator requires 64-bit dest register
+.*:35: Error: @GOTTPOFF operator can be used with `add', but format is wrong
+.*:36: Error: @GOTTPOFF operator can be used with `add', but format is wrong
+.*:37: Error: @GOTTPOFF operator can be used with `add', but format is wrong
+.*:38: Error: @GOTTPOFF operator can be used with `add', but format is wrong
+.*:39: Error: @GOTTPOFF operator requires `%rip' as base register
+.*:40: Error: @GOTTPOFF operator can be used with `mov', but format is wrong
+.*:41: Error: @GOTTPOFF operator can be used with `mov', but format is wrong
+.*:42: Error: @GOTTPOFF operator can be used with `mov', but format is wrong
+.*:43: Error: @GOTTPOFF operator can be used with `mov', but format is wrong
+.*:44: Error: @GOTTPOFF operator can be used with `mov', but format is wrong
+.*:48: Error: @TLSCALL operator cannot be used with `lea'
+.*:49: Error: @TLSCALL operator requires `%eax/%rax' as base register
+.*:49: Error: 0-byte relocation cannot be applied to 4-byte field
+.*:50: Error: `\*foo@tlscall\(%ax\)' is not a valid base/index expression
diff --git a/gas/testsuite/gas/i386/x86-64-inval-tls.s b/gas/testsuite/gas/i386/x86-64-inval-tls.s
index 71e1927..8783530 100644
--- a/gas/testsuite/gas/i386/x86-64-inval-tls.s
+++ b/gas/testsuite/gas/i386/x86-64-inval-tls.s
@@ -2,3 +2,49 @@
 # All the following should be illegal
 	kmovq	foo@gottpoff(%rip), %k0
 	kmovq	foo@tlsld(%rip), %k0
+
+	/* Invalid testcase for R_X86_64_TLSGD.  */
+	addq foo@tlsgd(%rip), %rdi
+	leaq foo@tlsgd(%rip), %rax
+	leaq foo@tlsgd(%rax), %rdi
+	leaq foo@tlsgd(,%rax,1), %rdi
+	leaq foo@tlsgd(%eip), %rdi
+	leal foo@tlsgd(%rip), %edi
+
+	/* Invalid testcase for R_X86_64_TLSLD.  */
+	addq foo@tlsld(%rip), %rdi
+	leaq foo@tlsld(%rip), %rax
+	leaq foo@tlsld(%rax), %rdi
+	leaq foo@tlsld(,%rax,1), %rdi
+	leaq foo@tlsld(%eip), %rdi
+	leal foo@tlsld(%rip), %edi
+
+	/* Invalid testcase for R_X86_64_GOTPC32_TLSDESC.  */
+	addq x@tlsdesc(%rip), %rax
+	leaq x@tlsdesc(%rbx), %rax
+	lea  x@tlsdesc(%eip), %rdi
+	lea  x@tlsdesc(%rip), %eax
+	lea  x@tlsdesc(%rip), %ax
+
+	/* Invalid testcase for R_X86_64_GOTTPOFF.  */
+	subq foo@gottpoff(%rip), %r12
+	xorq foo@gottpoff(%rip), %rax
+	addq foo@gottpoff(%rbx), %rax
+	addq foo@gottpoff(%eip), %rax
+	add  foo@gottpoff(%rip), %ax
+	addq %rax, foo@gottpoff(%rip)
+	addl $0x90909090, foo@gottpoff(%rip)
+	add  $0x90, foo@gottpoff(%rip), %rax
+	add  $0xffffffffffffffff, foo@gottpoff(%rip), %rax
+	movq foo@gottpoff(%rbx), %rax
+	movq %rax, foo@gottpoff(%rip)
+	mov  %ss,foo@gottpoff(%rip)
+	mov  foo@gottpoff(%rip),%ss
+	movl $0x90909090,foo@gottpoff(%rip)
+	mov  $foo@gottpoff, %rax
+
+
+	/* Invalid testcase for R_X86_64_TLSDESC_CALL.  */
+	leaq foo@tlscall(%rax), %rbx
+	call *foo@tlscall(%rip)
+	call *foo@tlscall(%ax)
diff --git a/gas/testsuite/gas/i386/x86-64-macro-1.d b/gas/testsuite/gas/i386/x86-64-macro-1.d
new file mode 100644
index 0000000..586dbde
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-macro-1.d
@@ -0,0 +1,11 @@
+#as: -mrelax-relocations=yes
+#objdump: -dwr
+
+.*: +file format .*
+
+
+Disassembly of section .text:
+
+0+ <_start>:
+ +[a-f0-9]+:	ff 15 00 00 00 00    	call   \*0x0\(%rip\)        # 6 <_start\+0x6>	2: R_X86_64_GOTPCRELX	acos-0x4
+#pass
diff --git a/gas/testsuite/gas/i386/x86-64-macro-1.s b/gas/testsuite/gas/i386/x86-64-macro-1.s
new file mode 100644
index 0000000..20b4416
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-macro-1.s
@@ -0,0 +1,9 @@
+# Test a white space before argument added by C preprocessor.
+
+	.macro WRAPPER_IMPL_SSE2 callee
+	call *\ callee@GOTPCREL(%rip)
+	.endm
+
+	.text
+_start:
+	WRAPPER_IMPL_SSE2 acos
diff --git a/gas/testsuite/gas/i386/x86-64-optimize-extractps.d b/gas/testsuite/gas/i386/x86-64-optimize-extractps.d
new file mode 100644
index 0000000..706cd00
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-optimize-extractps.d
@@ -0,0 +1,20 @@
+#as: -O -msse2avx
+#objdump: -drw
+#name: x86-64 EXTRACTPS optimized encoding with -msse2avx
+
+.*: +file format .*
+
+
+Disassembly of section .text:
+
+0+ <extractps>:
+ +[a-f0-9]+:	c5 f9 7e ca          	vmovd  %xmm1,%edx
+ +[a-f0-9]+:	c5 fa 11 0a          	vmovss %xmm1,\(%rdx\)
+ +[a-f0-9]+:	62 f9 7d 08 7e ca    	vmovd  %xmm1,%r18d
+ +[a-f0-9]+:	62 f9 7e 08 11 0a    	vmovss %xmm1,\(%r18\)
+ +[a-f0-9]+:	c5 f9 7e ca          	vmovd  %xmm1,%edx
+ +[a-f0-9]+:	c5 fa 11 0a          	vmovss %xmm1,\(%rdx\)
+ +[a-f0-9]+:	62 e1 7d 08 7e ca    	vmovd  %xmm17,%edx
+ +[a-f0-9]+:	62 f9 7d 08 7e ca    	vmovd  %xmm1,%r18d
+ +[a-f0-9]+:	62 f9 7e 08 11 0a    	vmovss %xmm1,\(%r18\)
+#pass
diff --git a/gas/testsuite/gas/i386/x86-64-optimize-extractps.l b/gas/testsuite/gas/i386/x86-64-optimize-extractps.l
new file mode 100644
index 0000000..d52794e
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-optimize-extractps.l
@@ -0,0 +1,21 @@
+.*: Assembler messages:
+.*:6: Error: .*
+.*:7: Error: .*
+[ 	]*[0-9a-f]+[ 	]+\.text
+[ 	]*[0-9a-f]+[ 	]+extractps:
+[ 	]*[0-9a-f]+[ 	]+\?\?\?\? 660F7ECA[ 	]+extractps	\$0, %xmm1, %edx
+[ 	]*[0-9a-f]+[ 	]+\?\?\?\? F30F110A[ 	]+extractps	\$0, %xmm1, \(%rdx\)
+[ 	]*[0-9a-f]+[ 	]+
+[ 	]*[0-9a-f]+[ 	]+extractps	\$0, %xmm1, %r18d
+[ 	]*[0-9a-f]+[ 	]+extractps	\$0, %xmm1, \(%r18\)
+[ 	]*[0-9a-f]+[ 	]+
+[ 	]*[0-9a-f]+[ 	]+\?\?\?\? C5F97ECA[ 	]+vextractps	\$0, %xmm1, %edx
+[ 	]*[0-9a-f]+[ 	]+\?\?\?\? C5FA110A[ 	]+vextractps	\$0, %xmm1, \(%rdx\)
+[ 	]*[0-9a-f]+[ 	]+
+[ 	]*[0-9a-f]+[ 	]+\?\?\?\? 62E17D08[ 	]+vextractps	\$0, %xmm17, %edx
+[ 	]*[0-9a-f]+[ 	]+7ECA
+[ 	]*[0-9a-f]+[ 	]+\?\?\?\? 62F97D08[ 	]+vextractps	\$0, %xmm1, %r18d
+[ 	]*[0-9a-f]+[ 	]+7ECA
+[ 	]*[0-9a-f]+[ 	]+\?\?\?\? 62F97E08[ 	]+vextractps	\$0, %xmm1, \(%r18\)
+[ 	]*[0-9a-f]+[ 	]+110A
+#pass
diff --git a/gas/testsuite/gas/i386/x86-64-optimize-extractps.s b/gas/testsuite/gas/i386/x86-64-optimize-extractps.s
new file mode 100644
index 0000000..1a1c77b
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-optimize-extractps.s
@@ -0,0 +1,14 @@
+	.text
+extractps:
+	extractps	$0, %xmm1, %edx
+	extractps	$0, %xmm1, (%rdx)
+
+	extractps	$0, %xmm1, %r18d
+	extractps	$0, %xmm1, (%r18)
+
+	vextractps	$0, %xmm1, %edx
+	vextractps	$0, %xmm1, (%rdx)
+
+	vextractps	$0, %xmm17, %edx
+	vextractps	$0, %xmm1, %r18d
+	vextractps	$0, %xmm1, (%r18)
diff --git a/gas/testsuite/gas/i386/x86-64-optimize-insertps.d b/gas/testsuite/gas/i386/x86-64-optimize-insertps.d
new file mode 100644
index 0000000..97300d0
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-optimize-insertps.d
@@ -0,0 +1,26 @@
+#as: -O -msse2avx
+#objdump: -drw
+#name: x86-64 EXTRACTPS optimized encoding with -msse2avx
+
+.*: +file format .*
+
+
+Disassembly of section .text:
+
+0+ <insertps>:
+ +[a-f0-9]+:	c5 ea 10 d1          	vmovss %xmm1,%xmm2,%xmm2
+ +[a-f0-9]+:	c5 fa 10 11          	vmovss \(%rcx\),%xmm2
+ +[a-f0-9]+:	62 f9 7e 08 10 11    	vmovss \(%r17\),%xmm2
+ +[a-f0-9]+:	c5 e8 57 d2          	vxorps %xmm2,%xmm2,%xmm2
+ +[a-f0-9]+:	c5 ea 10 d9          	vmovss %xmm1,%xmm2,%xmm3
+ +[a-f0-9]+:	c5 fa 10 11          	vmovss \(%rcx\),%xmm2
+ +[a-f0-9]+:	c5 e0 57 db          	vxorps %xmm3,%xmm3,%xmm3
+ +[a-f0-9]+:	c5 e0 57 db          	vxorps %xmm3,%xmm3,%xmm3
+ +[a-f0-9]+:	c5 e0 57 db          	vxorps %xmm3,%xmm3,%xmm3
+ +[a-f0-9]+:	c5 60 57 db          	vxorps %xmm3,%xmm3,%xmm11
+ +[a-f0-9]+:	62 b1 6e 08 10 d9    	vmovss %xmm17,%xmm2,%xmm3
+ +[a-f0-9]+:	62 e1 7e 08 10 11    	vmovss \(%rcx\),%xmm18
+ +[a-f0-9]+:	c5 e0 57 db          	vxorps %xmm3,%xmm3,%xmm3
+ +[a-f0-9]+:	c5 e0 57 db          	vxorps %xmm3,%xmm3,%xmm3
+ +[a-f0-9]+:	62 a1 64 00 57 db    	vxorps %xmm19,%xmm19,%xmm19
+#pass
diff --git a/gas/testsuite/gas/i386/x86-64-optimize-insertps.l b/gas/testsuite/gas/i386/x86-64-optimize-insertps.l
new file mode 100644
index 0000000..08eb0c1
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-optimize-insertps.l
@@ -0,0 +1,26 @@
+.*: Assembler messages:
+.*:5: Error: .*
+[ 	]*[0-9a-f]+[ 	]+\.text
+[ 	]*[0-9a-f]+[ 	]+insertps:
+[ 	]*[0-9a-f]+[ 	]+\?\?\?\? F30F10D1[ 	]+insertps \$0, %xmm1, %xmm2
+[ 	]*[0-9a-f]+[ 	]+\?\?\?\? F30F1011[ 	]+insertps \$0xce, \(%rcx\), %xmm2
+[ 	]*[0-9a-f]+[ 	]+insertps \$0x0e, \(%r17\), %xmm2
+[ 	]*[0-9a-f]+[ 	]+\?\?\?\? 0F57D2[ 	]+insertps \$0xff, %xmm1, %xmm2
+[ 	]*[0-9a-f]+[ 	]+
+[ 	]*[0-9a-f]+[ 	]+\?\?\?\? C5EA10D9[ 	]+vinsertps \$0, %xmm1, %xmm2, %xmm3
+[ 	]*[0-9a-f]+[ 	]+\?\?\?\? C5FA1011[ 	]+vinsertps \$0xce, \(%rcx\), %xmm2, %xmm2
+[ 	]*[0-9a-f]+[ 	]+\?\?\?\? C5E057DB[ 	]+vinsertps \$0xff, %xmm1, %xmm2, %xmm3
+[ 	]*[0-9a-f]+[ 	]+
+[ 	]*[0-9a-f]+[ 	]+\?\?\?\? C5E057DB[ 	]+vinsertps \$0xbf, %xmm9, %xmm2, %xmm3
+[ 	]*[0-9a-f]+[ 	]+\?\?\?\? C5E057DB[ 	]+vinsertps \$0x7f, %xmm1, %xmm10, %xmm3
+[ 	]*[0-9a-f]+[ 	]+\?\?\?\? C56057DB[ 	]+vinsertps \$0x3f, %xmm1, %xmm2, %xmm11
+[ 	]*[0-9a-f]+[ 	]+
+[ 	]*[0-9a-f]+[ 	]+\?\?\?\? 62B16E08[ 	]+vinsertps \$0, %xmm17, %xmm2, %xmm3
+[ 	]*[0-9a-f]+[ 	]+10D9
+[ 	]*[0-9a-f]+[ 	]+\?\?\?\? 62E17E08[ 	]+vinsertps \$0xce, \(%rcx\), %xmm18, %xmm18
+[ 	]*[0-9a-f]+[ 	]+1011
+[ 	]*[0-9a-f]+[ 	]+\?\?\?\? C5E057DB[ 	]+vinsertps \$0xff, %xmm17, %xmm2, %xmm3
+[ 	]*[0-9a-f]+[ 	]+\?\?\?\? C5E057DB[ 	]+vinsertps \$0xff, %xmm1, %xmm18, %xmm3
+[ 	]*[0-9a-f]+[ 	]+\?\?\?\? 62A16400[ 	]+vinsertps \$0xff, %xmm1, %xmm2, %xmm19
+[ 	]*[0-9a-f]+[ 	]+57DB
+#pass
diff --git a/gas/testsuite/gas/i386/x86-64-optimize-insertps.s b/gas/testsuite/gas/i386/x86-64-optimize-insertps.s
new file mode 100644
index 0000000..98240ac
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-optimize-insertps.s
@@ -0,0 +1,20 @@
+	.text
+insertps:
+	insertps $0, %xmm1, %xmm2
+	insertps $0xce, (%rcx), %xmm2
+	insertps $0x0e, (%r17), %xmm2
+	insertps $0xff, %xmm1, %xmm2
+
+	vinsertps $0, %xmm1, %xmm2, %xmm3
+	vinsertps $0xce, (%rcx), %xmm2, %xmm2
+	vinsertps $0xff, %xmm1, %xmm2, %xmm3
+
+	vinsertps $0xbf, %xmm9, %xmm2, %xmm3
+	vinsertps $0x7f, %xmm1, %xmm10, %xmm3
+	vinsertps $0x3f, %xmm1, %xmm2, %xmm11
+
+	vinsertps $0, %xmm17, %xmm2, %xmm3
+	vinsertps $0xce, (%rcx), %xmm18, %xmm18
+	vinsertps $0xff, %xmm17, %xmm2, %xmm3
+	vinsertps $0xff, %xmm1, %xmm18, %xmm3
+	vinsertps $0xff, %xmm1, %xmm2, %xmm19
diff --git a/gas/testsuite/gas/i386/x86-64-optimize-vextractNN.d b/gas/testsuite/gas/i386/x86-64-optimize-vextractNN.d
new file mode 100644
index 0000000..739a2fb
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-optimize-vextractNN.d
@@ -0,0 +1,59 @@
+#as: -O
+#objdump: -drw
+#name: x86-64 VEXTRACT{F,I}<nn> optimized encoding with -msse2avx
+
+.*: +file format .*
+
+
+Disassembly of section .text:
+
+0+ <vextract_128>:
+ +[a-f0-9]+:	c5 f8 29 ca          	vmovaps %xmm1,%xmm2
+ +[a-f0-9]+:	c5 f8 11 0a          	vmovups %xmm1,\(%rdx\)
+ +[a-f0-9]+:	c5 f9 7f ca          	vmovdqa %xmm1,%xmm2
+ +[a-f0-9]+:	c5 fa 7f 0a          	vmovdqu %xmm1,\(%rdx\)
+
+0+[a-f0-9]+ <vextract_NNxM_XMM>:
+ +[a-f0-9]+:	c5 f8 29 ca          	vmovaps %xmm1,%xmm2
+ +[a-f0-9]+:	c5 f8 11 0a          	vmovups %xmm1,\(%rdx\)
+ +[a-f0-9]+:	62 e1 7c 08 29 ca    	vmovaps %xmm17,%xmm2
+ +[a-f0-9]+:	62 e1 7c 08 11 0a    	vmovups %xmm17,\(%rdx\)
+ +[a-f0-9]+:	62 f9 7c 08 11 0a    	vmovups %xmm1,\(%r18\)
+ +[a-f0-9]+:	c5 f9 29 ca          	vmovapd %xmm1,%xmm2
+ +[a-f0-9]+:	c5 f9 11 0a          	vmovupd %xmm1,\(%rdx\)
+ +[a-f0-9]+:	62 e1 fd 08 29 ca    	vmovapd %xmm17,%xmm2
+ +[a-f0-9]+:	62 e1 fd 08 11 0a    	vmovupd %xmm17,\(%rdx\)
+ +[a-f0-9]+:	62 f9 fd 08 11 0a    	vmovupd %xmm1,\(%r18\)
+ +[a-f0-9]+:	c5 f9 7f ca          	vmovdqa %xmm1,%xmm2
+ +[a-f0-9]+:	c5 fa 7f 0a          	vmovdqu %xmm1,\(%rdx\)
+ +[a-f0-9]+:	62 e1 7d 08 7f ca    	vmovdqa32 %xmm17,%xmm2
+ +[a-f0-9]+:	62 e1 7e 08 7f 0a    	vmovdqu32 %xmm17,\(%rdx\)
+ +[a-f0-9]+:	62 f9 7e 08 7f 0a    	vmovdqu32 %xmm1,\(%r18\)
+ +[a-f0-9]+:	c5 f9 7f ca          	vmovdqa %xmm1,%xmm2
+ +[a-f0-9]+:	c5 fa 7f 0a          	vmovdqu %xmm1,\(%rdx\)
+ +[a-f0-9]+:	62 e1 fd 08 7f ca    	vmovdqa64 %xmm17,%xmm2
+ +[a-f0-9]+:	62 e1 fe 08 7f 0a    	vmovdqu64 %xmm17,\(%rdx\)
+ +[a-f0-9]+:	62 f9 fe 08 7f 0a    	vmovdqu64 %xmm1,\(%r18\)
+
+0+[a-f0-9]+ <vextract_NNxM_YMM>:
+ +[a-f0-9]+:	c5 fc 29 ca          	vmovaps %ymm1,%ymm2
+ +[a-f0-9]+:	c5 fc 11 0a          	vmovups %ymm1,\(%rdx\)
+ +[a-f0-9]+:	62 e1 7c 28 29 ca    	vmovaps %ymm17,%ymm2
+ +[a-f0-9]+:	62 e1 7c 28 11 0a    	vmovups %ymm17,\(%rdx\)
+ +[a-f0-9]+:	62 f9 7c 28 11 0a    	vmovups %ymm1,\(%r18\)
+ +[a-f0-9]+:	c5 fd 29 ca          	vmovapd %ymm1,%ymm2
+ +[a-f0-9]+:	c5 fd 11 0a          	vmovupd %ymm1,\(%rdx\)
+ +[a-f0-9]+:	62 e1 fd 28 29 ca    	vmovapd %ymm17,%ymm2
+ +[a-f0-9]+:	62 e1 fd 28 11 0a    	vmovupd %ymm17,\(%rdx\)
+ +[a-f0-9]+:	62 f9 fd 28 11 0a    	vmovupd %ymm1,\(%r18\)
+ +[a-f0-9]+:	c5 fd 7f ca          	vmovdqa %ymm1,%ymm2
+ +[a-f0-9]+:	c5 fe 7f 0a          	vmovdqu %ymm1,\(%rdx\)
+ +[a-f0-9]+:	62 e1 7d 28 7f ca    	vmovdqa32 %ymm17,%ymm2
+ +[a-f0-9]+:	62 e1 7e 28 7f 0a    	vmovdqu32 %ymm17,\(%rdx\)
+ +[a-f0-9]+:	62 f9 7e 28 7f 0a    	vmovdqu32 %ymm1,\(%r18\)
+ +[a-f0-9]+:	c5 fd 7f ca          	vmovdqa %ymm1,%ymm2
+ +[a-f0-9]+:	c5 fe 7f 0a          	vmovdqu %ymm1,\(%rdx\)
+ +[a-f0-9]+:	62 e1 fd 28 7f ca    	vmovdqa64 %ymm17,%ymm2
+ +[a-f0-9]+:	62 e1 fe 28 7f 0a    	vmovdqu64 %ymm17,\(%rdx\)
+ +[a-f0-9]+:	62 f9 fe 28 7f 0a    	vmovdqu64 %ymm1,\(%r18\)
+#pass
diff --git a/gas/testsuite/gas/i386/x86-64-optimize-vextractNN.s b/gas/testsuite/gas/i386/x86-64-optimize-vextractNN.s
new file mode 100644
index 0000000..5da8265
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-optimize-vextractNN.s
@@ -0,0 +1,57 @@
+	.text
+vextract_128:
+	vextractf128 $0, %ymm1, %xmm2
+	vextractf128 $0, %ymm1, (%rdx)
+
+	vextracti128 $0, %ymm1, %xmm2
+	vextracti128 $0, %ymm1, (%rdx)
+
+vextract_NNxM_XMM:
+	vextractf32x4 $0, %ymm1, %xmm2
+	vextractf32x4 $0, %ymm1, (%rdx)
+	vextractf32x4 $0, %ymm17, %xmm2
+	vextractf32x4 $0, %ymm17, (%rdx)
+	vextractf32x4 $0, %ymm1, (%r18)
+
+	vextractf64x2 $0, %ymm1, %xmm2
+	vextractf64x2 $0, %ymm1, (%rdx)
+	vextractf64x2 $0, %ymm17, %xmm2
+	vextractf64x2 $0, %ymm17, (%rdx)
+	vextractf64x2 $0, %ymm1, (%r18)
+
+	vextracti32x4 $0, %ymm1, %xmm2
+	vextracti32x4 $0, %ymm1, (%rdx)
+	vextracti32x4 $0, %ymm17, %xmm2
+	vextracti32x4 $0, %ymm17, (%rdx)
+	vextracti32x4 $0, %ymm1, (%r18)
+
+	vextracti64x2 $0, %ymm1, %xmm2
+	vextracti64x2 $0, %ymm1, (%rdx)
+	vextracti64x2 $0, %ymm17, %xmm2
+	vextracti64x2 $0, %ymm17, (%rdx)
+	vextracti64x2 $0, %ymm1, (%r18)
+
+vextract_NNxM_YMM:
+	vextractf32x8 $0, %zmm1, %ymm2
+	vextractf32x8 $0, %zmm1, (%rdx)
+	vextractf32x8 $0, %zmm17, %ymm2
+	vextractf32x8 $0, %zmm17, (%rdx)
+	vextractf32x8 $0, %zmm1, (%r18)
+
+	vextractf64x4 $0, %zmm1, %ymm2
+	vextractf64x4 $0, %zmm1, (%rdx)
+	vextractf64x4 $0, %zmm17, %ymm2
+	vextractf64x4 $0, %zmm17, (%rdx)
+	vextractf64x4 $0, %zmm1, (%r18)
+
+	vextracti32x8 $0, %zmm1, %ymm2
+	vextracti32x8 $0, %zmm1, (%rdx)
+	vextracti32x8 $0, %zmm17, %ymm2
+	vextracti32x8 $0, %zmm17, (%rdx)
+	vextracti32x8 $0, %zmm1, (%r18)
+
+	vextracti64x4 $0, %zmm1, %ymm2
+	vextracti64x4 $0, %zmm1, (%rdx)
+	vextracti64x4 $0, %zmm17, %ymm2
+	vextracti64x4 $0, %zmm17, (%rdx)
+	vextracti64x4 $0, %zmm1, (%r18)
diff --git a/gas/testsuite/gas/i386/x86-64-tls.d b/gas/testsuite/gas/i386/x86-64-tls.d
new file mode 100644
index 0000000..1c30496
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-tls.d
@@ -0,0 +1,25 @@
+#as:
+#objdump: -drw
+#name: Check tls relocation x86-64
+
+.*: +file format .*
+
+
+Disassembly of section .text:
+
+0+ <_start>:
+ +[a-f0-9]+:	48 8d 3d 00 00 00 00 	lea    0x0\(%rip\),%rdi        # 7 <_start\+0x7>	3: R_X86_64_TLSGD	foo-0x4
+ +[a-f0-9]+:	48 8d 3d 00 00 00 00 	lea    0x0\(%rip\),%rdi        # e <_start\+0xe>	a: R_X86_64_TLSLD	foo-0x4
+ +[a-f0-9]+:	48 8d 05 00 00 00 00 	lea    0x0\(%rip\),%rax        # 15 <_start\+0x15>	11: R_X86_64_GOTPC32_TLSDESC	x-0x4
+ +[a-f0-9]+:	4c 03 25 00 00 00 00 	add    0x0\(%rip\),%r12        # 1c <_start\+0x1c>	18: R_X86_64_GOTTPOFF	foo-0x4
+ +[a-f0-9]+:	48 8b 05 00 00 00 00 	mov    0x0\(%rip\),%rax        # 23 <_start\+0x23>	1f: R_X86_64_GOTTPOFF	foo-0x4
+ +[a-f0-9]+:	d5 48 03 05 00 00 00 00 	add    0x0\(%rip\),%r16        # 2b <_start\+0x2b>	27: R_X86_64_CODE_4_GOTTPOFF	foo-0x4
+ +[a-f0-9]+:	d5 48 8b 25 00 00 00 00 	mov    0x0\(%rip\),%r20        # 33 <_start\+0x33>	2f: R_X86_64_CODE_4_GOTTPOFF	foo-0x4
+ +[a-f0-9]+:	62 64 bc 18 01 35 00 00 00 00 	add    %r30,0x0\(%rip\),%r8        # 3d <_start\+0x3d>	39: R_X86_64_CODE_6_GOTTPOFF	foo-0x4
+ +[a-f0-9]+:	62 f4 dc 10 03 05 00 00 00 00 	add    0x0\(%rip\),%rax,%r20        # 47 <_start\+0x47>	43: R_X86_64_CODE_6_GOTTPOFF	foo-0x4
+ +[a-f0-9]+:	62 e4 fc 0c 03 05 00 00 00 00 	\{nf\} add 0x0\(%rip\),%r16        # 51 <_start\+0x51>	4d: R_X86_64_CODE_6_GOTTPOFF	foo-0x4
+ +[a-f0-9]+:	62 64 bc 1c 01 35 00 00 00 00 	\{nf\} add %r30,0x0\(%rip\),%r8        # 5b <_start\+0x5b>	57: R_X86_64_CODE_6_GOTTPOFF	foo-0x4
+ +[a-f0-9]+:	62 f4 dc 14 03 05 00 00 00 00 	\{nf\} add 0x0\(%rip\),%rax,%r20        # 65 <_start\+0x65>	61: R_X86_64_CODE_6_GOTTPOFF	foo-0x4
+ +[a-f0-9]+:	ff 10                	call   \*\(%rax\)	65: R_X86_64_TLSDESC_CALL	x
+ +[a-f0-9]+:	67 ff 10             	call   \*\(%eax\)	67: R_X86_64_TLSDESC_CALL	x
+#pass
diff --git a/gas/testsuite/gas/i386/x86-64-tls.s b/gas/testsuite/gas/i386/x86-64-tls.s
new file mode 100644
index 0000000..7c3bd4a
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-tls.s
@@ -0,0 +1,27 @@
+# Check tls relocation 64-bit mode
+
+	.text
+_start:
+	/* R_X86_64_TLSGD.  */
+	leaq foo@tlsgd(%rip), %rdi
+
+	/* R_X86_64_TLSLD.  */
+	leaq foo@tlsld(%rip), %rdi
+
+	/* R_X86_64_GOTPC32_TLSDESC.  */
+	leaq     x@tlsdesc(%rip), %rax
+
+	/* R_X86_64_GOTTPOFF.  */
+	addq     foo@gottpoff(%rip), %r12
+	movq     foo@gottpoff(%rip), %rax
+	addq     foo@gottpoff(%rip), %r16
+	movq     foo@gottpoff(%rip), %r20
+	addq     %r30, foo@gottpoff(%rip), %r8
+	addq     foo@gottpoff(%rip), %rax, %r20
+	{nf} addq foo@gottpoff(%rip), %r16
+	{nf} addq %r30, foo@gottpoff(%rip), %r8
+	{nf} addq foo@gottpoff(%rip), %rax, %r20
+
+	/* R_X86_64_TLSDESC_CALL.  */
+	call *x@tlscall(%rax)
+	call *x@tlscall(%eax)
diff --git a/gas/testsuite/gas/i386/x86-64.exp b/gas/testsuite/gas/i386/x86-64.exp
index a14ed32..42a900d 100644
--- a/gas/testsuite/gas/i386/x86-64.exp
+++ b/gas/testsuite/gas/i386/x86-64.exp
@@ -498,6 +498,13 @@ run_dump_test "x86-64-pbndkb-intel"
 run_dump_test "x86-64-user_msr"
 run_dump_test "x86-64-user_msr-intel"
 run_list_test "x86-64-user_msr-inval"
+run_dump_test "x86-64-avx10_2-rounding"
+run_dump_test "x86-64-avx10_2-rounding-intel"
+run_dump_test "x86-64-avx10_2-evex-promote"
+run_dump_test "x86-64-avx10_2-512-1"
+run_dump_test "x86-64-avx10_2-512-1-intel"
+run_dump_test "x86-64-avx10_2-256-1"
+run_dump_test "x86-64-avx10_2-256-1-intel"
 run_dump_test "x86-64-clzero"
 run_dump_test "x86-64-mwaitx-bdver4"
 run_list_test "x86-64-mwaitx-reg"
@@ -592,6 +599,11 @@ run_dump_test "x86-64-optimize-7b"
 run_list_test "x86-64-optimize-8" "-I${srcdir}/$subdir -march=+noavx2 -al"
 run_list_test "x86-64-optimize-pextr" "-O -aln"
 run_dump_test "x86-64-optimize-pextr"
+run_list_test "x86-64-optimize-extractps" "-O -aln"
+run_dump_test "x86-64-optimize-extractps"
+run_dump_test "x86-64-optimize-vextractNN"
+run_list_test "x86-64-optimize-insertps" "-O -aln"
+run_dump_test "x86-64-optimize-insertps"
 run_dump_test "x86-64-apx-ndd-optimize"
 run_dump_test "x86-64-align-branch-1a"
 run_dump_test "x86-64-align-branch-1b"
@@ -651,7 +663,8 @@ if [is_elf_format] then {
     run_dump_test "x86-64-unwind"
 
     run_dump_test "reloc64"
-    run_list_test "reloc64" "--defsym _bad_=1"
+    run_list_test "reloc64" "--defsym _bad_=1 -mtls-check=no"
+    run_dump_test "x86-64-tls"
     run_list_test "x86-64-inval-tls"
     run_dump_test "mixed-mode-reloc64"
     run_dump_test "rela"
@@ -698,6 +711,8 @@ if [is_elf_format] then {
 
     run_dump_test "x86-64-no-got"
 
+    run_dump_test "x86-64-macro-1"
+
     run_dump_test "x86-64-addend"
     run_dump_test "x86-64-nop-3"
     run_dump_test "x86-64-nop-4"
diff --git a/gas/testsuite/gas/ia64/group-1.d b/gas/testsuite/gas/ia64/group-1.d
index a04a5cc..5c712ab 100644
--- a/gas/testsuite/gas/ia64/group-1.d
+++ b/gas/testsuite/gas/ia64/group-1.d
@@ -8,15 +8,15 @@ Section Headers:
        Size              EntSize          Flags  Link  Info  Align
   \[ 0\]                   NULL             0000000000000000  00000000
        0000000000000000  0000000000000000           0     0     0
-  \[ 1\] \.group            GROUP            0000000000000000  00000040
+  \[ 1\] \.group            GROUP            0000000000000000  [0-9a-f]+
        0000000000000008  0000000000000004           6     6     4
-  \[ 2\] \.text             PROGBITS         0000000000000000  00000050
+  \[ 2\] \.text             PROGBITS         0000000000000000  [0-9a-f]+
        0000000000000000  0000000000000000  AX       0     0     16
-  \[ 3\] \.data             PROGBITS         0000000000000000  00000050
+  \[ 3\] \.data             PROGBITS         0000000000000000  [0-9a-f]+
        0000000000000000  0000000000000000  WA       0     0     1
-  \[ 4\] \.bss              NOBITS           0000000000000000  00000050
+  \[ 4\] \.bss              NOBITS           0000000000000000  [0-9a-f]+
        0000000000000000  0000000000000000  WA       0     0     1
-  \[ 5\] \.text             PROGBITS         0000000000000000  00000050
+  \[ 5\] \.text             PROGBITS         0000000000000000  [0-9a-f]+
        0000000000000010  0000000000000000 AXG       0     0     16
   \[ 6\] \.symtab           SYMTAB           0000000000000000  .*
        00000000000000c0  0000000000000018           7     8     8
diff --git a/gas/testsuite/gas/ia64/group-2.d b/gas/testsuite/gas/ia64/group-2.d
index 52a313a..91473df 100644
--- a/gas/testsuite/gas/ia64/group-2.d
+++ b/gas/testsuite/gas/ia64/group-2.d
@@ -9,19 +9,19 @@ Section Headers:
        Size              EntSize          Flags  Link  Info  Align
   \[ 0\]                   NULL             0000000000000000  00000000
        0000000000000000  0000000000000000           0     0     0
-  \[ 1\] \.group            GROUP            0000000000000000  00000040
+  \[ 1\] \.group            GROUP            0000000000000000  [0-9a-f]+
        0000000000000014  0000000000000004           9     5     4
-  \[ 2\] \.text             PROGBITS         0000000000000000  00000060
+  \[ 2\] \.text             PROGBITS         0000000000000000  [0-9a-f]+
        0000000000000000  0000000000000000  AX       0     0     16
-  \[ 3\] \.data             PROGBITS         0000000000000000  00000060
+  \[ 3\] \.data             PROGBITS         0000000000000000  [0-9a-f]+
        0000000000000000  0000000000000000  WA       0     0     1
-  \[ 4\] \.bss              NOBITS           0000000000000000  00000060
+  \[ 4\] \.bss              NOBITS           0000000000000000  [0-9a-f]+
        0000000000000000  0000000000000000  WA       0     0     1
-  \[ 5\] \.gnu\.linkonce\.t\.f PROGBITS         0000000000000000  00000060
+  \[ 5\] \.gnu\.linkonce\.t\.f PROGBITS         0000000000000000  [0-9a-f]+
        0000000000000000  0000000000000000 AXG       0     0     16
-  \[ 6\] \.gnu\.linkonce\.ia6 PROGBITS         0000000000000000  00000060
+  \[ 6\] \.gnu\.linkonce\.ia6 PROGBITS         0000000000000000  [0-9a-f]+
        0000000000000010  0000000000000000  AG       0     0     8
-  \[ 7\] \.gnu\.linkonce\.ia6 IA_64_UNWIND     0000000000000000  00000070
+  \[ 7\] \.gnu\.linkonce\.ia6 IA_64_UNWIND     0000000000000000  [0-9a-f]+
        0000000000000018  0000000000000000 ALG       5     5     8
   \[ 8\] \.rela\.gnu\.linkonc RELA             0000000000000000  .*
        0000000000000048  0000000000000018  IG       9     7     8
diff --git a/gas/testsuite/gas/ia64/pcrel.s b/gas/testsuite/gas/ia64/pcrel.s
index b14e324..d63130a 100644
--- a/gas/testsuite/gas/ia64/pcrel.s
+++ b/gas/testsuite/gas/ia64/pcrel.s
@@ -13,27 +13,27 @@ _&n:
 _e&n:
 .endm
 
-.macro m1 op, opnd1:vararg
+.macro m1 op, opnd1
  .align 16
 	op		opnd1 _e&op - _&op
 .endm
-.macro m2 op, opnd1:vararg
+.macro m2 op, opnd1
  .align 16
 	op		opnd1 @pcrel(esym)
 .endm
-.macro m3 op, opnd1:vararg
+.macro m3 op, opnd1
  .align 16
 	op		opnd1 esym - _&op
 .endm
-.macro m4 op, opnd1:vararg
+.macro m4 op, opnd1
  .align 16
 	op		opnd1 esym - .
 .endm
-.macro m5 op, opnd1:vararg
+.macro m5 op, opnd1
  .align 16
 	op		opnd1 esym - _e&op
 .endm
-.macro m6 op, opnd1:vararg
+.macro m6 op, opnd1
  .align 16
 	op		opnd1 0
 .endm
diff --git a/gas/testsuite/gas/loongarch/illegal-operand.l b/gas/testsuite/gas/loongarch/illegal-operand.l
index dddc6d6..33e859c 100644
--- a/gas/testsuite/gas/loongarch/illegal-operand.l
+++ b/gas/testsuite/gas/loongarch/illegal-operand.l
@@ -1,108 +1,108 @@
 .*: Assembler messages:
-.*:2: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0
-.*:3: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0
-.*:4: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0
-.*:5: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0
-.*:6: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0
-.*:7: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0
-.*:8: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0
-.*:9: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0
-.*:10: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0
-.*:11: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0
-.*:12: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0
-.*:13: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0
-.*:14: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0
-.*:15: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0
-.*:16: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0
-.*:17: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0
-.*:18: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0
-.*:19: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0
-.*:20: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0
-.*:21: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0
-.*:22: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0
-.*:23: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0
-.*:24: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0
-.*:25: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0
-.*:26: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0
-.*:27: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0
-.*:28: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0
-.*:29: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0
-.*:30: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0
-.*:31: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0
-.*:32: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0
-.*:33: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0
-.*:34: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0
-.*:35: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0
-.*:36: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0
-.*:37: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0
-.*:38: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0
-.*:39: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0
-.*:40: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0
-.*:41: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0
-.*:42: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0
-.*:43: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0
-.*:44: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0
-.*:45: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0
-.*:46: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0
-.*:47: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0
-.*:48: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0
-.*:49: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0
-.*:50: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0
-.*:51: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0
-.*:52: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0
-.*:53: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0
-.*:54: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0
-.*:55: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0
-.*:56: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0
-.*:57: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0
-.*:58: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0
-.*:59: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0
-.*:60: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0
-.*:61: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0
-.*:62: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0
-.*:63: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0
-.*:64: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0
-.*:65: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0
-.*:66: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0
-.*:67: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0
-.*:68: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0
-.*:69: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0
-.*:70: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0
-.*:71: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0
-.*:72: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0
-.*:73: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0
-.*:74: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0
-.*:75: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0
-.*:76: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0
-.*:77: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0
-.*:78: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0
-.*:79: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0
-.*:80: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0
-.*:81: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0
-.*:82: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0
-.*:83: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0
-.*:84: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0
-.*:85: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0
-.*:86: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0
-.*:87: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0
-.*:88: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0
-.*:89: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0
-.*:90: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0
-.*:91: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0
-.*:92: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0
-.*:93: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0
-.*:94: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0
-.*:95: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0
-.*:96: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0
-.*:97: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0
-.*:98: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0
-.*:99: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0
-.*:100: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0
-.*:101: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0
-.*:102: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0
-.*:103: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0
-.*:104: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0
-.*:105: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0
+.*:2: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0
+.*:3: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0
+.*:4: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0
+.*:5: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0
+.*:6: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0
+.*:7: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0
+.*:8: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0
+.*:9: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0
+.*:10: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0
+.*:11: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0
+.*:12: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0
+.*:13: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0
+.*:14: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0
+.*:15: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0
+.*:16: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0
+.*:17: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0
+.*:18: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0
+.*:19: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0
+.*:20: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0
+.*:21: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0
+.*:22: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0
+.*:23: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0
+.*:24: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0
+.*:25: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0
+.*:26: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0
+.*:27: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0
+.*:28: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0
+.*:29: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0
+.*:30: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0
+.*:31: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0
+.*:32: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0
+.*:33: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0
+.*:34: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0
+.*:35: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0
+.*:36: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0
+.*:37: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0
+.*:38: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0
+.*:39: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0
+.*:40: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0
+.*:41: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0
+.*:42: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0
+.*:43: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0
+.*:44: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0
+.*:45: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0
+.*:46: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0
+.*:47: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0
+.*:48: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0
+.*:49: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0
+.*:50: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0
+.*:51: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0
+.*:52: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0
+.*:53: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0
+.*:54: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0
+.*:55: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0
+.*:56: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0
+.*:57: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0
+.*:58: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0
+.*:59: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0
+.*:60: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0
+.*:61: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0
+.*:62: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0
+.*:63: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0
+.*:64: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0
+.*:65: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0
+.*:66: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0
+.*:67: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0
+.*:68: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0
+.*:69: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0
+.*:70: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0
+.*:71: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0
+.*:72: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0
+.*:73: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0
+.*:74: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0
+.*:75: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0
+.*:76: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0
+.*:77: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0
+.*:78: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0
+.*:79: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0
+.*:80: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0
+.*:81: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0
+.*:82: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0
+.*:83: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0
+.*:84: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0
+.*:85: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0
+.*:86: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0
+.*:87: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0
+.*:88: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0
+.*:89: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0
+.*:90: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0
+.*:91: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0
+.*:92: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0
+.*:93: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0
+.*:94: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0
+.*:95: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0
+.*:96: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0
+.*:97: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0
+.*:98: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0
+.*:99: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0
+.*:100: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0
+.*:101: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0
+.*:102: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0
+.*:103: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0
+.*:104: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0
+.*:105: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0
 .*:108: Error: bstr\(ins\|pick\)\.\[wd\] require msbd >= lsbd
 .*:109: Error: bstr\(ins\|pick\)\.\[wd\] require msbd >= lsbd
 .*:110: Error: bstr\(ins\|pick\)\.\[wd\] require msbd >= lsbd
diff --git a/gas/testsuite/gas/loongarch/insn_expr.d b/gas/testsuite/gas/loongarch/insn_expr.d
new file mode 100644
index 0000000..9abc711
--- /dev/null
+++ b/gas/testsuite/gas/loongarch/insn_expr.d
@@ -0,0 +1,10 @@
+#as:
+#objdump: -d
+
+.*:     file format .*
+
+
+Disassembly of section \.text:
+
+0+ <\.text>:
+   0:	02c00ca4 	addi.d      	\$a0, \$a1, 3
diff --git a/gas/testsuite/gas/loongarch/insn_expr.s b/gas/testsuite/gas/loongarch/insn_expr.s
new file mode 100644
index 0000000..3b9ef08
--- /dev/null
+++ b/gas/testsuite/gas/loongarch/insn_expr.s
@@ -0,0 +1 @@
+addi.d    $a0,$a1,(8 >> 2 + 1)
diff --git a/gas/testsuite/gas/loongarch/large_addend.d b/gas/testsuite/gas/loongarch/large_addend.d
new file mode 100644
index 0000000..18eb33a
--- /dev/null
+++ b/gas/testsuite/gas/loongarch/large_addend.d
@@ -0,0 +1,12 @@
+#as:
+#objdump: -r
+#skip: loongarch32-*-*
+
+.*:     file format elf64-loongarch
+
+RELOCATION RECORDS FOR \[\.text\]:
+OFFSET           TYPE              VALUE
+0000000000000000 R_LARCH_PCALA_HI20  _start\+0x7fffabcd12345678
+0000000000000004 R_LARCH_PCALA_LO12  _start\+0x7fffabcd12345678
+0000000000000008 R_LARCH_PCALA64_LO20  _start\+0x7fffabcd12345678
+000000000000000c R_LARCH_PCALA64_HI12  _start\+0x7fffabcd12345678
diff --git a/gas/testsuite/gas/loongarch/large_addend.s b/gas/testsuite/gas/loongarch/large_addend.s
new file mode 100644
index 0000000..7db9052
--- /dev/null
+++ b/gas/testsuite/gas/loongarch/large_addend.s
@@ -0,0 +1,8 @@
+    .text
+    .global _start
+_start:
+    pcalau12i	$a0, %pc_hi20(_start+0x7fffabcd12345678)
+    addi.d	$a1, $zero, %pc_lo12(_start+0x7fffabcd12345678)
+    lu32i.d	$a1, %pc64_lo20(_start+0x7fffabcd12345678)
+    lu52i.d	$a1, $a1, %pc64_hi12(_start+0x7fffabcd12345678)
+    add.d	$a0, $a1, $a0
diff --git a/gas/testsuite/gas/macros/app6.l b/gas/testsuite/gas/macros/app6.l
new file mode 100644
index 0000000..6541fda
--- /dev/null
+++ b/gas/testsuite/gas/macros/app6.l
@@ -0,0 +1,7 @@
+.*: Assembler messages:
+.*:3: Warning: .*first.*
+.*:5: Warning: .*second.*
+.*:7: Warning: .*third.*
+.*:9: Warning: .*fourth.*
+.*:11: Warning: .*fifth.*
+#pass
diff --git a/gas/testsuite/gas/macros/app6.s b/gas/testsuite/gas/macros/app6.s
new file mode 100644
index 0000000..a88ba43
--- /dev/null
+++ b/gas/testsuite/gas/macros/app6.s
@@ -0,0 +1,11 @@
+#NO_APP
+	.data
+	.warning "first"
+#APP
+	.warning "second"
+	;#NO_APP
+	.warning "third"
+	;#APP
+	.warning "fourth"
+#NO_APP
+	.warning "fifth"
diff --git a/gas/testsuite/gas/macros/arg1.d b/gas/testsuite/gas/macros/arg1.d
new file mode 100644
index 0000000..adb24c9
--- /dev/null
+++ b/gas/testsuite/gas/macros/arg1.d
@@ -0,0 +1,9 @@
+#objdump: -s -j .data
+# tic30 and tic4x have 4 octets per byte, tic54x has 2 octets per byte
+#notarget: tic30-*-* tic4x-*-* tic54x-*-*
+#xfail: tic6x-*-*
+
+.*: .*
+
+Contents of section .data:
+ 0000 10111213 14150000 00000000 00000000 .*
diff --git a/gas/testsuite/gas/macros/arg1.s b/gas/testsuite/gas/macros/arg1.s
new file mode 100644
index 0000000..7eecc97
--- /dev/null
+++ b/gas/testsuite/gas/macros/arg1.s
@@ -0,0 +1,13 @@
+/* Test expression argument with inner white spaces and a white space
+   before argument added by C preprocessor.  */
+
+	.macro test arg1, arg2, arg3
+	.byte \arg1
+	.byte \arg2
+	.byte \ arg3
+	.endm
+
+	.data
+ 	test  0x10 + 0, 0x10 + 1, 0x10 + 2
+ 	test  0x10 + 3, 0x10 + 4, 0x15
+	.byte 0,0,0,0,0,0,0,0,0,0
diff --git a/gas/testsuite/gas/macros/irpc-quote.s b/gas/testsuite/gas/macros/irpc-quote.s
index 0499f69..0326196 100644
--- a/gas/testsuite/gas/macros/irpc-quote.s
+++ b/gas/testsuite/gas/macros/irpc-quote.s
@@ -1,6 +1,6 @@
-	.irpc c, " ab" cd " ef"
+	.irpc c, " ab" cd " ef" ""
 	.print ">\c<"
 	.endr
-	.irpc c, "12 " 34 "56 "
+	.irpc c, "" "12 " 34 "56 "
 	.print ">\c<"
 	.endr
diff --git a/gas/testsuite/gas/macros/macros.exp b/gas/testsuite/gas/macros/macros.exp
index 69914f7..3ac199f 100644
--- a/gas/testsuite/gas/macros/macros.exp
+++ b/gas/testsuite/gas/macros/macros.exp
@@ -29,6 +29,7 @@ run_dump_test test3
 if { ![istarget *c54x*-*-*] && ![istarget *c4x*-*-*] && ![istarget "nds32*-*-*"] } {
     run_dump_test irp
     run_dump_test rept
+    run_list_test rept "-almn"
     run_dump_test repeat
     run_dump_test vararg
 }
@@ -71,6 +72,11 @@ run_dump_test app3
 remote_download host "$srcdir/$subdir/app4b.s"
 run_dump_test app4
 run_dump_test app5
+if { ![istarget tic30-*-*] } {
+    run_list_test app6 ""
+}
+
+run_dump_test arg1
 
 run_list_test badarg ""
 
diff --git a/gas/testsuite/gas/macros/rept.l b/gas/testsuite/gas/macros/rept.l
new file mode 100644
index 0000000..626e9dc
--- /dev/null
+++ b/gas/testsuite/gas/macros/rept.l
@@ -0,0 +1,8 @@
+#...
+[ 	]*[1-9][0-9]*[ 	]+\.rept	3
+[ 	]*[1-9][0-9]*[ 	]+\.long	foo1
+[ 	]*[1-9][0-9]*[ 	]+\.endr
+[ 	]*[1-9][0-9]* 0000 [0 	]+> +\.long foo1
+[ 	]*[1-9][0-9]* 000[48] [0 	]+> +\.long foo1
+[ 	]*[1-9][0-9]* 00[01][08] [0 	]+> +\.long foo1
+#pass
diff --git a/gas/testsuite/gas/mips/allegrex@div-trap.d b/gas/testsuite/gas/mips/allegrex@div-trap.d
index 2000416..234fd99 100644
--- a/gas/testsuite/gas/mips/allegrex@div-trap.d
+++ b/gas/testsuite/gas/mips/allegrex@div-trap.d
@@ -1,5 +1,5 @@
 #as: -32 -trap
-#objdump: -dr --prefix-addresses
+#objdump: -dr --prefix-addresses --show-raw-insn
 #name: MIPS div with traps
 #source: div.s
 #dump: div.d
diff --git a/gas/testsuite/gas/mips/div.d b/gas/testsuite/gas/mips/div.d
index 465633d..2e57d10 100644
--- a/gas/testsuite/gas/mips/div.d
+++ b/gas/testsuite/gas/mips/div.d
@@ -1,90 +1,90 @@
 #as: -32
-#objdump: -dr --prefix-addresses
+#objdump: -dr --prefix-addresses --show-raw-insn
 #name: MIPS div
 
 # Test the div macro.
 
 .*: +file format .*mips.*
 
-Disassembly of section .text:
-0+0000 <[^>]*> div	zero,a0,a1
-0+0004 <[^>]*> bnez	a1,0+0010 <foo\+0x10>
-0+0008 <[^>]*> div	zero,a0,a1
-0+000c <[^>]*> break	(0x0,0x7|0x7)
-0+0010 <[^>]*> li	at,-1
-0+0014 <[^>]*> bne	a1,at,0+0028 <foo\+0x28>
-0+0018 <[^>]*> lui	at,0x8000
-0+001c <[^>]*> bne	a0,at,0+0028 <foo\+0x28>
-0+0020 <[^>]*> nop
-0+0024 <[^>]*> break	(0x0,0x6|0x6)
-0+0028 <[^>]*> mflo	a0
-0+002c <[^>]*> bnez	a2,0+0038 <foo\+0x38>
-0+0030 <[^>]*> div	zero,a1,a2
-0+0034 <[^>]*> break	(0x0,0x7|0x7)
-0+0038 <[^>]*> li	at,-1
-0+003c <[^>]*> bne	a2,at,0+0050 <foo\+0x50>
-0+0040 <[^>]*> lui	at,0x8000
-0+0044 <[^>]*> bne	a1,at,0+0050 <foo\+0x50>
-0+0048 <[^>]*> nop
-0+004c <[^>]*> break	(0x0,0x6|0x6)
-0+0050 <[^>]*> mflo	a0
-0+0054 <[^>]*> move	a0,a0
-0+0058 <[^>]*> move	a0,a1
-0+005c <[^>]*> neg	a0,a0
-0+0060 <[^>]*> neg	a0,a1
-0+0064 <[^>]*> li	at,2
-0+0068 <[^>]*> div	zero,a0,at
-0+006c <[^>]*> mflo	a0
-0+0070 <[^>]*> li	at,2
-0+0074 <[^>]*> div	zero,a1,at
-0+0078 <[^>]*> mflo	a0
-0+007c <[^>]*> li	at,0x8000
-0+0080 <[^>]*> div	zero,a0,at
-0+0084 <[^>]*> mflo	a0
-0+0088 <[^>]*> li	at,0x8000
-0+008c <[^>]*> div	zero,a1,at
-0+0090 <[^>]*> mflo	a0
-0+0094 <[^>]*> li	at,-32768
-0+0098 <[^>]*> div	zero,a0,at
-0+009c <[^>]*> mflo	a0
-0+00a0 <[^>]*> li	at,-32768
-0+00a4 <[^>]*> div	zero,a1,at
-0+00a8 <[^>]*> mflo	a0
-0+00ac <[^>]*> lui	at,0x1
-0+00b0 <[^>]*> div	zero,a0,at
-0+00b4 <[^>]*> mflo	a0
-0+00b8 <[^>]*> lui	at,0x1
-0+00bc <[^>]*> div	zero,a1,at
-0+00c0 <[^>]*> mflo	a0
-0+00c4 <[^>]*> lui	at,0x1
-0+00c8 <[^>]*> ori	at,at,0xa5a5
-0+00cc <[^>]*> div	zero,a0,at
-0+00d0 <[^>]*> mflo	a0
-0+00d4 <[^>]*> lui	at,0x1
-0+00d8 <[^>]*> ori	at,at,0xa5a5
-0+00dc <[^>]*> div	zero,a1,at
-0+00e0 <[^>]*> mflo	a0
-0+00e4 <[^>]*> divu	zero,a0,a1
-0+00e8 <[^>]*> bnez	a1,0+0f4 <foo\+0xf4>
-0+00ec <[^>]*> divu	zero,a0,a1
-0+00f0 <[^>]*> break	(0x0,0x7|0x7)
-0+00f4 <[^>]*> mflo	a0
-0+00f8 <[^>]*> bnez	a2,0+0104 <foo\+0x104>
-0+00fc <[^>]*> divu	zero,a1,a2
-0+0100 <[^>]*> break	(0x0,0x7|0x7)
-0+0104 <[^>]*> mflo	a0
-0+0108 <[^>]*> move	a0,a0
-0+010c <[^>]*> bnez	a2,0+0118 <foo\+0x118>
-0+0110 <[^>]*> div	zero,a1,a2
-0+0114 <[^>]*> break	(0x0,0x7|0x7)
-0+0118 <[^>]*> li	at,-1
-0+011c <[^>]*> bne	a2,at,0+0130 <foo\+0x130>
-0+0120 <[^>]*> lui	at,0x8000
-0+0124 <[^>]*> bne	a1,at,0+0130 <foo\+0x130>
-0+0128 <[^>]*> nop
-0+012c <[^>]*> break	(0x0,0x6|0x6)
-0+0130 <[^>]*> mfhi	a0
-0+0134 <[^>]*> li	at,2
-0+0138 <[^>]*> divu	zero,a1,at
-0+013c <[^>]*> mfhi	a0
-	...
+Disassembly of section \.text:
+[0-9a-f]+ <[^>]*> 0085001a 	div	zero,a0,a1
+[0-9a-f]+ <[^>]*> 14a00002 	bnez	a1,[0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 0085001a 	div	zero,a0,a1
+[0-9a-f]+ <[^>]*> 0007000d 	break	0x7
+[0-9a-f]+ <[^>]*> 2401ffff 	li	at,-1
+[0-9a-f]+ <[^>]*> 14a10004 	bne	a1,at,[0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 3c018000 	lui	at,0x8000
+[0-9a-f]+ <[^>]*> 14810002 	bne	a0,at,[0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 00000000 	nop
+[0-9a-f]+ <[^>]*> 0006000d 	break	0x6
+[0-9a-f]+ <[^>]*> 00002012 	mflo	a0
+[0-9a-f]+ <[^>]*> 14c00002 	bnez	a2,[0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 00a6001a 	div	zero,a1,a2
+[0-9a-f]+ <[^>]*> 0007000d 	break	0x7
+[0-9a-f]+ <[^>]*> 2401ffff 	li	at,-1
+[0-9a-f]+ <[^>]*> 14c10004 	bne	a2,at,[0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 3c018000 	lui	at,0x8000
+[0-9a-f]+ <[^>]*> 14a10002 	bne	a1,at,[0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 00000000 	nop
+[0-9a-f]+ <[^>]*> 0006000d 	break	0x6
+[0-9a-f]+ <[^>]*> 00002012 	mflo	a0
+[0-9a-f]+ <[^>]*> 00802025 	move	a0,a0
+[0-9a-f]+ <[^>]*> 00a02025 	move	a0,a1
+[0-9a-f]+ <[^>]*> 00042022 	neg	a0,a0
+[0-9a-f]+ <[^>]*> 00052022 	neg	a0,a1
+[0-9a-f]+ <[^>]*> 24010002 	li	at,2
+[0-9a-f]+ <[^>]*> 0081001a 	div	zero,a0,at
+[0-9a-f]+ <[^>]*> 00002012 	mflo	a0
+[0-9a-f]+ <[^>]*> 24010002 	li	at,2
+[0-9a-f]+ <[^>]*> 00a1001a 	div	zero,a1,at
+[0-9a-f]+ <[^>]*> 00002012 	mflo	a0
+[0-9a-f]+ <[^>]*> 34018000 	li	at,0x8000
+[0-9a-f]+ <[^>]*> 0081001a 	div	zero,a0,at
+[0-9a-f]+ <[^>]*> 00002012 	mflo	a0
+[0-9a-f]+ <[^>]*> 34018000 	li	at,0x8000
+[0-9a-f]+ <[^>]*> 00a1001a 	div	zero,a1,at
+[0-9a-f]+ <[^>]*> 00002012 	mflo	a0
+[0-9a-f]+ <[^>]*> 24018000 	li	at,-32768
+[0-9a-f]+ <[^>]*> 0081001a 	div	zero,a0,at
+[0-9a-f]+ <[^>]*> 00002012 	mflo	a0
+[0-9a-f]+ <[^>]*> 24018000 	li	at,-32768
+[0-9a-f]+ <[^>]*> 00a1001a 	div	zero,a1,at
+[0-9a-f]+ <[^>]*> 00002012 	mflo	a0
+[0-9a-f]+ <[^>]*> 3c010001 	lui	at,0x1
+[0-9a-f]+ <[^>]*> 0081001a 	div	zero,a0,at
+[0-9a-f]+ <[^>]*> 00002012 	mflo	a0
+[0-9a-f]+ <[^>]*> 3c010001 	lui	at,0x1
+[0-9a-f]+ <[^>]*> 00a1001a 	div	zero,a1,at
+[0-9a-f]+ <[^>]*> 00002012 	mflo	a0
+[0-9a-f]+ <[^>]*> 3c010001 	lui	at,0x1
+[0-9a-f]+ <[^>]*> 3421a5a5 	ori	at,at,0xa5a5
+[0-9a-f]+ <[^>]*> 0081001a 	div	zero,a0,at
+[0-9a-f]+ <[^>]*> 00002012 	mflo	a0
+[0-9a-f]+ <[^>]*> 3c010001 	lui	at,0x1
+[0-9a-f]+ <[^>]*> 3421a5a5 	ori	at,at,0xa5a5
+[0-9a-f]+ <[^>]*> 00a1001a 	div	zero,a1,at
+[0-9a-f]+ <[^>]*> 00002012 	mflo	a0
+[0-9a-f]+ <[^>]*> 0085001b 	divu	zero,a0,a1
+[0-9a-f]+ <[^>]*> 14a00002 	bnez	a1,[0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 0085001b 	divu	zero,a0,a1
+[0-9a-f]+ <[^>]*> 0007000d 	break	0x7
+[0-9a-f]+ <[^>]*> 00002012 	mflo	a0
+[0-9a-f]+ <[^>]*> 14c00002 	bnez	a2,[0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 00a6001b 	divu	zero,a1,a2
+[0-9a-f]+ <[^>]*> 0007000d 	break	0x7
+[0-9a-f]+ <[^>]*> 00002012 	mflo	a0
+[0-9a-f]+ <[^>]*> 00802025 	move	a0,a0
+[0-9a-f]+ <[^>]*> 14c00002 	bnez	a2,[0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 00a6001a 	div	zero,a1,a2
+[0-9a-f]+ <[^>]*> 0007000d 	break	0x7
+[0-9a-f]+ <[^>]*> 2401ffff 	li	at,-1
+[0-9a-f]+ <[^>]*> 14c10004 	bne	a2,at,[0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 3c018000 	lui	at,0x8000
+[0-9a-f]+ <[^>]*> 14a10002 	bne	a1,at,[0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 00000000 	nop
+[0-9a-f]+ <[^>]*> 0006000d 	break	0x6
+[0-9a-f]+ <[^>]*> 00002010 	mfhi	a0
+[0-9a-f]+ <[^>]*> 24010002 	li	at,2
+[0-9a-f]+ <[^>]*> 00a1001b 	divu	zero,a1,at
+[0-9a-f]+ <[^>]*> 00002010 	mfhi	a0
+	\.\.\.
diff --git a/gas/testsuite/gas/mips/div64-trap.d b/gas/testsuite/gas/mips/div64-trap.d
index eab1975..48e4947 100644
--- a/gas/testsuite/gas/mips/div64-trap.d
+++ b/gas/testsuite/gas/mips/div64-trap.d
@@ -11,8 +11,7 @@ Disassembly of section \.text:
 [0-9a-f]+ <[^>]*> 00c001f4 	teq	a2,zero,0x7
 [0-9a-f]+ <[^>]*> 00a6001e 	ddiv	zero,a1,a2
 [0-9a-f]+ <[^>]*> 2401ffff 	li	at,-1
-[0-9a-f]+ <[^>]*> 14c10003 	bne	a2,at,[0-9a-f]+ <[^>]*>
-[0-9a-f]+ <[^>]*> 24010001 	li	at,1
+[0-9a-f]+ <[^>]*> 14c10002 	bne	a2,at,[0-9a-f]+ <[^>]*>
 [0-9a-f]+ <[^>]*> 00010ffc 	dsll32	at,at,0x1f
 [0-9a-f]+ <[^>]*> 00a101b4 	teq	a1,at,0x6
 [0-9a-f]+ <[^>]*> 00002012 	mflo	a0
diff --git a/gas/testsuite/gas/mips/div64.d b/gas/testsuite/gas/mips/div64.d
index 3a02205..2c6b343 100644
--- a/gas/testsuite/gas/mips/div64.d
+++ b/gas/testsuite/gas/mips/div64.d
@@ -1,5 +1,5 @@
 #as: -32
-#objdump: -dr --prefix-addresses
+#objdump: -dr --prefix-addresses --show-raw-insn
 #name: MIPS 64-bit div
 
 # Test the div macro.
@@ -7,24 +7,23 @@
 .*: +file format .*mips.*
 
 Disassembly of section \.text:
-0+0000 <[^>]*> bnez	a2,0+000c <foo\+0xc>
-0+0004 <[^>]*> ddiv	zero,a1,a2
-0+0008 <[^>]*> break	(0x0,0x7|0x7)
-0+000c <[^>]*> (daddiu	at,zero,-1|li	at,-1)
-0+0010 <[^>]*> bne	a2,at,0+0028 <foo\+0x28>
-0+0014 <[^>]*> (daddiu	at,zero,1|li	at,1)
-0+0018 <[^>]*> dsll32	at,at,0x1f
-0+001c <[^>]*> bne	a1,at,0+0028 <foo\+0x28>
-0+0020 <[^>]*> nop
-0+0024 <[^>]*> break	(0x0,0x6|0x6)
-0+0028 <[^>]*> mflo	a0
-0+002c <[^>]*> li	at,2
-0+0030 <[^>]*> ddivu	zero,a1,at
-0+0034 <[^>]*> mflo	a0
-0+0038 <[^>]*> li	at,0x8000
-0+003c <[^>]*> ddiv	zero,a1,at
-0+0040 <[^>]*> mfhi	a0
-0+0044 <[^>]*> li	at,-32768
-0+0048 <[^>]*> ddivu	zero,a1,at
-0+004c <[^>]*> mfhi	a0
+[0-9a-f]+ <[^>]*> 14c00002 	bnez	a2,[0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 00a6001e 	ddiv	zero,a1,a2
+[0-9a-f]+ <[^>]*> 0007000d 	break	0x7
+[0-9a-f]+ <[^>]*> 2401ffff 	li	at,-1
+[0-9a-f]+ <[^>]*> 14c10004 	bne	a2,at,[0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 00010ffc 	dsll32	at,at,0x1f
+[0-9a-f]+ <[^>]*> 14a10002 	bne	a1,at,[0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 00000000 	nop
+[0-9a-f]+ <[^>]*> 0006000d 	break	0x6
+[0-9a-f]+ <[^>]*> 00002012 	mflo	a0
+[0-9a-f]+ <[^>]*> 24010002 	li	at,2
+[0-9a-f]+ <[^>]*> 00a1001f 	ddivu	zero,a1,at
+[0-9a-f]+ <[^>]*> 00002012 	mflo	a0
+[0-9a-f]+ <[^>]*> 34018000 	li	at,0x8000
+[0-9a-f]+ <[^>]*> 00a1001e 	ddiv	zero,a1,at
+[0-9a-f]+ <[^>]*> 00002010 	mfhi	a0
+[0-9a-f]+ <[^>]*> 24018000 	li	at,-32768
+[0-9a-f]+ <[^>]*> 00a1001f 	ddivu	zero,a1,at
+[0-9a-f]+ <[^>]*> 00002010 	mfhi	a0
 	\.\.\.
diff --git a/gas/testsuite/gas/mips/micromips-compact.d b/gas/testsuite/gas/mips/micromips-compact.d
index 34f6186..ca3451b 100644
--- a/gas/testsuite/gas/mips/micromips-compact.d
+++ b/gas/testsuite/gas/mips/micromips-compact.d
@@ -6523,7 +6523,6 @@ Disassembly of section \.text:
 [ 0-9a-f]+:	3020 ffff 	li	at,-1
 [ 0-9a-f]+:	b424 fffe 	bne	a0,at,[0-9a-f]+ <.*\+0x[0-9a-f]+>
 [ 	]*[0-9a-f]+: R_MICROMIPS_PC16_S1	.*
-[ 0-9a-f]+:	3020 0001 	li	at,1
 [ 0-9a-f]+:	5821 f808 	dsll32	at,at,0x1f
 [ 0-9a-f]+:	b423 fffe 	bne	v1,at,[0-9a-f]+ <.*\+0x[0-9a-f]+>
 [ 	]*[0-9a-f]+: R_MICROMIPS_PC16_S1	.*
@@ -6960,7 +6959,6 @@ Disassembly of section \.text:
 [ 0-9a-f]+:	3020 ffff 	li	at,-1
 [ 0-9a-f]+:	b423 fffe 	bne	v1,at,[0-9a-f]+ <.*\+0x[0-9a-f]+>
 [ 	]*[0-9a-f]+: R_MICROMIPS_PC16_S1	.*
-[ 0-9a-f]+:	3020 0001 	li	at,1
 [ 0-9a-f]+:	5821 f808 	dsll32	at,at,0x1f
 [ 0-9a-f]+:	b420 fffe 	bne	zero,at,[0-9a-f]+ <.*\+0x[0-9a-f]+>
 [ 	]*[0-9a-f]+: R_MICROMIPS_PC16_S1	.*
@@ -6978,7 +6976,6 @@ Disassembly of section \.text:
 [ 0-9a-f]+:	3020 ffff 	li	at,-1
 [ 0-9a-f]+:	b43f fffe 	bne	ra,at,[0-9a-f]+ <.*\+0x[0-9a-f]+>
 [ 	]*[0-9a-f]+: R_MICROMIPS_PC16_S1	.*
-[ 0-9a-f]+:	3020 0001 	li	at,1
 [ 0-9a-f]+:	5821 f808 	dsll32	at,at,0x1f
 [ 0-9a-f]+:	b420 fffe 	bne	zero,at,[0-9a-f]+ <.*\+0x[0-9a-f]+>
 [ 	]*[0-9a-f]+: R_MICROMIPS_PC16_S1	.*
diff --git a/gas/testsuite/gas/mips/micromips-insn32.d b/gas/testsuite/gas/mips/micromips-insn32.d
index f4282ff..e785134 100644
--- a/gas/testsuite/gas/mips/micromips-insn32.d
+++ b/gas/testsuite/gas/mips/micromips-insn32.d
@@ -6547,7 +6547,6 @@ Disassembly of section \.text:
 [ 0-9a-f]+:	3020 ffff 	li	at,-1
 [ 0-9a-f]+:	b424 fffe 	bne	a0,at,[0-9a-f]+ <.*\+0x[0-9a-f]+>
 [ 	]*[0-9a-f]+: R_MICROMIPS_PC16_S1	.*
-[ 0-9a-f]+:	3020 0001 	li	at,1
 [ 0-9a-f]+:	5821 f808 	dsll32	at,at,0x1f
 [ 0-9a-f]+:	b423 fffe 	bne	v1,at,[0-9a-f]+ <.*\+0x[0-9a-f]+>
 [ 	]*[0-9a-f]+: R_MICROMIPS_PC16_S1	.*
@@ -6984,7 +6983,6 @@ Disassembly of section \.text:
 [ 0-9a-f]+:	3020 ffff 	li	at,-1
 [ 0-9a-f]+:	b423 fffe 	bne	v1,at,[0-9a-f]+ <.*\+0x[0-9a-f]+>
 [ 	]*[0-9a-f]+: R_MICROMIPS_PC16_S1	.*
-[ 0-9a-f]+:	3020 0001 	li	at,1
 [ 0-9a-f]+:	5821 f808 	dsll32	at,at,0x1f
 [ 0-9a-f]+:	b420 fffe 	bne	zero,at,[0-9a-f]+ <.*\+0x[0-9a-f]+>
 [ 	]*[0-9a-f]+: R_MICROMIPS_PC16_S1	.*
@@ -7002,7 +7000,6 @@ Disassembly of section \.text:
 [ 0-9a-f]+:	3020 ffff 	li	at,-1
 [ 0-9a-f]+:	b43f fffe 	bne	ra,at,[0-9a-f]+ <.*\+0x[0-9a-f]+>
 [ 	]*[0-9a-f]+: R_MICROMIPS_PC16_S1	.*
-[ 0-9a-f]+:	3020 0001 	li	at,1
 [ 0-9a-f]+:	5821 f808 	dsll32	at,at,0x1f
 [ 0-9a-f]+:	b420 fffe 	bne	zero,at,[0-9a-f]+ <.*\+0x[0-9a-f]+>
 [ 	]*[0-9a-f]+: R_MICROMIPS_PC16_S1	.*
diff --git a/gas/testsuite/gas/mips/micromips-noinsn32.d b/gas/testsuite/gas/mips/micromips-noinsn32.d
index 75bfaf7..3fa9a06 100644
--- a/gas/testsuite/gas/mips/micromips-noinsn32.d
+++ b/gas/testsuite/gas/mips/micromips-noinsn32.d
@@ -6524,7 +6524,6 @@ Disassembly of section \.text:
 [ 0-9a-f]+:	3020 ffff 	li	at,-1
 [ 0-9a-f]+:	b424 fffe 	bne	a0,at,[0-9a-f]+ <.*\+0x[0-9a-f]+>
 [ 	]*[0-9a-f]+: R_MICROMIPS_PC16_S1	.*
-[ 0-9a-f]+:	3020 0001 	li	at,1
 [ 0-9a-f]+:	5821 f808 	dsll32	at,at,0x1f
 [ 0-9a-f]+:	b423 fffe 	bne	v1,at,[0-9a-f]+ <.*\+0x[0-9a-f]+>
 [ 	]*[0-9a-f]+: R_MICROMIPS_PC16_S1	.*
@@ -6961,7 +6960,6 @@ Disassembly of section \.text:
 [ 0-9a-f]+:	3020 ffff 	li	at,-1
 [ 0-9a-f]+:	b423 fffe 	bne	v1,at,[0-9a-f]+ <.*\+0x[0-9a-f]+>
 [ 	]*[0-9a-f]+: R_MICROMIPS_PC16_S1	.*
-[ 0-9a-f]+:	3020 0001 	li	at,1
 [ 0-9a-f]+:	5821 f808 	dsll32	at,at,0x1f
 [ 0-9a-f]+:	b420 fffe 	bne	zero,at,[0-9a-f]+ <.*\+0x[0-9a-f]+>
 [ 	]*[0-9a-f]+: R_MICROMIPS_PC16_S1	.*
@@ -6979,7 +6977,6 @@ Disassembly of section \.text:
 [ 0-9a-f]+:	3020 ffff 	li	at,-1
 [ 0-9a-f]+:	b43f fffe 	bne	ra,at,[0-9a-f]+ <.*\+0x[0-9a-f]+>
 [ 	]*[0-9a-f]+: R_MICROMIPS_PC16_S1	.*
-[ 0-9a-f]+:	3020 0001 	li	at,1
 [ 0-9a-f]+:	5821 f808 	dsll32	at,at,0x1f
 [ 0-9a-f]+:	b420 fffe 	bne	zero,at,[0-9a-f]+ <.*\+0x[0-9a-f]+>
 [ 	]*[0-9a-f]+: R_MICROMIPS_PC16_S1	.*
diff --git a/gas/testsuite/gas/mips/micromips-trap.d b/gas/testsuite/gas/mips/micromips-trap.d
index 68f5a02..0be6e28 100644
--- a/gas/testsuite/gas/mips/micromips-trap.d
+++ b/gas/testsuite/gas/mips/micromips-trap.d
@@ -6526,7 +6526,6 @@ Disassembly of section \.text:
 [ 0-9a-f]+:	3020 ffff 	li	at,-1
 [ 0-9a-f]+:	b424 fffe 	bne	a0,at,[0-9a-f]+ <.*\+0x[0-9a-f]+>
 [ 	]*[0-9a-f]+: R_MICROMIPS_PC16_S1	.*
-[ 0-9a-f]+:	3020 0001 	li	at,1
 [ 0-9a-f]+:	5821 f808 	dsll32	at,at,0x1f
 [ 0-9a-f]+:	0023 603c 	teq	v1,at,0x6
 
@@ -6928,7 +6927,6 @@ Disassembly of section \.text:
 [ 0-9a-f]+:	3020 ffff 	li	at,-1
 [ 0-9a-f]+:	b423 fffe 	bne	v1,at,[0-9a-f]+ <.*\+0x[0-9a-f]+>
 [ 	]*[0-9a-f]+: R_MICROMIPS_PC16_S1	.*
-[ 0-9a-f]+:	3020 0001 	li	at,1
 [ 0-9a-f]+:	5821 f808 	dsll32	at,at,0x1f
 [ 0-9a-f]+:	0020 603c 	teq	zero,at,0x6
 
@@ -6939,7 +6937,6 @@ Disassembly of section \.text:
 [ 0-9a-f]+:	3020 ffff 	li	at,-1
 [ 0-9a-f]+:	b43f fffe 	bne	ra,at,[0-9a-f]+ <.*\+0x[0-9a-f]+>
 [ 	]*[0-9a-f]+: R_MICROMIPS_PC16_S1	.*
-[ 0-9a-f]+:	3020 0001 	li	at,1
 [ 0-9a-f]+:	5821 f808 	dsll32	at,at,0x1f
 [ 0-9a-f]+:	0020 603c 	teq	zero,at,0x6
 
diff --git a/gas/testsuite/gas/mips/micromips.d b/gas/testsuite/gas/mips/micromips.d
index 86511b9..4d96510 100644
--- a/gas/testsuite/gas/mips/micromips.d
+++ b/gas/testsuite/gas/mips/micromips.d
@@ -6602,7 +6602,6 @@ Disassembly of section \.text:
 [ 0-9a-f]+:	3020 ffff 	li	at,-1
 [ 0-9a-f]+:	b424 fffe 	bne	a0,at,[0-9a-f]+ <.*\+0x[0-9a-f]+>
 [ 	]*[0-9a-f]+: R_MICROMIPS_PC16_S1	.*
-[ 0-9a-f]+:	3020 0001 	li	at,1
 [ 0-9a-f]+:	5821 f808 	dsll32	at,at,0x1f
 [ 0-9a-f]+:	b423 fffe 	bne	v1,at,[0-9a-f]+ <.*\+0x[0-9a-f]+>
 [ 	]*[0-9a-f]+: R_MICROMIPS_PC16_S1	.*
@@ -7039,7 +7038,6 @@ Disassembly of section \.text:
 [ 0-9a-f]+:	3020 ffff 	li	at,-1
 [ 0-9a-f]+:	b423 fffe 	bne	v1,at,[0-9a-f]+ <.*\+0x[0-9a-f]+>
 [ 	]*[0-9a-f]+: R_MICROMIPS_PC16_S1	.*
-[ 0-9a-f]+:	3020 0001 	li	at,1
 [ 0-9a-f]+:	5821 f808 	dsll32	at,at,0x1f
 [ 0-9a-f]+:	b420 fffe 	bne	zero,at,[0-9a-f]+ <.*\+0x[0-9a-f]+>
 [ 	]*[0-9a-f]+: R_MICROMIPS_PC16_S1	.*
@@ -7057,7 +7055,6 @@ Disassembly of section \.text:
 [ 0-9a-f]+:	3020 ffff 	li	at,-1
 [ 0-9a-f]+:	b43f fffe 	bne	ra,at,[0-9a-f]+ <.*\+0x[0-9a-f]+>
 [ 	]*[0-9a-f]+: R_MICROMIPS_PC16_S1	.*
-[ 0-9a-f]+:	3020 0001 	li	at,1
 [ 0-9a-f]+:	5821 f808 	dsll32	at,at,0x1f
 [ 0-9a-f]+:	b420 fffe 	bne	zero,at,[0-9a-f]+ <.*\+0x[0-9a-f]+>
 [ 	]*[0-9a-f]+: R_MICROMIPS_PC16_S1	.*
diff --git a/gas/testsuite/gas/mips/micromips.l b/gas/testsuite/gas/mips/micromips.l
index 25112cd..9236782 100644
--- a/gas/testsuite/gas/mips/micromips.l
+++ b/gas/testsuite/gas/mips/micromips.l
@@ -64,18 +64,18 @@
 .*:3133: Error: opcode not supported in the `insn32' mode `addiur2 \$17,\$17,16'
 .*:3134: Error: opcode not supported in the `insn32' mode `addiur2 \$17,\$17,20'
 .*:3135: Error: opcode not supported in the `insn32' mode `addiur2 \$17,\$17,24'
-.*:3137: Error: opcode not supported in the `insn32' mode `addiusp 2<<2'
-.*:3138: Error: opcode not supported in the `insn32' mode `addiusp 3<<2'
-.*:3139: Error: opcode not supported in the `insn32' mode `addiusp 254<<2'
-.*:3140: Error: opcode not supported in the `insn32' mode `addiusp 255<<2'
-.*:3141: Error: opcode not supported in the `insn32' mode `addiusp 256<<2'
-.*:3142: Error: opcode not supported in the `insn32' mode `addiusp 257<<2'
-.*:3143: Error: opcode not supported in the `insn32' mode `addiusp -3<<2'
-.*:3144: Error: opcode not supported in the `insn32' mode `addiusp -4<<2'
-.*:3145: Error: opcode not supported in the `insn32' mode `addiusp -255<<2'
-.*:3146: Error: opcode not supported in the `insn32' mode `addiusp -256<<2'
-.*:3147: Error: opcode not supported in the `insn32' mode `addiusp -257<<2'
-.*:3148: Error: opcode not supported in the `insn32' mode `addiusp -258<<2'
+.*:3137: Error: opcode not supported in the `insn32' mode `addiusp 2 ?<< ?2'
+.*:3138: Error: opcode not supported in the `insn32' mode `addiusp 3 ?<< ?2'
+.*:3139: Error: opcode not supported in the `insn32' mode `addiusp 254 ?<< ?2'
+.*:3140: Error: opcode not supported in the `insn32' mode `addiusp 255 ?<< ?2'
+.*:3141: Error: opcode not supported in the `insn32' mode `addiusp 256 ?<< ?2'
+.*:3142: Error: opcode not supported in the `insn32' mode `addiusp 257 ?<< ?2'
+.*:3143: Error: opcode not supported in the `insn32' mode `addiusp -3 ?<< ?2'
+.*:3144: Error: opcode not supported in the `insn32' mode `addiusp -4 ?<< ?2'
+.*:3145: Error: opcode not supported in the `insn32' mode `addiusp -255 ?<< ?2'
+.*:3146: Error: opcode not supported in the `insn32' mode `addiusp -256 ?<< ?2'
+.*:3147: Error: opcode not supported in the `insn32' mode `addiusp -257 ?<< ?2'
+.*:3148: Error: opcode not supported in the `insn32' mode `addiusp -258 ?<< ?2'
 .*:3150: Error: opcode not supported in the `insn32' mode `addius5 \$0,0'
 .*:3151: Error: opcode not supported in the `insn32' mode `addius5 \$2,0'
 .*:3152: Error: opcode not supported in the `insn32' mode `addius5 \$3,0'
diff --git a/gas/testsuite/gas/mips/micromips@div64-trap.d b/gas/testsuite/gas/mips/micromips@div64-trap.d
index e4e5e68..6839401 100644
--- a/gas/testsuite/gas/mips/micromips@div64-trap.d
+++ b/gas/testsuite/gas/mips/micromips@div64-trap.d
@@ -13,7 +13,6 @@ Disassembly of section \.text:
 [0-9a-f]+ <[^>]*> 3020 ffff 	li	at,-1
 [0-9a-f]+ <[^>]*> b426 fffe 	bne	a2,at,[0-9a-f]+ <[^>]*>
 			[0-9a-f]+: R_MICROMIPS_PC16_S1	\.L\^_0
-[0-9a-f]+ <[^>]*> 3020 0001 	li	at,1
 [0-9a-f]+ <[^>]*> 5821 f808 	dsll32	at,at,0x1f
 [0-9a-f]+ <[^>]*> 0025 603c 	teq	a1,at,0x6
 [0-9a-f]+ <\.L\^_0> 4644      	mflo	a0
diff --git a/gas/testsuite/gas/mips/micromips@div64.d b/gas/testsuite/gas/mips/micromips@div64.d
index 07abe64..af7fc2c 100644
--- a/gas/testsuite/gas/mips/micromips@div64.d
+++ b/gas/testsuite/gas/mips/micromips@div64.d
@@ -15,7 +15,6 @@ Disassembly of section \.text:
 [0-9a-f]+ <\.L\^_0> 3020 ffff 	li	at,-1
 [0-9a-f]+ <[^>]*> b426 fffe 	bne	a2,at,[0-9a-f]+ <[^>]*>
 			[0-9a-f]+: R_MICROMIPS_PC16_S1	\.L\^_1
-[0-9a-f]+ <[^>]*> 3020 0001 	li	at,1
 [0-9a-f]+ <[^>]*> 5821 f808 	dsll32	at,at,0x1f
 [0-9a-f]+ <[^>]*> b425 fffe 	bne	a1,at,[0-9a-f]+ <[^>]*>
 			[0-9a-f]+: R_MICROMIPS_PC16_S1	\.L\^_1
diff --git a/gas/testsuite/gas/mips/mips16-32@mips16-insn-e.l b/gas/testsuite/gas/mips/mips16-32@mips16-insn-e.l
index 45b31d6..28f8db4 100644
--- a/gas/testsuite/gas/mips/mips16-32@mips16-insn-e.l
+++ b/gas/testsuite/gas/mips/mips16-32@mips16-insn-e.l
@@ -117,12 +117,12 @@
 .*:171: Error: opcode not supported on this processor: mips1 \(mips1\) `daddu\.e \$29,0'
 .*:172: Error: opcode not supported on this processor: mips1 \(mips1\) `daddu\.e \$29,\$29,0'
 .*:174: Error: opcode not supported on this processor: mips1 \(mips1\) `ld\.e \$16,0\(\$pc\)'
-.*:175: Error: opcode not supported on this processor: mips1 \(mips1\) `ld\.e \$16,\.-3'
+.*:175: Error: opcode not supported on this processor: mips1 \(mips1\) `ld\.e \$16,\. ?- ?3'
 .*:176: Error: opcode not supported on this processor: mips1 \(mips1\) `daddiu\.e \$16,0'
 .*:177: Error: opcode not supported on this processor: mips1 \(mips1\) `daddu\.e \$16,0'
 .*:179: Error: opcode not supported on this processor: mips1 \(mips1\) `daddiu\.e \$16,\$pc,0'
 .*:180: Error: opcode not supported on this processor: mips1 \(mips1\) `daddu\.e \$16,\$pc,0'
-.*:181: Error: opcode not supported on this processor: mips1 \(mips1\) `dla\.e \$16,\.-1'
+.*:181: Error: opcode not supported on this processor: mips1 \(mips1\) `dla\.e \$16,\. ?- ?1'
 .*:182: Error: opcode not supported on this processor: mips1 \(mips1\) `daddiu\.e \$16,\$sp,0'
 .*:183: Error: opcode not supported on this processor: mips1 \(mips1\) `daddu\.e \$16,\$sp,0'
 .*:10: Warning: extended operand requested but not required
diff --git a/gas/testsuite/gas/mips/mips16-32@mips16-insn-t.l b/gas/testsuite/gas/mips/mips16-32@mips16-insn-t.l
index a632d59..23c5d50 100644
--- a/gas/testsuite/gas/mips/mips16-32@mips16-insn-t.l
+++ b/gas/testsuite/gas/mips/mips16-32@mips16-insn-t.l
@@ -44,11 +44,11 @@
 .*:171: Error: opcode not supported on this processor: mips1 \(mips1\) `daddu\.t \$29,0'
 .*:172: Error: opcode not supported on this processor: mips1 \(mips1\) `daddu\.t \$29,\$29,0'
 .*:174: Error: opcode not supported on this processor: mips1 \(mips1\) `ld\.t \$16,0\(\$pc\)'
-.*:175: Error: opcode not supported on this processor: mips1 \(mips1\) `ld\.t \$16,\.-3'
+.*:175: Error: opcode not supported on this processor: mips1 \(mips1\) `ld\.t \$16,\. ?- ?3'
 .*:176: Error: opcode not supported on this processor: mips1 \(mips1\) `daddiu\.t \$16,0'
 .*:177: Error: opcode not supported on this processor: mips1 \(mips1\) `daddu\.t \$16,0'
 .*:179: Error: opcode not supported on this processor: mips1 \(mips1\) `daddiu\.t \$16,\$pc,0'
 .*:180: Error: opcode not supported on this processor: mips1 \(mips1\) `daddu\.t \$16,\$pc,0'
-.*:181: Error: opcode not supported on this processor: mips1 \(mips1\) `dla\.t \$16,\.-1'
+.*:181: Error: opcode not supported on this processor: mips1 \(mips1\) `dla\.t \$16,\. ?- ?1'
 .*:182: Error: opcode not supported on this processor: mips1 \(mips1\) `daddiu\.t \$16,\$sp,0'
 .*:183: Error: opcode not supported on this processor: mips1 \(mips1\) `daddu\.t \$16,\$sp,0'
diff --git a/gas/testsuite/gas/mips/mips16e-32@mips16-insn-e.l b/gas/testsuite/gas/mips/mips16e-32@mips16-insn-e.l
index a66cc35..5bff2ef 100644
--- a/gas/testsuite/gas/mips/mips16e-32@mips16-insn-e.l
+++ b/gas/testsuite/gas/mips/mips16e-32@mips16-insn-e.l
@@ -115,12 +115,12 @@
 .*:171: Error: opcode not supported on this processor: mips32 \(mips32\) `daddu\.e \$29,0'
 .*:172: Error: opcode not supported on this processor: mips32 \(mips32\) `daddu\.e \$29,\$29,0'
 .*:174: Error: opcode not supported on this processor: mips32 \(mips32\) `ld\.e \$16,0\(\$pc\)'
-.*:175: Error: opcode not supported on this processor: mips32 \(mips32\) `ld\.e \$16,\.-3'
+.*:175: Error: opcode not supported on this processor: mips32 \(mips32\) `ld\.e \$16,\. ?- ?3'
 .*:176: Error: opcode not supported on this processor: mips32 \(mips32\) `daddiu\.e \$16,0'
 .*:177: Error: opcode not supported on this processor: mips32 \(mips32\) `daddu\.e \$16,0'
 .*:179: Error: opcode not supported on this processor: mips32 \(mips32\) `daddiu\.e \$16,\$pc,0'
 .*:180: Error: opcode not supported on this processor: mips32 \(mips32\) `daddu\.e \$16,\$pc,0'
-.*:181: Error: opcode not supported on this processor: mips32 \(mips32\) `dla\.e \$16,\.-1'
+.*:181: Error: opcode not supported on this processor: mips32 \(mips32\) `dla\.e \$16,\. ?- ?1'
 .*:182: Error: opcode not supported on this processor: mips32 \(mips32\) `daddiu\.e \$16,\$sp,0'
 .*:183: Error: opcode not supported on this processor: mips32 \(mips32\) `daddu\.e \$16,\$sp,0'
 .*:10: Warning: extended operand requested but not required
diff --git a/gas/testsuite/gas/mips/mips16e-32@mips16-insn-t.l b/gas/testsuite/gas/mips/mips16e-32@mips16-insn-t.l
index 69ce411..48cc51d 100644
--- a/gas/testsuite/gas/mips/mips16e-32@mips16-insn-t.l
+++ b/gas/testsuite/gas/mips/mips16e-32@mips16-insn-t.l
@@ -33,11 +33,11 @@
 .*:171: Error: opcode not supported on this processor: mips32 \(mips32\) `daddu\.t \$29,0'
 .*:172: Error: opcode not supported on this processor: mips32 \(mips32\) `daddu\.t \$29,\$29,0'
 .*:174: Error: opcode not supported on this processor: mips32 \(mips32\) `ld\.t \$16,0\(\$pc\)'
-.*:175: Error: opcode not supported on this processor: mips32 \(mips32\) `ld\.t \$16,\.-3'
+.*:175: Error: opcode not supported on this processor: mips32 \(mips32\) `ld\.t \$16,\. ?- ?3'
 .*:176: Error: opcode not supported on this processor: mips32 \(mips32\) `daddiu\.t \$16,0'
 .*:177: Error: opcode not supported on this processor: mips32 \(mips32\) `daddu\.t \$16,0'
 .*:179: Error: opcode not supported on this processor: mips32 \(mips32\) `daddiu\.t \$16,\$pc,0'
 .*:180: Error: opcode not supported on this processor: mips32 \(mips32\) `daddu\.t \$16,\$pc,0'
-.*:181: Error: opcode not supported on this processor: mips32 \(mips32\) `dla\.t \$16,\.-1'
+.*:181: Error: opcode not supported on this processor: mips32 \(mips32\) `dla\.t \$16,\. ?- ?1'
 .*:182: Error: opcode not supported on this processor: mips32 \(mips32\) `daddiu\.t \$16,\$sp,0'
 .*:183: Error: opcode not supported on this processor: mips32 \(mips32\) `daddu\.t \$16,\$sp,0'
diff --git a/gas/testsuite/gas/mips/mips16e2-32@mips16-insn-e.l b/gas/testsuite/gas/mips/mips16e2-32@mips16-insn-e.l
index 095e0b0..fe16cb2 100644
--- a/gas/testsuite/gas/mips/mips16e2-32@mips16-insn-e.l
+++ b/gas/testsuite/gas/mips/mips16e2-32@mips16-insn-e.l
@@ -115,12 +115,12 @@
 .*:171: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `daddu\.e \$29,0'
 .*:172: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `daddu\.e \$29,\$29,0'
 .*:174: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `ld\.e \$16,0\(\$pc\)'
-.*:175: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `ld\.e \$16,\.-3'
+.*:175: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `ld\.e \$16,\. ?- ?3'
 .*:176: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `daddiu\.e \$16,0'
 .*:177: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `daddu\.e \$16,0'
 .*:179: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `daddiu\.e \$16,\$pc,0'
 .*:180: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `daddu\.e \$16,\$pc,0'
-.*:181: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dla\.e \$16,\.-1'
+.*:181: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dla\.e \$16,\. ?- ?1'
 .*:182: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `daddiu\.e \$16,\$sp,0'
 .*:183: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `daddu\.e \$16,\$sp,0'
 .*:10: Warning: extended operand requested but not required
diff --git a/gas/testsuite/gas/mips/mips16e2-32@mips16-insn-t.l b/gas/testsuite/gas/mips/mips16e2-32@mips16-insn-t.l
index 0fd848d..57a6e3b 100644
--- a/gas/testsuite/gas/mips/mips16e2-32@mips16-insn-t.l
+++ b/gas/testsuite/gas/mips/mips16e2-32@mips16-insn-t.l
@@ -33,11 +33,11 @@
 .*:171: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `daddu\.t \$29,0'
 .*:172: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `daddu\.t \$29,\$29,0'
 .*:174: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `ld\.t \$16,0\(\$pc\)'
-.*:175: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `ld\.t \$16,\.-3'
+.*:175: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `ld\.t \$16,\. ?- ?3'
 .*:176: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `daddiu\.t \$16,0'
 .*:177: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `daddu\.t \$16,0'
 .*:179: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `daddiu\.t \$16,\$pc,0'
 .*:180: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `daddu\.t \$16,\$pc,0'
-.*:181: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dla\.t \$16,\.-1'
+.*:181: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dla\.t \$16,\. ?- ?1'
 .*:182: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `daddiu\.t \$16,\$sp,0'
 .*:183: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `daddu\.t \$16,\$sp,0'
diff --git a/gas/testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16-insn-e.l b/gas/testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16-insn-e.l
index a0c55df..af9c563 100644
--- a/gas/testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16-insn-e.l
+++ b/gas/testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16-insn-e.l
@@ -115,12 +115,12 @@
 .*:171: Error: opcode not supported on this processor: interaptiv-mr2 \(mips32r3\) `daddu\.e \$29,0'
 .*:172: Error: opcode not supported on this processor: interaptiv-mr2 \(mips32r3\) `daddu\.e \$29,\$29,0'
 .*:174: Error: opcode not supported on this processor: interaptiv-mr2 \(mips32r3\) `ld\.e \$16,0\(\$pc\)'
-.*:175: Error: opcode not supported on this processor: interaptiv-mr2 \(mips32r3\) `ld\.e \$16,\.-3'
+.*:175: Error: opcode not supported on this processor: interaptiv-mr2 \(mips32r3\) `ld\.e \$16,\. ?- ?3'
 .*:176: Error: opcode not supported on this processor: interaptiv-mr2 \(mips32r3\) `daddiu\.e \$16,0'
 .*:177: Error: opcode not supported on this processor: interaptiv-mr2 \(mips32r3\) `daddu\.e \$16,0'
 .*:179: Error: opcode not supported on this processor: interaptiv-mr2 \(mips32r3\) `daddiu\.e \$16,\$pc,0'
 .*:180: Error: opcode not supported on this processor: interaptiv-mr2 \(mips32r3\) `daddu\.e \$16,\$pc,0'
-.*:181: Error: opcode not supported on this processor: interaptiv-mr2 \(mips32r3\) `dla\.e \$16,\.-1'
+.*:181: Error: opcode not supported on this processor: interaptiv-mr2 \(mips32r3\) `dla\.e \$16,\. ?- ?1'
 .*:182: Error: opcode not supported on this processor: interaptiv-mr2 \(mips32r3\) `daddiu\.e \$16,\$sp,0'
 .*:183: Error: opcode not supported on this processor: interaptiv-mr2 \(mips32r3\) `daddu\.e \$16,\$sp,0'
 .*:10: Warning: extended operand requested but not required
diff --git a/gas/testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16-insn-t.l b/gas/testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16-insn-t.l
index 67330c5..bd449f1 100644
--- a/gas/testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16-insn-t.l
+++ b/gas/testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16-insn-t.l
@@ -33,11 +33,11 @@
 .*:171: Error: opcode not supported on this processor: interaptiv-mr2 \(mips32r3\) `daddu\.t \$29,0'
 .*:172: Error: opcode not supported on this processor: interaptiv-mr2 \(mips32r3\) `daddu\.t \$29,\$29,0'
 .*:174: Error: opcode not supported on this processor: interaptiv-mr2 \(mips32r3\) `ld\.t \$16,0\(\$pc\)'
-.*:175: Error: opcode not supported on this processor: interaptiv-mr2 \(mips32r3\) `ld\.t \$16,\.-3'
+.*:175: Error: opcode not supported on this processor: interaptiv-mr2 \(mips32r3\) `ld\.t \$16,\. ?- ?3'
 .*:176: Error: opcode not supported on this processor: interaptiv-mr2 \(mips32r3\) `daddiu\.t \$16,0'
 .*:177: Error: opcode not supported on this processor: interaptiv-mr2 \(mips32r3\) `daddu\.t \$16,0'
 .*:179: Error: opcode not supported on this processor: interaptiv-mr2 \(mips32r3\) `daddiu\.t \$16,\$pc,0'
 .*:180: Error: opcode not supported on this processor: interaptiv-mr2 \(mips32r3\) `daddu\.t \$16,\$pc,0'
-.*:181: Error: opcode not supported on this processor: interaptiv-mr2 \(mips32r3\) `dla\.t \$16,\.-1'
+.*:181: Error: opcode not supported on this processor: interaptiv-mr2 \(mips32r3\) `dla\.t \$16,\. ?- ?1'
 .*:182: Error: opcode not supported on this processor: interaptiv-mr2 \(mips32r3\) `daddiu\.t \$16,\$sp,0'
 .*:183: Error: opcode not supported on this processor: interaptiv-mr2 \(mips32r3\) `daddu\.t \$16,\$sp,0'
diff --git a/gas/testsuite/gas/mips/mips16e2@lui-2.l b/gas/testsuite/gas/mips/mips16e2@lui-2.l
index f83b9c8..033bd17 100644
--- a/gas/testsuite/gas/mips/mips16e2@lui-2.l
+++ b/gas/testsuite/gas/mips/mips16e2@lui-2.l
@@ -1,5 +1,5 @@
 .*: Assembler messages:
-.*:7: Error: operand 2 must be constant `lui \$2,bar-foo'
-.*:8: Error: operand 2 must be constant `lui \$2,baz-bar'
-.*:9: Error: operand 2 must be constant `lui \$2,foo-baz'
-.*:10: Error: operand 2 must be constant `lui \$2,bar/baz'
+.*:7: Error: operand 2 must be constant `lui \$2,bar ?- ?foo'
+.*:8: Error: operand 2 must be constant `lui \$2,baz ?- ?bar'
+.*:9: Error: operand 2 must be constant `lui \$2,foo ?- ?baz'
+.*:10: Error: operand 2 must be constant `lui \$2,bar ?/ ?baz'
diff --git a/gas/testsuite/gas/mips/mips1@div-trap.d b/gas/testsuite/gas/mips/mips1@div-trap.d
index bca128d..43f5d0d 100644
--- a/gas/testsuite/gas/mips/mips1@div-trap.d
+++ b/gas/testsuite/gas/mips/mips1@div-trap.d
@@ -1,5 +1,5 @@
 #as: -32 -trap
-#objdump: -dr --prefix-addresses
+#objdump: -drz --prefix-addresses --show-raw-insn
 #name: MIPS div with traps
 #source: div.s
 #dump: mips1@div.d
diff --git a/gas/testsuite/gas/mips/mips1@div.d b/gas/testsuite/gas/mips/mips1@div.d
index 72fd3e5..5bff140 100644
--- a/gas/testsuite/gas/mips/mips1@div.d
+++ b/gas/testsuite/gas/mips/mips1@div.d
@@ -1,5 +1,5 @@
 #as: -32
-#objdump: -dr --prefix-addresses
+#objdump: -drz --prefix-addresses --show-raw-insn
 #name: MIPS div
 #source: div.s
 
@@ -7,96 +7,104 @@
 
 .*: +file format .*mips.*
 
-Disassembly of section .text:
-0+0000 <[^>]*> div	zero,a0,a1
-0+0004 <[^>]*> bnez	a1,0+0010 <foo\+0x10>
-0+0008 <[^>]*> div	zero,a0,a1
-0+000c <[^>]*> break	(0x0,0x7|0x7)
-0+0010 <[^>]*> li	at,-1
-0+0014 <[^>]*> bne	a1,at,0+0028 <foo\+0x28>
-0+0018 <[^>]*> lui	at,0x8000
-0+001c <[^>]*> bne	a0,at,0+0028 <foo\+0x28>
-0+0020 <[^>]*> nop
-0+0024 <[^>]*> break	(0x0,0x6|0x6)
-0+0028 <[^>]*> mflo	a0
-0+002c <[^>]*> nop
-0+0030 <[^>]*> bnez	a2,0+003c <foo\+0x3c>
-0+0034 <[^>]*> div	zero,a1,a2
-0+0038 <[^>]*> break	(0x0,0x7|0x7)
-0+003c <[^>]*> li	at,-1
-0+0040 <[^>]*> bne	a2,at,0+0054 <foo\+0x54>
-0+0044 <[^>]*> lui	at,0x8000
-0+0048 <[^>]*> bne	a1,at,0+0054 <foo\+0x54>
-0+004c <[^>]*> nop
-0+0050 <[^>]*> break	(0x0,0x6|0x6)
-0+0054 <[^>]*> mflo	a0
-0+0058 <[^>]*> move	a0,a0
-0+005c <[^>]*> move	a0,a1
-0+0060 <[^>]*> neg	a0,a0
-0+0064 <[^>]*> neg	a0,a1
-0+0068 <[^>]*> li	at,2
-0+006c <[^>]*> div	zero,a0,at
-0+0070 <[^>]*> mflo	a0
-0+0074 <[^>]*> li	at,2
-0+0078 <[^>]*> nop
-0+007c <[^>]*> div	zero,a1,at
-0+0080 <[^>]*> mflo	a0
-0+0084 <[^>]*> li	at,0x8000
-0+0088 <[^>]*> nop
-0+008c <[^>]*> div	zero,a0,at
-0+0090 <[^>]*> mflo	a0
-0+0094 <[^>]*> li	at,0x8000
-0+0098 <[^>]*> nop
-0+009c <[^>]*> div	zero,a1,at
-0+00a0 <[^>]*> mflo	a0
-0+00a4 <[^>]*> li	at,-32768
-0+00a8 <[^>]*> nop
-0+00ac <[^>]*> div	zero,a0,at
-0+00b0 <[^>]*> mflo	a0
-0+00b4 <[^>]*> li	at,-32768
-0+00b8 <[^>]*> nop
-0+00bc <[^>]*> div	zero,a1,at
-0+00c0 <[^>]*> mflo	a0
-0+00c4 <[^>]*> lui	at,0x1
-0+00c8 <[^>]*> nop
-0+00cc <[^>]*> div	zero,a0,at
-0+00d0 <[^>]*> mflo	a0
-0+00d4 <[^>]*> lui	at,0x1
-0+00d8 <[^>]*> nop
-0+00dc <[^>]*> div	zero,a1,at
-0+00e0 <[^>]*> mflo	a0
-0+00e4 <[^>]*> lui	at,0x1
-0+00e8 <[^>]*> ori	at,at,0xa5a5
-0+00ec <[^>]*> div	zero,a0,at
-0+00f0 <[^>]*> mflo	a0
-0+00f4 <[^>]*> lui	at,0x1
-0+00f8 <[^>]*> ori	at,at,0xa5a5
-0+00fc <[^>]*> div	zero,a1,at
-0+0100 <[^>]*> mflo	a0
-	...
-0+010c <[^>]*> divu	zero,a0,a1
-0+0110 <[^>]*> bnez	a1,0+011c <foo\+0x11c>
-0+0114 <[^>]*> divu	zero,a0,a1
-0+0118 <[^>]*> break	(0x0,0x7|0x7)
-0+011c <[^>]*> mflo	a0
-0+0120 <[^>]*> nop
-0+0124 <[^>]*> bnez	a2,0+0130 <foo\+0x130>
-0+0128 <[^>]*> divu	zero,a1,a2
-0+012c <[^>]*> break	(0x0,0x7|0x7)
-0+0130 <[^>]*> mflo	a0
-0+0134 <[^>]*> move	a0,a0
-0+0138 <[^>]*> bnez	a2,0+0144 <foo\+0x144>
-0+013c <[^>]*> div	zero,a1,a2
-0+0140 <[^>]*> break	(0x0,0x7|0x7)
-0+0144 <[^>]*> li	at,-1
-0+0148 <[^>]*> bne	a2,at,0+015c <foo\+0x15c>
-0+014c <[^>]*> lui	at,0x8000
-0+0150 <[^>]*> bne	a1,at,0+015c <foo\+0x15c>
-0+0154 <[^>]*> nop
-0+0158 <[^>]*> break	(0x0,0x6|0x6)
-0+015c <[^>]*> mfhi	a0
-0+0160 <[^>]*> li	at,2
-0+0164 <[^>]*> nop
-0+0168 <[^>]*> divu	zero,a1,at
-0+016c <[^>]*> mfhi	a0
-	...
+Disassembly of section \.text:
+[0-9a-f]+ <[^>]*> 0085001a 	div	zero,a0,a1
+[0-9a-f]+ <[^>]*> 14a00002 	bnez	a1,[0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 0085001a 	div	zero,a0,a1
+[0-9a-f]+ <[^>]*> 0007000d 	break	0x7
+[0-9a-f]+ <[^>]*> 2401ffff 	li	at,-1
+[0-9a-f]+ <[^>]*> 14a10004 	bne	a1,at,[0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 3c018000 	lui	at,0x8000
+[0-9a-f]+ <[^>]*> 14810002 	bne	a0,at,[0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 00000000 	nop
+[0-9a-f]+ <[^>]*> 0006000d 	break	0x6
+[0-9a-f]+ <[^>]*> 00002012 	mflo	a0
+[0-9a-f]+ <[^>]*> 00000000 	nop
+[0-9a-f]+ <[^>]*> 14c00002 	bnez	a2,[0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 00a6001a 	div	zero,a1,a2
+[0-9a-f]+ <[^>]*> 0007000d 	break	0x7
+[0-9a-f]+ <[^>]*> 2401ffff 	li	at,-1
+[0-9a-f]+ <[^>]*> 14c10004 	bne	a2,at,[0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 3c018000 	lui	at,0x8000
+[0-9a-f]+ <[^>]*> 14a10002 	bne	a1,at,[0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 00000000 	nop
+[0-9a-f]+ <[^>]*> 0006000d 	break	0x6
+[0-9a-f]+ <[^>]*> 00002012 	mflo	a0
+[0-9a-f]+ <[^>]*> 00802025 	move	a0,a0
+[0-9a-f]+ <[^>]*> 00a02025 	move	a0,a1
+[0-9a-f]+ <[^>]*> 00042022 	neg	a0,a0
+[0-9a-f]+ <[^>]*> 00052022 	neg	a0,a1
+[0-9a-f]+ <[^>]*> 24010002 	li	at,2
+[0-9a-f]+ <[^>]*> 0081001a 	div	zero,a0,at
+[0-9a-f]+ <[^>]*> 00002012 	mflo	a0
+[0-9a-f]+ <[^>]*> 24010002 	li	at,2
+[0-9a-f]+ <[^>]*> 00000000 	nop
+[0-9a-f]+ <[^>]*> 00a1001a 	div	zero,a1,at
+[0-9a-f]+ <[^>]*> 00002012 	mflo	a0
+[0-9a-f]+ <[^>]*> 34018000 	li	at,0x8000
+[0-9a-f]+ <[^>]*> 00000000 	nop
+[0-9a-f]+ <[^>]*> 0081001a 	div	zero,a0,at
+[0-9a-f]+ <[^>]*> 00002012 	mflo	a0
+[0-9a-f]+ <[^>]*> 34018000 	li	at,0x8000
+[0-9a-f]+ <[^>]*> 00000000 	nop
+[0-9a-f]+ <[^>]*> 00a1001a 	div	zero,a1,at
+[0-9a-f]+ <[^>]*> 00002012 	mflo	a0
+[0-9a-f]+ <[^>]*> 24018000 	li	at,-32768
+[0-9a-f]+ <[^>]*> 00000000 	nop
+[0-9a-f]+ <[^>]*> 0081001a 	div	zero,a0,at
+[0-9a-f]+ <[^>]*> 00002012 	mflo	a0
+[0-9a-f]+ <[^>]*> 24018000 	li	at,-32768
+[0-9a-f]+ <[^>]*> 00000000 	nop
+[0-9a-f]+ <[^>]*> 00a1001a 	div	zero,a1,at
+[0-9a-f]+ <[^>]*> 00002012 	mflo	a0
+[0-9a-f]+ <[^>]*> 3c010001 	lui	at,0x1
+[0-9a-f]+ <[^>]*> 00000000 	nop
+[0-9a-f]+ <[^>]*> 0081001a 	div	zero,a0,at
+[0-9a-f]+ <[^>]*> 00002012 	mflo	a0
+[0-9a-f]+ <[^>]*> 3c010001 	lui	at,0x1
+[0-9a-f]+ <[^>]*> 00000000 	nop
+[0-9a-f]+ <[^>]*> 00a1001a 	div	zero,a1,at
+[0-9a-f]+ <[^>]*> 00002012 	mflo	a0
+[0-9a-f]+ <[^>]*> 3c010001 	lui	at,0x1
+[0-9a-f]+ <[^>]*> 3421a5a5 	ori	at,at,0xa5a5
+[0-9a-f]+ <[^>]*> 0081001a 	div	zero,a0,at
+[0-9a-f]+ <[^>]*> 00002012 	mflo	a0
+[0-9a-f]+ <[^>]*> 3c010001 	lui	at,0x1
+[0-9a-f]+ <[^>]*> 3421a5a5 	ori	at,at,0xa5a5
+[0-9a-f]+ <[^>]*> 00a1001a 	div	zero,a1,at
+[0-9a-f]+ <[^>]*> 00002012 	mflo	a0
+[0-9a-f]+ <[^>]*> 00000000 	nop
+[0-9a-f]+ <[^>]*> 00000000 	nop
+[0-9a-f]+ <[^>]*> 0085001b 	divu	zero,a0,a1
+[0-9a-f]+ <[^>]*> 14a00002 	bnez	a1,[0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 0085001b 	divu	zero,a0,a1
+[0-9a-f]+ <[^>]*> 0007000d 	break	0x7
+[0-9a-f]+ <[^>]*> 00002012 	mflo	a0
+[0-9a-f]+ <[^>]*> 00000000 	nop
+[0-9a-f]+ <[^>]*> 14c00002 	bnez	a2,[0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 00a6001b 	divu	zero,a1,a2
+[0-9a-f]+ <[^>]*> 0007000d 	break	0x7
+[0-9a-f]+ <[^>]*> 00002012 	mflo	a0
+[0-9a-f]+ <[^>]*> 00802025 	move	a0,a0
+[0-9a-f]+ <[^>]*> 14c00002 	bnez	a2,[0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 00a6001a 	div	zero,a1,a2
+[0-9a-f]+ <[^>]*> 0007000d 	break	0x7
+[0-9a-f]+ <[^>]*> 2401ffff 	li	at,-1
+[0-9a-f]+ <[^>]*> 14c10004 	bne	a2,at,[0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 3c018000 	lui	at,0x8000
+[0-9a-f]+ <[^>]*> 14a10002 	bne	a1,at,[0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 00000000 	nop
+[0-9a-f]+ <[^>]*> 0006000d 	break	0x6
+[0-9a-f]+ <[^>]*> 00002010 	mfhi	a0
+[0-9a-f]+ <[^>]*> 24010002 	li	at,2
+[0-9a-f]+ <[^>]*> 00000000 	nop
+[0-9a-f]+ <[^>]*> 00a1001b 	divu	zero,a1,at
+[0-9a-f]+ <[^>]*> 00002010 	mfhi	a0
+[0-9a-f]+ <[^>]*> 00000000 	nop
+[0-9a-f]+ <[^>]*> 00000000 	nop
+[0-9a-f]+ <[^>]*> 00000000 	nop
+[0-9a-f]+ <[^>]*> 00000000 	nop
+[0-9a-f]+ <[^>]*> 00000000 	nop
+[0-9a-f]+ <[^>]*> 00000000 	nop
+[0-9a-f]+ <[^>]*> 00000000 	nop
+[0-9a-f]+ <[^>]*> 00000000 	nop
diff --git a/gas/testsuite/gas/mips/mips2@div-trap.d b/gas/testsuite/gas/mips/mips2@div-trap.d
index f5b411c..1ecf906 100644
--- a/gas/testsuite/gas/mips/mips2@div-trap.d
+++ b/gas/testsuite/gas/mips/mips2@div-trap.d
@@ -1,5 +1,5 @@
 #as: -32 -trap
-#objdump: -drz --prefix-addresses --show-raw-insn
+#objdump: -drz --prefix-addresses --show-raw-insn --show-raw-insn
 #name: MIPS div with traps
 #source: div.s
 
diff --git a/gas/testsuite/gas/mips/mips2@div.d b/gas/testsuite/gas/mips/mips2@div.d
index f89764b..2780d2f 100644
--- a/gas/testsuite/gas/mips/mips2@div.d
+++ b/gas/testsuite/gas/mips/mips2@div.d
@@ -1,5 +1,5 @@
 #as: -32
-#objdump: -dr --prefix-addresses
+#objdump: -drz --prefix-addresses --show-raw-insn
 #name: MIPS div
 #source: div.s
 #dump: mips1@div.d
diff --git a/gas/testsuite/gas/mips/mips3@div.d b/gas/testsuite/gas/mips/mips3@div.d
index f89764b..2780d2f 100644
--- a/gas/testsuite/gas/mips/mips3@div.d
+++ b/gas/testsuite/gas/mips/mips3@div.d
@@ -1,5 +1,5 @@
 #as: -32
-#objdump: -dr --prefix-addresses
+#objdump: -drz --prefix-addresses --show-raw-insn
 #name: MIPS div
 #source: div.s
 #dump: mips1@div.d
diff --git a/gas/testsuite/gas/mips/mips3@div64-trap.d b/gas/testsuite/gas/mips/mips3@div64-trap.d
index 568fbd4..33196f38 100644
--- a/gas/testsuite/gas/mips/mips3@div64-trap.d
+++ b/gas/testsuite/gas/mips/mips3@div64-trap.d
@@ -11,8 +11,7 @@ Disassembly of section \.text:
 [0-9a-f]+ <[^>]*> 00c001f4 	teq	a2,zero,0x7
 [0-9a-f]+ <[^>]*> 00a6001e 	ddiv	zero,a1,a2
 [0-9a-f]+ <[^>]*> 2401ffff 	li	at,-1
-[0-9a-f]+ <[^>]*> 14c10003 	bne	a2,at,[0-9a-f]+ <[^>]*>
-[0-9a-f]+ <[^>]*> 24010001 	li	at,1
+[0-9a-f]+ <[^>]*> 14c10002 	bne	a2,at,[0-9a-f]+ <[^>]*>
 [0-9a-f]+ <[^>]*> 00010ffc 	dsll32	at,at,0x1f
 [0-9a-f]+ <[^>]*> 00a101b4 	teq	a1,at,0x6
 [0-9a-f]+ <[^>]*> 00002012 	mflo	a0
diff --git a/gas/testsuite/gas/mips/mips3@div64.d b/gas/testsuite/gas/mips/mips3@div64.d
index 1ca95a3..ec0f03e 100644
--- a/gas/testsuite/gas/mips/mips3@div64.d
+++ b/gas/testsuite/gas/mips/mips3@div64.d
@@ -1,5 +1,5 @@
 #as: -32
-#objdump: -dr --prefix-addresses
+#objdump: -dr --prefix-addresses --show-raw-insn
 #name: MIPS 64-bit div
 #source: div64.s
 
@@ -7,28 +7,27 @@
 
 .*: +file format .*mips.*
 
-Disassembly of section .text:
-0+0000 <[^>]*> bnez	a2,0+000c <foo\+0xc>
-0+0004 <[^>]*> ddiv	zero,a1,a2
-0+0008 <[^>]*> break	(0x0,0x7|0x7)
-0+000c <[^>]*> (daddiu	at,zero,-1|li	at,-1)
-0+0010 <[^>]*> bne	a2,at,0+0028 <foo\+0x28>
-0+0014 <[^>]*> (daddiu	at,zero,1|li	at,1)
-0+0018 <[^>]*> dsll32	at,at,0x1f
-0+001c <[^>]*> bne	a1,at,0+0028 <foo\+0x28>
-0+0020 <[^>]*> nop
-0+0024 <[^>]*> break	(0x0,0x6|0x6)
-0+0028 <[^>]*> mflo	a0
-0+002c <[^>]*> li	at,2
-0+0030 <[^>]*> nop
-0+0034 <[^>]*> ddivu	zero,a1,at
-0+0038 <[^>]*> mflo	a0
-0+003c <[^>]*> li	at,0x8000
-0+0040 <[^>]*> nop
-0+0044 <[^>]*> ddiv	zero,a1,at
-0+0048 <[^>]*> mfhi	a0
-0+004c <[^>]*> li	at,-32768
-0+0050 <[^>]*> nop
-0+0054 <[^>]*> ddivu	zero,a1,at
-0+0058 <[^>]*> mfhi	a0
-	...
+Disassembly of section \.text:
+[0-9a-f]+ <[^>]*> 14c00002 	bnez	a2,[0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 00a6001e 	ddiv	zero,a1,a2
+[0-9a-f]+ <[^>]*> 0007000d 	break	0x7
+[0-9a-f]+ <[^>]*> 2401ffff 	li	at,-1
+[0-9a-f]+ <[^>]*> 14c10004 	bne	a2,at,[0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 00010ffc 	dsll32	at,at,0x1f
+[0-9a-f]+ <[^>]*> 14a10002 	bne	a1,at,[0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 00000000 	nop
+[0-9a-f]+ <[^>]*> 0006000d 	break	0x6
+[0-9a-f]+ <[^>]*> 00002012 	mflo	a0
+[0-9a-f]+ <[^>]*> 24010002 	li	at,2
+[0-9a-f]+ <[^>]*> 00000000 	nop
+[0-9a-f]+ <[^>]*> 00a1001f 	ddivu	zero,a1,at
+[0-9a-f]+ <[^>]*> 00002012 	mflo	a0
+[0-9a-f]+ <[^>]*> 34018000 	li	at,0x8000
+[0-9a-f]+ <[^>]*> 00000000 	nop
+[0-9a-f]+ <[^>]*> 00a1001e 	ddiv	zero,a1,at
+[0-9a-f]+ <[^>]*> 00002010 	mfhi	a0
+[0-9a-f]+ <[^>]*> 24018000 	li	at,-32768
+[0-9a-f]+ <[^>]*> 00000000 	nop
+[0-9a-f]+ <[^>]*> 00a1001f 	ddivu	zero,a1,at
+[0-9a-f]+ <[^>]*> 00002010 	mfhi	a0
+	\.\.\.
diff --git a/gas/testsuite/gas/mips/mips4@div.d b/gas/testsuite/gas/mips/mips4@div.d
index f89764b..2780d2f 100644
--- a/gas/testsuite/gas/mips/mips4@div.d
+++ b/gas/testsuite/gas/mips/mips4@div.d
@@ -1,5 +1,5 @@
 #as: -32
-#objdump: -dr --prefix-addresses
+#objdump: -drz --prefix-addresses --show-raw-insn
 #name: MIPS div
 #source: div.s
 #dump: mips1@div.d
diff --git a/gas/testsuite/gas/mips/mips4@div64.d b/gas/testsuite/gas/mips/mips4@div64.d
index 9849e85..a83979a 100644
--- a/gas/testsuite/gas/mips/mips4@div64.d
+++ b/gas/testsuite/gas/mips/mips4@div64.d
@@ -1,5 +1,5 @@
 #as: -32
-#objdump: -dr --prefix-addresses
+#objdump: -dr --prefix-addresses --show-raw-insn
 #name: MIPS 64-bit div
 #source: div64.s
 #dump: mips3@div64.d
diff --git a/gas/testsuite/gas/mips/mips5@div.d b/gas/testsuite/gas/mips/mips5@div.d
index f89764b..2780d2f 100644
--- a/gas/testsuite/gas/mips/mips5@div.d
+++ b/gas/testsuite/gas/mips/mips5@div.d
@@ -1,5 +1,5 @@
 #as: -32
-#objdump: -dr --prefix-addresses
+#objdump: -drz --prefix-addresses --show-raw-insn
 #name: MIPS div
 #source: div.s
 #dump: mips1@div.d
diff --git a/gas/testsuite/gas/mips/mips5@div64.d b/gas/testsuite/gas/mips/mips5@div64.d
index 9849e85..a83979a 100644
--- a/gas/testsuite/gas/mips/mips5@div64.d
+++ b/gas/testsuite/gas/mips/mips5@div64.d
@@ -1,5 +1,5 @@
 #as: -32
-#objdump: -dr --prefix-addresses
+#objdump: -dr --prefix-addresses --show-raw-insn
 #name: MIPS 64-bit div
 #source: div64.s
 #dump: mips3@div64.d
diff --git a/gas/testsuite/gas/mips/r3000@div-trap.d b/gas/testsuite/gas/mips/r3000@div-trap.d
index bca128d..43f5d0d 100644
--- a/gas/testsuite/gas/mips/r3000@div-trap.d
+++ b/gas/testsuite/gas/mips/r3000@div-trap.d
@@ -1,5 +1,5 @@
 #as: -32 -trap
-#objdump: -dr --prefix-addresses
+#objdump: -drz --prefix-addresses --show-raw-insn
 #name: MIPS div with traps
 #source: div.s
 #dump: mips1@div.d
diff --git a/gas/testsuite/gas/mips/r3000@div.d b/gas/testsuite/gas/mips/r3000@div.d
index f89764b..2780d2f 100644
--- a/gas/testsuite/gas/mips/r3000@div.d
+++ b/gas/testsuite/gas/mips/r3000@div.d
@@ -1,5 +1,5 @@
 #as: -32
-#objdump: -dr --prefix-addresses
+#objdump: -drz --prefix-addresses --show-raw-insn
 #name: MIPS div
 #source: div.s
 #dump: mips1@div.d
diff --git a/gas/testsuite/gas/mips/r3900@div-trap.d b/gas/testsuite/gas/mips/r3900@div-trap.d
index bca128d..43f5d0d 100644
--- a/gas/testsuite/gas/mips/r3900@div-trap.d
+++ b/gas/testsuite/gas/mips/r3900@div-trap.d
@@ -1,5 +1,5 @@
 #as: -32 -trap
-#objdump: -dr --prefix-addresses
+#objdump: -drz --prefix-addresses --show-raw-insn
 #name: MIPS div with traps
 #source: div.s
 #dump: mips1@div.d
diff --git a/gas/testsuite/gas/mips/r3900@div.d b/gas/testsuite/gas/mips/r3900@div.d
index f89764b..2780d2f 100644
--- a/gas/testsuite/gas/mips/r3900@div.d
+++ b/gas/testsuite/gas/mips/r3900@div.d
@@ -1,5 +1,5 @@
 #as: -32
-#objdump: -dr --prefix-addresses
+#objdump: -drz --prefix-addresses --show-raw-insn
 #name: MIPS div
 #source: div.s
 #dump: mips1@div.d
diff --git a/gas/testsuite/gas/mips/r4000@div.d b/gas/testsuite/gas/mips/r4000@div.d
index f89764b..2780d2f 100644
--- a/gas/testsuite/gas/mips/r4000@div.d
+++ b/gas/testsuite/gas/mips/r4000@div.d
@@ -1,5 +1,5 @@
 #as: -32
-#objdump: -dr --prefix-addresses
+#objdump: -drz --prefix-addresses --show-raw-insn
 #name: MIPS div
 #source: div.s
 #dump: mips1@div.d
diff --git a/gas/testsuite/gas/mips/r4000@div64.d b/gas/testsuite/gas/mips/r4000@div64.d
index 9849e85..a83979a 100644
--- a/gas/testsuite/gas/mips/r4000@div64.d
+++ b/gas/testsuite/gas/mips/r4000@div64.d
@@ -1,5 +1,5 @@
 #as: -32
-#objdump: -dr --prefix-addresses
+#objdump: -dr --prefix-addresses --show-raw-insn
 #name: MIPS 64-bit div
 #source: div64.s
 #dump: mips3@div64.d
diff --git a/gas/testsuite/gas/mips/unaligned-branch-1.s b/gas/testsuite/gas/mips/unaligned-branch-1.s
index b99a63e..bc976a2 100644
--- a/gas/testsuite/gas/mips/unaligned-branch-1.s
+++ b/gas/testsuite/gas/mips/unaligned-branch-1.s
@@ -116,7 +116,7 @@ bar\@ :
 	.byte	0
 	.size	bar\@, . - bar\@
 	.if	\n - 1
-	obj	(\n - 1)
+	obj	\n - 1
 	.endif
 	.endm
 
@@ -127,7 +127,7 @@ bar\@ :
 	.hword	0
 	.size	bar\@, . - bar\@
 	.if	\n - 1
-	fun	(\n - 1)
+	fun	\n - 1
 	.endif
 	.endm
 
diff --git a/gas/testsuite/gas/mips/unaligned-branch-2.s b/gas/testsuite/gas/mips/unaligned-branch-2.s
index 9a60d27..2f892c7 100644
--- a/gas/testsuite/gas/mips/unaligned-branch-2.s
+++ b/gas/testsuite/gas/mips/unaligned-branch-2.s
@@ -117,7 +117,7 @@ bar\@ :
 	.byte	0
 	.size	bar\@, . - bar\@
 	.if	\n - 1
-	obj	(\n - 1)
+	obj	\n - 1
 	.endif
 	.endm
 
@@ -129,7 +129,7 @@ bar\@ :
 	.hword	0
 	.size	bar\@, . - bar\@
 	.if	\n - 1
-	fun	(\n - 1)
+	fun	\n - 1
 	.endif
 	.endm
 
diff --git a/gas/testsuite/gas/mips/unaligned-branch-micromips-1.s b/gas/testsuite/gas/mips/unaligned-branch-micromips-1.s
index ada5283..bec74ed 100644
--- a/gas/testsuite/gas/mips/unaligned-branch-micromips-1.s
+++ b/gas/testsuite/gas/mips/unaligned-branch-micromips-1.s
@@ -181,7 +181,7 @@ bar\@ :
 	.byte	0
 	.size	bar\@, . - bar\@
 	.if	\n - 1
-	obj	(\n - 1)
+	obj	\n - 1
 	.endif
 	.endm
 
@@ -192,7 +192,7 @@ bar\@ :
 	.hword	0
 	.size	bar\@, . - bar\@
 	.if	\n - 1
-	fun	(\n - 1)
+	fun	\n - 1
 	.endif
 	.endm
 
diff --git a/gas/testsuite/gas/mips/unaligned-branch-micromips-2.s b/gas/testsuite/gas/mips/unaligned-branch-micromips-2.s
index f3f3980..e65601e 100644
--- a/gas/testsuite/gas/mips/unaligned-branch-micromips-2.s
+++ b/gas/testsuite/gas/mips/unaligned-branch-micromips-2.s
@@ -182,7 +182,7 @@ bar\@ :
 	.byte	0
 	.size	bar\@, . - bar\@
 	.if	\n - 1
-	obj	(\n - 1)
+	obj	\n - 1
 	.endif
 	.endm
 
@@ -194,7 +194,7 @@ bar\@ :
 	.hword	0
 	.size	bar\@, . - bar\@
 	.if	\n - 1
-	fun	(\n - 1)
+	fun	\n - 1
 	.endif
 	.endm
 
diff --git a/gas/testsuite/gas/mips/unaligned-branch-mips16-1.s b/gas/testsuite/gas/mips/unaligned-branch-mips16-1.s
index 6bc8b29..d4fad96 100644
--- a/gas/testsuite/gas/mips/unaligned-branch-mips16-1.s
+++ b/gas/testsuite/gas/mips/unaligned-branch-mips16-1.s
@@ -85,7 +85,7 @@ bar\@ :
 	.byte	0
 	.size	bar\@, . - bar\@
 	.if	\n - 1
-	obj	(\n - 1)
+	obj	\n - 1
 	.endif
 	.endm
 
@@ -96,7 +96,7 @@ bar\@ :
 	.hword	0
 	.size	bar\@, . - bar\@
 	.if	\n - 1
-	fun	(\n - 1)
+	fun	\n - 1
 	.endif
 	.endm
 
diff --git a/gas/testsuite/gas/mips/unaligned-branch-mips16-2.s b/gas/testsuite/gas/mips/unaligned-branch-mips16-2.s
index 5476cae..0a6e553 100644
--- a/gas/testsuite/gas/mips/unaligned-branch-mips16-2.s
+++ b/gas/testsuite/gas/mips/unaligned-branch-mips16-2.s
@@ -86,7 +86,7 @@ bar\@ :
 	.byte	0
 	.size	bar\@, . - bar\@
 	.if	\n - 1
-	obj	(\n - 1)
+	obj	\n - 1
 	.endif
 	.endm
 
@@ -98,7 +98,7 @@ bar\@ :
 	.hword	0
 	.size	bar\@, . - bar\@
 	.if	\n - 1
-	fun	(\n - 1)
+	fun	\n - 1
 	.endif
 	.endm
 
diff --git a/gas/testsuite/gas/mips/unaligned-branch-r6-1.s b/gas/testsuite/gas/mips/unaligned-branch-r6-1.s
index 0e48b29..1e5960c 100644
--- a/gas/testsuite/gas/mips/unaligned-branch-r6-1.s
+++ b/gas/testsuite/gas/mips/unaligned-branch-r6-1.s
@@ -118,7 +118,7 @@ bar\@ :
 	.byte	0
 	.size	bar\@, . - bar\@
 	.if	\n - 1
-	obj	(\n - 1)
+	obj	\n - 1
 	.endif
 	.endm
 
@@ -129,7 +129,7 @@ bar\@ :
 	.hword	0
 	.size	bar\@, . - bar\@
 	.if	\n - 1
-	fun	(\n - 1)
+	fun	\n - 1
 	.endif
 	.endm
 
diff --git a/gas/testsuite/gas/mips/unaligned-branch-r6-2.s b/gas/testsuite/gas/mips/unaligned-branch-r6-2.s
index c160701..dc89ea0 100644
--- a/gas/testsuite/gas/mips/unaligned-branch-r6-2.s
+++ b/gas/testsuite/gas/mips/unaligned-branch-r6-2.s
@@ -118,7 +118,7 @@ bar\@ :
 	.byte	0
 	.size	bar\@, . - bar\@
 	.if	\n - 1
-	obj	(\n - 1)
+	obj	\n - 1
 	.endif
 	.endm
 
@@ -129,7 +129,7 @@ bar\@ :
 	.hword	0
 	.size	bar\@, . - bar\@
 	.if	\n - 1
-	fun	(\n - 1)
+	fun	\n - 1
 	.endif
 	.endm
 
diff --git a/gas/testsuite/gas/mips/unaligned-branch-r6-3.s b/gas/testsuite/gas/mips/unaligned-branch-r6-3.s
index 62adac2..beb5912 100644
--- a/gas/testsuite/gas/mips/unaligned-branch-r6-3.s
+++ b/gas/testsuite/gas/mips/unaligned-branch-r6-3.s
@@ -119,7 +119,7 @@ bar\@ :
 	.byte	0
 	.size	bar\@, . - bar\@
 	.if	\n - 1
-	obj	(\n - 1)
+	obj	\n - 1
 	.endif
 	.endm
 
@@ -131,7 +131,7 @@ bar\@ :
 	.hword	0
 	.size	bar\@, . - bar\@
 	.if	\n - 1
-	fun	(\n - 1)
+	fun	\n - 1
 	.endif
 	.endm
 
diff --git a/gas/testsuite/gas/mips/unaligned-branch-r6-4.s b/gas/testsuite/gas/mips/unaligned-branch-r6-4.s
index cb5ef69..26a905a 100644
--- a/gas/testsuite/gas/mips/unaligned-branch-r6-4.s
+++ b/gas/testsuite/gas/mips/unaligned-branch-r6-4.s
@@ -119,7 +119,7 @@ bar\@ :
 	.byte	0
 	.size	bar\@, . - bar\@
 	.if	\n - 1
-	obj	(\n - 1)
+	obj	\n - 1
 	.endif
 	.endm
 
@@ -131,7 +131,7 @@ bar\@ :
 	.hword	0
 	.size	bar\@, . - bar\@
 	.if	\n - 1
-	fun	(\n - 1)
+	fun	\n - 1
 	.endif
 	.endm
 
diff --git a/gas/testsuite/gas/mips/unaligned-jump-1.s b/gas/testsuite/gas/mips/unaligned-jump-1.s
index 13f85c7..bfdd0d3 100644
--- a/gas/testsuite/gas/mips/unaligned-jump-1.s
+++ b/gas/testsuite/gas/mips/unaligned-jump-1.s
@@ -116,7 +116,7 @@ bar\@ :
 	.byte	0
 	.size	bar\@, . - bar\@
 	.if	\n - 1
-	obj	(\n - 1)
+	obj	\n - 1
 	.endif
 	.endm
 
@@ -127,7 +127,7 @@ bar\@ :
 	.hword	0
 	.size	bar\@, . - bar\@
 	.if	\n - 1
-	fun	(\n - 1)
+	fun	\n - 1
 	.endif
 	.endm
 
diff --git a/gas/testsuite/gas/mips/unaligned-jump-2.s b/gas/testsuite/gas/mips/unaligned-jump-2.s
index b2a60ab..f6a951d 100644
--- a/gas/testsuite/gas/mips/unaligned-jump-2.s
+++ b/gas/testsuite/gas/mips/unaligned-jump-2.s
@@ -117,7 +117,7 @@ bar\@ :
 	.byte	0
 	.size	bar\@, . - bar\@
 	.if	\n - 1
-	obj	(\n - 1)
+	obj	\n - 1
 	.endif
 	.endm
 
@@ -129,7 +129,7 @@ bar\@ :
 	.hword	0
 	.size	bar\@, . - bar\@
 	.if	\n - 1
-	fun	(\n - 1)
+	fun	\n - 1
 	.endif
 	.endm
 
diff --git a/gas/testsuite/gas/mips/unaligned-jump-micromips-1.s b/gas/testsuite/gas/mips/unaligned-jump-micromips-1.s
index 4ecfc6f..07d0a58 100644
--- a/gas/testsuite/gas/mips/unaligned-jump-micromips-1.s
+++ b/gas/testsuite/gas/mips/unaligned-jump-micromips-1.s
@@ -149,7 +149,7 @@ bar\@ :
 	.byte	0
 	.size	bar\@, . - bar\@
 	.if	\n - 1
-	obj	(\n - 1)
+	obj	\n - 1
 	.endif
 	.endm
 
@@ -160,7 +160,7 @@ bar\@ :
 	.hword	0
 	.size	bar\@, . - bar\@
 	.if	\n - 1
-	fun	(\n - 1)
+	fun	\n - 1
 	.endif
 	.endm
 
diff --git a/gas/testsuite/gas/mips/unaligned-jump-micromips-2.s b/gas/testsuite/gas/mips/unaligned-jump-micromips-2.s
index 9dff6a1..9865f2e 100644
--- a/gas/testsuite/gas/mips/unaligned-jump-micromips-2.s
+++ b/gas/testsuite/gas/mips/unaligned-jump-micromips-2.s
@@ -150,7 +150,7 @@ bar\@ :
 	.byte	0
 	.size	bar\@, . - bar\@
 	.if	\n - 1
-	obj	(\n - 1)
+	obj	\n - 1
 	.endif
 	.endm
 
@@ -162,7 +162,7 @@ bar\@ :
 	.hword	0
 	.size	bar\@, . - bar\@
 	.if	\n - 1
-	fun	(\n - 1)
+	fun	\n - 1
 	.endif
 	.endm
 
diff --git a/gas/testsuite/gas/mips/unaligned-jump-mips16-1.s b/gas/testsuite/gas/mips/unaligned-jump-mips16-1.s
index bed5ded..3292640 100644
--- a/gas/testsuite/gas/mips/unaligned-jump-mips16-1.s
+++ b/gas/testsuite/gas/mips/unaligned-jump-mips16-1.s
@@ -85,7 +85,7 @@ bar\@ :
 	.byte	0
 	.size	bar\@, . - bar\@
 	.if	\n - 1
-	obj	(\n - 1)
+	obj	\n - 1
 	.endif
 	.endm
 
@@ -96,7 +96,7 @@ bar\@ :
 	.hword	0
 	.size	bar\@, . - bar\@
 	.if	\n - 1
-	fun	(\n - 1)
+	fun	\n - 1
 	.endif
 	.endm
 
diff --git a/gas/testsuite/gas/mips/unaligned-jump-mips16-2.s b/gas/testsuite/gas/mips/unaligned-jump-mips16-2.s
index d6dd5ee..c2b15aa 100644
--- a/gas/testsuite/gas/mips/unaligned-jump-mips16-2.s
+++ b/gas/testsuite/gas/mips/unaligned-jump-mips16-2.s
@@ -86,7 +86,7 @@ bar\@ :
 	.byte	0
 	.size	bar\@, . - bar\@
 	.if	\n - 1
-	obj	(\n - 1)
+	obj	\n - 1
 	.endif
 	.endm
 
@@ -98,7 +98,7 @@ bar\@ :
 	.hword	0
 	.size	bar\@, . - bar\@
 	.if	\n - 1
-	fun	(\n - 1)
+	fun	\n - 1
 	.endif
 	.endm
 
diff --git a/gas/testsuite/gas/mips/vr5400@div.d b/gas/testsuite/gas/mips/vr5400@div.d
index f89764b..2780d2f 100644
--- a/gas/testsuite/gas/mips/vr5400@div.d
+++ b/gas/testsuite/gas/mips/vr5400@div.d
@@ -1,5 +1,5 @@
 #as: -32
-#objdump: -dr --prefix-addresses
+#objdump: -drz --prefix-addresses --show-raw-insn
 #name: MIPS div
 #source: div.s
 #dump: mips1@div.d
diff --git a/gas/testsuite/gas/mips/vr5400@div64.d b/gas/testsuite/gas/mips/vr5400@div64.d
index 9849e85..a83979a 100644
--- a/gas/testsuite/gas/mips/vr5400@div64.d
+++ b/gas/testsuite/gas/mips/vr5400@div64.d
@@ -1,5 +1,5 @@
 #as: -32
-#objdump: -dr --prefix-addresses
+#objdump: -dr --prefix-addresses --show-raw-insn
 #name: MIPS 64-bit div
 #source: div64.s
 #dump: mips3@div64.d
diff --git a/gas/testsuite/gas/mmix/bspec-2.d b/gas/testsuite/gas/mmix/bspec-2.d
index 2ade9b6..02ec049 100644
--- a/gas/testsuite/gas/mmix/bspec-2.d
+++ b/gas/testsuite/gas/mmix/bspec-2.d
@@ -1,11 +1,11 @@
 #readelf: -Sr -T -x1 -x4
 There are 11 section headers, starting at offset .*:
 #...
-  \[ 4\] \.MMIX\.spec_data\.2 PROGBITS         0+  0+48
+  \[ 4\] \.MMIX\.spec_data\.2 PROGBITS         0+  [0-9a-f]+
        0+10  0+           0     0     8
   \[ 5\] \.rela\.MMIX\.spec_d RELA             0+  .*
  +0+30  0+18 +I +8 +4 +8
-  \[ 6\] \.MMIX\.spec_data\.3 PROGBITS         0+  0+58
+  \[ 6\] \.MMIX\.spec_data\.3 PROGBITS         0+  [0-9a-f]+
        0+8  0+           0     0     8
   \[ 7\] \.rela\.MMIX\.spec_d RELA             0+  .*
  +0+18 +0+18 +I +8 +6 +8
diff --git a/gas/testsuite/gas/pru/pr32073.d b/gas/testsuite/gas/pru/pr32073.d
new file mode 100644
index 0000000..ac353bd
--- /dev/null
+++ b/gas/testsuite/gas/pru/pr32073.d
@@ -0,0 +1,11 @@
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: whitespace parsing
+
+# Test the whitespace parsing
+
+.*: +file format elf32-pru
+
+Disassembly of section .text:
+0+0000 <[^>]*> 1300e2e1 	mov	r1, sp
+0+0004 <[^>]*> 1300e2e1 	mov	r1, sp
+0+0008 <[^>]*> 1300e2e1 	mov	r1, sp
diff --git a/gas/testsuite/gas/pru/pr32073.s b/gas/testsuite/gas/pru/pr32073.s
new file mode 100644
index 0000000..ebfab23
--- /dev/null
+++ b/gas/testsuite/gas/pru/pr32073.s
@@ -0,0 +1,6 @@
+# Source file used to test the whitespace parsing.
+
+foo:
+	mov	r1 /* comment */, r2	/* ... */
+	mov	r1	/* comment */, r2	/* ... */
+	mov	/* x */ r1	/* comment */ , r2	/* ... */
diff --git a/gas/testsuite/gas/riscv/csr-version-1p10.d b/gas/testsuite/gas/riscv/csr-version-1p10.d
index 5165f4b..ce28f59 100644
--- a/gas/testsuite/gas/riscv/csr-version-1p10.d
+++ b/gas/testsuite/gas/riscv/csr-version-1p10.d
@@ -645,6 +645,14 @@ Disassembly of section .text:
 [ 	]+[0-9a-f]+:[ 	]+72159073[ 	]+csrw[ 	]+mcyclecfgh,a1
 [ 	]+[0-9a-f]+:[ 	]+72202573[ 	]+csrr[ 	]+a0,minstretcfgh
 [ 	]+[0-9a-f]+:[ 	]+72259073[ 	]+csrw[ 	]+minstretcfgh,a1
+[ 	]+[0-9a-f]+:[ 	]+74102573[ 	]+csrr[ 	]+a0,mnepc
+[ 	]+[0-9a-f]+:[ 	]+74159073[ 	]+csrw[ 	]+mnepc,a1
+[ 	]+[0-9a-f]+:[ 	]+74202573[ 	]+csrr[ 	]+a0,mncause
+[ 	]+[0-9a-f]+:[ 	]+74259073[ 	]+csrw[ 	]+mncause,a1
+[ 	]+[0-9a-f]+:[ 	]+74002573[ 	]+csrr[ 	]+a0,mnscratch
+[ 	]+[0-9a-f]+:[ 	]+74059073[ 	]+csrw[ 	]+mnscratch,a1
+[ 	]+[0-9a-f]+:[ 	]+74402573[ 	]+csrr[ 	]+a0,mnstatus
+[ 	]+[0-9a-f]+:[ 	]+74459073[ 	]+csrw[ 	]+mnstatus,a1
 [ 	]+[0-9a-f]+:[ 	]+30c02573[ 	]+csrr[ 	]+a0,mstateen0
 [ 	]+[0-9a-f]+:[ 	]+30c59073[ 	]+csrw[ 	]+mstateen0,a1
 [ 	]+[0-9a-f]+:[ 	]+30d02573[ 	]+csrr[ 	]+a0,mstateen1
diff --git a/gas/testsuite/gas/riscv/csr-version-1p10.l b/gas/testsuite/gas/riscv/csr-version-1p10.l
index 17a8bb6..5f6a956 100644
--- a/gas/testsuite/gas/riscv/csr-version-1p10.l
+++ b/gas/testsuite/gas/riscv/csr-version-1p10.l
@@ -941,6 +941,22 @@
 .*Info: macro .*
 .*Warning: invalid CSR `minstretcfgh', needs `smcntrpmf' extension
 .*Info: macro .*
+.*Warning: invalid CSR `mnepc', needs `smrnmi' extension
+.*Info: macro .*
+.*Warning: invalid CSR `mnepc', needs `smrnmi' extension
+.*Info: macro .*
+.*Warning: invalid CSR `mncause', needs `smrnmi' extension
+.*Info: macro .*
+.*Warning: invalid CSR `mncause', needs `smrnmi' extension
+.*Info: macro .*
+.*Warning: invalid CSR `mnscratch', needs `smrnmi' extension
+.*Info: macro .*
+.*Warning: invalid CSR `mnscratch', needs `smrnmi' extension
+.*Info: macro .*
+.*Warning: invalid CSR `mnstatus', needs `smrnmi' extension
+.*Info: macro .*
+.*Warning: invalid CSR `mnstatus', needs `smrnmi' extension
+.*Info: macro .*
 .*Warning: invalid CSR `mstateen0', needs `smstateen' extension
 .*Info: macro .*
 .*Warning: invalid CSR `mstateen0', needs `smstateen' extension
diff --git a/gas/testsuite/gas/riscv/csr-version-1p11.d b/gas/testsuite/gas/riscv/csr-version-1p11.d
index 1cb5a91..7bbcf33 100644
--- a/gas/testsuite/gas/riscv/csr-version-1p11.d
+++ b/gas/testsuite/gas/riscv/csr-version-1p11.d
@@ -645,6 +645,14 @@ Disassembly of section .text:
 [ 	]+[0-9a-f]+:[ 	]+72159073[ 	]+csrw[ 	]+mcyclecfgh,a1
 [ 	]+[0-9a-f]+:[ 	]+72202573[ 	]+csrr[ 	]+a0,minstretcfgh
 [ 	]+[0-9a-f]+:[ 	]+72259073[ 	]+csrw[ 	]+minstretcfgh,a1
+[ 	]+[0-9a-f]+:[ 	]+74102573[ 	]+csrr[ 	]+a0,mnepc
+[ 	]+[0-9a-f]+:[ 	]+74159073[ 	]+csrw[ 	]+mnepc,a1
+[ 	]+[0-9a-f]+:[ 	]+74202573[ 	]+csrr[ 	]+a0,mncause
+[ 	]+[0-9a-f]+:[ 	]+74259073[ 	]+csrw[ 	]+mncause,a1
+[ 	]+[0-9a-f]+:[ 	]+74002573[ 	]+csrr[ 	]+a0,mnscratch
+[ 	]+[0-9a-f]+:[ 	]+74059073[ 	]+csrw[ 	]+mnscratch,a1
+[ 	]+[0-9a-f]+:[ 	]+74402573[ 	]+csrr[ 	]+a0,mnstatus
+[ 	]+[0-9a-f]+:[ 	]+74459073[ 	]+csrw[ 	]+mnstatus,a1
 [ 	]+[0-9a-f]+:[ 	]+30c02573[ 	]+csrr[ 	]+a0,mstateen0
 [ 	]+[0-9a-f]+:[ 	]+30c59073[ 	]+csrw[ 	]+mstateen0,a1
 [ 	]+[0-9a-f]+:[ 	]+30d02573[ 	]+csrr[ 	]+a0,mstateen1
diff --git a/gas/testsuite/gas/riscv/csr-version-1p11.l b/gas/testsuite/gas/riscv/csr-version-1p11.l
index 8b797e8..412271c 100644
--- a/gas/testsuite/gas/riscv/csr-version-1p11.l
+++ b/gas/testsuite/gas/riscv/csr-version-1p11.l
@@ -937,6 +937,22 @@
 .*Info: macro .*
 .*Warning: invalid CSR `minstretcfgh', needs `smcntrpmf' extension
 .*Info: macro .*
+.*Warning: invalid CSR `mnepc', needs `smrnmi' extension
+.*Info: macro .*
+.*Warning: invalid CSR `mnepc', needs `smrnmi' extension
+.*Info: macro .*
+.*Warning: invalid CSR `mncause', needs `smrnmi' extension
+.*Info: macro .*
+.*Warning: invalid CSR `mncause', needs `smrnmi' extension
+.*Info: macro .*
+.*Warning: invalid CSR `mnscratch', needs `smrnmi' extension
+.*Info: macro .*
+.*Warning: invalid CSR `mnscratch', needs `smrnmi' extension
+.*Info: macro .*
+.*Warning: invalid CSR `mnstatus', needs `smrnmi' extension
+.*Info: macro .*
+.*Warning: invalid CSR `mnstatus', needs `smrnmi' extension
+.*Info: macro .*
 .*Warning: invalid CSR `mstateen0', needs `smstateen' extension
 .*Info: macro .*
 .*Warning: invalid CSR `mstateen0', needs `smstateen' extension
diff --git a/gas/testsuite/gas/riscv/csr-version-1p12.d b/gas/testsuite/gas/riscv/csr-version-1p12.d
index ac88d93..25518dc 100644
--- a/gas/testsuite/gas/riscv/csr-version-1p12.d
+++ b/gas/testsuite/gas/riscv/csr-version-1p12.d
@@ -645,6 +645,14 @@ Disassembly of section .text:
 [ 	]+[0-9a-f]+:[ 	]+72159073[ 	]+csrw[ 	]+mcyclecfgh,a1
 [ 	]+[0-9a-f]+:[ 	]+72202573[ 	]+csrr[ 	]+a0,minstretcfgh
 [ 	]+[0-9a-f]+:[ 	]+72259073[ 	]+csrw[ 	]+minstretcfgh,a1
+[ 	]+[0-9a-f]+:[ 	]+74102573[ 	]+csrr[ 	]+a0,mnepc
+[ 	]+[0-9a-f]+:[ 	]+74159073[ 	]+csrw[ 	]+mnepc,a1
+[ 	]+[0-9a-f]+:[ 	]+74202573[ 	]+csrr[ 	]+a0,mncause
+[ 	]+[0-9a-f]+:[ 	]+74259073[ 	]+csrw[ 	]+mncause,a1
+[ 	]+[0-9a-f]+:[ 	]+74002573[ 	]+csrr[ 	]+a0,mnscratch
+[ 	]+[0-9a-f]+:[ 	]+74059073[ 	]+csrw[ 	]+mnscratch,a1
+[ 	]+[0-9a-f]+:[ 	]+74402573[ 	]+csrr[ 	]+a0,mnstatus
+[ 	]+[0-9a-f]+:[ 	]+74459073[ 	]+csrw[ 	]+mnstatus,a1
 [ 	]+[0-9a-f]+:[ 	]+30c02573[ 	]+csrr[ 	]+a0,mstateen0
 [ 	]+[0-9a-f]+:[ 	]+30c59073[ 	]+csrw[ 	]+mstateen0,a1
 [ 	]+[0-9a-f]+:[ 	]+30d02573[ 	]+csrr[ 	]+a0,mstateen1
diff --git a/gas/testsuite/gas/riscv/csr-version-1p12.l b/gas/testsuite/gas/riscv/csr-version-1p12.l
index 81a7aba..4848a68 100644
--- a/gas/testsuite/gas/riscv/csr-version-1p12.l
+++ b/gas/testsuite/gas/riscv/csr-version-1p12.l
@@ -661,6 +661,22 @@
 .*Info: macro .*
 .*Warning: invalid CSR `minstretcfgh', needs `smcntrpmf' extension
 .*Info: macro .*
+.*Warning: invalid CSR `mnepc', needs `smrnmi' extension
+.*Info: macro .*
+.*Warning: invalid CSR `mnepc', needs `smrnmi' extension
+.*Info: macro .*
+.*Warning: invalid CSR `mncause', needs `smrnmi' extension
+.*Info: macro .*
+.*Warning: invalid CSR `mncause', needs `smrnmi' extension
+.*Info: macro .*
+.*Warning: invalid CSR `mnscratch', needs `smrnmi' extension
+.*Info: macro .*
+.*Warning: invalid CSR `mnscratch', needs `smrnmi' extension
+.*Info: macro .*
+.*Warning: invalid CSR `mnstatus', needs `smrnmi' extension
+.*Info: macro .*
+.*Warning: invalid CSR `mnstatus', needs `smrnmi' extension
+.*Info: macro .*
 .*Warning: invalid CSR `mstateen0', needs `smstateen' extension
 .*Info: macro .*
 .*Warning: invalid CSR `mstateen0', needs `smstateen' extension
diff --git a/gas/testsuite/gas/riscv/csr.s b/gas/testsuite/gas/riscv/csr.s
index 378caef..8378e14 100644
--- a/gas/testsuite/gas/riscv/csr.s
+++ b/gas/testsuite/gas/riscv/csr.s
@@ -365,6 +365,12 @@
 	csr mcyclecfgh
 	csr minstretcfgh
 
+	# smrnmi
+	csr mnepc
+	csr mncause
+	csr mnscratch
+	csr mnstatus
+
 	# Smstateen/Ssstateen extensions
 	csr mstateen0
 	csr mstateen1
diff --git a/gas/testsuite/gas/riscv/imply.d b/gas/testsuite/gas/riscv/imply.d
index 0c726d3..26eff8c 100644
--- a/gas/testsuite/gas/riscv/imply.d
+++ b/gas/testsuite/gas/riscv/imply.d
@@ -15,8 +15,8 @@ SYMBOL TABLE:
 [0-9a-f]+ l       .text	0+000 \$xrv32i2p1_zicntr2p0_zicsr2p0
 [0-9a-f]+ l       .text	0+000 \$xrv32i2p1_zicsr2p0_zihpm2p0
 [0-9a-f]+ l       .text	0+000 \$xrv32i2p1_m2p0_zmmul1p0
-[0-9a-f]+ l       .text	0+000 \$xrv32i2p1_a2p1_zaamo1p0_zabha1p0_zalrsc1p0
-[0-9a-f]+ l       .text	0+000 \$xrv32i2p1_a2p1_zaamo1p0_zacas1p0_zalrsc1p0
+[0-9a-f]+ l       .text	0+000 \$xrv32i2p1_zaamo1p0_zabha1p0
+[0-9a-f]+ l       .text	0+000 \$xrv32i2p1_zaamo1p0_zacas1p0
 [0-9a-f]+ l       .text	0+000 \$xrv32i2p1_a2p1_zaamo1p0_zalrsc1p0
 [0-9a-f]+ l       .text	0+000 \$xrv32i2p1_zicsr2p0_zve32x1p0_zvl32b1p0_xsfvcp1p0
 [0-9a-f]+ l       .text	0+000 \$xrv32i2p1_f2p2_d2p2_v1p0_zicsr2p0_zve32f1p0_zve32x1p0_zve64d1p0_zve64f1p0_zve64x1p0_zvl128b1p0_zvl32b1p0_zvl64b1p0
@@ -44,6 +44,7 @@ SYMBOL TABLE:
 [0-9a-f]+ l       .text	0+000 \$xrv32i2p1_f2p2_d2p2_zicsr2p0_zca1p0_zcd1p0
 [0-9a-f]+ l       .text	0+000 \$xrv32i2p1_f2p2_zicsr2p0_zca1p0_zcf1p0
 [0-9a-f]+ l       .text	0+000 \$xrv32i2p1_zca1p0_zcmp1p0
+[0-9a-f]+ l       .text	0+000 \$xrv32i2p1_zca1p0_zcmop1p0
 [0-9a-f]+ l       .text	0+000 \$xrv32i2p1_h1p0_zicsr2p0_shcounterenw1p0
 [0-9a-f]+ l       .text	0+000 \$xrv32i2p1_h1p0_zicsr2p0_shgatpa1p0
 [0-9a-f]+ l       .text	0+000 \$xrv32i2p1_h1p0_zicsr2p0_shtvala1p0
diff --git a/gas/testsuite/gas/riscv/imply.s b/gas/testsuite/gas/riscv/imply.s
index 8eca66f..dabb08d 100644
--- a/gas/testsuite/gas/riscv/imply.s
+++ b/gas/testsuite/gas/riscv/imply.s
@@ -47,6 +47,7 @@ imply zcb
 imply zcd
 imply zcf
 imply zcmp
+imply zcmop
 
 imply shcounterenw
 imply shgatpa
diff --git a/gas/testsuite/gas/riscv/mapping.s b/gas/testsuite/gas/riscv/mapping.s
index 3014a69..6882a9e 100644
--- a/gas/testsuite/gas/riscv/mapping.s
+++ b/gas/testsuite/gas/riscv/mapping.s
@@ -1,7 +1,4 @@
 .attribute arch, "rv32ic"
-.option norelax			# FIXME: assembler fill the paddings after parsing everything,
-				# so we probably won't fill anything for the norelax region when
-				# the riscv_opts.relax is enabled at somewhere.
 
 .section .text.cross.section.A, "ax"
 .option push
diff --git a/gas/testsuite/gas/riscv/march-help.l b/gas/testsuite/gas/riscv/march-help.l
index 97521c7..0033592 100644
--- a/gas/testsuite/gas/riscv/march-help.l
+++ b/gas/testsuite/gas/riscv/march-help.l
@@ -25,6 +25,7 @@ All available -march extensions for RISC-V:
 	zihintntl                               1.0
 	zihintpause                             2.0
 	zihpm                                   2.0
+	zimop                                   1.0
 	zmmul                                   1.0
 	za64rs                                  1.0
 	za128rs                                 1.0
@@ -101,6 +102,7 @@ All available -march extensions for RISC-V:
 	zcb                                     1.0
 	zcf                                     1.0
 	zcd                                     1.0
+	zcmop                                   1.0
 	zcmp                                    1.0
 	shcounterenw                            1.0
 	shgatpa                                 1.0
@@ -112,6 +114,7 @@ All available -march extensions for RISC-V:
 	smcsrind                                1.0
 	smcntrpmf                               1.0
 	smepmp                                  1.0
+	smrnmi                                  1.0
 	smstateen                               1.0
 	ssaia                                   1.0
 	ssccptr                                 1.0
@@ -129,11 +132,13 @@ All available -march extensions for RISC-V:
 	svinval                                 1.0
 	svnapot                                 1.0
 	svpbmt                                  1.0
-	xcvmac                                  1.0
 	xcvalu                                  1.0
-	xcvelw                                  1.0
 	xcvbi                                   1.0
+	xcvbitmanip                             1.0
+	xcvelw                                  1.0
+	xcvmac                                  1.0
 	xcvmem                                  1.0
+	xcvsimd                                 1.0
 	xtheadba                                1.0
 	xtheadbb                                1.0
 	xtheadbs                                1.0
diff --git a/gas/testsuite/gas/riscv/odd-padding.d b/gas/testsuite/gas/riscv/odd-padding.d
new file mode 100644
index 0000000..b445a74
--- /dev/null
+++ b/gas/testsuite/gas/riscv/odd-padding.d
@@ -0,0 +1,17 @@
+#as: -mrelax
+#as: -mno-relax
+#objdump: -d
+
+.*:[ 	]+file format .*
+
+
+Disassembly of section \.text:
+
+0+000 <byte>:
+[ 	]+0:[ 	]+00000013[ 	]+nop
+[ 	]+4:[ 	]+00[ 	]+\.byte[ 	]+0x00
+#...
+[ 	]+9:[ 	]+00[ 	]+\.byte[ 	]+0x00
+[ 	]+a:[ 	]+0001[ 	]+\.insn[ 	]+2, 0x0*1
+[ 	]+c:[ 	]+00000013[ 	]+nop
+[ 	]+10:[ 	]+00008067[ 	]+ret
diff --git a/gas/testsuite/gas/riscv/odd-padding.s b/gas/testsuite/gas/riscv/odd-padding.s
new file mode 100644
index 0000000..9e434ea
--- /dev/null
+++ b/gas/testsuite/gas/riscv/odd-padding.s
@@ -0,0 +1,8 @@
+	.text

+byte:

+	nop

+	.byte 0

+	nop

+	.p2align 2

+	nop

+	ret

diff --git a/gas/testsuite/gas/riscv/option-arch-01.s b/gas/testsuite/gas/riscv/option-arch-01.s
deleted file mode 100644
index 50285fc..0000000
--- a/gas/testsuite/gas/riscv/option-arch-01.s
+++ /dev/null
@@ -1,10 +0,0 @@
-.attribute arch, "rv64ic"
-add	a0, a0, a1
-.option push
-.option arch, +d2p0, -c, +xvendor1p0
-add	a0, a0, a1
-frcsr	a0	# Should add mapping symbol with ISA here, and then dump it to frcsr.
-.option push
-.option arch, +m3p0, +d3p0
-.option pop
-.option pop
diff --git a/gas/testsuite/gas/riscv/option-arch-01a.d b/gas/testsuite/gas/riscv/option-arch-01a.d
deleted file mode 100644
index 1d14c60..0000000
--- a/gas/testsuite/gas/riscv/option-arch-01a.d
+++ /dev/null
@@ -1,14 +0,0 @@
-#as: -misa-spec=2.2
-#source: option-arch-01.s
-#objdump: -d
-
-.*:[   ]+file format .*
-
-
-Disassembly of section .text:
-
-0+000 <.text>:
-[ 	]+[0-9a-f]+:[  	]+952e[    	]+add[        	]+a0,a0,a1
-[ 	]+[0-9a-f]+:[  	]+00b50533[    	]+add[        	]+a0,a0,a1
-[ 	]+[0-9a-f]+:[  	]+00302573[    	]+frcsr[        	]+a0
-#...
diff --git a/gas/testsuite/gas/riscv/option-arch-02.d b/gas/testsuite/gas/riscv/option-arch-02.d
deleted file mode 100644
index 3c27419..0000000
--- a/gas/testsuite/gas/riscv/option-arch-02.d
+++ /dev/null
@@ -1,8 +0,0 @@
-#as: -misa-spec=2.2
-#readelf: -A
-#source: option-arch-02.s
-
-Attribute Section: riscv
-File Attributes
-  Tag_RISCV_arch: "rv64i2p0_m3p0_f2p0_d3p0_c2p0_zmmul1p0_xvendor32x3p0"
-#...
diff --git a/gas/testsuite/gas/riscv/option-arch-02.s b/gas/testsuite/gas/riscv/option-arch-02.s
deleted file mode 100644
index e0f5de3..0000000
--- a/gas/testsuite/gas/riscv/option-arch-02.s
+++ /dev/null
@@ -1,8 +0,0 @@
-.attribute arch, "rv64ic"
-add	a0, a0, a1
-.option push
-.option arch, +d2p0, -c, +xvendor1p0
-add	a0, a0, a1
-frcsr	a0
-.option pop
-.option arch, +m3p0, +d3p0, +xvendor32x3p0
diff --git a/gas/testsuite/gas/riscv/option-arch-03.d b/gas/testsuite/gas/riscv/option-arch-03.d
deleted file mode 100644
index 62d7f7d..0000000
--- a/gas/testsuite/gas/riscv/option-arch-03.d
+++ /dev/null
@@ -1,8 +0,0 @@
-#as:
-#readelf: -A
-#source: option-arch-03.s
-
-Attribute Section: riscv
-File Attributes
-  Tag_RISCV_arch: "rv32i2p1_c2p0"
-#...
diff --git a/gas/testsuite/gas/riscv/option-arch-03.s b/gas/testsuite/gas/riscv/option-arch-03.s
deleted file mode 100644
index ccdb1c3..0000000
--- a/gas/testsuite/gas/riscv/option-arch-03.s
+++ /dev/null
@@ -1,3 +0,0 @@
-.attribute arch, "rv64ic"
-.option arch, +d2p0, -c
-.option arch, rv32i2p1c2p0
diff --git a/gas/testsuite/gas/riscv/option-arch-01b.d b/gas/testsuite/gas/riscv/option-arch-attr.d
index 8f4284d..8c1f665 100644
--- a/gas/testsuite/gas/riscv/option-arch-01b.d
+++ b/gas/testsuite/gas/riscv/option-arch-attr.d
@@ -1,8 +1,7 @@
 #as: -misa-spec=2.2
+#source: option-arch.s
 #readelf: -A
-#source: option-arch-01.s
 
 Attribute Section: riscv
 File Attributes
   Tag_RISCV_arch: "rv64i2p0_c2p0"
-#...
diff --git a/gas/testsuite/gas/riscv/option-arch-dis.d b/gas/testsuite/gas/riscv/option-arch-dis.d
new file mode 100644
index 0000000..6768fe7
--- /dev/null
+++ b/gas/testsuite/gas/riscv/option-arch-dis.d
@@ -0,0 +1,26 @@
+#as: -misa-spec=2.2
+#source: option-arch.s
+#objdump: -d --syms --special-syms
+
+.*:[   ]+file format .*
+
+SYMBOL TABLE:
+0+00 l    d  .text	0+00 .text
+0+00 l    d  .data	0+00 .data
+0+00 l    d  .bss	0+00 .bss
+0+00 l       .text	0+00 \$xrv64i2p0_c2p0
+0+02 l       .text	0+00 \$xrv64i2p0_f2p0_d2p0_xvendor1p0
+0+0a l       .text	0+00 \$xrv64i2p0_m3p0_f2p0_d3p0_c2p0_zmmul1p0_xvendor32x3p0
+0+0c l       .text	0+00 \$xrv32i2p1_c2p0
+0+00 l    d  .riscv.attributes	0+00 .riscv.attributes
+
+
+Disassembly of section .text:
+
+0+000 <.text>:
+[ 	]+0:[  	]+952e[    	]+add[        	]+a0,a0,a1
+[ 	]+2:[  	]+00b50533[    	]+add[        	]+a0,a0,a1
+[ 	]+6:[  	]+00302573[    	]+frcsr[        	]+a0
+[ 	]+a:[  	]+952e[    	]+add[        	]+a0,a0,a1
+[ 	]+c:[  	]+c8002573[    	]+.insn[ 	]+4, 0xc8002573
+#...
diff --git a/gas/testsuite/gas/riscv/option-arch.s b/gas/testsuite/gas/riscv/option-arch.s
new file mode 100644
index 0000000..4d2d261
--- /dev/null
+++ b/gas/testsuite/gas/riscv/option-arch.s
@@ -0,0 +1,11 @@
+.attribute arch, "rv64ic"	# file-level, rv64ic
+add	a0, a0, a1
+.option push
+.option arch, +d2p0, -c, +xvendor1p0
+add	a0, a0, a1		# func-level, rv64i_d2p0_xvendor1p0
+frcsr	a0
+.option pop
+.option arch, +m3p0, +d3p0, +xvendor32x3p0
+add a0, a0, a1			# func-level, rv64i_m3p0_d3p0_c_xvendor32x3p0
+.option arch, rv32i2p1c2p0	# FIXME: maybe we should adjust xlen in dis-assembler according to mappin symbols?
+rdcycleh a0			# func-level, rv32i2p1_c2p0
diff --git a/gas/testsuite/gas/riscv/relax-align-2.d b/gas/testsuite/gas/riscv/relax-align-2.d
new file mode 100644
index 0000000..36ab78e
--- /dev/null
+++ b/gas/testsuite/gas/riscv/relax-align-2.d
@@ -0,0 +1,52 @@
+#as: -mrelax
+#objdump: -drw
+
+.*:[ 	]+file format .*
+
+
+Disassembly of section .text:
+
+0+000 <rvc_func>:
+[ 	]+0:[ 	]+8082[ 	]+ret
+[ 	]+2:[ 	]+0001[ 	]+nop
+[ 	]+4:[ 	]+00000013[ 	]+nop[ 	]+4: R_RISCV_ALIGN[ 	]+\*ABS\*\+0x4
+
+0+008 <non_rvc_func>:
+[ 	]+8:[ 	]+00008067[ 	]+ret
+
+0+00c <insn>:
+[ 	]+c:[ 	]+00000013[ 	]+nop
+[ 	]+10:[ 	]+0000[ 	]+\.insn	2, 0x0+
+[ 	]+12:[ 	]+0001[ 	]+\.insn	2, 0x0*1
+[ 	]+14:[ 	]+00000013[ 	]+nop[ 	]+14: R_RISCV_ALIGN[ 	]+\*ABS\*\+0x4
+[ 	]+18:[ 	]+00008067[ 	]+ret
+
+0+001c <hword>:
+[ 	]+1c:[ 	]+00000013[ 	]+nop
+[ 	]+20:[ 	]+0000[ 	]+\.short	0x0+
+[ 	]+22:[ 	]+0001[ 	]+\.insn	2, 0x0*1
+[ 	]+24:[ 	]+00000013[ 	]+nop[ 	]+24: R_RISCV_ALIGN[ 	]+\*ABS\*\+0x4
+[ 	]+28:[ 	]+00008067[ 	]+ret
+
+0+002c <byte>:
+[ 	]+2c:[ 	]+00000013[ 	]+nop
+[ 	]+30:[ 	]+00[ 	]+\.byte	0x0+
+[ 	]+31:[ 	]+00[ 	]+\.byte	0x0+
+[ 	]+32:[ 	]+0001[ 	]+\.insn	2, 0x0*1
+[ 	]+34:[ 	]+00000013[ 	]+nop[ 	]+34: R_RISCV_ALIGN[ 	]+\*ABS\*\+0x4
+[ 	]+38:[ 	]+00008067[ 	]+ret
+[ 	]+3c:[ 	]+00000013[ 	]+nop[ 	]+3c: R_RISCV_ALIGN[ 	]+\*ABS\*\+0x4
+
+0+0040 <func1>:
+[ 	]+40:[ 	]+00000013[ 	]+nop
+[ 	]+44:[ 	]+00008067[ 	]+ret
+
+0+0048 <func2>:
+[ 	]+48:[ 	]+8082[ 	]+ret
+[ 	]+4a:[ 	]+0001[ 	]+nop
+[ 	]+4c:[ 	]+00000013[ 	]+nop[ 	]+4c: R_RISCV_ALIGN[ 	]+\*ABS\*\+0x4
+
+0+0050 <func3>:
+[ 	]+50:[ 	]+00000013[ 	]+nop
+[ 	]+54:[ 	]+00008067[ 	]+ret
+#pass
diff --git a/gas/testsuite/gas/riscv/relax-align-2.s b/gas/testsuite/gas/riscv/relax-align-2.s
new file mode 100644
index 0000000..69c6128
--- /dev/null
+++ b/gas/testsuite/gas/riscv/relax-align-2.s
@@ -0,0 +1,50 @@
+	.text
+	.option rvc
+rvc_func:
+	ret
+
+	.option norvc
+	.p2align 3
+non_rvc_func:
+	ret
+
+insn:
+	nop
+	.insn 0
+	.p2align 3
+	ret
+
+hword:
+	nop
+	.hword 0
+	.p2align 3
+	ret
+
+byte:
+	nop
+	.byte 0
+	.p2align 3
+	ret
+
+	.p2align 3
+func1:
+	nop
+	ret
+
+	.pushsection .text1, "ax", @progbits
+	.option rvc
+	nop
+	.popsection
+
+func2:
+	ret
+
+	.pushsection .text1, "ax", @progbits
+	nop
+	.option norvc
+	.popsection
+
+	.p2align 3
+func3:
+	nop
+	ret
diff --git a/gas/testsuite/gas/riscv/relax-align.d b/gas/testsuite/gas/riscv/relax-align.d
new file mode 100644
index 0000000..0aed58e
--- /dev/null
+++ b/gas/testsuite/gas/riscv/relax-align.d
@@ -0,0 +1,34 @@
+#as: -mrelax
+#objdump: -dr
+
+.*:[ 	]+file format .*
+
+
+Disassembly of section .text:
+
+0+000 <rvc_func>:
+[ 	]+0:[ 	]+8082[ 	]+ret
+[ 	]+2:[ 	]+0001[ 	]+nop
+
+0+004 <non_rvc_func>:
+[ 	]+4:[ 	]+00008067[ 	]+ret
+
+0+008 <insn>:
+[ 	]+8:[ 	]+00000013[ 	]+nop
+[ 	]+c:[ 	]+0000[ 	]+\.insn	2, 0x0+
+[ 	]+e:[ 	]+0001[ 	]+\.insn	2, 0x0*1
+[ 	]+10:[ 	]+00008067[ 	]+ret
+
+0+0014 <hword>:
+[ 	]+14:[ 	]+00000013[ 	]+nop
+[ 	]+18:[ 	]+0000[ 	]+\.short	0x0+
+[ 	]+1a:[ 	]+0001[ 	]+\.insn	2, 0x0*1
+[ 	]+1c:[ 	]+00008067[ 	]+ret
+
+0+0020 <byte>:
+[ 	]+20:[ 	]+00000013[ 	]+nop
+[ 	]+24:[ 	]+00[ 	]+\.byte	0x0+
+[ 	]+25:[ 	]+00[ 	]+\.byte	0x0+
+[ 	]+26:[ 	]+0001[ 	]+\.insn	2, 0x0*1
+[ 	]+28:[ 	]+00008067[ 	]+ret
+#pass
diff --git a/gas/testsuite/gas/riscv/relax-align.s b/gas/testsuite/gas/riscv/relax-align.s
new file mode 100644
index 0000000..54db102
--- /dev/null
+++ b/gas/testsuite/gas/riscv/relax-align.s
@@ -0,0 +1,27 @@
+	.text
+	.option rvc
+rvc_func:
+	ret
+
+	.option norvc
+	.p2align 2
+non_rvc_func:
+	ret
+
+insn:
+	nop
+	.insn 0
+	.p2align 2
+	ret
+
+hword:
+	nop
+	.hword 0
+	.p2align 2
+	ret
+
+byte:
+	nop
+	.byte 0
+	.p2align 2
+	ret
diff --git a/gas/testsuite/gas/riscv/x-cv-bitmanip-fail.d b/gas/testsuite/gas/riscv/x-cv-bitmanip-fail.d
new file mode 100644
index 0000000..a1611e7
--- /dev/null
+++ b/gas/testsuite/gas/riscv/x-cv-bitmanip-fail.d
@@ -0,0 +1,3 @@
+#as: -march=rv32i_xcvbitmanip
+#source: x-cv-bitmanip-fail.s
+#error_output: x-cv-bitmanip-fail.l
diff --git a/gas/testsuite/gas/riscv/x-cv-bitmanip-fail.l b/gas/testsuite/gas/riscv/x-cv-bitmanip-fail.l
new file mode 100644
index 0000000..67bb7d3
--- /dev/null
+++ b/gas/testsuite/gas/riscv/x-cv-bitmanip-fail.l
@@ -0,0 +1,57 @@
+.*: Assembler messages:
+.*: Error: illegal operands `cv.bclr x32,x32,20,20'
+.*: Error: illegal operands `cv.bclr x33,x33,20,20'
+.*: Error: illegal operands `cv.bclr x6,x7,0,32'
+.*: Error: illegal operands `cv.bclr x6,x7,32,0'
+.*: Error: illegal operands `cv.bclr x6,x7,0,-1'
+.*: Error: illegal operands `cv.bclr x6,x7,-1,0'
+.*: Error: illegal operands `cv.bclrr x32,x32,x32'
+.*: Error: illegal operands `cv.bclrr x33,x33,x33'
+.*: Error: illegal operands `cv.bitrev x32,x32,2,20'
+.*: Error: illegal operands `cv.bitrev x33,x33,2,20'
+.*: Error: illegal operands `cv.bitrev x6,x7,-1,0'
+.*: Error: illegal operands `cv.bitrev x6,x7,0,-1'
+.*: Error: illegal operands `cv.bitrev x6,x7,0,32'
+.*: Error: illegal operands `cv.bitrev x6,x7,4,0'
+.*: Error: illegal operands `cv.bset x32,x32,20,20'
+.*: Error: illegal operands `cv.bset x33,x33,20,20'
+.*: Error: illegal operands `cv.bset x6,x7,0,32'
+.*: Error: illegal operands `cv.bset x6,x7,32,0'
+.*: Error: illegal operands `cv.bset x6,x7,0,-1'
+.*: Error: illegal operands `cv.bset x6,x7,-1,0'
+.*: Error: illegal operands `cv.bsetr x32,x32,x32'
+.*: Error: illegal operands `cv.bsetr x33,x33,x33'
+.*: Error: illegal operands `cv.clb x32,x32'
+.*: Error: illegal operands `cv.clb x33,x33'
+.*: Error: illegal operands `cv.cnt x32,x32'
+.*: Error: illegal operands `cv.cnt x33,x33'
+.*: Error: illegal operands `cv.extract x32,x32,20,20'
+.*: Error: illegal operands `cv.extract x33,x33,20,20'
+.*: Error: illegal operands `cv.extract x6,x7,0,32'
+.*: Error: illegal operands `cv.extract x6,x7,32,0'
+.*: Error: illegal operands `cv.extract x6,x7,0,-1'
+.*: Error: illegal operands `cv.extract x6,x7,-1,0'
+.*: Error: illegal operands `cv.extractr x32,x32,x32'
+.*: Error: illegal operands `cv.extractr x33,x33,x33'
+.*: Error: illegal operands `cv.extractu x32,x32,20,20'
+.*: Error: illegal operands `cv.extractu x33,x33,20,20'
+.*: Error: illegal operands `cv.extractu x6,x7,0,32'
+.*: Error: illegal operands `cv.extractu x6,x7,32,0'
+.*: Error: illegal operands `cv.extractu x6,x7,0,-1'
+.*: Error: illegal operands `cv.extractu x6,x7,-1,0'
+.*: Error: illegal operands `cv.extractur x32,x32,x32'
+.*: Error: illegal operands `cv.extractur x33,x33,x33'
+.*: Error: illegal operands `cv.ff1 x32,x32'
+.*: Error: illegal operands `cv.ff1 x33,x33'
+.*: Error: illegal operands `cv.fl1 x32,x32'
+.*: Error: illegal operands `cv.fl1 x33,x33'
+.*: Error: illegal operands `cv.insert x32,x32,20,20'
+.*: Error: illegal operands `cv.insert x33,x33,20,20'
+.*: Error: illegal operands `cv.insert x6,x7,0,32'
+.*: Error: illegal operands `cv.insert x6,x7,32,0'
+.*: Error: illegal operands `cv.insert x6,x7,0,-1'
+.*: Error: illegal operands `cv.insert x6,x7,-1,0'
+.*: Error: illegal operands `cv.insertr x32,x32,x32'
+.*: Error: illegal operands `cv.insertr x33,x33,x33'
+.*: Error: illegal operands `cv.ror x32,x32,x32'
+.*: Error: illegal operands `cv.ror x33,x33,x33'
diff --git a/gas/testsuite/gas/riscv/x-cv-bitmanip-fail.s b/gas/testsuite/gas/riscv/x-cv-bitmanip-fail.s
new file mode 100644
index 0000000..031ba52
--- /dev/null
+++ b/gas/testsuite/gas/riscv/x-cv-bitmanip-fail.s
@@ -0,0 +1,56 @@
+    cv.bclr x32, x32, 20, 20
+    cv.bclr x33, x33, 20, 20
+    cv.bclr x6, x7, 0, 32
+    cv.bclr x6, x7, 32, 0
+    cv.bclr x6, x7, 0, -1
+    cv.bclr x6, x7, -1, 0
+    cv.bclrr x32, x32, x32
+    cv.bclrr x33, x33, x33
+    cv.bitrev x32, x32, 2, 20
+    cv.bitrev x33, x33, 2, 20
+    cv.bitrev x6, x7, -1, 0
+    cv.bitrev x6, x7, 0, -1
+    cv.bitrev x6, x7, 0, 32
+    cv.bitrev x6, x7, 4, 0
+    cv.bset x32, x32, 20, 20
+    cv.bset x33, x33, 20, 20
+    cv.bset x6, x7, 0, 32
+    cv.bset x6, x7, 32, 0
+    cv.bset x6, x7, 0, -1
+    cv.bset x6, x7, -1, 0
+    cv.bsetr x32, x32, x32
+    cv.bsetr x33, x33, x33
+    cv.clb x32, x32
+    cv.clb x33, x33
+    cv.cnt x32, x32
+    cv.cnt x33, x33
+    cv.extract x32, x32, 20, 20
+    cv.extract x33, x33, 20, 20
+    cv.extract x6, x7, 0, 32
+    cv.extract x6, x7, 32, 0
+    cv.extract x6, x7, 0, -1
+    cv.extract x6, x7, -1, 0
+    cv.extractr x32, x32, x32
+    cv.extractr x33, x33, x33
+    cv.extractu x32, x32, 20, 20
+    cv.extractu x33, x33, 20, 20
+    cv.extractu x6, x7, 0, 32
+    cv.extractu x6, x7, 32, 0
+    cv.extractu x6, x7, 0, -1
+    cv.extractu x6, x7, -1, 0
+    cv.extractur x32, x32, x32
+    cv.extractur x33, x33, x33
+    cv.ff1 x32, x32
+    cv.ff1 x33, x33
+    cv.fl1 x32, x32
+    cv.fl1 x33, x33
+    cv.insert x32, x32, 20, 20
+    cv.insert x33, x33, 20, 20
+    cv.insert x6, x7, 0, 32
+    cv.insert x6, x7, 32, 0
+    cv.insert x6, x7, 0, -1
+    cv.insert x6, x7, -1, 0
+    cv.insertr x32, x32, x32
+    cv.insertr x33, x33, x33
+    cv.ror x32, x32, x32
+    cv.ror x33, x33, x33
diff --git a/gas/testsuite/gas/riscv/x-cv-bitmanip.d b/gas/testsuite/gas/riscv/x-cv-bitmanip.d
new file mode 100644
index 0000000..ba891af
--- /dev/null
+++ b/gas/testsuite/gas/riscv/x-cv-bitmanip.d
@@ -0,0 +1,119 @@
+#as: -march=rv32i_xcvbitmanip
+#source: x-cv-bitmanip.s
+#objdump: -d
+
+.*:[ 	]+file format .*
+
+
+Disassembly of section .text:
+
+0+000 <.text>:
+
+   0:	2940105b          	cv.bclr	zero,zero,20,20
+   4:	294090db          	cv.bclr	ra,ra,20,20
+   8:	2941115b          	cv.bclr	sp,sp,20,20
+   c:	2944145b          	cv.bclr	s0,s0,20,20
+  10:	294a1a5b          	cv.bclr	s4,s4,20,20
+  14:	294f9fdb          	cv.bclr	t6,t6,20,20
+  18:	0003935b          	cv.bclr	t1,t2,0,0
+  1c:	3ff3935b          	cv.bclr	t1,t2,31,31
+  20:	3800302b          	cv.bclrr	zero,zero,zero
+  24:	3810b0ab          	cv.bclrr	ra,ra,ra
+  28:	3821312b          	cv.bclrr	sp,sp,sp
+  2c:	3884342b          	cv.bclrr	s0,s0,s0
+  30:	394a3a2b          	cv.bclrr	s4,s4,s4
+  34:	39ffbfab          	cv.bclrr	t6,t6,t6
+  38:	c540105b          	cv.bitrev	zero,zero,2,20
+  3c:	c54090db          	cv.bitrev	ra,ra,2,20
+  40:	c541115b          	cv.bitrev	sp,sp,2,20
+  44:	c544145b          	cv.bitrev	s0,s0,2,20
+  48:	c54a1a5b          	cv.bitrev	s4,s4,2,20
+  4c:	c54f9fdb          	cv.bitrev	t6,t6,2,20
+  50:	c003935b          	cv.bitrev	t1,t2,0,0
+  54:	c7f3935b          	cv.bitrev	t1,t2,3,31
+  58:	6940105b          	cv.bset	zero,zero,20,20
+  5c:	694090db          	cv.bset	ra,ra,20,20
+  60:	6941115b          	cv.bset	sp,sp,20,20
+  64:	6944145b          	cv.bset	s0,s0,20,20
+  68:	694a1a5b          	cv.bset	s4,s4,20,20
+  6c:	694f9fdb          	cv.bset	t6,t6,20,20
+  70:	4003935b          	cv.bset	t1,t2,0,0
+  74:	7ff3935b          	cv.bset	t1,t2,31,31
+  78:	3a00302b          	cv.bsetr	zero,zero,zero
+  7c:	3a10b0ab          	cv.bsetr	ra,ra,ra
+  80:	3a21312b          	cv.bsetr	sp,sp,sp
+  84:	3a84342b          	cv.bsetr	s0,s0,s0
+  88:	3b4a3a2b          	cv.bsetr	s4,s4,s4
+  8c:	3bffbfab          	cv.bsetr	t6,t6,t6
+  90:	4600302b          	cv.clb	zero,zero
+  94:	4600b0ab          	cv.clb	ra,ra
+  98:	4601312b          	cv.clb	sp,sp
+  9c:	4604342b          	cv.clb	s0,s0
+  a0:	460a3a2b          	cv.clb	s4,s4
+  a4:	460fbfab          	cv.clb	t6,t6
+  a8:	4800302b          	cv.cnt	zero,zero
+  ac:	4800b0ab          	cv.cnt	ra,ra
+  b0:	4801312b          	cv.cnt	sp,sp
+  b4:	4804342b          	cv.cnt	s0,s0
+  b8:	480a3a2b          	cv.cnt	s4,s4
+  bc:	480fbfab          	cv.cnt	t6,t6
+  c0:	2940005b          	cv.extract	zero,zero,20,20
+  c4:	294080db          	cv.extract	ra,ra,20,20
+  c8:	2941015b          	cv.extract	sp,sp,20,20
+  cc:	2944045b          	cv.extract	s0,s0,20,20
+  d0:	294a0a5b          	cv.extract	s4,s4,20,20
+  d4:	294f8fdb          	cv.extract	t6,t6,20,20
+  d8:	0003835b          	cv.extract	t1,t2,0,0
+  dc:	3ff3835b          	cv.extract	t1,t2,31,31
+  e0:	3000302b          	cv.extractr	zero,zero,zero
+  e4:	3010b0ab          	cv.extractr	ra,ra,ra
+  e8:	3021312b          	cv.extractr	sp,sp,sp
+  ec:	3084342b          	cv.extractr	s0,s0,s0
+  f0:	314a3a2b          	cv.extractr	s4,s4,s4
+  f4:	31ffbfab          	cv.extractr	t6,t6,t6
+  f8:	6940005b          	cv.extractu	zero,zero,20,20
+  fc:	694080db          	cv.extractu	ra,ra,20,20
+ 100:	6941015b          	cv.extractu	sp,sp,20,20
+ 104:	6944045b          	cv.extractu	s0,s0,20,20
+ 108:	694a0a5b          	cv.extractu	s4,s4,20,20
+ 10c:	694f8fdb          	cv.extractu	t6,t6,20,20
+ 110:	4003835b          	cv.extractu	t1,t2,0,0
+ 114:	7ff3835b          	cv.extractu	t1,t2,31,31
+ 118:	3200302b          	cv.extractur	zero,zero,zero
+ 11c:	3210b0ab          	cv.extractur	ra,ra,ra
+ 120:	3221312b          	cv.extractur	sp,sp,sp
+ 124:	3284342b          	cv.extractur	s0,s0,s0
+ 128:	334a3a2b          	cv.extractur	s4,s4,s4
+ 12c:	33ffbfab          	cv.extractur	t6,t6,t6
+ 130:	4200302b          	cv.ff1	zero,zero
+ 134:	4200b0ab          	cv.ff1	ra,ra
+ 138:	4201312b          	cv.ff1	sp,sp
+ 13c:	4204342b          	cv.ff1	s0,s0
+ 140:	420a3a2b          	cv.ff1	s4,s4
+ 144:	420fbfab          	cv.ff1	t6,t6
+ 148:	4400302b          	cv.fl1	zero,zero
+ 14c:	4400b0ab          	cv.fl1	ra,ra
+ 150:	4401312b          	cv.fl1	sp,sp
+ 154:	4404342b          	cv.fl1	s0,s0
+ 158:	440a3a2b          	cv.fl1	s4,s4
+ 15c:	440fbfab          	cv.fl1	t6,t6
+ 160:	a940005b          	cv.insert	zero,zero,20,20
+ 164:	a94080db          	cv.insert	ra,ra,20,20
+ 168:	a941015b          	cv.insert	sp,sp,20,20
+ 16c:	a944045b          	cv.insert	s0,s0,20,20
+ 170:	a94a0a5b          	cv.insert	s4,s4,20,20
+ 174:	a94f8fdb          	cv.insert	t6,t6,20,20
+ 178:	8003835b          	cv.insert	t1,t2,0,0
+ 17c:	bff3835b          	cv.insert	t1,t2,31,31
+ 180:	3400302b          	cv.insertr	zero,zero,zero
+ 184:	3410b0ab          	cv.insertr	ra,ra,ra
+ 188:	3421312b          	cv.insertr	sp,sp,sp
+ 18c:	3484342b          	cv.insertr	s0,s0,s0
+ 190:	354a3a2b          	cv.insertr	s4,s4,s4
+ 194:	35ffbfab          	cv.insertr	t6,t6,t6
+ 198:	4000302b          	cv.ror	zero,zero,zero
+ 19c:	4010b0ab          	cv.ror	ra,ra,ra
+ 1a0:	4021312b          	cv.ror	sp,sp,sp
+ 1a4:	4084342b          	cv.ror	s0,s0,s0
+ 1a8:	414a3a2b          	cv.ror	s4,s4,s4
+ 1ac:	41ffbfab          	cv.ror	t6,t6,t6
diff --git a/gas/testsuite/gas/riscv/x-cv-bitmanip.s b/gas/testsuite/gas/riscv/x-cv-bitmanip.s
new file mode 100644
index 0000000..d83bec0
--- /dev/null
+++ b/gas/testsuite/gas/riscv/x-cv-bitmanip.s
@@ -0,0 +1,108 @@
+    cv.bclr x0, x0, 20, 20
+    cv.bclr x1, x1, 20, 20
+    cv.bclr x2, x2, 20, 20
+    cv.bclr x8, x8, 20, 20
+    cv.bclr x20, x20, 20, 20
+    cv.bclr x31, x31, 20, 20
+    cv.bclr x6, x7, 0, 0
+    cv.bclr x6, x7, 31, 31
+    cv.bclrr x0, x0, x0
+    cv.bclrr x1, x1, x1
+    cv.bclrr x2, x2, x2
+    cv.bclrr x8, x8, x8
+    cv.bclrr x20, x20, x20
+    cv.bclrr x31, x31, x31
+    cv.bitrev x0, x0, 2, 20
+    cv.bitrev x1, x1, 2, 20
+    cv.bitrev x2, x2, 2, 20
+    cv.bitrev x8, x8, 2, 20
+    cv.bitrev x20, x20, 2, 20
+    cv.bitrev x31, x31, 2, 20
+    cv.bitrev x6, x7, 0, 0
+    cv.bitrev x6, x7, 3, 31
+    cv.bset x0, x0, 20, 20
+    cv.bset x1, x1, 20, 20
+    cv.bset x2, x2, 20, 20
+    cv.bset x8, x8, 20, 20
+    cv.bset x20, x20, 20, 20
+    cv.bset x31, x31, 20, 20
+    cv.bset x6, x7, 0, 0
+    cv.bset x6, x7, 31, 31
+    cv.bsetr x0, x0, x0
+    cv.bsetr x1, x1, x1
+    cv.bsetr x2, x2, x2
+    cv.bsetr x8, x8, x8
+    cv.bsetr x20, x20, x20
+    cv.bsetr x31, x31, x31
+    cv.clb x0, x0
+    cv.clb x1, x1
+    cv.clb x2, x2
+    cv.clb x8, x8
+    cv.clb x20, x20
+    cv.clb x31, x31
+    cv.cnt x0, x0
+    cv.cnt x1, x1
+    cv.cnt x2, x2
+    cv.cnt x8, x8
+    cv.cnt x20, x20
+    cv.cnt x31, x31
+    cv.extract x0, x0, 20, 20
+    cv.extract x1, x1, 20, 20
+    cv.extract x2, x2, 20, 20
+    cv.extract x8, x8, 20, 20
+    cv.extract x20, x20, 20, 20
+    cv.extract x31, x31, 20, 20
+    cv.extract x6, x7, 0, 0
+    cv.extract x6, x7, 31, 31
+    cv.extractr x0, x0, x0
+    cv.extractr x1, x1, x1
+    cv.extractr x2, x2, x2
+    cv.extractr x8, x8, x8
+    cv.extractr x20, x20, x20
+    cv.extractr x31, x31, x31
+    cv.extractu x0, x0, 20, 20
+    cv.extractu x1, x1, 20, 20
+    cv.extractu x2, x2, 20, 20
+    cv.extractu x8, x8, 20, 20
+    cv.extractu x20, x20, 20, 20
+    cv.extractu x31, x31, 20, 20
+    cv.extractu x6, x7, 0, 0
+    cv.extractu x6, x7, 31, 31
+    cv.extractur x0, x0, x0
+    cv.extractur x1, x1, x1
+    cv.extractur x2, x2, x2
+    cv.extractur x8, x8, x8
+    cv.extractur x20, x20, x20
+    cv.extractur x31, x31, x31
+    cv.ff1 x0, x0
+    cv.ff1 x1, x1
+    cv.ff1 x2, x2
+    cv.ff1 x8, x8
+    cv.ff1 x20, x20
+    cv.ff1 x31, x31
+    cv.fl1 x0, x0
+    cv.fl1 x1, x1
+    cv.fl1 x2, x2
+    cv.fl1 x8, x8
+    cv.fl1 x20, x20
+    cv.fl1 x31, x31
+    cv.insert x0, x0, 20, 20
+    cv.insert x1, x1, 20, 20
+    cv.insert x2, x2, 20, 20
+    cv.insert x8, x8, 20, 20
+    cv.insert x20, x20, 20, 20
+    cv.insert x31, x31, 20, 20
+    cv.insert x6, x7, 0, 0
+    cv.insert x6, x7, 31, 31
+    cv.insertr x0, x0, x0
+    cv.insertr x1, x1, x1
+    cv.insertr x2, x2, x2
+    cv.insertr x8, x8, x8
+    cv.insertr x20, x20, x20
+    cv.insertr x31, x31, x31
+    cv.ror x0, x0, x0
+    cv.ror x1, x1, x1
+    cv.ror x2, x2, x2
+    cv.ror x8, x8, x8
+    cv.ror x20, x20, x20
+    cv.ror x31, x31, x31
diff --git a/gas/testsuite/gas/riscv/x-cv-simd-fail.d b/gas/testsuite/gas/riscv/x-cv-simd-fail.d
new file mode 100644
index 0000000..57e2f83
--- /dev/null
+++ b/gas/testsuite/gas/riscv/x-cv-simd-fail.d
@@ -0,0 +1,3 @@
+#as: -march=rv32i_xcvsimd
+#source: x-cv-simd-fail.s
+#error_output: x-cv-simd-fail.l
diff --git a/gas/testsuite/gas/riscv/x-cv-simd-fail.l b/gas/testsuite/gas/riscv/x-cv-simd-fail.l
new file mode 100644
index 0000000..c2fd00b
--- /dev/null
+++ b/gas/testsuite/gas/riscv/x-cv-simd-fail.l
@@ -0,0 +1,583 @@
+.*: Assembler messages:
+.*: Error: illegal operands `cv.abs.b x32,x32'
+.*: Error: illegal operands `cv.abs.b x33,x33'
+.*: Error: illegal operands `cv.abs.h x32,x32'
+.*: Error: illegal operands `cv.abs.h x33,x33'
+.*: Error: illegal operands `cv.add.b x32,x32,x32'
+.*: Error: illegal operands `cv.add.b x33,x33,x33'
+.*: Error: illegal operands `cv.add.div2 x32,x32,x32'
+.*: Error: illegal operands `cv.add.div2 x33,x33,x33'
+.*: Error: illegal operands `cv.add.div4 x32,x32,x32'
+.*: Error: illegal operands `cv.add.div4 x33,x33,x33'
+.*: Error: illegal operands `cv.add.div8 x32,x32,x32'
+.*: Error: illegal operands `cv.add.div8 x33,x33,x33'
+.*: Error: illegal operands `cv.add.h x32,x32,x32'
+.*: Error: illegal operands `cv.add.h x33,x33,x33'
+.*: Error: illegal operands `cv.add.sc.b x32,x32,x32'
+.*: Error: illegal operands `cv.add.sc.b x33,x33,x33'
+.*: Error: illegal operands `cv.add.sc.h x32,x32,x32'
+.*: Error: illegal operands `cv.add.sc.h x33,x33,x33'
+.*: Error: illegal operands `cv.add.sci.b x32,x32,20'
+.*: Error: illegal operands `cv.add.sci.b x33,x33,20'
+.*: Error: illegal operands `cv.add.sci.b x6,x7,-33'
+.*: Error: illegal operands `cv.add.sci.b x6,x7,32'
+.*: Error: illegal operands `cv.add.sci.h x32,x32,20'
+.*: Error: illegal operands `cv.add.sci.h x33,x33,20'
+.*: Error: illegal operands `cv.add.sci.h x6,x7,-33'
+.*: Error: illegal operands `cv.add.sci.h x6,x7,32'
+.*: Error: illegal operands `cv.and.b x32,x32,x32'
+.*: Error: illegal operands `cv.and.b x33,x33,x33'
+.*: Error: illegal operands `cv.and.h x32,x32,x32'
+.*: Error: illegal operands `cv.and.h x33,x33,x33'
+.*: Error: illegal operands `cv.and.sc.b x32,x32,x32'
+.*: Error: illegal operands `cv.and.sc.b x33,x33,x33'
+.*: Error: illegal operands `cv.and.sc.h x32,x32,x32'
+.*: Error: illegal operands `cv.and.sc.h x33,x33,x33'
+.*: Error: illegal operands `cv.and.sci.b x32,x32,20'
+.*: Error: illegal operands `cv.and.sci.b x33,x33,20'
+.*: Error: illegal operands `cv.and.sci.b x6,x7,-33'
+.*: Error: illegal operands `cv.and.sci.b x6,x7,32'
+.*: Error: illegal operands `cv.and.sci.h x32,x32,20'
+.*: Error: illegal operands `cv.and.sci.h x33,x33,20'
+.*: Error: illegal operands `cv.and.sci.h x6,x7,-33'
+.*: Error: illegal operands `cv.and.sci.h x6,x7,32'
+.*: Error: illegal operands `cv.avg.b x32,x32,x32'
+.*: Error: illegal operands `cv.avg.b x33,x33,x33'
+.*: Error: illegal operands `cv.avg.h x32,x32,x32'
+.*: Error: illegal operands `cv.avg.h x33,x33,x33'
+.*: Error: illegal operands `cv.avg.sc.b x32,x32,x32'
+.*: Error: illegal operands `cv.avg.sc.b x33,x33,x33'
+.*: Error: illegal operands `cv.avg.sc.h x32,x32,x32'
+.*: Error: illegal operands `cv.avg.sc.h x33,x33,x33'
+.*: Error: illegal operands `cv.avg.sci.b x32,x32,20'
+.*: Error: illegal operands `cv.avg.sci.b x33,x33,20'
+.*: Error: illegal operands `cv.avg.sci.b x6,x7,-33'
+.*: Error: illegal operands `cv.avg.sci.b x6,x7,32'
+.*: Error: illegal operands `cv.avg.sci.h x32,x32,20'
+.*: Error: illegal operands `cv.avg.sci.h x33,x33,20'
+.*: Error: illegal operands `cv.avg.sci.h x6,x7,-33'
+.*: Error: illegal operands `cv.avg.sci.h x6,x7,32'
+.*: Error: illegal operands `cv.avgu.b x32,x32,x32'
+.*: Error: illegal operands `cv.avgu.b x33,x33,x33'
+.*: Error: illegal operands `cv.avgu.h x32,x32,x32'
+.*: Error: illegal operands `cv.avgu.h x33,x33,x33'
+.*: Error: illegal operands `cv.avgu.sc.b x32,x32,x32'
+.*: Error: illegal operands `cv.avgu.sc.b x33,x33,x33'
+.*: Error: illegal operands `cv.avgu.sc.h x32,x32,x32'
+.*: Error: illegal operands `cv.avgu.sc.h x33,x33,x33'
+.*: Error: illegal operands `cv.avgu.sci.b x32,x32,20'
+.*: Error: illegal operands `cv.avgu.sci.b x33,x33,20'
+.*: Error: illegal operands `cv.avgu.sci.b x6,x7,-1'
+.*: Error: illegal operands `cv.avgu.sci.b x6,x7,64'
+.*: Error: illegal operands `cv.avgu.sci.h x32,x32,20'
+.*: Error: illegal operands `cv.avgu.sci.h x33,x33,20'
+.*: Error: illegal operands `cv.avgu.sci.h x6,x7,-1'
+.*: Error: illegal operands `cv.avgu.sci.h x6,x7,64'
+.*: Error: illegal operands `cv.cmpeq.b x32,x32,x32'
+.*: Error: illegal operands `cv.cmpeq.b x33,x33,x33'
+.*: Error: illegal operands `cv.cmpeq.h x32,x32,x32'
+.*: Error: illegal operands `cv.cmpeq.h x33,x33,x33'
+.*: Error: illegal operands `cv.cmpeq.sc.b x32,x32,x32'
+.*: Error: illegal operands `cv.cmpeq.sc.b x33,x33,x33'
+.*: Error: illegal operands `cv.cmpeq.sc.h x32,x32,x32'
+.*: Error: illegal operands `cv.cmpeq.sc.h x33,x33,x33'
+.*: Error: illegal operands `cv.cmpeq.sci.b x32,x32,20'
+.*: Error: illegal operands `cv.cmpeq.sci.b x33,x33,20'
+.*: Error: illegal operands `cv.cmpeq.sci.b x6,x7,-33'
+.*: Error: illegal operands `cv.cmpeq.sci.b x6,x7,32'
+.*: Error: illegal operands `cv.cmpeq.sci.h x32,x32,20'
+.*: Error: illegal operands `cv.cmpeq.sci.h x33,x33,20'
+.*: Error: illegal operands `cv.cmpeq.sci.h x6,x7,-33'
+.*: Error: illegal operands `cv.cmpeq.sci.h x6,x7,32'
+.*: Error: illegal operands `cv.cmpge.b x32,x32,x32'
+.*: Error: illegal operands `cv.cmpge.b x33,x33,x33'
+.*: Error: illegal operands `cv.cmpge.h x32,x32,x32'
+.*: Error: illegal operands `cv.cmpge.h x33,x33,x33'
+.*: Error: illegal operands `cv.cmpge.sc.b x32,x32,x32'
+.*: Error: illegal operands `cv.cmpge.sc.b x33,x33,x33'
+.*: Error: illegal operands `cv.cmpge.sc.h x32,x32,x32'
+.*: Error: illegal operands `cv.cmpge.sc.h x33,x33,x33'
+.*: Error: illegal operands `cv.cmpge.sci.b x32,x32,20'
+.*: Error: illegal operands `cv.cmpge.sci.b x33,x33,20'
+.*: Error: illegal operands `cv.cmpge.sci.b x6,x7,-33'
+.*: Error: illegal operands `cv.cmpge.sci.b x6,x7,32'
+.*: Error: illegal operands `cv.cmpge.sci.h x32,x32,20'
+.*: Error: illegal operands `cv.cmpge.sci.h x33,x33,20'
+.*: Error: illegal operands `cv.cmpge.sci.h x6,x7,-33'
+.*: Error: illegal operands `cv.cmpge.sci.h x6,x7,32'
+.*: Error: illegal operands `cv.cmpgeu.b x32,x32,x32'
+.*: Error: illegal operands `cv.cmpgeu.b x33,x33,x33'
+.*: Error: illegal operands `cv.cmpgeu.h x32,x32,x32'
+.*: Error: illegal operands `cv.cmpgeu.h x33,x33,x33'
+.*: Error: illegal operands `cv.cmpgeu.sc.b x32,x32,x32'
+.*: Error: illegal operands `cv.cmpgeu.sc.b x33,x33,x33'
+.*: Error: illegal operands `cv.cmpgeu.sc.h x32,x32,x32'
+.*: Error: illegal operands `cv.cmpgeu.sc.h x33,x33,x33'
+.*: Error: illegal operands `cv.cmpgeu.sci.b x32,x32,20'
+.*: Error: illegal operands `cv.cmpgeu.sci.b x33,x33,20'
+.*: Error: illegal operands `cv.cmpgeu.sci.b x6,x7,-1'
+.*: Error: illegal operands `cv.cmpgeu.sci.b x6,x7,64'
+.*: Error: illegal operands `cv.cmpgeu.sci.h x32,x32,20'
+.*: Error: illegal operands `cv.cmpgeu.sci.h x33,x33,20'
+.*: Error: illegal operands `cv.cmpgeu.sci.h x6,x7,-1'
+.*: Error: illegal operands `cv.cmpgeu.sci.h x6,x7,64'
+.*: Error: illegal operands `cv.cmpgt.b x32,x32,x32'
+.*: Error: illegal operands `cv.cmpgt.b x33,x33,x33'
+.*: Error: illegal operands `cv.cmpgt.h x32,x32,x32'
+.*: Error: illegal operands `cv.cmpgt.h x33,x33,x33'
+.*: Error: illegal operands `cv.cmpgt.sc.b x32,x32,x32'
+.*: Error: illegal operands `cv.cmpgt.sc.b x33,x33,x33'
+.*: Error: illegal operands `cv.cmpgt.sc.h x32,x32,x32'
+.*: Error: illegal operands `cv.cmpgt.sc.h x33,x33,x33'
+.*: Error: illegal operands `cv.cmpgt.sci.b x32,x32,20'
+.*: Error: illegal operands `cv.cmpgt.sci.b x33,x33,20'
+.*: Error: illegal operands `cv.cmpgt.sci.b x6,x7,-33'
+.*: Error: illegal operands `cv.cmpgt.sci.b x6,x7,32'
+.*: Error: illegal operands `cv.cmpgt.sci.h x32,x32,20'
+.*: Error: illegal operands `cv.cmpgt.sci.h x33,x33,20'
+.*: Error: illegal operands `cv.cmpgt.sci.h x6,x7,-33'
+.*: Error: illegal operands `cv.cmpgt.sci.h x6,x7,32'
+.*: Error: illegal operands `cv.cmpgtu.b x32,x32,x32'
+.*: Error: illegal operands `cv.cmpgtu.b x33,x33,x33'
+.*: Error: illegal operands `cv.cmpgtu.h x32,x32,x32'
+.*: Error: illegal operands `cv.cmpgtu.h x33,x33,x33'
+.*: Error: illegal operands `cv.cmpgtu.sc.b x32,x32,x32'
+.*: Error: illegal operands `cv.cmpgtu.sc.b x33,x33,x33'
+.*: Error: illegal operands `cv.cmpgtu.sc.h x32,x32,x32'
+.*: Error: illegal operands `cv.cmpgtu.sc.h x33,x33,x33'
+.*: Error: illegal operands `cv.cmpgtu.sci.b x32,x32,20'
+.*: Error: illegal operands `cv.cmpgtu.sci.b x33,x33,20'
+.*: Error: illegal operands `cv.cmpgtu.sci.b x6,x7,-1'
+.*: Error: illegal operands `cv.cmpgtu.sci.b x6,x7,64'
+.*: Error: illegal operands `cv.cmpgtu.sci.h x32,x32,20'
+.*: Error: illegal operands `cv.cmpgtu.sci.h x33,x33,20'
+.*: Error: illegal operands `cv.cmpgtu.sci.h x6,x7,-1'
+.*: Error: illegal operands `cv.cmpgtu.sci.h x6,x7,64'
+.*: Error: illegal operands `cv.cmple.b x32,x32,x32'
+.*: Error: illegal operands `cv.cmple.b x33,x33,x33'
+.*: Error: illegal operands `cv.cmple.h x32,x32,x32'
+.*: Error: illegal operands `cv.cmple.h x33,x33,x33'
+.*: Error: illegal operands `cv.cmple.sc.b x32,x32,x32'
+.*: Error: illegal operands `cv.cmple.sc.b x33,x33,x33'
+.*: Error: illegal operands `cv.cmple.sc.h x32,x32,x32'
+.*: Error: illegal operands `cv.cmple.sc.h x33,x33,x33'
+.*: Error: illegal operands `cv.cmple.sci.b x32,x32,20'
+.*: Error: illegal operands `cv.cmple.sci.b x33,x33,20'
+.*: Error: illegal operands `cv.cmple.sci.b x6,x7,-33'
+.*: Error: illegal operands `cv.cmple.sci.b x6,x7,32'
+.*: Error: illegal operands `cv.cmple.sci.h x32,x32,20'
+.*: Error: illegal operands `cv.cmple.sci.h x33,x33,20'
+.*: Error: illegal operands `cv.cmple.sci.h x6,x7,-33'
+.*: Error: illegal operands `cv.cmple.sci.h x6,x7,32'
+.*: Error: illegal operands `cv.cmpleu.b x32,x32,x32'
+.*: Error: illegal operands `cv.cmpleu.b x33,x33,x33'
+.*: Error: illegal operands `cv.cmpleu.h x32,x32,x32'
+.*: Error: illegal operands `cv.cmpleu.h x33,x33,x33'
+.*: Error: illegal operands `cv.cmpleu.sc.b x32,x32,x32'
+.*: Error: illegal operands `cv.cmpleu.sc.b x33,x33,x33'
+.*: Error: illegal operands `cv.cmpleu.sc.h x32,x32,x32'
+.*: Error: illegal operands `cv.cmpleu.sc.h x33,x33,x33'
+.*: Error: illegal operands `cv.cmpleu.sci.b x32,x32,20'
+.*: Error: illegal operands `cv.cmpleu.sci.b x33,x33,20'
+.*: Error: illegal operands `cv.cmpleu.sci.b x6,x7,-1'
+.*: Error: illegal operands `cv.cmpleu.sci.b x6,x7,64'
+.*: Error: illegal operands `cv.cmpleu.sci.h x32,x32,20'
+.*: Error: illegal operands `cv.cmpleu.sci.h x33,x33,20'
+.*: Error: illegal operands `cv.cmpleu.sci.h x6,x7,-1'
+.*: Error: illegal operands `cv.cmpleu.sci.h x6,x7,64'
+.*: Error: illegal operands `cv.cmplt.b x32,x32,x32'
+.*: Error: illegal operands `cv.cmplt.b x33,x33,x33'
+.*: Error: illegal operands `cv.cmplt.h x32,x32,x32'
+.*: Error: illegal operands `cv.cmplt.h x33,x33,x33'
+.*: Error: illegal operands `cv.cmplt.sc.b x32,x32,x32'
+.*: Error: illegal operands `cv.cmplt.sc.b x33,x33,x33'
+.*: Error: illegal operands `cv.cmplt.sc.h x32,x32,x32'
+.*: Error: illegal operands `cv.cmplt.sc.h x33,x33,x33'
+.*: Error: illegal operands `cv.cmplt.sci.b x32,x32,20'
+.*: Error: illegal operands `cv.cmplt.sci.b x33,x33,20'
+.*: Error: illegal operands `cv.cmplt.sci.b x6,x7,-33'
+.*: Error: illegal operands `cv.cmplt.sci.b x6,x7,32'
+.*: Error: illegal operands `cv.cmplt.sci.h x32,x32,20'
+.*: Error: illegal operands `cv.cmplt.sci.h x33,x33,20'
+.*: Error: illegal operands `cv.cmplt.sci.h x6,x7,-33'
+.*: Error: illegal operands `cv.cmplt.sci.h x6,x7,32'
+.*: Error: illegal operands `cv.cmpltu.b x32,x32,x32'
+.*: Error: illegal operands `cv.cmpltu.b x33,x33,x33'
+.*: Error: illegal operands `cv.cmpltu.h x32,x32,x32'
+.*: Error: illegal operands `cv.cmpltu.h x33,x33,x33'
+.*: Error: illegal operands `cv.cmpltu.sc.b x32,x32,x32'
+.*: Error: illegal operands `cv.cmpltu.sc.b x33,x33,x33'
+.*: Error: illegal operands `cv.cmpltu.sc.h x32,x32,x32'
+.*: Error: illegal operands `cv.cmpltu.sc.h x33,x33,x33'
+.*: Error: illegal operands `cv.cmpltu.sci.b x32,x32,20'
+.*: Error: illegal operands `cv.cmpltu.sci.b x33,x33,20'
+.*: Error: illegal operands `cv.cmpltu.sci.b x6,x7,-1'
+.*: Error: illegal operands `cv.cmpltu.sci.b x6,x7,64'
+.*: Error: illegal operands `cv.cmpltu.sci.h x32,x32,20'
+.*: Error: illegal operands `cv.cmpltu.sci.h x33,x33,20'
+.*: Error: illegal operands `cv.cmpltu.sci.h x6,x7,-1'
+.*: Error: illegal operands `cv.cmpltu.sci.h x6,x7,64'
+.*: Error: illegal operands `cv.cmpne.b x32,x32,x32'
+.*: Error: illegal operands `cv.cmpne.b x33,x33,x33'
+.*: Error: illegal operands `cv.cmpne.h x32,x32,x32'
+.*: Error: illegal operands `cv.cmpne.h x33,x33,x33'
+.*: Error: illegal operands `cv.cmpne.sc.b x32,x32,x32'
+.*: Error: illegal operands `cv.cmpne.sc.b x33,x33,x33'
+.*: Error: illegal operands `cv.cmpne.sc.h x32,x32,x32'
+.*: Error: illegal operands `cv.cmpne.sc.h x33,x33,x33'
+.*: Error: illegal operands `cv.cmpne.sci.b x32,x32,20'
+.*: Error: illegal operands `cv.cmpne.sci.b x33,x33,20'
+.*: Error: illegal operands `cv.cmpne.sci.b x6,x7,-33'
+.*: Error: illegal operands `cv.cmpne.sci.b x6,x7,32'
+.*: Error: illegal operands `cv.cmpne.sci.h x32,x32,20'
+.*: Error: illegal operands `cv.cmpne.sci.h x33,x33,20'
+.*: Error: illegal operands `cv.cmpne.sci.h x6,x7,-33'
+.*: Error: illegal operands `cv.cmpne.sci.h x6,x7,32'
+.*: Error: illegal operands `cv.cplxconj x32,x32'
+.*: Error: illegal operands `cv.cplxconj x33,x33'
+.*: Error: illegal operands `cv.cplxmul.i.div2 x32,x32,x32'
+.*: Error: illegal operands `cv.cplxmul.i.div2 x33,x33,x33'
+.*: Error: illegal operands `cv.cplxmul.i.div4 x32,x32,x32'
+.*: Error: illegal operands `cv.cplxmul.i.div4 x33,x33,x33'
+.*: Error: illegal operands `cv.cplxmul.i.div8 x32,x32,x32'
+.*: Error: illegal operands `cv.cplxmul.i.div8 x33,x33,x33'
+.*: Error: illegal operands `cv.cplxmul.i x32,x32,x32'
+.*: Error: illegal operands `cv.cplxmul.i x33,x33,x33'
+.*: Error: illegal operands `cv.cplxmul.r.div2 x32,x32,x32'
+.*: Error: illegal operands `cv.cplxmul.r.div2 x33,x33,x33'
+.*: Error: illegal operands `cv.cplxmul.r.div4 x32,x32,x32'
+.*: Error: illegal operands `cv.cplxmul.r.div4 x33,x33,x33'
+.*: Error: illegal operands `cv.cplxmul.r.div8 x32,x32,x32'
+.*: Error: illegal operands `cv.cplxmul.r.div8 x33,x33,x33'
+.*: Error: illegal operands `cv.cplxmul.r x32,x32,x32'
+.*: Error: illegal operands `cv.cplxmul.r x33,x33,x33'
+.*: Error: illegal operands `cv.dotsp.b x32,x32,x32'
+.*: Error: illegal operands `cv.dotsp.b x33,x33,x33'
+.*: Error: illegal operands `cv.dotsp.h x32,x32,x32'
+.*: Error: illegal operands `cv.dotsp.h x33,x33,x33'
+.*: Error: illegal operands `cv.dotsp.sc.b x32,x32,x32'
+.*: Error: illegal operands `cv.dotsp.sc.b x33,x33,x33'
+.*: Error: illegal operands `cv.dotsp.sc.h x32,x32,x32'
+.*: Error: illegal operands `cv.dotsp.sc.h x33,x33,x33'
+.*: Error: illegal operands `cv.dotsp.sci.b x32,x32,20'
+.*: Error: illegal operands `cv.dotsp.sci.b x33,x33,20'
+.*: Error: illegal operands `cv.dotsp.sci.b x6,x7,-33'
+.*: Error: illegal operands `cv.dotsp.sci.b x6,x7,32'
+.*: Error: illegal operands `cv.dotsp.sci.h x32,x32,20'
+.*: Error: illegal operands `cv.dotsp.sci.h x33,x33,20'
+.*: Error: illegal operands `cv.dotsp.sci.h x6,x7,-33'
+.*: Error: illegal operands `cv.dotsp.sci.h x6,x7,32'
+.*: Error: illegal operands `cv.dotup.b x32,x32,x32'
+.*: Error: illegal operands `cv.dotup.b x33,x33,x33'
+.*: Error: illegal operands `cv.dotup.h x32,x32,x32'
+.*: Error: illegal operands `cv.dotup.h x33,x33,x33'
+.*: Error: illegal operands `cv.dotup.sc.b x32,x32,x32'
+.*: Error: illegal operands `cv.dotup.sc.b x33,x33,x33'
+.*: Error: illegal operands `cv.dotup.sc.h x32,x32,x32'
+.*: Error: illegal operands `cv.dotup.sc.h x33,x33,x33'
+.*: Error: illegal operands `cv.dotup.sci.b x32,x32,20'
+.*: Error: illegal operands `cv.dotup.sci.b x33,x33,20'
+.*: Error: illegal operands `cv.dotup.sci.b x6,x7,-1'
+.*: Error: illegal operands `cv.dotup.sci.b x6,x7,64'
+.*: Error: illegal operands `cv.dotup.sci.h x32,x32,20'
+.*: Error: illegal operands `cv.dotup.sci.h x33,x33,20'
+.*: Error: illegal operands `cv.dotup.sci.h x6,x7,-1'
+.*: Error: illegal operands `cv.dotup.sci.h x6,x7,64'
+.*: Error: illegal operands `cv.dotusp.b x32,x32,x32'
+.*: Error: illegal operands `cv.dotusp.b x33,x33,x33'
+.*: Error: illegal operands `cv.dotusp.h x32,x32,x32'
+.*: Error: illegal operands `cv.dotusp.h x33,x33,x33'
+.*: Error: illegal operands `cv.dotusp.sc.b x32,x32,x32'
+.*: Error: illegal operands `cv.dotusp.sc.b x33,x33,x33'
+.*: Error: illegal operands `cv.dotusp.sc.h x32,x32,x32'
+.*: Error: illegal operands `cv.dotusp.sc.h x33,x33,x33'
+.*: Error: illegal operands `cv.dotusp.sci.b x32,x32,20'
+.*: Error: illegal operands `cv.dotusp.sci.b x33,x33,20'
+.*: Error: illegal operands `cv.dotusp.sci.b x6,x7,-33'
+.*: Error: illegal operands `cv.dotusp.sci.b x6,x7,32'
+.*: Error: illegal operands `cv.dotusp.sci.h x32,x32,20'
+.*: Error: illegal operands `cv.dotusp.sci.h x33,x33,20'
+.*: Error: illegal operands `cv.dotusp.sci.h x6,x7,-33'
+.*: Error: illegal operands `cv.dotusp.sci.h x6,x7,32'
+.*: Error: illegal operands `cv.extract.b x32,x32,2'
+.*: Error: illegal operands `cv.extract.b x33,x33,2'
+.*: Error: illegal operands `cv.extract.b x6,x7,-1'
+.*: Error: illegal operands `cv.extract.b x6,x7,4'
+.*: Error: illegal operands `cv.extract.h x32,x32,1'
+.*: Error: illegal operands `cv.extract.h x33,x33,1'
+.*: Error: illegal operands `cv.extract.h x6,x7,-1'
+.*: Error: illegal operands `cv.extract.h x6,x7,2'
+.*: Error: illegal operands `cv.extractu.b x32,x32,2'
+.*: Error: illegal operands `cv.extractu.b x33,x33,2'
+.*: Error: illegal operands `cv.extractu.b x6,x7,-1'
+.*: Error: illegal operands `cv.extractu.b x6,x7,4'
+.*: Error: illegal operands `cv.extractu.h x32,x32,1'
+.*: Error: illegal operands `cv.extractu.h x33,x33,1'
+.*: Error: illegal operands `cv.extractu.h x6,x7,-1'
+.*: Error: illegal operands `cv.extractu.h x6,x7,2'
+.*: Error: illegal operands `cv.insert.b x32,x32,2'
+.*: Error: illegal operands `cv.insert.b x33,x33,2'
+.*: Error: illegal operands `cv.insert.b x6,x7,-1'
+.*: Error: illegal operands `cv.insert.b x6,x7,4'
+.*: Error: illegal operands `cv.insert.h x32,x32,1'
+.*: Error: illegal operands `cv.insert.h x33,x33,1'
+.*: Error: illegal operands `cv.insert.h x6,x7,-1'
+.*: Error: illegal operands `cv.insert.h x6,x7,2'
+.*: Error: illegal operands `cv.max.b x32,x32,x32'
+.*: Error: illegal operands `cv.max.b x33,x33,x33'
+.*: Error: illegal operands `cv.max.h x32,x32,x32'
+.*: Error: illegal operands `cv.max.h x33,x33,x33'
+.*: Error: illegal operands `cv.max.sc.b x32,x32,x32'
+.*: Error: illegal operands `cv.max.sc.b x33,x33,x33'
+.*: Error: illegal operands `cv.max.sc.h x32,x32,x32'
+.*: Error: illegal operands `cv.max.sc.h x33,x33,x33'
+.*: Error: illegal operands `cv.max.sci.b x32,x32,20'
+.*: Error: illegal operands `cv.max.sci.b x33,x33,20'
+.*: Error: illegal operands `cv.max.sci.b x6,x7,-33'
+.*: Error: illegal operands `cv.max.sci.b x6,x7,32'
+.*: Error: illegal operands `cv.max.sci.h x32,x32,20'
+.*: Error: illegal operands `cv.max.sci.h x33,x33,20'
+.*: Error: illegal operands `cv.max.sci.h x6,x7,-33'
+.*: Error: illegal operands `cv.max.sci.h x6,x7,32'
+.*: Error: illegal operands `cv.maxu.b x32,x32,x32'
+.*: Error: illegal operands `cv.maxu.b x33,x33,x33'
+.*: Error: illegal operands `cv.maxu.h x32,x32,x32'
+.*: Error: illegal operands `cv.maxu.h x33,x33,x33'
+.*: Error: illegal operands `cv.maxu.sc.b x32,x32,x32'
+.*: Error: illegal operands `cv.maxu.sc.b x33,x33,x33'
+.*: Error: illegal operands `cv.maxu.sc.h x32,x32,x32'
+.*: Error: illegal operands `cv.maxu.sc.h x33,x33,x33'
+.*: Error: illegal operands `cv.maxu.sci.b x32,x32,20'
+.*: Error: illegal operands `cv.maxu.sci.b x33,x33,20'
+.*: Error: illegal operands `cv.maxu.sci.b x6,x7,-1'
+.*: Error: illegal operands `cv.maxu.sci.b x6,x7,64'
+.*: Error: illegal operands `cv.maxu.sci.h x32,x32,20'
+.*: Error: illegal operands `cv.maxu.sci.h x33,x33,20'
+.*: Error: illegal operands `cv.maxu.sci.h x6,x7,-1'
+.*: Error: illegal operands `cv.maxu.sci.h x6,x7,64'
+.*: Error: illegal operands `cv.min.b x32,x32,x32'
+.*: Error: illegal operands `cv.min.b x33,x33,x33'
+.*: Error: illegal operands `cv.min.h x32,x32,x32'
+.*: Error: illegal operands `cv.min.h x33,x33,x33'
+.*: Error: illegal operands `cv.min.sc.b x32,x32,x32'
+.*: Error: illegal operands `cv.min.sc.b x33,x33,x33'
+.*: Error: illegal operands `cv.min.sc.h x32,x32,x32'
+.*: Error: illegal operands `cv.min.sc.h x33,x33,x33'
+.*: Error: illegal operands `cv.min.sci.b x32,x32,20'
+.*: Error: illegal operands `cv.min.sci.b x33,x33,20'
+.*: Error: illegal operands `cv.min.sci.b x6,x7,-33'
+.*: Error: illegal operands `cv.min.sci.b x6,x7,32'
+.*: Error: illegal operands `cv.min.sci.h x32,x32,20'
+.*: Error: illegal operands `cv.min.sci.h x33,x33,20'
+.*: Error: illegal operands `cv.min.sci.h x6,x7,-33'
+.*: Error: illegal operands `cv.min.sci.h x6,x7,32'
+.*: Error: illegal operands `cv.minu.b x32,x32,x32'
+.*: Error: illegal operands `cv.minu.b x33,x33,x33'
+.*: Error: illegal operands `cv.minu.h x32,x32,x32'
+.*: Error: illegal operands `cv.minu.h x33,x33,x33'
+.*: Error: illegal operands `cv.minu.sc.b x32,x32,x32'
+.*: Error: illegal operands `cv.minu.sc.b x33,x33,x33'
+.*: Error: illegal operands `cv.minu.sc.h x32,x32,x32'
+.*: Error: illegal operands `cv.minu.sc.h x33,x33,x33'
+.*: Error: illegal operands `cv.minu.sci.b x32,x32,20'
+.*: Error: illegal operands `cv.minu.sci.b x33,x33,20'
+.*: Error: illegal operands `cv.minu.sci.b x6,x7,-1'
+.*: Error: illegal operands `cv.minu.sci.b x6,x7,64'
+.*: Error: illegal operands `cv.minu.sci.h x32,x32,20'
+.*: Error: illegal operands `cv.minu.sci.h x33,x33,20'
+.*: Error: illegal operands `cv.minu.sci.h x6,x7,-1'
+.*: Error: illegal operands `cv.minu.sci.h x6,x7,64'
+.*: Error: illegal operands `cv.or.b x32,x32,x32'
+.*: Error: illegal operands `cv.or.b x33,x33,x33'
+.*: Error: illegal operands `cv.or.h x32,x32,x32'
+.*: Error: illegal operands `cv.or.h x33,x33,x33'
+.*: Error: illegal operands `cv.or.sc.b x32,x32,x32'
+.*: Error: illegal operands `cv.or.sc.b x33,x33,x33'
+.*: Error: illegal operands `cv.or.sc.h x32,x32,x32'
+.*: Error: illegal operands `cv.or.sc.h x33,x33,x33'
+.*: Error: illegal operands `cv.or.sci.b x32,x32,20'
+.*: Error: illegal operands `cv.or.sci.b x33,x33,20'
+.*: Error: illegal operands `cv.or.sci.b x6,x7,-33'
+.*: Error: illegal operands `cv.or.sci.b x6,x7,32'
+.*: Error: illegal operands `cv.or.sci.h x32,x32,20'
+.*: Error: illegal operands `cv.or.sci.h x33,x33,20'
+.*: Error: illegal operands `cv.or.sci.h x6,x7,-33'
+.*: Error: illegal operands `cv.or.sci.h x6,x7,32'
+.*: Error: illegal operands `cv.pack x32,x32,x32'
+.*: Error: illegal operands `cv.pack x33,x33,x33'
+.*: Error: illegal operands `cv.pack.h x32,x32,x32'
+.*: Error: illegal operands `cv.pack.h x33,x33,x33'
+.*: Error: illegal operands `cv.packhi.b x32,x32,x32'
+.*: Error: illegal operands `cv.packhi.b x33,x33,x33'
+.*: Error: illegal operands `cv.packlo.b x32,x32,x32'
+.*: Error: illegal operands `cv.packlo.b x33,x33,x33'
+.*: Error: illegal operands `cv.sdotsp.b x32,x32,x32'
+.*: Error: illegal operands `cv.sdotsp.b x33,x33,x33'
+.*: Error: illegal operands `cv.sdotsp.h x32,x32,x32'
+.*: Error: illegal operands `cv.sdotsp.h x33,x33,x33'
+.*: Error: illegal operands `cv.sdotsp.sc.b x32,x32,x32'
+.*: Error: illegal operands `cv.sdotsp.sc.b x33,x33,x33'
+.*: Error: illegal operands `cv.sdotsp.sc.h x32,x32,x32'
+.*: Error: illegal operands `cv.sdotsp.sc.h x33,x33,x33'
+.*: Error: illegal operands `cv.sdotsp.sci.b x32,x32,20'
+.*: Error: illegal operands `cv.sdotsp.sci.b x33,x33,20'
+.*: Error: illegal operands `cv.sdotsp.sci.b x6,x7,-33'
+.*: Error: illegal operands `cv.sdotsp.sci.b x6,x7,32'
+.*: Error: illegal operands `cv.sdotsp.sci.h x32,x32,20'
+.*: Error: illegal operands `cv.sdotsp.sci.h x33,x33,20'
+.*: Error: illegal operands `cv.sdotsp.sci.h x6,x7,-33'
+.*: Error: illegal operands `cv.sdotsp.sci.h x6,x7,32'
+.*: Error: illegal operands `cv.sdotup.b x32,x32,x32'
+.*: Error: illegal operands `cv.sdotup.b x33,x33,x33'
+.*: Error: illegal operands `cv.sdotup.h x32,x32,x32'
+.*: Error: illegal operands `cv.sdotup.h x33,x33,x33'
+.*: Error: illegal operands `cv.sdotup.sc.b x32,x32,x32'
+.*: Error: illegal operands `cv.sdotup.sc.b x33,x33,x33'
+.*: Error: illegal operands `cv.sdotup.sc.h x32,x32,x32'
+.*: Error: illegal operands `cv.sdotup.sc.h x33,x33,x33'
+.*: Error: illegal operands `cv.sdotup.sci.b x32,x32,20'
+.*: Error: illegal operands `cv.sdotup.sci.b x33,x33,20'
+.*: Error: illegal operands `cv.sdotup.sci.b x6,x7,-1'
+.*: Error: illegal operands `cv.sdotup.sci.b x6,x7,64'
+.*: Error: illegal operands `cv.sdotup.sci.h x32,x32,20'
+.*: Error: illegal operands `cv.sdotup.sci.h x33,x33,20'
+.*: Error: illegal operands `cv.sdotup.sci.h x6,x7,-1'
+.*: Error: illegal operands `cv.sdotup.sci.h x6,x7,64'
+.*: Error: illegal operands `cv.sdotusp.b x32,x32,x32'
+.*: Error: illegal operands `cv.sdotusp.b x33,x33,x33'
+.*: Error: illegal operands `cv.sdotusp.h x32,x32,x32'
+.*: Error: illegal operands `cv.sdotusp.h x33,x33,x33'
+.*: Error: illegal operands `cv.sdotusp.sc.b x32,x32,x32'
+.*: Error: illegal operands `cv.sdotusp.sc.b x33,x33,x33'
+.*: Error: illegal operands `cv.sdotusp.sc.h x32,x32,x32'
+.*: Error: illegal operands `cv.sdotusp.sc.h x33,x33,x33'
+.*: Error: illegal operands `cv.sdotusp.sci.b x32,x32,20'
+.*: Error: illegal operands `cv.sdotusp.sci.b x33,x33,20'
+.*: Error: illegal operands `cv.sdotusp.sci.b x6,x7,-33'
+.*: Error: illegal operands `cv.sdotusp.sci.b x6,x7,32'
+.*: Error: illegal operands `cv.sdotusp.sci.h x32,x32,20'
+.*: Error: illegal operands `cv.sdotusp.sci.h x33,x33,20'
+.*: Error: illegal operands `cv.sdotusp.sci.h x6,x7,-33'
+.*: Error: illegal operands `cv.sdotusp.sci.h x6,x7,32'
+.*: Error: illegal operands `cv.shuffle2.b x32,x32,x32'
+.*: Error: illegal operands `cv.shuffle2.b x33,x33,x33'
+.*: Error: illegal operands `cv.shuffle2.h x32,x32,x32'
+.*: Error: illegal operands `cv.shuffle2.h x33,x33,x33'
+.*: Error: illegal operands `cv.shuffle.b x32,x32,x32'
+.*: Error: illegal operands `cv.shuffle.b x33,x33,x33'
+.*: Error: illegal operands `cv.shuffle.h x32,x32,x32'
+.*: Error: illegal operands `cv.shuffle.h x33,x33,x33'
+.*: Error: illegal operands `cv.shufflei0.sci.b x32,x32,20'
+.*: Error: illegal operands `cv.shufflei0.sci.b x33,x33,20'
+.*: Error: illegal operands `cv.shufflei0.sci.b x6,x7,-1'
+.*: Error: illegal operands `cv.shufflei0.sci.b x6,x7,64'
+.*: Error: illegal operands `cv.shufflei1.sci.b x32,x32,20'
+.*: Error: illegal operands `cv.shufflei1.sci.b x33,x33,20'
+.*: Error: illegal operands `cv.shufflei1.sci.b x6,x7,-1'
+.*: Error: illegal operands `cv.shufflei1.sci.b x6,x7,64'
+.*: Error: illegal operands `cv.shufflei2.sci.b x32,x32,20'
+.*: Error: illegal operands `cv.shufflei2.sci.b x33,x33,20'
+.*: Error: illegal operands `cv.shufflei2.sci.b x6,x7,-1'
+.*: Error: illegal operands `cv.shufflei2.sci.b x6,x7,64'
+.*: Error: illegal operands `cv.shufflei3.sci.b x32,x32,20'
+.*: Error: illegal operands `cv.shufflei3.sci.b x33,x33,20'
+.*: Error: illegal operands `cv.shufflei3.sci.b x6,x7,-1'
+.*: Error: illegal operands `cv.shufflei3.sci.b x6,x7,64'
+.*: Error: illegal operands `cv.shuffle.sci.h x32,x32,20'
+.*: Error: illegal operands `cv.shuffle.sci.h x33,x33,20'
+.*: Error: illegal operands `cv.shuffle.sci.h x6,x7,-1'
+.*: Error: illegal operands `cv.shuffle.sci.h x6,x7,64'
+.*: Error: illegal operands `cv.sll.b x32,x32,x32'
+.*: Error: illegal operands `cv.sll.b x33,x33,x33'
+.*: Error: illegal operands `cv.sll.h x32,x32,x32'
+.*: Error: illegal operands `cv.sll.h x33,x33,x33'
+.*: Error: illegal operands `cv.sll.sc.b x32,x32,x32'
+.*: Error: illegal operands `cv.sll.sc.b x33,x33,x33'
+.*: Error: illegal operands `cv.sll.sc.h x32,x32,x32'
+.*: Error: illegal operands `cv.sll.sc.h x33,x33,x33'
+.*: Error: illegal operands `cv.sll.sci.b x32,x32,4'
+.*: Error: illegal operands `cv.sll.sci.b x33,x33,4'
+.*: Error: illegal operands `cv.sll.sci.b x6,x7,-1'
+.*: Error: illegal operands `cv.sll.sci.b x6,x7,8'
+.*: Error: illegal operands `cv.sll.sci.h x32,x32,12'
+.*: Error: illegal operands `cv.sll.sci.h x33,x33,12'
+.*: Error: illegal operands `cv.sll.sci.h x6,x7,-1'
+.*: Error: illegal operands `cv.sll.sci.h x6,x7,16'
+.*: Error: illegal operands `cv.sra.b x32,x32,x32'
+.*: Error: illegal operands `cv.sra.b x33,x33,x33'
+.*: Error: illegal operands `cv.sra.h x32,x32,x32'
+.*: Error: illegal operands `cv.sra.h x33,x33,x33'
+.*: Error: illegal operands `cv.sra.sc.b x32,x32,x32'
+.*: Error: illegal operands `cv.sra.sc.b x33,x33,x33'
+.*: Error: illegal operands `cv.sra.sc.h x32,x32,x32'
+.*: Error: illegal operands `cv.sra.sc.h x33,x33,x33'
+.*: Error: illegal operands `cv.sra.sci.b x32,x32,4'
+.*: Error: illegal operands `cv.sra.sci.b x33,x33,4'
+.*: Error: illegal operands `cv.sra.sci.b x6,x7,-1'
+.*: Error: illegal operands `cv.sra.sci.b x6,x7,8'
+.*: Error: illegal operands `cv.sra.sci.h x32,x32,12'
+.*: Error: illegal operands `cv.sra.sci.h x33,x33,12'
+.*: Error: illegal operands `cv.sra.sci.h x6,x7,-1'
+.*: Error: illegal operands `cv.sra.sci.h x6,x7,16'
+.*: Error: illegal operands `cv.srl.b x32,x32,x32'
+.*: Error: illegal operands `cv.srl.b x33,x33,x33'
+.*: Error: illegal operands `cv.srl.h x32,x32,x32'
+.*: Error: illegal operands `cv.srl.h x33,x33,x33'
+.*: Error: illegal operands `cv.srl.sc.b x32,x32,x32'
+.*: Error: illegal operands `cv.srl.sc.b x33,x33,x33'
+.*: Error: illegal operands `cv.srl.sc.h x32,x32,x32'
+.*: Error: illegal operands `cv.srl.sc.h x33,x33,x33'
+.*: Error: illegal operands `cv.srl.sci.b x32,x32,4'
+.*: Error: illegal operands `cv.srl.sci.b x33,x33,4'
+.*: Error: illegal operands `cv.srl.sci.b x6,x7,-1'
+.*: Error: illegal operands `cv.srl.sci.b x6,x7,8'
+.*: Error: illegal operands `cv.srl.sci.h x32,x32,12'
+.*: Error: illegal operands `cv.srl.sci.h x33,x33,12'
+.*: Error: illegal operands `cv.srl.sci.h x6,x7,-1'
+.*: Error: illegal operands `cv.srl.sci.h x6,x7,16'
+.*: Error: illegal operands `cv.sub.b x32,x32,x32'
+.*: Error: illegal operands `cv.sub.b x33,x33,x33'
+.*: Error: illegal operands `cv.sub.div2 x32,x32,x32'
+.*: Error: illegal operands `cv.sub.div2 x33,x33,x33'
+.*: Error: illegal operands `cv.sub.div4 x32,x32,x32'
+.*: Error: illegal operands `cv.sub.div4 x33,x33,x33'
+.*: Error: illegal operands `cv.sub.div8 x32,x32,x32'
+.*: Error: illegal operands `cv.sub.div8 x33,x33,x33'
+.*: Error: illegal operands `cv.sub.h x32,x32,x32'
+.*: Error: illegal operands `cv.sub.h x33,x33,x33'
+.*: Error: illegal operands `cv.subrotmj.div2 x32,x32,x32'
+.*: Error: illegal operands `cv.subrotmj.div2 x33,x33,x33'
+.*: Error: illegal operands `cv.subrotmj.div4 x32,x32,x32'
+.*: Error: illegal operands `cv.subrotmj.div4 x33,x33,x33'
+.*: Error: illegal operands `cv.subrotmj.div8 x32,x32,x32'
+.*: Error: illegal operands `cv.subrotmj.div8 x33,x33,x33'
+.*: Error: illegal operands `cv.subrotmj x32,x32,x32'
+.*: Error: illegal operands `cv.subrotmj x33,x33,x33'
+.*: Error: illegal operands `cv.sub.sc.b x32,x32,x32'
+.*: Error: illegal operands `cv.sub.sc.b x33,x33,x33'
+.*: Error: illegal operands `cv.sub.sc.h x32,x32,x32'
+.*: Error: illegal operands `cv.sub.sc.h x33,x33,x33'
+.*: Error: illegal operands `cv.sub.sci.b x32,x32,20'
+.*: Error: illegal operands `cv.sub.sci.b x33,x33,20'
+.*: Error: illegal operands `cv.sub.sci.b x6,x7,-33'
+.*: Error: illegal operands `cv.sub.sci.b x6,x7,32'
+.*: Error: illegal operands `cv.sub.sci.h x32,x32,20'
+.*: Error: illegal operands `cv.sub.sci.h x33,x33,20'
+.*: Error: illegal operands `cv.sub.sci.h x6,x7,-33'
+.*: Error: illegal operands `cv.sub.sci.h x6,x7,32'
+.*: Error: illegal operands `cv.xor.b x32,x32,x32'
+.*: Error: illegal operands `cv.xor.b x33,x33,x33'
+.*: Error: illegal operands `cv.xor.h x32,x32,x32'
+.*: Error: illegal operands `cv.xor.h x33,x33,x33'
+.*: Error: illegal operands `cv.xor.sc.b x32,x32,x32'
+.*: Error: illegal operands `cv.xor.sc.b x33,x33,x33'
+.*: Error: illegal operands `cv.xor.sc.h x32,x32,x32'
+.*: Error: illegal operands `cv.xor.sc.h x33,x33,x33'
+.*: Error: illegal operands `cv.xor.sci.b x32,x32,20'
+.*: Error: illegal operands `cv.xor.sci.b x33,x33,20'
+.*: Error: illegal operands `cv.xor.sci.b x6,x7,-33'
+.*: Error: illegal operands `cv.xor.sci.b x6,x7,32'
+.*: Error: illegal operands `cv.xor.sci.h x32,x32,20'
+.*: Error: illegal operands `cv.xor.sci.h x33,x33,20'
+.*: Error: illegal operands `cv.xor.sci.h x6,x7,-33'
+.*: Error: illegal operands `cv.xor.sci.h x6,x7,32'
diff --git a/gas/testsuite/gas/riscv/x-cv-simd-fail.s b/gas/testsuite/gas/riscv/x-cv-simd-fail.s
new file mode 100644
index 0000000..9aa6ffc
--- /dev/null
+++ b/gas/testsuite/gas/riscv/x-cv-simd-fail.s
@@ -0,0 +1,582 @@
+    cv.abs.b x32, x32
+    cv.abs.b x33, x33
+    cv.abs.h x32, x32
+    cv.abs.h x33, x33
+    cv.add.b x32, x32, x32
+    cv.add.b x33, x33, x33
+    cv.add.div2 x32, x32, x32
+    cv.add.div2 x33, x33, x33
+    cv.add.div4 x32, x32, x32
+    cv.add.div4 x33, x33, x33
+    cv.add.div8 x32, x32, x32
+    cv.add.div8 x33, x33, x33
+    cv.add.h x32, x32, x32
+    cv.add.h x33, x33, x33
+    cv.add.sc.b x32, x32, x32
+    cv.add.sc.b x33, x33, x33
+    cv.add.sc.h x32, x32, x32
+    cv.add.sc.h x33, x33, x33
+    cv.add.sci.b x32, x32, 20
+    cv.add.sci.b x33, x33, 20
+    cv.add.sci.b x6, x7, -33
+    cv.add.sci.b x6, x7, 32
+    cv.add.sci.h x32, x32, 20
+    cv.add.sci.h x33, x33, 20
+    cv.add.sci.h x6, x7, -33
+    cv.add.sci.h x6, x7, 32
+    cv.and.b x32, x32, x32
+    cv.and.b x33, x33, x33
+    cv.and.h x32, x32, x32
+    cv.and.h x33, x33, x33
+    cv.and.sc.b x32, x32, x32
+    cv.and.sc.b x33, x33, x33
+    cv.and.sc.h x32, x32, x32
+    cv.and.sc.h x33, x33, x33
+    cv.and.sci.b x32, x32, 20
+    cv.and.sci.b x33, x33, 20
+    cv.and.sci.b x6, x7, -33
+    cv.and.sci.b x6, x7, 32
+    cv.and.sci.h x32, x32, 20
+    cv.and.sci.h x33, x33, 20
+    cv.and.sci.h x6, x7, -33
+    cv.and.sci.h x6, x7, 32
+    cv.avg.b x32, x32, x32
+    cv.avg.b x33, x33, x33
+    cv.avg.h x32, x32, x32
+    cv.avg.h x33, x33, x33
+    cv.avg.sc.b x32, x32, x32
+    cv.avg.sc.b x33, x33, x33
+    cv.avg.sc.h x32, x32, x32
+    cv.avg.sc.h x33, x33, x33
+    cv.avg.sci.b x32, x32, 20
+    cv.avg.sci.b x33, x33, 20
+    cv.avg.sci.b x6, x7, -33
+    cv.avg.sci.b x6, x7, 32
+    cv.avg.sci.h x32, x32, 20
+    cv.avg.sci.h x33, x33, 20
+    cv.avg.sci.h x6, x7, -33
+    cv.avg.sci.h x6, x7, 32
+    cv.avgu.b x32, x32, x32
+    cv.avgu.b x33, x33, x33
+    cv.avgu.h x32, x32, x32
+    cv.avgu.h x33, x33, x33
+    cv.avgu.sc.b x32, x32, x32
+    cv.avgu.sc.b x33, x33, x33
+    cv.avgu.sc.h x32, x32, x32
+    cv.avgu.sc.h x33, x33, x33
+    cv.avgu.sci.b x32, x32, 20
+    cv.avgu.sci.b x33, x33, 20
+    cv.avgu.sci.b x6, x7, -1
+    cv.avgu.sci.b x6, x7, 64
+    cv.avgu.sci.h x32, x32, 20
+    cv.avgu.sci.h x33, x33, 20
+    cv.avgu.sci.h x6, x7, -1
+    cv.avgu.sci.h x6, x7, 64
+    cv.cmpeq.b x32, x32, x32
+    cv.cmpeq.b x33, x33, x33
+    cv.cmpeq.h x32, x32, x32
+    cv.cmpeq.h x33, x33, x33
+    cv.cmpeq.sc.b x32, x32, x32
+    cv.cmpeq.sc.b x33, x33, x33
+    cv.cmpeq.sc.h x32, x32, x32
+    cv.cmpeq.sc.h x33, x33, x33
+    cv.cmpeq.sci.b x32, x32, 20
+    cv.cmpeq.sci.b x33, x33, 20
+    cv.cmpeq.sci.b x6, x7, -33
+    cv.cmpeq.sci.b x6, x7, 32
+    cv.cmpeq.sci.h x32, x32, 20
+    cv.cmpeq.sci.h x33, x33, 20
+    cv.cmpeq.sci.h x6, x7, -33
+    cv.cmpeq.sci.h x6, x7, 32
+    cv.cmpge.b x32, x32, x32
+    cv.cmpge.b x33, x33, x33
+    cv.cmpge.h x32, x32, x32
+    cv.cmpge.h x33, x33, x33
+    cv.cmpge.sc.b x32, x32, x32
+    cv.cmpge.sc.b x33, x33, x33
+    cv.cmpge.sc.h x32, x32, x32
+    cv.cmpge.sc.h x33, x33, x33
+    cv.cmpge.sci.b x32, x32, 20
+    cv.cmpge.sci.b x33, x33, 20
+    cv.cmpge.sci.b x6, x7, -33
+    cv.cmpge.sci.b x6, x7, 32
+    cv.cmpge.sci.h x32, x32, 20
+    cv.cmpge.sci.h x33, x33, 20
+    cv.cmpge.sci.h x6, x7, -33
+    cv.cmpge.sci.h x6, x7, 32
+    cv.cmpgeu.b x32, x32, x32
+    cv.cmpgeu.b x33, x33, x33
+    cv.cmpgeu.h x32, x32, x32
+    cv.cmpgeu.h x33, x33, x33
+    cv.cmpgeu.sc.b x32, x32, x32
+    cv.cmpgeu.sc.b x33, x33, x33
+    cv.cmpgeu.sc.h x32, x32, x32
+    cv.cmpgeu.sc.h x33, x33, x33
+    cv.cmpgeu.sci.b x32, x32, 20
+    cv.cmpgeu.sci.b x33, x33, 20
+    cv.cmpgeu.sci.b x6, x7, -1
+    cv.cmpgeu.sci.b x6, x7, 64
+    cv.cmpgeu.sci.h x32, x32, 20
+    cv.cmpgeu.sci.h x33, x33, 20
+    cv.cmpgeu.sci.h x6, x7, -1
+    cv.cmpgeu.sci.h x6, x7, 64
+    cv.cmpgt.b x32, x32, x32
+    cv.cmpgt.b x33, x33, x33
+    cv.cmpgt.h x32, x32, x32
+    cv.cmpgt.h x33, x33, x33
+    cv.cmpgt.sc.b x32, x32, x32
+    cv.cmpgt.sc.b x33, x33, x33
+    cv.cmpgt.sc.h x32, x32, x32
+    cv.cmpgt.sc.h x33, x33, x33
+    cv.cmpgt.sci.b x32, x32, 20
+    cv.cmpgt.sci.b x33, x33, 20
+    cv.cmpgt.sci.b x6, x7, -33
+    cv.cmpgt.sci.b x6, x7, 32
+    cv.cmpgt.sci.h x32, x32, 20
+    cv.cmpgt.sci.h x33, x33, 20
+    cv.cmpgt.sci.h x6, x7, -33
+    cv.cmpgt.sci.h x6, x7, 32
+    cv.cmpgtu.b x32, x32, x32
+    cv.cmpgtu.b x33, x33, x33
+    cv.cmpgtu.h x32, x32, x32
+    cv.cmpgtu.h x33, x33, x33
+    cv.cmpgtu.sc.b x32, x32, x32
+    cv.cmpgtu.sc.b x33, x33, x33
+    cv.cmpgtu.sc.h x32, x32, x32
+    cv.cmpgtu.sc.h x33, x33, x33
+    cv.cmpgtu.sci.b x32, x32, 20
+    cv.cmpgtu.sci.b x33, x33, 20
+    cv.cmpgtu.sci.b x6, x7, -1
+    cv.cmpgtu.sci.b x6, x7, 64
+    cv.cmpgtu.sci.h x32, x32, 20
+    cv.cmpgtu.sci.h x33, x33, 20
+    cv.cmpgtu.sci.h x6, x7, -1
+    cv.cmpgtu.sci.h x6, x7, 64
+    cv.cmple.b x32, x32, x32
+    cv.cmple.b x33, x33, x33
+    cv.cmple.h x32, x32, x32
+    cv.cmple.h x33, x33, x33
+    cv.cmple.sc.b x32, x32, x32
+    cv.cmple.sc.b x33, x33, x33
+    cv.cmple.sc.h x32, x32, x32
+    cv.cmple.sc.h x33, x33, x33
+    cv.cmple.sci.b x32, x32, 20
+    cv.cmple.sci.b x33, x33, 20
+    cv.cmple.sci.b x6, x7, -33
+    cv.cmple.sci.b x6, x7, 32
+    cv.cmple.sci.h x32, x32, 20
+    cv.cmple.sci.h x33, x33, 20
+    cv.cmple.sci.h x6, x7, -33
+    cv.cmple.sci.h x6, x7, 32
+    cv.cmpleu.b x32, x32, x32
+    cv.cmpleu.b x33, x33, x33
+    cv.cmpleu.h x32, x32, x32
+    cv.cmpleu.h x33, x33, x33
+    cv.cmpleu.sc.b x32, x32, x32
+    cv.cmpleu.sc.b x33, x33, x33
+    cv.cmpleu.sc.h x32, x32, x32
+    cv.cmpleu.sc.h x33, x33, x33
+    cv.cmpleu.sci.b x32, x32, 20
+    cv.cmpleu.sci.b x33, x33, 20
+    cv.cmpleu.sci.b x6, x7, -1
+    cv.cmpleu.sci.b x6, x7, 64
+    cv.cmpleu.sci.h x32, x32, 20
+    cv.cmpleu.sci.h x33, x33, 20
+    cv.cmpleu.sci.h x6, x7, -1
+    cv.cmpleu.sci.h x6, x7, 64
+    cv.cmplt.b x32, x32, x32
+    cv.cmplt.b x33, x33, x33
+    cv.cmplt.h x32, x32, x32
+    cv.cmplt.h x33, x33, x33
+    cv.cmplt.sc.b x32, x32, x32
+    cv.cmplt.sc.b x33, x33, x33
+    cv.cmplt.sc.h x32, x32, x32
+    cv.cmplt.sc.h x33, x33, x33
+    cv.cmplt.sci.b x32, x32, 20
+    cv.cmplt.sci.b x33, x33, 20
+    cv.cmplt.sci.b x6, x7, -33
+    cv.cmplt.sci.b x6, x7, 32
+    cv.cmplt.sci.h x32, x32, 20
+    cv.cmplt.sci.h x33, x33, 20
+    cv.cmplt.sci.h x6, x7, -33
+    cv.cmplt.sci.h x6, x7, 32
+    cv.cmpltu.b x32, x32, x32
+    cv.cmpltu.b x33, x33, x33
+    cv.cmpltu.h x32, x32, x32
+    cv.cmpltu.h x33, x33, x33
+    cv.cmpltu.sc.b x32, x32, x32
+    cv.cmpltu.sc.b x33, x33, x33
+    cv.cmpltu.sc.h x32, x32, x32
+    cv.cmpltu.sc.h x33, x33, x33
+    cv.cmpltu.sci.b x32, x32, 20
+    cv.cmpltu.sci.b x33, x33, 20
+    cv.cmpltu.sci.b x6, x7, -1
+    cv.cmpltu.sci.b x6, x7, 64
+    cv.cmpltu.sci.h x32, x32, 20
+    cv.cmpltu.sci.h x33, x33, 20
+    cv.cmpltu.sci.h x6, x7, -1
+    cv.cmpltu.sci.h x6, x7, 64
+    cv.cmpne.b x32, x32, x32
+    cv.cmpne.b x33, x33, x33
+    cv.cmpne.h x32, x32, x32
+    cv.cmpne.h x33, x33, x33
+    cv.cmpne.sc.b x32, x32, x32
+    cv.cmpne.sc.b x33, x33, x33
+    cv.cmpne.sc.h x32, x32, x32
+    cv.cmpne.sc.h x33, x33, x33
+    cv.cmpne.sci.b x32, x32, 20
+    cv.cmpne.sci.b x33, x33, 20
+    cv.cmpne.sci.b x6, x7, -33
+    cv.cmpne.sci.b x6, x7, 32
+    cv.cmpne.sci.h x32, x32, 20
+    cv.cmpne.sci.h x33, x33, 20
+    cv.cmpne.sci.h x6, x7, -33
+    cv.cmpne.sci.h x6, x7, 32
+    cv.cplxconj x32, x32
+    cv.cplxconj x33, x33
+    cv.cplxmul.i.div2 x32, x32, x32
+    cv.cplxmul.i.div2 x33, x33, x33
+    cv.cplxmul.i.div4 x32, x32, x32
+    cv.cplxmul.i.div4 x33, x33, x33
+    cv.cplxmul.i.div8 x32, x32, x32
+    cv.cplxmul.i.div8 x33, x33, x33
+    cv.cplxmul.i x32, x32, x32
+    cv.cplxmul.i x33, x33, x33
+    cv.cplxmul.r.div2 x32, x32, x32
+    cv.cplxmul.r.div2 x33, x33, x33
+    cv.cplxmul.r.div4 x32, x32, x32
+    cv.cplxmul.r.div4 x33, x33, x33
+    cv.cplxmul.r.div8 x32, x32, x32
+    cv.cplxmul.r.div8 x33, x33, x33
+    cv.cplxmul.r x32, x32, x32
+    cv.cplxmul.r x33, x33, x33
+    cv.dotsp.b x32, x32, x32
+    cv.dotsp.b x33, x33, x33
+    cv.dotsp.h x32, x32, x32
+    cv.dotsp.h x33, x33, x33
+    cv.dotsp.sc.b x32, x32, x32
+    cv.dotsp.sc.b x33, x33, x33
+    cv.dotsp.sc.h x32, x32, x32
+    cv.dotsp.sc.h x33, x33, x33
+    cv.dotsp.sci.b x32, x32, 20
+    cv.dotsp.sci.b x33, x33, 20
+    cv.dotsp.sci.b x6, x7, -33
+    cv.dotsp.sci.b x6, x7, 32
+    cv.dotsp.sci.h x32, x32, 20
+    cv.dotsp.sci.h x33, x33, 20
+    cv.dotsp.sci.h x6, x7, -33
+    cv.dotsp.sci.h x6, x7, 32
+    cv.dotup.b x32, x32, x32
+    cv.dotup.b x33, x33, x33
+    cv.dotup.h x32, x32, x32
+    cv.dotup.h x33, x33, x33
+    cv.dotup.sc.b x32, x32, x32
+    cv.dotup.sc.b x33, x33, x33
+    cv.dotup.sc.h x32, x32, x32
+    cv.dotup.sc.h x33, x33, x33
+    cv.dotup.sci.b x32, x32, 20
+    cv.dotup.sci.b x33, x33, 20
+    cv.dotup.sci.b x6, x7, -1
+    cv.dotup.sci.b x6, x7, 64
+    cv.dotup.sci.h x32, x32, 20
+    cv.dotup.sci.h x33, x33, 20
+    cv.dotup.sci.h x6, x7, -1
+    cv.dotup.sci.h x6, x7, 64
+    cv.dotusp.b x32, x32, x32
+    cv.dotusp.b x33, x33, x33
+    cv.dotusp.h x32, x32, x32
+    cv.dotusp.h x33, x33, x33
+    cv.dotusp.sc.b x32, x32, x32
+    cv.dotusp.sc.b x33, x33, x33
+    cv.dotusp.sc.h x32, x32, x32
+    cv.dotusp.sc.h x33, x33, x33
+    cv.dotusp.sci.b x32, x32, 20
+    cv.dotusp.sci.b x33, x33, 20
+    cv.dotusp.sci.b x6, x7, -33
+    cv.dotusp.sci.b x6, x7, 32
+    cv.dotusp.sci.h x32, x32, 20
+    cv.dotusp.sci.h x33, x33, 20
+    cv.dotusp.sci.h x6, x7, -33
+    cv.dotusp.sci.h x6, x7, 32
+    cv.extract.b x32, x32, 2
+    cv.extract.b x33, x33, 2
+    cv.extract.b x6, x7, -1
+    cv.extract.b x6, x7, 4
+    cv.extract.h x32, x32, 1
+    cv.extract.h x33, x33, 1
+    cv.extract.h x6, x7, -1
+    cv.extract.h x6, x7, 2
+    cv.extractu.b x32, x32, 2
+    cv.extractu.b x33, x33, 2
+    cv.extractu.b x6, x7, -1
+    cv.extractu.b x6, x7, 4
+    cv.extractu.h x32, x32, 1
+    cv.extractu.h x33, x33, 1
+    cv.extractu.h x6, x7, -1
+    cv.extractu.h x6, x7, 2
+    cv.insert.b x32, x32, 2
+    cv.insert.b x33, x33, 2
+    cv.insert.b x6, x7, -1
+    cv.insert.b x6, x7, 4
+    cv.insert.h x32, x32, 1
+    cv.insert.h x33, x33, 1
+    cv.insert.h x6, x7, -1
+    cv.insert.h x6, x7, 2
+    cv.max.b x32, x32, x32
+    cv.max.b x33, x33, x33
+    cv.max.h x32, x32, x32
+    cv.max.h x33, x33, x33
+    cv.max.sc.b x32, x32, x32
+    cv.max.sc.b x33, x33, x33
+    cv.max.sc.h x32, x32, x32
+    cv.max.sc.h x33, x33, x33
+    cv.max.sci.b x32, x32, 20
+    cv.max.sci.b x33, x33, 20
+    cv.max.sci.b x6, x7, -33
+    cv.max.sci.b x6, x7, 32
+    cv.max.sci.h x32, x32, 20
+    cv.max.sci.h x33, x33, 20
+    cv.max.sci.h x6, x7, -33
+    cv.max.sci.h x6, x7, 32
+    cv.maxu.b x32, x32, x32
+    cv.maxu.b x33, x33, x33
+    cv.maxu.h x32, x32, x32
+    cv.maxu.h x33, x33, x33
+    cv.maxu.sc.b x32, x32, x32
+    cv.maxu.sc.b x33, x33, x33
+    cv.maxu.sc.h x32, x32, x32
+    cv.maxu.sc.h x33, x33, x33
+    cv.maxu.sci.b x32, x32, 20
+    cv.maxu.sci.b x33, x33, 20
+    cv.maxu.sci.b x6, x7, -1
+    cv.maxu.sci.b x6, x7, 64
+    cv.maxu.sci.h x32, x32, 20
+    cv.maxu.sci.h x33, x33, 20
+    cv.maxu.sci.h x6, x7, -1
+    cv.maxu.sci.h x6, x7, 64
+    cv.min.b x32, x32, x32
+    cv.min.b x33, x33, x33
+    cv.min.h x32, x32, x32
+    cv.min.h x33, x33, x33
+    cv.min.sc.b x32, x32, x32
+    cv.min.sc.b x33, x33, x33
+    cv.min.sc.h x32, x32, x32
+    cv.min.sc.h x33, x33, x33
+    cv.min.sci.b x32, x32, 20
+    cv.min.sci.b x33, x33, 20
+    cv.min.sci.b x6, x7, -33
+    cv.min.sci.b x6, x7, 32
+    cv.min.sci.h x32, x32, 20
+    cv.min.sci.h x33, x33, 20
+    cv.min.sci.h x6, x7, -33
+    cv.min.sci.h x6, x7, 32
+    cv.minu.b x32, x32, x32
+    cv.minu.b x33, x33, x33
+    cv.minu.h x32, x32, x32
+    cv.minu.h x33, x33, x33
+    cv.minu.sc.b x32, x32, x32
+    cv.minu.sc.b x33, x33, x33
+    cv.minu.sc.h x32, x32, x32
+    cv.minu.sc.h x33, x33, x33
+    cv.minu.sci.b x32, x32, 20
+    cv.minu.sci.b x33, x33, 20
+    cv.minu.sci.b x6, x7, -1
+    cv.minu.sci.b x6, x7, 64
+    cv.minu.sci.h x32, x32, 20
+    cv.minu.sci.h x33, x33, 20
+    cv.minu.sci.h x6, x7, -1
+    cv.minu.sci.h x6, x7, 64
+    cv.or.b x32, x32, x32
+    cv.or.b x33, x33, x33
+    cv.or.h x32, x32, x32
+    cv.or.h x33, x33, x33
+    cv.or.sc.b x32, x32, x32
+    cv.or.sc.b x33, x33, x33
+    cv.or.sc.h x32, x32, x32
+    cv.or.sc.h x33, x33, x33
+    cv.or.sci.b x32, x32, 20
+    cv.or.sci.b x33, x33, 20
+    cv.or.sci.b x6, x7, -33
+    cv.or.sci.b x6, x7, 32
+    cv.or.sci.h x32, x32, 20
+    cv.or.sci.h x33, x33, 20
+    cv.or.sci.h x6, x7, -33
+    cv.or.sci.h x6, x7, 32
+    cv.pack x32, x32, x32
+    cv.pack x33, x33, x33
+    cv.pack.h x32, x32, x32
+    cv.pack.h x33, x33, x33
+    cv.packhi.b x32, x32, x32
+    cv.packhi.b x33, x33, x33
+    cv.packlo.b x32, x32, x32
+    cv.packlo.b x33, x33, x33
+    cv.sdotsp.b x32, x32, x32
+    cv.sdotsp.b x33, x33, x33
+    cv.sdotsp.h x32, x32, x32
+    cv.sdotsp.h x33, x33, x33
+    cv.sdotsp.sc.b x32, x32, x32
+    cv.sdotsp.sc.b x33, x33, x33
+    cv.sdotsp.sc.h x32, x32, x32
+    cv.sdotsp.sc.h x33, x33, x33
+    cv.sdotsp.sci.b x32, x32, 20
+    cv.sdotsp.sci.b x33, x33, 20
+    cv.sdotsp.sci.b x6, x7, -33
+    cv.sdotsp.sci.b x6, x7, 32
+    cv.sdotsp.sci.h x32, x32, 20
+    cv.sdotsp.sci.h x33, x33, 20
+    cv.sdotsp.sci.h x6, x7, -33
+    cv.sdotsp.sci.h x6, x7, 32
+    cv.sdotup.b x32, x32, x32
+    cv.sdotup.b x33, x33, x33
+    cv.sdotup.h x32, x32, x32
+    cv.sdotup.h x33, x33, x33
+    cv.sdotup.sc.b x32, x32, x32
+    cv.sdotup.sc.b x33, x33, x33
+    cv.sdotup.sc.h x32, x32, x32
+    cv.sdotup.sc.h x33, x33, x33
+    cv.sdotup.sci.b x32, x32, 20
+    cv.sdotup.sci.b x33, x33, 20
+    cv.sdotup.sci.b x6, x7, -1
+    cv.sdotup.sci.b x6, x7, 64
+    cv.sdotup.sci.h x32, x32, 20
+    cv.sdotup.sci.h x33, x33, 20
+    cv.sdotup.sci.h x6, x7, -1
+    cv.sdotup.sci.h x6, x7, 64
+    cv.sdotusp.b x32, x32, x32
+    cv.sdotusp.b x33, x33, x33
+    cv.sdotusp.h x32, x32, x32
+    cv.sdotusp.h x33, x33, x33
+    cv.sdotusp.sc.b x32, x32, x32
+    cv.sdotusp.sc.b x33, x33, x33
+    cv.sdotusp.sc.h x32, x32, x32
+    cv.sdotusp.sc.h x33, x33, x33
+    cv.sdotusp.sci.b x32, x32, 20
+    cv.sdotusp.sci.b x33, x33, 20
+    cv.sdotusp.sci.b x6, x7, -33
+    cv.sdotusp.sci.b x6, x7, 32
+    cv.sdotusp.sci.h x32, x32, 20
+    cv.sdotusp.sci.h x33, x33, 20
+    cv.sdotusp.sci.h x6, x7, -33
+    cv.sdotusp.sci.h x6, x7, 32
+    cv.shuffle2.b x32, x32, x32
+    cv.shuffle2.b x33, x33, x33
+    cv.shuffle2.h x32, x32, x32
+    cv.shuffle2.h x33, x33, x33
+    cv.shuffle.b x32, x32, x32
+    cv.shuffle.b x33, x33, x33
+    cv.shuffle.h x32, x32, x32
+    cv.shuffle.h x33, x33, x33
+    cv.shufflei0.sci.b x32, x32, 20
+    cv.shufflei0.sci.b x33, x33, 20
+    cv.shufflei0.sci.b x6, x7, -1
+    cv.shufflei0.sci.b x6, x7, 64
+    cv.shufflei1.sci.b x32, x32, 20
+    cv.shufflei1.sci.b x33, x33, 20
+    cv.shufflei1.sci.b x6, x7, -1
+    cv.shufflei1.sci.b x6, x7, 64
+    cv.shufflei2.sci.b x32, x32, 20
+    cv.shufflei2.sci.b x33, x33, 20
+    cv.shufflei2.sci.b x6, x7, -1
+    cv.shufflei2.sci.b x6, x7, 64
+    cv.shufflei3.sci.b x32, x32, 20
+    cv.shufflei3.sci.b x33, x33, 20
+    cv.shufflei3.sci.b x6, x7, -1
+    cv.shufflei3.sci.b x6, x7, 64
+    cv.shuffle.sci.h x32, x32, 20
+    cv.shuffle.sci.h x33, x33, 20
+    cv.shuffle.sci.h x6, x7, -1
+    cv.shuffle.sci.h x6, x7, 64
+    cv.sll.b x32, x32, x32
+    cv.sll.b x33, x33, x33
+    cv.sll.h x32, x32, x32
+    cv.sll.h x33, x33, x33
+    cv.sll.sc.b x32, x32, x32
+    cv.sll.sc.b x33, x33, x33
+    cv.sll.sc.h x32, x32, x32
+    cv.sll.sc.h x33, x33, x33
+    cv.sll.sci.b x32, x32, 4
+    cv.sll.sci.b x33, x33, 4
+    cv.sll.sci.b x6, x7, -1
+    cv.sll.sci.b x6, x7, 8
+    cv.sll.sci.h x32, x32, 12
+    cv.sll.sci.h x33, x33, 12
+    cv.sll.sci.h x6, x7, -1
+    cv.sll.sci.h x6, x7, 16
+    cv.sra.b x32, x32, x32
+    cv.sra.b x33, x33, x33
+    cv.sra.h x32, x32, x32
+    cv.sra.h x33, x33, x33
+    cv.sra.sc.b x32, x32, x32
+    cv.sra.sc.b x33, x33, x33
+    cv.sra.sc.h x32, x32, x32
+    cv.sra.sc.h x33, x33, x33
+    cv.sra.sci.b x32, x32, 4
+    cv.sra.sci.b x33, x33, 4
+    cv.sra.sci.b x6, x7, -1
+    cv.sra.sci.b x6, x7, 8
+    cv.sra.sci.h x32, x32, 12
+    cv.sra.sci.h x33, x33, 12
+    cv.sra.sci.h x6, x7, -1
+    cv.sra.sci.h x6, x7, 16
+    cv.srl.b x32, x32, x32
+    cv.srl.b x33, x33, x33
+    cv.srl.h x32, x32, x32
+    cv.srl.h x33, x33, x33
+    cv.srl.sc.b x32, x32, x32
+    cv.srl.sc.b x33, x33, x33
+    cv.srl.sc.h x32, x32, x32
+    cv.srl.sc.h x33, x33, x33
+    cv.srl.sci.b x32, x32, 4
+    cv.srl.sci.b x33, x33, 4
+    cv.srl.sci.b x6, x7, -1
+    cv.srl.sci.b x6, x7, 8
+    cv.srl.sci.h x32, x32, 12
+    cv.srl.sci.h x33, x33, 12
+    cv.srl.sci.h x6, x7, -1
+    cv.srl.sci.h x6, x7, 16
+    cv.sub.b x32, x32, x32
+    cv.sub.b x33, x33, x33
+    cv.sub.div2 x32, x32, x32
+    cv.sub.div2 x33, x33, x33
+    cv.sub.div4 x32, x32, x32
+    cv.sub.div4 x33, x33, x33
+    cv.sub.div8 x32, x32, x32
+    cv.sub.div8 x33, x33, x33
+    cv.sub.h x32, x32, x32
+    cv.sub.h x33, x33, x33
+    cv.subrotmj.div2 x32, x32, x32
+    cv.subrotmj.div2 x33, x33, x33
+    cv.subrotmj.div4 x32, x32, x32
+    cv.subrotmj.div4 x33, x33, x33
+    cv.subrotmj.div8 x32, x32, x32
+    cv.subrotmj.div8 x33, x33, x33
+    cv.subrotmj x32, x32, x32
+    cv.subrotmj x33, x33, x33
+    cv.sub.sc.b x32, x32, x32
+    cv.sub.sc.b x33, x33, x33
+    cv.sub.sc.h x32, x32, x32
+    cv.sub.sc.h x33, x33, x33
+    cv.sub.sci.b x32, x32, 20
+    cv.sub.sci.b x33, x33, 20
+    cv.sub.sci.b x6, x7, -33
+    cv.sub.sci.b x6, x7, 32
+    cv.sub.sci.h x32, x32, 20
+    cv.sub.sci.h x33, x33, 20
+    cv.sub.sci.h x6, x7, -33
+    cv.sub.sci.h x6, x7, 32
+    cv.xor.b x32, x32, x32
+    cv.xor.b x33, x33, x33
+    cv.xor.h x32, x32, x32
+    cv.xor.h x33, x33, x33
+    cv.xor.sc.b x32, x32, x32
+    cv.xor.sc.b x33, x33, x33
+    cv.xor.sc.h x32, x32, x32
+    cv.xor.sc.h x33, x33, x33
+    cv.xor.sci.b x32, x32, 20
+    cv.xor.sci.b x33, x33, 20
+    cv.xor.sci.b x6, x7, -33
+    cv.xor.sci.b x6, x7, 32
+    cv.xor.sci.h x32, x32, 20
+    cv.xor.sci.h x33, x33, 20
+    cv.xor.sci.h x6, x7, -33
+    cv.xor.sci.h x6, x7, 32
diff --git a/gas/testsuite/gas/riscv/x-cv-simd.d b/gas/testsuite/gas/riscv/x-cv-simd.d
new file mode 100644
index 0000000..8c22b4a
--- /dev/null
+++ b/gas/testsuite/gas/riscv/x-cv-simd.d
@@ -0,0 +1,1508 @@
+#as: -march=rv32i_xcvsimd
+#source: x-cv-simd.s
+#objdump: -d
+
+.*:[ 	]+file format .*
+
+
+Disassembly of section .text:
+
+0+000 <.text>:
+.*:	7000107b          	cv.abs.b	zero,zero
+.*:	700090fb          	cv.abs.b	ra,ra
+.*:	7001117b          	cv.abs.b	sp,sp
+.*:	7004147b          	cv.abs.b	s0,s0
+.*:	700a1a7b          	cv.abs.b	s4,s4
+.*:	700f9ffb          	cv.abs.b	t6,t6
+.*:	7000007b          	cv.abs.h	zero,zero
+.*:	700080fb          	cv.abs.h	ra,ra
+.*:	7001017b          	cv.abs.h	sp,sp
+.*:	7004047b          	cv.abs.h	s0,s0
+.*:	700a0a7b          	cv.abs.h	s4,s4
+.*:	700f8ffb          	cv.abs.h	t6,t6
+.*:	0000107b          	cv.add.b	zero,zero,zero
+.*:	001090fb          	cv.add.b	ra,ra,ra
+.*:	0021117b          	cv.add.b	sp,sp,sp
+.*:	0084147b          	cv.add.b	s0,s0,s0
+.*:	014a1a7b          	cv.add.b	s4,s4,s4
+.*:	01ff9ffb          	cv.add.b	t6,t6,t6
+.*:	6c00207b          	cv.add.div2	zero,zero,zero
+.*:	6c10a0fb          	cv.add.div2	ra,ra,ra
+.*:	6c21217b          	cv.add.div2	sp,sp,sp
+.*:	6c84247b          	cv.add.div2	s0,s0,s0
+.*:	6d4a2a7b          	cv.add.div2	s4,s4,s4
+.*:	6dffaffb          	cv.add.div2	t6,t6,t6
+.*:	6c00407b          	cv.add.div4	zero,zero,zero
+.*:	6c10c0fb          	cv.add.div4	ra,ra,ra
+.*:	6c21417b          	cv.add.div4	sp,sp,sp
+.*:	6c84447b          	cv.add.div4	s0,s0,s0
+.*:	6d4a4a7b          	cv.add.div4	s4,s4,s4
+.*:	6dffcffb          	cv.add.div4	t6,t6,t6
+.*:	6c00607b          	cv.add.div8	zero,zero,zero
+.*:	6c10e0fb          	cv.add.div8	ra,ra,ra
+.*:	6c21617b          	cv.add.div8	sp,sp,sp
+.*:	6c84647b          	cv.add.div8	s0,s0,s0
+.*:	6d4a6a7b          	cv.add.div8	s4,s4,s4
+.*:	6dffeffb          	cv.add.div8	t6,t6,t6
+.*:	0000007b          	cv.add.h	zero,zero,zero
+.*:	001080fb          	cv.add.h	ra,ra,ra
+.*:	0021017b          	cv.add.h	sp,sp,sp
+.*:	0084047b          	cv.add.h	s0,s0,s0
+.*:	014a0a7b          	cv.add.h	s4,s4,s4
+.*:	01ff8ffb          	cv.add.h	t6,t6,t6
+.*:	0000507b          	cv.add.sc.b	zero,zero,zero
+.*:	0010d0fb          	cv.add.sc.b	ra,ra,ra
+.*:	0021517b          	cv.add.sc.b	sp,sp,sp
+.*:	0084547b          	cv.add.sc.b	s0,s0,s0
+.*:	014a5a7b          	cv.add.sc.b	s4,s4,s4
+.*:	01ffdffb          	cv.add.sc.b	t6,t6,t6
+.*:	0000407b          	cv.add.sc.h	zero,zero,zero
+.*:	0010c0fb          	cv.add.sc.h	ra,ra,ra
+.*:	0021417b          	cv.add.sc.h	sp,sp,sp
+.*:	0084447b          	cv.add.sc.h	s0,s0,s0
+.*:	014a4a7b          	cv.add.sc.h	s4,s4,s4
+.*:	01ffcffb          	cv.add.sc.h	t6,t6,t6
+.*:	00a0707b          	cv.add.sci.b	zero,zero,20
+.*:	00a0f0fb          	cv.add.sci.b	ra,ra,20
+.*:	00a1717b          	cv.add.sci.b	sp,sp,20
+.*:	00a4747b          	cv.add.sci.b	s0,s0,20
+.*:	00aa7a7b          	cv.add.sci.b	s4,s4,20
+.*:	00affffb          	cv.add.sci.b	t6,t6,20
+.*:	0103f37b          	cv.add.sci.b	t1,t2,-32
+.*:	0003f37b          	cv.add.sci.b	t1,t2,0
+.*:	02f3f37b          	cv.add.sci.b	t1,t2,31
+.*:	00a0607b          	cv.add.sci.h	zero,zero,20
+.*:	00a0e0fb          	cv.add.sci.h	ra,ra,20
+.*:	00a1617b          	cv.add.sci.h	sp,sp,20
+.*:	00a4647b          	cv.add.sci.h	s0,s0,20
+.*:	00aa6a7b          	cv.add.sci.h	s4,s4,20
+.*:	00afeffb          	cv.add.sci.h	t6,t6,20
+.*:	0103e37b          	cv.add.sci.h	t1,t2,-32
+.*:	0003e37b          	cv.add.sci.h	t1,t2,0
+.*:	02f3e37b          	cv.add.sci.h	t1,t2,31
+.*:	6800107b          	cv.and.b	zero,zero,zero
+.*:	681090fb          	cv.and.b	ra,ra,ra
+.*:	6821117b          	cv.and.b	sp,sp,sp
+.*:	6884147b          	cv.and.b	s0,s0,s0
+.*:	694a1a7b          	cv.and.b	s4,s4,s4
+.*:	69ff9ffb          	cv.and.b	t6,t6,t6
+.*:	6800007b          	cv.and.h	zero,zero,zero
+.*:	681080fb          	cv.and.h	ra,ra,ra
+.*:	6821017b          	cv.and.h	sp,sp,sp
+.*:	6884047b          	cv.and.h	s0,s0,s0
+.*:	694a0a7b          	cv.and.h	s4,s4,s4
+.*:	69ff8ffb          	cv.and.h	t6,t6,t6
+.*:	6800507b          	cv.and.sc.b	zero,zero,zero
+.*:	6810d0fb          	cv.and.sc.b	ra,ra,ra
+.*:	6821517b          	cv.and.sc.b	sp,sp,sp
+.*:	6884547b          	cv.and.sc.b	s0,s0,s0
+.*:	694a5a7b          	cv.and.sc.b	s4,s4,s4
+.*:	69ffdffb          	cv.and.sc.b	t6,t6,t6
+.*:	6800407b          	cv.and.sc.h	zero,zero,zero
+.*:	6810c0fb          	cv.and.sc.h	ra,ra,ra
+.*:	6821417b          	cv.and.sc.h	sp,sp,sp
+.*:	6884447b          	cv.and.sc.h	s0,s0,s0
+.*:	694a4a7b          	cv.and.sc.h	s4,s4,s4
+.*:	69ffcffb          	cv.and.sc.h	t6,t6,t6
+.*:	68a0707b          	cv.and.sci.b	zero,zero,20
+.*:	68a0f0fb          	cv.and.sci.b	ra,ra,20
+.*:	68a1717b          	cv.and.sci.b	sp,sp,20
+.*:	68a4747b          	cv.and.sci.b	s0,s0,20
+.*:	68aa7a7b          	cv.and.sci.b	s4,s4,20
+.*:	68affffb          	cv.and.sci.b	t6,t6,20
+.*:	6903f37b          	cv.and.sci.b	t1,t2,-32
+.*:	6803f37b          	cv.and.sci.b	t1,t2,0
+.*:	6af3f37b          	cv.and.sci.b	t1,t2,31
+.*:	68a0607b          	cv.and.sci.h	zero,zero,20
+.*:	68a0e0fb          	cv.and.sci.h	ra,ra,20
+.*:	68a1617b          	cv.and.sci.h	sp,sp,20
+.*:	68a4647b          	cv.and.sci.h	s0,s0,20
+.*:	68aa6a7b          	cv.and.sci.h	s4,s4,20
+.*:	68afeffb          	cv.and.sci.h	t6,t6,20
+.*:	6903e37b          	cv.and.sci.h	t1,t2,-32
+.*:	6803e37b          	cv.and.sci.h	t1,t2,0
+.*:	6af3e37b          	cv.and.sci.h	t1,t2,31
+.*:	1000107b          	cv.avg.b	zero,zero,zero
+.*:	101090fb          	cv.avg.b	ra,ra,ra
+.*:	1021117b          	cv.avg.b	sp,sp,sp
+.*:	1084147b          	cv.avg.b	s0,s0,s0
+.*:	114a1a7b          	cv.avg.b	s4,s4,s4
+.*:	11ff9ffb          	cv.avg.b	t6,t6,t6
+.*:	1000007b          	cv.avg.h	zero,zero,zero
+.*:	101080fb          	cv.avg.h	ra,ra,ra
+.*:	1021017b          	cv.avg.h	sp,sp,sp
+.*:	1084047b          	cv.avg.h	s0,s0,s0
+.*:	114a0a7b          	cv.avg.h	s4,s4,s4
+.*:	11ff8ffb          	cv.avg.h	t6,t6,t6
+.*:	1000507b          	cv.avg.sc.b	zero,zero,zero
+.*:	1010d0fb          	cv.avg.sc.b	ra,ra,ra
+.*:	1021517b          	cv.avg.sc.b	sp,sp,sp
+.*:	1084547b          	cv.avg.sc.b	s0,s0,s0
+.*:	114a5a7b          	cv.avg.sc.b	s4,s4,s4
+.*:	11ffdffb          	cv.avg.sc.b	t6,t6,t6
+.*:	1000407b          	cv.avg.sc.h	zero,zero,zero
+.*:	1010c0fb          	cv.avg.sc.h	ra,ra,ra
+.*:	1021417b          	cv.avg.sc.h	sp,sp,sp
+.*:	1084447b          	cv.avg.sc.h	s0,s0,s0
+.*:	114a4a7b          	cv.avg.sc.h	s4,s4,s4
+.*:	11ffcffb          	cv.avg.sc.h	t6,t6,t6
+.*:	10a0707b          	cv.avg.sci.b	zero,zero,20
+.*:	10a0f0fb          	cv.avg.sci.b	ra,ra,20
+.*:	10a1717b          	cv.avg.sci.b	sp,sp,20
+.*:	10a4747b          	cv.avg.sci.b	s0,s0,20
+.*:	10aa7a7b          	cv.avg.sci.b	s4,s4,20
+.*:	10affffb          	cv.avg.sci.b	t6,t6,20
+.*:	1103f37b          	cv.avg.sci.b	t1,t2,-32
+.*:	1003f37b          	cv.avg.sci.b	t1,t2,0
+.*:	12f3f37b          	cv.avg.sci.b	t1,t2,31
+.*:	10a0607b          	cv.avg.sci.h	zero,zero,20
+.*:	10a0e0fb          	cv.avg.sci.h	ra,ra,20
+.*:	10a1617b          	cv.avg.sci.h	sp,sp,20
+.*:	10a4647b          	cv.avg.sci.h	s0,s0,20
+.*:	10aa6a7b          	cv.avg.sci.h	s4,s4,20
+.*:	10afeffb          	cv.avg.sci.h	t6,t6,20
+.*:	1103e37b          	cv.avg.sci.h	t1,t2,-32
+.*:	1003e37b          	cv.avg.sci.h	t1,t2,0
+.*:	12f3e37b          	cv.avg.sci.h	t1,t2,31
+.*:	1800107b          	cv.avgu.b	zero,zero,zero
+.*:	181090fb          	cv.avgu.b	ra,ra,ra
+.*:	1821117b          	cv.avgu.b	sp,sp,sp
+.*:	1884147b          	cv.avgu.b	s0,s0,s0
+.*:	194a1a7b          	cv.avgu.b	s4,s4,s4
+.*:	19ff9ffb          	cv.avgu.b	t6,t6,t6
+.*:	1800007b          	cv.avgu.h	zero,zero,zero
+.*:	181080fb          	cv.avgu.h	ra,ra,ra
+.*:	1821017b          	cv.avgu.h	sp,sp,sp
+.*:	1884047b          	cv.avgu.h	s0,s0,s0
+.*:	194a0a7b          	cv.avgu.h	s4,s4,s4
+.*:	19ff8ffb          	cv.avgu.h	t6,t6,t6
+.*:	1800507b          	cv.avgu.sc.b	zero,zero,zero
+.*:	1810d0fb          	cv.avgu.sc.b	ra,ra,ra
+.*:	1821517b          	cv.avgu.sc.b	sp,sp,sp
+.*:	1884547b          	cv.avgu.sc.b	s0,s0,s0
+.*:	194a5a7b          	cv.avgu.sc.b	s4,s4,s4
+.*:	19ffdffb          	cv.avgu.sc.b	t6,t6,t6
+.*:	1800407b          	cv.avgu.sc.h	zero,zero,zero
+.*:	1810c0fb          	cv.avgu.sc.h	ra,ra,ra
+.*:	1821417b          	cv.avgu.sc.h	sp,sp,sp
+.*:	1884447b          	cv.avgu.sc.h	s0,s0,s0
+.*:	194a4a7b          	cv.avgu.sc.h	s4,s4,s4
+.*:	19ffcffb          	cv.avgu.sc.h	t6,t6,t6
+.*:	18a0707b          	cv.avgu.sci.b	zero,zero,20
+.*:	18a0f0fb          	cv.avgu.sci.b	ra,ra,20
+.*:	18a1717b          	cv.avgu.sci.b	sp,sp,20
+.*:	18a4747b          	cv.avgu.sci.b	s0,s0,20
+.*:	18aa7a7b          	cv.avgu.sci.b	s4,s4,20
+.*:	18affffb          	cv.avgu.sci.b	t6,t6,20
+.*:	1803f37b          	cv.avgu.sci.b	t1,t2,0
+.*:	1bf3f37b          	cv.avgu.sci.b	t1,t2,63
+.*:	18a0607b          	cv.avgu.sci.h	zero,zero,20
+.*:	18a0e0fb          	cv.avgu.sci.h	ra,ra,20
+.*:	18a1617b          	cv.avgu.sci.h	sp,sp,20
+.*:	18a4647b          	cv.avgu.sci.h	s0,s0,20
+.*:	18aa6a7b          	cv.avgu.sci.h	s4,s4,20
+.*:	18afeffb          	cv.avgu.sci.h	t6,t6,20
+.*:	1803e37b          	cv.avgu.sci.h	t1,t2,0
+.*:	1bf3e37b          	cv.avgu.sci.h	t1,t2,63
+.*:	0400107b          	cv.cmpeq.b	zero,zero,zero
+.*:	041090fb          	cv.cmpeq.b	ra,ra,ra
+.*:	0421117b          	cv.cmpeq.b	sp,sp,sp
+.*:	0484147b          	cv.cmpeq.b	s0,s0,s0
+.*:	054a1a7b          	cv.cmpeq.b	s4,s4,s4
+.*:	05ff9ffb          	cv.cmpeq.b	t6,t6,t6
+.*:	0400007b          	cv.cmpeq.h	zero,zero,zero
+.*:	041080fb          	cv.cmpeq.h	ra,ra,ra
+.*:	0421017b          	cv.cmpeq.h	sp,sp,sp
+.*:	0484047b          	cv.cmpeq.h	s0,s0,s0
+.*:	054a0a7b          	cv.cmpeq.h	s4,s4,s4
+.*:	05ff8ffb          	cv.cmpeq.h	t6,t6,t6
+.*:	0400507b          	cv.cmpeq.sc.b	zero,zero,zero
+.*:	0410d0fb          	cv.cmpeq.sc.b	ra,ra,ra
+.*:	0421517b          	cv.cmpeq.sc.b	sp,sp,sp
+.*:	0484547b          	cv.cmpeq.sc.b	s0,s0,s0
+.*:	054a5a7b          	cv.cmpeq.sc.b	s4,s4,s4
+.*:	05ffdffb          	cv.cmpeq.sc.b	t6,t6,t6
+.*:	0400407b          	cv.cmpeq.sc.h	zero,zero,zero
+.*:	0410c0fb          	cv.cmpeq.sc.h	ra,ra,ra
+.*:	0421417b          	cv.cmpeq.sc.h	sp,sp,sp
+.*:	0484447b          	cv.cmpeq.sc.h	s0,s0,s0
+.*:	054a4a7b          	cv.cmpeq.sc.h	s4,s4,s4
+.*:	05ffcffb          	cv.cmpeq.sc.h	t6,t6,t6
+.*:	04a0707b          	cv.cmpeq.sci.b	zero,zero,20
+.*:	04a0f0fb          	cv.cmpeq.sci.b	ra,ra,20
+.*:	04a1717b          	cv.cmpeq.sci.b	sp,sp,20
+.*:	04a4747b          	cv.cmpeq.sci.b	s0,s0,20
+.*:	04aa7a7b          	cv.cmpeq.sci.b	s4,s4,20
+.*:	04affffb          	cv.cmpeq.sci.b	t6,t6,20
+.*:	0503f37b          	cv.cmpeq.sci.b	t1,t2,-32
+.*:	0403f37b          	cv.cmpeq.sci.b	t1,t2,0
+.*:	06f3f37b          	cv.cmpeq.sci.b	t1,t2,31
+.*:	04a0607b          	cv.cmpeq.sci.h	zero,zero,20
+.*:	04a0e0fb          	cv.cmpeq.sci.h	ra,ra,20
+.*:	04a1617b          	cv.cmpeq.sci.h	sp,sp,20
+.*:	04a4647b          	cv.cmpeq.sci.h	s0,s0,20
+.*:	04aa6a7b          	cv.cmpeq.sci.h	s4,s4,20
+.*:	04afeffb          	cv.cmpeq.sci.h	t6,t6,20
+.*:	0503e37b          	cv.cmpeq.sci.h	t1,t2,-32
+.*:	0403e37b          	cv.cmpeq.sci.h	t1,t2,0
+.*:	06f3e37b          	cv.cmpeq.sci.h	t1,t2,31
+.*:	1c00107b          	cv.cmpge.b	zero,zero,zero
+.*:	1c1090fb          	cv.cmpge.b	ra,ra,ra
+.*:	1c21117b          	cv.cmpge.b	sp,sp,sp
+.*:	1c84147b          	cv.cmpge.b	s0,s0,s0
+.*:	1d4a1a7b          	cv.cmpge.b	s4,s4,s4
+.*:	1dff9ffb          	cv.cmpge.b	t6,t6,t6
+.*:	1c00007b          	cv.cmpge.h	zero,zero,zero
+.*:	1c1080fb          	cv.cmpge.h	ra,ra,ra
+.*:	1c21017b          	cv.cmpge.h	sp,sp,sp
+.*:	1c84047b          	cv.cmpge.h	s0,s0,s0
+.*:	1d4a0a7b          	cv.cmpge.h	s4,s4,s4
+.*:	1dff8ffb          	cv.cmpge.h	t6,t6,t6
+.*:	1c00507b          	cv.cmpge.sc.b	zero,zero,zero
+.*:	1c10d0fb          	cv.cmpge.sc.b	ra,ra,ra
+.*:	1c21517b          	cv.cmpge.sc.b	sp,sp,sp
+.*:	1c84547b          	cv.cmpge.sc.b	s0,s0,s0
+.*:	1d4a5a7b          	cv.cmpge.sc.b	s4,s4,s4
+.*:	1dffdffb          	cv.cmpge.sc.b	t6,t6,t6
+.*:	1c00407b          	cv.cmpge.sc.h	zero,zero,zero
+.*:	1c10c0fb          	cv.cmpge.sc.h	ra,ra,ra
+.*:	1c21417b          	cv.cmpge.sc.h	sp,sp,sp
+.*:	1c84447b          	cv.cmpge.sc.h	s0,s0,s0
+.*:	1d4a4a7b          	cv.cmpge.sc.h	s4,s4,s4
+.*:	1dffcffb          	cv.cmpge.sc.h	t6,t6,t6
+.*:	1ca0707b          	cv.cmpge.sci.b	zero,zero,20
+.*:	1ca0f0fb          	cv.cmpge.sci.b	ra,ra,20
+.*:	1ca1717b          	cv.cmpge.sci.b	sp,sp,20
+.*:	1ca4747b          	cv.cmpge.sci.b	s0,s0,20
+.*:	1caa7a7b          	cv.cmpge.sci.b	s4,s4,20
+.*:	1caffffb          	cv.cmpge.sci.b	t6,t6,20
+.*:	1d03f37b          	cv.cmpge.sci.b	t1,t2,-32
+.*:	1c03f37b          	cv.cmpge.sci.b	t1,t2,0
+.*:	1ef3f37b          	cv.cmpge.sci.b	t1,t2,31
+.*:	1ca0607b          	cv.cmpge.sci.h	zero,zero,20
+.*:	1ca0e0fb          	cv.cmpge.sci.h	ra,ra,20
+.*:	1ca1617b          	cv.cmpge.sci.h	sp,sp,20
+.*:	1ca4647b          	cv.cmpge.sci.h	s0,s0,20
+.*:	1caa6a7b          	cv.cmpge.sci.h	s4,s4,20
+.*:	1cafeffb          	cv.cmpge.sci.h	t6,t6,20
+.*:	1d03e37b          	cv.cmpge.sci.h	t1,t2,-32
+.*:	1c03e37b          	cv.cmpge.sci.h	t1,t2,0
+.*:	1ef3e37b          	cv.cmpge.sci.h	t1,t2,31
+.*:	3c00107b          	cv.cmpgeu.b	zero,zero,zero
+.*:	3c1090fb          	cv.cmpgeu.b	ra,ra,ra
+.*:	3c21117b          	cv.cmpgeu.b	sp,sp,sp
+.*:	3c84147b          	cv.cmpgeu.b	s0,s0,s0
+.*:	3d4a1a7b          	cv.cmpgeu.b	s4,s4,s4
+.*:	3dff9ffb          	cv.cmpgeu.b	t6,t6,t6
+.*:	3c00007b          	cv.cmpgeu.h	zero,zero,zero
+.*:	3c1080fb          	cv.cmpgeu.h	ra,ra,ra
+.*:	3c21017b          	cv.cmpgeu.h	sp,sp,sp
+.*:	3c84047b          	cv.cmpgeu.h	s0,s0,s0
+.*:	3d4a0a7b          	cv.cmpgeu.h	s4,s4,s4
+.*:	3dff8ffb          	cv.cmpgeu.h	t6,t6,t6
+.*:	3c00507b          	cv.cmpgeu.sc.b	zero,zero,zero
+.*:	3c10d0fb          	cv.cmpgeu.sc.b	ra,ra,ra
+.*:	3c21517b          	cv.cmpgeu.sc.b	sp,sp,sp
+.*:	3c84547b          	cv.cmpgeu.sc.b	s0,s0,s0
+.*:	3d4a5a7b          	cv.cmpgeu.sc.b	s4,s4,s4
+.*:	3dffdffb          	cv.cmpgeu.sc.b	t6,t6,t6
+.*:	3c00407b          	cv.cmpgeu.sc.h	zero,zero,zero
+.*:	3c10c0fb          	cv.cmpgeu.sc.h	ra,ra,ra
+.*:	3c21417b          	cv.cmpgeu.sc.h	sp,sp,sp
+.*:	3c84447b          	cv.cmpgeu.sc.h	s0,s0,s0
+.*:	3d4a4a7b          	cv.cmpgeu.sc.h	s4,s4,s4
+.*:	3dffcffb          	cv.cmpgeu.sc.h	t6,t6,t6
+.*:	3ca0707b          	cv.cmpgeu.sci.b	zero,zero,20
+.*:	3ca0f0fb          	cv.cmpgeu.sci.b	ra,ra,20
+.*:	3ca1717b          	cv.cmpgeu.sci.b	sp,sp,20
+.*:	3ca4747b          	cv.cmpgeu.sci.b	s0,s0,20
+.*:	3caa7a7b          	cv.cmpgeu.sci.b	s4,s4,20
+.*:	3caffffb          	cv.cmpgeu.sci.b	t6,t6,20
+.*:	3c03f37b          	cv.cmpgeu.sci.b	t1,t2,0
+.*:	3ff3f37b          	cv.cmpgeu.sci.b	t1,t2,63
+.*:	3ca0607b          	cv.cmpgeu.sci.h	zero,zero,20
+.*:	3ca0e0fb          	cv.cmpgeu.sci.h	ra,ra,20
+.*:	3ca1617b          	cv.cmpgeu.sci.h	sp,sp,20
+.*:	3ca4647b          	cv.cmpgeu.sci.h	s0,s0,20
+.*:	3caa6a7b          	cv.cmpgeu.sci.h	s4,s4,20
+.*:	3cafeffb          	cv.cmpgeu.sci.h	t6,t6,20
+.*:	3c03e37b          	cv.cmpgeu.sci.h	t1,t2,0
+.*:	3ff3e37b          	cv.cmpgeu.sci.h	t1,t2,63
+.*:	1400107b          	cv.cmpgt.b	zero,zero,zero
+.*:	141090fb          	cv.cmpgt.b	ra,ra,ra
+.*:	1421117b          	cv.cmpgt.b	sp,sp,sp
+.*:	1484147b          	cv.cmpgt.b	s0,s0,s0
+.*:	154a1a7b          	cv.cmpgt.b	s4,s4,s4
+.*:	15ff9ffb          	cv.cmpgt.b	t6,t6,t6
+.*:	1400007b          	cv.cmpgt.h	zero,zero,zero
+.*:	141080fb          	cv.cmpgt.h	ra,ra,ra
+.*:	1421017b          	cv.cmpgt.h	sp,sp,sp
+.*:	1484047b          	cv.cmpgt.h	s0,s0,s0
+.*:	154a0a7b          	cv.cmpgt.h	s4,s4,s4
+.*:	15ff8ffb          	cv.cmpgt.h	t6,t6,t6
+.*:	1400507b          	cv.cmpgt.sc.b	zero,zero,zero
+.*:	1410d0fb          	cv.cmpgt.sc.b	ra,ra,ra
+.*:	1421517b          	cv.cmpgt.sc.b	sp,sp,sp
+.*:	1484547b          	cv.cmpgt.sc.b	s0,s0,s0
+.*:	154a5a7b          	cv.cmpgt.sc.b	s4,s4,s4
+.*:	15ffdffb          	cv.cmpgt.sc.b	t6,t6,t6
+.*:	1400407b          	cv.cmpgt.sc.h	zero,zero,zero
+.*:	1410c0fb          	cv.cmpgt.sc.h	ra,ra,ra
+.*:	1421417b          	cv.cmpgt.sc.h	sp,sp,sp
+.*:	1484447b          	cv.cmpgt.sc.h	s0,s0,s0
+.*:	154a4a7b          	cv.cmpgt.sc.h	s4,s4,s4
+.*:	15ffcffb          	cv.cmpgt.sc.h	t6,t6,t6
+.*:	14a0707b          	cv.cmpgt.sci.b	zero,zero,20
+.*:	14a0f0fb          	cv.cmpgt.sci.b	ra,ra,20
+.*:	14a1717b          	cv.cmpgt.sci.b	sp,sp,20
+.*:	14a4747b          	cv.cmpgt.sci.b	s0,s0,20
+.*:	14aa7a7b          	cv.cmpgt.sci.b	s4,s4,20
+.*:	14affffb          	cv.cmpgt.sci.b	t6,t6,20
+.*:	1503f37b          	cv.cmpgt.sci.b	t1,t2,-32
+.*:	1403f37b          	cv.cmpgt.sci.b	t1,t2,0
+.*:	16f3f37b          	cv.cmpgt.sci.b	t1,t2,31
+.*:	14a0607b          	cv.cmpgt.sci.h	zero,zero,20
+.*:	14a0e0fb          	cv.cmpgt.sci.h	ra,ra,20
+.*:	14a1617b          	cv.cmpgt.sci.h	sp,sp,20
+.*:	14a4647b          	cv.cmpgt.sci.h	s0,s0,20
+.*:	14aa6a7b          	cv.cmpgt.sci.h	s4,s4,20
+.*:	14afeffb          	cv.cmpgt.sci.h	t6,t6,20
+.*:	1503e37b          	cv.cmpgt.sci.h	t1,t2,-32
+.*:	1403e37b          	cv.cmpgt.sci.h	t1,t2,0
+.*:	16f3e37b          	cv.cmpgt.sci.h	t1,t2,31
+.*:	3400107b          	cv.cmpgtu.b	zero,zero,zero
+.*:	341090fb          	cv.cmpgtu.b	ra,ra,ra
+.*:	3421117b          	cv.cmpgtu.b	sp,sp,sp
+.*:	3484147b          	cv.cmpgtu.b	s0,s0,s0
+.*:	354a1a7b          	cv.cmpgtu.b	s4,s4,s4
+.*:	35ff9ffb          	cv.cmpgtu.b	t6,t6,t6
+.*:	3400007b          	cv.cmpgtu.h	zero,zero,zero
+.*:	341080fb          	cv.cmpgtu.h	ra,ra,ra
+.*:	3421017b          	cv.cmpgtu.h	sp,sp,sp
+.*:	3484047b          	cv.cmpgtu.h	s0,s0,s0
+.*:	354a0a7b          	cv.cmpgtu.h	s4,s4,s4
+.*:	35ff8ffb          	cv.cmpgtu.h	t6,t6,t6
+.*:	3400507b          	cv.cmpgtu.sc.b	zero,zero,zero
+.*:	3410d0fb          	cv.cmpgtu.sc.b	ra,ra,ra
+.*:	3421517b          	cv.cmpgtu.sc.b	sp,sp,sp
+.*:	3484547b          	cv.cmpgtu.sc.b	s0,s0,s0
+.*:	354a5a7b          	cv.cmpgtu.sc.b	s4,s4,s4
+.*:	35ffdffb          	cv.cmpgtu.sc.b	t6,t6,t6
+.*:	3400407b          	cv.cmpgtu.sc.h	zero,zero,zero
+.*:	3410c0fb          	cv.cmpgtu.sc.h	ra,ra,ra
+.*:	3421417b          	cv.cmpgtu.sc.h	sp,sp,sp
+.*:	3484447b          	cv.cmpgtu.sc.h	s0,s0,s0
+.*:	354a4a7b          	cv.cmpgtu.sc.h	s4,s4,s4
+.*:	35ffcffb          	cv.cmpgtu.sc.h	t6,t6,t6
+.*:	34a0707b          	cv.cmpgtu.sci.b	zero,zero,20
+.*:	34a0f0fb          	cv.cmpgtu.sci.b	ra,ra,20
+.*:	34a1717b          	cv.cmpgtu.sci.b	sp,sp,20
+.*:	34a4747b          	cv.cmpgtu.sci.b	s0,s0,20
+.*:	34aa7a7b          	cv.cmpgtu.sci.b	s4,s4,20
+.*:	34affffb          	cv.cmpgtu.sci.b	t6,t6,20
+.*:	3403f37b          	cv.cmpgtu.sci.b	t1,t2,0
+.*:	37f3f37b          	cv.cmpgtu.sci.b	t1,t2,63
+.*:	34a0607b          	cv.cmpgtu.sci.h	zero,zero,20
+.*:	34a0e0fb          	cv.cmpgtu.sci.h	ra,ra,20
+.*:	34a1617b          	cv.cmpgtu.sci.h	sp,sp,20
+.*:	34a4647b          	cv.cmpgtu.sci.h	s0,s0,20
+.*:	34aa6a7b          	cv.cmpgtu.sci.h	s4,s4,20
+.*:	34afeffb          	cv.cmpgtu.sci.h	t6,t6,20
+.*:	3403e37b          	cv.cmpgtu.sci.h	t1,t2,0
+.*:	37f3e37b          	cv.cmpgtu.sci.h	t1,t2,63
+.*:	2c00107b          	cv.cmple.b	zero,zero,zero
+.*:	2c1090fb          	cv.cmple.b	ra,ra,ra
+.*:	2c21117b          	cv.cmple.b	sp,sp,sp
+.*:	2c84147b          	cv.cmple.b	s0,s0,s0
+.*:	2d4a1a7b          	cv.cmple.b	s4,s4,s4
+.*:	2dff9ffb          	cv.cmple.b	t6,t6,t6
+.*:	2c00007b          	cv.cmple.h	zero,zero,zero
+.*:	2c1080fb          	cv.cmple.h	ra,ra,ra
+.*:	2c21017b          	cv.cmple.h	sp,sp,sp
+.*:	2c84047b          	cv.cmple.h	s0,s0,s0
+.*:	2d4a0a7b          	cv.cmple.h	s4,s4,s4
+.*:	2dff8ffb          	cv.cmple.h	t6,t6,t6
+.*:	2c00507b          	cv.cmple.sc.b	zero,zero,zero
+.*:	2c10d0fb          	cv.cmple.sc.b	ra,ra,ra
+.*:	2c21517b          	cv.cmple.sc.b	sp,sp,sp
+.*:	2c84547b          	cv.cmple.sc.b	s0,s0,s0
+.*:	2d4a5a7b          	cv.cmple.sc.b	s4,s4,s4
+.*:	2dffdffb          	cv.cmple.sc.b	t6,t6,t6
+.*:	2c00407b          	cv.cmple.sc.h	zero,zero,zero
+.*:	2c10c0fb          	cv.cmple.sc.h	ra,ra,ra
+.*:	2c21417b          	cv.cmple.sc.h	sp,sp,sp
+.*:	2c84447b          	cv.cmple.sc.h	s0,s0,s0
+.*:	2d4a4a7b          	cv.cmple.sc.h	s4,s4,s4
+.*:	2dffcffb          	cv.cmple.sc.h	t6,t6,t6
+.*:	2ca0707b          	cv.cmple.sci.b	zero,zero,20
+.*:	2ca0f0fb          	cv.cmple.sci.b	ra,ra,20
+.*:	2ca1717b          	cv.cmple.sci.b	sp,sp,20
+.*:	2ca4747b          	cv.cmple.sci.b	s0,s0,20
+.*:	2caa7a7b          	cv.cmple.sci.b	s4,s4,20
+.*:	2caffffb          	cv.cmple.sci.b	t6,t6,20
+.*:	2d03f37b          	cv.cmple.sci.b	t1,t2,-32
+.*:	2c03f37b          	cv.cmple.sci.b	t1,t2,0
+.*:	2ef3f37b          	cv.cmple.sci.b	t1,t2,31
+.*:	2ca0607b          	cv.cmple.sci.h	zero,zero,20
+.*:	2ca0e0fb          	cv.cmple.sci.h	ra,ra,20
+.*:	2ca1617b          	cv.cmple.sci.h	sp,sp,20
+.*:	2ca4647b          	cv.cmple.sci.h	s0,s0,20
+.*:	2caa6a7b          	cv.cmple.sci.h	s4,s4,20
+.*:	2cafeffb          	cv.cmple.sci.h	t6,t6,20
+.*:	2d03e37b          	cv.cmple.sci.h	t1,t2,-32
+.*:	2c03e37b          	cv.cmple.sci.h	t1,t2,0
+.*:	2ef3e37b          	cv.cmple.sci.h	t1,t2,31
+.*:	4c00107b          	cv.cmpleu.b	zero,zero,zero
+.*:	4c1090fb          	cv.cmpleu.b	ra,ra,ra
+.*:	4c21117b          	cv.cmpleu.b	sp,sp,sp
+.*:	4c84147b          	cv.cmpleu.b	s0,s0,s0
+.*:	4d4a1a7b          	cv.cmpleu.b	s4,s4,s4
+.*:	4dff9ffb          	cv.cmpleu.b	t6,t6,t6
+.*:	4c00007b          	cv.cmpleu.h	zero,zero,zero
+.*:	4c1080fb          	cv.cmpleu.h	ra,ra,ra
+.*:	4c21017b          	cv.cmpleu.h	sp,sp,sp
+.*:	4c84047b          	cv.cmpleu.h	s0,s0,s0
+.*:	4d4a0a7b          	cv.cmpleu.h	s4,s4,s4
+.*:	4dff8ffb          	cv.cmpleu.h	t6,t6,t6
+.*:	4c00507b          	cv.cmpleu.sc.b	zero,zero,zero
+.*:	4c10d0fb          	cv.cmpleu.sc.b	ra,ra,ra
+.*:	4c21517b          	cv.cmpleu.sc.b	sp,sp,sp
+.*:	4c84547b          	cv.cmpleu.sc.b	s0,s0,s0
+.*:	4d4a5a7b          	cv.cmpleu.sc.b	s4,s4,s4
+.*:	4dffdffb          	cv.cmpleu.sc.b	t6,t6,t6
+.*:	4c00407b          	cv.cmpleu.sc.h	zero,zero,zero
+.*:	4c10c0fb          	cv.cmpleu.sc.h	ra,ra,ra
+.*:	4c21417b          	cv.cmpleu.sc.h	sp,sp,sp
+.*:	4c84447b          	cv.cmpleu.sc.h	s0,s0,s0
+.*:	4d4a4a7b          	cv.cmpleu.sc.h	s4,s4,s4
+.*:	4dffcffb          	cv.cmpleu.sc.h	t6,t6,t6
+.*:	4ca0707b          	cv.cmpleu.sci.b	zero,zero,20
+.*:	4ca0f0fb          	cv.cmpleu.sci.b	ra,ra,20
+.*:	4ca1717b          	cv.cmpleu.sci.b	sp,sp,20
+.*:	4ca4747b          	cv.cmpleu.sci.b	s0,s0,20
+.*:	4caa7a7b          	cv.cmpleu.sci.b	s4,s4,20
+.*:	4caffffb          	cv.cmpleu.sci.b	t6,t6,20
+.*:	4c03f37b          	cv.cmpleu.sci.b	t1,t2,0
+.*:	4ff3f37b          	cv.cmpleu.sci.b	t1,t2,63
+.*:	4ca0607b          	cv.cmpleu.sci.h	zero,zero,20
+.*:	4ca0e0fb          	cv.cmpleu.sci.h	ra,ra,20
+.*:	4ca1617b          	cv.cmpleu.sci.h	sp,sp,20
+.*:	4ca4647b          	cv.cmpleu.sci.h	s0,s0,20
+.*:	4caa6a7b          	cv.cmpleu.sci.h	s4,s4,20
+.*:	4cafeffb          	cv.cmpleu.sci.h	t6,t6,20
+.*:	4c03e37b          	cv.cmpleu.sci.h	t1,t2,0
+.*:	4ff3e37b          	cv.cmpleu.sci.h	t1,t2,63
+.*:	2400107b          	cv.cmplt.b	zero,zero,zero
+.*:	241090fb          	cv.cmplt.b	ra,ra,ra
+.*:	2421117b          	cv.cmplt.b	sp,sp,sp
+.*:	2484147b          	cv.cmplt.b	s0,s0,s0
+.*:	254a1a7b          	cv.cmplt.b	s4,s4,s4
+.*:	25ff9ffb          	cv.cmplt.b	t6,t6,t6
+.*:	2400007b          	cv.cmplt.h	zero,zero,zero
+.*:	241080fb          	cv.cmplt.h	ra,ra,ra
+.*:	2421017b          	cv.cmplt.h	sp,sp,sp
+.*:	2484047b          	cv.cmplt.h	s0,s0,s0
+.*:	254a0a7b          	cv.cmplt.h	s4,s4,s4
+.*:	25ff8ffb          	cv.cmplt.h	t6,t6,t6
+.*:	2400507b          	cv.cmplt.sc.b	zero,zero,zero
+.*:	2410d0fb          	cv.cmplt.sc.b	ra,ra,ra
+.*:	2421517b          	cv.cmplt.sc.b	sp,sp,sp
+.*:	2484547b          	cv.cmplt.sc.b	s0,s0,s0
+.*:	254a5a7b          	cv.cmplt.sc.b	s4,s4,s4
+.*:	25ffdffb          	cv.cmplt.sc.b	t6,t6,t6
+.*:	2400407b          	cv.cmplt.sc.h	zero,zero,zero
+.*:	2410c0fb          	cv.cmplt.sc.h	ra,ra,ra
+.*:	2421417b          	cv.cmplt.sc.h	sp,sp,sp
+.*:	2484447b          	cv.cmplt.sc.h	s0,s0,s0
+.*:	254a4a7b          	cv.cmplt.sc.h	s4,s4,s4
+.*:	25ffcffb          	cv.cmplt.sc.h	t6,t6,t6
+.*:	24a0707b          	cv.cmplt.sci.b	zero,zero,20
+.*:	24a0f0fb          	cv.cmplt.sci.b	ra,ra,20
+.*:	24a1717b          	cv.cmplt.sci.b	sp,sp,20
+.*:	24a4747b          	cv.cmplt.sci.b	s0,s0,20
+.*:	24aa7a7b          	cv.cmplt.sci.b	s4,s4,20
+.*:	24affffb          	cv.cmplt.sci.b	t6,t6,20
+.*:	2503f37b          	cv.cmplt.sci.b	t1,t2,-32
+.*:	2403f37b          	cv.cmplt.sci.b	t1,t2,0
+.*:	26f3f37b          	cv.cmplt.sci.b	t1,t2,31
+.*:	24a0607b          	cv.cmplt.sci.h	zero,zero,20
+.*:	24a0e0fb          	cv.cmplt.sci.h	ra,ra,20
+.*:	24a1617b          	cv.cmplt.sci.h	sp,sp,20
+.*:	24a4647b          	cv.cmplt.sci.h	s0,s0,20
+.*:	24aa6a7b          	cv.cmplt.sci.h	s4,s4,20
+.*:	24afeffb          	cv.cmplt.sci.h	t6,t6,20
+.*:	2503e37b          	cv.cmplt.sci.h	t1,t2,-32
+.*:	2403e37b          	cv.cmplt.sci.h	t1,t2,0
+.*:	26f3e37b          	cv.cmplt.sci.h	t1,t2,31
+.*:	4400107b          	cv.cmpltu.b	zero,zero,zero
+.*:	441090fb          	cv.cmpltu.b	ra,ra,ra
+.*:	4421117b          	cv.cmpltu.b	sp,sp,sp
+.*:	4484147b          	cv.cmpltu.b	s0,s0,s0
+.*:	454a1a7b          	cv.cmpltu.b	s4,s4,s4
+.*:	45ff9ffb          	cv.cmpltu.b	t6,t6,t6
+.*:	4400007b          	cv.cmpltu.h	zero,zero,zero
+.*:	441080fb          	cv.cmpltu.h	ra,ra,ra
+.*:	4421017b          	cv.cmpltu.h	sp,sp,sp
+.*:	4484047b          	cv.cmpltu.h	s0,s0,s0
+.*:	454a0a7b          	cv.cmpltu.h	s4,s4,s4
+.*:	45ff8ffb          	cv.cmpltu.h	t6,t6,t6
+.*:	4400507b          	cv.cmpltu.sc.b	zero,zero,zero
+.*:	4410d0fb          	cv.cmpltu.sc.b	ra,ra,ra
+.*:	4421517b          	cv.cmpltu.sc.b	sp,sp,sp
+.*:	4484547b          	cv.cmpltu.sc.b	s0,s0,s0
+.*:	454a5a7b          	cv.cmpltu.sc.b	s4,s4,s4
+.*:	45ffdffb          	cv.cmpltu.sc.b	t6,t6,t6
+.*:	4400407b          	cv.cmpltu.sc.h	zero,zero,zero
+.*:	4410c0fb          	cv.cmpltu.sc.h	ra,ra,ra
+.*:	4421417b          	cv.cmpltu.sc.h	sp,sp,sp
+.*:	4484447b          	cv.cmpltu.sc.h	s0,s0,s0
+.*:	454a4a7b          	cv.cmpltu.sc.h	s4,s4,s4
+.*:	45ffcffb          	cv.cmpltu.sc.h	t6,t6,t6
+.*:	44a0707b          	cv.cmpltu.sci.b	zero,zero,20
+.*:	44a0f0fb          	cv.cmpltu.sci.b	ra,ra,20
+.*:	44a1717b          	cv.cmpltu.sci.b	sp,sp,20
+.*:	44a4747b          	cv.cmpltu.sci.b	s0,s0,20
+.*:	44aa7a7b          	cv.cmpltu.sci.b	s4,s4,20
+.*:	44affffb          	cv.cmpltu.sci.b	t6,t6,20
+.*:	4403f37b          	cv.cmpltu.sci.b	t1,t2,0
+.*:	47f3f37b          	cv.cmpltu.sci.b	t1,t2,63
+.*:	44a0607b          	cv.cmpltu.sci.h	zero,zero,20
+.*:	44a0e0fb          	cv.cmpltu.sci.h	ra,ra,20
+.*:	44a1617b          	cv.cmpltu.sci.h	sp,sp,20
+.*:	44a4647b          	cv.cmpltu.sci.h	s0,s0,20
+.*:	44aa6a7b          	cv.cmpltu.sci.h	s4,s4,20
+.*:	44afeffb          	cv.cmpltu.sci.h	t6,t6,20
+.*:	4403e37b          	cv.cmpltu.sci.h	t1,t2,0
+.*:	47f3e37b          	cv.cmpltu.sci.h	t1,t2,63
+.*:	0c00107b          	cv.cmpne.b	zero,zero,zero
+.*:	0c1090fb          	cv.cmpne.b	ra,ra,ra
+.*:	0c21117b          	cv.cmpne.b	sp,sp,sp
+.*:	0c84147b          	cv.cmpne.b	s0,s0,s0
+.*:	0d4a1a7b          	cv.cmpne.b	s4,s4,s4
+.*:	0dff9ffb          	cv.cmpne.b	t6,t6,t6
+.*:	0c00007b          	cv.cmpne.h	zero,zero,zero
+.*:	0c1080fb          	cv.cmpne.h	ra,ra,ra
+.*:	0c21017b          	cv.cmpne.h	sp,sp,sp
+.*:	0c84047b          	cv.cmpne.h	s0,s0,s0
+.*:	0d4a0a7b          	cv.cmpne.h	s4,s4,s4
+.*:	0dff8ffb          	cv.cmpne.h	t6,t6,t6
+.*:	0c00507b          	cv.cmpne.sc.b	zero,zero,zero
+.*:	0c10d0fb          	cv.cmpne.sc.b	ra,ra,ra
+.*:	0c21517b          	cv.cmpne.sc.b	sp,sp,sp
+.*:	0c84547b          	cv.cmpne.sc.b	s0,s0,s0
+.*:	0d4a5a7b          	cv.cmpne.sc.b	s4,s4,s4
+.*:	0dffdffb          	cv.cmpne.sc.b	t6,t6,t6
+.*:	0c00407b          	cv.cmpne.sc.h	zero,zero,zero
+.*:	0c10c0fb          	cv.cmpne.sc.h	ra,ra,ra
+.*:	0c21417b          	cv.cmpne.sc.h	sp,sp,sp
+.*:	0c84447b          	cv.cmpne.sc.h	s0,s0,s0
+.*:	0d4a4a7b          	cv.cmpne.sc.h	s4,s4,s4
+.*:	0dffcffb          	cv.cmpne.sc.h	t6,t6,t6
+.*:	0ca0707b          	cv.cmpne.sci.b	zero,zero,20
+.*:	0ca0f0fb          	cv.cmpne.sci.b	ra,ra,20
+.*:	0ca1717b          	cv.cmpne.sci.b	sp,sp,20
+.*:	0ca4747b          	cv.cmpne.sci.b	s0,s0,20
+.*:	0caa7a7b          	cv.cmpne.sci.b	s4,s4,20
+.*:	0caffffb          	cv.cmpne.sci.b	t6,t6,20
+.*:	0d03f37b          	cv.cmpne.sci.b	t1,t2,-32
+.*:	0c03f37b          	cv.cmpne.sci.b	t1,t2,0
+.*:	0ef3f37b          	cv.cmpne.sci.b	t1,t2,31
+.*:	0ca0607b          	cv.cmpne.sci.h	zero,zero,20
+.*:	0ca0e0fb          	cv.cmpne.sci.h	ra,ra,20
+.*:	0ca1617b          	cv.cmpne.sci.h	sp,sp,20
+.*:	0ca4647b          	cv.cmpne.sci.h	s0,s0,20
+.*:	0caa6a7b          	cv.cmpne.sci.h	s4,s4,20
+.*:	0cafeffb          	cv.cmpne.sci.h	t6,t6,20
+.*:	0d03e37b          	cv.cmpne.sci.h	t1,t2,-32
+.*:	0c03e37b          	cv.cmpne.sci.h	t1,t2,0
+.*:	0ef3e37b          	cv.cmpne.sci.h	t1,t2,31
+.*:	5c00007b          	cv.cplxconj	zero,zero
+.*:	5c0080fb          	cv.cplxconj	ra,ra
+.*:	5c01017b          	cv.cplxconj	sp,sp
+.*:	5c04047b          	cv.cplxconj	s0,s0
+.*:	5c0a0a7b          	cv.cplxconj	s4,s4
+.*:	5c0f8ffb          	cv.cplxconj	t6,t6
+.*:	5600207b          	cv.cplxmul.i.div2	zero,zero,zero
+.*:	5610a0fb          	cv.cplxmul.i.div2	ra,ra,ra
+.*:	5621217b          	cv.cplxmul.i.div2	sp,sp,sp
+.*:	5684247b          	cv.cplxmul.i.div2	s0,s0,s0
+.*:	574a2a7b          	cv.cplxmul.i.div2	s4,s4,s4
+.*:	57ffaffb          	cv.cplxmul.i.div2	t6,t6,t6
+.*:	5600407b          	cv.cplxmul.i.div4	zero,zero,zero
+.*:	5610c0fb          	cv.cplxmul.i.div4	ra,ra,ra
+.*:	5621417b          	cv.cplxmul.i.div4	sp,sp,sp
+.*:	5684447b          	cv.cplxmul.i.div4	s0,s0,s0
+.*:	574a4a7b          	cv.cplxmul.i.div4	s4,s4,s4
+.*:	57ffcffb          	cv.cplxmul.i.div4	t6,t6,t6
+.*:	5600607b          	cv.cplxmul.i.div8	zero,zero,zero
+.*:	5610e0fb          	cv.cplxmul.i.div8	ra,ra,ra
+.*:	5621617b          	cv.cplxmul.i.div8	sp,sp,sp
+.*:	5684647b          	cv.cplxmul.i.div8	s0,s0,s0
+.*:	574a6a7b          	cv.cplxmul.i.div8	s4,s4,s4
+.*:	57ffeffb          	cv.cplxmul.i.div8	t6,t6,t6
+.*:	5600007b          	cv.cplxmul.i	zero,zero,zero
+.*:	561080fb          	cv.cplxmul.i	ra,ra,ra
+.*:	5621017b          	cv.cplxmul.i	sp,sp,sp
+.*:	5684047b          	cv.cplxmul.i	s0,s0,s0
+.*:	574a0a7b          	cv.cplxmul.i	s4,s4,s4
+.*:	57ff8ffb          	cv.cplxmul.i	t6,t6,t6
+.*:	5400207b          	cv.cplxmul.r.div2	zero,zero,zero
+.*:	5410a0fb          	cv.cplxmul.r.div2	ra,ra,ra
+.*:	5421217b          	cv.cplxmul.r.div2	sp,sp,sp
+.*:	5484247b          	cv.cplxmul.r.div2	s0,s0,s0
+.*:	554a2a7b          	cv.cplxmul.r.div2	s4,s4,s4
+.*:	55ffaffb          	cv.cplxmul.r.div2	t6,t6,t6
+.*:	5400407b          	cv.cplxmul.r.div4	zero,zero,zero
+.*:	5410c0fb          	cv.cplxmul.r.div4	ra,ra,ra
+.*:	5421417b          	cv.cplxmul.r.div4	sp,sp,sp
+.*:	5484447b          	cv.cplxmul.r.div4	s0,s0,s0
+.*:	554a4a7b          	cv.cplxmul.r.div4	s4,s4,s4
+.*:	55ffcffb          	cv.cplxmul.r.div4	t6,t6,t6
+.*:	5400607b          	cv.cplxmul.r.div8	zero,zero,zero
+.*:	5410e0fb          	cv.cplxmul.r.div8	ra,ra,ra
+.*:	5421617b          	cv.cplxmul.r.div8	sp,sp,sp
+.*:	5484647b          	cv.cplxmul.r.div8	s0,s0,s0
+.*:	554a6a7b          	cv.cplxmul.r.div8	s4,s4,s4
+.*:	55ffeffb          	cv.cplxmul.r.div8	t6,t6,t6
+.*:	5400007b          	cv.cplxmul.r	zero,zero,zero
+.*:	541080fb          	cv.cplxmul.r	ra,ra,ra
+.*:	5421017b          	cv.cplxmul.r	sp,sp,sp
+.*:	5484047b          	cv.cplxmul.r	s0,s0,s0
+.*:	554a0a7b          	cv.cplxmul.r	s4,s4,s4
+.*:	55ff8ffb          	cv.cplxmul.r	t6,t6,t6
+.*:	9000107b          	cv.dotsp.b	zero,zero,zero
+.*:	901090fb          	cv.dotsp.b	ra,ra,ra
+.*:	9021117b          	cv.dotsp.b	sp,sp,sp
+.*:	9084147b          	cv.dotsp.b	s0,s0,s0
+.*:	914a1a7b          	cv.dotsp.b	s4,s4,s4
+.*:	91ff9ffb          	cv.dotsp.b	t6,t6,t6
+.*:	9000007b          	cv.dotsp.h	zero,zero,zero
+.*:	901080fb          	cv.dotsp.h	ra,ra,ra
+.*:	9021017b          	cv.dotsp.h	sp,sp,sp
+.*:	9084047b          	cv.dotsp.h	s0,s0,s0
+.*:	914a0a7b          	cv.dotsp.h	s4,s4,s4
+.*:	91ff8ffb          	cv.dotsp.h	t6,t6,t6
+.*:	9000507b          	cv.dotsp.sc.b	zero,zero,zero
+.*:	9010d0fb          	cv.dotsp.sc.b	ra,ra,ra
+.*:	9021517b          	cv.dotsp.sc.b	sp,sp,sp
+.*:	9084547b          	cv.dotsp.sc.b	s0,s0,s0
+.*:	914a5a7b          	cv.dotsp.sc.b	s4,s4,s4
+.*:	91ffdffb          	cv.dotsp.sc.b	t6,t6,t6
+.*:	9000407b          	cv.dotsp.sc.h	zero,zero,zero
+.*:	9010c0fb          	cv.dotsp.sc.h	ra,ra,ra
+.*:	9021417b          	cv.dotsp.sc.h	sp,sp,sp
+.*:	9084447b          	cv.dotsp.sc.h	s0,s0,s0
+.*:	914a4a7b          	cv.dotsp.sc.h	s4,s4,s4
+.*:	91ffcffb          	cv.dotsp.sc.h	t6,t6,t6
+.*:	90a0707b          	cv.dotsp.sci.b	zero,zero,20
+.*:	90a0f0fb          	cv.dotsp.sci.b	ra,ra,20
+.*:	90a1717b          	cv.dotsp.sci.b	sp,sp,20
+.*:	90a4747b          	cv.dotsp.sci.b	s0,s0,20
+.*:	90aa7a7b          	cv.dotsp.sci.b	s4,s4,20
+.*:	90affffb          	cv.dotsp.sci.b	t6,t6,20
+.*:	9103f37b          	cv.dotsp.sci.b	t1,t2,-32
+.*:	9003f37b          	cv.dotsp.sci.b	t1,t2,0
+.*:	92f3f37b          	cv.dotsp.sci.b	t1,t2,31
+.*:	90a0607b          	cv.dotsp.sci.h	zero,zero,20
+.*:	90a0e0fb          	cv.dotsp.sci.h	ra,ra,20
+.*:	90a1617b          	cv.dotsp.sci.h	sp,sp,20
+.*:	90a4647b          	cv.dotsp.sci.h	s0,s0,20
+.*:	90aa6a7b          	cv.dotsp.sci.h	s4,s4,20
+.*:	90afeffb          	cv.dotsp.sci.h	t6,t6,20
+.*:	9103e37b          	cv.dotsp.sci.h	t1,t2,-32
+.*:	9003e37b          	cv.dotsp.sci.h	t1,t2,0
+.*:	92f3e37b          	cv.dotsp.sci.h	t1,t2,31
+.*:	8000107b          	cv.dotup.b	zero,zero,zero
+.*:	801090fb          	cv.dotup.b	ra,ra,ra
+.*:	8021117b          	cv.dotup.b	sp,sp,sp
+.*:	8084147b          	cv.dotup.b	s0,s0,s0
+.*:	814a1a7b          	cv.dotup.b	s4,s4,s4
+.*:	81ff9ffb          	cv.dotup.b	t6,t6,t6
+.*:	8000007b          	cv.dotup.h	zero,zero,zero
+.*:	801080fb          	cv.dotup.h	ra,ra,ra
+.*:	8021017b          	cv.dotup.h	sp,sp,sp
+.*:	8084047b          	cv.dotup.h	s0,s0,s0
+.*:	814a0a7b          	cv.dotup.h	s4,s4,s4
+.*:	81ff8ffb          	cv.dotup.h	t6,t6,t6
+.*:	8000507b          	cv.dotup.sc.b	zero,zero,zero
+.*:	8010d0fb          	cv.dotup.sc.b	ra,ra,ra
+.*:	8021517b          	cv.dotup.sc.b	sp,sp,sp
+.*:	8084547b          	cv.dotup.sc.b	s0,s0,s0
+.*:	814a5a7b          	cv.dotup.sc.b	s4,s4,s4
+.*:	81ffdffb          	cv.dotup.sc.b	t6,t6,t6
+.*:	8000407b          	cv.dotup.sc.h	zero,zero,zero
+.*:	8010c0fb          	cv.dotup.sc.h	ra,ra,ra
+.*:	8021417b          	cv.dotup.sc.h	sp,sp,sp
+.*:	8084447b          	cv.dotup.sc.h	s0,s0,s0
+.*:	814a4a7b          	cv.dotup.sc.h	s4,s4,s4
+.*:	81ffcffb          	cv.dotup.sc.h	t6,t6,t6
+.*:	80a0707b          	cv.dotup.sci.b	zero,zero,20
+.*:	80a0f0fb          	cv.dotup.sci.b	ra,ra,20
+.*:	80a1717b          	cv.dotup.sci.b	sp,sp,20
+.*:	80a4747b          	cv.dotup.sci.b	s0,s0,20
+.*:	80aa7a7b          	cv.dotup.sci.b	s4,s4,20
+.*:	80affffb          	cv.dotup.sci.b	t6,t6,20
+.*:	8003f37b          	cv.dotup.sci.b	t1,t2,0
+.*:	83f3f37b          	cv.dotup.sci.b	t1,t2,63
+.*:	80a0607b          	cv.dotup.sci.h	zero,zero,20
+.*:	80a0e0fb          	cv.dotup.sci.h	ra,ra,20
+.*:	80a1617b          	cv.dotup.sci.h	sp,sp,20
+.*:	80a4647b          	cv.dotup.sci.h	s0,s0,20
+.*:	80aa6a7b          	cv.dotup.sci.h	s4,s4,20
+.*:	80afeffb          	cv.dotup.sci.h	t6,t6,20
+.*:	8003e37b          	cv.dotup.sci.h	t1,t2,0
+.*:	83f3e37b          	cv.dotup.sci.h	t1,t2,63
+.*:	8800107b          	cv.dotusp.b	zero,zero,zero
+.*:	881090fb          	cv.dotusp.b	ra,ra,ra
+.*:	8821117b          	cv.dotusp.b	sp,sp,sp
+.*:	8884147b          	cv.dotusp.b	s0,s0,s0
+.*:	894a1a7b          	cv.dotusp.b	s4,s4,s4
+.*:	89ff9ffb          	cv.dotusp.b	t6,t6,t6
+.*:	8800007b          	cv.dotusp.h	zero,zero,zero
+.*:	881080fb          	cv.dotusp.h	ra,ra,ra
+.*:	8821017b          	cv.dotusp.h	sp,sp,sp
+.*:	8884047b          	cv.dotusp.h	s0,s0,s0
+.*:	894a0a7b          	cv.dotusp.h	s4,s4,s4
+.*:	89ff8ffb          	cv.dotusp.h	t6,t6,t6
+.*:	8800507b          	cv.dotusp.sc.b	zero,zero,zero
+.*:	8810d0fb          	cv.dotusp.sc.b	ra,ra,ra
+.*:	8821517b          	cv.dotusp.sc.b	sp,sp,sp
+.*:	8884547b          	cv.dotusp.sc.b	s0,s0,s0
+.*:	894a5a7b          	cv.dotusp.sc.b	s4,s4,s4
+.*:	89ffdffb          	cv.dotusp.sc.b	t6,t6,t6
+.*:	8800407b          	cv.dotusp.sc.h	zero,zero,zero
+.*:	8810c0fb          	cv.dotusp.sc.h	ra,ra,ra
+.*:	8821417b          	cv.dotusp.sc.h	sp,sp,sp
+.*:	8884447b          	cv.dotusp.sc.h	s0,s0,s0
+.*:	894a4a7b          	cv.dotusp.sc.h	s4,s4,s4
+.*:	89ffcffb          	cv.dotusp.sc.h	t6,t6,t6
+.*:	88a0707b          	cv.dotusp.sci.b	zero,zero,20
+.*:	88a0f0fb          	cv.dotusp.sci.b	ra,ra,20
+.*:	88a1717b          	cv.dotusp.sci.b	sp,sp,20
+.*:	88a4747b          	cv.dotusp.sci.b	s0,s0,20
+.*:	88aa7a7b          	cv.dotusp.sci.b	s4,s4,20
+.*:	88affffb          	cv.dotusp.sci.b	t6,t6,20
+.*:	8903f37b          	cv.dotusp.sci.b	t1,t2,-32
+.*:	8803f37b          	cv.dotusp.sci.b	t1,t2,0
+.*:	8af3f37b          	cv.dotusp.sci.b	t1,t2,31
+.*:	88a0607b          	cv.dotusp.sci.h	zero,zero,20
+.*:	88a0e0fb          	cv.dotusp.sci.h	ra,ra,20
+.*:	88a1617b          	cv.dotusp.sci.h	sp,sp,20
+.*:	88a4647b          	cv.dotusp.sci.h	s0,s0,20
+.*:	88aa6a7b          	cv.dotusp.sci.h	s4,s4,20
+.*:	88afeffb          	cv.dotusp.sci.h	t6,t6,20
+.*:	8903e37b          	cv.dotusp.sci.h	t1,t2,-32
+.*:	8803e37b          	cv.dotusp.sci.h	t1,t2,0
+.*:	8af3e37b          	cv.dotusp.sci.h	t1,t2,31
+.*:	b810107b          	cv.extract.b	zero,zero,2
+.*:	b81090fb          	cv.extract.b	ra,ra,2
+.*:	b811117b          	cv.extract.b	sp,sp,2
+.*:	b814147b          	cv.extract.b	s0,s0,2
+.*:	b81a1a7b          	cv.extract.b	s4,s4,2
+.*:	b81f9ffb          	cv.extract.b	t6,t6,2
+.*:	b803937b          	cv.extract.b	t1,t2,0
+.*:	ba13937b          	cv.extract.b	t1,t2,3
+.*:	ba00007b          	cv.extract.h	zero,zero,1
+.*:	ba0080fb          	cv.extract.h	ra,ra,1
+.*:	ba01017b          	cv.extract.h	sp,sp,1
+.*:	ba04047b          	cv.extract.h	s0,s0,1
+.*:	ba0a0a7b          	cv.extract.h	s4,s4,1
+.*:	ba0f8ffb          	cv.extract.h	t6,t6,1
+.*:	b803837b          	cv.extract.h	t1,t2,0
+.*:	ba03837b          	cv.extract.h	t1,t2,1
+.*:	b810307b          	cv.extractu.b	zero,zero,2
+.*:	b810b0fb          	cv.extractu.b	ra,ra,2
+.*:	b811317b          	cv.extractu.b	sp,sp,2
+.*:	b814347b          	cv.extractu.b	s0,s0,2
+.*:	b81a3a7b          	cv.extractu.b	s4,s4,2
+.*:	b81fbffb          	cv.extractu.b	t6,t6,2
+.*:	b803b37b          	cv.extractu.b	t1,t2,0
+.*:	ba13b37b          	cv.extractu.b	t1,t2,3
+.*:	ba00207b          	cv.extractu.h	zero,zero,1
+.*:	ba00a0fb          	cv.extractu.h	ra,ra,1
+.*:	ba01217b          	cv.extractu.h	sp,sp,1
+.*:	ba04247b          	cv.extractu.h	s0,s0,1
+.*:	ba0a2a7b          	cv.extractu.h	s4,s4,1
+.*:	ba0faffb          	cv.extractu.h	t6,t6,1
+.*:	b803a37b          	cv.extractu.h	t1,t2,0
+.*:	ba03a37b          	cv.extractu.h	t1,t2,1
+.*:	b810507b          	cv.insert.b	zero,zero,2
+.*:	b810d0fb          	cv.insert.b	ra,ra,2
+.*:	b811517b          	cv.insert.b	sp,sp,2
+.*:	b814547b          	cv.insert.b	s0,s0,2
+.*:	b81a5a7b          	cv.insert.b	s4,s4,2
+.*:	b81fdffb          	cv.insert.b	t6,t6,2
+.*:	b803d37b          	cv.insert.b	t1,t2,0
+.*:	ba13d37b          	cv.insert.b	t1,t2,3
+.*:	ba00407b          	cv.insert.h	zero,zero,1
+.*:	ba00c0fb          	cv.insert.h	ra,ra,1
+.*:	ba01417b          	cv.insert.h	sp,sp,1
+.*:	ba04447b          	cv.insert.h	s0,s0,1
+.*:	ba0a4a7b          	cv.insert.h	s4,s4,1
+.*:	ba0fcffb          	cv.insert.h	t6,t6,1
+.*:	b803c37b          	cv.insert.h	t1,t2,0
+.*:	ba03c37b          	cv.insert.h	t1,t2,1
+.*:	3000107b          	cv.max.b	zero,zero,zero
+.*:	301090fb          	cv.max.b	ra,ra,ra
+.*:	3021117b          	cv.max.b	sp,sp,sp
+.*:	3084147b          	cv.max.b	s0,s0,s0
+.*:	314a1a7b          	cv.max.b	s4,s4,s4
+.*:	31ff9ffb          	cv.max.b	t6,t6,t6
+.*:	3000007b          	cv.max.h	zero,zero,zero
+.*:	301080fb          	cv.max.h	ra,ra,ra
+.*:	3021017b          	cv.max.h	sp,sp,sp
+.*:	3084047b          	cv.max.h	s0,s0,s0
+.*:	314a0a7b          	cv.max.h	s4,s4,s4
+.*:	31ff8ffb          	cv.max.h	t6,t6,t6
+.*:	3000507b          	cv.max.sc.b	zero,zero,zero
+.*:	3010d0fb          	cv.max.sc.b	ra,ra,ra
+.*:	3021517b          	cv.max.sc.b	sp,sp,sp
+.*:	3084547b          	cv.max.sc.b	s0,s0,s0
+.*:	314a5a7b          	cv.max.sc.b	s4,s4,s4
+.*:	31ffdffb          	cv.max.sc.b	t6,t6,t6
+.*:	3000407b          	cv.max.sc.h	zero,zero,zero
+.*:	3010c0fb          	cv.max.sc.h	ra,ra,ra
+.*:	3021417b          	cv.max.sc.h	sp,sp,sp
+.*:	3084447b          	cv.max.sc.h	s0,s0,s0
+.*:	314a4a7b          	cv.max.sc.h	s4,s4,s4
+.*:	31ffcffb          	cv.max.sc.h	t6,t6,t6
+.*:	30a0707b          	cv.max.sci.b	zero,zero,20
+.*:	30a0f0fb          	cv.max.sci.b	ra,ra,20
+.*:	30a1717b          	cv.max.sci.b	sp,sp,20
+.*:	30a4747b          	cv.max.sci.b	s0,s0,20
+.*:	30aa7a7b          	cv.max.sci.b	s4,s4,20
+.*:	30affffb          	cv.max.sci.b	t6,t6,20
+.*:	3103f37b          	cv.max.sci.b	t1,t2,-32
+.*:	3003f37b          	cv.max.sci.b	t1,t2,0
+.*:	32f3f37b          	cv.max.sci.b	t1,t2,31
+.*:	30a0607b          	cv.max.sci.h	zero,zero,20
+.*:	30a0e0fb          	cv.max.sci.h	ra,ra,20
+.*:	30a1617b          	cv.max.sci.h	sp,sp,20
+.*:	30a4647b          	cv.max.sci.h	s0,s0,20
+.*:	30aa6a7b          	cv.max.sci.h	s4,s4,20
+.*:	30afeffb          	cv.max.sci.h	t6,t6,20
+.*:	3103e37b          	cv.max.sci.h	t1,t2,-32
+.*:	3003e37b          	cv.max.sci.h	t1,t2,0
+.*:	32f3e37b          	cv.max.sci.h	t1,t2,31
+.*:	3800107b          	cv.maxu.b	zero,zero,zero
+.*:	381090fb          	cv.maxu.b	ra,ra,ra
+.*:	3821117b          	cv.maxu.b	sp,sp,sp
+.*:	3884147b          	cv.maxu.b	s0,s0,s0
+.*:	394a1a7b          	cv.maxu.b	s4,s4,s4
+.*:	39ff9ffb          	cv.maxu.b	t6,t6,t6
+.*:	3800007b          	cv.maxu.h	zero,zero,zero
+.*:	381080fb          	cv.maxu.h	ra,ra,ra
+.*:	3821017b          	cv.maxu.h	sp,sp,sp
+.*:	3884047b          	cv.maxu.h	s0,s0,s0
+.*:	394a0a7b          	cv.maxu.h	s4,s4,s4
+.*:	39ff8ffb          	cv.maxu.h	t6,t6,t6
+.*:	3800507b          	cv.maxu.sc.b	zero,zero,zero
+.*:	3810d0fb          	cv.maxu.sc.b	ra,ra,ra
+.*:	3821517b          	cv.maxu.sc.b	sp,sp,sp
+.*:	3884547b          	cv.maxu.sc.b	s0,s0,s0
+.*:	394a5a7b          	cv.maxu.sc.b	s4,s4,s4
+.*:	39ffdffb          	cv.maxu.sc.b	t6,t6,t6
+.*:	3800407b          	cv.maxu.sc.h	zero,zero,zero
+.*:	3810c0fb          	cv.maxu.sc.h	ra,ra,ra
+.*:	3821417b          	cv.maxu.sc.h	sp,sp,sp
+.*:	3884447b          	cv.maxu.sc.h	s0,s0,s0
+.*:	394a4a7b          	cv.maxu.sc.h	s4,s4,s4
+.*:	39ffcffb          	cv.maxu.sc.h	t6,t6,t6
+.*:	38a0707b          	cv.maxu.sci.b	zero,zero,20
+.*:	38a0f0fb          	cv.maxu.sci.b	ra,ra,20
+.*:	38a1717b          	cv.maxu.sci.b	sp,sp,20
+.*:	38a4747b          	cv.maxu.sci.b	s0,s0,20
+.*:	38aa7a7b          	cv.maxu.sci.b	s4,s4,20
+.*:	38affffb          	cv.maxu.sci.b	t6,t6,20
+.*:	3803f37b          	cv.maxu.sci.b	t1,t2,0
+.*:	3bf3f37b          	cv.maxu.sci.b	t1,t2,63
+.*:	38a0607b          	cv.maxu.sci.h	zero,zero,20
+.*:	38a0e0fb          	cv.maxu.sci.h	ra,ra,20
+.*:	38a1617b          	cv.maxu.sci.h	sp,sp,20
+.*:	38a4647b          	cv.maxu.sci.h	s0,s0,20
+.*:	38aa6a7b          	cv.maxu.sci.h	s4,s4,20
+.*:	38afeffb          	cv.maxu.sci.h	t6,t6,20
+.*:	3803e37b          	cv.maxu.sci.h	t1,t2,0
+.*:	3bf3e37b          	cv.maxu.sci.h	t1,t2,63
+.*:	2000107b          	cv.min.b	zero,zero,zero
+.*:	201090fb          	cv.min.b	ra,ra,ra
+.*:	2021117b          	cv.min.b	sp,sp,sp
+.*:	2084147b          	cv.min.b	s0,s0,s0
+.*:	214a1a7b          	cv.min.b	s4,s4,s4
+.*:	21ff9ffb          	cv.min.b	t6,t6,t6
+.*:	2000007b          	cv.min.h	zero,zero,zero
+.*:	201080fb          	cv.min.h	ra,ra,ra
+.*:	2021017b          	cv.min.h	sp,sp,sp
+.*:	2084047b          	cv.min.h	s0,s0,s0
+.*:	214a0a7b          	cv.min.h	s4,s4,s4
+.*:	21ff8ffb          	cv.min.h	t6,t6,t6
+.*:	2000507b          	cv.min.sc.b	zero,zero,zero
+.*:	2010d0fb          	cv.min.sc.b	ra,ra,ra
+.*:	2021517b          	cv.min.sc.b	sp,sp,sp
+.*:	2084547b          	cv.min.sc.b	s0,s0,s0
+.*:	214a5a7b          	cv.min.sc.b	s4,s4,s4
+.*:	21ffdffb          	cv.min.sc.b	t6,t6,t6
+.*:	2000407b          	cv.min.sc.h	zero,zero,zero
+.*:	2010c0fb          	cv.min.sc.h	ra,ra,ra
+.*:	2021417b          	cv.min.sc.h	sp,sp,sp
+.*:	2084447b          	cv.min.sc.h	s0,s0,s0
+.*:	214a4a7b          	cv.min.sc.h	s4,s4,s4
+.*:	21ffcffb          	cv.min.sc.h	t6,t6,t6
+.*:	20a0707b          	cv.min.sci.b	zero,zero,20
+.*:	20a0f0fb          	cv.min.sci.b	ra,ra,20
+.*:	20a1717b          	cv.min.sci.b	sp,sp,20
+.*:	20a4747b          	cv.min.sci.b	s0,s0,20
+.*:	20aa7a7b          	cv.min.sci.b	s4,s4,20
+.*:	20affffb          	cv.min.sci.b	t6,t6,20
+.*:	2103f37b          	cv.min.sci.b	t1,t2,-32
+.*:	2003f37b          	cv.min.sci.b	t1,t2,0
+.*:	22f3f37b          	cv.min.sci.b	t1,t2,31
+.*:	20a0607b          	cv.min.sci.h	zero,zero,20
+.*:	20a0e0fb          	cv.min.sci.h	ra,ra,20
+.*:	20a1617b          	cv.min.sci.h	sp,sp,20
+.*:	20a4647b          	cv.min.sci.h	s0,s0,20
+.*:	20aa6a7b          	cv.min.sci.h	s4,s4,20
+.*:	20afeffb          	cv.min.sci.h	t6,t6,20
+.*:	2103e37b          	cv.min.sci.h	t1,t2,-32
+.*:	2003e37b          	cv.min.sci.h	t1,t2,0
+.*:	22f3e37b          	cv.min.sci.h	t1,t2,31
+.*:	2800107b          	cv.minu.b	zero,zero,zero
+.*:	281090fb          	cv.minu.b	ra,ra,ra
+.*:	2821117b          	cv.minu.b	sp,sp,sp
+.*:	2884147b          	cv.minu.b	s0,s0,s0
+.*:	294a1a7b          	cv.minu.b	s4,s4,s4
+.*:	29ff9ffb          	cv.minu.b	t6,t6,t6
+.*:	2800007b          	cv.minu.h	zero,zero,zero
+.*:	281080fb          	cv.minu.h	ra,ra,ra
+.*:	2821017b          	cv.minu.h	sp,sp,sp
+.*:	2884047b          	cv.minu.h	s0,s0,s0
+.*:	294a0a7b          	cv.minu.h	s4,s4,s4
+.*:	29ff8ffb          	cv.minu.h	t6,t6,t6
+.*:	2800507b          	cv.minu.sc.b	zero,zero,zero
+.*:	2810d0fb          	cv.minu.sc.b	ra,ra,ra
+.*:	2821517b          	cv.minu.sc.b	sp,sp,sp
+.*:	2884547b          	cv.minu.sc.b	s0,s0,s0
+.*:	294a5a7b          	cv.minu.sc.b	s4,s4,s4
+.*:	29ffdffb          	cv.minu.sc.b	t6,t6,t6
+.*:	2800407b          	cv.minu.sc.h	zero,zero,zero
+.*:	2810c0fb          	cv.minu.sc.h	ra,ra,ra
+.*:	2821417b          	cv.minu.sc.h	sp,sp,sp
+.*:	2884447b          	cv.minu.sc.h	s0,s0,s0
+.*:	294a4a7b          	cv.minu.sc.h	s4,s4,s4
+.*:	29ffcffb          	cv.minu.sc.h	t6,t6,t6
+.*:	28a0707b          	cv.minu.sci.b	zero,zero,20
+.*:	28a0f0fb          	cv.minu.sci.b	ra,ra,20
+.*:	28a1717b          	cv.minu.sci.b	sp,sp,20
+.*:	28a4747b          	cv.minu.sci.b	s0,s0,20
+.*:	28aa7a7b          	cv.minu.sci.b	s4,s4,20
+.*:	28affffb          	cv.minu.sci.b	t6,t6,20
+.*:	2803f37b          	cv.minu.sci.b	t1,t2,0
+.*:	2bf3f37b          	cv.minu.sci.b	t1,t2,63
+.*:	28a0607b          	cv.minu.sci.h	zero,zero,20
+.*:	28a0e0fb          	cv.minu.sci.h	ra,ra,20
+.*:	28a1617b          	cv.minu.sci.h	sp,sp,20
+.*:	28a4647b          	cv.minu.sci.h	s0,s0,20
+.*:	28aa6a7b          	cv.minu.sci.h	s4,s4,20
+.*:	28afeffb          	cv.minu.sci.h	t6,t6,20
+.*:	2803e37b          	cv.minu.sci.h	t1,t2,0
+.*:	2bf3e37b          	cv.minu.sci.h	t1,t2,63
+.*:	5800107b          	cv.or.b	zero,zero,zero
+.*:	581090fb          	cv.or.b	ra,ra,ra
+.*:	5821117b          	cv.or.b	sp,sp,sp
+.*:	5884147b          	cv.or.b	s0,s0,s0
+.*:	594a1a7b          	cv.or.b	s4,s4,s4
+.*:	59ff9ffb          	cv.or.b	t6,t6,t6
+.*:	5800007b          	cv.or.h	zero,zero,zero
+.*:	581080fb          	cv.or.h	ra,ra,ra
+.*:	5821017b          	cv.or.h	sp,sp,sp
+.*:	5884047b          	cv.or.h	s0,s0,s0
+.*:	594a0a7b          	cv.or.h	s4,s4,s4
+.*:	59ff8ffb          	cv.or.h	t6,t6,t6
+.*:	5800507b          	cv.or.sc.b	zero,zero,zero
+.*:	5810d0fb          	cv.or.sc.b	ra,ra,ra
+.*:	5821517b          	cv.or.sc.b	sp,sp,sp
+.*:	5884547b          	cv.or.sc.b	s0,s0,s0
+.*:	594a5a7b          	cv.or.sc.b	s4,s4,s4
+.*:	59ffdffb          	cv.or.sc.b	t6,t6,t6
+.*:	5800407b          	cv.or.sc.h	zero,zero,zero
+.*:	5810c0fb          	cv.or.sc.h	ra,ra,ra
+.*:	5821417b          	cv.or.sc.h	sp,sp,sp
+.*:	5884447b          	cv.or.sc.h	s0,s0,s0
+.*:	594a4a7b          	cv.or.sc.h	s4,s4,s4
+.*:	59ffcffb          	cv.or.sc.h	t6,t6,t6
+.*:	58a0707b          	cv.or.sci.b	zero,zero,20
+.*:	58a0f0fb          	cv.or.sci.b	ra,ra,20
+.*:	58a1717b          	cv.or.sci.b	sp,sp,20
+.*:	58a4747b          	cv.or.sci.b	s0,s0,20
+.*:	58aa7a7b          	cv.or.sci.b	s4,s4,20
+.*:	58affffb          	cv.or.sci.b	t6,t6,20
+.*:	5903f37b          	cv.or.sci.b	t1,t2,-32
+.*:	5803f37b          	cv.or.sci.b	t1,t2,0
+.*:	5af3f37b          	cv.or.sci.b	t1,t2,31
+.*:	58a0607b          	cv.or.sci.h	zero,zero,20
+.*:	58a0e0fb          	cv.or.sci.h	ra,ra,20
+.*:	58a1617b          	cv.or.sci.h	sp,sp,20
+.*:	58a4647b          	cv.or.sci.h	s0,s0,20
+.*:	58aa6a7b          	cv.or.sci.h	s4,s4,20
+.*:	58afeffb          	cv.or.sci.h	t6,t6,20
+.*:	5903e37b          	cv.or.sci.h	t1,t2,-32
+.*:	5803e37b          	cv.or.sci.h	t1,t2,0
+.*:	5af3e37b          	cv.or.sci.h	t1,t2,31
+.*:	fa00107b          	cv.packhi.b	zero,zero,zero
+.*:	fa1090fb          	cv.packhi.b	ra,ra,ra
+.*:	fa21117b          	cv.packhi.b	sp,sp,sp
+.*:	fa84147b          	cv.packhi.b	s0,s0,s0
+.*:	fb4a1a7b          	cv.packhi.b	s4,s4,s4
+.*:	fbff9ffb          	cv.packhi.b	t6,t6,t6
+.*:	f200007b          	cv.pack.h	zero,zero,zero
+.*:	f21080fb          	cv.pack.h	ra,ra,ra
+.*:	f221017b          	cv.pack.h	sp,sp,sp
+.*:	f284047b          	cv.pack.h	s0,s0,s0
+.*:	f34a0a7b          	cv.pack.h	s4,s4,s4
+.*:	f3ff8ffb          	cv.pack.h	t6,t6,t6
+.*:	f800107b          	cv.packlo.b	zero,zero,zero
+.*:	f81090fb          	cv.packlo.b	ra,ra,ra
+.*:	f821117b          	cv.packlo.b	sp,sp,sp
+.*:	f884147b          	cv.packlo.b	s0,s0,s0
+.*:	f94a1a7b          	cv.packlo.b	s4,s4,s4
+.*:	f9ff9ffb          	cv.packlo.b	t6,t6,t6
+.*:	f000007b          	cv.pack	zero,zero,zero
+.*:	f01080fb          	cv.pack	ra,ra,ra
+.*:	f021017b          	cv.pack	sp,sp,sp
+.*:	f084047b          	cv.pack	s0,s0,s0
+.*:	f14a0a7b          	cv.pack	s4,s4,s4
+.*:	f1ff8ffb          	cv.pack	t6,t6,t6
+.*:	a800107b          	cv.sdotsp.b	zero,zero,zero
+.*:	a81090fb          	cv.sdotsp.b	ra,ra,ra
+.*:	a821117b          	cv.sdotsp.b	sp,sp,sp
+.*:	a884147b          	cv.sdotsp.b	s0,s0,s0
+.*:	a94a1a7b          	cv.sdotsp.b	s4,s4,s4
+.*:	a9ff9ffb          	cv.sdotsp.b	t6,t6,t6
+.*:	a800007b          	cv.sdotsp.h	zero,zero,zero
+.*:	a81080fb          	cv.sdotsp.h	ra,ra,ra
+.*:	a821017b          	cv.sdotsp.h	sp,sp,sp
+.*:	a884047b          	cv.sdotsp.h	s0,s0,s0
+.*:	a94a0a7b          	cv.sdotsp.h	s4,s4,s4
+.*:	a9ff8ffb          	cv.sdotsp.h	t6,t6,t6
+.*:	a800507b          	cv.sdotsp.sc.b	zero,zero,zero
+.*:	a810d0fb          	cv.sdotsp.sc.b	ra,ra,ra
+.*:	a821517b          	cv.sdotsp.sc.b	sp,sp,sp
+.*:	a884547b          	cv.sdotsp.sc.b	s0,s0,s0
+.*:	a94a5a7b          	cv.sdotsp.sc.b	s4,s4,s4
+.*:	a9ffdffb          	cv.sdotsp.sc.b	t6,t6,t6
+.*:	a800407b          	cv.sdotsp.sc.h	zero,zero,zero
+.*:	a810c0fb          	cv.sdotsp.sc.h	ra,ra,ra
+.*:	a821417b          	cv.sdotsp.sc.h	sp,sp,sp
+.*:	a884447b          	cv.sdotsp.sc.h	s0,s0,s0
+.*:	a94a4a7b          	cv.sdotsp.sc.h	s4,s4,s4
+.*:	a9ffcffb          	cv.sdotsp.sc.h	t6,t6,t6
+.*:	a8a0707b          	cv.sdotsp.sci.b	zero,zero,20
+.*:	a8a0f0fb          	cv.sdotsp.sci.b	ra,ra,20
+.*:	a8a1717b          	cv.sdotsp.sci.b	sp,sp,20
+.*:	a8a4747b          	cv.sdotsp.sci.b	s0,s0,20
+.*:	a8aa7a7b          	cv.sdotsp.sci.b	s4,s4,20
+.*:	a8affffb          	cv.sdotsp.sci.b	t6,t6,20
+.*:	a903f37b          	cv.sdotsp.sci.b	t1,t2,-32
+.*:	a803f37b          	cv.sdotsp.sci.b	t1,t2,0
+.*:	aaf3f37b          	cv.sdotsp.sci.b	t1,t2,31
+.*:	a8a0607b          	cv.sdotsp.sci.h	zero,zero,20
+.*:	a8a0e0fb          	cv.sdotsp.sci.h	ra,ra,20
+.*:	a8a1617b          	cv.sdotsp.sci.h	sp,sp,20
+.*:	a8a4647b          	cv.sdotsp.sci.h	s0,s0,20
+.*:	a8aa6a7b          	cv.sdotsp.sci.h	s4,s4,20
+.*:	a8afeffb          	cv.sdotsp.sci.h	t6,t6,20
+.*:	a903e37b          	cv.sdotsp.sci.h	t1,t2,-32
+.*:	a803e37b          	cv.sdotsp.sci.h	t1,t2,0
+.*:	aaf3e37b          	cv.sdotsp.sci.h	t1,t2,31
+.*:	9800107b          	cv.sdotup.b	zero,zero,zero
+.*:	981090fb          	cv.sdotup.b	ra,ra,ra
+.*:	9821117b          	cv.sdotup.b	sp,sp,sp
+.*:	9884147b          	cv.sdotup.b	s0,s0,s0
+.*:	994a1a7b          	cv.sdotup.b	s4,s4,s4
+.*:	99ff9ffb          	cv.sdotup.b	t6,t6,t6
+.*:	9800007b          	cv.sdotup.h	zero,zero,zero
+.*:	981080fb          	cv.sdotup.h	ra,ra,ra
+.*:	9821017b          	cv.sdotup.h	sp,sp,sp
+.*:	9884047b          	cv.sdotup.h	s0,s0,s0
+.*:	994a0a7b          	cv.sdotup.h	s4,s4,s4
+.*:	99ff8ffb          	cv.sdotup.h	t6,t6,t6
+.*:	9800507b          	cv.sdotup.sc.b	zero,zero,zero
+.*:	9810d0fb          	cv.sdotup.sc.b	ra,ra,ra
+.*:	9821517b          	cv.sdotup.sc.b	sp,sp,sp
+.*:	9884547b          	cv.sdotup.sc.b	s0,s0,s0
+.*:	994a5a7b          	cv.sdotup.sc.b	s4,s4,s4
+.*:	99ffdffb          	cv.sdotup.sc.b	t6,t6,t6
+.*:	9800407b          	cv.sdotup.sc.h	zero,zero,zero
+.*:	9810c0fb          	cv.sdotup.sc.h	ra,ra,ra
+.*:	9821417b          	cv.sdotup.sc.h	sp,sp,sp
+.*:	9884447b          	cv.sdotup.sc.h	s0,s0,s0
+.*:	994a4a7b          	cv.sdotup.sc.h	s4,s4,s4
+.*:	99ffcffb          	cv.sdotup.sc.h	t6,t6,t6
+.*:	98a0707b          	cv.sdotup.sci.b	zero,zero,20
+.*:	98a0f0fb          	cv.sdotup.sci.b	ra,ra,20
+.*:	98a1717b          	cv.sdotup.sci.b	sp,sp,20
+.*:	98a4747b          	cv.sdotup.sci.b	s0,s0,20
+.*:	98aa7a7b          	cv.sdotup.sci.b	s4,s4,20
+.*:	98affffb          	cv.sdotup.sci.b	t6,t6,20
+.*:	9803f37b          	cv.sdotup.sci.b	t1,t2,0
+.*:	9bf3f37b          	cv.sdotup.sci.b	t1,t2,63
+.*:	98a0607b          	cv.sdotup.sci.h	zero,zero,20
+.*:	98a0e0fb          	cv.sdotup.sci.h	ra,ra,20
+.*:	98a1617b          	cv.sdotup.sci.h	sp,sp,20
+.*:	98a4647b          	cv.sdotup.sci.h	s0,s0,20
+.*:	98aa6a7b          	cv.sdotup.sci.h	s4,s4,20
+.*:	98afeffb          	cv.sdotup.sci.h	t6,t6,20
+.*:	9803e37b          	cv.sdotup.sci.h	t1,t2,0
+.*:	9bf3e37b          	cv.sdotup.sci.h	t1,t2,63
+.*:	a000107b          	cv.sdotusp.b	zero,zero,zero
+.*:	a01090fb          	cv.sdotusp.b	ra,ra,ra
+.*:	a021117b          	cv.sdotusp.b	sp,sp,sp
+.*:	a084147b          	cv.sdotusp.b	s0,s0,s0
+.*:	a14a1a7b          	cv.sdotusp.b	s4,s4,s4
+.*:	a1ff9ffb          	cv.sdotusp.b	t6,t6,t6
+.*:	a000007b          	cv.sdotusp.h	zero,zero,zero
+.*:	a01080fb          	cv.sdotusp.h	ra,ra,ra
+.*:	a021017b          	cv.sdotusp.h	sp,sp,sp
+.*:	a084047b          	cv.sdotusp.h	s0,s0,s0
+.*:	a14a0a7b          	cv.sdotusp.h	s4,s4,s4
+.*:	a1ff8ffb          	cv.sdotusp.h	t6,t6,t6
+.*:	a000507b          	cv.sdotusp.sc.b	zero,zero,zero
+.*:	a010d0fb          	cv.sdotusp.sc.b	ra,ra,ra
+.*:	a021517b          	cv.sdotusp.sc.b	sp,sp,sp
+.*:	a084547b          	cv.sdotusp.sc.b	s0,s0,s0
+.*:	a14a5a7b          	cv.sdotusp.sc.b	s4,s4,s4
+.*:	a1ffdffb          	cv.sdotusp.sc.b	t6,t6,t6
+.*:	a000407b          	cv.sdotusp.sc.h	zero,zero,zero
+.*:	a010c0fb          	cv.sdotusp.sc.h	ra,ra,ra
+.*:	a021417b          	cv.sdotusp.sc.h	sp,sp,sp
+.*:	a084447b          	cv.sdotusp.sc.h	s0,s0,s0
+.*:	a14a4a7b          	cv.sdotusp.sc.h	s4,s4,s4
+.*:	a1ffcffb          	cv.sdotusp.sc.h	t6,t6,t6
+.*:	a0a0707b          	cv.sdotusp.sci.b	zero,zero,20
+.*:	a0a0f0fb          	cv.sdotusp.sci.b	ra,ra,20
+.*:	a0a1717b          	cv.sdotusp.sci.b	sp,sp,20
+.*:	a0a4747b          	cv.sdotusp.sci.b	s0,s0,20
+.*:	a0aa7a7b          	cv.sdotusp.sci.b	s4,s4,20
+.*:	a0affffb          	cv.sdotusp.sci.b	t6,t6,20
+.*:	a103f37b          	cv.sdotusp.sci.b	t1,t2,-32
+.*:	a003f37b          	cv.sdotusp.sci.b	t1,t2,0
+.*:	a2f3f37b          	cv.sdotusp.sci.b	t1,t2,31
+.*:	a0a0607b          	cv.sdotusp.sci.h	zero,zero,20
+.*:	a0a0e0fb          	cv.sdotusp.sci.h	ra,ra,20
+.*:	a0a1617b          	cv.sdotusp.sci.h	sp,sp,20
+.*:	a0a4647b          	cv.sdotusp.sci.h	s0,s0,20
+.*:	a0aa6a7b          	cv.sdotusp.sci.h	s4,s4,20
+.*:	a0afeffb          	cv.sdotusp.sci.h	t6,t6,20
+.*:	a103e37b          	cv.sdotusp.sci.h	t1,t2,-32
+.*:	a003e37b          	cv.sdotusp.sci.h	t1,t2,0
+.*:	a2f3e37b          	cv.sdotusp.sci.h	t1,t2,31
+.*:	e000107b          	cv.shuffle2.b	zero,zero,zero
+.*:	e01090fb          	cv.shuffle2.b	ra,ra,ra
+.*:	e021117b          	cv.shuffle2.b	sp,sp,sp
+.*:	e084147b          	cv.shuffle2.b	s0,s0,s0
+.*:	e14a1a7b          	cv.shuffle2.b	s4,s4,s4
+.*:	e1ff9ffb          	cv.shuffle2.b	t6,t6,t6
+.*:	e000007b          	cv.shuffle2.h	zero,zero,zero
+.*:	e01080fb          	cv.shuffle2.h	ra,ra,ra
+.*:	e021017b          	cv.shuffle2.h	sp,sp,sp
+.*:	e084047b          	cv.shuffle2.h	s0,s0,s0
+.*:	e14a0a7b          	cv.shuffle2.h	s4,s4,s4
+.*:	e1ff8ffb          	cv.shuffle2.h	t6,t6,t6
+.*:	c000107b          	cv.shuffle.b	zero,zero,zero
+.*:	c01090fb          	cv.shuffle.b	ra,ra,ra
+.*:	c021117b          	cv.shuffle.b	sp,sp,sp
+.*:	c084147b          	cv.shuffle.b	s0,s0,s0
+.*:	c14a1a7b          	cv.shuffle.b	s4,s4,s4
+.*:	c1ff9ffb          	cv.shuffle.b	t6,t6,t6
+.*:	c000007b          	cv.shuffle.h	zero,zero,zero
+.*:	c01080fb          	cv.shuffle.h	ra,ra,ra
+.*:	c021017b          	cv.shuffle.h	sp,sp,sp
+.*:	c084047b          	cv.shuffle.h	s0,s0,s0
+.*:	c14a0a7b          	cv.shuffle.h	s4,s4,s4
+.*:	c1ff8ffb          	cv.shuffle.h	t6,t6,t6
+.*:	c0a0707b          	cv.shufflei0.sci.b	zero,zero,20
+.*:	c0a0f0fb          	cv.shufflei0.sci.b	ra,ra,20
+.*:	c0a1717b          	cv.shufflei0.sci.b	sp,sp,20
+.*:	c0a4747b          	cv.shufflei0.sci.b	s0,s0,20
+.*:	c0aa7a7b          	cv.shufflei0.sci.b	s4,s4,20
+.*:	c0affffb          	cv.shufflei0.sci.b	t6,t6,20
+.*:	c003f37b          	cv.shufflei0.sci.b	t1,t2,0
+.*:	c3f3f37b          	cv.shufflei0.sci.b	t1,t2,63
+.*:	c8a0707b          	cv.shufflei1.sci.b	zero,zero,20
+.*:	c8a0f0fb          	cv.shufflei1.sci.b	ra,ra,20
+.*:	c8a1717b          	cv.shufflei1.sci.b	sp,sp,20
+.*:	c8a4747b          	cv.shufflei1.sci.b	s0,s0,20
+.*:	c8aa7a7b          	cv.shufflei1.sci.b	s4,s4,20
+.*:	c8affffb          	cv.shufflei1.sci.b	t6,t6,20
+.*:	c803f37b          	cv.shufflei1.sci.b	t1,t2,0
+.*:	cbf3f37b          	cv.shufflei1.sci.b	t1,t2,63
+.*:	d0a0707b          	cv.shufflei2.sci.b	zero,zero,20
+.*:	d0a0f0fb          	cv.shufflei2.sci.b	ra,ra,20
+.*:	d0a1717b          	cv.shufflei2.sci.b	sp,sp,20
+.*:	d0a4747b          	cv.shufflei2.sci.b	s0,s0,20
+.*:	d0aa7a7b          	cv.shufflei2.sci.b	s4,s4,20
+.*:	d0affffb          	cv.shufflei2.sci.b	t6,t6,20
+.*:	d003f37b          	cv.shufflei2.sci.b	t1,t2,0
+.*:	d3f3f37b          	cv.shufflei2.sci.b	t1,t2,63
+.*:	d8a0707b          	cv.shufflei3.sci.b	zero,zero,20
+.*:	d8a0f0fb          	cv.shufflei3.sci.b	ra,ra,20
+.*:	d8a1717b          	cv.shufflei3.sci.b	sp,sp,20
+.*:	d8a4747b          	cv.shufflei3.sci.b	s0,s0,20
+.*:	d8aa7a7b          	cv.shufflei3.sci.b	s4,s4,20
+.*:	d8affffb          	cv.shufflei3.sci.b	t6,t6,20
+.*:	d803f37b          	cv.shufflei3.sci.b	t1,t2,0
+.*:	dbf3f37b          	cv.shufflei3.sci.b	t1,t2,63
+.*:	c010607b          	cv.shuffle.sci.h	zero,zero,2
+.*:	c010e0fb          	cv.shuffle.sci.h	ra,ra,2
+.*:	c011617b          	cv.shuffle.sci.h	sp,sp,2
+.*:	c014647b          	cv.shuffle.sci.h	s0,s0,2
+.*:	c01a6a7b          	cv.shuffle.sci.h	s4,s4,2
+.*:	c01feffb          	cv.shuffle.sci.h	t6,t6,2
+.*:	c003e37b          	cv.shuffle.sci.h	t1,t2,0
+.*:	c213e37b          	cv.shuffle.sci.h	t1,t2,3
+.*:	5000107b          	cv.sll.b	zero,zero,zero
+.*:	501090fb          	cv.sll.b	ra,ra,ra
+.*:	5021117b          	cv.sll.b	sp,sp,sp
+.*:	5084147b          	cv.sll.b	s0,s0,s0
+.*:	514a1a7b          	cv.sll.b	s4,s4,s4
+.*:	51ff9ffb          	cv.sll.b	t6,t6,t6
+.*:	5000007b          	cv.sll.h	zero,zero,zero
+.*:	501080fb          	cv.sll.h	ra,ra,ra
+.*:	5021017b          	cv.sll.h	sp,sp,sp
+.*:	5084047b          	cv.sll.h	s0,s0,s0
+.*:	514a0a7b          	cv.sll.h	s4,s4,s4
+.*:	51ff8ffb          	cv.sll.h	t6,t6,t6
+.*:	5000507b          	cv.sll.sc.b	zero,zero,zero
+.*:	5010d0fb          	cv.sll.sc.b	ra,ra,ra
+.*:	5021517b          	cv.sll.sc.b	sp,sp,sp
+.*:	5084547b          	cv.sll.sc.b	s0,s0,s0
+.*:	514a5a7b          	cv.sll.sc.b	s4,s4,s4
+.*:	51ffdffb          	cv.sll.sc.b	t6,t6,t6
+.*:	5000407b          	cv.sll.sc.h	zero,zero,zero
+.*:	5010c0fb          	cv.sll.sc.h	ra,ra,ra
+.*:	5021417b          	cv.sll.sc.h	sp,sp,sp
+.*:	5084447b          	cv.sll.sc.h	s0,s0,s0
+.*:	514a4a7b          	cv.sll.sc.h	s4,s4,s4
+.*:	51ffcffb          	cv.sll.sc.h	t6,t6,t6
+.*:	5020707b          	cv.sll.sci.b	zero,zero,4
+.*:	5020f0fb          	cv.sll.sci.b	ra,ra,4
+.*:	5021717b          	cv.sll.sci.b	sp,sp,4
+.*:	5024747b          	cv.sll.sci.b	s0,s0,4
+.*:	502a7a7b          	cv.sll.sci.b	s4,s4,4
+.*:	502ffffb          	cv.sll.sci.b	t6,t6,4
+.*:	5003f37b          	cv.sll.sci.b	t1,t2,0
+.*:	5233f37b          	cv.sll.sci.b	t1,t2,7
+.*:	5060607b          	cv.sll.sci.h	zero,zero,12
+.*:	5060e0fb          	cv.sll.sci.h	ra,ra,12
+.*:	5061617b          	cv.sll.sci.h	sp,sp,12
+.*:	5064647b          	cv.sll.sci.h	s0,s0,12
+.*:	506a6a7b          	cv.sll.sci.h	s4,s4,12
+.*:	506feffb          	cv.sll.sci.h	t6,t6,12
+.*:	5003e37b          	cv.sll.sci.h	t1,t2,0
+.*:	5273e37b          	cv.sll.sci.h	t1,t2,15
+.*:	4800107b          	cv.sra.b	zero,zero,zero
+.*:	481090fb          	cv.sra.b	ra,ra,ra
+.*:	4821117b          	cv.sra.b	sp,sp,sp
+.*:	4884147b          	cv.sra.b	s0,s0,s0
+.*:	494a1a7b          	cv.sra.b	s4,s4,s4
+.*:	49ff9ffb          	cv.sra.b	t6,t6,t6
+.*:	4800007b          	cv.sra.h	zero,zero,zero
+.*:	481080fb          	cv.sra.h	ra,ra,ra
+.*:	4821017b          	cv.sra.h	sp,sp,sp
+.*:	4884047b          	cv.sra.h	s0,s0,s0
+.*:	494a0a7b          	cv.sra.h	s4,s4,s4
+.*:	49ff8ffb          	cv.sra.h	t6,t6,t6
+.*:	4800507b          	cv.sra.sc.b	zero,zero,zero
+.*:	4810d0fb          	cv.sra.sc.b	ra,ra,ra
+.*:	4821517b          	cv.sra.sc.b	sp,sp,sp
+.*:	4884547b          	cv.sra.sc.b	s0,s0,s0
+.*:	494a5a7b          	cv.sra.sc.b	s4,s4,s4
+.*:	49ffdffb          	cv.sra.sc.b	t6,t6,t6
+.*:	4800407b          	cv.sra.sc.h	zero,zero,zero
+.*:	4810c0fb          	cv.sra.sc.h	ra,ra,ra
+.*:	4821417b          	cv.sra.sc.h	sp,sp,sp
+.*:	4884447b          	cv.sra.sc.h	s0,s0,s0
+.*:	494a4a7b          	cv.sra.sc.h	s4,s4,s4
+.*:	49ffcffb          	cv.sra.sc.h	t6,t6,t6
+.*:	4820707b          	cv.sra.sci.b	zero,zero,4
+.*:	4820f0fb          	cv.sra.sci.b	ra,ra,4
+.*:	4821717b          	cv.sra.sci.b	sp,sp,4
+.*:	4824747b          	cv.sra.sci.b	s0,s0,4
+.*:	482a7a7b          	cv.sra.sci.b	s4,s4,4
+.*:	482ffffb          	cv.sra.sci.b	t6,t6,4
+.*:	4803f37b          	cv.sra.sci.b	t1,t2,0
+.*:	4a33f37b          	cv.sra.sci.b	t1,t2,7
+.*:	4860607b          	cv.sra.sci.h	zero,zero,12
+.*:	4860e0fb          	cv.sra.sci.h	ra,ra,12
+.*:	4861617b          	cv.sra.sci.h	sp,sp,12
+.*:	4864647b          	cv.sra.sci.h	s0,s0,12
+.*:	486a6a7b          	cv.sra.sci.h	s4,s4,12
+.*:	486feffb          	cv.sra.sci.h	t6,t6,12
+.*:	4803e37b          	cv.sra.sci.h	t1,t2,0
+.*:	4a73e37b          	cv.sra.sci.h	t1,t2,15
+.*:	4000107b          	cv.srl.b	zero,zero,zero
+.*:	401090fb          	cv.srl.b	ra,ra,ra
+.*:	4021117b          	cv.srl.b	sp,sp,sp
+.*:	4084147b          	cv.srl.b	s0,s0,s0
+.*:	414a1a7b          	cv.srl.b	s4,s4,s4
+.*:	41ff9ffb          	cv.srl.b	t6,t6,t6
+.*:	4000007b          	cv.srl.h	zero,zero,zero
+.*:	401080fb          	cv.srl.h	ra,ra,ra
+.*:	4021017b          	cv.srl.h	sp,sp,sp
+.*:	4084047b          	cv.srl.h	s0,s0,s0
+.*:	414a0a7b          	cv.srl.h	s4,s4,s4
+.*:	41ff8ffb          	cv.srl.h	t6,t6,t6
+.*:	4000507b          	cv.srl.sc.b	zero,zero,zero
+.*:	4010d0fb          	cv.srl.sc.b	ra,ra,ra
+.*:	4021517b          	cv.srl.sc.b	sp,sp,sp
+.*:	4084547b          	cv.srl.sc.b	s0,s0,s0
+.*:	414a5a7b          	cv.srl.sc.b	s4,s4,s4
+.*:	41ffdffb          	cv.srl.sc.b	t6,t6,t6
+.*:	4000407b          	cv.srl.sc.h	zero,zero,zero
+.*:	4010c0fb          	cv.srl.sc.h	ra,ra,ra
+.*:	4021417b          	cv.srl.sc.h	sp,sp,sp
+.*:	4084447b          	cv.srl.sc.h	s0,s0,s0
+.*:	414a4a7b          	cv.srl.sc.h	s4,s4,s4
+.*:	41ffcffb          	cv.srl.sc.h	t6,t6,t6
+.*:	4020707b          	cv.srl.sci.b	zero,zero,4
+.*:	4020f0fb          	cv.srl.sci.b	ra,ra,4
+.*:	4021717b          	cv.srl.sci.b	sp,sp,4
+.*:	4024747b          	cv.srl.sci.b	s0,s0,4
+.*:	402a7a7b          	cv.srl.sci.b	s4,s4,4
+.*:	402ffffb          	cv.srl.sci.b	t6,t6,4
+.*:	4003f37b          	cv.srl.sci.b	t1,t2,0
+.*:	4233f37b          	cv.srl.sci.b	t1,t2,7
+.*:	4060607b          	cv.srl.sci.h	zero,zero,12
+.*:	4060e0fb          	cv.srl.sci.h	ra,ra,12
+.*:	4061617b          	cv.srl.sci.h	sp,sp,12
+.*:	4064647b          	cv.srl.sci.h	s0,s0,12
+.*:	406a6a7b          	cv.srl.sci.h	s4,s4,12
+.*:	406feffb          	cv.srl.sci.h	t6,t6,12
+.*:	4003e37b          	cv.srl.sci.h	t1,t2,0
+.*:	4273e37b          	cv.srl.sci.h	t1,t2,15
+.*:	0800107b          	cv.sub.b	zero,zero,zero
+.*:	081090fb          	cv.sub.b	ra,ra,ra
+.*:	0821117b          	cv.sub.b	sp,sp,sp
+.*:	0884147b          	cv.sub.b	s0,s0,s0
+.*:	094a1a7b          	cv.sub.b	s4,s4,s4
+.*:	09ff9ffb          	cv.sub.b	t6,t6,t6
+.*:	7400207b          	cv.sub.div2	zero,zero,zero
+.*:	7410a0fb          	cv.sub.div2	ra,ra,ra
+.*:	7421217b          	cv.sub.div2	sp,sp,sp
+.*:	7484247b          	cv.sub.div2	s0,s0,s0
+.*:	754a2a7b          	cv.sub.div2	s4,s4,s4
+.*:	75ffaffb          	cv.sub.div2	t6,t6,t6
+.*:	7400407b          	cv.sub.div4	zero,zero,zero
+.*:	7410c0fb          	cv.sub.div4	ra,ra,ra
+.*:	7421417b          	cv.sub.div4	sp,sp,sp
+.*:	7484447b          	cv.sub.div4	s0,s0,s0
+.*:	754a4a7b          	cv.sub.div4	s4,s4,s4
+.*:	75ffcffb          	cv.sub.div4	t6,t6,t6
+.*:	7400607b          	cv.sub.div8	zero,zero,zero
+.*:	7410e0fb          	cv.sub.div8	ra,ra,ra
+.*:	7421617b          	cv.sub.div8	sp,sp,sp
+.*:	7484647b          	cv.sub.div8	s0,s0,s0
+.*:	754a6a7b          	cv.sub.div8	s4,s4,s4
+.*:	75ffeffb          	cv.sub.div8	t6,t6,t6
+.*:	0800007b          	cv.sub.h	zero,zero,zero
+.*:	081080fb          	cv.sub.h	ra,ra,ra
+.*:	0821017b          	cv.sub.h	sp,sp,sp
+.*:	0884047b          	cv.sub.h	s0,s0,s0
+.*:	094a0a7b          	cv.sub.h	s4,s4,s4
+.*:	09ff8ffb          	cv.sub.h	t6,t6,t6
+.*:	6400207b          	cv.subrotmj.div2	zero,zero,zero
+.*:	6410a0fb          	cv.subrotmj.div2	ra,ra,ra
+.*:	6421217b          	cv.subrotmj.div2	sp,sp,sp
+.*:	6484247b          	cv.subrotmj.div2	s0,s0,s0
+.*:	654a2a7b          	cv.subrotmj.div2	s4,s4,s4
+.*:	65ffaffb          	cv.subrotmj.div2	t6,t6,t6
+.*:	6400407b          	cv.subrotmj.div4	zero,zero,zero
+.*:	6410c0fb          	cv.subrotmj.div4	ra,ra,ra
+.*:	6421417b          	cv.subrotmj.div4	sp,sp,sp
+.*:	6484447b          	cv.subrotmj.div4	s0,s0,s0
+.*:	654a4a7b          	cv.subrotmj.div4	s4,s4,s4
+.*:	65ffcffb          	cv.subrotmj.div4	t6,t6,t6
+.*:	6400607b          	cv.subrotmj.div8	zero,zero,zero
+.*:	6410e0fb          	cv.subrotmj.div8	ra,ra,ra
+.*:	6421617b          	cv.subrotmj.div8	sp,sp,sp
+.*:	6484647b          	cv.subrotmj.div8	s0,s0,s0
+.*:	654a6a7b          	cv.subrotmj.div8	s4,s4,s4
+.*:	65ffeffb          	cv.subrotmj.div8	t6,t6,t6
+.*:	6400007b          	cv.subrotmj	zero,zero,zero
+.*:	641080fb          	cv.subrotmj	ra,ra,ra
+.*:	6421017b          	cv.subrotmj	sp,sp,sp
+.*:	6484047b          	cv.subrotmj	s0,s0,s0
+.*:	654a0a7b          	cv.subrotmj	s4,s4,s4
+.*:	65ff8ffb          	cv.subrotmj	t6,t6,t6
+.*:	0800507b          	cv.sub.sc.b	zero,zero,zero
+.*:	0810d0fb          	cv.sub.sc.b	ra,ra,ra
+.*:	0821517b          	cv.sub.sc.b	sp,sp,sp
+.*:	0884547b          	cv.sub.sc.b	s0,s0,s0
+.*:	094a5a7b          	cv.sub.sc.b	s4,s4,s4
+.*:	09ffdffb          	cv.sub.sc.b	t6,t6,t6
+.*:	0800407b          	cv.sub.sc.h	zero,zero,zero
+.*:	0810c0fb          	cv.sub.sc.h	ra,ra,ra
+.*:	0821417b          	cv.sub.sc.h	sp,sp,sp
+.*:	0884447b          	cv.sub.sc.h	s0,s0,s0
+.*:	094a4a7b          	cv.sub.sc.h	s4,s4,s4
+.*:	09ffcffb          	cv.sub.sc.h	t6,t6,t6
+.*:	08a0707b          	cv.sub.sci.b	zero,zero,20
+.*:	08a0f0fb          	cv.sub.sci.b	ra,ra,20
+.*:	08a1717b          	cv.sub.sci.b	sp,sp,20
+.*:	08a4747b          	cv.sub.sci.b	s0,s0,20
+.*:	08aa7a7b          	cv.sub.sci.b	s4,s4,20
+.*:	08affffb          	cv.sub.sci.b	t6,t6,20
+.*:	0903f37b          	cv.sub.sci.b	t1,t2,-32
+.*:	0803f37b          	cv.sub.sci.b	t1,t2,0
+.*:	0af3f37b          	cv.sub.sci.b	t1,t2,31
+.*:	08a0607b          	cv.sub.sci.h	zero,zero,20
+.*:	08a0e0fb          	cv.sub.sci.h	ra,ra,20
+.*:	08a1617b          	cv.sub.sci.h	sp,sp,20
+.*:	08a4647b          	cv.sub.sci.h	s0,s0,20
+.*:	08aa6a7b          	cv.sub.sci.h	s4,s4,20
+.*:	08afeffb          	cv.sub.sci.h	t6,t6,20
+.*:	0903e37b          	cv.sub.sci.h	t1,t2,-32
+.*:	0803e37b          	cv.sub.sci.h	t1,t2,0
+.*:	0af3e37b          	cv.sub.sci.h	t1,t2,31
+.*:	6000107b          	cv.xor.b	zero,zero,zero
+.*:	601090fb          	cv.xor.b	ra,ra,ra
+.*:	6021117b          	cv.xor.b	sp,sp,sp
+.*:	6084147b          	cv.xor.b	s0,s0,s0
+.*:	614a1a7b          	cv.xor.b	s4,s4,s4
+.*:	61ff9ffb          	cv.xor.b	t6,t6,t6
+.*:	6000007b          	cv.xor.h	zero,zero,zero
+.*:	601080fb          	cv.xor.h	ra,ra,ra
+.*:	6021017b          	cv.xor.h	sp,sp,sp
+.*:	6084047b          	cv.xor.h	s0,s0,s0
+.*:	614a0a7b          	cv.xor.h	s4,s4,s4
+.*:	61ff8ffb          	cv.xor.h	t6,t6,t6
+.*:	6000507b          	cv.xor.sc.b	zero,zero,zero
+.*:	6010d0fb          	cv.xor.sc.b	ra,ra,ra
+.*:	6021517b          	cv.xor.sc.b	sp,sp,sp
+.*:	6084547b          	cv.xor.sc.b	s0,s0,s0
+.*:	614a5a7b          	cv.xor.sc.b	s4,s4,s4
+.*:	61ffdffb          	cv.xor.sc.b	t6,t6,t6
+.*:	6000407b          	cv.xor.sc.h	zero,zero,zero
+.*:	6010c0fb          	cv.xor.sc.h	ra,ra,ra
+.*:	6021417b          	cv.xor.sc.h	sp,sp,sp
+.*:	6084447b          	cv.xor.sc.h	s0,s0,s0
+.*:	614a4a7b          	cv.xor.sc.h	s4,s4,s4
+.*:	61ffcffb          	cv.xor.sc.h	t6,t6,t6
+.*:	60a0707b          	cv.xor.sci.b	zero,zero,20
+.*:	60a0f0fb          	cv.xor.sci.b	ra,ra,20
+.*:	60a1717b          	cv.xor.sci.b	sp,sp,20
+.*:	60a4747b          	cv.xor.sci.b	s0,s0,20
+.*:	60aa7a7b          	cv.xor.sci.b	s4,s4,20
+.*:	60affffb          	cv.xor.sci.b	t6,t6,20
+.*:	6103f37b          	cv.xor.sci.b	t1,t2,-32
+.*:	6003f37b          	cv.xor.sci.b	t1,t2,0
+.*:	62f3f37b          	cv.xor.sci.b	t1,t2,31
+.*:	60a0607b          	cv.xor.sci.h	zero,zero,20
+.*:	60a0e0fb          	cv.xor.sci.h	ra,ra,20
+.*:	60a1617b          	cv.xor.sci.h	sp,sp,20
+.*:	60a4647b          	cv.xor.sci.h	s0,s0,20
+.*:	60aa6a7b          	cv.xor.sci.h	s4,s4,20
+.*:	60afeffb          	cv.xor.sci.h	t6,t6,20
+.*:	6103e37b          	cv.xor.sci.h	t1,t2,-32
+.*:	6003e37b          	cv.xor.sci.h	t1,t2,0
+.*:	62f3e37b          	cv.xor.sci.h	t1,t2,31
diff --git a/gas/testsuite/gas/riscv/x-cv-simd.s b/gas/testsuite/gas/riscv/x-cv-simd.s
new file mode 100644
index 0000000..d71200b
--- /dev/null
+++ b/gas/testsuite/gas/riscv/x-cv-simd.s
@@ -0,0 +1,1498 @@
+    cv.abs.b x0, x0
+    cv.abs.b x1, x1
+    cv.abs.b x2, x2
+    cv.abs.b x8, x8
+    cv.abs.b x20, x20
+    cv.abs.b x31, x31
+    cv.abs.h x0, x0
+    cv.abs.h x1, x1
+    cv.abs.h x2, x2
+    cv.abs.h x8, x8
+    cv.abs.h x20, x20
+    cv.abs.h x31, x31
+    cv.add.b x0, x0, x0
+    cv.add.b x1, x1, x1
+    cv.add.b x2, x2, x2
+    cv.add.b x8, x8, x8
+    cv.add.b x20, x20, x20
+    cv.add.b x31, x31, x31
+    cv.add.div2 x0, x0, x0
+    cv.add.div2 x1, x1, x1
+    cv.add.div2 x2, x2, x2
+    cv.add.div2 x8, x8, x8
+    cv.add.div2 x20, x20, x20
+    cv.add.div2 x31, x31, x31
+    cv.add.div4 x0, x0, x0
+    cv.add.div4 x1, x1, x1
+    cv.add.div4 x2, x2, x2
+    cv.add.div4 x8, x8, x8
+    cv.add.div4 x20, x20, x20
+    cv.add.div4 x31, x31, x31
+    cv.add.div8 x0, x0, x0
+    cv.add.div8 x1, x1, x1
+    cv.add.div8 x2, x2, x2
+    cv.add.div8 x8, x8, x8
+    cv.add.div8 x20, x20, x20
+    cv.add.div8 x31, x31, x31
+    cv.add.h x0, x0, x0
+    cv.add.h x1, x1, x1
+    cv.add.h x2, x2, x2
+    cv.add.h x8, x8, x8
+    cv.add.h x20, x20, x20
+    cv.add.h x31, x31, x31
+    cv.add.sc.b x0, x0, x0
+    cv.add.sc.b x1, x1, x1
+    cv.add.sc.b x2, x2, x2
+    cv.add.sc.b x8, x8, x8
+    cv.add.sc.b x20, x20, x20
+    cv.add.sc.b x31, x31, x31
+    cv.add.sc.h x0, x0, x0
+    cv.add.sc.h x1, x1, x1
+    cv.add.sc.h x2, x2, x2
+    cv.add.sc.h x8, x8, x8
+    cv.add.sc.h x20, x20, x20
+    cv.add.sc.h x31, x31, x31
+    cv.add.sci.b x0, x0, 20
+    cv.add.sci.b x1, x1, 20
+    cv.add.sci.b x2, x2, 20
+    cv.add.sci.b x8, x8, 20
+    cv.add.sci.b x20, x20, 20
+    cv.add.sci.b x31, x31, 20
+    cv.add.sci.b x6, x7, -32
+    cv.add.sci.b x6, x7, 0
+    cv.add.sci.b x6, x7, 31
+    cv.add.sci.h x0, x0, 20
+    cv.add.sci.h x1, x1, 20
+    cv.add.sci.h x2, x2, 20
+    cv.add.sci.h x8, x8, 20
+    cv.add.sci.h x20, x20, 20
+    cv.add.sci.h x31, x31, 20
+    cv.add.sci.h x6, x7, -32
+    cv.add.sci.h x6, x7, 0
+    cv.add.sci.h x6, x7, 31
+    cv.and.b x0, x0, x0
+    cv.and.b x1, x1, x1
+    cv.and.b x2, x2, x2
+    cv.and.b x8, x8, x8
+    cv.and.b x20, x20, x20
+    cv.and.b x31, x31, x31
+    cv.and.h x0, x0, x0
+    cv.and.h x1, x1, x1
+    cv.and.h x2, x2, x2
+    cv.and.h x8, x8, x8
+    cv.and.h x20, x20, x20
+    cv.and.h x31, x31, x31
+    cv.and.sc.b x0, x0, x0
+    cv.and.sc.b x1, x1, x1
+    cv.and.sc.b x2, x2, x2
+    cv.and.sc.b x8, x8, x8
+    cv.and.sc.b x20, x20, x20
+    cv.and.sc.b x31, x31, x31
+    cv.and.sc.h x0, x0, x0
+    cv.and.sc.h x1, x1, x1
+    cv.and.sc.h x2, x2, x2
+    cv.and.sc.h x8, x8, x8
+    cv.and.sc.h x20, x20, x20
+    cv.and.sc.h x31, x31, x31
+    cv.and.sci.b x0, x0, 20
+    cv.and.sci.b x1, x1, 20
+    cv.and.sci.b x2, x2, 20
+    cv.and.sci.b x8, x8, 20
+    cv.and.sci.b x20, x20, 20
+    cv.and.sci.b x31, x31, 20
+    cv.and.sci.b x6, x7, -32
+    cv.and.sci.b x6, x7, 0
+    cv.and.sci.b x6, x7, 31
+    cv.and.sci.h x0, x0, 20
+    cv.and.sci.h x1, x1, 20
+    cv.and.sci.h x2, x2, 20
+    cv.and.sci.h x8, x8, 20
+    cv.and.sci.h x20, x20, 20
+    cv.and.sci.h x31, x31, 20
+    cv.and.sci.h x6, x7, -32
+    cv.and.sci.h x6, x7, 0
+    cv.and.sci.h x6, x7, 31
+    cv.avg.b x0, x0, x0
+    cv.avg.b x1, x1, x1
+    cv.avg.b x2, x2, x2
+    cv.avg.b x8, x8, x8
+    cv.avg.b x20, x20, x20
+    cv.avg.b x31, x31, x31
+    cv.avg.h x0, x0, x0
+    cv.avg.h x1, x1, x1
+    cv.avg.h x2, x2, x2
+    cv.avg.h x8, x8, x8
+    cv.avg.h x20, x20, x20
+    cv.avg.h x31, x31, x31
+    cv.avg.sc.b x0, x0, x0
+    cv.avg.sc.b x1, x1, x1
+    cv.avg.sc.b x2, x2, x2
+    cv.avg.sc.b x8, x8, x8
+    cv.avg.sc.b x20, x20, x20
+    cv.avg.sc.b x31, x31, x31
+    cv.avg.sc.h x0, x0, x0
+    cv.avg.sc.h x1, x1, x1
+    cv.avg.sc.h x2, x2, x2
+    cv.avg.sc.h x8, x8, x8
+    cv.avg.sc.h x20, x20, x20
+    cv.avg.sc.h x31, x31, x31
+    cv.avg.sci.b x0, x0, 20
+    cv.avg.sci.b x1, x1, 20
+    cv.avg.sci.b x2, x2, 20
+    cv.avg.sci.b x8, x8, 20
+    cv.avg.sci.b x20, x20, 20
+    cv.avg.sci.b x31, x31, 20
+    cv.avg.sci.b x6, x7, -32
+    cv.avg.sci.b x6, x7, 0
+    cv.avg.sci.b x6, x7, 31
+    cv.avg.sci.h x0, x0, 20
+    cv.avg.sci.h x1, x1, 20
+    cv.avg.sci.h x2, x2, 20
+    cv.avg.sci.h x8, x8, 20
+    cv.avg.sci.h x20, x20, 20
+    cv.avg.sci.h x31, x31, 20
+    cv.avg.sci.h x6, x7, -32
+    cv.avg.sci.h x6, x7, 0
+    cv.avg.sci.h x6, x7, 31
+    cv.avgu.b x0, x0, x0
+    cv.avgu.b x1, x1, x1
+    cv.avgu.b x2, x2, x2
+    cv.avgu.b x8, x8, x8
+    cv.avgu.b x20, x20, x20
+    cv.avgu.b x31, x31, x31
+    cv.avgu.h x0, x0, x0
+    cv.avgu.h x1, x1, x1
+    cv.avgu.h x2, x2, x2
+    cv.avgu.h x8, x8, x8
+    cv.avgu.h x20, x20, x20
+    cv.avgu.h x31, x31, x31
+    cv.avgu.sc.b x0, x0, x0
+    cv.avgu.sc.b x1, x1, x1
+    cv.avgu.sc.b x2, x2, x2
+    cv.avgu.sc.b x8, x8, x8
+    cv.avgu.sc.b x20, x20, x20
+    cv.avgu.sc.b x31, x31, x31
+    cv.avgu.sc.h x0, x0, x0
+    cv.avgu.sc.h x1, x1, x1
+    cv.avgu.sc.h x2, x2, x2
+    cv.avgu.sc.h x8, x8, x8
+    cv.avgu.sc.h x20, x20, x20
+    cv.avgu.sc.h x31, x31, x31
+    cv.avgu.sci.b x0, x0, 20
+    cv.avgu.sci.b x1, x1, 20
+    cv.avgu.sci.b x2, x2, 20
+    cv.avgu.sci.b x8, x8, 20
+    cv.avgu.sci.b x20, x20, 20
+    cv.avgu.sci.b x31, x31, 20
+    cv.avgu.sci.b x6, x7, 0
+    cv.avgu.sci.b x6, x7, 63
+    cv.avgu.sci.h x0, x0, 20
+    cv.avgu.sci.h x1, x1, 20
+    cv.avgu.sci.h x2, x2, 20
+    cv.avgu.sci.h x8, x8, 20
+    cv.avgu.sci.h x20, x20, 20
+    cv.avgu.sci.h x31, x31, 20
+    cv.avgu.sci.h x6, x7, 0
+    cv.avgu.sci.h x6, x7, 63
+    cv.cmpeq.b x0, x0, x0
+    cv.cmpeq.b x1, x1, x1
+    cv.cmpeq.b x2, x2, x2
+    cv.cmpeq.b x8, x8, x8
+    cv.cmpeq.b x20, x20, x20
+    cv.cmpeq.b x31, x31, x31
+    cv.cmpeq.h x0, x0, x0
+    cv.cmpeq.h x1, x1, x1
+    cv.cmpeq.h x2, x2, x2
+    cv.cmpeq.h x8, x8, x8
+    cv.cmpeq.h x20, x20, x20
+    cv.cmpeq.h x31, x31, x31
+    cv.cmpeq.sc.b x0, x0, x0
+    cv.cmpeq.sc.b x1, x1, x1
+    cv.cmpeq.sc.b x2, x2, x2
+    cv.cmpeq.sc.b x8, x8, x8
+    cv.cmpeq.sc.b x20, x20, x20
+    cv.cmpeq.sc.b x31, x31, x31
+    cv.cmpeq.sc.h x0, x0, x0
+    cv.cmpeq.sc.h x1, x1, x1
+    cv.cmpeq.sc.h x2, x2, x2
+    cv.cmpeq.sc.h x8, x8, x8
+    cv.cmpeq.sc.h x20, x20, x20
+    cv.cmpeq.sc.h x31, x31, x31
+    cv.cmpeq.sci.b x0, x0, 20
+    cv.cmpeq.sci.b x1, x1, 20
+    cv.cmpeq.sci.b x2, x2, 20
+    cv.cmpeq.sci.b x8, x8, 20
+    cv.cmpeq.sci.b x20, x20, 20
+    cv.cmpeq.sci.b x31, x31, 20
+    cv.cmpeq.sci.b x6, x7, -32
+    cv.cmpeq.sci.b x6, x7, 0
+    cv.cmpeq.sci.b x6, x7, 31
+    cv.cmpeq.sci.h x0, x0, 20
+    cv.cmpeq.sci.h x1, x1, 20
+    cv.cmpeq.sci.h x2, x2, 20
+    cv.cmpeq.sci.h x8, x8, 20
+    cv.cmpeq.sci.h x20, x20, 20
+    cv.cmpeq.sci.h x31, x31, 20
+    cv.cmpeq.sci.h x6, x7, -32
+    cv.cmpeq.sci.h x6, x7, 0
+    cv.cmpeq.sci.h x6, x7, 31
+    cv.cmpge.b x0, x0, x0
+    cv.cmpge.b x1, x1, x1
+    cv.cmpge.b x2, x2, x2
+    cv.cmpge.b x8, x8, x8
+    cv.cmpge.b x20, x20, x20
+    cv.cmpge.b x31, x31, x31
+    cv.cmpge.h x0, x0, x0
+    cv.cmpge.h x1, x1, x1
+    cv.cmpge.h x2, x2, x2
+    cv.cmpge.h x8, x8, x8
+    cv.cmpge.h x20, x20, x20
+    cv.cmpge.h x31, x31, x31
+    cv.cmpge.sc.b x0, x0, x0
+    cv.cmpge.sc.b x1, x1, x1
+    cv.cmpge.sc.b x2, x2, x2
+    cv.cmpge.sc.b x8, x8, x8
+    cv.cmpge.sc.b x20, x20, x20
+    cv.cmpge.sc.b x31, x31, x31
+    cv.cmpge.sc.h x0, x0, x0
+    cv.cmpge.sc.h x1, x1, x1
+    cv.cmpge.sc.h x2, x2, x2
+    cv.cmpge.sc.h x8, x8, x8
+    cv.cmpge.sc.h x20, x20, x20
+    cv.cmpge.sc.h x31, x31, x31
+    cv.cmpge.sci.b x0, x0, 20
+    cv.cmpge.sci.b x1, x1, 20
+    cv.cmpge.sci.b x2, x2, 20
+    cv.cmpge.sci.b x8, x8, 20
+    cv.cmpge.sci.b x20, x20, 20
+    cv.cmpge.sci.b x31, x31, 20
+    cv.cmpge.sci.b x6, x7, -32
+    cv.cmpge.sci.b x6, x7, 0
+    cv.cmpge.sci.b x6, x7, 31
+    cv.cmpge.sci.h x0, x0, 20
+    cv.cmpge.sci.h x1, x1, 20
+    cv.cmpge.sci.h x2, x2, 20
+    cv.cmpge.sci.h x8, x8, 20
+    cv.cmpge.sci.h x20, x20, 20
+    cv.cmpge.sci.h x31, x31, 20
+    cv.cmpge.sci.h x6, x7, -32
+    cv.cmpge.sci.h x6, x7, 0
+    cv.cmpge.sci.h x6, x7, 31
+    cv.cmpgeu.b x0, x0, x0
+    cv.cmpgeu.b x1, x1, x1
+    cv.cmpgeu.b x2, x2, x2
+    cv.cmpgeu.b x8, x8, x8
+    cv.cmpgeu.b x20, x20, x20
+    cv.cmpgeu.b x31, x31, x31
+    cv.cmpgeu.h x0, x0, x0
+    cv.cmpgeu.h x1, x1, x1
+    cv.cmpgeu.h x2, x2, x2
+    cv.cmpgeu.h x8, x8, x8
+    cv.cmpgeu.h x20, x20, x20
+    cv.cmpgeu.h x31, x31, x31
+    cv.cmpgeu.sc.b x0, x0, x0
+    cv.cmpgeu.sc.b x1, x1, x1
+    cv.cmpgeu.sc.b x2, x2, x2
+    cv.cmpgeu.sc.b x8, x8, x8
+    cv.cmpgeu.sc.b x20, x20, x20
+    cv.cmpgeu.sc.b x31, x31, x31
+    cv.cmpgeu.sc.h x0, x0, x0
+    cv.cmpgeu.sc.h x1, x1, x1
+    cv.cmpgeu.sc.h x2, x2, x2
+    cv.cmpgeu.sc.h x8, x8, x8
+    cv.cmpgeu.sc.h x20, x20, x20
+    cv.cmpgeu.sc.h x31, x31, x31
+    cv.cmpgeu.sci.b x0, x0, 20
+    cv.cmpgeu.sci.b x1, x1, 20
+    cv.cmpgeu.sci.b x2, x2, 20
+    cv.cmpgeu.sci.b x8, x8, 20
+    cv.cmpgeu.sci.b x20, x20, 20
+    cv.cmpgeu.sci.b x31, x31, 20
+    cv.cmpgeu.sci.b x6, x7, 0
+    cv.cmpgeu.sci.b x6, x7, 63
+    cv.cmpgeu.sci.h x0, x0, 20
+    cv.cmpgeu.sci.h x1, x1, 20
+    cv.cmpgeu.sci.h x2, x2, 20
+    cv.cmpgeu.sci.h x8, x8, 20
+    cv.cmpgeu.sci.h x20, x20, 20
+    cv.cmpgeu.sci.h x31, x31, 20
+    cv.cmpgeu.sci.h x6, x7, 0
+    cv.cmpgeu.sci.h x6, x7, 63
+    cv.cmpgt.b x0, x0, x0
+    cv.cmpgt.b x1, x1, x1
+    cv.cmpgt.b x2, x2, x2
+    cv.cmpgt.b x8, x8, x8
+    cv.cmpgt.b x20, x20, x20
+    cv.cmpgt.b x31, x31, x31
+    cv.cmpgt.h x0, x0, x0
+    cv.cmpgt.h x1, x1, x1
+    cv.cmpgt.h x2, x2, x2
+    cv.cmpgt.h x8, x8, x8
+    cv.cmpgt.h x20, x20, x20
+    cv.cmpgt.h x31, x31, x31
+    cv.cmpgt.sc.b x0, x0, x0
+    cv.cmpgt.sc.b x1, x1, x1
+    cv.cmpgt.sc.b x2, x2, x2
+    cv.cmpgt.sc.b x8, x8, x8
+    cv.cmpgt.sc.b x20, x20, x20
+    cv.cmpgt.sc.b x31, x31, x31
+    cv.cmpgt.sc.h x0, x0, x0
+    cv.cmpgt.sc.h x1, x1, x1
+    cv.cmpgt.sc.h x2, x2, x2
+    cv.cmpgt.sc.h x8, x8, x8
+    cv.cmpgt.sc.h x20, x20, x20
+    cv.cmpgt.sc.h x31, x31, x31
+    cv.cmpgt.sci.b x0, x0, 20
+    cv.cmpgt.sci.b x1, x1, 20
+    cv.cmpgt.sci.b x2, x2, 20
+    cv.cmpgt.sci.b x8, x8, 20
+    cv.cmpgt.sci.b x20, x20, 20
+    cv.cmpgt.sci.b x31, x31, 20
+    cv.cmpgt.sci.b x6, x7, -32
+    cv.cmpgt.sci.b x6, x7, 0
+    cv.cmpgt.sci.b x6, x7, 31
+    cv.cmpgt.sci.h x0, x0, 20
+    cv.cmpgt.sci.h x1, x1, 20
+    cv.cmpgt.sci.h x2, x2, 20
+    cv.cmpgt.sci.h x8, x8, 20
+    cv.cmpgt.sci.h x20, x20, 20
+    cv.cmpgt.sci.h x31, x31, 20
+    cv.cmpgt.sci.h x6, x7, -32
+    cv.cmpgt.sci.h x6, x7, 0
+    cv.cmpgt.sci.h x6, x7, 31
+    cv.cmpgtu.b x0, x0, x0
+    cv.cmpgtu.b x1, x1, x1
+    cv.cmpgtu.b x2, x2, x2
+    cv.cmpgtu.b x8, x8, x8
+    cv.cmpgtu.b x20, x20, x20
+    cv.cmpgtu.b x31, x31, x31
+    cv.cmpgtu.h x0, x0, x0
+    cv.cmpgtu.h x1, x1, x1
+    cv.cmpgtu.h x2, x2, x2
+    cv.cmpgtu.h x8, x8, x8
+    cv.cmpgtu.h x20, x20, x20
+    cv.cmpgtu.h x31, x31, x31
+    cv.cmpgtu.sc.b x0, x0, x0
+    cv.cmpgtu.sc.b x1, x1, x1
+    cv.cmpgtu.sc.b x2, x2, x2
+    cv.cmpgtu.sc.b x8, x8, x8
+    cv.cmpgtu.sc.b x20, x20, x20
+    cv.cmpgtu.sc.b x31, x31, x31
+    cv.cmpgtu.sc.h x0, x0, x0
+    cv.cmpgtu.sc.h x1, x1, x1
+    cv.cmpgtu.sc.h x2, x2, x2
+    cv.cmpgtu.sc.h x8, x8, x8
+    cv.cmpgtu.sc.h x20, x20, x20
+    cv.cmpgtu.sc.h x31, x31, x31
+    cv.cmpgtu.sci.b x0, x0, 20
+    cv.cmpgtu.sci.b x1, x1, 20
+    cv.cmpgtu.sci.b x2, x2, 20
+    cv.cmpgtu.sci.b x8, x8, 20
+    cv.cmpgtu.sci.b x20, x20, 20
+    cv.cmpgtu.sci.b x31, x31, 20
+    cv.cmpgtu.sci.b x6, x7, 0
+    cv.cmpgtu.sci.b x6, x7, 63
+    cv.cmpgtu.sci.h x0, x0, 20
+    cv.cmpgtu.sci.h x1, x1, 20
+    cv.cmpgtu.sci.h x2, x2, 20
+    cv.cmpgtu.sci.h x8, x8, 20
+    cv.cmpgtu.sci.h x20, x20, 20
+    cv.cmpgtu.sci.h x31, x31, 20
+    cv.cmpgtu.sci.h x6, x7, 0
+    cv.cmpgtu.sci.h x6, x7, 63
+    cv.cmple.b x0, x0, x0
+    cv.cmple.b x1, x1, x1
+    cv.cmple.b x2, x2, x2
+    cv.cmple.b x8, x8, x8
+    cv.cmple.b x20, x20, x20
+    cv.cmple.b x31, x31, x31
+    cv.cmple.h x0, x0, x0
+    cv.cmple.h x1, x1, x1
+    cv.cmple.h x2, x2, x2
+    cv.cmple.h x8, x8, x8
+    cv.cmple.h x20, x20, x20
+    cv.cmple.h x31, x31, x31
+    cv.cmple.sc.b x0, x0, x0
+    cv.cmple.sc.b x1, x1, x1
+    cv.cmple.sc.b x2, x2, x2
+    cv.cmple.sc.b x8, x8, x8
+    cv.cmple.sc.b x20, x20, x20
+    cv.cmple.sc.b x31, x31, x31
+    cv.cmple.sc.h x0, x0, x0
+    cv.cmple.sc.h x1, x1, x1
+    cv.cmple.sc.h x2, x2, x2
+    cv.cmple.sc.h x8, x8, x8
+    cv.cmple.sc.h x20, x20, x20
+    cv.cmple.sc.h x31, x31, x31
+    cv.cmple.sci.b x0, x0, 20
+    cv.cmple.sci.b x1, x1, 20
+    cv.cmple.sci.b x2, x2, 20
+    cv.cmple.sci.b x8, x8, 20
+    cv.cmple.sci.b x20, x20, 20
+    cv.cmple.sci.b x31, x31, 20
+    cv.cmple.sci.b x6, x7, -32
+    cv.cmple.sci.b x6, x7, 0
+    cv.cmple.sci.b x6, x7, 31
+    cv.cmple.sci.h x0, x0, 20
+    cv.cmple.sci.h x1, x1, 20
+    cv.cmple.sci.h x2, x2, 20
+    cv.cmple.sci.h x8, x8, 20
+    cv.cmple.sci.h x20, x20, 20
+    cv.cmple.sci.h x31, x31, 20
+    cv.cmple.sci.h x6, x7, -32
+    cv.cmple.sci.h x6, x7, 0
+    cv.cmple.sci.h x6, x7, 31
+    cv.cmpleu.b x0, x0, x0
+    cv.cmpleu.b x1, x1, x1
+    cv.cmpleu.b x2, x2, x2
+    cv.cmpleu.b x8, x8, x8
+    cv.cmpleu.b x20, x20, x20
+    cv.cmpleu.b x31, x31, x31
+    cv.cmpleu.h x0, x0, x0
+    cv.cmpleu.h x1, x1, x1
+    cv.cmpleu.h x2, x2, x2
+    cv.cmpleu.h x8, x8, x8
+    cv.cmpleu.h x20, x20, x20
+    cv.cmpleu.h x31, x31, x31
+    cv.cmpleu.sc.b x0, x0, x0
+    cv.cmpleu.sc.b x1, x1, x1
+    cv.cmpleu.sc.b x2, x2, x2
+    cv.cmpleu.sc.b x8, x8, x8
+    cv.cmpleu.sc.b x20, x20, x20
+    cv.cmpleu.sc.b x31, x31, x31
+    cv.cmpleu.sc.h x0, x0, x0
+    cv.cmpleu.sc.h x1, x1, x1
+    cv.cmpleu.sc.h x2, x2, x2
+    cv.cmpleu.sc.h x8, x8, x8
+    cv.cmpleu.sc.h x20, x20, x20
+    cv.cmpleu.sc.h x31, x31, x31
+    cv.cmpleu.sci.b x0, x0, 20
+    cv.cmpleu.sci.b x1, x1, 20
+    cv.cmpleu.sci.b x2, x2, 20
+    cv.cmpleu.sci.b x8, x8, 20
+    cv.cmpleu.sci.b x20, x20, 20
+    cv.cmpleu.sci.b x31, x31, 20
+    cv.cmpleu.sci.b x6, x7, 0
+    cv.cmpleu.sci.b x6, x7, 63
+    cv.cmpleu.sci.h x0, x0, 20
+    cv.cmpleu.sci.h x1, x1, 20
+    cv.cmpleu.sci.h x2, x2, 20
+    cv.cmpleu.sci.h x8, x8, 20
+    cv.cmpleu.sci.h x20, x20, 20
+    cv.cmpleu.sci.h x31, x31, 20
+    cv.cmpleu.sci.h x6, x7, 0
+    cv.cmpleu.sci.h x6, x7, 63
+    cv.cmplt.b x0, x0, x0
+    cv.cmplt.b x1, x1, x1
+    cv.cmplt.b x2, x2, x2
+    cv.cmplt.b x8, x8, x8
+    cv.cmplt.b x20, x20, x20
+    cv.cmplt.b x31, x31, x31
+    cv.cmplt.h x0, x0, x0
+    cv.cmplt.h x1, x1, x1
+    cv.cmplt.h x2, x2, x2
+    cv.cmplt.h x8, x8, x8
+    cv.cmplt.h x20, x20, x20
+    cv.cmplt.h x31, x31, x31
+    cv.cmplt.sc.b x0, x0, x0
+    cv.cmplt.sc.b x1, x1, x1
+    cv.cmplt.sc.b x2, x2, x2
+    cv.cmplt.sc.b x8, x8, x8
+    cv.cmplt.sc.b x20, x20, x20
+    cv.cmplt.sc.b x31, x31, x31
+    cv.cmplt.sc.h x0, x0, x0
+    cv.cmplt.sc.h x1, x1, x1
+    cv.cmplt.sc.h x2, x2, x2
+    cv.cmplt.sc.h x8, x8, x8
+    cv.cmplt.sc.h x20, x20, x20
+    cv.cmplt.sc.h x31, x31, x31
+    cv.cmplt.sci.b x0, x0, 20
+    cv.cmplt.sci.b x1, x1, 20
+    cv.cmplt.sci.b x2, x2, 20
+    cv.cmplt.sci.b x8, x8, 20
+    cv.cmplt.sci.b x20, x20, 20
+    cv.cmplt.sci.b x31, x31, 20
+    cv.cmplt.sci.b x6, x7, -32
+    cv.cmplt.sci.b x6, x7, 0
+    cv.cmplt.sci.b x6, x7, 31
+    cv.cmplt.sci.h x0, x0, 20
+    cv.cmplt.sci.h x1, x1, 20
+    cv.cmplt.sci.h x2, x2, 20
+    cv.cmplt.sci.h x8, x8, 20
+    cv.cmplt.sci.h x20, x20, 20
+    cv.cmplt.sci.h x31, x31, 20
+    cv.cmplt.sci.h x6, x7, -32
+    cv.cmplt.sci.h x6, x7, 0
+    cv.cmplt.sci.h x6, x7, 31
+    cv.cmpltu.b x0, x0, x0
+    cv.cmpltu.b x1, x1, x1
+    cv.cmpltu.b x2, x2, x2
+    cv.cmpltu.b x8, x8, x8
+    cv.cmpltu.b x20, x20, x20
+    cv.cmpltu.b x31, x31, x31
+    cv.cmpltu.h x0, x0, x0
+    cv.cmpltu.h x1, x1, x1
+    cv.cmpltu.h x2, x2, x2
+    cv.cmpltu.h x8, x8, x8
+    cv.cmpltu.h x20, x20, x20
+    cv.cmpltu.h x31, x31, x31
+    cv.cmpltu.sc.b x0, x0, x0
+    cv.cmpltu.sc.b x1, x1, x1
+    cv.cmpltu.sc.b x2, x2, x2
+    cv.cmpltu.sc.b x8, x8, x8
+    cv.cmpltu.sc.b x20, x20, x20
+    cv.cmpltu.sc.b x31, x31, x31
+    cv.cmpltu.sc.h x0, x0, x0
+    cv.cmpltu.sc.h x1, x1, x1
+    cv.cmpltu.sc.h x2, x2, x2
+    cv.cmpltu.sc.h x8, x8, x8
+    cv.cmpltu.sc.h x20, x20, x20
+    cv.cmpltu.sc.h x31, x31, x31
+    cv.cmpltu.sci.b x0, x0, 20
+    cv.cmpltu.sci.b x1, x1, 20
+    cv.cmpltu.sci.b x2, x2, 20
+    cv.cmpltu.sci.b x8, x8, 20
+    cv.cmpltu.sci.b x20, x20, 20
+    cv.cmpltu.sci.b x31, x31, 20
+    cv.cmpltu.sci.b x6, x7, 0
+    cv.cmpltu.sci.b x6, x7, 63
+    cv.cmpltu.sci.h x0, x0, 20
+    cv.cmpltu.sci.h x1, x1, 20
+    cv.cmpltu.sci.h x2, x2, 20
+    cv.cmpltu.sci.h x8, x8, 20
+    cv.cmpltu.sci.h x20, x20, 20
+    cv.cmpltu.sci.h x31, x31, 20
+    cv.cmpltu.sci.h x6, x7, 0
+    cv.cmpltu.sci.h x6, x7, 63
+    cv.cmpne.b x0, x0, x0
+    cv.cmpne.b x1, x1, x1
+    cv.cmpne.b x2, x2, x2
+    cv.cmpne.b x8, x8, x8
+    cv.cmpne.b x20, x20, x20
+    cv.cmpne.b x31, x31, x31
+    cv.cmpne.h x0, x0, x0
+    cv.cmpne.h x1, x1, x1
+    cv.cmpne.h x2, x2, x2
+    cv.cmpne.h x8, x8, x8
+    cv.cmpne.h x20, x20, x20
+    cv.cmpne.h x31, x31, x31
+    cv.cmpne.sc.b x0, x0, x0
+    cv.cmpne.sc.b x1, x1, x1
+    cv.cmpne.sc.b x2, x2, x2
+    cv.cmpne.sc.b x8, x8, x8
+    cv.cmpne.sc.b x20, x20, x20
+    cv.cmpne.sc.b x31, x31, x31
+    cv.cmpne.sc.h x0, x0, x0
+    cv.cmpne.sc.h x1, x1, x1
+    cv.cmpne.sc.h x2, x2, x2
+    cv.cmpne.sc.h x8, x8, x8
+    cv.cmpne.sc.h x20, x20, x20
+    cv.cmpne.sc.h x31, x31, x31
+    cv.cmpne.sci.b x0, x0, 20
+    cv.cmpne.sci.b x1, x1, 20
+    cv.cmpne.sci.b x2, x2, 20
+    cv.cmpne.sci.b x8, x8, 20
+    cv.cmpne.sci.b x20, x20, 20
+    cv.cmpne.sci.b x31, x31, 20
+    cv.cmpne.sci.b x6, x7, -32
+    cv.cmpne.sci.b x6, x7, 0
+    cv.cmpne.sci.b x6, x7, 31
+    cv.cmpne.sci.h x0, x0, 20
+    cv.cmpne.sci.h x1, x1, 20
+    cv.cmpne.sci.h x2, x2, 20
+    cv.cmpne.sci.h x8, x8, 20
+    cv.cmpne.sci.h x20, x20, 20
+    cv.cmpne.sci.h x31, x31, 20
+    cv.cmpne.sci.h x6, x7, -32
+    cv.cmpne.sci.h x6, x7, 0
+    cv.cmpne.sci.h x6, x7, 31
+    cv.cplxconj x0, x0
+    cv.cplxconj x1, x1
+    cv.cplxconj x2, x2
+    cv.cplxconj x8, x8
+    cv.cplxconj x20, x20
+    cv.cplxconj x31, x31
+    cv.cplxmul.i.div2 x0, x0, x0
+    cv.cplxmul.i.div2 x1, x1, x1
+    cv.cplxmul.i.div2 x2, x2, x2
+    cv.cplxmul.i.div2 x8, x8, x8
+    cv.cplxmul.i.div2 x20, x20, x20
+    cv.cplxmul.i.div2 x31, x31, x31
+    cv.cplxmul.i.div4 x0, x0, x0
+    cv.cplxmul.i.div4 x1, x1, x1
+    cv.cplxmul.i.div4 x2, x2, x2
+    cv.cplxmul.i.div4 x8, x8, x8
+    cv.cplxmul.i.div4 x20, x20, x20
+    cv.cplxmul.i.div4 x31, x31, x31
+    cv.cplxmul.i.div8 x0, x0, x0
+    cv.cplxmul.i.div8 x1, x1, x1
+    cv.cplxmul.i.div8 x2, x2, x2
+    cv.cplxmul.i.div8 x8, x8, x8
+    cv.cplxmul.i.div8 x20, x20, x20
+    cv.cplxmul.i.div8 x31, x31, x31
+    cv.cplxmul.i x0, x0, x0
+    cv.cplxmul.i x1, x1, x1
+    cv.cplxmul.i x2, x2, x2
+    cv.cplxmul.i x8, x8, x8
+    cv.cplxmul.i x20, x20, x20
+    cv.cplxmul.i x31, x31, x31
+    cv.cplxmul.r.div2 x0, x0, x0
+    cv.cplxmul.r.div2 x1, x1, x1
+    cv.cplxmul.r.div2 x2, x2, x2
+    cv.cplxmul.r.div2 x8, x8, x8
+    cv.cplxmul.r.div2 x20, x20, x20
+    cv.cplxmul.r.div2 x31, x31, x31
+    cv.cplxmul.r.div4 x0, x0, x0
+    cv.cplxmul.r.div4 x1, x1, x1
+    cv.cplxmul.r.div4 x2, x2, x2
+    cv.cplxmul.r.div4 x8, x8, x8
+    cv.cplxmul.r.div4 x20, x20, x20
+    cv.cplxmul.r.div4 x31, x31, x31
+    cv.cplxmul.r.div8 x0, x0, x0
+    cv.cplxmul.r.div8 x1, x1, x1
+    cv.cplxmul.r.div8 x2, x2, x2
+    cv.cplxmul.r.div8 x8, x8, x8
+    cv.cplxmul.r.div8 x20, x20, x20
+    cv.cplxmul.r.div8 x31, x31, x31
+    cv.cplxmul.r x0, x0, x0
+    cv.cplxmul.r x1, x1, x1
+    cv.cplxmul.r x2, x2, x2
+    cv.cplxmul.r x8, x8, x8
+    cv.cplxmul.r x20, x20, x20
+    cv.cplxmul.r x31, x31, x31
+    cv.dotsp.b x0, x0, x0
+    cv.dotsp.b x1, x1, x1
+    cv.dotsp.b x2, x2, x2
+    cv.dotsp.b x8, x8, x8
+    cv.dotsp.b x20, x20, x20
+    cv.dotsp.b x31, x31, x31
+    cv.dotsp.h x0, x0, x0
+    cv.dotsp.h x1, x1, x1
+    cv.dotsp.h x2, x2, x2
+    cv.dotsp.h x8, x8, x8
+    cv.dotsp.h x20, x20, x20
+    cv.dotsp.h x31, x31, x31
+    cv.dotsp.sc.b x0, x0, x0
+    cv.dotsp.sc.b x1, x1, x1
+    cv.dotsp.sc.b x2, x2, x2
+    cv.dotsp.sc.b x8, x8, x8
+    cv.dotsp.sc.b x20, x20, x20
+    cv.dotsp.sc.b x31, x31, x31
+    cv.dotsp.sc.h x0, x0, x0
+    cv.dotsp.sc.h x1, x1, x1
+    cv.dotsp.sc.h x2, x2, x2
+    cv.dotsp.sc.h x8, x8, x8
+    cv.dotsp.sc.h x20, x20, x20
+    cv.dotsp.sc.h x31, x31, x31
+    cv.dotsp.sci.b x0, x0, 20
+    cv.dotsp.sci.b x1, x1, 20
+    cv.dotsp.sci.b x2, x2, 20
+    cv.dotsp.sci.b x8, x8, 20
+    cv.dotsp.sci.b x20, x20, 20
+    cv.dotsp.sci.b x31, x31, 20
+    cv.dotsp.sci.b x6, x7, -32
+    cv.dotsp.sci.b x6, x7, 0
+    cv.dotsp.sci.b x6, x7, 31
+    cv.dotsp.sci.h x0, x0, 20
+    cv.dotsp.sci.h x1, x1, 20
+    cv.dotsp.sci.h x2, x2, 20
+    cv.dotsp.sci.h x8, x8, 20
+    cv.dotsp.sci.h x20, x20, 20
+    cv.dotsp.sci.h x31, x31, 20
+    cv.dotsp.sci.h x6, x7, -32
+    cv.dotsp.sci.h x6, x7, 0
+    cv.dotsp.sci.h x6, x7, 31
+    cv.dotup.b x0, x0, x0
+    cv.dotup.b x1, x1, x1
+    cv.dotup.b x2, x2, x2
+    cv.dotup.b x8, x8, x8
+    cv.dotup.b x20, x20, x20
+    cv.dotup.b x31, x31, x31
+    cv.dotup.h x0, x0, x0
+    cv.dotup.h x1, x1, x1
+    cv.dotup.h x2, x2, x2
+    cv.dotup.h x8, x8, x8
+    cv.dotup.h x20, x20, x20
+    cv.dotup.h x31, x31, x31
+    cv.dotup.sc.b x0, x0, x0
+    cv.dotup.sc.b x1, x1, x1
+    cv.dotup.sc.b x2, x2, x2
+    cv.dotup.sc.b x8, x8, x8
+    cv.dotup.sc.b x20, x20, x20
+    cv.dotup.sc.b x31, x31, x31
+    cv.dotup.sc.h x0, x0, x0
+    cv.dotup.sc.h x1, x1, x1
+    cv.dotup.sc.h x2, x2, x2
+    cv.dotup.sc.h x8, x8, x8
+    cv.dotup.sc.h x20, x20, x20
+    cv.dotup.sc.h x31, x31, x31
+    cv.dotup.sci.b x0, x0, 20
+    cv.dotup.sci.b x1, x1, 20
+    cv.dotup.sci.b x2, x2, 20
+    cv.dotup.sci.b x8, x8, 20
+    cv.dotup.sci.b x20, x20, 20
+    cv.dotup.sci.b x31, x31, 20
+    cv.dotup.sci.b x6, x7, 0
+    cv.dotup.sci.b x6, x7, 63
+    cv.dotup.sci.h x0, x0, 20
+    cv.dotup.sci.h x1, x1, 20
+    cv.dotup.sci.h x2, x2, 20
+    cv.dotup.sci.h x8, x8, 20
+    cv.dotup.sci.h x20, x20, 20
+    cv.dotup.sci.h x31, x31, 20
+    cv.dotup.sci.h x6, x7, 0
+    cv.dotup.sci.h x6, x7, 63
+    cv.dotusp.b x0, x0, x0
+    cv.dotusp.b x1, x1, x1
+    cv.dotusp.b x2, x2, x2
+    cv.dotusp.b x8, x8, x8
+    cv.dotusp.b x20, x20, x20
+    cv.dotusp.b x31, x31, x31
+    cv.dotusp.h x0, x0, x0
+    cv.dotusp.h x1, x1, x1
+    cv.dotusp.h x2, x2, x2
+    cv.dotusp.h x8, x8, x8
+    cv.dotusp.h x20, x20, x20
+    cv.dotusp.h x31, x31, x31
+    cv.dotusp.sc.b x0, x0, x0
+    cv.dotusp.sc.b x1, x1, x1
+    cv.dotusp.sc.b x2, x2, x2
+    cv.dotusp.sc.b x8, x8, x8
+    cv.dotusp.sc.b x20, x20, x20
+    cv.dotusp.sc.b x31, x31, x31
+    cv.dotusp.sc.h x0, x0, x0
+    cv.dotusp.sc.h x1, x1, x1
+    cv.dotusp.sc.h x2, x2, x2
+    cv.dotusp.sc.h x8, x8, x8
+    cv.dotusp.sc.h x20, x20, x20
+    cv.dotusp.sc.h x31, x31, x31
+    cv.dotusp.sci.b x0, x0, 20
+    cv.dotusp.sci.b x1, x1, 20
+    cv.dotusp.sci.b x2, x2, 20
+    cv.dotusp.sci.b x8, x8, 20
+    cv.dotusp.sci.b x20, x20, 20
+    cv.dotusp.sci.b x31, x31, 20
+    cv.dotusp.sci.b x6, x7, -32
+    cv.dotusp.sci.b x6, x7, 0
+    cv.dotusp.sci.b x6, x7, 31
+    cv.dotusp.sci.h x0, x0, 20
+    cv.dotusp.sci.h x1, x1, 20
+    cv.dotusp.sci.h x2, x2, 20
+    cv.dotusp.sci.h x8, x8, 20
+    cv.dotusp.sci.h x20, x20, 20
+    cv.dotusp.sci.h x31, x31, 20
+    cv.dotusp.sci.h x6, x7, -32
+    cv.dotusp.sci.h x6, x7, 0
+    cv.dotusp.sci.h x6, x7, 31
+    cv.extract.b x0, x0, 2
+    cv.extract.b x1, x1, 2
+    cv.extract.b x2, x2, 2
+    cv.extract.b x8, x8, 2
+    cv.extract.b x20, x20, 2
+    cv.extract.b x31, x31, 2
+    cv.extract.b x6, x7, 0
+    cv.extract.b x6, x7, 3
+    cv.extract.h x0, x0, 1
+    cv.extract.h x1, x1, 1
+    cv.extract.h x2, x2, 1
+    cv.extract.h x8, x8, 1
+    cv.extract.h x20, x20, 1
+    cv.extract.h x31, x31, 1
+    cv.extract.h x6, x7, 0
+    cv.extract.h x6, x7, 1
+    cv.extractu.b x0, x0, 2
+    cv.extractu.b x1, x1, 2
+    cv.extractu.b x2, x2, 2
+    cv.extractu.b x8, x8, 2
+    cv.extractu.b x20, x20, 2
+    cv.extractu.b x31, x31, 2
+    cv.extractu.b x6, x7, 0
+    cv.extractu.b x6, x7, 3
+    cv.extractu.h x0, x0, 1
+    cv.extractu.h x1, x1, 1
+    cv.extractu.h x2, x2, 1
+    cv.extractu.h x8, x8, 1
+    cv.extractu.h x20, x20, 1
+    cv.extractu.h x31, x31, 1
+    cv.extractu.h x6, x7, 0
+    cv.extractu.h x6, x7, 1
+    cv.insert.b x0, x0, 2
+    cv.insert.b x1, x1, 2
+    cv.insert.b x2, x2, 2
+    cv.insert.b x8, x8, 2
+    cv.insert.b x20, x20, 2
+    cv.insert.b x31, x31, 2
+    cv.insert.b x6, x7, 0
+    cv.insert.b x6, x7, 3
+    cv.insert.h x0, x0, 1
+    cv.insert.h x1, x1, 1
+    cv.insert.h x2, x2, 1
+    cv.insert.h x8, x8, 1
+    cv.insert.h x20, x20, 1
+    cv.insert.h x31, x31, 1
+    cv.insert.h x6, x7, 0
+    cv.insert.h x6, x7, 1
+    cv.max.b x0, x0, x0
+    cv.max.b x1, x1, x1
+    cv.max.b x2, x2, x2
+    cv.max.b x8, x8, x8
+    cv.max.b x20, x20, x20
+    cv.max.b x31, x31, x31
+    cv.max.h x0, x0, x0
+    cv.max.h x1, x1, x1
+    cv.max.h x2, x2, x2
+    cv.max.h x8, x8, x8
+    cv.max.h x20, x20, x20
+    cv.max.h x31, x31, x31
+    cv.max.sc.b x0, x0, x0
+    cv.max.sc.b x1, x1, x1
+    cv.max.sc.b x2, x2, x2
+    cv.max.sc.b x8, x8, x8
+    cv.max.sc.b x20, x20, x20
+    cv.max.sc.b x31, x31, x31
+    cv.max.sc.h x0, x0, x0
+    cv.max.sc.h x1, x1, x1
+    cv.max.sc.h x2, x2, x2
+    cv.max.sc.h x8, x8, x8
+    cv.max.sc.h x20, x20, x20
+    cv.max.sc.h x31, x31, x31
+    cv.max.sci.b x0, x0, 20
+    cv.max.sci.b x1, x1, 20
+    cv.max.sci.b x2, x2, 20
+    cv.max.sci.b x8, x8, 20
+    cv.max.sci.b x20, x20, 20
+    cv.max.sci.b x31, x31, 20
+    cv.max.sci.b x6, x7, -32
+    cv.max.sci.b x6, x7, 0
+    cv.max.sci.b x6, x7, 31
+    cv.max.sci.h x0, x0, 20
+    cv.max.sci.h x1, x1, 20
+    cv.max.sci.h x2, x2, 20
+    cv.max.sci.h x8, x8, 20
+    cv.max.sci.h x20, x20, 20
+    cv.max.sci.h x31, x31, 20
+    cv.max.sci.h x6, x7, -32
+    cv.max.sci.h x6, x7, 0
+    cv.max.sci.h x6, x7, 31
+    cv.maxu.b x0, x0, x0
+    cv.maxu.b x1, x1, x1
+    cv.maxu.b x2, x2, x2
+    cv.maxu.b x8, x8, x8
+    cv.maxu.b x20, x20, x20
+    cv.maxu.b x31, x31, x31
+    cv.maxu.h x0, x0, x0
+    cv.maxu.h x1, x1, x1
+    cv.maxu.h x2, x2, x2
+    cv.maxu.h x8, x8, x8
+    cv.maxu.h x20, x20, x20
+    cv.maxu.h x31, x31, x31
+    cv.maxu.sc.b x0, x0, x0
+    cv.maxu.sc.b x1, x1, x1
+    cv.maxu.sc.b x2, x2, x2
+    cv.maxu.sc.b x8, x8, x8
+    cv.maxu.sc.b x20, x20, x20
+    cv.maxu.sc.b x31, x31, x31
+    cv.maxu.sc.h x0, x0, x0
+    cv.maxu.sc.h x1, x1, x1
+    cv.maxu.sc.h x2, x2, x2
+    cv.maxu.sc.h x8, x8, x8
+    cv.maxu.sc.h x20, x20, x20
+    cv.maxu.sc.h x31, x31, x31
+    cv.maxu.sci.b x0, x0, 20
+    cv.maxu.sci.b x1, x1, 20
+    cv.maxu.sci.b x2, x2, 20
+    cv.maxu.sci.b x8, x8, 20
+    cv.maxu.sci.b x20, x20, 20
+    cv.maxu.sci.b x31, x31, 20
+    cv.maxu.sci.b x6, x7, 0
+    cv.maxu.sci.b x6, x7, 63
+    cv.maxu.sci.h x0, x0, 20
+    cv.maxu.sci.h x1, x1, 20
+    cv.maxu.sci.h x2, x2, 20
+    cv.maxu.sci.h x8, x8, 20
+    cv.maxu.sci.h x20, x20, 20
+    cv.maxu.sci.h x31, x31, 20
+    cv.maxu.sci.h x6, x7, 0
+    cv.maxu.sci.h x6, x7, 63
+    cv.min.b x0, x0, x0
+    cv.min.b x1, x1, x1
+    cv.min.b x2, x2, x2
+    cv.min.b x8, x8, x8
+    cv.min.b x20, x20, x20
+    cv.min.b x31, x31, x31
+    cv.min.h x0, x0, x0
+    cv.min.h x1, x1, x1
+    cv.min.h x2, x2, x2
+    cv.min.h x8, x8, x8
+    cv.min.h x20, x20, x20
+    cv.min.h x31, x31, x31
+    cv.min.sc.b x0, x0, x0
+    cv.min.sc.b x1, x1, x1
+    cv.min.sc.b x2, x2, x2
+    cv.min.sc.b x8, x8, x8
+    cv.min.sc.b x20, x20, x20
+    cv.min.sc.b x31, x31, x31
+    cv.min.sc.h x0, x0, x0
+    cv.min.sc.h x1, x1, x1
+    cv.min.sc.h x2, x2, x2
+    cv.min.sc.h x8, x8, x8
+    cv.min.sc.h x20, x20, x20
+    cv.min.sc.h x31, x31, x31
+    cv.min.sci.b x0, x0, 20
+    cv.min.sci.b x1, x1, 20
+    cv.min.sci.b x2, x2, 20
+    cv.min.sci.b x8, x8, 20
+    cv.min.sci.b x20, x20, 20
+    cv.min.sci.b x31, x31, 20
+    cv.min.sci.b x6, x7, -32
+    cv.min.sci.b x6, x7, 0
+    cv.min.sci.b x6, x7, 31
+    cv.min.sci.h x0, x0, 20
+    cv.min.sci.h x1, x1, 20
+    cv.min.sci.h x2, x2, 20
+    cv.min.sci.h x8, x8, 20
+    cv.min.sci.h x20, x20, 20
+    cv.min.sci.h x31, x31, 20
+    cv.min.sci.h x6, x7, -32
+    cv.min.sci.h x6, x7, 0
+    cv.min.sci.h x6, x7, 31
+    cv.minu.b x0, x0, x0
+    cv.minu.b x1, x1, x1
+    cv.minu.b x2, x2, x2
+    cv.minu.b x8, x8, x8
+    cv.minu.b x20, x20, x20
+    cv.minu.b x31, x31, x31
+    cv.minu.h x0, x0, x0
+    cv.minu.h x1, x1, x1
+    cv.minu.h x2, x2, x2
+    cv.minu.h x8, x8, x8
+    cv.minu.h x20, x20, x20
+    cv.minu.h x31, x31, x31
+    cv.minu.sc.b x0, x0, x0
+    cv.minu.sc.b x1, x1, x1
+    cv.minu.sc.b x2, x2, x2
+    cv.minu.sc.b x8, x8, x8
+    cv.minu.sc.b x20, x20, x20
+    cv.minu.sc.b x31, x31, x31
+    cv.minu.sc.h x0, x0, x0
+    cv.minu.sc.h x1, x1, x1
+    cv.minu.sc.h x2, x2, x2
+    cv.minu.sc.h x8, x8, x8
+    cv.minu.sc.h x20, x20, x20
+    cv.minu.sc.h x31, x31, x31
+    cv.minu.sci.b x0, x0, 20
+    cv.minu.sci.b x1, x1, 20
+    cv.minu.sci.b x2, x2, 20
+    cv.minu.sci.b x8, x8, 20
+    cv.minu.sci.b x20, x20, 20
+    cv.minu.sci.b x31, x31, 20
+    cv.minu.sci.b x6, x7, 0
+    cv.minu.sci.b x6, x7, 63
+    cv.minu.sci.h x0, x0, 20
+    cv.minu.sci.h x1, x1, 20
+    cv.minu.sci.h x2, x2, 20
+    cv.minu.sci.h x8, x8, 20
+    cv.minu.sci.h x20, x20, 20
+    cv.minu.sci.h x31, x31, 20
+    cv.minu.sci.h x6, x7, 0
+    cv.minu.sci.h x6, x7, 63
+    cv.or.b x0, x0, x0
+    cv.or.b x1, x1, x1
+    cv.or.b x2, x2, x2
+    cv.or.b x8, x8, x8
+    cv.or.b x20, x20, x20
+    cv.or.b x31, x31, x31
+    cv.or.h x0, x0, x0
+    cv.or.h x1, x1, x1
+    cv.or.h x2, x2, x2
+    cv.or.h x8, x8, x8
+    cv.or.h x20, x20, x20
+    cv.or.h x31, x31, x31
+    cv.or.sc.b x0, x0, x0
+    cv.or.sc.b x1, x1, x1
+    cv.or.sc.b x2, x2, x2
+    cv.or.sc.b x8, x8, x8
+    cv.or.sc.b x20, x20, x20
+    cv.or.sc.b x31, x31, x31
+    cv.or.sc.h x0, x0, x0
+    cv.or.sc.h x1, x1, x1
+    cv.or.sc.h x2, x2, x2
+    cv.or.sc.h x8, x8, x8
+    cv.or.sc.h x20, x20, x20
+    cv.or.sc.h x31, x31, x31
+    cv.or.sci.b x0, x0, 20
+    cv.or.sci.b x1, x1, 20
+    cv.or.sci.b x2, x2, 20
+    cv.or.sci.b x8, x8, 20
+    cv.or.sci.b x20, x20, 20
+    cv.or.sci.b x31, x31, 20
+    cv.or.sci.b x6, x7, -32
+    cv.or.sci.b x6, x7, 0
+    cv.or.sci.b x6, x7, 31
+    cv.or.sci.h x0, x0, 20
+    cv.or.sci.h x1, x1, 20
+    cv.or.sci.h x2, x2, 20
+    cv.or.sci.h x8, x8, 20
+    cv.or.sci.h x20, x20, 20
+    cv.or.sci.h x31, x31, 20
+    cv.or.sci.h x6, x7, -32
+    cv.or.sci.h x6, x7, 0
+    cv.or.sci.h x6, x7, 31
+    cv.packhi.b x0, x0, x0
+    cv.packhi.b x1, x1, x1
+    cv.packhi.b x2, x2, x2
+    cv.packhi.b x8, x8, x8
+    cv.packhi.b x20, x20, x20
+    cv.packhi.b x31, x31, x31
+    cv.pack.h x0, x0, x0
+    cv.pack.h x1, x1, x1
+    cv.pack.h x2, x2, x2
+    cv.pack.h x8, x8, x8
+    cv.pack.h x20, x20, x20
+    cv.pack.h x31, x31, x31
+    cv.packlo.b x0, x0, x0
+    cv.packlo.b x1, x1, x1
+    cv.packlo.b x2, x2, x2
+    cv.packlo.b x8, x8, x8
+    cv.packlo.b x20, x20, x20
+    cv.packlo.b x31, x31, x31
+    cv.pack x0, x0, x0
+    cv.pack x1, x1, x1
+    cv.pack x2, x2, x2
+    cv.pack x8, x8, x8
+    cv.pack x20, x20, x20
+    cv.pack x31, x31, x31
+    cv.sdotsp.b x0, x0, x0
+    cv.sdotsp.b x1, x1, x1
+    cv.sdotsp.b x2, x2, x2
+    cv.sdotsp.b x8, x8, x8
+    cv.sdotsp.b x20, x20, x20
+    cv.sdotsp.b x31, x31, x31
+    cv.sdotsp.h x0, x0, x0
+    cv.sdotsp.h x1, x1, x1
+    cv.sdotsp.h x2, x2, x2
+    cv.sdotsp.h x8, x8, x8
+    cv.sdotsp.h x20, x20, x20
+    cv.sdotsp.h x31, x31, x31
+    cv.sdotsp.sc.b x0, x0, x0
+    cv.sdotsp.sc.b x1, x1, x1
+    cv.sdotsp.sc.b x2, x2, x2
+    cv.sdotsp.sc.b x8, x8, x8
+    cv.sdotsp.sc.b x20, x20, x20
+    cv.sdotsp.sc.b x31, x31, x31
+    cv.sdotsp.sc.h x0, x0, x0
+    cv.sdotsp.sc.h x1, x1, x1
+    cv.sdotsp.sc.h x2, x2, x2
+    cv.sdotsp.sc.h x8, x8, x8
+    cv.sdotsp.sc.h x20, x20, x20
+    cv.sdotsp.sc.h x31, x31, x31
+    cv.sdotsp.sci.b x0, x0, 20
+    cv.sdotsp.sci.b x1, x1, 20
+    cv.sdotsp.sci.b x2, x2, 20
+    cv.sdotsp.sci.b x8, x8, 20
+    cv.sdotsp.sci.b x20, x20, 20
+    cv.sdotsp.sci.b x31, x31, 20
+    cv.sdotsp.sci.b x6, x7, -32
+    cv.sdotsp.sci.b x6, x7, 0
+    cv.sdotsp.sci.b x6, x7, 31
+    cv.sdotsp.sci.h x0, x0, 20
+    cv.sdotsp.sci.h x1, x1, 20
+    cv.sdotsp.sci.h x2, x2, 20
+    cv.sdotsp.sci.h x8, x8, 20
+    cv.sdotsp.sci.h x20, x20, 20
+    cv.sdotsp.sci.h x31, x31, 20
+    cv.sdotsp.sci.h x6, x7, -32
+    cv.sdotsp.sci.h x6, x7, 0
+    cv.sdotsp.sci.h x6, x7, 31
+    cv.sdotup.b x0, x0, x0
+    cv.sdotup.b x1, x1, x1
+    cv.sdotup.b x2, x2, x2
+    cv.sdotup.b x8, x8, x8
+    cv.sdotup.b x20, x20, x20
+    cv.sdotup.b x31, x31, x31
+    cv.sdotup.h x0, x0, x0
+    cv.sdotup.h x1, x1, x1
+    cv.sdotup.h x2, x2, x2
+    cv.sdotup.h x8, x8, x8
+    cv.sdotup.h x20, x20, x20
+    cv.sdotup.h x31, x31, x31
+    cv.sdotup.sc.b x0, x0, x0
+    cv.sdotup.sc.b x1, x1, x1
+    cv.sdotup.sc.b x2, x2, x2
+    cv.sdotup.sc.b x8, x8, x8
+    cv.sdotup.sc.b x20, x20, x20
+    cv.sdotup.sc.b x31, x31, x31
+    cv.sdotup.sc.h x0, x0, x0
+    cv.sdotup.sc.h x1, x1, x1
+    cv.sdotup.sc.h x2, x2, x2
+    cv.sdotup.sc.h x8, x8, x8
+    cv.sdotup.sc.h x20, x20, x20
+    cv.sdotup.sc.h x31, x31, x31
+    cv.sdotup.sci.b x0, x0, 20
+    cv.sdotup.sci.b x1, x1, 20
+    cv.sdotup.sci.b x2, x2, 20
+    cv.sdotup.sci.b x8, x8, 20
+    cv.sdotup.sci.b x20, x20, 20
+    cv.sdotup.sci.b x31, x31, 20
+    cv.sdotup.sci.b x6, x7, 0
+    cv.sdotup.sci.b x6, x7, 63
+    cv.sdotup.sci.h x0, x0, 20
+    cv.sdotup.sci.h x1, x1, 20
+    cv.sdotup.sci.h x2, x2, 20
+    cv.sdotup.sci.h x8, x8, 20
+    cv.sdotup.sci.h x20, x20, 20
+    cv.sdotup.sci.h x31, x31, 20
+    cv.sdotup.sci.h x6, x7, 0
+    cv.sdotup.sci.h x6, x7, 63
+    cv.sdotusp.b x0, x0, x0
+    cv.sdotusp.b x1, x1, x1
+    cv.sdotusp.b x2, x2, x2
+    cv.sdotusp.b x8, x8, x8
+    cv.sdotusp.b x20, x20, x20
+    cv.sdotusp.b x31, x31, x31
+    cv.sdotusp.h x0, x0, x0
+    cv.sdotusp.h x1, x1, x1
+    cv.sdotusp.h x2, x2, x2
+    cv.sdotusp.h x8, x8, x8
+    cv.sdotusp.h x20, x20, x20
+    cv.sdotusp.h x31, x31, x31
+    cv.sdotusp.sc.b x0, x0, x0
+    cv.sdotusp.sc.b x1, x1, x1
+    cv.sdotusp.sc.b x2, x2, x2
+    cv.sdotusp.sc.b x8, x8, x8
+    cv.sdotusp.sc.b x20, x20, x20
+    cv.sdotusp.sc.b x31, x31, x31
+    cv.sdotusp.sc.h x0, x0, x0
+    cv.sdotusp.sc.h x1, x1, x1
+    cv.sdotusp.sc.h x2, x2, x2
+    cv.sdotusp.sc.h x8, x8, x8
+    cv.sdotusp.sc.h x20, x20, x20
+    cv.sdotusp.sc.h x31, x31, x31
+    cv.sdotusp.sci.b x0, x0, 20
+    cv.sdotusp.sci.b x1, x1, 20
+    cv.sdotusp.sci.b x2, x2, 20
+    cv.sdotusp.sci.b x8, x8, 20
+    cv.sdotusp.sci.b x20, x20, 20
+    cv.sdotusp.sci.b x31, x31, 20
+    cv.sdotusp.sci.b x6, x7, -32
+    cv.sdotusp.sci.b x6, x7, 0
+    cv.sdotusp.sci.b x6, x7, 31
+    cv.sdotusp.sci.h x0, x0, 20
+    cv.sdotusp.sci.h x1, x1, 20
+    cv.sdotusp.sci.h x2, x2, 20
+    cv.sdotusp.sci.h x8, x8, 20
+    cv.sdotusp.sci.h x20, x20, 20
+    cv.sdotusp.sci.h x31, x31, 20
+    cv.sdotusp.sci.h x6, x7, -32
+    cv.sdotusp.sci.h x6, x7, 0
+    cv.sdotusp.sci.h x6, x7, 31
+    cv.shuffle2.b x0, x0, x0
+    cv.shuffle2.b x1, x1, x1
+    cv.shuffle2.b x2, x2, x2
+    cv.shuffle2.b x8, x8, x8
+    cv.shuffle2.b x20, x20, x20
+    cv.shuffle2.b x31, x31, x31
+    cv.shuffle2.h x0, x0, x0
+    cv.shuffle2.h x1, x1, x1
+    cv.shuffle2.h x2, x2, x2
+    cv.shuffle2.h x8, x8, x8
+    cv.shuffle2.h x20, x20, x20
+    cv.shuffle2.h x31, x31, x31
+    cv.shuffle.b x0, x0, x0
+    cv.shuffle.b x1, x1, x1
+    cv.shuffle.b x2, x2, x2
+    cv.shuffle.b x8, x8, x8
+    cv.shuffle.b x20, x20, x20
+    cv.shuffle.b x31, x31, x31
+    cv.shuffle.h x0, x0, x0
+    cv.shuffle.h x1, x1, x1
+    cv.shuffle.h x2, x2, x2
+    cv.shuffle.h x8, x8, x8
+    cv.shuffle.h x20, x20, x20
+    cv.shuffle.h x31, x31, x31
+    cv.shufflei0.sci.b x0, x0, 20
+    cv.shufflei0.sci.b x1, x1, 20
+    cv.shufflei0.sci.b x2, x2, 20
+    cv.shufflei0.sci.b x8, x8, 20
+    cv.shufflei0.sci.b x20, x20, 20
+    cv.shufflei0.sci.b x31, x31, 20
+    cv.shufflei0.sci.b x6, x7, 0
+    cv.shufflei0.sci.b x6, x7, 63
+    cv.shufflei1.sci.b x0, x0, 20
+    cv.shufflei1.sci.b x1, x1, 20
+    cv.shufflei1.sci.b x2, x2, 20
+    cv.shufflei1.sci.b x8, x8, 20
+    cv.shufflei1.sci.b x20, x20, 20
+    cv.shufflei1.sci.b x31, x31, 20
+    cv.shufflei1.sci.b x6, x7, 0
+    cv.shufflei1.sci.b x6, x7, 63
+    cv.shufflei2.sci.b x0, x0, 20
+    cv.shufflei2.sci.b x1, x1, 20
+    cv.shufflei2.sci.b x2, x2, 20
+    cv.shufflei2.sci.b x8, x8, 20
+    cv.shufflei2.sci.b x20, x20, 20
+    cv.shufflei2.sci.b x31, x31, 20
+    cv.shufflei2.sci.b x6, x7, 0
+    cv.shufflei2.sci.b x6, x7, 63
+    cv.shufflei3.sci.b x0, x0, 20
+    cv.shufflei3.sci.b x1, x1, 20
+    cv.shufflei3.sci.b x2, x2, 20
+    cv.shufflei3.sci.b x8, x8, 20
+    cv.shufflei3.sci.b x20, x20, 20
+    cv.shufflei3.sci.b x31, x31, 20
+    cv.shufflei3.sci.b x6, x7, 0
+    cv.shufflei3.sci.b x6, x7, 63
+    cv.shuffle.sci.h x0, x0, 2
+    cv.shuffle.sci.h x1, x1, 2
+    cv.shuffle.sci.h x2, x2, 2
+    cv.shuffle.sci.h x8, x8, 2
+    cv.shuffle.sci.h x20, x20, 2
+    cv.shuffle.sci.h x31, x31, 2
+    cv.shuffle.sci.h x6, x7, 0
+    cv.shuffle.sci.h x6, x7, 3
+    cv.sll.b x0, x0, x0
+    cv.sll.b x1, x1, x1
+    cv.sll.b x2, x2, x2
+    cv.sll.b x8, x8, x8
+    cv.sll.b x20, x20, x20
+    cv.sll.b x31, x31, x31
+    cv.sll.h x0, x0, x0
+    cv.sll.h x1, x1, x1
+    cv.sll.h x2, x2, x2
+    cv.sll.h x8, x8, x8
+    cv.sll.h x20, x20, x20
+    cv.sll.h x31, x31, x31
+    cv.sll.sc.b x0, x0, x0
+    cv.sll.sc.b x1, x1, x1
+    cv.sll.sc.b x2, x2, x2
+    cv.sll.sc.b x8, x8, x8
+    cv.sll.sc.b x20, x20, x20
+    cv.sll.sc.b x31, x31, x31
+    cv.sll.sc.h x0, x0, x0
+    cv.sll.sc.h x1, x1, x1
+    cv.sll.sc.h x2, x2, x2
+    cv.sll.sc.h x8, x8, x8
+    cv.sll.sc.h x20, x20, x20
+    cv.sll.sc.h x31, x31, x31
+    cv.sll.sci.b x0, x0, 4
+    cv.sll.sci.b x1, x1, 4
+    cv.sll.sci.b x2, x2, 4
+    cv.sll.sci.b x8, x8, 4
+    cv.sll.sci.b x20, x20, 4
+    cv.sll.sci.b x31, x31, 4
+    cv.sll.sci.b x6, x7, 0
+    cv.sll.sci.b x6, x7, 7
+    cv.sll.sci.h x0, x0, 12
+    cv.sll.sci.h x1, x1, 12
+    cv.sll.sci.h x2, x2, 12
+    cv.sll.sci.h x8, x8, 12
+    cv.sll.sci.h x20, x20, 12
+    cv.sll.sci.h x31, x31, 12
+    cv.sll.sci.h x6, x7, 0
+    cv.sll.sci.h x6, x7, 15
+    cv.sra.b x0, x0, x0
+    cv.sra.b x1, x1, x1
+    cv.sra.b x2, x2, x2
+    cv.sra.b x8, x8, x8
+    cv.sra.b x20, x20, x20
+    cv.sra.b x31, x31, x31
+    cv.sra.h x0, x0, x0
+    cv.sra.h x1, x1, x1
+    cv.sra.h x2, x2, x2
+    cv.sra.h x8, x8, x8
+    cv.sra.h x20, x20, x20
+    cv.sra.h x31, x31, x31
+    cv.sra.sc.b x0, x0, x0
+    cv.sra.sc.b x1, x1, x1
+    cv.sra.sc.b x2, x2, x2
+    cv.sra.sc.b x8, x8, x8
+    cv.sra.sc.b x20, x20, x20
+    cv.sra.sc.b x31, x31, x31
+    cv.sra.sc.h x0, x0, x0
+    cv.sra.sc.h x1, x1, x1
+    cv.sra.sc.h x2, x2, x2
+    cv.sra.sc.h x8, x8, x8
+    cv.sra.sc.h x20, x20, x20
+    cv.sra.sc.h x31, x31, x31
+    cv.sra.sci.b x0, x0, 4
+    cv.sra.sci.b x1, x1, 4
+    cv.sra.sci.b x2, x2, 4
+    cv.sra.sci.b x8, x8, 4
+    cv.sra.sci.b x20, x20, 4
+    cv.sra.sci.b x31, x31, 4
+    cv.sra.sci.b x6, x7, 0
+    cv.sra.sci.b x6, x7, 7
+    cv.sra.sci.h x0, x0, 12
+    cv.sra.sci.h x1, x1, 12
+    cv.sra.sci.h x2, x2, 12
+    cv.sra.sci.h x8, x8, 12
+    cv.sra.sci.h x20, x20, 12
+    cv.sra.sci.h x31, x31, 12
+    cv.sra.sci.h x6, x7, 0
+    cv.sra.sci.h x6, x7, 15
+    cv.srl.b x0, x0, x0
+    cv.srl.b x1, x1, x1
+    cv.srl.b x2, x2, x2
+    cv.srl.b x8, x8, x8
+    cv.srl.b x20, x20, x20
+    cv.srl.b x31, x31, x31
+    cv.srl.h x0, x0, x0
+    cv.srl.h x1, x1, x1
+    cv.srl.h x2, x2, x2
+    cv.srl.h x8, x8, x8
+    cv.srl.h x20, x20, x20
+    cv.srl.h x31, x31, x31
+    cv.srl.sc.b x0, x0, x0
+    cv.srl.sc.b x1, x1, x1
+    cv.srl.sc.b x2, x2, x2
+    cv.srl.sc.b x8, x8, x8
+    cv.srl.sc.b x20, x20, x20
+    cv.srl.sc.b x31, x31, x31
+    cv.srl.sc.h x0, x0, x0
+    cv.srl.sc.h x1, x1, x1
+    cv.srl.sc.h x2, x2, x2
+    cv.srl.sc.h x8, x8, x8
+    cv.srl.sc.h x20, x20, x20
+    cv.srl.sc.h x31, x31, x31
+    cv.srl.sci.b x0, x0, 4
+    cv.srl.sci.b x1, x1, 4
+    cv.srl.sci.b x2, x2, 4
+    cv.srl.sci.b x8, x8, 4
+    cv.srl.sci.b x20, x20, 4
+    cv.srl.sci.b x31, x31, 4
+    cv.srl.sci.b x6, x7, 0
+    cv.srl.sci.b x6, x7, 7
+    cv.srl.sci.h x0, x0, 12
+    cv.srl.sci.h x1, x1, 12
+    cv.srl.sci.h x2, x2, 12
+    cv.srl.sci.h x8, x8, 12
+    cv.srl.sci.h x20, x20, 12
+    cv.srl.sci.h x31, x31, 12
+    cv.srl.sci.h x6, x7, 0
+    cv.srl.sci.h x6, x7, 15
+    cv.sub.b x0, x0, x0
+    cv.sub.b x1, x1, x1
+    cv.sub.b x2, x2, x2
+    cv.sub.b x8, x8, x8
+    cv.sub.b x20, x20, x20
+    cv.sub.b x31, x31, x31
+    cv.sub.div2 x0, x0, x0
+    cv.sub.div2 x1, x1, x1
+    cv.sub.div2 x2, x2, x2
+    cv.sub.div2 x8, x8, x8
+    cv.sub.div2 x20, x20, x20
+    cv.sub.div2 x31, x31, x31
+    cv.sub.div4 x0, x0, x0
+    cv.sub.div4 x1, x1, x1
+    cv.sub.div4 x2, x2, x2
+    cv.sub.div4 x8, x8, x8
+    cv.sub.div4 x20, x20, x20
+    cv.sub.div4 x31, x31, x31
+    cv.sub.div8 x0, x0, x0
+    cv.sub.div8 x1, x1, x1
+    cv.sub.div8 x2, x2, x2
+    cv.sub.div8 x8, x8, x8
+    cv.sub.div8 x20, x20, x20
+    cv.sub.div8 x31, x31, x31
+    cv.sub.h x0, x0, x0
+    cv.sub.h x1, x1, x1
+    cv.sub.h x2, x2, x2
+    cv.sub.h x8, x8, x8
+    cv.sub.h x20, x20, x20
+    cv.sub.h x31, x31, x31
+    cv.subrotmj.div2 x0, x0, x0
+    cv.subrotmj.div2 x1, x1, x1
+    cv.subrotmj.div2 x2, x2, x2
+    cv.subrotmj.div2 x8, x8, x8
+    cv.subrotmj.div2 x20, x20, x20
+    cv.subrotmj.div2 x31, x31, x31
+    cv.subrotmj.div4 x0, x0, x0
+    cv.subrotmj.div4 x1, x1, x1
+    cv.subrotmj.div4 x2, x2, x2
+    cv.subrotmj.div4 x8, x8, x8
+    cv.subrotmj.div4 x20, x20, x20
+    cv.subrotmj.div4 x31, x31, x31
+    cv.subrotmj.div8 x0, x0, x0
+    cv.subrotmj.div8 x1, x1, x1
+    cv.subrotmj.div8 x2, x2, x2
+    cv.subrotmj.div8 x8, x8, x8
+    cv.subrotmj.div8 x20, x20, x20
+    cv.subrotmj.div8 x31, x31, x31
+    cv.subrotmj x0, x0, x0
+    cv.subrotmj x1, x1, x1
+    cv.subrotmj x2, x2, x2
+    cv.subrotmj x8, x8, x8
+    cv.subrotmj x20, x20, x20
+    cv.subrotmj x31, x31, x31
+    cv.sub.sc.b x0, x0, x0
+    cv.sub.sc.b x1, x1, x1
+    cv.sub.sc.b x2, x2, x2
+    cv.sub.sc.b x8, x8, x8
+    cv.sub.sc.b x20, x20, x20
+    cv.sub.sc.b x31, x31, x31
+    cv.sub.sc.h x0, x0, x0
+    cv.sub.sc.h x1, x1, x1
+    cv.sub.sc.h x2, x2, x2
+    cv.sub.sc.h x8, x8, x8
+    cv.sub.sc.h x20, x20, x20
+    cv.sub.sc.h x31, x31, x31
+    cv.sub.sci.b x0, x0, 20
+    cv.sub.sci.b x1, x1, 20
+    cv.sub.sci.b x2, x2, 20
+    cv.sub.sci.b x8, x8, 20
+    cv.sub.sci.b x20, x20, 20
+    cv.sub.sci.b x31, x31, 20
+    cv.sub.sci.b x6, x7, -32
+    cv.sub.sci.b x6, x7, 0
+    cv.sub.sci.b x6, x7, 31
+    cv.sub.sci.h x0, x0, 20
+    cv.sub.sci.h x1, x1, 20
+    cv.sub.sci.h x2, x2, 20
+    cv.sub.sci.h x8, x8, 20
+    cv.sub.sci.h x20, x20, 20
+    cv.sub.sci.h x31, x31, 20
+    cv.sub.sci.h x6, x7, -32
+    cv.sub.sci.h x6, x7, 0
+    cv.sub.sci.h x6, x7, 31
+    cv.xor.b x0, x0, x0
+    cv.xor.b x1, x1, x1
+    cv.xor.b x2, x2, x2
+    cv.xor.b x8, x8, x8
+    cv.xor.b x20, x20, x20
+    cv.xor.b x31, x31, x31
+    cv.xor.h x0, x0, x0
+    cv.xor.h x1, x1, x1
+    cv.xor.h x2, x2, x2
+    cv.xor.h x8, x8, x8
+    cv.xor.h x20, x20, x20
+    cv.xor.h x31, x31, x31
+    cv.xor.sc.b x0, x0, x0
+    cv.xor.sc.b x1, x1, x1
+    cv.xor.sc.b x2, x2, x2
+    cv.xor.sc.b x8, x8, x8
+    cv.xor.sc.b x20, x20, x20
+    cv.xor.sc.b x31, x31, x31
+    cv.xor.sc.h x0, x0, x0
+    cv.xor.sc.h x1, x1, x1
+    cv.xor.sc.h x2, x2, x2
+    cv.xor.sc.h x8, x8, x8
+    cv.xor.sc.h x20, x20, x20
+    cv.xor.sc.h x31, x31, x31
+    cv.xor.sci.b x0, x0, 20
+    cv.xor.sci.b x1, x1, 20
+    cv.xor.sci.b x2, x2, 20
+    cv.xor.sci.b x8, x8, 20
+    cv.xor.sci.b x20, x20, 20
+    cv.xor.sci.b x31, x31, 20
+    cv.xor.sci.b x6, x7, -32
+    cv.xor.sci.b x6, x7, 0
+    cv.xor.sci.b x6, x7, 31
+    cv.xor.sci.h x0, x0, 20
+    cv.xor.sci.h x1, x1, 20
+    cv.xor.sci.h x2, x2, 20
+    cv.xor.sci.h x8, x8, 20
+    cv.xor.sci.h x20, x20, 20
+    cv.xor.sci.h x31, x31, 20
+    cv.xor.sci.h x6, x7, -32
+    cv.xor.sci.h x6, x7, 0
+    cv.xor.sci.h x6, x7, 31
diff --git a/gas/testsuite/gas/riscv/zcmop.d b/gas/testsuite/gas/riscv/zcmop.d
new file mode 100644
index 0000000..5f608c6
--- /dev/null
+++ b/gas/testsuite/gas/riscv/zcmop.d
@@ -0,0 +1,16 @@
+#as: -march=rv64i_zcmop
+#objdump: -d
+
+.*:[ 	]+file format .*
+
+Disassembly of section .text:
+
+0+000 <target>:
+[ 	]+[0-9a-f]+:[ 	]+6081[ 	]+c.mop.1
+[ 	]+[0-9a-f]+:[ 	]+6181[ 	]+c.mop.3
+[ 	]+[0-9a-f]+:[ 	]+6281[ 	]+c.mop.5
+[ 	]+[0-9a-f]+:[ 	]+6381[ 	]+c.mop.7
+[ 	]+[0-9a-f]+:[ 	]+6481[ 	]+c.mop.9
+[ 	]+[0-9a-f]+:[ 	]+6581[ 	]+c.mop.11
+[ 	]+[0-9a-f]+:[ 	]+6681[ 	]+c.mop.13
+[ 	]+[0-9a-f]+:[ 	]+6781[ 	]+c.mop.15
diff --git a/gas/testsuite/gas/riscv/zcmop.s b/gas/testsuite/gas/riscv/zcmop.s
new file mode 100644
index 0000000..4b02e69
--- /dev/null
+++ b/gas/testsuite/gas/riscv/zcmop.s
@@ -0,0 +1,10 @@
+target:
+	# c.mop.n
+	c.mop.1
+	c.mop.3
+	c.mop.5
+	c.mop.7
+	c.mop.9
+	c.mop.11
+	c.mop.13
+	c.mop.15
diff --git a/gas/testsuite/gas/riscv/zcmp-mv.d b/gas/testsuite/gas/riscv/zcmp-mv.d
new file mode 100644
index 0000000..351d301
--- /dev/null
+++ b/gas/testsuite/gas/riscv/zcmp-mv.d
@@ -0,0 +1,26 @@
+#as: -march=rv64i_zcmp
+#source: zcmp-mv.s
+#objdump: -dr -Mno-aliases
+
+.*:[	 ]+file format .*
+
+
+Disassembly of section .text:
+
+0+000 <target>:
+[	 ]*[0-9a-f]+:[	 ]+ac7e[	 ]+cm.mva01s[	 ]+s0,s7
+[	 ]*[0-9a-f]+:[	 ]+ac7a[	 ]+cm.mva01s[	 ]+s0,s6
+[	 ]*[0-9a-f]+:[	 ]+acfe[	 ]+cm.mva01s[	 ]+s1,s7
+[	 ]*[0-9a-f]+:[	 ]+acfa[	 ]+cm.mva01s[	 ]+s1,s6
+[	 ]*[0-9a-f]+:[	 ]+afee[	 ]+cm.mva01s[	 ]+s7,s3
+[	 ]*[0-9a-f]+:[	 ]+ade2[	 ]+cm.mva01s[	 ]+s3,s0
+[	 ]*[0-9a-f]+:[	 ]+aef2[	 ]+cm.mva01s[	 ]+s5,s4
+[	 ]*[0-9a-f]+:[	 ]+aefa[	 ]+cm.mva01s[	 ]+s5,s6
+[	 ]*[0-9a-f]+:[	 ]+afa2[	 ]+cm.mvsa01[	 ]+s7,s0
+[	 ]*[0-9a-f]+:[	 ]+af22[	 ]+cm.mvsa01[	 ]+s6,s0
+[	 ]*[0-9a-f]+:[	 ]+afa6[	 ]+cm.mvsa01[	 ]+s7,s1
+[	 ]*[0-9a-f]+:[	 ]+af26[	 ]+cm.mvsa01[	 ]+s6,s1
+[	 ]*[0-9a-f]+:[	 ]+adbe[	 ]+cm.mvsa01[	 ]+s3,s7
+[	 ]*[0-9a-f]+:[	 ]+ada2[	 ]+cm.mvsa01[	 ]+s3,s0
+[	 ]*[0-9a-f]+:[	 ]+aeb2[	 ]+cm.mvsa01[	 ]+s5,s4
+[	 ]*[0-9a-f]+:[	 ]+aeba[	 ]+cm.mvsa01[	 ]+s5,s6
diff --git a/gas/testsuite/gas/riscv/zcmp-mv.s b/gas/testsuite/gas/riscv/zcmp-mv.s
new file mode 100644
index 0000000..0bcf2a6
--- /dev/null
+++ b/gas/testsuite/gas/riscv/zcmp-mv.s
@@ -0,0 +1,21 @@
+target:
+
+	# cm.mva01s
+	cm.mva01s s0,s7
+	cm.mva01s s0,s6
+	cm.mva01s s1,s7
+	cm.mva01s s1,s6
+	cm.mva01s s7,s3
+	cm.mva01s x19,s0
+	cm.mva01s s5,x20
+	cm.mva01s x21,x22
+
+	# cm.mvsa01
+	cm.mvsa01 s7,s0
+	cm.mvsa01 s6,s0
+	cm.mvsa01 s7,s1
+	cm.mvsa01 s6,s1
+	cm.mvsa01 s3,s7
+	cm.mvsa01 x19,s0
+	cm.mvsa01 s5,x20
+	cm.mvsa01 x21,x22
diff --git a/gas/testsuite/gas/riscv/zext-to-pack-encoding.d b/gas/testsuite/gas/riscv/zext-to-pack-encoding.d
new file mode 100644
index 0000000..86fcbce
--- /dev/null
+++ b/gas/testsuite/gas/riscv/zext-to-pack-encoding.d
@@ -0,0 +1,11 @@
+#as: -march=rv32i_zbkb
+#source: zext-to-pack.s
+#objdump: -d
+
+.*:[ 	]+file format .*
+
+
+Disassembly of section .text:
+
+0+000 <target>:
+[ 	]+[0-9a-f]+:[ 	]+08054533[ 	]+zext.h[ 	]+a0,a0
diff --git a/gas/testsuite/gas/riscv/zext-to-pack.s b/gas/testsuite/gas/riscv/zext-to-pack.s
new file mode 100644
index 0000000..bb2be3d
--- /dev/null
+++ b/gas/testsuite/gas/riscv/zext-to-pack.s
@@ -0,0 +1,2 @@
+target:
+	zext.h	a0, a0
diff --git a/gas/testsuite/gas/riscv/zext-to-packw-encoding.d b/gas/testsuite/gas/riscv/zext-to-packw-encoding.d
new file mode 100644
index 0000000..04e21e7
--- /dev/null
+++ b/gas/testsuite/gas/riscv/zext-to-packw-encoding.d
@@ -0,0 +1,11 @@
+#as: -march=rv64i_zbkb
+#source: zext-to-pack.s
+#objdump: -d
+
+.*:[ 	]+file format .*
+
+
+Disassembly of section .text:
+
+0+000 <target>:
+[ 	]+[0-9a-f]+:[ 	]+0805453b[ 	]+zext.h[ 	]+a0,a0
diff --git a/gas/testsuite/gas/riscv/zimop.d b/gas/testsuite/gas/riscv/zimop.d
new file mode 100644
index 0000000..becb72c
--- /dev/null
+++ b/gas/testsuite/gas/riscv/zimop.d
@@ -0,0 +1,48 @@
+#as: -march=rv64i_zimop
+#objdump: -d
+
+.*:[ 	]+file format .*
+
+Disassembly of section .text:
+
+0+000 <target>:
+[ 	]+[0-9a-f]+:[ 	]+81c5c573[ 	]+mop.r.0[ 	]+a0,a1
+[ 	]+[0-9a-f]+:[ 	]+81d5c573[ 	]+mop.r.1[ 	]+a0,a1
+[ 	]+[0-9a-f]+:[ 	]+81e5c573[ 	]+mop.r.2[ 	]+a0,a1
+[ 	]+[0-9a-f]+:[ 	]+81f5c573[ 	]+mop.r.3[ 	]+a0,a1
+[ 	]+[0-9a-f]+:[ 	]+85c5c573[ 	]+mop.r.4[ 	]+a0,a1
+[ 	]+[0-9a-f]+:[ 	]+85d5c573[ 	]+mop.r.5[ 	]+a0,a1
+[ 	]+[0-9a-f]+:[ 	]+85e5c573[ 	]+mop.r.6[ 	]+a0,a1
+[ 	]+[0-9a-f]+:[ 	]+85f5c573[ 	]+mop.r.7[ 	]+a0,a1
+[ 	]+[0-9a-f]+:[ 	]+89c5c573[ 	]+mop.r.8[ 	]+a0,a1
+[ 	]+[0-9a-f]+:[ 	]+89d5c573[ 	]+mop.r.9[ 	]+a0,a1
+[ 	]+[0-9a-f]+:[ 	]+89e5c573[ 	]+mop.r.10[ 	]+a0,a1
+[ 	]+[0-9a-f]+:[ 	]+89f5c573[ 	]+mop.r.11[ 	]+a0,a1
+[ 	]+[0-9a-f]+:[ 	]+8dc5c573[ 	]+mop.r.12[ 	]+a0,a1
+[ 	]+[0-9a-f]+:[ 	]+8dd5c573[ 	]+mop.r.13[ 	]+a0,a1
+[ 	]+[0-9a-f]+:[ 	]+8de5c573[ 	]+mop.r.14[ 	]+a0,a1
+[ 	]+[0-9a-f]+:[ 	]+8df5c573[ 	]+mop.r.15[ 	]+a0,a1
+[ 	]+[0-9a-f]+:[ 	]+c1c5c573[ 	]+mop.r.16[ 	]+a0,a1
+[ 	]+[0-9a-f]+:[ 	]+c1d5c573[ 	]+mop.r.17[ 	]+a0,a1
+[ 	]+[0-9a-f]+:[ 	]+c1e5c573[ 	]+mop.r.18[ 	]+a0,a1
+[ 	]+[0-9a-f]+:[ 	]+c1f5c573[ 	]+mop.r.19[ 	]+a0,a1
+[ 	]+[0-9a-f]+:[ 	]+c5c5c573[ 	]+mop.r.20[ 	]+a0,a1
+[ 	]+[0-9a-f]+:[ 	]+c5d5c573[ 	]+mop.r.21[ 	]+a0,a1
+[ 	]+[0-9a-f]+:[ 	]+c5e5c573[ 	]+mop.r.22[ 	]+a0,a1
+[ 	]+[0-9a-f]+:[ 	]+c5f5c573[ 	]+mop.r.23[ 	]+a0,a1
+[ 	]+[0-9a-f]+:[ 	]+c9c5c573[ 	]+mop.r.24[ 	]+a0,a1
+[ 	]+[0-9a-f]+:[ 	]+c9d5c573[ 	]+mop.r.25[ 	]+a0,a1
+[ 	]+[0-9a-f]+:[ 	]+c9e5c573[ 	]+mop.r.26[ 	]+a0,a1
+[ 	]+[0-9a-f]+:[ 	]+c9f5c573[ 	]+mop.r.27[ 	]+a0,a1
+[ 	]+[0-9a-f]+:[ 	]+cdc5c573[ 	]+mop.r.28[ 	]+a0,a1
+[ 	]+[0-9a-f]+:[ 	]+cdd5c573[ 	]+mop.r.29[ 	]+a0,a1
+[ 	]+[0-9a-f]+:[ 	]+cde5c573[ 	]+mop.r.30[ 	]+a0,a1
+[ 	]+[0-9a-f]+:[ 	]+cdf5c573[ 	]+mop.r.31[ 	]+a0,a1
+[ 	]+[0-9a-f]+:[ 	]+82c5c573[ 	]+mop.rr.0[ 	]+a0,a1,a2
+[ 	]+[0-9a-f]+:[ 	]+86c5c573[ 	]+mop.rr.1[ 	]+a0,a1,a2
+[ 	]+[0-9a-f]+:[ 	]+8ac5c573[ 	]+mop.rr.2[ 	]+a0,a1,a2
+[ 	]+[0-9a-f]+:[ 	]+8ec5c573[ 	]+mop.rr.3[ 	]+a0,a1,a2
+[ 	]+[0-9a-f]+:[ 	]+c2c5c573[ 	]+mop.rr.4[ 	]+a0,a1,a2
+[ 	]+[0-9a-f]+:[ 	]+c6c5c573[ 	]+mop.rr.5[ 	]+a0,a1,a2
+[ 	]+[0-9a-f]+:[ 	]+cac5c573[ 	]+mop.rr.6[ 	]+a0,a1,a2
+[ 	]+[0-9a-f]+:[ 	]+cec5c573[ 	]+mop.rr.7[ 	]+a0,a1,a2
diff --git a/gas/testsuite/gas/riscv/zimop.s b/gas/testsuite/gas/riscv/zimop.s
new file mode 100644
index 0000000..d244c1f
--- /dev/null
+++ b/gas/testsuite/gas/riscv/zimop.s
@@ -0,0 +1,43 @@
+target:
+	# mop.r.n
+	mop.r.0 a0, a1
+	mop.r.1 a0, a1
+	mop.r.2 a0, a1
+	mop.r.3 a0, a1
+	mop.r.4 a0, a1
+	mop.r.5 a0, a1
+	mop.r.6 a0, a1
+	mop.r.7 a0, a1
+	mop.r.8 a0, a1
+	mop.r.9 a0, a1
+	mop.r.10 a0, a1
+	mop.r.11 a0, a1
+	mop.r.12 a0, a1
+	mop.r.13 a0, a1
+	mop.r.14 a0, a1
+	mop.r.15 a0, a1
+	mop.r.16 a0, a1
+	mop.r.17 a0, a1
+	mop.r.18 a0, a1
+	mop.r.19 a0, a1
+	mop.r.20 a0, a1
+	mop.r.21 a0, a1
+	mop.r.22 a0, a1
+	mop.r.23 a0, a1
+	mop.r.24 a0, a1
+	mop.r.25 a0, a1
+	mop.r.26 a0, a1
+	mop.r.27 a0, a1
+	mop.r.28 a0, a1
+	mop.r.29 a0, a1
+	mop.r.30 a0, a1
+	mop.r.31 a0, a1
+	# mop.rr.n
+	mop.rr.0 a0, a1, a2
+	mop.rr.1 a0, a1, a2
+	mop.rr.2 a0, a1, a2
+	mop.rr.3 a0, a1, a2
+	mop.rr.4 a0, a1, a2
+	mop.rr.5 a0, a1, a2
+	mop.rr.6 a0, a1, a2
+	mop.rr.7 a0, a1, a2
diff --git a/gas/testsuite/gas/s390/s390.exp b/gas/testsuite/gas/s390/s390.exp
index a4e8dbc..1d5d97f 100644
--- a/gas/testsuite/gas/s390/s390.exp
+++ b/gas/testsuite/gas/s390/s390.exp
@@ -43,6 +43,7 @@ if [expr [istarget "s390-*-*"] ||  [istarget "s390x-*-*"]]  then {
     run_dump_test "zarch-arch12" "{as -m64} {as -march=arch12}"
     run_dump_test "zarch-arch13" "{as -m64} {as -march=arch13}"
     run_dump_test "zarch-arch14" "{as -m64} {as -march=arch14}"
+    run_dump_test "zarch-arch15" "{as -m64} {as -march=arch15}"
     run_dump_test "zarch-reloc" "{as -m64}"
     run_dump_test "zarch-operands" "{as -m64} {as -march=z9-109}"
     run_dump_test "zarch-machine" "{as -m64} {as -march=z900}"
diff --git a/gas/testsuite/gas/s390/zarch-arch15.d b/gas/testsuite/gas/s390/zarch-arch15.d
new file mode 100644
index 0000000..955c970
--- /dev/null
+++ b/gas/testsuite/gas/s390/zarch-arch15.d
@@ -0,0 +1,102 @@
+#name: s390x opcode
+#objdump: -dr
+
+.*: +file format .*
+
+Disassembly of section .text:
+
+.* <foo>:
+.*:	e7 f1 4d 00 87 89 [	 ]*vblend	%v15,%v17,%v20,%v24,13
+.*:	e7 f1 40 00 87 89 [	 ]*vblendb	%v15,%v17,%v20,%v24
+.*:	e7 f1 41 00 87 89 [	 ]*vblendh	%v15,%v17,%v20,%v24
+.*:	e7 f1 42 00 87 89 [	 ]*vblendf	%v15,%v17,%v20,%v24
+.*:	e7 f1 43 00 87 89 [	 ]*vblendg	%v15,%v17,%v20,%v24
+.*:	e7 f1 44 00 87 89 [	 ]*vblendq	%v15,%v17,%v20,%v24
+.*:	e7 f1 40 fd 87 88 [	 ]*veval	%v15,%v17,%v20,%v24,253
+.*:	e7 f1 00 00 d4 54 [	 ]*vgem	%v15,%v17,13
+.*:	e7 f1 00 00 04 54 [	 ]*vgemb	%v15,%v17
+.*:	e7 f1 00 00 14 54 [	 ]*vgemh	%v15,%v17
+.*:	e7 f1 00 00 24 54 [	 ]*vgemf	%v15,%v17
+.*:	e7 f1 00 00 34 54 [	 ]*vgemg	%v15,%v17
+.*:	e7 f1 00 00 44 54 [	 ]*vgemq	%v15,%v17
+.*:	e7 f1 00 00 34 d7 [	 ]*vuphg	%v15,%v17
+.*:	e7 f1 00 00 34 d5 [	 ]*vuplhg	%v15,%v17
+.*:	e7 f1 00 00 34 d6 [	 ]*vuplg	%v15,%v17
+.*:	e7 f1 00 00 34 d4 [	 ]*vupllg	%v15,%v17
+.*:	e7 f1 40 00 46 f2 [	 ]*vavgq	%v15,%v17,%v20
+.*:	e7 f1 40 00 46 f0 [	 ]*vavglq	%v15,%v17,%v20
+.*:	e7 f1 00 00 44 db [	 ]*vecq	%v15,%v17
+.*:	e7 f1 00 00 44 d9 [	 ]*veclq	%v15,%v17
+.*:	e7 f1 40 00 46 f8 [	 ]*vceqq	%v15,%v17,%v20
+.*:	e7 f1 40 10 46 f8 [	 ]*vceqqs	%v15,%v17,%v20
+.*:	e7 f1 40 00 46 fb [	 ]*vchq	%v15,%v17,%v20
+.*:	e7 f1 40 10 46 fb [	 ]*vchqs	%v15,%v17,%v20
+.*:	e7 f1 40 00 46 f9 [	 ]*vchlq	%v15,%v17,%v20
+.*:	e7 f1 40 10 46 f9 [	 ]*vchlqs	%v15,%v17,%v20
+.*:	e7 f1 00 00 44 53 [	 ]*vclzq	%v15,%v17
+.*:	e7 f1 00 00 44 52 [	 ]*vctzq	%v15,%v17
+.*:	e7 f1 00 00 44 de [	 ]*vlcq	%v15,%v17
+.*:	e7 f1 00 00 44 df [	 ]*vlpq	%v15,%v17
+.*:	e7 f1 40 00 46 ff [	 ]*vmxq	%v15,%v17,%v20
+.*:	e7 f1 40 00 46 fd [	 ]*vmxlq	%v15,%v17,%v20
+.*:	e7 f1 40 00 46 fe [	 ]*vmnq	%v15,%v17,%v20
+.*:	e7 f1 40 00 46 fc [	 ]*vmnlq	%v15,%v17,%v20
+.*:	e7 f1 43 00 87 aa [	 ]*vmalg	%v15,%v17,%v20,%v24
+.*:	e7 f1 44 00 87 aa [	 ]*vmalq	%v15,%v17,%v20,%v24
+.*:	e7 f1 43 00 87 ab [	 ]*vmahg	%v15,%v17,%v20,%v24
+.*:	e7 f1 44 00 87 ab [	 ]*vmahq	%v15,%v17,%v20,%v24
+.*:	e7 f1 43 00 87 a9 [	 ]*vmalhg	%v15,%v17,%v20,%v24
+.*:	e7 f1 44 00 87 a9 [	 ]*vmalhq	%v15,%v17,%v20,%v24
+.*:	e7 f1 43 00 87 ae [	 ]*vmaeg	%v15,%v17,%v20,%v24
+.*:	e7 f1 43 00 87 ac [	 ]*vmaleg	%v15,%v17,%v20,%v24
+.*:	e7 f1 43 00 87 af [	 ]*vmaog	%v15,%v17,%v20,%v24
+.*:	e7 f1 43 00 87 ad [	 ]*vmalog	%v15,%v17,%v20,%v24
+.*:	e7 f1 40 00 36 a3 [	 ]*vmhg	%v15,%v17,%v20
+.*:	e7 f1 40 00 46 a3 [	 ]*vmhq	%v15,%v17,%v20
+.*:	e7 f1 40 00 36 a1 [	 ]*vmlhg	%v15,%v17,%v20
+.*:	e7 f1 40 00 46 a1 [	 ]*vmlhq	%v15,%v17,%v20
+.*:	e7 f1 40 00 36 a2 [	 ]*vmlg	%v15,%v17,%v20
+.*:	e7 f1 40 00 46 a2 [	 ]*vmlq	%v15,%v17,%v20
+.*:	e7 f1 40 00 36 a6 [	 ]*vmeg	%v15,%v17,%v20
+.*:	e7 f1 40 00 36 a4 [	 ]*vmleg	%v15,%v17,%v20
+.*:	e7 f1 40 00 36 a7 [	 ]*vmog	%v15,%v17,%v20
+.*:	e7 f1 40 00 36 a5 [	 ]*vmlog	%v15,%v17,%v20
+.*:	e7 f1 40 0c d6 b2 [	 ]*vd	%v15,%v17,%v20,13,12
+.*:	e7 f1 40 0d 26 b2 [	 ]*vdf	%v15,%v17,%v20,13
+.*:	e7 f1 40 0d 36 b2 [	 ]*vdg	%v15,%v17,%v20,13
+.*:	e7 f1 40 0d 46 b2 [	 ]*vdq	%v15,%v17,%v20,13
+.*:	e7 f1 40 0c d6 b0 [	 ]*vdl	%v15,%v17,%v20,13,12
+.*:	e7 f1 40 0d 26 b0 [	 ]*vdlf	%v15,%v17,%v20,13
+.*:	e7 f1 40 0d 36 b0 [	 ]*vdlg	%v15,%v17,%v20,13
+.*:	e7 f1 40 0d 46 b0 [	 ]*vdlq	%v15,%v17,%v20,13
+.*:	e7 f1 40 0c d6 b3 [	 ]*vr	%v15,%v17,%v20,13,12
+.*:	e7 f1 40 0d 26 b3 [	 ]*vrf	%v15,%v17,%v20,13
+.*:	e7 f1 40 0d 36 b3 [	 ]*vrg	%v15,%v17,%v20,13
+.*:	e7 f1 40 0d 46 b3 [	 ]*vrq	%v15,%v17,%v20,13
+.*:	e7 f1 40 0c d6 b1 [	 ]*vrl	%v15,%v17,%v20,13,12
+.*:	e7 f1 40 0d 26 b1 [	 ]*vrlf	%v15,%v17,%v20,13
+.*:	e7 f1 40 0d 36 b1 [	 ]*vrlg	%v15,%v17,%v20,13
+.*:	e7 f1 40 0d 46 b1 [	 ]*vrlq	%v15,%v17,%v20,13
+.*:	b9 68 00 69 [	 ]*clzg	%r6,%r9
+.*:	b9 69 00 69 [	 ]*ctzg	%r6,%r9
+.*:	e3 69 b8 f0 fd 60 [	 ]*lxab	%r6,-10000\(%r9,%r11\)
+.*:	e3 69 b8 f0 fd 62 [	 ]*lxah	%r6,-10000\(%r9,%r11\)
+.*:	e3 69 b8 f0 fd 64 [	 ]*lxaf	%r6,-10000\(%r9,%r11\)
+.*:	e3 69 b8 f0 fd 66 [	 ]*lxag	%r6,-10000\(%r9,%r11\)
+.*:	e3 69 b8 f0 fd 68 [	 ]*lxaq	%r6,-10000\(%r9,%r11\)
+.*:	e3 69 b8 f0 fd 61 [	 ]*llxab	%r6,-10000\(%r9,%r11\)
+.*:	e3 69 b8 f0 fd 63 [	 ]*llxah	%r6,-10000\(%r9,%r11\)
+.*:	e3 69 b8 f0 fd 65 [	 ]*llxaf	%r6,-10000\(%r9,%r11\)
+.*:	e3 69 b8 f0 fd 67 [	 ]*llxag	%r6,-10000\(%r9,%r11\)
+.*:	e3 69 b8 f0 fd 69 [	 ]*llxaq	%r6,-10000\(%r9,%r11\)
+.*:	b9 6c b0 69 [	 ]*bextg	%r6,%r9,%r11
+.*:	b9 6d b0 69 [	 ]*bdepg	%r6,%r9,%r11
+.*:	b9 3e 00 69 [	 ]*kimd	%r6,%r9
+.*:	b9 3e d0 69 [	 ]*kimd	%r6,%r9,13
+.*:	b9 3f 00 69 [	 ]*klmd	%r6,%r9
+.*:	b9 3f d0 69 [	 ]*klmd	%r6,%r9,13
+.*:	e6 f1 00 d0 04 4e [	 ]*vcvbq	%v15,%v17,13
+.*:	e6 f1 00 cf d4 4a [	 ]*vcvdq	%v15,%v17,253,12
+.*:	e6 0f 00 00 00 5f [	 ]*vtp	%v15
+.*:	e6 0f 0f ff d0 5f [	 ]*vtp	%v15,65533
+.*:	e6 0f 1f ff d2 7f [	 ]*vtz	%v15,%v17,65533
diff --git a/gas/testsuite/gas/s390/zarch-arch15.s b/gas/testsuite/gas/s390/zarch-arch15.s
new file mode 100644
index 0000000..43be9d4
--- /dev/null
+++ b/gas/testsuite/gas/s390/zarch-arch15.s
@@ -0,0 +1,96 @@
+.text
+foo:
+	vblend	%v15,%v17,%v20,%v24,13
+	vblendb	%v15,%v17,%v20,%v24
+	vblendh	%v15,%v17,%v20,%v24
+	vblendf	%v15,%v17,%v20,%v24
+	vblendg	%v15,%v17,%v20,%v24
+	vblendq	%v15,%v17,%v20,%v24
+	veval	%v15,%v17,%v20,%v24,253
+	vgem	%v15,%v17,13
+	vgemb	%v15,%v17
+	vgemh	%v15,%v17
+	vgemf	%v15,%v17
+	vgemg	%v15,%v17
+	vgemq	%v15,%v17
+	vuphg	%v15,%v17
+	vuplhg	%v15,%v17
+	vuplg	%v15,%v17
+	vupllg	%v15,%v17
+	vavgq	%v15,%v17,%v20
+	vavglq	%v15,%v17,%v20
+	vecq	%v15,%v17
+	veclq	%v15,%v17
+	vceqq	%v15,%v17,%v20
+	vceqqs	%v15,%v17,%v20
+	vchq	%v15,%v17,%v20
+	vchqs	%v15,%v17,%v20
+	vchlq	%v15,%v17,%v20
+	vchlqs	%v15,%v17,%v20
+	vclzq	%v15,%v17
+	vctzq	%v15,%v17
+	vlcq	%v15,%v17
+	vlpq	%v15,%v17
+	vmxq	%v15,%v17,%v20
+	vmxlq	%v15,%v17,%v20
+	vmnq	%v15,%v17,%v20
+	vmnlq	%v15,%v17,%v20
+	vmalg	%v15,%v17,%v20,%v24
+	vmalq	%v15,%v17,%v20,%v24
+	vmahg	%v15,%v17,%v20,%v24
+	vmahq	%v15,%v17,%v20,%v24
+	vmalhg	%v15,%v17,%v20,%v24
+	vmalhq	%v15,%v17,%v20,%v24
+	vmaeg	%v15,%v17,%v20,%v24
+	vmaleg	%v15,%v17,%v20,%v24
+	vmaog	%v15,%v17,%v20,%v24
+	vmalog	%v15,%v17,%v20,%v24
+	vmhg	%v15,%v17,%v20
+	vmhq	%v15,%v17,%v20
+	vmlhg	%v15,%v17,%v20
+	vmlhq	%v15,%v17,%v20
+	vmlg	%v15,%v17,%v20
+	vmlq	%v15,%v17,%v20
+	vmeg	%v15,%v17,%v20
+	vmleg	%v15,%v17,%v20
+	vmog	%v15,%v17,%v20
+	vmlog	%v15,%v17,%v20
+	vd	%v15,%v17,%v20,13,12
+	vdf	%v15,%v17,%v20,13
+	vdg	%v15,%v17,%v20,13
+	vdq	%v15,%v17,%v20,13
+	vdl	%v15,%v17,%v20,13,12
+	vdlf	%v15,%v17,%v20,13
+	vdlg	%v15,%v17,%v20,13
+	vdlq	%v15,%v17,%v20,13
+	vr	%v15,%v17,%v20,13,12
+	vrf	%v15,%v17,%v20,13
+	vrg	%v15,%v17,%v20,13
+	vrq	%v15,%v17,%v20,13
+	vrl	%v15,%v17,%v20,13,12
+	vrlf	%v15,%v17,%v20,13
+	vrlg	%v15,%v17,%v20,13
+	vrlq	%v15,%v17,%v20,13
+	clzg	%r6,%r9
+	ctzg	%r6,%r9
+	lxab	%r6,-10000(%r9,%r11)
+	lxah	%r6,-10000(%r9,%r11)
+	lxaf	%r6,-10000(%r9,%r11)
+	lxag	%r6,-10000(%r9,%r11)
+	lxaq	%r6,-10000(%r9,%r11)
+	llxab	%r6,-10000(%r9,%r11)
+	llxah	%r6,-10000(%r9,%r11)
+	llxaf	%r6,-10000(%r9,%r11)
+	llxag	%r6,-10000(%r9,%r11)
+	llxaq	%r6,-10000(%r9,%r11)
+	bextg	%r6,%r9,%r11
+	bdepg	%r6,%r9,%r11
+	kimd	%r6,%r9
+	kimd	%r6,%r9,13
+	klmd	%r6,%r9
+	klmd	%r6,%r9,13
+	vcvbq	%v15,%v17,13
+	vcvdq	%v15,%v17,253,12
+	vtp	%v15
+	vtp	%v15,65533
+	vtz	%v15,%v17,65533
diff --git a/gas/testsuite/gas/s390/zarch-z10.d b/gas/testsuite/gas/s390/zarch-z10.d
index 4a05153..beb0578 100644
--- a/gas/testsuite/gas/s390/zarch-z10.d
+++ b/gas/testsuite/gas/s390/zarch-z10.d
@@ -359,20 +359,20 @@ Disassembly of section .text:
 .*:	c2 60 ff fe 79 60 [	 ]*msgfi	%r6,-100000
 .*:	e3 a6 75 b3 01 36 [	 ]*pfd	10,5555\(%r6,%r7\)
  *([\da-f]+):	c6 a2 00 00 00 00 [	 ]*pfdrl	10,\1 <foo\+0x\1>
-.*:	ec 67 d2 dc e6 54 [	 ]*rnsbg	%r6,%r7,210,220,230
-.*:	ec 67 d2 dc 00 54 [	 ]*rnsbg	%r6,%r7,210,220
+.*:	ec 67 6e dc e6 54 [	 ]*rnsbg	%r6,%r7,110,220,230
+.*:	ec 67 6e dc 00 54 [	 ]*rnsbg	%r6,%r7,110,220
 .*:	ec 67 92 dc e6 54 [	 ]*rnsbgt	%r6,%r7,18,220,230
 .*:	ec 67 92 dc 00 54 [	 ]*rnsbgt	%r6,%r7,18,220
 .*:	ec 67 92 1c 26 54 [	 ]*rnsbgt	%r6,%r7,18,28,38
 .*:	ec 67 92 1c 00 54 [	 ]*rnsbgt	%r6,%r7,18,28
-.*:	ec 67 d2 dc e6 57 [	 ]*rxsbg	%r6,%r7,210,220,230
-.*:	ec 67 d2 dc 00 57 [	 ]*rxsbg	%r6,%r7,210,220
+.*:	ec 67 6e dc e6 57 [	 ]*rxsbg	%r6,%r7,110,220,230
+.*:	ec 67 6e dc 00 57 [	 ]*rxsbg	%r6,%r7,110,220
 .*:	ec 67 92 dc e6 57 [	 ]*rxsbgt	%r6,%r7,18,220,230
 .*:	ec 67 92 dc 00 57 [	 ]*rxsbgt	%r6,%r7,18,220
 .*:	ec 67 92 1c 26 57 [	 ]*rxsbgt	%r6,%r7,18,28,38
 .*:	ec 67 92 1c 00 57 [	 ]*rxsbgt	%r6,%r7,18,28
-.*:	ec 67 d2 dc e6 56 [	 ]*rosbg	%r6,%r7,210,220,230
-.*:	ec 67 d2 dc 00 56 [	 ]*rosbg	%r6,%r7,210,220
+.*:	ec 67 6e dc e6 56 [	 ]*rosbg	%r6,%r7,110,220,230
+.*:	ec 67 6e dc 00 56 [	 ]*rosbg	%r6,%r7,110,220
 .*:	ec 67 92 dc e6 56 [	 ]*rosbgt	%r6,%r7,18,220,230
 .*:	ec 67 92 dc 00 56 [	 ]*rosbgt	%r6,%r7,18,220
 .*:	ec 67 92 1c 26 56 [	 ]*rosbgt	%r6,%r7,18,28,38
diff --git a/gas/testsuite/gas/s390/zarch-z10.s b/gas/testsuite/gas/s390/zarch-z10.s
index 45bb894..a624588 100644
--- a/gas/testsuite/gas/s390/zarch-z10.s
+++ b/gas/testsuite/gas/s390/zarch-z10.s
@@ -353,20 +353,20 @@ foo:
 	msgfi	%r6,-100000
 	pfd	10,5555(%r6,%r7)
 	pfdrl	10,.
-	rnsbg	%r6,%r7,210,220,230
-	rnsbg	%r6,%r7,210,220
+	rnsbg	%r6,%r7,110,220,230
+	rnsbg	%r6,%r7,110,220
 	rnsbg	%r6,%r7,146,220,230
 	rnsbg	%r6,%r7,146,220
 	rnsbgt	%r6,%r7,18,28,38
 	rnsbgt	%r6,%r7,18,28
-	rxsbg	%r6,%r7,210,220,230
-	rxsbg	%r6,%r7,210,220
+	rxsbg	%r6,%r7,110,220,230
+	rxsbg	%r6,%r7,110,220
 	rxsbg	%r6,%r7,146,220,230
 	rxsbg	%r6,%r7,146,220
 	rxsbgt	%r6,%r7,18,28,38
 	rxsbgt	%r6,%r7,18,28
-	rosbg	%r6,%r7,210,220,230
-	rosbg	%r6,%r7,210,220
+	rosbg	%r6,%r7,110,220,230
+	rosbg	%r6,%r7,110,220
 	rosbg	%r6,%r7,146,220,230
 	rosbg	%r6,%r7,146,220
 	rosbgt	%r6,%r7,18,28,38
diff --git a/gas/testsuite/gas/sparc/sparc5vis4.d b/gas/testsuite/gas/sparc/sparc5vis4.d
index bf5c90b..7820c2a 100644
--- a/gas/testsuite/gas/sparc/sparc5vis4.d
+++ b/gas/testsuite/gas/sparc/sparc5vis4.d
@@ -35,4 +35,4 @@ Disassembly of section .text:
   64:	95 b1 aa c8 	fpsubs8  %f6, %f8, %f10
   68:	9d b2 aa ec 	fpsubus8  %f10, %f12, %f14
   6c:	a5 b3 aa 70 	fpsubus16  %f14, %f16, %f18
-  70:	bf b0 09 3f 	faligndata  %f0, %f62, %f4, %f62
+  70:	bf b0 09 24 	faligndata  %g0, %f62, %f4, %f62
diff --git a/gas/testsuite/gas/sparc/sparc5vis4.s b/gas/testsuite/gas/sparc/sparc5vis4.s
index 0a0155f..58ca2b5 100644
--- a/gas/testsuite/gas/sparc/sparc5vis4.s
+++ b/gas/testsuite/gas/sparc/sparc5vis4.s
@@ -28,4 +28,4 @@
 	fpsubs8	%f6, %f8, %f10
 	fpsubus8 %f10, %f12, %f14
 	fpsubus16 %f14, %f16, %f18
-	faligndata %f0, %f62, %f4, %f62
+	faligndata %g0, %f62, %f4, %f62
diff --git a/gdb/MAINTAINERS b/gdb/MAINTAINERS
index 24bffa9..b821901 100644
--- a/gdb/MAINTAINERS
+++ b/gdb/MAINTAINERS
@@ -328,7 +328,7 @@ the native maintainer when resolving ABI issues.
 			Lancelot Six		lancelot.six@amd.com
 
 	arc		--target=arc-elf
-			Shahab Vahedi		shahab@synopsys.com
+			Shahab Vahedi		list@vahedi.org
 
 	arm		--target=arm-elf
 			Alan Hayward		alan.hayward@arm.com
@@ -346,7 +346,6 @@ the native maintainer when resolving ABI issues.
 	h8300		--target=h8300-elf
 
 	i386		--target=i386-elf
-			Felix Willgerodt	felix.willgerodt@intel.com
 
 	ia64		--target=ia64-linux-gnu
 			(--target=ia64-elf broken)
@@ -422,7 +421,6 @@ the native maintainer when resolving ABI issues.
 	vax		--target=vax-netbsd
 
 	x86-64		--target=x86_64-linux-gnu
-			Felix Willgerodt	felix.willgerodt@intel.com
 
 	xstormy16	--target=xstormy16-elf
 	xtensa		--target=xtensa-elf
@@ -473,7 +471,7 @@ SystemTap		Sergio Durigan Junior	sergiodj@sergiodj.net
 Reverse debugging / Record and Replay / Tracing:
 
 record
-  full			Guinevere Larsen	blarsen@redhat.com
+  full			Guinevere Larsen	guinevere@redhat.com
   btrace		Markus T. Metzger	markus.t.metzger@intel.com
 
 
@@ -606,6 +604,7 @@ Mike Frysinger					vapier@gentoo.org
 Gary Funck					gary@intrepid.com
 Martin Galvan					martingalvan@sourceware.org
 Chen Gang					gang.chen.5i5j@gmail.com
+Klaus Gerlicher					klaus.gerlicher@intel.com
 Mircea Gherzan					mircea.gherzan@intel.com
 Paul Gilliam					pgilliam@us.ibm.com
 Tristan Gingold					tgingold@free.fr
@@ -656,7 +655,7 @@ Jan Kratochvil					jan.kratochvil@redhat.com
 Maxim Kuvyrkov					maxim@kugelworks.com
 Pierre Langlois 				pierre.langlois@arm.com
 Jonathan Larmour				jifl@ecoscentric.com
-Guinevere Larsen				blarsen@redhat.com
+Guinevere Larsen				guinevere@redhat.com
 Jeff Law					law@redhat.com
 Justin Lebar					justin.lebar@gmail.com
 David Lecomber					david@streamline-computing.com
@@ -690,7 +689,7 @@ Chris Moller					cmoller@redhat.com
 Patrick Monnerat				patrick@monnerat.net
 Phil Muldoon					pmuldoon@redhat.com
 Pierre Muller					muller@sourceware.org
-Gaius Mulley					gaius@glam.ac.uk
+Gaius Mulley					gaiusmod2@gmail.com
 Masaki Muranaka					monaka@monami-software.com
 Joseph Myers					josmyers@redhat.com
 Fernando Nasser					fnasser@redhat.com
@@ -790,7 +789,7 @@ Ulrich Weigand					uweigand@de.ibm.com
 Ken Werner					ken.werner@de.ibm.com
 Tim Wiederhake					tim.wiederhake@intel.com
 Mark Wielaard					mark@klomp.org
-Felix Willgerodt				felix.willgerodt@intel.com
+Felix Willgerodt				felix.willgerodt@gmail.com
 Nathan Williams					nathanw@wasabisystems.com
 Bob Wilson					bob.wilson@acm.org
 Jim Wilson					wilson@tuliptree.org
@@ -866,6 +865,7 @@ Stan Shebs (Global)				stanshebs@google.com
 Joel Brobecker (Global, Ada)			brobecker@adacore.com
 Doug Evans (Global)				dje@google.com
 Yao Qi (Global)					qiyao@sourceware.org
+Felix Willgerodt (amd64, i386)			felix.willgerodt@gmail.com
 
 
 Folks that have been caught up in a paper trail:
diff --git a/gdb/Makefile.in b/gdb/Makefile.in
index 6744b82..ecb323d 100644
--- a/gdb/Makefile.in
+++ b/gdb/Makefile.in
@@ -832,7 +832,6 @@ ALL_TARGET_OBS = \
 	i386-go32-tdep.o \
 	i386-linux-tdep.o \
 	i386-netbsd-tdep.o \
-	i386-nto-tdep.o \
 	i386-obsd-tdep.o \
 	i386-sol2-tdep.o \
 	i386-tdep.o \
@@ -860,7 +859,6 @@ ALL_TARGET_OBS = \
 	nds32-tdep.o \
 	nios2-linux-tdep.o \
 	nios2-tdep.o \
-	nto-tdep.o \
 	obsd-tdep.o \
 	or1k-linux-tdep.o \
 	or1k-tdep.o \
@@ -1053,6 +1051,7 @@ COMMON_SFILES = \
 	break-catch-sig.c \
 	break-catch-syscall.c \
 	break-catch-throw.c \
+	break-cond-parse.c \
 	breakpoint.c \
 	bt-utils.c \
 	btrace.c \
@@ -1322,6 +1321,7 @@ HFILES_NO_SRCDIR = \
 	bfd-target.h \
 	bfin-tdep.h \
 	block.h \
+	break-cond-parse.h \
 	breakpoint.h \
 	bsd-kvm.h \
 	bsd-uthread.h \
@@ -1444,7 +1444,6 @@ HFILES_NO_SRCDIR = \
 	nds32-tdep.h \
 	nios2-tdep.h \
 	elf-none-tdep.h \
-	nto-tdep.h \
 	objc-lang.h \
 	objfiles.h \
 	obsd-nat.h \
@@ -1581,7 +1580,6 @@ HFILES_NO_SRCDIR = \
 	compile/gcc-c-plugin.h \
 	compile/gcc-cp-plugin.h \
 	config/nm-linux.h \
-	config/nm-nto.h \
 	config/djgpp/langinfo.h \
 	config/djgpp/nl_types.h \
 	config/i386/nm-i386gnu.h \
@@ -2530,7 +2528,7 @@ clean-po:
 # rule has no dependencies and always regenerates gdb.pot.  This is
 # relatively harmless since the .po files do not directly depend on
 # it.  The .pot file is left in the build directory.  Since GDB's
-# Makefile lacks a cannonical list of sources (missing xm, tm and nm
+# Makefile lacks a canonical list of sources (missing xm, tm and nm
 # files) force this rule.
 $(PACKAGE).pot: po/$(PACKAGE).pot
 po/$(PACKAGE).pot: force
diff --git a/gdb/NEWS b/gdb/NEWS
index 50c033a..42668cb 100644
--- a/gdb/NEWS
+++ b/gdb/NEWS
@@ -3,6 +3,57 @@
 
 *** Changes since GDB 15
 
+* Debugging support for Intel MPX has been removed.  This includes the
+  removal of
+  ** MPX register support
+  ** the commands "show/set mpx bound" (deprecated since GDB 15)
+  ** i386 and amd64 implementation of the hooks report_signal_info and
+     get_siginfo_type.
+
+* GDB now supports printing of asynchronous events from the Intel Processor
+  Trace during 'record instruction-history', 'record function-call-history'
+  and all stepping commands.  This can be controlled with the new
+  "set record btrace pt event-tracing" command.
+
+* GDB now supports printing of ptwrite payloads from the Intel Processor
+  Trace during 'record instruction-history', 'record function-call-history'
+  and all stepping commands.  The payload is also accessible in Python as a
+  RecordAuxiliary object.  Printing is customizable via a ptwrite filter
+  function in Python.  By default, the raw ptwrite payload is printed for
+  each ptwrite that is encountered.
+
+* For breakpoints that are created in the 'pending' state, any
+  'thread' or 'task' keywords are parsed at the time the breakpoint is
+  created, rather than at the time the breakpoint becomes non-pending.
+
+* Thread-specific breakpoints are only inserted into the program space
+  in which the thread of interest is running.  In most cases program
+  spaces are unique for each inferior, so this means that
+  thread-specific breakpoints will usually only be inserted for the
+  inferior containing the thread of interest.  The breakpoint will
+  be hit no less than before.
+
+* For ARM targets, the offset of the pc in the jmp_buf has been fixed to match
+  glibc 2.20 and later.  This should only matter when not using libc probes.
+  This may cause breakage when using an incompatible libc, like uclibc or
+  newlib, or an older glibc.
+
+* MTE (Memory Tagging Extension) debugging is now supported on AArch64 baremetal
+  targets.
+
+* Remove support (native and remote) for QNX Neutrino (triplet
+  `i[3456]86-*-nto*`).
+
+* In a record session, when a forward emulation reaches the end of the reverse
+  history, the warning message has been changed to indicate that the end of the
+  history has been reached.  It also specifies that the forward execution can
+  continue, and the recording will also continue.
+
+* Python API
+
+  ** Added gdb.record.clear.  Clears the trace data of the current recording.
+     This forces re-decoding of the trace for successive commands.
+
 * Debugger Adapter Protocol changes
 
   ** The "scopes" request will now return a scope holding global
@@ -12,13 +63,56 @@
      the return value from the latest "stepOut" command, when
      appropriate.
 
-* For ARM targets, the offset of the pc in the jmp_buf has been fixed to match
-  glibc 2.20 and later.  This should only matter when not using libc probes.
-  This may cause breakage when using an incompatible libc, like uclibc or
-  newlib, or an older glibc.
+* New commands
 
-* MTE (Memory Tagging Extension) debugging is now supported on AArch64 baremetal
-  targets.
+set style line-number foreground COLOR
+set style line-number background COLOR
+set style line-number intensity VALUE
+  Control the styling of line numbers printed by GDB.
+
+maintenance info inline-frames [ADDRESS]
+  New command which displays GDB's inline-frame information for the
+  current address, or for ADDRESS if specified.  The output identifies
+  inlined frames which start at the specified address.
+
+maintenance info blocks [ADDRESS]
+  New command which displays information about all of the blocks at
+  ADDRESS, or at the current address if ADDRESS is not given.  Blocks
+  are listed starting at the inner global block out to the most inner
+  block.
+
+* Changed commands
+
+remove-symbol-file
+  This command now supports file-name completion.
+
+remove-symbol-file -a ADDRESS
+  The ADDRESS expression can now be a full expression consisting of
+  multiple terms, e.g. 'function + 0x1000' (without quotes),
+  previously only a single term could be given.
+
+target core
+target exec
+target tfile
+target ctf
+compile file
+maint print c-tdesc
+save gdb-index
+  These commands now require their filename argument to be quoted if
+  it contains white space or quote characters.  If the argument
+  contains no such special characters then quoting is not required.
+
+maintenance print remote-registers
+  Add an "Expedited" column to the output of the command.  It indicates
+  which registers were included in the last stop reply packet received by
+  GDB.
+
+* New remote packets
+
+vFile:stat
+  Return information about files on the remote system.  Like
+  vFile:fstat but takes a filename rather than an open file
+  descriptor.
 
 *** Changes in GDB 15
 
@@ -231,11 +325,6 @@ qIsAddressTagged
   file is about, this new packet provides a more generic way to perform such
   a check.
 
-vFile:stat
-  Return information about files on the remote system.  Like
-  vFile:fstat but takes a filename rather than an open file
-  descriptor.
-
 *** Changes in GDB 14
 
 * GDB now supports the AArch64 Scalable Matrix Extension 2 (SME2), which
@@ -320,7 +409,7 @@ vFile:stat
 
 * The printf command now accepts a '%V' output format which will
   format an expression just as the 'print' command would.  Print
-  options can be placed withing '[...]' after the '%V' to modify how
+  options can be placed within '[...]' after the '%V' to modify how
   the value is printed.  E.g:
     printf "%V", some_array
     printf "%V[-array-indexes on]", some_array
@@ -6597,7 +6686,7 @@ qSupported:
   target.
 
 qXfer:auxv:read:
-  Fetch an OS auxilliary vector from the remote stub.  This packet is a
+  Fetch an OS auxiliary vector from the remote stub.  This packet is a
   more efficient replacement for qPart:auxv:read.
 
 qXfer:memory-map:read:
@@ -7805,7 +7894,7 @@ with that.  The sub-program to run is specified using the syntax
 * MIPS 64 remote protocol
 
 A long standing bug in the mips64 remote protocol where by GDB
-expected certain 32 bit registers (ex SR) to be transfered as 32
+expected certain 32 bit registers (ex SR) to be transferred as 32
 instead of 64 bits has been fixed.
 
 The command ``set remote-mips64-transfers-32bit-regs on'' has been
@@ -8561,7 +8650,7 @@ MIPS remote debugging protocol.
 
 This version includes preliminary support for Chill, a Pascal like language
 used by telecommunications companies.  Chill support is also being integrated
-into the GNU compiler, but we don't know when it will be publically available.
+into the GNU compiler, but we don't know when it will be publicly available.
 
 
 *** Changes in GDB-4.8:
diff --git a/gdb/ada-exp.y b/gdb/ada-exp.y
index dfcbb2b..ed8ed44 100644
--- a/gdb/ada-exp.y
+++ b/gdb/ada-exp.y
@@ -1232,7 +1232,7 @@ primary	:	'*' primary		%prec '.'
 /* yylex defined in ada-lex.c: Reads one token, getting characters */
 /* through lexptr.  */
 
-/* Remap normal flex interface names (yylex) as well as gratuitiously */
+/* Remap normal flex interface names (yylex) as well as gratuitously */
 /* global symbol names, so we can have multiple flex-generated parsers */
 /* in gdb.  */
 
@@ -1477,7 +1477,7 @@ block_lookup (const struct block *context, const char *raw_name)
 
   if (context == NULL
       && (syms.empty () || syms[0].symbol->aclass () != LOC_BLOCK))
-    symtab = lookup_symtab (name);
+    symtab = lookup_symtab (current_program_space, name);
   else
     symtab = NULL;
 
@@ -1831,7 +1831,7 @@ write_var_or_type (struct parser_state *par_state,
 	      if (block != nullptr)
 		objfile = block->objfile ();
 
-	      struct bound_minimal_symbol msym
+	      bound_minimal_symbol msym
 		= ada_lookup_simple_minsym (decoded_name.c_str (), objfile);
 	      if (msym.minsym != NULL)
 		{
diff --git a/gdb/ada-lang.c b/gdb/ada-lang.c
index 1cf6ff5..d14a556 100644
--- a/gdb/ada-lang.c
+++ b/gdb/ada-lang.c
@@ -201,7 +201,8 @@ static symbol_name_matcher_ftype *ada_get_symbol_name_matcher
 static int symbols_are_identical_enums
   (const std::vector<struct block_symbol> &syms);
 
-static int ada_identical_enum_types_p (struct type *type1, struct type *type2);
+static bool ada_identical_enum_types_p (struct type *type1,
+					struct type *type2);
 
 
 /* The character set used for source files.  */
@@ -798,7 +799,6 @@ ada_get_decoded_type (struct type *type)
 const char *
 ada_main_name ()
 {
-  struct bound_minimal_symbol msym;
   static gdb::unique_xmalloc_ptr<char> main_program_name;
 
   /* For Ada, the name of the main procedure is stored in a specific
@@ -806,7 +806,9 @@ ada_main_name ()
      extract its address, and then read that string.  If we didn't find
      that string, then most probably the main procedure is not written
      in Ada.  */
-  msym = lookup_minimal_symbol (ADA_MAIN_PROGRAM_SYMBOL_NAME, NULL, NULL);
+  bound_minimal_symbol msym
+    = lookup_minimal_symbol (current_program_space,
+			     ADA_MAIN_PROGRAM_SYMBOL_NAME);
 
   if (msym.minsym != NULL)
     {
@@ -1486,7 +1488,7 @@ ada_decode (const char *encoded, bool wrap, bool operators, bool wide)
       if (i < len0 + 3
 	  && encoded[i] == 'N' && encoded[i+1] == '_' && encoded[i+2] == '_')
 	{
-	  /* Backtrack a bit up until we reach either the begining of
+	  /* Backtrack a bit up until we reach either the beginning of
 	     the encoded name, or "__".  Make sure that we only find
 	     digits or lowercase characters.  */
 	  const char *ptr = encoded + i - 1;
@@ -3696,9 +3698,11 @@ See set/show multiple-symbol."));
 	      gdb_printf ("[%d] ", i + first_choice);
 	      ada_print_symbol_signature (gdb_stdout, syms[i].symbol,
 					  &type_print_raw_options);
-	      gdb_printf (_(" at %s:%d\n"),
-			  symtab_to_filename_for_display (symtab),
-			  syms[i].symbol->line ());
+	      gdb_printf (_(" at %ps:%ps\n"),
+			  styled_string (file_name_style.style (),
+					 symtab_to_filename_for_display (symtab)),
+			  styled_string (line_number_style.style (),
+					 pulongest (syms[i].symbol->line ())));
 	    }
 	  else if (is_enumeral
 		   && syms[i].symbol->type ()->name () != NULL)
@@ -3717,9 +3721,10 @@ See set/show multiple-symbol."));
 
 	      if (symtab != NULL)
 		gdb_printf (is_enumeral
-			    ? _(" in %s (enumeral)\n")
-			    : _(" at %s:?\n"),
-			    symtab_to_filename_for_display (symtab));
+			    ? _(" in %ps (enumeral)\n")
+			    : _(" at %ps:?\n"),
+			    styled_string (file_name_style.style (),
+					   symtab_to_filename_for_display (symtab)));
 	      else
 		gdb_printf (is_enumeral
 			    ? _(" (enumeral)\n")
@@ -3812,8 +3817,6 @@ ada_resolve_enum (std::vector<struct block_symbol> &syms,
   for (int i = 0; i < syms.size (); ++i)
     {
       struct type *type2 = ada_check_typedef (syms[i].symbol->type ());
-      if (type1->num_fields () != type2->num_fields ())
-	continue;
       if (strcmp (type1->name (), type2->name ()) != 0)
 	continue;
       if (ada_identical_enum_types_p (type1, type2))
@@ -4689,9 +4692,9 @@ make_array_descriptor (struct type *type, struct value *arr)
    even in this case, some expensive name-based symbol searches are still
    sometimes necessary - to find an XVZ variable, mostly.  */
 
-/* Clear all entries from the symbol cache.  */
+/* See ada-lang.h.  */
 
-static void
+void
 ada_clear_symbol_cache (program_space *pspace)
 {
   ada_pspace_data_handle.clear (pspace);
@@ -4921,10 +4924,10 @@ add_defn_to_vec (std::vector<struct block_symbol> &result,
    specially: "standard__" is first stripped off, and only static and
    global symbols are searched.  */
 
-struct bound_minimal_symbol
+bound_minimal_symbol
 ada_lookup_simple_minsym (const char *name, struct objfile *objfile)
 {
-  struct bound_minimal_symbol result;
+  bound_minimal_symbol result;
 
   symbol_name_match_type match_type = name_match_type_from_name (name);
   lookup_name_info lookup_name (name, match_type);
@@ -4964,47 +4967,44 @@ is_nondebugging_type (struct type *type)
   return (name != NULL && strcmp (name, "<variable, no debug info>") == 0);
 }
 
-/* Return nonzero if TYPE1 and TYPE2 are two enumeration types
+/* Return true if TYPE1 and TYPE2 are two enumeration types
    that are deemed "identical" for practical purposes.
 
    This function assumes that TYPE1 and TYPE2 are both TYPE_CODE_ENUM
-   types and that their number of enumerals is identical (in other
-   words, type1->num_fields () == type2->num_fields ()).  */
+   types.  */
 
-static int
+static bool
 ada_identical_enum_types_p (struct type *type1, struct type *type2)
 {
-  int i;
-
   /* The heuristic we use here is fairly conservative.  We consider
      that 2 enumerate types are identical if they have the same
      number of enumerals and that all enumerals have the same
      underlying value and name.  */
 
+  if (type1->num_fields () != type2->num_fields ())
+    return false;
+
   /* All enums in the type should have an identical underlying value.  */
-  for (i = 0; i < type1->num_fields (); i++)
+  for (int i = 0; i < type1->num_fields (); i++)
     if (type1->field (i).loc_enumval () != type2->field (i).loc_enumval ())
-      return 0;
+      return false;
 
   /* All enumerals should also have the same name (modulo any numerical
      suffix).  */
-  for (i = 0; i < type1->num_fields (); i++)
+  for (int i = 0; i < type1->num_fields (); i++)
     {
       const char *name_1 = type1->field (i).name ();
       const char *name_2 = type2->field (i).name ();
       int len_1 = strlen (name_1);
       int len_2 = strlen (name_2);
 
-      ada_remove_trailing_digits (type1->field (i).name (), &len_1);
-      ada_remove_trailing_digits (type2->field (i).name (), &len_2);
-      if (len_1 != len_2
-	  || strncmp (type1->field (i).name (),
-		      type2->field (i).name (),
-		      len_1) != 0)
-	return 0;
+      ada_remove_trailing_digits (name_1, &len_1);
+      ada_remove_trailing_digits (name_2, &len_2);
+      if (len_1 != len_2 || strncmp (name_1, name_2, len_1) != 0)
+	return false;
     }
 
-  return 1;
+  return true;
 }
 
 /* Return nonzero if all the symbols in SYMS are all enumeral symbols
@@ -5049,12 +5049,6 @@ symbols_are_identical_enums (const std::vector<struct block_symbol> &syms)
     if (syms[i].symbol->value_longest () != syms[0].symbol->value_longest ())
       return 0;
 
-  /* Quick check: They should all have the same number of enumerals.  */
-  for (i = 1; i < syms.size (); i++)
-    if (syms[i].symbol->type ()->num_fields ()
-	!= syms[0].symbol->type ()->num_fields ())
-      return 0;
-
   /* All the sanity checks passed, so we might have a set of
      identical enumeration types.  Perform a more complete
      comparison of the type of each symbol.  */
@@ -5827,8 +5821,8 @@ is_name_suffix (const char *str)
   /* ??? We should not modify STR directly, as we are doing below.  This
      is fine in this case, but may become problematic later if we find
      that this alternative did not work, and want to try matching
-     another one from the begining of STR.  Since we modified it, we
-     won't be able to find the begining of the string anymore!  */
+     another one from the beginning of STR.  Since we modified it, we
+     won't be able to find the beginning of the string anymore!  */
   if (str[0] == 'X')
     {
       str += 1;
@@ -10781,7 +10775,7 @@ ada_unop_atr_operation::evaluate (struct type *expect_type,
   struct type *type_arg = nullptr;
   value *val = nullptr;
 
-  if (std::get<0> (m_storage)->opcode () == OP_TYPE)
+  if (std::get<0> (m_storage)->type_p ())
     {
       value *tem = std::get<0> (m_storage)->evaluate (nullptr, exp,
 						      EVAL_AVOID_SIDE_EFFECTS);
@@ -11678,7 +11672,8 @@ ada_has_this_exception_support (const struct exception_support_info *einfo)
      that should be compiled with debugging information.  As a result, we
      expect to find that symbol in the symtabs.  */
 
-  sym = standard_lookup (einfo->catch_exception_sym, NULL, SEARCH_VFT);
+  sym = standard_lookup (einfo->catch_exception_sym, NULL,
+			 SEARCH_FUNCTION_DOMAIN);
   if (sym == NULL)
     {
       /* Perhaps we did not find our symbol because the Ada runtime was
@@ -11695,8 +11690,9 @@ ada_has_this_exception_support (const struct exception_support_info *einfo)
 	 the name of the exception being raised (this name is printed in
 	 the catchpoint message, and is also used when trying to catch
 	 a specific exception).  We do not handle this case for now.  */
-      struct bound_minimal_symbol msym
-	= lookup_minimal_symbol (einfo->catch_exception_sym, NULL, NULL);
+      bound_minimal_symbol msym
+	= lookup_minimal_symbol (current_program_space,
+				 einfo->catch_exception_sym);
 
       if (msym.minsym && msym.minsym->type () != mst_solib_trampoline)
 	error (_("Your Ada runtime appears to be missing some debugging "
@@ -11712,11 +11708,13 @@ ada_has_this_exception_support (const struct exception_support_info *einfo)
     error (_("Symbol \"%s\" is not a function (class = %d)"),
 	   sym->linkage_name (), sym->aclass ());
 
-  sym = standard_lookup (einfo->catch_handlers_sym, NULL, SEARCH_VFT);
+  sym = standard_lookup (einfo->catch_handlers_sym, NULL,
+			 SEARCH_FUNCTION_DOMAIN);
   if (sym == NULL)
     {
-      struct bound_minimal_symbol msym
-	= lookup_minimal_symbol (einfo->catch_handlers_sym, NULL, NULL);
+      bound_minimal_symbol msym
+	= lookup_minimal_symbol (current_program_space,
+				 einfo->catch_handlers_sym);
 
       if (msym.minsym && msym.minsym->type () != mst_solib_trampoline)
 	error (_("Your Ada runtime appears to be missing some debugging "
@@ -12071,11 +12069,11 @@ struct ada_catchpoint : public code_breakpoint
     enable_state = enabled ? bp_enabled : bp_disabled;
     language = language_ada;
 
-    re_set ();
+    re_set (pspace);
   }
 
   struct bp_location *allocate_location () override;
-  void re_set () override;
+  void re_set (program_space *pspace) override;
   void check_status (struct bpstat *bs) override;
   enum print_stop_action print_it (const bpstat *bs) const override;
   bool print_one (const bp_location **) const override;
@@ -12120,7 +12118,7 @@ static struct symtab_and_line ada_exception_sal
    catchpoint kinds.  */
 
 void
-ada_catchpoint::re_set ()
+ada_catchpoint::re_set (program_space *pspace)
 {
   std::vector<symtab_and_line> sals;
   try
@@ -12635,7 +12633,7 @@ ada_exception_catchpoint_cond_string (const char *excep_string,
      may then be set only on user-defined exceptions which have the
      same not-fully-qualified name (e.g. my_package.constraint_error).
 
-     To avoid this unexcepted behavior, these standard exceptions are
+     To avoid this unexpected behavior, these standard exceptions are
      systematically prefixed by "standard".  This means that "catch
      exception constraint_error" is rewritten into "catch exception
      standard.constraint_error".
@@ -12715,6 +12713,10 @@ create_ada_exception_catchpoint (struct gdbarch *gdbarch,
 				 int enabled,
 				 int from_tty)
 {
+  /* This works around an obscure issue when an Ada program is
+     compiled with LTO.  */
+  scoped_restore_current_language save_language (language_ada);
+
   std::unique_ptr<ada_catchpoint> c
     (new ada_catchpoint (gdbarch, ex_kind,
 			 cond_string.empty () ? nullptr : cond_string.c_str (),
@@ -13049,7 +13051,12 @@ ada_add_global_exceptions (compiled_regex *preg,
 			   },
 			   NULL,
 			   SEARCH_GLOBAL_BLOCK | SEARCH_STATIC_BLOCK,
-			   SEARCH_VAR_DOMAIN);
+			   SEARCH_VAR_DOMAIN,
+			   [&] (enum language lang)
+			     {
+			       /* Try to skip non-Ada CUs.  */
+			       return lang == language_ada;
+			     });
 
   /* Iterate over all objfiles irrespective of scope or linker namespaces
      so we get all exceptions anywhere in the progspace.  */
diff --git a/gdb/ada-lang.h b/gdb/ada-lang.h
index d14bfd4..050d298 100644
--- a/gdb/ada-lang.h
+++ b/gdb/ada-lang.h
@@ -239,8 +239,7 @@ extern struct block_symbol ada_lookup_symbol (const char *,
 extern block_symbol ada_lookup_encoded_symbol
   (const char *name, const struct block *block, domain_search_flags domain);
 
-extern struct bound_minimal_symbol ada_lookup_simple_minsym (const char *,
-							     objfile *);
+extern bound_minimal_symbol ada_lookup_simple_minsym (const char *, objfile *);
 
 extern int ada_scan_number (const char *, int, LONGEST *, int *);
 
@@ -434,4 +433,8 @@ extern block_symbol ada_resolve_variable (struct symbol *sym,
 extern struct type *ada_index_type (struct type *type, int n,
 				    const char *name);
 
+/* Clear the Ada symbol cache.  */
+
+extern void ada_clear_symbol_cache (program_space *pspace);
+
 #endif
diff --git a/gdb/ada-lex.l b/gdb/ada-lex.l
index 136e6dd..3fe0c2e 100644
--- a/gdb/ada-lex.l
+++ b/gdb/ada-lex.l
@@ -510,7 +510,7 @@ processReal (struct parser_state *par_state, const char *num0)
    encoded and the resulting name is equal to it.  Similarly, if the name
    starts with '<', it is copied verbatim.  Otherwise, it differs
    from NAME0 in that:
-    + Characters between '...' are transfered verbatim to yylval.ssym.
+    + Characters between '...' are transferred verbatim to yylval.ssym.
     + Trailing "'" characters in quoted sequences are removed (a leading quote is
       preserved to indicate that the name is not to be GNAT-encoded).
     + Unquoted whitespace is removed.
diff --git a/gdb/ada-tasks.c b/gdb/ada-tasks.c
index 119b223..d050b26 100644
--- a/gdb/ada-tasks.c
+++ b/gdb/ada-tasks.c
@@ -266,7 +266,7 @@ struct ada_tasks_inferior_data
      reference it - this number is printed beside each task in the tasks
      info listing displayed by "info tasks".  This number is equal to
      its index in the vector + 1.  Reciprocally, to compute the index
-     of a task in the vector, we need to substract 1 from its number.  */
+     of a task in the vector, we need to subtract 1 from its number.  */
   std::vector<ada_task_info> task_list;
 };
 
@@ -600,7 +600,7 @@ ada_get_tcb_types_info (void)
 
   /* Check for the CPU offset.  */
   bound_minimal_symbol first_id_sym
-    = lookup_bound_minimal_symbol ("__gnat_gdb_cpu_first_id");
+    = lookup_minimal_symbol (current_program_space, "__gnat_gdb_cpu_first_id");
   unsigned int first_id = 0;
   if (first_id_sym.minsym != nullptr)
     {
@@ -712,9 +712,7 @@ read_atcb (CORE_ADDR task_id, struct ada_task_info *task_info)
 			       sizeof (task_info->name) - 1);
       else
 	{
-	  struct bound_minimal_symbol msym;
-
-	  msym = lookup_minimal_symbol_by_pc (task_id);
+	  bound_minimal_symbol msym = lookup_minimal_symbol_by_pc (task_id);
 	  if (msym.minsym)
 	    {
 	      const char *full_name = msym.minsym->linkage_name ();
@@ -914,7 +912,6 @@ read_known_tasks_list (struct ada_tasks_inferior_data *data)
 static void
 ada_tasks_inferior_data_sniffer (struct ada_tasks_inferior_data *data)
 {
-  struct bound_minimal_symbol msym;
   struct symbol *sym;
 
   /* Return now if already set.  */
@@ -923,7 +920,8 @@ ada_tasks_inferior_data_sniffer (struct ada_tasks_inferior_data *data)
 
   /* Try array.  */
 
-  msym = lookup_minimal_symbol (KNOWN_TASKS_NAME, NULL, NULL);
+  bound_minimal_symbol msym
+    = lookup_minimal_symbol (current_program_space, KNOWN_TASKS_NAME);
   if (msym.minsym != NULL)
     {
       data->known_tasks_kind = ADA_TASKS_ARRAY;
@@ -970,7 +968,7 @@ ada_tasks_inferior_data_sniffer (struct ada_tasks_inferior_data *data)
 
   /* Try list.  */
 
-  msym = lookup_minimal_symbol (KNOWN_TASKS_LIST, NULL, NULL);
+  msym = lookup_minimal_symbol (current_program_space, KNOWN_TASKS_LIST);
   if (msym.minsym != NULL)
     {
       data->known_tasks_kind = ADA_TASKS_LIST;
diff --git a/gdb/addrmap.c b/gdb/addrmap.c
index b9a0f77..696a7dc 100644
--- a/gdb/addrmap.c
+++ b/gdb/addrmap.c
@@ -354,7 +354,9 @@ addrmap_mutable::~addrmap_mutable ()
 /* See addrmap.h.  */
 
 void
-addrmap_dump (struct addrmap *map, struct ui_file *outfile, void *payload)
+addrmap_dump (struct addrmap *map, struct ui_file *outfile, void *payload,
+	      gdb::function_view<void (struct ui_file *outfile,
+				       const void *value)> annotate_value)
 {
   /* True if the previously printed addrmap entry was for PAYLOAD.
      If so, we want to print the next one as well (since the next
@@ -373,10 +375,16 @@ addrmap_dump (struct addrmap *map, struct ui_file *outfile, void *payload)
       addr_str = "<ends here>";
 
     if (matches || previous_matched)
-      gdb_printf (outfile, "  %s%s %s\n",
-		  payload != nullptr ? "  " : "",
-		  core_addr_to_string (start_addr),
-		  addr_str);
+      {
+	gdb_printf (outfile, "  %s%s %s",
+		    payload != nullptr ? "  " : "",
+		    core_addr_to_string (start_addr),
+		    addr_str);
+	if (annotate_value != nullptr)
+	  annotate_value (outfile, obj);
+
+	gdb_printf (outfile, "\n");
+      }
 
     previous_matched = matches;
 
diff --git a/gdb/addrmap.h b/gdb/addrmap.h
index 5378b75..85d4645 100644
--- a/gdb/addrmap.h
+++ b/gdb/addrmap.h
@@ -20,8 +20,9 @@
 #ifndef ADDRMAP_H
 #define ADDRMAP_H
 
-#include "splay-tree.h"
 #include "gdbsupport/function-view.h"
+#include "gdbsupport/gdb_obstack.h"
+#include "splay-tree.h"
 
 /* An address map is essentially a table mapping CORE_ADDRs onto GDB
    data structures, like blocks, symtabs, partial symtabs, and so on.
@@ -218,8 +219,13 @@ private:
 
 /* Dump the addrmap to OUTFILE.  If PAYLOAD is non-NULL, only dump any
    components that map to PAYLOAD.  (If PAYLOAD is NULL, the entire
-   map is dumped.)  */
+   map is dumped.)  If ANNOTATE_VALUE is non-nullptr, call it for each
+   value.  */
+
 void addrmap_dump (struct addrmap *map, struct ui_file *outfile,
-		   void *payload);
+		   void *payload,
+		   gdb::function_view<void (struct ui_file *outfile,
+					    const void *value)>
+		     annotate_value = nullptr);
 
 #endif /* ADDRMAP_H */
diff --git a/gdb/aix-thread.c b/gdb/aix-thread.c
index f2c5605..9e6952b 100644
--- a/gdb/aix-thread.c
+++ b/gdb/aix-thread.c
@@ -376,7 +376,6 @@ pid_to_prc (ptid_t *ptidp)
 static int
 pdc_symbol_addrs (pthdb_user_t user_current_pid, pthdb_symbol_t *symbols, int count)
 {
-  struct bound_minimal_symbol ms;
   int i;
   char *name;
 
@@ -396,7 +395,8 @@ pdc_symbol_addrs (pthdb_user_t user_current_pid, pthdb_symbol_t *symbols, int co
 	symbols[i].addr = 0;
       else
 	{
-	  ms = lookup_minimal_symbol (name, NULL, NULL);
+	  bound_minimal_symbol ms
+	    = lookup_minimal_symbol (current_program_space, name);
 	  if (ms.minsym == NULL)
 	    {
 	      if (debug_aix_thread)
@@ -956,7 +956,6 @@ pd_enable (inferior *inf)
 {
   int status;
   char *stub_name;
-  struct bound_minimal_symbol ms;
   struct aix_thread_variables *data;
 
   if (inf == NULL)
@@ -980,7 +979,8 @@ pd_enable (inferior *inf)
     return;
 
   /* Set a breakpoint on the returned stub function.  */
-  ms = lookup_minimal_symbol (stub_name, NULL, NULL);
+  bound_minimal_symbol ms
+    = lookup_minimal_symbol (current_program_space, stub_name);
   if (ms.minsym == NULL)
     return;
   data->pd_brk_addr = ms.value_address ();
diff --git a/gdb/alpha-tdep.h b/gdb/alpha-tdep.h
index 0423abb..4554ac0 100644
--- a/gdb/alpha-tdep.h
+++ b/gdb/alpha-tdep.h
@@ -99,7 +99,7 @@ struct alpha_gdbarch_tdep : gdbarch_tdep_base
   int sc_fpregs_offset = 0;
 
   int jb_pc = 0;			/* Offset to PC value in jump buffer.
-				   If htis is negative, longjmp support
+				   If this is negative, longjmp support
 				   will be disabled.  */
   size_t jb_elt_size = 0;		/* And the size of each entry in the buf.  */
 };
diff --git a/gdb/amd-dbgapi-target.c b/gdb/amd-dbgapi-target.c
index 073270f..2bb79ac 100644
--- a/gdb/amd-dbgapi-target.c
+++ b/gdb/amd-dbgapi-target.c
@@ -483,12 +483,12 @@ struct amd_dbgapi_target_breakpoint : public code_breakpoint
     disposition = disp_donttouch;
   }
 
-  void re_set () override;
+  void re_set (program_space *) override;
   void check_status (struct bpstat *bs) override;
 };
 
 void
-amd_dbgapi_target_breakpoint::re_set ()
+amd_dbgapi_target_breakpoint::re_set (program_space *)
 {
   /* Nothing.  */
 }
@@ -684,7 +684,7 @@ amd_dbgapi_target::resume (ptid_t scope_ptid, int step, enum gdb_signal signo)
       switch (signo)
 	{
 	case GDB_SIGNAL_BUS:
-	  exception = AMD_DBGAPI_EXCEPTION_WAVE_APERTURE_VIOLATION;
+	  exception = AMD_DBGAPI_EXCEPTION_WAVE_ADDRESS_ERROR;
 	  break;
 	case GDB_SIGNAL_SEGV:
 	  exception = AMD_DBGAPI_EXCEPTION_WAVE_MEMORY_VIOLATION;
@@ -1167,7 +1167,7 @@ process_one_event (amd_dbgapi_event_id_t event_id,
 	  ws.set_thread_exited (0);
 	else if (status == AMD_DBGAPI_STATUS_SUCCESS)
 	  {
-	    if (stop_reason & AMD_DBGAPI_WAVE_STOP_REASON_APERTURE_VIOLATION)
+	    if (stop_reason & AMD_DBGAPI_WAVE_STOP_REASON_ADDRESS_ERROR)
 	      ws.set_stopped (GDB_SIGNAL_BUS);
 	    else if (stop_reason
 		     & AMD_DBGAPI_WAVE_STOP_REASON_MEMORY_VIOLATION)
@@ -1992,19 +1992,35 @@ amd_dbgapi_inferior_pre_detach (inferior *inf)
     detach_amd_dbgapi (inf);
 }
 
-/* get_os_pid callback.  */
+/* client_process_get_info callback.  */
 
 static amd_dbgapi_status_t
-amd_dbgapi_get_os_pid_callback
-  (amd_dbgapi_client_process_id_t client_process_id, pid_t *pid)
+amd_dbgapi_client_process_get_info_callback
+  (amd_dbgapi_client_process_id_t client_process_id,
+   amd_dbgapi_client_process_info_t query, size_t value_size, void *value)
 {
   inferior *inf = reinterpret_cast<inferior *> (client_process_id);
 
   if (inf->pid == 0)
     return AMD_DBGAPI_STATUS_ERROR_PROCESS_EXITED;
 
-  *pid = inf->pid;
-  return AMD_DBGAPI_STATUS_SUCCESS;
+  if (value == nullptr)
+    return AMD_DBGAPI_STATUS_ERROR_INVALID_ARGUMENT;
+
+  switch (query)
+    {
+    case AMD_DBGAPI_CLIENT_PROCESS_INFO_OS_PID:
+      if (value_size != sizeof (amd_dbgapi_os_process_id_t))
+	return AMD_DBGAPI_STATUS_ERROR_INVALID_ARGUMENT_COMPATIBILITY;
+
+      *static_cast<amd_dbgapi_os_process_id_t *> (value) = inf->pid;
+      return AMD_DBGAPI_STATUS_SUCCESS;
+
+    case AMD_DBGAPI_CLIENT_PROCESS_INFO_CORE_STATE:
+      return AMD_DBGAPI_STATUS_ERROR_NOT_AVAILABLE;
+    }
+
+  return AMD_DBGAPI_STATUS_ERROR_INVALID_ARGUMENT;
 }
 
 /* insert_breakpoint callback.  */
@@ -2060,6 +2076,50 @@ amd_dbgapi_remove_breakpoint_callback
   return AMD_DBGAPI_STATUS_SUCCESS;
 }
 
+/* xfer_global_memory callback.  */
+
+static amd_dbgapi_status_t
+amd_dbgapi_xfer_global_memory_callback
+  (amd_dbgapi_client_process_id_t client_process_id,
+   amd_dbgapi_global_address_t global_address,
+   amd_dbgapi_size_t *value_size, void *read_buffer,
+   const void *write_buffer)
+{
+  if ((read_buffer != nullptr) == (write_buffer != nullptr))
+    return AMD_DBGAPI_STATUS_ERROR_INVALID_ARGUMENT_COMPATIBILITY;
+
+  inferior *inf = reinterpret_cast<inferior *> (client_process_id);
+
+  /* We need to set inferior_ptid / current_inferior as those are
+     used by the target which will process the xfer_partial request.
+
+     Note that we end up here when amd-dbgapi tries to access device memory or
+     register content which are at this point mapped/saved in the host process
+     memory.  As a consequence, unwinding GPU frames will most likely call into
+     here.  If we used switch_to_thread to select a host thread, this would
+     implicitly call reinit_frame_cache.  We do not want to clear the frame
+     cache while trying to build it.  */
+  scoped_restore save_inferior_ptid = make_scoped_restore (&inferior_ptid);
+  scoped_restore_current_inferior restore_current_inferior;
+  scoped_restore_current_program_space restore_program_space;
+  inferior_ptid = ptid_t (inf->pid);
+  set_current_inferior (inf);
+  set_current_program_space (inf->pspace);
+
+  target_xfer_status status
+    = target_xfer_partial (inf->top_target (), TARGET_OBJECT_RAW_MEMORY,
+			   nullptr, static_cast<gdb_byte *> (read_buffer),
+			   static_cast<const gdb_byte *> (write_buffer),
+			   global_address, *value_size, value_size);
+
+  if (status == TARGET_XFER_EOF)
+    return AMD_DBGAPI_STATUS_ERROR_PROCESS_EXITED;
+  else if (status != TARGET_XFER_OK)
+    return AMD_DBGAPI_STATUS_ERROR_MEMORY_ACCESS;
+
+  return AMD_DBGAPI_STATUS_SUCCESS;
+}
+
 /* signal_received observer.  */
 
 static void
@@ -2138,9 +2198,10 @@ amd_dbgapi_log_message_callback (amd_dbgapi_log_level_t level,
 static amd_dbgapi_callbacks_t dbgapi_callbacks = {
   .allocate_memory = malloc,
   .deallocate_memory = free,
-  .get_os_pid = amd_dbgapi_get_os_pid_callback,
+  .client_process_get_info = amd_dbgapi_client_process_get_info_callback,
   .insert_breakpoint = amd_dbgapi_insert_breakpoint_callback,
   .remove_breakpoint = amd_dbgapi_remove_breakpoint_callback,
+  .xfer_global_memory = amd_dbgapi_xfer_global_memory_callback,
   .log_message = amd_dbgapi_log_message_callback,
 };
 
diff --git a/gdb/amd64-linux-nat.c b/gdb/amd64-linux-nat.c
index 823c1f7..742fc81 100644
--- a/gdb/amd64-linux-nat.c
+++ b/gdb/amd64-linux-nat.c
@@ -79,6 +79,8 @@ static int amd64_linux_gregset32_reg_offset[] =
   -1, -1, -1, -1, -1, -1, -1, -1,
   -1, -1, -1, -1, -1, -1, -1, -1, -1,
   -1, -1, -1, -1, -1, -1, -1, -1,
+   /* MPX is deprecated.  Yet we keep this to not give the registers below
+      a new number.  That could break older gdbservers.  */
   -1, -1, -1, -1,		  /* MPX registers BND0 ... BND3.  */
   -1, -1,			  /* MPX registers BNDCFGU, BNDSTATUS.  */
   -1, -1, -1, -1, -1, -1, -1, -1, /* k0 ... k7 (AVX512)  */
diff --git a/gdb/amd64-linux-tdep.c b/gdb/amd64-linux-tdep.c
index d7662ca..77de821 100644
--- a/gdb/amd64-linux-tdep.c
+++ b/gdb/amd64-linux-tdep.c
@@ -86,6 +86,8 @@ int amd64_linux_gregset_reg_offset[] =
   -1, -1, -1, -1, -1, -1, -1, -1, -1,
   -1, -1, -1, -1, -1, -1, -1, -1,
   -1, -1, -1, -1, -1, -1, -1, -1,
+  /* MPX is deprecated.  Yet we keep this to not give the registers below
+     a new number.  That could break older gdbservers.  */
   -1, -1, -1, -1,		/* MPX registers BND0 ... BND3.  */
   -1, -1,			/* MPX registers BNDCFGU and BNDSTATUS.  */
   -1, -1, -1, -1, -1, -1, -1, -1,     /* xmm16 ... xmm31 (AVX512)  */
@@ -1816,9 +1818,6 @@ amd64_linux_init_abi_common(struct gdbarch_info info, struct gdbarch *gdbarch,
 
   set_gdbarch_process_record (gdbarch, i386_process_record);
   set_gdbarch_process_record_signal (gdbarch, amd64_linux_record_signal);
-
-  set_gdbarch_get_siginfo_type (gdbarch, x86_linux_get_siginfo_type);
-  set_gdbarch_report_signal_info (gdbarch, i386_linux_report_signal_info);
 }
 
 static void
diff --git a/gdb/amd64-tdep.c b/gdb/amd64-tdep.c
index df6b882..b63e35d 100644
--- a/gdb/amd64-tdep.c
+++ b/gdb/amd64-tdep.c
@@ -110,11 +110,6 @@ static const char * const amd64_ymmh_avx512_names[] =
   "ymm28h", "ymm29h", "ymm30h", "ymm31h"
 };
 
-static const char * const amd64_mpx_names[] =
-{
-  "bnd0raw", "bnd1raw", "bnd2raw", "bnd3raw", "bndcfgu", "bndstatus"
-};
-
 static const char * const amd64_k_names[] =
 {
   "k0", "k1", "k2", "k3",
@@ -1039,13 +1034,6 @@ amd64_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
   enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
   gdb_byte buf[8];
 
-  /* BND registers can be in arbitrary values at the moment of the
-     inferior call.  This can cause boundary violations that are not
-     due to a real bug or even desired by the user.  The best to be done
-     is set the BND registers to allow access to the whole memory, INIT
-     state, before pushing the inferior call.   */
-  i387_reset_bnd_regs (gdbarch, regcache);
-
   /* Pass arguments.  */
   sp = amd64_push_arguments (regcache, nargs, args, sp, return_method);
 
@@ -3196,13 +3184,6 @@ amd64_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch,
       tdep->ymm0h_regnum = AMD64_YMM0H_REGNUM;
     }
 
-  if (tdesc_find_feature (tdesc, "org.gnu.gdb.i386.mpx") != NULL)
-    {
-      tdep->mpx_register_names = amd64_mpx_names;
-      tdep->bndcfgu_regnum = AMD64_BNDCFGU_REGNUM;
-      tdep->bnd0r_regnum = AMD64_BND0R_REGNUM;
-    }
-
   if (tdesc_find_feature (tdesc, "org.gnu.gdb.i386.segments") != NULL)
     {
       tdep->fsbase_regnum = AMD64_FSBASE_REGNUM;
@@ -3377,11 +3358,10 @@ const struct target_desc *
 amd64_target_description (uint64_t xcr0, bool segments)
 {
   static target_desc *amd64_tdescs \
-    [2/*AVX*/][2/*MPX*/][2/*AVX512*/][2/*PKRU*/][2/*segments*/] = {};
+    [2/*AVX*/][2/*AVX512*/][2/*PKRU*/][2/*segments*/] = {};
   target_desc **tdesc;
 
   tdesc = &amd64_tdescs[(xcr0 & X86_XSTATE_AVX) ? 1 : 0]
-    [(xcr0 & X86_XSTATE_MPX) ? 1 : 0]
     [(xcr0 & X86_XSTATE_AVX512) ? 1 : 0]
     [(xcr0 & X86_XSTATE_PKRU) ? 1 : 0]
     [segments ? 1 : 0];
diff --git a/gdb/amd64-tdep.h b/gdb/amd64-tdep.h
index 696c65b..544ed91 100644
--- a/gdb/amd64-tdep.h
+++ b/gdb/amd64-tdep.h
@@ -66,6 +66,8 @@ enum amd64_regnum
   AMD64_MXCSR_REGNUM = AMD64_XMM0_REGNUM + 16,
   AMD64_YMM0H_REGNUM,		/* %ymm0h */
   AMD64_YMM15H_REGNUM = AMD64_YMM0H_REGNUM + 15,
+  /* MPX is deprecated.  Yet we keep this to not give the registers below
+     a new number.  That could break older gdbservers.  */
   AMD64_BND0R_REGNUM = AMD64_YMM15H_REGNUM + 1,
   AMD64_BND3R_REGNUM = AMD64_BND0R_REGNUM + 3,
   AMD64_BNDCFGU_REGNUM,
diff --git a/gdb/amd64-windows-tdep.c b/gdb/amd64-windows-tdep.c
index 9636201..29a1f60 100644
--- a/gdb/amd64-windows-tdep.c
+++ b/gdb/amd64-windows-tdep.c
@@ -324,7 +324,7 @@ amd64_windows_push_dummy_call
   /* Pass "hidden" argument".  */
   if (return_method == return_method_struct)
     {
-      /* The "hidden" argument is passed throught the first argument
+      /* The "hidden" argument is passed through the first argument
 	 register.  */
       const int arg_regnum = amd64_windows_dummy_call_integer_regs[0];
 
@@ -435,11 +435,10 @@ amd64_skip_main_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
 
       if (target_read_memory (pc + 1, buf, sizeof buf) == 0)
 	{
-	  struct bound_minimal_symbol s;
 	  CORE_ADDR call_dest;
 
 	  call_dest = pc + 5 + extract_signed_integer (buf, 4, byte_order);
-	  s = lookup_minimal_symbol_by_pc (call_dest);
+	  bound_minimal_symbol s = lookup_minimal_symbol_by_pc (call_dest);
 	  if (s.minsym != NULL
 	      && s.minsym->linkage_name () != NULL
 	      && strcmp (s.minsym->linkage_name (), "__main") == 0)
diff --git a/gdb/arc-linux-tdep.c b/gdb/arc-linux-tdep.c
index 30bd40c..69980f9 100644
--- a/gdb/arc-linux-tdep.c
+++ b/gdb/arc-linux-tdep.c
@@ -428,7 +428,7 @@ arc_linux_software_single_step (struct regcache *regcache)
   CORE_ADDR next_pc = arc_insn_get_linear_next_pc (curr_insn);
   std::vector<CORE_ADDR> next_pcs;
 
-  /* For instructions with delay slots, the fall thru is not the
+  /* For instructions with delay slots, the fall through is not the
      instruction immediately after the current instruction, but the one
      after that.  */
   if (curr_insn.has_delay_slot)
@@ -506,8 +506,8 @@ arc_linux_skip_solib_resolver (struct gdbarch *gdbarch, CORE_ADDR pc)
 
      So we look for the symbol `_dl_linux_resolver', and if we are there,
      gdb sets a breakpoint at the return address, and continues.  */
-  struct bound_minimal_symbol resolver
-    = lookup_minimal_symbol ("_dl_linux_resolver", NULL, NULL);
+  bound_minimal_symbol resolver
+    = lookup_minimal_symbol (current_program_space, "_dl_linux_resolver");
 
   if (arc_debug)
     {
diff --git a/gdb/arc-tdep.c b/gdb/arc-tdep.c
index 4fc1ea1..9adf295 100644
--- a/gdb/arc-tdep.c
+++ b/gdb/arc-tdep.c
@@ -1438,7 +1438,7 @@ arc_analyze_prologue (struct gdbarch *gdbarch, const CORE_ADDR entrypoint,
    1) Store instruction for each callee-saved register (R25 - R13 + 1)
    2) Two instructions for FP
    3) One for BLINK
-   4) Three substract instructions for SP (for variadic args, for
+   4) Three subtract instructions for SP (for variadic args, for
    callee saved regs and for local vars) and assuming that those SUB use
    long-immediate (hence double length).
    5) Stores of arguments registers are considered part of prologue too
@@ -2117,7 +2117,7 @@ arc_check_tdesc_feature (struct tdesc_arch_data *tdesc_data,
   return true;
 }
 
-/* Check for the existance of "lp_start" and "lp_end" in target description.
+/* Check for the existence of "lp_start" and "lp_end" in target description.
    If both are present, assume there is hardware loop support in the target.
    This can be improved by looking into "lpc_size" field of "isa_config"
    auxiliary register.  */
diff --git a/gdb/arch-utils.c b/gdb/arch-utils.c
index fb5634d..6ffa410 100644
--- a/gdb/arch-utils.c
+++ b/gdb/arch-utils.c
@@ -37,6 +37,7 @@
 #include "auxv.h"
 #include "observable.h"
 #include "solib-target.h"
+#include "event-top.h"
 
 #include "gdbsupport/version.h"
 
@@ -404,13 +405,13 @@ set_endian (const char *ignore_args, int from_tty, struct cmd_list_element *c)
   if (set_endian_string == endian_auto)
     {
       target_byte_order_user = BFD_ENDIAN_UNKNOWN;
-      if (! gdbarch_update_p (info))
+      if (!gdbarch_update_p (current_inferior (), info))
 	internal_error (_("set_endian: architecture update failed"));
     }
   else if (set_endian_string == endian_little)
     {
       info.byte_order = BFD_ENDIAN_LITTLE;
-      if (! gdbarch_update_p (info))
+      if (!gdbarch_update_p (current_inferior (), info))
 	gdb_printf (gdb_stderr,
 		    _("Little endian target not supported by GDB\n"));
       else
@@ -419,7 +420,7 @@ set_endian (const char *ignore_args, int from_tty, struct cmd_list_element *c)
   else if (set_endian_string == endian_big)
     {
       info.byte_order = BFD_ENDIAN_BIG;
-      if (! gdbarch_update_p (info))
+      if (!gdbarch_update_p (current_inferior (), info))
 	gdb_printf (gdb_stderr,
 		    _("Big endian target not supported by GDB\n"));
       else
@@ -561,7 +562,7 @@ set_architecture (const char *ignore_args,
   if (strcmp (set_architecture_string, "auto") == 0)
     {
       target_architecture_user = NULL;
-      if (!gdbarch_update_p (info))
+      if (!gdbarch_update_p (current_inferior (), info))
 	internal_error (_("could not select an architecture automatically"));
     }
   else
@@ -569,7 +570,7 @@ set_architecture (const char *ignore_args,
       info.bfd_arch_info = bfd_scan_arch (set_architecture_string);
       if (info.bfd_arch_info == NULL)
 	internal_error (_("set_architecture: bfd_scan_arch failed"));
-      if (gdbarch_update_p (info))
+      if (gdbarch_update_p (current_inferior (), info))
 	target_architecture_user = info.bfd_arch_info;
       else
 	gdb_printf (gdb_stderr,
@@ -579,22 +580,23 @@ set_architecture (const char *ignore_args,
   show_architecture (gdb_stdout, from_tty, NULL, NULL);
 }
 
-/* Try to select a global architecture that matches "info".  Return
-   non-zero if the attempt succeeds.  */
+/* See arch-utils.h.  */
+
 int
-gdbarch_update_p (struct gdbarch_info info)
+gdbarch_update_p (inferior *inf, struct gdbarch_info info)
 {
   struct gdbarch *new_gdbarch;
 
   /* Check for the current file.  */
   if (info.abfd == NULL)
-    info.abfd = current_program_space->exec_bfd ();
+    info.abfd = inf->pspace->exec_bfd ();
+
   if (info.abfd == NULL)
-    info.abfd = current_program_space->core_bfd ();
+    info.abfd = inf->pspace->core_bfd ();
 
   /* Check for the current target description.  */
   if (info.target_desc == NULL)
-    info.target_desc = target_current_description ();
+    info.target_desc = target_current_description (inf);
 
   new_gdbarch = gdbarch_find_by_info (info);
 
@@ -609,7 +611,7 @@ gdbarch_update_p (struct gdbarch_info info)
 
   /* If it is the same old architecture, accept the request (but don't
      swap anything).  */
-  if (new_gdbarch == current_inferior ()->arch ())
+  if (new_gdbarch == inf->arch ())
     {
       if (gdbarch_debug)
 	gdb_printf (gdb_stdlog, "gdbarch_update_p: "
@@ -626,7 +628,7 @@ gdbarch_update_p (struct gdbarch_info info)
 		host_address_to_string (new_gdbarch),
 		gdbarch_bfd_arch_info (new_gdbarch)->printable_name);
 
-  current_inferior ()->set_arch (new_gdbarch);
+  inf->set_arch (new_gdbarch);
 
   return 1;
 }
@@ -653,7 +655,7 @@ set_gdbarch_from_file (bfd *abfd)
   struct gdbarch *gdbarch;
 
   info.abfd = abfd;
-  info.target_desc = target_current_description ();
+  info.target_desc = target_current_description (current_inferior ());
   gdbarch = gdbarch_find_by_info (info);
 
   if (gdbarch == NULL)
@@ -751,7 +753,7 @@ initialize_current_architecture (void)
   info.byte_order = default_byte_order;
   info.byte_order_for_code = info.byte_order;
 
-  if (! gdbarch_update_p (info))
+  if (!gdbarch_update_p (current_inferior (), info))
     internal_error (_("initialize_current_architecture: Selection of "
 		      "initial architecture failed"));
 
@@ -1040,7 +1042,11 @@ default_print_insn (bfd_vma memaddr, disassemble_info *info)
 				 info->mach, current_program_space->exec_bfd ());
 
   gdb_assert (disassemble_fn != NULL);
-  return (*disassemble_fn) (memaddr, info);
+  int res = (*disassemble_fn) (memaddr, info);
+
+  QUIT;
+
+  return res;
 }
 
 /* See arch-utils.h.  */
@@ -1192,7 +1198,7 @@ pstring_list (const char *const *list)
   return ret;
 }
 
-#include "gdbarch.c"
+#include "gdbarch-gen.c"
 
 enum return_value_convention
 default_gdbarch_return_value
diff --git a/gdb/arch/amd64.c b/gdb/arch/amd64.c
index 94d55d7..5fc9947 100644
--- a/gdb/arch/amd64.c
+++ b/gdb/arch/amd64.c
@@ -17,13 +17,13 @@
 
 #include "amd64.h"
 #include "gdbsupport/x86-xstate.h"
+#include "gdbsupport/osabi.h"
 #include <stdlib.h>
 
 #include "../features/i386/64bit-avx.c"
 #include "../features/i386/64bit-avx512.c"
 #include "../features/i386/64bit-core.c"
 #include "../features/i386/64bit-linux.c"
-#include "../features/i386/64bit-mpx.c"
 #include "../features/i386/64bit-segments.c"
 #include "../features/i386/64bit-sse.c"
 #include "../features/i386/pkeys.c"
@@ -46,7 +46,7 @@ amd64_create_target_description (uint64_t xcr0, bool is_x32, bool is_linux,
 			  is_x32 ? "i386:x64-32" : "i386:x86-64");
 
   if (is_linux)
-    set_tdesc_osabi (tdesc.get (), "GNU/Linux");
+    set_tdesc_osabi (tdesc.get (), GDB_OSABI_LINUX);
 #endif
 
   long regnum = 0;
@@ -65,13 +65,6 @@ amd64_create_target_description (uint64_t xcr0, bool is_x32, bool is_linux,
   if (xcr0 & X86_XSTATE_AVX)
     regnum = create_feature_i386_64bit_avx (tdesc.get (), regnum);
 
-  if (xcr0 & X86_XSTATE_MPX)
-    {
-      /* MPX is not available on x32.  */
-      gdb_assert (!is_x32);
-      regnum = create_feature_i386_64bit_mpx (tdesc.get (), regnum);
-    }
-
   if (xcr0 & X86_XSTATE_AVX512)
     regnum = create_feature_i386_64bit_avx512 (tdesc.get (), regnum);
 
diff --git a/gdb/arch/i386.c b/gdb/arch/i386.c
index f3165c5..2072eae 100644
--- a/gdb/arch/i386.c
+++ b/gdb/arch/i386.c
@@ -18,6 +18,7 @@
 #include "i386.h"
 #include "gdbsupport/tdesc.h"
 #include "gdbsupport/x86-xstate.h"
+#include "gdbsupport/osabi.h"
 #include <stdlib.h>
 
 #include "../features/i386/32bit-core.c"
@@ -25,7 +26,6 @@
 #include "../features/i386/32bit-sse.c"
 #include "../features/i386/32bit-avx.c"
 #include "../features/i386/32bit-avx512.c"
-#include "../features/i386/32bit-mpx.c"
 #include "../features/i386/32bit-segments.c"
 #include "../features/i386/pkeys.c"
 
@@ -39,7 +39,7 @@ i386_create_target_description (uint64_t xcr0, bool is_linux, bool segments)
 #ifndef IN_PROCESS_AGENT
   set_tdesc_architecture (tdesc.get (), "i386");
   if (is_linux)
-    set_tdesc_osabi (tdesc.get (), "GNU/Linux");
+    set_tdesc_osabi (tdesc.get (), GDB_OSABI_LINUX);
 #endif
 
   long regnum = 0;
@@ -59,9 +59,6 @@ i386_create_target_description (uint64_t xcr0, bool is_linux, bool segments)
   if (xcr0 & X86_XSTATE_AVX)
     regnum = create_feature_i386_32bit_avx (tdesc.get (), regnum);
 
-  if (xcr0 & X86_XSTATE_MPX)
-    regnum = create_feature_i386_32bit_mpx (tdesc.get (), regnum);
-
   if (xcr0 & X86_XSTATE_AVX512)
     regnum = create_feature_i386_32bit_avx512 (tdesc.get (), regnum);
 
diff --git a/gdb/arch/tic6x.c b/gdb/arch/tic6x.c
index 680a794..b8a722b 100644
--- a/gdb/arch/tic6x.c
+++ b/gdb/arch/tic6x.c
@@ -16,6 +16,7 @@
    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
 
 #include "gdbsupport/tdesc.h"
+#include "gdbsupport/osabi.h"
 #include "tic6x.h"
 
 #include "../features/tic6x-core.c"
@@ -30,7 +31,7 @@ tic6x_create_target_description (enum c6x_feature feature)
   target_desc_up tdesc = allocate_target_description ();
 
   set_tdesc_architecture (tdesc.get (), "tic6x");
-  set_tdesc_osabi (tdesc.get (), "GNU/Linux");
+  set_tdesc_osabi (tdesc.get (), GDB_OSABI_LINUX);
 
   long regnum = 0;
 
diff --git a/gdb/arch/x86-linux-tdesc-features.c b/gdb/arch/x86-linux-tdesc-features.c
index ad1d919..f6eb112 100644
--- a/gdb/arch/x86-linux-tdesc-features.c
+++ b/gdb/arch/x86-linux-tdesc-features.c
@@ -65,7 +65,6 @@ static constexpr x86_xstate_feature x86_linux_all_xstate_features[] = {
   { X86_XSTATE_PKRU,	true,	true, 	true },
   { X86_XSTATE_AVX512,	true,	true, 	true },
   { X86_XSTATE_AVX,	true,	true, 	true },
-  { X86_XSTATE_MPX,	true,	true, 	false },
   { X86_XSTATE_SSE,	true,	false, 	false },
   { X86_XSTATE_X87,	true,	false, 	false }
 };
@@ -150,9 +149,9 @@ x86_linux_xcr0_to_tdesc_idx (uint64_t xcr0)
      the target descriptions (see nat/x86-linux-tdesc.c), the feature order
      represents the bit order within the generated index number.
 
-     i386  | x87 sse mpx avx avx512 pkru
-     amd64 |         mpx avx avx512 pkru
-     i32   |             avx avx512 pkru
+     i386  | x87 sse avx avx512 pkru
+     amd64 |         avx avx512 pkru
+     i32   |         avx avx512 pkru
 
      The features are ordered so that for each mode (i386, amd64, i32) the
      generated index will form a continuous range.  */
diff --git a/gdb/arm-tdep.c b/gdb/arm-tdep.c
index f36ce63..9c996b8 100644
--- a/gdb/arm-tdep.c
+++ b/gdb/arm-tdep.c
@@ -712,7 +712,6 @@ arm_find_mapping_symbol (CORE_ADDR memaddr, CORE_ADDR *start)
 int
 arm_pc_is_thumb (struct gdbarch *gdbarch, CORE_ADDR memaddr)
 {
-  struct bound_minimal_symbol sym;
   char type;
   arm_displaced_step_copy_insn_closure *dsc = nullptr;
   arm_gdbarch_tdep *tdep = gdbarch_tdep<arm_gdbarch_tdep> (gdbarch);
@@ -752,7 +751,7 @@ arm_pc_is_thumb (struct gdbarch *gdbarch, CORE_ADDR memaddr)
     return type == 't';
 
   /* Thumb functions have a "special" bit set in minimal symbols.  */
-  sym = lookup_minimal_symbol_by_pc (memaddr);
+  bound_minimal_symbol sym = lookup_minimal_symbol_by_pc (memaddr);
   if (sym.minsym)
     return (MSYMBOL_IS_SPECIAL (sym.minsym));
 
@@ -913,9 +912,8 @@ static int
 skip_prologue_function (struct gdbarch *gdbarch, CORE_ADDR pc, int is_thumb)
 {
   enum bfd_endian byte_order_for_code = gdbarch_byte_order_for_code (gdbarch);
-  struct bound_minimal_symbol msym;
 
-  msym = lookup_minimal_symbol_by_pc (pc);
+  bound_minimal_symbol msym = lookup_minimal_symbol_by_pc (pc);
   if (msym.minsym != NULL
       && msym.value_address () == pc
       && msym.minsym->linkage_name () != NULL)
@@ -1684,7 +1682,6 @@ arm_skip_stack_protector(CORE_ADDR pc, struct gdbarch *gdbarch)
 {
   enum bfd_endian byte_order_for_code = gdbarch_byte_order_for_code (gdbarch);
   unsigned int basereg;
-  struct bound_minimal_symbol stack_chk_guard;
   int offset;
   int is_thumb = arm_pc_is_thumb (gdbarch, pc);
   CORE_ADDR addr;
@@ -1695,7 +1692,7 @@ arm_skip_stack_protector(CORE_ADDR pc, struct gdbarch *gdbarch)
   if (!addr)
     return pc;
 
-  stack_chk_guard = lookup_minimal_symbol_by_pc (addr);
+  bound_minimal_symbol stack_chk_guard = lookup_minimal_symbol_by_pc (addr);
   /* ADDR must correspond to a symbol whose name is __stack_chk_guard.
      Otherwise, this sequence cannot be for stack protector.  */
   if (stack_chk_guard.minsym == NULL
@@ -4860,7 +4857,7 @@ arm_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
       si = pop_stack_item (si);
     }
 
-  /* Finally, update teh SP register.  */
+  /* Finally, update the SP register.  */
   regcache_cooked_write_unsigned (regcache, ARM_SP_REGNUM, sp);
 
   return sp;
@@ -9391,9 +9388,8 @@ arm_skip_cmse_entry (CORE_ADDR pc, const char *name, struct objfile *objfile)
   char *target_name = (char *) alloca (target_len);
   xsnprintf (target_name, target_len, "%s%s", "__acle_se_", name);
 
-  struct bound_minimal_symbol minsym
-   = lookup_minimal_symbol (target_name, NULL, objfile);
-
+  bound_minimal_symbol minsym
+    = lookup_minimal_symbol (current_program_space, target_name, objfile);
   if (minsym.minsym != nullptr)
     return minsym.value_address ();
 
@@ -9467,7 +9463,6 @@ arm_skip_stub (const frame_info_ptr &frame, CORE_ADDR pc)
     {
       char *target_name;
       int target_len = namelen - 2;
-      struct bound_minimal_symbol minsym;
       struct objfile *objfile;
       struct obj_section *sec;
 
@@ -9482,7 +9477,8 @@ arm_skip_stub (const frame_info_ptr &frame, CORE_ADDR pc)
 
       sec = find_pc_section (pc);
       objfile = (sec == NULL) ? NULL : sec->objfile;
-      minsym = lookup_minimal_symbol (target_name, NULL, objfile);
+      bound_minimal_symbol minsym
+	= lookup_minimal_symbol (current_program_space, target_name, objfile);
       if (minsym.minsym != NULL)
 	return minsym.value_address ();
       else
@@ -9508,7 +9504,7 @@ arm_update_current_architecture (void)
 
   /* Update the architecture.  */
   gdbarch_info info;
-  if (!gdbarch_update_p (info))
+  if (!gdbarch_update_p (current_inferior (), info))
     internal_error (_("could not update architecture"));
 }
 
@@ -12143,7 +12139,7 @@ arm_record_ld_st_imm_offset (arm_insn_decode_record *arm_insn_r)
       record_buf[arm_insn_r->reg_rec_count++] = reg_dest;
 
       /* The LDR instruction is capable of doing branching.  If MOV LR, PC
-	 preceeds a LDR instruction having R15 as reg_base, it
+	 precedes a LDR instruction having R15 as reg_base, it
 	 emulates a branch and link instruction, and hence we need to save
 	 CPSR and PC as well.  */
       if (ARM_PC_REGNUM == reg_dest)
@@ -12267,7 +12263,7 @@ arm_record_ld_st_reg_offset (arm_insn_decode_record *arm_insn_r)
 	  if (15 == reg_src2)
 	    {
 	      /* If R15 was used as Rn, hence current PC+8.  */
-	      /* Pre-indexed mode doesnt reach here ; illegal insn.  */
+	      /* Pre-indexed mode doesn't reach here ; illegal insn.  */
 		u_regval[0] = u_regval[0] + 8;
 	    }
 	  /* Calculate target store address, Rn +/- Rm, register offset.  */
@@ -12580,7 +12576,7 @@ arm_record_b_bl (arm_insn_decode_record *arm_insn_r)
 
   /* Handle B, BL, BLX(1) insns.  */
   /* B simply branches so we do nothing here.  */
-  /* Note: BLX(1) doesnt fall here but instead it falls into
+  /* Note: BLX(1) doesn't fall here but instead it falls into
      extension space.  */
   if (bit (arm_insn_r->arm_insn, 24))
     {
diff --git a/gdb/arm-wince-tdep.c b/gdb/arm-wince-tdep.c
index eab496c..403795f 100644
--- a/gdb/arm-wince-tdep.c
+++ b/gdb/arm-wince-tdep.c
@@ -40,7 +40,6 @@ arm_pe_skip_trampoline_code (const frame_info_ptr &frame, CORE_ADDR pc)
   struct gdbarch *gdbarch = get_frame_arch (frame);
   enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
   ULONGEST indirect;
-  struct bound_minimal_symbol indsym;
   const char *symname;
   CORE_ADDR next_pc;
 
@@ -61,7 +60,7 @@ arm_pe_skip_trampoline_code (const frame_info_ptr &frame, CORE_ADDR pc)
   if (indirect == 0)
     return 0;
 
-  indsym = lookup_minimal_symbol_by_pc (indirect);
+  bound_minimal_symbol indsym = lookup_minimal_symbol_by_pc (indirect);
   if (indsym.minsym == NULL)
     return 0;
 
@@ -100,7 +99,7 @@ arm_wince_skip_main_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
 
       long offset = sign_extend (this_instr & 0x000fffff, 23) << 2;
       CORE_ADDR call_dest = (pc + 8 + offset) & 0xffffffffU;
-      struct bound_minimal_symbol s = lookup_minimal_symbol_by_pc (call_dest);
+      bound_minimal_symbol s = lookup_minimal_symbol_by_pc (call_dest);
 
       if (s.minsym != NULL
 	  && s.minsym->linkage_name () != NULL
diff --git a/gdb/auto-load.c b/gdb/auto-load.c
index 839be08..e753333 100644
--- a/gdb/auto-load.c
+++ b/gdb/auto-load.c
@@ -1629,7 +1629,7 @@ This option has security implications for untrusted inferiors."),
 See the commands 'set auto-load safe-path' and 'show auto-load safe-path' to\n\
 access the current full list setting."),
 		 &cmdlist);
-  set_cmd_completer (cmd, filename_completer);
+  set_cmd_completer (cmd, deprecated_filename_completer);
 
   cmd = add_cmd ("add-auto-load-scripts-directory", class_support,
 		 add_auto_load_dir,
@@ -1638,7 +1638,7 @@ access the current full list setting."),
 See the commands 'set auto-load scripts-directory' and\n\
 'show auto-load scripts-directory' to access the current full list setting."),
 		 &cmdlist);
-  set_cmd_completer (cmd, filename_completer);
+  set_cmd_completer (cmd, deprecated_filename_completer);
 
   add_setshow_boolean_cmd ("auto-load", class_maintenance,
 			   &debug_auto_load, _("\
diff --git a/gdb/auxv.c b/gdb/auxv.c
index 616564c..c831b2b 100644
--- a/gdb/auxv.c
+++ b/gdb/auxv.c
@@ -81,7 +81,6 @@ ld_so_xfer_auxv (gdb_byte *readbuf,
 		 ULONGEST offset,
 		 ULONGEST len, ULONGEST *xfered_len)
 {
-  struct bound_minimal_symbol msym;
   CORE_ADDR data_address, pointer_address;
   gdbarch *arch = current_inferior ()->arch ();
   type *ptr_type = builtin_type (arch)->builtin_data_ptr;
@@ -91,7 +90,8 @@ ld_so_xfer_auxv (gdb_byte *readbuf,
   LONGEST retval;
   size_t block;
 
-  msym = lookup_minimal_symbol ("_dl_auxv", NULL, NULL);
+  bound_minimal_symbol msym
+    = lookup_minimal_symbol (current_program_space, "_dl_auxv");
   if (msym.minsym == NULL)
     return TARGET_XFER_E_IO;
 
@@ -328,7 +328,7 @@ parse_auxv (target_ops *ops, gdbarch *gdbarch, const gdb_byte **readptr,
 
 /*  Auxiliary Vector information structure.  This is used by GDB
     for caching purposes for each inferior.  This helps reduce the
-    overhead of transfering data from a remote target to the local host.  */
+    overhead of transferring data from a remote target to the local host.  */
 struct auxv_info
 {
   std::optional<gdb::byte_vector> data;
diff --git a/gdb/avr-tdep.c b/gdb/avr-tdep.c
index 1e39f85..9c97d3c 100644
--- a/gdb/avr-tdep.c
+++ b/gdb/avr-tdep.c
@@ -530,7 +530,6 @@ avr_scan_prologue (struct gdbarch *gdbarch, CORE_ADDR pc_beg, CORE_ADDR pc_end,
   int i;
   unsigned short insn;
   int scan_stage = 0;
-  struct bound_minimal_symbol msymbol;
   unsigned char prologue[AVR_MAX_PROLOGUE_SIZE];
   int vpc = 0;
   int len;
@@ -623,7 +622,8 @@ avr_scan_prologue (struct gdbarch *gdbarch, CORE_ADDR pc_beg, CORE_ADDR pc_end,
       body_addr |= ((insn & 0xf) | ((insn & 0x0f00) >> 4)) << 8;
       pc_offset += 2;
 
-      msymbol = lookup_minimal_symbol ("__prologue_saves__", NULL, NULL);
+      bound_minimal_symbol msymbol
+	= lookup_minimal_symbol (current_program_space, "__prologue_saves__");
       if (!msymbol.minsym)
 	break;
 
diff --git a/gdb/ax-gdb.c b/gdb/ax-gdb.c
index ab5e800..3d61901 100644
--- a/gdb/ax-gdb.c
+++ b/gdb/ax-gdb.c
@@ -598,9 +598,9 @@ gen_var_ref (struct agent_expr *ax, struct axs_value *value, struct symbol *var)
 
     case LOC_UNRESOLVED:
       {
-	struct bound_minimal_symbol msym
-	  = lookup_minimal_symbol (var->linkage_name (), NULL, NULL);
-
+	bound_minimal_symbol msym
+	  = lookup_minimal_symbol (current_program_space,
+				   var->linkage_name ());
 	if (!msym.minsym)
 	  error (_("Couldn't resolve symbol `%s'."), var->print_name ());
 
diff --git a/gdb/bfin-tdep.c b/gdb/bfin-tdep.c
index b89b7df..1fa7a66 100644
--- a/gdb/bfin-tdep.c
+++ b/gdb/bfin-tdep.c
@@ -465,7 +465,7 @@ bfin_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
 
    /* TODO:
       Dwarf2 uses entry point value AFTER some register initializations.
-      We should perhaps skip such asssignments as well (R6 = R1, ...).  */
+      We should perhaps skip such assignments as well (R6 = R1, ...).  */
 
   return pc;
 }
diff --git a/gdb/block.c b/gdb/block.c
index 511689c..6f60877 100644
--- a/gdb/block.c
+++ b/gdb/block.c
@@ -25,6 +25,8 @@
 #include "addrmap.h"
 #include "gdbtypes.h"
 #include "objfiles.h"
+#include "cli/cli-cmds.h"
+#include "inferior.h"
 
 /* This is used by struct block to store namespace-related info for
    C++ files, namely using declarations and the current namespace in
@@ -41,13 +43,10 @@ struct block_namespace_info : public allocate_on_obstack<block_namespace_info>
 struct objfile *
 block::objfile () const
 {
-  const struct global_block *global_block;
-
   if (function () != nullptr)
     return function ()->objfile ();
 
-  global_block = (struct global_block *) this->global_block ();
-  return global_block->compunit_symtab->objfile ();
+  return this->global_block ()->compunit ()->objfile ();
 }
 
 /* See block.  */
@@ -227,7 +226,7 @@ call_site_for_pc (struct gdbarch *gdbarch, CORE_ADDR pc)
 
   if (cs == nullptr)
     {
-      struct bound_minimal_symbol msym = lookup_minimal_symbol_by_pc (pc);
+      bound_minimal_symbol msym = lookup_minimal_symbol_by_pc (pc);
 
       /* DW_TAG_gnu_call_site will be missing just if GCC could not determine
 	 the call target.  */
@@ -364,7 +363,7 @@ block::static_block () const
 
 /* See block.h.  */
 
-const struct block *
+const struct global_block *
 block::global_block () const
 {
   const block *block = this;
@@ -372,33 +371,40 @@ block::global_block () const
   while (block->superblock () != NULL)
     block = block->superblock ();
 
-  return block;
+  return block->as_global_block ();
 }
 
 /* See block.h.  */
 
-const struct block *
-block::function_block () const
+struct global_block *
+block::as_global_block ()
 {
-  const block *block = this;
+  gdb_assert (this->is_global_block ());
 
-  while (block != nullptr && block->function () == nullptr)
-    block = block->superblock ();
+  return static_cast<struct global_block *>(this);
+}
 
-  return block;
+/* See block.h.  */
+
+const struct global_block *
+block::as_global_block () const
+{
+  gdb_assert (this->is_global_block ());
+
+  return static_cast<const struct global_block *>(this);
 }
 
 /* See block.h.  */
 
-void
-block::set_compunit_symtab (struct compunit_symtab *cu)
+const struct block *
+block::function_block () const
 {
-  struct global_block *gb;
+  const block *block = this;
+
+  while (block != nullptr && block->function () == nullptr)
+    block = block->superblock ();
 
-  gdb_assert (superblock () == NULL);
-  gb = (struct global_block *) this;
-  gdb_assert (gb->compunit_symtab == NULL);
-  gb->compunit_symtab = cu;
+  return block;
 }
 
 /* See block.h.  */
@@ -416,21 +422,6 @@ block::static_link () const
   return (struct dynamic_prop *) objfile_lookup_static_link (objfile, this);
 }
 
-/* Return the compunit of the global block.  */
-
-static struct compunit_symtab *
-get_block_compunit_symtab (const struct block *block)
-{
-  struct global_block *gb;
-
-  gdb_assert (block->superblock () == NULL);
-  gb = (struct global_block *) block;
-  gdb_assert (gb->compunit_symtab != NULL);
-  return gb->compunit_symtab;
-}
-
-
-
 /* Initialize a block iterator, either to iterate over a single block,
    or, for static and global blocks, all the included symtabs as
    well.  */
@@ -438,33 +429,29 @@ get_block_compunit_symtab (const struct block *block)
 static void
 initialize_block_iterator (const struct block *block,
 			   struct block_iterator *iter,
-			   const lookup_name_info *name = nullptr)
+			   const lookup_name_info *name)
 {
   enum block_enum which;
-  struct compunit_symtab *cu;
 
   iter->idx = -1;
   iter->name = name;
 
-  if (block->superblock () == NULL)
-    {
-      which = GLOBAL_BLOCK;
-      cu = get_block_compunit_symtab (block);
-    }
-  else if (block->superblock ()->superblock () == NULL)
-    {
-      which = STATIC_BLOCK;
-      cu = get_block_compunit_symtab (block->superblock ());
-    }
+  if (block->is_global_block ())
+    which = GLOBAL_BLOCK;
+  else if (block->is_static_block ())
+    which = STATIC_BLOCK;
   else
     {
       iter->d.block = block;
+
       /* A signal value meaning that we're iterating over a single
 	 block.  */
       iter->which = FIRST_LOCAL_BLOCK;
       return;
     }
 
+  compunit_symtab *cu = block->global_block ()->compunit ();
+
   /* If this is an included symtab, find the canonical includer and
      use it instead.  */
   while (cu->user != NULL)
@@ -834,3 +821,124 @@ make_blockranges (struct objfile *objfile,
   return blr;
 }
 
+/* Implement 'maint info blocks' command.  If passed an argument then
+   print a list of all blocks at the given address.  With no arguments
+   then list all blocks at the current address of the current inferior.  */
+
+static void
+maintenance_info_blocks (const char *arg, int from_tty)
+{
+  CORE_ADDR address;
+
+  /* With no argument use the program counter of the current thread.  If
+     there is an argument then use this as the address to examine.  */
+  if (arg == nullptr)
+    {
+      if (inferior_ptid == null_ptid)
+	error (_("no inferior thread"));
+
+      struct regcache *regcache = get_thread_regcache (inferior_thread ());
+      address = regcache_read_pc (regcache);
+    }
+  else
+    address = parse_and_eval_address (arg);
+
+  /* Find the inner most block for ADDRESS.  */
+  const struct block *cur_block = block_for_pc (address);
+  if (cur_block == nullptr)
+    {
+      gdb_printf (_("No blocks at %s\n"), core_addr_to_string_nz (address));
+      return;
+    }
+
+  gdb_printf (_("Blocks at %s:\n"), core_addr_to_string_nz (address));
+
+  const struct objfile *toplevel_objfile = cur_block->objfile ();
+  if (toplevel_objfile != nullptr)
+    gdb_printf (_("  from objfile: [(objfile *) %s] %s\n"),
+		host_address_to_string (toplevel_objfile),
+		objfile_name (toplevel_objfile));
+
+  gdb_printf ("\n");
+
+  /* List the blocks backwards; global block (widest scope) first, down to
+     the smallest scoped block last.  To do this we need to build the list
+     of blocks starting from the inner block, then print that list
+     backwards.  */
+  std::vector<const struct block *> blocks;
+  while (cur_block != nullptr)
+    {
+      blocks.emplace_back (cur_block);
+      cur_block = cur_block->superblock ();
+    }
+
+  for (auto it = blocks.rbegin (); it != blocks.rend (); ++it)
+    {
+      cur_block = *it;
+
+      gdb_assert (cur_block->objfile () == toplevel_objfile);
+
+      gdb_printf (_("[(block *) %s] %s..%s\n"),
+		  host_address_to_string (cur_block),
+		  core_addr_to_string_nz (cur_block->start ()),
+		  core_addr_to_string_nz (cur_block->end ()));
+      gdb_printf (_("  entry pc: %s\n"),
+		  core_addr_to_string_nz (cur_block->entry_pc ()));
+
+      if (cur_block->is_static_block ())
+	gdb_printf (_("  is static block\n"));
+
+      if (cur_block->is_global_block ())
+	gdb_printf (_("  is global block\n"));
+
+      if (cur_block->function () != nullptr)
+	{
+	  if (cur_block->inlined_p ())
+	    gdb_printf (_("  inline function: %s\n"),
+			cur_block->function ()->print_name ());
+	  else
+	    gdb_printf (_("  function: %s\n"),
+			cur_block->function ()->print_name ());
+	}
+
+      if (cur_block->scope () != nullptr
+	  && *cur_block->scope () != '\0')
+	gdb_printf (_("  scope: %s\n"), cur_block->scope ());
+
+      if (int symbol_count = mdict_size (cur_block->multidict ());
+	  symbol_count > 0)
+	gdb_printf (_("  symbol count: %d\n"), symbol_count);
+
+      if (cur_block->is_contiguous ())
+	gdb_printf (_("  is contiguous\n"));
+      else
+	{
+	  gdb_printf (_("  address ranges:\n"));
+	  for (const blockrange &rng : cur_block->ranges ())
+	    gdb_printf (_("    %s..%s\n"),
+			core_addr_to_string_nz (rng.start ()),
+			core_addr_to_string_nz (rng.end ()));
+	}
+    }
+}
+
+
+
+void _initialize_block ();
+void
+_initialize_block ()
+{
+  add_cmd ("blocks", class_maintenance, maintenance_info_blocks,
+	   _("\
+Display block information for current thread.\n\
+\n\
+Usage:\n\
+\n\
+  maintenance info blocks [ADDRESS]\n\
+\n\
+With no ADDRESS show all blocks at the current address, starting with the\n\
+global block and working down to the inner most block.\n\
+\n\
+When ADDRESS is given, list the blocks at ADDRESS."),
+	   &maintenanceinfolist);
+}
diff --git a/gdb/block.h b/gdb/block.h
index ae676c4..c3babad 100644
--- a/gdb/block.h
+++ b/gdb/block.h
@@ -264,25 +264,26 @@ struct block : public allocate_on_obstack<block>
     return sup->is_global_block ();
   }
 
-  /* Return the static block associated with block.  */
+  /* Return the global block associated with block.  */
 
-  const struct block *global_block () const;
+  const struct global_block *global_block () const;
 
   /* Return true if this block is a global block.  */
 
   bool is_global_block () const
   { return superblock () == nullptr; }
 
+  /* Return this block as a global_block.  This block must be a global
+     block.  */
+  struct global_block *as_global_block ();
+  const struct global_block *as_global_block () const;
+
   /* Return the function block for this block.  Returns nullptr if
      there is no enclosing function, i.e., if this block is a static
      or global block.  */
 
   const struct block *function_block () const;
 
-  /* Set the compunit of this block, which must be a global block.  */
-
-  void set_compunit_symtab (struct compunit_symtab *);
-
   /* Return a property to evaluate the static link associated to this
      block.
 
@@ -346,13 +347,31 @@ private:
 };
 
 /* The global block is singled out so that we can provide a back-link
-   to the compunit symtab.  */
+   to the compunit.  */
 
 struct global_block : public block
 {
-  /* This holds a pointer to the compunit symtab holding this block.  */
+  /* Set the compunit of this global block.
+
+     The compunit must not have been set previously.  */
+  void set_compunit (compunit_symtab *cu)
+  {
+    gdb_assert (m_compunit == nullptr);
+    m_compunit = cu;
+  }
+
+  /* Return the compunit of this global block.
 
-  struct compunit_symtab *compunit_symtab = nullptr;
+     The compunit must have been set previously.  */
+  compunit_symtab *compunit () const
+  {
+    gdb_assert (m_compunit != nullptr);
+    return m_compunit;
+  }
+
+private:
+  /* This holds a pointer to the compunit holding this block.  */
+  compunit_symtab *m_compunit = nullptr;
 };
 
 struct blockvector
@@ -394,12 +413,15 @@ struct blockvector
   { return m_num_blocks; }
 
   /* Return the global block of this blockvector.  */
-  struct block *global_block ()
-  { return this->block (GLOBAL_BLOCK); }
+  struct global_block *global_block ()
+  { return static_cast<struct global_block *> (this->block (GLOBAL_BLOCK)); }
 
   /* Const version of the above.  */
-  const struct block *global_block () const
-  { return this->block (GLOBAL_BLOCK); }
+  const struct global_block *global_block () const
+  {
+    return static_cast<const struct global_block *>
+      (this->block (GLOBAL_BLOCK));
+  }
 
   /* Return the static block of this blockvector.  */
   struct block *static_block ()
diff --git a/gdb/blockframe.c b/gdb/blockframe.c
index 55e82fb..7275eb1 100644
--- a/gdb/blockframe.c
+++ b/gdb/blockframe.c
@@ -85,7 +85,6 @@ CORE_ADDR
 get_pc_function_start (CORE_ADDR pc)
 {
   const struct block *bl;
-  struct bound_minimal_symbol msymbol;
 
   bl = block_for_pc (pc);
   if (bl)
@@ -99,7 +98,7 @@ get_pc_function_start (CORE_ADDR pc)
 	}
     }
 
-  msymbol = lookup_minimal_symbol_by_pc (pc);
+  bound_minimal_symbol msymbol = lookup_minimal_symbol_by_pc (pc);
   if (msymbol.minsym)
     {
       CORE_ADDR fstart = msymbol.value_address ();
@@ -216,9 +215,9 @@ find_pc_partial_function_sym (CORE_ADDR pc,
 {
   struct obj_section *section;
   struct symbol *f;
-  struct bound_minimal_symbol msymbol;
   struct compunit_symtab *compunit_symtab = NULL;
   CORE_ADDR mapped_pc;
+  bound_minimal_symbol msymbol;
 
   /* To ensure that the symbol returned belongs to the correct section
      (and that the last [random] symbol from the previous section
diff --git a/gdb/break-catch-throw.c b/gdb/break-catch-throw.c
index b7e29a7..c1c88d9 100644
--- a/gdb/break-catch-throw.c
+++ b/gdb/break-catch-throw.c
@@ -81,10 +81,10 @@ struct exception_catchpoint : public code_breakpoint
 				     _("invalid type-matching regexp")))
   {
     pspace = current_program_space;
-    re_set ();
+    re_set (pspace);
   }
 
-  void re_set () override;
+  void re_set (program_space *pspace) override;
   enum print_stop_action print_it (const bpstat *bs) const override;
   bool print_one (const bp_location **) const override;
   void print_mention () const override;
@@ -197,7 +197,7 @@ exception_catchpoint::check_status (struct bpstat *bs)
 /* Implement the 're_set' method.  */
 
 void
-exception_catchpoint::re_set ()
+exception_catchpoint::re_set (program_space *pspace)
 {
   std::vector<symtab_and_line> sals;
   struct program_space *filter_pspace = current_program_space;
diff --git a/gdb/break-cond-parse.c b/gdb/break-cond-parse.c
new file mode 100644
index 0000000..b2b1324
--- /dev/null
+++ b/gdb/break-cond-parse.c
@@ -0,0 +1,699 @@
+/* Copyright (C) 2023 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
+
+#include "defs.h"
+#include "gdbsupport/gdb_assert.h"
+#include "gdbsupport/selftest.h"
+#include "test-target.h"
+#include "scoped-mock-context.h"
+#include "break-cond-parse.h"
+#include "tid-parse.h"
+#include "ada-lang.h"
+#include "exceptions.h"
+
+/* When parsing tokens from a string, which direction are we parsing?
+
+   Given the following string and pointer 'ptr':
+
+	ABC DEF GHI JKL
+	       ^
+	       ptr
+
+   Parsing 'forward' will return the token 'GHI' and update 'ptr' to point
+   between GHI and JKL.  Parsing 'backward' will return the token 'DEF' and
+   update 'ptr' to point between ABC and DEF.
+*/
+
+enum class parse_direction
+{
+  /* Parse the next token forwards.  */
+  forward,
+
+  /* Parse the previous token backwards.  */
+  backward
+};
+
+/* Find the next token in DIRECTION from *CURR.  */
+
+static std::string_view
+find_next_token (const char **curr, parse_direction direction)
+{
+  const char *tok_start, *tok_end;
+
+  gdb_assert (**curr != '\0');
+
+  if (direction == parse_direction::forward)
+    {
+      *curr = skip_spaces (*curr);
+      tok_start = *curr;
+      *curr = skip_to_space (*curr);
+      tok_end = *curr - 1;
+    }
+  else
+    {
+      gdb_assert (direction == parse_direction::backward);
+
+      while (isspace (**curr))
+	--(*curr);
+
+      tok_end = *curr;
+
+      while (!isspace (**curr))
+	--(*curr);
+
+      tok_start = (*curr) + 1;
+    }
+
+  return std::string_view (tok_start, tok_end - tok_start + 1);
+}
+
+/* A class that represents a complete parsed token.  Each token has a type
+   and a std::string_view into the original breakpoint condition string.  */
+
+struct token
+{
+  /* The types a token might take.  */
+  enum class type
+  {
+    /* These are the token types for the 'if', 'thread', 'inferior', and
+       'task' keywords.  The m_content for these token types is the value
+       passed to the keyword, not the keyword itself.  */
+    CONDITION,
+    THREAD,
+    INFERIOR,
+    TASK,
+
+    /* This is the token used when we find unknown content, the m_content
+       for this token is the rest of the input string.  */
+    REST,
+
+    /* This is the token for the -force-condition token, the m_content for
+       this token contains the keyword itself.  */
+    FORCE
+  };
+
+  token (enum type type, std::string_view content)
+    : m_type (type),
+      m_content (std::move (content))
+  {
+    /* Nothing.  */
+  }
+
+  /* Return a string representing this token.  Only used for debug.  */
+  std::string to_string () const
+  {
+    switch (m_type)
+      {
+      case type::CONDITION:
+	return string_printf ("{ CONDITION: \"%s\" }",
+			      std::string (m_content).c_str ());
+      case type::THREAD:
+	return string_printf ("{ THREAD: \"%s\" }",
+			      std::string (m_content).c_str ());
+      case type::INFERIOR:
+	return string_printf ("{ INFERIOR: \"%s\" }",
+			      std::string (m_content).c_str ());
+      case type::TASK:
+	return string_printf ("{ TASK: \"%s\" }",
+			      std::string (m_content).c_str ());
+      case type::REST:
+	return string_printf ("{ REST: \"%s\" }",
+			      std::string (m_content).c_str ());
+      case type::FORCE:
+	return string_printf ("{ FORCE }");
+      default:
+	return "** unknown **";
+      }
+  }
+
+  /* The type of this token.  */
+  const type &get_type () const
+  {
+    return m_type;
+  }
+
+  /* Return the value of this token.  */
+  const std::string_view &get_value () const
+  {
+    gdb_assert (m_content.size () > 0);
+    return m_content;
+  }
+
+  /* Extend this token with the contents of OTHER.  This only makes sense
+     if OTHER is the next token after this one in the original string,
+     however, enforcing that restriction is left to the caller of this
+     function.
+
+     When OTHER is a keyword/value token, e.g. 'thread 1', the m_content
+     for OTHER will only point to the '1'.  However, as the m_content is a
+     std::string_view, then when we merge the m_content of OTHER into this
+     token we automatically merge in the 'thread' part too, as it
+     naturally sits between this token and OTHER.  */
+
+  void
+  extend (const token &other)
+  {
+    m_content = std::string_view (this->m_content.data (),
+				  (other.m_content.data ()
+				   - this->m_content.data ()
+				   + other.m_content.size ()));
+  }
+
+private:
+  /* The type of this token.  */
+  type m_type;
+
+  /* The important content part of this token.  The extend member function
+     depends on this being a std::string_view.  */
+  std::string_view m_content;
+};
+
+/* Split STR, a breakpoint condition string, into a vector of tokens where
+   each token represents a component of the condition.  Tokens are first
+   parsed from the front of STR until we encounter an 'if' token.  At this
+   point tokens are parsed from the end of STR until we encounter an
+   unknown token, which we assume is the other end of the 'if' condition.
+   If when scanning forward we encounter an unknown token then the
+   remainder of STR is placed into a 'rest' token (the rest of the
+   string), and no backward scan is performed.  */
+
+static std::vector<token>
+parse_all_tokens (const char *str)
+{
+  gdb_assert (str != nullptr);
+
+  std::vector<token> forward_results;
+  std::vector<token> backward_results;
+
+  const char *cond_start = nullptr;
+  const char *cond_end = nullptr;
+  parse_direction direction = parse_direction::forward;
+  std::vector<token> *curr_results = &forward_results;
+  while (*str != '\0')
+    {
+      /* Find the next token.  If moving backward and this token starts at
+	 the same location as the condition then we must have found the
+	 other end of the condition string -- we're done.  */
+      std::string_view t = find_next_token (&str, direction);
+      if (direction == parse_direction::backward && t.data () <= cond_start)
+	{
+	  cond_end = &t.back ();
+	  break;
+	}
+
+      /* We only have a single flag option to check for.  All the other
+	 options take a value so require an additional token to be found.
+	 Additionally, we require that this flag be at least '-f', we
+	 don't allow it to be abbreviated to '-'.  */
+      if (t.length () > 1 && startswith ("-force-condition", t))
+	{
+	  curr_results->emplace_back (token::type::FORCE, t);
+	  continue;
+	}
+
+      /* Maybe the first token was the last token in the string.  If this
+	 is the case then we definitely can't try to extract a value
+	 token.  This also means that the token T is meaningless.  Reset
+	 TOK to point at the start of the unknown content and break out of
+	 the loop.  We'll record the unknown part of the string outside of
+	 the scanning loop (below).  */
+      if (direction == parse_direction::forward && *str == '\0')
+	{
+	  str = t.data ();
+	  break;
+	}
+
+      /* As before, find the next token and, if we are scanning backwards,
+	 check that we have not reached the start of the condition string.  */
+      std::string_view v = find_next_token (&str, direction);
+      if (direction == parse_direction::backward && v.data () <= cond_start)
+	{
+	  /* Use token T here as that must also be part of the condition
+	     string.  */
+	  cond_end = &t.back ();
+	  break;
+	}
+
+      /* When moving backward we will first parse the value token then the
+	 keyword token, so swap them now.  */
+      if (direction == parse_direction::backward)
+	std::swap (t, v);
+
+      /* Check for valid option in token T.  If we find a valid option then
+	 parse the value from the token V.  Except for 'if', that's handled
+	 differently.
+
+	 For the 'if' token we need to capture the entire condition
+	 string, so record the start of the condition string and then
+	 start scanning backwards looking for the end of the condition
+	 string.
+
+	 The order of these checks is important, at least the check for
+	 'thread' must occur before the check for 'task'.  We accept
+	 abbreviations of these token names, and 't' should resolve to
+	 'thread', which will only happen if we check 'thread' first.  */
+      if (direction == parse_direction::forward && startswith ("if", t))
+	{
+	  cond_start = v.data ();
+	  str = str + strlen (str);
+	  gdb_assert (*str == '\0');
+	  --str;
+	  direction = parse_direction::backward;
+	  curr_results = &backward_results;
+	  continue;
+	}
+      else if (startswith ("thread", t))
+	curr_results->emplace_back (token::type::THREAD, v);
+      else if (startswith ("inferior", t))
+	curr_results->emplace_back (token::type::INFERIOR, v);
+      else if (startswith ("task", t))
+	curr_results->emplace_back (token::type::TASK, v);
+      else
+	{
+	  /* An unknown token.  If we are scanning forward then reset TOK
+	     to point at the start of the unknown content, we record this
+	     outside of the scanning loop (below).
+
+	     If we are scanning backward then unknown content is assumed to
+	     be the other end of the condition string, obviously, this is
+	     just a heuristic, we could be looking at a mistyped command
+	     line, but this will be spotted when the condition is
+	     eventually evaluated.
+
+	     Either way, no more scanning is required after this.  */
+	  if (direction == parse_direction::forward)
+	    str = t.data ();
+	  else
+	    {
+	      gdb_assert (direction == parse_direction::backward);
+	      cond_end = &v.back ();
+	    }
+	  break;
+	}
+    }
+
+  if (cond_start != nullptr)
+    {
+      /* If we found the start of a condition string then we should have
+	 switched to backward scan mode, and found the end of the condition
+	 string.  Capture the whole condition string into COND_STRING
+	 now.  */
+      gdb_assert (direction == parse_direction::backward);
+      gdb_assert (cond_end != nullptr);
+
+      std::string_view v (cond_start, cond_end - cond_start + 1);
+
+      forward_results.emplace_back (token::type::CONDITION, v);
+    }
+  else if (*str != '\0')
+    {
+      /* If we didn't have a condition start pointer then we should still
+	 be in forward scanning mode.  If we didn't reach the end of the
+	 input string (TOK is not at the null character) then the rest of
+	 the input string is garbage that we didn't understand.
+
+	 Record the unknown content into REST.  The caller of this function
+	 will report this as an error later on.  We could report the error
+	 here, but we prefer to allow the caller to run other checks, and
+	 prioritise other errors before reporting this problem.  */
+      gdb_assert (direction == parse_direction::forward);
+      gdb_assert (cond_end == nullptr);
+
+      std::string_view v (str, strlen (str));
+
+      forward_results.emplace_back (token::type::REST, v);
+    }
+
+  /* If we have tokens in the BACKWARD_RESULTS vector then this means that
+     we found an 'if' condition (which will be the last thing in the
+     FORWARD_RESULTS vector), and then we started a backward scan.
+
+     The last tokens from the input string (those after the 'if' condition)
+     will be the first tokens added to the BACKWARD_RESULTS vector, so the
+     last items in the BACKWARD_RESULTS vector are those next to the 'if'
+     condition.
+
+     Check the tokens in the BACKWARD_RESULTS vector from back to front.
+     If the tokens look invalid then we assume that they are actually part
+     of the 'if' condition, and merge the token with the 'if' condition.
+     If it turns out that this was incorrect and that instead the user just
+     messed up entering the token value, then this will show as an error
+     when parsing the 'if' condition.
+
+     Doing this allows us to handle things like:
+
+       break function if ( variable == thread )
+
+     Where 'thread' is a local variable within 'function'.  When parsing
+     this we will initially see 'thread )' as a thread token with ')' as
+     the value.  However, the following code will spot that ')' is not a
+     valid thread-id, and so we merge 'thread )' into the 'if' condition
+     string.
+
+     This code also handles the special treatment for '-force-condition',
+     which exists for backwards compatibility reasons.  Traditionally this
+     flag, if it occurred immediately after the 'if' condition, would be
+     treated as part of the 'if' condition.  When the breakpoint condition
+     parsing code was rewritten, this behaviour was retained.  */
+  gdb_assert (backward_results.empty ()
+	      || (forward_results.back ().get_type ()
+		  == token::type::CONDITION));
+  while (!backward_results.empty ())
+    {
+      token &t = backward_results.back ();
+
+      if (t.get_type () == token::type::FORCE)
+	forward_results.back ().extend (std::move (t));
+      else if (t.get_type () == token::type::THREAD)
+	{
+	  const char *end;
+	  std::string v (t.get_value ());
+	  if (is_thread_id (v.c_str (), &end) && *end == '\0')
+	    break;
+	  forward_results.back ().extend (std::move (t));
+	}
+      else if (t.get_type () == token::type::INFERIOR
+	       || t.get_type () == token::type::TASK)
+	{
+	  /* Place the token's value into a null-terminated string, parse
+	     the string as a number and check that the entire string was
+	     parsed.  If this is true then this looks like a valid inferior
+	     or task number, otherwise, assume an invalid id, and merge
+	     this token with the 'if' token.  */
+	  char *end;
+	  std::string v (t.get_value ());
+	  (void) strtol (v.c_str (), &end, 0);
+	  if (end > v.c_str () && *end == '\0')
+	    break;
+	  forward_results.back ().extend (std::move (t));
+	}
+      else
+	gdb_assert_not_reached ("unexpected token type");
+
+      /* If we found an actual valid token above then we will have broken
+	 out of the loop.  We only get here if the token was merged with
+	 the 'if' condition, in which case we can discard the last token
+	 and then check the token before that.  */
+      backward_results.pop_back ();
+    }
+
+  /* If after the above checks we still have some tokens in the
+     BACKWARD_RESULTS vector, then these need to be appended to the
+     FORWARD_RESULTS vector.  However, we first reverse the order so that
+     FORWARD_RESULTS retains the tokens in the order they appeared in the
+     input string.  */
+  if (!backward_results.empty ())
+    forward_results.insert (forward_results.end (),
+			    backward_results.rbegin (),
+			    backward_results.rend ());
+
+  return forward_results;
+}
+
+/* Called when the global debug_breakpoint is true.  Prints VEC to the
+   debug output stream.  */
+
+static void
+dump_condition_tokens (const std::vector<token> &vec)
+{
+  gdb_assert (debug_breakpoint);
+
+  bool first = true;
+  std::string str = "Tokens: ";
+  for (const token &t : vec)
+    {
+      if (!first)
+	str += " ";
+      first = false;
+      str += t.to_string ();
+    }
+  breakpoint_debug_printf ("%s", str.c_str ());
+}
+
+/* See break-cond-parse.h.  */
+
+void
+create_breakpoint_parse_arg_string
+  (const char *str, gdb::unique_xmalloc_ptr<char> *cond_string_ptr,
+   int *thread_ptr, int *inferior_ptr, int *task_ptr,
+   gdb::unique_xmalloc_ptr<char> *rest_ptr, bool *force_ptr)
+{
+  /* Set up the defaults.  */
+  cond_string_ptr->reset ();
+  rest_ptr->reset ();
+  *thread_ptr = -1;
+  *inferior_ptr = -1;
+  *task_ptr = -1;
+  *force_ptr = false;
+
+  if (str == nullptr)
+    return;
+
+  /* Split STR into a series of tokens.  */
+  std::vector<token> tokens = parse_all_tokens (str);
+  if (debug_breakpoint)
+    dump_condition_tokens (tokens);
+
+  /* Temporary variables.  Initialised to the default state, then updated
+     as we parse TOKENS.  If all of TOKENS is parsed successfully then the
+     state from these variables is copied into the output arguments before
+     the function returns.  */
+  int thread = -1, inferior = -1, task = -1;
+  bool force = false;
+  gdb::unique_xmalloc_ptr<char> cond_string, rest;
+
+  for (const token &t : tokens)
+    {
+      std::string tok_value (t.get_value ());
+      switch (t.get_type ())
+	{
+	case token::type::FORCE:
+	  force = true;
+	  break;
+	case token::type::THREAD:
+	  {
+	    if (thread != -1)
+	      error ("You can specify only one thread.");
+	    if (task != -1 || inferior != -1)
+	      error ("You can specify only one of thread, inferior, or task.");
+	    const char *tmptok;
+	    thread_info *thr = parse_thread_id (tok_value.c_str (), &tmptok);
+	    gdb_assert (*tmptok == '\0');
+	    thread = thr->global_num;
+	  }
+	  break;
+	case token::type::INFERIOR:
+	  {
+	    if (inferior != -1)
+	      error ("You can specify only one inferior.");
+	    if (task != -1 || thread != -1)
+	      error ("You can specify only one of thread, inferior, or task.");
+	    char *tmptok;
+	    long inferior_id = strtol (tok_value.c_str (), &tmptok, 0);
+	    if (*tmptok != '\0')
+	      error (_("Junk '%s' after inferior keyword."), tmptok);
+	    if (inferior_id > INT_MAX)
+	      error (_("No inferior number '%ld'"), inferior_id);
+	    inferior = static_cast<int> (inferior_id);
+	    struct inferior *inf = find_inferior_id (inferior);
+	    if (inf == nullptr)
+	      error (_("No inferior number '%d'"), inferior);
+	  }
+	  break;
+	case token::type::TASK:
+	  {
+	    if (task != -1)
+	      error ("You can specify only one task.");
+	    if (inferior != -1 || thread != -1)
+	      error ("You can specify only one of thread, inferior, or task.");
+	    char *tmptok;
+	    long task_id = strtol (tok_value.c_str (), &tmptok, 0);
+	    if (*tmptok != '\0')
+	      error (_("Junk '%s' after task keyword."), tmptok);
+	    if (task_id > INT_MAX)
+	      error (_("Unknown task %ld"), task_id);
+	    task = static_cast<int> (task_id);
+	    if (!valid_task_id (task))
+	      error (_("Unknown task %d."), task);
+	  }
+	  break;
+	case token::type::CONDITION:
+	  cond_string.reset (savestring (t.get_value ().data (),
+					 t.get_value ().size ()));
+	  break;
+	case token::type::REST:
+	  rest.reset (savestring (t.get_value ().data (),
+				  t.get_value ().size ()));
+	  break;
+	}
+    }
+
+  /* Move results into the output locations.  */
+  *force_ptr = force;
+  *thread_ptr = thread;
+  *inferior_ptr = inferior;
+  *task_ptr = task;
+  rest_ptr->reset (rest.release ());
+  cond_string_ptr->reset (cond_string.release ());
+}
+
+#if GDB_SELF_TEST
+
+namespace selftests {
+
+/* Run a single test of the create_breakpoint_parse_arg_string function.
+   INPUT is passed to create_breakpoint_parse_arg_string while all other
+   arguments are the expected output from
+   create_breakpoint_parse_arg_string.  */
+
+static void
+test (const char *input, const char *condition, int thread = -1,
+      int inferior = -1, int task = -1, bool force = false,
+      const char *rest = nullptr, const char *error_msg = nullptr)
+{
+  gdb::unique_xmalloc_ptr<char> extracted_condition;
+  gdb::unique_xmalloc_ptr<char> extracted_rest;
+  int extracted_thread, extracted_inferior, extracted_task;
+  bool extracted_force_condition;
+  std::string exception_msg, error_str;
+
+  if (error_msg != nullptr)
+    error_str = std::string (error_msg) + "\n";
+
+  try
+    {
+      create_breakpoint_parse_arg_string (input, &extracted_condition,
+					  &extracted_thread,
+					  &extracted_inferior,
+					  &extracted_task, &extracted_rest,
+					  &extracted_force_condition);
+    }
+  catch (const gdb_exception_error &ex)
+    {
+      string_file buf;
+
+      exception_print (&buf, ex);
+      exception_msg = buf.release ();
+    }
+
+  if ((condition == nullptr) != (extracted_condition.get () == nullptr)
+      || (condition != nullptr
+	  && strcmp (condition, extracted_condition.get ()) != 0)
+      || (rest == nullptr) != (extracted_rest.get () == nullptr)
+      || (rest != nullptr && strcmp (rest, extracted_rest.get ()) != 0)
+      || thread != extracted_thread
+      || inferior != extracted_inferior
+      || task != extracted_task
+      || force != extracted_force_condition
+      || exception_msg != error_str)
+    {
+      if (run_verbose ())
+	{
+	  debug_printf ("input: '%s'\n", input);
+	  debug_printf ("condition: '%s'\n", extracted_condition.get ());
+	  debug_printf ("rest: '%s'\n", extracted_rest.get ());
+	  debug_printf ("thread: %d\n", extracted_thread);
+	  debug_printf ("inferior: %d\n", extracted_inferior);
+	  debug_printf ("task: %d\n", extracted_task);
+	  debug_printf ("forced: %s\n",
+			extracted_force_condition ? "true" : "false");
+	  debug_printf ("exception: '%s'\n", exception_msg.c_str ());
+	}
+
+      /* Report the failure.  */
+      SELF_CHECK (false);
+    }
+}
+
+/* Wrapper for test function.  Pass through the default values for all
+   parameters, except the last parameter, which indicates that we expect
+   INPUT to trigger an error.  */
+
+static void
+test_error (const char *input, const char *error_msg)
+{
+  test (input, nullptr, -1, -1, -1, false, nullptr, error_msg);
+}
+
+/* Test the create_breakpoint_parse_arg_string function.  Just wraps
+   multiple calls to the test function above.  */
+
+static void
+create_breakpoint_parse_arg_string_tests ()
+{
+  gdbarch *arch = current_inferior ()->arch ();
+  scoped_restore_current_pspace_and_thread restore;
+  scoped_mock_context<test_target_ops> mock_target (arch);
+
+  int global_thread_num = mock_target.mock_thread.global_num;
+
+  /* Test parsing valid breakpoint condition strings.  */
+  test ("  if blah  ", "blah");
+  test (" if blah thread 1", "blah", global_thread_num);
+  test (" if blah inferior 1", "blah", -1, 1);
+  test (" if blah thread 1  ", "blah", global_thread_num);
+  test ("thread 1 woof", nullptr, global_thread_num, -1, -1, false, "woof");
+  test ("thread 1 X", nullptr, global_thread_num, -1, -1, false, "X");
+  test (" if blah thread 1 -force-condition", "blah", global_thread_num,
+	-1, -1, true);
+  test (" -force-condition if blah thread 1", "blah", global_thread_num,
+	-1, -1, true);
+  test (" -force-condition if blah thread 1  ", "blah", global_thread_num,
+	-1, -1, true);
+  test ("thread 1 -force-condition if blah", "blah", global_thread_num,
+	-1, -1, true);
+  test ("if (A::outer::func ())", "(A::outer::func ())");
+  test ("if ( foo == thread )", "( foo == thread )");
+  test ("if ( foo == thread ) inferior 1", "( foo == thread )", -1, 1);
+  test ("if ( foo == thread ) thread 1", "( foo == thread )",
+	global_thread_num);
+  test ("if foo == thread", "foo == thread");
+  test ("if foo == thread 1", "foo ==", global_thread_num);
+
+  /* Test parsing some invalid breakpoint condition strings.  */
+  test_error ("thread 1 if foo == 123 thread 1",
+	      "You can specify only one thread.");
+  test_error ("thread 1 if foo == 123 inferior 1",
+	      "You can specify only one of thread, inferior, or task.");
+  test_error ("thread 1 if foo == 123 task 1",
+	      "You can specify only one of thread, inferior, or task.");
+  test_error ("inferior 1 if foo == 123 inferior 1",
+	      "You can specify only one inferior.");
+  test_error ("inferior 1 if foo == 123 thread 1",
+	      "You can specify only one of thread, inferior, or task.");
+  test_error ("inferior 1 if foo == 123 task 1",
+	      "You can specify only one of thread, inferior, or task.");
+  test_error ("thread 1.2.3", "Invalid thread ID: 1.2.3");
+  test_error ("thread 1/2", "Invalid thread ID: 1/2");
+  test_error ("thread 1xxx", "Invalid thread ID: 1xxx");
+  test_error ("inferior 1xxx", "Junk 'xxx' after inferior keyword.");
+  test_error ("task 1xxx", "Junk 'xxx' after task keyword.");
+}
+
+} // namespace selftests
+#endif /* GDB_SELF_TEST */
+
+void _initialize_break_cond_parse ();
+void
+_initialize_break_cond_parse ()
+{
+#if GDB_SELF_TEST
+  selftests::register_test
+    ("create_breakpoint_parse_arg_string",
+     selftests::create_breakpoint_parse_arg_string_tests);
+#endif
+}
diff --git a/gdb/break-cond-parse.h b/gdb/break-cond-parse.h
new file mode 100644
index 0000000..cbee70f
--- /dev/null
+++ b/gdb/break-cond-parse.h
@@ -0,0 +1,52 @@
+/* Copyright (C) 2023 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
+
+#if !defined (BREAK_COND_PARSE_H)
+#define BREAK_COND_PARSE_H 1
+
+/* Given TOK, a string possibly containing a condition, thread, inferior,
+   task and force-condition flag, as accepted by the 'break' command,
+   extract the condition string, thread, inferior, task number, and the
+   force_condition flag, then set *COND_STRING, *THREAD, *INFERIOR, *TASK,
+   and *FORCE.
+
+   As TOK is parsed, if an unknown keyword is encountered before the 'if'
+   keyword then everything starting from the unknown keyword is placed into
+   *REST.
+
+   Both *COND and *REST are initialized to nullptr.  If no 'if' keyword is
+   found then *COND will be returned as nullptr.  If no unknown content is
+   found then *REST is returned as nullptr.
+
+   If no thread is found, *THREAD is set to -1.  If no inferior is found,
+   *INFERIOR is set to -1.  If no task is found, *TASK is set to -1.  If
+   the -force-condition flag is not found then *FORCE is set to false.
+
+   Due to the free-form nature that the string TOK might take (a 'thread'
+   keyword can appear before or after an 'if' condition) then we end up
+   having to check for keywords from both the start of TOK and the end of
+   TOK.
+
+   If TOK is nullptr, or TOK is the empty string, then the output variables
+   are all given their default values.  */
+
+extern void create_breakpoint_parse_arg_string
+  (const char *tok, gdb::unique_xmalloc_ptr<char> *cond_string,
+   int *thread, int *inferior, int *task,
+   gdb::unique_xmalloc_ptr<char> *rest, bool *force);
+
+#endif
diff --git a/gdb/breakpoint.c b/gdb/breakpoint.c
index 670a3f7..4cf6857 100644
--- a/gdb/breakpoint.c
+++ b/gdb/breakpoint.c
@@ -70,6 +70,7 @@
 #include "cli/cli-style.h"
 #include "cli/cli-decode.h"
 #include <unordered_set>
+#include "break-cond-parse.h"
 
 /* readline include files */
 #include "readline/tilde.h"
@@ -90,9 +91,12 @@
 static void map_breakpoint_numbers (const char *,
 				    gdb::function_view<void (breakpoint *)>);
 
-static void
-  create_sals_from_location_spec_default (location_spec *locspec,
-					  linespec_result *canonical);
+static void parse_breakpoint_sals (location_spec *locspec,
+				   linespec_result *canonical,
+				   program_space *search_pspace);
+
+static void breakpoint_re_set_one (breakpoint *b,
+				   program_space *filter_pspace);
 
 static void create_breakpoints_sal (struct gdbarch *,
 				    struct linespec_result *,
@@ -282,11 +286,12 @@ static bool strace_marker_p (struct breakpoint *b);
 
 static void bkpt_probe_create_sals_from_location_spec
      (location_spec *locspec,
-      struct linespec_result *canonical);
+      struct linespec_result *canonical,
+      struct program_space *search_pspace);
 
 const struct breakpoint_ops code_breakpoint_ops =
 {
-  create_sals_from_location_spec_default,
+  parse_breakpoint_sals,
   create_breakpoints_sal,
 };
 
@@ -351,7 +356,7 @@ struct internal_breakpoint : public code_breakpoint
     disposition = disp_donttouch;
   }
 
-  void re_set () override;
+  void re_set (program_space *pspace) override;
   void check_status (struct bpstat *bs) override;
   enum print_stop_action print_it (const bpstat *bs) const override;
   void print_mention () const override;
@@ -388,7 +393,7 @@ struct momentary_breakpoint : public code_breakpoint
     gdb_assert (inferior == -1);
   }
 
-  void re_set () override;
+  void re_set (program_space *pspace) override;
   void check_status (struct bpstat *bs) override;
   enum print_stop_action print_it (const bpstat *bs) const override;
   void print_mention () const override;
@@ -399,7 +404,7 @@ struct dprintf_breakpoint : public ordinary_breakpoint
 {
   using ordinary_breakpoint::ordinary_breakpoint;
 
-  void re_set () override;
+  void re_set (program_space *pspace) override;
   int breakpoint_hit (const struct bp_location *bl,
 		      const address_space *aspace,
 		      CORE_ADDR bp_addr,
@@ -574,13 +579,8 @@ show_always_inserted_mode (struct ui_file *file, int from_tty,
 	      value);
 }
 
-/* True if breakpoint debug output is enabled.  */
-static bool debug_breakpoint = false;
-
-/* Print a "breakpoint" debug statement.  */
-#define breakpoint_debug_printf(fmt, ...) \
-  debug_prefixed_printf_cond (debug_breakpoint, "breakpoint", fmt, \
-			      ##__VA_ARGS__)
+/* See breakpoint.h.  */
+bool debug_breakpoint = false;
 
 /* "show debug breakpoint" implementation.  */
 static void
@@ -1553,7 +1553,46 @@ breakpoint_set_thread (struct breakpoint *b, int thread)
   int old_thread = b->thread;
   b->thread = thread;
   if (old_thread != thread)
-    notify_breakpoint_modified (b);
+    {
+      /* If THREAD is in a different program_space than OLD_THREAD, or the
+	 breakpoint has switched to or from being thread-specific, then we
+	 need to re-set the locations of this breakpoint.  First, figure
+	 out the program_space for the old and new threads, use a value of
+	 nullptr to indicate the breakpoint is in all program spaces.  */
+      program_space *old_pspace = nullptr;
+      if (old_thread != -1)
+	{
+	  struct thread_info *thr = find_thread_global_id (old_thread);
+	  gdb_assert (thr != nullptr);
+	  old_pspace = thr->inf->pspace;
+	}
+
+      program_space *new_pspace = nullptr;
+      if (thread != -1)
+	{
+	  struct thread_info *thr = find_thread_global_id (thread);
+	  gdb_assert (thr != nullptr);
+	  new_pspace = thr->inf->pspace;
+	}
+
+      /* If the program space has changed for this breakpoint, then
+	 re-evaluate it's locations.  */
+      if (old_pspace != new_pspace)
+	{
+	  /* The breakpoint is now associated with a completely different
+	     program space.  Discard all of the current locations and then
+	     re-set the breakpoint in the new program space, this will
+	     create the new locations.  */
+	  b->clear_locations ();
+	  breakpoint_re_set_one (b, new_pspace);
+	}
+
+      /* If the program space didn't change, or the breakpoint didn't
+	 acquire any new locations after the clear_locations call, then we
+	 need to notify of the breakpoint modification now.  */
+      if (old_pspace == new_pspace || !b->has_locations ())
+	notify_breakpoint_modified (b);
+    }
 }
 
 /* See breakpoint.h.  */
@@ -1572,7 +1611,45 @@ breakpoint_set_inferior (struct breakpoint *b, int inferior)
   int old_inferior = b->inferior;
   b->inferior = inferior;
   if (old_inferior != inferior)
-    notify_breakpoint_modified (b);
+    {
+      /* If INFERIOR is in a different program_space than OLD_INFERIOR, or
+	 the breakpoint has switch to or from inferior-specific, then we
+	 need to re-set the locations of this breakpoint.  First, figure
+	 out the program_space for the old and new inferiors, use a value
+	 of nullptr to indicate the breakpoint is in all program
+	 spaces.  */
+      program_space *old_pspace = nullptr;
+      if (old_inferior != -1)
+	{
+	  struct inferior *inf = find_inferior_id (old_inferior);
+	  gdb_assert (inf != nullptr);
+	  old_pspace = inf->pspace;
+	}
+
+      program_space *new_pspace = nullptr;
+      if (inferior != -1)
+	{
+	  struct inferior *inf = find_inferior_id (inferior);
+	  gdb_assert (inf != nullptr);
+	  new_pspace = inf->pspace;
+	}
+
+      if (old_pspace != new_pspace)
+	{
+	  /* The breakpoint is now associated with a completely different
+	     program space.  Discard all of the current locations and then
+	     re-set the breakpoint in the new program space, this will
+	     create the new locations.  */
+	  b->clear_locations ();
+	  breakpoint_re_set_one (b, new_pspace);
+	}
+
+      /* If the program space didn't change, or the breakpoint didn't
+	 acquire any new locations after the clear_locations call, then we
+	 need to notify of the breakpoint modification now.  */
+      if (old_pspace == new_pspace || !b->has_locations ())
+	notify_breakpoint_modified (b);
+    }
 }
 
 /* See breakpoint.h.  */
@@ -3466,7 +3543,7 @@ create_internal_breakpoint (struct gdbarch *gdbarch,
 
 static struct breakpoint *
 create_internal_breakpoint (struct gdbarch *gdbarch,
-			    struct bound_minimal_symbol &msym, enum bptype type)
+			    bound_minimal_symbol &msym, enum bptype type)
 {
   CORE_ADDR address;
 
@@ -3498,10 +3575,10 @@ static const char *const longjmp_names[] =
 struct breakpoint_objfile_data
 {
   /* Minimal symbol for "_ovly_debug_event" (if any).  */
-  struct bound_minimal_symbol overlay_msym;
+  bound_minimal_symbol overlay_msym;
 
   /* Minimal symbol(s) for "longjmp", "siglongjmp", etc. (if any).  */
-  struct bound_minimal_symbol longjmp_msym[NUM_LONGJMP_NAMES];
+  bound_minimal_symbol longjmp_msym[NUM_LONGJMP_NAMES];
 
   /* True if we have looked for longjmp probes.  */
   int longjmp_searched = 0;
@@ -3511,10 +3588,10 @@ struct breakpoint_objfile_data
   std::vector<probe *> longjmp_probes;
 
   /* Minimal symbol for "std::terminate()" (if any).  */
-  struct bound_minimal_symbol terminate_msym;
+  bound_minimal_symbol terminate_msym;
 
   /* Minimal symbol for "_Unwind_DebugHook" (if any).  */
-  struct bound_minimal_symbol exception_msym;
+  bound_minimal_symbol exception_msym;
 
   /* True if we have looked for exception probes.  */
   int exception_searched = 0;
@@ -3570,9 +3647,9 @@ create_overlay_event_breakpoint (void)
 
       if (bp_objfile_data->overlay_msym.minsym == NULL)
 	{
-	  struct bound_minimal_symbol m;
-
-	  m = lookup_minimal_symbol_text (func_name, objfile);
+	  bound_minimal_symbol m
+	    = lookup_minimal_symbol_text (current_program_space, func_name,
+					  objfile);
 	  if (m.minsym == NULL)
 	    {
 	      /* Avoid future lookups in this objfile.  */
@@ -3675,9 +3752,9 @@ create_longjmp_master_breakpoint_names (objfile *objfile)
       func_name = longjmp_names[i];
       if (bp_objfile_data->longjmp_msym[i].minsym == NULL)
 	{
-	  struct bound_minimal_symbol m;
-
-	  m = lookup_minimal_symbol_text (func_name, objfile);
+	  bound_minimal_symbol m
+	    = lookup_minimal_symbol_text (objfile->pspace (), func_name,
+					  objfile);
 	  if (m.minsym == NULL)
 	    {
 	      /* Prevent future lookups in this objfile.  */
@@ -3734,8 +3811,7 @@ create_std_terminate_master_breakpoint (void)
   const char *const func_name = "std::terminate()";
 
   scoped_restore_current_program_space restore_pspace;
-  scoped_restore_current_language save_language;
-  set_language (language_cplus);
+  scoped_restore_current_language save_language (language_cplus);
 
   for (struct program_space *pspace : program_spaces)
     {
@@ -3753,9 +3829,9 @@ create_std_terminate_master_breakpoint (void)
 
 	  if (bp_objfile_data->terminate_msym.minsym == NULL)
 	    {
-	      struct bound_minimal_symbol m;
-
-	      m = lookup_minimal_symbol (func_name, NULL, objfile);
+	      bound_minimal_symbol m
+		= lookup_minimal_symbol (current_program_space, func_name,
+					 objfile);
 	      if (m.minsym == NULL || (m.minsym->type () != mst_text
 				       && m.minsym->type () != mst_file_text))
 		{
@@ -3846,9 +3922,8 @@ create_exception_master_breakpoint_hook (objfile *objfile)
 
   if (bp_objfile_data->exception_msym.minsym == NULL)
     {
-      struct bound_minimal_symbol debug_hook;
-
-      debug_hook = lookup_minimal_symbol_text (func_name, objfile);
+      bound_minimal_symbol debug_hook
+	= lookup_minimal_symbol_text (objfile->pspace (), func_name, objfile);
       if (debug_hook.minsym == NULL)
 	{
 	  bp_objfile_data->exception_msym.minsym = &msym_not_found;
@@ -6317,7 +6392,8 @@ print_breakpoint_location (const breakpoint *b, const bp_location *loc)
       if (uiout->is_mi_like_p ())
 	uiout->field_string ("fullname", symtab_to_fullname (loc->symtab));
       
-      uiout->field_signed ("line", loc->line_number);
+      uiout->field_signed ("line", loc->line_number,
+			   line_number_style.style ());
     }
   else if (loc)
     {
@@ -6328,20 +6404,7 @@ print_breakpoint_location (const breakpoint *b, const bp_location *loc)
       uiout->field_stream ("at", stb);
     }
   else
-    {
-      uiout->field_string ("pending", b->locspec->to_string ());
-      /* If extra_string is available, it could be holding a condition
-	 or dprintf arguments.  In either case, make sure it is printed,
-	 too, but only for non-MI streams.  */
-      if (!uiout->is_mi_like_p () && b->extra_string != NULL)
-	{
-	  if (b->type == bp_dprintf)
-	    uiout->text (",");
-	  else
-	    uiout->text (" ");
-	  uiout->text (b->extra_string.get ());
-	}
-    }
+    uiout->field_string ("pending", b->locspec->to_string ());
 
   if (loc && is_breakpoint (b)
       && breakpoint_condition_evaluation_mode () == condition_evaluation_target
@@ -8093,10 +8156,6 @@ disable_breakpoints_in_freed_objfile (struct objfile *objfile)
 	  if (objfile->pspace () != loc.pspace)
 	    continue;
 
-	  if (loc.loc_type != bp_loc_hardware_breakpoint
-	      && loc.loc_type != bp_loc_software_breakpoint)
-	    continue;
-
 	  if (is_addr_in_objfile (loc_addr, objfile))
 	    {
 	      loc.shlib_disabled = 1;
@@ -8144,6 +8203,65 @@ catchpoint::catchpoint (struct gdbarch *gdbarch, bool temp,
   pspace = current_program_space;
 }
 
+/* See breakpoint.h.  */
+
+void
+catchpoint::re_set (program_space *filter_pspace)
+{
+  /* All catchpoints are associated with a specific program_space.  */
+  gdb_assert (pspace != nullptr);
+
+  /* If only a single program space changed, and it's not the program space
+     for which this catchpoint applies, then there's nothing to do.  */
+  if (filter_pspace != nullptr && filter_pspace != pspace)
+    return;
+
+  /* Catchpoints have a single dummy location.  */
+  gdb_assert (locations ().size () == 1);
+  bp_location &bl = m_locations.front ();
+
+  if (cond_string == nullptr)
+    {
+      /* It shouldn't be possible to have a parsed condition expression
+	 cached on this location if the catchpoint doesn't have a condition
+	 string set.  */
+      gdb_assert (bl.cond == nullptr);
+
+      /* Nothing to re-compute, and the catchpoint cannot change.  */
+      return;
+    }
+
+  bool previous_disabled_by_cond = bl.disabled_by_cond;
+
+  /* Start by marking the location disabled and discarding the previously
+     computed condition expression.  Now if we get an exception, even if
+     it's a quit exception, we'll leave the location disabled and there
+     will be no (possibly invalid) expression cached.  */
+  bl.disabled_by_cond = true;
+  bl.cond = nullptr;
+
+  const char *s = cond_string.get ();
+  try
+    {
+      switch_to_program_space_and_thread (pspace);
+
+      bl.cond = parse_exp_1 (&s, bl.address, block_for_pc (bl.address),
+			     nullptr);
+      bl.disabled_by_cond = false;
+    }
+  catch (const gdb_exception_error &e)
+    {
+      /* Any exception thrown must be from either the parse_exp_1 or
+	 earlier in the try block.  As such the following two asserts
+	 should be true.  */
+      gdb_assert (bl.disabled_by_cond);
+      gdb_assert (bl.cond == nullptr);
+    }
+
+  if (previous_disabled_by_cond != bl.disabled_by_cond)
+    notify_breakpoint_modified (this);
+}
+
 /* Notify interpreters and observers that breakpoint B was created.  */
 
 static void
@@ -8706,8 +8824,8 @@ code_breakpoint::code_breakpoint (struct gdbarch *gdbarch_,
      command line, otherwise it's an error.  */
   if (type == bp_dprintf)
     update_dprintf_command_list (this);
-  else if (extra_string != nullptr)
-    error (_("Garbage '%s' at end of command"), extra_string.get ());
+  else
+    gdb_assert (extra_string == nullptr);
 
   /* The order of the locations is now stable.  Set the location
      condition using the location's number.  */
@@ -8821,7 +8939,8 @@ create_breakpoints_sal (struct gdbarch *gdbarch,
 
 static void
 parse_breakpoint_sals (location_spec *locspec,
-		       struct linespec_result *canonical)
+		       struct linespec_result *canonical,
+		       struct program_space *search_pspace)
 {
   if (locspec->type () == LINESPEC_LOCATION_SPEC)
     {
@@ -8885,7 +9004,7 @@ parse_breakpoint_sals (location_spec *locspec,
 	      && strchr ("+-", spec[0]) != NULL
 	      && spec[1] != '['))
 	{
-	  decode_line_full (locspec, DECODE_LINE_FUNFIRSTLINE, NULL,
+	  decode_line_full (locspec, DECODE_LINE_FUNFIRSTLINE, search_pspace,
 			    get_last_displayed_symtab (),
 			    get_last_displayed_line (),
 			    canonical, NULL, NULL);
@@ -8893,7 +9012,7 @@ parse_breakpoint_sals (location_spec *locspec,
 	}
     }
 
-  decode_line_full (locspec, DECODE_LINE_FUNFIRSTLINE, NULL,
+  decode_line_full (locspec, DECODE_LINE_FUNFIRSTLINE, search_pspace,
 		    cursal.symtab, cursal.line, canonical, NULL, NULL);
 }
 
@@ -8935,197 +9054,6 @@ check_fast_tracepoint_sals (struct gdbarch *gdbarch,
     }
 }
 
-/* Given TOK, a string specification of condition and thread, as accepted
-   by the 'break' command, extract the condition string into *COND_STRING.
-   If no condition string is found then *COND_STRING is set to nullptr.
-
-   If the breakpoint specification has an associated thread, task, or
-   inferior, these are extracted into *THREAD, *TASK, and *INFERIOR
-   respectively, otherwise these arguments are set to -1 (for THREAD and
-   INFERIOR) or 0 (for TASK).
-
-   PC identifies the context at which the condition should be parsed.  */
-
-static void
-find_condition_and_thread (const char *tok, CORE_ADDR pc,
-			   gdb::unique_xmalloc_ptr<char> *cond_string,
-			   int *thread, int *inferior, int *task,
-			   gdb::unique_xmalloc_ptr<char> *rest)
-{
-  cond_string->reset ();
-  *thread = -1;
-  *inferior = -1;
-  *task = -1;
-  rest->reset ();
-  bool force = false;
-
-  while (tok && *tok)
-    {
-      const char *end_tok;
-      int toklen;
-      const char *cond_start = NULL;
-      const char *cond_end = NULL;
-
-      tok = skip_spaces (tok);
-
-      if ((*tok == '"' || *tok == ',') && rest)
-	{
-	  rest->reset (savestring (tok, strlen (tok)));
-	  break;
-	}
-
-      end_tok = skip_to_space (tok);
-
-      toklen = end_tok - tok;
-
-      if (toklen >= 1 && strncmp (tok, "if", toklen) == 0)
-	{
-	  tok = cond_start = end_tok + 1;
-	  try
-	    {
-	      parse_exp_1 (&tok, pc, block_for_pc (pc), 0);
-	    }
-	  catch (const gdb_exception_error &)
-	    {
-	      if (!force)
-		throw;
-	      else
-		tok = tok + strlen (tok);
-	    }
-	  cond_end = tok;
-	  cond_string->reset (savestring (cond_start, cond_end - cond_start));
-	}
-      else if (toklen >= 1 && strncmp (tok, "-force-condition", toklen) == 0)
-	{
-	  tok = tok + toklen;
-	  force = true;
-	}
-      else if (toklen >= 1 && strncmp (tok, "thread", toklen) == 0)
-	{
-	  const char *tmptok;
-	  struct thread_info *thr;
-
-	  if (*thread != -1)
-	    error(_("You can specify only one thread."));
-
-	  if (*task != -1)
-	    error (_("You can specify only one of thread or task."));
-
-	  if (*inferior != -1)
-	    error (_("You can specify only one of inferior or thread."));
-
-	  tok = end_tok + 1;
-	  thr = parse_thread_id (tok, &tmptok);
-	  if (tok == tmptok)
-	    error (_("Junk after thread keyword."));
-	  *thread = thr->global_num;
-	  tok = tmptok;
-	}
-      else if (toklen >= 1 && strncmp (tok, "inferior", toklen) == 0)
-	{
-	  if (*inferior != -1)
-	    error(_("You can specify only one inferior."));
-
-	  if (*task != -1)
-	    error (_("You can specify only one of inferior or task."));
-
-	  if (*thread != -1)
-	    error (_("You can specify only one of inferior or thread."));
-
-	  char *tmptok;
-	  tok = end_tok + 1;
-	  *inferior = strtol (tok, &tmptok, 0);
-	  if (tok == tmptok)
-	    error (_("Junk after inferior keyword."));
-	  if (!valid_global_inferior_id (*inferior))
-	    error (_("Unknown inferior number %d."), *inferior);
-	  tok = tmptok;
-	}
-      else if (toklen >= 1 && strncmp (tok, "task", toklen) == 0)
-	{
-	  char *tmptok;
-
-	  if (*task != -1)
-	    error(_("You can specify only one task."));
-
-	  if (*thread != -1)
-	    error (_("You can specify only one of thread or task."));
-
-	  if (*inferior != -1)
-	    error (_("You can specify only one of inferior or task."));
-
-	  tok = end_tok + 1;
-	  *task = strtol (tok, &tmptok, 0);
-	  if (tok == tmptok)
-	    error (_("Junk after task keyword."));
-	  if (!valid_task_id (*task))
-	    error (_("Unknown task %d."), *task);
-	  tok = tmptok;
-	}
-      else if (rest)
-	{
-	  rest->reset (savestring (tok, strlen (tok)));
-	  break;
-	}
-      else
-	error (_("Junk at end of arguments."));
-    }
-}
-
-/* Call 'find_condition_and_thread' for each sal in SALS until a parse
-   succeeds.  The parsed values are written to COND_STRING, THREAD,
-   TASK, and REST.  See the comment of 'find_condition_and_thread'
-   for the description of these parameters and INPUT.  */
-
-static void
-find_condition_and_thread_for_sals (const std::vector<symtab_and_line> &sals,
-				    const char *input,
-				    gdb::unique_xmalloc_ptr<char> *cond_string,
-				    int *thread, int *inferior, int *task,
-				    gdb::unique_xmalloc_ptr<char> *rest)
-{
-  int num_failures = 0;
-  for (auto &sal : sals)
-    {
-      gdb::unique_xmalloc_ptr<char> cond;
-      int thread_id = -1;
-      int inferior_id = -1;
-      int task_id = -1;
-      gdb::unique_xmalloc_ptr<char> remaining;
-
-      /* Here we want to parse 'arg' to separate condition from thread
-	 number.  But because parsing happens in a context and the
-	 contexts of sals might be different, try each until there is
-	 success.  Finding one successful parse is sufficient for our
-	 goal.  When setting the breakpoint we'll re-parse the
-	 condition in the context of each sal.  */
-      try
-	{
-	  find_condition_and_thread (input, sal.pc, &cond, &thread_id,
-				     &inferior_id, &task_id, &remaining);
-	  *cond_string = std::move (cond);
-	  /* A value of -1 indicates that these fields are unset.  At most
-	     one of these fields should be set (to a value other than -1)
-	     at this point.  */
-	  gdb_assert (((thread_id == -1 ? 1 : 0)
-		       + (task_id == -1 ? 1 : 0)
-		       + (inferior_id == -1 ? 1 : 0)) >= 2);
-	  *thread = thread_id;
-	  *inferior = inferior_id;
-	  *task = task_id;
-	  *rest = std::move (remaining);
-	  break;
-	}
-      catch (const gdb_exception_error &e)
-	{
-	  num_failures++;
-	  /* If no sal remains, do not continue.  */
-	  if (num_failures == sals.size ())
-	    throw;
-	}
-    }
-}
-
 /* Decode a static tracepoint marker spec.  */
 
 static std::vector<symtab_and_line>
@@ -9183,6 +9111,39 @@ breakpoint_ops_for_location_spec_type (enum location_spec_type locspec_type,
     }
 }
 
+/* Return the program space to use as a filter when searching for locations
+   of a breakpoint specific to THREAD or INFERIOR.  If THREAD and INFERIOR
+   are both -1, meaning all threads/inferiors, then this function returns
+   nullptr, indicating no program space filtering should be performed.
+   Otherwise, this function returns the program space for the inferior that
+   contains THREAD (when THREAD is not -1), or the program space for
+   INFERIOR (when INFERIOR is not -1).  */
+
+static struct program_space *
+find_program_space_for_breakpoint (int thread, int inferior)
+{
+  if (thread != -1)
+    {
+      gdb_assert (inferior == -1);
+
+      struct thread_info *thr = find_thread_global_id (thread);
+      gdb_assert (thr != nullptr);
+      gdb_assert (thr->inf != nullptr);
+      return thr->inf->pspace;
+    }
+  else if (inferior != -1)
+    {
+      gdb_assert (thread == -1);
+
+      struct inferior *inf = find_inferior_id (inferior);
+      gdb_assert (inf != nullptr);
+
+      return inf->pspace;
+    }
+
+  return nullptr;
+}
+
 /* See breakpoint.h.  */
 
 const struct breakpoint_ops *
@@ -9242,9 +9203,52 @@ create_breakpoint (struct gdbarch *gdbarch,
 	      ? (extra_string != nullptr && !parse_extra)
 	      : (extra_string == nullptr || parse_extra));
 
+  /* Will hold either copies of the similarly named function argument, or
+     will hold a modified version of the function argument, depending on
+     the value of PARSE_EXTRA.  */
+  gdb::unique_xmalloc_ptr<char> cond_string_copy;
+  gdb::unique_xmalloc_ptr<char> extra_string_copy;
+
+  if (parse_extra)
+    {
+      /* Parse EXTRA_STRING splitting the parts out.  */
+      create_breakpoint_parse_arg_string (extra_string, &cond_string_copy,
+					  &thread, &inferior, &task,
+					  &extra_string_copy,
+					  &force_condition);
+
+      /* We could check that EXTRA_STRING_COPY is empty at this point -- it
+	 should be, as we only get here for things that are not bp_dprintf,
+	 however, we prefer to give the location spec parser a chance to
+	 run first, this means the user will get errors about invalid
+	 location spec instead of an error about garbage at the end of the
+	 command line.
+
+	 We still do the EXTRA_STRING_COPY is empty check, just later in
+	 this function.  */
+
+      gdb_assert (thread == -1 || thread > 0);
+      gdb_assert (task == -1 || task > 0);
+      gdb_assert (inferior == -1 || inferior > 0);
+    }
+  else
+    {
+      if (cond_string != nullptr)
+	cond_string_copy.reset (xstrdup (cond_string));
+      if (extra_string != nullptr)
+	extra_string_copy.reset (xstrdup (extra_string));
+    }
+
+  /* Clear these.  Updated values are now held in the *_copy locals.  */
+  cond_string = nullptr;
+  extra_string = nullptr;
+
   try
     {
-      ops->create_sals_from_location_spec (locspec, &canonical);
+      struct program_space *search_pspace
+	= find_program_space_for_breakpoint (thread, inferior);
+      ops->create_sals_from_location_spec (locspec, &canonical,
+					   search_pspace);
     }
   catch (const gdb_exception_error &e)
     {
@@ -9277,6 +9281,13 @@ create_breakpoint (struct gdbarch *gdbarch,
 	throw;
     }
 
+  /* Only bp_dprintf breakpoints should have anything in EXTRA_STRING_COPY
+     by this point.  For all other breakpoints this indicates an error.  We
+     could place this check earlier in the function, but we prefer to see
+     errors from the location spec parser before we see this error message.  */
+  if (type_wanted != bp_dprintf && extra_string_copy.get () != nullptr)
+    error (_("Garbage '%s' at end of command"), extra_string_copy.get ());
+
   if (!pending && canonical.lsals.empty ())
     return 0;
 
@@ -9300,63 +9311,31 @@ create_breakpoint (struct gdbarch *gdbarch,
      breakpoint.  */
   if (!pending)
     {
-      gdb::unique_xmalloc_ptr<char> cond_string_copy;
-      gdb::unique_xmalloc_ptr<char> extra_string_copy;
-
-      if (parse_extra)
+      /* Check the validity of the condition.  We should error out if the
+	 condition is invalid at all of the locations and if it is not
+	 forced.  In the PARSE_EXTRA case above, this check is done when
+	 parsing the EXTRA_STRING.  */
+      if (cond_string_copy.get () != nullptr && !force_condition)
 	{
-	  gdb_assert (type_wanted != bp_dprintf);
-
-	  gdb::unique_xmalloc_ptr<char> rest;
-	  gdb::unique_xmalloc_ptr<char> cond;
-
+	  int num_failures = 0;
 	  const linespec_sals &lsal = canonical.lsals[0];
-
-	  find_condition_and_thread_for_sals (lsal.sals, extra_string,
-					      &cond, &thread, &inferior,
-					      &task, &rest);
-
-	  if (rest.get () != nullptr && *(rest.get ()) != '\0')
-	    error (_("Garbage '%s' at end of command"), rest.get ());
-
-	  cond_string_copy = std::move (cond);
-	  extra_string_copy = std::move (rest);
-	}
-      else
-	{
-	  /* Check the validity of the condition.  We should error out
-	     if the condition is invalid at all of the locations and
-	     if it is not forced.  In the PARSE_EXTRA case above, this
-	     check is done when parsing the EXTRA_STRING.  */
-	  if (cond_string != nullptr && !force_condition)
+	  for (const auto &sal : lsal.sals)
 	    {
-	      int num_failures = 0;
-	      const linespec_sals &lsal = canonical.lsals[0];
-	      for (const auto &sal : lsal.sals)
+	      const char *cond = cond_string_copy.get ();
+	      try
 		{
-		  const char *cond = cond_string;
-		  try
-		    {
-		      parse_exp_1 (&cond, sal.pc, block_for_pc (sal.pc), 0);
-		      /* One success is sufficient to keep going.  */
-		      break;
-		    }
-		  catch (const gdb_exception_error &)
-		    {
-		      num_failures++;
-		      /* If this is the last sal, error out.  */
-		      if (num_failures == lsal.sals.size ())
-			throw;
-		    }
+		  parse_exp_1 (&cond, sal.pc, block_for_pc (sal.pc), 0);
+		  /* One success is sufficient to keep going.  */
+		  break;
+		}
+	      catch (const gdb_exception_error &)
+		{
+		  num_failures++;
+		  /* If this is the last sal, error out.  */
+		  if (num_failures == lsal.sals.size ())
+		    throw;
 		}
 	    }
-
-	  /* Create a private copy of condition string.  */
-	  if (cond_string)
-	    cond_string_copy.reset (xstrdup (cond_string));
-	  /* Create a private copy of any extra string.  */
-	  if (extra_string)
-	    extra_string_copy.reset (xstrdup (extra_string));
 	}
 
       ops->create_breakpoints_sal (gdbarch, &canonical,
@@ -9373,32 +9352,27 @@ create_breakpoint (struct gdbarch *gdbarch,
 								 type_wanted);
       b->locspec = locspec->clone ();
 
-      if (parse_extra)
-	b->cond_string = NULL;
-      else
-	{
-	  /* Create a private copy of condition string.  */
-	  b->cond_string.reset (cond_string != NULL
-				? xstrdup (cond_string)
-				: NULL);
-	  b->thread = thread;
-	}
+      /* Create a private copy of the condition string.  */
+      b->cond_string = std::move (cond_string_copy);
+
+      b->thread = thread;
+      b->task = task;
+      b->inferior = inferior;
 
       /* Create a private copy of any extra string.  */
-      b->extra_string.reset (extra_string != NULL
-			     ? xstrdup (extra_string)
-			     : NULL);
+      b->extra_string = std::move (extra_string_copy);
+
       b->ignore_count = ignore_count;
       b->disposition = tempflag ? disp_del : disp_donttouch;
       b->condition_not_parsed = 1;
       b->enable_state = enabled ? bp_enabled : bp_disabled;
-      if ((type_wanted != bp_breakpoint
-	   && type_wanted != bp_hardware_breakpoint) || thread != -1)
-	b->pspace = current_program_space;
+
+      if (b->type == bp_dprintf)
+	update_dprintf_command_list (b.get ());
 
       install_breakpoint (internal, std::move (b), 0);
     }
-  
+
   if (canonical.lsals.size () > 1)
     {
       warning (_("Multiple breakpoints were set.\nUse the "
@@ -9747,7 +9721,7 @@ break_range_command (const char *arg, int from_tty)
   arg_start = arg;
   location_spec_up start_locspec
     = string_to_location_spec (&arg, current_language);
-  parse_breakpoint_sals (start_locspec.get (), &canonical_start);
+  parse_breakpoint_sals (start_locspec.get (), &canonical_start, nullptr);
 
   if (arg[0] != ',')
     error (_("Too few arguments."));
@@ -9848,7 +9822,7 @@ watchpoint_exp_is_const (const struct expression *exp)
 /* Implement the "re_set" method for watchpoints.  */
 
 void
-watchpoint::re_set ()
+watchpoint::re_set (struct program_space *pspace)
 {
   /* Watchpoint can be either on expression using entirely global
      variables, or it can be on local variables.
@@ -10506,45 +10480,6 @@ watch_command_1 (const char *arg, int accessflag, int from_tty,
      'wp_frame'.  */
   frame_id watchpoint_frame = get_frame_id (wp_frame);
 
-  /* If the expression is "local", then set up a "watchpoint scope"
-     breakpoint at the point where we've left the scope of the watchpoint
-     expression.  Create the scope breakpoint before the watchpoint, so
-     that we will encounter it first in bpstat_stop_status.  */
-  if (exp_valid_block != NULL && wp_frame != NULL)
-    {
-      frame_id caller_frame_id = frame_unwind_caller_id (wp_frame);
-
-      if (frame_id_p (caller_frame_id))
-	{
-	  gdbarch *caller_arch = frame_unwind_caller_arch (wp_frame);
-	  CORE_ADDR caller_pc = frame_unwind_caller_pc (wp_frame);
-
-	  scope_breakpoint
-	    = create_internal_breakpoint (caller_arch, caller_pc,
-					  bp_watchpoint_scope);
-
-	  /* create_internal_breakpoint could invalidate WP_FRAME.  */
-	  wp_frame = NULL;
-
-	  scope_breakpoint->enable_state = bp_enabled;
-
-	  /* Automatically delete the breakpoint when it hits.  */
-	  scope_breakpoint->disposition = disp_del;
-
-	  /* Only break in the proper frame (help with recursion).  */
-	  scope_breakpoint->frame_id = caller_frame_id;
-
-	  /* Set the address at which we will stop.  */
-	  bp_location &loc = scope_breakpoint->first_loc ();
-	  loc.gdbarch = caller_arch;
-	  loc.requested_address = caller_pc;
-	  loc.address
-	    = adjust_breakpoint_address (loc.gdbarch, loc.requested_address,
-					 scope_breakpoint->type,
-					 current_program_space);
-	}
-    }
-
   /* Now set up the breakpoint.  We create all watchpoints as hardware
      watchpoints here even if hardware watchpoints are turned off, a call
      to update_watchpoint later in this function will cause the type to
@@ -10615,14 +10550,6 @@ watch_command_1 (const char *arg, int accessflag, int from_tty,
       w->watchpoint_thread = null_ptid;
     }
 
-  if (scope_breakpoint != NULL)
-    {
-      /* The scope breakpoint is related to the watchpoint.  We will
-	 need to act on them together.  */
-      w->related_breakpoint = scope_breakpoint;
-      scope_breakpoint->related_breakpoint = w.get ();
-    }
-
   if (!just_location)
     value_free_to_mark (mark);
 
@@ -10630,7 +10557,60 @@ watch_command_1 (const char *arg, int accessflag, int from_tty,
      that should be inserted.  */
   update_watchpoint (w.get (), true /* reparse */);
 
+  /* If the expression is "local", then set up a "watchpoint scope"
+     breakpoint at the point where we've left the scope of the watchpoint
+     expression.  Create the scope breakpoint before the watchpoint, so
+     that we will encounter it first in bpstat_stop_status.  */
+  if (exp_valid_block != nullptr && wp_frame != nullptr)
+    {
+      frame_id caller_frame_id = frame_unwind_caller_id (wp_frame);
+
+      if (frame_id_p (caller_frame_id))
+	{
+	  gdbarch *caller_arch = frame_unwind_caller_arch (wp_frame);
+	  CORE_ADDR caller_pc = frame_unwind_caller_pc (wp_frame);
+
+	  scope_breakpoint
+	    = create_internal_breakpoint (caller_arch, caller_pc,
+					  bp_watchpoint_scope);
+
+	  /* create_internal_breakpoint could invalidate WP_FRAME.  */
+	  wp_frame = nullptr;
+
+	  scope_breakpoint->enable_state = bp_enabled;
+
+	  /* Automatically delete the breakpoint when it hits.  */
+	  scope_breakpoint->disposition = disp_del;
+
+	  /* Only break in the proper frame (help with recursion).  */
+	  scope_breakpoint->frame_id = caller_frame_id;
+
+	  /* Set the address at which we will stop.  */
+	  bp_location &loc = scope_breakpoint->first_loc ();
+	  loc.gdbarch = caller_arch;
+	  loc.requested_address = caller_pc;
+	  loc.address
+	    = adjust_breakpoint_address (loc.gdbarch, loc.requested_address,
+					 scope_breakpoint->type,
+					 current_program_space);
+	}
+  }
+
+  if (scope_breakpoint != nullptr)
+    {
+      /* The scope breakpoint is related to the watchpoint.  We will
+	 need to act on them together.  */
+      w->related_breakpoint = scope_breakpoint;
+      scope_breakpoint->related_breakpoint = w.get ();
+    }
+
+  /* Verify that the scope breakpoint comes before the watchpoint in the
+     breakpoint chain.  */
+  gdb_assert (scope_breakpoint == nullptr
+	      || &breakpoint_chain.back () == scope_breakpoint);
+  watchpoint *watchpoint_ptr = w.get ();
   install_breakpoint (internal, std::move (w), 1);
+  gdb_assert (&breakpoint_chain.back () == watchpoint_ptr);
 }
 
 /* Return count of debug registers needed to watch the given expression.
@@ -10751,7 +10731,7 @@ static const gdb::option::option_def watch_option_defs[] = {
     "location",
     [] (watch_options *opt) { return &opt->location; },
     N_("\
-This evaluates EXPRESSION and watches the memory to which is refers.\n\
+This evaluates EXPRESSION and watches the memory to which it refers.\n\
 -l can be used as a short form of -location."),
   },
 };
@@ -11124,7 +11104,7 @@ clear_command (const char *arg, int from_tty)
 	}
     }
 
-  /* Now go thru the 'found' chain and delete them.  */
+  /* Now go through the 'found' chain and delete them.  */
   if (found.empty ())
     {
       if (arg)
@@ -11847,10 +11827,11 @@ code_breakpoint::say_where () const
 	    {
 	      const char *filename
 		= symtab_to_filename_for_display (bl.symtab);
-	      gdb_printf (": file %ps, line %d.",
+	      gdb_printf (": file %ps, line %ps.",
 			  styled_string (file_name_style.style (),
 					 filename),
-			  bl.line_number);
+			  styled_string (line_number_style.style (),
+					 pulongest (bl.line_number)));
 	    }
 	  else
 	    /* This is not ideal, but each location may have a
@@ -11869,7 +11850,8 @@ code_breakpoint::say_where () const
 
 /* See breakpoint.h.  */
 
-bp_location_range breakpoint::locations () const
+bp_location_range
+breakpoint::locations () const
 {
   return bp_location_range (m_locations.begin (), m_locations.end ());
 }
@@ -11959,7 +11941,7 @@ breakpoint::print_recreate (struct ui_file *fp) const
 /* Default breakpoint_ops methods.  */
 
 void
-code_breakpoint::re_set ()
+code_breakpoint::re_set (struct program_space *pspace)
 {
   /* FIXME: is this still reachable?  */
   if (breakpoint_location_spec_empty_p (this))
@@ -11969,7 +11951,7 @@ code_breakpoint::re_set ()
       return;
     }
 
-  re_set_default ();
+  re_set_default (pspace);
 }
 
 int
@@ -12175,7 +12157,7 @@ code_breakpoint::decode_location_spec (location_spec *locspec,
 /* Virtual table for internal breakpoints.  */
 
 void
-internal_breakpoint::re_set ()
+internal_breakpoint::re_set (struct program_space *pspace)
 {
   switch (type)
     {
@@ -12268,7 +12250,7 @@ internal_breakpoint::print_mention () const
 /* Virtual table for momentary breakpoints  */
 
 void
-momentary_breakpoint::re_set ()
+momentary_breakpoint::re_set (struct program_space *pspace)
 {
   /* Keep temporary breakpoints, which can be encountered when we step
      over a dlopen call and solib_add is resetting the breakpoints.
@@ -12309,12 +12291,13 @@ longjmp_breakpoint::~longjmp_breakpoint ()
 
 static void
 bkpt_probe_create_sals_from_location_spec (location_spec *locspec,
-					   struct linespec_result *canonical)
+					   struct linespec_result *canonical,
+					   struct program_space *search_pspace)
 
 {
   struct linespec_sals lsal;
 
-  lsal.sals = parse_probes (locspec, NULL, canonical);
+  lsal.sals = parse_probes (locspec, search_pspace, canonical);
   lsal.canonical = xstrdup (canonical->locspec->to_string ());
   canonical->lsals.push_back (std::move (lsal));
 }
@@ -12404,9 +12387,9 @@ tracepoint::print_recreate (struct ui_file *fp) const
 }
 
 void
-dprintf_breakpoint::re_set ()
+dprintf_breakpoint::re_set (struct program_space *pspace)
 {
-  re_set_default ();
+  re_set_default (pspace);
 
   /* 1 - connect to target 1, that can run breakpoint commands.
      2 - create a dprintf, which resolves fine.
@@ -12460,8 +12443,10 @@ dprintf_breakpoint::after_condition_true (struct bpstat *bs)
    markers (`-m').  */
 
 static void
-strace_marker_create_sals_from_location_spec (location_spec *locspec,
-					      struct linespec_result *canonical)
+strace_marker_create_sals_from_location_spec
+	(location_spec *locspec,
+	 struct linespec_result *canonical,
+	 struct program_space *search_pspace)
 {
   struct linespec_sals lsal;
   const char *arg_start, *arg;
@@ -12876,7 +12861,7 @@ update_static_tracepoint (tracepoint *tp, struct symtab_and_line sal)
 	      uiout->field_string ("fullname", fullname);
 	    }
 
-	  uiout->field_signed ("line", sal2.line);
+	  uiout->field_signed ("line", sal2.line, line_number_style.style ());
 	  uiout->text ("\n");
 
 	  tp->first_loc ().line_number = sal2.line;
@@ -12919,6 +12904,13 @@ locations_are_equal (const bp_location_list &a, const bp_location_range &b)
 
       if (a_iter->disabled_by_cond != b_iter->disabled_by_cond)
 	return false;
+
+      /* When a breakpoint is set by address, it is not created as
+	 pending; but then during an solib event or the like it may
+	 acquire a symbol.  So, check this here.  */
+      if (a_iter->symbol != b_iter->symbol
+	  || a_iter->msymbol != b_iter->msymbol)
+	return false;
     }
 
   return (a_iter == a.end ()) == (b_iter == b.end ());
@@ -13129,24 +13121,6 @@ code_breakpoint::location_spec_to_sals (location_spec *locspec,
     {
       for (auto &sal : sals)
 	resolve_sal_pc (&sal);
-      if (condition_not_parsed && extra_string != NULL)
-	{
-	  gdb::unique_xmalloc_ptr<char> local_cond, local_extra;
-	  int local_thread, local_task, local_inferior;
-
-	  find_condition_and_thread_for_sals (sals, extra_string.get (),
-					      &local_cond, &local_thread,
-					      &local_inferior,
-					      &local_task, &local_extra);
-	  gdb_assert (cond_string == nullptr);
-	  if (local_cond != nullptr)
-	    cond_string = std::move (local_cond);
-	  thread = local_thread;
-	  task = local_task;
-	  if (local_extra != nullptr)
-	    extra_string = std::move (local_extra);
-	  condition_not_parsed = 0;
-	}
 
       if (type == bp_static_tracepoint)
 	{
@@ -13167,40 +13141,46 @@ code_breakpoint::location_spec_to_sals (location_spec *locspec,
    locations.  */
 
 void
-code_breakpoint::re_set_default ()
+code_breakpoint::re_set_default (struct program_space *filter_pspace)
 {
-  struct program_space *filter_pspace = current_program_space;
   std::vector<symtab_and_line> expanded, expanded_end;
 
-  int found;
-  std::vector<symtab_and_line> sals = location_spec_to_sals (locspec.get (),
-							     filter_pspace,
-							     &found);
-  if (found)
-    expanded = std::move (sals);
-
-  if (locspec_range_end != nullptr)
-    {
-      std::vector<symtab_and_line> sals_end
-	= location_spec_to_sals (locspec_range_end.get (),
-				 filter_pspace, &found);
+  /* If this breakpoint is thread- or inferior-specific, then find the
+     program space in which this breakpoint exists.  Otherwise, for
+     breakpoints that are not thread- or inferior-specific, BP_PSPACE will
+     be nullptr.  */
+  program_space *bp_pspace
+    = find_program_space_for_breakpoint (this->thread, this->inferior);
+
+  /* If this is not a thread or inferior specific breakpoint, or it is a
+     thread or inferior specific breakpoint but we are looking for new
+     locations in the program space that the specific thread or inferior is
+     running, then look for new locations for this breakpoint.  */
+  if (bp_pspace == nullptr || filter_pspace == bp_pspace)
+    {
+      int found;
+      std::vector<symtab_and_line> sals
+	= location_spec_to_sals (locspec.get (), filter_pspace, &found);
       if (found)
-	expanded_end = std::move (sals_end);
+	expanded = std::move (sals);
+
+      if (locspec_range_end != nullptr)
+	{
+	  std::vector<symtab_and_line> sals_end
+	    = location_spec_to_sals (locspec_range_end.get (),
+				     filter_pspace, &found);
+	  if (found)
+	    expanded_end = std::move (sals_end);
+	}
     }
 
+  /* Update the locations for this breakpoint.  For thread-specific
+     breakpoints this will remove any old locations that are for the wrong
+     program space -- this can happen if the user changes the thread of a
+     thread-specific breakpoint.  */
   update_breakpoint_locations (this, filter_pspace, expanded, expanded_end);
 }
 
-/* Default method for creating SALs from an address string.  It basically
-   calls parse_breakpoint_sals.  Return 1 for success, zero for failure.  */
-
-static void
-create_sals_from_location_spec_default (location_spec *locspec,
-					struct linespec_result *canonical)
-{
-  parse_breakpoint_sals (locspec, canonical);
-}
-
 /* Re-set breakpoint locations for the current program space.
    Locations bound to other program spaces are left untouched.  */
 
@@ -13235,7 +13215,7 @@ breakpoint_re_set (void)
 	  {
 	    input_radix = b.input_radix;
 	    set_language (b.language);
-	    b.re_set ();
+	    b.re_set (current_program_space);
 	  }
 	catch (const gdb_exception &ex)
 	  {
@@ -13256,6 +13236,53 @@ breakpoint_re_set (void)
   /* Now we can insert.  */
   update_global_location_list (UGLL_MAY_INSERT);
 }
+
+/* Re-set locations for breakpoint B in FILTER_PSPACE.  If FILTER_PSPACE is
+   nullptr then re-set locations for B in all program spaces.  Locations
+   bound to program spaces other than FILTER_PSPACE are left untouched.  */
+
+static void
+breakpoint_re_set_one (breakpoint *b, program_space *filter_pspace)
+{
+  {
+    scoped_restore_current_language save_language;
+    scoped_restore save_input_radix = make_scoped_restore (&input_radix);
+    scoped_restore_current_pspace_and_thread restore_pspace_thread;
+
+    /* To ::re_set each breakpoint we set the current_language to the
+       language of the breakpoint before re-evaluating the breakpoint's
+       location.  This change can unfortunately get undone by accident if
+       the language_mode is set to auto, and we either switch frames, or
+       more likely in this context, we select the current frame.
+
+       We prevent this by temporarily turning the language_mode to
+       language_mode_manual.  We restore it once all breakpoints
+       have been reset.  */
+    scoped_restore save_language_mode = make_scoped_restore (&language_mode);
+    language_mode = language_mode_manual;
+
+    /* Note: we must not try to insert locations until after all
+       breakpoints have been re-set.  Otherwise, e.g., when re-setting
+       breakpoint 1, we'd insert the locations of breakpoint 2, which
+       hadn't been re-set yet, and thus may have stale locations.  */
+
+    try
+      {
+	input_radix = b->input_radix;
+	set_language (b->language);
+	b->re_set (filter_pspace);
+      }
+    catch (const gdb_exception &ex)
+      {
+	exception_fprintf (gdb_stderr, ex,
+			   "Error in re-setting breakpoint %d: ",
+			   b->number);
+      }
+  }
+
+  /* Now we can insert.  */
+  update_global_location_list (UGLL_MAY_INSERT);
+}
 
 /* Reset the thread number of this breakpoint:
 
@@ -15070,14 +15097,14 @@ This includes all types of breakpoints (breakpoints, watchpoints,\n\
 catchpoints, tracepoints).  Use the 'source' command in another debug\n\
 session to restore them."),
 	       &save_cmdlist);
-  set_cmd_completer (c, filename_completer);
+  set_cmd_completer (c, deprecated_filename_completer);
 
   cmd_list_element *save_tracepoints_cmd
     = add_cmd ("tracepoints", class_trace, save_tracepoints_command, _("\
 Save current tracepoint definitions as a script.\n\
 Use the 'source' command in another debug session to restore them."),
 	       &save_cmdlist);
-  set_cmd_completer (save_tracepoints_cmd, filename_completer);
+  set_cmd_completer (save_tracepoints_cmd, deprecated_filename_completer);
 
   c = add_com_alias ("save-tracepoints", save_tracepoints_cmd, class_trace, 0);
   deprecate_cmd (c, "save tracepoints");
diff --git a/gdb/breakpoint.h b/gdb/breakpoint.h
index ddc3719..cef1d72 100644
--- a/gdb/breakpoint.h
+++ b/gdb/breakpoint.h
@@ -46,6 +46,14 @@ struct linespec_result;
 struct linespec_sals;
 struct inferior;
 
+/* True if breakpoint debug output is enabled.  */
+extern bool debug_breakpoint;
+
+/* Print a "breakpoint" debug statement.  */
+#define breakpoint_debug_printf(fmt, ...) \
+  debug_prefixed_printf_cond (debug_breakpoint, "breakpoint", fmt, \
+			      ##__VA_ARGS__)
+
 /* Enum for exception-handling support in 'catch throw', 'catch rethrow',
    'catch catch' and the MI equivalent.  */
 
@@ -452,7 +460,7 @@ public:
      as ``address'' (above) except for cases in which
      ADJUST_BREAKPOINT_ADDRESS has computed a different address at
      which to place the breakpoint in order to comply with a
-     processor's architectual constraints.  */
+     processor's architectural constraints.  */
   CORE_ADDR requested_address = 0;
 
   /* An additional address assigned with this location.  This is currently
@@ -560,15 +568,15 @@ enum print_stop_action
 
 struct breakpoint_ops
 {
-  /* Create SALs from location spec, storing the result in
-     linespec_result.
-
-     For an explanation about the arguments, see the function
-     `create_sals_from_location_spec_default'.
+  /* Create SALs from LOCSPEC, storing the result in linespec_result
+     CANONICAL.  If SEARCH_PSPACE is not nullptr then only results in the
+     corresponding program space are returned.  If SEARCH_PSPACE is nullptr
+     then results for all program spaces are returned.
 
      This function is called inside `create_breakpoint'.  */
   void (*create_sals_from_location_spec) (location_spec *locspec,
-					  struct linespec_result *canonical);
+					  linespec_result *canonical,
+					  program_space *search_pspace);
 
   /* This method will be responsible for creating a breakpoint given its SALs.
      Usually, it just calls `create_breakpoints_sal' (for ordinary
@@ -700,11 +708,19 @@ struct breakpoint : public intrusive_list_node<breakpoint>
 
   /* Reevaluate a breakpoint.  This is necessary after symbols change
      (e.g., an executable or DSO was loaded, or the inferior just
-     started).  */
-  virtual void re_set ()
-  {
-    /* Nothing to re-set.  */
-  }
+     started).
+
+     If not nullptr, then FILTER_PSPACE is the program space in which
+     symbols may have changed, we only need to add new locations in
+     FILTER_PSPACE.
+
+     If FILTER_PSPACE is nullptr then all program spaces may have changed,
+     new locations need to be searched for in every program space.
+
+     This is pure virtual as, at a minimum, each sub-class must recompute
+     any cached condition expressions based off of the cond_string member
+     variable.  */
+  virtual void re_set (program_space *filter_pspace) = 0;
 
   /* Insert the breakpoint or watchpoint or activate the catchpoint.
      Return 0 for success, 1 if the breakpoint, watchpoint or
@@ -821,9 +837,21 @@ struct breakpoint : public intrusive_list_node<breakpoint>
      equals this.  */
   struct frame_id frame_id = null_frame_id;
 
-  /* The program space used to set the breakpoint.  This is only set
-     for breakpoints which are specific to a program space; for
-     non-thread-specific ordinary breakpoints this is NULL.  */
+  /* The program space used to set the breakpoint.  This is only set for
+     breakpoints that are not type bp_breakpoint or bp_hardware_breakpoint.
+     For thread or inferior specific breakpoints, the breakpoints are
+     managed via the thread and inferior member variables.  */
+
+  /* If not nullptr then this is the program space for which this
+     breakpoint was created.  All watchpoint and catchpoint sub-types set
+     this field, but not all of the code_breakpoint sub-types do;
+     generally, user created breakpoint types don't set this field, though
+     things might be more consistent if they did.
+
+     When this variable is nullptr then a breakpoint might be associated
+     with multiple program spaces, though you need to check the thread,
+     inferior and task variables to see if a breakpoint was created for a
+     specific thread, inferior, or Ada task respectively.  */
   program_space *pspace = NULL;
 
   /* The location specification we used to set the breakpoint.  */
@@ -933,7 +961,7 @@ struct code_breakpoint : public breakpoint
   /* Add a location for SAL to this breakpoint.  */
   bp_location *add_location (const symtab_and_line &sal);
 
-  void re_set () override;
+  void re_set (program_space *pspace) override;
   int insert_location (struct bp_location *) override;
   int remove_location (struct bp_location *,
 		       enum remove_bp_reason reason) override;
@@ -955,7 +983,7 @@ protected:
      struct program_space *search_pspace);
 
   /* Helper method that does the basic work of re_set.  */
-  void re_set_default ();
+  void re_set_default (program_space *pspace);
 
   /* Find the SaL locations corresponding to the given LOCATION.
      On return, FOUND will be 1 if any SaL was found, zero otherwise.  */
@@ -977,7 +1005,7 @@ struct watchpoint : public breakpoint
 {
   using breakpoint::breakpoint;
 
-  void re_set () override;
+  void re_set (program_space *pspace) override;
   int insert_location (struct bp_location *) override;
   int remove_location (struct bp_location *,
 		       enum remove_bp_reason reason) override;
@@ -1118,6 +1146,10 @@ struct catchpoint : public breakpoint
   catchpoint (struct gdbarch *gdbarch, bool temp, const char *cond_string);
 
   ~catchpoint () override = 0;
+
+  /* If the catchpoint has a condition set then recompute the cached
+     expression within the single dummy location.  */
+  void re_set (program_space *filter_pspace) override;
 };
 
 
diff --git a/gdb/bsd-uthread.c b/gdb/bsd-uthread.c
index a686f17..eb1ed42 100644
--- a/gdb/bsd-uthread.c
+++ b/gdb/bsd-uthread.c
@@ -157,9 +157,8 @@ static int bsd_uthread_active;
 static CORE_ADDR
 bsd_uthread_lookup_address (const char *name, struct objfile *objfile)
 {
-  struct bound_minimal_symbol sym;
-
-  sym = lookup_minimal_symbol (name, NULL, objfile);
+  bound_minimal_symbol sym
+    = lookup_minimal_symbol (current_program_space, name, objfile);
   if (sym.minsym)
     return sym.value_address ();
 
diff --git a/gdb/btrace.c b/gdb/btrace.c
index 66f20ee..152f6f2 100644
--- a/gdb/btrace.c
+++ b/gdb/btrace.c
@@ -32,6 +32,7 @@
 #include "gdbsupport/rsp-low.h"
 #include "cli/cli-cmds.h"
 #include "cli/cli-utils.h"
+#include "extension.h"
 #include "gdbarch.h"
 
 /* For maintenance commands.  */
@@ -40,6 +41,7 @@
 #include <inttypes.h>
 #include <ctype.h>
 #include <algorithm>
+#include <string>
 
 /* Command lists for btrace maintenance commands.  */
 static struct cmd_list_element *maint_btrace_cmdlist;
@@ -545,32 +547,39 @@ ftrace_new_gap (struct btrace_thread_info *btinfo, int errcode,
    Return the chronologically latest function segment, never NULL.  */
 
 static struct btrace_function *
-ftrace_update_function (struct btrace_thread_info *btinfo, CORE_ADDR pc)
+ftrace_update_function (struct btrace_thread_info *btinfo,
+			std::optional<CORE_ADDR> pc)
 {
-  struct bound_minimal_symbol bmfun;
-  struct minimal_symbol *mfun;
-  struct symbol *fun;
-  struct btrace_function *bfun;
+  struct minimal_symbol *mfun = nullptr;
+  struct symbol *fun = nullptr;
 
   /* Try to determine the function we're in.  We use both types of symbols
      to avoid surprises when we sometimes get a full symbol and sometimes
      only a minimal symbol.  */
-  fun = find_pc_function (pc);
-  bmfun = lookup_minimal_symbol_by_pc (pc);
-  mfun = bmfun.minsym;
+  if (pc.has_value ())
+    {
+      fun = find_pc_function (*pc);
+      bound_minimal_symbol bmfun = lookup_minimal_symbol_by_pc (*pc);
+      mfun = bmfun.minsym;
 
-  if (fun == NULL && mfun == NULL)
-    DEBUG_FTRACE ("no symbol at %s", core_addr_to_string_nz (pc));
+      if (fun == nullptr && mfun == nullptr)
+	DEBUG_FTRACE ("no symbol at %s", core_addr_to_string_nz (*pc));
+    }
 
   /* If we didn't have a function, we create one.  */
   if (btinfo->functions.empty ())
     return ftrace_new_function (btinfo, mfun, fun);
 
   /* If we had a gap before, we create a function.  */
-  bfun = &btinfo->functions.back ();
+  btrace_function *bfun = &btinfo->functions.back ();
   if (bfun->errcode != 0)
     return ftrace_new_function (btinfo, mfun, fun);
 
+  /* If there is no valid PC, which can happen for events with a
+     suppressed IP, we can't do more than return the last bfun.  */
+  if (!pc.has_value ())
+    return bfun;
+
   /* Check the last instruction, if we have one.
      We do this check first, since it allows us to fill in the call stack
      links in addition to the normal flow links.  */
@@ -604,7 +613,7 @@ ftrace_update_function (struct btrace_thread_info *btinfo, CORE_ADDR pc)
 
 	case BTRACE_INSN_CALL:
 	  /* Ignore calls to the next instruction.  They are used for PIC.  */
-	  if (last->pc + last->size == pc)
+	  if (last->pc + last->size == *pc)
 	    break;
 
 	  return ftrace_new_call (btinfo, mfun, fun);
@@ -613,10 +622,10 @@ ftrace_update_function (struct btrace_thread_info *btinfo, CORE_ADDR pc)
 	  {
 	    CORE_ADDR start;
 
-	    start = get_pc_function_start (pc);
+	    start = get_pc_function_start (*pc);
 
 	    /* A jump to the start of a function is (typically) a tail call.  */
-	    if (start == pc)
+	    if (start == *pc)
 	      return ftrace_new_tailcall (btinfo, mfun, fun);
 
 	    /* Some versions of _Unwind_RaiseException use an indirect
@@ -641,6 +650,18 @@ ftrace_update_function (struct btrace_thread_info *btinfo, CORE_ADDR pc)
 
 	    break;
 	  }
+
+	case BTRACE_INSN_AUX:
+	  /* An aux insn couldn't have switched the function.  But the
+	     segment might not have had a symbol name resolved yet, as events
+	     might not have an IP.  Use the current IP in that case and update
+	     the name.  */
+	  if (bfun->sym == nullptr && bfun->msym == nullptr)
+	    {
+	      bfun->sym = fun;
+	      bfun->msym = mfun;
+	    }
+	  break;
 	}
     }
 
@@ -665,6 +686,11 @@ ftrace_update_insns (struct btrace_function *bfun, const btrace_insn &insn)
 {
   bfun->insn.push_back (insn);
 
+  if (insn.iclass == BTRACE_INSN_AUX)
+    bfun->flags |= BFUN_CONTAINS_AUX;
+  else
+    bfun->flags |= BFUN_CONTAINS_NON_AUX;
+
   if (record_debug > 1)
     ftrace_debug (bfun, "update insn");
 }
@@ -1097,7 +1123,8 @@ btrace_compute_ftrace_bts (struct thread_info *tp,
 	      break;
 	    }
 
-	  bfun = ftrace_update_function (btinfo, pc);
+	  bfun = ftrace_update_function (btinfo,
+					 std::make_optional<CORE_ADDR> (pc));
 
 	  /* Maintain the function level offset.
 	     For all but the last block, we do it here.  */
@@ -1196,11 +1223,69 @@ pt_btrace_insn_flags (const struct pt_insn &insn)
 static btrace_insn
 pt_btrace_insn (const struct pt_insn &insn)
 {
-  return {(CORE_ADDR) insn.ip, (gdb_byte) insn.size,
+  return {{static_cast<CORE_ADDR> (insn.ip)},
+	  static_cast<gdb_byte> (insn.size),
 	  pt_reclassify_insn (insn.iclass),
 	  pt_btrace_insn_flags (insn)};
 }
 
+#if defined (HAVE_PT_INSN_EVENT)
+/* Helper for events that will result in an aux_insn.  */
+
+static void
+handle_pt_aux_insn (btrace_thread_info *btinfo, std::string &aux_str,
+		    std::optional<CORE_ADDR> pc)
+{
+  btinfo->aux_data.emplace_back (std::move (aux_str));
+  struct btrace_function *bfun = ftrace_update_function (btinfo, pc);
+
+  btrace_insn insn {{btinfo->aux_data.size () - 1}, 0,
+		    BTRACE_INSN_AUX, 0};
+
+  ftrace_update_insns (bfun, insn);
+}
+
+/* Check if the recording contains real instructions and not only auxiliary
+   instructions since the last gap (or since the beginning).  */
+
+static bool
+ftrace_contains_non_aux_since_last_gap (const btrace_thread_info *btinfo)
+{
+  const std::vector<btrace_function> &functions = btinfo->functions;
+
+  std::vector<btrace_function>::const_reverse_iterator rit;
+  for (rit = functions.crbegin (); rit != functions.crend (); ++rit)
+    {
+      if (rit->errcode != 0)
+	return false;
+
+      if ((rit->flags & BFUN_CONTAINS_NON_AUX) != 0)
+	return true;
+    }
+
+  return false;
+}
+#endif /* defined (HAVE_PT_INSN_EVENT) */
+
+#if (LIBIPT_VERSION >= 0x201)
+/* Translate an interrupt vector to a mnemonic string as defined for x86.
+   Returns nullptr if there is none.  */
+
+static const char *
+decode_interrupt_vector (const uint8_t vector)
+{
+  static const char *mnemonic[]
+    = { "#de", "#db", nullptr, "#bp", "#of", "#br", "#ud", "#nm",
+	"#df", "#mf", "#ts", "#np", "#ss", "#gp", "#pf", nullptr,
+	"#mf", "#ac", "#mc", "#xm", "#ve", "#cp" };
+
+  if (vector < (sizeof (mnemonic) / sizeof (mnemonic[0])))
+    return mnemonic[vector];
+
+  return nullptr;
+}
+#endif /* defined (LIBIPT_VERSION >= 0x201) */
+
 /* Handle instruction decode events (libipt-v2).  */
 
 static int
@@ -1211,9 +1296,9 @@ handle_pt_insn_events (struct btrace_thread_info *btinfo,
 #if defined (HAVE_PT_INSN_EVENT)
   while (status & pts_event_pending)
     {
-      struct btrace_function *bfun;
       struct pt_event event;
       uint64_t offset;
+      std::optional<CORE_ADDR> pc;
 
       status = pt_insn_event (decoder, &event, sizeof (event));
       if (status < 0)
@@ -1225,30 +1310,294 @@ handle_pt_insn_events (struct btrace_thread_info *btinfo,
 	  break;
 
 	case ptev_enabled:
-	  if (event.status_update != 0)
-	    break;
+	  {
+	    if (event.status_update != 0)
+	      break;
 
-	  if (event.variant.enabled.resumed == 0 && !btinfo->functions.empty ())
-	    {
-	      bfun = ftrace_new_gap (btinfo, BDE_PT_DISABLED, gaps);
+	    /* Only create a new gap if there are non-aux instructions in
+	       the trace since the last gap.  We could be at the beginning
+	       of the recording and could already have handled one or more
+	       events, like ptev_iret, that created aux insns.  In that
+	       case we don't want to create a gap or print a warning.  */
+	    if (event.variant.enabled.resumed == 0
+		&& ftrace_contains_non_aux_since_last_gap (btinfo))
+	      {
+		struct btrace_function *bfun
+		  = ftrace_new_gap (btinfo, BDE_PT_NON_CONTIGUOUS, gaps);
 
-	      pt_insn_get_offset (decoder, &offset);
+		pt_insn_get_offset (decoder, &offset);
 
-	      warning (_("Non-contiguous trace at instruction %u (offset = 0x%"
-			 PRIx64 ")."), bfun->insn_offset - 1, offset);
-	    }
+		warning
+		  (_("Non-contiguous trace at instruction %u (offset = 0x%"
+		     PRIx64 ")."), bfun->insn_offset - 1, offset);
+	      }
 
-	  break;
+	    break;
+	  }
 
 	case ptev_overflow:
-	  bfun = ftrace_new_gap (btinfo, BDE_PT_OVERFLOW, gaps);
+	  {
+	    struct btrace_function *bfun
+	      = ftrace_new_gap (btinfo, BDE_PT_OVERFLOW, gaps);
 
-	  pt_insn_get_offset (decoder, &offset);
+	    pt_insn_get_offset (decoder, &offset);
 
-	  warning (_("Overflow at instruction %u (offset = 0x%" PRIx64 ")."),
-		   bfun->insn_offset - 1, offset);
+	    warning (_("Overflow at instruction %u (offset = 0x%" PRIx64 ")."),
+		     bfun->insn_offset - 1, offset);
 
-	  break;
+	    break;
+	  }
+#if defined (HAVE_STRUCT_PT_EVENT_VARIANT_PTWRITE)
+	case ptev_ptwrite:
+	  {
+	    std::optional<std::string> ptw_string;
+
+	    /* Lookup the PC if available.  The event often doesn't provide
+	       one, so we look into the last function segment as well.
+	       Looking further back makes limited sense for ptwrite.  */
+	    if (event.ip_suppressed == 0)
+	      pc = event.variant.ptwrite.ip;
+	    else if (!btinfo->functions.empty ())
+	      {
+		std::vector<btrace_insn> &insns
+		  = btinfo->functions.back ().insn;
+		for (auto insn = insns.rbegin (); insn != insns.rend ();
+		     ++insn)
+		  {
+		    switch (insn->iclass)
+		    {
+		    case BTRACE_INSN_AUX:
+		      continue;
+
+		    case BTRACE_INSN_OTHER:
+		    case BTRACE_INSN_CALL:
+		    case BTRACE_INSN_RETURN:
+		    case BTRACE_INSN_JUMP:
+		      pc = insn->pc;
+		      break;
+		    /* No default to rely on compiler warnings.  */
+		    }
+		    break;
+		  }
+	      }
+
+	    if (!pc.has_value ())
+	      warning (_("Failed to determine the PC for ptwrite."));
+
+
+	    if (btinfo->ptw_callback_fun != nullptr)
+	      ptw_string
+		= btinfo->ptw_callback_fun (event.variant.ptwrite.payload,
+					    pc, btinfo->ptw_context);
+
+	    if (ptw_string.has_value () && (*ptw_string).empty ())
+	      continue;
+
+	    if (!ptw_string.has_value ())
+	      *ptw_string = hex_string (event.variant.ptwrite.payload);
+
+	    handle_pt_aux_insn (btinfo, *ptw_string, pc);
+
+	    break;
+	  }
+#endif /* defined (HAVE_STRUCT_PT_EVENT_VARIANT_PTWRITE) */
+
+#if (LIBIPT_VERSION >= 0x201)
+	case ptev_interrupt:
+	  {
+	    std::string aux_string = std::string (_("interrupt: vector = "))
+	      + hex_string (event.variant.interrupt.vector);
+
+	    const char *decoded
+	      = decode_interrupt_vector (event.variant.interrupt.vector);
+	    if (decoded != nullptr)
+	      aux_string += std::string (" (") + decoded + ")";
+
+	    if (event.variant.interrupt.has_cr2 != 0)
+	      {
+		aux_string += std::string (", cr2 = ")
+		  + hex_string (event.variant.interrupt.cr2);
+	      }
+
+	    if (event.ip_suppressed == 0)
+	      {
+		pc = event.variant.interrupt.ip;
+		aux_string += std::string (", ip = ") + hex_string (*pc);
+	      }
+
+	    handle_pt_aux_insn (btinfo, aux_string, pc);
+	    break;
+	  }
+
+	case ptev_iret:
+	  {
+	    std::string aux_string = std::string (_("iret"));
+
+	    if (event.ip_suppressed == 0)
+	      {
+		pc = event.variant.iret.ip;
+		aux_string += std::string (": ip = ") + hex_string (*pc);
+	      }
+
+	    handle_pt_aux_insn (btinfo, aux_string, pc);
+	    break;
+	  }
+
+	case ptev_smi:
+	  {
+	    std::string aux_string = std::string (_("smi"));
+
+	    if (event.ip_suppressed == 0)
+	      {
+		pc = event.variant.smi.ip;
+		aux_string += std::string (": ip = ") + hex_string (*pc);
+	      }
+
+	    handle_pt_aux_insn (btinfo, aux_string, pc);
+	    break;
+	  }
+
+	case ptev_rsm:
+	  {
+	    std::string aux_string = std::string (_("rsm"));
+
+	    if (event.ip_suppressed == 0)
+	      {
+		pc = event.variant.rsm.ip;
+		aux_string += std::string (": ip = ") + hex_string (*pc);
+	      }
+
+	    handle_pt_aux_insn (btinfo, aux_string, pc);
+	    break;
+	  }
+
+	case ptev_sipi:
+	  {
+	    std::string aux_string = std::string (_("sipi: vector = "))
+	      + hex_string (event.variant.sipi.vector);
+
+	    handle_pt_aux_insn (btinfo, aux_string, pc);
+	    break;
+	  }
+
+	case ptev_init:
+	  {
+	    std::string aux_string = std::string (_("init"));
+
+	    if (event.ip_suppressed == 0)
+	      {
+		pc = event.variant.init.ip;
+		aux_string += std::string (": ip = ") + hex_string (*pc);
+	      }
+
+	    handle_pt_aux_insn (btinfo, aux_string, pc);
+	    break;
+	  }
+
+	case ptev_vmentry:
+	  {
+	    std::string aux_string = std::string (_("vmentry"));
+
+	    if (event.ip_suppressed == 0)
+	      {
+		pc = event.variant.vmentry.ip;
+		aux_string += std::string (": ip = ") + hex_string (*pc);
+	      }
+
+	    handle_pt_aux_insn (btinfo, aux_string, pc);
+	    break;
+	  }
+
+	case ptev_vmexit:
+	  {
+	    std::string aux_string = std::string (_("vmexit"));
+
+	    if (event.variant.vmexit.has_vector != 0
+		|| event.variant.vmexit.has_vmxr != 0
+		|| event.variant.vmexit.has_vmxq != 0
+		|| event.ip_suppressed != 0)
+	      aux_string += std::string (":");
+
+	    if (event.variant.vmexit.has_vector != 0)
+	      {
+		aux_string += std::string (_(" vector = "))
+			      + hex_string (event.variant.vmexit.vector);
+
+		const char* decoded = decode_interrupt_vector
+					(event.variant.vmexit.vector);
+		if (decoded != nullptr)
+		  aux_string += std::string (" (") + decoded + ")";
+	      }
+
+	    if (event.variant.vmexit.has_vmxr != 0)
+	      {
+		std::string seperator = aux_string.back () == ':' ? "" : ",";
+		aux_string += seperator + std::string (" vmxr = ")
+			      + hex_string (event.variant.vmexit.vmxr);
+	      }
+
+	    if (event.variant.vmexit.has_vmxq != 0)
+	      {
+		std::string seperator = aux_string.back () == ':' ? "" : ",";
+		aux_string += seperator + std::string (" vmxq = ")
+			      + hex_string (event.variant.vmexit.vmxq);
+	      }
+
+	    if (event.ip_suppressed == 0)
+	      {
+		pc = event.variant.vmexit.ip;
+		std::string seperator = aux_string.back () == ':' ? "" : ",";
+		aux_string += seperator + std::string (" ip = ")
+			      + hex_string (*pc);
+	      }
+
+	    handle_pt_aux_insn (btinfo, aux_string, pc);
+	    break;
+	  }
+
+	case ptev_shutdown:
+	  {
+	    std::string aux_string = std::string (_("shutdown"));
+
+	    if (event.ip_suppressed == 0)
+	      {
+		pc = event.variant.shutdown.ip;
+		aux_string += std::string (": ip = ") + hex_string (*pc);
+	      }
+
+	    handle_pt_aux_insn (btinfo, aux_string, pc);
+	    break;
+	  }
+
+	case ptev_uintr:
+	  {
+	    std::string aux_string = std::string (_("uintr: vector = "))
+				     + hex_string (event.variant.uintr.vector);
+
+	    if (event.ip_suppressed == 0)
+	      {
+		pc = event.variant.uintr.ip;
+		aux_string += std::string (", ip = ") + hex_string (*pc);
+	      }
+
+	    handle_pt_aux_insn (btinfo, aux_string, pc);
+	    break;
+	  }
+
+	case ptev_uiret:
+	  {
+	    std::string aux_string = std::string (_("uiret"));
+
+	    if (event.ip_suppressed == 0)
+	      {
+		pc = event.variant.uiret.ip;
+		aux_string += std::string (": ip = ") + hex_string (*pc);
+	      }
+
+	    handle_pt_aux_insn (btinfo, aux_string, pc);
+	    break;
+	  }
+#endif /* defined (LIBIPT_VERSION >= 0x201) */
 	}
     }
 #endif /* defined (HAVE_PT_INSN_EVENT) */
@@ -1275,7 +1624,7 @@ handle_pt_insn_event_flags (struct btrace_thread_info *btinfo,
       struct btrace_function *bfun;
       uint64_t offset;
 
-      bfun = ftrace_new_gap (btinfo, BDE_PT_DISABLED, gaps);
+      bfun = ftrace_new_gap (btinfo, BDE_PT_NON_CONTIGUOUS, gaps);
 
       pt_insn_get_offset (decoder, &offset);
 
@@ -1314,6 +1663,9 @@ ftrace_add_pt (struct btrace_thread_info *btinfo,
   uint64_t offset;
   int status;
 
+  /* Register the ptwrite filter.  */
+  apply_ext_lang_ptwrite_filter (btinfo);
+
   for (;;)
     {
       struct pt_insn insn;
@@ -1341,7 +1693,9 @@ ftrace_add_pt (struct btrace_thread_info *btinfo,
 	  /* Handle events indicated by flags in INSN.  */
 	  handle_pt_insn_event_flags (btinfo, decoder, insn, gaps);
 
-	  bfun = ftrace_update_function (btinfo, insn.ip);
+	  bfun
+	    = ftrace_update_function (btinfo,
+				      std::make_optional<CORE_ADDR> (insn.ip));
 
 	  /* Maintain the function level offset.  */
 	  *plevel = std::min (*plevel, bfun->level);
@@ -1820,6 +2174,8 @@ btrace_clear_history (struct btrace_thread_info *btinfo)
   btinfo->insn_history = NULL;
   btinfo->call_history = NULL;
   btinfo->replay = NULL;
+
+  btinfo->aux_data.clear ();
 }
 
 /* Clear the branch trace maintenance histories in BTINFO.  */
@@ -1877,8 +2233,8 @@ btrace_decode_error (enum btrace_format format, int errcode)
 	case BDE_PT_USER_QUIT:
 	  return _("trace decode cancelled");
 
-	case BDE_PT_DISABLED:
-	  return _("disabled");
+	case BDE_PT_NON_CONTIGUOUS:
+	  return _("non-contiguous");
 
 	case BDE_PT_OVERFLOW:
 	  return _("overflow");
@@ -2649,6 +3005,27 @@ pt_print_packet (const struct pt_packet *packet)
     case ppt_mnt:
       gdb_printf (("mnt %" PRIx64 ""), packet->payload.mnt.payload);
       break;
+
+#if (LIBIPT_VERSION >= 0x200)
+    case ppt_ptw:
+      gdb_printf (("ptw %u: 0x%" PRIx64 "%s"), packet->payload.ptw.plc,
+		  packet->payload.ptw.payload,
+		  packet->payload.ptw.ip ? (" ip") : (""));
+      break;
+#endif /* defined (LIBIPT_VERSION >= 0x200)  */
+
+#if (LIBIPT_VERSION >= 0x201)
+    case ppt_cfe:
+      gdb_printf (("cfe %u: 0x%x%s"), packet->payload.cfe.type,
+		  packet->payload.cfe.vector,
+		  packet->payload.cfe.ip ? (" ip") : (""));
+      break;
+
+    case ppt_evd:
+      gdb_printf (("evd %u: 0x%" PRIx64 ""), packet->payload.evd.type,
+		  packet->payload.evd.payload);
+      break;
+#endif /* defined (LIBIPT_VERSION >= 0x201)  */
     }
 }
 
diff --git a/gdb/btrace.h b/gdb/btrace.h
index f05ec2b..a4960f3 100644
--- a/gdb/btrace.h
+++ b/gdb/btrace.h
@@ -35,6 +35,7 @@
 #endif
 
 #include <vector>
+#include <string>
 
 struct thread_info;
 struct btrace_function;
@@ -52,7 +53,10 @@ enum btrace_insn_class
   BTRACE_INSN_RETURN,
 
   /* The instruction is an unconditional jump.  */
-  BTRACE_INSN_JUMP
+  BTRACE_INSN_JUMP,
+
+  /* The instruction is a pseudo instruction containing auxiliary data.  */
+  BTRACE_INSN_AUX
 };
 
 /* Instruction flags.  */
@@ -68,8 +72,19 @@ DEF_ENUM_FLAGS_TYPE (enum btrace_insn_flag, btrace_insn_flags);
    This represents a single instruction in a branch trace.  */
 struct btrace_insn
 {
-  /* The address of this instruction.  */
-  CORE_ADDR pc;
+  union
+  {
+    /* The address of this instruction.  Applies to btrace_insn with
+       iclass == BTRACE_INSN_OTHER or
+       iclass == BTRACE_INSN_CALL or
+       iclass == BTRACE_INSN_RETURN or
+       iclass == BTRACE_INSN_JUMP.  */
+    CORE_ADDR pc;
+
+    /* Index into btrace_info::aux_data.  Applies to btrace_insn with
+       iclass == BTRACE_INSN_AUX.  */
+    uint64_t aux_data_index;
+  };
 
   /* The size of this instruction in bytes.  */
   gdb_byte size;
@@ -91,7 +106,15 @@ enum btrace_function_flag
 
   /* The 'up' link points to a tail call.  This obviously only makes sense
      if bfun_up_links_to_ret is clear.  */
-  BFUN_UP_LINKS_TO_TAILCALL = (1 << 1)
+  BFUN_UP_LINKS_TO_TAILCALL = (1 << 1),
+
+  /* Indicates that at least one auxiliary instruction is in the current
+     function segment.  */
+  BFUN_CONTAINS_AUX = (1 << 2),
+
+  /* Indicates that at least one instruction not of type BTRACE_INSN_AUX
+     is in the current function segment.  */
+  BFUN_CONTAINS_NON_AUX = (1 << 3)
 };
 DEF_ENUM_FLAGS_TYPE (enum btrace_function_flag, btrace_function_flags);
 
@@ -112,7 +135,7 @@ enum btrace_pt_error
   BDE_PT_USER_QUIT = 1,
 
   /* Tracing was temporarily disabled.  */
-  BDE_PT_DISABLED,
+  BDE_PT_NON_CONTIGUOUS,
 
   /* Trace recording overflowed.  */
   BDE_PT_OVERFLOW
@@ -165,7 +188,7 @@ struct btrace_function
 
   /* The instruction number offset for the first instruction in this
      function segment.
-     If INSN is empty this is the insn_offset of the succeding function
+     If INSN is empty this is the insn_offset of the succeeding function
      segment in control-flow order.  */
   unsigned int insn_offset;
 
@@ -330,6 +353,20 @@ struct btrace_thread_info
      function segment i will be at index (i - 1).  */
   std::vector<btrace_function> functions;
 
+  /* Optional auxiliary information that is printed in all commands
+     displaying or stepping through the execution history.  */
+  std::vector<std::string> aux_data;
+
+  /* Function pointer to the ptwrite callback.  Returns the string returned
+     by the ptwrite filter function.  */
+  std::optional<std::string> (*ptw_callback_fun) (const uint64_t payload,
+						  std::optional<uint64_t> ip,
+						  const void *ptw_context)
+						    = nullptr;
+
+  /* Context for the ptw_callback_fun.  */
+  void *ptw_context = nullptr;
+
   /* The function level offset.  When added to each function's LEVEL,
      this normalizes the function levels such that the smallest level
      becomes zero.  */
diff --git a/gdb/build-id.c b/gdb/build-id.c
index 32fbe17..6266be1 100644
--- a/gdb/build-id.c
+++ b/gdb/build-id.c
@@ -26,6 +26,8 @@
 #include "filenames.h"
 #include "gdbcore.h"
 #include "cli/cli-style.h"
+#include "gdbsupport/scoped_fd.h"
+#include "debuginfod-support.h"
 
 /* See build-id.h.  */
 
@@ -291,9 +293,11 @@ build_id_to_debug_bfd (size_t build_id_len, const bfd_byte *build_id)
   return build_id_to_bfd_suffix (build_id_len, build_id, ".debug");
 }
 
-/* See build-id.h.  */
+/* Find and open a BFD for an executable file given a build-id.  If no BFD
+   can be found, return NULL.  The returned reference to the BFD must be
+   released by the caller.  */
 
-gdb_bfd_ref_ptr
+static gdb_bfd_ref_ptr
 build_id_to_exec_bfd (size_t build_id_len, const bfd_byte *build_id)
 {
   return build_id_to_bfd_suffix (build_id_len, build_id, "");
@@ -335,3 +339,37 @@ find_separate_debug_file_by_buildid (struct objfile *objfile,
 
   return std::string ();
 }
+
+/* See build-id.h.  */
+
+gdb_bfd_ref_ptr
+find_objfile_by_build_id (const bfd_build_id *build_id,
+			  const char *expected_filename)
+{
+  /* Try to find the executable (or shared object) by looking for a
+     (sym)link on disk from the build-id to the object file.  */
+  gdb_bfd_ref_ptr abfd = build_id_to_exec_bfd (build_id->size,
+					       build_id->data);
+
+  if (abfd != nullptr)
+    return abfd;
+
+  /* Attempt to query debuginfod for the executable.  */
+  gdb::unique_xmalloc_ptr<char> path;
+  scoped_fd fd = debuginfod_exec_query (build_id->data, build_id->size,
+					expected_filename, &path);
+  if (fd.get () >= 0)
+    {
+      abfd = gdb_bfd_open (path.get (), gnutarget);
+
+      if (abfd == nullptr)
+	warning (_("\"%ps\" from debuginfod cannot be opened as bfd: %s"),
+		 styled_string (file_name_style.style (), path.get ()),
+		 gdb_bfd_errmsg (bfd_get_error (), nullptr).c_str ());
+      else if (!build_id_verify (abfd.get (), build_id->size,
+				 build_id->data))
+	abfd = nullptr;
+    }
+
+  return abfd;
+}
diff --git a/gdb/build-id.h b/gdb/build-id.h
index c5f20f8..1d2e789 100644
--- a/gdb/build-id.h
+++ b/gdb/build-id.h
@@ -40,13 +40,6 @@ extern int build_id_verify (bfd *abfd,
 extern gdb_bfd_ref_ptr build_id_to_debug_bfd (size_t build_id_len,
 					      const bfd_byte *build_id);
 
-/* Find and open a BFD for an executable file given a build-id.  If no BFD
-   can be found, return NULL.  The returned reference to the BFD must be
-   released by the caller.  */
-
-extern gdb_bfd_ref_ptr build_id_to_exec_bfd (size_t build_id_len,
-					     const bfd_byte *build_id);
-
 /* Find the separate debug file for OBJFILE, by using the build-id
    associated with OBJFILE's BFD.  If successful, returns the file name for the
    separate debug file, otherwise, return an empty string.
@@ -60,6 +53,21 @@ extern gdb_bfd_ref_ptr build_id_to_exec_bfd (size_t build_id_len,
 extern std::string find_separate_debug_file_by_buildid
   (struct objfile *objfile, deferred_warnings *warnings);
 
+/* Find an objfile (executable or shared library) that matches BUILD_ID.
+   This is done by first checking in the debug-file-directory for a
+   suitable .build-id/ sub-directory, and looking for a file with the
+   required build-id (usually a symbolic link or hard link to the actual
+   file).
+
+   If that doesn't find us a file then we call to debuginfod to see if it
+   can provide the required file.
+
+   EXPECTED_FILENAME is used in output messages from debuginfod, this
+   should be the file we were looking for but couldn't find.  */
+
+extern gdb_bfd_ref_ptr find_objfile_by_build_id
+  (const bfd_build_id *build_id, const char *expected_filename);
+
 /* Return an hex-string representation of BUILD_ID.  */
 
 static inline std::string
diff --git a/gdb/buildsym.c b/gdb/buildsym.c
index 1c762ad..02d6848 100644
--- a/gdb/buildsym.c
+++ b/gdb/buildsym.c
@@ -951,11 +951,7 @@ buildsym_compunit::end_compunit_symtab_with_blockvector
   cu->set_producer (m_producer);
 
   cu->set_blockvector (blockvector);
-  {
-    struct block *b = blockvector->global_block ();
-
-    b->set_compunit_symtab (cu);
-  }
+  blockvector->global_block ()->set_compunit (cu);
 
   cu->set_macro_table (release_macros ());
 
diff --git a/gdb/c-exp.y b/gdb/c-exp.y
index a1a74a9..645cb59 100644
--- a/gdb/c-exp.y
+++ b/gdb/c-exp.y
@@ -1210,7 +1210,7 @@ variable:	name_not_typename
 			      std::string arg = copy_name ($1.stoken);
 
 			      bound_minimal_symbol msymbol
-				= lookup_bound_minimal_symbol (arg.c_str ());
+				= lookup_minimal_symbol (current_program_space, arg.c_str ());
 			      if (msymbol.minsym == NULL)
 				{
 				  if (!have_full_symbols (current_program_space)
@@ -3087,10 +3087,8 @@ classify_name (struct parser_state *par_state, const struct block *block,
 	  || is_quoted_name)
 	{
 	  /* See if it's a file name. */
-	  struct symtab *symtab;
-
-	  symtab = lookup_symtab (copy.c_str ());
-	  if (symtab)
+	  if (auto symtab = lookup_symtab (current_program_space, copy.c_str ());
+	      symtab != nullptr)
 	    {
 	      yylval.bval
 		= symtab->compunit ()->blockvector ()->static_block ();
@@ -3150,7 +3148,7 @@ classify_name (struct parser_state *par_state, const struct block *block,
   if (bsym.symbol == NULL
       && par_state->language ()->la_language == language_cplus
       && is_a_field_of_this.type == NULL
-      && lookup_minimal_symbol (copy.c_str (), NULL, NULL).minsym == NULL)
+      && lookup_minimal_symbol (current_program_space, copy.c_str ()).minsym == nullptr)
     return UNKNOWN_CPP_NAME;
 
   return NAME;
diff --git a/gdb/c-valprint.c b/gdb/c-valprint.c
index ca24b15..bad9490 100644
--- a/gdb/c-valprint.c
+++ b/gdb/c-valprint.c
@@ -176,8 +176,7 @@ print_unpacked_pointer (struct type *type, struct type *elttype,
     {
       /* Print vtbl's nicely.  */
       CORE_ADDR vt_address = unpack_pointer (type, valaddr + embedded_offset);
-      struct bound_minimal_symbol msymbol =
-	lookup_minimal_symbol_by_pc (vt_address);
+      bound_minimal_symbol msymbol = lookup_minimal_symbol_by_pc (vt_address);
 
       /* If 'symbol_print' is set, we did the work above.  */
       if (!options->symbol_print
diff --git a/gdb/cli-out.c b/gdb/cli-out.c
index 1c303f0..d8a542d 100644
--- a/gdb/cli-out.c
+++ b/gdb/cli-out.c
@@ -94,13 +94,14 @@ cli_ui_out::do_end (ui_out_type type)
 
 void
 cli_ui_out::do_field_signed (int fldno, int width, ui_align alignment,
-			     const char *fldname, LONGEST value)
+			     const char *fldname, LONGEST value,
+			     const ui_file_style &style)
 {
   if (m_suppress_output)
     return;
 
   do_field_string (fldno, width, alignment, fldname, plongest (value),
-		   ui_file_style ());
+		   style);
 }
 
 /* output an unsigned field */
diff --git a/gdb/cli-out.h b/gdb/cli-out.h
index f17cb0c..f0654b2 100644
--- a/gdb/cli-out.h
+++ b/gdb/cli-out.h
@@ -52,7 +52,8 @@ protected:
   virtual void do_begin (ui_out_type type, const char *id) override;
   virtual void do_end (ui_out_type type) override;
   virtual void do_field_signed (int fldno, int width, ui_align align,
-				const char *fldname, LONGEST value) override;
+				const char *fldname, LONGEST value,
+				const ui_file_style &style) override;
   virtual void do_field_unsigned (int fldno, int width, ui_align align,
 				  const char *fldname, ULONGEST value)
     override;
diff --git a/gdb/cli/cli-cmds.c b/gdb/cli/cli-cmds.c
index 92bb8fc..ea2e156 100644
--- a/gdb/cli/cli-cmds.c
+++ b/gdb/cli/cli-cmds.c
@@ -51,7 +51,6 @@
 #include "cli/cli-cmds.h"
 #include "cli/cli-style.h"
 #include "cli/cli-utils.h"
-#include "cli/cli-style.h"
 
 #include "extension.h"
 #include "gdbsupport/pathstuff.h"
@@ -423,31 +422,7 @@ complete_command (const char *arg, int from_tty)
     {
       std::string arg_prefix (arg, word - arg);
 
-      if (result.number_matches == 1)
-	printf_unfiltered ("%s%s\n", arg_prefix.c_str (), result.match_list[0]);
-      else
-	{
-	  result.sort_match_list ();
-
-	  for (size_t i = 0; i < result.number_matches; i++)
-	    {
-	      printf_unfiltered ("%s%s",
-				 arg_prefix.c_str (),
-				 result.match_list[i + 1]);
-	      if (quote_char)
-		printf_unfiltered ("%c", quote_char);
-	      printf_unfiltered ("\n");
-	    }
-	}
-
-      if (result.number_matches == max_completions)
-	{
-	  /* ARG_PREFIX and WORD are included in the output so that emacs
-	     will include the message in the output.  */
-	  printf_unfiltered (_("%s%s %s\n"),
-			     arg_prefix.c_str (), word,
-			     get_max_completions_reached_message ());
-	}
+      result.print_matches (arg_prefix, word, quote_char);
     }
 }
 
@@ -1041,16 +1016,23 @@ edit_command (const char *arg, int from_tty)
 	  gdbarch = sal.symtab->compunit ()->objfile ()->arch ();
 	  sym = find_pc_function (sal.pc);
 	  if (sym)
-	    gdb_printf ("%s is in %s (%s:%d).\n",
-			paddress (gdbarch, sal.pc),
-			sym->print_name (),
-			symtab_to_filename_for_display (sal.symtab),
-			sal.line);
+	    gdb_printf ("%ps is in %ps (%ps:%ps).\n",
+			styled_string (address_style.style (),
+				       paddress (gdbarch, sal.pc)),
+			styled_string (function_name_style.style (),
+				       sym->print_name ()),
+			styled_string (file_name_style.style (),
+				       symtab_to_filename_for_display (sal.symtab)),
+			styled_string (line_number_style.style (),
+				       pulongest (sal.line)));
 	  else
-	    gdb_printf ("%s is at %s:%d.\n",
-			paddress (gdbarch, sal.pc),
-			symtab_to_filename_for_display (sal.symtab),
-			sal.line);
+	    gdb_printf ("%ps is at %ps:%ps.\n",
+			styled_string (address_style.style (),
+				       paddress (gdbarch, sal.pc)),
+			styled_string (file_name_style.style (),
+				       symtab_to_filename_for_display (sal.symtab)),
+			styled_string (line_number_style.style (),
+				       pulongest (sal.line)));
 	}
 
       /* If what was given does not imply a symtab, it must be an
@@ -1142,19 +1124,14 @@ pipe_command (const char *arg, int from_tty)
   if (to_shell_command == nullptr)
     error (_("Error launching \"%s\""), shell_command);
 
-  try
-    {
-      stdio_file pipe_file (to_shell_command);
+  int exit_status;
+  {
+    SCOPE_EXIT { exit_status = pclose (to_shell_command); };
 
-      execute_command_to_ui_file (&pipe_file, gdb_cmd.c_str (), from_tty);
-    }
-  catch (...)
-    {
-      pclose (to_shell_command);
-      throw;
-    }
+    stdio_file pipe_file (to_shell_command);
 
-  int exit_status = pclose (to_shell_command);
+    execute_command_to_ui_file (&pipe_file, gdb_cmd.c_str (), from_tty);
+  }
 
   if (exit_status < 0)
     error (_("shell command \"%s\" failed: %s"), shell_command,
@@ -2146,9 +2123,11 @@ print_sal_location (const symtab_and_line &sal)
   const char *sym_name = NULL;
   if (sal.symbol != NULL)
     sym_name = sal.symbol->print_name ();
-  gdb_printf (_("file: \"%s\", line number: %d, symbol: \"%s\"\n"),
+  gdb_printf (_("file: \"%s\", line number: %ps, symbol: \"%s\"\n"),
 	      symtab_to_filename_for_display (sal.symtab),
-	      sal.line, sym_name != NULL ? sym_name : "???");
+	      styled_string (line_number_style.style (),
+			     pulongest (sal.line)),
+	      sym_name != NULL ? sym_name : "???");
 }
 
 /* Print a list of files and line numbers which a user may choose from
@@ -2643,7 +2622,7 @@ The debugger's current working directory specifies where scripts and other\n\
 files that can be loaded by GDB are located.\n\
 In order to change the inferior's current working directory, the recommended\n\
 way is to use the \"set cwd\" command."), &cmdlist);
-  set_cmd_completer (c, filename_completer);
+  set_cmd_completer (c, deprecated_filename_completer);
 
   add_com ("echo", class_support, echo_command, _("\
 Print a constant string.  Give string as argument.\n\
@@ -2809,7 +2788,7 @@ the previous command number shown."),
     = add_com ("shell", class_support, shell_command, _("\
 Execute the rest of the line as a shell command.\n\
 With no arguments, run an inferior shell."));
-  set_cmd_completer (shell_cmd, filename_completer);
+  set_cmd_completer (shell_cmd, deprecated_filename_completer);
 
   add_com_alias ("!", shell_cmd, class_support, 0);
 
@@ -2898,7 +2877,8 @@ you must type \"disassemble 'foo.c'::bar\" and not \"disassemble foo.c:bar\"."))
 
   c = add_com ("make", class_support, make_command, _("\
 Run the ``make'' program using the rest of the line as arguments."));
-  set_cmd_completer (c, filename_completer);
+  set_cmd_completer (c, deprecated_filename_completer);
+
   c = add_cmd ("user", no_class, show_user, _("\
 Show definitions of non-python/scheme user defined commands.\n\
 Argument is the name of the user defined command.\n\
@@ -2982,5 +2962,5 @@ Note that the file \"%s\" is read automatically in this way\n\
 when GDB is started."), GDBINIT).release ();
   c = add_cmd ("source", class_support, source_command,
 	       source_help_text, &cmdlist);
-  set_cmd_completer (c, filename_completer);
+  set_cmd_completer (c, deprecated_filename_completer);
 }
diff --git a/gdb/cli/cli-decode.c b/gdb/cli/cli-decode.c
index d9a2ab4..163012a 100644
--- a/gdb/cli/cli-decode.c
+++ b/gdb/cli/cli-decode.c
@@ -866,7 +866,7 @@ add_setshow_filename_cmd (const char *name, enum command_class theclass,
 					 nullptr, nullptr, set_func,
 					 show_func, set_list, show_list);
 
-  set_cmd_completer (commands.set, filename_completer);
+  set_cmd_completer (commands.set, deprecated_filename_completer);
 
   return commands;
 }
@@ -890,7 +890,7 @@ add_setshow_filename_cmd (const char *name, command_class theclass,
 						 nullptr, show_func, set_list,
 						 show_list);
 
-  set_cmd_completer (cmds.set, filename_completer);
+  set_cmd_completer (cmds.set, deprecated_filename_completer);
 
   return cmds;
 }
@@ -1015,7 +1015,7 @@ add_setshow_optional_filename_cmd (const char *name, enum command_class theclass
 					 nullptr, nullptr, set_func, show_func,
 					 set_list, show_list);
 
-  set_cmd_completer (commands.set, filename_completer);
+  set_cmd_completer (commands.set, deprecated_filename_completer);
 
   return commands;
 }
@@ -1039,7 +1039,7 @@ add_setshow_optional_filename_cmd (const char *name, command_class theclass,
 				       set_func, get_func, nullptr, show_func,
 				       set_list,show_list);
 
-  set_cmd_completer (cmds.set, filename_completer);
+  set_cmd_completer (cmds.set, deprecated_filename_completer);
 
   return cmds;
 }
diff --git a/gdb/cli/cli-dump.c b/gdb/cli/cli-dump.c
index 9b44c6e..2b9307e 100644
--- a/gdb/cli/cli-dump.c
+++ b/gdb/cli/cli-dump.c
@@ -348,7 +348,7 @@ add_dump_command (const char *name,
   struct dump_context *d;
 
   c = add_cmd (name, all_commands, descr, &dump_cmdlist);
-  c->completer =  filename_completer;
+  set_cmd_completer (c, deprecated_filename_completer);
   d = XNEW (struct dump_context);
   d->func = func;
   d->mode = FOPEN_WB;
@@ -356,7 +356,7 @@ add_dump_command (const char *name,
   c->func = call_dump_func;
 
   c = add_cmd (name, all_commands, descr, &append_cmdlist);
-  c->completer =  filename_completer;
+  set_cmd_completer (c, deprecated_filename_completer);
   d = XNEW (struct dump_context);
   d->func = func;
   d->mode = FOPEN_AB;
@@ -705,6 +705,6 @@ Arguments are FILE OFFSET START END where all except FILE are optional.\n\
 OFFSET will be added to the base address of the file (default zero).\n\
 If START and END are given, only the file contents within that range\n\
 (file relative) will be restored to target memory."));
-  c->completer = filename_completer;
+  set_cmd_completer (c, deprecated_filename_completer);
   /* FIXME: completers for other commands.  */
 }
diff --git a/gdb/cli/cli-interp.c b/gdb/cli/cli-interp.c
index fa5d70e..1817573 100644
--- a/gdb/cli/cli-interp.c
+++ b/gdb/cli/cli-interp.c
@@ -228,7 +228,7 @@ cli_interp::exec (const char *command_str)
      interpreter which has a new ui_file for gdb_stdout, use that one
      instead of the default.
 
-     It is important that it gets reset everytime, since the user
+     It is important that it gets reset every time, since the user
      could set gdb to use a different interpreter.  */
   ui_file *old_stream = m_cli_uiout->set_stream (gdb_stdout);
   SCOPE_EXIT { m_cli_uiout->set_stream (old_stream); };
diff --git a/gdb/cli/cli-style.c b/gdb/cli/cli-style.c
index 5928998..36a8bd9 100644
--- a/gdb/cli/cli-style.c
+++ b/gdb/cli/cli-style.c
@@ -126,6 +126,10 @@ cli_style_option disasm_comment_style ("comment", ui_file_style::WHITE,
 
 /* See cli-style.h.  */
 
+cli_style_option line_number_style ("line-number", ui_file_style::DIM);
+
+/* See cli-style.h.  */
+
 cli_style_option::cli_style_option (const char *name,
 				    ui_file_style::basic_color fg,
 				    ui_file_style::intensity intensity)
@@ -529,6 +533,14 @@ then this style has no effect."),
 					     &style_disasm_show_list,
 					     false);
 
+  line_number_style.add_setshow_commands (no_class, _("\
+Line number display styling.\n\
+Configure colors and display intensity for line numbers\n\
+The \"line-number\" style is used when GDB displays line numbers\n\
+coming from your source code."),
+				       &style_set_list, &style_show_list,
+				       false);
+
   /* Setup 'disassembler address' style and 'disassembler symbol' style,
      these are aliases for 'address' and 'function' styles respectively.  */
   add_alias_cmd ("address", address_prefix_cmds.set, no_class, 0,
diff --git a/gdb/cli/cli-style.h b/gdb/cli/cli-style.h
index 1663b4e..5052b86 100644
--- a/gdb/cli/cli-style.h
+++ b/gdb/cli/cli-style.h
@@ -145,6 +145,9 @@ extern cli_style_option tui_active_border_style;
 /* The style to use for the GDB version string.  */
 extern cli_style_option version_style;
 
+/* The style for a line number.  */
+extern cli_style_option line_number_style;
+
 /* True if source styling is enabled.  */
 extern bool source_styling;
 
diff --git a/gdb/coff-pe-read.c b/gdb/coff-pe-read.c
index 0da4f12..bb85b00 100644
--- a/gdb/coff-pe-read.c
+++ b/gdb/coff-pe-read.c
@@ -174,24 +174,24 @@ add_pe_forwarded_sym (minimal_symbol_reader &reader,
 		      const char *forward_func_name, int ordinal,
 		      const char *dll_name, struct objfile *objfile)
 {
-  struct bound_minimal_symbol msymbol;
   enum minimal_symbol_type msymtype;
   int forward_dll_name_len = strlen (forward_dll_name);
-  short section;
 
   std::string forward_qualified_name = string_printf ("%s!%s",
 						      forward_dll_name,
 						      forward_func_name);
 
-  msymbol = lookup_bound_minimal_symbol (forward_qualified_name.c_str ());
-
+  bound_minimal_symbol msymbol
+    = lookup_minimal_symbol (current_program_space,
+			     forward_qualified_name.c_str ());
   if (!msymbol.minsym)
     {
       int i;
 
       for (i = 0; i < forward_dll_name_len; i++)
 	forward_qualified_name[i] = tolower (forward_qualified_name[i]);
-      msymbol = lookup_bound_minimal_symbol (forward_qualified_name.c_str ());
+      msymbol = lookup_minimal_symbol (current_program_space,
+				       forward_qualified_name.c_str ());
     }
 
   if (!msymbol.minsym)
@@ -214,7 +214,7 @@ add_pe_forwarded_sym (minimal_symbol_reader &reader,
   unrelocated_addr vma = unrelocated_addr (msymbol.value_address ()
 					   - objfile->text_section_offset ());
   msymtype = msymbol.minsym->type ();
-  section = msymbol.minsym->section_index ();
+  int section = msymbol.minsym->section_index ();
 
   /* Generate a (hopefully unique) qualified name using the first part
      of the dll name, e.g. KERNEL32!AddAtomA.  This matches the style
diff --git a/gdb/coffread.c b/gdb/coffread.c
index daae3ff..abe150d 100644
--- a/gdb/coffread.c
+++ b/gdb/coffread.c
@@ -37,6 +37,7 @@
 #include "block.h"
 #include "dictionary.h"
 #include "dwarf2/public.h"
+#include "gdb-stabs.h"
 
 #include "coff-pe-read.h"
 
@@ -121,7 +122,7 @@ static unsigned local_auxesz;
 static int pe_file;
 
 /* Chain of typedefs of pointers to empty struct/union types.
-   They are chained thru the SYMBOL_VALUE_CHAIN.  */
+   They are chained through the SYMBOL_VALUE_CHAIN.  */
 
 static struct symbol *opaque_type_chain[HASHSIZE];
 
@@ -204,6 +205,98 @@ static void read_one_sym (struct coff_symbol *,
 static void coff_symtab_read (minimal_symbol_reader &,
 			      file_ptr, unsigned int, struct objfile *);
 
+/* Scan and build partial symbols for an coff symbol file.
+   The coff file has already been processed to get its minimal symbols.
+
+   This routine is the equivalent of dbx_symfile_init and dbx_symfile_read
+   rolled into one.
+
+   OBJFILE is the object file we are reading symbols from.
+   ADDR is the address relative to which the symbols are (e.g.
+   the base address of the text segment).
+   TEXTADDR is the address of the text section.
+   TEXTSIZE is the size of the text section.
+   STABSECTS is the list of .stab sections in OBJFILE.
+   STABSTROFFSET and STABSTRSIZE define the location in OBJFILE where the
+   .stabstr section exists.
+
+   This routine is mostly copied from dbx_symfile_init and dbx_symfile_read,
+   adjusted for coff details.  */
+
+void
+coffstab_build_psymtabs (struct objfile *objfile,
+			 CORE_ADDR textaddr, unsigned int textsize,
+			 const std::vector<asection *> &stabsects,
+			 file_ptr stabstroffset, unsigned int stabstrsize)
+{
+  int val;
+  bfd *sym_bfd = objfile->obfd.get ();
+  const char *name = bfd_get_filename (sym_bfd);
+  unsigned int stabsize;
+
+  /* Allocate struct to keep track of stab reading.  */
+  dbx_objfile_data_key.emplace (objfile);
+  dbx_symfile_info *key = dbx_objfile_data_key.get (objfile);
+
+  DBX_TEXT_ADDR (objfile) = textaddr;
+  DBX_TEXT_SIZE (objfile) = textsize;
+
+#define	COFF_STABS_SYMBOL_SIZE	12	/* XXX FIXME XXX */
+  DBX_SYMBOL_SIZE (objfile) = COFF_STABS_SYMBOL_SIZE;
+  DBX_STRINGTAB_SIZE (objfile) = stabstrsize;
+
+  if (stabstrsize > bfd_get_size (sym_bfd))
+    error (_("ridiculous string table size: %d bytes"), stabstrsize);
+  DBX_STRINGTAB (objfile) = (char *)
+    obstack_alloc (&objfile->objfile_obstack, stabstrsize + 1);
+  OBJSTAT (objfile, sz_strtab += stabstrsize + 1);
+
+  /* Now read in the string table in one big gulp.  */
+
+  val = bfd_seek (sym_bfd, stabstroffset, SEEK_SET);
+  if (val < 0)
+    perror_with_name (name);
+  val = bfd_read (DBX_STRINGTAB (objfile), stabstrsize, sym_bfd);
+  if (val != stabstrsize)
+    perror_with_name (name);
+
+  stabsread_new_init ();
+  free_header_files ();
+  init_header_files ();
+
+  key->ctx.processing_acc_compilation = 1;
+
+  /* In a coff file, we've already installed the minimal symbols that came
+     from the coff (non-stab) symbol table, so always act like an
+     incremental load here.  */
+  scoped_restore save_symbuf_sections
+    = make_scoped_restore (&key->ctx.symbuf_sections);
+  if (stabsects.size () == 1)
+    {
+      stabsize = bfd_section_size (stabsects[0]);
+      DBX_SYMCOUNT (objfile) = stabsize / DBX_SYMBOL_SIZE (objfile);
+      DBX_SYMTAB_OFFSET (objfile) = stabsects[0]->filepos;
+    }
+  else
+    {
+      DBX_SYMCOUNT (objfile) = 0;
+      for (asection *section : stabsects)
+	{
+	  stabsize = bfd_section_size (section);
+	  DBX_SYMCOUNT (objfile) += stabsize / DBX_SYMBOL_SIZE (objfile);
+	}
+
+      DBX_SYMTAB_OFFSET (objfile) = stabsects[0]->filepos;
+
+      key->ctx.sect_idx = 1;
+      key->ctx.symbuf_sections = &stabsects;
+      key->ctx.symbuf_left = bfd_section_size (stabsects[0]);
+      key->ctx.symbuf_read = 0;
+    }
+
+  read_stabs_symtab (objfile, 0);
+}
+
 /* We are called once per section from coff_symfile_read.  We
    need to examine each section we are passed, check to see
    if it is something we are interested in processing, and
@@ -574,12 +667,13 @@ coff_read_minsyms (file_ptr symtab_offset, unsigned int nsyms,
 		{
 		  int lead
 		    = bfd_get_symbol_leading_char (objfile->obfd.get ());
-		  struct bound_minimal_symbol found;
 
 		  if (lead != '\0' && *name1 == lead)
 		    name1 += 1;
 
-		  found = lookup_minimal_symbol (name1, NULL, objfile);
+		  bound_minimal_symbol found
+		    = lookup_minimal_symbol (current_program_space, name1,
+					     objfile);
 
 		  /* If found, there are symbols named "_imp_foo" and "foo"
 		     respectively in OBJFILE.  Set the type of symbol "foo"
@@ -1643,7 +1737,7 @@ process_coff_symbol (struct coff_symbol *cs,
 		     This is not just a consequence of GDB's type
 		     management; CC and GCC (at least through version
 		     2.4) both output variables of either type char *
-		     or caddr_t with the type refering to the C_TPDEF
+		     or caddr_t with the type referring to the C_TPDEF
 		     symbol for caddr_t.  If a future compiler cleans
 		     this up it GDB is not ready for it yet, but if it
 		     becomes ready we somehow need to disable this
diff --git a/gdb/compile/compile-c-symbols.c b/gdb/compile/compile-c-symbols.c
index 20e8550..7a38d3a 100644
--- a/gdb/compile/compile-c-symbols.c
+++ b/gdb/compile/compile-c-symbols.c
@@ -259,8 +259,7 @@ convert_symbol_sym (compile_c_instance *context, const char *identifier,
    to use and BMSYM is the minimal symbol to convert.  */
 
 static void
-convert_symbol_bmsym (compile_c_instance *context,
-		      struct bound_minimal_symbol bmsym)
+convert_symbol_bmsym (compile_c_instance *context, bound_minimal_symbol bmsym)
 {
   struct minimal_symbol *msym = bmsym.minsym;
   struct objfile *objfile = bmsym.objfile;
@@ -356,9 +355,8 @@ gcc_convert_symbol (void *datum,
 	}
       else if (request == GCC_C_ORACLE_SYMBOL)
 	{
-	  struct bound_minimal_symbol bmsym;
-
-	  bmsym = lookup_minimal_symbol (identifier, NULL, NULL);
+	  bound_minimal_symbol bmsym
+	    = lookup_minimal_symbol (current_program_space, identifier);
 	  if (bmsym.minsym != NULL)
 	    {
 	      convert_symbol_bmsym (context, bmsym);
@@ -413,9 +411,8 @@ gcc_symbol_address (void *datum, struct gcc_c_context *gcc_context,
 	}
       else
 	{
-	  struct bound_minimal_symbol msym;
-
-	  msym = lookup_bound_minimal_symbol (identifier);
+	  bound_minimal_symbol msym
+	    = lookup_minimal_symbol (current_program_space, identifier);
 	  if (msym.minsym != NULL)
 	    {
 	      if (compile_debug)
diff --git a/gdb/compile/compile-cplus-symbols.c b/gdb/compile/compile-cplus-symbols.c
index 9b95cdd..6c482e7 100644
--- a/gdb/compile/compile-cplus-symbols.c
+++ b/gdb/compile/compile-cplus-symbols.c
@@ -275,7 +275,7 @@ convert_symbol_sym (compile_cplus_instance *instance,
 
 static void
 convert_symbol_bmsym (compile_cplus_instance *instance,
-		      struct bound_minimal_symbol bmsym)
+		      bound_minimal_symbol bmsym)
 {
   struct minimal_symbol *msym = bmsym.minsym;
   struct objfile *objfile = bmsym.objfile;
@@ -453,9 +453,8 @@ gcc_cplus_symbol_address (void *datum, struct gcc_cp_context *gcc_context,
 	}
       else
 	{
-	  struct bound_minimal_symbol msym;
-
-	  msym = lookup_bound_minimal_symbol (identifier);
+	  bound_minimal_symbol msym
+	    = lookup_minimal_symbol (current_program_space, identifier);
 	  if (msym.minsym != nullptr)
 	    {
 	      if (compile_debug)
diff --git a/gdb/compile/compile-object-load.c b/gdb/compile/compile-object-load.c
index 08e30be..df48b1c 100644
--- a/gdb/compile/compile-object-load.c
+++ b/gdb/compile/compile-object-load.c
@@ -604,7 +604,6 @@ compile_object_load (const compile_file_names &file_names,
   CORE_ADDR regs_addr, out_value_addr = 0;
   struct symbol *func_sym;
   struct type *func_type;
-  struct bound_minimal_symbol bmsym;
   long storage_needed;
   asymbol **symbol_table, **symp;
   long number_of_symbols, missing_symbols;
@@ -765,7 +764,8 @@ compile_object_load (const compile_file_names &file_names,
 	  continue;
 	}
 
-      bmsym = lookup_minimal_symbol (sym->name, NULL, NULL);
+      bound_minimal_symbol bmsym
+	= lookup_minimal_symbol (current_program_space, sym->name);
       switch (bmsym.minsym == NULL
 	      ? mst_unknown : bmsym.minsym->type ())
 	{
diff --git a/gdb/compile/compile.c b/gdb/compile/compile.c
index 8896b44..89f9790 100644
--- a/gdb/compile/compile.c
+++ b/gdb/compile/compile.c
@@ -303,14 +303,13 @@ compile_file_command (const char *args, int from_tty)
   enum compile_i_scope_types scope
     = options.raw ? COMPILE_I_RAW_SCOPE : COMPILE_I_SIMPLE_SCOPE;
 
-  args = skip_spaces (args);
+  std::string filename = extract_single_filename_arg (args);
 
   /* After processing options, check whether we have a filename.  */
-  if (args == nullptr || args[0] == '\0')
+  if (filename.empty ())
     error (_("You must provide a filename for this command."));
 
-  args = skip_spaces (args);
-  std::string abspath = gdb_abspath (args);
+  std::string abspath = gdb_abspath (filename.c_str ());
   std::string buffer = string_printf ("#include \"%s\"\n", abspath.c_str ());
   eval_compile_command (NULL, buffer.c_str (), scope, NULL);
 }
@@ -328,8 +327,8 @@ compile_file_command_completer (struct cmd_list_element *ignore,
       (tracker, &text, gdb::option::PROCESS_OPTIONS_UNKNOWN_IS_ERROR, group))
     return;
 
-  word = advance_to_filename_complete_word_point (tracker, text);
-  filename_completer (ignore, tracker, text, word);
+  word = advance_to_filename_maybe_quoted_complete_word_point (tracker, text);
+  filename_maybe_quoted_completer (ignore, tracker, text, word);
 }
 
 /* Handle the input from the 'compile code' command.  The
diff --git a/gdb/completer.c b/gdb/completer.c
index 1008ec2..4735aa5 100644
--- a/gdb/completer.c
+++ b/gdb/completer.c
@@ -31,6 +31,7 @@
 #include "linespec.h"
 #include "cli/cli-decode.h"
 #include "gdbsupport/gdb_tilde_expand.h"
+#include "readline/readline.h"
 
 /* FIXME: This is needed because of lookup_cmd_1 ().  We should be
    calling a hook instead so we eliminate the CLI dependency.  */
@@ -48,10 +49,13 @@
 /* Forward declarations.  */
 static const char *completion_find_completion_word (completion_tracker &tracker,
 						    const char *text,
-						    int *quote_char);
+						    int *quote_char,
+						    bool *found_any_quoting);
 
 static void set_rl_completer_word_break_characters (const char *break_chars);
 
+static bool gdb_path_isdir (const char *filename);
+
 /* See completer.h.  */
 
 class completion_tracker::completion_hash_entry
@@ -182,6 +186,17 @@ static const char gdb_completer_file_name_break_characters[] =
   " \t\n*|\"';:?><";
 #endif
 
+/* When completing on file names, for commands that don't accept quoted
+   file names, the only character that can be used as a word separator is
+   the path separator.  Every other character is treated as a literal
+   character within the filename.  */
+static const char gdb_completer_path_break_characters[] =
+#ifdef HAVE_DOS_BASED_FILE_SYSTEM
+  ";";
+#else
+  ":";
+#endif
+
 /* Characters that can be used to quote expressions.  Note that we can't
    include '"' (double quote) because the gdb C parser treats such quoted
    sequences as strings.  */
@@ -203,14 +218,296 @@ noop_completer (struct cmd_list_element *ignore,
 {
 }
 
-/* Complete on filenames.  */
+/* Return 1 if the character at EINDEX in STRING is quoted (there is an
+   unclosed quoted string), or if the character at EINDEX is quoted by a
+   backslash.  */
 
-void
-filename_completer (struct cmd_list_element *ignore,
-		    completion_tracker &tracker,
-		    const char *text, const char *word)
+static int
+gdb_completer_file_name_char_is_quoted (char *string, int eindex)
 {
-  rl_completer_quote_characters = gdb_completer_file_name_quote_characters;
+  for (int i = 0; i <= eindex && string[i] != '\0'; )
+    {
+      char c = string[i];
+
+      if (c == '\\')
+	{
+	  /* The backslash itself is not quoted.  */
+	  if (i >= eindex)
+	    return 0;
+	  ++i;
+	  /* But the next character is.  */
+	  if (i >= eindex)
+	    return 1;
+	  if (string[i] == '\0')
+	    return 0;
+	  ++i;
+	  continue;
+	}
+      else if (strchr (rl_completer_quote_characters, c) != nullptr)
+	{
+	  /* This assumes that extract_string_maybe_quoted can handle a
+	     string quoted with character C.  Currently this is true as the
+	     only characters we put in rl_completer_quote_characters are
+	     single and/or double quotes, both of which
+	     extract_string_maybe_quoted can handle.  */
+	  gdb_assert (c == '"' || c == '\'');
+	  const char *tmp = &string[i];
+	  (void) extract_string_maybe_quoted (&tmp);
+	  i = tmp - string;
+
+	  /* Consider any character within the string we just skipped over
+	     as quoted, though this might not be completely correct; the
+	     opening and closing quotes are not themselves quoted.  But so
+	     far this doesn't seem to have caused any issues.  */
+	  if (i > eindex)
+	    return 1;
+	}
+      else
+	++i;
+    }
+
+  return 0;
+}
+
+/* Removing character escaping from FILENAME.  QUOTE_CHAR is the quote
+   character around FILENAME or the null-character if there is no quoting
+   around FILENAME.  */
+
+static char *
+gdb_completer_file_name_dequote (char *filename, int quote_char)
+{
+  std::string tmp;
+
+  if (quote_char == '\'')
+    {
+      /* There is no backslash escaping within a single quoted string.  In
+	 this case we can just return the input string.  */
+      tmp = filename;
+    }
+  else if (quote_char == '"')
+    {
+      /* Remove escaping from a double quoted string.  */
+      for (const char *input = filename;
+	   *input != '\0';
+	   ++input)
+	{
+	  if (input[0] == '\\'
+	      && input[1] != '\0'
+	      && strchr ("\"\\", input[1]) != nullptr)
+	    ++input;
+	  tmp += *input;
+	}
+    }
+  else
+    {
+      gdb_assert (quote_char == '\0');
+
+      /* Remove escaping from an unquoted string.  */
+      for (const char *input = filename;
+	   *input != '\0';
+	   ++input)
+	{
+	  /* We allow anything to be escaped in an unquoted string.  */
+	  if (*input == '\\')
+	    {
+	      ++input;
+	      if (*input == '\0')
+		break;
+	    }
+
+	  tmp += *input;
+	}
+    }
+
+  return strdup (tmp.c_str ());
+}
+
+/* Implement readline's rl_directory_rewrite_hook.  Remove any quoting from
+   the string *DIRNAME,update *DIRNAME, and return non-zero.  If *DIRNAME
+   doesn't need updating then return zero.  See readline docs for more
+   information.  */
+
+static int
+gdb_completer_directory_rewrite (char **dirname)
+{
+  if (!rl_completion_found_quote)
+    return 0;
+
+  int quote_char = rl_completion_quote_character;
+  char *new_dirname
+    = gdb_completer_file_name_dequote (*dirname, quote_char);
+  free (*dirname);
+  *dirname = new_dirname;
+
+  return 1;
+}
+
+/* Apply character escaping to the filename in TEXT and return a newly
+   allocated buffer containing the possibly updated filename.
+
+   QUOTE_CHAR is the quote character surrounding TEXT, or the
+   null-character if there are no quotes around TEXT.  */
+
+static char *
+gdb_completer_file_name_quote_1 (const char *text, char quote_char)
+{
+  std::string str;
+
+  if (quote_char == '\'')
+    {
+      /* There is no backslash escaping permitted within a single quoted
+	 string, so in this case we can just return the input sting.  */
+      str = text;
+    }
+  else if (quote_char == '"')
+    {
+      /* Add escaping for a double quoted filename.  */
+      for (const char *input = text;
+	   *input != '\0';
+	   ++input)
+	{
+	  if (strchr ("\"\\", *input) != nullptr)
+	    str += '\\';
+	  str += *input;
+	}
+    }
+  else
+    {
+      gdb_assert (quote_char == '\0');
+
+      /* Add escaping for an unquoted filename.  */
+      for (const char *input = text;
+	   *input != '\0';
+	   ++input)
+	{
+	  if (strchr (" \t\n\\\"'", *input)
+	      != nullptr)
+	    str += '\\';
+	  str += *input;
+	}
+    }
+
+  return strdup (str.c_str ());
+}
+
+/* Apply character escaping to the filename in TEXT.  QUOTE_PTR points to
+   the quote character surrounding TEXT, or points to the null-character if
+   there are no quotes around TEXT.  MATCH_TYPE will be one of the readline
+   constants SINGLE_MATCH or MULTI_MATCH depending on if there is one or
+   many completions.
+
+   We also add a trailing character, either a '/' of closing quote, if
+   MATCH_TYPE is 'SINGLE_MATCH'.  We do this because readline will only
+   add this trailing character when completing at the end of a line.  */
+
+static char *
+gdb_completer_file_name_quote (char *text, int match_type, char *quote_ptr)
+{
+  char *result = gdb_completer_file_name_quote_1 (text, *quote_ptr);
+
+  if (match_type == SINGLE_MATCH)
+    {
+      /* Add trailing '/' if TEXT is a directory, otherwise add a closing
+	 quote character matching *QUOTE_PTR.  */
+      char c = (gdb_path_isdir (gdb_tilde_expand (text).c_str ())
+		? '/' : *quote_ptr);
+
+      /* Reallocate RESULT adding C to the end.  But only if C is
+	 interesting, otherwise we can save the reallocation.  */
+      if (c != '\0')
+	{
+	  char buf[2] = { c, '\0' };
+	  result = reconcat (result, result, buf, nullptr);
+	}
+    }
+
+  return result;
+}
+
+/* The function is used to update the completion word MATCH before
+   displaying it to the user in the 'complete' command output.  This
+   function is only used for formatting filename or directory names.
+
+   This function checks to see if the completion word MATCH is a directory,
+   in which case a trailing "/" (forward-slash) is added, otherwise
+   QUOTE_CHAR is added as a trailing quote.
+
+   When ADD_ESCAPES is true any special characters (e.g. whitespace,
+   quotes) will be escaped with a backslash.  See
+   gdb_completer_file_name_quote_1 for full details on escaping.  When
+   ADD_ESCAPES is false then no escaping will be added and MATCH (with the
+   correct trailing character) will be used unmodified.
+
+   Return the updated completion word as a string.  */
+
+static std::string
+filename_match_formatter_1 (const char *match, char quote_char,
+			    bool add_escapes)
+{
+  std::string result;
+  if (add_escapes)
+    {
+      gdb::unique_xmalloc_ptr<char> quoted_match
+	(gdb_completer_file_name_quote_1 (match, quote_char));
+      result = quoted_match.get ();
+    }
+  else
+    result = match;
+
+  if (gdb_path_isdir (gdb_tilde_expand (match).c_str ()))
+    result += "/";
+  else
+    result += quote_char;
+
+  return result;
+}
+
+/* The formatting function used to format the results of a 'complete'
+   command when the result is a filename, but the filename should not have
+   any escape characters added.  Most commands that accept a filename don't
+   expect the filename to be quoted or to contain escape characters.
+
+   See filename_match_formatter_1 for more argument details.  */
+
+static std::string
+filename_unquoted_match_formatter (const char *match, char quote_char)
+{
+  return filename_match_formatter_1 (match, quote_char, false);
+}
+
+/* The formatting function used to format the results of a 'complete'
+   command when the result is a filename, and the filename should have any
+   special character (e.g. whitespace, quotes) within it escaped with a
+   backslash.  A limited number of commands accept this style of filename
+   argument.
+
+   See filename_match_formatter_1 for more argument details.  */
+
+static std::string
+filename_maybe_quoted_match_formatter (const char *match, char quote_char)
+{
+  return filename_match_formatter_1 (match, quote_char, true);
+}
+
+/* Generate filename completions of WORD, storing the completions into
+   TRACKER.  This is used for generating completions for commands that
+   only accept unquoted filenames as well as for commands that accept
+   quoted and escaped filenames.
+
+   When QUOTE_MATCHES is true TRACKER will be given a match formatter
+   function which will add escape characters (if needed) in the results.
+   When QUOTE_MATCHES is false the match formatter provided will not add
+   any escaping to the results.  */
+
+static void
+filename_completer_generate_completions (completion_tracker &tracker,
+					 const char *word,
+					 bool quote_matches)
+{
+  if (quote_matches)
+    tracker.set_match_format_func (filename_maybe_quoted_match_formatter);
+  else
+    tracker.set_match_format_func (filename_unquoted_match_formatter);
 
   int subsequent_name = 0;
   while (1)
@@ -230,37 +527,68 @@ filename_completer (struct cmd_list_element *ignore,
       if (p[strlen (p) - 1] == '~')
 	continue;
 
-      /* Readline appends a trailing '/' if the completion is a
-	 directory.  If this completion request originated from outside
-	 readline (e.g. GDB's 'complete' command), then we append the
-	 trailing '/' ourselves now.  */
-      if (!tracker.from_readline ())
-	{
-	  std::string expanded = gdb_tilde_expand (p_rl);
-	  struct stat finfo;
-	  const bool isdir = (stat (expanded.c_str (), &finfo) == 0
-			      && S_ISDIR (finfo.st_mode));
-	  if (isdir)
-	    p_rl.reset (concat (p_rl.get (), "/", nullptr));
-	}
-
       tracker.add_completion
 	(make_completion_match_str (std::move (p_rl), word, word));
     }
 }
 
-/* The corresponding completer_handle_brkchars
-   implementation.  */
+/* The brkchars callback used when completing filenames that can be
+   quoted.  */
 
 static void
-filename_completer_handle_brkchars (struct cmd_list_element *ignore,
-				    completion_tracker &tracker,
-				    const char *text, const char *word)
+filename_maybe_quoted_completer_handle_brkchars
+	(struct cmd_list_element *ignore, completion_tracker &tracker,
+	 const char *text, const char *word)
 {
   set_rl_completer_word_break_characters
     (gdb_completer_file_name_break_characters);
 
   rl_completer_quote_characters = gdb_completer_file_name_quote_characters;
+  rl_char_is_quoted_p = gdb_completer_file_name_char_is_quoted;
+}
+
+/* Complete on filenames.  This is for commands that accepts possibly
+   quoted filenames.  */
+
+void
+filename_maybe_quoted_completer (struct cmd_list_element *ignore,
+				 completion_tracker &tracker,
+				 const char *text, const char *word)
+{
+  filename_maybe_quoted_completer_handle_brkchars (ignore, tracker,
+						   text, word);
+  filename_completer_generate_completions (tracker, word, true);
+}
+
+/* The brkchars callback used by commands that don't accept quoted
+   filenames.  */
+
+static void
+deprecated_filename_completer_handle_brkchars
+	(struct cmd_list_element *ignore, completion_tracker &tracker,
+	 const char *text, const char *word)
+{
+  gdb_assert (word == nullptr);
+
+  set_rl_completer_word_break_characters (gdb_completer_path_break_characters);
+  rl_completer_quote_characters = nullptr;
+  rl_filename_quoting_desired = 0;
+
+  tracker.set_use_custom_word_point (true);
+  word = advance_to_deprecated_filename_complete_word_point (tracker, text);
+  deprecated_filename_completer (ignore, tracker, text, word);
+}
+
+/* See completer.h.  */
+
+void
+deprecated_filename_completer
+	(struct cmd_list_element *ignore, completion_tracker &tracker,
+	 const char *text, const char *word)
+{
+  gdb_assert (tracker.use_custom_word_point ());
+  gdb_assert (word != nullptr);
+  filename_completer_generate_completions (tracker, word, false);
 }
 
 /* Find the bounds of the current word for completion purposes, and
@@ -275,7 +603,9 @@ filename_completer_handle_brkchars (struct cmd_list_element *ignore,
    boundaries of the current word.  QC, if non-null, is set to the
    opening quote character if we found an unclosed quoted substring,
    '\0' otherwise.  DP, if non-null, is set to the value of the
-   delimiter character that caused a word break.  */
+   delimiter character that caused a word break.  FOUND_ANY_QUOTING, if
+   non-null, is set to true if we found any quote characters (single or
+   double quotes, or a backslash) while finding the completion word.  */
 
 struct gdb_rl_completion_word_info
 {
@@ -286,7 +616,7 @@ struct gdb_rl_completion_word_info
 
 static const char *
 gdb_rl_find_completion_word (struct gdb_rl_completion_word_info *info,
-			     int *qc, int *dp,
+			     int *qc, int *dp, bool *found_any_quoting,
 			     const char *line_buffer)
 {
   int scan, end, delimiter, pass_next, isbrk;
@@ -298,6 +628,8 @@ gdb_rl_find_completion_word (struct gdb_rl_completion_word_info *info,
      the empty string.  */
   if (point == 0)
     {
+      if (found_any_quoting != nullptr)
+	*found_any_quoting = false;
       if (qc != NULL)
 	*qc = '\0';
       if (dp != NULL)
@@ -308,6 +640,7 @@ gdb_rl_find_completion_word (struct gdb_rl_completion_word_info *info,
   end = point;
   delimiter = 0;
   quote_char = '\0';
+  bool found_quote = false;
 
   brkchars = info->word_break_characters;
 
@@ -333,6 +666,7 @@ gdb_rl_find_completion_word (struct gdb_rl_completion_word_info *info,
 	  if (quote_char != '\'' && line_buffer[scan] == '\\')
 	    {
 	      pass_next = 1;
+	      found_quote = true;
 	      continue;
 	    }
 
@@ -353,6 +687,7 @@ gdb_rl_find_completion_word (struct gdb_rl_completion_word_info *info,
 	      /* Found start of a quoted substring.  */
 	      quote_char = line_buffer[scan];
 	      point = scan + 1;
+	      found_quote = true;
 	    }
 	}
     }
@@ -366,8 +701,22 @@ gdb_rl_find_completion_word (struct gdb_rl_completion_word_info *info,
 	{
 	  scan = line_buffer[point];
 
-	  if (strchr (brkchars, scan) != 0)
-	    break;
+	  if (strchr (brkchars, scan) == 0)
+	    continue;
+
+	  /* Call the application-specific function to tell us whether
+	     this word break character is quoted and should be skipped.
+	     The const_cast is needed here to comply with the readline
+	     API.  The only function we register for rl_char_is_quoted_p
+	     treats the input buffer as 'const', so we're OK.  */
+	  if (rl_char_is_quoted_p != nullptr && found_quote
+	      && (*rl_char_is_quoted_p) (const_cast<char *> (line_buffer),
+					 point))
+	    continue;
+
+	  /* Convoluted code, but it avoids an n^2 algorithm with calls
+	     to char_is_quoted.  */
+	  break;
 	}
     }
 
@@ -391,6 +740,8 @@ gdb_rl_find_completion_word (struct gdb_rl_completion_word_info *info,
 	}
     }
 
+  if (found_any_quoting != nullptr)
+    *found_any_quoting = found_quote;
   if (qc != NULL)
     *qc = quote_char;
   if (dp != NULL)
@@ -401,13 +752,23 @@ gdb_rl_find_completion_word (struct gdb_rl_completion_word_info *info,
 
 /* Find the completion word point for TEXT, emulating the algorithm
    readline uses to find the word point, using WORD_BREAK_CHARACTERS
-   as word break characters.  */
+   as word break characters.
+
+   The output argument *FOUND_ANY_QUOTING is set to true if the completion
+   word found either has an opening quote, or contains backslash escaping
+   within it.  Otherwise *FOUND_ANY_QUOTING is set to false.
+
+   The output argument *QC is set to the opening quote character for the
+   completion word that is found, or to the null character if there is no
+   opening quote.  */
 
 static const char *
 advance_to_completion_word (completion_tracker &tracker,
 			    const char *word_break_characters,
 			    const char *quote_characters,
-			    const char *text)
+			    const char *text,
+			    bool *found_any_quoting,
+			    int *qc)
 {
   gdb_rl_completion_word_info info;
 
@@ -417,7 +778,8 @@ advance_to_completion_word (completion_tracker &tracker,
 
   int delimiter;
   const char *start
-    = gdb_rl_find_completion_word (&info, NULL, &delimiter, text);
+    = gdb_rl_find_completion_word (&info, qc, &delimiter, found_any_quoting,
+				   text);
 
   tracker.advance_custom_word_point_by (start - text);
 
@@ -438,18 +800,54 @@ advance_to_expression_complete_word_point (completion_tracker &tracker,
 {
   const char *brk_chars = current_language->word_break_characters ();
   const char *quote_chars = gdb_completer_expression_quote_characters;
-  return advance_to_completion_word (tracker, brk_chars, quote_chars, text);
+  return advance_to_completion_word (tracker, brk_chars, quote_chars,
+				     text, nullptr, nullptr);
 }
 
 /* See completer.h.  */
 
 const char *
-advance_to_filename_complete_word_point (completion_tracker &tracker,
-					 const char *text)
+advance_to_filename_maybe_quoted_complete_word_point
+  (completion_tracker &tracker, const char *text)
 {
   const char *brk_chars = gdb_completer_file_name_break_characters;
   const char *quote_chars = gdb_completer_file_name_quote_characters;
-  return advance_to_completion_word (tracker, brk_chars, quote_chars, text);
+  rl_char_is_quoted_p = gdb_completer_file_name_char_is_quoted;
+  bool found_any_quoting = false;
+  int qc;
+  const char *result
+    = advance_to_completion_word (tracker, brk_chars, quote_chars,
+				  text, &found_any_quoting, &qc);
+  rl_completion_found_quote = found_any_quoting ? 1 : 0;
+  if (qc != '\0')
+    {
+      tracker.set_quote_char (qc);
+      /* If we're completing for readline (not the 'complete' command) then
+	 we want readline to correctly detect the opening quote.  The set
+	 of quote characters will have been set during the brkchars phase,
+	 so now we move the word point back by one (so it's pointing at
+	 the quote character) and now readline will correctly spot the
+	 opening quote.  For the 'complete' command setting the quote
+	 character in the tracker is enough, so there's no need to move
+	 the word point back here.  */
+      if (tracker.from_readline ())
+	tracker.advance_custom_word_point_by (-1);
+    }
+  return result;
+}
+
+/* See completer.h.  */
+
+const char *
+advance_to_deprecated_filename_complete_word_point (completion_tracker &tracker,
+						    const char *text)
+{
+  const char *brk_chars = gdb_completer_path_break_characters;
+  const char *quote_chars = nullptr;
+  rl_filename_quoting_desired = 0;
+
+  return advance_to_completion_word (tracker, brk_chars, quote_chars,
+				     text, nullptr, nullptr);
 }
 
 /* See completer.h.  */
@@ -490,7 +888,8 @@ complete_nested_command_line (completion_tracker &tracker, const char *text)
 
   int quote_char = '\0';
   const char *word = completion_find_completion_word (tracker, text,
-						      &quote_char);
+						      &quote_char,
+						      nullptr);
 
   if (tracker.use_custom_word_point ())
     {
@@ -607,8 +1006,8 @@ complete_files_symbols (completion_tracker &tracker,
 					 symbol_start, word);
       /* If text includes characters which cannot appear in a file
 	 name, they cannot be asking for completion on files.  */
-      if (strcspn (text,
-		   gdb_completer_file_name_break_characters) == text_len)
+      if (strcspn (text, gdb_completer_file_name_break_characters)
+	  == text_len)
 	fn_list = make_source_files_completion_list (text, text);
     }
 
@@ -658,8 +1057,7 @@ complete_source_filenames (const char *text)
 
   /* If text includes characters which cannot appear in a file name,
      the user cannot be asking for completion on files.  */
-  if (strcspn (text,
-	       gdb_completer_file_name_break_characters)
+  if (strcspn (text, gdb_completer_file_name_break_characters)
       == text_len)
     return make_source_files_completion_list (text, text);
 
@@ -1260,6 +1658,7 @@ complete_line_internal_1 (completion_tracker &tracker,
      completing file names then we can switch to the file name quote
      character set (i.e., both single- and double-quotes).  */
   rl_completer_quote_characters = gdb_completer_expression_quote_characters;
+  rl_char_is_quoted_p = nullptr;
 
   /* Decide whether to complete on a list of gdb commands or on
      symbols.  */
@@ -1479,10 +1878,25 @@ int max_completions = 200;
 /* Initial size of the table.  It automagically grows from here.  */
 #define INITIAL_COMPLETION_HTAB_SIZE 200
 
+/* The function is used to update the completion word MATCH before
+   displaying it to the user in the 'complete' command output.  This
+   default function is used in all cases except those where a completion
+   function overrides this function by calling set_match_format_func.
+
+   This function returns MATCH with QUOTE_CHAR appended.  If QUOTE_CHAR is
+   the null-character then the returned string will just contain MATCH.  */
+
+static std::string
+default_match_formatter (const char *match, char quote_char)
+{
+  return std::string (match) + quote_char;
+}
+
 /* See completer.h.  */
 
 completion_tracker::completion_tracker (bool from_readline)
-  : m_from_readline (from_readline)
+  : m_from_readline (from_readline),
+    m_match_format_func (default_match_formatter)
 {
   discard_completions ();
 }
@@ -1692,8 +2106,11 @@ complete (const char *line, char const **word, int *quote_char)
 
   try
     {
+      bool found_any_quoting = false;
+
       *word = completion_find_completion_word (tracker_handle_brkchars,
-					      line, quote_char);
+					       line, quote_char,
+					       &found_any_quoting);
 
       /* Completers that provide a custom word point in the
 	 handle_brkchars phase also compute their completions then.
@@ -1703,6 +2120,12 @@ complete (const char *line, char const **word, int *quote_char)
 	tracker = &tracker_handle_brkchars;
       else
 	{
+	  /* Setting this global matches what readline does within
+	     gen_completion_matches.  We need this set correctly in case
+	     our completion function calls back into readline to perform
+	     completion (e.g. filename_completer does this).  */
+	  rl_completion_found_quote = found_any_quoting;
+
 	  complete_line (tracker_handle_completions, *word, line, strlen (line));
 	  tracker = &tracker_handle_completions;
 	}
@@ -1877,8 +2300,11 @@ default_completer_handle_brkchars (struct cmd_list_element *ignore,
 completer_handle_brkchars_ftype *
 completer_handle_brkchars_func_for_completer (completer_ftype *fn)
 {
-  if (fn == filename_completer)
-    return filename_completer_handle_brkchars;
+  if (fn == deprecated_filename_completer)
+    return deprecated_filename_completer_handle_brkchars;
+
+  if (fn == filename_maybe_quoted_completer)
+    return filename_maybe_quoted_completer_handle_brkchars;
 
   if (fn == location_completer)
     return location_completer_handle_brkchars;
@@ -1926,7 +2352,21 @@ gdb_completion_word_break_characters_throw ()
 
       gdb_custom_word_point_brkchars[0] = rl_line_buffer[rl_point];
       rl_completer_word_break_characters = gdb_custom_word_point_brkchars;
-      rl_completer_quote_characters = NULL;
+
+      /* When performing filename completion we have two options, unquoted
+	 filename completion, in which case the quote characters will have
+	 already been set to nullptr, or quoted filename completion in
+	 which case the quote characters will be set to a string of
+	 characters.  In this second case we need readline to perform the
+	 check for a quoted string so that it sets its internal notion of
+	 the quote character correctly, this allows readline to correctly
+	 add the trailing quote (if necessary) after completing a
+	 filename.
+
+	 For non-filename completion we manually add a trailing quote if
+	 needed, so we clear the quote characters set here.  */
+      if (!rl_filename_completion_desired)
+	rl_completer_quote_characters = NULL;
 
       /* Clear this too, so that if we're completing a quoted string,
 	 readline doesn't consider the quote character a delimiter.
@@ -1973,11 +2413,16 @@ gdb_completion_word_break_characters () noexcept
    handle_brkchars phase (using TRACKER) to figure out the right work break
    characters for the command in TEXT.  QUOTE_CHAR, if non-null, is set to
    the opening quote character if we found an unclosed quoted substring,
-   '\0' otherwise.  */
+   '\0' otherwise.
+
+   The argument *FOUND_ANY_QUOTING is set to true if the completion word is
+   either surrounded by quotes, or contains any backslash escapes, but is
+   only set if TRACKER.use_custom_word_point() is false, otherwise
+   *FOUND_ANY_QUOTING is just set to false.  */
 
 static const char *
 completion_find_completion_word (completion_tracker &tracker, const char *text,
-				 int *quote_char)
+				 int *quote_char, bool *found_any_quoting)
 {
   size_t point = strlen (text);
 
@@ -1987,6 +2432,12 @@ completion_find_completion_word (completion_tracker &tracker, const char *text,
     {
       gdb_assert (tracker.custom_word_point () > 0);
       *quote_char = tracker.quote_char ();
+      /* If use_custom_word_point is set then the completions have already
+	 been calculated, in which case we don't need to have this flag
+	 set correctly, which is lucky as we don't currently have any way
+	 to know if the completion word included any backslash escapes.  */
+      if (found_any_quoting != nullptr)
+	*found_any_quoting = false;
       return text + tracker.custom_word_point ();
     }
 
@@ -1996,7 +2447,8 @@ completion_find_completion_word (completion_tracker &tracker, const char *text,
   info.quote_characters = rl_completer_quote_characters;
   info.basic_quote_characters = rl_basic_quote_characters;
 
-  return gdb_rl_find_completion_word (&info, quote_char, NULL, text);
+  return gdb_rl_find_completion_word (&info, quote_char, nullptr,
+				      found_any_quoting, text);
 }
 
 /* See completer.h.  */
@@ -2152,31 +2604,44 @@ completion_tracker::build_completion_result (const char *text,
   /* Build replacement word, based on the LCD.  */
 
   recompute_lowest_common_denominator ();
-  match_list[0]
-    = expand_preserving_ws (text, end - start,
-			    m_lowest_common_denominator);
+  if (rl_filename_completion_desired)
+    match_list[0] = xstrdup (m_lowest_common_denominator);
+  else
+    match_list[0]
+      = expand_preserving_ws (text, end - start, m_lowest_common_denominator);
 
   if (m_lowest_common_denominator_unique)
     {
-      /* We don't rely on readline appending the quote char as
-	 delimiter as then readline wouldn't append the ' ' after the
-	 completion.  */
-      char buf[2] = { (char) quote_char () };
+      bool completion_suppress_append;
 
-      match_list[0] = reconcat (match_list[0], match_list[0],
-				buf, (char *) NULL);
-      match_list[1] = NULL;
+      /* For filename completion we rely on readline to append the closing
+	 quote.  While for other types of completion we append the closing
+	 quote here.  */
+      if (from_readline () && !rl_filename_completion_desired)
+	{
+	  /* We don't rely on readline appending the quote char as
+	     delimiter as then readline wouldn't append the ' ' after the
+	     completion.  */
+	  char buf[2] = { (char) quote_char (), '\0' };
+
+	  match_list[0] = reconcat (match_list[0], match_list[0], buf,
+				    (char *) nullptr);
+
+	  /* If the tracker wants to, or we already have a space at the end
+	     of the match, tell readline to skip appending another.  */
+	  char *match = match_list[0];
+	  completion_suppress_append
+	    = (suppress_append_ws ()
+	       || (match[0] != '\0'
+		   && match[strlen (match) - 1] == ' '));
+	}
+      else
+	completion_suppress_append = false;
 
-      /* If the tracker wants to, or we already have a space at the
-	 end of the match, tell readline to skip appending
-	 another.  */
-      char *match = match_list[0];
-      bool completion_suppress_append
-	= (suppress_append_ws ()
-	   || (match[0] != '\0'
-	       && match[strlen (match) - 1] == ' '));
+      match_list[1] = nullptr;
 
-      return completion_result (match_list, 1, completion_suppress_append);
+      return completion_result (match_list, 1, completion_suppress_append,
+				m_match_format_func);
     }
   else
     {
@@ -2213,7 +2678,8 @@ completion_tracker::build_completion_result (const char *text,
       htab_traverse_noresize (m_entries_hash.get (), func, &builder);
       match_list[builder.index] = NULL;
 
-      return completion_result (match_list, builder.index - 1, false);
+      return completion_result (match_list, builder.index - 1, false,
+				m_match_format_func);
     }
 }
 
@@ -2221,18 +2687,23 @@ completion_tracker::build_completion_result (const char *text,
 
 completion_result::completion_result ()
   : match_list (NULL), number_matches (0),
-    completion_suppress_append (false)
+    completion_suppress_append (false),
+    m_match_formatter (default_match_formatter)
 {}
 
 /* See completer.h  */
 
 completion_result::completion_result (char **match_list_,
 				      size_t number_matches_,
-				      bool completion_suppress_append_)
+				      bool completion_suppress_append_,
+				      match_format_func_t match_formatter_)
   : match_list (match_list_),
     number_matches (number_matches_),
-    completion_suppress_append (completion_suppress_append_)
-{}
+    completion_suppress_append (completion_suppress_append_),
+    m_match_formatter (match_formatter_)
+{
+  gdb_assert (m_match_formatter != nullptr);
+}
 
 /* See completer.h  */
 
@@ -2245,10 +2716,12 @@ completion_result::~completion_result ()
 
 completion_result::completion_result (completion_result &&rhs) noexcept
   : match_list (rhs.match_list),
-    number_matches (rhs.number_matches)
+    number_matches (rhs.number_matches),
+    m_match_formatter (rhs.m_match_formatter)
 {
   rhs.match_list = NULL;
   rhs.number_matches = 0;
+  rhs.m_match_formatter = default_match_formatter;
 }
 
 /* See completer.h  */
@@ -2290,6 +2763,38 @@ completion_result::reset_match_list ()
     }
 }
 
+/* See completer.h  */
+
+void
+completion_result::print_matches (const std::string &prefix,
+				  const char *word, int quote_char)
+{
+  this->sort_match_list ();
+
+  size_t off = this->number_matches == 1 ? 0 : 1;
+
+  for (size_t i = 0; i < this->number_matches; i++)
+    {
+      gdb_assert (this->m_match_formatter != nullptr);
+      std::string formatted_match
+	= this->m_match_formatter (this->match_list[i + off],
+				   (char) quote_char);
+
+      printf_unfiltered ("%s%s\n", prefix.c_str (),
+			 formatted_match.c_str ());
+    }
+
+  if (this->number_matches == max_completions)
+    {
+      /* PREFIX and WORD are included in the output so that emacs will
+	 include the message in the output.  */
+      printf_unfiltered (_("%s%s %s\n"),
+			 prefix.c_str (), word,
+			 get_max_completions_reached_message ());
+    }
+
+}
+
 /* Helper for gdb_rl_attempted_completion_function, which does most of
    the work.  This is called by readline to build the match list array
    and to determine the lowest common denominator.  The real matches
@@ -2469,10 +2974,10 @@ gdb_display_match_list_pager (int lines,
     return 0;
 }
 
-/* Return non-zero if FILENAME is a directory.
+/* Return true if FILENAME is a directory.
    Based on readline/complete.c:path_isdir.  */
 
-static int
+static bool
 gdb_path_isdir (const char *filename)
 {
   struct stat finfo;
@@ -3017,6 +3522,12 @@ _initialize_completer ()
   rl_attempted_completion_function = gdb_rl_attempted_completion_function;
   set_rl_completer_word_break_characters (default_word_break_characters ());
 
+  /* Setup readline globals relating to filename completion.  */
+  rl_filename_quote_characters = " \t\n\\\"'";
+  rl_filename_dequoting_function = gdb_completer_file_name_dequote;
+  rl_filename_quoting_function = gdb_completer_file_name_quote;
+  rl_directory_rewrite_hook = gdb_completer_directory_rewrite;
+
   add_setshow_zuinteger_unlimited_cmd ("max-completions", no_class,
 				       &max_completions, _("\
 Set maximum number of completion candidates."), _("\
diff --git a/gdb/completer.h b/gdb/completer.h
index 98a12f3..44eafc4 100644
--- a/gdb/completer.h
+++ b/gdb/completer.h
@@ -247,12 +247,24 @@ struct completion_match_result
 
 struct completion_result
 {
+  /* The type of a function that is used to format completion results when
+     using the 'complete' command.  MATCH is the completion word to be
+     printed, and QUOTE_CHAR is a trailing quote character to (possibly)
+     add at the end of MATCH.  QUOTE_CHAR can be the null-character in
+     which case no trailing quote should be added.
+
+     Return the possibly modified completion match word which should be
+     presented to the user.  */
+  using match_format_func_t = std::string (*) (const char *match,
+					       char quote_char);
+
   /* Create an empty result.  */
   completion_result ();
 
   /* Create a result.  */
   completion_result (char **match_list, size_t number_matches,
-		     bool completion_suppress_append);
+		     bool completion_suppress_append,
+		     match_format_func_t match_format_func);
 
   /* Destroy a result.  */
   ~completion_result ();
@@ -268,6 +280,24 @@ struct completion_result
   /* Sort the match list.  */
   void sort_match_list ();
 
+  /* Called to display all matches (used by the 'complete' command).
+     PREFIX is everything before the completion word.  WORD is the word
+     being completed, this is only used if we reach the maximum number of
+     completions, otherwise, each line of output consists of PREFIX
+     followed by one of the possible completion words.
+
+     The QUOTE_CHAR is usually appended after each possible completion
+     word and should be the quote character that appears before the
+     completion word, or the null-character if there is no quote before
+     the completion word.
+
+     The QUOTE_CHAR is not always appended to the completion output.  For
+     example, filename completions will not append QUOTE_CHAR if the
+     completion is a directory name.  This is all handled by calling this
+     function.  */
+  void print_matches (const std::string &prefix, const char *word,
+		      int quote_char);
+
 private:
   /* Destroy the match list array and its contents.  */
   void reset_match_list ();
@@ -292,6 +322,12 @@ public:
   /* Whether readline should suppress appending a whitespace, when
      there's only one possible completion.  */
   bool completion_suppress_append;
+
+private:
+  /* A function which formats a single completion match ready for display
+     as part of the 'complete' command output.  Different completion
+     functions can set different formatter functions.  */
+  match_format_func_t m_match_formatter;
 };
 
 /* Object used by completers to build a completion match list to hand
@@ -428,6 +464,14 @@ public:
   bool from_readline () const
   { return m_from_readline; }
 
+  /* Set the function used to format the completion word before displaying
+     it to the user to F, this is used by the 'complete' command.  */
+  void set_match_format_func (completion_result::match_format_func_t f)
+  {
+    gdb_assert (f != nullptr);
+    m_match_format_func = f;
+  }
+
 private:
 
   /* The type that we place into the m_entries_hash hash table.  */
@@ -522,6 +566,10 @@ private:
      interactively. The 'complete' command is a way to generate completions
      not to be displayed by readline.  */
   bool m_from_readline;
+
+  /* The function used to format the completion word before it is printed
+     in the 'complete' command output.  */
+  completion_result::match_format_func_t m_match_format_func;
 };
 
 /* Return a string to hand off to readline as a completion match
@@ -563,19 +611,45 @@ extern completion_result
 const char *advance_to_expression_complete_word_point
   (completion_tracker &tracker, const char *text);
 
-/* Assuming TEXT is an filename, find the completion word point for
-   TEXT, emulating the algorithm readline uses to find the word
-   point.  */
-extern const char *advance_to_filename_complete_word_point
+/* Assuming TEXT is a filename, find the completion word point for TEXT,
+   emulating the algorithm readline uses to find the word point.  The
+   filenames that are located by this function assume no filename
+   quoting, this function should be paired with filename_completer.  */
+extern const char *advance_to_deprecated_filename_complete_word_point
+  (completion_tracker &tracker, const char *text);
+
+/* Assuming TEXT is a filename, find the completion word point for TEXT,
+   emulating the algorithm readline uses to find the word point.  The
+   filenames that are located by this function assume that filenames
+   can be quoted, this function should be paired with
+   filename_maybe_quoted_completer.  */
+extern const char *advance_to_filename_maybe_quoted_complete_word_point
   (completion_tracker &tracker, const char *text);
 
 extern void noop_completer (struct cmd_list_element *,
 			    completion_tracker &tracker,
 			    const char *, const char *);
 
-extern void filename_completer (struct cmd_list_element *,
-				completion_tracker &tracker,
-				const char *, const char *);
+/* Filename completer for commands that don't accept quoted filenames.
+   This completer does support completing a list of filenames that are
+   separated with the path separator (':' for UNIX and ';' for MS-DOS).
+
+   When adding a new command it is better to write the command so it
+   accepts quoted filenames and use filename_maybe_quoted_completer, for
+   examples see the 'exec' and 'exec-file' commands.  */
+
+extern void deprecated_filename_completer
+  (struct cmd_list_element *, completion_tracker &tracker,
+   const char *, const char *);
+
+/* Filename completer for commands where the filename argument can be
+   quoted.  This completer also supports completing a list of filenames
+   that are separated with the path separator (':' for UNIX and ';' for
+   MS-DOS).  */
+
+extern void filename_maybe_quoted_completer (struct cmd_list_element *,
+					     completion_tracker &tracker,
+					     const char *, const char *);
 
 extern void expression_completer (struct cmd_list_element *,
 				  completion_tracker &tracker,
diff --git a/gdb/config.in b/gdb/config.in
index 0c144c8..59a5da3 100644
--- a/gdb/config.in
+++ b/gdb/config.in
@@ -46,6 +46,9 @@
    language is requested. */
 #undef ENABLE_NLS
 
+/* Additional targets configured into GDB. */
+#undef ENABLE_TARGETS
+
 /* The .gdbearlyinit filename. */
 #undef GDBEARLYINIT
 
@@ -481,6 +484,9 @@
 /* Define to 1 if `pl_tdname' is a member of `struct ptrace_lwpinfo'. */
 #undef HAVE_STRUCT_PTRACE_LWPINFO_PL_TDNAME
 
+/* Define to 1 if `variant.ptwrite' is a member of `struct pt_event'. */
+#undef HAVE_STRUCT_PT_EVENT_VARIANT_PTWRITE
+
 /* Define to 1 if `enabled' is a member of `struct pt_insn'. */
 #undef HAVE_STRUCT_PT_INSN_ENABLED
 
diff --git a/gdb/configure b/gdb/configure
index 62deef2..ec9bbd3 100755
--- a/gdb/configure
+++ b/gdb/configure
@@ -21512,6 +21512,17 @@ _ACEOF
 
 fi
 
+      ac_fn_c_check_member "$LINENO" "struct pt_event" "variant.ptwrite" "ac_cv_member_struct_pt_event_variant_ptwrite" "#include <intel-pt.h>
+"
+if test "x$ac_cv_member_struct_pt_event_variant_ptwrite" = xyes; then :
+
+cat >>confdefs.h <<_ACEOF
+#define HAVE_STRUCT_PT_EVENT_VARIANT_PTWRITE 1
+_ACEOF
+
+
+fi
+
       LIBS=$save_LIBS
     fi
   fi
@@ -24817,11 +24828,19 @@ if test "${enable_targets+set}" = set; then :
   yes | "") as_fn_error $? "enable-targets option must specify target names or 'all'" "$LINENO" 5
             ;;
   no)       enable_targets= ;;
-  *)        enable_targets=$enableval ;;
+  *)
+	enable_targets=$enableval
+
+cat >>confdefs.h <<_ACEOF
+#define ENABLE_TARGETS "$enable_targets"
+_ACEOF
+
+	;;
 esac
 fi
 
 
+
 # Check whether --enable-64-bit-bfd was given.
 if test "${enable_64_bit_bfd+set}" = set; then :
   enableval=$enable_64_bit_bfd; case $enableval in #(
@@ -24993,19 +25012,19 @@ if test "$gdb_require_amd_dbgapi" = true \
   # version of the library.
 
 pkg_failed=no
-{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for amd-dbgapi >= 0.68.0" >&5
-$as_echo_n "checking for amd-dbgapi >= 0.68.0... " >&6; }
+{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for amd-dbgapi >= 0.75.0" >&5
+$as_echo_n "checking for amd-dbgapi >= 0.75.0... " >&6; }
 
 if test -n "$AMD_DBGAPI_CFLAGS"; then
     pkg_cv_AMD_DBGAPI_CFLAGS="$AMD_DBGAPI_CFLAGS"
  elif test -n "$PKG_CONFIG"; then
     if test -n "$PKG_CONFIG" && \
-    { { $as_echo "$as_me:${as_lineno-$LINENO}: \$PKG_CONFIG --exists --print-errors \"amd-dbgapi >= 0.68.0\""; } >&5
-  ($PKG_CONFIG --exists --print-errors "amd-dbgapi >= 0.68.0") 2>&5
+    { { $as_echo "$as_me:${as_lineno-$LINENO}: \$PKG_CONFIG --exists --print-errors \"amd-dbgapi >= 0.75.0\""; } >&5
+  ($PKG_CONFIG --exists --print-errors "amd-dbgapi >= 0.75.0") 2>&5
   ac_status=$?
   $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5
   test $ac_status = 0; }; then
-  pkg_cv_AMD_DBGAPI_CFLAGS=`$PKG_CONFIG --cflags "amd-dbgapi >= 0.68.0" 2>/dev/null`
+  pkg_cv_AMD_DBGAPI_CFLAGS=`$PKG_CONFIG --cflags "amd-dbgapi >= 0.75.0" 2>/dev/null`
 		      test "x$?" != "x0" && pkg_failed=yes
 else
   pkg_failed=yes
@@ -25017,12 +25036,12 @@ if test -n "$AMD_DBGAPI_LIBS"; then
     pkg_cv_AMD_DBGAPI_LIBS="$AMD_DBGAPI_LIBS"
  elif test -n "$PKG_CONFIG"; then
     if test -n "$PKG_CONFIG" && \
-    { { $as_echo "$as_me:${as_lineno-$LINENO}: \$PKG_CONFIG --exists --print-errors \"amd-dbgapi >= 0.68.0\""; } >&5
-  ($PKG_CONFIG --exists --print-errors "amd-dbgapi >= 0.68.0") 2>&5
+    { { $as_echo "$as_me:${as_lineno-$LINENO}: \$PKG_CONFIG --exists --print-errors \"amd-dbgapi >= 0.75.0\""; } >&5
+  ($PKG_CONFIG --exists --print-errors "amd-dbgapi >= 0.75.0") 2>&5
   ac_status=$?
   $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5
   test $ac_status = 0; }; then
-  pkg_cv_AMD_DBGAPI_LIBS=`$PKG_CONFIG --libs "amd-dbgapi >= 0.68.0" 2>/dev/null`
+  pkg_cv_AMD_DBGAPI_LIBS=`$PKG_CONFIG --libs "amd-dbgapi >= 0.75.0" 2>/dev/null`
 		      test "x$?" != "x0" && pkg_failed=yes
 else
   pkg_failed=yes
@@ -25067,9 +25086,9 @@ else
         _pkg_short_errors_supported=no
 fi
         if test $_pkg_short_errors_supported = yes; then
-	        AMD_DBGAPI_PKG_ERRORS=`$PKG_CONFIG --short-errors --print-errors --cflags --libs "amd-dbgapi >= 0.68.0" 2>&1`
+	        AMD_DBGAPI_PKG_ERRORS=`$PKG_CONFIG --short-errors --print-errors --cflags --libs "amd-dbgapi >= 0.75.0" 2>&1`
         else
-	        AMD_DBGAPI_PKG_ERRORS=`$PKG_CONFIG --print-errors --cflags --libs "amd-dbgapi >= 0.68.0" 2>&1`
+	        AMD_DBGAPI_PKG_ERRORS=`$PKG_CONFIG --print-errors --cflags --libs "amd-dbgapi >= 0.75.0" 2>&1`
         fi
 	# Put the nasty error message in config.log where it belongs
 	echo "$AMD_DBGAPI_PKG_ERRORS" >&5
diff --git a/gdb/configure.ac b/gdb/configure.ac
index e70edb7..21f5dc8 100644
--- a/gdb/configure.ac
+++ b/gdb/configure.ac
@@ -184,9 +184,14 @@ AS_HELP_STRING([--enable-targets=TARGETS], [alternative target configurations]),
   yes | "") AC_MSG_ERROR(enable-targets option must specify target names or 'all')
             ;;
   no)       enable_targets= ;;
-  *)        enable_targets=$enableval ;;
+  *)
+	enable_targets=$enableval
+	AC_DEFINE_UNQUOTED(ENABLE_TARGETS, "$enable_targets",
+			   Additional targets configured into GDB. )
+	;;
 esac])
 
+
 BFD_64_BIT
 
 # Provide defaults for some variables set by the per-host and per-target
@@ -281,7 +286,7 @@ if test "$gdb_require_amd_dbgapi" = true \
   # stability until amd-dbgapi hits 1.0, but for convenience, still check for
   # greater or equal that version.  It can be handy when testing with a newer
   # version of the library.
-  PKG_CHECK_MODULES([AMD_DBGAPI], [amd-dbgapi >= 0.68.0],
+  PKG_CHECK_MODULES([AMD_DBGAPI], [amd-dbgapi >= 0.75.0],
 		    [has_amd_dbgapi=yes], [has_amd_dbgapi=no])
 
   if test "$has_amd_dbgapi" = "yes"; then
diff --git a/gdb/configure.host b/gdb/configure.host
index da71675..22855cd 100644
--- a/gdb/configure.host
+++ b/gdb/configure.host
@@ -110,7 +110,6 @@ i[34567]86-*-mingw32*)	gdb_host=mingw
 i[34567]86-*-msdosdjgpp*) gdb_host=go32 ;;
 i[34567]86-*-linux*)	gdb_host=linux ;;
 i[34567]86-*-gnu*)	gdb_host=i386gnu ;;
-i[3456]86-*-nto*) 	gdb_host=nto ;;
 i[34567]86-*-openbsd*)	gdb_host=obsd ;;
 i[34567]86-*-solaris2* | x86_64-*-solaris2*)
 			gdb_host=sol2 ;;
diff --git a/gdb/configure.nat b/gdb/configure.nat
index f88c9c2..9e78091 100644
--- a/gdb/configure.nat
+++ b/gdb/configure.nat
@@ -426,15 +426,6 @@ case ${gdb_host} in
 
 	esac
 	;;
-    nto)
-	case ${gdb_host_cpu} in
-	    i386)
-		# Host: Intel 386 running QNX.
-		NATDEPFILES='nto-procfs.o'
-		NAT_FILE='config/nm-nto.h'
-		;;
-	esac
-	;;
     obsd)
 	case ${gdb_host_cpu} in
 	    i386)
diff --git a/gdb/configure.tgt b/gdb/configure.tgt
index 5fb14b6..8d85a59 100644
--- a/gdb/configure.tgt
+++ b/gdb/configure.tgt
@@ -305,11 +305,6 @@ i[34567]86-*-openbsd*)
 	# Target: OpenBSD/i386
 	gdb_target_obs="i386-bsd-tdep.o i386-obsd-tdep.o bsd-uthread.o"
 	;;
-i[34567]86-*-nto*)
-	# Target: Intel 386 running qnx6.
-	gdb_target_obs="solib-svr4.o \
-			i386-nto-tdep.o nto-tdep.o"
-	;;
 i[34567]86-*-solaris2* | x86_64-*-solaris2*)
 	# Target: Solaris x86_64
 	gdb_target_obs="${i386_tobjs} ${amd64_tobjs} \
@@ -809,7 +804,6 @@ case "${targ}" in
 		gdb_osabi=GDB_OSABI_FREEBSD ;;
 *-*-linux* | *-*-uclinux*)
 		gdb_osabi=GDB_OSABI_LINUX ;;
-*-*-nto*)	gdb_osabi=GDB_OSABI_QNXNTO ;;
 m68*-*-openbsd* | m88*-*-openbsd* | vax-*-openbsd*) ;;
 *-*-openbsd*)	gdb_osabi=GDB_OSABI_OPENBSD ;;
 *-*-solaris*)	gdb_osabi=GDB_OSABI_SOLARIS ;;
diff --git a/gdb/contrib/ari/gdb_ari.sh b/gdb/contrib/ari/gdb_ari.sh
index d690d29..5ed7d61 100755
--- a/gdb/contrib/ari/gdb_ari.sh
+++ b/gdb/contrib/ari/gdb_ari.sh
@@ -243,7 +243,7 @@ END {
 	if (seen[file] && (skipped[bug_n_file] < skip[bug_n_file])) {
 	    # ari.*.bug: <FILE>:<LINE>: <CATEGORY>: <BUG>: <DOC>
 	    b = file " missing " bug
-	    print_bug(file, 0, "", "internal", file " missing " bug, "Expecting " skip[bug_n_file] " occurances of bug " bug " in file " file ", only found " skipped[bug_n_file])
+	    print_bug(file, 0, "", "internal", file " missing " bug, "Expecting " skip[bug_n_file] " occurrences of bug " bug " in file " file ", only found " skipped[bug_n_file])
 	}
     }
 }
diff --git a/gdb/contrib/common-misspellings.txt b/gdb/contrib/common-misspellings.txt
new file mode 100644
index 0000000..62e2c51
--- /dev/null
+++ b/gdb/contrib/common-misspellings.txt
@@ -0,0 +1,18 @@
+# Copyright (C) 2024 Free Software Foundation, Inc.
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
+# Common spelling mistakes.
+
+inbetween->between, in between, in-between
+sofar->so far
diff --git a/gdb/contrib/gdb-add-index.sh b/gdb/contrib/gdb-add-index.sh
index 80bc495..bd5a8f7 100755
--- a/gdb/contrib/gdb-add-index.sh
+++ b/gdb/contrib/gdb-add-index.sh
@@ -113,7 +113,7 @@ trap "rm -f $tmp_files" 0
 
 $GDB --batch -nx -iex 'set auto-load no' \
     -iex 'set debuginfod enabled off' \
-    -ex "file $file" -ex "save gdb-index $dwarf5 $dir" || {
+    -ex "file '$file'" -ex "save gdb-index $dwarf5 '$dir'" || {
     # Just in case.
     status=$?
     echo "$myname: gdb error generating index for $file" 1>&2
@@ -143,35 +143,32 @@ handle_file ()
 	    index="$index5"
 	    section=".debug_names"
 	fi
-	debugstradd=false
-	debugstrupdate=false
 	if test -s "$debugstr"; then
 	    if ! $OBJCOPY --dump-section .debug_str="$debugstrmerge" "$fpath" \
-		 /dev/null 2>$debugstrerr; then
-		cat >&2 $debugstrerr
+		 /dev/null 2> "$debugstrerr"; then
+		cat >&2 "$debugstrerr"
 		exit 1
 	    fi
+	    cat "$debugstr" >>"$debugstrmerge"
 	    if grep -q "can't dump section '.debug_str' - it does not exist" \
-		    $debugstrerr; then
-		debugstradd=true
+		    "$debugstrerr"; then
+		$OBJCOPY --add-section $section="$index" \
+			 --set-section-flags $section=readonly \
+			 --add-section .debug_str="$debugstrmerge" \
+		         --set-section-flags .debug_str=readonly \
+			 "$fpath" "$fpath"
 	    else
-		debugstrupdate=true
-		cat >&2 $debugstrerr
+		$OBJCOPY --add-section $section="$index" \
+			 --set-section-flags $section=readonly \
+			 --update-section .debug_str="$debugstrmerge" \
+			 "$fpath" "$fpath"
 	    fi
-	    cat "$debugstr" >>"$debugstrmerge"
+	else
+	    $OBJCOPY --add-section $section="$index" \
+		     --set-section-flags $section=readonly \
+		     "$fpath" "$fpath"
 	fi
 
-	$OBJCOPY --add-section $section="$index" \
-		 --set-section-flags $section=readonly \
-		 $(if $debugstradd; then \
-		       echo --add-section .debug_str="$debugstrmerge"; \
-		       echo --set-section-flags .debug_str=readonly; \
-		   fi; \
-		   if $debugstrupdate; then \
-		       echo --update-section .debug_str="$debugstrmerge"; \
-		   fi) \
-		 "$fpath" "$fpath"
-
 	status=$?
     else
 	echo "$myname: No index was created for $fpath" 1>&2
diff --git a/gdb/contrib/spellcheck.sh b/gdb/contrib/spellcheck.sh
new file mode 100755
index 0000000..4203333
--- /dev/null
+++ b/gdb/contrib/spellcheck.sh
@@ -0,0 +1,353 @@
+#!/bin/bash
+
+# Copyright (C) 2024 Free Software Foundation, Inc.
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
+# Script to auto-correct common spelling mistakes.
+#
+# Example usage:
+# $ ./gdb/contrib/spellcheck.sh gdb*
+
+scriptdir=$(cd "$(dirname "$0")" || exit; pwd -P)
+
+url=https://en.wikipedia.org/wiki/Wikipedia:Lists_of_common_misspellings/For_machines
+cache_dir=$scriptdir/../../.git
+cache_file=wikipedia-common-misspellings.txt
+dictionary=$cache_dir/$cache_file
+local_dictionary=$scriptdir/common-misspellings.txt
+
+# Separators: space, slash, tab, colon, comma.
+declare -a grep_separators
+grep_separators=(
+    " "
+    "/"
+    "	"
+    ":"
+    ","
+)
+declare -a sed_separators
+sed_separators=(
+    " "
+    "/"
+    "\t"
+    ":"
+    ","
+)
+
+join ()
+{
+    local or
+    or="$1"
+    shift
+
+    local res
+    res=""
+
+    local first
+    first=true
+
+    for item in "$@"; do
+	if $first; then
+	    first=false
+	    res="$item"
+	else
+	    res="$res$or$item"
+	fi
+    done
+
+    echo "$res"
+}
+
+grep_or="|"
+sed_or="\|"
+grep_separator=$(join $grep_or "${grep_separators[@]}")
+sed_separator=$(join $sed_or "${sed_separators[@]}")
+
+usage ()
+{
+    echo "usage: $(basename "$0") <file|dir>+"
+}
+
+make_absolute ()
+{
+    local arg
+    arg="$1"
+
+    case "$arg" in
+	/*)
+	;;
+	*)
+	    arg=$(pwd -P)/"$arg"
+	    ;;
+    esac
+
+    echo "$arg"
+}
+
+parse_args ()
+{
+    local files
+    files=$(mktemp)
+    trap 'rm -f "$files"' EXIT
+
+    if [ $# -eq -0 ]; then
+	usage
+	exit 1
+    fi
+
+    local arg
+    for arg in "$@"; do
+	if [ -f "$arg" ]; then
+	    arg=$(make_absolute "$arg")
+	    readlink -e "$arg" \
+		     >> "$files"
+	elif [ -d "$arg" ]; then
+	    arg=$(make_absolute "$arg")
+	    local f
+	    find "$arg" -type f -exec readlink -e {} \; \
+		 >> "$files"
+	else
+	    echo "Not a file or directory: $arg"
+	    exit 1
+	fi
+    done
+
+    mapfile -t unique_files \
+	    < <(sort -u "$files" \
+		    | grep -v ChangeLog)
+
+    rm -f "$files"
+    trap "" EXIT
+}
+
+get_dictionary ()
+{
+    if [ -f "$dictionary" ]; then
+	return
+    fi
+
+    local webpage
+    webpage=$(mktemp)
+    trap 'rm -f "$webpage"' EXIT
+
+    # Download web page containing table.
+    wget $url -O "$webpage"
+
+    # Extract table from web page.
+    awk '/<pre>/,/<\/pre>/' "$webpage" \
+	| sed 's/<pre>//;s/<\/pre>//' \
+	| grep -E -v "^$" \
+	       > "$dictionary"
+
+    rm -f "$webpage"
+    trap "" EXIT
+}
+
+output_local_dictionary ()
+{
+    # Filter out comments and empty lines.
+    grep -E -v \
+	 "^#|^$" \
+	 "$local_dictionary"
+}
+
+output_dictionaries ()
+{
+    output_local_dictionary
+    cat "$dictionary"
+}
+
+parse_dictionary ()
+{
+    # Parse dictionary.
+    mapfile -t words \
+	    < <(awk -F '->' '{print $1}' <(output_dictionaries))
+    mapfile -t replacements \
+	    < <(awk -F '->' '{print $2}' <(output_dictionaries))
+}
+
+find_files_matching_words ()
+{
+    local pat
+    pat=""
+    for word in "${words[@]}"; do
+	if [ "$pat" = "" ]; then
+	    pat="$word"
+	else
+	    pat="$pat|$word"
+	fi
+    done
+    pat="($pat)"
+
+    local sep
+    sep=$grep_separator
+
+    pat="(^|$sep)$pat($sep|$)"
+
+    grep -E \
+	-l \
+	"$pat" \
+	"$@"
+}
+
+find_files_matching_word ()
+{
+    local pat
+    pat="$1"
+    shift
+
+    local sep
+    sep=$grep_separator
+
+    pat="(^|$sep)$pat($sep|$)"
+
+    grep -E \
+	-l \
+	"$pat" \
+	"$@"
+}
+
+replace_word_in_file ()
+{
+    local word
+    word="$1"
+
+    local replacement
+    replacement="$2"
+
+    local file
+    file="$3"
+
+    local sep
+    sep=$sed_separator
+
+    # Save separator.
+    sep="\($sep\)"
+
+    local repl1 repl2 repl3
+
+    repl1="s%$sep$word$sep%\1$replacement\2%g"
+
+    repl2="s%^$word$sep%$replacement\1%"
+
+    repl3="s%$sep$word$%\1$replacement%"
+
+    sed -i \
+	"$repl1;$repl2;$repl3" \
+	"$file"
+}
+
+replace_word_in_files ()
+{
+    local word
+    word="$1"
+
+    local replacement
+    replacement="$2"
+
+    shift 2
+
+    local id
+    id="$word -> $replacement"
+
+    # Reduce set of files for sed to operate on.
+    local files_matching_word
+    declare -a files_matching_word
+    mapfile -t files_matching_word \
+	    < <(find_files_matching_word "$word" "$@")
+
+    if [ ${#files_matching_word[@]} -eq 0 ]; then
+	return
+    fi
+
+    if echo "$replacement"| grep -q ","; then
+	echo "TODO: $id"
+	return
+    fi
+
+    declare -A md5sums
+
+    local changed f before after
+    changed=false
+    for f in "${files_matching_word[@]}"; do
+	if [ "${md5sums[$f]}" = "" ]; then
+	    md5sums[$f]=$(md5sum "$f")
+	fi
+
+	before="${md5sums[$f]}"
+
+	replace_word_in_file \
+	    "$word" \
+	    "$replacement" \
+	    "$f"
+
+	after=$(md5sum "$f")
+
+	if [ "$after" != "$before" ]; then
+	    md5sums[$f]="$after"
+	    changed=true
+	fi
+    done
+
+    if $changed; then
+	echo "$id"
+    fi
+
+    find_files_matching_word "$word" "${files_matching_word[@]}" \
+	| awk "{ printf \"TODO: $id: replacement failed: %s\n\", \$0}"
+}
+
+main ()
+{
+    declare -a unique_files
+    parse_args "$@"
+
+    get_dictionary
+
+    declare -a words
+    declare -a replacements
+    parse_dictionary
+
+    # Reduce set of files for sed to operate on.
+    local files_matching_words
+    declare -a files_matching_words
+    mapfile -t files_matching_words \
+	    < <(find_files_matching_words "${unique_files[@]}")
+
+    if [ ${#files_matching_words[@]} -eq 0 ]; then
+	return
+    fi
+
+    declare -A words_done
+    local i word replacement
+    i=0
+    for word in "${words[@]}"; do
+	replacement=${replacements[$i]}
+	i=$((i + 1))
+
+	# Skip words that are already handled.  This ensures that the local
+	# dictionary overrides the wiki dictionary.
+	if [ "${words_done[$word]}" == 1 ]; then
+	    continue
+	fi
+	words_done[$word]=1
+
+	replace_word_in_files \
+	    "$word" \
+	    "$replacement" \
+	    "${files_matching_words[@]}"
+    done
+}
+
+main "$@"
diff --git a/gdb/corefile.c b/gdb/corefile.c
index 96052cf..f6ec3cd 100644
--- a/gdb/corefile.c
+++ b/gdb/corefile.c
@@ -391,9 +391,8 @@ Use FILE as core dump for examining memory and registers.\n\
 Usage: core-file FILE\n\
 No arg means have no core file.  This command has been superseded by the\n\
 `target core' and `detach' commands."), &cmdlist);
-  set_cmd_completer (core_file_cmd, filename_completer);
+  set_cmd_completer (core_file_cmd, deprecated_filename_completer);
 
-  
   set_show_commands set_show_gnutarget
     = add_setshow_string_noescape_cmd ("gnutarget", class_files,
 				       &gnutarget_string, _("\
diff --git a/gdb/corelow.c b/gdb/corelow.c
index 2b7a355..5820ffe 100644
--- a/gdb/corelow.c
+++ b/gdb/corelow.c
@@ -48,17 +48,130 @@
 #include "gdbsupport/pathstuff.h"
 #include "gdbsupport/scoped_fd.h"
 #include "gdbsupport/x86-xstate.h"
-#include "debuginfod-support.h"
 #include <unordered_map>
 #include <unordered_set>
 #include "cli/cli-cmds.h"
 #include "xml-tdesc.h"
 #include "memtag.h"
+#include "cli/cli-style.h"
 
 #ifndef O_LARGEFILE
 #define O_LARGEFILE 0
 #endif
 
+/* A mem_range and the build-id associated with the file mapped into the
+   given range.  */
+
+struct mem_range_and_build_id
+{
+  mem_range_and_build_id (mem_range &&r, const bfd_build_id *id)
+    : range (r),
+      build_id (id)
+  { /* Nothing.  */ }
+
+  /* A range of memory addresses.  */
+  mem_range range;
+
+  /* The build-id of the file mapped into RANGE.  */
+  const bfd_build_id *build_id;
+};
+
+/* An instance of this class is created within the core_target and is used
+   to hold all the information that relating to mapped files, their address
+   ranges, and their corresponding build-ids.  */
+
+struct mapped_file_info
+{
+  /* See comment on function definition.  */
+
+  void add (const char *soname, const char *expected_filename,
+	    const char *actual_filename, std::vector<mem_range> &&ranges,
+	    const bfd_build_id *build_id);
+
+  /* See comment on function definition.  */
+
+  std::optional <core_target_mapped_file_info>
+  lookup (const char *filename, const std::optional<CORE_ADDR> &addr);
+
+private:
+
+  /* Helper for ::lookup.  BUILD_ID is a build-id that was found in
+     one of the data structures within this class.  Lookup the
+     corresponding filename in m_build_id_to_filename_map and return a pair
+     containing the build-id and filename.
+
+     If no corresponding filename is found in m_build_id_to_filename_map
+     then the returned pair contains BUILD_ID and an empty string.
+
+     If BUILD_ID is nullptr then the returned pair contains nullptr and an
+     empty string.  */
+
+  struct core_target_mapped_file_info
+  make_result (const bfd_build_id *build_id)
+  {
+    if (build_id != nullptr)
+      {
+      auto it = m_build_id_to_filename_map.find (build_id);
+      if (it != m_build_id_to_filename_map.end ())
+	return { build_id, it->second };
+    }
+
+    return { build_id, {} };
+  }
+
+  /* A type that maps a string to a build-id.  */
+  using string_to_build_id_map
+    = std::unordered_map<std::string, const bfd_build_id *>;
+
+  /* A type that maps a build-id to a string.  */
+  using build_id_to_string_map
+    = std::unordered_map<const bfd_build_id *, std::string>;
+
+  /* When loading a core file, the build-ids are extracted based on the
+     file backed mappings.  This map associates the name of a file that was
+     mapped into the core file with the corresponding build-id.  The
+     build-id pointers in this map will never be nullptr as we only record
+     files if they have a build-id.  */
+
+  string_to_build_id_map m_filename_to_build_id_map;
+
+  /* Map a build-id pointer back to the name of the file that was mapped
+     into the inferior's address space.  If we lookup a matching build-id
+     using either a soname or an address then this map allows us to also
+     provide a full path to a file with a matching build-id.  */
+
+  build_id_to_string_map m_build_id_to_filename_map;
+
+  /* If the file that was mapped into the core file was a shared library
+     then it might have a DT_SONAME tag in its .dynamic section, this tag
+     contains the name of a shared object.  When opening a shared library,
+     if it's basename appears in this map then we can use the corresponding
+     build-id.
+
+     In the rare case that two different files have the same DT_SONAME
+     value then the build-id pointer in this map will be nullptr, this
+     indicates that it's not possible to find a build-id based on the given
+     DT_SONAME value.  */
+
+  string_to_build_id_map m_soname_to_build_id_map;
+
+  /* This vector maps memory ranges onto an associated build-id.  The
+     ranges are those of the files mapped into the core file.
+
+     Entries in this vector must not overlap, and are sorted be increasing
+     memory address.  Within each entry the build-id pointer will not be
+     nullptr.
+
+     While building this vector the entries are not sorted, they are
+     sorted once after the table has finished being built.  */
+
+  std::vector<mem_range_and_build_id> m_address_to_build_id_list;
+
+  /* False if address_to_build_id_list is unsorted, otherwise true.  */
+
+  bool m_address_to_build_id_list_sorted = false;
+};
+
 /* The core file target.  */
 
 static const target_info core_target_info = {
@@ -135,6 +248,13 @@ public:
   /* See definition.  */
   void info_proc_mappings (struct gdbarch *gdbarch);
 
+  std::optional <core_target_mapped_file_info>
+  lookup_mapped_file_info (const char *filename,
+			   const std::optional<CORE_ADDR> &addr)
+  {
+    return m_mapped_file_info.lookup (filename, addr);
+  }
+
 private: /* per-core data */
 
   /* Get rid of the core inferior.  */
@@ -157,15 +277,14 @@ private: /* per-core data */
      still be useful.  */
   std::vector<mem_range> m_core_unavailable_mappings;
 
-  /* Build m_core_file_mappings.  Called from the constructor.  */
-  void build_file_mappings ();
+  /* Data structure that holds information mapping filenames and address
+     ranges to the corresponding build-ids as well as the reverse build-id
+     to filename mapping.  */
+  mapped_file_info m_mapped_file_info;
 
-  /* Helper method for xfer_partial.  */
-  enum target_xfer_status xfer_memory_via_mappings (gdb_byte *readbuf,
-						    const gdb_byte *writebuf,
-						    ULONGEST offset,
-						    ULONGEST len,
-						    ULONGEST *xfered_len);
+  /* Build m_core_file_mappings and m_mapped_file_info.  Called from the
+     constructor.  */
+  void build_file_mappings ();
 
   /* FIXME: kettenis/20031023: Eventually this field should
      disappear.  */
@@ -217,9 +336,51 @@ core_target::core_target ()
 void
 core_target::build_file_mappings ()
 {
+  /* Type holding information about a single file mapped into the inferior
+     at the point when the core file was created.  Associates a build-id
+     with the list of regions the file is mapped into.  */
+  struct mapped_file
+  {
+    /* Type for a region of a file that was mapped into the inferior when
+       the core file was generated.  */
+    struct region
+    {
+      /* Constructor.   See member variables for argument descriptions.  */
+      region (CORE_ADDR start_, CORE_ADDR end_, CORE_ADDR file_ofs_)
+	: start (start_),
+	  end (end_),
+	  file_ofs (file_ofs_)
+      { /* Nothing.  */ }
+
+      /* The inferior address for the start of the mapped region.  */
+      CORE_ADDR start;
+
+      /* The inferior address immediately after the mapped region.  */
+      CORE_ADDR end;
+
+      /* The offset within the mapped file for this content.  */
+      CORE_ADDR file_ofs;
+    };
+
+    /* If not nullptr, then this is the build-id associated with this
+       file.  */
+    const bfd_build_id *build_id = nullptr;
+
+    /* If true then we have seen multiple different build-ids associated
+       with the same filename.  The build_id field will have been set back
+       to nullptr, and we should not set build_id in future.  */
+    bool ignore_build_id_p = false;
+
+    /* All the mapped regions of this file.  */
+    std::vector<region> regions;
+  };
+
   std::unordered_map<std::string, struct bfd *> bfd_map;
   std::unordered_set<std::string> unavailable_paths;
 
+  /* All files mapped into the core file.  The key is the filename.  */
+  std::unordered_map<std::string, mapped_file> mapped_files;
+
   /* See linux_read_core_file_mappings() in linux-tdep.c for an example
      read_core_file_mappings method.  */
   gdbarch_read_core_file_mappings (m_core_gdbarch,
@@ -240,87 +401,193 @@ core_target::build_file_mappings ()
 	   weed out non-file-backed mappings.  */
 	gdb_assert (filename != nullptr);
 
-	if (unavailable_paths.find (filename) != unavailable_paths.end ())
-	  {
-	    /* We have already seen some mapping for FILENAME but failed to
-	       find/open the file.  There is no point in trying the same
-	       thing again so just record that the range [start, end) is
-	       unavailable.  */
-	    m_core_unavailable_mappings.emplace_back (start, end - start);
-	    return;
-	  }
-
-	struct bfd *bfd = bfd_map[filename];
-	if (bfd == nullptr)
+	/* Add this mapped region to the data for FILENAME.  */
+	mapped_file &file_data = mapped_files[filename];
+	file_data.regions.emplace_back (start, end, file_ofs);
+	if (build_id != nullptr && !file_data.ignore_build_id_p)
 	  {
-	    /* Use exec_file_find() to do sysroot expansion.  It'll
-	       also strip the potential sysroot "target:" prefix.  If
-	       there is no sysroot, an equivalent (possibly more
-	       canonical) pathname will be provided.  */
-	    gdb::unique_xmalloc_ptr<char> expanded_fname
-	      = exec_file_find (filename, NULL);
-
-	    if (expanded_fname == nullptr && build_id != nullptr)
-	      debuginfod_exec_query (build_id->data, build_id->size,
-				     filename, &expanded_fname);
-
-	    if (expanded_fname == nullptr)
+	    if (file_data.build_id == nullptr)
+	      file_data.build_id = build_id;
+	    else if (!build_id_equal (build_id, file_data.build_id))
 	      {
-		m_core_unavailable_mappings.emplace_back (start, end - start);
-		unavailable_paths.insert (filename);
-		warning (_("Can't open file %s during file-backed mapping "
-			   "note processing"),
-			 filename);
-		return;
+		warning (_("Multiple build-ids found for %ps"),
+			 styled_string (file_name_style.style (), filename));
+		file_data.build_id = nullptr;
+		file_data.ignore_build_id_p = true;
 	      }
+	  }
+      });
+
+  for (const auto &iter : mapped_files)
+    {
+      const std::string &filename = iter.first;
+      const mapped_file &file_data = iter.second;
+
+      /* Use exec_file_find() to do sysroot expansion.  It'll
+	 also strip the potential sysroot "target:" prefix.  If
+	 there is no sysroot, an equivalent (possibly more
+	 canonical) pathname will be provided.  */
+      gdb::unique_xmalloc_ptr<char> expanded_fname
+	= exec_file_find (filename.c_str (), nullptr);
+
+      bool build_id_mismatch = false;
+      if (expanded_fname != nullptr && file_data.build_id != nullptr)
+	{
+	  /* We temporarily open the bfd as a structured target, this
+	     allows us to read the build-id from the bfd if there is one.
+	     For this task it's OK if we reuse an already open bfd object,
+	     so we make this call through GDB's bfd cache.  Once we've
+	     checked the build-id (if there is one) we'll drop this
+	     reference and re-open the bfd using the "binary" target.  */
+	  gdb_bfd_ref_ptr tmp_bfd
+	    = gdb_bfd_open (expanded_fname.get (), gnutarget);
+
+	  if (tmp_bfd != nullptr
+	      && bfd_check_format (tmp_bfd.get (), bfd_object)
+	      && build_id_bfd_get (tmp_bfd.get ()) != nullptr)
+	    {
+	      /* The newly opened TMP_BFD has a build-id, and this mapped
+		 file has a build-id extracted from the core-file.  Check
+		 the build-id's match, and if not, reject TMP_BFD.  */
+	      const struct bfd_build_id *found
+		= build_id_bfd_get (tmp_bfd.get ());
+	      if (!build_id_equal (found, file_data.build_id))
+		build_id_mismatch = true;
+	    }
+	}
+
+      gdb_bfd_ref_ptr abfd;
+      if (expanded_fname != nullptr && !build_id_mismatch)
+	{
+	  struct bfd *b = bfd_openr (expanded_fname.get (), "binary");
+	  abfd = gdb_bfd_ref_ptr::new_reference (b);
+	}
 
-	    bfd = bfd_openr (expanded_fname.get (), "binary");
+      if ((expanded_fname == nullptr
+	   || abfd == nullptr
+	   || !bfd_check_format (abfd.get (), bfd_object))
+	  && file_data.build_id != nullptr)
+	{
+	  abfd = find_objfile_by_build_id (file_data.build_id,
+					   filename.c_str ());
 
-	    if (bfd == nullptr || !bfd_check_format (bfd, bfd_object))
-	      {
-		m_core_unavailable_mappings.emplace_back (start, end - start);
-		unavailable_paths.insert (filename);
-		warning (_("Can't open file %s which was expanded to %s "
+	  if (abfd != nullptr)
+	    {
+	      /* The find_objfile_by_build_id will have opened ABFD using
+		 the GNUTARGET global bfd type, however, we need the bfd
+		 opened as the binary type (see the function's header
+		 comment), so now we reopen ABFD with the desired binary
+		 type.  */
+	      expanded_fname
+		= make_unique_xstrdup (bfd_get_filename (abfd.get ()));
+	      struct bfd *b = bfd_openr (expanded_fname.get (), "binary");
+	      gdb_assert (b != nullptr);
+	      abfd = gdb_bfd_ref_ptr::new_reference (b);
+	    }
+	}
+
+      std::vector<mem_range> ranges;
+      for (const mapped_file::region &region : file_data.regions)
+	ranges.emplace_back (region.start, region.end - region.start);
+
+      if (expanded_fname == nullptr
+	  || abfd == nullptr
+	  || !bfd_check_format (abfd.get (), bfd_object))
+	{
+	  /* If ABFD was opened, but the wrong format, close it now.  */
+	  abfd = nullptr;
+
+	  /* Record all regions for this file as unavailable.  */
+	  for (const mapped_file::region &region : file_data.regions)
+	    m_core_unavailable_mappings.emplace_back (region.start,
+						      region.end
+						      - region.start);
+
+	  /* And give the user an appropriate warning.  */
+	  if (build_id_mismatch)
+	    {
+	      if (expanded_fname == nullptr
+		  || filename == expanded_fname.get ())
+		warning (_("File %ps doesn't match build-id from core-file "
+			   "during file-backed mapping processing"),
+			 styled_string (file_name_style.style (),
+					filename.c_str ()));
+	      else
+		warning (_("File %ps which was expanded to %ps, doesn't match "
+			   "build-id from core-file during file-backed "
+			   "mapping processing"),
+			 styled_string (file_name_style.style (),
+					filename.c_str ()),
+			 styled_string (file_name_style.style (),
+					expanded_fname.get ()));
+	    }
+	  else
+	    {
+	      if (expanded_fname == nullptr
+		  || filename == expanded_fname.get ())
+		warning (_("Can't open file %ps during file-backed mapping "
+			   "note processing"),
+			 styled_string (file_name_style.style (),
+					filename.c_str ()));
+	      else
+		warning (_("Can't open file %ps which was expanded to %ps "
 			   "during file-backed mapping note processing"),
-			 filename, expanded_fname.get ());
+			 styled_string (file_name_style.style (),
+					filename.c_str ()),
+			 styled_string (file_name_style.style (),
+					expanded_fname.get ()));
+	    }
+	}
+      else
+	{
+	  /* Ensure that the bfd will be closed when core_bfd is closed.
+	     This can be checked before/after a core file detach via "maint
+	     info bfds".  */
+	  gdb_bfd_record_inclusion (current_program_space->core_bfd (),
+				    abfd.get ());
+
+	  /* Create sections for each mapped region.  */
+	  for (const mapped_file::region &region : file_data.regions)
+	    {
+	      /* Make new BFD section.  All sections have the same name,
+		 which is permitted by bfd_make_section_anyway().  */
+	      asection *sec = bfd_make_section_anyway (abfd.get (), "load");
+	      if (sec == nullptr)
+		error (_("Can't make section"));
+	      sec->filepos = region.file_ofs;
+	      bfd_set_section_flags (sec, SEC_READONLY | SEC_HAS_CONTENTS);
+	      bfd_set_section_size (sec, region.end - region.start);
+	      bfd_set_section_vma (sec, region.start);
+	      bfd_set_section_lma (sec, region.start);
+	      bfd_set_section_alignment (sec, 2);
+
+	      /* Set target_section fields.  */
+	      m_core_file_mappings.emplace_back (region.start, region.end, sec);
+	    }
+	}
 
-		if (bfd != nullptr)
-		  bfd_close (bfd);
-		return;
-	      }
-	    /* Ensure that the bfd will be closed when core_bfd is closed. 
-	       This can be checked before/after a core file detach via
-	       "maint info bfds".  */
-	    gdb_bfd_record_inclusion (current_program_space->core_bfd (), bfd);
-	    bfd_map[filename] = bfd;
-	  }
+      /* If this is a bfd with a build-id then record the filename,
+	 optional soname (DT_SONAME .dynamic attribute), and the range of
+	 addresses at which this bfd is mapped.  This information can be
+	 used to perform build-id checking when loading the shared
+	 libraries.  */
+      if (file_data.build_id != nullptr)
+	{
+	  normalize_mem_ranges (&ranges);
 
-	/* Make new BFD section.  All sections have the same name,
-	   which is permitted by bfd_make_section_anyway().  */
-	asection *sec = bfd_make_section_anyway (bfd, "load");
-	if (sec == nullptr)
-	  error (_("Can't make section"));
-	sec->filepos = file_ofs;
-	bfd_set_section_flags (sec, SEC_READONLY | SEC_HAS_CONTENTS);
-	bfd_set_section_size (sec, end - start);
-	bfd_set_section_vma (sec, start);
-	bfd_set_section_lma (sec, start);
-	bfd_set_section_alignment (sec, 2);
-
-	/* Set target_section fields.  */
-	m_core_file_mappings.emplace_back (start, end, sec);
-
-	/* If this is a bfd of a shared library, record its soname
-	   and build id.  */
-	if (build_id != nullptr)
-	  {
-	    gdb::unique_xmalloc_ptr<char> soname
-	      = gdb_bfd_read_elf_soname (bfd->filename);
-	    if (soname != nullptr)
-	      set_cbfd_soname_build_id (current_program_space->cbfd,
-					soname.get (), build_id);
-	  }
-      });
+	  const char *actual_filename = nullptr;
+	  gdb::unique_xmalloc_ptr<char> soname;
+	  if (abfd != nullptr)
+	    {
+	      actual_filename = bfd_get_filename (abfd.get ());
+	      soname = gdb_bfd_read_elf_soname (actual_filename);
+	    }
+
+	  m_mapped_file_info.add (soname.get (), filename.c_str (),
+				  actual_filename, std::move (ranges),
+				  file_data.build_id);
+	}
+    }
 
   normalize_mem_ranges (&m_core_unavailable_mappings);
 }
@@ -572,28 +839,7 @@ locate_exec_from_corefile_build_id (bfd *abfd, int from_tty)
     return;
 
   gdb_bfd_ref_ptr execbfd
-    = build_id_to_exec_bfd (build_id->size, build_id->data);
-
-  if (execbfd == nullptr)
-    {
-      /* Attempt to query debuginfod for the executable.  */
-      gdb::unique_xmalloc_ptr<char> execpath;
-      scoped_fd fd = debuginfod_exec_query (build_id->data, build_id->size,
-					    abfd->filename, &execpath);
-
-      if (fd.get () >= 0)
-	{
-	  execbfd = gdb_bfd_open (execpath.get (), gnutarget);
-
-	  if (execbfd == nullptr)
-	    warning (_("\"%s\" from debuginfod cannot be opened as bfd: %s"),
-		     execpath.get (),
-		     gdb_bfd_errmsg (bfd_get_error (), nullptr).c_str ());
-	  else if (!build_id_verify (execbfd.get (), build_id->size,
-				     build_id->data))
-	    execbfd.reset (nullptr);
-	}
-    }
+    = find_objfile_by_build_id (build_id, abfd->filename);
 
   if (execbfd != nullptr)
     {
@@ -614,7 +860,10 @@ core_target_open (const char *arg, int from_tty)
   int flags;
 
   target_preopen (from_tty);
-  if (!arg)
+
+  std::string filename = extract_single_filename_arg (arg);
+
+  if (filename.empty ())
     {
       if (current_program_space->core_bfd ())
 	error (_("No core file specified.  (Use `detach' "
@@ -623,25 +872,23 @@ core_target_open (const char *arg, int from_tty)
 	error (_("No core file specified."));
     }
 
-  gdb::unique_xmalloc_ptr<char> filename (tilde_expand (arg));
-  if (strlen (filename.get ()) != 0
-      && !IS_ABSOLUTE_PATH (filename.get ()))
-    filename = make_unique_xstrdup (gdb_abspath (filename).c_str ());
+  if (!IS_ABSOLUTE_PATH (filename.c_str ()))
+    filename = gdb_abspath (filename);
 
   flags = O_BINARY | O_LARGEFILE;
   if (write_files)
     flags |= O_RDWR;
   else
     flags |= O_RDONLY;
-  scratch_chan = gdb_open_cloexec (filename.get (), flags, 0).release ();
+  scratch_chan = gdb_open_cloexec (filename.c_str (), flags, 0).release ();
   if (scratch_chan < 0)
-    perror_with_name (filename.get ());
+    perror_with_name (filename.c_str ());
 
-  gdb_bfd_ref_ptr temp_bfd (gdb_bfd_fopen (filename.get (), gnutarget,
+  gdb_bfd_ref_ptr temp_bfd (gdb_bfd_fopen (filename.c_str (), gnutarget,
 					   write_files ? FOPEN_RUB : FOPEN_RB,
 					   scratch_chan));
   if (temp_bfd == NULL)
-    perror_with_name (filename.get ());
+    perror_with_name (filename.c_str ());
 
   if (!bfd_check_format (temp_bfd.get (), bfd_core))
     {
@@ -650,7 +897,7 @@ core_target_open (const char *arg, int from_tty)
 	 thing, on error it does not free all the storage associated
 	 with the bfd).  */
       error (_("\"%s\" is not a core dump: %s"),
-	     filename.get (), bfd_errmsg (bfd_get_error ()));
+	     filename.c_str (), bfd_errmsg (bfd_get_error ()));
     }
 
   current_program_space->cbfd = std::move (temp_bfd);
@@ -964,55 +1211,6 @@ core_target::files_info ()
   print_section_info (&m_core_section_table, current_program_space->core_bfd ());
 }
 
-/* Helper method for core_target::xfer_partial.  */
-
-enum target_xfer_status
-core_target::xfer_memory_via_mappings (gdb_byte *readbuf,
-				       const gdb_byte *writebuf,
-				       ULONGEST offset, ULONGEST len,
-				       ULONGEST *xfered_len)
-{
-  enum target_xfer_status xfer_status;
-
-  xfer_status = (section_table_xfer_memory_partial
-		   (readbuf, writebuf,
-		    offset, len, xfered_len,
-		    m_core_file_mappings));
-
-  if (xfer_status == TARGET_XFER_OK || m_core_unavailable_mappings.empty ())
-    return xfer_status;
-
-  /* There are instances - e.g. when debugging within a docker
-     container using the AUFS storage driver - where the pathnames
-     obtained from the note section are incorrect.  Despite the path
-     being wrong, just knowing the start and end addresses of the
-     mappings is still useful; we can attempt an access of the file
-     stratum constrained to the address ranges corresponding to the
-     unavailable mappings.  */
-
-  ULONGEST memaddr = offset;
-  ULONGEST memend = offset + len;
-
-  for (const auto &mr : m_core_unavailable_mappings)
-    {
-      if (mr.contains (memaddr))
-	{
-	  if (!mr.contains (memend))
-	    len = mr.start + mr.length - memaddr;
-
-	  xfer_status = this->beneath ()->xfer_partial (TARGET_OBJECT_MEMORY,
-							NULL,
-							readbuf,
-							writebuf,
-							offset,
-							len,
-							xfered_len);
-	  break;
-	}
-    }
-
-  return xfer_status;
-}
 
 enum target_xfer_status
 core_target::xfer_partial (enum target_object object, const char *annex,
@@ -1040,26 +1238,72 @@ core_target::xfer_partial (enum target_object object, const char *annex,
 	if (xfer_status == TARGET_XFER_OK)
 	  return TARGET_XFER_OK;
 
-	/* Check file backed mappings.  If they're available, use
-	   core file provided mappings (e.g. from .note.linuxcore.file
-	   or the like) as this should provide a more accurate
-	   result.  If not, check the stratum beneath us, which should
-	   be the file stratum.
+	/* Check file backed mappings.  If they're available, use core file
+	   provided mappings (e.g. from .note.linuxcore.file or the like)
+	   as this should provide a more accurate result.  */
+	if (!m_core_file_mappings.empty ())
+	  {
+	    xfer_status = section_table_xfer_memory_partial
+			    (readbuf, writebuf, offset, len, xfered_len,
+			     m_core_file_mappings);
+	    if (xfer_status == TARGET_XFER_OK)
+	      return xfer_status;
+	  }
 
-	   We also check unavailable mappings due to Docker/AUFS driver
-	   issues.  */
-	if (!m_core_file_mappings.empty ()
-	    || !m_core_unavailable_mappings.empty ())
+	/* If the access is within an unavailable file mapping then we try
+	   to check in the stratum below (the executable stratum).  The
+	   thinking here is that if the mapping was read/write then the
+	   contents would have been written into the core file and the
+	   access would have been satisfied by m_core_section_table.
+
+	   But if the access has not yet been resolved then we can assume
+	   the access is read-only.  If the executable was not found
+	   during the mapped file check then we'll have an unavailable
+	   mapping entry, however, if the user has provided the executable
+	   (maybe in a different location) then we might be able to
+	   resolve the access from there.
+
+	   If that fails, but the access is within an unavailable region,
+	   then the access itself should fail.  */
+	for (const auto &mr : m_core_unavailable_mappings)
 	  {
-	    xfer_status = xfer_memory_via_mappings (readbuf, writebuf, offset,
+	    if (mr.contains (offset))
+	      {
+		if (!mr.contains (offset + len))
+		  len = mr.start + mr.length - offset;
+
+		xfer_status
+		  = this->beneath ()->xfer_partial (TARGET_OBJECT_MEMORY,
+						    nullptr, readbuf,
+						    writebuf, offset,
 						    len, xfered_len);
+		if (xfer_status == TARGET_XFER_OK)
+		  return TARGET_XFER_OK;
+
+		return TARGET_XFER_E_IO;
+	      }
+	  }
+
+	/* The following is acting as a fallback in case we encounter a
+	   situation where the core file is lacking and mapped file
+	   information.  Here we query the exec file stratum to see if it
+	   can resolve the access.  Doing this when we are missing mapped
+	   file information might be the best we can do, but there are
+	   certainly cases this will get wrong, e.g. if an inferior created
+	   a zero initialised mapping over the top of some data that exists
+	   within the executable then this will return the executable data
+	   rather than the zero data.  Maybe we should just drop this
+	   block?  */
+	if (m_core_file_mappings.empty ()
+	    && m_core_unavailable_mappings.empty ())
+	  {
+	    xfer_status
+	      = this->beneath ()->xfer_partial (object, annex, readbuf,
+						writebuf, offset, len,
+						xfered_len);
+	    if (xfer_status == TARGET_XFER_OK)
+	      return TARGET_XFER_OK;
 	  }
-	else
-	  xfer_status = this->beneath ()->xfer_partial (object, annex, readbuf,
-							writebuf, offset, len,
-							xfered_len);
-	if (xfer_status == TARGET_XFER_OK)
-	  return TARGET_XFER_OK;
 
 	/* Finally, attempt to access data in core file sections with
 	   no contents.  These will typically read as all zero.  */
@@ -1454,24 +1698,19 @@ get_current_core_target ()
 void
 core_target::info_proc_mappings (struct gdbarch *gdbarch)
 {
-  if (!m_core_file_mappings.empty ())
-    {
-      gdb_printf (_("Mapped address spaces:\n\n"));
-      if (gdbarch_addr_bit (gdbarch) == 32)
-	{
-	  gdb_printf ("\t%10s %10s %10s %10s %s\n",
-		      "Start Addr",
-		      "  End Addr",
-		      "      Size", "    Offset", "objfile");
-	}
-      else
-	{
-	  gdb_printf ("  %18s %18s %10s %10s %s\n",
-		      "Start Addr",
-		      "  End Addr",
-		      "      Size", "    Offset", "objfile");
-	}
-    }
+  if (m_core_file_mappings.empty ())
+    return;
+
+  gdb_printf (_("Mapped address spaces:\n\n"));
+  ui_out_emit_table emitter (current_uiout, 5, -1, "ProcMappings");
+
+  int width = gdbarch_addr_bit (gdbarch) == 32 ? 10 : 18;
+  current_uiout->table_header (width, ui_left, "start", "Start Addr");
+  current_uiout->table_header (width, ui_left, "end", "End Addr");
+  current_uiout->table_header (width, ui_left, "size", "Size");
+  current_uiout->table_header (width, ui_left, "offset", "Offset");
+  current_uiout->table_header (0, ui_left, "objfile", "File");
+  current_uiout->table_body ();
 
   for (const target_section &tsp : m_core_file_mappings)
     {
@@ -1480,20 +1719,16 @@ core_target::info_proc_mappings (struct gdbarch *gdbarch)
       ULONGEST file_ofs = tsp.the_bfd_section->filepos;
       const char *filename = bfd_get_filename (tsp.the_bfd_section->owner);
 
-      if (gdbarch_addr_bit (gdbarch) == 32)
-	gdb_printf ("\t%10s %10s %10s %10s %s\n",
-		    paddress (gdbarch, start),
-		    paddress (gdbarch, end),
-		    hex_string (end - start),
-		    hex_string (file_ofs),
-		    filename);
-      else
-	gdb_printf ("  %18s %18s %10s %10s %s\n",
-		    paddress (gdbarch, start),
-		    paddress (gdbarch, end),
-		    hex_string (end - start),
-		    hex_string (file_ofs),
-		    filename);
+      ui_out_emit_tuple tuple_emitter (current_uiout, nullptr);
+      current_uiout->field_core_addr ("start", gdbarch, start);
+      current_uiout->field_core_addr ("end", gdbarch, end);
+      /* These next two aren't really addresses and so shouldn't be
+	 styled as such.  */
+      current_uiout->field_string ("size", paddress (gdbarch, end - start));
+      current_uiout->field_string ("offset", paddress (gdbarch, file_ofs));
+      current_uiout->field_string ("objfile", filename,
+				   file_name_style.style ());
+      current_uiout->text ("\n");
     }
 }
 
@@ -1516,11 +1751,188 @@ maintenance_print_core_file_backed_mappings (const char *args, int from_tty)
     targ->info_proc_mappings (targ->core_gdbarch ());
 }
 
+/* Add more details discovered while processing the core-file's mapped file
+   information, we're building maps between filenames and the corresponding
+   build-ids, between address ranges and the corresponding build-ids, and
+   also a reverse map between build-id and the corresponding filename.
+
+   SONAME is the DT_SONAME attribute extracted from the .dynamic section of
+   a shared library that was mapped into the core file.  This can be
+   nullptr if the mapped files was not a shared library, or didn't have a
+   DT_SONAME attribute.
+
+   EXPECTED_FILENAME is the name of the file that was mapped into the
+   inferior as extracted from the core file, this should never be nullptr.
+
+   ACTUAL_FILENAME is the name of the actual file GDB found to provide the
+   mapped file information, this can be nullptr if GDB failed to find a
+   suitable file.  This might be different to EXPECTED_FILENAME, e.g. GDB
+   might have downloaded the file from debuginfod and so ACTUAL_FILENAME
+   will be a file in the debuginfod client cache.
+
+   RANGES is the list of memory ranges at which this file was mapped into
+   the inferior.
+
+   BUILD_ID is the build-id for this mapped file, this will never be
+   nullptr.  Not every mapped file will have a build-id, but there's no
+   point calling this function if we failed to find a build-id; this
+   structure only exists so we can lookup files based on their build-id.  */
+
+void
+mapped_file_info::add (const char *soname,
+		       const char *expected_filename,
+		       const char *actual_filename,
+		       std::vector<mem_range> &&ranges,
+		       const bfd_build_id *build_id)
+{
+  gdb_assert (build_id != nullptr);
+  gdb_assert (expected_filename != nullptr);
+
+  if (soname != nullptr)
+    {
+      /* If we already have an entry with this SONAME then this indicates
+	 that the inferior has two files mapped into memory with different
+	 file names (and most likely different build-ids), but with the
+	 same DT_SONAME attribute.  In this case we can't use the
+	 DT_SONAME to figure out the expected build-id of a shared
+	 library, so poison the entry for this SONAME by setting the entry
+	 to nullptr.  */
+      auto it = m_soname_to_build_id_map.find (soname);
+      if (it != m_soname_to_build_id_map.end ()
+	  && it->second != nullptr
+	  && !build_id_equal (it->second, build_id))
+	m_soname_to_build_id_map[soname] = nullptr;
+      else
+	m_soname_to_build_id_map[soname] = build_id;
+    }
+
+  /* When the core file is initially opened and the mapped files are
+     parsed, we group the build-id information based on the file name.  As
+     a consequence, we should see each EXPECTED_FILENAME value exactly
+     once.  This means that each insertion should always succeed.  */
+  const auto inserted
+    = m_filename_to_build_id_map.emplace (expected_filename, build_id).second;
+  gdb_assert (inserted);
+
+  /* Setup the reverse build-id to file name map.  */
+  if (actual_filename != nullptr)
+    m_build_id_to_filename_map.emplace (build_id, actual_filename);
+
+  /* Setup the list of memory range to build-id objects.  */
+  for (mem_range &r : ranges)
+    m_address_to_build_id_list.emplace_back (std::move (r), build_id);
+
+  /* At this point the m_address_to_build_id_list is unsorted (we just
+     added some entries to the end of the list).  All entries should be
+     added before any look-ups are performed, and the list is only sorted
+     when the first look-up is performed.  */
+  gdb_assert (!m_address_to_build_id_list_sorted);
+}
+
+/* FILENAME is the name of a file GDB is trying to load, and ADDR is
+   (optionally) an address within the file in the inferior's address space.
+
+   Search through the information gathered from the core-file's mapped file
+   information looking for a file named FILENAME, or for a file that covers
+   ADDR.  If a match is found then return the build-id for the file along
+   with the location where GDB found the mapped file.
+
+   The location of the mapped file might be the empty string if GDB was
+   unable to find the mapped file.
+
+   If no build-id can be found for FILENAME then GDB will return a pair
+   containing nullptr (for the build-id) and an empty string for the file
+   name.  */
+
+std::optional <core_target_mapped_file_info>
+mapped_file_info::lookup (const char *filename,
+			  const std::optional<CORE_ADDR> &addr)
+{
+  if (filename != nullptr)
+    {
+      /* If there's a matching entry in m_filename_to_build_id_map then the
+	 associated build-id will not be nullptr, and can be used to
+	 validate that FILENAME is correct.  */
+      auto it = m_filename_to_build_id_map.find (filename);
+      if (it != m_filename_to_build_id_map.end ())
+	return make_result (it->second);
+    }
+
+  if (addr.has_value ())
+    {
+      /* On the first lookup, sort the address_to_build_id_list.  */
+      if (!m_address_to_build_id_list_sorted)
+	{
+	  std::sort (m_address_to_build_id_list.begin (),
+		     m_address_to_build_id_list.end (),
+		     [] (const mem_range_and_build_id &a,
+			 const mem_range_and_build_id &b) {
+		       return a.range < b.range;
+		     });
+	  m_address_to_build_id_list_sorted = true;
+	}
+
+      /* Look for the first entry whose range's start address is not less
+	 than, or equal too, the address ADDR.  If we find such an entry,
+	 then the previous entry's range might contain ADDR.  If it does
+	 then that previous entry's build-id can be used.  */
+      auto it = std::lower_bound
+	(m_address_to_build_id_list.begin (),
+	 m_address_to_build_id_list.end (),
+	 *addr,
+	 [] (const mem_range_and_build_id &a,
+	     const CORE_ADDR &b) {
+	  return a.range.start <= b;
+	});
+
+      if (it != m_address_to_build_id_list.begin ())
+	{
+	  --it;
+
+	  if (it->range.contains (*addr))
+	    return make_result (it->build_id);
+	}
+    }
+
+  if (filename != nullptr)
+    {
+      /* If the basename of FILENAME appears in m_soname_to_build_id_map
+	 then when the mapped files were processed, we saw a file with a
+	 DT_SONAME attribute corresponding to FILENAME, use that build-id
+	 to validate FILENAME.
+
+	 However, the build-id in this map might be nullptr if we saw
+	 multiple mapped files with the same DT_SONAME attribute (though
+	 this should be pretty rare).  */
+      auto it
+	= m_soname_to_build_id_map.find (lbasename (filename));
+      if (it != m_soname_to_build_id_map.end ()
+	  && it->second != nullptr)
+	return make_result (it->second);
+    }
+
+  return {};
+}
+
+/* See gdbcore.h.  */
+
+std::optional <core_target_mapped_file_info>
+core_target_find_mapped_file (const char *filename,
+			      std::optional<CORE_ADDR> addr)
+{
+  core_target *targ = get_current_core_target ();
+  if (targ == nullptr || current_program_space->cbfd.get () == nullptr)
+    return {};
+
+  return targ->lookup_mapped_file_info (filename, addr);
+}
+
 void _initialize_corelow ();
 void
 _initialize_corelow ()
 {
-  add_target (core_target_info, core_target_open, filename_completer);
+  add_target (core_target_info, core_target_open,
+	      filename_maybe_quoted_completer);
   add_cmd ("core-file-backed-mappings", class_maintenance,
 	   maintenance_print_core_file_backed_mappings,
 	   _("Print core file's file-backed mappings."),
diff --git a/gdb/cris-tdep.c b/gdb/cris-tdep.c
index 692aa9a..8562def 100644
--- a/gdb/cris-tdep.c
+++ b/gdb/cris-tdep.c
@@ -3339,7 +3339,7 @@ get_data_from_address (unsigned short *inst, CORE_ADDR address,
   return value;
 }
 
-/* Handles the assign addresing mode for the ADD, SUB, CMP, AND, OR and MOVE 
+/* Handles the assign addressing mode for the ADD, SUB, CMP, AND, OR and MOVE
    instructions.  The MOVE instruction is the move from source to register.  */
 
 static void 
@@ -3398,7 +3398,7 @@ three_operand_add_sub_cmp_and_or_op (unsigned short inst,
   inst_env->disable_interrupt = 0;
 }
 
-/* Handles the index addresing mode for the ADD, SUB, CMP, AND, OR and MOVE
+/* Handles the index addressing mode for the ADD, SUB, CMP, AND, OR and MOVE
    instructions.  The MOVE instruction is the move from source to register.  */
 
 static void 
@@ -3425,7 +3425,7 @@ handle_prefix_index_mode_for_aritm_op (unsigned short inst,
   inst_env->disable_interrupt = 0;
 }
 
-/* Handles the autoincrement and indirect addresing mode for the ADD, SUB,
+/* Handles the autoincrement and indirect addressing mode for the ADD, SUB,
    CMP, AND OR and MOVE instruction.  The MOVE instruction is the move from
    source to register.  */
 
@@ -3883,7 +3883,7 @@ set_cris_version (const char *ignore_args, int from_tty,
   usr_cmd_cris_version_valid = 1;
   
   /* Update the current architecture, if needed.  */
-  if (!gdbarch_update_p (info))
+  if (!gdbarch_update_p (current_inferior (), info))
     internal_error (_("cris_gdbarch_update: failed to update architecture."));
 }
 
@@ -3894,7 +3894,7 @@ set_cris_mode (const char *ignore_args, int from_tty,
   struct gdbarch_info info;
 
   /* Update the current architecture, if needed.  */
-  if (!gdbarch_update_p (info))
+  if (!gdbarch_update_p (current_inferior (), info))
     internal_error ("cris_gdbarch_update: failed to update architecture.");
 }
 
@@ -3905,7 +3905,7 @@ set_cris_dwarf2_cfi (const char *ignore_args, int from_tty,
   struct gdbarch_info info;
 
   /* Update the current architecture, if needed.  */
-  if (!gdbarch_update_p (info))
+  if (!gdbarch_update_p (current_inferior (), info))
     internal_error (_("cris_gdbarch_update: failed to update architecture."));
 }
 
diff --git a/gdb/csky-tdep.c b/gdb/csky-tdep.c
index 1b6c08e..d69b8e5 100644
--- a/gdb/csky-tdep.c
+++ b/gdb/csky-tdep.c
@@ -2097,7 +2097,7 @@ csky_frame_unwind_cache (const frame_info_ptr &this_frame)
     func_size = bl->end () - bl->start ();
   else
     {
-      struct bound_minimal_symbol msymbol
+      bound_minimal_symbol msymbol
 	= lookup_minimal_symbol_by_pc (prologue_start);
       if (msymbol.minsym != NULL)
 	func_size = msymbol.minsym->size ();
diff --git a/gdb/ctfread.c b/gdb/ctfread.c
index d8606d3..ee7c30f 100644
--- a/gdb/ctfread.c
+++ b/gdb/ctfread.c
@@ -323,9 +323,8 @@ get_bitsize (ctf_dict_t *fp, ctf_id_t tid, uint32_t kind)
 static void
 set_symbol_address (struct objfile *of, struct symbol *sym, const char *name)
 {
-  struct bound_minimal_symbol msym;
-
-  msym = lookup_minimal_symbol (name, nullptr, of);
+  bound_minimal_symbol msym
+    = lookup_minimal_symbol (current_program_space, name, of);
   if (msym.minsym != NULL)
     {
       sym->set_value_address (msym.value_address ());
@@ -1461,7 +1460,7 @@ ctf_psymtab_type_cb (ctf_id_t tid, void *arg)
 {
   struct ctf_context *ccp;
   uint32_t kind;
-  short section = -1;
+  int section = -1;
 
   ccp = (struct ctf_context *) arg;
 
diff --git a/gdb/d-exp.y b/gdb/d-exp.y
index 6feacd8..df89cb6 100644
--- a/gdb/d-exp.y
+++ b/gdb/d-exp.y
@@ -435,7 +435,7 @@ PrimaryExpression:
 	'(' Expression ')'
 		{ /* Do nothing.  */ }
 |	IdentifierExp
-		{ struct bound_minimal_symbol msymbol;
+		{
 		  std::string copy = copy_name ($1);
 		  struct field_of_this_result is_a_field_of_this;
 		  struct block_symbol sym;
@@ -463,7 +463,8 @@ PrimaryExpression:
 		  else
 		    {
 		      /* Lookup foreign name in global static symbols.  */
-		      msymbol = lookup_bound_minimal_symbol (copy.c_str ());
+		      bound_minimal_symbol msymbol
+			= lookup_minimal_symbol (current_program_space, copy.c_str ());
 		      if (msymbol.minsym != NULL)
 			pstate->push_new<var_msym_value_operation> (msymbol);
 		      else if (!have_full_symbols (current_program_space)
diff --git a/gdb/d-lang.c b/gdb/d-lang.c
index d4f9956..32d9cc8 100644
--- a/gdb/d-lang.c
+++ b/gdb/d-lang.c
@@ -38,9 +38,8 @@ static const char D_MAIN[] = "D main";
 const char *
 d_main_name (void)
 {
-  struct bound_minimal_symbol msym;
-
-  msym = lookup_minimal_symbol (D_MAIN, NULL, NULL);
+  bound_minimal_symbol msym
+    = lookup_minimal_symbol (current_program_space, D_MAIN);
   if (msym.minsym != NULL)
     return D_MAIN;
 
diff --git a/gdb/data-directory/Makefile.in b/gdb/data-directory/Makefile.in
index f529656..1a17d23 100644
--- a/gdb/data-directory/Makefile.in
+++ b/gdb/data-directory/Makefile.in
@@ -79,6 +79,7 @@ PYTHON_FILE_LIST = \
 	gdb/missing_debug.py \
 	gdb/printing.py \
 	gdb/prompt.py \
+	gdb/ptwrite.py \
 	gdb/styling.py \
 	gdb/types.py \
 	gdb/unwinder.py \
@@ -119,8 +120,7 @@ PYTHON_FILE_LIST = \
 	gdb/function/as_string.py \
 	gdb/function/caller_is.py \
 	gdb/function/strfns.py \
-	gdb/printer/__init__.py \
-	gdb/printer/bound_registers.py
+	gdb/printer/__init__.py
 
 @HAVE_PYTHON_TRUE@PYTHON_FILES = $(PYTHON_FILE_LIST)
 @HAVE_PYTHON_FALSE@PYTHON_FILES =
diff --git a/gdb/dbxread.c b/gdb/dbxread.c
index 830dd1c..1b29d6e 100644
--- a/gdb/dbxread.c
+++ b/gdb/dbxread.c
@@ -54,228 +54,15 @@
 #include "aout/aout64.h"
 #include "aout/stab_gnu.h"
 
+/* Required for the following registry.  */
+#include "gdb-stabs.h"
 
-/* Key for dbx-associated data.  */
-
-const registry<objfile>::key<dbx_symfile_info> dbx_objfile_data_key;
-
-/* We put a pointer to this structure in the read_symtab_private field
-   of the psymtab.  */
-
-struct symloc
-  {
-    /* Offset within the file symbol table of first local symbol for this
-       file.  */
-
-    int ldsymoff;
-
-    /* Length (in bytes) of the section of the symbol table devoted to
-       this file's symbols (actually, the section bracketed may contain
-       more than just this file's symbols).  If ldsymlen is 0, the only
-       reason for this thing's existence is the dependency list.  Nothing
-       else will happen when it is read in.  */
-
-    int ldsymlen;
-
-    /* The size of each symbol in the symbol file (in external form).  */
-
-    int symbol_size;
-
-    /* Further information needed to locate the symbols if they are in
-       an ELF file.  */
-
-    int symbol_offset;
-    int string_offset;
-    int file_string_offset;
-    enum language pst_language;
-  };
-
-#define LDSYMOFF(p) (((struct symloc *)((p)->read_symtab_private))->ldsymoff)
-#define LDSYMLEN(p) (((struct symloc *)((p)->read_symtab_private))->ldsymlen)
-#define SYMLOC(p) ((struct symloc *)((p)->read_symtab_private))
-#define SYMBOL_SIZE(p) (SYMLOC(p)->symbol_size)
-#define SYMBOL_OFFSET(p) (SYMLOC(p)->symbol_offset)
-#define STRING_OFFSET(p) (SYMLOC(p)->string_offset)
-#define FILE_STRING_OFFSET(p) (SYMLOC(p)->file_string_offset)
-#define PST_LANGUAGE(p) (SYMLOC(p)->pst_language)
 
-
-/* The objfile we are currently reading.  */
-
-static struct objfile *dbxread_objfile;
-
-/* Remember what we deduced to be the source language of this psymtab.  */
-
-static enum language psymtab_language = language_unknown;
-
-/* The BFD for this file -- implicit parameter to next_symbol_text.  */
-
-static bfd *symfile_bfd;
-
-/* The size of each symbol in the symbol file (in external form).
-   This is set by dbx_symfile_read when building psymtabs, and by
-   dbx_psymtab_to_symtab when building symtabs.  */
-
-static unsigned symbol_size;
-
-/* This is the offset of the symbol table in the executable file.  */
-
-static unsigned symbol_table_offset;
-
-/* This is the offset of the string table in the executable file.  */
-
-static unsigned string_table_offset;
-
-/* For elf+stab executables, the n_strx field is not a simple index
-   into the string table.  Instead, each .o file has a base offset in
-   the string table, and the associated symbols contain offsets from
-   this base.  The following two variables contain the base offset for
-   the current and next .o files.  */
-
-static unsigned int file_string_table_offset;
-static unsigned int next_file_string_table_offset;
-
-/* .o and NLM files contain unrelocated addresses which are based at
-   0.  When non-zero, this flag disables some of the special cases for
-   Solaris elf+stab text addresses at location 0.  */
-
-static int symfile_relocatable = 0;
-
-/* When set, we are processing a .o file compiled by sun acc.  This is
-   misnamed; it refers to all stabs-in-elf implementations which use
-   N_UNDF the way Sun does, including Solaris gcc.  Hopefully all
-   stabs-in-elf implementations ever invented will choose to be
-   compatible.  */
-
-static unsigned char processing_acc_compilation;
-
 
-/* The lowest text address we have yet encountered.  This is needed
-   because in an a.out file, there is no header field which tells us
-   what address the program is actually going to be loaded at, so we
-   need to make guesses based on the symbols (which *are* relocated to
-   reflect the address it will be loaded at).  */
-
-static unrelocated_addr lowest_text_address;
-
-/* Non-zero if there is any line number info in the objfile.  Prevents
-   dbx_end_psymtab from discarding an otherwise empty psymtab.  */
 
-static int has_line_numbers;
-
-/* Complaints about the symbols we have encountered.  */
-
-static void
-unknown_symtype_complaint (const char *arg1)
-{
-  complaint (_("unknown symbol type %s"), arg1);
-}
-
-static void
-lbrac_mismatch_complaint (int arg1)
-{
-  complaint (_("N_LBRAC/N_RBRAC symbol mismatch at symtab pos %d"), arg1);
-}
-
-static void
-repeated_header_complaint (const char *arg1, int arg2)
-{
-  complaint (_("\"repeated\" header file %s not "
-	       "previously seen, at symtab pos %d"),
-	     arg1, arg2);
-}
-
-/* find_text_range --- find start and end of loadable code sections
-
-   The find_text_range function finds the shortest address range that
-   encloses all sections containing executable code, and stores it in
-   objfile's text_addr and text_size members.
-
-   dbx_symfile_read will use this to finish off the partial symbol
-   table, in some cases.  */
-
-static void
-find_text_range (bfd * sym_bfd, struct objfile *objfile)
-{
-  asection *sec;
-  int found_any = 0;
-  CORE_ADDR start = 0;
-  CORE_ADDR end = 0;
-
-  for (sec = sym_bfd->sections; sec; sec = sec->next)
-    if (bfd_section_flags (sec) & SEC_CODE)
-      {
-	CORE_ADDR sec_start = bfd_section_vma (sec);
-	CORE_ADDR sec_end = sec_start + bfd_section_size (sec);
-
-	if (found_any)
-	  {
-	    if (sec_start < start)
-	      start = sec_start;
-	    if (sec_end > end)
-	      end = sec_end;
-	  }
-	else
-	  {
-	    start = sec_start;
-	    end = sec_end;
-	  }
-
-	found_any = 1;
-      }
-
-  if (!found_any)
-    error (_("Can't find any code sections in symbol file"));
-
-  DBX_TEXT_ADDR (objfile) = start;
-  DBX_TEXT_SIZE (objfile) = end - start;
-}
-
-
-
-/* During initial symbol readin, we need to have a structure to keep
-   track of which psymtabs have which bincls in them.  This structure
-   is used during readin to setup the list of dependencies within each
-   partial symbol table.  */
-
-struct header_file_location
-{
-  header_file_location (const char *name_, int instance_,
-			legacy_psymtab *pst_)
-    : name (name_),
-      instance (instance_),
-      pst (pst_)
-  {
-  }
-
-  const char *name;		/* Name of header file */
-  int instance;			/* See above */
-  legacy_psymtab *pst;	/* Partial symtab that has the
-				   BINCL/EINCL defs for this file.  */
-};
-
-/* The list of bincls.  */
-static std::vector<struct header_file_location> *bincl_list;
 
 /* Local function prototypes.  */
 
-static void read_ofile_symtab (struct objfile *, legacy_psymtab *);
-
-static void dbx_read_symtab (legacy_psymtab *self,
-			     struct objfile *objfile);
-
-static void dbx_expand_psymtab (legacy_psymtab *, struct objfile *);
-
-static void read_dbx_symtab (minimal_symbol_reader &, psymtab_storage *,
-			     struct objfile *);
-
-static legacy_psymtab *find_corresponding_bincl_psymtab (const char *,
-								int);
-
-static const char *dbx_next_symbol_text (struct objfile *);
-
-static void fill_symbuf (bfd *);
-
 static void dbx_symfile_init (struct objfile *);
 
 static void dbx_new_init (struct objfile *);
@@ -284,128 +71,6 @@ static void dbx_symfile_read (struct objfile *, symfile_add_flags);
 
 static void dbx_symfile_finish (struct objfile *);
 
-static void record_minimal_symbol (minimal_symbol_reader &,
-				   const char *, unrelocated_addr, int,
-				   struct objfile *);
-
-static void add_new_header_file (const char *, int);
-
-static void add_old_header_file (const char *, int);
-
-static void add_this_object_header_file (int);
-
-static legacy_psymtab *start_psymtab (psymtab_storage *, struct objfile *,
-				      const char *, unrelocated_addr, int);
-
-/* Free up old header file tables.  */
-
-void
-free_header_files (void)
-{
-  if (this_object_header_files)
-    {
-      xfree (this_object_header_files);
-      this_object_header_files = NULL;
-    }
-  n_allocated_this_object_header_files = 0;
-}
-
-/* Allocate new header file tables.  */
-
-void
-init_header_files (void)
-{
-  n_allocated_this_object_header_files = 10;
-  this_object_header_files = XNEWVEC (int, 10);
-}
-
-/* Add header file number I for this object file
-   at the next successive FILENUM.  */
-
-static void
-add_this_object_header_file (int i)
-{
-  if (n_this_object_header_files == n_allocated_this_object_header_files)
-    {
-      n_allocated_this_object_header_files *= 2;
-      this_object_header_files
-	= (int *) xrealloc ((char *) this_object_header_files,
-		       n_allocated_this_object_header_files * sizeof (int));
-    }
-
-  this_object_header_files[n_this_object_header_files++] = i;
-}
-
-/* Add to this file an "old" header file, one already seen in
-   a previous object file.  NAME is the header file's name.
-   INSTANCE is its instance code, to select among multiple
-   symbol tables for the same header file.  */
-
-static void
-add_old_header_file (const char *name, int instance)
-{
-  struct header_file *p = HEADER_FILES (dbxread_objfile);
-  int i;
-
-  for (i = 0; i < N_HEADER_FILES (dbxread_objfile); i++)
-    if (filename_cmp (p[i].name, name) == 0 && instance == p[i].instance)
-      {
-	add_this_object_header_file (i);
-	return;
-      }
-  repeated_header_complaint (name, symnum);
-}
-
-/* Add to this file a "new" header file: definitions for its types follow.
-   NAME is the header file's name.
-   Most often this happens only once for each distinct header file,
-   but not necessarily.  If it happens more than once, INSTANCE has
-   a different value each time, and references to the header file
-   use INSTANCE values to select among them.
-
-   dbx output contains "begin" and "end" markers for each new header file,
-   but at this level we just need to know which files there have been;
-   so we record the file when its "begin" is seen and ignore the "end".  */
-
-static void
-add_new_header_file (const char *name, int instance)
-{
-  int i;
-  struct header_file *hfile;
-
-  /* Make sure there is room for one more header file.  */
-
-  i = N_ALLOCATED_HEADER_FILES (dbxread_objfile);
-
-  if (N_HEADER_FILES (dbxread_objfile) == i)
-    {
-      if (i == 0)
-	{
-	  N_ALLOCATED_HEADER_FILES (dbxread_objfile) = 10;
-	  HEADER_FILES (dbxread_objfile) = (struct header_file *)
-	    xmalloc (10 * sizeof (struct header_file));
-	}
-      else
-	{
-	  i *= 2;
-	  N_ALLOCATED_HEADER_FILES (dbxread_objfile) = i;
-	  HEADER_FILES (dbxread_objfile) = (struct header_file *)
-	    xrealloc ((char *) HEADER_FILES (dbxread_objfile),
-		      (i * sizeof (struct header_file)));
-	}
-    }
-
-  /* Create an entry for this header file.  */
-
-  i = N_HEADER_FILES (dbxread_objfile)++;
-  hfile = HEADER_FILES (dbxread_objfile) + i;
-  hfile->name = xstrdup (name);
-  hfile->instance = instance;
-  hfile->length = 10;
-  hfile->vector = XCNEWVEC (struct type *, 10);
-
-  add_this_object_header_file (i);
-}
 
 #if 0
 static struct type **
@@ -425,91 +90,6 @@ explicit_lookup_type (int real_filenum, int index)
 }
 #endif
 
-static void
-record_minimal_symbol (minimal_symbol_reader &reader,
-		       const char *name, unrelocated_addr address, int type,
-		       struct objfile *objfile)
-{
-  enum minimal_symbol_type ms_type;
-  int section;
-
-  switch (type)
-    {
-    case N_TEXT | N_EXT:
-      ms_type = mst_text;
-      section = SECT_OFF_TEXT (objfile);
-      break;
-    case N_DATA | N_EXT:
-      ms_type = mst_data;
-      section = SECT_OFF_DATA (objfile);
-      break;
-    case N_BSS | N_EXT:
-      ms_type = mst_bss;
-      section = SECT_OFF_BSS (objfile);
-      break;
-    case N_ABS | N_EXT:
-      ms_type = mst_abs;
-      section = -1;
-      break;
-#ifdef N_SETV
-    case N_SETV | N_EXT:
-      ms_type = mst_data;
-      section = SECT_OFF_DATA (objfile);
-      break;
-    case N_SETV:
-      /* I don't think this type actually exists; since a N_SETV is the result
-	 of going over many .o files, it doesn't make sense to have one
-	 file local.  */
-      ms_type = mst_file_data;
-      section = SECT_OFF_DATA (objfile);
-      break;
-#endif
-    case N_TEXT:
-    case N_NBTEXT:
-    case N_FN:
-    case N_FN_SEQ:
-      ms_type = mst_file_text;
-      section = SECT_OFF_TEXT (objfile);
-      break;
-    case N_DATA:
-      ms_type = mst_file_data;
-
-      /* Check for __DYNAMIC, which is used by Sun shared libraries. 
-	 Record it as global even if it's local, not global, so
-	 lookup_minimal_symbol can find it.  We don't check symbol_leading_char
-	 because for SunOS4 it always is '_'.  */
-      if (strcmp ("__DYNAMIC", name) == 0)
-	ms_type = mst_data;
-
-      /* Same with virtual function tables, both global and static.  */
-      {
-	const char *tempstring = name;
-
-	if (*tempstring != '\0'
-	    && *tempstring == bfd_get_symbol_leading_char (objfile->obfd.get ()))
-	  ++tempstring;
-	if (is_vtable_name (tempstring))
-	  ms_type = mst_data;
-      }
-      section = SECT_OFF_DATA (objfile);
-      break;
-    case N_BSS:
-      ms_type = mst_file_bss;
-      section = SECT_OFF_BSS (objfile);
-      break;
-    default:
-      ms_type = mst_unknown;
-      section = -1;
-      break;
-    }
-
-  if ((ms_type == mst_file_text || ms_type == mst_text)
-      && address < lowest_text_address)
-    lowest_text_address = address;
-
-  reader.record_with_info (name, address, ms_type, section);
-}
-
 /* Scan and build partial symbols for a symbol file.
    We have been initialized by a call to dbx_symfile_init, which 
    put all the relevant info into a "struct dbx_symfile_info",
@@ -518,39 +98,7 @@ record_minimal_symbol (minimal_symbol_reader &reader,
 static void
 dbx_symfile_read (struct objfile *objfile, symfile_add_flags symfile_flags)
 {
-  bfd *sym_bfd;
-  int val;
-
-  sym_bfd = objfile->obfd.get ();
-
-  /* .o and .nlm files are relocatables with text, data and bss segs based at
-     0.  This flag disables special (Solaris stabs-in-elf only) fixups for
-     symbols with a value of 0.  */
-
-  symfile_relocatable = bfd_get_file_flags (sym_bfd) & HAS_RELOC;
-
-  val = bfd_seek (sym_bfd, DBX_SYMTAB_OFFSET (objfile), SEEK_SET);
-  if (val < 0)
-    perror_with_name (objfile_name (objfile));
-
-  symbol_size = DBX_SYMBOL_SIZE (objfile);
-  symbol_table_offset = DBX_SYMTAB_OFFSET (objfile);
-
-  scoped_free_pendings free_pending;
-
-  minimal_symbol_reader reader (objfile);
-
-  /* Read stabs data from executable file and define symbols.  */
-
-  psymbol_functions *psf = new psymbol_functions ();
-  psymtab_storage *partial_symtabs = psf->get_partial_symtabs ().get ();
-  objfile->qf.emplace_front (psf);
-  read_dbx_symtab (reader, partial_symtabs, objfile);
-
-  /* Install any minimal symbols that have been collected as the current
-     minimal symbols for this objfile.  */
-
-  reader.install ();
+  read_stabs_symtab (objfile, symfile_flags);
 }
 
 /* Initialize anything that needs initializing when a completely new
@@ -699,2445 +247,10 @@ dbx_symfile_finish (struct objfile *objfile)
   free_header_files ();
 }
 
-dbx_symfile_info::~dbx_symfile_info ()
-{
-  if (header_files != NULL)
-    {
-      int i = n_header_files;
-      struct header_file *hfiles = header_files;
-
-      while (--i >= 0)
-	{
-	  xfree (hfiles[i].name);
-	  xfree (hfiles[i].vector);
-	}
-      xfree (hfiles);
-    }
-}
-
-
-
-/* Buffer for reading the symbol table entries.  */
-static struct external_nlist symbuf[4096];
-static int symbuf_idx;
-static int symbuf_end;
-
-/* Name of last function encountered.  Used in Solaris to approximate
-   object file boundaries.  */
-static const char *last_function_name;
-
-/* The address in memory of the string table of the object file we are
-   reading (which might not be the "main" object file, but might be a
-   shared library or some other dynamically loaded thing).  This is
-   set by read_dbx_symtab when building psymtabs, and by
-   read_ofile_symtab when building symtabs, and is used only by
-   next_symbol_text.  FIXME: If that is true, we don't need it when
-   building psymtabs, right?  */
-static char *stringtab_global;
-
-/* These variables are used to control fill_symbuf when the stabs
-   symbols are not contiguous (as may be the case when a COFF file is
-   linked using --split-by-reloc).  */
-static const std::vector<asection *> *symbuf_sections;
-static size_t sect_idx;
-static unsigned int symbuf_left;
-static unsigned int symbuf_read;
-
-/* This variable stores a global stabs buffer, if we read stabs into
-   memory in one chunk in order to process relocations.  */
-static bfd_byte *stabs_data;
-
-/* Refill the symbol table input buffer
-   and set the variables that control fetching entries from it.
-   Reports an error if no data available.
-   This function can read past the end of the symbol table
-   (into the string table) but this does no harm.  */
-
-static void
-fill_symbuf (bfd *sym_bfd)
-{
-  unsigned int count;
-  int nbytes;
-
-  if (stabs_data)
-    {
-      nbytes = sizeof (symbuf);
-      if (nbytes > symbuf_left)
-	nbytes = symbuf_left;
-      memcpy (symbuf, stabs_data + symbuf_read, nbytes);
-    }
-  else if (symbuf_sections == NULL)
-    {
-      count = sizeof (symbuf);
-      nbytes = bfd_read (symbuf, count, sym_bfd);
-    }
-  else
-    {
-      if (symbuf_left <= 0)
-	{
-	  file_ptr filepos = (*symbuf_sections)[sect_idx]->filepos;
-
-	  if (bfd_seek (sym_bfd, filepos, SEEK_SET) != 0)
-	    perror_with_name (bfd_get_filename (sym_bfd));
-	  symbuf_left = bfd_section_size ((*symbuf_sections)[sect_idx]);
-	  symbol_table_offset = filepos - symbuf_read;
-	  ++sect_idx;
-	}
-
-      count = symbuf_left;
-      if (count > sizeof (symbuf))
-	count = sizeof (symbuf);
-      nbytes = bfd_read (symbuf, count, sym_bfd);
-    }
-
-  if (nbytes < 0)
-    perror_with_name (bfd_get_filename (sym_bfd));
-  else if (nbytes == 0)
-    error (_("Premature end of file reading symbol table"));
-  symbuf_end = nbytes / symbol_size;
-  symbuf_idx = 0;
-  symbuf_left -= nbytes;
-  symbuf_read += nbytes;
-}
-
-static void
-stabs_seek (int sym_offset)
-{
-  if (stabs_data)
-    {
-      symbuf_read += sym_offset;
-      symbuf_left -= sym_offset;
-    }
-  else
-    if (bfd_seek (symfile_bfd, sym_offset, SEEK_CUR) != 0)
-      perror_with_name (bfd_get_filename (symfile_bfd));
-}
-
-#define INTERNALIZE_SYMBOL(intern, extern, abfd)			\
-  {									\
-    (intern).n_strx = bfd_h_get_32 (abfd, (extern)->e_strx);		\
-    (intern).n_type = bfd_h_get_8 (abfd, (extern)->e_type);		\
-    (intern).n_other = 0;						\
-    (intern).n_desc = bfd_h_get_16 (abfd, (extern)->e_desc);  		\
-    if (bfd_get_sign_extend_vma (abfd))					\
-      (intern).n_value = bfd_h_get_signed_32 (abfd, (extern)->e_value);	\
-    else								\
-      (intern).n_value = bfd_h_get_32 (abfd, (extern)->e_value);	\
-  }
-
-/* Invariant: The symbol pointed to by symbuf_idx is the first one
-   that hasn't been swapped.  Swap the symbol at the same time
-   that symbuf_idx is incremented.  */
-
-/* dbx allows the text of a symbol name to be continued into the
-   next symbol name!  When such a continuation is encountered
-   (a \ at the end of the text of a name)
-   call this function to get the continuation.  */
-
-static const char *
-dbx_next_symbol_text (struct objfile *objfile)
-{
-  struct internal_nlist nlist;
-
-  if (symbuf_idx == symbuf_end)
-    fill_symbuf (symfile_bfd);
-
-  symnum++;
-  INTERNALIZE_SYMBOL (nlist, &symbuf[symbuf_idx], symfile_bfd);
-  OBJSTAT (objfile, n_stabs++);
-
-  symbuf_idx++;
-
-  return nlist.n_strx + stringtab_global + file_string_table_offset;
-}
-
-
-/* Given a name, value pair, find the corresponding
-   bincl in the list.  Return the partial symtab associated
-   with that header_file_location.  */
-
-static legacy_psymtab *
-find_corresponding_bincl_psymtab (const char *name, int instance)
-{
-  for (const header_file_location &bincl : *bincl_list)
-    if (bincl.instance == instance
-	&& strcmp (name, bincl.name) == 0)
-      return bincl.pst;
-
-  repeated_header_complaint (name, symnum);
-  return (legacy_psymtab *) 0;
-}
-
-/* Set namestring based on nlist.  If the string table index is invalid, 
-   give a fake name, and print a single error message per symbol file read,
-   rather than abort the symbol reading or flood the user with messages.  */
-
-static const char *
-set_namestring (struct objfile *objfile, const struct internal_nlist *nlist)
-{
-  const char *namestring;
-
-  if (nlist->n_strx + file_string_table_offset
-      >= DBX_STRINGTAB_SIZE (objfile)
-      || nlist->n_strx + file_string_table_offset < nlist->n_strx)
-    {
-      complaint (_("bad string table offset in symbol %d"),
-		 symnum);
-      namestring = "<bad string table offset>";
-    } 
-  else
-    namestring = (nlist->n_strx + file_string_table_offset
-		  + DBX_STRINGTAB (objfile));
-  return namestring;
-}
-
-static struct bound_minimal_symbol
-find_stab_function (const char *namestring, const char *filename,
-		    struct objfile *objfile)
-{
-  struct bound_minimal_symbol msym;
-  int n;
-
-  const char *colon = strchr (namestring, ':');
-  if (colon == NULL)
-    n = 0;
-  else
-    n = colon - namestring;
-
-  char *p = (char *) alloca (n + 2);
-  strncpy (p, namestring, n);
-  p[n] = 0;
-
-  msym = lookup_minimal_symbol (p, filename, objfile);
-  if (msym.minsym == NULL)
-    {
-      /* Sun Fortran appends an underscore to the minimal symbol name,
-	 try again with an appended underscore if the minimal symbol
-	 was not found.  */
-      p[n] = '_';
-      p[n + 1] = 0;
-      msym = lookup_minimal_symbol (p, filename, objfile);
-    }
-
-  if (msym.minsym == NULL && filename != NULL)
-    {
-      /* Try again without the filename.  */
-      p[n] = 0;
-      msym = lookup_minimal_symbol (p, NULL, objfile);
-    }
-  if (msym.minsym == NULL && filename != NULL)
-    {
-      /* And try again for Sun Fortran, but without the filename.  */
-      p[n] = '_';
-      p[n + 1] = 0;
-      msym = lookup_minimal_symbol (p, NULL, objfile);
-    }
-
-  return msym;
-}
-
-static void
-function_outside_compilation_unit_complaint (const char *arg1)
-{
-  complaint (_("function `%s' appears to be defined "
-	       "outside of all compilation units"),
-	     arg1);
-}
-
-/* Setup partial_symtab's describing each source file for which
-   debugging information is available.  */
-
-static void
-read_dbx_symtab (minimal_symbol_reader &reader,
-		 psymtab_storage *partial_symtabs,
-		 struct objfile *objfile)
-{
-  struct gdbarch *gdbarch = objfile->arch ();
-  struct external_nlist *bufp = 0;	/* =0 avoids gcc -Wall glitch.  */
-  struct internal_nlist nlist;
-  CORE_ADDR text_addr;
-  int text_size;
-  const char *sym_name;
-  int sym_len;
-
-  const char *namestring;
-  int nsl;
-  int past_first_source_file = 0;
-  CORE_ADDR last_function_start = 0;
-  bfd *abfd;
-  int textlow_not_set;
-  int data_sect_index;
-
-  /* Current partial symtab.  */
-  legacy_psymtab *pst;
-
-  /* List of current psymtab's include files.  */
-  const char **psymtab_include_list;
-  int includes_allocated;
-  int includes_used;
-
-  /* Index within current psymtab dependency list.  */
-  legacy_psymtab **dependency_list;
-  int dependencies_used, dependencies_allocated;
-
-  text_addr = DBX_TEXT_ADDR (objfile);
-  text_size = DBX_TEXT_SIZE (objfile);
-
-  /* FIXME.  We probably want to change stringtab_global rather than add this
-     while processing every symbol entry.  FIXME.  */
-  file_string_table_offset = 0;
-  next_file_string_table_offset = 0;
-
-  stringtab_global = DBX_STRINGTAB (objfile);
-
-  pst = (legacy_psymtab *) 0;
-
-  includes_allocated = 30;
-  includes_used = 0;
-  psymtab_include_list = (const char **) alloca (includes_allocated *
-						 sizeof (const char *));
-
-  dependencies_allocated = 30;
-  dependencies_used = 0;
-  dependency_list =
-    (legacy_psymtab **) alloca (dependencies_allocated *
-				sizeof (legacy_psymtab *));
-
-  /* Init bincl list */
-  std::vector<struct header_file_location> bincl_storage;
-  scoped_restore restore_bincl_global
-    = make_scoped_restore (&bincl_list, &bincl_storage);
-
-  set_last_source_file (NULL);
-
-  lowest_text_address = (unrelocated_addr) -1;
-
-  symfile_bfd = objfile->obfd.get ();	/* For next_text_symbol.  */
-  abfd = objfile->obfd.get ();
-  symbuf_end = symbuf_idx = 0;
-  next_symbol_text_func = dbx_next_symbol_text;
-  textlow_not_set = 1;
-  has_line_numbers = 0;
-
-  /* FIXME: jimb/2003-09-12: We don't apply the right section's offset
-     to global and static variables.  The stab for a global or static
-     variable doesn't give us any indication of which section it's in,
-     so we can't tell immediately which offset in
-     objfile->section_offsets we should apply to the variable's
-     address.
-
-     We could certainly find out which section contains the variable
-     by looking up the variable's unrelocated address with
-     find_pc_section, but that would be expensive; this is the
-     function that constructs the partial symbol tables by examining
-     every symbol in the entire executable, and it's
-     performance-critical.  So that expense would not be welcome.  I'm
-     not sure what to do about this at the moment.
-
-     What we have done for years is to simply assume that the .data
-     section's offset is appropriate for all global and static
-     variables.  Recently, this was expanded to fall back to the .bss
-     section's offset if there is no .data section, and then to the
-     .rodata section's offset.  */
-  data_sect_index = objfile->sect_index_data;
-  if (data_sect_index == -1)
-    data_sect_index = SECT_OFF_BSS (objfile);
-  if (data_sect_index == -1)
-    data_sect_index = SECT_OFF_RODATA (objfile);
-
-  /* If data_sect_index is still -1, that's okay.  It's perfectly fine
-     for the file to have no .data, no .bss, and no .text at all, if
-     it also has no global or static variables.  */
-
-  for (symnum = 0; symnum < DBX_SYMCOUNT (objfile); symnum++)
-    {
-      /* Get the symbol for this run and pull out some info.  */
-      QUIT;			/* Allow this to be interruptable.  */
-      if (symbuf_idx == symbuf_end)
-	fill_symbuf (abfd);
-      bufp = &symbuf[symbuf_idx++];
-
-      /*
-       * Special case to speed up readin.
-       */
-      if (bfd_h_get_8 (abfd, bufp->e_type) == N_SLINE)
-	{
-	  has_line_numbers = 1;
-	  continue;
-	}
-
-      INTERNALIZE_SYMBOL (nlist, bufp, abfd);
-      OBJSTAT (objfile, n_stabs++);
-
-      /* Ok.  There is a lot of code duplicated in the rest of this
-	 switch statement (for efficiency reasons).  Since I don't
-	 like duplicating code, I will do my penance here, and
-	 describe the code which is duplicated:
-
-	 *) The assignment to namestring.
-	 *) The call to strchr.
-	 *) The addition of a partial symbol the two partial
-	 symbol lists.  This last is a large section of code, so
-	 I've embedded it in the following macro.  */
-
-      switch (nlist.n_type)
-	{
-	  /*
-	   * Standard, external, non-debugger, symbols
-	   */
-
-	case N_TEXT | N_EXT:
-	case N_NBTEXT | N_EXT:
-	  goto record_it;
-
-	case N_DATA | N_EXT:
-	case N_NBDATA | N_EXT:
-	  goto record_it;
-
-	case N_BSS:
-	case N_BSS | N_EXT:
-	case N_NBBSS | N_EXT:
-	case N_SETV | N_EXT:		/* FIXME, is this in BSS? */
-	  goto record_it;
-
-	case N_ABS | N_EXT:
-	  record_it:
-	  namestring = set_namestring (objfile, &nlist);
-
-	  record_minimal_symbol (reader, namestring,
-				 unrelocated_addr (nlist.n_value),
-				 nlist.n_type, objfile);	/* Always */
-	  continue;
-
-	  /* Standard, local, non-debugger, symbols.  */
-
-	case N_NBTEXT:
-
-	  /* We need to be able to deal with both N_FN or N_TEXT,
-	     because we have no way of knowing whether the sys-supplied ld
-	     or GNU ld was used to make the executable.  Sequents throw
-	     in another wrinkle -- they renumbered N_FN.  */
-
-	case N_FN:
-	case N_FN_SEQ:
-	case N_TEXT:
-	  namestring = set_namestring (objfile, &nlist);
-
-	  if ((namestring[0] == '-' && namestring[1] == 'l')
-	      || (namestring[(nsl = strlen (namestring)) - 1] == 'o'
-		  && namestring[nsl - 2] == '.'))
-	    {
-	      unrelocated_addr unrel_val = unrelocated_addr (nlist.n_value);
-
-	      if (past_first_source_file && pst
-		  /* The gould NP1 uses low values for .o and -l symbols
-		     which are not the address.  */
-		  && unrel_val >= pst->unrelocated_text_low ())
-		{
-		  dbx_end_psymtab (objfile, partial_symtabs,
-				   pst, psymtab_include_list,
-				   includes_used, symnum * symbol_size,
-				   unrel_val > pst->unrelocated_text_high ()
-				   ? unrel_val : pst->unrelocated_text_high (),
-				   dependency_list, dependencies_used,
-				   textlow_not_set);
-		  pst = (legacy_psymtab *) 0;
-		  includes_used = 0;
-		  dependencies_used = 0;
-		  has_line_numbers = 0;
-		}
-	      else
-		past_first_source_file = 1;
-	    }
-	  else
-	    goto record_it;
-	  continue;
-
-	case N_DATA:
-	  goto record_it;
-
-	case N_UNDF | N_EXT:
-	  /* The case (nlist.n_value != 0) is a "Fortran COMMON" symbol.
-	     We used to rely on the target to tell us whether it knows
-	     where the symbol has been relocated to, but none of the
-	     target implementations actually provided that operation.
-	     So we just ignore the symbol, the same way we would do if
-	     we had a target-side symbol lookup which returned no match.
-
-	     All other symbols (with nlist.n_value == 0), are really
-	     undefined, and so we ignore them too.  */
-	  continue;
-
-	case N_UNDF:
-	  if (processing_acc_compilation && nlist.n_strx == 1)
-	    {
-	      /* Deal with relative offsets in the string table
-		 used in ELF+STAB under Solaris.  If we want to use the
-		 n_strx field, which contains the name of the file,
-		 we must adjust file_string_table_offset *before* calling
-		 set_namestring().  */
-	      past_first_source_file = 1;
-	      file_string_table_offset = next_file_string_table_offset;
-	      next_file_string_table_offset =
-		file_string_table_offset + nlist.n_value;
-	      if (next_file_string_table_offset < file_string_table_offset)
-		error (_("string table offset backs up at %d"), symnum);
-	      /* FIXME -- replace error() with complaint.  */
-	      continue;
-	    }
-	  continue;
-
-	  /* Lots of symbol types we can just ignore.  */
-
-	case N_ABS:
-	case N_NBDATA:
-	case N_NBBSS:
-	  continue;
-
-	  /* Keep going . . .  */
-
-	  /*
-	   * Special symbol types for GNU
-	   */
-	case N_INDR:
-	case N_INDR | N_EXT:
-	case N_SETA:
-	case N_SETA | N_EXT:
-	case N_SETT:
-	case N_SETT | N_EXT:
-	case N_SETD:
-	case N_SETD | N_EXT:
-	case N_SETB:
-	case N_SETB | N_EXT:
-	case N_SETV:
-	  continue;
-
-	  /*
-	   * Debugger symbols
-	   */
-
-	case N_SO:
-	  {
-	    CORE_ADDR valu;
-	    static int prev_so_symnum = -10;
-	    static int first_so_symnum;
-	    const char *p;
-	    static const char *dirname_nso;
-	    int prev_textlow_not_set;
-
-	    valu = nlist.n_value;
-
-	    prev_textlow_not_set = textlow_not_set;
-
-	    /* A zero value is probably an indication for the SunPRO 3.0
-	       compiler.  dbx_end_psymtab explicitly tests for zero, so
-	       don't relocate it.  */
-
-	    if (nlist.n_value == 0
-		&& gdbarch_sofun_address_maybe_missing (gdbarch))
-	      {
-		textlow_not_set = 1;
-		valu = 0;
-	      }
-	    else
-	      textlow_not_set = 0;
-
-	    past_first_source_file = 1;
-
-	    if (prev_so_symnum != symnum - 1)
-	      {			/* Here if prev stab wasn't N_SO.  */
-		first_so_symnum = symnum;
-
-		if (pst)
-		  {
-		    unrelocated_addr unrel_value = unrelocated_addr (valu);
-		    dbx_end_psymtab (objfile, partial_symtabs,
-				     pst, psymtab_include_list,
-				     includes_used, symnum * symbol_size,
-				     unrel_value > pst->unrelocated_text_high ()
-				     ? unrel_value
-				     : pst->unrelocated_text_high (),
-				     dependency_list, dependencies_used,
-				     prev_textlow_not_set);
-		    pst = (legacy_psymtab *) 0;
-		    includes_used = 0;
-		    dependencies_used = 0;
-		    has_line_numbers = 0;
-		  }
-	      }
-
-	    prev_so_symnum = symnum;
-
-	    /* End the current partial symtab and start a new one.  */
-
-	    namestring = set_namestring (objfile, &nlist);
-
-	    /* Null name means end of .o file.  Don't start a new one.  */
-	    if (*namestring == '\000')
-	      continue;
-
-	    /* Some compilers (including gcc) emit a pair of initial N_SOs.
-	       The first one is a directory name; the second the file name.
-	       If pst exists, is empty, and has a filename ending in '/',
-	       we assume the previous N_SO was a directory name.  */
-
-	    p = lbasename (namestring);
-	    if (p != namestring && *p == '\000')
-	      {
-		/* Save the directory name SOs locally, then save it into
-		   the psymtab when it's created below.  */
-		dirname_nso = namestring;
-		continue;		
-	      }
-
-	    /* Some other compilers (C++ ones in particular) emit useless
-	       SOs for non-existant .c files.  We ignore all subsequent SOs
-	       that immediately follow the first.  */
-
-	    if (!pst)
-	      {
-		pst = start_psymtab (partial_symtabs, objfile,
-				     namestring,
-				     unrelocated_addr (valu),
-				     first_so_symnum * symbol_size);
-		pst->dirname = dirname_nso;
-		dirname_nso = NULL;
-	      }
-	    continue;
-	  }
-
-	case N_BINCL:
-	  {
-	    enum language tmp_language;
-
-	    /* Add this bincl to the bincl_list for future EXCLs.  No
-	       need to save the string; it'll be around until
-	       read_dbx_symtab function returns.  */
-
-	    namestring = set_namestring (objfile, &nlist);
-	    tmp_language = deduce_language_from_filename (namestring);
-
-	    /* Only change the psymtab's language if we've learned
-	       something useful (eg. tmp_language is not language_unknown).
-	       In addition, to match what start_subfile does, never change
-	       from C++ to C.  */
-	    if (tmp_language != language_unknown
-		&& (tmp_language != language_c
-		    || psymtab_language != language_cplus))
-	      psymtab_language = tmp_language;
-
-	    if (pst == NULL)
-	      {
-		/* FIXME: we should not get here without a PST to work on.
-		   Attempt to recover.  */
-		complaint (_("N_BINCL %s not in entries for "
-			     "any file, at symtab pos %d"),
-			   namestring, symnum);
-		continue;
-	      }
-	    bincl_list->emplace_back (namestring, nlist.n_value, pst);
-
-	    /* Mark down an include file in the current psymtab.  */
-
-	    goto record_include_file;
-	  }
-
-	case N_SOL:
-	  {
-	    enum language tmp_language;
-
-	    /* Mark down an include file in the current psymtab.  */
-	    namestring = set_namestring (objfile, &nlist);
-	    tmp_language = deduce_language_from_filename (namestring);
-
-	    /* Only change the psymtab's language if we've learned
-	       something useful (eg. tmp_language is not language_unknown).
-	       In addition, to match what start_subfile does, never change
-	       from C++ to C.  */
-	    if (tmp_language != language_unknown
-		&& (tmp_language != language_c
-		    || psymtab_language != language_cplus))
-	      psymtab_language = tmp_language;
-
-	    /* In C++, one may expect the same filename to come round many
-	       times, when code is coming alternately from the main file
-	       and from inline functions in other files.  So I check to see
-	       if this is a file we've seen before -- either the main
-	       source file, or a previously included file.
-
-	       This seems to be a lot of time to be spending on N_SOL, but
-	       things like "break c-exp.y:435" need to work (I
-	       suppose the psymtab_include_list could be hashed or put
-	       in a binary tree, if profiling shows this is a major hog).  */
-	    if (pst && filename_cmp (namestring, pst->filename) == 0)
-	      continue;
-	    {
-	      int i;
-
-	      for (i = 0; i < includes_used; i++)
-		if (filename_cmp (namestring, psymtab_include_list[i]) == 0)
-		  {
-		    i = -1;
-		    break;
-		  }
-	      if (i == -1)
-		continue;
-	    }
-
-	  record_include_file:
-
-	    psymtab_include_list[includes_used++] = namestring;
-	    if (includes_used >= includes_allocated)
-	      {
-		const char **orig = psymtab_include_list;
-
-		psymtab_include_list = (const char **)
-		  alloca ((includes_allocated *= 2) * sizeof (const char *));
-		memcpy (psymtab_include_list, orig,
-			includes_used * sizeof (const char *));
-	      }
-	    continue;
-	  }
-	case N_LSYM:		/* Typedef or automatic variable.  */
-	case N_STSYM:		/* Data seg var -- static.  */
-	case N_LCSYM:		/* BSS      "  */
-	case N_ROSYM:		/* Read-only data seg var -- static.  */
-	case N_NBSTS:		/* Gould nobase.  */
-	case N_NBLCS:		/* symbols.  */
-	case N_FUN:
-	case N_GSYM:		/* Global (extern) variable; can be
-				   data or bss (sigh FIXME).  */
-
-	  /* Following may probably be ignored; I'll leave them here
-	     for now (until I do Pascal and Modula 2 extensions).  */
-
-	case N_PC:		/* I may or may not need this; I
-				   suspect not.  */
-	case N_M2C:		/* I suspect that I can ignore this here.  */
-	case N_SCOPE:		/* Same.   */
-	{
-	  const char *p;
-
-	  namestring = set_namestring (objfile, &nlist);
-
-	  /* See if this is an end of function stab.  */
-	  if (pst && nlist.n_type == N_FUN && *namestring == '\000')
-	    {
-	      unrelocated_addr valu;
-
-	      /* It's value is the size (in bytes) of the function for
-		 function relative stabs, or the address of the function's
-		 end for old style stabs.  */
-	      valu = unrelocated_addr (nlist.n_value + last_function_start);
-	      if (pst->unrelocated_text_high () == unrelocated_addr (0)
-		  || valu > pst->unrelocated_text_high ())
-		pst->set_text_high (valu);
-	      break;
-	    }
-
-	  p = (char *) strchr (namestring, ':');
-	  if (!p)
-	    continue;		/* Not a debugging symbol.   */
-
-	  sym_len = 0;
-	  sym_name = NULL;	/* pacify "gcc -Werror" */
-	  if (psymtab_language == language_cplus)
-	    {
-	      std::string name (namestring, p - namestring);
-	      gdb::unique_xmalloc_ptr<char> new_name
-		= cp_canonicalize_string (name.c_str ());
-	      if (new_name != nullptr)
-		{
-		  sym_len = strlen (new_name.get ());
-		  sym_name = obstack_strdup (&objfile->objfile_obstack,
-					     new_name.get ());
-		}
-	    }
-	  else if (psymtab_language == language_c)
-	    {
-	      std::string name (namestring, p - namestring);
-	      gdb::unique_xmalloc_ptr<char> new_name
-		= c_canonicalize_name (name.c_str ());
-	      if (new_name != nullptr)
-		{
-		  sym_len = strlen (new_name.get ());
-		  sym_name = obstack_strdup (&objfile->objfile_obstack,
-					     new_name.get ());
-		}
-	    }
-
-	  if (sym_len == 0)
-	    {
-	      sym_name = namestring;
-	      sym_len = p - namestring;
-	    }
-
-	  /* Main processing section for debugging symbols which
-	     the initial read through the symbol tables needs to worry
-	     about.  If we reach this point, the symbol which we are
-	     considering is definitely one we are interested in.
-	     p must also contain the (valid) index into the namestring
-	     which indicates the debugging type symbol.  */
-
-	  switch (p[1])
-	    {
-	    case 'S':
-	      if (pst != nullptr)
-		pst->add_psymbol (std::string_view (sym_name, sym_len), true,
-				  VAR_DOMAIN, LOC_STATIC,
-				  data_sect_index,
-				  psymbol_placement::STATIC,
-				  unrelocated_addr (nlist.n_value),
-				  psymtab_language,
-				  partial_symtabs, objfile);
-	      else
-		complaint (_("static `%*s' appears to be defined "
-			     "outside of all compilation units"),
-			   sym_len, sym_name);
-	      continue;
-
-	    case 'G':
-	      /* The addresses in these entries are reported to be
-		 wrong.  See the code that reads 'G's for symtabs.  */
-	      if (pst != nullptr)
-		pst->add_psymbol (std::string_view (sym_name, sym_len), true,
-				  VAR_DOMAIN, LOC_STATIC,
-				  data_sect_index,
-				  psymbol_placement::GLOBAL,
-				  unrelocated_addr (nlist.n_value),
-				  psymtab_language,
-				  partial_symtabs, objfile);
-	      else
-		complaint (_("global `%*s' appears to be defined "
-			     "outside of all compilation units"),
-			   sym_len, sym_name);
-	      continue;
-
-	    case 'T':
-	      /* When a 'T' entry is defining an anonymous enum, it
-		 may have a name which is the empty string, or a
-		 single space.  Since they're not really defining a
-		 symbol, those shouldn't go in the partial symbol
-		 table.  We do pick up the elements of such enums at
-		 'check_enum:', below.  */
-	      if (p >= namestring + 2
-		  || (p == namestring + 1
-		      && namestring[0] != ' '))
-		{
-		  if (pst != nullptr)
-		    pst->add_psymbol (std::string_view (sym_name, sym_len),
-				      true, STRUCT_DOMAIN, LOC_TYPEDEF, -1,
-				      psymbol_placement::STATIC,
-				      unrelocated_addr (0),
-				      psymtab_language,
-				      partial_symtabs, objfile);
-		  else
-		    complaint (_("enum, struct, or union `%*s' appears "
-				 "to be defined outside of all "
-				 "compilation units"),
-			       sym_len, sym_name);
-		  if (p[2] == 't')
-		    {
-		      /* Also a typedef with the same name.  */
-		      if (pst != nullptr)
-			pst->add_psymbol (std::string_view (sym_name, sym_len),
-					  true, VAR_DOMAIN, LOC_TYPEDEF, -1,
-					  psymbol_placement::STATIC,
-					  unrelocated_addr (0),
-					  psymtab_language,
-					  partial_symtabs, objfile);
-		      else
-			complaint (_("typedef `%*s' appears to be defined "
-				     "outside of all compilation units"),
-				   sym_len, sym_name);
-		      p += 1;
-		    }
-		}
-	      goto check_enum;
-
-	    case 't':
-	      if (p != namestring)	/* a name is there, not just :T...  */
-		{
-		  if (pst != nullptr)
-		    pst->add_psymbol (std::string_view (sym_name, sym_len),
-				      true, VAR_DOMAIN, LOC_TYPEDEF, -1,
-				      psymbol_placement::STATIC,
-				      unrelocated_addr (0),
-				      psymtab_language,
-				      partial_symtabs, objfile);
-		  else
-		    complaint (_("typename `%*s' appears to be defined "
-				 "outside of all compilation units"),
-			       sym_len, sym_name);
-		}
-	    check_enum:
-	      /* If this is an enumerated type, we need to
-		 add all the enum constants to the partial symbol
-		 table.  This does not cover enums without names, e.g.
-		 "enum {a, b} c;" in C, but fortunately those are
-		 rare.  There is no way for GDB to find those from the
-		 enum type without spending too much time on it.  Thus
-		 to solve this problem, the compiler needs to put out the
-		 enum in a nameless type.  GCC2 does this.  */
-
-	      /* We are looking for something of the form
-		 <name> ":" ("t" | "T") [<number> "="] "e"
-		 {<constant> ":" <value> ","} ";".  */
-
-	      /* Skip over the colon and the 't' or 'T'.  */
-	      p += 2;
-	      /* This type may be given a number.  Also, numbers can come
-		 in pairs like (0,26).  Skip over it.  */
-	      while ((*p >= '0' && *p <= '9')
-		     || *p == '(' || *p == ',' || *p == ')'
-		     || *p == '=')
-		p++;
-
-	      if (*p++ == 'e')
-		{
-		  /* The aix4 compiler emits extra crud before the members.  */
-		  if (*p == '-')
-		    {
-		      /* Skip over the type (?).  */
-		      while (*p != ':')
-			p++;
-
-		      /* Skip over the colon.  */
-		      p++;
-		    }
-
-		  /* We have found an enumerated type.  */
-		  /* According to comments in read_enum_type
-		     a comma could end it instead of a semicolon.
-		     I don't know where that happens.
-		     Accept either.  */
-		  while (*p && *p != ';' && *p != ',')
-		    {
-		      const char *q;
-
-		      /* Check for and handle cretinous dbx symbol name
-			 continuation!  */
-		      if (*p == '\\' || (*p == '?' && p[1] == '\0'))
-			p = next_symbol_text (objfile);
-
-		      /* Point to the character after the name
-			 of the enum constant.  */
-		      for (q = p; *q && *q != ':'; q++)
-			;
-		      /* Note that the value doesn't matter for
-			 enum constants in psymtabs, just in symtabs.  */
-		      if (pst != nullptr)
-			pst->add_psymbol (std::string_view (p, q - p), true,
-					  VAR_DOMAIN, LOC_CONST, -1,
-					  psymbol_placement::STATIC,
-					  unrelocated_addr (0),
-					  psymtab_language,
-					  partial_symtabs, objfile);
-		      else
-			complaint (_("enum constant `%*s' appears to be defined "
-				     "outside of all compilation units"),
-				   ((int) (q - p)), p);
-		      /* Point past the name.  */
-		      p = q;
-		      /* Skip over the value.  */
-		      while (*p && *p != ',')
-			p++;
-		      /* Advance past the comma.  */
-		      if (*p)
-			p++;
-		    }
-		}
-	      continue;
-
-	    case 'c':
-	      /* Constant, e.g. from "const" in Pascal.  */
-	      if (pst != nullptr)
-		pst->add_psymbol (std::string_view (sym_name, sym_len), true,
-				  VAR_DOMAIN, LOC_CONST, -1,
-				  psymbol_placement::STATIC,
-				  unrelocated_addr (0),
-				  psymtab_language,
-				  partial_symtabs, objfile);
-	      else
-		complaint (_("constant `%*s' appears to be defined "
-			     "outside of all compilation units"),
-			   sym_len, sym_name);
-
-	      continue;
-
-	    case 'f':
-	      if (! pst)
-		{
-		  std::string name (namestring, (p - namestring));
-		  function_outside_compilation_unit_complaint (name.c_str ());
-		}
-	      /* Kludges for ELF/STABS with Sun ACC.  */
-	      last_function_name = namestring;
-	      /* Do not fix textlow==0 for .o or NLM files, as 0 is a legit
-		 value for the bottom of the text seg in those cases.  */
-	      if (nlist.n_value == 0
-		  && gdbarch_sofun_address_maybe_missing (gdbarch))
-		{
-		  struct bound_minimal_symbol minsym
-		    = find_stab_function (namestring,
-					  pst ? pst->filename : NULL,
-					  objfile);
-		  if (minsym.minsym != NULL)
-		    nlist.n_value
-		      = CORE_ADDR (minsym.minsym->unrelocated_address ());
-		}
-	      if (pst && textlow_not_set
-		  && gdbarch_sofun_address_maybe_missing (gdbarch))
-		{
-		  pst->set_text_low (unrelocated_addr (nlist.n_value));
-		  textlow_not_set = 0;
-		}
-	      /* End kludge.  */
-
-	      /* Keep track of the start of the last function so we
-		 can handle end of function symbols.  */
-	      last_function_start = nlist.n_value;
-
-	      /* In reordered executables this function may lie outside
-		 the bounds created by N_SO symbols.  If that's the case
-		 use the address of this function as the low bound for
-		 the partial symbol table.  */
-	      if (pst
-		  && (textlow_not_set
-		      || (unrelocated_addr (nlist.n_value)
-			  < pst->unrelocated_text_low ()
-			  && (nlist.n_value != 0))))
-		{
-		  pst->set_text_low (unrelocated_addr (nlist.n_value));
-		  textlow_not_set = 0;
-		}
-	      if (pst != nullptr)
-		pst->add_psymbol (std::string_view (sym_name, sym_len), true,
-				  VAR_DOMAIN, LOC_BLOCK,
-				  SECT_OFF_TEXT (objfile),
-				  psymbol_placement::STATIC,
-				  unrelocated_addr (nlist.n_value),
-				  psymtab_language,
-				  partial_symtabs, objfile);
-	      continue;
-
-	      /* Global functions were ignored here, but now they
-		 are put into the global psymtab like one would expect.
-		 They're also in the minimal symbol table.  */
-	    case 'F':
-	      if (! pst)
-		{
-		  std::string name (namestring, (p - namestring));
-		  function_outside_compilation_unit_complaint (name.c_str ());
-		}
-	      /* Kludges for ELF/STABS with Sun ACC.  */
-	      last_function_name = namestring;
-	      /* Do not fix textlow==0 for .o or NLM files, as 0 is a legit
-		 value for the bottom of the text seg in those cases.  */
-	      if (nlist.n_value == 0
-		  && gdbarch_sofun_address_maybe_missing (gdbarch))
-		{
-		  struct bound_minimal_symbol minsym
-		    = find_stab_function (namestring,
-					  pst ? pst->filename : NULL,
-					  objfile);
-		  if (minsym.minsym != NULL)
-		    nlist.n_value
-		      = CORE_ADDR (minsym.minsym->unrelocated_address ());
-		}
-	      if (pst && textlow_not_set
-		  && gdbarch_sofun_address_maybe_missing (gdbarch))
-		{
-		  pst->set_text_low (unrelocated_addr (nlist.n_value));
-		  textlow_not_set = 0;
-		}
-	      /* End kludge.  */
-
-	      /* Keep track of the start of the last function so we
-		 can handle end of function symbols.  */
-	      last_function_start = nlist.n_value;
-
-	      /* In reordered executables this function may lie outside
-		 the bounds created by N_SO symbols.  If that's the case
-		 use the address of this function as the low bound for
-		 the partial symbol table.  */
-	      if (pst
-		  && (textlow_not_set
-		      || (unrelocated_addr (nlist.n_value)
-			  < pst->unrelocated_text_low ()
-			  && (nlist.n_value != 0))))
-		{
-		  pst->set_text_low (unrelocated_addr (nlist.n_value));
-		  textlow_not_set = 0;
-		}
-	      if (pst != nullptr)
-		pst->add_psymbol (std::string_view (sym_name, sym_len), true,
-				  VAR_DOMAIN, LOC_BLOCK,
-				  SECT_OFF_TEXT (objfile),
-				  psymbol_placement::GLOBAL,
-				  unrelocated_addr (nlist.n_value),
-				  psymtab_language,
-				  partial_symtabs, objfile);
-	      continue;
-
-	      /* Two things show up here (hopefully); static symbols of
-		 local scope (static used inside braces) or extensions
-		 of structure symbols.  We can ignore both.  */
-	    case 'V':
-	    case '(':
-	    case '0':
-	    case '1':
-	    case '2':
-	    case '3':
-	    case '4':
-	    case '5':
-	    case '6':
-	    case '7':
-	    case '8':
-	    case '9':
-	    case '-':
-	    case '#':	/* For symbol identification (used in live ranges).  */
-	      continue;
-
-	    case ':':
-	      /* It is a C++ nested symbol.  We don't need to record it
-		 (I don't think); if we try to look up foo::bar::baz,
-		 then symbols for the symtab containing foo should get
-		 read in, I think.  */
-	      /* Someone says sun cc puts out symbols like
-		 /foo/baz/maclib::/usr/local/bin/maclib,
-		 which would get here with a symbol type of ':'.  */
-	      continue;
-
-	    default:
-	      /* Unexpected symbol descriptor.  The second and subsequent stabs
-		 of a continued stab can show up here.  The question is
-		 whether they ever can mimic a normal stab--it would be
-		 nice if not, since we certainly don't want to spend the
-		 time searching to the end of every string looking for
-		 a backslash.  */
-
-	      complaint (_("unknown symbol descriptor `%c'"),
-			 p[1]);
-
-	      /* Ignore it; perhaps it is an extension that we don't
-		 know about.  */
-	      continue;
-	    }
-	}
-
-	case N_EXCL:
-
-	  namestring = set_namestring (objfile, &nlist);
-
-	  /* Find the corresponding bincl and mark that psymtab on the
-	     psymtab dependency list.  */
-	  {
-	    legacy_psymtab *needed_pst =
-	      find_corresponding_bincl_psymtab (namestring, nlist.n_value);
-
-	    /* If this include file was defined earlier in this file,
-	       leave it alone.  */
-	    if (needed_pst == pst)
-	      continue;
-
-	    if (needed_pst)
-	      {
-		int i;
-		int found = 0;
-
-		for (i = 0; i < dependencies_used; i++)
-		  if (dependency_list[i] == needed_pst)
-		    {
-		      found = 1;
-		      break;
-		    }
-
-		/* If it's already in the list, skip the rest.  */
-		if (found)
-		  continue;
-
-		dependency_list[dependencies_used++] = needed_pst;
-		if (dependencies_used >= dependencies_allocated)
-		  {
-		    legacy_psymtab **orig = dependency_list;
-
-		    dependency_list =
-		      (legacy_psymtab **)
-		      alloca ((dependencies_allocated *= 2)
-			      * sizeof (legacy_psymtab *));
-		    memcpy (dependency_list, orig,
-			    (dependencies_used
-			     * sizeof (legacy_psymtab *)));
-#ifdef DEBUG_INFO
-		    gdb_printf (gdb_stderr,
-				"Had to reallocate "
-				"dependency list.\n");
-		    gdb_printf (gdb_stderr,
-				"New dependencies allocated: %d\n",
-				dependencies_allocated);
-#endif
-		  }
-	      }
-	  }
-	  continue;
-
-	case N_ENDM:
-	  /* Solaris 2 end of module, finish current partial symbol
-	     table.  dbx_end_psymtab will set the high text address of
-	     PST to the proper value, which is necessary if a module
-	     compiled without debugging info follows this module.  */
-	  if (pst && gdbarch_sofun_address_maybe_missing (gdbarch))
-	    {
-	      dbx_end_psymtab (objfile, partial_symtabs, pst,
-			       psymtab_include_list, includes_used,
-			       symnum * symbol_size,
-			       (unrelocated_addr) 0, dependency_list,
-			       dependencies_used, textlow_not_set);
-	      pst = (legacy_psymtab *) 0;
-	      includes_used = 0;
-	      dependencies_used = 0;
-	      has_line_numbers = 0;
-	    }
-	  continue;
-
-	case N_RBRAC:
-#ifdef HANDLE_RBRAC
-	  HANDLE_RBRAC (nlist.n_value);
-	  continue;
-#endif
-	case N_EINCL:
-	case N_DSLINE:
-	case N_BSLINE:
-	case N_SSYM:		/* Claim: Structure or union element.
-				   Hopefully, I can ignore this.  */
-	case N_ENTRY:		/* Alternate entry point; can ignore.  */
-	case N_MAIN:		/* Can definitely ignore this.   */
-	case N_CATCH:		/* These are GNU C++ extensions */
-	case N_EHDECL:		/* that can safely be ignored here.  */
-	case N_LENG:
-	case N_BCOMM:
-	case N_ECOMM:
-	case N_ECOML:
-	case N_FNAME:
-	case N_SLINE:
-	case N_RSYM:
-	case N_PSYM:
-	case N_BNSYM:
-	case N_ENSYM:
-	case N_LBRAC:
-	case N_NSYMS:		/* Ultrix 4.0: symbol count */
-	case N_DEFD:		/* GNU Modula-2 */
-	case N_ALIAS:		/* SunPro F77: alias name, ignore for now.  */
-
-	case N_OBJ:		/* Useless types from Solaris.  */
-	case N_OPT:
-	case N_PATCH:
-	  /* These symbols aren't interesting; don't worry about them.  */
-	  continue;
-
-	default:
-	  /* If we haven't found it yet, ignore it.  It's probably some
-	     new type we don't know about yet.  */
-	  unknown_symtype_complaint (hex_string (nlist.n_type));
-	  continue;
-	}
-    }
-
-  /* If there's stuff to be cleaned up, clean it up.  */
-  if (pst)
-    {
-      /* Don't set high text address of PST lower than it already
-	 is.  */
-      unrelocated_addr text_end
-	= (unrelocated_addr
-	   ((lowest_text_address == (unrelocated_addr) -1
-	     ? text_addr
-	     : CORE_ADDR (lowest_text_address))
-	    + text_size));
-
-      dbx_end_psymtab (objfile, partial_symtabs,
-		       pst, psymtab_include_list, includes_used,
-		       symnum * symbol_size,
-		       (text_end > pst->unrelocated_text_high ()
-			? text_end : pst->unrelocated_text_high ()),
-		       dependency_list, dependencies_used, textlow_not_set);
-    }
-}
-
-/* Allocate and partially fill a partial symtab.  It will be
-   completely filled at the end of the symbol list.
-
-   SYMFILE_NAME is the name of the symbol-file we are reading from, and ADDR
-   is the address relative to which its symbols are (incremental) or 0
-   (normal).  */
-
-static legacy_psymtab *
-start_psymtab (psymtab_storage *partial_symtabs, struct objfile *objfile,
-	       const char *filename, unrelocated_addr textlow, int ldsymoff)
-{
-  legacy_psymtab *result = new legacy_psymtab (filename, partial_symtabs,
-					       objfile->per_bfd, textlow);
-
-  result->read_symtab_private =
-    XOBNEW (&objfile->objfile_obstack, struct symloc);
-  LDSYMOFF (result) = ldsymoff;
-  result->legacy_read_symtab = dbx_read_symtab;
-  result->legacy_expand_psymtab = dbx_expand_psymtab;
-  SYMBOL_SIZE (result) = symbol_size;
-  SYMBOL_OFFSET (result) = symbol_table_offset;
-  STRING_OFFSET (result) = string_table_offset;
-  FILE_STRING_OFFSET (result) = file_string_table_offset;
-
-  /* Deduce the source language from the filename for this psymtab.  */
-  psymtab_language = deduce_language_from_filename (filename);
-  PST_LANGUAGE (result) = psymtab_language;
-
-  return result;
-}
-
-/* Close off the current usage of PST.
-   Returns PST or NULL if the partial symtab was empty and thrown away.
-
-   FIXME:  List variables and peculiarities of same.  */
-
-legacy_psymtab *
-dbx_end_psymtab (struct objfile *objfile, psymtab_storage *partial_symtabs,
-		 legacy_psymtab *pst,
-		 const char **include_list, int num_includes,
-		 int capping_symbol_offset, unrelocated_addr capping_text,
-		 legacy_psymtab **dependency_list,
-		 int number_dependencies,
-		 int textlow_not_set)
-{
-  int i;
-  struct gdbarch *gdbarch = objfile->arch ();
-
-  if (capping_symbol_offset != -1)
-    LDSYMLEN (pst) = capping_symbol_offset - LDSYMOFF (pst);
-  pst->set_text_high (capping_text);
-
-  /* Under Solaris, the N_SO symbols always have a value of 0,
-     instead of the usual address of the .o file.  Therefore,
-     we have to do some tricks to fill in texthigh and textlow.
-     The first trick is: if we see a static
-     or global function, and the textlow for the current pst
-     is not set (ie: textlow_not_set), then we use that function's
-     address for the textlow of the pst.  */
-
-  /* Now, to fill in texthigh, we remember the last function seen
-     in the .o file.  Also, there's a hack in
-     bfd/elf.c and gdb/elfread.c to pass the ELF st_size field
-     to here via the misc_info field.  Therefore, we can fill in
-     a reliable texthigh by taking the address plus size of the
-     last function in the file.  */
-
-  if (!pst->text_high_valid && last_function_name
-      && gdbarch_sofun_address_maybe_missing (gdbarch))
-    {
-      int n;
-      struct bound_minimal_symbol minsym;
-
-      const char *colon = strchr (last_function_name, ':');
-      if (colon == NULL)
-	n = 0;
-      else
-	n = colon - last_function_name;
-      char *p = (char *) alloca (n + 2);
-      strncpy (p, last_function_name, n);
-      p[n] = 0;
-
-      minsym = lookup_minimal_symbol (p, pst->filename, objfile);
-      if (minsym.minsym == NULL)
-	{
-	  /* Sun Fortran appends an underscore to the minimal symbol name,
-	     try again with an appended underscore if the minimal symbol
-	     was not found.  */
-	  p[n] = '_';
-	  p[n + 1] = 0;
-	  minsym = lookup_minimal_symbol (p, pst->filename, objfile);
-	}
-
-      if (minsym.minsym)
-	pst->set_text_high
-	  (unrelocated_addr (CORE_ADDR (minsym.minsym->unrelocated_address ())
-			     + minsym.minsym->size ()));
-
-      last_function_name = NULL;
-    }
-
-  if (!gdbarch_sofun_address_maybe_missing (gdbarch))
-    ;
-  /* This test will be true if the last .o file is only data.  */
-  else if (textlow_not_set)
-    pst->set_text_low (pst->unrelocated_text_high ());
-  else
-    {
-      /* If we know our own starting text address, then walk through all other
-	 psymtabs for this objfile, and if any didn't know their ending text
-	 address, set it to our starting address.  Take care to not set our
-	 own ending address to our starting address.  */
-
-      for (partial_symtab *p1 : partial_symtabs->range ())
-	if (!p1->text_high_valid && p1->text_low_valid && p1 != pst)
-	  p1->set_text_high (pst->unrelocated_text_low ());
-    }
-
-  /* End of kludge for patching Solaris textlow and texthigh.  */
-
-  pst->end ();
-
-  pst->number_of_dependencies = number_dependencies;
-  if (number_dependencies)
-    {
-      pst->dependencies
-	= partial_symtabs->allocate_dependencies (number_dependencies);
-      memcpy (pst->dependencies, dependency_list,
-	      number_dependencies * sizeof (legacy_psymtab *));
-    }
-  else
-    pst->dependencies = 0;
-
-  for (i = 0; i < num_includes; i++)
-    {
-      legacy_psymtab *subpst =
-	new legacy_psymtab (include_list[i], partial_symtabs, objfile->per_bfd);
-
-      subpst->read_symtab_private =
-	XOBNEW (&objfile->objfile_obstack, struct symloc);
-      LDSYMOFF (subpst) =
-	LDSYMLEN (subpst) = 0;
-
-      /* We could save slight bits of space by only making one of these,
-	 shared by the entire set of include files.  FIXME-someday.  */
-      subpst->dependencies =
-	partial_symtabs->allocate_dependencies (1);
-      subpst->dependencies[0] = pst;
-      subpst->number_of_dependencies = 1;
-
-      subpst->legacy_read_symtab = pst->legacy_read_symtab;
-      subpst->legacy_expand_psymtab = pst->legacy_expand_psymtab;
-    }
-
-  if (num_includes == 0
-      && number_dependencies == 0
-      && pst->empty ()
-      && has_line_numbers == 0)
-    {
-      /* Throw away this psymtab, it's empty.  */
-      /* Empty psymtabs happen as a result of header files which don't have
-	 any symbols in them.  There can be a lot of them.  But this check
-	 is wrong, in that a psymtab with N_SLINE entries but nothing else
-	 is not empty, but we don't realize that.  Fixing that without slowing
-	 things down might be tricky.  */
-
-      partial_symtabs->discard_psymtab (pst);
-
-      /* Indicate that psymtab was thrown away.  */
-      pst = NULL;
-    }
-  return pst;
-}
 
-static void
-dbx_expand_psymtab (legacy_psymtab *pst, struct objfile *objfile)
-{
-  gdb_assert (!pst->readin);
-
-  /* Read in all partial symtabs on which this one is dependent.  */
-  pst->expand_dependencies (objfile);
-
-  if (LDSYMLEN (pst))		/* Otherwise it's a dummy.  */
-    {
-      /* Init stuff necessary for reading in symbols */
-      stabsread_init ();
-      scoped_free_pendings free_pending;
-      file_string_table_offset = FILE_STRING_OFFSET (pst);
-      symbol_size = SYMBOL_SIZE (pst);
-
-      /* Read in this file's symbols.  */
-      if (bfd_seek (objfile->obfd.get (), SYMBOL_OFFSET (pst), SEEK_SET) == 0)
-	read_ofile_symtab (objfile, pst);
-    }
 
-  pst->readin = true;
-}
-
-/* Read in all of the symbols for a given psymtab for real.
-   Be verbose about it if the user wants that.  SELF is not NULL.  */
-
-static void
-dbx_read_symtab (legacy_psymtab *self, struct objfile *objfile)
-{
-  gdb_assert (!self->readin);
-
-  if (LDSYMLEN (self) || self->number_of_dependencies)
-    {
-      next_symbol_text_func = dbx_next_symbol_text;
-
-      {
-	scoped_restore restore_stabs_data = make_scoped_restore (&stabs_data);
-	gdb::unique_xmalloc_ptr<gdb_byte> data_holder;
-	if (DBX_STAB_SECTION (objfile))
-	  {
-	    stabs_data
-	      = symfile_relocate_debug_section (objfile,
-						DBX_STAB_SECTION (objfile),
-						NULL);
-	    data_holder.reset (stabs_data);
-	  }
-
-	self->expand_psymtab (objfile);
-      }
-
-      /* Match with global symbols.  This only needs to be done once,
-	 after all of the symtabs and dependencies have been read in.   */
-      scan_file_globals (objfile);
-    }
-}
-
-/* Read in a defined section of a specific object file's symbols.  */
-
-static void
-read_ofile_symtab (struct objfile *objfile, legacy_psymtab *pst)
-{
-  const char *namestring;
-  struct external_nlist *bufp;
-  struct internal_nlist nlist;
-  unsigned char type;
-  unsigned max_symnum;
-  bfd *abfd;
-  int sym_offset;		/* Offset to start of symbols to read */
-  int sym_size;			/* Size of symbols to read */
-  CORE_ADDR text_offset;	/* Start of text segment for symbols */
-  int text_size;		/* Size of text segment for symbols */
-
-  sym_offset = LDSYMOFF (pst);
-  sym_size = LDSYMLEN (pst);
-  text_offset = pst->text_low (objfile);
-  text_size = pst->text_high (objfile) - pst->text_low (objfile);
-  const section_offsets &section_offsets = objfile->section_offsets;
-
-  dbxread_objfile = objfile;
-
-  stringtab_global = DBX_STRINGTAB (objfile);
-  set_last_source_file (NULL);
-
-  abfd = objfile->obfd.get ();
-  symfile_bfd = objfile->obfd.get ();	/* Implicit param to next_text_symbol.  */
-  symbuf_end = symbuf_idx = 0;
-  symbuf_read = 0;
-  symbuf_left = sym_offset + sym_size;
-
-  /* It is necessary to actually read one symbol *before* the start
-     of this symtab's symbols, because the GCC_COMPILED_FLAG_SYMBOL
-     occurs before the N_SO symbol.
-
-     Detecting this in read_dbx_symtab
-     would slow down initial readin, so we look for it here instead.  */
-  if (!processing_acc_compilation && sym_offset >= (int) symbol_size)
-    {
-      stabs_seek (sym_offset - symbol_size);
-      fill_symbuf (abfd);
-      bufp = &symbuf[symbuf_idx++];
-      INTERNALIZE_SYMBOL (nlist, bufp, abfd);
-      OBJSTAT (objfile, n_stabs++);
-
-      namestring = set_namestring (objfile, &nlist);
-
-      processing_gcc_compilation = 0;
-      if (nlist.n_type == N_TEXT)
-	{
-	  const char *tempstring = namestring;
-
-	  if (strcmp (namestring, GCC_COMPILED_FLAG_SYMBOL) == 0)
-	    processing_gcc_compilation = 1;
-	  else if (strcmp (namestring, GCC2_COMPILED_FLAG_SYMBOL) == 0)
-	    processing_gcc_compilation = 2;
-	  if (*tempstring != '\0'
-	      && *tempstring == bfd_get_symbol_leading_char (symfile_bfd))
-	    ++tempstring;
-	  if (startswith (tempstring, "__gnu_compiled"))
-	    processing_gcc_compilation = 2;
-	}
-    }
-  else
-    {
-      /* The N_SO starting this symtab is the first symbol, so we
-	 better not check the symbol before it.  I'm not this can
-	 happen, but it doesn't hurt to check for it.  */
-      stabs_seek (sym_offset);
-      processing_gcc_compilation = 0;
-    }
-
-  if (symbuf_idx == symbuf_end)
-    fill_symbuf (abfd);
-  bufp = &symbuf[symbuf_idx];
-  if (bfd_h_get_8 (abfd, bufp->e_type) != N_SO)
-    error (_("First symbol in segment of executable not a source symbol"));
-
-  max_symnum = sym_size / symbol_size;
-
-  for (symnum = 0;
-       symnum < max_symnum;
-       symnum++)
-    {
-      QUIT;			/* Allow this to be interruptable.  */
-      if (symbuf_idx == symbuf_end)
-	fill_symbuf (abfd);
-      bufp = &symbuf[symbuf_idx++];
-      INTERNALIZE_SYMBOL (nlist, bufp, abfd);
-      OBJSTAT (objfile, n_stabs++);
-
-      type = bfd_h_get_8 (abfd, bufp->e_type);
-
-      namestring = set_namestring (objfile, &nlist);
-
-      if (type & N_STAB)
-	{
-	  if (sizeof (nlist.n_value) > 4
-	      /* We are a 64-bit debugger debugging a 32-bit program.  */
-	      && (type == N_LSYM || type == N_PSYM))
-	      /* We have to be careful with the n_value in the case of N_LSYM
-		 and N_PSYM entries, because they are signed offsets from frame
-		 pointer, but we actually read them as unsigned 32-bit values.
-		 This is not a problem for 32-bit debuggers, for which negative
-		 values end up being interpreted correctly (as negative
-		 offsets) due to integer overflow.
-		 But we need to sign-extend the value for 64-bit debuggers,
-		 or we'll end up interpreting negative values as very large
-		 positive offsets.  */
-	    nlist.n_value = (nlist.n_value ^ 0x80000000) - 0x80000000;
-	  process_one_symbol (type, nlist.n_desc, nlist.n_value,
-			      namestring, section_offsets, objfile,
-			      PST_LANGUAGE (pst));
-	}
-      /* We skip checking for a new .o or -l file; that should never
-	 happen in this routine.  */
-      else if (type == N_TEXT)
-	{
-	  /* I don't think this code will ever be executed, because
-	     the GCC_COMPILED_FLAG_SYMBOL usually is right before
-	     the N_SO symbol which starts this source file.
-	     However, there is no reason not to accept
-	     the GCC_COMPILED_FLAG_SYMBOL anywhere.  */
-
-	  if (strcmp (namestring, GCC_COMPILED_FLAG_SYMBOL) == 0)
-	    processing_gcc_compilation = 1;
-	  else if (strcmp (namestring, GCC2_COMPILED_FLAG_SYMBOL) == 0)
-	    processing_gcc_compilation = 2;
-	}
-      else if (type & N_EXT || type == (unsigned char) N_TEXT
-	       || type == (unsigned char) N_NBTEXT)
-	{
-	  /* Global symbol: see if we came across a dbx definition for
-	     a corresponding symbol.  If so, store the value.  Remove
-	     syms from the chain when their values are stored, but
-	     search the whole chain, as there may be several syms from
-	     different files with the same name.  */
-	  /* This is probably not true.  Since the files will be read
-	     in one at a time, each reference to a global symbol will
-	     be satisfied in each file as it appears.  So we skip this
-	     section.  */
-	  ;
-	}
-    }
-
-  /* In a Solaris elf file, this variable, which comes from the value
-     of the N_SO symbol, will still be 0.  Luckily, text_offset, which
-     comes from low text address of PST, is correct.  */
-  if (get_last_source_start_addr () == 0)
-    set_last_source_start_addr (text_offset);
-
-  /* In reordered executables last_source_start_addr may not be the
-     lower bound for this symtab, instead use text_offset which comes
-     from the low text address of PST, which is correct.  */
-  if (get_last_source_start_addr () > text_offset)
-    set_last_source_start_addr (text_offset);
-
-  pst->compunit_symtab = end_compunit_symtab (text_offset + text_size);
-
-  end_stabs ();
-
-  dbxread_objfile = NULL;
-}
 
-
-/* Record the namespace that the function defined by SYMBOL was
-   defined in, if necessary.  BLOCK is the associated block; use
-   OBSTACK for allocation.  */
-
-static void
-cp_set_block_scope (const struct symbol *symbol,
-		    struct block *block,
-		    struct obstack *obstack)
-{
-  if (symbol->demangled_name () != NULL)
-    {
-      /* Try to figure out the appropriate namespace from the
-	 demangled name.  */
-
-      /* FIXME: carlton/2003-04-15: If the function in question is
-	 a method of a class, the name will actually include the
-	 name of the class as well.  This should be harmless, but
-	 is a little unfortunate.  */
-
-      const char *name = symbol->demangled_name ();
-      unsigned int prefix_len = cp_entire_prefix_len (name);
-
-      block->set_scope (obstack_strndup (obstack, name, prefix_len),
-			obstack);
-    }
-}
-
-/* This handles a single symbol from the symbol-file, building symbols
-   into a GDB symtab.  It takes these arguments and an implicit argument.
-
-   TYPE is the type field of the ".stab" symbol entry.
-   DESC is the desc field of the ".stab" entry.
-   VALU is the value field of the ".stab" entry.
-   NAME is the symbol name, in our address space.
-   SECTION_OFFSETS is a set of amounts by which the sections of this
-   object file were relocated when it was loaded into memory.  Note
-   that these section_offsets are not the objfile->section_offsets but
-   the pst->section_offsets.  All symbols that refer to memory
-   locations need to be offset by these amounts.
-   OBJFILE is the object file from which we are reading symbols.  It
-   is used in end_compunit_symtab.
-   LANGUAGE is the language of the symtab.
-*/
-
-void
-process_one_symbol (int type, int desc, CORE_ADDR valu, const char *name,
-		    const section_offsets &section_offsets,
-		    struct objfile *objfile, enum language language)
-{
-  struct gdbarch *gdbarch = objfile->arch ();
-  struct context_stack *newobj;
-  struct context_stack cstk;
-  /* This remembers the address of the start of a function.  It is
-     used because in Solaris 2, N_LBRAC, N_RBRAC, and N_SLINE entries
-     are relative to the current function's start address.  On systems
-     other than Solaris 2, this just holds the SECT_OFF_TEXT value,
-     and is used to relocate these symbol types rather than
-     SECTION_OFFSETS.  */
-  static CORE_ADDR function_start_offset;
-
-  /* This holds the address of the start of a function, without the
-     system peculiarities of function_start_offset.  */
-  static CORE_ADDR last_function_start;
-
-  /* If this is nonzero, we've seen an N_SLINE since the start of the
-     current function.  We use this to tell us to move the first sline
-     to the beginning of the function regardless of what its given
-     value is.  */
-  static int sline_found_in_function = 1;
-
-  /* If this is nonzero, we've seen a non-gcc N_OPT symbol for this
-     source file.  Used to detect the SunPRO solaris compiler.  */
-  static int n_opt_found;
-
-  /* The section index for this symbol.  */
-  int section_index = -1;
-
-  /* Something is wrong if we see real data before seeing a source
-     file name.  */
-
-  if (get_last_source_file () == NULL && type != (unsigned char) N_SO)
-    {
-      /* Ignore any symbols which appear before an N_SO symbol.
-	 Currently no one puts symbols there, but we should deal
-	 gracefully with the case.  A complain()t might be in order,
-	 but this should not be an error ().  */
-      return;
-    }
-
-  switch (type)
-    {
-    case N_FUN:
-    case N_FNAME:
-
-      if (*name == '\000')
-	{
-	  /* This N_FUN marks the end of a function.  This closes off
-	     the current block.  */
-	  struct block *block;
-
-	  if (outermost_context_p ())
-	    {
-	      lbrac_mismatch_complaint (symnum);
-	      break;
-	    }
-
-	  /* The following check is added before recording line 0 at
-	     end of function so as to handle hand-generated stabs
-	     which may have an N_FUN stabs at the end of the function,
-	     but no N_SLINE stabs.  */
-	  if (sline_found_in_function)
-	    {
-	      CORE_ADDR addr = last_function_start + valu;
-
-	      record_line
-		(get_current_subfile (), 0,
-		 unrelocated_addr (gdbarch_addr_bits_remove (gdbarch, addr)
-				   - objfile->text_section_offset ()));
-	    }
-
-	  within_function = 0;
-	  cstk = pop_context ();
-
-	  /* Make a block for the local symbols within.  */
-	  block = finish_block (cstk.name,
-				cstk.old_blocks, NULL,
-				cstk.start_addr, cstk.start_addr + valu);
-
-	  /* For C++, set the block's scope.  */
-	  if (cstk.name->language () == language_cplus)
-	    cp_set_block_scope (cstk.name, block, &objfile->objfile_obstack);
-
-	  /* May be switching to an assembler file which may not be using
-	     block relative stabs, so reset the offset.  */
-	  function_start_offset = 0;
-
-	  break;
-	}
-
-      sline_found_in_function = 0;
-
-      /* Relocate for dynamic loading.  */
-      section_index = SECT_OFF_TEXT (objfile);
-      valu += section_offsets[SECT_OFF_TEXT (objfile)];
-      valu = gdbarch_addr_bits_remove (gdbarch, valu);
-      last_function_start = valu;
-
-      goto define_a_symbol;
-
-    case N_LBRAC:
-      /* This "symbol" just indicates the start of an inner lexical
-	 context within a function.  */
-
-      /* Ignore extra outermost context from SunPRO cc and acc.  */
-      if (n_opt_found && desc == 1)
-	break;
-
-      valu += function_start_offset;
-
-      push_context (desc, valu);
-      break;
-
-    case N_RBRAC:
-      /* This "symbol" just indicates the end of an inner lexical
-	 context that was started with N_LBRAC.  */
-
-      /* Ignore extra outermost context from SunPRO cc and acc.  */
-      if (n_opt_found && desc == 1)
-	break;
-
-      valu += function_start_offset;
-
-      if (outermost_context_p ())
-	{
-	  lbrac_mismatch_complaint (symnum);
-	  break;
-	}
-
-      cstk = pop_context ();
-      if (desc != cstk.depth)
-	lbrac_mismatch_complaint (symnum);
-
-      if (*get_local_symbols () != NULL)
-	{
-	  /* GCC development snapshots from March to December of
-	     2000 would output N_LSYM entries after N_LBRAC
-	     entries.  As a consequence, these symbols are simply
-	     discarded.  Complain if this is the case.  */
-	  complaint (_("misplaced N_LBRAC entry; discarding local "
-		       "symbols which have no enclosing block"));
-	}
-      *get_local_symbols () = cstk.locals;
-
-      if (get_context_stack_depth () > 1)
-	{
-	  /* This is not the outermost LBRAC...RBRAC pair in the
-	     function, its local symbols preceded it, and are the ones
-	     just recovered from the context stack.  Define the block
-	     for them (but don't bother if the block contains no
-	     symbols.  Should we complain on blocks without symbols?
-	     I can't think of any useful purpose for them).  */
-	  if (*get_local_symbols () != NULL)
-	    {
-	      /* Muzzle a compiler bug that makes end < start.
-
-		 ??? Which compilers?  Is this ever harmful?.  */
-	      if (cstk.start_addr > valu)
-		{
-		  complaint (_("block start larger than block end"));
-		  cstk.start_addr = valu;
-		}
-	      /* Make a block for the local symbols within.  */
-	      finish_block (0, cstk.old_blocks, NULL,
-			    cstk.start_addr, valu);
-	    }
-	}
-      else
-	{
-	  /* This is the outermost LBRAC...RBRAC pair.  There is no
-	     need to do anything; leave the symbols that preceded it
-	     to be attached to the function's own block.  We need to
-	     indicate that we just moved outside of the function.  */
-	  within_function = 0;
-	}
-
-      break;
-
-    case N_FN:
-    case N_FN_SEQ:
-      /* This kind of symbol indicates the start of an object file.
-	 Relocate for dynamic loading.  */
-      section_index = SECT_OFF_TEXT (objfile);
-      valu += section_offsets[SECT_OFF_TEXT (objfile)];
-      break;
-
-    case N_SO:
-      /* This type of symbol indicates the start of data for one
-	 source file.  Finish the symbol table of the previous source
-	 file (if any) and start accumulating a new symbol table.
-	 Relocate for dynamic loading.  */
-      section_index = SECT_OFF_TEXT (objfile);
-      valu += section_offsets[SECT_OFF_TEXT (objfile)];
-
-      n_opt_found = 0;
-
-      if (get_last_source_file ())
-	{
-	  /* Check if previous symbol was also an N_SO (with some
-	     sanity checks).  If so, that one was actually the
-	     directory name, and the current one is the real file
-	     name.  Patch things up.  */
-	  if (previous_stab_code == (unsigned char) N_SO)
-	    {
-	      patch_subfile_names (get_current_subfile (), name);
-	      break;		/* Ignore repeated SOs.  */
-	    }
-	  end_compunit_symtab (valu);
-	  end_stabs ();
-	}
-
-      /* Null name means this just marks the end of text for this .o
-	 file.  Don't start a new symtab in this case.  */
-      if (*name == '\000')
-	break;
-
-      function_start_offset = 0;
-
-      start_stabs ();
-      start_compunit_symtab (objfile, name, NULL, valu, language);
-      record_debugformat ("stabs");
-      break;
-
-    case N_SOL:
-      /* This type of symbol indicates the start of data for a
-	 sub-source-file, one whose contents were copied or included
-	 in the compilation of the main source file (whose name was
-	 given in the N_SO symbol).  Relocate for dynamic loading.  */
-      section_index = SECT_OFF_TEXT (objfile);
-      valu += section_offsets[SECT_OFF_TEXT (objfile)];
-      start_subfile (name);
-      break;
-
-    case N_BINCL:
-      push_subfile ();
-      add_new_header_file (name, valu);
-      start_subfile (name);
-      break;
-
-    case N_EINCL:
-      start_subfile (pop_subfile ());
-      break;
-
-    case N_EXCL:
-      add_old_header_file (name, valu);
-      break;
-
-    case N_SLINE:
-      /* This type of "symbol" really just records one line-number --
-	 core-address correspondence.  Enter it in the line list for
-	 this symbol table.  */
-
-      /* Relocate for dynamic loading and for ELF acc
-	 function-relative symbols.  */
-      valu += function_start_offset;
-
-      /* GCC 2.95.3 emits the first N_SLINE stab somewhere in the
-	 middle of the prologue instead of right at the start of the
-	 function.  To deal with this we record the address for the
-	 first N_SLINE stab to be the start of the function instead of
-	 the listed location.  We really shouldn't to this.  When
-	 compiling with optimization, this first N_SLINE stab might be
-	 optimized away.  Other (non-GCC) compilers don't emit this
-	 stab at all.  There is no real harm in having an extra
-	 numbered line, although it can be a bit annoying for the
-	 user.  However, it totally screws up our testsuite.
-
-	 So for now, keep adjusting the address of the first N_SLINE
-	 stab, but only for code compiled with GCC.  */
-
-      if (within_function && sline_found_in_function == 0)
-	{
-	  CORE_ADDR addr = processing_gcc_compilation == 2 ?
-			   last_function_start : valu;
-
-	  record_line
-	    (get_current_subfile (), desc,
-	     unrelocated_addr (gdbarch_addr_bits_remove (gdbarch, addr)
-			       - objfile->text_section_offset ()));
-	  sline_found_in_function = 1;
-	}
-      else
-	record_line
-	  (get_current_subfile (), desc,
-	   unrelocated_addr (gdbarch_addr_bits_remove (gdbarch, valu)
-			     - objfile->text_section_offset ()));
-      break;
-
-    case N_BCOMM:
-      common_block_start (name, objfile);
-      break;
-
-    case N_ECOMM:
-      common_block_end (objfile);
-      break;
-
-      /* The following symbol types need to have the appropriate
-	 offset added to their value; then we process symbol
-	 definitions in the name.  */
-
-    case N_STSYM:		/* Static symbol in data segment.  */
-    case N_LCSYM:		/* Static symbol in BSS segment.  */
-    case N_ROSYM:		/* Static symbol in read-only data segment.  */
-      /* HORRID HACK DEPT.  However, it's Sun's furgin' fault.
-	 Solaris 2's stabs-in-elf makes *most* symbols relative but
-	 leaves a few absolute (at least for Solaris 2.1 and version
-	 2.0.1 of the SunPRO compiler).  N_STSYM and friends sit on
-	 the fence.  .stab "foo:S...",N_STSYM is absolute (ld
-	 relocates it) .stab "foo:V...",N_STSYM is relative (section
-	 base subtracted).  This leaves us no choice but to search for
-	 the 'S' or 'V'...  (or pass the whole section_offsets stuff
-	 down ONE MORE function call level, which we really don't want
-	 to do).  */
-      {
-	const char *p;
-
-	/* Normal object file and NLMs have non-zero text seg offsets,
-	   but don't need their static syms offset in this fashion.
-	   XXX - This is really a crock that should be fixed in the
-	   solib handling code so that I don't have to work around it
-	   here.  */
-
-	if (!symfile_relocatable)
-	  {
-	    p = strchr (name, ':');
-	    if (p != 0 && p[1] == 'S')
-	      {
-		/* The linker relocated it.  We don't want to add a
-		   Sun-stabs Tfoo.foo-like offset, but we *do*
-		   want to add whatever solib.c passed to
-		   symbol_file_add as addr (this is known to affect
-		   SunOS 4, and I suspect ELF too).  Since there is no
-		   Ttext.text symbol, we can get addr from the text offset.  */
-		section_index = SECT_OFF_TEXT (objfile);
-		valu += section_offsets[SECT_OFF_TEXT (objfile)];
-		goto define_a_symbol;
-	      }
-	  }
-	/* Since it's not the kludge case, re-dispatch to the right
-	   handler.  */
-	switch (type)
-	  {
-	  case N_STSYM:
-	    goto case_N_STSYM;
-	  case N_LCSYM:
-	    goto case_N_LCSYM;
-	  case N_ROSYM:
-	    goto case_N_ROSYM;
-	  default:
-	    internal_error (_("failed internal consistency check"));
-	  }
-      }
-
-    case_N_STSYM:		/* Static symbol in data segment.  */
-    case N_DSLINE:		/* Source line number, data segment.  */
-      section_index = SECT_OFF_DATA (objfile);
-      valu += section_offsets[SECT_OFF_DATA (objfile)];
-      goto define_a_symbol;
-
-    case_N_LCSYM:		/* Static symbol in BSS segment.  */
-    case N_BSLINE:		/* Source line number, BSS segment.  */
-      /* N_BROWS: overlaps with N_BSLINE.  */
-      section_index = SECT_OFF_BSS (objfile);
-      valu += section_offsets[SECT_OFF_BSS (objfile)];
-      goto define_a_symbol;
-
-    case_N_ROSYM:		/* Static symbol in read-only data segment.  */
-      section_index = SECT_OFF_RODATA (objfile);
-      valu += section_offsets[SECT_OFF_RODATA (objfile)];
-      goto define_a_symbol;
-
-    case N_ENTRY:		/* Alternate entry point.  */
-      /* Relocate for dynamic loading.  */
-      section_index = SECT_OFF_TEXT (objfile);
-      valu += section_offsets[SECT_OFF_TEXT (objfile)];
-      goto define_a_symbol;
-
-      /* The following symbol types we don't know how to process.
-	 Handle them in a "default" way, but complain to people who
-	 care.  */
-    default:
-    case N_CATCH:		/* Exception handler catcher.  */
-    case N_EHDECL:		/* Exception handler name.  */
-    case N_PC:			/* Global symbol in Pascal.  */
-    case N_M2C:			/* Modula-2 compilation unit.  */
-      /* N_MOD2: overlaps with N_EHDECL.  */
-    case N_SCOPE:		/* Modula-2 scope information.  */
-    case N_ECOML:		/* End common (local name).  */
-    case N_NBTEXT:		/* Gould Non-Base-Register symbols???  */
-    case N_NBDATA:
-    case N_NBBSS:
-    case N_NBSTS:
-    case N_NBLCS:
-      unknown_symtype_complaint (hex_string (type));
-
-    define_a_symbol:
-      [[fallthrough]];
-      /* These symbol types don't need the address field relocated,
-	 since it is either unused, or is absolute.  */
-    case N_GSYM:		/* Global variable.  */
-    case N_NSYMS:		/* Number of symbols (Ultrix).  */
-    case N_NOMAP:		/* No map?  (Ultrix).  */
-    case N_RSYM:		/* Register variable.  */
-    case N_DEFD:		/* Modula-2 GNU module dependency.  */
-    case N_SSYM:		/* Struct or union element.  */
-    case N_LSYM:		/* Local symbol in stack.  */
-    case N_PSYM:		/* Parameter variable.  */
-    case N_LENG:		/* Length of preceding symbol type.  */
-      if (name)
-	{
-	  int deftype;
-	  const char *colon_pos = strchr (name, ':');
-
-	  if (colon_pos == NULL)
-	    deftype = '\0';
-	  else
-	    deftype = colon_pos[1];
-
-	  switch (deftype)
-	    {
-	    case 'f':
-	    case 'F':
-	      /* Deal with the SunPRO 3.0 compiler which omits the
-		 address from N_FUN symbols.  */
-	      if (type == N_FUN
-		  && valu == section_offsets[SECT_OFF_TEXT (objfile)]
-		  && gdbarch_sofun_address_maybe_missing (gdbarch))
-		{
-		  struct bound_minimal_symbol minsym
-		    = find_stab_function (name, get_last_source_file (),
-					  objfile);
-		  if (minsym.minsym != NULL)
-		    valu = minsym.value_address ();
-		}
-
-	      /* These addresses are absolute.  */
-	      function_start_offset = valu;
-
-	      within_function = 1;
-
-	      if (get_context_stack_depth () > 1)
-		{
-		  complaint (_("unmatched N_LBRAC before symtab pos %d"),
-			     symnum);
-		  break;
-		}
-
-	      if (!outermost_context_p ())
-		{
-		  struct block *block;
-
-		  cstk = pop_context ();
-		  /* Make a block for the local symbols within.  */
-		  block = finish_block (cstk.name,
-					cstk.old_blocks, NULL,
-					cstk.start_addr, valu);
-
-		  /* For C++, set the block's scope.  */
-		  if (cstk.name->language () == language_cplus)
-		    cp_set_block_scope (cstk.name, block,
-					&objfile->objfile_obstack);
-		}
-
-	      newobj = push_context (0, valu);
-	      newobj->name = define_symbol (valu, name, desc, type, objfile);
-	      if (newobj->name != nullptr)
-		newobj->name->set_section_index (section_index);
-	      break;
-
-	    default:
-	      {
-		struct symbol *sym = define_symbol (valu, name, desc, type,
-						    objfile);
-		if (sym != nullptr)
-		  sym->set_section_index (section_index);
-	      }
-	      break;
-	    }
-	}
-      break;
-
-      /* We use N_OPT to carry the gcc2_compiled flag.  Sun uses it
-	 for a bunch of other flags, too.  Someday we may parse their
-	 flags; for now we ignore theirs and hope they'll ignore ours.  */
-    case N_OPT:			/* Solaris 2: Compiler options.  */
-      if (name)
-	{
-	  if (strcmp (name, GCC2_COMPILED_FLAG_SYMBOL) == 0)
-	    {
-	      processing_gcc_compilation = 2;
-	    }
-	  else
-	    n_opt_found = 1;
-	}
-      break;
-
-    case N_MAIN:		/* Name of main routine.  */
-      /* FIXME: If one has a symbol file with N_MAIN and then replaces
-	 it with a symbol file with "main" and without N_MAIN.  I'm
-	 not sure exactly what rule to follow but probably something
-	 like: N_MAIN takes precedence over "main" no matter what
-	 objfile it is in; If there is more than one N_MAIN, choose
-	 the one in the symfile_objfile; If there is more than one
-	 N_MAIN within a given objfile, complain() and choose
-	 arbitrarily.  (kingdon) */
-      if (name != NULL)
-	set_objfile_main_name (objfile, name, language_unknown);
-      break;
-
-      /* The following symbol types can be ignored.  */
-    case N_OBJ:			/* Solaris 2: Object file dir and name.  */
-    case N_PATCH:		/* Solaris 2: Patch Run Time Checker.  */
-      /* N_UNDF:                   Solaris 2: File separator mark.  */
-      /* N_UNDF: -- we will never encounter it, since we only process
-	 one file's symbols at once.  */
-    case N_ENDM:		/* Solaris 2: End of module.  */
-    case N_ALIAS:		/* SunPro F77: alias name, ignore for now.  */
-      break;
-    }
-
-  /* '#' is a GNU C extension to allow one symbol to refer to another
-     related symbol.
-
-     Generally this is used so that an alias can refer to its main
-     symbol.  */
-  gdb_assert (name);
-  if (name[0] == '#')
-    {
-      /* Initialize symbol reference names and determine if this is a
-	 definition.  If a symbol reference is being defined, go ahead
-	 and add it.  Otherwise, just return.  */
-
-      const char *s = name;
-      int refnum;
-
-      /* If this stab defines a new reference ID that is not on the
-	 reference list, then put it on the reference list.
-
-	 We go ahead and advance NAME past the reference, even though
-	 it is not strictly necessary at this time.  */
-      refnum = symbol_reference_defined (&s);
-      if (refnum >= 0)
-	if (!ref_search (refnum))
-	  ref_add (refnum, 0, name, valu);
-      name = s;
-    }
-
-  previous_stab_code = type;
-}
-
-/* FIXME: The only difference between this and elfstab_build_psymtabs
-   is the call to install_minimal_symbols for elf, and the support for
-   split sections.  If the differences are really that small, the code
-   should be shared.  */
-
-/* Scan and build partial symbols for an coff symbol file.
-   The coff file has already been processed to get its minimal symbols.
-
-   This routine is the equivalent of dbx_symfile_init and dbx_symfile_read
-   rolled into one.
-
-   OBJFILE is the object file we are reading symbols from.
-   ADDR is the address relative to which the symbols are (e.g.
-   the base address of the text segment).
-   TEXTADDR is the address of the text section.
-   TEXTSIZE is the size of the text section.
-   STABSECTS is the list of .stab sections in OBJFILE.
-   STABSTROFFSET and STABSTRSIZE define the location in OBJFILE where the
-   .stabstr section exists.
-
-   This routine is mostly copied from dbx_symfile_init and dbx_symfile_read,
-   adjusted for coff details.  */
-
-void
-coffstab_build_psymtabs (struct objfile *objfile,
-			 CORE_ADDR textaddr, unsigned int textsize,
-			 const std::vector<asection *> &stabsects,
-			 file_ptr stabstroffset, unsigned int stabstrsize)
-{
-  int val;
-  bfd *sym_bfd = objfile->obfd.get ();
-  const char *name = bfd_get_filename (sym_bfd);
-  unsigned int stabsize;
-
-  /* Allocate struct to keep track of stab reading.  */
-  dbx_objfile_data_key.emplace (objfile);
-
-  DBX_TEXT_ADDR (objfile) = textaddr;
-  DBX_TEXT_SIZE (objfile) = textsize;
-
-#define	COFF_STABS_SYMBOL_SIZE	12	/* XXX FIXME XXX */
-  DBX_SYMBOL_SIZE (objfile) = COFF_STABS_SYMBOL_SIZE;
-  DBX_STRINGTAB_SIZE (objfile) = stabstrsize;
-
-  if (stabstrsize > bfd_get_size (sym_bfd))
-    error (_("ridiculous string table size: %d bytes"), stabstrsize);
-  DBX_STRINGTAB (objfile) = (char *)
-    obstack_alloc (&objfile->objfile_obstack, stabstrsize + 1);
-  OBJSTAT (objfile, sz_strtab += stabstrsize + 1);
-
-  /* Now read in the string table in one big gulp.  */
-
-  val = bfd_seek (sym_bfd, stabstroffset, SEEK_SET);
-  if (val < 0)
-    perror_with_name (name);
-  val = bfd_read (DBX_STRINGTAB (objfile), stabstrsize, sym_bfd);
-  if (val != stabstrsize)
-    perror_with_name (name);
-
-  stabsread_new_init ();
-  free_header_files ();
-  init_header_files ();
-
-  processing_acc_compilation = 1;
-
-  /* In a coff file, we've already installed the minimal symbols that came
-     from the coff (non-stab) symbol table, so always act like an
-     incremental load here.  */
-  scoped_restore save_symbuf_sections
-    = make_scoped_restore (&symbuf_sections);
-  if (stabsects.size () == 1)
-    {
-      stabsize = bfd_section_size (stabsects[0]);
-      DBX_SYMCOUNT (objfile) = stabsize / DBX_SYMBOL_SIZE (objfile);
-      DBX_SYMTAB_OFFSET (objfile) = stabsects[0]->filepos;
-    }
-  else
-    {
-      DBX_SYMCOUNT (objfile) = 0;
-      for (asection *section : stabsects)
-	{
-	  stabsize = bfd_section_size (section);
-	  DBX_SYMCOUNT (objfile) += stabsize / DBX_SYMBOL_SIZE (objfile);
-	}
-
-      DBX_SYMTAB_OFFSET (objfile) = stabsects[0]->filepos;
-
-      sect_idx = 1;
-      symbuf_sections = &stabsects;
-      symbuf_left = bfd_section_size (stabsects[0]);
-      symbuf_read = 0;
-    }
-
-  dbx_symfile_read (objfile, 0);
-}
 
-/* Scan and build partial symbols for an ELF symbol file.
-   This ELF file has already been processed to get its minimal symbols.
-
-   This routine is the equivalent of dbx_symfile_init and dbx_symfile_read
-   rolled into one.
-
-   OBJFILE is the object file we are reading symbols from.
-   ADDR is the address relative to which the symbols are (e.g.
-   the base address of the text segment).
-   STABSECT is the BFD section information for the .stab section.
-   STABSTROFFSET and STABSTRSIZE define the location in OBJFILE where the
-   .stabstr section exists.
-
-   This routine is mostly copied from dbx_symfile_init and dbx_symfile_read,
-   adjusted for elf details.  */
-
-void
-elfstab_build_psymtabs (struct objfile *objfile, asection *stabsect,
-			file_ptr stabstroffset, unsigned int stabstrsize)
-{
-  int val;
-  bfd *sym_bfd = objfile->obfd.get ();
-  const char *name = bfd_get_filename (sym_bfd);
-
-  stabsread_new_init ();
-
-  /* Allocate struct to keep track of stab reading.  */
-  dbx_objfile_data_key.emplace (objfile);
-
-  /* Find the first and last text address.  dbx_symfile_read seems to
-     want this.  */
-  find_text_range (sym_bfd, objfile);
-
-#define	ELF_STABS_SYMBOL_SIZE	12	/* XXX FIXME XXX */
-  DBX_SYMBOL_SIZE (objfile) = ELF_STABS_SYMBOL_SIZE;
-  DBX_SYMCOUNT (objfile)
-    = bfd_section_size (stabsect) / DBX_SYMBOL_SIZE (objfile);
-  DBX_STRINGTAB_SIZE (objfile) = stabstrsize;
-  DBX_SYMTAB_OFFSET (objfile) = stabsect->filepos;
-  DBX_STAB_SECTION (objfile) = stabsect;
-
-  if (stabstrsize > bfd_get_size (sym_bfd))
-    error (_("ridiculous string table size: %d bytes"), stabstrsize);
-  DBX_STRINGTAB (objfile) = (char *)
-    obstack_alloc (&objfile->objfile_obstack, stabstrsize + 1);
-  OBJSTAT (objfile, sz_strtab += stabstrsize + 1);
-
-  /* Now read in the string table in one big gulp.  */
-
-  val = bfd_seek (sym_bfd, stabstroffset, SEEK_SET);
-  if (val < 0)
-    perror_with_name (name);
-  val = bfd_read (DBX_STRINGTAB (objfile), stabstrsize, sym_bfd);
-  if (val != stabstrsize)
-    perror_with_name (name);
-
-  stabsread_new_init ();
-  free_header_files ();
-  init_header_files ();
-
-  processing_acc_compilation = 1;
-
-  symbuf_read = 0;
-  symbuf_left = bfd_section_size (stabsect);
-
-  scoped_restore restore_stabs_data = make_scoped_restore (&stabs_data);
-  gdb::unique_xmalloc_ptr<gdb_byte> data_holder;
-
-  stabs_data = symfile_relocate_debug_section (objfile, stabsect, NULL);
-  if (stabs_data)
-    data_holder.reset (stabs_data);
-
-  /* In an elf file, we've already installed the minimal symbols that came
-     from the elf (non-stab) symbol table, so always act like an
-     incremental load here.  dbx_symfile_read should not generate any new
-     minimal symbols, since we will have already read the ELF dynamic symbol
-     table and normal symbol entries won't be in the ".stab" section; but in
-     case it does, it will install them itself.  */
-  dbx_symfile_read (objfile, 0);
-}
 
 /* Scan and build partial symbols for a file with special sections for stabs
    and stabstrings.  The file has already been processed to get its minimal
@@ -3219,7 +332,7 @@ stabsect_build_psymtabs (struct objfile *objfile, char *stab_name,
 
   /* Now, do an incremental load.  */
 
-  processing_acc_compilation = 1;
+  dbx_objfile_data_key.get (objfile)->ctx.processing_acc_compilation = 1;
   dbx_symfile_read (objfile, 0);
 }
 
diff --git a/gdb/dictionary.h b/gdb/dictionary.h
index 6f602f4..e09afb3 100644
--- a/gdb/dictionary.h
+++ b/gdb/dictionary.h
@@ -113,7 +113,7 @@ struct dict_iterator
 
 struct mdict_iterator
 {
-  /* The multidictionary with whcih this iterator is associated.  */
+  /* The multidictionary with which this iterator is associated.  */
   const struct multidictionary *mdict;
 
   /* The iterator used to iterate through individual dictionaries.  */
diff --git a/gdb/disasm-flags.h b/gdb/disasm-flags.h
index 4f71125..10cb95d 100644
--- a/gdb/disasm-flags.h
+++ b/gdb/disasm-flags.h
@@ -34,6 +34,7 @@ enum gdb_disassembly_flag : unsigned
     DISASSEMBLY_SOURCE = (0x1 << 5),
     DISASSEMBLY_SPECULATIVE = (0x1 << 6),
     DISASSEMBLY_RAW_BYTES = (0x1 << 7),
+    DISASSEMBLY_OMIT_AUX_INSN = (0x1 << 8),
   };
 DEF_ENUM_FLAGS_TYPE (enum gdb_disassembly_flag, gdb_disassembly_flags);
 
diff --git a/gdb/disasm-selftests.c b/gdb/disasm-selftests.c
index 14b7fb3..dd849fb 100644
--- a/gdb/disasm-selftests.c
+++ b/gdb/disasm-selftests.c
@@ -165,7 +165,7 @@ get_test_insn (struct gdbarch *gdbarch, size_t *len)
 		kind = gdbarch_breakpoint_kind_from_pc (gdbarch, &pc);
 		insn = gdbarch_sw_breakpoint_from_kind (gdbarch, kind, &bplen);
 	      }
-	    catch (...)
+	    catch (const gdb_exception_error &)
 	      {
 		continue;
 	      }
diff --git a/gdb/disasm.c b/gdb/disasm.c
index 16736e5..541293a 100644
--- a/gdb/disasm.c
+++ b/gdb/disasm.c
@@ -197,7 +197,12 @@ gdb_disassembler_memory_reader::dis_asm_read_memory
   (bfd_vma memaddr, gdb_byte *myaddr, unsigned int len,
    struct disassemble_info *info) noexcept
 {
-  return target_read_code (memaddr, myaddr, len);
+  auto res = catch_exceptions<int, -1> ([&]
+    {
+      return target_read_code (memaddr, myaddr, len);
+    });
+
+  return res;
 }
 
 /* Wrapper of memory_error.  */
@@ -894,7 +899,10 @@ do_mixed_source_and_assembly (struct gdbarch *gdbarch,
 		 output includes the source specs for each line.  */
 	      if (sal.symtab != NULL)
 		{
-		  uiout->text (symtab_to_filename_for_display (sal.symtab));
+		  auto filename = symtab_to_filename_for_display (sal.symtab);
+		  uiout->message ("%ps",
+				  styled_string (file_name_style.style (),
+						 filename));
 		}
 	      else
 		uiout->text ("unknown");
diff --git a/gdb/doc/gdb.texinfo b/gdb/doc/gdb.texinfo
index 3315c65..46ca62e 100644
--- a/gdb/doc/gdb.texinfo
+++ b/gdb/doc/gdb.texinfo
@@ -2742,7 +2742,7 @@ environment:
 @end smallexample
 
 This command is available when debugging locally on most targets, excluding
-@sc{djgpp}, Cygwin, MS Windows, and QNX Neutrino.
+@sc{djgpp}, Cygwin, and MS Windows.
 
 @kindex set startup-with-shell
 @anchor{set startup-with-shell}
@@ -4289,7 +4289,7 @@ includes changes in memory, registers, and even (within some limits)
 system state.  Effectively, it is like going back in time to the
 moment when the checkpoint was saved.
 
-Thus, if you're stepping thru a program and you think you're 
+Thus, if you're stepping through a program and you think you're
 getting close to the point where things go wrong, you can save
 a checkpoint.  Then, if you accidentally go too far and miss
 the critical statement, instead of having to restart your program
@@ -7077,33 +7077,6 @@ $1 = (void *) 0x7ffff7ff7000
 
 Depending on target support, @code{$_siginfo} may also be writable.
 
-@cindex Intel MPX boundary violations
-@cindex boundary violations, Intel MPX
-On some targets, a @code{SIGSEGV} can be caused by a boundary
-violation, i.e., accessing an address outside of the allowed range.
-In those cases @value{GDBN} may displays additional information,
-depending on how @value{GDBN} has been told to handle the signal.
-With @code{handle stop SIGSEGV}, @value{GDBN} displays the violation
-kind: "Upper" or "Lower", the memory address accessed and the
-bounds, while with @code{handle nostop SIGSEGV} no additional
-information is displayed.
-
-The usual output of a segfault is:
-@smallexample
-Program received signal SIGSEGV, Segmentation fault
-0x0000000000400d7c in upper () at i386-mpx-sigsegv.c:68
-68        value = *(p + len);
-@end smallexample
-
-While a bound violation is presented as:
-@smallexample
-Program received signal SIGSEGV, Segmentation fault
-Upper bound violation while accessing address 0x7fffffffc3b3
-Bounds: [lower = 0x7fffffffc390, upper = 0x7fffffffc3a3]
-0x0000000000400d7c in upper () at i386-mpx-sigsegv.c:68
-68        value = *(p + len);
-@end smallexample
-
 @node Thread Stops
 @section Stopping and Starting Multi-thread Programs
 
@@ -7686,7 +7659,7 @@ the called function, stopping at the beginning of the @emph{last}
 statement in the called function (typically a return statement).
 
 Also, as with the @code{step} command, if non-debuggable functions are
-called, @code{reverse-step} will run thru them backward without stopping.
+called, @code{reverse-step} will run through them backward without stopping.
 
 @kindex reverse-stepi
 @kindex rsi @r{(@code{reverse-stepi})}
@@ -7784,6 +7757,9 @@ Moxie, PowerPC, PowerPC64, S/390, and x86 (i386/amd64) running
 GNU/Linux.  Process record and replay can be used both when native
 debugging, and when remote debugging via @code{gdbserver}.
 
+When recording an inferior, @value{GDBN} may print auxiliary information
+during stepping commands and commands displaying the execution history.
+
 For architecture environments that support process record and replay,
 @value{GDBN} provides the following commands:
 
@@ -8113,6 +8089,16 @@ also need longer to process the branch trace data before it can be used.
 Show the current setting of the requested ring buffer size for branch
 tracing in Intel Processor Trace format.
 
+@item set record btrace pt event-tracing
+Enable or disable event tracing for branch tracing in Intel Processor
+Trace format.  When enabled, events are recorded during execution as
+auxiliary information and will be printed during stepping commands and
+commands displaying the execution history.  Changing this setting has no
+effect on an active recording.  The default is off.
+
+@item show record btrace pt event-tracing
+Show the current setting of Intel Processor Trace event tracing.
+
 @kindex info record
 @item info record
 Show various statistics about the recording depending on the recording
@@ -8199,6 +8185,9 @@ To better align the printed instructions when the trace contains
 instructions from more than one function, the function name may be
 omitted by specifying the @code{/f} modifier.
 
+Printing auxiliary information is enabled by default and can be
+omitted with the @code{/a} modifier.
+
 Speculatively executed instructions are prefixed with @samp{?}.  This
 feature is not available for all recording formats.
 
@@ -8252,8 +8241,9 @@ that function, the source lines for this instruction sequence (if the
 @code{/l} modifier is specified), and the instructions numbers that form
 the sequence (if the @code{/i} modifier is specified).  The function names
 are indented to reflect the call stack depth if the @code{/c} modifier is
-specified.  The @code{/l}, @code{/i}, and @code{/c} modifiers can be given
-together.
+specified.  Printing auxiliary information is enabled by default and can be
+omitted with the @code{/a} modifier.  The @code{/l}, @code{/i}, @code{/a},
+and @code{/c} modifiers can be given together.
 
 @smallexample
 (@value{GDBP}) @b{list 1, 10}
@@ -16238,6 +16228,9 @@ the data was saved, as well as the current trace frame you are examining.
 Both @var{filename} and @var{dirname} must be on a filesystem accessible to
 the host.
 
+The @var{filename} and @var{dirname} arguments supports escaping and
+quoting, see @ref{Filename Arguments,,Filenames As Command Arguments}.
+
 @smallexample
 (@value{GDBP}) target ctf ctf.ctf
 (@value{GDBP}) tfind
@@ -18305,6 +18298,9 @@ All Modula-2 built-in procedures also return a result, described below.
 @item ABS(@var{n})
 Returns the absolute value of @var{n}.
 
+@item ADR(@var{n})
+Returns the memory address of @var{n}.
+
 @item CAP(@var{c})
 If @var{c} is a lower case letter, it returns its upper case
 equivalent, otherwise it returns its argument.
@@ -20412,6 +20408,7 @@ libraries.  When set to @code{off} no messages are printed.
 Show whether messages will be printed when a @value{GDBN} command
 entered from the keyboard causes symbol information to be loaded.
 
+@anchor{maint print symbols}
 @kindex maint print symbols
 @cindex symbol dump
 @kindex maint print psymbols
@@ -21337,6 +21334,9 @@ Like @code{compile code}, but take the source code from @var{filename}.
 @smallexample
 compile file /home/user/example.c
 @end smallexample
+
+The @var{filename} argument supports escaping and quoting, see
+@ref{Filename Arguments,,Filenames As Command Arguments}.
 @end table
 
 @table @code
@@ -21885,6 +21885,7 @@ Remove symbol table from file "/home/user/gdb/mylib.so"? (y or n) y
 (@value{GDBP})
 @end smallexample
 
+The @var{address} can be any expression which evaluates to an address.
 
 @code{remove-symbol-file} does not repeat if you press @key{RET} after using it.
 
@@ -22011,7 +22012,7 @@ name and remembers it that way.
 @cindex shared libraries
 @anchor{Shared Libraries}
 @value{GDBN} supports @sc{gnu}/Linux, MS-Windows, SunOS,
-Darwin/Mach-O, SVr4, IBM RS/6000 AIX, QNX Neutrino, FDPIC (FR-V), and
+Darwin/Mach-O, SVr4, IBM RS/6000 AIX, FDPIC (FR-V), and
 DSBT (TIC6X) shared libraries.
 
 On MS-Windows @value{GDBN} must be linked with the Expat library to support
@@ -22782,6 +22783,9 @@ the @option{-dwarf-5} option, it produces 2 files:
 @file{@var{symbol-file}.debug_names} and
 @file{@var{symbol-file}.debug_str}.  The files are created in the
 given @var{directory}.
+
+The @var{directory} argument supports escaping and quoting, see
+@ref{Filename Arguments,,Filenames As Command Arguments}.
 @end table
 
 Once you have created an index file you can merge it into your symbol
@@ -23152,11 +23156,17 @@ configuration):
 An executable file.  @samp{target exec @var{program}} is the same as
 @samp{exec-file @var{program}}.
 
+The @var{program} argument supports escaping and quoting, see
+@ref{Filename Arguments,,Filenames As Command Arguments}.
+
 @item target core @var{filename}
 @cindex core dump file target
 A core dump file.  @samp{target core @var{filename}} is the same as
 @samp{core-file @var{filename}}.
 
+The @var{filename} argument supports escaping and quoting, see
+@ref{Filename Arguments,,Filenames As Command Arguments}.
+
 @item target remote @var{medium}
 @cindex remote target
 A remote system connected to @value{GDBN} via a serial line or network
@@ -25207,16 +25217,6 @@ Show the file to which @code{procfs} API trace is written.
 These commands enable and disable tracing of entries into and exits
 from the @code{syscall} interface.
 
-@item info pidlist
-@kindex info pidlist
-@cindex process list, QNX Neutrino
-For QNX Neutrino only, this command displays the list of all the
-processes and all the threads within each process.
-
-@item info meminfo
-@kindex info meminfo
-@cindex mapinfo list, QNX Neutrino
-For QNX Neutrino only, this command displays the list of all mapinfos.
 @end table
 
 @node DJGPP Native
@@ -26779,91 +26779,6 @@ Show the current setting of the convention to return @code{struct}s
 from functions.
 @end table
 
-
-@subsubsection Intel @dfn{Memory Protection Extensions} (MPX).
-@cindex Intel Memory Protection Extensions (MPX).
-
-Memory Protection Extension (MPX) adds the bound registers @samp{BND0}
-@footnote{The register named with capital letters represent the architecture
-registers.} through @samp{BND3}.  Bound registers store a pair of 64-bit values
-which are the lower bound and upper bound.  Bounds are effective addresses or
-memory locations.  The upper bounds are architecturally represented in 1's
-complement form.  A bound having lower bound = 0, and upper bound = 0
-(1's complement of all bits set) will allow access to the entire address space.
-
-@samp{BND0} through @samp{BND3} are represented in @value{GDBN} as @samp{bnd0raw}
-through @samp{bnd3raw}.  Pseudo registers @samp{bnd0} through @samp{bnd3}
-display the upper bound performing the complement of one operation on the
-upper bound value, i.e.@ when upper bound in @samp{bnd0raw} is 0 in the
-@value{GDBN} @samp{bnd0} it will be @code{0xfff@dots{}}.  In this sense it
-can also be noted that the upper bounds are inclusive.
-
-As an example, assume that the register BND0 holds bounds for a pointer having
-access allowed for the range between 0x32 and 0x71.  The values present on
-bnd0raw and bnd registers are presented as follows:
-
-@smallexample
-	bnd0raw = @{0x32, 0xffffffff8e@}
-	bnd0 = @{lbound = 0x32, ubound = 0x71@} : size 64
-@end smallexample
-
-This way the raw value can be accessed via bnd0raw@dots{}bnd3raw.  Any
-change on bnd0@dots{}bnd3 or bnd0raw@dots{}bnd3raw is reflect on its
-counterpart.  When the bnd0@dots{}bnd3 registers are displayed via
-Python, the display includes the memory size, in bits, accessible to
-the pointer.
-
-Bounds can also be stored in bounds tables, which are stored in
-application memory.  These tables store bounds for pointers by specifying
-the bounds pointer's value along with its bounds.  Evaluating and changing
-bounds located in bound tables is therefore interesting while investigating
-bugs on MPX context.  @value{GDBN} provides commands for this purpose:
-
-@table @code
-@item show mpx bound @var{pointer}
-@kindex show mpx bound
-Display bounds of the given @var{pointer}.
-
-@item set mpx bound @var{pointer}, @var{lbound}, @var{ubound}
-@kindex  set mpx bound
-Set the bounds of a pointer in the bound table.
-This command takes three parameters: @var{pointer} is the pointers
-whose bounds are to be changed, @var{lbound} and @var{ubound} are new values
-for lower and upper bounds respectively.
-@end table
-
-Both commands are deprecated and will be removed in future versions of
-@value{GDBN}.  MPX itself was listed as removed by Intel in 2019.
-
-When you call an inferior function on an Intel MPX enabled program,
-GDB sets the inferior's bound registers to the init (disabled) state
-before calling the function.  As a consequence, bounds checks for the
-pointer arguments passed to the function will always pass.
-
-This is necessary because when you call an inferior function, the
-program is usually in the middle of the execution of other function.
-Since at that point bound registers are in an arbitrary state, not
-clearing them would lead to random bound violations in the called
-function.
-
-You can still examine the influence of the bound registers on the
-execution of the called function by stopping the execution of the
-called function at its prologue, setting bound registers, and
-continuing the execution.  For example:
-
-@smallexample
-	$ break *upper
-	Breakpoint 2 at 0x4009de: file i386-mpx-call.c, line 47.
-	$ print upper (a, b, c, d, 1)
-	Breakpoint 2, upper (a=0x0, b=0x6e0000005b, c=0x0, d=0x0, len=48)....
-	$ print $bnd0
-	@{lbound = 0x0, ubound = ffffffff@} : size -1
-@end smallexample
-
-At this last step the value of bnd0 can be changed for investigation of bound
-violations caused along the execution of the call.  In order to know how to
-set the bound registers or bound table for the call consult the ABI.
-
 @subsubsection x87 registers
 
 @value{GDBN} provides access to the x87 state through the following registers:
@@ -27940,6 +27855,10 @@ if @value{GDBN} is using its builtin disassembler library for styling
 (@pxref{style_disassembler_enabled,,@kbd{set style disassembler
 enabled}}).
 
+@item line-number
+Control the styling of line numbers.  By default, this style's
+intensity is dim.
+
 @item variable
 Control the styling of variable names.  These are managed with the
 @code{set style variable} family of commands.  By default, this style's
@@ -39836,6 +39755,11 @@ corresponds to the @code{file} command.  @xref{Files}.
 If provided, this must be a boolean.  When @samp{True}, @value{GDBN}
 will set a temporary breakpoint at the program's main procedure, using
 the same approach as the @code{start} command.  @xref{Starting}.
+
+@item stopOnEntry
+If provided, this must be a boolean.  When @samp{True}, @value{GDBN}
+will set a temporary breakpoint at the program's first instruction, using
+the same approach as the @code{starti} command.  @xref{Starting}.
 @end table
 
 @value{GDBN} defines some parameters that can be passed to the
@@ -41793,6 +41717,9 @@ target description being processed (either the default, or from
 @var{file}) must only contain a single feature.  The source file
 produced is different in this case.
 
+The @var{file} argument supports escaping and quoting, see
+@ref{Filename Arguments,,Filenames As Command Arguments}.
+
 @kindex maint print xml-tdesc
 @item maint print xml-tdesc  @r{[}@var{file}@r{]}
 Print the target description (@pxref{Target Descriptions}) as an XML
@@ -41861,6 +41788,176 @@ frame-id for frame #0: @{stack=0x7fffffffac70,code=0x0000000000401106,!special@}
 frame-id for frame #2: @{stack=0x7fffffffac90,code=0x000000000040111c,!special@}
 @end smallexample
 
+@item maint info inline-frames
+@itemx maint info inline-frames @var{address}
+@cindex frames of inlined functions
+@kindex maint info inline-frames
+Print information about inlined frames which start at the current
+address, or @var{address} if specified.
+
+In order to allow the user to correctly step into inlined functions,
+@value{GDBN} needs to identify which inlined functions start at a
+particular address, and @value{GDBN} also needs to track which of
+these functions was last displayed to the user as the current frame.
+
+Imagine a situation where function @code{main} calls @code{foo}, which
+then calls @code{bar}, something like this:
+
+@smallexample
+@group
+int
+main ()
+@{
+  /* Some interesting code here...  */
+
+  foo ();
+
+  /* More interesting code here... */
+@}
+
+void
+foo ()
+@{
+  bar ();
+@}
+
+void
+bar ()
+@{
+  /* Some interesting code here...  */
+@}
+@end group
+@end smallexample
+
+As both @code{foo} and @code{bar} are inlined within @code{main} then
+there could be one address within @code{main} which is also the start
+of @code{foo} and also the start of @code{bar}.  When the user stops
+at this address they will initially be told the inferior is in
+@code{main}, if the user does a @kbd{step} then @value{GDBN} doesn't
+actually step the inferior, instead the user is told the inferior
+entered @code{foo}.  After the next @kbd{step} the user is told the
+inferior entered @code{bar}.  The @kbd{maint info inline-frames}
+command can be used to view this internal @value{GDBN} state, like
+this:
+
+@smallexample
+@group
+(@value{GDBP}) step
+24	  foo ();
+(@value{GDBP}) maintenance info inline-frames
+Cached inline state information for thread 1.
+program counter = 0x401137
+skipped frames = 2
+  bar
+  foo
+> main
+@end group
+@end smallexample
+
+Here the user is stopped in @code{main} at the call to @code{foo}.  The
+inline-frames information shows that at this address @value{GDBN} has
+found the start of inlined functions @code{bar} and @code{foo}, but
+currently @value{GDBN} has skipped 2 frames and considers @code{main}
+to be the current frame, this is indicated with the @samp{>}.
+
+If the user performs a @kbd{step} to enter @code{foo} then the
+situation is updated:
+
+@smallexample
+@group
+(@value{GDBP}) step
+foo () at inline.c:14
+14	  bar ();
+(@value{GDBP}) maintenance info inline-frames
+Cached inline state information for thread 1.
+program counter = 0x401137
+skipped frames = 1
+  bar
+> foo
+  main
+@end group
+@end smallexample
+
+Notice that the program counter value @code{0x401137} hasn't change,
+but now @value{GDBN} considers @code{foo} to be the current frame, and
+it is marked as such with the @samp{>}.
+
+Finally, the user performs another @kbd{step} to enter @code{bar}:
+
+@smallexample
+@group
+(@value{GDBP}) step
+bar () at inline.c:6
+6	  ++global_counter;
+(@value{GDBP}) maintenance info inline-frames
+Cached inline state information for thread 1.
+program counter = 0x401137
+skipped frames = 0
+> bar
+  foo
+  main
+@end group
+@end smallexample
+
+@kindex maint info blocks
+@item maint info blocks
+@itemx maint info blocks @var{address}
+Print information about all blocks at @var{address}, or at the current
+@code{$pc} if @var{address} is not given.
+
+For information about what blocks are in @value{GDBN} see @ref{Blocks
+In Python}.
+
+Blocks are listed starting from the global block, then the static
+block, and then proceeding through progressively narrower scopes.
+
+Here is an example of the command's output:
+@smallexample
+@group
+(@value{GDBP}) maintenance info blocks
+Blocks at 0x401137:
+  from objfile: [(objfile *) 0x50507d0] /tmp/inline_func_demo
+
+[(block *) 0x504da90] 0x401106..0x40119a
+  entry pc: 0x401106
+  is global block
+  symbol count: 2
+  is contiguous
+@end group
+@group
+[(block *) 0x504d9f0] 0x401106..0x40119a
+  entry pc: 0x401106
+  is static block
+  symbol count: 1
+  is contiguous
+@end group
+@group
+[(block *) 0x504d9a0] 0x401106..0x40119a
+  entry pc: 0x401106
+  function: main
+  is contiguous
+@end group
+@group
+[(block *) 0x504d900] 0x401137..0x401166
+  entry pc: 0x401137
+  inline function: foo
+  symbol count: 1
+  is contiguous
+@end group
+@group
+[(block *) 0x504d860] 0x401137..0x401165
+  entry pc: 0x401137
+  inline function: bar
+  symbol count: 1
+  is contiguous
+@end group
+@end smallexample
+
+The command @kbd{maint info blocks} lists the symbol count for each
+block but doesn't print the symbols themselves.  The symbol names can
+be found using @kbd{maint print symbols} (@pxref{maint print
+symbols}).
+
 @kindex maint print registers
 @kindex maint print raw-registers
 @kindex maint print cooked-registers
@@ -41880,7 +41977,11 @@ including registers which aren't available on the target nor visible
 to user; the command @code{maint print register-groups} includes the
 groups that each register is a member of; and the command @code{maint
 print remote-registers} includes the remote target's register numbers
-and offsets in the `G' packets.
+and offsets in the `G' packets, as well as an indication of which
+registers were included in the last stop reply packet received by
+@value{GDBN} (@pxref{Stop Reply Packets}).  Please note that the list
+of registers included in a stop reply can change from one stop to the
+next.
 
 These commands take an optional parameter, a file name to which to
 write the information.
@@ -44810,6 +44911,16 @@ These are the currently defined stub features and their properties:
 @tab @samp{-}
 @tab Yes
 
+@item @samp{Qbtrace-conf:pt:ptwrite}
+@tab Yes
+@tab @samp{-}
+@tab Yes
+
+@item @samp{Qbtrace-conf:pt:event-tracing}
+@tab Yes
+@tab @samp{-}
+@tab Yes
+
 @item @samp{QNonStop}
 @tab No
 @tab @samp{-}
@@ -45131,6 +45242,12 @@ The remote stub understands the @samp{Qbtrace-conf:bts:size} packet.
 @item Qbtrace-conf:pt:size
 The remote stub understands the @samp{Qbtrace-conf:pt:size} packet.
 
+@item Qbtrace-conf:pt:ptwrite
+The remote stub understands the @samp{Qbtrace-conf:pt:ptwrite} packet.
+
+@item Qbtrace-conf:pt:event-tracing
+The remote stub understands the @samp{Qbtrace-conf:pt:event-tracing} packet.
+
 @item swbreak
 The remote stub reports the @samp{swbreak} stop reason for memory
 breakpoints.
@@ -45620,6 +45737,30 @@ Reply:
 The ring buffer size has been set.
 @end table
 
+@item Qbtrace-conf:pt:ptwrite=@var{(yes|no)}
+Indicate support for @code{PTWRITE} packets.  This allows for backwards
+compatibility.
+
+Reply:
+@table @samp
+@item OK
+The ptwrite config parameter has been set.
+@item E.errtext
+A badly formed request or an error was encountered.
+@end table
+
+@item Qbtrace-conf:pt:event-tracing=@var{(yes|no)}
+Indicate support for event-tracing packets.  This allows for backwards
+compatibility.
+
+Reply:
+@table @samp
+@item OK
+The event-tracing config parameter has been set.
+@item E.errtext
+A badly formed request or an error was encountered.
+@end table
+
 @end table
 
 @node Architecture-Specific Protocol Details
@@ -48253,14 +48394,16 @@ branch trace configuration discovery.  @xref{Expat}.
 The formal DTD for the branch trace configuration format is given below:
 
 @smallexample
-<!ELEMENT btrace-conf	(bts?, pt?)>
-<!ATTLIST btrace-conf	version	CDATA	#FIXED "1.0">
+<!ELEMENT btrace-conf		(bts?, pt?)>
+<!ATTLIST btrace-conf		version	CDATA	#FIXED "1.0">
 
 <!ELEMENT bts	EMPTY>
-<!ATTLIST bts	size	CDATA	#IMPLIED>
+<!ATTLIST bts	size		CDATA	#IMPLIED>
 
 <!ELEMENT pt	EMPTY>
-<!ATTLIST pt	size	CDATA	#IMPLIED>
+<!ATTLIST pt	size		CDATA	#IMPLIED>
+<!ATTLIST pt	ptwrite		(yes | no)	#IMPLIED>
+<!ATTLIST pt	event-tracing	(yes | no)	#IMPLIED>
 @end smallexample
 
 @include agentexpr.texi
@@ -49498,16 +49641,6 @@ describe the upper 128 bits of @sc{ymm} registers:
 @samp{ymm0h} through @samp{ymm15h} for amd64
 @end itemize
 
-The @samp{org.gnu.gdb.i386.mpx} is an optional feature representing Intel
-Memory Protection Extension (MPX).  It should describe the following registers:
-
-@itemize @minus
-@item
-@samp{bnd0raw} through @samp{bnd3raw} for i386 and amd64.
-@item
-@samp{bndcfgu} and @samp{bndstatus} for i386 and amd64.
-@end itemize
-
 The @samp{org.gnu.gdb.i386.linux} feature is optional.  It should
 describe a single register, @samp{orig_eax}.
 
diff --git a/gdb/doc/python.texi b/gdb/doc/python.texi
index 86ccc14..22f0e6c 100644
--- a/gdb/doc/python.texi
+++ b/gdb/doc/python.texi
@@ -4314,6 +4314,11 @@ A @code{gdb.Record} object has the following methods:
 Move the replay position to the given @var{instruction}.
 @end defun
 
+@defun Record.clear ()
+Clear the trace data of the current recording.  This forces re-decoding of the
+trace for successive commands.
+@end defun
+
 The common @code{gdb.Instruction} class that recording method specific
 instruction objects inherit from, has the following attributes:
 
@@ -4369,6 +4374,19 @@ the current recording method.
 A human readable string with the reason for the gap.
 @end defvar
 
+Some @value{GDBN} features write auxiliary information into the execution
+history.  This information is represented by a @code{gdb.RecordAuxiliary} object
+in the instruction list.  It has the following attributes:
+
+@defvar RecordAuxiliary.@var{number}
+An integer identifying this auxiliary.  @var{number} corresponds to the numbers
+seen in @code{record instruction-history} (@pxref{Process Record and Replay}).
+@end defvar
+
+@defvar RecordAuxiliary.data
+A string representation of the auxiliary data.
+@end defvar
+
 A @code{gdb.RecordFunctionSegment} object has the following attributes:
 
 @defvar RecordFunctionSegment.number
@@ -7309,7 +7327,7 @@ contains the full contents of the window.  This is similar to calling
 @end defun
 
 The factory function that you supply should return an object
-conforming to the TUI window protocol.  These are the method that can
+conforming to the TUI window protocol.  These are the methods that can
 be called on this object, which is referred to below as the ``window
 object''.  The methods documented below are optional; if the object
 does not implement one of these methods, @value{GDBN} will not attempt
@@ -8206,6 +8224,7 @@ registering objfile-specific pretty-printers and frame-filters.
 * gdb.printing::       Building and registering pretty-printers.
 * gdb.types::          Utilities for working with types.
 * gdb.prompt::         Utilities for prompt value substitution.
+* gdb.ptwrite::        Utilities for PTWRITE filter registration.
 @end menu
 
 @node gdb.printing
@@ -8396,3 +8415,153 @@ substitute_prompt ("frame: \f, args: \p@{print frame-arguments@}")
 "frame: main, args: scalars"
 @end smallexample
 @end table
+
+@node gdb.ptwrite
+@subsubsection gdb.ptwrite
+@cindex gdb.ptwrite
+
+This module provides additional functionality for recording programs that
+make use of the @code{PTWRITE} instruction.  @code{PTWRITE} is a x86
+instruction that allows to write values into the Intel Processor Trace
+(@pxref{Process Record and Replay}).
+The @value{NGCC} intrinsics for it are:
+@smallexample
+void _ptwrite32 (unsigned int a)
+void _ptwrite64 (unsigned __int64 a)
+@end smallexample
+
+If an inferior uses the instruction, @value{GDBN} by default inserts the
+raw payload value as auxiliary information into the execution history.
+Auxiliary information is by default printed during
+@code{record instruction-history}, @code{record function-call-history},
+and all stepping commands, and is accessible in Python as a
+@code{RecordAuxiliary} object (@pxref{Recordings In Python}).
+
+@exdent Sample program:
+@smallexample
+@group
+#include <immintrin.h>
+
+void
+ptwrite64 (unsigned long long value)
+@{
+  _ptwrite64 (value);
+@}
+@end group
+
+@group
+int
+main (void)
+@{
+  ptwrite64 (0x42);
+  return 0; /* break here.  */
+@}
+@end group
+@end smallexample
+
+
+@exdent @value{GDBN} output after recording the sample program in pt format:
+@smallexample
+@group
+(gdb) record instruction-history 12,14
+12         0x0040074c <ptwrite64+16>:   ptwrite %rbx
+13           [0x42]
+14         0x00400751 <ptwrite64+21>:   mov -0x8(%rbp),%rbx
+(gdb) record function-call-history
+1       main
+2       ptwrite64
+          [0x42]
+3       main
+@end group
+@end smallexample
+
+The @code{gdb.ptwrite} module allows customizing the default output of
+@code{PTWRITE} auxiliary information.  A custom Python function can be
+registered as the @code{PTWRITE} filter function.  This function will be
+called with the @code{PTWRITE} payload and PC as arguments during trace
+decoding.  The function can return a string, which will be printed by
+@value{GDBN} during the aforementioned commands, or @code{None}, resulting
+in no output.  To register such a filter function, the user needs to
+provide a filter factory function, which returns a new filter function
+object to be called by @value{GDBN}.
+
+@findex gdb.ptwrite.register_filter_factory
+@defun register_filter_factory (filter_factory)
+Used to register the @code{PTWRITE} filter factory.  This filter factory can
+be any callable object that accepts one argument, the current thread as
+a @code{gdb.InferiorThread}.
+It can return None or a callable.  This callable is the @code{PTWRITE} filter
+function for the specified thread.  If @code{None} is returned by the factory
+function, the default auxiliary information will be printed.
+@end defun
+
+@findex gdb.ptwrite.get_filter
+@defun get_filter ()
+Return the currently active @code{PTWRITE} filter function.
+@end defun
+
+An example:
+
+@smallexample
+@group
+(gdb) python-interactive
+>>> class my_filter():
+...    def __init__(self):
+...        self.var = 0
+...    def __call__(self, payload, ip):
+...        self.var += 1
+...        return f"counter: @{self.var@}, ip: @{ip:#x@}"
+...
+>>> def my_filter_factory(thread):
+...    if thread.global_num == 1:
+...        return my_filter()
+...    else:
+...        return None
+...
+>>> import gdb.ptwrite
+>>> gdb.ptwrite.register_filter_factory(my_filter_factory)
+>>>
+@end group
+
+@group
+(gdb) record function-call-history 59,64
+59      pthread_create@@GLIBC_2.2.5
+60      job()
+61      task(void*)
+62      ptwrite64(unsigned long)
+          [counter: 1, ip: 0x401156]
+63      task(void*)
+64      ptwrite32(unsigned int)
+          [counter: 2, ip: 0x40116c]
+@end group
+
+@group
+(gdb) info threads
+* 1    Thread 0x7ffff7fd8740 (LWP 25796) "ptw_threads" task ()
+    at bin/ptwrite/ptw_threads.c:45
+  2    Thread 0x7ffff6eb8700 (LWP 25797) "ptw_threads" task ()
+    at bin/ptwrite/ptw_threads.c:45
+@end group
+
+@group
+(gdb) thread 2
+[Switching to thread 2 (Thread 0x7ffff6eb8700 (LWP 25797))]
+#0  task (arg=0x0) at ptwrite_threads.c:45
+45        return NULL;
+@end group
+
+@group
+(gdb) record function-call-history 10,14
+10    start_thread
+11    task(void*)
+12    ptwrite64(unsigned long)
+        [0x42]
+13    task(void*)
+14    ptwrite32(unsigned int)
+        [0x43]
+@end group
+@end smallexample
+
+This @value{GDBN} feature is dependent on hardware and operating system
+support and requires the Intel Processor Trace decoder library in version
+2.0.0 or newer.
diff --git a/gdb/dtrace-probe.c b/gdb/dtrace-probe.c
index 0f4e164..ac1b1c5 100644
--- a/gdb/dtrace-probe.c
+++ b/gdb/dtrace-probe.c
@@ -493,7 +493,7 @@ dtrace_process_dof_probe (struct objfile *objfile,
 	    {
 	    }
 
-	  if (expr != NULL && expr->first_opcode () == OP_TYPE)
+	  if (expr != NULL && expr->type_p ())
 	    type = expr->evaluate_type ()->type ();
 
 	  args.emplace_back (type, std::move (type_str), std::move (expr));
diff --git a/gdb/dwarf2/abbrev-cache.c b/gdb/dwarf2/abbrev-cache.c
index b87206c..7e1ff9c 100644
--- a/gdb/dwarf2/abbrev-cache.c
+++ b/gdb/dwarf2/abbrev-cache.c
@@ -17,7 +17,6 @@
    You should have received a copy of the GNU General Public License
    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
 
-#include "dwarf2/read.h"
 #include "dwarf2/abbrev-cache.h"
 
 /* Hash function for an abbrev table.  */
diff --git a/gdb/dwarf2/abbrev.c b/gdb/dwarf2/abbrev.c
index 359a009..c30db1e 100644
--- a/gdb/dwarf2/abbrev.c
+++ b/gdb/dwarf2/abbrev.c
@@ -24,9 +24,9 @@
    You should have received a copy of the GNU General Public License
    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
 
-#include "dwarf2/read.h"
 #include "dwarf2/abbrev.h"
 #include "dwarf2/leb.h"
+#include "dwarf2/section.h"
 #include "bfd.h"
 
 /* Hash function for an abbrev.  */
@@ -276,7 +276,8 @@ abbrev_table::read (struct dwarf2_section_info *section,
 	}
       else if ((cur_abbrev->tag == DW_TAG_structure_type
 		|| cur_abbrev->tag == DW_TAG_class_type
-		|| cur_abbrev->tag == DW_TAG_union_type)
+		|| cur_abbrev->tag == DW_TAG_union_type
+		|| cur_abbrev->tag == DW_TAG_namespace)
 	       && cur_abbrev->has_children)
 	{
 	  /* We have to record this as interesting, regardless of how
diff --git a/gdb/dwarf2/abbrev.h b/gdb/dwarf2/abbrev.h
index 1fb90fd..7eda951 100644
--- a/gdb/dwarf2/abbrev.h
+++ b/gdb/dwarf2/abbrev.h
@@ -27,7 +27,11 @@
 #ifndef GDB_DWARF2_ABBREV_H
 #define GDB_DWARF2_ABBREV_H
 
+#include "dwarf2.h"
+#include "gdbsupport/gdb-hashtab.h"
+#include "gdbsupport/gdb_obstack.h"
 #include "hashtab.h"
+#include "types.h"
 
 struct attr_abbrev
 {
diff --git a/gdb/dwarf2/ada-imported.c b/gdb/dwarf2/ada-imported.c
index 9ec0d51..eabbab1 100644
--- a/gdb/dwarf2/ada-imported.c
+++ b/gdb/dwarf2/ada-imported.c
@@ -20,6 +20,7 @@
 #include "symtab.h"
 #include "value.h"
 #include "dwarf2/loc.h"
+#include "objfiles.h"
 
 /* Helper to get the imported symbol's real name.  */
 static const char *
@@ -34,7 +35,8 @@ static struct value *
 ada_imported_read_variable (struct symbol *symbol, const frame_info_ptr &frame)
 {
   const char *name = get_imported_name (symbol);
-  bound_minimal_symbol minsym = lookup_minimal_symbol_linkage (name, false);
+  bound_minimal_symbol minsym
+    = lookup_minimal_symbol_linkage (symbol->objfile ()->pspace (), name, false);
   if (minsym.minsym == nullptr)
     error (_("could not find imported name %s"), name);
   return value_at (symbol->type (), minsym.value_address ());
diff --git a/gdb/dwarf2/attribute.h b/gdb/dwarf2/attribute.h
index 3b971ad..115d006 100644
--- a/gdb/dwarf2/attribute.h
+++ b/gdb/dwarf2/attribute.h
@@ -29,7 +29,6 @@
 
 #include "dwarf2.h"
 #include "dwarf2/types.h"
-#include <optional>
 
 /* Blocks are a bunch of untyped bytes.  */
 struct dwarf_block
diff --git a/gdb/dwarf2/comp-unit-head.c b/gdb/dwarf2/comp-unit-head.c
index a26a6c0..1413971 100644
--- a/gdb/dwarf2/comp-unit-head.c
+++ b/gdb/dwarf2/comp-unit-head.c
@@ -29,6 +29,7 @@
 #include "dwarf2/read.h"
 #include "dwarf2/section.h"
 #include "dwarf2/stringify.h"
+#include "dwarf2/error.h"
 
 /* See comp-unit-head.h.  */
 
@@ -49,8 +50,9 @@ read_comp_unit_head (struct comp_unit_head *cu_header,
   info_ptr += bytes_read;
   unsigned version = read_2_bytes (abfd, info_ptr);
   if (version < 2 || version > 5)
-    error (_("Dwarf Error: wrong version in compilation unit header "
-	   "(is %d, should be 2, 3, 4 or 5) [in module %s]"),
+    error (_(DWARF_ERROR_PREFIX
+	     "wrong version in compilation unit header "
+	     "(is %d, should be 2, 3, 4 or 5) [in module %s]"),
 	   version, filename);
   cu_header->version = version;
   info_ptr += 2;
@@ -78,8 +80,9 @@ read_comp_unit_head (struct comp_unit_head *cu_header,
 	case DW_UT_skeleton:
 	case DW_UT_split_compile:
 	  if (section_kind != rcuh_kind::COMPILE)
-	    error (_("Dwarf Error: wrong unit_type in compilation unit header "
-		   "(is %s, should be %s) [in module %s]"),
+	    error (_(DWARF_ERROR_PREFIX
+		     "wrong unit_type in compilation unit header "
+		     "(is %s, should be %s) [in module %s]"),
 		   dwarf_unit_type_name (cu_header->unit_type),
 		   dwarf_unit_type_name (DW_UT_type), filename);
 	  break;
@@ -88,10 +91,11 @@ read_comp_unit_head (struct comp_unit_head *cu_header,
 	  section_kind = rcuh_kind::TYPE;
 	  break;
 	default:
-	  error (_("Dwarf Error: wrong unit_type in compilation unit header "
-		 "(is %#04x, should be one of: %s, %s, %s, %s or %s) "
-		 "[in module %s]"), cu_header->unit_type,
-		 dwarf_unit_type_name (DW_UT_compile),
+	  error (_(DWARF_ERROR_PREFIX
+		   "wrong unit_type in compilation unit header "
+		   "(is %#04x, should be one of: %s, %s, %s, %s or %s) "
+		   "[in module %s]"),
+		 cu_header->unit_type, dwarf_unit_type_name (DW_UT_compile),
 		 dwarf_unit_type_name (DW_UT_skeleton),
 		 dwarf_unit_type_name (DW_UT_split_compile),
 		 dwarf_unit_type_name (DW_UT_type),
@@ -131,9 +135,10 @@ read_comp_unit_head (struct comp_unit_head *cu_header,
       info_ptr += bytes_read;
       cu_header->type_cu_offset_in_tu = (cu_offset) type_offset;
       if (to_underlying (cu_header->type_cu_offset_in_tu) != type_offset)
-	error (_("Dwarf Error: Too big type_offset in compilation unit "
-	       "header (is %s) [in module %s]"), plongest (type_offset),
-	       filename);
+	error (_(DWARF_ERROR_PREFIX
+		 "Too big type_offset in compilation unit "
+		 "header (is %s) [in module %s]"),
+	       plongest (type_offset), filename);
     }
 
   return info_ptr;
@@ -153,8 +158,9 @@ error_check_comp_unit_head (dwarf2_per_objfile *per_objfile,
 
   if (to_underlying (header->abbrev_sect_off)
       >= abbrev_section->get_size (per_objfile->objfile))
-    error (_("Dwarf Error: bad offset (%s) in compilation unit header "
-	   "(offset %s + 6) [in module %s]"),
+    error (_(DWARF_ERROR_PREFIX
+	     "bad offset (%s) in compilation unit header "
+	     "(offset %s + 6) [in module %s]"),
 	   sect_offset_str (header->abbrev_sect_off),
 	   sect_offset_str (header->sect_off),
 	   filename);
@@ -163,8 +169,9 @@ error_check_comp_unit_head (dwarf2_per_objfile *per_objfile,
      avoid potential 32-bit overflow.  */
   if (((ULONGEST) header->sect_off + header->get_length_with_initial ())
       > section->size)
-    error (_("Dwarf Error: bad length (0x%x) in compilation unit header "
-	   "(offset %s + 0) [in module %s]"),
+    error (_(DWARF_ERROR_PREFIX
+	     "bad length (0x%x) in compilation unit header "
+	     "(offset %s + 0) [in module %s]"),
 	   header->get_length_without_initial (), sect_offset_str (header->sect_off),
 	   filename);
 }
diff --git a/gdb/dwarf2/cooked-index.c b/gdb/dwarf2/cooked-index.c
index c9e46af..4073c92 100644
--- a/gdb/dwarf2/cooked-index.c
+++ b/gdb/dwarf2/cooked-index.c
@@ -24,6 +24,7 @@
 #include "cp-support.h"
 #include "c-lang.h"
 #include "ada-lang.h"
+#include "dwarf2/tag.h"
 #include "event-top.h"
 #include "exceptions.h"
 #include "split-name.h"
@@ -32,6 +33,8 @@
 #include <algorithm>
 #include "gdbsupport/gdb-safe-ctype.h"
 #include "gdbsupport/selftest.h"
+#include "gdbsupport/task-group.h"
+#include "gdbsupport/thread-pool.h"
 #include <chrono>
 #include <unordered_set>
 #include "cli/cli-cmds.h"
@@ -285,7 +288,7 @@ cooked_index_shard::add (sect_offset die_offset, enum dwarf_tag tag,
 
 /* See cooked-index.h.  */
 
-gdb::unique_xmalloc_ptr<char>
+void
 cooked_index_shard::handle_gnat_encoded_entry (cooked_index_entry *entry,
 					       htab_t gnat_entries)
 {
@@ -295,7 +298,10 @@ cooked_index_shard::handle_gnat_encoded_entry (cooked_index_entry *entry,
      source charset does not affect the indexer directly.  */
   std::string canonical = ada_decode (entry->name, false, false, false);
   if (canonical.empty ())
-    return {};
+    {
+      entry->canonical = entry->name;
+      return;
+    }
   std::vector<std::string_view> names = split_name (canonical.c_str (),
 						    split_style::DOT_STYLE);
   std::string_view tail = names.back ();
@@ -326,7 +332,9 @@ cooked_index_shard::handle_gnat_encoded_entry (cooked_index_entry *entry,
     }
 
   entry->set_parent (parent);
-  return make_unique_xstrndup (tail.data (), tail.length ());
+  auto new_canon = make_unique_xstrndup (tail.data (), tail.length ());
+  entry->canonical = new_canon.get ();
+  m_names.push_back (std::move (new_canon));
 }
 
 /* See cooked-index.h.  */
@@ -386,17 +394,7 @@ cooked_index_shard::finalize (const parent_map_map *parent_maps)
       if ((entry->flags & IS_LINKAGE) != 0)
 	entry->canonical = entry->name;
       else if (entry->lang == language_ada)
-	{
-	  gdb::unique_xmalloc_ptr<char> canon_name
-	    = handle_gnat_encoded_entry (entry, gnat_entries.get ());
-	  if (canon_name == nullptr)
-	    entry->canonical = entry->name;
-	  else
-	    {
-	      entry->canonical = canon_name.get ();
-	      m_names.push_back (std::move (canon_name));
-	    }
-	}
+	handle_gnat_encoded_entry (entry, gnat_entries.get ());
       else if (entry->lang == language_cplus || entry->lang == language_c)
 	{
 	  void **slot = htab_find_slot (seen_names.get (), entry,
diff --git a/gdb/dwarf2/cooked-index.h b/gdb/dwarf2/cooked-index.h
index efd03e6..0873e7d 100644
--- a/gdb/dwarf2/cooked-index.h
+++ b/gdb/dwarf2/cooked-index.h
@@ -24,22 +24,16 @@
 #include "dwarf2/types.h"
 #include "symtab.h"
 #include "hashtab.h"
-#include "dwarf2/index-common.h"
-#include <string_view>
 #include "quick-symbol.h"
 #include "gdbsupport/gdb_obstack.h"
 #include "addrmap.h"
 #include "gdbsupport/iterator-range.h"
-#include "gdbsupport/thread-pool.h"
 #include "dwarf2/mapped-index.h"
 #include "dwarf2/read.h"
-#include "dwarf2/tag.h"
 #include "dwarf2/abbrev-cache.h"
 #include "dwarf2/parent-map.h"
 #include "gdbsupport/range-chain.h"
-#include "gdbsupport/task-group.h"
 #include "complaints.h"
-#include "run-on-main-thread.h"
 
 #if CXX_STD_THREAD
 #include <mutex>
@@ -233,8 +227,7 @@ struct cooked_index_entry : public allocate_on_obstack<cooked_index_entry>
      linkage name -- two entries are created for DIEs which have both
      attributes.  */
   const char *name;
-  /* The canonical name.  For C++ names, this may differ from NAME.
-     In all other cases, this is equal to NAME.  */
+  /* The canonical name.  This may be equal to NAME.  */
   const char *canonical = nullptr;
   /* The DWARF tag.  */
   enum dwarf_tag tag;
@@ -251,9 +244,10 @@ private:
 
   /* A helper method for full_name.  Emits the full scope of this
      object, followed by the separator, to STORAGE.  If this entry has
-     a parent, its write_scope method is called first.  */
+     a parent, its write_scope method is called first.  FOR_MAIN is
+     true when computing the name of 'main'; see full_name.  */
   void write_scope (struct obstack *storage, const char *sep,
-		    bool for_name) const;
+		    bool for_main) const;
 
   /* The parent entry.  This is NULL for top-level entries.
      Otherwise, it points to the parent entry, such as a namespace or
@@ -344,9 +338,8 @@ private:
   /* GNAT only emits mangled ("encoded") names in the DWARF, and does
      not emit the module structure.  However, we need this structure
      to do lookups.  This function recreates that structure for an
-     existing entry.  It returns the base name (last element) of the
-     full decoded name.  */
-  gdb::unique_xmalloc_ptr<char> handle_gnat_encoded_entry
+     existing entry, modifying ENTRY as appropriate.  */
+  void handle_gnat_encoded_entry
        (cooked_index_entry *entry, htab_t gnat_entries);
 
   /* Finalize the index.  This should be called a single time, when
@@ -785,10 +778,12 @@ struct cooked_index_functions : public dwarf2_base_index_functions
      gdb::function_view<expand_symtabs_symbol_matcher_ftype> symbol_matcher,
      gdb::function_view<expand_symtabs_exp_notify_ftype> expansion_notify,
      block_search_flags search_flags,
-     domain_search_flags domain) override;
+     domain_search_flags domain,
+     gdb::function_view<expand_symtabs_lang_matcher_ftype> lang_matcher)
+       override;
 
   struct compunit_symtab *find_pc_sect_compunit_symtab
-    (struct objfile *objfile, struct bound_minimal_symbol msymbol,
+    (struct objfile *objfile, bound_minimal_symbol msymbol,
      CORE_ADDR pc, struct obj_section *section, int warn_if_readin) override
   {
     wait (objfile, true);
diff --git a/gdb/dwarf2/dwz.h b/gdb/dwarf2/dwz.h
index 5e6c1fa..3ec3af1 100644
--- a/gdb/dwarf2/dwz.h
+++ b/gdb/dwarf2/dwz.h
@@ -25,6 +25,7 @@
 #include "dwarf2/section.h"
 
 struct dwarf2_per_bfd;
+struct dwarf2_per_objfile;
 
 /* This represents a '.dwz' file.  */
 
diff --git a/gdb/config/nm-nto.h b/gdb/dwarf2/error.h
index 5a002df..f8861f2 100644
--- a/gdb/config/nm-nto.h
+++ b/gdb/dwarf2/error.h
@@ -1,8 +1,6 @@
-/* Native support for QNX Neutrino version 6.
+/* DWARF error handling utilities.
 
-   Copyright (C) 2003-2024 Free Software Foundation, Inc.
-
-   This code was donated by QNX Software Systems Ltd.
+   Copyright (C) 2024 Free Software Foundation, Inc.
 
    This file is part of GDB.
 
@@ -19,11 +17,13 @@
    You should have received a copy of the GNU General Public License
    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
 
-#ifndef CONFIG_NM_NTO_H
-#define CONFIG_NM_NTO_H
+#ifndef GDB_DWARF2_ERROR_H
+#define GDB_DWARF2_ERROR_H
+
+/* Canonical capitalization of "dwarf error".  */
+#define DWARF_ERROR "DWARF Error"
 
-/* Setup the valid realtime signal range.  */
-#define REALTIME_LO 41
-#define REALTIME_HI 56
+/* Prefix to be used in dwarf errors.  */
+#define DWARF_ERROR_PREFIX DWARF_ERROR ": "
 
-#endif /* CONFIG_NM_NTO_H */
+#endif /* GDB_DWARF2_ERROR_H */
diff --git a/gdb/dwarf2/expr.c b/gdb/dwarf2/expr.c
index cb80dbf..5ad17ea 100644
--- a/gdb/dwarf2/expr.c
+++ b/gdb/dwarf2/expr.c
@@ -1593,8 +1593,9 @@ dwarf_expr_context::execute_stack_op (const gdb_byte *op_ptr,
 					     uoffset)));
 	  result_val = value_from_ulongest (address_type, result);
 	  break;
+	case DW_OP_constx:
 	case DW_OP_GNU_const_index:
-	  ensure_have_per_cu (this->m_per_cu, "DW_OP_GNU_const_index");
+	  ensure_have_per_cu (this->m_per_cu, "DW_OP_constx");
 
 	  op_ptr = safe_read_uleb128 (op_ptr, op_end, &uoffset);
 	  result = (ULONGEST) dwarf2_read_addr_index (this->m_per_cu,
diff --git a/gdb/dwarf2/frame-tailcall.c b/gdb/dwarf2/frame-tailcall.c
index c489068..6ecf8a0 100644
--- a/gdb/dwarf2/frame-tailcall.c
+++ b/gdb/dwarf2/frame-tailcall.c
@@ -22,9 +22,7 @@
 #include "dwarf2/frame-tailcall.h"
 #include "dwarf2/loc.h"
 #include "frame-unwind.h"
-#include "block.h"
 #include "hashtab.h"
-#include "gdbtypes.h"
 #include "regcache.h"
 #include "value.h"
 #include "dwarf2/frame.h"
diff --git a/gdb/dwarf2/frame.c b/gdb/dwarf2/frame.c
index 9ebf3ac..841d2d4 100644
--- a/gdb/dwarf2/frame.c
+++ b/gdb/dwarf2/frame.c
@@ -25,7 +25,6 @@
 #include "frame.h"
 #include "frame-base.h"
 #include "frame-unwind.h"
-#include "gdbcore.h"
 #include "gdbtypes.h"
 #include "symtab.h"
 #include "objfiles.h"
@@ -37,7 +36,6 @@
 #include "dwarf2/frame.h"
 #include "dwarf2/read.h"
 #include "dwarf2/public.h"
-#include "ax.h"
 #include "dwarf2/loc.h"
 #include "dwarf2/frame-tailcall.h"
 #include "gdbsupport/gdb_binary_search.h"
@@ -913,7 +911,7 @@ dwarf2_frame_cache (const frame_info_ptr &this_frame, void **this_cache)
      its return address.  As a result the return address will
      point at some random instruction, and the CFI for that
      instruction is probably worthless to us.  GCC's unwinder solves
-     this problem by substracting 1 from the return address to get an
+     this problem by subtracting 1 from the return address to get an
      address in the middle of a presumed call instruction (or the
      instruction in the associated delay slot).  This should only be
      done for "normal" frames and not for resume-type frames (signal
@@ -1075,7 +1073,7 @@ incomplete CFI data; unspecified registers (e.g., %s) at %s"),
 	    ULONGEST retaddr_column = fs.retaddr_column;
 
 	    /* It seems rather bizarre to specify an "empty" column as
-	       the return adress column.  However, this is exactly
+	       the return address column.  However, this is exactly
 	       what GCC does on some targets.  It turns out that GCC
 	       assumes that the return address can be found in the
 	       register corresponding to the return address column.
diff --git a/gdb/dwarf2/index-cache.c b/gdb/dwarf2/index-cache.c
index c11b016..a04d5d6 100644
--- a/gdb/dwarf2/index-cache.c
+++ b/gdb/dwarf2/index-cache.c
@@ -28,8 +28,6 @@
 #include "dwarf2/index-write.h"
 #include "dwarf2/read.h"
 #include "dwarf2/dwz.h"
-#include "objfiles.h"
-#include "gdbsupport/selftest.h"
 #include <string>
 #include <stdlib.h>
 #include "run-on-main-thread.h"
diff --git a/gdb/dwarf2/index-cache.h b/gdb/dwarf2/index-cache.h
index 95f217e..08a2d56 100644
--- a/gdb/dwarf2/index-cache.h
+++ b/gdb/dwarf2/index-cache.h
@@ -20,9 +20,7 @@
 #ifndef DWARF_INDEX_CACHE_H
 #define DWARF_INDEX_CACHE_H
 
-#include "dwarf2/index-common.h"
 #include "gdbsupport/array-view.h"
-#include "symfile.h"
 
 class dwarf2_per_bfd;
 class index_cache;
diff --git a/gdb/dwarf2/index-write.c b/gdb/dwarf2/index-write.c
index 2a50e3b..c01e274 100644
--- a/gdb/dwarf2/index-write.c
+++ b/gdb/dwarf2/index-write.c
@@ -28,7 +28,6 @@
 #include "gdbsupport/gdb_unlinker.h"
 #include "gdbsupport/pathstuff.h"
 #include "gdbsupport/scoped_fd.h"
-#include "complaints.h"
 #include "dwarf2/index-common.h"
 #include "dwarf2/cooked-index.h"
 #include "dwarf2.h"
@@ -44,9 +43,7 @@
 
 #include <algorithm>
 #include <cmath>
-#include <forward_list>
 #include <map>
-#include <set>
 #include <unordered_map>
 #include <unordered_set>
 
@@ -1621,8 +1618,8 @@ gdb_save_index_cmd_completer (struct cmd_list_element *ignore,
       (tracker, &text, gdb::option::PROCESS_OPTIONS_UNKNOWN_IS_OPERAND, grp))
     return;
 
-  word = advance_to_filename_complete_word_point (tracker, text);
-  filename_completer (ignore, tracker, text, word);
+  word = advance_to_filename_maybe_quoted_complete_word_point (tracker, text);
+  filename_maybe_quoted_completer (ignore, tracker, text, word);
 }
 
 /* Implementation of the `save gdb-index' command.
@@ -1639,10 +1636,10 @@ save_gdb_index_command (const char *args, int from_tty)
   gdb::option::process_options
     (&args, gdb::option::PROCESS_OPTIONS_UNKNOWN_IS_OPERAND, group);
 
-  if (args == nullptr || *args == '\0')
+  std::string directory = extract_single_filename_arg (args);
+  if (directory.empty ())
     error (_("usage: save gdb-index [-dwarf-5] DIRECTORY"));
 
-  std::string directory (gdb_tilde_expand (args));
   dw_index_kind index_kind
     = (opts.dwarf_5 ? dw_index_kind::DEBUG_NAMES : dw_index_kind::GDB_INDEX);
 
diff --git a/gdb/dwarf2/line-header.h b/gdb/dwarf2/line-header.h
index c068dff..7da5972 100644
--- a/gdb/dwarf2/line-header.h
+++ b/gdb/dwarf2/line-header.h
@@ -20,6 +20,10 @@
 #ifndef DWARF2_LINE_HEADER_H
 #define DWARF2_LINE_HEADER_H
 
+#include "dwarf2/types.h"
+
+struct dwarf2_per_objfile;
+
 /* dir_index is 1-based in DWARF 4 and before, and is 0-based in DWARF 5 and
    later.  */
 typedef int dir_index;
diff --git a/gdb/dwarf2/loc.c b/gdb/dwarf2/loc.c
index 637c81f..d515386 100644
--- a/gdb/dwarf2/loc.c
+++ b/gdb/dwarf2/loc.c
@@ -41,7 +41,6 @@
 #include "dwarf2/frame.h"
 #include "dwarf2/leb.h"
 #include "compile/compile.h"
-#include "gdbsupport/selftest.h"
 #include <algorithm>
 #include <vector>
 #include <unordered_set>
@@ -667,9 +666,8 @@ call_site_target::iterate_over_addresses (gdbarch *call_site_gdbarch,
 	dwarf_block = m_loc.dwarf_block;
 	if (dwarf_block == NULL)
 	  {
-	    struct bound_minimal_symbol msym;
-	    
-	    msym = lookup_minimal_symbol_by_pc (call_site->pc () - 1);
+	    bound_minimal_symbol msym
+	      = lookup_minimal_symbol_by_pc (call_site->pc () - 1);
 	    throw_error (NO_ENTRY_VALUE_ERROR,
 			 _("DW_AT_call_target is not specified at %s in %s"),
 			 paddress (call_site_gdbarch, call_site->pc ()),
@@ -679,9 +677,8 @@ call_site_target::iterate_over_addresses (gdbarch *call_site_gdbarch,
 	  }
 	if (caller_frame == NULL)
 	  {
-	    struct bound_minimal_symbol msym;
-	    
-	    msym = lookup_minimal_symbol_by_pc (call_site->pc () - 1);
+	    bound_minimal_symbol msym
+	      = lookup_minimal_symbol_by_pc (call_site->pc () - 1);
 	    throw_error (NO_ENTRY_VALUE_ERROR,
 			 _("DW_AT_call_target DWARF block resolving "
 			   "requires known frame which is currently not "
@@ -708,12 +705,12 @@ call_site_target::iterate_over_addresses (gdbarch *call_site_gdbarch,
     case call_site_target::PHYSNAME:
       {
 	const char *physname;
-	struct bound_minimal_symbol msym;
 
 	physname = m_loc.physname;
 
 	/* Handle both the mangled and demangled PHYSNAME.  */
-	msym = lookup_minimal_symbol (physname, NULL, NULL);
+	bound_minimal_symbol msym
+	  = lookup_minimal_symbol (current_program_space, physname);
 	if (msym.minsym == NULL)
 	  {
 	    msym = lookup_minimal_symbol_by_pc (call_site->pc () - 1);
@@ -782,7 +779,7 @@ func_addr_to_tail_call_list (struct gdbarch *gdbarch, CORE_ADDR addr)
    via its tail calls (incl. transitively).  Throw NO_ENTRY_VALUE_ERROR if it
    can call itself via tail calls.
 
-   If a funtion can tail call itself its entry value based parameters are
+   If a function can tail call itself its entry value based parameters are
    unreliable.  There is no verification whether the value of some/all
    parameters is unchanged through the self tail call, we expect if there is
    a self tail call all the parameters can be modified.  */
@@ -820,9 +817,8 @@ func_verify_no_selftailcall (struct gdbarch *gdbarch, CORE_ADDR verify_addr)
 	    {
 	      if (target_addr == verify_addr)
 		{
-		  struct bound_minimal_symbol msym;
-
-		  msym = lookup_minimal_symbol_by_pc (verify_addr);
+		  bound_minimal_symbol msym
+		    = lookup_minimal_symbol_by_pc (verify_addr);
 		  throw_error (NO_ENTRY_VALUE_ERROR,
 			       _("DW_OP_entry_value resolving has found "
 				 "function \"%s\" at %s can call itself via tail "
@@ -846,7 +842,7 @@ static void
 tailcall_dump (struct gdbarch *gdbarch, const struct call_site *call_site)
 {
   CORE_ADDR addr = call_site->pc ();
-  struct bound_minimal_symbol msym = lookup_minimal_symbol_by_pc (addr - 1);
+  bound_minimal_symbol msym = lookup_minimal_symbol_by_pc (addr - 1);
 
   gdb_printf (gdb_stdlog, " %s(%s)", paddress (gdbarch, addr),
 	      (msym.minsym == NULL ? "???"
@@ -1064,10 +1060,10 @@ call_site_find_chain_1 (struct gdbarch *gdbarch, CORE_ADDR caller_pc,
 
   if (retval == NULL)
     {
-      struct bound_minimal_symbol msym_caller, msym_callee;
-      
-      msym_caller = lookup_minimal_symbol_by_pc (caller_pc);
-      msym_callee = lookup_minimal_symbol_by_pc (callee_pc);
+      bound_minimal_symbol msym_caller
+	= lookup_minimal_symbol_by_pc (caller_pc);
+      bound_minimal_symbol msym_callee
+	= lookup_minimal_symbol_by_pc (callee_pc);
       throw_error (NO_ENTRY_VALUE_ERROR,
 		   _("There are no unambiguously determinable intermediate "
 		     "callers or callees between caller function \"%s\" at %s "
@@ -1165,8 +1161,7 @@ dwarf_expr_reg_to_entry_parameter (const frame_info_ptr &initial_frame,
   caller_frame = get_prev_frame (frame);
   if (gdbarch != frame_unwind_arch (frame))
     {
-      struct bound_minimal_symbol msym
-	= lookup_minimal_symbol_by_pc (func_addr);
+      bound_minimal_symbol msym = lookup_minimal_symbol_by_pc (func_addr);
       struct gdbarch *caller_gdbarch = frame_unwind_arch (frame);
 
       throw_error (NO_ENTRY_VALUE_ERROR,
@@ -1181,8 +1176,7 @@ dwarf_expr_reg_to_entry_parameter (const frame_info_ptr &initial_frame,
 
   if (caller_frame == NULL)
     {
-      struct bound_minimal_symbol msym
-	= lookup_minimal_symbol_by_pc (func_addr);
+      bound_minimal_symbol msym = lookup_minimal_symbol_by_pc (func_addr);
 
       throw_error (NO_ENTRY_VALUE_ERROR, _("DW_OP_entry_value resolving "
 					   "requires caller of %s (%s)"),
@@ -1973,6 +1967,7 @@ dwarf2_get_symbol_read_needs (gdb::array_view<const gdb_byte> expr,
 	case DW_OP_GNU_reinterpret:
 	case DW_OP_addrx:
 	case DW_OP_GNU_addr_index:
+	case DW_OP_constx:
 	case DW_OP_GNU_const_index:
 	case DW_OP_constu:
 	case DW_OP_plus_uconst:
@@ -3271,10 +3266,13 @@ locexpr_describe_location_piece (struct symbol *symbol, struct ui_file *stream,
   /* With -gsplit-dwarf a TLS variable can also look like this:
      DW_AT_location    : 3 byte block: fc 4 e0
 			(DW_OP_GNU_const_index: 4;
-			 DW_OP_GNU_push_tls_address)  */
+			 DW_OP_GNU_push_tls_address) |
+			 3 byte block a2 4 e0
+			(DW_OP_constx: 4;
+			 DW_OP_form_tls_address)  */
   else if (data + 3 <= end
 	   && data + 1 + (leb128_size = skip_leb128 (data + 1, end)) < end
-	   && data[0] == DW_OP_GNU_const_index
+	   && (data[0] == DW_OP_constx || data[0] == DW_OP_GNU_const_index)
 	   && leb128_size > 0
 	   && (data[1 + leb128_size] == DW_OP_GNU_push_tls_address
 	       || data[1 + leb128_size] == DW_OP_form_tls_address)
@@ -3681,6 +3679,7 @@ disassemble_dwarf_expression (struct ui_file *stream,
 	  gdb_printf (stream, " 0x%s", phex_nz (ul, addr_size));
 	  break;
 
+	case DW_OP_constx:
 	case DW_OP_GNU_const_index:
 	  data = safe_read_uleb128 (data, end, &ul);
 	  ul = (uint64_t) dwarf2_read_addr_index (per_cu, per_objfile, ul);
diff --git a/gdb/dwarf2/macro.h b/gdb/dwarf2/macro.h
index 586f5d5..7ef2134 100644
--- a/gdb/dwarf2/macro.h
+++ b/gdb/dwarf2/macro.h
@@ -21,6 +21,8 @@
 #define GDB_DWARF2_MACRO_H
 
 struct buildsym_compunit;
+struct dwarf2_per_objfile;
+struct dwarf2_section_info;
 
 extern void dwarf_decode_macros (dwarf2_per_objfile *per_objfile,
 				 buildsym_compunit *builder,
diff --git a/gdb/dwarf2/mapped-index.h b/gdb/dwarf2/mapped-index.h
index b4f6483..e7dd8e9 100644
--- a/gdb/dwarf2/mapped-index.h
+++ b/gdb/dwarf2/mapped-index.h
@@ -20,7 +20,9 @@
 #ifndef GDB_DWARF2_MAPPED_INDEX_H
 #define GDB_DWARF2_MAPPED_INDEX_H
 
+#include "dwarf2/index-common.h"
 #include "language.h"
+#include "quick-symbol.h"
 
 /* An index into a (C++) symbol name component in a symbol name as
    recorded in the mapped_index's symbol table.  For each C++ symbol
diff --git a/gdb/dwarf2/parent-map.h b/gdb/dwarf2/parent-map.h
index f070d50..6cff548 100644
--- a/gdb/dwarf2/parent-map.h
+++ b/gdb/dwarf2/parent-map.h
@@ -20,7 +20,9 @@
 #ifndef GDB_DWARF2_PARENT_MAP_H
 #define GDB_DWARF2_PARENT_MAP_H
 
-#include <algorithm>
+#include "addrmap.h"
+#include "dwarf2/types.h"
+#include "gdbsupport/gdb_obstack.h"
 
 class cooked_index_entry;
 
@@ -30,9 +32,31 @@ class cooked_index_entry;
    The generated DWARF can sometimes have the declaration for a method
    in a class (or perhaps namespace) scope, with the definition
    appearing outside this scope... just one of the many bad things
-   about DWARF.  In order to handle this situation, we defer certain
-   entries until the end of scanning, at which point we'll know the
-   containing context of all the DIEs that we might have scanned.  */
+   about DWARF.
+
+   For example, a program like this:
+
+   struct X { int method (); };
+   int X::method () { return 23; }
+
+   ... ends up with DWARF like:
+
+    <1><2e>: Abbrev Number: 2 (DW_TAG_structure_type)
+       <2f>   DW_AT_name        : X
+    ...
+    <2><39>: Abbrev Number: 3 (DW_TAG_subprogram)
+       <3a>   DW_AT_external    : 1
+       <3a>   DW_AT_name        : (indirect string, offset: 0xf): method
+    ...
+    <1><66>: Abbrev Number: 8 (DW_TAG_subprogram)
+       <67>   DW_AT_specification: <0x39>
+
+    Here, the name of DIE 0x66 can't be determined without knowing the
+    parent of DIE 0x39.
+
+    In order to handle this situation, we defer certain entries until
+    the end of scanning, at which point we'll know the containing
+    context of all the DIEs that we might have scanned.  */
 class parent_map
 {
 public:
@@ -80,6 +104,9 @@ public:
     return new (obstack) addrmap_fixed (obstack, &m_map);
   }
 
+  /* Dump a human-readable form of this map.  */
+  void dump () const;
+
 private:
 
   /* An addrmap that maps from section offsets to cooked_index_entry *.  */
@@ -97,7 +124,8 @@ public:
 
   DISABLE_COPY_AND_ASSIGN (parent_map_map);
 
-  /* Add a parent_map to this map.  */
+  /* Add a parent_map to this map.  Note that a copy of MAP is made --
+     modifications to MAP after this call will have no effect.  */
   void add_map (const parent_map &map)
   {
     m_maps.push_back (map.to_fixed (&m_storage));
@@ -116,6 +144,9 @@ public:
     return nullptr;
   }
 
+  /* Dump a human-readable form of this collection of parent_maps.  */
+  void dump () const;
+
 private:
 
   /* Storage for the convert maps.  */
diff --git a/gdb/dwarf2/read-gdb-index.c b/gdb/dwarf2/read-gdb-index.c
index 8cd665c..701cdec 100644
--- a/gdb/dwarf2/read-gdb-index.c
+++ b/gdb/dwarf2/read-gdb-index.c
@@ -158,7 +158,9 @@ struct dwarf2_gdb_index : public dwarf2_base_index_functions
      gdb::function_view<expand_symtabs_symbol_matcher_ftype> symbol_matcher,
      gdb::function_view<expand_symtabs_exp_notify_ftype> expansion_notify,
      block_search_flags search_flags,
-     domain_search_flags domain) override;
+     domain_search_flags domain,
+     gdb::function_view<expand_symtabs_lang_matcher_ftype> lang_matcher)
+       override;
 };
 
 /* This dumps minimal information about the index.
@@ -187,7 +189,8 @@ dw2_expand_marked_cus
    gdb::function_view<expand_symtabs_file_matcher_ftype> file_matcher,
    gdb::function_view<expand_symtabs_exp_notify_ftype> expansion_notify,
    block_search_flags search_flags,
-   domain_search_flags kind)
+   domain_search_flags kind,
+   gdb::function_view<expand_symtabs_lang_matcher_ftype> lang_matcher)
 {
   offset_type vec_len, vec_idx;
   bool global_seen = false;
@@ -268,7 +271,7 @@ dw2_expand_marked_cus
 
       dwarf2_per_cu_data *per_cu = per_objfile->per_bfd->get_cu (cu_index);
       if (!dw2_expand_symtabs_matching_one (per_cu, per_objfile, file_matcher,
-					    expansion_notify))
+					    expansion_notify, lang_matcher))
 	return false;
     }
 
@@ -283,7 +286,8 @@ dwarf2_gdb_index::expand_symtabs_matching
      gdb::function_view<expand_symtabs_symbol_matcher_ftype> symbol_matcher,
      gdb::function_view<expand_symtabs_exp_notify_ftype> expansion_notify,
      block_search_flags search_flags,
-     domain_search_flags domain)
+     domain_search_flags domain,
+     gdb::function_view<expand_symtabs_lang_matcher_ftype> lang_matcher)
 {
   dwarf2_per_objfile *per_objfile = get_dwarf2_per_objfile (objfile);
 
@@ -300,7 +304,8 @@ dwarf2_gdb_index::expand_symtabs_matching
 
 	  if (!dw2_expand_symtabs_matching_one (per_cu, per_objfile,
 						file_matcher,
-						expansion_notify))
+						expansion_notify,
+						lang_matcher))
 	    return false;
 	}
       return true;
@@ -316,10 +321,11 @@ dwarf2_gdb_index::expand_symtabs_matching
 					  [&] (offset_type idx)
     {
       if (!dw2_expand_marked_cus (per_objfile, idx, file_matcher,
-				  expansion_notify, search_flags, domain))
+				  expansion_notify, search_flags, domain,
+				  lang_matcher))
 	return false;
       return true;
-    }, per_objfile);
+    }, per_objfile, lang_matcher);
 
   return result;
 }
diff --git a/gdb/dwarf2/read.c b/gdb/dwarf2/read.c
index 71237d0..ea31d8d 100644
--- a/gdb/dwarf2/read.c
+++ b/gdb/dwarf2/read.c
@@ -48,6 +48,7 @@
 #include "bfd.h"
 #include "elf-bfd.h"
 #include "event-top.h"
+#include "gdbsupport/task-group.h"
 #include "symtab.h"
 #include "gdbtypes.h"
 #include "objfiles.h"
@@ -70,7 +71,6 @@
 #include "go-lang.h"
 #include "valprint.h"
 #include "gdbcore.h"
-#include "gdb/gdb-index.h"
 #include "gdb_bfd.h"
 #include "f-lang.h"
 #include "source.h"
@@ -92,10 +92,11 @@
 #include <unordered_set>
 #include "dwarf2/abbrev-cache.h"
 #include "cooked-index.h"
-#include "split-name.h"
 #include "gdbsupport/thread-pool.h"
 #include "run-on-main-thread.h"
 #include "dwarf2/parent-map.h"
+#include "dwarf2/error.h"
+#include <variant>
 
 /* When == 1, print basic high level tracing messages.
    When > 1, be more verbose.
@@ -863,9 +864,10 @@ static struct type *read_type_die_1 (struct die_info *, struct dwarf2_cu *);
 
 static const char *determine_prefix (struct die_info *die, struct dwarf2_cu *);
 
-static char *typename_concat (struct obstack *obs, const char *prefix,
-			      const char *suffix, int physname,
-			      struct dwarf2_cu *cu);
+static gdb::unique_xmalloc_ptr<char> typename_concat (const char *prefix,
+						      const char *suffix,
+						      int physname,
+						      struct dwarf2_cu *cu);
 
 static void read_file_scope (struct die_info *, struct dwarf2_cu *);
 
@@ -1422,12 +1424,11 @@ dwarf2_per_bfd::locate_sections (bfd *abfd, asection *sectp,
   if ((aflag & SEC_HAS_CONTENTS) == 0)
     {
     }
-  else if (elf_section_data (sectp)->this_hdr.sh_size
-	   > bfd_get_file_size (abfd))
+  else if (bfd_section_size_insane (abfd, sectp))
     {
-      bfd_size_type size = elf_section_data (sectp)->this_hdr.sh_size;
-      warning (_("Discarding section %s which has a section size (%s"
-		 ") larger than the file size [in module %s]"),
+      bfd_size_type size = sectp->size;
+      warning (_("Discarding section %s which has an invalid size (%s) "
+		 "[in module %s]"),
 	       bfd_section_name (sectp), phex_nz (size, sizeof (size)),
 	       bfd_get_filename (abfd));
     }
@@ -1644,7 +1645,9 @@ struct readnow_functions : public dwarf2_base_index_functions
      gdb::function_view<expand_symtabs_symbol_matcher_ftype> symbol_matcher,
      gdb::function_view<expand_symtabs_exp_notify_ftype> expansion_notify,
      block_search_flags search_flags,
-     domain_search_flags domain) override
+     domain_search_flags domain,
+     gdb::function_view<expand_symtabs_lang_matcher_ftype> lang_matcher)
+       override
   {
     return true;
   }
@@ -2296,7 +2299,8 @@ dw2_expand_symtabs_matching_symbol
    const lookup_name_info &lookup_name_in,
    gdb::function_view<expand_symtabs_symbol_matcher_ftype> symbol_matcher,
    gdb::function_view<bool (offset_type)> match_callback,
-   dwarf2_per_objfile *per_objfile)
+   dwarf2_per_objfile *per_objfile,
+   gdb::function_view<expand_symtabs_lang_matcher_ftype> lang_matcher)
 {
   lookup_name_info lookup_name_without_params
     = lookup_name_in.make_ignore_params ();
@@ -2332,6 +2336,8 @@ dw2_expand_symtabs_matching_symbol
   for (int i = 0; i < nr_languages; i++)
     {
       enum language lang_e = (enum language) i;
+      if (lang_matcher != nullptr && !lang_matcher (lang_e))
+	continue;
 
       const language_defn *lang = language_def (lang_e);
       symbol_name_matcher_ftype *name_matcher
@@ -2489,7 +2495,7 @@ check_match (const char *file, int line,
     if (expected_str == NULL || strcmp (expected_str, matched_name) != 0)
       mismatch (expected_str, matched_name);
     return true;
-  }, per_objfile);
+  }, per_objfile, nullptr);
 
   const char *expected_str
   = expected_it == expected_end ? NULL : *expected_it++;
@@ -2850,19 +2856,29 @@ dw2_expand_symtabs_matching_one
   (dwarf2_per_cu_data *per_cu,
    dwarf2_per_objfile *per_objfile,
    gdb::function_view<expand_symtabs_file_matcher_ftype> file_matcher,
-   gdb::function_view<expand_symtabs_exp_notify_ftype> expansion_notify)
+   gdb::function_view<expand_symtabs_exp_notify_ftype> expansion_notify,
+   gdb::function_view<expand_symtabs_lang_matcher_ftype> lang_matcher)
 {
-  if (file_matcher == NULL || per_cu->mark)
+  if (file_matcher != nullptr && !per_cu->mark)
+    return true;
+
+  if (lang_matcher != nullptr)
     {
-      bool symtab_was_null = !per_objfile->symtab_set_p (per_cu);
+      /* Try to skip CUs with non-matching language.  */
+      per_cu->ensure_lang (per_objfile);
+      if (!per_cu->maybe_multi_language ()
+	  && !lang_matcher (per_cu->lang ()))
+	return true;
+    }
 
-      compunit_symtab *symtab
-	= dw2_instantiate_symtab (per_cu, per_objfile, false);
-      gdb_assert (symtab != nullptr);
+  bool symtab_was_null = !per_objfile->symtab_set_p (per_cu);
+  compunit_symtab *symtab
+    = dw2_instantiate_symtab (per_cu, per_objfile, false);
+  gdb_assert (symtab != nullptr);
+
+  if (expansion_notify != NULL && symtab_was_null)
+    return expansion_notify (symtab);
 
-      if (expansion_notify != NULL && symtab_was_null)
-	return expansion_notify (symtab);
-    }
   return true;
 }
 
@@ -2997,7 +3013,7 @@ recursively_find_pc_sect_compunit_symtab (struct compunit_symtab *cust,
 struct compunit_symtab *
 dwarf2_base_index_functions::find_pc_sect_compunit_symtab
      (struct objfile *objfile,
-      struct bound_minimal_symbol msymbol,
+      bound_minimal_symbol msymbol,
       CORE_ADDR pc,
       struct obj_section *section,
       int warn_if_readin)
@@ -3811,8 +3827,9 @@ read_cutu_die_from_dwo (dwarf2_cu *cu,
       /* This is not an assert because it can be caused by bad debug info.  */
       if (sig_type->signature != cu->header.signature)
 	{
-	  error (_("Dwarf Error: signature mismatch %s vs %s while reading"
-		   " TU at offset %s [in module %s]"),
+	  error (_(DWARF_ERROR_PREFIX
+		   "signature mismatch %s vs %s while reading TU at offset %s"
+		   " [in module %s]"),
 		 hex_string (sig_type->signature),
 		 hex_string (cu->header.signature),
 		 sect_offset_str (dwo_unit->sect_off),
@@ -3909,7 +3926,8 @@ lookup_dwo_unit (dwarf2_cu *cu, die_info *comp_unit_die, const char *dwo_name)
       std::optional<ULONGEST> signature = lookup_dwo_id (cu, comp_unit_die);
 
       if (!signature.has_value ())
-	error (_("Dwarf Error: missing dwo_id for dwo_name %s"
+	error (_(DWARF_ERROR_PREFIX
+		 "missing dwo_id for dwo_name %s"
 		 " [in module %s]"),
 	       dwo_name, bfd_get_filename (per_cu->per_bfd->obfd));
 
@@ -4432,6 +4450,50 @@ cooked_index_storage::eq_cutu_reader (const void *a, const void *b)
   return ra->cu->per_cu->index == *rb;
 }
 
+/* Dump MAP as parent_map.  */
+
+static void
+dump_parent_map (const struct addrmap *map)
+{
+  auto_obstack temp_storage;
+
+  auto annotate_cooked_index_entry
+    = [&] (struct ui_file *outfile, const void *value)
+	{
+	  const cooked_index_entry *parent_entry
+	    = (const cooked_index_entry *)value;
+	  if (parent_entry == nullptr)
+	    return;
+
+	  gdb_printf (outfile, " (0x%" PRIx64 ": %s)",
+		      to_underlying (parent_entry->die_offset),
+		      parent_entry->full_name (&temp_storage, false));
+	};
+
+  addrmap_dump (const_cast<addrmap *> (map), gdb_stdlog, nullptr,
+		annotate_cooked_index_entry);
+}
+
+/* See parent-map.h.  */
+
+void
+parent_map::dump () const
+{
+  dump_parent_map (&m_map);
+}
+
+/* See parent-map.h.  */
+
+void
+parent_map_map::dump () const
+{
+  for (const auto &iter : m_maps)
+    {
+      gdb_printf (gdb_stdlog, "map start:\n");
+      dump_parent_map (iter);
+    }
+}
+
 /* An instance of this is created to index a CU.  */
 
 class cooked_indexer
@@ -4469,7 +4531,7 @@ private:
 				 bool is_dwz,
 				 bool for_scanning);
 
-  /* Index DIEs in the READER starting at INFO_PTR.  PARENT_ENTRY is
+  /* Index DIEs in the READER starting at INFO_PTR.  PARENT is
      the entry for the enclosing scope (nullptr at top level).  FULLY
      is true when a full scan must be done -- in some languages,
      function scopes must be fully explored in order to find nested
@@ -4477,7 +4539,8 @@ private:
      reading stopped.  */
   const gdb_byte *index_dies (cutu_reader *reader,
 			      const gdb_byte *info_ptr,
-			      const cooked_index_entry *parent_entry,
+			      std::variant<const cooked_index_entry *,
+					   parent_map::addr_type> parent,
 			      bool fully);
 
   /* Scan the attributes for a given DIE and update the out
@@ -4507,7 +4570,8 @@ private:
      m_die_range_map and then calling index_dies.  */
   const gdb_byte *recurse (cutu_reader *reader,
 			   const gdb_byte *info_ptr,
-			   const cooked_index_entry *parent_entry,
+			   std::variant<const cooked_index_entry *,
+					parent_map::addr_type> parent_entry,
 			   bool fully);
 
   /* The storage object, where the results are kept.  */
@@ -4532,28 +4596,35 @@ process_psymtab_comp_unit (dwarf2_per_cu_data *this_cu,
 			   dwarf2_per_objfile *per_objfile,
 			   cooked_index_storage *storage)
 {
-  cutu_reader reader (this_cu, per_objfile, nullptr, nullptr, false,
-		      storage->get_abbrev_cache ());
+  cutu_reader *reader = storage->get_reader (this_cu);
+  if (reader == nullptr)
+    {
+      cutu_reader new_reader (this_cu, per_objfile, nullptr, nullptr, false,
+			      storage->get_abbrev_cache ());
 
-  if (reader.comp_unit_die == nullptr)
-    return;
+      if (new_reader.comp_unit_die == nullptr || new_reader.dummy_p)
+	return;
 
-  if (reader.dummy_p)
-    {
-      /* Nothing.  */
+      std::unique_ptr<cutu_reader> copy
+	(new cutu_reader (std::move (new_reader)));
+      reader = storage->preserve (std::move (copy));
     }
-  else if (this_cu->is_debug_types)
-    build_type_psymtabs_reader (&reader, storage);
-  else if (reader.comp_unit_die->tag != DW_TAG_partial_unit)
+
+  if (reader->comp_unit_die == nullptr || reader->dummy_p)
+    return;
+
+  if (this_cu->is_debug_types)
+    build_type_psymtabs_reader (reader, storage);
+  else if (reader->comp_unit_die->tag != DW_TAG_partial_unit)
     {
       bool nope = false;
       if (this_cu->scanned.compare_exchange_strong (nope, true))
 	{
-	  prepare_one_comp_unit (reader.cu, reader.comp_unit_die,
+	  prepare_one_comp_unit (reader->cu, reader->comp_unit_die,
 				 language_minimal);
 	  gdb_assert (storage != nullptr);
-	  cooked_indexer indexer (storage, this_cu, reader.cu->lang ());
-	  indexer.make_index (&reader);
+	  cooked_indexer indexer (storage, this_cu, reader->cu->lang ());
+	  indexer.make_index (reader);
 	}
     }
 }
@@ -4817,6 +4888,11 @@ private:
   {
     if (dwarf_read_debug > 0)
       print_tu_stats (m_per_objfile);
+    if (dwarf_read_debug > 1)
+      {
+	dwarf_read_debug_printf_v ("Final m_all_parents_map:");
+	m_all_parents_map.dump ();
+      }
   }
 
   /* After the last DWARF-reading task has finished, this function
@@ -5075,7 +5151,8 @@ create_all_units (dwarf2_per_objfile *per_objfile)
 	  per_objfile->per_bfd->all_units.clear ();
 
 	  /* See enhancement PR symtab/30838.  */
-	  error (_("Dwarf Error: .debug_types section not supported in dwz file"));
+	  error (_(DWARF_ERROR_PREFIX
+		   ".debug_types section not supported in dwz file"));
 	}
     }
 
@@ -5117,8 +5194,9 @@ peek_die_abbrev (const die_reader_specs &reader,
     = reader.abbrev_table->lookup_abbrev (abbrev_number);
   if (!abbrev)
     {
-      error (_("Dwarf Error: Could not find abbrev number %d in %s"
-	       " at offset %s [in module %s]"),
+      error (_(DWARF_ERROR_PREFIX
+	       "Could not find abbrev number %d in %s at offset %s"
+	       " [in module %s]"),
 	     abbrev_number, cu->per_cu->is_debug_types ? "TU" : "CU",
 	     sect_offset_str (cu->header.sect_off), bfd_get_filename (abfd));
     }
@@ -5302,8 +5380,8 @@ skip_one_die (const struct die_reader_specs *reader, const gdb_byte *info_ptr,
 	  goto skip_attribute;
 
 	default:
-	  error (_("Dwarf Error: Cannot handle %s "
-		   "in DWARF reader [in module %s]"),
+	  error (_(DWARF_ERROR_PREFIX
+		   "Cannot handle %s in DWARF reader [in module %s]"),
 		 dwarf_form_name (form),
 		 bfd_get_filename (abfd));
 	}
@@ -6158,7 +6236,8 @@ process_full_comp_unit (dwarf2_cu *cu, enum language pretend_language)
     case DW_TAG_type_unit:
       break;
     default:
-      error (_("Dwarf Error: unexpected tag '%s' at offset %s [in module %s]"),
+      error (_(DWARF_ERROR_PREFIX
+	       "unexpected tag '%s' at offset %s [in module %s]"),
 	     dwarf_tag_name (cu->dies->tag),
 	     sect_offset_str (cu->per_cu->sect_off),
 	     objfile_name (per_objfile->objfile));
@@ -6322,8 +6401,9 @@ process_imported_unit_die (struct die_info *die, struct dwarf2_cu *cu)
   /* For now we don't handle imported units in type units.  */
   if (cu->per_cu->is_debug_types)
     {
-      error (_("Dwarf Error: DW_TAG_imported_unit is not"
-	       " supported in type units [in module %s]"),
+      error (_(DWARF_ERROR_PREFIX
+	       "DW_TAG_imported_unit is not supported in type units"
+	       " [in module %s]"),
 	     objfile_name (cu->per_objfile->objfile));
     }
 
@@ -6673,7 +6753,7 @@ dwarf2_compute_name (const char *name,
 	  if (*prefix != '\0')
 	    {
 	      gdb::unique_xmalloc_ptr<char> prefixed_name
-		(typename_concat (NULL, prefix, name, physname, cu));
+		= typename_concat (prefix, name, physname, cu);
 
 	      buf.puts (prefixed_name.get ());
 	    }
@@ -7779,8 +7859,9 @@ create_dwo_cu_reader (const struct die_reader_specs *reader,
   std::optional<ULONGEST> signature = lookup_dwo_id (cu, comp_unit_die);
   if (!signature.has_value ())
     {
-      complaint (_("Dwarf Error: debug entry at offset %s is missing"
-		   " its dwo_id [in module %s]"),
+      complaint (_(DWARF_ERROR_PREFIX
+		   "debug entry at offset %s is missing its dwo_id"
+		   " [in module %s]"),
 		 sect_offset_str (sect_off), dwo_file->dwo_name.c_str ());
       return;
     }
@@ -8057,14 +8138,15 @@ create_dwp_hash_table (dwarf2_per_objfile *per_objfile,
 
   if (version != 1 && version != 2 && version != 5)
     {
-      error (_("Dwarf Error: unsupported DWP file version (%s)"
-	       " [in module %s]"),
+      error (_(DWARF_ERROR_PREFIX
+	       "unsupported DWP file version (%s) [in module %s]"),
 	     pulongest (version), dwp_file->name);
     }
   if (nr_slots != (nr_slots & -nr_slots))
     {
-      error (_("Dwarf Error: number of slots in DWP hash table (%s)"
-	       " is not power of 2 [in module %s]"),
+      error (_(DWARF_ERROR_PREFIX
+	       "number of slots in DWP hash table (%s) is not power of 2"
+	       " [in module %s]"),
 	     pulongest (nr_slots), dwp_file->name);
     }
 
@@ -8111,14 +8193,16 @@ create_dwp_hash_table (dwarf2_per_objfile *per_objfile,
 
       if (nr_columns < 2)
 	{
-	  error (_("Dwarf Error: bad DWP hash table, too few columns"
-		   " in section table [in module %s]"),
+	  error (_(DWARF_ERROR_PREFIX
+		   "bad DWP hash table, too few columns in section table"
+		   " [in module %s]"),
 		 dwp_file->name);
 	}
       if (nr_columns > MAX_NR_V2_DWO_SECTIONS)
 	{
-	  error (_("Dwarf Error: bad DWP hash table, too many columns"
-		   " in section table [in module %s]"),
+	  error (_(DWARF_ERROR_PREFIX
+		   "bad DWP hash table, too many columns in section table"
+		   " [in module %s]"),
 		 dwp_file->name);
 	}
       memset (ids, 255, sizeof_ids);
@@ -8129,13 +8213,15 @@ create_dwp_hash_table (dwarf2_per_objfile *per_objfile,
 
 	  if (id < DW_SECT_MIN || id > DW_SECT_MAX)
 	    {
-	      error (_("Dwarf Error: bad DWP hash table, bad section id %d"
-		       " in section table [in module %s]"),
+	      error (_(DWARF_ERROR_PREFIX
+		       "bad DWP hash table, bad section id %d in section table"
+		       " [in module %s]"),
 		     id, dwp_file->name);
 	    }
 	  if (ids_seen[id] != -1)
 	    {
-	      error (_("Dwarf Error: bad DWP hash table, duplicate section"
+	      error (_(DWARF_ERROR_PREFIX
+		       "bad DWP hash table, duplicate section"
 		       " id %d in section table [in module %s]"),
 		     id, dwp_file->name);
 	    }
@@ -8147,15 +8233,17 @@ create_dwp_hash_table (dwarf2_per_objfile *per_objfile,
 	   + (ids_seen[DW_SECT_TYPES] != -1))
 	  != 1)
 	{
-	  error (_("Dwarf Error: bad DWP hash table, missing/duplicate"
+	  error (_(DWARF_ERROR_PREFIX
+		   "bad DWP hash table, missing/duplicate"
 		   " DWO info/types section [in module %s]"),
 		 dwp_file->name);
 	}
       /* Must have an abbrev section.  */
       if (ids_seen[DW_SECT_ABBREV] == -1)
 	{
-	  error (_("Dwarf Error: bad DWP hash table, missing DWO abbrev"
-		   " section [in module %s]"),
+	  error (_(DWARF_ERROR_PREFIX
+		   "bad DWP hash table, missing DWO abbrev section"
+		   " [in module %s]"),
 		 dwp_file->name);
 	}
       htab->section_pool.v2.offsets = ids_ptr + sizeof (uint32_t) * nr_columns;
@@ -8166,8 +8254,8 @@ create_dwp_hash_table (dwarf2_per_objfile *per_objfile,
 					  * nr_units * nr_columns))
 	  > index_end)
 	{
-	  error (_("Dwarf Error: DWP index section is corrupt (too small)"
-		   " [in module %s]"),
+	  error (_(DWARF_ERROR_PREFIX
+		   "DWP index section is corrupt (too small) [in module %s]"),
 		 dwp_file->name);
 	}
     }
@@ -8181,14 +8269,16 @@ create_dwp_hash_table (dwarf2_per_objfile *per_objfile,
 
       if (nr_columns < 2)
 	{
-	  error (_("Dwarf Error: bad DWP hash table, too few columns"
-		   " in section table [in module %s]"),
+	  error (_(DWARF_ERROR_PREFIX
+		   "bad DWP hash table, too few columns in section table"
+		   " [in module %s]"),
 		 dwp_file->name);
 	}
       if (nr_columns > MAX_NR_V5_DWO_SECTIONS)
 	{
-	  error (_("Dwarf Error: bad DWP hash table, too many columns"
-		   " in section table [in module %s]"),
+	  error (_(DWARF_ERROR_PREFIX
+		   "bad DWP hash table, too many columns in section table"
+		   " [in module %s]"),
 		 dwp_file->name);
 	}
       memset (ids, 255, sizeof_ids);
@@ -8199,13 +8289,15 @@ create_dwp_hash_table (dwarf2_per_objfile *per_objfile,
 
 	  if (id < DW_SECT_MIN || id > DW_SECT_MAX_V5)
 	    {
-	      error (_("Dwarf Error: bad DWP hash table, bad section id %d"
-		       " in section table [in module %s]"),
+	      error (_(DWARF_ERROR_PREFIX
+		       "bad DWP hash table, bad section id %d in section table"
+		       " [in module %s]"),
 		     id, dwp_file->name);
 	    }
 	  if (ids_seen[id] != -1)
 	    {
-	      error (_("Dwarf Error: bad DWP hash table, duplicate section"
+	      error (_(DWARF_ERROR_PREFIX
+		       "bad DWP hash table, duplicate section"
 		       " id %d in section table [in module %s]"),
 		     id, dwp_file->name);
 	    }
@@ -8215,15 +8307,17 @@ create_dwp_hash_table (dwarf2_per_objfile *per_objfile,
       /* Must have seen an info section.  */
       if (ids_seen[DW_SECT_INFO_V5] == -1)
 	{
-	  error (_("Dwarf Error: bad DWP hash table, missing/duplicate"
+	  error (_(DWARF_ERROR_PREFIX
+		   "bad DWP hash table, missing/duplicate"
 		   " DWO info/types section [in module %s]"),
 		 dwp_file->name);
 	}
       /* Must have an abbrev section.  */
       if (ids_seen[DW_SECT_ABBREV_V5] == -1)
 	{
-	  error (_("Dwarf Error: bad DWP hash table, missing DWO abbrev"
-		   " section [in module %s]"),
+	  error (_(DWARF_ERROR_PREFIX
+		   "bad DWP hash table, missing DWO abbrev section"
+		   " [in module %s]"),
 		 dwp_file->name);
 	}
       htab->section_pool.v5.offsets = ids_ptr + sizeof (uint32_t) * nr_columns;
@@ -8234,8 +8328,8 @@ create_dwp_hash_table (dwarf2_per_objfile *per_objfile,
 					  * nr_units * nr_columns))
 	  > index_end)
 	{
-	  error (_("Dwarf Error: DWP index section is corrupt (too small)"
-		   " [in module %s]"),
+	  error (_(DWARF_ERROR_PREFIX
+		   "DWP index section is corrupt (too small) [in module %s]"),
 		 dwp_file->name);
 	}
     }
@@ -8378,7 +8472,8 @@ create_dwo_unit_in_dwp_v1 (dwarf2_per_objfile *per_objfile,
 	break;
       if (section_nr >= dwp_file->num_sections)
 	{
-	  error (_("Dwarf Error: bad DWP hash table, section number too large"
+	  error (_(DWARF_ERROR_PREFIX
+		   "bad DWP hash table, section number too large"
 		   " [in module %s]"),
 		 dwp_file->name);
 	}
@@ -8386,8 +8481,8 @@ create_dwo_unit_in_dwp_v1 (dwarf2_per_objfile *per_objfile,
       sectp = dwp_file->elf_sections[section_nr];
       if (! locate_v1_virtual_dwo_sections (sectp, &sections))
 	{
-	  error (_("Dwarf Error: bad DWP hash table, invalid section found"
-		   " [in module %s]"),
+	  error (_(DWARF_ERROR_PREFIX
+		   "bad DWP hash table, invalid section found [in module %s]"),
 		 dwp_file->name);
 	}
     }
@@ -8396,14 +8491,14 @@ create_dwo_unit_in_dwp_v1 (dwarf2_per_objfile *per_objfile,
       || sections.info_or_types.empty ()
       || sections.abbrev.empty ())
     {
-      error (_("Dwarf Error: bad DWP hash table, missing DWO sections"
-	       " [in module %s]"),
+      error (_(DWARF_ERROR_PREFIX
+	       "bad DWP hash table, missing DWO sections [in module %s]"),
 	     dwp_file->name);
     }
   if (i == MAX_NR_V1_DWO_SECTIONS)
     {
-      error (_("Dwarf Error: bad DWP hash table, too many DWO sections"
-	       " [in module %s]"),
+      error (_(DWARF_ERROR_PREFIX
+	       "bad DWP hash table, too many DWO sections [in module %s]"),
 	     dwp_file->name);
     }
 
@@ -8501,8 +8596,9 @@ create_dwp_v2_or_v5_section (dwarf2_per_objfile *per_objfile,
   if (sectp == NULL
       || offset + size > bfd_section_size (sectp))
     {
-      error (_("Dwarf Error: Bad DWP V2 or V5 section info, doesn't fit"
-	       " in section %s [in module %s]"),
+      error (_(DWARF_ERROR_PREFIX
+	       "Bad DWP V2 or V5 section info, doesn't fit in section %s"
+	       " [in module %s]"),
 	     sectp ? bfd_section_name (sectp) : "<unknown>",
 	     objfile_name (per_objfile->objfile));
     }
@@ -8919,8 +9015,8 @@ lookup_dwo_unit_in_dwp (dwarf2_per_objfile *per_objfile,
       hash = (hash + hash2) & mask;
     }
 
-  error (_("Dwarf Error: bad DWP hash table, lookup didn't terminate"
-	   " [in module %s]"),
+  error (_(DWARF_ERROR_PREFIX
+	   "bad DWP hash table, lookup didn't terminate [in module %s]"),
 	 dwp_file->name);
 }
 
@@ -9392,8 +9488,9 @@ open_and_init_dwp_file (dwarf2_per_objfile *per_objfile)
       /* Technically speaking, we should try to limp along, but this is
 	 pretty bizarre.  We use pulongest here because that's the established
 	 portability solution (e.g, we cannot use %u for uint32_t).  */
-      error (_("Dwarf Error: DWP file CU version %s doesn't match"
-	       " TU version %s [in DWP file %s]"),
+      error (_(DWARF_ERROR_PREFIX
+	       "DWP file CU version %s doesn't match TU version %s"
+	       " [in DWP file %s]"),
 	     pulongest (dwp_file->cus->version),
 	     pulongest (dwp_file->tus->version), dwp_name.c_str ());
     }
@@ -13255,7 +13352,6 @@ process_enumeration_scope (struct die_info *die, struct dwarf2_cu *cu)
   if (die->child != NULL)
     {
       struct die_info *child_die;
-      const char *name;
 
       child_die = die->child;
       while (child_die && child_die->tag)
@@ -13265,11 +13361,7 @@ process_enumeration_scope (struct die_info *die, struct dwarf2_cu *cu)
 	      process_die (child_die, cu);
 	    }
 	  else
-	    {
-	      name = dwarf2_name (child_die, cu);
-	      if (name)
-		new_symbol (child_die, this_type, cu);
-	    }
+	    new_symbol (child_die, this_type, cu);
 
 	  child_die = child_die->sibling;
 	}
@@ -13986,9 +14078,12 @@ read_namespace_type (struct die_info *die, struct dwarf2_cu *cu)
   /* Now build the name of the current namespace.  */
 
   previous_prefix = determine_prefix (die, cu);
+  gdb::unique_xmalloc_ptr<char> name_storage;
   if (previous_prefix[0] != '\0')
-    name = typename_concat (&objfile->objfile_obstack,
-			    previous_prefix, name, 0, cu);
+    {
+      name_storage = typename_concat (previous_prefix, name, 0, cu);
+      name = name_storage.get ();
+    }
 
   /* Create the type.  */
   type = type_allocator (objfile, cu->lang ()).new_type (TYPE_CODE_NAMESPACE,
@@ -15876,7 +15971,8 @@ read_full_die_1 (const struct die_reader_specs *reader,
 
   abbrev = reader->abbrev_table->lookup_abbrev (abbrev_number);
   if (!abbrev)
-    error (_("Dwarf Error: could not find abbrev number %d [in module %s]"),
+    error (_(DWARF_ERROR_PREFIX
+	     "could not find abbrev number %d [in module %s]"),
 	   abbrev_number,
 	   bfd_get_filename (abfd));
 
@@ -16027,8 +16123,6 @@ cooked_indexer::ensure_cu_exists (cutu_reader *reader,
       if (!per_cu->scanned.compare_exchange_strong (nope, true))
 	return nullptr;
     }
-  if (per_cu == m_per_cu)
-    return reader;
 
   cutu_reader *result = m_index_storage->get_reader (per_cu);
   if (result == nullptr)
@@ -16036,6 +16130,10 @@ cooked_indexer::ensure_cu_exists (cutu_reader *reader,
       cutu_reader new_reader (per_cu, per_objfile, nullptr, nullptr, false,
 			      m_index_storage->get_abbrev_cache ());
 
+      if (new_reader.dummy_p || new_reader.comp_unit_die == nullptr
+	  || !new_reader.comp_unit_die->has_children)
+	return nullptr;
+
       prepare_one_comp_unit (new_reader.cu, new_reader.comp_unit_die,
 			     language_minimal);
       std::unique_ptr<cutu_reader> copy
@@ -16043,7 +16141,8 @@ cooked_indexer::ensure_cu_exists (cutu_reader *reader,
       result = m_index_storage->preserve (std::move (copy));
     }
 
-  if (result->dummy_p || !result->comp_unit_die->has_children)
+  if (result->dummy_p  || result->comp_unit_die == nullptr
+      || !result->comp_unit_die->has_children)
     return nullptr;
 
   if (for_scanning)
@@ -16211,7 +16310,8 @@ cooked_indexer::scan_attributes (dwarf2_per_cu_data *scanning_per_cu,
 	 want to treat them as definitions.  */
       if ((abbrev->tag == DW_TAG_class_type
 	   || abbrev->tag == DW_TAG_structure_type
-	   || abbrev->tag == DW_TAG_union_type)
+	   || abbrev->tag == DW_TAG_union_type
+	   || abbrev->tag == DW_TAG_namespace)
 	  && abbrev->has_children)
 	*flags |= IS_TYPE_DECLARATION;
       else
@@ -16229,42 +16329,53 @@ cooked_indexer::scan_attributes (dwarf2_per_cu_data *scanning_per_cu,
       cutu_reader *new_reader
 	= ensure_cu_exists (reader, reader->cu->per_objfile, origin_offset,
 			    origin_is_dwz, false);
-      if (new_reader != nullptr)
+      if (new_reader == nullptr)
+	error (_(DWARF_ERROR_PREFIX
+		 "cannot follow reference to DIE at %s"
+		 " [in module %s]"),
+	       sect_offset_str (origin_offset),
+	       bfd_get_filename (reader->abfd));
+
+      const gdb_byte *new_info_ptr = (new_reader->buffer
+				      + to_underlying (origin_offset));
+
+      if (*parent_entry == nullptr)
 	{
-	  const gdb_byte *new_info_ptr = (new_reader->buffer
-					  + to_underlying (origin_offset));
+	  /* We only perform immediate lookups of parents for DIEs
+	     from earlier in this CU.  This avoids any problem
+	     with a NULL result when when we see a reference to a
+	     DIE in another CU that we may or may not have
+	     imported locally.  */
+	  parent_map::addr_type addr
+	    = parent_map::form_addr (origin_offset, origin_is_dwz);
+	  if (new_reader->cu != reader->cu || new_info_ptr > watermark_ptr)
+	    *maybe_defer = addr;
+	  else
+	    *parent_entry = m_die_range_map->find (addr);
+	}
 
-	  if (*parent_entry == nullptr)
-	    {
-	      /* We only perform immediate lookups of parents for DIEs
-		 from earlier in this CU.  This avoids any problem
-		 with a NULL result when when we see a reference to a
-		 DIE in another CU that we may or may not have
-		 imported locally.  */
-	      parent_map::addr_type addr
-		= parent_map::form_addr (origin_offset, origin_is_dwz);
-	      if (new_reader->cu != reader->cu || new_info_ptr > watermark_ptr)
-		*maybe_defer = addr;
-	      else
-		*parent_entry = m_die_range_map->find (addr);
-	    }
+      unsigned int bytes_read;
+      const abbrev_info *new_abbrev = peek_die_abbrev (*new_reader,
+						       new_info_ptr,
+						       &bytes_read);
 
-	  unsigned int bytes_read;
-	  const abbrev_info *new_abbrev = peek_die_abbrev (*new_reader,
-							   new_info_ptr,
-							   &bytes_read);
-	  new_info_ptr += bytes_read;
+      if (new_abbrev == nullptr)
+	error (_(DWARF_ERROR_PREFIX
+		 "Unexpected null DIE at offset %s [in module %s]"),
+	       sect_offset_str (origin_offset),
+	       bfd_get_filename (new_reader->abfd));
 
-	  if (new_reader->cu == reader->cu && new_info_ptr == watermark_ptr)
-	    {
-	      /* Self-reference, we're done.  */
-	    }
-	  else
-	    scan_attributes (scanning_per_cu, new_reader, new_info_ptr,
-			     new_info_ptr, new_abbrev, name, linkage_name,
-			     flags, nullptr, parent_entry, maybe_defer,
-			     is_enum_class, true);
+      new_info_ptr += bytes_read;
+
+      if (new_reader->cu == reader->cu && new_info_ptr == watermark_ptr)
+	{
+	  /* Self-reference, we're done.  */
 	}
+      else
+	scan_attributes (scanning_per_cu, new_reader, new_info_ptr,
+			 new_info_ptr, new_abbrev, name, linkage_name,
+			 flags, nullptr, parent_entry, maybe_defer,
+			 is_enum_class, true);
     }
 
   if (!for_specification)
@@ -16359,10 +16470,16 @@ cooked_indexer::index_imported_unit (cutu_reader *reader,
 const gdb_byte *
 cooked_indexer::recurse (cutu_reader *reader,
 			 const gdb_byte *info_ptr,
-			 const cooked_index_entry *parent_entry,
+			 std::variant<const cooked_index_entry *,
+				      parent_map::addr_type> parent,
 			 bool fully)
 {
-  info_ptr = index_dies (reader, info_ptr, parent_entry, fully);
+  info_ptr = index_dies (reader, info_ptr, parent, fully);
+
+  if (!std::holds_alternative<const cooked_index_entry *> (parent))
+    return info_ptr;
+  const cooked_index_entry *parent_entry
+    = std::get<const cooked_index_entry *> (parent);
 
   if (parent_entry != nullptr)
     {
@@ -16383,7 +16500,8 @@ cooked_indexer::recurse (cutu_reader *reader,
 const gdb_byte *
 cooked_indexer::index_dies (cutu_reader *reader,
 			    const gdb_byte *info_ptr,
-			    const cooked_index_entry *parent_entry,
+			    std::variant<const cooked_index_entry *,
+					 parent_map::addr_type> parent,
 			    bool fully)
 {
   const gdb_byte *end_ptr = (reader->buffer
@@ -16410,15 +16528,20 @@ cooked_indexer::index_dies (cutu_reader *reader,
 	{
 	  info_ptr = skip_one_die (reader, info_ptr, abbrev, !fully);
 	  if (fully && abbrev->has_children)
-	    info_ptr = index_dies (reader, info_ptr, parent_entry, fully);
+	    info_ptr = index_dies (reader, info_ptr, parent, fully);
 	  continue;
 	}
 
       const char *name = nullptr;
       const char *linkage_name = nullptr;
       parent_map::addr_type defer {};
+      if (std::holds_alternative<parent_map::addr_type> (parent))
+	defer = std::get<parent_map::addr_type> (parent);
       cooked_index_flag flags = IS_STATIC;
       sect_offset sibling {};
+      const cooked_index_entry *parent_entry = nullptr;
+      if (std::holds_alternative<const cooked_index_entry *> (parent))
+	parent_entry = std::get<const cooked_index_entry *> (parent);
       const cooked_index_entry *this_parent_entry = parent_entry;
       bool is_enum_class = false;
 
@@ -16437,12 +16560,6 @@ cooked_indexer::index_dies (cutu_reader *reader,
 	  flags &= ~IS_STATIC;
 	  flags |= parent_entry->flags & IS_STATIC;
 	}
-      /* If the parent is an enum, but not an enum class, then use the
-	 grandparent instead.  */
-      if (this_parent_entry != nullptr
-	  && this_parent_entry->tag == DW_TAG_enumeration_type
-	  && !is_enum_class)
-	this_parent_entry = this_parent_entry->get_parent ();
 
       if (abbrev->tag == DW_TAG_namespace
 	  && m_language == language_cplus
@@ -16502,7 +16619,27 @@ cooked_indexer::index_dies (cutu_reader *reader,
 	      break;
 
 	    case DW_TAG_enumeration_type:
-	      info_ptr = recurse (reader, info_ptr, this_entry, fully);
+	      /* We need to recurse even for an anonymous enumeration.
+		 Which scope we record as the parent scope depends on
+		 whether we're reading an "enum class".  If so, we use
+		 the enum itself as the parent, yielding names like
+		 "enum_class::enumerator"; otherwise we inject the
+		 names into our own parent scope.  */
+	      {
+		std::variant<const cooked_index_entry *,
+			     parent_map::addr_type> recurse_parent;
+		if (is_enum_class)
+		  {
+		    gdb_assert (this_entry != nullptr);
+		    recurse_parent = this_entry;
+		  }
+		else if (defer != 0)
+		  recurse_parent = defer;
+		else
+		  recurse_parent = this_parent_entry;
+
+		info_ptr = recurse (reader, info_ptr, recurse_parent, fully);
+	      }
 	      continue;
 
 	    case DW_TAG_module:
@@ -16583,7 +16720,8 @@ cooked_index_functions::expand_symtabs_matching
       gdb::function_view<expand_symtabs_symbol_matcher_ftype> symbol_matcher,
       gdb::function_view<expand_symtabs_exp_notify_ftype> expansion_notify,
       block_search_flags search_flags,
-      domain_search_flags domain)
+      domain_search_flags domain,
+      gdb::function_view<expand_symtabs_lang_matcher_ftype> lang_matcher)
 {
   dwarf2_per_objfile *per_objfile = get_dwarf2_per_objfile (objfile);
 
@@ -16602,7 +16740,8 @@ cooked_index_functions::expand_symtabs_matching
 
 	  if (!dw2_expand_symtabs_matching_one (per_cu, per_objfile,
 						file_matcher,
-						expansion_notify))
+						expansion_notify,
+						lang_matcher))
 	    return false;
 	}
       return true;
@@ -16627,8 +16766,42 @@ cooked_index_functions::expand_symtabs_matching
   symbol_name_match_type match_type
     = lookup_name_without_params.match_type ();
 
+  std::bitset<nr_languages> unique_styles_used;
+  if (lang_matcher != nullptr)
+    for (unsigned iter = 0; iter < nr_languages; ++iter)
+      {
+	enum language lang = (enum language) iter;
+	if (!lang_matcher (lang))
+	  continue;
+
+	switch (lang)
+	  {
+	  case language_cplus:
+	  case language_rust:
+	    unique_styles_used[language_cplus] = true;
+	    break;
+	  case language_d:
+	  case language_go:
+	    unique_styles_used[language_d] = true;
+	    break;
+	  case language_ada:
+	    unique_styles_used[language_ada] = true;
+	    break;
+	  default:
+	    unique_styles_used[language_c] = true;
+	  }
+
+	if (unique_styles_used.count ()
+	    == sizeof (unique_styles) / sizeof (unique_styles[0]))
+	  break;
+      }
+
   for (enum language lang : unique_styles)
     {
+      if (lang_matcher != nullptr
+	  && !unique_styles_used.test (lang))
+	continue;
+
       std::vector<std::string_view> name_vec
 	= lookup_name_without_params.split_name (lang);
       std::vector<std::string> name_str_vec (name_vec.begin (), name_vec.end ());
@@ -16659,6 +16832,15 @@ cooked_index_functions::expand_symtabs_matching
 	      || !entry->matches (domain))
 	    continue;
 
+	  if (lang_matcher != nullptr)
+	    {
+	      /* Try to skip CUs with non-matching language.  */
+	      entry->per_cu->ensure_lang (per_objfile);
+	      if (!entry->per_cu->maybe_multi_language ()
+		  && !lang_matcher (entry->per_cu->lang ()))
+		continue;
+	    }
+
 	  /* We've found the base name of the symbol; now walk its
 	     parentage chain, ensuring that each component
 	     matches.  */
@@ -16727,7 +16909,7 @@ cooked_index_functions::expand_symtabs_matching
 
 	  if (!dw2_expand_symtabs_matching_one (entry->per_cu, per_objfile,
 						file_matcher,
-						expansion_notify))
+						expansion_notify, nullptr))
 	    return false;
 	}
     }
@@ -17241,7 +17423,8 @@ read_attribute_value (const struct die_reader_specs *reader,
       }
       break;
     default:
-      error (_("Dwarf Error: Cannot handle %s in DWARF reader [in module %s]"),
+      error (_(DWARF_ERROR_PREFIX
+	       "Cannot handle %s in DWARF reader [in module %s]"),
 	     dwarf_form_name (form),
 	     bfd_get_filename (abfd));
     }
@@ -17689,7 +17872,7 @@ dwarf2_string_attr (struct die_info *die, unsigned int name, struct dwarf2_cu *c
       str = attr->as_string ();
       if (str == nullptr)
 	complaint (_("string type expected for attribute %s for "
-		     "DIE at %s in module %s"),
+		     "DIE at %s [in module %s]"),
 		   dwarf_attr_name (name), sect_offset_str (die->sect_off),
 		   objfile_name (cu->per_objfile->objfile));
     }
@@ -17727,7 +17910,7 @@ die_is_declaration (struct die_info *die, struct dwarf2_cu *cu)
      which value is non-zero.  However, we have to be careful with
      DIEs having a DW_AT_specification attribute, because dwarf2_attr()
      (via dwarf2_flag_true_p) follows this attribute.  So we may
-     end up accidently finding a declaration attribute that belongs
+     end up accidentally finding a declaration attribute that belongs
      to a different DIE referenced by the specification attribute,
      even though the given DIE does not have a declaration attribute.  */
   return (dwarf2_flag_true_p (die, DW_AT_declaration, cu)
@@ -17901,8 +18084,8 @@ public:
      we're processing the end of a sequence.  */
   void record_line (bool end_sequence);
 
-  /* Check ADDRESS is -1, or zero and less than UNRELOCATED_LOWPC, and if true
-     nop-out rest of the lines in this sequence.  */
+  /* Check ADDRESS is -1, -2, or zero and less than UNRELOCATED_LOWPC, and if
+     true nop-out rest of the lines in this sequence.  */
   void check_line_address (struct dwarf2_cu *cu,
 			   const gdb_byte *line_ptr,
 			   unrelocated_addr unrelocated_lowpc,
@@ -18312,13 +18495,16 @@ lnp_state_machine::check_line_address (struct dwarf2_cu *cu,
 				       unrelocated_addr unrelocated_lowpc,
 				       unrelocated_addr address)
 {
-  /* Linkers resolve a symbolic relocation referencing a GC'd function to 0 or
-     -1.  If ADDRESS is 0, ignoring the opcode will err if the text section is
+  /* Linkers resolve a symbolic relocation referencing a GC'd function to 0,
+     -1 or -2 (-2 is used by certain lld versions, see
+     https://github.com/llvm/llvm-project/commit/e618ccbf431f6730edb6d1467a127c3a52fd57f7).
+     If ADDRESS is 0, ignoring the opcode will err if the text section is
      located at 0x0.  In this case, additionally check that if
      ADDRESS < UNRELOCATED_LOWPC.  */
 
   if ((address == (unrelocated_addr) 0 && address < unrelocated_lowpc)
-      || address == (unrelocated_addr) -1)
+      || address == (unrelocated_addr) -1
+      || address == (unrelocated_addr) -2)
     {
       /* This line table is for a function which has been
 	 GCd by the linker.  Ignore it.  PR gdb/12528 */
@@ -19514,8 +19700,10 @@ die_containing_type (struct die_info *die, struct dwarf2_cu *cu)
 
   type_attr = dwarf2_attr (die, DW_AT_containing_type, cu);
   if (!type_attr)
-    error (_("Dwarf Error: Problem turning containing type into gdb type "
-	     "[in module %s]"), objfile_name (objfile));
+    error (_(DWARF_ERROR_PREFIX
+	     "Problem turning containing type into gdb type "
+	     "[in module %s]"),
+	   objfile_name (objfile));
 
   return lookup_die_type (die, type_attr, cu);
 }
@@ -19582,8 +19770,8 @@ lookup_die_type (struct die_info *die, const struct attribute *attr,
     }
   else
     {
-      complaint (_("Dwarf Error: Bad type attribute %s in DIE"
-		   " at %s [in module %s]"),
+      complaint (_(DWARF_ERROR_PREFIX
+		   "Bad type attribute %s in DIE at %s [in module %s]"),
 		 dwarf_attr_name (attr->name), sect_offset_str (die->sect_off),
 		 objfile_name (objfile));
       return build_error_marker_type (cu, die);
@@ -19998,17 +20186,15 @@ determine_prefix (struct die_info *die, struct dwarf2_cu *cu)
       }
 }
 
-/* Return a newly-allocated string formed by concatenating PREFIX and SUFFIX
-   with appropriate separator.  If PREFIX or SUFFIX is NULL or empty, then
-   simply copy the SUFFIX or PREFIX, respectively.  If OBS is non-null, perform
-   an obconcat, otherwise allocate storage for the result.  The CU argument is
-   used to determine the language and hence, the appropriate separator.  */
-
-#define MAX_SEP_LEN 7  /* strlen ("__") + strlen ("_MOD_")  */
+/* Return a newly-allocated string formed by concatenating PREFIX and
+   SUFFIX with appropriate separator.  If PREFIX or SUFFIX is NULL or
+   empty, then simply copy the SUFFIX or PREFIX, respectively.  The CU
+   argument is used to determine the language and hence, the
+   appropriate separator.  */
 
-static char *
-typename_concat (struct obstack *obs, const char *prefix, const char *suffix,
-		 int physname, struct dwarf2_cu *cu)
+static gdb::unique_xmalloc_ptr<char>
+typename_concat (const char *prefix, const char *suffix, int physname,
+		 struct dwarf2_cu *cu)
 {
   const char *lead = "";
   const char *sep;
@@ -20044,23 +20230,8 @@ typename_concat (struct obstack *obs, const char *prefix, const char *suffix,
   if (suffix == NULL)
     suffix = "";
 
-  if (obs == NULL)
-    {
-      char *retval
-	= ((char *)
-	   xmalloc (strlen (prefix) + MAX_SEP_LEN + strlen (suffix) + 1));
-
-      strcpy (retval, lead);
-      strcat (retval, prefix);
-      strcat (retval, sep);
-      strcat (retval, suffix);
-      return retval;
-    }
-  else
-    {
-      /* We have an obstack.  */
-      return obconcat (obs, lead, prefix, sep, suffix, (char *) NULL);
-    }
+  return gdb::unique_xmalloc_ptr<char> (concat (lead, prefix, sep, suffix,
+						nullptr));
 }
 
 /* Return a generic name for a DW_TAG_template_type_param or
@@ -20267,7 +20438,8 @@ follow_die_ref_or_sig (struct die_info *src_die, const struct attribute *attr,
   else
     {
       src_die->error_dump ();
-      error (_("Dwarf Error: Expected reference attribute [in module %s]"),
+      error (_(DWARF_ERROR_PREFIX
+	       "Expected reference attribute [in module %s]"),
 	     objfile_name ((*ref_cu)->per_objfile->objfile));
     }
 
@@ -20329,7 +20501,12 @@ follow_die_offset (sect_offset sect_off, int offset_in_dwz,
 			     false, cu->lang ());
 
       target_cu = per_objfile->get_cu (per_cu);
-      gdb_assert (target_cu != nullptr);
+      if (target_cu == nullptr)
+	error (_(DWARF_ERROR_PREFIX
+		 "cannot follow reference to DIE at %s"
+		 " [in module %s]"),
+	       sect_offset_str (sect_off),
+	       objfile_name (per_objfile->objfile));
     }
   else if (cu->dies == NULL)
     {
@@ -20369,8 +20546,8 @@ follow_die_ref (struct die_info *src_die, const struct attribute *attr,
 			    || cu->per_cu->is_dwz),
 			   ref_cu);
   if (!die)
-    error (_("Dwarf Error: Cannot find DIE at %s referenced from DIE "
-	   "at %s [in module %s]"),
+    error (_(DWARF_ERROR_PREFIX
+	     "Cannot find DIE at %s referenced from DIE at %s [in module %s]"),
 	   sect_offset_str (sect_off), sect_offset_str (src_die->sect_off),
 	   objfile_name (cu->per_objfile->objfile));
 
@@ -20399,13 +20576,15 @@ dwarf2_fetch_die_loc_sect_off (sect_offset sect_off,
     {
       /* We shouldn't get here for a dummy CU, but don't crash on the user.
 	 Instead just throw an error, not much else we can do.  */
-      error (_("Dwarf Error: Dummy CU at %s referenced in module %s"),
+      error (_(DWARF_ERROR_PREFIX
+	       "Dummy CU at %s referenced [in module %s]"),
 	     sect_offset_str (sect_off), objfile_name (objfile));
     }
 
   die = follow_die_offset (sect_off, per_cu->is_dwz, &cu);
   if (!die)
-    error (_("Dwarf Error: Cannot find DIE at %s referenced in module %s"),
+    error (_(DWARF_ERROR_PREFIX
+	     "Cannot find DIE at %s referenced [in module %s]"),
 	   sect_offset_str (sect_off), objfile_name (objfile));
 
   attr = dwarf2_attr (die, DW_AT_location, cu);
@@ -20464,8 +20643,9 @@ dwarf2_fetch_die_loc_sect_off (sect_offset sect_off,
   else
     {
       if (!attr->form_is_block ())
-	error (_("Dwarf Error: DIE at %s referenced in module %s "
-		 "is neither DW_FORM_block* nor DW_FORM_exprloc"),
+	error (_(DWARF_ERROR_PREFIX
+		 "DIE at %s is neither DW_FORM_block* nor DW_FORM_exprloc"
+		 " [in module %s]"),
 	       sect_offset_str (sect_off), objfile_name (objfile));
 
       struct dwarf_block *block = attr->as_block ();
@@ -20538,13 +20718,15 @@ dwarf2_fetch_constant_bytes (sect_offset sect_off,
     {
       /* We shouldn't get here for a dummy CU, but don't crash on the user.
 	 Instead just throw an error, not much else we can do.  */
-      error (_("Dwarf Error: Dummy CU at %s referenced in module %s"),
+      error (_(DWARF_ERROR_PREFIX
+	       "Dummy CU at %s referenced [in module %s]"),
 	     sect_offset_str (sect_off), objfile_name (objfile));
     }
 
   die = follow_die_offset (sect_off, per_cu->is_dwz, &cu);
   if (!die)
-    error (_("Dwarf Error: Cannot find DIE at %s referenced in module %s"),
+    error (_(DWARF_ERROR_PREFIX
+	     "Cannot find DIE at %s referenced [in module %s]"),
 	   sect_offset_str (sect_off), objfile_name (objfile));
 
   attr = dwarf2_attr (die, DW_AT_const_value, cu);
@@ -20760,8 +20942,9 @@ follow_die_sig (struct die_info *src_die, const struct attribute *attr,
      the debug info.  */
   if (sig_type == NULL)
     {
-      error (_("Dwarf Error: Cannot find signatured DIE %s referenced"
-	       " from DIE at %s [in module %s]"),
+      error (_(DWARF_ERROR_PREFIX
+	       "Cannot find signatured DIE %s referenced from DIE at %s"
+	       " [in module %s]"),
 	     hex_string (signature), sect_offset_str (src_die->sect_off),
 	     objfile_name ((*ref_cu)->per_objfile->objfile));
     }
@@ -20770,8 +20953,9 @@ follow_die_sig (struct die_info *src_die, const struct attribute *attr,
   if (die == NULL)
     {
       src_die->error_dump ();
-      error (_("Dwarf Error: Problem reading signatured DIE %s referenced"
-	       " from DIE at %s [in module %s]"),
+      error (_(DWARF_ERROR_PREFIX
+	       "Problem reading signatured DIE %s referenced from DIE at %s"
+	       " [in module %s]"),
 	     hex_string (signature), sect_offset_str (src_die->sect_off),
 	     objfile_name ((*ref_cu)->per_objfile->objfile));
     }
@@ -20797,8 +20981,9 @@ get_signatured_type (struct die_info *die, ULONGEST signature,
      the debug info.  */
   if (sig_type == NULL)
     {
-      complaint (_("Dwarf Error: Cannot find signatured DIE %s referenced"
-		   " from DIE at %s [in module %s]"),
+      complaint (_(DWARF_ERROR_PREFIX
+		   "Cannot find signatured DIE %s referenced from DIE at %s"
+		   " [in module %s]"),
 		 hex_string (signature), sect_offset_str (die->sect_off),
 		 objfile_name (per_objfile->objfile));
       return build_error_marker_type (cu, die);
@@ -20819,7 +21004,8 @@ get_signatured_type (struct die_info *die, ULONGEST signature,
       type = read_type_die (type_die, type_cu);
       if (type == NULL)
 	{
-	  complaint (_("Dwarf Error: Cannot build signatured type %s"
+	  complaint (_(DWARF_ERROR_PREFIX
+		       "Cannot build signatured type %s"
 		       " referenced from DIE at %s [in module %s]"),
 		     hex_string (signature), sect_offset_str (die->sect_off),
 		     objfile_name (per_objfile->objfile));
@@ -20828,7 +21014,8 @@ get_signatured_type (struct die_info *die, ULONGEST signature,
     }
   else
     {
-      complaint (_("Dwarf Error: Problem reading signatured DIE %s referenced"
+      complaint (_(DWARF_ERROR_PREFIX
+		   "Problem reading signatured DIE %s referenced"
 		   " from DIE at %s [in module %s]"),
 		 hex_string (signature), sect_offset_str (die->sect_off),
 		 objfile_name (per_objfile->objfile));
@@ -20863,8 +21050,9 @@ get_DW_AT_signature_type (struct die_info *die, const struct attribute *attr,
     {
       dwarf2_per_objfile *per_objfile = cu->per_objfile;
 
-      complaint (_("Dwarf Error: DW_AT_signature has bad form %s in DIE"
-		   " at %s [in module %s]"),
+      complaint (_(DWARF_ERROR_PREFIX
+		   "DW_AT_signature has bad form %s in DIE at %s"
+		   " [in module %s]"),
 		 dwarf_form_name (attr->form), sect_offset_str (die->sect_off),
 		 objfile_name (per_objfile->objfile));
       return build_error_marker_type (cu, die);
@@ -21107,6 +21295,7 @@ decode_locdesc (struct dwarf_block *blk, struct dwarf2_cu *cu,
 
 	case DW_OP_addrx:
 	case DW_OP_GNU_addr_index:
+	case DW_OP_constx:
 	case DW_OP_GNU_const_index:
 	  stack[++stacki]
 	    = (CORE_ADDR) read_addr_index_from_leb128 (cu, &data[i],
@@ -21425,6 +21614,24 @@ dwarf2_per_cu_data::set_lang (enum language lang,
   gdb_assert (old_dw == 0 || old_dw == dw_lang);
 }
 
+/* See read.h.  */
+
+void
+dwarf2_per_cu_data::ensure_lang (dwarf2_per_objfile *per_objfile)
+{
+  if (lang (false) != language_unknown)
+    return;
+
+  cutu_reader reader (this, per_objfile);
+  if (reader.dummy_p)
+    {
+      set_lang (language_minimal, (dwarf_source_language)0);
+      return;
+    }
+
+  prepare_one_comp_unit (reader.cu, reader.comp_unit_die, language_minimal);
+}
+
 /* A helper function for dwarf2_find_containing_comp_unit that returns
    the index of the result, and that searches a vector.  It will
    return a result even if the offset in question does not actually
@@ -21473,8 +21680,8 @@ dwarf2_find_containing_comp_unit (sect_offset sect_off,
   if (this_cu->is_dwz != offset_in_dwz || this_cu->sect_off > sect_off)
     {
       if (low == 0 || this_cu->is_dwz != offset_in_dwz)
-	error (_("Dwarf Error: could not find CU containing "
-	       "offset %s [in module %s]"),
+	error (_(DWARF_ERROR_PREFIX
+		 "could not find CU containing offset %s [in module %s]"),
 	       sect_offset_str (sect_off),
 	       bfd_get_filename (per_bfd->obfd));
 
@@ -21588,6 +21795,14 @@ prepare_one_comp_unit (struct dwarf2_cu *cu, struct die_info *comp_unit_die,
 
   cu->language_defn = language_def (lang);
 
+  /* Initialize the lto_artificial field.  */
+  attr = dwarf2_attr (comp_unit_die, DW_AT_name, cu);
+  if (attr != nullptr
+      && cu->producer != nullptr
+      && strcmp (attr->as_string (), "<artificial>") == 0
+      && producer_is_gcc (cu->producer, nullptr, nullptr))
+    cu->per_cu->lto_artificial = true;
+
   switch (comp_unit_die->tag)
     {
     case DW_TAG_compile_unit:
@@ -21600,7 +21815,8 @@ prepare_one_comp_unit (struct dwarf2_cu *cu, struct die_info *comp_unit_die,
       cu->per_cu->set_unit_type (DW_UT_type);
       break;
     default:
-      error (_("Dwarf Error: unexpected tag '%s' at offset %s"),
+      error (_(DWARF_ERROR_PREFIX
+	       "unexpected tag '%s' at offset %s"),
 	     dwarf_tag_name (comp_unit_die->tag),
 	     sect_offset_str (cu->per_cu->sect_off));
     }
diff --git a/gdb/dwarf2/read.h b/gdb/dwarf2/read.h
index e55d053..7c42017 100644
--- a/gdb/dwarf2/read.h
+++ b/gdb/dwarf2/read.h
@@ -28,7 +28,6 @@
 #include "dwarf2/mapped-index.h"
 #include "dwarf2/section.h"
 #include "dwarf2/cu.h"
-#include "filename-seen-cache.h"
 #include "gdbsupport/gdb_obstack.h"
 #include "gdbsupport/hash_enum.h"
 #include "gdbsupport/function-view.h"
@@ -103,6 +102,7 @@ struct dwarf2_per_cu_data
       is_dwz (false),
       reading_dwo_directly (false),
       tu_read (false),
+      lto_artificial (false),
       queued (false),
       m_header_read_in (false),
       mark (false),
@@ -149,6 +149,11 @@ public:
      This flag is only valid if is_debug_types is true.  */
   unsigned int tu_read : 1;
 
+  /* Non-zero if the CU is produced by GCC and has name "<artificial>".  GCC
+     uses this to indicate that the CU does not correspond to a single source
+     file.  GCC produces this type of CU during LTO.  */
+  unsigned int lto_artificial : 1;
+
   /* Wrap the following in struct packed instead of bitfields to avoid
      data races when the bitfields end up on the same memory location
      (per C++ memory model).  */
@@ -325,6 +330,9 @@ public:
     return l;
   }
 
+  /* Make sure that m_lang != language_unknown.  */
+  void ensure_lang (dwarf2_per_objfile *per_objfile);
+
   /* Return the language of this CU, as a DWARF DW_LANG_* value.  This
      may be 0 in some situations.  */
   dwarf_source_language dw_lang () const
@@ -336,6 +344,22 @@ public:
      situation LANG would be set by the importing CU.  */
   void set_lang (enum language lang, dwarf_source_language dw_lang);
 
+  /* Return true if the CU may be a multi-language CU.  */
+
+  bool maybe_multi_language () const
+  {
+    enum language lang = this->lang ();
+
+    if (!lto_artificial)
+      /* Assume multi-language CUs are generated only by GCC LTO.  */
+      return false;
+
+    /* If GCC mixes different languages in an artificial LTO CU, it labels it C.
+       The exception to this is when it mixes C and C++, which it labels it C++.
+       For now, we don't consider the latter a multi-language CU.  */
+    return lang == language_c;
+  }
+
   /* Free any cached file names.  */
   void free_cached_file_names ();
 };
@@ -844,7 +868,7 @@ struct dwarf2_base_index_functions : public quick_symbol_functions
   void expand_all_symtabs (struct objfile *objfile) override;
 
   struct compunit_symtab *find_pc_sect_compunit_symtab
-    (struct objfile *objfile, struct bound_minimal_symbol msymbol,
+    (struct objfile *objfile, bound_minimal_symbol msymbol,
      CORE_ADDR pc, struct obj_section *section, int warn_if_readin)
        override;
 
@@ -868,7 +892,8 @@ extern bool dw2_expand_symtabs_matching_one
   (dwarf2_per_cu_data *per_cu,
    dwarf2_per_objfile *per_objfile,
    gdb::function_view<expand_symtabs_file_matcher_ftype> file_matcher,
-   gdb::function_view<expand_symtabs_exp_notify_ftype> expansion_notify);
+   gdb::function_view<expand_symtabs_exp_notify_ftype> expansion_notify,
+   gdb::function_view<expand_symtabs_lang_matcher_ftype> lang_matcher);
 
 /* Helper for dw2_expand_symtabs_matching that works with a
    mapped_index_base instead of the containing objfile.  This is split
@@ -882,7 +907,8 @@ extern bool dw2_expand_symtabs_matching_symbol
    const lookup_name_info &lookup_name_in,
    gdb::function_view<expand_symtabs_symbol_matcher_ftype> symbol_matcher,
    gdb::function_view<bool (offset_type)> match_callback,
-   dwarf2_per_objfile *per_objfile);
+   dwarf2_per_objfile *per_objfile,
+   gdb::function_view<expand_symtabs_lang_matcher_ftype> lang_matcher);
 
 /* If FILE_MATCHER is non-NULL, set all the
    dwarf2_per_cu_quick_data::MARK of the current DWARF2_PER_OBJFILE
diff --git a/gdb/dwarf2/section.c b/gdb/dwarf2/section.c
index 6aab0b9..e0b63fd 100644
--- a/gdb/dwarf2/section.c
+++ b/gdb/dwarf2/section.c
@@ -28,6 +28,7 @@
 #include "gdb_bfd.h"
 #include "objfiles.h"
 #include "complaints.h"
+#include "dwarf2/error.h"
 
 void
 dwarf2_section_info::overflow_complaint () const
@@ -140,8 +141,9 @@ dwarf2_section_info::read (struct objfile *objfile)
       gdb_assert (sectp != NULL);
       if ((sectp->flags & SEC_RELOC) != 0)
 	{
-	  error (_("Dwarf Error: DWP format V2 with relocations is not"
-		   " supported in section %s [in module %s]"),
+	  error (_(DWARF_ERROR_PREFIX
+		   "DWP format V2 with relocations is not supported"
+		   " in section %s [in module %s]"),
 		 get_name (), get_file_name ());
 	}
       containing_section->read (objfile);
@@ -183,8 +185,8 @@ dwarf2_section_info::read (struct objfile *objfile)
   if (bfd_seek (abfd, sectp->filepos, SEEK_SET) != 0
       || bfd_read (buf, size, abfd) != size)
     {
-      error (_("Dwarf Error: Can't read DWARF data"
-	       " in section %s [in module %s]"),
+      error (_(DWARF_ERROR_PREFIX
+	       "Can't read DWARF data in section %s [in module %s]"),
 	     bfd_section_name (sectp), bfd_get_filename (abfd));
     }
 }
@@ -197,10 +199,12 @@ dwarf2_section_info::read_string (struct objfile *objfile, LONGEST str_offset,
   if (buffer == NULL)
     {
       if (get_bfd_section () == nullptr)
-	error (_("Dwarf Error: %s used without required section"),
+	error (_(DWARF_ERROR_PREFIX
+		 "%s used without required section"),
 	       form_name);
       else
-	error (_("Dwarf Error: %s used without %s section [in module %s]"),
+	error (_(DWARF_ERROR_PREFIX
+		 "%s used without %s section [in module %s]"),
 	       form_name, get_name (), get_file_name ());
     }
   if (str_offset >= size)
diff --git a/gdb/dwarf2/tag.h b/gdb/dwarf2/tag.h
index 2ceae53..d82690b 100644
--- a/gdb/dwarf2/tag.h
+++ b/gdb/dwarf2/tag.h
@@ -30,7 +30,6 @@ tag_is_type (dwarf_tag tag)
 {
   switch (tag)
     {
-    case DW_TAG_padding:
     case DW_TAG_array_type:
     case DW_TAG_class_type:
     case DW_TAG_enumeration_type:
diff --git a/gdb/elfread.c b/gdb/elfread.c
index 7a6a8ca..2e68b0d 100644
--- a/gdb/elfread.c
+++ b/gdb/elfread.c
@@ -29,8 +29,6 @@
 #include "symfile.h"
 #include "objfiles.h"
 #include "stabsread.h"
-#include "demangle.h"
-#include "filenames.h"
 #include "probe.h"
 #include "arch-utils.h"
 #include "gdbtypes.h"
@@ -39,16 +37,15 @@
 #include "gdbthread.h"
 #include "inferior.h"
 #include "regcache.h"
-#include "bcache.h"
 #include "gdb_bfd.h"
 #include "location.h"
 #include "auxv.h"
 #include "mdebugread.h"
 #include "ctfread.h"
 #include <string_view>
-#include "gdbsupport/scoped_fd.h"
 #include "dwarf2/public.h"
 #include "cli/cli-cmds.h"
+#include "gdb-stabs.h"
 
 /* Whether ctf should always be read, or only if no dwarf is present.  */
 static bool always_read_ctf;
@@ -615,6 +612,8 @@ elf_rel_plt_read (minimal_symbol_reader &reader,
       const size_t got_suffix_len = strlen (SYMBOL_GOT_PLT_SUFFIX);
 
       name = bfd_asymbol_name (*relplt->relocation[reloc].sym_ptr_ptr);
+      if (!name)
+	continue;
       address = relplt->relocation[reloc].address;
 
       asection *msym_section;
@@ -694,13 +693,12 @@ elf_gnu_ifunc_cache_eq (const void *a_voidp, const void *b_voidp)
 static int
 elf_gnu_ifunc_record_cache (const char *name, CORE_ADDR addr)
 {
-  struct bound_minimal_symbol msym;
   struct objfile *objfile;
   htab_t htab;
   struct elf_gnu_ifunc_cache entry_local, *entry_p;
   void **slot;
 
-  msym = lookup_minimal_symbol_by_pc (addr);
+  bound_minimal_symbol msym = lookup_minimal_symbol_by_pc (addr);
   if (msym.minsym == NULL)
     return 0;
   if (msym.value_address () != addr)
@@ -843,9 +841,10 @@ elf_gnu_ifunc_resolve_by_got (const char *name, CORE_ADDR *addr_p)
 	 CORE_ADDR pointer_address, addr;
 	 asection *plt;
 	 gdb_byte *buf = (gdb_byte *) alloca (ptr_size);
-	 bound_minimal_symbol msym;
 
-	 msym = lookup_minimal_symbol (name_got_plt, NULL, objfile);
+	 bound_minimal_symbol msym
+	   = lookup_minimal_symbol (current_program_space, name_got_plt,
+				    objfile);
 	 if (msym.minsym == NULL)
 	   return 0;
 	 if (msym.minsym->type () != mst_slot_got_plt)
@@ -977,7 +976,7 @@ elf_gnu_ifunc_resolver_stop (code_breakpoint *b)
   if (b_return == b)
     {
       /* No need to call find_pc_line for symbols resolving as this is only
-	 a helper breakpointer never shown to the user.  */
+	 a helper breakpoint never shown to the user.  */
 
       symtab_and_line sal;
       sal.pspace = current_inferior ()->pspace;
@@ -1225,6 +1224,134 @@ elf_symfile_read_dwarf2 (struct objfile *objfile,
   return has_dwarf2;
 }
 
+/* find_text_range --- find start and end of loadable code sections
+
+   The find_text_range function finds the shortest address range that
+   encloses all sections containing executable code, and stores it in
+   objfile's text_addr and text_size members.
+
+   dbx_symfile_read will use this to finish off the partial symbol
+   table, in some cases.  */
+
+static void
+find_text_range (bfd * sym_bfd, struct objfile *objfile)
+{
+  asection *sec;
+  int found_any = 0;
+  CORE_ADDR start = 0;
+  CORE_ADDR end = 0;
+
+  for (sec = sym_bfd->sections; sec; sec = sec->next)
+    if (bfd_section_flags (sec) & SEC_CODE)
+      {
+	CORE_ADDR sec_start = bfd_section_vma (sec);
+	CORE_ADDR sec_end = sec_start + bfd_section_size (sec);
+
+	if (found_any)
+	  {
+	    if (sec_start < start)
+	      start = sec_start;
+	    if (sec_end > end)
+	      end = sec_end;
+	  }
+	else
+	  {
+	    start = sec_start;
+	    end = sec_end;
+	  }
+
+	found_any = 1;
+      }
+
+  if (!found_any)
+    error (_("Can't find any code sections in symbol file"));
+
+  DBX_TEXT_ADDR (objfile) = start;
+  DBX_TEXT_SIZE (objfile) = end - start;
+}
+
+/* Scan and build partial symbols for an ELF symbol file.
+   This ELF file has already been processed to get its minimal symbols.
+
+   This routine is the equivalent of dbx_symfile_init and dbx_symfile_read
+   rolled into one.
+
+   OBJFILE is the object file we are reading symbols from.
+   ADDR is the address relative to which the symbols are (e.g.
+   the base address of the text segment).
+   STABSECT is the BFD section information for the .stab section.
+   STABSTROFFSET and STABSTRSIZE define the location in OBJFILE where the
+   .stabstr section exists.
+
+   This routine is mostly copied from dbx_symfile_init and dbx_symfile_read,
+   adjusted for elf details.  */
+
+void
+elfstab_build_psymtabs (struct objfile *objfile, asection *stabsect,
+			file_ptr stabstroffset, unsigned int stabstrsize)
+{
+  int val;
+  bfd *sym_bfd = objfile->obfd.get ();
+  const char *name = bfd_get_filename (sym_bfd);
+
+  stabsread_new_init ();
+
+  /* Allocate struct to keep track of stab reading.  */
+  dbx_objfile_data_key.emplace (objfile);
+  dbx_symfile_info *key = dbx_objfile_data_key.get (objfile);
+
+  /* Find the first and last text address.  dbx_symfile_read seems to
+     want this.  */
+  find_text_range (sym_bfd, objfile);
+
+#define	ELF_STABS_SYMBOL_SIZE	12	/* XXX FIXME XXX */
+  DBX_SYMBOL_SIZE (objfile) = ELF_STABS_SYMBOL_SIZE;
+  DBX_SYMCOUNT (objfile)
+    = bfd_section_size (stabsect) / DBX_SYMBOL_SIZE (objfile);
+  DBX_STRINGTAB_SIZE (objfile) = stabstrsize;
+  DBX_SYMTAB_OFFSET (objfile) = stabsect->filepos;
+  DBX_STAB_SECTION (objfile) = stabsect;
+
+  if (stabstrsize > bfd_get_size (sym_bfd))
+    error (_("ridiculous string table size: %d bytes"), stabstrsize);
+  DBX_STRINGTAB (objfile) = (char *)
+    obstack_alloc (&objfile->objfile_obstack, stabstrsize + 1);
+  OBJSTAT (objfile, sz_strtab += stabstrsize + 1);
+
+  /* Now read in the string table in one big gulp.  */
+
+  val = bfd_seek (sym_bfd, stabstroffset, SEEK_SET);
+  if (val < 0)
+    perror_with_name (name);
+  val = bfd_read (DBX_STRINGTAB (objfile), stabstrsize, sym_bfd);
+  if (val != stabstrsize)
+    perror_with_name (name);
+
+  stabsread_new_init ();
+  free_header_files ();
+  init_header_files ();
+
+  key->ctx.processing_acc_compilation = 1;
+
+  key->ctx.symbuf_read = 0;
+  key->ctx.symbuf_left = bfd_section_size (stabsect);
+
+  scoped_restore restore_stabs_data = make_scoped_restore (&key->ctx.stabs_data);
+  gdb::unique_xmalloc_ptr<gdb_byte> data_holder;
+
+  key->ctx.stabs_data = symfile_relocate_debug_section (objfile, stabsect, NULL);
+  if (key->ctx.stabs_data)
+    data_holder.reset (key->ctx.stabs_data);
+
+  /* In an elf file, we've already installed the minimal symbols that came
+     from the elf (non-stab) symbol table, so always act like an
+     incremental load here.  dbx_symfile_read should not generate any new
+     minimal symbols, since we will have already read the ELF dynamic symbol
+     table and normal symbol entries won't be in the ".stab" section; but in
+     case it does, it will install them itself.  */
+  read_stabs_symtab (objfile, 0);
+}
+
 /* Scan and build partial symbols for a symbol file.
    We have been initialized by a call to elf_symfile_init, which
    currently does nothing.
diff --git a/gdb/eval.c b/gdb/eval.c
index f6b8136..457a436 100644
--- a/gdb/eval.c
+++ b/gdb/eval.c
@@ -1872,18 +1872,21 @@ eval_op_postdec (struct type *expect_type, struct expression *exp,
     }
 }
 
-/* A helper function for OP_TYPE.  */
+namespace expr
+{
 
 struct value *
-eval_op_type (struct type *expect_type, struct expression *exp,
-	      enum noside noside, struct type *type)
+type_operation::evaluate (struct type *expect_type, struct expression *exp,
+			  enum noside noside)
 {
   if (noside == EVAL_AVOID_SIDE_EFFECTS)
-    return value::allocate (type);
+    return value::allocate (std::get<0> (m_storage));
   else
     error (_("Attempt to use a type name as an expression"));
 }
 
+}
+
 /* A helper function for BINOP_ASSIGN_MODIFY.  */
 
 struct value *
@@ -1954,7 +1957,8 @@ eval_op_objc_msgcall (struct type *expect_type, struct expression *exp,
   if (value_as_long (target) == 0)
     return value_from_longest (long_type, 0);
 
-  if (lookup_minimal_symbol ("objc_msg_lookup", 0, 0).minsym)
+  if (lookup_minimal_symbol (current_program_space, "objc_msg_lookup").minsym
+      != nullptr)
     gnu_runtime = 1;
 
   /* Find the method dispatch (Apple runtime) or method lookup
@@ -2101,7 +2105,7 @@ eval_op_objc_msgcall (struct type *expect_type, struct expression *exp,
 
   /* Found a function symbol.  Now we will substitute its
      value in place of the message dispatcher (obj_msgSend),
-     so that we call the method directly instead of thru
+     so that we call the method directly instead of through
      the dispatcher.  The main reason for doing this is that
      we can now evaluate the return value and parameter values
      according to their known data types, in case we need to
diff --git a/gdb/event-top.h b/gdb/event-top.h
index 846d1e4..d590552 100644
--- a/gdb/event-top.h
+++ b/gdb/event-top.h
@@ -24,6 +24,8 @@
 
 #include <signal.h>
 
+#include "extension.h"
+
 struct cmd_list_element;
 
 /* The current quit handler (and its type).  This is called from the
@@ -81,6 +83,29 @@ extern void quit_serial_event_set ();
 
 extern void quit_serial_event_clear ();
 
+/* Wrap f (args) and handle exceptions by:
+   - returning val, and
+   - calling set_quit_flag or set_force_quit_flag, if needed.  */
+
+template <typename R, R val, typename F, typename... Args>
+static R
+catch_exceptions (F &&f, Args&&... args)
+{
+   try
+     {
+       return f (std::forward<Args> (args)...);
+     }
+   catch (const gdb_exception &ex)
+     {
+       if (ex.reason == RETURN_QUIT)
+	 set_quit_flag ();
+       else if (ex.reason == RETURN_FORCED_QUIT)
+	 set_force_quit_flag ();
+     }
+
+   return val;
+}
+
 extern void display_gdb_prompt (const char *new_prompt);
 extern void gdb_setup_readline (int);
 extern void gdb_disable_readline (void);
diff --git a/gdb/exec.c b/gdb/exec.c
index 63eee42..82d9266 100644
--- a/gdb/exec.c
+++ b/gdb/exec.c
@@ -143,7 +143,10 @@ static void
 exec_target_open (const char *args, int from_tty)
 {
   target_preopen (from_tty);
-  exec_file_attach (args, from_tty);
+
+  std::string filename = extract_single_filename_arg (args);
+  exec_file_attach (filename.empty () ? nullptr : filename.c_str (),
+		    from_tty);
 }
 
 /* This is the target_close implementation.  Clears all target
@@ -294,7 +297,7 @@ validate_exec_file (int from_tty)
 	      symbol_file_add_main (exec_file_target.c_str (), add_flags);
 	      exec_file_attach (exec_file_target.c_str (), from_tty);
 	    }
-	  catch (gdb_exception_error &err)
+	  catch (const gdb_exception_error &err)
 	    {
 	      warning (_("loading %ps %s"),
 		       styled_string (file_name_style.style (),
@@ -1074,14 +1077,14 @@ and it is the program executed when you use the `run' command.\n\
 If FILE cannot be found as specified, your execution directory path\n\
 ($PATH) is searched for a command of that name.\n\
 No arg means to have no executable file and no symbols."), &cmdlist);
-  set_cmd_completer (c, filename_completer);
+  set_cmd_completer (c, filename_maybe_quoted_completer);
 
   c = add_cmd ("exec-file", class_files, exec_file_command, _("\
 Use FILE as program for getting contents of pure memory.\n\
 If FILE cannot be found as specified, your execution directory path\n\
 is searched for a command of that name.\n\
 No arg means have no executable file."), &cmdlist);
-  set_cmd_completer (c, filename_completer);
+  set_cmd_completer (c, filename_maybe_quoted_completer);
 
   add_com ("section", class_files, set_section_command, _("\
 Change the base address of section SECTION of the exec file to ADDR.\n\
@@ -1119,5 +1122,6 @@ will be loaded as well."),
 			show_exec_file_mismatch_command,
 			&setlist, &showlist);
 
-  add_target (exec_target_info, exec_target_open, filename_completer);
+  add_target (exec_target_info, exec_target_open,
+	      filename_maybe_quoted_completer);
 }
diff --git a/gdb/exec.h b/gdb/exec.h
index 0c1f604..c08cb9f 100644
--- a/gdb/exec.h
+++ b/gdb/exec.h
@@ -62,7 +62,7 @@ extern enum target_xfer_status
    noted above.  See memory_xfer_partial_1() in target.c for an
    example.
 
-   Return the number of bytes actually transfered, or zero when no
+   Return the number of bytes actually transferred, or zero when no
    data is available for the requested range.
 
    This function is intended to be used from target_xfer_partial
diff --git a/gdb/expop.h b/gdb/expop.h
index 2d46a9d..af031f5 100644
--- a/gdb/expop.h
+++ b/gdb/expop.h
@@ -172,9 +172,6 @@ extern struct value *eval_op_ind (struct type *expect_type,
 				  struct expression *exp,
 				  enum noside noside,
 				  struct value *arg1);
-extern struct value *eval_op_type (struct type *expect_type,
-				   struct expression *exp,
-				   enum noside noside, struct type *type);
 extern struct value *eval_op_alignof (struct type *expect_type,
 				      struct expression *exp,
 				      enum noside noside,
@@ -1560,16 +1557,16 @@ public:
 
   value *evaluate (struct type *expect_type,
 		   struct expression *exp,
-		   enum noside noside) override
-  {
-    return eval_op_type (expect_type, exp, noside, std::get<0> (m_storage));
-  }
+		   enum noside noside) override;
 
   enum exp_opcode opcode () const override
   { return OP_TYPE; }
 
   bool constant_p () const override
   { return true; }
+
+  bool type_p () const override
+  { return true; }
 };
 
 /* Implement the "typeof" operation.  */
@@ -1593,6 +1590,9 @@ public:
 
   enum exp_opcode opcode () const override
   { return OP_TYPEOF; }
+
+  bool type_p () const override
+  { return true; }
 };
 
 /* Implement 'decltype'.  */
@@ -1638,6 +1638,9 @@ public:
 
   enum exp_opcode opcode () const override
   { return OP_DECLTYPE; }
+
+  bool type_p () const override
+  { return true; }
 };
 
 /* Implement 'typeid'.  */
@@ -1652,9 +1655,8 @@ public:
 		   struct expression *exp,
 		   enum noside noside) override
   {
-    enum exp_opcode sub_op = std::get<0> (m_storage)->opcode ();
     enum noside sub_noside
-      = ((sub_op == OP_TYPE || sub_op == OP_DECLTYPE || sub_op == OP_TYPEOF)
+      = (std::get<0> (m_storage)->type_p ()
 	 ? EVAL_AVOID_SIDE_EFFECTS
 	 : noside);
 
diff --git a/gdb/expression.h b/gdb/expression.h
index 5bfc74c..2eb866f 100644
--- a/gdb/expression.h
+++ b/gdb/expression.h
@@ -147,6 +147,11 @@ public:
   virtual bool uses_objfile (struct objfile *objfile) const
   { return false; }
 
+  /* Some expression nodes represent a type, not a value.  This method
+     should be overridden to return 'true' in these situations.  */
+  virtual bool type_p () const
+  { return false; }
+
   /* Generate agent expression bytecodes for this operation.  */
   void generate_ax (struct expression *exp, struct agent_expr *ax,
 		    struct axs_value *value,
@@ -215,6 +220,11 @@ struct expression
     op->dump (stream, 0);
   }
 
+  /* Call the type_p method on the outermost sub-expression of this
+     expression, and return the result.  */
+  bool type_p () const
+  { return op->type_p (); }
+
   /* Return true if this expression uses OBJFILE (and will become
      dangling when OBJFILE is unloaded), otherwise return false.
      OBJFILE must not be a separate debug info file.  */
diff --git a/gdb/extension-priv.h b/gdb/extension-priv.h
index 1365988..653fd51 100644
--- a/gdb/extension-priv.h
+++ b/gdb/extension-priv.h
@@ -188,6 +188,11 @@ struct extension_language_ops
      enum ext_lang_frame_args args_type,
      struct ui_out *out, int frame_low, int frame_high);
 
+  /* Used for registering the ptwrite filter to the current thread.  */
+  void (*apply_ptwrite_filter)
+    (const struct extension_language_defn *extlang,
+     struct btrace_thread_info *btinfo);
+
   /* Update values held by the extension language when OBJFILE is discarded.
      New global types must be created for every such value, which must then be
      updated to use the new types.
diff --git a/gdb/extension.c b/gdb/extension.c
index 99e7190..897bf25 100644
--- a/gdb/extension.c
+++ b/gdb/extension.c
@@ -562,6 +562,19 @@ apply_ext_lang_frame_filter (const frame_info_ptr &frame,
   return EXT_LANG_BT_NO_FILTERS;
 }
 
+/* Used for registering the ptwrite filter to the current thread.  */
+
+void
+apply_ext_lang_ptwrite_filter (btrace_thread_info *btinfo)
+{
+  for (const struct extension_language_defn *extlang : extension_languages)
+    {
+      if (extlang->ops != nullptr
+	  && extlang->ops->apply_ptwrite_filter != nullptr)
+	extlang->ops->apply_ptwrite_filter (extlang, btinfo);
+    }
+}
+
 /* Update values held by the extension language when OBJFILE is discarded.
    New global types must be created for every such value, which must then be
    updated to use the new types.
@@ -667,7 +680,7 @@ static bool quit_flag;
 
 /* The current extension language we've called out to, or
    extension_language_gdb if there isn't one.
-   This must be set everytime we call out to an extension language, and reset
+   This must be set every time we call out to an extension language, and reset
    to the previous value when it returns.  Note that the previous value may
    be a different (or the same) extension language.  */
 static const struct extension_language_defn *active_ext_lang
diff --git a/gdb/extension.h b/gdb/extension.h
index 258a77d..5b0830b 100644
--- a/gdb/extension.h
+++ b/gdb/extension.h
@@ -303,6 +303,9 @@ extern enum ext_lang_bt_status apply_ext_lang_frame_filter
    enum ext_lang_frame_args args_type,
    struct ui_out *out, int frame_low, int frame_high);
 
+extern void apply_ext_lang_ptwrite_filter
+  (struct btrace_thread_info *btinfo);
+
 extern void preserve_ext_lang_values (struct objfile *, htab_t copied_types);
 
 extern const struct extension_language_defn *get_breakpoint_cond_ext_lang
diff --git a/gdb/fbsd-tdep.c b/gdb/fbsd-tdep.c
index 08a01c1..e97ff52d 100644
--- a/gdb/fbsd-tdep.c
+++ b/gdb/fbsd-tdep.c
@@ -26,7 +26,6 @@
 #include "regcache.h"
 #include "regset.h"
 #include "gdbthread.h"
-#include "objfiles.h"
 #include "xml-syscall.h"
 #include <sys/socket.h>
 #include <arpa/inet.h>
@@ -1943,7 +1942,8 @@ fbsd_get_syscall_number (struct gdbarch *gdbarch, thread_info *thread)
 static LONGEST
 fbsd_read_integer_by_name (struct gdbarch *gdbarch, const char *name)
 {
-  bound_minimal_symbol ms = lookup_minimal_symbol (name, NULL, NULL);
+  bound_minimal_symbol ms
+    = lookup_minimal_symbol (current_program_space, name);
   if (ms.minsym == NULL)
     error (_("Unable to resolve symbol '%s'"), name);
 
@@ -2059,7 +2059,8 @@ fbsd_get_thread_local_address (struct gdbarch *gdbarch, CORE_ADDR dtv_addr,
 CORE_ADDR
 fbsd_skip_solib_resolver (struct gdbarch *gdbarch, CORE_ADDR pc)
 {
-  struct bound_minimal_symbol msym = lookup_bound_minimal_symbol ("_rtld_bind");
+  bound_minimal_symbol msym
+    = lookup_minimal_symbol (current_program_space, "_rtld_bind");
   if (msym.minsym != nullptr && msym.value_address () == pc)
     return frame_unwind_caller_pc (get_current_frame ());
 
diff --git a/gdb/features/Makefile b/gdb/features/Makefile
index ddf4ec2..01b327c 100644
--- a/gdb/features/Makefile
+++ b/gdb/features/Makefile
@@ -222,12 +222,10 @@ FEATURE_XMLFILES = aarch64-core.xml \
 	i386/32bit-sse.xml \
 	i386/32bit-linux.xml \
 	i386/32bit-avx.xml \
-	i386/32bit-mpx.xml \
 	i386/32bit-avx512.xml \
 	i386/32bit-segments.xml \
 	i386/64bit-avx512.xml \
 	i386/64bit-core.xml \
-	i386/64bit-mpx.xml \
 	i386/64bit-segments.xml \
 	i386/64bit-avx.xml \
 	i386/64bit-linux.xml \
diff --git a/gdb/features/btrace-conf.dtd b/gdb/features/btrace-conf.dtd
index 57300ea..c6f3f60 100644
--- a/gdb/features/btrace-conf.dtd
+++ b/gdb/features/btrace-conf.dtd
@@ -12,3 +12,5 @@
 
 <!ELEMENT pt	EMPTY>
 <!ATTLIST pt	size	CDATA	#IMPLIED>
+<!ATTLIST pt	ptwrite	(yes | no) #IMPLIED>
+<!ATTLIST pt	event-tracing	(yes | no)	#IMPLIED>
diff --git a/gdb/features/i386/32bit-mpx.c b/gdb/features/i386/32bit-mpx.c
deleted file mode 100644
index 40b34ed..0000000
--- a/gdb/features/i386/32bit-mpx.c
+++ /dev/null
@@ -1,51 +0,0 @@
-/* THIS FILE IS GENERATED.  -*- buffer-read-only: t -*- vi:set ro:
-  Original: 32bit-mpx.xml */
-
-#include "gdbsupport/tdesc.h"
-
-static int
-create_feature_i386_32bit_mpx (struct target_desc *result, long regnum)
-{
-  struct tdesc_feature *feature;
-
-  feature = tdesc_create_feature (result, "org.gnu.gdb.i386.mpx");
-  tdesc_type_with_fields *type_with_fields;
-  type_with_fields = tdesc_create_struct (feature, "br128");
-  tdesc_type *field_type;
-  field_type = tdesc_named_type (feature, "uint64");
-  tdesc_add_field (type_with_fields, "lbound", field_type);
-  field_type = tdesc_named_type (feature, "uint64");
-  tdesc_add_field (type_with_fields, "ubound_raw", field_type);
-
-  type_with_fields = tdesc_create_struct (feature, "_bndstatus");
-  tdesc_set_struct_size (type_with_fields, 8);
-  tdesc_add_bitfield (type_with_fields, "bde", 2, 31);
-  tdesc_add_bitfield (type_with_fields, "error", 0, 1);
-
-  type_with_fields = tdesc_create_union (feature, "status");
-  field_type = tdesc_named_type (feature, "data_ptr");
-  tdesc_add_field (type_with_fields, "raw", field_type);
-  field_type = tdesc_named_type (feature, "_bndstatus");
-  tdesc_add_field (type_with_fields, "status", field_type);
-
-  type_with_fields = tdesc_create_struct (feature, "_bndcfgu");
-  tdesc_set_struct_size (type_with_fields, 8);
-  tdesc_add_bitfield (type_with_fields, "base", 12, 31);
-  tdesc_add_bitfield (type_with_fields, "reserved", 2, 11);
-  tdesc_add_bitfield (type_with_fields, "preserved", 1, 1);
-  tdesc_add_bitfield (type_with_fields, "enabled", 0, 0);
-
-  type_with_fields = tdesc_create_union (feature, "cfgu");
-  field_type = tdesc_named_type (feature, "data_ptr");
-  tdesc_add_field (type_with_fields, "raw", field_type);
-  field_type = tdesc_named_type (feature, "_bndcfgu");
-  tdesc_add_field (type_with_fields, "config", field_type);
-
-  tdesc_create_reg (feature, "bnd0raw", regnum++, 1, NULL, 128, "br128");
-  tdesc_create_reg (feature, "bnd1raw", regnum++, 1, NULL, 128, "br128");
-  tdesc_create_reg (feature, "bnd2raw", regnum++, 1, NULL, 128, "br128");
-  tdesc_create_reg (feature, "bnd3raw", regnum++, 1, NULL, 128, "br128");
-  tdesc_create_reg (feature, "bndcfgu", regnum++, 1, NULL, 64, "cfgu");
-  tdesc_create_reg (feature, "bndstatus", regnum++, 1, NULL, 64, "status");
-  return regnum;
-}
diff --git a/gdb/features/i386/32bit-mpx.xml b/gdb/features/i386/32bit-mpx.xml
deleted file mode 100644
index 81eb2ee..0000000
--- a/gdb/features/i386/32bit-mpx.xml
+++ /dev/null
@@ -1,45 +0,0 @@
-<?xml version="1.0"?>
-<!-- Copyright (C) 2013-2024 Free Software Foundation, Inc.
-
-     Copying and distribution of this file, with or without modification,
-     are permitted in any medium without royalty provided the copyright
-     notice and this notice are preserved.  -->
-
-<!DOCTYPE feature SYSTEM "gdb-target.dtd">
-<feature name="org.gnu.gdb.i386.mpx">
-  <struct id="br128">
-    <field name="lbound" type="uint64"/>
-    <field name="ubound_raw" type="uint64"/>
-  </struct>
-
-  <struct id="_bndstatus" size="8">
-    <field name="bde" start="2" end="31"/>
-    <field name="error" start="0" end="1"/>
-  </struct>
-
-  <union id="status">
-    <field name="raw" type="data_ptr"/>
-    <field name="status" type="_bndstatus"/>
-  </union>
-
-  <struct id="_bndcfgu" size="8">
-    <field name="base" start="12" end="31" />
-    <field name="reserved" start="2" end="11"/>
-    <!-- Explicitly set the type here, otherwise it defaults to bool.
-         Perhaps this should be uint32, but the container type has size 8.  -->
-    <field name="preserved" start="1" end="1" type="uint64"/>
-    <field name="enabled" start="0" end="0" type="uint64"/>
-  </struct>
-
-   <union id="cfgu">
-    <field name="raw" type="data_ptr"/>
-    <field name="config" type="_bndcfgu"/>
-  </union>
-
-  <reg name="bnd0raw" bitsize="128" type="br128"/>
-  <reg name="bnd1raw" bitsize="128" type="br128"/>
-  <reg name="bnd2raw" bitsize="128" type="br128"/>
-  <reg name="bnd3raw" bitsize="128" type="br128"/>
-  <reg name="bndcfgu"    bitsize="64" type="cfgu"/>
-  <reg name="bndstatus"  bitsize="64" type="status"/>
-</feature>
diff --git a/gdb/features/i386/64bit-mpx.c b/gdb/features/i386/64bit-mpx.c
deleted file mode 100644
index 3eabc9d..0000000
--- a/gdb/features/i386/64bit-mpx.c
+++ /dev/null
@@ -1,51 +0,0 @@
-/* THIS FILE IS GENERATED.  -*- buffer-read-only: t -*- vi:set ro:
-  Original: 64bit-mpx.xml */
-
-#include "gdbsupport/tdesc.h"
-
-static int
-create_feature_i386_64bit_mpx (struct target_desc *result, long regnum)
-{
-  struct tdesc_feature *feature;
-
-  feature = tdesc_create_feature (result, "org.gnu.gdb.i386.mpx");
-  tdesc_type_with_fields *type_with_fields;
-  type_with_fields = tdesc_create_struct (feature, "br128");
-  tdesc_type *field_type;
-  field_type = tdesc_named_type (feature, "uint64");
-  tdesc_add_field (type_with_fields, "lbound", field_type);
-  field_type = tdesc_named_type (feature, "uint64");
-  tdesc_add_field (type_with_fields, "ubound_raw", field_type);
-
-  type_with_fields = tdesc_create_struct (feature, "_bndstatus");
-  tdesc_set_struct_size (type_with_fields, 8);
-  tdesc_add_bitfield (type_with_fields, "bde", 2, 63);
-  tdesc_add_bitfield (type_with_fields, "error", 0, 1);
-
-  type_with_fields = tdesc_create_union (feature, "status");
-  field_type = tdesc_named_type (feature, "data_ptr");
-  tdesc_add_field (type_with_fields, "raw", field_type);
-  field_type = tdesc_named_type (feature, "_bndstatus");
-  tdesc_add_field (type_with_fields, "status", field_type);
-
-  type_with_fields = tdesc_create_struct (feature, "_bndcfgu");
-  tdesc_set_struct_size (type_with_fields, 8);
-  tdesc_add_bitfield (type_with_fields, "base", 12, 63);
-  tdesc_add_bitfield (type_with_fields, "reserved", 2, 11);
-  tdesc_add_bitfield (type_with_fields, "preserved", 1, 1);
-  tdesc_add_bitfield (type_with_fields, "enabled", 0, 0);
-
-  type_with_fields = tdesc_create_union (feature, "cfgu");
-  field_type = tdesc_named_type (feature, "data_ptr");
-  tdesc_add_field (type_with_fields, "raw", field_type);
-  field_type = tdesc_named_type (feature, "_bndcfgu");
-  tdesc_add_field (type_with_fields, "config", field_type);
-
-  tdesc_create_reg (feature, "bnd0raw", regnum++, 1, NULL, 128, "br128");
-  tdesc_create_reg (feature, "bnd1raw", regnum++, 1, NULL, 128, "br128");
-  tdesc_create_reg (feature, "bnd2raw", regnum++, 1, NULL, 128, "br128");
-  tdesc_create_reg (feature, "bnd3raw", regnum++, 1, NULL, 128, "br128");
-  tdesc_create_reg (feature, "bndcfgu", regnum++, 1, NULL, 64, "cfgu");
-  tdesc_create_reg (feature, "bndstatus", regnum++, 1, NULL, 64, "status");
-  return regnum;
-}
diff --git a/gdb/features/i386/64bit-mpx.xml b/gdb/features/i386/64bit-mpx.xml
deleted file mode 100644
index 812c78c..0000000
--- a/gdb/features/i386/64bit-mpx.xml
+++ /dev/null
@@ -1,44 +0,0 @@
-<?xml version="1.0"?>
-<!-- Copyright (C) 2013-2024 Free Software Foundation, Inc.
-
-     Copying and distribution of this file, with or without modification,
-     are permitted in any medium without royalty provided the copyright
-     notice and this notice are preserved.  -->
-
-<!DOCTYPE feature SYSTEM "gdb-target.dtd">
-<feature name="org.gnu.gdb.i386.mpx">
-  <struct id="br128">
-    <field name="lbound" type="uint64"/>
-    <field name="ubound_raw" type="uint64"/>
-  </struct>
-
-  <struct id="_bndstatus" size="8">
-    <field name="bde" start="2" end="63"/>
-    <field name="error" start="0" end="1"/>
-  </struct>
-
-  <union id="status">
-    <field name="raw" type="data_ptr"/>
-    <field name="status" type="_bndstatus"/>
-  </union>
-
-  <struct id="_bndcfgu" size="8">
-    <field name="base" start="12" end="63"/>
-    <field name="reserved" start="2" end="11"/>
-    <!-- Explicitly set the type here, otherwise it defaults to bool.  -->
-    <field name="preserved" start="1" end="1" type="uint64"/>
-    <field name="enabled" start="0" end="0" type="uint64"/>
-  </struct>
-
-   <union id="cfgu">
-    <field name="raw" type="data_ptr"/>
-    <field name="config" type="_bndcfgu"/>
-  </union>
-
-  <reg name="bnd0raw" bitsize="128" type="br128"/>
-  <reg name="bnd1raw" bitsize="128" type="br128"/>
-  <reg name="bnd2raw" bitsize="128" type="br128"/>
-  <reg name="bnd3raw" bitsize="128" type="br128"/>
-  <reg name="bndcfgu"    bitsize="64" type="cfgu"/>
-  <reg name="bndstatus"  bitsize="64" type="status"/>
-</feature>
diff --git a/gdb/features/mips-dsp-linux.c b/gdb/features/mips-dsp-linux.c
index d8e4028..4873037 100644
--- a/gdb/features/mips-dsp-linux.c
+++ b/gdb/features/mips-dsp-linux.c
@@ -11,7 +11,7 @@ initialize_tdesc_mips_dsp_linux (void)
   target_desc_up result = allocate_target_description ();
   set_tdesc_architecture (result.get (), bfd_scan_arch ("mips"));
 
-  set_tdesc_osabi (result.get (), osabi_from_tdesc_string ("GNU/Linux"));
+  set_tdesc_osabi (result.get (), GDB_OSABI_LINUX);
 
   struct tdesc_feature *feature;
 
diff --git a/gdb/features/mips-linux.c b/gdb/features/mips-linux.c
index f93eef5..5ff2e5f 100644
--- a/gdb/features/mips-linux.c
+++ b/gdb/features/mips-linux.c
@@ -11,7 +11,7 @@ initialize_tdesc_mips_linux (void)
   target_desc_up result = allocate_target_description ();
   set_tdesc_architecture (result.get (), bfd_scan_arch ("mips"));
 
-  set_tdesc_osabi (result.get (), osabi_from_tdesc_string ("GNU/Linux"));
+  set_tdesc_osabi (result.get (), GDB_OSABI_LINUX);
 
   struct tdesc_feature *feature;
 
diff --git a/gdb/features/or1k-linux.c b/gdb/features/or1k-linux.c
index 2473145..85a681f 100644
--- a/gdb/features/or1k-linux.c
+++ b/gdb/features/or1k-linux.c
@@ -11,7 +11,7 @@ initialize_tdesc_or1k_linux (void)
   target_desc_up result = allocate_target_description ();
   set_tdesc_architecture (result.get (), bfd_scan_arch ("or1k"));
 
-  set_tdesc_osabi (result.get (), osabi_from_tdesc_string ("GNU/Linux"));
+  set_tdesc_osabi (result.get (), GDB_OSABI_LINUX);
 
   struct tdesc_feature *feature;
 
diff --git a/gdb/features/sparc/sparc32-solaris.c b/gdb/features/sparc/sparc32-solaris.c
index dce9685..70affdb 100644
--- a/gdb/features/sparc/sparc32-solaris.c
+++ b/gdb/features/sparc/sparc32-solaris.c
@@ -11,7 +11,7 @@ initialize_tdesc_sparc32_solaris (void)
   target_desc_up result = allocate_target_description ();
   set_tdesc_architecture (result.get (), bfd_scan_arch ("sparc"));
 
-  set_tdesc_osabi (result.get (), osabi_from_tdesc_string ("Solaris"));
+  set_tdesc_osabi (result.get (), GDB_OSABI_SOLARIS);
 
   struct tdesc_feature *feature;
 
diff --git a/gdb/features/sparc/sparc64-solaris.c b/gdb/features/sparc/sparc64-solaris.c
index d030df6..98edabe 100644
--- a/gdb/features/sparc/sparc64-solaris.c
+++ b/gdb/features/sparc/sparc64-solaris.c
@@ -11,7 +11,7 @@ initialize_tdesc_sparc64_solaris (void)
   target_desc_up result = allocate_target_description ();
   set_tdesc_architecture (result.get (), bfd_scan_arch ("sparc:v9"));
 
-  set_tdesc_osabi (result.get (), osabi_from_tdesc_string ("Solaris"));
+  set_tdesc_osabi (result.get (), GDB_OSABI_SOLARIS);
 
   struct tdesc_feature *feature;
 
diff --git a/gdb/findvar.c b/gdb/findvar.c
index df4ab1a..f7760aa 100644
--- a/gdb/findvar.c
+++ b/gdb/findvar.c
@@ -449,8 +449,8 @@ language_defn::read_var_value (struct symbol *var,
 	  (var->arch (),
 	   [var, &bmsym] (objfile *objfile)
 	     {
-		bmsym = lookup_minimal_symbol (var->linkage_name (), nullptr,
-					       objfile);
+		bmsym = lookup_minimal_symbol (current_program_space,
+					       var->linkage_name (), objfile);
 
 		/* Stop if a match is found.  */
 		return bmsym.minsym != nullptr;
diff --git a/gdb/frame.c b/gdb/frame.c
index e6ab547..a6900b2 100644
--- a/gdb/frame.c
+++ b/gdb/frame.c
@@ -2584,7 +2584,7 @@ inside_main_func (const frame_info_ptr &this_frame)
   CORE_ADDR sym_addr = 0;
   const char *name = main_name ();
   bound_minimal_symbol msymbol
-    = lookup_minimal_symbol (name, NULL,
+    = lookup_minimal_symbol (current_program_space, name,
 			     current_program_space->symfile_object_file);
 
   if (msymbol.minsym != nullptr)
@@ -2859,7 +2859,7 @@ find_frame_sal (const frame_info_ptr &frame)
 
   if (frame_inlined_callees (frame) > 0)
     {
-      struct symbol *sym;
+      const symbol *sym;
 
       /* If the current frame has some inlined callees, and we have a next
 	 frame, then that frame must be an inlined frame.  In this case
diff --git a/gdb/frv-tdep.c b/gdb/frv-tdep.c
index 1b5e15f..6ae3f0d 100644
--- a/gdb/frv-tdep.c
+++ b/gdb/frv-tdep.c
@@ -1062,14 +1062,13 @@ frv_skip_main_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
     {
       LONGEST displ;
       CORE_ADDR call_dest;
-      struct bound_minimal_symbol s;
 
       displ = ((op & 0xfe000000) >> 7) | (op & 0x0003ffff);
       if ((displ & 0x00800000) != 0)
 	displ |= ~((LONGEST) 0x00ffffff);
 
       call_dest = pc + 4 * displ;
-      s = lookup_minimal_symbol_by_pc (call_dest);
+      bound_minimal_symbol s = lookup_minimal_symbol_by_pc (call_dest);
 
       if (s.minsym != NULL
 	  && s.minsym->linkage_name () != NULL
@@ -1374,14 +1373,14 @@ frv_frame_this_id (const frame_info_ptr &this_frame,
     = frv_frame_unwind_cache (this_frame, this_prologue_cache);
   CORE_ADDR base;
   CORE_ADDR func;
-  struct bound_minimal_symbol msym_stack;
   struct frame_id id;
 
   /* The FUNC is easy.  */
   func = get_frame_func (this_frame);
 
   /* Check if the stack is empty.  */
-  msym_stack = lookup_minimal_symbol ("_stack", NULL, NULL);
+  bound_minimal_symbol msym_stack
+    = lookup_minimal_symbol (current_program_space, "_stack");
   if (msym_stack.minsym && info->base == msym_stack.value_address ())
     return;
 
diff --git a/gdb/ft32-tdep.c b/gdb/ft32-tdep.c
index 647c584..15a585a 100644
--- a/gdb/ft32-tdep.c
+++ b/gdb/ft32-tdep.c
@@ -174,8 +174,8 @@ ft32_analyze_prologue (CORE_ADDR start_addr, CORE_ADDR end_addr,
   ULONGEST inst;
   int isize = 0;
   int regnum, pushreg;
-  struct bound_minimal_symbol msymbol;
   const int first_saved_reg = 13;	/* The first saved register.  */
+
   /* PROLOGS are addresses of the subroutine prologs, PROLOGS[n]
      is the address of __prolog_$rN.
      __prolog_$rN pushes registers from 13 through n inclusive.
@@ -195,7 +195,8 @@ ft32_analyze_prologue (CORE_ADDR start_addr, CORE_ADDR end_addr,
 
       snprintf (prolog_symbol, sizeof (prolog_symbol), "__prolog_$r%02d",
 		regnum);
-      msymbol = lookup_minimal_symbol (prolog_symbol, NULL, NULL);
+      bound_minimal_symbol msymbol
+	= lookup_minimal_symbol (current_program_space, prolog_symbol);
       if (msymbol.minsym)
 	prologs[regnum] = msymbol.value_address ();
       else
diff --git a/gdb/gcore.c b/gdb/gcore.c
index 2ab00a0..969a854 100644
--- a/gdb/gcore.c
+++ b/gdb/gcore.c
@@ -269,13 +269,14 @@ call_target_sbrk (int sbrk_arg)
   struct value *sbrk_fn, *ret;
   bfd_vma tmp;
 
-  if (lookup_minimal_symbol ("sbrk", NULL, NULL).minsym != NULL)
+  if (lookup_minimal_symbol (current_program_space, "sbrk").minsym != nullptr)
     {
       sbrk_fn = find_function_in_inferior ("sbrk", &sbrk_objf);
       if (sbrk_fn == NULL)
 	return (bfd_vma) 0;
     }
-  else if (lookup_minimal_symbol ("_sbrk", NULL, NULL).minsym != NULL)
+  else if (lookup_minimal_symbol (current_program_space, "_sbrk").minsym
+	   != nullptr)
     {
       sbrk_fn = find_function_in_inferior ("_sbrk", &sbrk_objf);
       if (sbrk_fn == NULL)
diff --git a/gdb/gdb-stabs.h b/gdb/gdb-stabs.h
index 3786ad6..20fb8fa 100644
--- a/gdb/gdb-stabs.h
+++ b/gdb/gdb-stabs.h
@@ -20,12 +20,108 @@
 #ifndef GDB_STABS_H
 #define GDB_STABS_H
 
+/* During initial symbol readin, we need to have a structure to keep
+   track of which psymtabs have which bincls in them.  This structure
+   is used during readin to setup the list of dependencies within each
+   partial symbol table.  */
+struct legacy_psymtab;
+
+struct header_file_location
+{
+  header_file_location (const char *name_, int instance_,
+			legacy_psymtab *pst_)
+    : name (name_),
+      instance (instance_),
+      pst (pst_)
+  {
+  }
+
+  const char *name;		/* Name of header file */
+  int instance;			/* See above */
+  legacy_psymtab *pst;	/* Partial symtab that has the
+				   BINCL/EINCL defs for this file.  */
+};
+
 /* This file exists to hold the common definitions required of most of
    the symbol-readers that end up using stabs.  The common use of
    these `symbol-type-specific' customizations of the generic data
    structures makes the stabs-oriented symbol readers able to call
    each others' functions as required.  */
 
+struct stabsread_context {
+  /* Remember what we deduced to be the source language of this psymtab.  */
+  enum language psymtab_language = language_unknown;
+
+  /* The size of each symbol in the symbol file (in external form).
+     This is set by dbx_symfile_read when building psymtabs, and by
+     dbx_psymtab_to_symtab when building symtabs.  */
+  unsigned symbol_size = 0;
+
+  /* This is the offset of the symbol table in the executable file.  */
+  unsigned symbol_table_offset = 0;
+
+  /* This is the offset of the string table in the executable file.  */
+  unsigned string_table_offset = 0;
+
+  /* For elf+stab executables, the n_strx field is not a simple index
+     into the string table.  Instead, each .o file has a base offset in
+     the string table, and the associated symbols contain offsets from
+     this base.  The following two variables contain the base offset for
+     the current and next .o files.  */
+  unsigned int file_string_table_offset = 0;
+
+  /* .o and NLM files contain unrelocated addresses which are based at
+     0.  When non-zero, this flag disables some of the special cases for
+     Solaris elf+stab text addresses at location 0.  */
+  int symfile_relocatable = 0;
+
+  /* When set, we are processing a .o file compiled by sun acc.  This is
+     misnamed; it refers to all stabs-in-elf implementations which use
+     N_UNDF the way Sun does, including Solaris gcc.  Hopefully all
+     stabs-in-elf implementations ever invented will choose to be
+     compatible.  */
+  unsigned char processing_acc_compilation = 0;
+
+  /* The lowest text address we have yet encountered.  This is needed
+     because in an a.out file, there is no header field which tells us
+     what address the program is actually going to be loaded at, so we
+     need to make guesses based on the symbols (which *are* relocated to
+     reflect the address it will be loaded at).  */
+  unrelocated_addr lowest_text_address;
+
+  /* Non-zero if there is any line number info in the objfile.  Prevents
+     dbx_end_psymtab from discarding an otherwise empty psymtab.  */
+  int has_line_numbers = 0;
+
+  /* The list of bincls.  */
+  std::vector<struct header_file_location> bincl_list;
+
+  /* Name of last function encountered.  Used in Solaris to approximate
+     object file boundaries.  */
+  const char *last_function_name = nullptr;
+
+  /* The address in memory of the string table of the object file we are
+     reading (which might not be the "main" object file, but might be a
+     shared library or some other dynamically loaded thing).  This is
+     set by read_dbx_symtab when building psymtabs, and by
+     read_ofile_symtab when building symtabs, and is used only by
+     next_symbol_text.  FIXME: If that is true, we don't need it when
+     building psymtabs, right?  */
+  char *stringtab_global = nullptr;
+
+  /* These variables are used to control fill_symbuf when the stabs
+     symbols are not contiguous (as may be the case when a COFF file is
+     linked using --split-by-reloc).  */
+  const std::vector<asection *> *symbuf_sections;
+  size_t sect_idx = 0;
+  unsigned int symbuf_left = 0;
+  unsigned int symbuf_read = 0;
+
+  /* This variable stores a global stabs buffer, if we read stabs into
+     memory in one chunk in order to process relocations.  */
+  bfd_byte *stabs_data = nullptr;
+};
+
 
 /* Information is passed among various dbxread routines for accessing
    symbol files.  A pointer to this structure is kept in the objfile,
@@ -43,6 +139,8 @@ struct dbx_symfile_info
     file_ptr symtab_offset = 0;	/* Offset in file to symbol table */
     int symbol_size = 0;		/* Bytes in a single symbol */
 
+    stabsread_context ctx; /* Context for the symfile being read.  */
+
     /* See stabsread.h for the use of the following.  */
     struct header_file *header_files = nullptr;
     int n_header_files = 0;
diff --git a/gdb/gdb_bfd.c b/gdb/gdb_bfd.c
index 7e272c7..0854d57 100644
--- a/gdb/gdb_bfd.c
+++ b/gdb/gdb_bfd.c
@@ -930,29 +930,6 @@ gdb_bfd_openw (const char *filename, const char *target)
   return gdb_bfd_ref_ptr::new_reference (result);
 }
 
-/* Wrap f (args) and handle exceptions by:
-   - returning val, and
-   - calling set_quit_flag or set_force_quit_flag, if needed.  */
-
-template <typename R, R val, typename F, typename... Args>
-static R
-catch_exceptions (F &&f, Args&&... args)
-{
-   try
-     {
-       return f (std::forward<Args> (args)...);
-     }
-   catch (const gdb_exception &ex)
-     {
-       if (ex.reason == RETURN_QUIT)
-	 set_quit_flag ();
-       else if (ex.reason == RETURN_FORCED_QUIT)
-	 set_force_quit_flag ();
-     }
-
-   return val;
-}
-
 /* See gdb_bfd.h.  */
 
 gdb_bfd_ref_ptr
diff --git a/gdb/gdbarch.c b/gdb/gdbarch-gen.c
index 58e9ebb..0d00cd7 100644
--- a/gdb/gdbarch.c
+++ b/gdb/gdbarch-gen.c
@@ -297,144 +297,144 @@ verify_gdbarch (struct gdbarch *gdbarch)
   if (gdbarch->bfd_arch_info == NULL)
     log.puts ("\n\tbfd_arch_info");
   /* Check those that need to be defined for the given multi-arch level.  */
-  /* Skip verify of short_bit, invalid_p == 0 */
-  /* Skip verify of int_bit, invalid_p == 0 */
-  /* Skip verify of long_bit, invalid_p == 0 */
-  /* Skip verify of long_long_bit, invalid_p == 0 */
-  /* Skip verify of bfloat16_bit, invalid_p == 0 */
-  /* Skip verify of bfloat16_format, invalid_p == 0 */
-  /* Skip verify of half_bit, invalid_p == 0 */
-  /* Skip verify of half_format, invalid_p == 0 */
-  /* Skip verify of float_bit, invalid_p == 0 */
-  /* Skip verify of float_format, invalid_p == 0 */
-  /* Skip verify of double_bit, invalid_p == 0 */
-  /* Skip verify of double_format, invalid_p == 0 */
-  /* Skip verify of long_double_bit, invalid_p == 0 */
-  /* Skip verify of long_double_format, invalid_p == 0 */
-  /* Skip verify of wchar_bit, invalid_p == 0 */
+  /* Skip verify of short_bit, invalid_p == 0.  */
+  /* Skip verify of int_bit, invalid_p == 0.  */
+  /* Skip verify of long_bit, invalid_p == 0.  */
+  /* Skip verify of long_long_bit, invalid_p == 0.  */
+  /* Skip verify of bfloat16_bit, invalid_p == 0.  */
+  /* Skip verify of bfloat16_format, invalid_p == 0.  */
+  /* Skip verify of half_bit, invalid_p == 0.  */
+  /* Skip verify of half_format, invalid_p == 0.  */
+  /* Skip verify of float_bit, invalid_p == 0.  */
+  /* Skip verify of float_format, invalid_p == 0.  */
+  /* Skip verify of double_bit, invalid_p == 0.  */
+  /* Skip verify of double_format, invalid_p == 0.  */
+  /* Skip verify of long_double_bit, invalid_p == 0.  */
+  /* Skip verify of long_double_format, invalid_p == 0.  */
+  /* Skip verify of wchar_bit, invalid_p == 0.  */
   if (gdbarch->wchar_signed == -1)
     gdbarch->wchar_signed = 1;
-  /* Skip verify of wchar_signed, invalid_p == 0 */
-  /* Skip verify of floatformat_for_type, invalid_p == 0 */
-  /* Skip verify of ptr_bit, invalid_p == 0 */
+  /* Skip verify of wchar_signed, invalid_p == 0.  */
+  /* Skip verify of floatformat_for_type, invalid_p == 0.  */
+  /* Skip verify of ptr_bit, invalid_p == 0.  */
   if (gdbarch->addr_bit == 0)
     gdbarch->addr_bit = gdbarch_ptr_bit (gdbarch);
-  /* Skip verify of addr_bit, invalid_p == 0 */
+  /* Skip verify of addr_bit, invalid_p == 0.  */
   if (gdbarch->dwarf2_addr_size == 0)
     gdbarch->dwarf2_addr_size = gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT;
-  /* Skip verify of dwarf2_addr_size, invalid_p == 0 */
+  /* Skip verify of dwarf2_addr_size, invalid_p == 0.  */
   if (gdbarch->char_signed == -1)
     gdbarch->char_signed = 1;
-  /* Skip verify of char_signed, invalid_p == 0 */
+  /* Skip verify of char_signed, invalid_p == 0.  */
   /* Skip verify of read_pc, has predicate.  */
   /* Skip verify of write_pc, has predicate.  */
-  /* Skip verify of virtual_frame_pointer, invalid_p == 0 */
+  /* Skip verify of virtual_frame_pointer, invalid_p == 0.  */
   /* Skip verify of pseudo_register_read, has predicate.  */
   /* Skip verify of pseudo_register_read_value, has predicate.  */
   /* Skip verify of pseudo_register_write, has predicate.  */
   /* Skip verify of deprecated_pseudo_register_write, has predicate.  */
   if (gdbarch->num_regs == -1)
     log.puts ("\n\tnum_regs");
-  /* Skip verify of num_pseudo_regs, invalid_p == 0 */
+  /* Skip verify of num_pseudo_regs, invalid_p == 0.  */
   /* Skip verify of ax_pseudo_register_collect, has predicate.  */
   /* Skip verify of ax_pseudo_register_push_stack, has predicate.  */
   /* Skip verify of report_signal_info, has predicate.  */
-  /* Skip verify of sp_regnum, invalid_p == 0 */
-  /* Skip verify of pc_regnum, invalid_p == 0 */
-  /* Skip verify of ps_regnum, invalid_p == 0 */
-  /* Skip verify of fp0_regnum, invalid_p == 0 */
-  /* Skip verify of stab_reg_to_regnum, invalid_p == 0 */
-  /* Skip verify of ecoff_reg_to_regnum, invalid_p == 0 */
-  /* Skip verify of sdb_reg_to_regnum, invalid_p == 0 */
-  /* Skip verify of dwarf2_reg_to_regnum, invalid_p == 0 */
+  /* Skip verify of sp_regnum, invalid_p == 0.  */
+  /* Skip verify of pc_regnum, invalid_p == 0.  */
+  /* Skip verify of ps_regnum, invalid_p == 0.  */
+  /* Skip verify of fp0_regnum, invalid_p == 0.  */
+  /* Skip verify of stab_reg_to_regnum, invalid_p == 0.  */
+  /* Skip verify of ecoff_reg_to_regnum, invalid_p == 0.  */
+  /* Skip verify of sdb_reg_to_regnum, invalid_p == 0.  */
+  /* Skip verify of dwarf2_reg_to_regnum, invalid_p == 0.  */
   if (gdbarch->register_name == 0)
     log.puts ("\n\tregister_name");
   if (gdbarch->register_type == 0)
     log.puts ("\n\tregister_type");
-  /* Skip verify of dummy_id, invalid_p == 0 */
-  /* Skip verify of deprecated_fp_regnum, invalid_p == 0 */
+  /* Skip verify of dummy_id, invalid_p == 0.  */
+  /* Skip verify of deprecated_fp_regnum, invalid_p == 0.  */
   /* Skip verify of push_dummy_call, has predicate.  */
-  /* Skip verify of call_dummy_location, invalid_p == 0 */
+  /* Skip verify of call_dummy_location, invalid_p == 0.  */
   /* Skip verify of push_dummy_code, has predicate.  */
-  /* Skip verify of code_of_frame_writable, invalid_p == 0 */
-  /* Skip verify of print_registers_info, invalid_p == 0 */
-  /* Skip verify of print_float_info, invalid_p == 0 */
+  /* Skip verify of code_of_frame_writable, invalid_p == 0.  */
+  /* Skip verify of print_registers_info, invalid_p == 0.  */
+  /* Skip verify of print_float_info, invalid_p == 0.  */
   /* Skip verify of print_vector_info, has predicate.  */
-  /* Skip verify of register_sim_regno, invalid_p == 0 */
-  /* Skip verify of cannot_fetch_register, invalid_p == 0 */
-  /* Skip verify of cannot_store_register, invalid_p == 0 */
+  /* Skip verify of register_sim_regno, invalid_p == 0.  */
+  /* Skip verify of cannot_fetch_register, invalid_p == 0.  */
+  /* Skip verify of cannot_store_register, invalid_p == 0.  */
   /* Skip verify of get_longjmp_target, has predicate.  */
-  /* Skip verify of believe_pcc_promotion, invalid_p == 0 */
-  /* Skip verify of convert_register_p, invalid_p == 0 */
-  /* Skip verify of register_to_value, invalid_p == 0 */
-  /* Skip verify of value_to_register, invalid_p == 0 */
-  /* Skip verify of value_from_register, invalid_p == 0 */
-  /* Skip verify of pointer_to_address, invalid_p == 0 */
-  /* Skip verify of address_to_pointer, invalid_p == 0 */
+  /* Skip verify of believe_pcc_promotion, invalid_p == 0.  */
+  /* Skip verify of convert_register_p, invalid_p == 0.  */
+  /* Skip verify of register_to_value, invalid_p == 0.  */
+  /* Skip verify of value_to_register, invalid_p == 0.  */
+  /* Skip verify of value_from_register, invalid_p == 0.  */
+  /* Skip verify of pointer_to_address, invalid_p == 0.  */
+  /* Skip verify of address_to_pointer, invalid_p == 0.  */
   /* Skip verify of integer_to_address, has predicate.  */
-  /* Skip verify of return_value, invalid_p == 0 */
+  /* Skip verify of return_value, invalid_p == 0.  */
   if ((gdbarch->return_value_as_value == default_gdbarch_return_value) == (gdbarch->return_value == nullptr))
     log.puts ("\n\treturn_value_as_value");
-  /* Skip verify of get_return_buf_addr, invalid_p == 0 */
-  /* Skip verify of dwarf2_omit_typedef_p, invalid_p == 0 */
-  /* Skip verify of update_call_site_pc, invalid_p == 0 */
-  /* Skip verify of return_in_first_hidden_param_p, invalid_p == 0 */
+  /* Skip verify of get_return_buf_addr, invalid_p == 0.  */
+  /* Skip verify of dwarf2_omit_typedef_p, invalid_p == 0.  */
+  /* Skip verify of update_call_site_pc, invalid_p == 0.  */
+  /* Skip verify of return_in_first_hidden_param_p, invalid_p == 0.  */
   if (gdbarch->skip_prologue == 0)
     log.puts ("\n\tskip_prologue");
   /* Skip verify of skip_main_prologue, has predicate.  */
   /* Skip verify of skip_entrypoint, has predicate.  */
   if (gdbarch->inner_than == 0)
     log.puts ("\n\tinner_than");
-  /* Skip verify of breakpoint_from_pc, invalid_p == 0 */
+  /* Skip verify of breakpoint_from_pc, invalid_p == 0.  */
   if (gdbarch->breakpoint_kind_from_pc == 0)
     log.puts ("\n\tbreakpoint_kind_from_pc");
-  /* Skip verify of sw_breakpoint_from_kind, invalid_p == 0 */
-  /* Skip verify of breakpoint_kind_from_current_state, invalid_p == 0 */
+  /* Skip verify of sw_breakpoint_from_kind, invalid_p == 0.  */
+  /* Skip verify of breakpoint_kind_from_current_state, invalid_p == 0.  */
   /* Skip verify of adjust_breakpoint_address, has predicate.  */
-  /* Skip verify of memory_insert_breakpoint, invalid_p == 0 */
-  /* Skip verify of memory_remove_breakpoint, invalid_p == 0 */
-  /* Skip verify of decr_pc_after_break, invalid_p == 0 */
-  /* Skip verify of deprecated_function_start_offset, invalid_p == 0 */
-  /* Skip verify of remote_register_number, invalid_p == 0 */
+  /* Skip verify of memory_insert_breakpoint, invalid_p == 0.  */
+  /* Skip verify of memory_remove_breakpoint, invalid_p == 0.  */
+  /* Skip verify of decr_pc_after_break, invalid_p == 0.  */
+  /* Skip verify of deprecated_function_start_offset, invalid_p == 0.  */
+  /* Skip verify of remote_register_number, invalid_p == 0.  */
   /* Skip verify of fetch_tls_load_module_address, has predicate.  */
   /* Skip verify of get_thread_local_address, has predicate.  */
-  /* Skip verify of frame_args_skip, invalid_p == 0 */
-  /* Skip verify of unwind_pc, invalid_p == 0 */
-  /* Skip verify of unwind_sp, invalid_p == 0 */
+  /* Skip verify of frame_args_skip, invalid_p == 0.  */
+  /* Skip verify of unwind_pc, invalid_p == 0.  */
+  /* Skip verify of unwind_sp, invalid_p == 0.  */
   /* Skip verify of frame_num_args, has predicate.  */
   /* Skip verify of frame_align, has predicate.  */
-  /* Skip verify of stabs_argument_has_addr, invalid_p == 0 */
-  /* Skip verify of frame_red_zone_size, invalid_p == 0 */
-  /* Skip verify of convert_from_func_ptr_addr, invalid_p == 0 */
-  /* Skip verify of addr_bits_remove, invalid_p == 0 */
-  /* Skip verify of remove_non_address_bits, invalid_p == 0 */
-  /* Skip verify of memtag_to_string, invalid_p == 0 */
-  /* Skip verify of tagged_address_p, invalid_p == 0 */
-  /* Skip verify of memtag_matches_p, invalid_p == 0 */
-  /* Skip verify of set_memtags, invalid_p == 0 */
-  /* Skip verify of get_memtag, invalid_p == 0 */
-  /* Skip verify of memtag_granule_size, invalid_p == 0 */
+  /* Skip verify of stabs_argument_has_addr, invalid_p == 0.  */
+  /* Skip verify of frame_red_zone_size, invalid_p == 0.  */
+  /* Skip verify of convert_from_func_ptr_addr, invalid_p == 0.  */
+  /* Skip verify of addr_bits_remove, invalid_p == 0.  */
+  /* Skip verify of remove_non_address_bits, invalid_p == 0.  */
+  /* Skip verify of memtag_to_string, invalid_p == 0.  */
+  /* Skip verify of tagged_address_p, invalid_p == 0.  */
+  /* Skip verify of memtag_matches_p, invalid_p == 0.  */
+  /* Skip verify of set_memtags, invalid_p == 0.  */
+  /* Skip verify of get_memtag, invalid_p == 0.  */
+  /* Skip verify of memtag_granule_size, invalid_p == 0.  */
   /* Skip verify of software_single_step, has predicate.  */
   /* Skip verify of single_step_through_delay, has predicate.  */
-  /* Skip verify of print_insn, invalid_p == 0 */
-  /* Skip verify of skip_trampoline_code, invalid_p == 0 */
-  /* Skip verify of so_ops, invalid_p == 0 */
-  /* Skip verify of skip_solib_resolver, invalid_p == 0 */
-  /* Skip verify of in_solib_return_trampoline, invalid_p == 0 */
-  /* Skip verify of in_indirect_branch_thunk, invalid_p == 0 */
-  /* Skip verify of stack_frame_destroyed_p, invalid_p == 0 */
+  /* Skip verify of print_insn, invalid_p == 0.  */
+  /* Skip verify of skip_trampoline_code, invalid_p == 0.  */
+  /* Skip verify of so_ops, invalid_p == 0.  */
+  /* Skip verify of skip_solib_resolver, invalid_p == 0.  */
+  /* Skip verify of in_solib_return_trampoline, invalid_p == 0.  */
+  /* Skip verify of in_indirect_branch_thunk, invalid_p == 0.  */
+  /* Skip verify of stack_frame_destroyed_p, invalid_p == 0.  */
   /* Skip verify of elf_make_msymbol_special, has predicate.  */
-  /* Skip verify of coff_make_msymbol_special, invalid_p == 0 */
-  /* Skip verify of make_symbol_special, invalid_p == 0 */
-  /* Skip verify of adjust_dwarf2_addr, invalid_p == 0 */
-  /* Skip verify of adjust_dwarf2_line, invalid_p == 0 */
-  /* Skip verify of cannot_step_breakpoint, invalid_p == 0 */
-  /* Skip verify of have_nonsteppable_watchpoint, invalid_p == 0 */
+  /* Skip verify of coff_make_msymbol_special, invalid_p == 0.  */
+  /* Skip verify of make_symbol_special, invalid_p == 0.  */
+  /* Skip verify of adjust_dwarf2_addr, invalid_p == 0.  */
+  /* Skip verify of adjust_dwarf2_line, invalid_p == 0.  */
+  /* Skip verify of cannot_step_breakpoint, invalid_p == 0.  */
+  /* Skip verify of have_nonsteppable_watchpoint, invalid_p == 0.  */
   /* Skip verify of address_class_type_flags, has predicate.  */
   /* Skip verify of address_class_type_flags_to_name, has predicate.  */
-  /* Skip verify of execute_dwarf_cfa_vendor_op, invalid_p == 0 */
+  /* Skip verify of execute_dwarf_cfa_vendor_op, invalid_p == 0.  */
   /* Skip verify of address_class_name_to_type_flags, has predicate.  */
-  /* Skip verify of register_reggroup_p, invalid_p == 0 */
+  /* Skip verify of register_reggroup_p, invalid_p == 0.  */
   /* Skip verify of fetch_pointer_argument, has predicate.  */
   /* Skip verify of iterate_over_regset_sections, has predicate.  */
   /* Skip verify of make_corefile_notes, has predicate.  */
@@ -449,19 +449,19 @@ verify_gdbarch (struct gdbarch *gdbarch)
   /* Skip verify of core_xfer_siginfo, has predicate.  */
   /* Skip verify of core_read_x86_xsave_layout, has predicate.  */
   /* Skip verify of gcore_bfd_target, has predicate.  */
-  /* Skip verify of vtable_function_descriptors, invalid_p == 0 */
-  /* Skip verify of vbit_in_delta, invalid_p == 0 */
-  /* Skip verify of skip_permanent_breakpoint, invalid_p == 0 */
+  /* Skip verify of vtable_function_descriptors, invalid_p == 0.  */
+  /* Skip verify of vbit_in_delta, invalid_p == 0.  */
+  /* Skip verify of skip_permanent_breakpoint, invalid_p == 0.  */
   /* Skip verify of max_insn_length, has predicate.  */
   /* Skip verify of displaced_step_copy_insn, has predicate.  */
-  /* Skip verify of displaced_step_hw_singlestep, invalid_p == 0 */
+  /* Skip verify of displaced_step_hw_singlestep, invalid_p == 0.  */
   if ((gdbarch->displaced_step_copy_insn == nullptr) != (gdbarch->displaced_step_fixup == nullptr))
     log.puts ("\n\tdisplaced_step_fixup");
   /* Skip verify of displaced_step_prepare, has predicate.  */
   if ((! gdbarch->displaced_step_finish) != (! gdbarch->displaced_step_prepare))
     log.puts ("\n\tdisplaced_step_finish");
   /* Skip verify of displaced_step_copy_insn_closure_by_addr, has predicate.  */
-  /* Skip verify of displaced_step_restore_all_in_ptid, invalid_p == 0 */
+  /* Skip verify of displaced_step_restore_all_in_ptid, invalid_p == 0.  */
   if (gdbarch->displaced_step_buffer_length == 0)
     gdbarch->displaced_step_buffer_length = gdbarch->max_insn_length;
   if (gdbarch->displaced_step_buffer_length < gdbarch->max_insn_length)
@@ -469,7 +469,7 @@ verify_gdbarch (struct gdbarch *gdbarch)
   /* Skip verify of relocate_instruction, has predicate.  */
   /* Skip verify of overlay_update, has predicate.  */
   /* Skip verify of core_read_description, has predicate.  */
-  /* Skip verify of sofun_address_maybe_missing, invalid_p == 0 */
+  /* Skip verify of sofun_address_maybe_missing, invalid_p == 0.  */
   /* Skip verify of process_record, has predicate.  */
   /* Skip verify of process_record_signal, has predicate.  */
   /* Skip verify of gdb_signal_from_target, has predicate.  */
@@ -477,16 +477,16 @@ verify_gdbarch (struct gdbarch *gdbarch)
   /* Skip verify of get_siginfo_type, has predicate.  */
   /* Skip verify of record_special_symbol, has predicate.  */
   /* Skip verify of get_syscall_number, has predicate.  */
-  /* Skip verify of xml_syscall_file, invalid_p == 0 */
-  /* Skip verify of syscalls_info, invalid_p == 0 */
-  /* Skip verify of stap_integer_prefixes, invalid_p == 0 */
-  /* Skip verify of stap_integer_suffixes, invalid_p == 0 */
-  /* Skip verify of stap_register_prefixes, invalid_p == 0 */
-  /* Skip verify of stap_register_suffixes, invalid_p == 0 */
-  /* Skip verify of stap_register_indirection_prefixes, invalid_p == 0 */
-  /* Skip verify of stap_register_indirection_suffixes, invalid_p == 0 */
-  /* Skip verify of stap_gdb_register_prefix, invalid_p == 0 */
-  /* Skip verify of stap_gdb_register_suffix, invalid_p == 0 */
+  /* Skip verify of xml_syscall_file, invalid_p == 0.  */
+  /* Skip verify of syscalls_info, invalid_p == 0.  */
+  /* Skip verify of stap_integer_prefixes, invalid_p == 0.  */
+  /* Skip verify of stap_integer_suffixes, invalid_p == 0.  */
+  /* Skip verify of stap_register_prefixes, invalid_p == 0.  */
+  /* Skip verify of stap_register_suffixes, invalid_p == 0.  */
+  /* Skip verify of stap_register_indirection_prefixes, invalid_p == 0.  */
+  /* Skip verify of stap_register_indirection_suffixes, invalid_p == 0.  */
+  /* Skip verify of stap_gdb_register_prefix, invalid_p == 0.  */
+  /* Skip verify of stap_gdb_register_suffix, invalid_p == 0.  */
   /* Skip verify of stap_is_single_operand, has predicate.  */
   /* Skip verify of stap_parse_special_token, has predicate.  */
   /* Skip verify of stap_adjust_register, has predicate.  */
@@ -494,39 +494,39 @@ verify_gdbarch (struct gdbarch *gdbarch)
   /* Skip verify of dtrace_probe_is_enabled, has predicate.  */
   /* Skip verify of dtrace_enable_probe, has predicate.  */
   /* Skip verify of dtrace_disable_probe, has predicate.  */
-  /* Skip verify of has_global_solist, invalid_p == 0 */
-  /* Skip verify of has_global_breakpoints, invalid_p == 0 */
-  /* Skip verify of has_shared_address_space, invalid_p == 0 */
-  /* Skip verify of fast_tracepoint_valid_at, invalid_p == 0 */
-  /* Skip verify of guess_tracepoint_registers, invalid_p == 0 */
-  /* Skip verify of auto_charset, invalid_p == 0 */
-  /* Skip verify of auto_wide_charset, invalid_p == 0 */
-  /* Skip verify of solib_symbols_extension, invalid_p == 0 */
-  /* Skip verify of has_dos_based_file_system, invalid_p == 0 */
-  /* Skip verify of gen_return_address, invalid_p == 0 */
+  /* Skip verify of has_global_solist, invalid_p == 0.  */
+  /* Skip verify of has_global_breakpoints, invalid_p == 0.  */
+  /* Skip verify of has_shared_address_space, invalid_p == 0.  */
+  /* Skip verify of fast_tracepoint_valid_at, invalid_p == 0.  */
+  /* Skip verify of guess_tracepoint_registers, invalid_p == 0.  */
+  /* Skip verify of auto_charset, invalid_p == 0.  */
+  /* Skip verify of auto_wide_charset, invalid_p == 0.  */
+  /* Skip verify of solib_symbols_extension, invalid_p == 0.  */
+  /* Skip verify of has_dos_based_file_system, invalid_p == 0.  */
+  /* Skip verify of gen_return_address, invalid_p == 0.  */
   /* Skip verify of info_proc, has predicate.  */
   /* Skip verify of core_info_proc, has predicate.  */
-  /* Skip verify of iterate_over_objfiles_in_search_order, invalid_p == 0 */
-  /* Skip verify of ravenscar_ops, invalid_p == 0 */
-  /* Skip verify of insn_is_call, invalid_p == 0 */
-  /* Skip verify of insn_is_ret, invalid_p == 0 */
-  /* Skip verify of insn_is_jump, invalid_p == 0 */
-  /* Skip verify of program_breakpoint_here_p, invalid_p == 0 */
+  /* Skip verify of iterate_over_objfiles_in_search_order, invalid_p == 0.  */
+  /* Skip verify of ravenscar_ops, invalid_p == 0.  */
+  /* Skip verify of insn_is_call, invalid_p == 0.  */
+  /* Skip verify of insn_is_ret, invalid_p == 0.  */
+  /* Skip verify of insn_is_jump, invalid_p == 0.  */
+  /* Skip verify of program_breakpoint_here_p, invalid_p == 0.  */
   /* Skip verify of auxv_parse, has predicate.  */
-  /* Skip verify of print_auxv_entry, invalid_p == 0 */
-  /* Skip verify of vsyscall_range, invalid_p == 0 */
-  /* Skip verify of infcall_mmap, invalid_p == 0 */
-  /* Skip verify of infcall_munmap, invalid_p == 0 */
-  /* Skip verify of gcc_target_options, invalid_p == 0 */
-  /* Skip verify of gnu_triplet_regexp, invalid_p == 0 */
-  /* Skip verify of addressable_memory_unit_size, invalid_p == 0 */
-  /* Skip verify of disassembler_options_implicit, invalid_p == 0 */
-  /* Skip verify of disassembler_options, invalid_p == 0 */
-  /* Skip verify of valid_disassembler_options, invalid_p == 0 */
-  /* Skip verify of type_align, invalid_p == 0 */
-  /* Skip verify of get_pc_address_flags, invalid_p == 0 */
-  /* Skip verify of read_core_file_mappings, invalid_p == 0 */
-  /* Skip verify of use_target_description_from_corefile_notes, invalid_p == 0 */
+  /* Skip verify of print_auxv_entry, invalid_p == 0.  */
+  /* Skip verify of vsyscall_range, invalid_p == 0.  */
+  /* Skip verify of infcall_mmap, invalid_p == 0.  */
+  /* Skip verify of infcall_munmap, invalid_p == 0.  */
+  /* Skip verify of gcc_target_options, invalid_p == 0.  */
+  /* Skip verify of gnu_triplet_regexp, invalid_p == 0.  */
+  /* Skip verify of addressable_memory_unit_size, invalid_p == 0.  */
+  /* Skip verify of disassembler_options_implicit, invalid_p == 0.  */
+  /* Skip verify of disassembler_options, invalid_p == 0.  */
+  /* Skip verify of valid_disassembler_options, invalid_p == 0.  */
+  /* Skip verify of type_align, invalid_p == 0.  */
+  /* Skip verify of get_pc_address_flags, invalid_p == 0.  */
+  /* Skip verify of read_core_file_mappings, invalid_p == 0.  */
+  /* Skip verify of use_target_description_from_corefile_notes, invalid_p == 0.  */
   if (!log.empty ())
     internal_error (_("verify_gdbarch: the following are invalid ...%s"),
 		    log.c_str ());
@@ -1440,7 +1440,7 @@ int
 gdbarch_short_bit (struct gdbarch *gdbarch)
 {
   gdb_assert (gdbarch != NULL);
-  /* Skip verify of short_bit, invalid_p == 0 */
+  /* Skip verify of short_bit, invalid_p == 0.  */
   if (gdbarch_debug >= 2)
     gdb_printf (gdb_stdlog, "gdbarch_short_bit called\n");
   return gdbarch->short_bit;
@@ -1457,7 +1457,7 @@ int
 gdbarch_int_bit (struct gdbarch *gdbarch)
 {
   gdb_assert (gdbarch != NULL);
-  /* Skip verify of int_bit, invalid_p == 0 */
+  /* Skip verify of int_bit, invalid_p == 0.  */
   if (gdbarch_debug >= 2)
     gdb_printf (gdb_stdlog, "gdbarch_int_bit called\n");
   return gdbarch->int_bit;
@@ -1474,7 +1474,7 @@ int
 gdbarch_long_bit (struct gdbarch *gdbarch)
 {
   gdb_assert (gdbarch != NULL);
-  /* Skip verify of long_bit, invalid_p == 0 */
+  /* Skip verify of long_bit, invalid_p == 0.  */
   if (gdbarch_debug >= 2)
     gdb_printf (gdb_stdlog, "gdbarch_long_bit called\n");
   return gdbarch->long_bit;
@@ -1491,7 +1491,7 @@ int
 gdbarch_long_long_bit (struct gdbarch *gdbarch)
 {
   gdb_assert (gdbarch != NULL);
-  /* Skip verify of long_long_bit, invalid_p == 0 */
+  /* Skip verify of long_long_bit, invalid_p == 0.  */
   if (gdbarch_debug >= 2)
     gdb_printf (gdb_stdlog, "gdbarch_long_long_bit called\n");
   return gdbarch->long_long_bit;
@@ -1508,7 +1508,7 @@ int
 gdbarch_bfloat16_bit (struct gdbarch *gdbarch)
 {
   gdb_assert (gdbarch != NULL);
-  /* Skip verify of bfloat16_bit, invalid_p == 0 */
+  /* Skip verify of bfloat16_bit, invalid_p == 0.  */
   if (gdbarch_debug >= 2)
     gdb_printf (gdb_stdlog, "gdbarch_bfloat16_bit called\n");
   return gdbarch->bfloat16_bit;
@@ -1525,7 +1525,7 @@ const struct floatformat **
 gdbarch_bfloat16_format (struct gdbarch *gdbarch)
 {
   gdb_assert (gdbarch != NULL);
-  /* Skip verify of bfloat16_format, invalid_p == 0 */
+  /* Skip verify of bfloat16_format, invalid_p == 0.  */
   if (gdbarch_debug >= 2)
     gdb_printf (gdb_stdlog, "gdbarch_bfloat16_format called\n");
   return gdbarch->bfloat16_format;
@@ -1542,7 +1542,7 @@ int
 gdbarch_half_bit (struct gdbarch *gdbarch)
 {
   gdb_assert (gdbarch != NULL);
-  /* Skip verify of half_bit, invalid_p == 0 */
+  /* Skip verify of half_bit, invalid_p == 0.  */
   if (gdbarch_debug >= 2)
     gdb_printf (gdb_stdlog, "gdbarch_half_bit called\n");
   return gdbarch->half_bit;
@@ -1559,7 +1559,7 @@ const struct floatformat **
 gdbarch_half_format (struct gdbarch *gdbarch)
 {
   gdb_assert (gdbarch != NULL);
-  /* Skip verify of half_format, invalid_p == 0 */
+  /* Skip verify of half_format, invalid_p == 0.  */
   if (gdbarch_debug >= 2)
     gdb_printf (gdb_stdlog, "gdbarch_half_format called\n");
   return gdbarch->half_format;
@@ -1576,7 +1576,7 @@ int
 gdbarch_float_bit (struct gdbarch *gdbarch)
 {
   gdb_assert (gdbarch != NULL);
-  /* Skip verify of float_bit, invalid_p == 0 */
+  /* Skip verify of float_bit, invalid_p == 0.  */
   if (gdbarch_debug >= 2)
     gdb_printf (gdb_stdlog, "gdbarch_float_bit called\n");
   return gdbarch->float_bit;
@@ -1593,7 +1593,7 @@ const struct floatformat **
 gdbarch_float_format (struct gdbarch *gdbarch)
 {
   gdb_assert (gdbarch != NULL);
-  /* Skip verify of float_format, invalid_p == 0 */
+  /* Skip verify of float_format, invalid_p == 0.  */
   if (gdbarch_debug >= 2)
     gdb_printf (gdb_stdlog, "gdbarch_float_format called\n");
   return gdbarch->float_format;
@@ -1610,7 +1610,7 @@ int
 gdbarch_double_bit (struct gdbarch *gdbarch)
 {
   gdb_assert (gdbarch != NULL);
-  /* Skip verify of double_bit, invalid_p == 0 */
+  /* Skip verify of double_bit, invalid_p == 0.  */
   if (gdbarch_debug >= 2)
     gdb_printf (gdb_stdlog, "gdbarch_double_bit called\n");
   return gdbarch->double_bit;
@@ -1627,7 +1627,7 @@ const struct floatformat **
 gdbarch_double_format (struct gdbarch *gdbarch)
 {
   gdb_assert (gdbarch != NULL);
-  /* Skip verify of double_format, invalid_p == 0 */
+  /* Skip verify of double_format, invalid_p == 0.  */
   if (gdbarch_debug >= 2)
     gdb_printf (gdb_stdlog, "gdbarch_double_format called\n");
   return gdbarch->double_format;
@@ -1644,7 +1644,7 @@ int
 gdbarch_long_double_bit (struct gdbarch *gdbarch)
 {
   gdb_assert (gdbarch != NULL);
-  /* Skip verify of long_double_bit, invalid_p == 0 */
+  /* Skip verify of long_double_bit, invalid_p == 0.  */
   if (gdbarch_debug >= 2)
     gdb_printf (gdb_stdlog, "gdbarch_long_double_bit called\n");
   return gdbarch->long_double_bit;
@@ -1661,7 +1661,7 @@ const struct floatformat **
 gdbarch_long_double_format (struct gdbarch *gdbarch)
 {
   gdb_assert (gdbarch != NULL);
-  /* Skip verify of long_double_format, invalid_p == 0 */
+  /* Skip verify of long_double_format, invalid_p == 0.  */
   if (gdbarch_debug >= 2)
     gdb_printf (gdb_stdlog, "gdbarch_long_double_format called\n");
   return gdbarch->long_double_format;
@@ -1678,7 +1678,7 @@ int
 gdbarch_wchar_bit (struct gdbarch *gdbarch)
 {
   gdb_assert (gdbarch != NULL);
-  /* Skip verify of wchar_bit, invalid_p == 0 */
+  /* Skip verify of wchar_bit, invalid_p == 0.  */
   if (gdbarch_debug >= 2)
     gdb_printf (gdb_stdlog, "gdbarch_wchar_bit called\n");
   return gdbarch->wchar_bit;
@@ -1730,7 +1730,7 @@ int
 gdbarch_ptr_bit (struct gdbarch *gdbarch)
 {
   gdb_assert (gdbarch != NULL);
-  /* Skip verify of ptr_bit, invalid_p == 0 */
+  /* Skip verify of ptr_bit, invalid_p == 0.  */
   if (gdbarch_debug >= 2)
     gdb_printf (gdb_stdlog, "gdbarch_ptr_bit called\n");
   return gdbarch->ptr_bit;
@@ -1980,7 +1980,7 @@ int
 gdbarch_num_pseudo_regs (struct gdbarch *gdbarch)
 {
   gdb_assert (gdbarch != NULL);
-  /* Skip verify of num_pseudo_regs, invalid_p == 0 */
+  /* Skip verify of num_pseudo_regs, invalid_p == 0.  */
   if (gdbarch_debug >= 2)
     gdb_printf (gdb_stdlog, "gdbarch_num_pseudo_regs called\n");
   return gdbarch->num_pseudo_regs;
@@ -2069,7 +2069,7 @@ int
 gdbarch_sp_regnum (struct gdbarch *gdbarch)
 {
   gdb_assert (gdbarch != NULL);
-  /* Skip verify of sp_regnum, invalid_p == 0 */
+  /* Skip verify of sp_regnum, invalid_p == 0.  */
   if (gdbarch_debug >= 2)
     gdb_printf (gdb_stdlog, "gdbarch_sp_regnum called\n");
   return gdbarch->sp_regnum;
@@ -2086,7 +2086,7 @@ int
 gdbarch_pc_regnum (struct gdbarch *gdbarch)
 {
   gdb_assert (gdbarch != NULL);
-  /* Skip verify of pc_regnum, invalid_p == 0 */
+  /* Skip verify of pc_regnum, invalid_p == 0.  */
   if (gdbarch_debug >= 2)
     gdb_printf (gdb_stdlog, "gdbarch_pc_regnum called\n");
   return gdbarch->pc_regnum;
@@ -2103,7 +2103,7 @@ int
 gdbarch_ps_regnum (struct gdbarch *gdbarch)
 {
   gdb_assert (gdbarch != NULL);
-  /* Skip verify of ps_regnum, invalid_p == 0 */
+  /* Skip verify of ps_regnum, invalid_p == 0.  */
   if (gdbarch_debug >= 2)
     gdb_printf (gdb_stdlog, "gdbarch_ps_regnum called\n");
   return gdbarch->ps_regnum;
@@ -2120,7 +2120,7 @@ int
 gdbarch_fp0_regnum (struct gdbarch *gdbarch)
 {
   gdb_assert (gdbarch != NULL);
-  /* Skip verify of fp0_regnum, invalid_p == 0 */
+  /* Skip verify of fp0_regnum, invalid_p == 0.  */
   if (gdbarch_debug >= 2)
     gdb_printf (gdb_stdlog, "gdbarch_fp0_regnum called\n");
   return gdbarch->fp0_regnum;
@@ -2260,7 +2260,7 @@ int
 gdbarch_deprecated_fp_regnum (struct gdbarch *gdbarch)
 {
   gdb_assert (gdbarch != NULL);
-  /* Skip verify of deprecated_fp_regnum, invalid_p == 0 */
+  /* Skip verify of deprecated_fp_regnum, invalid_p == 0.  */
   if (gdbarch_debug >= 2)
     gdb_printf (gdb_stdlog, "gdbarch_deprecated_fp_regnum called\n");
   return gdbarch->deprecated_fp_regnum;
@@ -2301,7 +2301,7 @@ enum call_dummy_location_type
 gdbarch_call_dummy_location (struct gdbarch *gdbarch)
 {
   gdb_assert (gdbarch != NULL);
-  /* Skip verify of call_dummy_location, invalid_p == 0 */
+  /* Skip verify of call_dummy_location, invalid_p == 0.  */
   if (gdbarch_debug >= 2)
     gdb_printf (gdb_stdlog, "gdbarch_call_dummy_location called\n");
   return gdbarch->call_dummy_location;
@@ -2492,7 +2492,7 @@ int
 gdbarch_believe_pcc_promotion (struct gdbarch *gdbarch)
 {
   gdb_assert (gdbarch != NULL);
-  /* Skip verify of believe_pcc_promotion, invalid_p == 0 */
+  /* Skip verify of believe_pcc_promotion, invalid_p == 0.  */
   if (gdbarch_debug >= 2)
     gdb_printf (gdb_stdlog, "gdbarch_believe_pcc_promotion called\n");
   return gdbarch->believe_pcc_promotion;
@@ -2935,7 +2935,7 @@ CORE_ADDR
 gdbarch_decr_pc_after_break (struct gdbarch *gdbarch)
 {
   gdb_assert (gdbarch != NULL);
-  /* Skip verify of decr_pc_after_break, invalid_p == 0 */
+  /* Skip verify of decr_pc_after_break, invalid_p == 0.  */
   if (gdbarch_debug >= 2)
     gdb_printf (gdb_stdlog, "gdbarch_decr_pc_after_break called\n");
   return gdbarch->decr_pc_after_break;
@@ -2952,7 +2952,7 @@ CORE_ADDR
 gdbarch_deprecated_function_start_offset (struct gdbarch *gdbarch)
 {
   gdb_assert (gdbarch != NULL);
-  /* Skip verify of deprecated_function_start_offset, invalid_p == 0 */
+  /* Skip verify of deprecated_function_start_offset, invalid_p == 0.  */
   if (gdbarch_debug >= 2)
     gdb_printf (gdb_stdlog, "gdbarch_deprecated_function_start_offset called\n");
   return gdbarch->deprecated_function_start_offset;
@@ -3034,7 +3034,7 @@ CORE_ADDR
 gdbarch_frame_args_skip (struct gdbarch *gdbarch)
 {
   gdb_assert (gdbarch != NULL);
-  /* Skip verify of frame_args_skip, invalid_p == 0 */
+  /* Skip verify of frame_args_skip, invalid_p == 0.  */
   if (gdbarch_debug >= 2)
     gdb_printf (gdb_stdlog, "gdbarch_frame_args_skip called\n");
   return gdbarch->frame_args_skip;
@@ -3150,7 +3150,7 @@ int
 gdbarch_frame_red_zone_size (struct gdbarch *gdbarch)
 {
   gdb_assert (gdbarch != NULL);
-  /* Skip verify of frame_red_zone_size, invalid_p == 0 */
+  /* Skip verify of frame_red_zone_size, invalid_p == 0.  */
   if (gdbarch_debug >= 2)
     gdb_printf (gdb_stdlog, "gdbarch_frame_red_zone_size called\n");
   return gdbarch->frame_red_zone_size;
@@ -3303,7 +3303,7 @@ CORE_ADDR
 gdbarch_memtag_granule_size (struct gdbarch *gdbarch)
 {
   gdb_assert (gdbarch != NULL);
-  /* Skip verify of memtag_granule_size, invalid_p == 0 */
+  /* Skip verify of memtag_granule_size, invalid_p == 0.  */
   if (gdbarch_debug >= 2)
     gdb_printf (gdb_stdlog, "gdbarch_memtag_granule_size called\n");
   return gdbarch->memtag_granule_size;
@@ -3402,7 +3402,7 @@ const solib_ops *
 gdbarch_so_ops (struct gdbarch *gdbarch)
 {
   gdb_assert (gdbarch != NULL);
-  /* Skip verify of so_ops, invalid_p == 0 */
+  /* Skip verify of so_ops, invalid_p == 0.  */
   if (gdbarch_debug >= 2)
     gdb_printf (gdb_stdlog, "gdbarch_so_ops called\n");
   return gdbarch->so_ops;
@@ -3579,7 +3579,7 @@ int
 gdbarch_cannot_step_breakpoint (struct gdbarch *gdbarch)
 {
   gdb_assert (gdbarch != NULL);
-  /* Skip verify of cannot_step_breakpoint, invalid_p == 0 */
+  /* Skip verify of cannot_step_breakpoint, invalid_p == 0.  */
   if (gdbarch_debug >= 2)
     gdb_printf (gdb_stdlog, "gdbarch_cannot_step_breakpoint called\n");
   return gdbarch->cannot_step_breakpoint;
@@ -3596,7 +3596,7 @@ int
 gdbarch_have_nonsteppable_watchpoint (struct gdbarch *gdbarch)
 {
   gdb_assert (gdbarch != NULL);
-  /* Skip verify of have_nonsteppable_watchpoint, invalid_p == 0 */
+  /* Skip verify of have_nonsteppable_watchpoint, invalid_p == 0.  */
   if (gdbarch_debug >= 2)
     gdb_printf (gdb_stdlog, "gdbarch_have_nonsteppable_watchpoint called\n");
   return gdbarch->have_nonsteppable_watchpoint;
@@ -4056,7 +4056,7 @@ int
 gdbarch_vtable_function_descriptors (struct gdbarch *gdbarch)
 {
   gdb_assert (gdbarch != NULL);
-  /* Skip verify of vtable_function_descriptors, invalid_p == 0 */
+  /* Skip verify of vtable_function_descriptors, invalid_p == 0.  */
   if (gdbarch_debug >= 2)
     gdb_printf (gdb_stdlog, "gdbarch_vtable_function_descriptors called\n");
   return gdbarch->vtable_function_descriptors;
@@ -4073,7 +4073,7 @@ int
 gdbarch_vbit_in_delta (struct gdbarch *gdbarch)
 {
   gdb_assert (gdbarch != NULL);
-  /* Skip verify of vbit_in_delta, invalid_p == 0 */
+  /* Skip verify of vbit_in_delta, invalid_p == 0.  */
   if (gdbarch_debug >= 2)
     gdb_printf (gdb_stdlog, "gdbarch_vbit_in_delta called\n");
   return gdbarch->vbit_in_delta;
@@ -4363,7 +4363,7 @@ int
 gdbarch_sofun_address_maybe_missing (struct gdbarch *gdbarch)
 {
   gdb_assert (gdbarch != NULL);
-  /* Skip verify of sofun_address_maybe_missing, invalid_p == 0 */
+  /* Skip verify of sofun_address_maybe_missing, invalid_p == 0.  */
   if (gdbarch_debug >= 2)
     gdb_printf (gdb_stdlog, "gdbarch_sofun_address_maybe_missing called\n");
   return gdbarch->sofun_address_maybe_missing;
@@ -4548,7 +4548,7 @@ const char *
 gdbarch_xml_syscall_file (struct gdbarch *gdbarch)
 {
   gdb_assert (gdbarch != NULL);
-  /* Skip verify of xml_syscall_file, invalid_p == 0 */
+  /* Skip verify of xml_syscall_file, invalid_p == 0.  */
   if (gdbarch_debug >= 2)
     gdb_printf (gdb_stdlog, "gdbarch_xml_syscall_file called\n");
   return gdbarch->xml_syscall_file;
@@ -4565,7 +4565,7 @@ struct syscalls_info *
 gdbarch_syscalls_info (struct gdbarch *gdbarch)
 {
   gdb_assert (gdbarch != NULL);
-  /* Skip verify of syscalls_info, invalid_p == 0 */
+  /* Skip verify of syscalls_info, invalid_p == 0.  */
   if (gdbarch_debug >= 2)
     gdb_printf (gdb_stdlog, "gdbarch_syscalls_info called\n");
   return gdbarch->syscalls_info;
@@ -4582,7 +4582,7 @@ const char *const *
 gdbarch_stap_integer_prefixes (struct gdbarch *gdbarch)
 {
   gdb_assert (gdbarch != NULL);
-  /* Skip verify of stap_integer_prefixes, invalid_p == 0 */
+  /* Skip verify of stap_integer_prefixes, invalid_p == 0.  */
   if (gdbarch_debug >= 2)
     gdb_printf (gdb_stdlog, "gdbarch_stap_integer_prefixes called\n");
   return gdbarch->stap_integer_prefixes;
@@ -4599,7 +4599,7 @@ const char *const *
 gdbarch_stap_integer_suffixes (struct gdbarch *gdbarch)
 {
   gdb_assert (gdbarch != NULL);
-  /* Skip verify of stap_integer_suffixes, invalid_p == 0 */
+  /* Skip verify of stap_integer_suffixes, invalid_p == 0.  */
   if (gdbarch_debug >= 2)
     gdb_printf (gdb_stdlog, "gdbarch_stap_integer_suffixes called\n");
   return gdbarch->stap_integer_suffixes;
@@ -4616,7 +4616,7 @@ const char *const *
 gdbarch_stap_register_prefixes (struct gdbarch *gdbarch)
 {
   gdb_assert (gdbarch != NULL);
-  /* Skip verify of stap_register_prefixes, invalid_p == 0 */
+  /* Skip verify of stap_register_prefixes, invalid_p == 0.  */
   if (gdbarch_debug >= 2)
     gdb_printf (gdb_stdlog, "gdbarch_stap_register_prefixes called\n");
   return gdbarch->stap_register_prefixes;
@@ -4633,7 +4633,7 @@ const char *const *
 gdbarch_stap_register_suffixes (struct gdbarch *gdbarch)
 {
   gdb_assert (gdbarch != NULL);
-  /* Skip verify of stap_register_suffixes, invalid_p == 0 */
+  /* Skip verify of stap_register_suffixes, invalid_p == 0.  */
   if (gdbarch_debug >= 2)
     gdb_printf (gdb_stdlog, "gdbarch_stap_register_suffixes called\n");
   return gdbarch->stap_register_suffixes;
@@ -4650,7 +4650,7 @@ const char *const *
 gdbarch_stap_register_indirection_prefixes (struct gdbarch *gdbarch)
 {
   gdb_assert (gdbarch != NULL);
-  /* Skip verify of stap_register_indirection_prefixes, invalid_p == 0 */
+  /* Skip verify of stap_register_indirection_prefixes, invalid_p == 0.  */
   if (gdbarch_debug >= 2)
     gdb_printf (gdb_stdlog, "gdbarch_stap_register_indirection_prefixes called\n");
   return gdbarch->stap_register_indirection_prefixes;
@@ -4667,7 +4667,7 @@ const char *const *
 gdbarch_stap_register_indirection_suffixes (struct gdbarch *gdbarch)
 {
   gdb_assert (gdbarch != NULL);
-  /* Skip verify of stap_register_indirection_suffixes, invalid_p == 0 */
+  /* Skip verify of stap_register_indirection_suffixes, invalid_p == 0.  */
   if (gdbarch_debug >= 2)
     gdb_printf (gdb_stdlog, "gdbarch_stap_register_indirection_suffixes called\n");
   return gdbarch->stap_register_indirection_suffixes;
@@ -4684,7 +4684,7 @@ const char *
 gdbarch_stap_gdb_register_prefix (struct gdbarch *gdbarch)
 {
   gdb_assert (gdbarch != NULL);
-  /* Skip verify of stap_gdb_register_prefix, invalid_p == 0 */
+  /* Skip verify of stap_gdb_register_prefix, invalid_p == 0.  */
   if (gdbarch_debug >= 2)
     gdb_printf (gdb_stdlog, "gdbarch_stap_gdb_register_prefix called\n");
   return gdbarch->stap_gdb_register_prefix;
@@ -4701,7 +4701,7 @@ const char *
 gdbarch_stap_gdb_register_suffix (struct gdbarch *gdbarch)
 {
   gdb_assert (gdbarch != NULL);
-  /* Skip verify of stap_gdb_register_suffix, invalid_p == 0 */
+  /* Skip verify of stap_gdb_register_suffix, invalid_p == 0.  */
   if (gdbarch_debug >= 2)
     gdb_printf (gdb_stdlog, "gdbarch_stap_gdb_register_suffix called\n");
   return gdbarch->stap_gdb_register_suffix;
@@ -4886,7 +4886,7 @@ int
 gdbarch_has_global_solist (struct gdbarch *gdbarch)
 {
   gdb_assert (gdbarch != NULL);
-  /* Skip verify of has_global_solist, invalid_p == 0 */
+  /* Skip verify of has_global_solist, invalid_p == 0.  */
   if (gdbarch_debug >= 2)
     gdb_printf (gdb_stdlog, "gdbarch_has_global_solist called\n");
   return gdbarch->has_global_solist;
@@ -4903,7 +4903,7 @@ int
 gdbarch_has_global_breakpoints (struct gdbarch *gdbarch)
 {
   gdb_assert (gdbarch != NULL);
-  /* Skip verify of has_global_breakpoints, invalid_p == 0 */
+  /* Skip verify of has_global_breakpoints, invalid_p == 0.  */
   if (gdbarch_debug >= 2)
     gdb_printf (gdb_stdlog, "gdbarch_has_global_breakpoints called\n");
   return gdbarch->has_global_breakpoints;
@@ -5005,7 +5005,7 @@ const char *
 gdbarch_solib_symbols_extension (struct gdbarch *gdbarch)
 {
   gdb_assert (gdbarch != NULL);
-  /* Skip verify of solib_symbols_extension, invalid_p == 0 */
+  /* Skip verify of solib_symbols_extension, invalid_p == 0.  */
   if (gdbarch_debug >= 2)
     gdb_printf (gdb_stdlog, "gdbarch_solib_symbols_extension called\n");
   return gdbarch->solib_symbols_extension;
@@ -5022,7 +5022,7 @@ int
 gdbarch_has_dos_based_file_system (struct gdbarch *gdbarch)
 {
   gdb_assert (gdbarch != NULL);
-  /* Skip verify of has_dos_based_file_system, invalid_p == 0 */
+  /* Skip verify of has_dos_based_file_system, invalid_p == 0.  */
   if (gdbarch_debug >= 2)
     gdb_printf (gdb_stdlog, "gdbarch_has_dos_based_file_system called\n");
   return gdbarch->has_dos_based_file_system;
@@ -5121,7 +5121,7 @@ struct ravenscar_arch_ops *
 gdbarch_ravenscar_ops (struct gdbarch *gdbarch)
 {
   gdb_assert (gdbarch != NULL);
-  /* Skip verify of ravenscar_ops, invalid_p == 0 */
+  /* Skip verify of ravenscar_ops, invalid_p == 0.  */
   if (gdbarch_debug >= 2)
     gdb_printf (gdb_stdlog, "gdbarch_ravenscar_ops called\n");
   return gdbarch->ravenscar_ops;
@@ -5349,7 +5349,7 @@ const char *
 gdbarch_disassembler_options_implicit (struct gdbarch *gdbarch)
 {
   gdb_assert (gdbarch != NULL);
-  /* Skip verify of disassembler_options_implicit, invalid_p == 0 */
+  /* Skip verify of disassembler_options_implicit, invalid_p == 0.  */
   if (gdbarch_debug >= 2)
     gdb_printf (gdb_stdlog, "gdbarch_disassembler_options_implicit called\n");
   return gdbarch->disassembler_options_implicit;
@@ -5366,7 +5366,7 @@ std::string *
 gdbarch_disassembler_options (struct gdbarch *gdbarch)
 {
   gdb_assert (gdbarch != NULL);
-  /* Skip verify of disassembler_options, invalid_p == 0 */
+  /* Skip verify of disassembler_options, invalid_p == 0.  */
   if (gdbarch_debug >= 2)
     gdb_printf (gdb_stdlog, "gdbarch_disassembler_options called\n");
   return gdbarch->disassembler_options;
@@ -5383,7 +5383,7 @@ const disasm_options_and_args_t *
 gdbarch_valid_disassembler_options (struct gdbarch *gdbarch)
 {
   gdb_assert (gdbarch != NULL);
-  /* Skip verify of valid_disassembler_options, invalid_p == 0 */
+  /* Skip verify of valid_disassembler_options, invalid_p == 0.  */
   if (gdbarch_debug >= 2)
     gdb_printf (gdb_stdlog, "gdbarch_valid_disassembler_options called\n");
   return gdbarch->valid_disassembler_options;
diff --git a/gdb/gdbarch.h b/gdb/gdbarch.h
index 5175ef7..60a0f60 100644
--- a/gdb/gdbarch.h
+++ b/gdb/gdbarch.h
@@ -316,7 +316,7 @@ extern obstack *gdbarch_obstack (gdbarch *arch);
 
 extern char *gdbarch_obstack_strdup (struct gdbarch *arch, const char *string);
 
-/* Helper function.  Force an update of the current architecture.
+/* Helper function.  Force an update of INF's architecture.
 
    The actual architecture selected is determined by INFO, ``(gdb) set
    architecture'' et.al., the existing architecture and BFD's default
@@ -325,8 +325,7 @@ extern char *gdbarch_obstack_strdup (struct gdbarch *arch, const char *string);
 
    Returns non-zero if the update succeeds.  */
 
-extern int gdbarch_update_p (struct gdbarch_info info);
-
+extern int gdbarch_update_p (inferior *inf, gdbarch_info info);
 
 /* Helper function.  Find an architecture matching info.
 
diff --git a/gdb/gdbarch.py b/gdb/gdbarch.py
index 4b4db66..dd1658d 100755
--- a/gdb/gdbarch.py
+++ b/gdb/gdbarch.py
@@ -119,7 +119,7 @@ with open("gdbarch-gen.h", "w") as f:
                 file=f,
             )
 
-with open("gdbarch.c", "w") as f:
+with open("gdbarch-gen.c", "w") as f:
     print(copyright, file=f)
     print(file=f)
     print(file=f)
@@ -233,7 +233,7 @@ with open("gdbarch.c", "w") as f:
                 print(f"  if (gdbarch->{c.name} == {init_value})", file=f)
                 print(f"""    log.puts ("\\n\\t{c.name}");""", file=f)
         else:
-            print(f"  /* Skip verify of {c.name}, invalid_p == 0 */", file=f)
+            print(f"  /* Skip verify of {c.name}, invalid_p == 0.  */", file=f)
     print("  if (!log.empty ())", file=f)
     print(
         """    internal_error (_("verify_gdbarch: the following are invalid ...%s"),""",
@@ -361,7 +361,7 @@ with open("gdbarch.c", "w") as f:
                 print("  /* Check variable changed from its initial value.  */", file=f)
                 print(f"  gdb_assert (gdbarch->{c.name} != {init_value});", file=f)
             else:
-                print(f"  /* Skip verify of {c.name}, invalid_p == 0 */", file=f)
+                print(f"  /* Skip verify of {c.name}, invalid_p == 0.  */", file=f)
             print("  if (gdbarch_debug >= 2)", file=f)
             print(
                 f"""    gdb_printf (gdb_stdlog, "gdbarch_{c.name} called\\n");""",
diff --git a/gdb/gdbcore.h b/gdb/gdbcore.h
index d6aeb35..782643a 100644
--- a/gdb/gdbcore.h
+++ b/gdb/gdbcore.h
@@ -196,4 +196,70 @@ private:
   std::string m_storage;
 };
 
+/* Type returned from core_target_find_mapped_file.  Holds information
+   about a mapped file that was processed when a core file was initially
+   loaded.  */
+struct core_target_mapped_file_info
+{
+  /* Constructor.  BUILD_ID is not nullptr, and is the build-id for the
+     mapped file.  FILENAME is the location of the file that GDB loaded to
+     provide the mapped file.  This might be different from the name of the
+     mapped file mentioned in the core file, e.g. if GDB downloads a file
+     from debuginfod then FILENAME would point into the debuginfod client
+     cache.  The FILENAME can be the empty string if GDB was unable to find
+     a file to provide the mapped file.  */
+
+  core_target_mapped_file_info (const bfd_build_id *build_id,
+				const std::string filename)
+    : m_build_id (build_id),
+      m_filename (filename)
+  {
+    gdb_assert (m_build_id != nullptr);
+  }
+
+  /* The build-id for this mapped file.  */
+
+  const bfd_build_id *
+  build_id () const
+  {
+    return m_build_id;
+  }
+
+  /* The file GDB used to provide this mapped file.  */
+
+  const std::string &
+  filename () const
+  {
+    return m_filename;
+  }
+
+private:
+  const bfd_build_id *m_build_id = nullptr;
+  const std::string m_filename;
+};
+
+/* If the current inferior has a core_target for its process target, then
+   lookup information about a mapped file that was discovered when the
+   core file was loaded.
+
+   The FILENAME is the file we're looking for.  The ADDR, if provided, is a
+   mapped address within the inferior which is known to be part of the file
+   we are looking for.
+
+   As an example, when loading shared libraries this function can be
+   called, in that case FILENAME will be the name of the shared library
+   that GDB is trying to load and ADDR will be an inferior address which is
+   part of the shared library we are looking for.
+
+   This function looks for a mapped file which matches FILENAME and/or
+   which covers ADDR and returns information about that file.
+
+   The returned information includes the name of the mapped file if known
+   and the build-id for the mapped file if known.
+
+   */
+std::optional<core_target_mapped_file_info>
+core_target_find_mapped_file (const char *filename,
+			      std::optional<CORE_ADDR> addr);
+
 #endif /* !defined (GDBCORE_H) */
diff --git a/gdb/gdbtypes.c b/gdb/gdbtypes.c
index f39fe3d..323f15d 100644
--- a/gdb/gdbtypes.c
+++ b/gdb/gdbtypes.c
@@ -631,7 +631,7 @@ address_space_name_to_type_instance_flags (struct gdbarch *gdbarch,
 }
 
 /* Identify address space identifier by type_instance_flags and return
-   the string version of the adress space name.  */
+   the string version of the address space name.  */
 
 const char *
 address_space_type_instance_flags_to_name (struct gdbarch *gdbarch,
@@ -733,7 +733,7 @@ make_type_with_address_space (struct type *type,
    If TYPEPTR and *TYPEPTR are non-zero, then *TYPEPTR points to
    storage to hold the new qualified type; *TYPEPTR and TYPE must be
    in the same objfile.  Otherwise, allocate fresh memory for the new
-   type whereever TYPE lives.  If TYPEPTR is non-zero, set it to the
+   type wherever TYPE lives.  If TYPEPTR is non-zero, set it to the
    new type we construct.  */
 
 struct type *
@@ -816,7 +816,7 @@ make_atomic_type (struct type *type)
 
 /* Replace the contents of ntype with the type *type.  This changes the
    contents, rather than the pointer for TYPE_MAIN_TYPE (ntype); thus
-   the changes are propogated to all types in the TYPE_CHAIN.
+   the changes are propagated to all types in the TYPE_CHAIN.
 
    In order to build recursive types, it's inevitable that we'll need
    to update types in place --- but this sort of indiscriminate
@@ -1371,7 +1371,7 @@ create_array_type_with_stride (type_allocator &alloc,
 	 undefined by setting it to zero.  Although we are not expected
 	 to trust TYPE_LENGTH in this case, setting the size to zero
 	 allows us to avoid allocating objects of random sizes in case
-	 we accidently do.  */
+	 we accidentally do.  */
       result_type->set_length (0);
     }
 
@@ -1553,7 +1553,7 @@ set_type_self_type (struct type *type, struct type *self_type)
 }
 
 /* Smash TYPE to be a type of pointers to members of SELF_TYPE with type
-   TO_TYPE.  A member pointer is a wierd thing -- it amounts to a
+   TO_TYPE.  A member pointer is a weird thing -- it amounts to a
    typed offset into a struct, e.g. "an int at offset 8".  A MEMBER
    TYPE doesn't include the offset (that's the value of the MEMBER
    itself), but does include the structure type into which it points
diff --git a/gdb/glibc-tdep.c b/gdb/glibc-tdep.c
index 48e080a..e3bf00c 100644
--- a/gdb/glibc-tdep.c
+++ b/gdb/glibc-tdep.c
@@ -52,18 +52,20 @@ glibc_skip_solib_resolver (struct gdbarch *gdbarch, CORE_ADDR pc)
      of GNU/Linux will provide a portable, efficient interface for
      debugging programs that use shared libraries.  */
 
-  struct bound_minimal_symbol resolver 
-    = lookup_bound_minimal_symbol ("_dl_runtime_resolve");
+  bound_minimal_symbol resolver
+    = lookup_minimal_symbol (current_program_space, "_dl_runtime_resolve");
 
   if (resolver.minsym)
     {
       /* The dynamic linker began using this name in early 2005.  */
-      struct bound_minimal_symbol fixup
-	= lookup_minimal_symbol ("_dl_fixup", NULL, resolver.objfile);
-      
+      bound_minimal_symbol fixup
+	= lookup_minimal_symbol (current_program_space, "_dl_fixup",
+				 resolver.objfile);
+
       /* This is the name used in older versions.  */
       if (! fixup.minsym)
-	fixup = lookup_minimal_symbol ("fixup", NULL, resolver.objfile);
+	fixup = lookup_minimal_symbol (current_program_space, "fixup",
+				       resolver.objfile);
 
       if (fixup.minsym && fixup.value_address () == pc)
 	return frame_unwind_caller_pc (get_current_frame ());
diff --git a/gdb/gnu-nat.c b/gdb/gnu-nat.c
index 7f1614c..6cfac08 100644
--- a/gdb/gnu-nat.c
+++ b/gdb/gnu-nat.c
@@ -1221,7 +1221,7 @@ inf_update_signal_thread (struct inf *inf)
 }
 
 
-/* Detachs from INF's inferior task, letting it run once again...  */
+/* Detach from INF's inferior task, letting it run once again...  */
 void
 gnu_nat_target::inf_detach (struct inf *inf)
 {
diff --git a/gdb/gnu-v2-abi.c b/gdb/gnu-v2-abi.c
index 7b511ea..0a9c09e 100644
--- a/gdb/gnu-v2-abi.c
+++ b/gdb/gnu-v2-abi.c
@@ -186,7 +186,6 @@ gnuv2_value_rtti_type (struct value *v, int *full, LONGEST *top, int *using_enc)
   struct type *known_type;
   struct type *rtti_type;
   CORE_ADDR vtbl;
-  struct bound_minimal_symbol minsym;
   char *p;
   const char *linkage_name;
   struct type *btype;
@@ -239,7 +238,7 @@ gnuv2_value_rtti_type (struct value *v, int *full, LONGEST *top, int *using_enc)
   vtbl = value_as_address (value_field (v, known_type_vptr_fieldno));
 
   /* Try to find a symbol that is the vtable.  */
-  minsym=lookup_minimal_symbol_by_pc(vtbl);
+  bound_minimal_symbol minsym = lookup_minimal_symbol_by_pc (vtbl);
   if (minsym.minsym==NULL
       || (linkage_name=minsym.minsym->linkage_name ())==NULL
       || !is_vtable_name (linkage_name))
diff --git a/gdb/gnu-v3-abi.c b/gdb/gnu-v3-abi.c
index 1311a99..aefbee5 100644
--- a/gdb/gnu-v3-abi.c
+++ b/gdb/gnu-v3-abi.c
@@ -1161,7 +1161,7 @@ gnuv3_get_typeid (struct value *value)
     {
       std::string sym_name = std::string ("typeinfo for ") + name;
       bound_minimal_symbol minsym
-	= lookup_minimal_symbol (sym_name.c_str (), NULL, NULL);
+	= lookup_minimal_symbol (current_program_space, sym_name.c_str ());
 
       if (minsym.minsym == NULL)
 	error (_("could not find typeinfo symbol for '%s'"), name);
@@ -1178,14 +1178,13 @@ static std::string
 gnuv3_get_typename_from_type_info (struct value *type_info_ptr)
 {
   struct gdbarch *gdbarch = type_info_ptr->type ()->arch ();
-  struct bound_minimal_symbol typeinfo_sym;
   CORE_ADDR addr;
   const char *symname;
   const char *class_name;
   const char *atsign;
 
   addr = value_as_address (type_info_ptr);
-  typeinfo_sym = lookup_minimal_symbol_by_pc (addr);
+  bound_minimal_symbol typeinfo_sym = lookup_minimal_symbol_by_pc (addr);
   if (typeinfo_sym.minsym == NULL)
     error (_("could not find minimal symbol for typeinfo address %s"),
 	   paddress (gdbarch, addr));
@@ -1229,7 +1228,6 @@ gnuv3_skip_trampoline (const frame_info_ptr &frame, CORE_ADDR stop_pc)
 {
   CORE_ADDR real_stop_pc, method_stop_pc, func_addr;
   struct gdbarch *gdbarch = get_frame_arch (frame);
-  struct bound_minimal_symbol thunk_sym, fn_sym;
   struct obj_section *section;
   const char *thunk_name, *fn_name;
   
@@ -1238,7 +1236,7 @@ gnuv3_skip_trampoline (const frame_info_ptr &frame, CORE_ADDR stop_pc)
     real_stop_pc = stop_pc;
 
   /* Find the linker symbol for this potential thunk.  */
-  thunk_sym = lookup_minimal_symbol_by_pc (real_stop_pc);
+  bound_minimal_symbol thunk_sym = lookup_minimal_symbol_by_pc (real_stop_pc);
   section = find_pc_section (real_stop_pc);
   if (thunk_sym.minsym == NULL || section == NULL)
     return 0;
@@ -1251,7 +1249,8 @@ gnuv3_skip_trampoline (const frame_info_ptr &frame, CORE_ADDR stop_pc)
     return 0;
 
   fn_name = strstr (thunk_name, " thunk to ") + strlen (" thunk to ");
-  fn_sym = lookup_minimal_symbol (fn_name, NULL, section->objfile);
+  bound_minimal_symbol fn_sym
+    = lookup_minimal_symbol (current_program_space, fn_name, section->objfile);
   if (fn_sym.minsym == NULL)
     return 0;
 
diff --git a/gdb/go-exp.y b/gdb/go-exp.y
index 115c71b..8fd6737 100644
--- a/gdb/go-exp.y
+++ b/gdb/go-exp.y
@@ -569,11 +569,10 @@ variable:	name_not_typename
 			    }
 			  else
 			    {
-			      struct bound_minimal_symbol msymbol;
 			      std::string arg = copy_name ($1.stoken);
 
-			      msymbol =
-				lookup_bound_minimal_symbol (arg.c_str ());
+			      bound_minimal_symbol msymbol =
+				lookup_minimal_symbol (current_program_space, arg.c_str ());
 			      if (msymbol.minsym != NULL)
 				pstate->push_new<var_msym_value_operation>
 				  (msymbol);
diff --git a/gdb/go-lang.c b/gdb/go-lang.c
index 8b4250b..18d3fc1 100644
--- a/gdb/go-lang.c
+++ b/gdb/go-lang.c
@@ -54,9 +54,8 @@ static const char GO_MAIN_MAIN[] = "main.main";
 const char *
 go_main_name (void)
 {
-  struct bound_minimal_symbol msym;
-
-  msym = lookup_minimal_symbol (GO_MAIN_MAIN, NULL, NULL);
+  bound_minimal_symbol msym
+    = lookup_minimal_symbol (current_program_space, GO_MAIN_MAIN);
   if (msym.minsym != NULL)
     return GO_MAIN_MAIN;
 
diff --git a/gdb/guile/guile.c b/gdb/guile/guile.c
index dbbb96e..432093b 100644
--- a/gdb/guile/guile.c
+++ b/gdb/guile/guile.c
@@ -124,6 +124,7 @@ static const struct extension_language_ops guile_extension_ops =
   gdbscm_apply_val_pretty_printer,
 
   NULL, /* gdbscm_apply_frame_filter, */
+  NULL, /* gdbscm_load_ptwrite_filter, */
 
   gdbscm_preserve_values,
 
diff --git a/gdb/guile/scm-cmd.c b/gdb/guile/scm-cmd.c
index 2a55076..8255529 100644
--- a/gdb/guile/scm-cmd.c
+++ b/gdb/guile/scm-cmd.c
@@ -110,7 +110,7 @@ struct cmdscm_completer
 static const struct cmdscm_completer cmdscm_completers[] =
 {
   { "COMPLETE_NONE", noop_completer },
-  { "COMPLETE_FILENAME", filename_completer },
+  { "COMPLETE_FILENAME", filename_maybe_quoted_completer },
   { "COMPLETE_LOCATION", location_completer },
   { "COMPLETE_COMMAND", command_completer },
   { "COMPLETE_SYMBOL", symbol_completer },
diff --git a/gdb/hppa-tdep.c b/gdb/hppa-tdep.c
index c15a9fc..ad93c2b 100644
--- a/gdb/hppa-tdep.c
+++ b/gdb/hppa-tdep.c
@@ -194,9 +194,8 @@ hppa_extract_17 (unsigned word)
 CORE_ADDR 
 hppa_symbol_address(const char *sym)
 {
-  struct bound_minimal_symbol minsym;
-
-  minsym = lookup_minimal_symbol (sym, NULL, NULL);
+  bound_minimal_symbol minsym
+    = lookup_minimal_symbol (current_program_space, sym);
   if (minsym.minsym)
     return minsym.value_address ();
   else
diff --git a/gdb/i386-darwin-nat.c b/gdb/i386-darwin-nat.c
index 5965599..55c6123 100644
--- a/gdb/i386-darwin-nat.c
+++ b/gdb/i386-darwin-nat.c
@@ -499,7 +499,7 @@ darwin_check_osabi (darwin_inferior *inf, thread_t thread)
       else
 	info.bfd_arch_info = bfd_lookup_arch (bfd_arch_i386,
 					      bfd_mach_i386_i386);
-      gdbarch_update_p (info);
+      gdbarch_update_p (current_inferior (), info);
     }
 }
 
diff --git a/gdb/i386-fbsd-nat.c b/gdb/i386-fbsd-nat.c
index f4538fb..d9f4067 100644
--- a/gdb/i386-fbsd-nat.c
+++ b/gdb/i386-fbsd-nat.c
@@ -254,7 +254,7 @@ i386_fbsd_nat_target::resume (ptid_t ptid, int step, enum gdb_signal signal)
       request = PT_CONTINUE;
     }
 
-  /* An addres of (caddr_t) 1 tells ptrace to continue from where it
+  /* An address of (caddr_t) 1 tells ptrace to continue from where it
      was.  (If GDB wanted it to start some other way, we have already
      written a new PC value to the child.)  */
   if (ptrace (request, pid, (caddr_t) 1,
diff --git a/gdb/i386-linux-nat.c b/gdb/i386-linux-nat.c
index 0e360b1..41c1113 100644
--- a/gdb/i386-linux-nat.c
+++ b/gdb/i386-linux-nat.c
@@ -259,7 +259,7 @@ fill_fpregset (const struct regcache *regcache,
 #ifdef HAVE_PTRACE_GETREGS
 
 /* Fetch all floating-point registers from process/thread TID and store
-   thier values in GDB's register array.  */
+   their values in GDB's register array.  */
 
 static void
 fetch_fpregs (struct regcache *regcache, int tid)
diff --git a/gdb/i386-linux-tdep.c b/gdb/i386-linux-tdep.c
index 6debed2..9dec83a 100644
--- a/gdb/i386-linux-tdep.c
+++ b/gdb/i386-linux-tdep.c
@@ -390,62 +390,6 @@ i386_canonicalize_syscall (int syscall)
 
 #define SIG_CODE_BOUNDARY_FAULT 3
 
-/* i386 GNU/Linux implementation of the report_signal_info
-   gdbarch hook.  Displays information related to MPX bound
-   violations.  */
-void
-i386_linux_report_signal_info (struct gdbarch *gdbarch, struct ui_out *uiout,
-			       enum gdb_signal siggnal)
-{
-  /* -Wmaybe-uninitialized  */
-  CORE_ADDR lower_bound = 0, upper_bound = 0, access = 0;
-  int is_upper;
-  long sig_code = 0;
-
-  if (!i386_mpx_enabled () || siggnal != GDB_SIGNAL_SEGV)
-    return;
-
-  try
-    {
-      /* Sigcode evaluates if the actual segfault is a boundary violation.  */
-      sig_code = parse_and_eval_long ("$_siginfo.si_code\n");
-
-      lower_bound
-	= parse_and_eval_long ("$_siginfo._sifields._sigfault._addr_bnd._lower");
-      upper_bound
-	= parse_and_eval_long ("$_siginfo._sifields._sigfault._addr_bnd._upper");
-      access
-	= parse_and_eval_long ("$_siginfo._sifields._sigfault.si_addr");
-    }
-  catch (const gdb_exception_error &exception)
-    {
-      return;
-    }
-
-  /* If this is not a boundary violation just return.  */
-  if (sig_code != SIG_CODE_BOUNDARY_FAULT)
-    return;
-
-  is_upper = (access > upper_bound ? 1 : 0);
-
-  uiout->text ("\n");
-  if (is_upper)
-    uiout->field_string ("sigcode-meaning", _("Upper bound violation"));
-  else
-    uiout->field_string ("sigcode-meaning", _("Lower bound violation"));
-
-  uiout->text (_(" while accessing address "));
-  uiout->field_core_addr ("bound-access", gdbarch, access);
-
-  uiout->text (_("\nBounds: [lower = "));
-  uiout->field_core_addr ("lower-bound", gdbarch, lower_bound);
-
-  uiout->text (_(", upper = "));
-  uiout->field_core_addr ("upper-bound", gdbarch, upper_bound);
-
-  uiout->text (_("]"));
-}
-
 /* Parse the arguments of current system call instruction and record
    the values of the registers and memory that will be changed into
    "record_arch_list".  This instruction is "int 0x80" (Linux
@@ -608,6 +552,8 @@ int i386_linux_gregset_reg_offset[] =
   -1, -1, -1, -1, -1, -1, -1, -1,
   -1,
   -1, -1, -1, -1, -1, -1, -1, -1,
+  /* MPX is deprecated.  Yet we keep this to not give the registers below
+     a new number.  That could break older gdbservers.  */
   -1, -1, -1, -1,		  /* MPX registers BND0 ... BND3.  */
   -1, -1,			  /* MPX registers BNDCFGU, BNDSTATUS.  */
   -1, -1, -1, -1, -1, -1, -1, -1, /* k0 ... k7 (AVX512)  */
@@ -721,12 +667,6 @@ i386_linux_supply_xstateregset (const struct regset *regset,
   i387_supply_xsave (regcache, regnum, xstateregs);
 }
 
-struct type *
-x86_linux_get_siginfo_type (struct gdbarch *gdbarch)
-{
-  return linux_get_siginfo_type_with_fields (gdbarch, LINUX_SIGINFO_FIELD_ADDR_BND);
-}
-
 /* Similar to i386_collect_fpregset, but use XSAVE extended state.  */
 
 static void
@@ -1064,9 +1004,6 @@ i386_linux_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch)
   set_xml_syscall_file_name (gdbarch, XML_SYSCALL_FILENAME_I386);
   set_gdbarch_get_syscall_number (gdbarch,
 				  i386_linux_get_syscall_number);
-
-  set_gdbarch_get_siginfo_type (gdbarch, x86_linux_get_siginfo_type);
-  set_gdbarch_report_signal_info (gdbarch, i386_linux_report_signal_info);
 }
 
 void _initialize_i386_linux_tdep ();
diff --git a/gdb/i386-linux-tdep.h b/gdb/i386-linux-tdep.h
index e8691cd..e169c1d 100644
--- a/gdb/i386-linux-tdep.h
+++ b/gdb/i386-linux-tdep.h
@@ -49,15 +49,6 @@ extern uint64_t i386_linux_core_read_xsave_info (bfd *abfd,
 extern bool i386_linux_core_read_x86_xsave_layout (struct gdbarch *gdbarch,
 						   x86_xsave_layout &layout);
 
-/* Handle and display information related to the MPX bound violation
-   to the user.  */
-extern void i386_linux_report_signal_info (struct gdbarch *gdbarch,
-					   struct ui_out *uiout,
-					   enum gdb_signal siggnal);
-
 extern int i386_linux_gregset_reg_offset[];
 
-/* Return x86 siginfo type.  */
-extern struct type *x86_linux_get_siginfo_type (struct gdbarch *gdbarch);
-
 #endif /* i386-linux-tdep.h */
diff --git a/gdb/i386-nto-tdep.c b/gdb/i386-nto-tdep.c
deleted file mode 100644
index 6f34415..0000000
--- a/gdb/i386-nto-tdep.c
+++ /dev/null
@@ -1,379 +0,0 @@
-/* Target-dependent code for QNX Neutrino x86.
-
-   Copyright (C) 2003-2024 Free Software Foundation, Inc.
-
-   Contributed by QNX Software Systems Ltd.
-
-   This file is part of GDB.
-
-   This program is free software; you can redistribute it and/or modify
-   it under the terms of the GNU General Public License as published by
-   the Free Software Foundation; either version 3 of the License, or
-   (at your option) any later version.
-
-   This program is distributed in the hope that it will be useful,
-   but WITHOUT ANY WARRANTY; without even the implied warranty of
-   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-   GNU General Public License for more details.
-
-   You should have received a copy of the GNU General Public License
-   along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
-
-#include "extract-store-integer.h"
-#include "frame.h"
-#include "osabi.h"
-#include "regcache.h"
-#include "target.h"
-
-#include "i386-tdep.h"
-#include "i387-tdep.h"
-#include "nto-tdep.h"
-#include "solib.h"
-#include "solib-svr4.h"
-
-#ifndef X86_CPU_FXSR
-#define X86_CPU_FXSR (1L << 12)
-#endif
-
-/* Why 13?  Look in our /usr/include/x86/context.h header at the
-   x86_cpu_registers structure and you'll see an 'exx' junk register
-   that is just filler.  Don't ask me, ask the kernel guys.  */
-#define NUM_GPREGS 13
-
-/* Mapping between the general-purpose registers in `struct xxx'
-   format and GDB's register cache layout.  */
-
-/* From <x86/context.h>.  */
-static int i386nto_gregset_reg_offset[] =
-{
-  7 * 4,			/* %eax */
-  6 * 4,			/* %ecx */
-  5 * 4,			/* %edx */
-  4 * 4,			/* %ebx */
-  11 * 4,			/* %esp */
-  2 * 4,			/* %epb */
-  1 * 4,			/* %esi */
-  0 * 4,			/* %edi */
-  8 * 4,			/* %eip */
-  10 * 4,			/* %eflags */
-  9 * 4,			/* %cs */
-  12 * 4,			/* %ss */
-  -1				/* filler */
-};
-
-/* Given a GDB register number REGNUM, return the offset into
-   Neutrino's register structure or -1 if the register is unknown.  */
-
-static int
-nto_reg_offset (int regnum)
-{
-  if (regnum >= 0 && regnum < ARRAY_SIZE (i386nto_gregset_reg_offset))
-    return i386nto_gregset_reg_offset[regnum];
-
-  return -1;
-}
-
-static void
-i386nto_supply_gregset (struct regcache *regcache, char *gpregs)
-{
-  struct gdbarch *gdbarch = regcache->arch ();
-  i386_gdbarch_tdep *tdep = gdbarch_tdep<i386_gdbarch_tdep> (gdbarch);
-
-  gdb_assert (tdep->gregset_reg_offset == i386nto_gregset_reg_offset);
-  i386_gregset.supply_regset (&i386_gregset, regcache, -1,
-			      gpregs, NUM_GPREGS * 4);
-}
-
-static void
-i386nto_supply_fpregset (struct regcache *regcache, char *fpregs)
-{
-  if (nto_cpuinfo_valid && nto_cpuinfo_flags | X86_CPU_FXSR)
-    i387_supply_fxsave (regcache, -1, fpregs);
-  else
-    i387_supply_fsave (regcache, -1, fpregs);
-}
-
-static void
-i386nto_supply_regset (struct regcache *regcache, int regset, char *data)
-{
-  switch (regset)
-    {
-    case NTO_REG_GENERAL:
-      i386nto_supply_gregset (regcache, data);
-      break;
-    case NTO_REG_FLOAT:
-      i386nto_supply_fpregset (regcache, data);
-      break;
-    }
-}
-
-static int
-i386nto_regset_id (int regno)
-{
-  if (regno == -1)
-    return NTO_REG_END;
-  else if (regno < I386_NUM_GREGS)
-    return NTO_REG_GENERAL;
-  else if (regno < I386_NUM_GREGS + I387_NUM_REGS)
-    return NTO_REG_FLOAT;
-  else if (regno < I386_SSE_NUM_REGS)
-    return NTO_REG_FLOAT; /* We store xmm registers in fxsave_area.  */
-
-  return -1;			/* Error.  */
-}
-
-static int
-i386nto_register_area (struct gdbarch *gdbarch,
-		       int regno, int regset, unsigned *off)
-{
-  i386_gdbarch_tdep *tdep = gdbarch_tdep<i386_gdbarch_tdep> (gdbarch);
-
-  *off = 0;
-  if (regset == NTO_REG_GENERAL)
-    {
-      if (regno == -1)
-	return NUM_GPREGS * 4;
-
-      *off = nto_reg_offset (regno);
-      if (*off == -1)
-	return 0;
-      return 4;
-    }
-  else if (regset == NTO_REG_FLOAT)
-    {
-      unsigned off_adjust, regsize, regset_size, regno_base;
-      /* The following are flags indicating number in our fxsave_area.  */
-      int first_four = (regno >= I387_FCTRL_REGNUM (tdep)
-			&& regno <= I387_FISEG_REGNUM (tdep));
-      int second_four = (regno > I387_FISEG_REGNUM (tdep)
-			 && regno <= I387_FOP_REGNUM (tdep));
-      int st_reg = (regno >= I387_ST0_REGNUM (tdep)
-		    && regno < I387_ST0_REGNUM (tdep) + 8);
-      int xmm_reg = (regno >= I387_XMM0_REGNUM (tdep)
-		     && regno < I387_MXCSR_REGNUM (tdep));
-
-      if (nto_cpuinfo_valid && nto_cpuinfo_flags | X86_CPU_FXSR)
-	{
-	  off_adjust = 32;
-	  regsize = 16;
-	  regset_size = 512;
-	  /* fxsave_area structure.  */
-	  if (first_four)
-	    {
-	      /* fpu_control_word, fpu_status_word, fpu_tag_word, fpu_operand
-		 registers.  */
-	      regsize = 2; /* Two bytes each.  */
-	      off_adjust = 0;
-	      regno_base = I387_FCTRL_REGNUM (tdep);
-	    }
-	  else if (second_four)
-	    {
-	      /* fpu_ip, fpu_cs, fpu_op, fpu_ds registers.  */
-	      regsize = 4;
-	      off_adjust = 8;
-	      regno_base = I387_FISEG_REGNUM (tdep) + 1;
-	    }
-	  else if (st_reg)
-	    {
-	      /* ST registers.  */
-	      regsize = 16;
-	      off_adjust = 32;
-	      regno_base = I387_ST0_REGNUM (tdep);
-	    }
-	  else if (xmm_reg)
-	    {
-	      /* XMM registers.  */
-	      regsize = 16;
-	      off_adjust = 160;
-	      regno_base = I387_XMM0_REGNUM (tdep);
-	    }
-	  else if (regno == I387_MXCSR_REGNUM (tdep))
-	    {
-	      regsize = 4;
-	      off_adjust = 24;
-	      regno_base = I387_MXCSR_REGNUM (tdep);
-	    }
-	  else
-	    {
-	      /* Whole regset.  */
-	      gdb_assert (regno == -1);
-	      off_adjust = 0;
-	      regno_base = 0;
-	      regsize = regset_size;
-	    }
-	}
-      else
-	{
-	  regset_size = 108;
-	  /* fsave_area structure.  */
-	  if (first_four || second_four)
-	    {
-	      /* fpu_control_word, ... , fpu_ds registers.  */
-	      regsize = 4;
-	      off_adjust = 0;
-	      regno_base = I387_FCTRL_REGNUM (tdep);
-	    }
-	  else if (st_reg)
-	    {
-	      /* One of ST registers.  */
-	      regsize = 10;
-	      off_adjust = 7 * 4;
-	      regno_base = I387_ST0_REGNUM (tdep);
-	    }
-	  else
-	    {
-	      /* Whole regset.  */
-	      gdb_assert (regno == -1);
-	      off_adjust = 0;
-	      regno_base = 0;
-	      regsize = regset_size;
-	    }
-	}
-
-      if (regno != -1)
-	*off = off_adjust + (regno - regno_base) * regsize;
-      else
-	*off = 0;
-      return regsize;
-    }
-  return -1;
-}
-
-static int
-i386nto_regset_fill (const struct regcache *regcache, int regset, char *data)
-{
-  if (regset == NTO_REG_GENERAL)
-    {
-      int regno;
-
-      for (regno = 0; regno < NUM_GPREGS; regno++)
-	{
-	  int offset = nto_reg_offset (regno);
-	  if (offset != -1)
-	    regcache->raw_collect (regno, data + offset);
-	}
-    }
-  else if (regset == NTO_REG_FLOAT)
-    {
-      if (nto_cpuinfo_valid && nto_cpuinfo_flags | X86_CPU_FXSR)
-	i387_collect_fxsave (regcache, -1, data);
-      else
-	i387_collect_fsave (regcache, -1, data);
-    }
-  else
-    return -1;
-
-  return 0;
-}
-
-/* Return whether THIS_FRAME corresponds to a QNX Neutrino sigtramp
-   routine.  */
-
-static int
-i386nto_sigtramp_p (const frame_info_ptr &this_frame)
-{
-  CORE_ADDR pc = get_frame_pc (this_frame);
-  const char *name;
-
-  find_pc_partial_function (pc, &name, NULL, NULL);
-  return name && strcmp ("__signalstub", name) == 0;
-}
-
-/* Assuming THIS_FRAME is a QNX Neutrino sigtramp routine, return the
-   address of the associated sigcontext structure.  */
-
-static CORE_ADDR
-i386nto_sigcontext_addr (const frame_info_ptr &this_frame)
-{
-  struct gdbarch *gdbarch = get_frame_arch (this_frame);
-  enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
-  gdb_byte buf[4];
-  CORE_ADDR ptrctx;
-
-  /* We store __ucontext_t addr in EDI register.  */
-  get_frame_register (this_frame, I386_EDI_REGNUM, buf);
-  ptrctx = extract_unsigned_integer (buf, 4, byte_order);
-  ptrctx += 24 /* Context pointer is at this offset.  */;
-
-  return ptrctx;
-}
-
-static void
-init_i386nto_ops (void)
-{
-  nto_regset_id = i386nto_regset_id;
-  nto_supply_gregset = i386nto_supply_gregset;
-  nto_supply_fpregset = i386nto_supply_fpregset;
-  nto_supply_altregset = nto_dummy_supply_regset;
-  nto_supply_regset = i386nto_supply_regset;
-  nto_register_area = i386nto_register_area;
-  nto_regset_fill = i386nto_regset_fill;
-  nto_fetch_link_map_offsets =
-    svr4_ilp32_fetch_link_map_offsets;
-}
-
-static void
-i386nto_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch)
-{
-  i386_gdbarch_tdep *tdep = gdbarch_tdep<i386_gdbarch_tdep> (gdbarch);
-  static solib_ops nto_svr4_so_ops;
-
-  /* Deal with our strange signals.  */
-  nto_initialize_signals ();
-
-  /* NTO uses ELF.  */
-  i386_elf_init_abi (info, gdbarch);
-
-  /* Neutrino rewinds to look more normal.  Need to override the i386
-     default which is [unfortunately] to decrement the PC.  */
-  set_gdbarch_decr_pc_after_break (gdbarch, 0);
-
-  tdep->gregset_reg_offset = i386nto_gregset_reg_offset;
-  tdep->gregset_num_regs = ARRAY_SIZE (i386nto_gregset_reg_offset);
-  tdep->sizeof_gregset = NUM_GPREGS * 4;
-
-  tdep->sigtramp_p = i386nto_sigtramp_p;
-  tdep->sigcontext_addr = i386nto_sigcontext_addr;
-  tdep->sc_reg_offset = i386nto_gregset_reg_offset;
-  tdep->sc_num_regs = ARRAY_SIZE (i386nto_gregset_reg_offset);
-
-  /* Setjmp()'s return PC saved in EDX (5).  */
-  tdep->jb_pc_offset = 20;	/* 5x32 bit ints in.  */
-
-  set_solib_svr4_fetch_link_map_offsets
-    (gdbarch, svr4_ilp32_fetch_link_map_offsets);
-
-  /* Initialize this lazily, to avoid an initialization order
-     dependency on solib-svr4.c's _initialize routine.  */
-  if (nto_svr4_so_ops.in_dynsym_resolve_code == NULL)
-    {
-      nto_svr4_so_ops = svr4_so_ops;
-
-      /* Our loader handles solib relocations differently than svr4.  */
-      nto_svr4_so_ops.relocate_section_addresses
-	= nto_relocate_section_addresses;
-
-      /* Supply a nice function to find our solibs.  */
-      nto_svr4_so_ops.find_and_open_solib
-	= nto_find_and_open_solib;
-
-      /* Our linker code is in libc.  */
-      nto_svr4_so_ops.in_dynsym_resolve_code
-	= nto_in_dynsym_resolve_code;
-    }
-  set_gdbarch_so_ops (gdbarch, &nto_svr4_so_ops);
-
-  set_gdbarch_wchar_bit (gdbarch, 32);
-  set_gdbarch_wchar_signed (gdbarch, 0);
-}
-
-void _initialize_i386nto_tdep ();
-void
-_initialize_i386nto_tdep ()
-{
-  init_i386nto_ops ();
-  gdbarch_register_osabi (bfd_arch_i386, 0, GDB_OSABI_QNXNTO,
-			  i386nto_init_abi);
-  gdbarch_register_osabi_sniffer (bfd_arch_i386, bfd_target_elf_flavour,
-				  nto_elf_osabi_sniffer);
-}
diff --git a/gdb/i386-tdep.c b/gdb/i386-tdep.c
index f1f909e..d2c3efb 100644
--- a/gdb/i386-tdep.c
+++ b/gdb/i386-tdep.c
@@ -117,23 +117,12 @@ static const char * const i386_ymmh_names[] =
   "ymm4h",  "ymm5h",   "ymm6h",  "ymm7h",
 };
 
-static const char * const i386_mpx_names[] =
-{
-  "bnd0raw", "bnd1raw", "bnd2raw", "bnd3raw", "bndcfgu", "bndstatus"
-};
 
 static const char * const i386_pkeys_names[] =
 {
   "pkru"
 };
 
-/* Register names for MPX pseudo-registers.  */
-
-static const char * const i386_bnd_names[] =
-{
-  "bnd0", "bnd1", "bnd2", "bnd3"
-};
-
 /* Register names for MMX pseudo-registers.  */
 
 static const char * const i386_mmx_names[] =
@@ -311,21 +300,6 @@ i386_ymm_avx512_regnum_p (struct gdbarch *gdbarch, int regnum)
   return regnum >= 0 && regnum < tdep->num_ymm_avx512_regs;
 }
 
-/* BND register?  */
-
-int
-i386_bnd_regnum_p (struct gdbarch *gdbarch, int regnum)
-{
-  i386_gdbarch_tdep *tdep = gdbarch_tdep<i386_gdbarch_tdep> (gdbarch);
-  int bnd0_regnum = tdep->bnd0_regnum;
-
-  if (bnd0_regnum < 0)
-    return 0;
-
-  regnum -= bnd0_regnum;
-  return regnum >= 0 && regnum < I387_NUM_BND_REGS;
-}
-
 /* SSE register?  */
 
 int
@@ -393,34 +367,6 @@ i386_fpc_regnum_p (struct gdbarch *gdbarch, int regnum)
 	  && regnum < I387_XMM0_REGNUM (tdep));
 }
 
-/* BNDr (raw) register?  */
-
-static int
-i386_bndr_regnum_p (struct gdbarch *gdbarch, int regnum)
-{
-  i386_gdbarch_tdep *tdep = gdbarch_tdep<i386_gdbarch_tdep> (gdbarch);
-
-   if (I387_BND0R_REGNUM (tdep) < 0)
-     return 0;
-
-  regnum -= tdep->bnd0r_regnum;
-  return regnum >= 0 && regnum < I387_NUM_BND_REGS;
-}
-
-/* BND control register?  */
-
-static int
-i386_mpx_ctrl_regnum_p (struct gdbarch *gdbarch, int regnum)
-{
-  i386_gdbarch_tdep *tdep = gdbarch_tdep<i386_gdbarch_tdep> (gdbarch);
-
-   if (I387_BNDCFGU_REGNUM (tdep) < 0)
-     return 0;
-
-  regnum -= I387_BNDCFGU_REGNUM (tdep);
-  return regnum >= 0 && regnum < I387_NUM_MPX_CTRL_REGS;
-}
-
 /* PKRU register?  */
 
 bool
@@ -463,8 +409,6 @@ const char *
 i386_pseudo_register_name (struct gdbarch *gdbarch, int regnum)
 {
   i386_gdbarch_tdep *tdep = gdbarch_tdep<i386_gdbarch_tdep> (gdbarch);
-  if (i386_bnd_regnum_p (gdbarch, regnum))
-    return i386_bnd_names[regnum - tdep->bnd0_regnum];
   if (i386_mmx_regnum_p (gdbarch, regnum))
     return i386_mmx_names[regnum - I387_MM0_REGNUM (tdep)];
   else if (i386_ymm_regnum_p (gdbarch, regnum))
@@ -1946,12 +1890,11 @@ i386_skip_main_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
 	{
 	  /* Make sure address is computed correctly as a 32bit
 	     integer even if CORE_ADDR is 64 bit wide.  */
-	  struct bound_minimal_symbol s;
 	  CORE_ADDR call_dest;
 
 	  call_dest = pc + 5 + extract_signed_integer (buf, 4, byte_order);
 	  call_dest = call_dest & 0xffffffffU;
-	  s = lookup_minimal_symbol_by_pc (call_dest);
+	  bound_minimal_symbol s = lookup_minimal_symbol_by_pc (call_dest);
 	  if (s.minsym != NULL
 	      && s.minsym->linkage_name () != NULL
 	      && strcmp (s.minsym->linkage_name (), "__main") == 0)
@@ -2739,13 +2682,6 @@ i386_thiscall_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
   int write_pass;
   int args_space = 0;
 
-  /* BND registers can be in arbitrary values at the moment of the
-     inferior call.  This can cause boundary violations that are not
-     due to a real bug or even desired by the user.  The best to be done
-     is set the BND registers to allow access to the whole memory, INIT
-     state, before pushing the inferior call.   */
-  i387_reset_bnd_regs (gdbarch, regcache);
-
   /* Determine the total space required for arguments and struct
      return address in a first pass (allowing for 16-byte-aligned
      arguments), then push arguments in a second pass.  */
@@ -3162,43 +3098,6 @@ i387_ext_type (struct gdbarch *gdbarch)
   return tdep->i387_ext_type;
 }
 
-/* Construct type for pseudo BND registers.  We can't use
-   tdesc_find_type since a complement of one value has to be used
-   to describe the upper bound.  */
-
-static struct type *
-i386_bnd_type (struct gdbarch *gdbarch)
-{
-  i386_gdbarch_tdep *tdep = gdbarch_tdep<i386_gdbarch_tdep> (gdbarch);
-
-
-  if (!tdep->i386_bnd_type)
-    {
-      struct type *t;
-      const struct builtin_type *bt = builtin_type (gdbarch);
-
-      /* The type we're building is described bellow:  */
-#if 0
-      struct __bound128
-      {
-	void *lbound;
-	void *ubound;		/* One complement of raw ubound field.  */
-      };
-#endif
-
-      t = arch_composite_type (gdbarch,
-			       "__gdb_builtin_type_bound128", TYPE_CODE_STRUCT);
-
-      append_composite_type_field (t, "lbound", bt->builtin_data_ptr);
-      append_composite_type_field (t, "ubound", bt->builtin_data_ptr);
-
-      t->set_name ("builtin_type_bound128");
-      tdep->i386_bnd_type = t;
-    }
-
-  return tdep->i386_bnd_type;
-}
-
 /* Construct vector type for pseudo ZMM registers.  We can't use
    tdesc_find_type since ZMM isn't described in target description.  */
 
@@ -3365,8 +3264,6 @@ i386_mmx_type (struct gdbarch *gdbarch)
 struct type *
 i386_pseudo_register_type (struct gdbarch *gdbarch, int regnum)
 {
-  if (i386_bnd_regnum_p (gdbarch, regnum))
-    return i386_bnd_type (gdbarch);
   if (i386_mmx_regnum_p (gdbarch, regnum))
     return i386_mmx_type (gdbarch);
   else if (i386_ymm_regnum_p (gdbarch, regnum))
@@ -3426,39 +3323,7 @@ i386_pseudo_register_read_value (gdbarch *gdbarch, const frame_info_ptr &next_fr
   else
     {
       i386_gdbarch_tdep *tdep = gdbarch_tdep<i386_gdbarch_tdep> (gdbarch);
-      if (i386_bnd_regnum_p (gdbarch, pseudo_reg_num))
-	{
-	  int i = pseudo_reg_num - tdep->bnd0_regnum;
-
-	  /* Extract (always little endian).  Read lower 128bits.  */
-	  value *bndr_value
-	    = value_of_register (I387_BND0R_REGNUM (tdep) + i, next_frame);
-	  int size = builtin_type (gdbarch)->builtin_data_ptr->length ();
-	  value *result
-	    = value::allocate_register (next_frame, pseudo_reg_num);
-
-	  /* Copy the lower. */
-	  bndr_value->contents_copy (result, 0, 0, size);
-
-	  /* Copy the upper.  */
-	  bndr_value->contents_copy (result, size, 8, size);
-
-	  /* If upper bytes are available, compute ones' complement.  */
-	  if (result->bytes_available (size, size))
-	    {
-	      bfd_endian byte_order
-		= gdbarch_byte_order (frame_unwind_arch (next_frame));
-	      gdb::array_view<gdb_byte> upper_bytes
-		= result->contents_raw ().slice (size, size);
-	      ULONGEST upper
-		= extract_unsigned_integer (upper_bytes, byte_order);
-	      upper = ~upper;
-	      store_unsigned_integer (upper_bytes, byte_order, upper);
-	    }
-
-	  return result;
-	}
-      else if (i386_zmm_regnum_p (gdbarch, pseudo_reg_num))
+      if (i386_zmm_regnum_p (gdbarch, pseudo_reg_num))
 	{
 	  /* Which register is it, relative to zmm0.  */
 	  int i_0 = pseudo_reg_num - tdep->zmm0_regnum;
@@ -3531,33 +3396,7 @@ i386_pseudo_register_write (gdbarch *gdbarch, const frame_info_ptr &next_frame,
     {
       i386_gdbarch_tdep *tdep = gdbarch_tdep<i386_gdbarch_tdep> (gdbarch);
 
-      if (i386_bnd_regnum_p (gdbarch, pseudo_reg_num))
-	{
-	  int size = builtin_type (gdbarch)->builtin_data_ptr->length ();
-	  bfd_endian byte_order
-	    = gdbarch_byte_order (current_inferior ()->arch ());
-
-	  /* New values from input value.  */
-	  int reg_index = pseudo_reg_num - tdep->bnd0_regnum;
-	  int raw_regnum = I387_BND0R_REGNUM (tdep) + reg_index;
-
-	  value *bndr_value = value_of_register (raw_regnum, next_frame);
-	  gdb::array_view<gdb_byte> bndr_view
-	    = bndr_value->contents_writeable ();
-
-	  /* Copy lower bytes directly.  */
-	  copy (buf.slice (0, size), bndr_view.slice (0, size));
-
-	  /* Convert and then copy upper bytes.  */
-	  ULONGEST upper
-	    = extract_unsigned_integer (buf.slice (size, size), byte_order);
-	  upper = ~upper;
-	  store_unsigned_integer (bndr_view.slice (8, size), byte_order,
-				  upper);
-
-	  put_frame_register (next_frame, raw_regnum, bndr_view);
-	}
-      else if (i386_zmm_regnum_p (gdbarch, pseudo_reg_num))
+      if (i386_zmm_regnum_p (gdbarch, pseudo_reg_num))
 	{
 	  /* Which register is it, relative to zmm0.  */
 	  int reg_index_0 = pseudo_reg_num - tdep->zmm0_regnum;
@@ -3628,12 +3467,6 @@ i386_ax_pseudo_register_collect (struct gdbarch *gdbarch,
 	ax_reg_mask (ax, I387_ST0_REGNUM (tdep) + i);
       return 0;
     }
-  else if (i386_bnd_regnum_p (gdbarch, regnum))
-    {
-      regnum -= tdep->bnd0_regnum;
-      ax_reg_mask (ax, I387_BND0R_REGNUM (tdep) + regnum);
-      return 0;
-    }
   else if (i386_zmm_regnum_p (gdbarch, regnum))
     {
       regnum -= tdep->zmm0_regnum;
@@ -4481,9 +4314,8 @@ i386_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
   const i386_gdbarch_tdep *tdep = gdbarch_tdep<i386_gdbarch_tdep> (gdbarch);
   int fp_regnum_p, mmx_regnum_p, xmm_regnum_p, mxcsr_regnum_p,
       ymm_regnum_p, ymmh_regnum_p, ymm_avx512_regnum_p, ymmh_avx512_regnum_p,
-      bndr_regnum_p, bnd_regnum_p, zmm_regnum_p, zmmh_regnum_p,
-      mpx_ctrl_regnum_p, xmm_avx512_regnum_p,
-      avx512_p, avx_p, sse_p, pkru_regnum_p;
+      zmm_regnum_p, zmmh_regnum_p, xmm_avx512_regnum_p, avx512_p, avx_p,
+      sse_p, pkru_regnum_p;
 
   /* Don't include pseudo registers, except for MMX, in any register
      groups.  */
@@ -4543,21 +4375,6 @@ i386_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
 	  || zmmh_regnum_p))
     return 0;
 
-  bnd_regnum_p = i386_bnd_regnum_p (gdbarch, regnum);
-  if (group == all_reggroup
-      && ((bnd_regnum_p && (tdep->xcr0 & X86_XSTATE_MPX_MASK))))
-    return bnd_regnum_p;
-
-  bndr_regnum_p = i386_bndr_regnum_p (gdbarch, regnum);
-  if (group == all_reggroup
-      && ((bndr_regnum_p && (tdep->xcr0 & X86_XSTATE_MPX_MASK))))
-    return 0;
-
-  mpx_ctrl_regnum_p = i386_mpx_ctrl_regnum_p (gdbarch, regnum);
-  if (group == all_reggroup
-      && ((mpx_ctrl_regnum_p && (tdep->xcr0 & X86_XSTATE_MPX_MASK))))
-    return mpx_ctrl_regnum_p;
-
   if (group == general_reggroup)
     return (!fp_regnum_p
 	    && !mmx_regnum_p
@@ -4568,9 +4385,6 @@ i386_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
 	    && !ymmh_regnum_p
 	    && !ymm_avx512_regnum_p
 	    && !ymmh_avx512_regnum_p
-	    && !bndr_regnum_p
-	    && !bnd_regnum_p
-	    && !mpx_ctrl_regnum_p
 	    && !zmm_regnum_p
 	    && !zmmh_regnum_p
 	    && !pkru_regnum_p);
@@ -8187,7 +8001,7 @@ i386_xcr0_from_tdesc (const struct target_desc *tdesc)
 
   const struct tdesc_feature *feature_core;
 
-  const struct tdesc_feature *feature_sse, *feature_avx, *feature_mpx,
+  const struct tdesc_feature *feature_sse, *feature_avx,
 			     *feature_avx512, *feature_pkeys;
 
   /* Get core registers.  */
@@ -8201,9 +8015,6 @@ i386_xcr0_from_tdesc (const struct target_desc *tdesc)
   /* Try AVX registers.  */
   feature_avx = tdesc_find_feature (tdesc, "org.gnu.gdb.i386.avx");
 
-  /* Try MPX registers.  */
-  feature_mpx = tdesc_find_feature (tdesc, "org.gnu.gdb.i386.mpx");
-
   /* Try AVX512 registers.  */
   feature_avx512 = tdesc_find_feature (tdesc, "org.gnu.gdb.i386.avx512");
 
@@ -8225,9 +8036,6 @@ i386_xcr0_from_tdesc (const struct target_desc *tdesc)
       xcr0 |= X86_XSTATE_AVX;
     }
 
-  if (feature_mpx)
-    xcr0 |= X86_XSTATE_MPX_MASK;
-
   if (feature_avx512)
     {
       /* AVX512 register description requires AVX register description.  */
@@ -8250,8 +8058,8 @@ i386_validate_tdesc_p (i386_gdbarch_tdep *tdep,
   const struct target_desc *tdesc = tdep->tdesc;
   const struct tdesc_feature *feature_core;
 
-  const struct tdesc_feature *feature_sse, *feature_avx, *feature_mpx,
-			     *feature_avx512, *feature_pkeys, *feature_segments;
+  const struct tdesc_feature *feature_sse, *feature_avx, *feature_avx512,
+			     *feature_pkeys, *feature_segments;
   int i, num_regs, valid_p;
 
   if (! tdesc_has_registers (tdesc))
@@ -8268,9 +8076,6 @@ i386_validate_tdesc_p (i386_gdbarch_tdep *tdep,
   /* Try AVX registers.  */
   feature_avx = tdesc_find_feature (tdesc, "org.gnu.gdb.i386.avx");
 
-  /* Try MPX registers.  */
-  feature_mpx = tdesc_find_feature (tdesc, "org.gnu.gdb.i386.mpx");
-
   /* Try AVX512 registers.  */
   feature_avx512 = tdesc_find_feature (tdesc, "org.gnu.gdb.i386.avx512");
 
@@ -8369,23 +8174,6 @@ i386_validate_tdesc_p (i386_gdbarch_tdep *tdep,
 					    tdep->register_names[i]);
     }
 
-  if (feature_mpx)
-    {
-      tdep->xcr0 |= X86_XSTATE_MPX_MASK;
-
-      if (tdep->bnd0r_regnum < 0)
-	{
-	  tdep->mpx_register_names = i386_mpx_names;
-	  tdep->bnd0r_regnum = I386_BND0R_REGNUM;
-	  tdep->bndcfgu_regnum = I386_BNDCFGU_REGNUM;
-	}
-
-      for (i = 0; i < I387_NUM_MPX_REGS; i++)
-	valid_p &= tdesc_numbered_register (feature_mpx, tdesc_data,
-	    I387_BND0R_REGNUM (tdep) + i,
-	    tdep->mpx_register_names[i]);
-    }
-
   if (feature_segments)
     {
       if (tdep->fsbase_regnum < 0)
@@ -8449,8 +8237,6 @@ i386_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
   const struct target_desc *tdesc;
   int mm0_regnum;
   int ymm0_regnum;
-  int bnd0_regnum;
-  int num_bnd_cooked;
 
   x86_xsave_layout xsave_layout = target_fetch_x86_xsave_layout ();
 
@@ -8499,7 +8285,7 @@ i386_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
 
   tdep->st0_regnum = I386_ST0_REGNUM;
 
-  /* I386_NUM_XREGS includes %mxcsr, so substract one.  */
+  /* I386_NUM_XREGS includes %mxcsr, so subtract one.  */
   tdep->num_xmm_regs = I386_NUM_XREGS - 1;
 
   tdep->jb_pc_offset = -1;
@@ -8656,7 +8442,7 @@ i386_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
 
   /* Even though the default ABI only includes general-purpose registers,
      floating-point registers and the SSE registers, we have to leave a
-     gap for the upper AVX, MPX and AVX512 registers.  */
+     gap for the upper AVX, (deprecated) MPX and AVX512 registers.  */
   set_gdbarch_num_regs (gdbarch, I386_NUM_REGS);
 
   set_gdbarch_gnu_triplet_regexp (gdbarch, i386_gnu_triplet_regexp);
@@ -8692,10 +8478,6 @@ i386_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
   tdep->num_mmx_regs = 8;
   tdep->num_ymm_regs = 0;
 
-  /* No MPX registers.  */
-  tdep->bnd0r_regnum = -1;
-  tdep->bndcfgu_regnum = -1;
-
   /* No AVX512 registers.  */
   tdep->k0_regnum = -1;
   tdep->num_zmm_regs = 0;
@@ -8732,8 +8514,6 @@ i386_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
     }
   tdep->xsave_layout = xsave_layout;
 
-  num_bnd_cooked = (tdep->bnd0r_regnum > 0 ? I387_NUM_BND_REGS : 0);
-
   /* Wire in pseudo registers.  Number of pseudo registers may be
      changed.  */
   set_gdbarch_num_pseudo_regs (gdbarch, (tdep->num_byte_regs
@@ -8741,7 +8521,6 @@ i386_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
 					 + tdep->num_dword_regs
 					 + tdep->num_mmx_regs
 					 + tdep->num_ymm_regs
-					 + num_bnd_cooked
 					 + tdep->num_ymm_avx512_regs
 					 + tdep->num_zmm_regs));
 
@@ -8795,21 +8574,14 @@ i386_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
   else
     tdep->zmm0_regnum = -1;
 
-  bnd0_regnum = mm0_regnum;
   if (tdep->num_mmx_regs != 0)
     {
       /* Support MMX pseudo-register if MMX hasn't been disabled.  */
       tdep->mm0_regnum = mm0_regnum;
-      bnd0_regnum += tdep->num_mmx_regs;
     }
   else
     tdep->mm0_regnum = -1;
 
-  if (tdep->bnd0r_regnum > 0)
-      tdep->bnd0_regnum = bnd0_regnum;
-  else
-    tdep-> bnd0_regnum = -1;
-
   /* Hook in the legacy prologue-based unwinders last (fallback).  */
   if (info.bfd_arch_info->bits_per_word == 32)
     {
@@ -8839,12 +8611,11 @@ const struct target_desc *
 i386_target_description (uint64_t xcr0, bool segments)
 {
   static target_desc *i386_tdescs \
-    [2/*SSE*/][2/*AVX*/][2/*MPX*/][2/*AVX512*/][2/*PKRU*/][2/*segments*/] = {};
+    [2/*SSE*/][2/*AVX*/][2/*AVX512*/][2/*PKRU*/][2/*segments*/] = {};
   target_desc **tdesc;
 
   tdesc = &i386_tdescs[(xcr0 & X86_XSTATE_SSE) ? 1 : 0]
     [(xcr0 & X86_XSTATE_AVX) ? 1 : 0]
-    [(xcr0 & X86_XSTATE_MPX) ? 1 : 0]
     [(xcr0 & X86_XSTATE_AVX512) ? 1 : 0]
     [(xcr0 & X86_XSTATE_PKRU) ? 1 : 0]
     [segments ? 1 : 0];
@@ -8855,245 +8626,6 @@ i386_target_description (uint64_t xcr0, bool segments)
   return *tdesc;
 }
 
-#define MPX_BASE_MASK (~(ULONGEST) 0xfff)
-
-/* Find the bound directory base address.  */
-
-static unsigned long
-i386_mpx_bd_base (void)
-{
-  ULONGEST ret;
-  enum register_status regstatus;
-
-  regcache *rcache = get_thread_regcache (inferior_thread ());
-  gdbarch *arch = rcache->arch ();
-  i386_gdbarch_tdep *tdep = gdbarch_tdep<i386_gdbarch_tdep> (arch);
-
-  regstatus = regcache_raw_read_unsigned (rcache, tdep->bndcfgu_regnum, &ret);
-
-  if (regstatus != REG_VALID)
-    error (_("BNDCFGU register invalid, read status %d."), regstatus);
-
-  return ret & MPX_BASE_MASK;
-}
-
-int
-i386_mpx_enabled (void)
-{
-  gdbarch *arch = get_current_arch ();
-  i386_gdbarch_tdep *tdep = gdbarch_tdep<i386_gdbarch_tdep> (arch);
-  const struct target_desc *tdesc = tdep->tdesc;
-
-  return (tdesc_find_feature (tdesc, "org.gnu.gdb.i386.mpx") != NULL);
-}
-
-#define MPX_BD_MASK     0xfffffff00000ULL	/* select bits [47:20]  */
-#define MPX_BT_MASK     0x0000000ffff8	        /* select bits [19:3]   */
-#define MPX_BD_MASK_32  0xfffff000	        /* select bits [31:12]  */
-#define MPX_BT_MASK_32  0x00000ffc	        /* select bits [11:2]   */
-
-/* Find the bound table entry given the pointer location and the base
-   address of the table.  */
-
-static CORE_ADDR
-i386_mpx_get_bt_entry (CORE_ADDR ptr, CORE_ADDR bd_base)
-{
-  CORE_ADDR offset1;
-  CORE_ADDR offset2;
-  CORE_ADDR mpx_bd_mask, bd_ptr_r_shift, bd_ptr_l_shift;
-  CORE_ADDR bt_mask, bt_select_r_shift, bt_select_l_shift;
-  CORE_ADDR bd_entry_addr;
-  CORE_ADDR bt_addr;
-  CORE_ADDR bd_entry;
-  struct gdbarch *gdbarch = get_current_arch ();
-  struct type *data_ptr_type = builtin_type (gdbarch)->builtin_data_ptr;
-
-
-  if (gdbarch_ptr_bit (gdbarch) == 64)
-    {
-      mpx_bd_mask = (CORE_ADDR) MPX_BD_MASK;
-      bd_ptr_r_shift = 20;
-      bd_ptr_l_shift = 3;
-      bt_select_r_shift = 3;
-      bt_select_l_shift = 5;
-      bt_mask = (CORE_ADDR) MPX_BT_MASK;
-
-      if ( sizeof (CORE_ADDR) == 4)
-	error (_("bound table examination not supported\
- for 64-bit process with 32-bit GDB"));
-    }
-  else
-    {
-      mpx_bd_mask = MPX_BD_MASK_32;
-      bd_ptr_r_shift = 12;
-      bd_ptr_l_shift = 2;
-      bt_select_r_shift = 2;
-      bt_select_l_shift = 4;
-      bt_mask = MPX_BT_MASK_32;
-    }
-
-  offset1 = ((ptr & mpx_bd_mask) >> bd_ptr_r_shift) << bd_ptr_l_shift;
-  bd_entry_addr = bd_base + offset1;
-  bd_entry = read_memory_typed_address (bd_entry_addr, data_ptr_type);
-
-  if ((bd_entry & 0x1) == 0)
-    error (_("Invalid bounds directory entry at %s."),
-	   paddress (get_current_arch (), bd_entry_addr));
-
-  /* Clearing status bit.  */
-  bd_entry--;
-  bt_addr = bd_entry & ~bt_select_r_shift;
-  offset2 = ((ptr & bt_mask) >> bt_select_r_shift) << bt_select_l_shift;
-
-  return bt_addr + offset2;
-}
-
-/* Print routine for the mpx bounds.  */
-
-static void
-i386_mpx_print_bounds (const CORE_ADDR bt_entry[4])
-{
-  struct ui_out *uiout = current_uiout;
-  LONGEST size;
-  struct gdbarch *gdbarch = get_current_arch ();
-  CORE_ADDR onecompl = ~((CORE_ADDR) 0);
-  int bounds_in_map = ((~bt_entry[1] == 0 && bt_entry[0] == onecompl) ? 1 : 0);
-
-  if (bounds_in_map == 1)
-    {
-      uiout->text ("Null bounds on map:");
-      uiout->text (" pointer value = ");
-      uiout->field_core_addr ("pointer-value", gdbarch, bt_entry[2]);
-      uiout->text (".");
-      uiout->text ("\n");
-    }
-  else
-    {
-      uiout->text ("{lbound = ");
-      uiout->field_core_addr ("lower-bound", gdbarch, bt_entry[0]);
-      uiout->text (", ubound = ");
-
-      /* The upper bound is stored in 1's complement.  */
-      uiout->field_core_addr ("upper-bound", gdbarch, ~bt_entry[1]);
-      uiout->text ("}: pointer value = ");
-      uiout->field_core_addr ("pointer-value", gdbarch, bt_entry[2]);
-
-      if (gdbarch_ptr_bit (gdbarch) == 64)
-	size = ( (~(int64_t) bt_entry[1]) - (int64_t) bt_entry[0]);
-      else
-	size = ( ~((int32_t) bt_entry[1]) - (int32_t) bt_entry[0]);
-
-      /* In case the bounds are 0x0 and 0xffff... the difference will be -1.
-	 -1 represents in this sense full memory access, and there is no need
-	 one to the size.  */
-
-      size = (size > -1 ? size + 1 : size);
-      uiout->text (", size = ");
-      uiout->field_string ("size", plongest (size));
-
-      uiout->text (", metadata = ");
-      uiout->field_core_addr ("metadata", gdbarch, bt_entry[3]);
-      uiout->text ("\n");
-    }
-}
-
-/* Implement the command "show mpx bound".  */
-
-static void
-i386_mpx_info_bounds (const char *args, int from_tty)
-{
-  CORE_ADDR bd_base = 0;
-  CORE_ADDR addr;
-  CORE_ADDR bt_entry_addr = 0;
-  CORE_ADDR bt_entry[4];
-  int i;
-  struct gdbarch *gdbarch = get_current_arch ();
-  struct type *data_ptr_type = builtin_type (gdbarch)->builtin_data_ptr;
-
-  if (gdbarch_bfd_arch_info (gdbarch)->arch != bfd_arch_i386
-      || !i386_mpx_enabled ())
-    {
-      gdb_printf (_("Intel Memory Protection Extensions not "
-		    "supported on this target.\n"));
-      return;
-    }
-
-  if (args == NULL)
-    {
-      gdb_printf (_("Address of pointer variable expected.\n"));
-      return;
-    }
-
-  addr = parse_and_eval_address (args);
-
-  bd_base = i386_mpx_bd_base ();
-  bt_entry_addr = i386_mpx_get_bt_entry (addr, bd_base);
-
-  memset (bt_entry, 0, sizeof (bt_entry));
-
-  for (i = 0; i < 4; i++)
-    bt_entry[i] = read_memory_typed_address (bt_entry_addr
-					     + i * data_ptr_type->length (),
-					     data_ptr_type);
-
-  i386_mpx_print_bounds (bt_entry);
-}
-
-/* Implement the command "set mpx bound".  */
-
-static void
-i386_mpx_set_bounds (const char *args, int from_tty)
-{
-  CORE_ADDR bd_base = 0;
-  CORE_ADDR addr, lower, upper;
-  CORE_ADDR bt_entry_addr = 0;
-  CORE_ADDR bt_entry[2];
-  const char *input = args;
-  int i;
-  struct gdbarch *gdbarch = get_current_arch ();
-  enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
-  struct type *data_ptr_type = builtin_type (gdbarch)->builtin_data_ptr;
-
-  if (gdbarch_bfd_arch_info (gdbarch)->arch != bfd_arch_i386
-      || !i386_mpx_enabled ())
-    error (_("Intel Memory Protection Extensions not supported\
- on this target."));
-
-  if (args == NULL)
-    error (_("Pointer value expected."));
-
-  addr = value_as_address (parse_to_comma_and_eval (&input));
-
-  if (input[0] == ',')
-    ++input;
-  if (input[0] == '\0')
-    error (_("wrong number of arguments: missing lower and upper bound."));
-  lower = value_as_address (parse_to_comma_and_eval (&input));
-
-  if (input[0] == ',')
-    ++input;
-  if (input[0] == '\0')
-    error (_("Wrong number of arguments; Missing upper bound."));
-  upper = value_as_address (parse_to_comma_and_eval (&input));
-
-  bd_base = i386_mpx_bd_base ();
-  bt_entry_addr = i386_mpx_get_bt_entry (addr, bd_base);
-  for (i = 0; i < 2; i++)
-    bt_entry[i] = read_memory_typed_address (bt_entry_addr
-					     + i * data_ptr_type->length (),
-					     data_ptr_type);
-  bt_entry[0] = (uint64_t) lower;
-  bt_entry[1] = ~(uint64_t) upper;
-
-  for (i = 0; i < 2; i++)
-    write_memory_unsigned_integer (bt_entry_addr
-				   + i * data_ptr_type->length (),
-				   data_ptr_type->length (), byte_order,
-				   bt_entry[i]);
-}
-
-static struct cmd_list_element *mpx_set_cmdlist, *mpx_show_cmdlist;
-
 void _initialize_i386_tdep ();
 void
 _initialize_i386_tdep ()
@@ -9122,30 +8654,6 @@ is \"default\"."),
 			NULL, /* FIXME: i18n: */
 			&setlist, &showlist);
 
-  /* Add "mpx" prefix for the set and show commands.  */
-
-  add_setshow_prefix_cmd
-    ("mpx", class_support,
-     _("Set Intel Memory Protection Extensions specific variables."),
-     _("Show Intel Memory Protection Extensions specific variables."),
-     &mpx_set_cmdlist, &mpx_show_cmdlist, &setlist, &showlist);
-
-  /* Add "bound" command for the show mpx commands list.  */
-
-  cmd_list_element *c = add_cmd ("bound", no_class, i386_mpx_info_bounds,
-	   "Show the memory bounds for a given array/pointer storage\
- in the bound table.",
-	   &mpx_show_cmdlist);
-  deprecate_cmd (c, nullptr);
-
-  /* Add "bound" command for the set mpx commands list.  */
-
-  c = add_cmd ("bound", no_class, i386_mpx_set_bounds,
-	   "Set the memory bounds for a given array/pointer storage\
- in the bound table.",
-	   &mpx_set_cmdlist);
-  deprecate_cmd (c, nullptr);
-
   gdbarch_register_osabi (bfd_arch_i386, 0, GDB_OSABI_SVR4,
 			  i386_svr4_init_abi);
 
diff --git a/gdb/i386-tdep.h b/gdb/i386-tdep.h
index a85e0a9..82676c2 100644
--- a/gdb/i386-tdep.h
+++ b/gdb/i386-tdep.h
@@ -166,21 +166,6 @@ struct i386_gdbarch_tdep : gdbarch_tdep_base
   /* YMM16-31 register names.  Only used for tdesc_numbered_register.  */
   const char * const *ymm16h_register_names = nullptr;
 
-  /* Register number for %bnd0r.  Set this to -1 to indicate the absence
-     bound registers.  */
-  int bnd0r_regnum = 0;
-
-  /* Register number for pseudo register %bnd0.  Set this to -1 to indicate the absence
-     bound registers.  */
-  int bnd0_regnum = 0;
-
-  /* Register number for %bndcfgu. Set this to -1 to indicate the absence
-     bound control registers.  */
-  int bndcfgu_regnum = 0;
-
-  /* MPX register names.  Only used for tdesc_numbered_register.  */
-  const char * const *mpx_register_names = nullptr;
-
   /* Register number for %zmm0h.  Set this to -1 to indicate the absence
      of ZMM_HI256 register support.  */
   int zmm0h_regnum = 0;
@@ -246,7 +231,6 @@ struct i386_gdbarch_tdep : gdbarch_tdep_base
   struct type *i386_ymm_type = nullptr;
   struct type *i386_zmm_type = nullptr;
   struct type *i387_ext_type = nullptr;
-  struct type *i386_bnd_type = nullptr;
 
   /* Process record/replay target.  */
   /* The map for registers because the AMD64's registers order
@@ -298,6 +282,8 @@ enum i386_regnum
   I386_MXCSR_REGNUM = 40,	/* %mxcsr */
   I386_YMM0H_REGNUM,		/* %ymm0h */
   I386_YMM7H_REGNUM = I386_YMM0H_REGNUM + 7,
+  /* MPX is deprecated.  Yet we keep this to not give the registers below
+     a new number.  That could break older gdbservers.  */
   I386_BND0R_REGNUM,
   I386_BND3R_REGNUM = I386_BND0R_REGNUM + 3,
   I386_BNDCFGU_REGNUM,
@@ -346,7 +332,6 @@ enum record_i386_regnum
 
 #define I386_SSE_NUM_REGS	(I386_MXCSR_REGNUM + 1)
 #define I386_AVX_NUM_REGS	(I386_YMM7H_REGNUM + 1)
-#define I386_MPX_NUM_REGS	(I386_BNDSTATUS_REGNUM + 1)
 #define I386_AVX512_NUM_REGS	(I386_ZMM7H_REGNUM + 1)
 #define I386_PKEYS_NUM_REGS	(I386_PKRU_REGNUM + 1)
 #define I386_NUM_REGS		(I386_GSBASE_REGNUM + 1)
@@ -365,7 +350,6 @@ extern int i386_xmm_regnum_p (struct gdbarch *gdbarch, int regnum);
 extern int i386_xmm_avx512_regnum_p (struct gdbarch * gdbarch, int regnum);
 extern int i386_ymm_regnum_p (struct gdbarch *gdbarch, int regnum);
 extern int i386_ymm_avx512_regnum_p (struct gdbarch *gdbarch, int regnum);
-extern int i386_bnd_regnum_p (struct gdbarch *gdbarch, int regnum);
 extern int i386_k_regnum_p (struct gdbarch *gdbarch, int regnum);
 extern int i386_zmm_regnum_p (struct gdbarch *gdbarch, int regnum);
 extern int i386_zmmh_regnum_p (struct gdbarch *gdbarch, int regnum);
@@ -468,10 +452,6 @@ extern int i386_process_record (struct gdbarch *gdbarch,
 extern const struct target_desc *i386_target_description (uint64_t xcr0,
 							  bool segments);
 
-/* Return true iff the current target is MPX enabled.  */
-extern int i386_mpx_enabled (void);
-
-
 /* Functions and variables exported from i386-bsd-tdep.c.  */
 
 extern void i386bsd_init_abi (struct gdbarch_info, struct gdbarch *);
diff --git a/gdb/i387-tdep.c b/gdb/i387-tdep.c
index 675ee8d..3bda888 100644
--- a/gdb/i387-tdep.c
+++ b/gdb/i387-tdep.c
@@ -818,30 +818,6 @@ static int xsave_xmm_avx512_offset[] =
   (xsave + (tdep)->xsave_layout.zmm_offset				\
    + xsave_xmm_avx512_offset[regnum - I387_XMM16_REGNUM (tdep)])
 
-/* At xsave_bndregs_offset[REGNUM] you'll find the relative offset
-   within the BNDREGS region of the XSAVE extended state where the GDB
-   register BND0R + REGNUM is stored.  */
-
-static int xsave_bndregs_offset[] = {
-  0 * 16,			/* bnd0r...bnd3r registers.  */
-  1 * 16,
-  2 * 16,
-  3 * 16
-};
-
-#define XSAVE_BNDREGS_ADDR(tdep, xsave, regnum)				\
-  (xsave + (tdep)->xsave_layout.bndregs_offset				\
-   + xsave_bndregs_offset[regnum - I387_BND0R_REGNUM (tdep)])
-
-static int xsave_bndcfg_offset[] = {
-  0 * 8,			/* bndcfg ... bndstatus.  */
-  1 * 8,
-};
-
-#define XSAVE_BNDCFG_ADDR(tdep, xsave, regnum)			\
-  (xsave + (tdep)->xsave_layout.bndcfg_offset			\
-   + xsave_bndcfg_offset[regnum - I387_BNDCFGU_REGNUM (tdep)])
-
 /* At xsave_avx512_k_offset[REGNUM] you'll find the relative offset
    within the K region of the XSAVE extended state where the AVX512
    opmask register K0 + REGNUM is stored.  */
@@ -944,8 +920,6 @@ i387_guess_xsave_layout (uint64_t xcr0, size_t xsave_size,
     {
       /* Intel CPUs supporting PKRU.  */
       layout.avx_offset = 576;
-      layout.bndregs_offset = 960;
-      layout.bndcfg_offset = 1024;
       layout.k_offset = 1088;
       layout.zmm_h_offset = 1152;
       layout.zmm_offset = 1664;
@@ -964,20 +938,14 @@ i387_guess_xsave_layout (uint64_t xcr0, size_t xsave_size,
     {
       /* Intel CPUs supporting AVX512.  */
       layout.avx_offset = 576;
-      layout.bndregs_offset = 960;
-      layout.bndcfg_offset = 1024;
       layout.k_offset = 1088;
       layout.zmm_h_offset = 1152;
       layout.zmm_offset = 1664;
     }
-  else if (HAS_MPX (xcr0) && xsave_size == 1088)
-    {
-      /* Intel CPUs supporting MPX.  */
-      layout.avx_offset = 576;
-      layout.bndregs_offset = 960;
-      layout.bndcfg_offset = 1024;
-    }
-  else if (HAS_AVX (xcr0) && xsave_size == 832)
+  /* As MPX has been removed, we need the additional check
+     (xsave_size == 1088) to allow reading AVX registers from corefiles
+     on CPUs with MPX as the highest supported feature.  */
+  else if (HAS_AVX (xcr0) && (xsave_size == 832 || xsave_size == 1088))
     {
       /* Intel and AMD CPUs supporting AVX.  */
       layout.avx_offset = 576;
@@ -1000,8 +968,6 @@ i387_fallback_xsave_layout (uint64_t xcr0)
     {
       /* Intel CPUs supporting PKRU.  */
       layout.avx_offset = 576;
-      layout.bndregs_offset = 960;
-      layout.bndcfg_offset = 1024;
       layout.k_offset = 1088;
       layout.zmm_h_offset = 1152;
       layout.zmm_offset = 1664;
@@ -1012,21 +978,11 @@ i387_fallback_xsave_layout (uint64_t xcr0)
     {
       /* Intel CPUs supporting AVX512.  */
       layout.avx_offset = 576;
-      layout.bndregs_offset = 960;
-      layout.bndcfg_offset = 1024;
       layout.k_offset = 1088;
       layout.zmm_h_offset = 1152;
       layout.zmm_offset = 1664;
       layout.sizeof_xsave = 2688;
     }
-  else if (HAS_MPX (xcr0))
-    {
-      /* Intel CPUs supporting MPX.  */
-      layout.avx_offset = 576;
-      layout.bndregs_offset = 960;
-      layout.bndcfg_offset = 1024;
-      layout.sizeof_xsave = 1088;
-    }
   else if (HAS_AVX (xcr0))
     {
       /* Intel and AMD CPUs supporting AVX.  */
@@ -1082,16 +1038,14 @@ i387_supply_xsave (struct regcache *regcache, int regnum,
       x87 = 0x1,
       sse = 0x2,
       avxh = 0x4,
-      bndregs = 0x8,
-      bndcfg = 0x10,
-      avx512_k = 0x20,
-      avx512_zmm0_h = 0x40,
-      avx512_zmm16_h = 0x80,
-      avx512_ymmh_avx512 = 0x100,
-      avx512_xmm_avx512 = 0x200,
-      pkeys = 0x400,
-      all = x87 | sse | avxh | bndregs | bndcfg | avx512_k | avx512_zmm0_h
-	    | avx512_zmm16_h | avx512_ymmh_avx512 | avx512_xmm_avx512 | pkeys
+      avx512_k = 0x8,
+      avx512_zmm0_h = 0x10,
+      avx512_zmm16_h = 0x20,
+      avx512_ymmh_avx512 = 0x40,
+      avx512_xmm_avx512 = 0x80,
+      pkeys = 0x100,
+      all = x87 | sse | avxh | avx512_k | avx512_zmm0_h | avx512_zmm16_h
+	    | avx512_ymmh_avx512 | avx512_xmm_avx512 | pkeys
     } regclass;
 
   gdb_assert (regs != NULL);
@@ -1121,12 +1075,6 @@ i387_supply_xsave (struct regcache *regcache, int regnum,
   else if (regnum >= I387_YMM0H_REGNUM (tdep)
 	   && regnum < I387_YMMENDH_REGNUM (tdep))
     regclass = avxh;
-  else if (regnum >= I387_BND0R_REGNUM (tdep)
-	   && regnum < I387_BNDCFGU_REGNUM (tdep))
-    regclass = bndregs;
-  else if (regnum >= I387_BNDCFGU_REGNUM (tdep)
-	   && regnum < I387_MPXEND_REGNUM (tdep))
-    regclass = bndcfg;
   else if (regnum >= I387_XMM0_REGNUM (tdep)
 	   && regnum < I387_MXCSR_REGNUM (tdep))
     regclass = sse;
@@ -1205,20 +1153,6 @@ i387_supply_xsave (struct regcache *regcache, int regnum,
 	regcache->raw_supply (regnum, XSAVE_AVXH_ADDR (tdep, regs, regnum));
       return;
 
-    case bndcfg:
-      if ((clear_bv & X86_XSTATE_BNDCFG))
-	regcache->raw_supply (regnum, zero);
-      else
-	regcache->raw_supply (regnum, XSAVE_BNDCFG_ADDR (tdep, regs, regnum));
-      return;
-
-    case bndregs:
-      if ((clear_bv & X86_XSTATE_BNDREGS))
-	regcache->raw_supply (regnum, zero);
-      else
-	regcache->raw_supply (regnum, XSAVE_BNDREGS_ADDR (tdep, regs, regnum));
-      return;
-
     case sse:
       if ((clear_bv & X86_XSTATE_SSE))
 	regcache->raw_supply (regnum, zero);
@@ -1341,40 +1275,6 @@ i387_supply_xsave (struct regcache *regcache, int regnum,
 	    }
 	}
 
-      /* Handle the MPX registers.  */
-      if ((tdep->xcr0 & X86_XSTATE_BNDREGS))
-	{
-	  if (clear_bv & X86_XSTATE_BNDREGS)
-	    {
-	      for (i = I387_BND0R_REGNUM (tdep);
-		   i < I387_BNDCFGU_REGNUM (tdep); i++)
-		regcache->raw_supply (i, zero);
-	    }
-	  else
-	    {
-	      for (i = I387_BND0R_REGNUM (tdep);
-		   i < I387_BNDCFGU_REGNUM (tdep); i++)
-		regcache->raw_supply (i, XSAVE_BNDREGS_ADDR (tdep, regs, i));
-	    }
-	}
-
-      /* Handle the MPX registers.  */
-      if ((tdep->xcr0 & X86_XSTATE_BNDCFG))
-	{
-	  if (clear_bv & X86_XSTATE_BNDCFG)
-	    {
-	      for (i = I387_BNDCFGU_REGNUM (tdep);
-		   i < I387_MPXEND_REGNUM (tdep); i++)
-		regcache->raw_supply (i, zero);
-	    }
-	  else
-	    {
-	      for (i = I387_BNDCFGU_REGNUM (tdep);
-		   i < I387_MPXEND_REGNUM (tdep); i++)
-		regcache->raw_supply (i, XSAVE_BNDCFG_ADDR (tdep, regs, i));
-	    }
-	}
-
       /* Handle the XMM registers.  */
       if ((tdep->xcr0 & X86_XSTATE_SSE))
 	{
@@ -1527,16 +1427,14 @@ i387_collect_xsave (const struct regcache *regcache, int regnum,
       x87 = 0x2,
       sse = 0x4,
       avxh = 0x8,
-      bndregs = 0x10,
-      bndcfg = 0x20,
-      avx512_k = 0x40,
-      avx512_zmm0_h = 0x80,
-      avx512_zmm16_h = 0x100,
-      avx512_ymmh_avx512 = 0x200,
-      avx512_xmm_avx512 = 0x400,
-      pkeys = 0x800,
-      all = x87 | sse | avxh | bndregs | bndcfg | avx512_k | avx512_zmm0_h
-	    | avx512_zmm16_h | avx512_ymmh_avx512 | avx512_xmm_avx512 | pkeys
+      avx512_k = 0x10,
+      avx512_zmm0_h = 0x20,
+      avx512_zmm16_h = 0x40,
+      avx512_ymmh_avx512 = 0x80,
+      avx512_xmm_avx512 = 0x100,
+      pkeys = 0x200,
+      all = x87 | sse | avxh | avx512_k | avx512_zmm0_h | avx512_zmm16_h
+	    | avx512_ymmh_avx512 | avx512_xmm_avx512 | pkeys
     } regclass;
 
   gdb_assert (tdep->st0_regnum >= I386_ST0_REGNUM);
@@ -1565,12 +1463,6 @@ i387_collect_xsave (const struct regcache *regcache, int regnum,
   else if (regnum >= I387_YMM0H_REGNUM (tdep)
 	   && regnum < I387_YMMENDH_REGNUM (tdep))
     regclass = avxh;
-  else if (regnum >= I387_BND0R_REGNUM (tdep)
-	   && regnum < I387_BNDCFGU_REGNUM (tdep))
-    regclass = bndregs;
-  else if (regnum >= I387_BNDCFGU_REGNUM (tdep)
-	   && regnum < I387_MPXEND_REGNUM (tdep))
-    regclass = bndcfg;
   else if (regnum >= I387_XMM0_REGNUM (tdep)
 	   && regnum < I387_MXCSR_REGNUM (tdep))
     regclass = sse;
@@ -1619,16 +1511,6 @@ i387_collect_xsave (const struct regcache *regcache, int regnum,
 	     i < I387_PKEYSEND_REGNUM (tdep); i++)
 	  memset (XSAVE_PKEYS_ADDR (tdep, regs, i), 0, 4);
 
-      if ((clear_bv & X86_XSTATE_BNDREGS))
-	for (i = I387_BND0R_REGNUM (tdep);
-	     i < I387_BNDCFGU_REGNUM (tdep); i++)
-	  memset (XSAVE_BNDREGS_ADDR (tdep, regs, i), 0, 16);
-
-      if ((clear_bv & X86_XSTATE_BNDCFG))
-	for (i = I387_BNDCFGU_REGNUM (tdep);
-	     i < I387_MPXEND_REGNUM (tdep); i++)
-	  memset (XSAVE_BNDCFG_ADDR (tdep, regs, i), 0, 8);
-
       if ((clear_bv & X86_XSTATE_ZMM_H))
 	for (i = I387_ZMM0H_REGNUM (tdep); i < zmm_endlo_regnum; i++)
 	  memset (XSAVE_AVX512_ZMM0_H_ADDR (tdep, regs, i), 0, 32);
@@ -1771,34 +1653,6 @@ i387_collect_xsave (const struct regcache *regcache, int regnum,
 	    }
 	}
 
-      /* Check if any upper MPX registers are changed.  */
-      if ((tdep->xcr0 & X86_XSTATE_BNDREGS))
-	for (i = I387_BND0R_REGNUM (tdep);
-	     i < I387_BNDCFGU_REGNUM (tdep); i++)
-	  {
-	    regcache->raw_collect (i, raw);
-	    p = XSAVE_BNDREGS_ADDR (tdep, regs, i);
-	    if (memcmp (raw, p, 16))
-	      {
-		xstate_bv |= X86_XSTATE_BNDREGS;
-		memcpy (p, raw, 16);
-	      }
-	  }
-
-      /* Check if any upper MPX registers are changed.  */
-      if ((tdep->xcr0 & X86_XSTATE_BNDCFG))
-	for (i = I387_BNDCFGU_REGNUM (tdep);
-	     i < I387_MPXEND_REGNUM (tdep); i++)
-	  {
-	    regcache->raw_collect (i, raw);
-	    p = XSAVE_BNDCFG_ADDR (tdep, regs, i);
-	    if (memcmp (raw, p, 8))
-	      {
-		xstate_bv |= X86_XSTATE_BNDCFG;
-		memcpy (p, raw, 8);
-	      }
-	  }
-
       /* Check if any upper YMM registers are changed.  */
       if ((tdep->xcr0 & X86_XSTATE_AVX))
 	for (i = I387_YMM0H_REGNUM (tdep);
@@ -1940,22 +1794,6 @@ i387_collect_xsave (const struct regcache *regcache, int regnum,
 	    }
 	  break;
 
-	case bndregs:
-	  regcache->raw_collect (regnum, raw);
-	  p = XSAVE_BNDREGS_ADDR (tdep, regs, regnum);
-	  if (memcmp (raw, p, 16))
-	    {
-	      xstate_bv |= X86_XSTATE_BNDREGS;
-	      memcpy (p, raw, 16);
-	    }
-	  break;
-
-	case bndcfg:
-	  p = XSAVE_BNDCFG_ADDR (tdep, regs, regnum);
-	  xstate_bv |= X86_XSTATE_BNDCFG;
-	  memcpy (p, raw, 8);
-	  break;
-
 	case sse:
 	  /* This is an SSE register.  */
 	  p = FXSAVE_ADDR (tdep, regs, regnum);
@@ -2143,20 +1981,3 @@ i387_return_value (struct gdbarch *gdbarch, struct regcache *regcache)
   regcache_raw_write_unsigned (regcache, I387_FTAG_REGNUM (tdep), 0x3fff);
 
 }
-
-/* See i387-tdep.h.  */
-
-void
-i387_reset_bnd_regs (struct gdbarch *gdbarch, struct regcache *regcache)
-{
-  i386_gdbarch_tdep *tdep = gdbarch_tdep<i386_gdbarch_tdep> (gdbarch);
-
-  if (I387_BND0R_REGNUM (tdep) > 0)
-    {
-      gdb_byte bnd_buf[16];
-
-      memset (bnd_buf, 0, 16);
-      for (int i = 0; i < I387_NUM_BND_REGS; i++)
-	regcache->raw_write (I387_BND0R_REGNUM (tdep) + i, bnd_buf);
-    }
-}
diff --git a/gdb/i387-tdep.h b/gdb/i387-tdep.h
index 30d7694..7b2c3b1 100644
--- a/gdb/i387-tdep.h
+++ b/gdb/i387-tdep.h
@@ -37,13 +37,7 @@ struct x86_xsave_layout;
 #define I387_NUM_YMM_REGS(tdep) ((tdep)->num_ymm_regs)
 #define I387_YMM0H_REGNUM(tdep) ((tdep)->ymm0h_regnum)
 
-#define I387_BND0R_REGNUM(tdep) ((tdep)->bnd0r_regnum)
-#define I387_BNDCFGU_REGNUM(tdep) ((tdep)->bndcfgu_regnum)
-
 /* Set of constants used for 32 and 64-bit.  */
-#define I387_NUM_MPX_REGS 6
-#define I387_NUM_BND_REGS 4
-#define I387_NUM_MPX_CTRL_REGS 2
 #define I387_NUM_K_REGS 8
 #define I387_NUM_PKEYS_REGS 1
 
@@ -71,8 +65,6 @@ struct x86_xsave_layout;
 #define I387_YMMENDH_REGNUM(tdep) \
   (I387_YMM0H_REGNUM (tdep) + I387_NUM_YMM_REGS (tdep))
 
-#define I387_MPXEND_REGNUM(tdep) \
-  (I387_BND0R_REGNUM (tdep) + I387_NUM_MPX_REGS)
 
 #define I387_KEND_REGNUM(tdep) \
   (I387_K0_REGNUM (tdep) + I387_NUM_K_REGS)
@@ -181,8 +173,4 @@ extern ULONGEST i387_xsave_get_clear_bv (struct gdbarch *gdbarch,
 extern void i387_return_value (struct gdbarch *gdbarch,
 			       struct regcache *regcache);
 
-/* Set all bnd registers to the INIT state.  INIT state means
-   all memory range can be accessed.  */
-extern void i387_reset_bnd_regs (struct gdbarch *gdbarch,
-				 struct regcache *regcache);
 #endif /* i387-tdep.h */
diff --git a/gdb/ia64-tdep.c b/gdb/ia64-tdep.c
index 6376cf8..b0c1ad3 100644
--- a/gdb/ia64-tdep.c
+++ b/gdb/ia64-tdep.c
@@ -3615,9 +3615,7 @@ ia64_convert_from_func_ptr_addr (struct gdbarch *gdbarch, CORE_ADDR addr,
   /* There are also descriptors embedded in vtables.  */
   if (s)
     {
-      struct bound_minimal_symbol minsym;
-
-      minsym = lookup_minimal_symbol_by_pc (addr);
+      bound_minimal_symbol minsym = lookup_minimal_symbol_by_pc (addr);
 
       if (minsym.minsym
 	  && is_vtable_name (minsym.minsym->linkage_name ()))
@@ -3846,7 +3844,7 @@ ia64_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
      a dummy code sequence pushed on the stack to make the call, and
      this sequence doesn't need b0 to be set in order for our dummy
      breakpoint to be hit.  Nonetheless, this doesn't interfere, and
-     it's needed for other OSes, so we do this unconditionaly.  */
+     it's needed for other OSes, so we do this unconditionally.  */
   regcache_cooked_write_unsigned (regcache, IA64_BR0_REGNUM, bp_addr);
 
   regcache_cooked_write_unsigned (regcache, sp_regnum, sp);
diff --git a/gdb/ia64-tdep.h b/gdb/ia64-tdep.h
index 64be38b..3d5b56e 100644
--- a/gdb/ia64-tdep.h
+++ b/gdb/ia64-tdep.h
@@ -156,7 +156,7 @@
 /* Predicate registers: There are 64 of these 1-bit registers.  We
    define a single register which is used to communicate these values
    to/from the target.  We will somehow contrive to make it appear
-   that IA64_PR0_REGNUM thru IA64_PR63_REGNUM hold the actual values.  */
+   that IA64_PR0_REGNUM through IA64_PR63_REGNUM hold the actual values.  */
 #define IA64_PR_REGNUM		330
 
 /* Instruction pointer: 64 bits wide.  */
diff --git a/gdb/inf-ptrace.c b/gdb/inf-ptrace.c
index acb80af..36d6e2a 100644
--- a/gdb/inf-ptrace.c
+++ b/gdb/inf-ptrace.c
@@ -475,7 +475,7 @@ inf_ptrace_target::xfer_partial (enum target_object object,
     case TARGET_OBJECT_AUXV:
 #if defined (PT_IO) && defined (PIOD_READ_AUXV)
       /* OpenBSD 4.5 has a new PIOD_READ_AUXV operation for the PT_IO
-	 request that allows us to read the auxilliary vector.  Other
+	 request that allows us to read the auxiliary vector.  Other
 	 BSD's may follow if they feel the need to support PIE.  */
       {
 	struct ptrace_io_desc piod;
diff --git a/gdb/infcall.c b/gdb/infcall.c
index 559fcb7..02e3b38 100644
--- a/gdb/infcall.c
+++ b/gdb/infcall.c
@@ -488,7 +488,7 @@ get_function_name (CORE_ADDR funaddr, char *buf, int buf_size)
 
   {
     /* Try the minimal symbols.  */
-    struct bound_minimal_symbol msymbol = lookup_minimal_symbol_by_pc (funaddr);
+    bound_minimal_symbol msymbol = lookup_minimal_symbol_by_pc (funaddr);
 
     if (msymbol.minsym)
       return msymbol.minsym->print_name ();
diff --git a/gdb/infcmd.c b/gdb/infcmd.c
index a030788..74873b9 100644
--- a/gdb/infcmd.c
+++ b/gdb/infcmd.c
@@ -992,7 +992,7 @@ prepare_one_step (thread_info *tp, struct step_command_fsm *sm)
 	     Use inlined_subroutine info to make the range more narrow.  */
 	  if (inline_skipped_frames (tp) > 0)
 	    {
-	      symbol *sym = inline_skipped_symbol (tp);
+	      const symbol *sym = inline_skipped_symbol (tp);
 	      if (sym->aclass () == LOC_BLOCK)
 		{
 		  const block *block = sym->value_block ();
@@ -1103,7 +1103,9 @@ jump_command (const char *arg, int from_tty)
 					  find_pc_mapped_section (sal.pc));
   if (fn != nullptr && sfn != fn)
     {
-      if (!query (_("Line %d is not in `%s'.  Jump anyway? "), sal.line,
+      if (!query (_("Line %ps is not in `%s'.  Jump anyway? "),
+		  styled_string (line_number_style.style (),
+				 pulongest (sal.line)),
 		  fn->print_name ()))
 	{
 	  error (_("Not confirmed."));
@@ -1360,7 +1362,7 @@ until_next_command (int from_tty)
 
   if (!func)
     {
-      struct bound_minimal_symbol msymbol = lookup_minimal_symbol_by_pc (pc);
+      bound_minimal_symbol msymbol = lookup_minimal_symbol_by_pc (pc);
 
       if (msymbol.minsym == nullptr)
 	error (_("Execution is not within a known function."));
@@ -3113,7 +3115,7 @@ Follow this command with any number of args, to be passed to the program."),
 				       get_args_value,
 				       show_args_command,
 				       &setlist, &showlist);
-  set_cmd_completer (args_set_show.set, filename_completer);
+  set_cmd_completer (args_set_show.set, deprecated_filename_completer);
 
   auto cwd_set_show
     = add_setshow_string_noescape_cmd ("cwd", class_run, _("\
@@ -3129,7 +3131,7 @@ working directory."),
 				       set_cwd_value, get_inferior_cwd,
 				       show_cwd_command,
 				       &setlist, &showlist);
-  set_cmd_completer (cwd_set_show.set, filename_completer);
+  set_cmd_completer (cwd_set_show.set, deprecated_filename_completer);
 
   c = add_cmd ("environment", no_class, environment_info, _("\
 The environment to give the program, or one variable's value.\n\
@@ -3163,7 +3165,7 @@ This path is equivalent to the $PATH shell variable.  It is a list of\n\
 directories, separated by colons.  These directories are searched to find\n\
 fully linked executable files and separately compiled object files as \
 needed."));
-  set_cmd_completer (c, filename_completer);
+  set_cmd_completer (c, deprecated_filename_completer);
 
   c = add_cmd ("paths", no_class, path_info, _("\
 Current search path for finding object files.\n\
@@ -3313,18 +3315,18 @@ Specifying -a and an ignore count simultaneously is an error."));
     = add_com ("run", class_run, run_command, _("\
 Start debugged program.\n"
 RUN_ARGS_HELP));
-  set_cmd_completer (run_cmd, filename_completer);
+  set_cmd_completer (run_cmd, deprecated_filename_completer);
   add_com_alias ("r", run_cmd, class_run, 1);
 
   c = add_com ("start", class_run, start_command, _("\
 Start the debugged program stopping at the beginning of the main procedure.\n"
 RUN_ARGS_HELP));
-  set_cmd_completer (c, filename_completer);
+  set_cmd_completer (c, deprecated_filename_completer);
 
   c = add_com ("starti", class_run, starti_command, _("\
 Start the debugged program stopping at the first instruction.\n"
 RUN_ARGS_HELP));
-  set_cmd_completer (c, filename_completer);
+  set_cmd_completer (c, deprecated_filename_completer);
 
   add_com ("interrupt", class_run, interrupt_command,
 	   _("Interrupt the execution of the debugged program.\n\
diff --git a/gdb/inferior.c b/gdb/inferior.c
index 6a19767..21f37c8 100644
--- a/gdb/inferior.c
+++ b/gdb/inferior.c
@@ -790,6 +790,10 @@ inferior_command (const char *args, int from_tty)
 	  notify_user_selected_context_changed
 	    (USER_SELECTED_INFERIOR);
 	}
+
+      /* Switching current inferior may have made one of the inferiors
+	 prunable, so prune it.  */
+      prune_inferiors ();
     }
 }
 
@@ -1112,7 +1116,7 @@ as main program.\n\
 By default, the new inferior inherits the current inferior's connection.\n\
 If -no-connection is specified, the new inferior begins with\n\
 no target connection yet."));
-  set_cmd_completer (c, filename_completer);
+  set_cmd_completer (c, deprecated_filename_completer);
 
   add_com ("remove-inferiors", no_class, remove_inferior_command, _("\
 Remove inferior ID (or list of IDs).\n\
diff --git a/gdb/infrun.c b/gdb/infrun.c
index 06b454b..4ca1545 100644
--- a/gdb/infrun.c
+++ b/gdb/infrun.c
@@ -8245,7 +8245,8 @@ process_event_stop_test (struct execution_control_state *ecs)
 			       "it's not the start of a statement");
 	}
     }
-  else if (execution_direction == EXEC_REVERSE
+
+  if (execution_direction == EXEC_REVERSE
 	  && *curr_frame_id != original_frame_id
 	  && original_frame_id.code_addr_p && curr_frame_id->code_addr_p
 	  && original_frame_id.code_addr == curr_frame_id->code_addr)
@@ -9266,8 +9267,15 @@ print_no_history_reason (struct ui_out *uiout)
 {
   if (uiout->is_mi_like_p ())
     uiout->field_string ("reason", async_reason_lookup (EXEC_ASYNC_NO_HISTORY));
+  else if (execution_direction == EXEC_FORWARD)
+    uiout->text ("\nReached end of recorded history; stopping.\nFollowing "
+		 "forward execution will be added to history.\n");
   else
-    uiout->text ("\nNo more reverse-execution history.\n");
+    {
+      gdb_assert (execution_direction == EXEC_REVERSE);
+      uiout->text ("\nReached end of recorded history; stopping.\nBackward "
+		   "execution from here not possible.\n");
+    }
 }
 
 /* Print current location without a level number, if we have changed
@@ -9296,12 +9304,24 @@ print_stop_location (const target_waitstatus &ws)
 	  && (tp->control.step_start_function
 	      == find_pc_function (tp->stop_pc ())))
 	{
-	  /* Finished step, just print source line.  */
-	  source_flag = SRC_LINE;
+	  symtab_and_line sal = find_frame_sal (get_selected_frame (nullptr));
+	  if (sal.symtab != tp->current_symtab)
+	    {
+	      /* Finished step in same frame but into different file, print
+		 location and source line.  */
+	      source_flag = SRC_AND_LOC;
+	    }
+	  else
+	    {
+	      /* Finished step in same frame and same file, just print source
+		 line.  */
+	      source_flag = SRC_LINE;
+	    }
 	}
       else
 	{
-	  /* Print location and source line.  */
+	  /* Finished step into different frame, print location and source
+	     line.  */
 	  source_flag = SRC_AND_LOC;
 	}
       break;
diff --git a/gdb/inline-frame.c b/gdb/inline-frame.c
index bed99dc..8ba886c 100644
--- a/gdb/inline-frame.c
+++ b/gdb/inline-frame.c
@@ -27,6 +27,8 @@
 #include "regcache.h"
 #include "symtab.h"
 #include "frame.h"
+#include "cli/cli-cmds.h"
+#include "cli/cli-style.h"
 #include <algorithm>
 
 /* We need to save a few variables for every thread stopped at the
@@ -35,25 +37,33 @@
    keep our own list.  */
 struct inline_state
 {
-  inline_state (thread_info *thread_, CORE_ADDR saved_pc_,
-		std::vector<symbol *> &&skipped_symbols_)
-    : thread (thread_), saved_pc (saved_pc_),
-      skipped_symbols (std::move (skipped_symbols_))
+  inline_state (thread_info *thread_, int skipped_frames_, CORE_ADDR saved_pc_,
+		std::vector<const symbol *> &&function_symbols_)
+    : thread (thread_), skipped_frames (skipped_frames_), saved_pc (saved_pc_),
+      function_symbols (std::move (function_symbols_))
   {}
 
   /* The thread this data relates to.  It should be a currently
      stopped thread.  */
   thread_info *thread;
 
-  /* Only valid if SKIPPED_SYMBOLS is not empty.  This is the PC used
-     when calculating SKIPPED_SYMBOLS; used to check whether we have
-     moved to a new location by user request.  If so, we invalidate
-     any skipped frames.  */
+  /* The number of inlined functions we are skipping.  Each of these
+     functions can be stepped in to.  */
+  int skipped_frames;
+
+  /* This is the PC used when calculating FUNCTION_SYMBOLS; used to check
+     whether we have moved to a new location by user request.  If so, we
+     invalidate any skipped frames.  */
   CORE_ADDR saved_pc;
 
-  /* The list of all function symbols that have been skipped, from inner most
-     to outer most.  It is used to find the call site of the current frame.  */
-  std::vector<struct symbol *> skipped_symbols;
+  /* The list of all inline functions that start at SAVED_PC, except for
+     the last entry which will either be a non-inline function, or an
+     inline function that doesn't start at SAVED_PC.  This last entry is
+     the function that "contains" all of the earlier functions.
+
+     This list can be empty if SAVED_PC is for a code region which is not
+     covered by any function (inline or non-inline).  */
+  std::vector<const symbol *> function_symbols;
 };
 
 static std::vector<inline_state> inline_states;
@@ -242,12 +252,10 @@ inline_frame_sniffer (const struct frame_unwind *self,
   /* If this is the topmost frame, or all frames above us are inlined,
      then check whether we were requested to skip some frames (so they
      can be stepped into later).  */
-  if (state != nullptr
-      && !state->skipped_symbols.empty ()
-      && next_frame == nullptr)
+  if (state != NULL && state->skipped_frames > 0 && next_frame == NULL)
     {
-      gdb_assert (depth >= state->skipped_symbols.size ());
-      depth -= state->skipped_symbols.size ();
+      gdb_assert (depth >= state->skipped_frames);
+      depth -= state->skipped_frames;
     }
 
   /* If all the inlined functions here already have frames, then pass
@@ -300,10 +308,11 @@ block_starting_point_at (CORE_ADDR pc, const struct block *block)
 
 /* Loop over the stop chain and determine if execution stopped in an
    inlined frame because of a breakpoint with a user-specified location
-   set at FRAME_BLOCK.  */
+   set at FRAME_SYMBOL.  */
 
 static bool
-stopped_by_user_bp_inline_frame (const block *frame_block, bpstat *stop_chain)
+stopped_by_user_bp_inline_frame (const symbol *frame_symbol,
+				 bpstat *stop_chain)
 {
   for (bpstat *s = stop_chain; s != nullptr; s = s->next)
     {
@@ -324,7 +333,7 @@ stopped_by_user_bp_inline_frame (const block *frame_block, bpstat *stop_chain)
 		 to presenting the stop at the innermost inline
 		 function.  */
 	      if (loc->symbol == nullptr
-		  || frame_block == loc->symbol->value_block ())
+		  || frame_symbol == loc->symbol)
 		return true;
 	    }
 	}
@@ -333,56 +342,109 @@ stopped_by_user_bp_inline_frame (const block *frame_block, bpstat *stop_chain)
   return false;
 }
 
+/* Return a list of all the inline function symbols that start at THIS_PC
+   and the symbol for the function which contains all of the inline
+   functions.
+
+   The function symbols are ordered such that the most inner function is
+   first.
+
+   The returned list can be empty if there are no function at THIS_PC.  Or
+   the returned list may have only a single entry if there are no inline
+   functions starting at THIS_PC.  */
+
+static std::vector<const symbol *>
+gather_inline_frames (CORE_ADDR this_pc)
+{
+  /* Build the list of inline frames starting at THIS_PC.  After the loop,
+     CUR_BLOCK is expected to point at the first function symbol (inlined or
+     not) "containing" the inline frames starting at THIS_PC.  */
+  const block *cur_block = block_for_pc (this_pc);
+  if (cur_block == nullptr)
+    return {};
+
+  std::vector<const symbol *> function_symbols;
+  while (cur_block != nullptr)
+    {
+      if (cur_block->inlined_p ())
+	{
+	  gdb_assert (cur_block->function () != nullptr);
+
+	  /* See comments in inline_frame_this_id about this use
+	     of BLOCK_ENTRY_PC.  */
+	  if (cur_block->entry_pc () == this_pc
+	      || block_starting_point_at (this_pc, cur_block))
+	    function_symbols.push_back (cur_block->function ());
+	  else
+	    break;
+	}
+      else if (cur_block->function () != nullptr)
+	break;
+
+      cur_block = cur_block->superblock ();
+    }
+
+  /* If we have a code region for which we have no function blocks,
+     possibly due to bad debug, or possibly just when some debug
+     information has been stripped, then we can end up in a situation where
+     there are global and static blocks for an address, but no function
+     blocks.  In this case the early return above will not trigger as we
+     will find the static block for THIS_PC, but in the loop above we will
+     fail to find any function blocks (inline or non-inline) and so
+     CUR_BLOCK will eventually become NULL.  If this happens then
+     FUNCTION_SYMBOLS must be empty (as we found no function blocks).
+
+     Otherwise, if we did find a function block, then we should only leave
+     the above loop when CUR_BLOCK is pointing to a non-inline function
+     that possibly contains some inline functions, or CUR_BLOCK should
+     point to an inline function that doesn't start at THIS_PC.  */
+  if (cur_block != nullptr)
+    {
+      gdb_assert (cur_block->function () != nullptr);
+      function_symbols.push_back (cur_block->function ());
+    }
+  else
+    gdb_assert (function_symbols.empty ());
+
+  return function_symbols;
+}
+
 /* See inline-frame.h.  */
 
 void
 skip_inline_frames (thread_info *thread, bpstat *stop_chain)
 {
-  const struct block *frame_block, *cur_block;
-  std::vector<struct symbol *> skipped_syms;
+  gdb_assert (find_inline_frame_state (thread) == nullptr);
 
-  /* This function is called right after reinitializing the frame
-     cache.  We try not to do more unwinding than absolutely
-     necessary, for performance.  */
   CORE_ADDR this_pc = get_frame_pc (get_current_frame ());
-  frame_block = block_for_pc (this_pc);
 
-  if (frame_block != NULL)
+  std::vector<const symbol *> function_symbols
+    = gather_inline_frames (this_pc);
+
+  /* Figure out how many of the inlined frames to skip.  Do not skip an
+     inlined frame (and its callers) if execution stopped because of a user
+     breakpoint for this specific function.
+
+     By default, skip all the found inlined frames.
+
+     The last entry in FUNCTION_SYMBOLS is special, this is the function
+     which contains all of the inlined functions, we never skip this.  */
+  int skipped_frames = 0;
+
+  for (const auto sym : function_symbols)
     {
-      cur_block = frame_block;
-      while (cur_block->superblock ())
-	{
-	  if (cur_block->inlined_p ())
-	    {
-	      /* See comments in inline_frame_this_id about this use
-		 of BLOCK_ENTRY_PC.  */
-	      if (cur_block->entry_pc () == this_pc
-		  || block_starting_point_at (this_pc, cur_block))
-		{
-		  /* Do not skip the inlined frame if execution
-		     stopped in an inlined frame because of a user
-		     breakpoint for this inline function.  */
-		  if (stopped_by_user_bp_inline_frame (cur_block, stop_chain))
-		    break;
-
-		  skipped_syms.push_back (cur_block->function ());
-		}
-	      else
-		break;
-	    }
-	  else if (cur_block->function () != NULL)
-	    break;
+      if (stopped_by_user_bp_inline_frame (sym, stop_chain)
+	  || sym == function_symbols.back ())
+	break;
 
-	  cur_block = cur_block->superblock ();
-	}
+      ++skipped_frames;
     }
 
-  gdb_assert (find_inline_frame_state (thread) == NULL);
-
-  if (!skipped_syms.empty ())
+  if (skipped_frames > 0)
     reinit_frame_cache ();
 
-  inline_states.emplace_back (thread, this_pc, std::move (skipped_syms));
+  inline_states.emplace_back (thread, skipped_frames, this_pc,
+			      std::move (function_symbols));
 }
 
 /* Step into an inlined function by unhiding it.  */
@@ -392,10 +454,8 @@ step_into_inline_frame (thread_info *thread)
 {
   inline_state *state = find_inline_frame_state (thread);
 
-  gdb_assert (state != nullptr);
-  gdb_assert (!state->skipped_symbols.empty ());
-
-  state->skipped_symbols.pop_back ();
+  gdb_assert (state != NULL && state->skipped_frames > 0);
+  state->skipped_frames--;
   reinit_frame_cache ();
 }
 
@@ -410,22 +470,29 @@ inline_skipped_frames (thread_info *thread)
   if (state == NULL)
     return 0;
   else
-    return state->skipped_symbols.size ();
+    return state->skipped_frames;
 }
 
 /* If one or more inlined functions are hidden, return the symbol for
    the function inlined into the current frame.  */
 
-struct symbol *
+const symbol *
 inline_skipped_symbol (thread_info *thread)
 {
   inline_state *state = find_inline_frame_state (thread);
   gdb_assert (state != NULL);
 
   /* This should only be called when we are skipping at least one frame,
-     hence SKIPPED_SYMBOLS will have at least one item when we get here.  */
-  gdb_assert (!state->skipped_symbols.empty ());
-  return state->skipped_symbols.back ();
+     hence FUNCTION_SYMBOLS will contain more than one entry (the last
+     entry is the "outer" containing function).
+
+     As we initialise SKIPPED_FRAMES at the same time as we build
+     FUNCTION_SYMBOLS it should be true that SKIPPED_FRAMES never indexes
+     outside of the FUNCTION_SYMBOLS vector.  */
+  gdb_assert (state->function_symbols.size () > 1);
+  gdb_assert (state->skipped_frames > 0);
+  gdb_assert (state->skipped_frames < state->function_symbols.size ());
+  return state->function_symbols[state->skipped_frames - 1];
 }
 
 /* Return the number of functions inlined into THIS_FRAME.  Some of
@@ -453,3 +520,93 @@ frame_inlined_callees (const frame_info_ptr &this_frame)
 
   return inline_count;
 }
+
+/* The 'maint info inline-frames' command.  Takes an optional address
+   expression and displays inline frames that start at the given address,
+   or at the address of the current thread if no address is given.  */
+
+static void
+maintenance_info_inline_frames (const char *arg, int from_tty)
+{
+  std::optional<std::vector<const symbol *>> local_function_symbols;
+  std::vector<const symbol *> *function_symbols;
+  int skipped_frames;
+  CORE_ADDR addr;
+
+  if (arg == nullptr)
+    {
+      /* With no argument then the user wants to know about the current
+	 inline frame information.  This information is cached per-thread
+	 and can be updated as the user steps between inline functions at
+	 the current address.  */
+
+      if (inferior_ptid == null_ptid)
+	error (_("no inferior thread"));
+
+      thread_info *thread = inferior_thread ();
+      auto it = std::find_if (inline_states.begin (), inline_states.end (),
+			      [thread] (const inline_state &istate)
+			      {
+				return thread == istate.thread;
+			      });
+
+      /* Stopped threads always have cached inline_state information.  */
+      gdb_assert (it != inline_states.end ());
+
+      gdb_printf (_("Cached inline state information for thread %s.\n"),
+		  print_thread_id (thread));
+
+      function_symbols = &it->function_symbols;
+      skipped_frames = it->skipped_frames;
+      addr = it->saved_pc;
+    }
+  else
+    {
+      /* If there is an argument then parse it as an address, the user is
+	 asking about inline functions that start at the given address.  */
+
+      addr = parse_and_eval_address (arg);
+      local_function_symbols.emplace (gather_inline_frames (addr));
+
+      function_symbols = &(local_function_symbols.value ());
+      skipped_frames = function_symbols->size () - 1;
+    }
+
+  /* The address we're analysing.  */
+  gdb_printf (_("program counter = %ps\n"),
+	      styled_string (address_style.style (),
+			     core_addr_to_string_nz (addr)));
+
+  gdb_printf (_("skipped frames = %d\n"), skipped_frames);
+
+  /* Print the full list of function symbols in STATE.  Highlight the
+     current function as indicated by the skipped frames counter.  */
+  for (size_t i = 0; i < function_symbols->size (); ++i)
+    gdb_printf (_("%c %ps\n"),
+		(i == skipped_frames ? '>' : ' '),
+		styled_string (function_name_style.style (),
+			       (*function_symbols)[i]->print_name ()));
+}
+
+
+
+void _initialize_inline_frame ();
+void
+_initialize_inline_frame ()
+{
+  add_cmd ("inline-frames", class_maintenance, maintenance_info_inline_frames,
+	   _("\
+Display inline frame information for current thread.\n\
+\n\
+Usage:\n\
+\n\
+  maintenance info inline-frames [ADDRESS]\n\
+\n\
+With no ADDRESS show all inline frames starting at the current program\n\
+counter address.  When ADDRESS is given, list all inline frames starting\n\
+at ADDRESS.\n\
+\n\
+The last frame listed might not start at ADDRESS, this is the frame that\n\
+contains the other inline frames."),
+	   &maintenanceinfolist);
+}
diff --git a/gdb/inline-frame.h b/gdb/inline-frame.h
index bbe617c..3ddc9cf 100644
--- a/gdb/inline-frame.h
+++ b/gdb/inline-frame.h
@@ -62,7 +62,7 @@ int inline_skipped_frames (thread_info *thread);
 /* If one or more inlined functions are hidden, return the symbol for
    the function inlined into the current frame.  */
 
-struct symbol *inline_skipped_symbol (thread_info *thread);
+const symbol *inline_skipped_symbol (thread_info *thread);
 
 /* Return the number of functions inlined into THIS_FRAME.  Some of
    the callees may not have associated frames (see
diff --git a/gdb/jit.c b/gdb/jit.c
index 2744d03..78b3d98 100644
--- a/gdb/jit.c
+++ b/gdb/jit.c
@@ -613,6 +613,7 @@ finalize_symtab (struct gdb_symtab *stab, struct objfile *objfile)
 	new_block = new (&objfile->objfile_obstack) global_block;
       else
 	new_block = new (&objfile->objfile_obstack) block;
+
       new_block->set_multidict
 	(mdict_create_linear (&objfile->objfile_obstack, NULL));
       new_block->set_superblock (block_iter);
@@ -624,7 +625,7 @@ finalize_symtab (struct gdb_symtab *stab, struct objfile *objfile)
       bv->set_block (i, new_block);
 
       if (i == GLOBAL_BLOCK)
-	new_block->set_compunit_symtab (cust);
+	new_block->as_global_block ()->set_compunit (cust);
     }
 
   /* Fill up the superblock fields for the real blocks, using the
@@ -880,7 +881,7 @@ jit_breakpoint_re_set_internal (struct gdbarch *gdbarch, program_space *pspace)
       /* Lookup the registration symbol.  If it is missing, then we
 	 assume we are not attached to a JIT.  */
       bound_minimal_symbol reg_symbol
-	= lookup_minimal_symbol_text (jit_break_name, the_objfile);
+	= lookup_minimal_symbol_text (pspace, jit_break_name, the_objfile);
       if (reg_symbol.minsym == NULL
 	  || reg_symbol.value_address () == 0)
 	{
@@ -1328,7 +1329,7 @@ Usage: jit-reader-load FILE\n\
 Try to load file FILE as a debug info reader (and unwinder) for\n\
 JIT compiled code.  The file is loaded from " JIT_READER_DIR ",\n\
 relocated relative to the GDB executable if required."));
-      set_cmd_completer (c, filename_completer);
+      set_cmd_completer (c, deprecated_filename_completer);
 
       c = add_com ("jit-reader-unload", no_class,
 		   jit_reader_unload_command, _("\
diff --git a/gdb/language.c b/gdb/language.c
index be6a1e8..d697331 100644
--- a/gdb/language.c
+++ b/gdb/language.c
@@ -110,6 +110,13 @@ scoped_restore_current_language::scoped_restore_current_language ()
 {
 }
 
+scoped_restore_current_language::scoped_restore_current_language
+    (enum language lang)
+  : scoped_restore_current_language ()
+{
+  set_language (lang);
+}
+
 scoped_restore_current_language::~scoped_restore_current_language ()
 {
   /* If both are NULL, then that means dont_restore was called.  */
diff --git a/gdb/language.h b/gdb/language.h
index a2ce169..985e622 100644
--- a/gdb/language.h
+++ b/gdb/language.h
@@ -860,6 +860,10 @@ class scoped_restore_current_language
 public:
 
   scoped_restore_current_language ();
+
+  /* Set the current language as well.  */
+  explicit scoped_restore_current_language (enum language lang);
+
   ~scoped_restore_current_language ();
 
   scoped_restore_current_language (scoped_restore_current_language &&other)
diff --git a/gdb/linespec.c b/gdb/linespec.c
index 9b0652c..d525626 100644
--- a/gdb/linespec.c
+++ b/gdb/linespec.c
@@ -23,7 +23,6 @@
 #include "symfile.h"
 #include "objfiles.h"
 #include "source.h"
-#include "demangle.h"
 #include "value.h"
 #include "completer.h"
 #include "cp-abi.h"
@@ -34,7 +33,6 @@
 #include "linespec.h"
 #include "language.h"
 #include "interps.h"
-#include "mi/mi-cmds.h"
 #include "target.h"
 #include "arch-utils.h"
 #include <ctype.h>
@@ -2069,12 +2067,19 @@ create_sals_line_offset (struct linespec_state *self,
       const linetable_entry *best_entry = NULL;
       int i, j;
 
+      /* True if the provided line gave an exact match.  False if we had to
+	 search for the next following line with code.  */
+      bool was_exact = true;
+
       std::vector<symtab_and_line> intermediate_results
 	= decode_digits_ordinary (self, ls, val.line, &best_entry);
       if (intermediate_results.empty () && best_entry != NULL)
-	intermediate_results = decode_digits_ordinary (self, ls,
-						       best_entry->line,
-						       &best_entry);
+	{
+	  was_exact = false;
+	  intermediate_results = decode_digits_ordinary (self, ls,
+							 best_entry->line,
+							 &best_entry);
+	}
 
       /* For optimized code, the compiler can scatter one source line
 	 across disjoint ranges of PC values, even when no duplicate
@@ -2117,11 +2122,45 @@ create_sals_line_offset (struct linespec_state *self,
 	    struct symbol *sym = (blocks[i]
 				  ? blocks[i]->containing_function ()
 				  : NULL);
+	    symtab_and_line &sal = intermediate_results[i];
+
+	    /* Don't consider a match if:
+
+	       - the provided line did not give an exact match (so we
+		 started looking for lines below until we found one with
+		 code associated to it)
+	       - the found location is exactly the start of a function
+	       - the provided line is above the declaration line of the
+		 function
+
+	       Consider the following source:
+
+	       10 } // end of a previous function
+	       11
+	       12 int
+	       13 main (void)
+	       14 {
+	       15   int i = 1;
+	       16
+	       17   return 0;
+	       18 }
+
+	       The intent of this heuristic is that a breakpoint requested on
+	       line 11 and 12 will not result in a breakpoint on main, but a
+	       breakpoint on line 13 will.  A breakpoint requested on the empty
+	       line 16 will also result in a breakpoint in main, at line 17.  */
+	    if (!was_exact
+		&& sym != nullptr
+		&& sym->aclass () == LOC_BLOCK
+		&& sal.pc == sym->value_block ()->entry_pc ()
+		&& val.line < sym->line ())
+	      continue;
 
 	    if (self->funfirstline)
-	      skip_prologue_sal (&intermediate_results[i]);
-	    intermediate_results[i].symbol = sym;
-	    add_sal_to_sals (self, &values, &intermediate_results[i],
+	      skip_prologue_sal (&sal);
+
+	    sal.symbol = sym;
+	    add_sal_to_sals (self, &values, &sal,
 			     sym ? sym->natural_name () : NULL, 0);
 	  }
     }
@@ -2129,10 +2168,12 @@ create_sals_line_offset (struct linespec_state *self,
   if (values.empty ())
     {
       if (ls->explicit_loc.source_filename)
-	throw_error (NOT_FOUND_ERROR, _("No line %d in file \"%s\"."),
+	throw_error (NOT_FOUND_ERROR,
+		     _("No compiled code for line %d in file \"%s\"."),
 		     val.line, ls->explicit_loc.source_filename.get ());
       else
-	throw_error (NOT_FOUND_ERROR, _("No line %d in the current file."),
+	throw_error (NOT_FOUND_ERROR,
+		     _("No compiled code for line %d in the current file."),
 		     val.line);
     }
 
@@ -3692,15 +3733,11 @@ collect_symtabs_from_filename (const char *file,
 	  if (pspace->executing_startup)
 	    continue;
 
-	  set_current_program_space (pspace);
-	  iterate_over_symtabs (file, collector);
+	  iterate_over_symtabs (pspace, file, collector);
 	}
     }
   else
-    {
-      set_current_program_space (search_pspace);
-      iterate_over_symtabs (file, collector);
-    }
+    iterate_over_symtabs (search_pspace, file, collector);
 
   return collector.release_symtabs ();
 }
@@ -4165,7 +4202,7 @@ minsym_found (struct linespec_state *self, struct objfile *objfile,
 static void
 add_minsym (struct minimal_symbol *minsym, struct objfile *objfile,
 	    struct symtab *symtab, int list_mode,
-	    std::vector<struct bound_minimal_symbol> *msyms)
+	    std::vector<bound_minimal_symbol> *msyms)
 {
   if (symtab != NULL)
     {
@@ -4202,7 +4239,7 @@ search_minsyms_for_name (struct collect_info *info,
 			 struct program_space *search_pspace,
 			 struct symtab *symtab)
 {
-  std::vector<struct bound_minimal_symbol> minsyms;
+  std::vector<bound_minimal_symbol> minsyms;
 
   if (symtab == NULL)
     {
diff --git a/gdb/linux-fork.c b/gdb/linux-fork.c
index 319a13f..c457a90 100644
--- a/gdb/linux-fork.c
+++ b/gdb/linux-fork.c
@@ -484,10 +484,12 @@ inferior_call_waitpid (ptid_t pptid, int pid)
   scoped_switch_fork_info switch_fork_info (pptid);
 
   /* Get the waitpid_fn.  */
-  if (lookup_minimal_symbol ("waitpid", NULL, NULL).minsym != NULL)
+  if (lookup_minimal_symbol (current_program_space, "waitpid").minsym
+      != nullptr)
     waitpid_fn = find_function_in_inferior ("waitpid", &waitpid_objf);
   if (!waitpid_fn
-      && lookup_minimal_symbol ("_waitpid", NULL, NULL).minsym != NULL)
+      && (lookup_minimal_symbol (current_program_space, "_waitpid").minsym
+	  != nullptr))
     waitpid_fn = find_function_in_inferior ("_waitpid", &waitpid_objf);
   if (waitpid_fn != nullptr)
     {
@@ -638,9 +640,7 @@ info_checkpoints_command (const char *arg, int from_tty)
 	gdb_printf (_(", line %d"), sal.line);
       if (!sal.symtab && !sal.line)
 	{
-	  struct bound_minimal_symbol msym;
-
-	  msym = lookup_minimal_symbol_by_pc (pc);
+	  bound_minimal_symbol msym = lookup_minimal_symbol_by_pc (pc);
 	  if (msym.minsym)
 	    gdb_printf (", <%s>", msym.minsym->linkage_name ());
 	}
@@ -703,10 +703,11 @@ checkpoint_command (const char *args, int from_tty)
   
   /* Make the inferior fork, record its (and gdb's) state.  */
 
-  if (lookup_minimal_symbol ("fork", NULL, NULL).minsym != NULL)
+  if (lookup_minimal_symbol (current_program_space, "fork").minsym != nullptr)
     fork_fn = find_function_in_inferior ("fork", &fork_objf);
   if (!fork_fn)
-    if (lookup_minimal_symbol ("_fork", NULL, NULL).minsym != NULL)
+    if (lookup_minimal_symbol (current_program_space, "_fork").minsym
+	!= nullptr)
       fork_fn = find_function_in_inferior ("fork", &fork_objf);
   if (!fork_fn)
     error (_("checkpoint: can't find fork function in inferior."));
diff --git a/gdb/linux-tdep.c b/gdb/linux-tdep.c
index fe880b3..65ec221 100644
--- a/gdb/linux-tdep.c
+++ b/gdb/linux-tdep.c
@@ -43,6 +43,7 @@
 #include "gcore-elf.h"
 #include "solib-svr4.h"
 #include "memtag.h"
+#include "cli/cli-style.h"
 
 #include <ctype.h>
 #include <unordered_map>
@@ -213,7 +214,7 @@ get_linux_gdbarch_data (struct gdbarch *gdbarch)
 
 /* Linux-specific cached data.  This is used by GDB for caching
    purposes for each inferior.  This helps reduce the overhead of
-   transfering data from a remote target to the local host.  */
+   transferring data from a remote target to the local host.  */
 struct linux_info
 {
   /* Cache of the inferior's vsyscall/vDSO mapping range.  Only valid
@@ -457,7 +458,7 @@ struct mapping
 {
   ULONGEST addr;
   ULONGEST endaddr;
-  std::string_view permissions;
+  std::string permissions;
   ULONGEST offset;
   std::string_view device;
   ULONGEST inode;
@@ -484,7 +485,8 @@ read_mapping (const char *line)
   const char *permissions_start = p;
   while (*p && !isspace (*p))
     p++;
-  mapping.permissions = {permissions_start, (size_t) (p - permissions_start)};
+  mapping.permissions = std::string (permissions_start,
+				     (size_t) (p - permissions_start));
 
   mapping.offset = strtoulst (p, &p, 16);
 
@@ -897,51 +899,39 @@ linux_info_proc (struct gdbarch *gdbarch, const char *args,
 	= target_fileio_read_stralloc (NULL, filename);
       if (map != NULL)
 	{
-	  char *line;
-
 	  gdb_printf (_("Mapped address spaces:\n\n"));
-	  if (gdbarch_addr_bit (gdbarch) == 32)
-	    {
-	      gdb_printf ("\t%10s %10s %10s %10s  %s %s\n",
-			  "Start Addr", "  End Addr", "      Size",
-			  "    Offset", "Perms  ", "objfile");
-	    }
-	  else
-	    {
-	      gdb_printf ("  %18s %18s %10s %10s  %s %s\n",
-			  "Start Addr", "  End Addr", "      Size",
-			  "    Offset", "Perms ", "objfile");
-	    }
+	  ui_out_emit_table emitter (current_uiout, 6, -1, "ProcMappings");
+
+	  int width = gdbarch_addr_bit (gdbarch) == 32 ? 10 : 18;
+	  current_uiout->table_header (width, ui_left, "start", "Start Addr");
+	  current_uiout->table_header (width, ui_left, "end", "End Addr");
+	  current_uiout->table_header (width, ui_left, "size", "Size");
+	  current_uiout->table_header (width, ui_left, "offset", "Offset");
+	  current_uiout->table_header (5, ui_left, "perms", "Perms");
+	  current_uiout->table_header (0, ui_left, "objfile", "File");
+	  current_uiout->table_body ();
 
 	  char *saveptr;
-	  for (line = strtok_r (map.get (), "\n", &saveptr);
-	       line;
-	       line = strtok_r (NULL, "\n", &saveptr))
+	  for (const char *line = strtok_r (map.get (), "\n", &saveptr);
+	       line != nullptr;
+	       line = strtok_r (nullptr, "\n", &saveptr))
 	    {
 	      struct mapping m = read_mapping (line);
 
-	      if (gdbarch_addr_bit (gdbarch) == 32)
-		{
-		  gdb_printf ("\t%10s %10s %10s %10s  %-5.*s  %s\n",
-			      paddress (gdbarch, m.addr),
-			      paddress (gdbarch, m.endaddr),
-			      hex_string (m.endaddr - m.addr),
-			      hex_string (m.offset),
-			      (int) m.permissions.size (),
-			      m.permissions.data (),
-			      m.filename);
-		}
-	      else
-		{
-		  gdb_printf ("  %18s %18s %10s %10s  %-5.*s  %s\n",
-			      paddress (gdbarch, m.addr),
-			      paddress (gdbarch, m.endaddr),
-			      hex_string (m.endaddr - m.addr),
-			      hex_string (m.offset),
-			      (int) m.permissions.size (),
-			      m.permissions.data (),
-			      m.filename);
-		}
+	      ui_out_emit_tuple tuple_emitter (current_uiout, nullptr);
+	      current_uiout->field_core_addr ("start", gdbarch, m.addr);
+	      current_uiout->field_core_addr ("end", gdbarch, m.endaddr);
+	      /* These next two aren't really addresses and so
+		 shouldn't be styled as such.  */
+	      current_uiout->field_string ("size",
+					   paddress (gdbarch,
+						     m.endaddr - m.addr));
+	      current_uiout->field_string ("offset",
+					   paddress (gdbarch, m.offset));
+	      current_uiout->field_string ("perms", m.permissions);
+	      current_uiout->field_string ("objfile", m.filename,
+					   file_name_style.style ());
+	      current_uiout->text ("\n");
 	    }
 	}
       else
@@ -1242,42 +1232,34 @@ linux_read_core_file_mappings
 static void
 linux_core_info_proc_mappings (struct gdbarch *gdbarch, const char *args)
 {
+  std::optional<ui_out_emit_table> emitter;
+
   linux_read_core_file_mappings (gdbarch, current_program_space->core_bfd (),
-    [=] (ULONGEST count)
+    [&] (ULONGEST count)
       {
 	gdb_printf (_("Mapped address spaces:\n\n"));
-	if (gdbarch_addr_bit (gdbarch) == 32)
-	  {
-	    gdb_printf ("\t%10s %10s %10s %10s %s\n",
-			"Start Addr",
-			"  End Addr",
-			"      Size", "    Offset", "objfile");
-	  }
-	else
-	  {
-	    gdb_printf ("  %18s %18s %10s %10s %s\n",
-			"Start Addr",
-			"  End Addr",
-			"      Size", "    Offset", "objfile");
-	  }
+	emitter.emplace (current_uiout, 5, -1, "ProcMappings");
+	int width = gdbarch_addr_bit (gdbarch) == 32 ? 10 : 18;
+	current_uiout->table_header (width, ui_left, "start", "Start Addr");
+	current_uiout->table_header (width, ui_left, "end", "End Addr");
+	current_uiout->table_header (width, ui_left, "size", "Size");
+	current_uiout->table_header (width, ui_left, "offset", "Offset");
+	current_uiout->table_header (0, ui_left, "objfile", "File");
+	current_uiout->table_body ();
       },
     [=] (int num, ULONGEST start, ULONGEST end, ULONGEST file_ofs,
 	 const char *filename, const bfd_build_id *build_id)
       {
-	if (gdbarch_addr_bit (gdbarch) == 32)
-	  gdb_printf ("\t%10s %10s %10s %10s %s\n",
-		      paddress (gdbarch, start),
-		      paddress (gdbarch, end),
-		      hex_string (end - start),
-		      hex_string (file_ofs),
-		      filename);
-	else
-	  gdb_printf ("  %18s %18s %10s %10s %s\n",
-		      paddress (gdbarch, start),
-		      paddress (gdbarch, end),
-		      hex_string (end - start),
-		      hex_string (file_ofs),
-		      filename);
+	ui_out_emit_tuple tuple_emitter (current_uiout, nullptr);
+	current_uiout->field_core_addr ("start", gdbarch, start);
+	current_uiout->field_core_addr ("end", gdbarch, end);
+	/* These next two aren't really addresses and so shouldn't be
+	   styled as such.  */
+	current_uiout->field_string ("size", paddress (gdbarch, end - start));
+	current_uiout->field_string ("offset", paddress (gdbarch, file_ofs));
+	current_uiout->field_string ("objfile", filename,
+				     file_name_style.style ());
+	current_uiout->text ("\n");
       });
 }
 
diff --git a/gdb/linux-thread-db.c b/gdb/linux-thread-db.c
index 018bd68..9d84187 100644
--- a/gdb/linux-thread-db.c
+++ b/gdb/linux-thread-db.c
@@ -467,11 +467,11 @@ verbose_dlsym (void *handle, const char *name)
 static int
 inferior_has_bug (const char *ver_symbol, int ver_major_min, int ver_minor_min)
 {
-  struct bound_minimal_symbol version_msym;
   CORE_ADDR version_addr;
   int got, retval = 0;
 
-  version_msym = lookup_minimal_symbol (ver_symbol, NULL, NULL);
+  bound_minimal_symbol version_msym
+    = lookup_minimal_symbol (current_program_space, ver_symbol);
   if (version_msym.minsym == NULL)
     return 0;
 
@@ -810,9 +810,8 @@ static bool
 libpthread_objfile_p (objfile *obj)
 {
   return (libpthread_name_p (objfile_name (obj))
-	  && lookup_minimal_symbol ("pthread_create",
-				    NULL,
-				    obj).minsym != NULL);
+	  && lookup_minimal_symbol (current_program_space,
+				    "pthread_create", obj).minsym != nullptr);
 }
 
 /* Attempt to initialize dlopen()ed libthread_db, described by INFO.
diff --git a/gdb/m2-exp.y b/gdb/m2-exp.y
index 28005e1..2887ad2 100644
--- a/gdb/m2-exp.y
+++ b/gdb/m2-exp.y
@@ -117,7 +117,7 @@ using namespace expr;
 %token <sval> TYPENAME
 
 %token SIZE CAP ORD HIGH ABS MIN_FUNC MAX_FUNC FLOAT_FUNC VAL CHR ODD TRUNC
-%token TSIZE
+%token TSIZE ADR
 %token INC DEC INCL EXCL
 
 /* The GDB scope operator */
@@ -191,6 +191,10 @@ exp	:	ABS '(' exp ')'
 			{ error (_("ABS function is not implemented")); }
 	;
 
+exp	:	ADR '(' exp ')'
+			{ pstate->wrap<unop_addr_operation> (); }
+	;
+
 exp	: 	HIGH '(' exp ')'
 			{ pstate->wrap<m2_unop_high_operation> (); }
 	;
@@ -699,6 +703,7 @@ static struct keyword keytab[] =
     {"IN",    IN         },/* Note space after IN */
     {"AND",   LOGICAL_AND},
     {"ABS",   ABS	 },
+    {"ADR",   ADR	 },
     {"CHR",   CHR	 },
     {"DEC",   DEC	 },
     {"NOT",   NOT	 },
@@ -918,8 +923,9 @@ yylex (void)
     std::string tmp = copy_name (yylval.sval);
     struct symbol *sym;
 
-    if (lookup_symtab (tmp.c_str ()))
+    if (lookup_symtab (current_program_space, tmp.c_str ()) != nullptr)
       return BLOCKNAME;
+
     sym = lookup_symbol (tmp.c_str (), pstate->expression_context_block,
 			 SEARCH_VFT, 0).symbol;
     if (sym && sym->aclass () == LOC_BLOCK)
diff --git a/gdb/m2-typeprint.c b/gdb/m2-typeprint.c
index c0ae722..4ade1ce 100644
--- a/gdb/m2-typeprint.c
+++ b/gdb/m2-typeprint.c
@@ -27,7 +27,6 @@
 #include "gdbcore.h"
 #include "m2-lang.h"
 #include "target.h"
-#include "language.h"
 #include "demangle.h"
 #include "c-lang.h"
 #include "typeprint.h"
diff --git a/gdb/m32c-tdep.c b/gdb/m32c-tdep.c
index d9890d0..28dfb2f 100644
--- a/gdb/m32c-tdep.c
+++ b/gdb/m32c-tdep.c
@@ -2212,8 +2212,8 @@ m32c_return_value (struct gdbarch *gdbarch,
 	  /* Everything else is passed in mem0, using as many bytes as
 	     needed.  This is not what the Renesas tools do, but it's
 	     what GCC does at the moment.  */
-	  struct bound_minimal_symbol mem0
-	    = lookup_minimal_symbol ("mem0", NULL, NULL);
+	  bound_minimal_symbol mem0
+	    = lookup_minimal_symbol (current_program_space, "mem0");
 
 	  if (! mem0.minsym)
 	    error (_("The return value is stored in memory at 'mem0', "
@@ -2244,8 +2244,8 @@ m32c_return_value (struct gdbarch *gdbarch,
 	  /* Everything else is passed in mem0, using as many bytes as
 	     needed.  This is not what the Renesas tools do, but it's
 	     what GCC does at the moment.  */
-	  struct bound_minimal_symbol mem0
-	    = lookup_minimal_symbol ("mem0", NULL, NULL);
+	  bound_minimal_symbol mem0
+	    = lookup_minimal_symbol (current_program_space, "mem0");
 
 	  if (! mem0.minsym)
 	    error (_("The return value is stored in memory at 'mem0', "
@@ -2421,11 +2421,9 @@ m32c_m16c_address_to_pointer (struct gdbarch *gdbarch,
     {
       const char *func_name;
       char *tramp_name;
-      struct bound_minimal_symbol tramp_msym;
 
       /* Try to find a linker symbol at this address.  */
-      struct bound_minimal_symbol func_msym
-	= lookup_minimal_symbol_by_pc (addr);
+      bound_minimal_symbol func_msym = lookup_minimal_symbol_by_pc (addr);
 
       if (! func_msym.minsym)
 	error (_("Cannot convert code address %s to function pointer:\n"
@@ -2438,7 +2436,8 @@ m32c_m16c_address_to_pointer (struct gdbarch *gdbarch,
       strcat (tramp_name, ".plt");
 
       /* Try to find a linker symbol for the trampoline.  */
-      tramp_msym = lookup_minimal_symbol (tramp_name, NULL, NULL);
+      bound_minimal_symbol tramp_msym
+	= lookup_minimal_symbol (current_program_space, tramp_name);
 
       /* We've either got another copy of the name now, or don't need
 	 the name any more.  */
@@ -2502,7 +2501,7 @@ m32c_m16c_pointer_to_address (struct gdbarch *gdbarch,
     {
       /* See if there is a minimal symbol at that address whose name is
 	 "NAME.plt".  */
-      struct bound_minimal_symbol ptr_msym = lookup_minimal_symbol_by_pc (ptr);
+      bound_minimal_symbol ptr_msym = lookup_minimal_symbol_by_pc (ptr);
 
       if (ptr_msym.minsym)
 	{
@@ -2512,7 +2511,6 @@ m32c_m16c_pointer_to_address (struct gdbarch *gdbarch,
 	  if (len > 4
 	      && strcmp (ptr_msym_name + len - 4, ".plt") == 0)
 	    {
-	      struct bound_minimal_symbol func_msym;
 	      /* We have a .plt symbol; try to find the symbol for the
 		 corresponding function.
 
@@ -2522,8 +2520,8 @@ m32c_m16c_pointer_to_address (struct gdbarch *gdbarch,
 	      char *func_name = (char *) xmalloc (len - 4 + 1);
 	      memcpy (func_name, ptr_msym_name, len - 4);
 	      func_name[len - 4] = '\0';
-	      func_msym
-		= lookup_minimal_symbol (func_name, NULL, NULL);
+	      bound_minimal_symbol func_msym
+		= lookup_minimal_symbol (current_program_space, func_name);
 
 	      /* If we do have such a symbol, return its value as the
 		 function's true address.  */
diff --git a/gdb/m32r-tdep.c b/gdb/m32r-tdep.c
index f2f8602..c6428f6 100644
--- a/gdb/m32r-tdep.c
+++ b/gdb/m32r-tdep.c
@@ -800,14 +800,14 @@ m32r_frame_this_id (const frame_info_ptr &this_frame,
     = m32r_frame_unwind_cache (this_frame, this_prologue_cache);
   CORE_ADDR base;
   CORE_ADDR func;
-  struct bound_minimal_symbol msym_stack;
   struct frame_id id;
 
   /* The FUNC is easy.  */
   func = get_frame_func (this_frame);
 
   /* Check if the stack is empty.  */
-  msym_stack = lookup_minimal_symbol ("_stack", NULL, NULL);
+  bound_minimal_symbol msym_stack
+    = lookup_minimal_symbol (current_program_space, "_stack");
   if (msym_stack.minsym && info->base == msym_stack.value_address ())
     return;
 
diff --git a/gdb/m68hc11-tdep.c b/gdb/m68hc11-tdep.c
index e58e44b..12cd0ef 100644
--- a/gdb/m68hc11-tdep.c
+++ b/gdb/m68hc11-tdep.c
@@ -210,9 +210,8 @@ static int soft_reg_initialized = 0;
 static void
 m68hc11_get_register_info (struct m68hc11_soft_reg *reg, const char *name)
 {
-  struct bound_minimal_symbol msymbol;
-
-  msymbol = lookup_minimal_symbol (name, NULL, NULL);
+  bound_minimal_symbol msymbol
+    = lookup_minimal_symbol (current_program_space, name);
   if (msymbol.minsym)
     {
       reg->addr = msymbol.value_address ();
@@ -591,12 +590,10 @@ m68hc11_analyze_instruction (struct gdbarch *gdbarch,
 static enum insn_return_kind
 m68hc11_get_return_insn (CORE_ADDR pc)
 {
-  struct bound_minimal_symbol sym;
-
   /* A flag indicating that this is a STO_M68HC12_FAR or STO_M68HC12_INTERRUPT
      function is stored by elfread.c in the high bit of the info field.
      Use this to decide which instruction the function uses to return.  */
-  sym = lookup_minimal_symbol_by_pc (pc);
+  bound_minimal_symbol sym = lookup_minimal_symbol_by_pc (pc);
   if (sym.minsym == 0)
     return RETURN_RTS;
 
diff --git a/gdb/m68k-linux-nat.c b/gdb/m68k-linux-nat.c
index 7f33739..49cd491 100644
--- a/gdb/m68k-linux-nat.c
+++ b/gdb/m68k-linux-nat.c
@@ -350,7 +350,7 @@ fill_fpregset (const struct regcache *regcache,
 #ifdef HAVE_PTRACE_GETREGS
 
 /* Fetch all floating-point registers from process/thread TID and store
-   thier values in GDB's register array.  */
+   their values in GDB's register array.  */
 
 static void
 fetch_fpregs (struct regcache *regcache, int tid)
diff --git a/gdb/m68k-tdep.c b/gdb/m68k-tdep.c
index 1b8cc92..375d5e6 100644
--- a/gdb/m68k-tdep.c
+++ b/gdb/m68k-tdep.c
@@ -1350,11 +1350,19 @@ static enum gdb_osabi
 m68k_osabi_sniffer (bfd *abfd)
 {
   unsigned int elfosabi = elf_elfheader (abfd)->e_ident[EI_OSABI];
+  enum gdb_osabi osabi = GDB_OSABI_UNKNOWN;
 
   if (elfosabi == ELFOSABI_NONE)
-    return GDB_OSABI_SVR4;
+    {
+      /* Check note sections.  */
+      for (asection *sect : gdb_bfd_sections (abfd))
+	generic_elf_osabi_sniff_abi_tag_sections (abfd, sect, &osabi);
+
+      if (osabi == GDB_OSABI_UNKNOWN)
+	osabi = GDB_OSABI_SVR4;
+    }
 
-  return GDB_OSABI_UNKNOWN;
+  return osabi;
 }
 
 void _initialize_m68k_tdep ();
diff --git a/gdb/machoread.c b/gdb/machoread.c
index be68e45..ef6cf66 100644
--- a/gdb/machoread.c
+++ b/gdb/machoread.c
@@ -390,13 +390,14 @@ static CORE_ADDR
 macho_resolve_oso_sym_with_minsym (struct objfile *main_objfile, asymbol *sym)
 {
   /* For common symbol and global symbols, use the min symtab.  */
-  struct bound_minimal_symbol msym;
   const char *name = sym->name;
 
   if (*name != '\0'
       && *name == bfd_get_symbol_leading_char (main_objfile->obfd.get ()))
     ++name;
-  msym = lookup_minimal_symbol (name, NULL, main_objfile);
+
+  bound_minimal_symbol msym
+    = lookup_minimal_symbol (current_program_space, name, main_objfile);
   if (msym.minsym == NULL)
     {
       warning (_("can't find symbol '%s' in minsymtab"), name);
diff --git a/gdb/maint.c b/gdb/maint.c
index d091634..237c9d8 100644
--- a/gdb/maint.c
+++ b/gdb/maint.c
@@ -546,7 +546,6 @@ maintenance_translate_address (const char *arg, int from_tty)
   CORE_ADDR address;
   struct obj_section *sect;
   const char *p;
-  struct bound_minimal_symbol sym;
 
   if (arg == NULL || *arg == 0)
     error (_("requires argument (address or section + address)"));
@@ -577,6 +576,7 @@ maintenance_translate_address (const char *arg, int from_tty)
 
   address = parse_and_eval_address (p);
 
+  bound_minimal_symbol sym;
   if (sect)
     sym = lookup_minimal_symbol_by_pc_section (address, sect);
   else
diff --git a/gdb/make-target-delegates.py b/gdb/make-target-delegates.py
index bfcf7fa..fc69cb3 100755
--- a/gdb/make-target-delegates.py
+++ b/gdb/make-target-delegates.py
@@ -362,7 +362,7 @@ for current_line in scan_target_h():
 
     delegators.append(name)
 
-with open("target-delegates.c", "w") as f:
+with open("target-delegates-gen.c", "w") as f:
     print(
         gdbcopyright.copyright(
             "make-target-delegates.py", "Boilerplate target methods for GDB"
diff --git a/gdb/mdebugread.c b/gdb/mdebugread.c
index ab4d509..dae4e4d 100644
--- a/gdb/mdebugread.c
+++ b/gdb/mdebugread.c
@@ -413,7 +413,7 @@ static struct parse_stack
 
     struct type *cur_type;	/* Type we parse fields for.  */
     int cur_field;		/* Field number in cur_type.  */
-    CORE_ADDR procadr;		/* Start addres of this procedure.  */
+    CORE_ADDR procadr;		/* Start address of this procedure.  */
     int numargs;		/* Its argument count.  */
   }
 
@@ -1319,7 +1319,7 @@ parse_symbol (SYMR *sh, union aux_ext *ax, char *ext_sh, int bigend,
 		 consequence of GDB's type management; CC and GCC (at
 		 least through version 2.4) both output variables of
 		 either type char * or caddr_t with the type
-		 refering to the stTypedef symbol for caddr_t.  If a future
+		 referring to the stTypedef symbol for caddr_t.  If a future
 		 compiler cleans this up it GDB is not ready for it
 		 yet, but if it becomes ready we somehow need to
 		 disable this check (without breaking the PCC/GCC2.4
@@ -2522,14 +2522,14 @@ parse_partial_symbols (minimal_symbol_reader &reader,
 
 	  /* On certain platforms, some extra label symbols can be
 	     generated by the linker.  One possible usage for this kind
-	     of symbols is to represent the address of the begining of a
+	     of symbols is to represent the address of the beginning of a
 	     given section.  For instance, on Tru64 5.1, the address of
 	     the _ftext label is the start address of the .text section.
 
 	     The storage class of these symbols is usually directly
 	     related to the section to which the symbol refers.  For
 	     instance, on Tru64 5.1, the storage class for the _fdata
-	     label is scData, refering to the .data section.
+	     label is scData, referring to the .data section.
 
 	     It is actually possible that the section associated to the
 	     storage class of the label does not exist.  On True64 5.1
@@ -2892,7 +2892,7 @@ parse_partial_symbols (minimal_symbol_reader &reader,
 		      const char *basename;
 
 		      /* A zero value is probably an indication for the
-			 SunPRO 3.0 compiler.  dbx_end_psymtab explicitly tests
+			 SunPRO 3.0 compiler.  stabs_end_psymtab explicitly tests
 			 for zero, so don't relocate it.  */
 
 		      if (sh.value == 0
@@ -3297,7 +3297,7 @@ parse_partial_symbols (minimal_symbol_reader &reader,
 
 		  case N_ENDM:
 		    /* Solaris 2 end of module, finish current partial
-		       symbol table.  dbx_end_psymtab will set the
+		       symbol table.  stabs_end_psymtab will set the
 		       high text address of PST to the proper value,
 		       which is necessary if a module compiled without
 		       debugging info follows this module.  */
@@ -3368,7 +3368,7 @@ parse_partial_symbols (minimal_symbol_reader &reader,
 	      char *sym_name;
 	      enum address_class theclass;
 	      unrelocated_addr minsym_value;
-	      short section = -1;
+	      int section = -1;
 
 	      (*swap_sym_in) (cur_bfd,
 			      ((char *) debug_info->external_sym
@@ -3616,7 +3616,7 @@ parse_partial_symbols (minimal_symbol_reader &reader,
 	      enum address_class theclass;
 	      SYMR *psh;
 	      CORE_ADDR svalue;
-	      short section;
+	      int section;
 
 	      gdb_assert (ext_ptr->ifd == f_idx);
 
@@ -3686,14 +3686,14 @@ parse_partial_symbols (minimal_symbol_reader &reader,
 	    }
 	}
 
-      /* Link pst to FDR.  dbx_end_psymtab returns NULL if the psymtab was
+      /* Link pst to FDR.  stabs_end_psymtab returns NULL if the psymtab was
 	 empty and put on the free list.  */
       fdr_to_pst[f_idx].pst
-	= dbx_end_psymtab (objfile, partial_symtabs, save_pst,
-			   psymtab_include_list, includes_used,
-			   -1, save_pst->unrelocated_text_high (),
-			   dependency_list, dependencies_used,
-			   textlow_not_set);
+	= stabs_end_psymtab (objfile, partial_symtabs, save_pst,
+			     psymtab_include_list, includes_used,
+			     -1, save_pst->unrelocated_text_high (),
+			     dependency_list, dependencies_used,
+			     textlow_not_set);
       includes_used = 0;
       dependencies_used = 0;
     }
diff --git a/gdb/memattr.c b/gdb/memattr.c
index 735068e..c92792e 100644
--- a/gdb/memattr.c
+++ b/gdb/memattr.c
@@ -134,7 +134,7 @@ create_user_mem_region (CORE_ADDR lo, CORE_ADDR hi,
   int ix = std::distance (user_mem_region_list.begin (), it);
 
   /* Check for an overlapping memory region.  We only need to check
-     in the vincinity - at most one before and one after the
+     in the vicinity - at most one before and one after the
      insertion point.  */
   for (int i = ix - 1; i < ix + 1; i++)
     {
diff --git a/gdb/mep-tdep.c b/gdb/mep-tdep.c
index 913889e..a4ef343 100644
--- a/gdb/mep-tdep.c
+++ b/gdb/mep-tdep.c
@@ -60,7 +60,7 @@
 /* A quick recap for GDB hackers not familiar with the whole Toshiba
    Media Processor story:
 
-   The MeP media engine is a configureable processor: users can design
+   The MeP media engine is a configurable processor: users can design
    their own coprocessors, implement custom instructions, adjust cache
    sizes, select optional standard facilities like add-and-saturate
    instructions, and so on.  Then, they can build custom versions of
diff --git a/gdb/mi/mi-cmd-disas.c b/gdb/mi/mi-cmd-disas.c
index 99b2ae4..a311e25 100644
--- a/gdb/mi/mi-cmd-disas.c
+++ b/gdb/mi/mi-cmd-disas.c
@@ -18,6 +18,7 @@
    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
 
 #include "arch-utils.h"
+#include "progspace.h"
 #include "target.h"
 #include "value.h"
 #include "mi-cmds.h"
@@ -245,7 +246,7 @@ mi_cmd_disassemble (const char *command, const char *const *argv, int argc)
 
   if (line_seen && file_seen)
     {
-      s = lookup_symtab (file_string);
+      s = lookup_symtab (current_program_space, file_string);
       if (s == NULL)
 	error (_("-data-disassemble: Invalid filename."));
       if (!find_line_pc (s, line_num, &start))
diff --git a/gdb/mi/mi-main.c b/gdb/mi/mi-main.c
index 5bcb5f7..b72cd1b9 100644
--- a/gdb/mi/mi-main.c
+++ b/gdb/mi/mi-main.c
@@ -2130,10 +2130,7 @@ mi_cmd_execute (struct mi_parse *parse)
 
   std::optional<scoped_restore_current_language> lang_saver;
   if (parse->language != language_unknown)
-    {
-      lang_saver.emplace ();
-      set_language (parse->language);
-    }
+    lang_saver.emplace (parse->language);
 
   current_context = parse;
 
diff --git a/gdb/mi/mi-out.c b/gdb/mi/mi-out.c
index ff93d2c..9ad26e7 100644
--- a/gdb/mi/mi-out.c
+++ b/gdb/mi/mi-out.c
@@ -35,8 +35,8 @@ mi_ui_out::do_table_begin (int nr_cols, int nr_rows,
 			   const char *tblid)
 {
   open (tblid, ui_out_type_tuple);
-  do_field_signed (-1, -1, ui_left, "nr_rows", nr_rows);
-  do_field_signed (-1, -1, ui_left, "nr_cols", nr_cols);
+  do_field_signed (-1, -1, ui_left, "nr_rows", nr_rows, ui_file_style ());
+  do_field_signed (-1, -1, ui_left, "nr_cols", nr_cols, ui_file_style ());
   open ("hdr", ui_out_type_list);
 }
 
@@ -67,8 +67,8 @@ mi_ui_out::do_table_header (int width, ui_align alignment,
 			    const std::string &col_hdr)
 {
   open (NULL, ui_out_type_tuple);
-  do_field_signed (0, 0, ui_center, "width", width);
-  do_field_signed (0, 0, ui_center, "alignment", alignment);
+  do_field_signed (0, 0, ui_center, "width", width, ui_file_style ());
+  do_field_signed (0, 0, ui_center, "alignment", alignment, ui_file_style ());
   do_field_string (0, 0, ui_center, "col_name", col_name.c_str (),
 		   ui_file_style ());
   do_field_string (0, width, alignment, "colhdr", col_hdr.c_str (),
@@ -96,10 +96,11 @@ mi_ui_out::do_end (ui_out_type type)
 
 void
 mi_ui_out::do_field_signed (int fldno, int width, ui_align alignment,
-			    const char *fldname, LONGEST value)
+			    const char *fldname, LONGEST value,
+			    const ui_file_style &style)
 {
   do_field_string (fldno, width, alignment, fldname, plongest (value),
-		   ui_file_style ());
+		   style);
 }
 
 /* Output an unsigned field.  */
diff --git a/gdb/mi/mi-out.h b/gdb/mi/mi-out.h
index a21a34f..9ad419e 100644
--- a/gdb/mi/mi-out.h
+++ b/gdb/mi/mi-out.h
@@ -62,7 +62,8 @@ protected:
   virtual void do_begin (ui_out_type type, const char *id) override;
   virtual void do_end (ui_out_type type) override;
   virtual void do_field_signed (int fldno, int width, ui_align align,
-				const char *fldname, LONGEST value) override;
+				const char *fldname, LONGEST value,
+				const ui_file_style &style) override;
   virtual void do_field_unsigned (int fldno, int width, ui_align align,
 				  const char *fldname, ULONGEST value)
     override;
diff --git a/gdb/mi/mi-symbol-cmds.c b/gdb/mi/mi-symbol-cmds.c
index 15c032b..e4d890f 100644
--- a/gdb/mi/mi-symbol-cmds.c
+++ b/gdb/mi/mi-symbol-cmds.c
@@ -41,7 +41,7 @@ mi_cmd_symbol_list_lines (const char *command, const char *const *argv,
     error (_("-symbol-list-lines: Usage: SOURCE_FILENAME"));
 
   filename = argv[0];
-  s = lookup_symtab (filename);
+  s = lookup_symtab (current_program_space, filename);
 
   if (s == NULL)
     error (_("-symbol-list-lines: Unknown source file name."));
@@ -95,8 +95,7 @@ output_debug_symbol (ui_out *uiout, domain_search_flags kind,
    and then outputs the fields for this msymbol.  */
 
 static void
-output_nondebug_symbol (ui_out *uiout,
-			const struct bound_minimal_symbol &msymbol)
+output_nondebug_symbol (ui_out *uiout, const bound_minimal_symbol &msymbol)
 {
   struct gdbarch *gdbarch = msymbol.objfile->arch ();
   ui_out_emit_tuple tuple_emitter (uiout, NULL);
diff --git a/gdb/microblaze-tdep.c b/gdb/microblaze-tdep.c
index 3d768d7..609c665 100644
--- a/gdb/microblaze-tdep.c
+++ b/gdb/microblaze-tdep.c
@@ -160,7 +160,7 @@ microblaze_alloc_frame_cache (void)
 /* The base of the current frame is in a frame pointer register.
    This register is noted in frame_extra_info->fp_regnum.
 
-   Note that the existance of an FP might also indicate that the
+   Note that the existence of an FP might also indicate that the
    function has called alloca.  */
 #define MICROBLAZE_MY_FRAME_IN_FP 0x2
 
diff --git a/gdb/minsyms.c b/gdb/minsyms.c
index 38176c4..33eb907 100644
--- a/gdb/minsyms.c
+++ b/gdb/minsyms.c
@@ -358,9 +358,9 @@ lookup_minimal_symbol_demangled (const lookup_name_info &lookup_name,
    Obviously, there must be distinct mangled names for each of these,
    but the demangled names are all the same: S::S or S::~S.  */
 
-struct bound_minimal_symbol
-lookup_minimal_symbol (const char *name, const char *sfile,
-		       struct objfile *objf)
+bound_minimal_symbol
+lookup_minimal_symbol (program_space *pspace, const char *name, objfile *objf,
+		       const char *sfile)
 {
   found_minimal_symbols found;
 
@@ -376,7 +376,7 @@ lookup_minimal_symbol (const char *name, const char *sfile,
 
   lookup_name_info lookup_name (name, symbol_name_match_type::FULL);
 
-  for (objfile *objfile : current_program_space->objfiles ())
+  for (objfile *objfile : pspace->objfiles ())
     {
       if (found.external_symbol.minsym != NULL)
 	break;
@@ -384,7 +384,8 @@ lookup_minimal_symbol (const char *name, const char *sfile,
       if (objf == NULL || objf == objfile
 	  || objf == objfile->separate_debug_objfile_backlink)
 	{
-	  symbol_lookup_debug_printf ("lookup_minimal_symbol (%s, %s, %s)",
+	  symbol_lookup_debug_printf ("lookup_minimal_symbol (%s, %s, %s, %s)",
+				      host_address_to_string (pspace),
 				      name, sfile != NULL ? sfile : "NULL",
 				      objfile_debug_name (objfile));
 
@@ -474,23 +475,14 @@ lookup_minimal_symbol (const char *name, const char *sfile,
   return {};
 }
 
-/* See minsyms.h.  */
-
-struct bound_minimal_symbol
-lookup_bound_minimal_symbol (const char *name)
-{
-  return lookup_minimal_symbol (name, NULL, NULL);
-}
-
 /* See gdbsupport/symbol.h.  */
 
 int
 find_minimal_symbol_address (const char *name, CORE_ADDR *addr,
 			     struct objfile *objfile)
 {
-  struct bound_minimal_symbol sym
-    = lookup_minimal_symbol (name, NULL, objfile);
-
+  bound_minimal_symbol sym
+    = lookup_minimal_symbol (current_program_space, name, objfile);
   if (sym.minsym != NULL)
     *addr = sym.value_address ();
 
@@ -591,10 +583,11 @@ lookup_minimal_symbol_linkage (const char *name, struct objfile *objf)
 
 /* See minsyms.h.  */
 
-struct bound_minimal_symbol
-lookup_minimal_symbol_linkage (const char *name, bool only_main)
+bound_minimal_symbol
+lookup_minimal_symbol_linkage (program_space *pspace, const char *name,
+			       bool only_main)
 {
-  for (objfile *objfile : current_program_space->objfiles ())
+  for (objfile *objfile : pspace->objfiles ())
     {
       if (objfile->separate_debug_objfile_backlink != nullptr)
 	continue;
@@ -613,12 +606,13 @@ lookup_minimal_symbol_linkage (const char *name, bool only_main)
 
 /* See minsyms.h.  */
 
-struct bound_minimal_symbol
-lookup_minimal_symbol_text (const char *name, struct objfile *objf)
+bound_minimal_symbol
+lookup_minimal_symbol_text (program_space *pspace, const char *name,
+			    objfile *objf)
 {
   struct minimal_symbol *msymbol;
-  struct bound_minimal_symbol found_symbol;
-  struct bound_minimal_symbol found_file_symbol;
+  bound_minimal_symbol found_symbol;
+  bound_minimal_symbol found_file_symbol;
 
   unsigned int hash = msymbol_hash (name) % MINIMAL_SYMBOL_HASH_SIZE;
 
@@ -650,7 +644,7 @@ lookup_minimal_symbol_text (const char *name, struct objfile *objf)
 
   if (objf == nullptr)
     {
-      for (objfile *objfile : current_program_space->objfiles ())
+      for (objfile *objfile : pspace->objfiles ())
 	{
 	  if (found_symbol.minsym != NULL)
 	    break;
@@ -765,7 +759,6 @@ lookup_minimal_symbol_by_pc_section (CORE_ADDR pc_in, struct obj_section *sectio
   struct minimal_symbol *msymbol;
   struct minimal_symbol *best_symbol = NULL;
   struct objfile *best_objfile = NULL;
-  struct bound_minimal_symbol result;
 
   if (previous != nullptr)
     {
@@ -997,6 +990,7 @@ lookup_minimal_symbol_by_pc_section (CORE_ADDR pc_in, struct obj_section *sectio
 	}
     }
 
+  bound_minimal_symbol result;
   result.minsym = best_symbol;
   result.objfile = best_objfile;
   return result;
@@ -1004,7 +998,7 @@ lookup_minimal_symbol_by_pc_section (CORE_ADDR pc_in, struct obj_section *sectio
 
 /* See minsyms.h.  */
 
-struct bound_minimal_symbol
+bound_minimal_symbol
 lookup_minimal_symbol_by_pc (CORE_ADDR pc)
 {
   return lookup_minimal_symbol_by_pc_section (pc, NULL);
@@ -1074,20 +1068,19 @@ const struct gnu_ifunc_fns *gnu_ifunc_fns_p = &stub_gnu_ifunc_fns;
 
 
 
-/* Return leading symbol character for a BFD.  If BFD is NULL,
-   return the leading symbol character from the main objfile.  */
+/* Return the leading symbol character for BFD ABFD.  If ABFD is nullptr,
+   return the leading symbol character from the the main objfile of PSPACE..  */
 
 static int
-get_symbol_leading_char (bfd *abfd)
+get_symbol_leading_char (program_space *pspace, bfd *abfd)
 {
   if (abfd != NULL)
     return bfd_get_symbol_leading_char (abfd);
-  if (current_program_space->symfile_object_file != NULL)
-    {
-      objfile *objf = current_program_space->symfile_object_file;
-      if (objf->obfd != NULL)
-	return bfd_get_symbol_leading_char (objf->obfd.get ());
-    }
+
+  if (objfile *objf = pspace->symfile_object_file;
+      objf != nullptr && objf->obfd != nullptr)
+    return bfd_get_symbol_leading_char (objf->obfd.get ());
+
   return 0;
 }
 
@@ -1202,7 +1195,8 @@ minimal_symbol_reader::record_full (std::string_view name,
 
   /* It's safe to strip the leading char here once, since the name
      is also stored stripped in the minimal symbol table.  */
-  if (name[0] == get_symbol_leading_char (m_objfile->obfd.get ()))
+  if (name[0] == get_symbol_leading_char (m_objfile->pspace (),
+					  m_objfile->obfd.get ()))
     name = name.substr (1);
 
   if (ms_type == mst_file_text && startswith (name, "__gnu_compiled"))
@@ -1598,9 +1592,8 @@ find_solib_trampoline_target (const frame_info_ptr &frame, CORE_ADDR pc)
 /* See minsyms.h.  */
 
 CORE_ADDR
-minimal_symbol_upper_bound (struct bound_minimal_symbol minsym)
+minimal_symbol_upper_bound (bound_minimal_symbol minsym)
 {
-  short section;
   struct obj_section *obj_section;
   CORE_ADDR result;
   struct minimal_symbol *iter, *msymbol;
@@ -1622,7 +1615,7 @@ minimal_symbol_upper_bound (struct bound_minimal_symbol minsym)
     = (minsym.objfile->per_bfd->msymbols.get ()
        + minsym.objfile->per_bfd->minimal_symbol_count);
   msymbol = minsym.minsym;
-  section = msymbol->section_index ();
+  int section = msymbol->section_index ();
   for (iter = msymbol + 1; iter != past_the_end; ++iter)
     {
       if ((iter->unrelocated_address ()
diff --git a/gdb/minsyms.h b/gdb/minsyms.h
index d44f281..9659f30 100644
--- a/gdb/minsyms.h
+++ b/gdb/minsyms.h
@@ -20,6 +20,7 @@
 #ifndef MINSYMS_H
 #define MINSYMS_H
 
+struct program_space;
 struct type;
 
 /* Several lookup functions return both a minimal symbol and the
@@ -205,16 +206,12 @@ unsigned int msymbol_hash_iw (const char *);
    symbols are still preferred).  Returns a bound minimal symbol that
    matches, or an empty bound minimal symbol if no match is found.  */
 
-struct bound_minimal_symbol lookup_minimal_symbol (const char *,
-						   const char *,
-						   struct objfile *);
+bound_minimal_symbol lookup_minimal_symbol (program_space *pspace,
+					    const char *name,
+					    objfile *obj = nullptr,
+					    const char *sfile = nullptr);
 
-/* Like lookup_minimal_symbol, but searches all files and
-   objfiles.  */
-
-struct bound_minimal_symbol lookup_bound_minimal_symbol (const char *);
-
-/* Look through all the current minimal symbol tables and find the
+/* Look through all the minimal symbol tables in PSPACE and find the
    first minimal symbol that matches NAME and has text type.  If OBJF
    is non-NULL, limit the search to that objfile.  Returns a bound
    minimal symbol that matches, or an "empty" bound minimal symbol
@@ -222,8 +219,9 @@ struct bound_minimal_symbol lookup_bound_minimal_symbol (const char *);
 
    This function only searches the mangled (linkage) names.  */
 
-struct bound_minimal_symbol lookup_minimal_symbol_text (const char *,
-							struct objfile *);
+bound_minimal_symbol lookup_minimal_symbol_text (program_space *pspace,
+						 const char *name,
+						 objfile *objf);
 
 /* Look through the minimal symbols in OBJF (and its separate debug
    objfiles) for a global (not file-local) minsym whose linkage name
@@ -232,16 +230,16 @@ struct bound_minimal_symbol lookup_minimal_symbol_text (const char *,
    objfile is not accepted.  Returns a bound minimal symbol that
    matches, or an "empty" bound minimal symbol otherwise.  */
 
-extern struct bound_minimal_symbol lookup_minimal_symbol_linkage
-  (const char *name, struct objfile *objf)
+extern bound_minimal_symbol lookup_minimal_symbol_linkage (const char *name,
+							   struct objfile *objf)
   ATTRIBUTE_NONNULL (1) ATTRIBUTE_NONNULL (2);
 
 /* A variant of lookup_minimal_symbol_linkage that iterates over all
-   objfiles.  If ONLY_MAIN is true, then only an objfile with
+   objfiles of PSPACE.  If ONLY_MAIN is true, then only an objfile with
    OBJF_MAINLINE will be considered.  */
 
-extern struct bound_minimal_symbol lookup_minimal_symbol_linkage
-  (const char *name, bool only_main)
+extern bound_minimal_symbol lookup_minimal_symbol_linkage
+  (program_space *pspace, const char *name, bool only_main)
   ATTRIBUTE_NONNULL (1);
 
 /* Look through all the current minimal symbol tables and find the
@@ -287,7 +285,7 @@ enum class lookup_msym_prefer
    then the contents will be set to reference the closest symbol before
    PC_IN.  */
 
-struct bound_minimal_symbol lookup_minimal_symbol_by_pc_section
+bound_minimal_symbol lookup_minimal_symbol_by_pc_section
   (CORE_ADDR pc_in,
    struct obj_section *section,
    lookup_msym_prefer prefer = lookup_msym_prefer::TEXT,
@@ -299,7 +297,7 @@ struct bound_minimal_symbol lookup_minimal_symbol_by_pc_section
    This is a wrapper that calls lookup_minimal_symbol_by_pc_section
    with a NULL section argument.  */
 
-struct bound_minimal_symbol lookup_minimal_symbol_by_pc (CORE_ADDR);
+bound_minimal_symbol lookup_minimal_symbol_by_pc (CORE_ADDR);
 
 /* Iterate over all the minimal symbols in the objfile OBJF which
    match NAME.  Both the ordinary and demangled names of each symbol
@@ -318,7 +316,7 @@ void iterate_over_minimal_symbols
    symbol in the same section, or the end of the section, as the end
    of the function.  */
 
-CORE_ADDR minimal_symbol_upper_bound (struct bound_minimal_symbol minsym);
+CORE_ADDR minimal_symbol_upper_bound (bound_minimal_symbol minsym);
 
 /* Return the type of MSYMBOL, a minimal symbol of OBJFILE.  If
    ADDRESS_P is not NULL, set it to the MSYMBOL's resolved
diff --git a/gdb/mips-fbsd-tdep.c b/gdb/mips-fbsd-tdep.c
index 7452057..7736078 100644
--- a/gdb/mips-fbsd-tdep.c
+++ b/gdb/mips-fbsd-tdep.c
@@ -468,8 +468,8 @@ static const struct tramp_frame mips64_fbsd_sigframe =
 static CORE_ADDR
 mips_fbsd_skip_solib_resolver (struct gdbarch *gdbarch, CORE_ADDR pc)
 {
-  struct bound_minimal_symbol msym
-    = lookup_bound_minimal_symbol ("_mips_rtld_bind");
+  bound_minimal_symbol msym
+    = lookup_minimal_symbol (current_program_space, "_mips_rtld_bind");
   if (msym.minsym != nullptr && msym.value_address () == pc)
     return frame_unwind_caller_pc (get_current_frame ());
 
diff --git a/gdb/mips-linux-tdep.c b/gdb/mips-linux-tdep.c
index fecefd7..b076d24 100644
--- a/gdb/mips-linux-tdep.c
+++ b/gdb/mips-linux-tdep.c
@@ -699,9 +699,8 @@ mips_linux_in_dynsym_resolve_code (CORE_ADDR pc)
 static CORE_ADDR
 mips_linux_skip_resolver (struct gdbarch *gdbarch, CORE_ADDR pc)
 {
-  struct bound_minimal_symbol resolver;
-
-  resolver = lookup_minimal_symbol ("__dl_runtime_resolve", NULL, NULL);
+  bound_minimal_symbol resolver
+    = lookup_minimal_symbol (current_program_space, "__dl_runtime_resolve");
 
   if (resolver.minsym && resolver.value_address () == pc)
     return frame_unwind_caller_pc (get_current_frame ());
diff --git a/gdb/mips-tdep.c b/gdb/mips-tdep.c
index ae58d7c..c00efbd 100644
--- a/gdb/mips-tdep.c
+++ b/gdb/mips-tdep.c
@@ -490,10 +490,10 @@ mips_make_symbol_special (struct symbol *sym, struct objfile *objfile)
       /* We are in symbol reading so it is OK to cast away constness.  */
       struct block *block = (struct block *) sym->value_block ();
       CORE_ADDR compact_block_start;
-      struct bound_minimal_symbol msym;
 
       compact_block_start = block->start () | 1;
-      msym = lookup_minimal_symbol_by_pc (compact_block_start);
+      bound_minimal_symbol msym
+	= lookup_minimal_symbol_by_pc (compact_block_start);
       if (msym.minsym && !msymbol_is_mips (msym.minsym))
 	{
 	  block->set_start (compact_block_start);
@@ -558,7 +558,7 @@ mips_xfer_register (struct gdbarch *gdbarch, struct regcache *regcache,
 }
 
 /* Determine if a MIPS3 or later cpu is operating in MIPS{1,2} FPU
-   compatiblity mode.  A return value of 1 means that we have
+   compatibility mode.  A return value of 1 means that we have
    physical 64-bit registers, but should treat them as 32-bit registers.  */
 
 static int
@@ -574,7 +574,7 @@ mips2_fp_compat (const frame_info_ptr &frame)
   /* FIXME drow 2002-03-10: This is disabled until we can do it consistently,
      in all the places we deal with FP registers.  PR gdb/413.  */
   /* Otherwise check the FR bit in the status register - it controls
-     the FP compatiblity mode.  If it is clear we are in compatibility
+     the FP compatibility mode.  If it is clear we are in compatibility
      mode.  */
   if ((get_frame_register_unsigned (frame, MIPS_PS_REGNUM) & ST0_FR) == 0)
     return 1;
@@ -592,7 +592,7 @@ static CORE_ADDR heuristic_proc_start (struct gdbarch *, CORE_ADDR);
 static struct cmd_list_element *setmipscmdlist = NULL;
 static struct cmd_list_element *showmipscmdlist = NULL;
 
-/* Integer registers 0 thru 31 are handled explicitly by
+/* Integer registers 0 through 31 are handled explicitly by
    mips_register_name().  Processor specific registers 32 and above
    are listed in the following tables.  */
 
@@ -896,7 +896,7 @@ set_mips64_transfers_32bit_regs (const char *args, int from_tty,
   /* FIXME: cagney/2003-11-15: Should be setting a field in "info"
      instead of relying on globals.  Doing that would let generic code
      handle the search for this specific architecture.  */
-  if (!gdbarch_update_p (info))
+  if (!gdbarch_update_p (current_inferior (), info))
     {
       mips64_transfers_32bit_regs_p = 0;
       error (_("32-bit compatibility mode not supported"));
@@ -920,7 +920,7 @@ mips_convert_register_float_case_p (struct gdbarch *gdbarch, int regnum,
 }
 
 /* This predicate tests for the case of a value of less than 8
-   bytes in width that is being transfered to or from an 8 byte
+   bytes in width that is being transferred to or from an 8 byte
    general purpose register.  */
 static int
 mips_convert_register_gpreg_case_p (struct gdbarch *gdbarch, int regnum,
@@ -1076,7 +1076,7 @@ mips_register_type (struct gdbarch *gdbarch, int regnum)
 	return builtin_type (gdbarch)->builtin_int32;
       else if (tdep->mips64_transfers_32bit_regs_p)
 	/* The target, while possibly using a 64-bit register buffer,
-	   is only transfering 32-bits of each integer register.
+	   is only transferring 32-bits of each integer register.
 	   Reflect this in the cooked/pseudo (ABI) register value.  */
 	return builtin_type (gdbarch)->builtin_int32;
       else if (mips_abi_regsize (gdbarch) == 4)
@@ -1212,13 +1212,12 @@ show_mask_address (struct ui_file *file, int from_tty,
 int
 mips_pc_is_mips (CORE_ADDR memaddr)
 {
-  struct bound_minimal_symbol sym;
-
   /* Flags indicating that this is a MIPS16 or microMIPS function is
      stored by elfread.c in the high bit of the info field.  Use this
      to decide if the function is standard MIPS.  Otherwise if bit 0
      of the address is clear, then this is a standard MIPS function.  */
-  sym = lookup_minimal_symbol_by_pc (make_compact_addr (memaddr));
+  bound_minimal_symbol sym
+    = lookup_minimal_symbol_by_pc (make_compact_addr (memaddr));
   if (sym.minsym)
     return msymbol_is_mips (sym.minsym);
   else
@@ -1230,13 +1229,12 @@ mips_pc_is_mips (CORE_ADDR memaddr)
 int
 mips_pc_is_mips16 (struct gdbarch *gdbarch, CORE_ADDR memaddr)
 {
-  struct bound_minimal_symbol sym;
-
   /* A flag indicating that this is a MIPS16 function is stored by
      elfread.c in the high bit of the info field.  Use this to decide
      if the function is MIPS16.  Otherwise if bit 0 of the address is
      set, then ELF file flags will tell if this is a MIPS16 function.  */
-  sym = lookup_minimal_symbol_by_pc (make_compact_addr (memaddr));
+  bound_minimal_symbol sym
+    = lookup_minimal_symbol_by_pc (make_compact_addr (memaddr));
   if (sym.minsym)
     return msymbol_is_mips16 (sym.minsym);
   else
@@ -1248,14 +1246,13 @@ mips_pc_is_mips16 (struct gdbarch *gdbarch, CORE_ADDR memaddr)
 int
 mips_pc_is_micromips (struct gdbarch *gdbarch, CORE_ADDR memaddr)
 {
-  struct bound_minimal_symbol sym;
-
   /* A flag indicating that this is a microMIPS function is stored by
      elfread.c in the high bit of the info field.  Use this to decide
      if the function is microMIPS.  Otherwise if bit 0 of the address
      is set, then ELF file flags will tell if this is a microMIPS
      function.  */
-  sym = lookup_minimal_symbol_by_pc (make_compact_addr (memaddr));
+  bound_minimal_symbol sym
+    = lookup_minimal_symbol_by_pc (make_compact_addr (memaddr));
   if (sym.minsym)
     return msymbol_is_micromips (sym.minsym);
   else
@@ -1268,14 +1265,13 @@ mips_pc_is_micromips (struct gdbarch *gdbarch, CORE_ADDR memaddr)
 static enum mips_isa
 mips_pc_isa (struct gdbarch *gdbarch, CORE_ADDR memaddr)
 {
-  struct bound_minimal_symbol sym;
-
   /* A flag indicating that this is a MIPS16 or a microMIPS function
      is stored by elfread.c in the high bit of the info field.  Use
      this to decide if the function is MIPS16 or microMIPS or normal
      MIPS.  Otherwise if bit 0 of the address is set, then ELF file
      flags will tell if this is a MIPS16 or a microMIPS function.  */
-  sym = lookup_minimal_symbol_by_pc (make_compact_addr (memaddr));
+  bound_minimal_symbol sym
+    = lookup_minimal_symbol_by_pc (make_compact_addr (memaddr));
   if (sym.minsym)
     {
       if (msymbol_is_micromips (sym.minsym))
@@ -2881,7 +2877,7 @@ mips_insn16_frame_cache (const frame_info_ptr &this_frame, void **this_cache)
     find_pc_partial_function (pc, NULL, &start_addr, NULL);
     if (start_addr == 0)
       start_addr = heuristic_proc_start (gdbarch, pc);
-    /* We can't analyze the prologue if we couldn't find the begining
+    /* We can't analyze the prologue if we couldn't find the beginning
        of the function.  */
     if (start_addr == 0)
       return cache;
@@ -3316,7 +3312,7 @@ mips_micro_frame_cache (const frame_info_ptr &this_frame, void **this_cache)
     find_pc_partial_function (pc, NULL, &start_addr, NULL);
     if (start_addr == 0)
       start_addr = heuristic_proc_start (get_frame_arch (this_frame), pc);
-    /* We can't analyze the prologue if we couldn't find the begining
+    /* We can't analyze the prologue if we couldn't find the beginning
        of the function.  */
     if (start_addr == 0)
       return cache;
@@ -3697,7 +3693,7 @@ mips_insn32_frame_cache (const frame_info_ptr &this_frame, void **this_cache)
     find_pc_partial_function (pc, NULL, &start_addr, NULL);
     if (start_addr == 0)
       start_addr = heuristic_proc_start (gdbarch, pc);
-    /* We can't analyze the prologue if we couldn't find the begining
+    /* We can't analyze the prologue if we couldn't find the beginning
        of the function.  */
     if (start_addr == 0)
       return cache;
@@ -3841,7 +3837,6 @@ mips_stub_frame_sniffer (const struct frame_unwind *self,
 {
   gdb_byte dummy[4];
   CORE_ADDR pc = get_frame_address_in_block (this_frame);
-  struct bound_minimal_symbol msym;
 
   /* Use the stub unwinder for unreadable code.  */
   if (target_read_memory (get_frame_pc (this_frame), dummy, 4) != 0)
@@ -3852,7 +3847,7 @@ mips_stub_frame_sniffer (const struct frame_unwind *self,
 
   /* Calling a PIC function from a non-PIC function passes through a
      stub.  The stub for foo is named ".pic.foo".  */
-  msym = lookup_minimal_symbol_by_pc (pc);
+  bound_minimal_symbol msym = lookup_minimal_symbol_by_pc (pc);
   if (msym.minsym != NULL
       && msym.minsym->linkage_name () != NULL
       && startswith (msym.minsym->linkage_name (), ".pic."))
@@ -4510,7 +4505,7 @@ mips_push_dummy_code (struct gdbarch *gdbarch, CORE_ADDR sp,
      breakpoints inserted in a branch delay slot.  With enough
      bad luck, the 4 bytes located just before our breakpoint
      instruction could look like a branch instruction, and thus
-     trigger the adjustement, and break the function call entirely.
+     trigger the adjustment, and break the function call entirely.
      So, we reserve those 4 bytes and write a nop instruction
      to prevent that from happening.  */
   nop_addr = bp_slot - sizeof (nop_insn);
@@ -4586,7 +4581,7 @@ mips_eabi_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
     }
 
   /* Now load as many as possible of the first arguments into
-     registers, and push the rest onto the stack.  Loop thru args
+     registers, and push the rest onto the stack.  Loop through args
      from first to last.  */
   for (argnum = 0; argnum < nargs; argnum++)
     {
@@ -4759,7 +4754,7 @@ mips_eabi_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
 		}
 
 	      /* Note!!! This is NOT an else clause.  Odd sized
-		 structs may go thru BOTH paths.  Floating point
+		 structs may go through BOTH paths.  Floating point
 		 arguments will not.  */
 	      /* Write this portion of the argument to a general
 		 purpose register.  */
@@ -4980,7 +4975,7 @@ mips_n32n64_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
     }
 
   /* Now load as many as possible of the first arguments into
-     registers, and push the rest onto the stack.  Loop thru args
+     registers, and push the rest onto the stack.  Loop through args
      from first to last.  */
   for (argnum = 0; argnum < nargs; argnum++)
     {
@@ -5111,7 +5106,7 @@ mips_n32n64_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
 		}
 
 	      /* Note!!! This is NOT an else clause.  Odd sized
-		 structs may go thru BOTH paths.  */
+		 structs may go through BOTH paths.  */
 	      /* Write this portion of the argument to a general
 		 purpose register.  */
 	      if (argreg <= mips_last_arg_regnum (gdbarch))
@@ -5460,7 +5455,7 @@ mips_o32_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
     }
 
   /* Now load as many as possible of the first arguments into
-     registers, and push the rest onto the stack.  Loop thru args
+     registers, and push the rest onto the stack.  Loop through args
      from first to last.  */
   for (argnum = 0; argnum < nargs; argnum++)
     {
@@ -5623,7 +5618,7 @@ mips_o32_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
 		}
 
 	      /* Note!!! This is NOT an else clause.  Odd sized
-		 structs may go thru BOTH paths.  */
+		 structs may go through BOTH paths.  */
 	      /* Write this portion of the argument to a general
 		 purpose register.  */
 	      if (argreg <= mips_last_arg_regnum (gdbarch))
@@ -5981,7 +5976,7 @@ mips_o64_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
     }
 
   /* Now load as many as possible of the first arguments into
-     registers, and push the rest onto the stack.  Loop thru args
+     registers, and push the rest onto the stack.  Loop through args
      from first to last.  */
   for (argnum = 0; argnum < nargs; argnum++)
     {
@@ -6085,7 +6080,7 @@ mips_o64_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
 		}
 
 	      /* Note!!! This is NOT an else clause.  Odd sized
-		 structs may go thru BOTH paths.  */
+		 structs may go through BOTH paths.  */
 	      /* Write this portion of the argument to a general
 		 purpose register.  */
 	      if (argreg <= mips_last_arg_regnum (gdbarch))
@@ -6973,7 +6968,7 @@ set_mipsfpu_single_command (const char *args, int from_tty)
   /* FIXME: cagney/2003-11-15: Should be setting a field in "info"
      instead of relying on globals.  Doing that would let generic code
      handle the search for this specific architecture.  */
-  if (!gdbarch_update_p (info))
+  if (!gdbarch_update_p (current_inferior (), info))
     internal_error (_("set mipsfpu failed"));
 }
 
@@ -6986,7 +6981,7 @@ set_mipsfpu_double_command (const char *args, int from_tty)
   /* FIXME: cagney/2003-11-15: Should be setting a field in "info"
      instead of relying on globals.  Doing that would let generic code
      handle the search for this specific architecture.  */
-  if (!gdbarch_update_p (info))
+  if (!gdbarch_update_p (current_inferior (), info))
     internal_error (_("set mipsfpu failed"));
 }
 
@@ -6999,7 +6994,7 @@ set_mipsfpu_none_command (const char *args, int from_tty)
   /* FIXME: cagney/2003-11-15: Should be setting a field in "info"
      instead of relying on globals.  Doing that would let generic code
      handle the search for this specific architecture.  */
-  if (!gdbarch_update_p (info))
+  if (!gdbarch_update_p (current_inferior (), info))
     internal_error (_("set mipsfpu failed"));
 }
 
@@ -7824,7 +7819,6 @@ mips_skip_pic_trampoline_code (const frame_info_ptr &frame, CORE_ADDR pc)
 {
   struct gdbarch *gdbarch = get_frame_arch (frame);
   enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
-  struct bound_minimal_symbol msym;
   int i;
   gdb_byte stub_code[16];
   int32_t stub_words[4];
@@ -7832,7 +7826,7 @@ mips_skip_pic_trampoline_code (const frame_info_ptr &frame, CORE_ADDR pc)
   /* The stub for foo is named ".pic.foo", and is either two
      instructions inserted before foo or a three instruction sequence
      which jumps to foo.  */
-  msym = lookup_minimal_symbol_by_pc (pc);
+  bound_minimal_symbol msym = lookup_minimal_symbol_by_pc (pc);
   if (msym.minsym == NULL
       || msym.value_address () != pc
       || msym.minsym->linkage_name () == NULL
@@ -8846,7 +8840,7 @@ mips_abi_update (const char *ignore_args,
 
   /* Force the architecture to update, and (if it's a MIPS architecture)
      mips_gdbarch_init will take care of the rest.  */
-  gdbarch_update_p (info);
+  gdbarch_update_p (current_inferior (), info);
 }
 
 /* Print out which MIPS ABI is in use.  */
diff --git a/gdb/msp430-tdep.c b/gdb/msp430-tdep.c
index 017ebb4..41a8f99 100644
--- a/gdb/msp430-tdep.c
+++ b/gdb/msp430-tdep.c
@@ -807,11 +807,10 @@ msp430_in_return_stub (struct gdbarch *gdbarch, CORE_ADDR pc,
 static CORE_ADDR
 msp430_skip_trampoline_code (const frame_info_ptr &frame, CORE_ADDR pc)
 {
-  struct bound_minimal_symbol bms;
   const char *stub_name;
   struct gdbarch *gdbarch = get_frame_arch (frame);
 
-  bms = lookup_minimal_symbol_by_pc (pc);
+  bound_minimal_symbol bms = lookup_minimal_symbol_by_pc (pc);
   if (!bms.minsym)
     return pc;
 
diff --git a/gdb/nat/linux-btrace.c b/gdb/nat/linux-btrace.c
index 5715168..7ff12d6 100644
--- a/gdb/nat/linux-btrace.c
+++ b/gdb/nat/linux-btrace.c
@@ -415,6 +415,59 @@ cpu_supports_bts (void)
     }
 }
 
+/* Return the Intel PT config bitmask from the linux sysfs for a FEATURE.
+   The bits can be used in the perf_event configuration when enabling PT.
+   Callers of this function are expected to check the availability of the
+   feature first via linux_supports_pt_feature.  */
+
+static uint64_t
+linux_read_pt_config_bitmask (const char *feature)
+{
+  uint64_t config_bitmask = 0;
+  std::string filename
+      = std::string ("/sys/bus/event_source/devices/intel_pt/format/")
+      + feature;
+
+  gdb_file_up file = gdb_fopen_cloexec (filename.c_str (), "r");
+  if (file.get () == nullptr)
+    error (_("Failed to determine config from %s."),  filename.c_str ());
+
+  uint8_t start, end;
+  int found = fscanf (file.get (), "config:%hhu-%hhu", &start, &end);
+  if (found == 1)
+    end = start;
+  else if (found != 2)
+    error (_("Failed to determine config from %s."), filename.c_str ());
+
+  for (uint8_t i = start; i <= end; ++i)
+    config_bitmask |= (1ULL << i);
+
+  return config_bitmask;
+}
+
+/* Check whether the linux target supports the Intel PT FEATURE.  */
+
+static bool
+linux_supports_pt_feature (const char *feature)
+{
+  std::string filename
+    = std::string ("/sys/bus/event_source/devices/intel_pt/caps/") + feature;
+
+  gdb_file_up file = gdb_fopen_cloexec (filename.c_str (), "r");
+  if (file.get () == nullptr)
+    return false;
+
+  int status, found = fscanf (file.get (), "%d", &status);
+  if (found != 1)
+    {
+      warning (_("Failed to determine %s support from %s."), feature,
+	       filename.c_str ());
+      return false;
+    }
+
+  return (status == 1);
+}
+
 /* The perf_event_open syscall failed.  Try to print a helpful error
    message.  */
 
@@ -627,6 +680,23 @@ linux_enable_pt (ptid_t ptid, const struct btrace_config_pt *conf)
   tinfo->attr.exclude_hv = 1;
   tinfo->attr.exclude_idle = 1;
 
+  if (conf->ptwrite && linux_supports_pt_feature ("ptwrite"))
+    {
+      tinfo->attr.config |= linux_read_pt_config_bitmask ("ptw");
+      tinfo->conf.pt.ptwrite = true;
+    }
+
+  if (conf->event_tracing)
+    {
+      if (linux_supports_pt_feature ("event_trace"))
+	{
+	  tinfo->attr.config |= linux_read_pt_config_bitmask ("event");
+	  tinfo->conf.pt.event_tracing = true;
+	}
+      else
+	error (_("Event tracing for record btrace pt is not supported."));
+    }
+
   errno = 0;
   scoped_fd fd (syscall (SYS_perf_event_open, &tinfo->attr, pid, -1, -1, 0));
   if (fd.get () < 0)
diff --git a/gdb/nat/x86-linux-tdesc.c b/gdb/nat/x86-linux-tdesc.c
index c15a600..1824f57 100644
--- a/gdb/nat/x86-linux-tdesc.c
+++ b/gdb/nat/x86-linux-tdesc.c
@@ -106,12 +106,6 @@ x86_linux_tdesc_for_tid (int tid, uint64_t *xcr0_storage,
 	  *xcr0_storage = xstateregs[(I386_LINUX_XSAVE_XCR0_OFFSET
 				      / sizeof (uint64_t))];
 
-#ifdef __x86_64__
-	  /* No MPX on x32.  */
-	  if (is_64bit && is_x32)
-	    *xcr0_storage &= ~X86_XSTATE_MPX;
-#endif /* __x86_64__ */
-
 	  *xsave_layout_storage
 	    = x86_fetch_xsave_layout (*xcr0_storage, x86_xsave_length ());
 	}
diff --git a/gdb/nat/x86-xstate.c b/gdb/nat/x86-xstate.c
index 970dda1..ca6fbbf 100644
--- a/gdb/nat/x86-xstate.c
+++ b/gdb/nat/x86-xstate.c
@@ -56,8 +56,6 @@ x86_fetch_xsave_layout (uint64_t xcr0, int len)
   x86_xsave_layout layout;
   layout.sizeof_xsave = len;
   layout.avx_offset = xsave_feature_offset (xcr0, X86_XSTATE_AVX_ID);
-  layout.bndregs_offset = xsave_feature_offset (xcr0, X86_XSTATE_BNDREGS_ID);
-  layout.bndcfg_offset = xsave_feature_offset (xcr0, X86_XSTATE_BNDCFG_ID);
   layout.k_offset = xsave_feature_offset (xcr0, X86_XSTATE_K_ID);
   layout.zmm_h_offset = xsave_feature_offset (xcr0, X86_XSTATE_ZMM_H_ID);
   layout.zmm_offset = xsave_feature_offset (xcr0, X86_XSTATE_ZMM_ID);
diff --git a/gdb/netbsd-tdep.c b/gdb/netbsd-tdep.c
index 953b329..415a743 100644
--- a/gdb/netbsd-tdep.c
+++ b/gdb/netbsd-tdep.c
@@ -348,9 +348,8 @@ nbsd_gdb_signal_to_target (struct gdbarch *gdbarch,
 static CORE_ADDR
 nbsd_skip_solib_resolver (struct gdbarch *gdbarch, CORE_ADDR pc)
 {
-  struct bound_minimal_symbol msym;
-
-  msym = lookup_minimal_symbol ("_rtld_bind_start", NULL, NULL);
+  bound_minimal_symbol msym
+    = lookup_minimal_symbol (current_program_space, "_rtld_bind_start");
   if (msym.minsym && msym.value_address () == pc)
     return frame_unwind_caller_pc (get_current_frame ());
   else
diff --git a/gdb/nto-procfs.c b/gdb/nto-procfs.c
deleted file mode 100644
index c310874..0000000
--- a/gdb/nto-procfs.c
+++ /dev/null
@@ -1,1583 +0,0 @@
-/* Machine independent support for QNX Neutrino /proc (process file system)
-   for GDB.  Written by Colin Burgess at QNX Software Systems Limited.
-
-   Copyright (C) 2003-2024 Free Software Foundation, Inc.
-
-   Contributed by QNX Software Systems Ltd.
-
-   This file is part of GDB.
-
-   This program is free software; you can redistribute it and/or modify
-   it under the terms of the GNU General Public License as published by
-   the Free Software Foundation; either version 3 of the License, or
-   (at your option) any later version.
-
-   This program is distributed in the hope that it will be useful,
-   but WITHOUT ANY WARRANTY; without even the implied warranty of
-   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-   GNU General Public License for more details.
-
-   You should have received a copy of the GNU General Public License
-   along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
-
-
-#include <fcntl.h>
-#include <spawn.h>
-#include <sys/debug.h>
-#include <sys/procfs.h>
-#include <sys/neutrino.h>
-#include <sys/syspage.h>
-#include <dirent.h>
-#include <sys/netmgr.h>
-#include <sys/auxv.h>
-
-#include "gdbcore.h"
-#include "inferior.h"
-#include "target.h"
-#include "objfiles.h"
-#include "gdbthread.h"
-#include "nto-tdep.h"
-#include "command.h"
-#include "regcache.h"
-#include "solib.h"
-#include "inf-child.h"
-#include "gdbsupport/filestuff.h"
-#include "gdbsupport/scoped_fd.h"
-
-#define NULL_PID		0
-#define _DEBUG_FLAG_TRACE	(_DEBUG_FLAG_TRACE_EXEC|_DEBUG_FLAG_TRACE_RD|\
-		_DEBUG_FLAG_TRACE_WR|_DEBUG_FLAG_TRACE_MODIFY)
-
-int ctl_fd;
-
-static sighandler_t ofunc;
-
-static procfs_run run;
-
-/* Create the "native" and "procfs" targets.  */
-
-struct nto_procfs_target : public inf_child_target
-{
-  void open (const char *arg, int from_tty) override;
-
-  void attach (const char *, int) override = 0;
-
-  void post_attach (int);
-
-  void detach (inferior *, int) override;
-
-  void resume (ptid_t, int, enum gdb_signal) override;
-
-  ptid_t wait (ptid_t, struct target_waitstatus *, target_wait_flags) override;
-
-  void fetch_registers (struct regcache *, int) override;
-  void store_registers (struct regcache *, int) override;
-
-  enum target_xfer_status xfer_partial (enum target_object object,
-					const char *annex,
-					gdb_byte *readbuf,
-					const gdb_byte *writebuf,
-					ULONGEST offset, ULONGEST len,
-					ULONGEST *xfered_len) override;
-
-  void files_info () override;
-
-  int insert_breakpoint (struct gdbarch *, struct bp_target_info *) override;
-
-  int remove_breakpoint (struct gdbarch *, struct bp_target_info *,
-			 enum remove_bp_reason) override;
-
-  int can_use_hw_breakpoint (enum bptype, int, int) override;
-
-  int insert_hw_breakpoint (struct gdbarch *, struct bp_target_info *) override;
-
-  int remove_hw_breakpoint (struct gdbarch *, struct bp_target_info *) override;
-
-  int insert_watchpoint (CORE_ADDR, int, enum target_hw_bp_type,
-			 struct expression *) override;
-
-  int remove_watchpoint (CORE_ADDR, int, enum target_hw_bp_type,
-			 struct expression *) override;
-
-  bool stopped_by_watchpoint () override;
-
-  void kill () override;
-
-  void create_inferior (const char *, const std::string &,
-			char **, int) override;
-
-  void mourn_inferior () override;
-
-  void pass_signals (gdb::array_view<const unsigned char>) override;
-
-  bool thread_alive (ptid_t ptid) override;
-
-  void update_thread_list () override;
-
-  std::string pid_to_str (ptid_t) override;
-
-  void interrupt () override;
-
-  const char *extra_thread_info (struct thread_info *) override;
-
-  const char *pid_to_exec_file (int pid) override;
-};
-
-/* For "target native".  */
-
-static const target_info nto_native_target_info = {
-  "native",
-  N_("QNX Neutrino local process"),
-  N_("QNX Neutrino local process (started by the \"run\" command).")
-};
-
-class nto_procfs_target_native final : public nto_procfs_target
-{
-  const target_info &info () const override
-  { return nto_native_target_info; }
-};
-
-/* For "target procfs <node>".  */
-
-static const target_info nto_procfs_target_info = {
-  "procfs",
-  N_("QNX Neutrino local or remote process"),
-  N_("QNX Neutrino process.  target procfs NODE")
-};
-
-struct nto_procfs_target_procfs final : public nto_procfs_target
-{
-  const target_info &info () const override
-  { return nto_procfs_target_info; }
-};
-
-static ptid_t do_attach (ptid_t ptid);
-
-/* These two globals are only ever set in procfs_open_1, but are
-   referenced elsewhere.  'nto_procfs_node' is a flag used to say
-   whether we are local, or we should get the current node descriptor
-   for the remote QNX node.  */
-static char *nodestr;
-static unsigned nto_procfs_node = ND_LOCAL_NODE;
-
-/* Return the current QNX Node, or error out.  This is a simple
-   wrapper for the netmgr_strtond() function.  The reason this
-   is required is because QNX node descriptors are transient so
-   we have to re-acquire them every time.  */
-static unsigned
-nto_node (void)
-{
-  unsigned node;
-
-  if (ND_NODE_CMP (nto_procfs_node, ND_LOCAL_NODE) == 0
-      || nodestr == NULL)
-    return ND_LOCAL_NODE;
-
-  node = netmgr_strtond (nodestr, 0);
-  if (node == -1)
-    error (_("Lost the QNX node.  Debug session probably over."));
-
-  return (node);
-}
-
-static enum gdb_osabi
-procfs_is_nto_target (bfd *abfd)
-{
-  return GDB_OSABI_QNXNTO;
-}
-
-/* This is called when we call 'target native' or 'target procfs
-   <arg>' from the (gdb) prompt.  For QNX6 (nto), the only valid arg
-   will be a QNX node string, eg: "/net/some_node".  If arg is not a
-   valid QNX node, we will default to local.  */
-void
-nto_procfs_target::open (const char *arg, int from_tty)
-{
-  char *endstr;
-  char buffer[50];
-  int total_size;
-  procfs_sysinfo *sysinfo;
-  char nto_procfs_path[PATH_MAX];
-
-  /* Offer to kill previous inferiors before opening this target.  */
-  target_preopen (from_tty);
-
-  nto_is_nto_target = procfs_is_nto_target;
-
-  /* Set the default node used for spawning to this one,
-     and only override it if there is a valid arg.  */
-
-  xfree (nodestr);
-  nodestr = NULL;
-
-  nto_procfs_node = ND_LOCAL_NODE;
-  nodestr = (arg != NULL) ? xstrdup (arg) : NULL;
-
-  if (nodestr)
-    {
-      nto_procfs_node = netmgr_strtond (nodestr, &endstr);
-      if (nto_procfs_node == -1)
-	{
-	  if (errno == ENOTSUP)
-	    gdb_printf ("QNX Net Manager not found.\n");
-	  gdb_printf ("Invalid QNX node %s: error %d (%s).\n", nodestr,
-		      errno, safe_strerror (errno));
-	  xfree (nodestr);
-	  nodestr = NULL;
-	  nto_procfs_node = ND_LOCAL_NODE;
-	}
-      else if (*endstr)
-	{
-	  if (*(endstr - 1) == '/')
-	    *(endstr - 1) = 0;
-	  else
-	    *endstr = 0;
-	}
-    }
-  snprintf (nto_procfs_path, PATH_MAX - 1, "%s%s",
-	    (nodestr != NULL) ? nodestr : "", "/proc");
-
-  scoped_fd fd (open (nto_procfs_path, O_RDONLY));
-  if (fd.get () == -1)
-    {
-      gdb_printf ("Error opening %s : %d (%s)\n", nto_procfs_path, errno,
-		  safe_strerror (errno));
-      error (_("Invalid procfs arg"));
-    }
-
-  sysinfo = (void *) buffer;
-  if (devctl (fd.get (), DCMD_PROC_SYSINFO, sysinfo, sizeof buffer, 0) != EOK)
-    {
-      gdb_printf ("Error getting size: %d (%s)\n", errno,
-		  safe_strerror (errno));
-      error (_("Devctl failed."));
-    }
-  else
-    {
-      total_size = sysinfo->total_size;
-      sysinfo = alloca (total_size);
-      if (sysinfo == NULL)
-	{
-	  gdb_printf ("Memory error: %d (%s)\n", errno,
-		      safe_strerror (errno));
-	  error (_("alloca failed."));
-	}
-      else
-	{
-	  if (devctl (fd.get (), DCMD_PROC_SYSINFO, sysinfo, total_size, 0)
-	      != EOK)
-	    {
-	      gdb_printf ("Error getting sysinfo: %d (%s)\n", errno,
-			  safe_strerror (errno));
-	      error (_("Devctl failed."));
-	    }
-	  else
-	    {
-	      if (sysinfo->type !=
-		  nto_map_arch_to_cputype
-		    (gdbarch_bfd_arch_info
-		     (current_inferior ()->arch ())->arch_name))
-		error (_("Invalid target CPU."));
-	    }
-	}
-    }
-
-  inf_child_target::open (arg, from_tty);
-  gdb_printf ("Debugging using %s\n", nto_procfs_path);
-}
-
-static void
-procfs_set_thread (ptid_t ptid)
-{
-  pid_t tid;
-
-  tid = ptid.tid ();
-  devctl (ctl_fd, DCMD_PROC_CURTHREAD, &tid, sizeof (tid), 0);
-}
-
-/*  Return true if the thread TH is still alive.  */
-
-bool
-nto_procfs_target::thread_alive (ptid_t ptid)
-{
-  pid_t tid;
-  pid_t pid;
-  procfs_status status;
-  int err;
-
-  tid = ptid.tid ();
-  pid = ptid.pid ();
-
-  if (kill (pid, 0) == -1)
-    return false;
-
-  status.tid = tid;
-  if ((err = devctl (ctl_fd, DCMD_PROC_TIDSTATUS,
-		     &status, sizeof (status), 0)) != EOK)
-    return false;
-
-  /* Thread is alive or dead but not yet joined,
-     or dead and there is an alive (or dead unjoined) thread with
-     higher tid.
-
-     If the tid is not the same as requested, requested tid is dead.  */
-  return (status.tid == tid) && (status.state != STATE_DEAD);
-}
-
-static void
-update_thread_private_data_name (struct thread_info *new_thread,
-				 const char *newname)
-{
-  nto_thread_info *pti = get_nto_thread_info (new_thread);
-
-  gdb_assert (newname != NULL);
-  gdb_assert (new_thread != NULL);
-
-  if (pti)
-    {
-      pti = new nto_thread_info;
-      new_thread->priv.reset (pti);
-    }
-
-  pti->name = newname;
-}
-
-static void 
-update_thread_private_data (struct thread_info *new_thread, 
-			    pthread_t tid, int state, int flags)
-{
-  procfs_info pidinfo;
-  struct _thread_name *tn;
-  procfs_threadctl tctl;
-
-#if _NTO_VERSION > 630
-  gdb_assert (new_thread != NULL);
-
-  if (devctl (ctl_fd, DCMD_PROC_INFO, &pidinfo,
-	      sizeof(pidinfo), 0) != EOK)
-    return;
-
-  memset (&tctl, 0, sizeof (tctl));
-  tctl.cmd = _NTO_TCTL_NAME;
-  tn = (struct _thread_name *) (&tctl.data);
-
-  /* Fetch name for the given thread.  */
-  tctl.tid = tid;
-  tn->name_buf_len = sizeof (tctl.data) - sizeof (*tn);
-  tn->new_name_len = -1; /* Getting, not setting.  */
-  if (devctl (ctl_fd, DCMD_PROC_THREADCTL, &tctl, sizeof (tctl), NULL) != EOK)
-    tn->name_buf[0] = '\0';
-
-  tn->name_buf[_NTO_THREAD_NAME_MAX] = '\0';
-
-  update_thread_private_data_name (new_thread, tn->name_buf);
-
-  nto_thread_info *pti = get_nto_thread_info (new_thread);
-  pti->tid = tid;
-  pti->state = state;
-  pti->flags = flags;
-#endif /* _NTO_VERSION */
-}
-
-void
-nto_procfs_target::update_thread_list ()
-{
-  procfs_status status;
-  pid_t pid;
-  ptid_t ptid;
-  pthread_t tid;
-  struct thread_info *new_thread;
-
-  if (ctl_fd == -1)
-    return;
-
-  prune_threads ();
-
-  pid = current_inferior ()->pid;
-
-  status.tid = 1;
-
-  for (tid = 1;; ++tid)
-    {
-      if (status.tid == tid 
-	  && (devctl (ctl_fd, DCMD_PROC_TIDSTATUS, &status, sizeof (status), 0)
-	      != EOK))
-	break;
-      if (status.tid != tid)
-	/* The reason why this would not be equal is that devctl might have 
-	   returned different tid, meaning the requested tid no longer exists
-	   (e.g. thread exited).  */
-	continue;
-      ptid = ptid_t (pid, 0, tid);
-      new_thread = this->find_thread (ptid);
-      if (!new_thread)
-	new_thread = add_thread (ptid);
-      update_thread_private_data (new_thread, tid, status.state, 0);
-      status.tid++;
-    }
-  return;
-}
-
-static void
-procfs_pidlist (const char *args, int from_tty)
-{
-  struct dirent *dirp = NULL;
-  char buf[PATH_MAX];
-  procfs_info *pidinfo = NULL;
-  procfs_debuginfo *info = NULL;
-  procfs_status *status = NULL;
-  pid_t num_threads = 0;
-  pid_t pid;
-  char name[512];
-  char procfs_dir[PATH_MAX];
-
-  snprintf (procfs_dir, sizeof (procfs_dir), "%s%s",
-	    (nodestr != NULL) ? nodestr : "", "/proc");
-
-  gdb_dir_up dp (opendir (procfs_dir));
-  if (dp == NULL)
-    {
-      gdb_printf (gdb_stderr, "failed to opendir \"%s\" - %d (%s)",
-		  procfs_dir, errno, safe_strerror (errno));
-      return;
-    }
-
-  /* Start scan at first pid.  */
-  rewinddir (dp.get ());
-
-  do
-    {
-      /* Get the right pid and procfs path for the pid.  */
-      do
-	{
-	  dirp = readdir (dp.get ());
-	  if (dirp == NULL)
-	    return;
-	  snprintf (buf, sizeof (buf), "%s%s/%s/as",
-		    (nodestr != NULL) ? nodestr : "",
-		    "/proc", dirp->d_name);
-	  pid = atoi (dirp->d_name);
-	}
-      while (pid == 0);
-
-      /* Open the procfs path.  */
-      scoped_fd fd (open (buf, O_RDONLY));
-      if (fd.get () == -1)
-	{
-	  gdb_printf (gdb_stderr, "failed to open %s - %d (%s)\n",
-		      buf, errno, safe_strerror (errno));
-	  continue;
-	}
-
-      pidinfo = (procfs_info *) buf;
-      if (devctl (fd.get (), DCMD_PROC_INFO, pidinfo, sizeof (buf), 0) != EOK)
-	{
-	  gdb_printf (gdb_stderr,
-		      "devctl DCMD_PROC_INFO failed - %d (%s)\n",
-		      errno, safe_strerror (errno));
-	  break;
-	}
-      num_threads = pidinfo->num_threads;
-
-      info = (procfs_debuginfo *) buf;
-      if (devctl (fd.get (), DCMD_PROC_MAPDEBUG_BASE, info, sizeof (buf), 0)
-	  != EOK)
-	strcpy (name, "unavailable");
-      else
-	strcpy (name, info->path);
-
-      /* Collect state info on all the threads.  */
-      status = (procfs_status *) buf;
-      for (status->tid = 1; status->tid <= num_threads; status->tid++)
-	{
-	  const int err
-	    = devctl (fd.get (), DCMD_PROC_TIDSTATUS, status, sizeof (buf), 0);
-	  gdb_printf ("%s - %d", name, pid);
-	  if (err == EOK && status->tid != 0)
-	    gdb_printf ("/%d\n", status->tid);
-	  else
-	    {
-	      gdb_printf ("\n");
-	      break;
-	    }
-	}
-    }
-  while (dirp != NULL);
-}
-
-static void
-procfs_meminfo (const char *args, int from_tty)
-{
-  procfs_mapinfo *mapinfos = NULL;
-  static int num_mapinfos = 0;
-  procfs_mapinfo *mapinfo_p, *mapinfo_p2;
-  int flags = ~0, err, num, i, j;
-
-  struct
-  {
-    procfs_debuginfo info;
-    char buff[_POSIX_PATH_MAX];
-  } map;
-
-  struct info
-  {
-    unsigned addr;
-    unsigned size;
-    unsigned flags;
-    unsigned debug_vaddr;
-    unsigned long long offset;
-  };
-
-  struct printinfo
-  {
-    unsigned long long ino;
-    unsigned dev;
-    struct info text;
-    struct info data;
-    char name[256];
-  } printme;
-
-  /* Get the number of map entrys.  */
-  err = devctl (ctl_fd, DCMD_PROC_MAPINFO, NULL, 0, &num);
-  if (err != EOK)
-    {
-      printf ("failed devctl num mapinfos - %d (%s)\n", err,
-	      safe_strerror (err));
-      return;
-    }
-
-  mapinfos = XNEWVEC (procfs_mapinfo, num);
-
-  num_mapinfos = num;
-  mapinfo_p = mapinfos;
-
-  /* Fill the map entrys.  */
-  err = devctl (ctl_fd, DCMD_PROC_MAPINFO, mapinfo_p, num
-		* sizeof (procfs_mapinfo), &num);
-  if (err != EOK)
-    {
-      printf ("failed devctl mapinfos - %d (%s)\n", err, safe_strerror (err));
-      xfree (mapinfos);
-      return;
-    }
-
-  num = std::min (num, num_mapinfos);
-
-  /* Run through the list of mapinfos, and store the data and text info
-     so we can print it at the bottom of the loop.  */
-  for (mapinfo_p = mapinfos, i = 0; i < num; i++, mapinfo_p++)
-    {
-      if (!(mapinfo_p->flags & flags))
-	mapinfo_p->ino = 0;
-
-      if (mapinfo_p->ino == 0)	/* Already visited.  */
-	continue;
-
-      map.info.vaddr = mapinfo_p->vaddr;
-
-      err = devctl (ctl_fd, DCMD_PROC_MAPDEBUG, &map, sizeof (map), 0);
-      if (err != EOK)
-	continue;
-
-      memset (&printme, 0, sizeof printme);
-      printme.dev = mapinfo_p->dev;
-      printme.ino = mapinfo_p->ino;
-      printme.text.addr = mapinfo_p->vaddr;
-      printme.text.size = mapinfo_p->size;
-      printme.text.flags = mapinfo_p->flags;
-      printme.text.offset = mapinfo_p->offset;
-      printme.text.debug_vaddr = map.info.vaddr;
-      strcpy (printme.name, map.info.path);
-
-      /* Check for matching data.  */
-      for (mapinfo_p2 = mapinfos, j = 0; j < num; j++, mapinfo_p2++)
-	{
-	  if (mapinfo_p2->vaddr != mapinfo_p->vaddr
-	      && mapinfo_p2->ino == mapinfo_p->ino
-	      && mapinfo_p2->dev == mapinfo_p->dev)
-	    {
-	      map.info.vaddr = mapinfo_p2->vaddr;
-	      err =
-		devctl (ctl_fd, DCMD_PROC_MAPDEBUG, &map, sizeof (map), 0);
-	      if (err != EOK)
-		continue;
-
-	      if (strcmp (map.info.path, printme.name))
-		continue;
-
-	      /* Lower debug_vaddr is always text, if necessary, swap.  */
-	      if ((int) map.info.vaddr < (int) printme.text.debug_vaddr)
-		{
-		  memcpy (&(printme.data), &(printme.text),
-			  sizeof (printme.data));
-		  printme.text.addr = mapinfo_p2->vaddr;
-		  printme.text.size = mapinfo_p2->size;
-		  printme.text.flags = mapinfo_p2->flags;
-		  printme.text.offset = mapinfo_p2->offset;
-		  printme.text.debug_vaddr = map.info.vaddr;
-		}
-	      else
-		{
-		  printme.data.addr = mapinfo_p2->vaddr;
-		  printme.data.size = mapinfo_p2->size;
-		  printme.data.flags = mapinfo_p2->flags;
-		  printme.data.offset = mapinfo_p2->offset;
-		  printme.data.debug_vaddr = map.info.vaddr;
-		}
-	      mapinfo_p2->ino = 0;
-	    }
-	}
-      mapinfo_p->ino = 0;
-
-      gdb_printf ("%s\n", printme.name);
-      gdb_printf ("\ttext=%08x bytes @ 0x%08x\n", printme.text.size,
-		  printme.text.addr);
-      gdb_printf ("\t\tflags=%08x\n", printme.text.flags);
-      gdb_printf ("\t\tdebug=%08x\n", printme.text.debug_vaddr);
-      gdb_printf ("\t\toffset=%s\n", phex (printme.text.offset, 8));
-      if (printme.data.size)
-	{
-	  gdb_printf ("\tdata=%08x bytes @ 0x%08x\n", printme.data.size,
-		      printme.data.addr);
-	  gdb_printf ("\t\tflags=%08x\n", printme.data.flags);
-	  gdb_printf ("\t\tdebug=%08x\n", printme.data.debug_vaddr);
-	  gdb_printf ("\t\toffset=%s\n", phex (printme.data.offset, 8));
-	}
-      gdb_printf ("\tdev=0x%x\n", printme.dev);
-      gdb_printf ("\tino=0x%x\n", (unsigned int) printme.ino);
-    }
-  xfree (mapinfos);
-  return;
-}
-
-/* Print status information about what we're accessing.  */
-void
-nto_procfs_target::files_info ()
-{
-  struct inferior *inf = current_inferior ();
-
-  gdb_printf ("\tUsing the running image of %s %s via %s.\n",
-	      inf->attach_flag ? "attached" : "child",
-	      target_pid_to_str (ptid_t (inf->pid)).c_str (),
-	      (nodestr != NULL) ? nodestr : "local node");
-}
-
-/* Target to_pid_to_exec_file implementation.  */
-
-const char *
-nto_procfs_target::pid_to_exec_file (const int pid)
-{
-  int proc_fd;
-  static char proc_path[PATH_MAX];
-  ssize_t rd;
-
-  /* Read exe file name.  */
-  snprintf (proc_path, sizeof (proc_path), "%s/proc/%d/exefile",
-	    (nodestr != NULL) ? nodestr : "", pid);
-  proc_fd = open (proc_path, O_RDONLY);
-  if (proc_fd == -1)
-    return NULL;
-
-  rd = read (proc_fd, proc_path, sizeof (proc_path) - 1);
-  close (proc_fd);
-  if (rd <= 0)
-    {
-      proc_path[0] = '\0';
-      return NULL;
-    }
-  proc_path[rd] = '\0';
-  return proc_path;
-}
-
-/* Attach to process PID, then initialize for debugging it.  */
-void
-nto_procfs_target::attach (const char *args, int from_tty)
-{
-  int pid;
-  struct inferior *inf;
-
-  pid = parse_pid_to_attach (args);
-
-  if (pid == getpid ())
-    error (_("Attaching GDB to itself is not a good idea..."));
-
-  target_announce_attach (from_tty, pid);
-
-  ptid_t ptid = do_attach (ptid_t (pid));
-  inf = current_inferior ();
-  inferior_appeared (inf, pid);
-  inf->attach_flag = true;
-
-  if (!inf->target_is_pushed (ops))
-    inf->push_target (ops);
-
-  update_thread_list ();
-
-  switch_to_thread (this->find_thread (ptid));
-}
-
-void
-nto_procfs_target::post_attach (pid_t pid)
-{
-  if (current_program_space->exec_bfd ())
-    solib_create_inferior_hook (0);
-}
-
-static ptid_t
-do_attach (ptid_t ptid)
-{
-  procfs_status status;
-  struct sigevent event;
-  char path[PATH_MAX];
-
-  snprintf (path, PATH_MAX - 1, "%s%s/%d/as",
-	    (nodestr != NULL) ? nodestr : "", "/proc", ptid.pid ());
-  ctl_fd = open (path, O_RDWR);
-  if (ctl_fd == -1)
-    error (_("Couldn't open proc file %s, error %d (%s)"), path, errno,
-	   safe_strerror (errno));
-  if (devctl (ctl_fd, DCMD_PROC_STOP, &status, sizeof (status), 0) != EOK)
-    error (_("Couldn't stop process"));
-
-  /* Define a sigevent for process stopped notification.  */
-  event.sigev_notify = SIGEV_SIGNAL_THREAD;
-  event.sigev_signo = SIGUSR1;
-  event.sigev_code = 0;
-  event.sigev_value.sival_ptr = NULL;
-  event.sigev_priority = -1;
-  devctl (ctl_fd, DCMD_PROC_EVENT, &event, sizeof (event), 0);
-
-  if (devctl (ctl_fd, DCMD_PROC_STATUS, &status, sizeof (status), 0) == EOK
-      && status.flags & _DEBUG_FLAG_STOPPED)
-    SignalKill (nto_node (), ptid.pid (), 0, SIGCONT, 0, 0);
-  nto_init_solib_absolute_prefix ();
-  return ptid_t (ptid.pid (), 0, status.tid);
-}
-
-/* Ask the user what to do when an interrupt is received.  */
-static void
-interrupt_query (void)
-{
-  if (query (_("Interrupted while waiting for the program.\n\
-Give up (and stop debugging it)? ")))
-    {
-      target_mourn_inferior (inferior_ptid);
-      quit ();
-    }
-}
-
-/* The user typed ^C twice.  */
-static void
-nto_handle_sigint_twice (int signo)
-{
-  signal (signo, ofunc);
-  interrupt_query ();
-  signal (signo, nto_handle_sigint_twice);
-}
-
-static void
-nto_handle_sigint (int signo)
-{
-  /* If this doesn't work, try more severe steps.  */
-  signal (signo, nto_handle_sigint_twice);
-
-  target_interrupt ();
-}
-
-sptid_t
-nto_procfs_target::wait (ptid_t ptid, struct target_waitstatus *ourstatus,
-			 target_wait_flags options)
-{
-  sigset_t set;
-  siginfo_t info;
-  procfs_status status;
-  static int exit_signo = 0;	/* To track signals that cause termination.  */
-
-  ourstatus->set_spurious ();
-
-  if (inferior_ptid == null_ptid)
-    {
-      ourstatus->set_stopped (GDB_SIGNAL_0);
-      exit_signo = 0;
-      return null_ptid;
-    }
-
-  sigemptyset (&set);
-  sigaddset (&set, SIGUSR1);
-
-  devctl (ctl_fd, DCMD_PROC_STATUS, &status, sizeof (status), 0);
-  while (!(status.flags & _DEBUG_FLAG_ISTOP))
-    {
-      ofunc = signal (SIGINT, nto_handle_sigint);
-      sigwaitinfo (&set, &info);
-      signal (SIGINT, ofunc);
-      devctl (ctl_fd, DCMD_PROC_STATUS, &status, sizeof (status), 0);
-    }
-
-  nto_inferior_data (NULL)->stopped_flags = status.flags;
-  nto_inferior_data (NULL)->stopped_pc = status.ip;
-
-  if (status.flags & _DEBUG_FLAG_SSTEP)
-    ourstatus->set_stopped (GDB_SIGNAL_TRAP);
-  /* Was it a breakpoint?  */
-  else if (status.flags & _DEBUG_FLAG_TRACE)
-    ourstatus->set_stopped (GDB_SIGNAL_TRAP);
-  else if (status.flags & _DEBUG_FLAG_ISTOP)
-    {
-      switch (status.why)
-	{
-	case _DEBUG_WHY_SIGNALLED:
-	  ourstatus->set_stopped (gdb_signal_from_host (status.info.si_signo));
-	  exit_signo = 0;
-	  break;
-	case _DEBUG_WHY_FAULTED:
-	  if (status.info.si_signo == SIGTRAP)
-	    {
-	      ourstatus->set_stopped (0);
-	      exit_signo = 0;
-	    }
-	  else
-	    {
-	      ourstatus->set_stopped
-		(gdb_signal_from_host (status.info.si_signo));
-	      exit_signo = ourstatus->sig ();
-	    }
-	  break;
-
-	case _DEBUG_WHY_TERMINATED:
-	  {
-	    int waitval = 0;
-
-	    waitpid (inferior_ptid.pid (), &waitval, WNOHANG);
-	    if (exit_signo)
-	      {
-		/* Abnormal death.  */
-		ourstatus->set_signalled (exit_signo);
-	      }
-	    else
-	      {
-		/* Normal death.  */
-		ourstatus->set_exited (WEXITSTATUS (waitval));
-	      }
-	    exit_signo = 0;
-	    break;
-	  }
-
-	case _DEBUG_WHY_REQUESTED:
-	  /* We are assuming a requested stop is due to a SIGINT.  */
-	  ourstatus->set_stopped (GDB_SIGNAL_INT);
-	  exit_signo = 0;
-	  break;
-	}
-    }
-
-  return ptid_t (status.pid, 0, status.tid);
-}
-
-/* Read the current values of the inferior's registers, both the
-   general register set and floating point registers (if supported)
-   and update gdb's idea of their current values.  */
-void
-nto_procfs_target::fetch_registers (struct regcache *regcache, int regno)
-{
-  union
-  {
-    procfs_greg greg;
-    procfs_fpreg fpreg;
-    procfs_altreg altreg;
-  }
-  reg;
-  int regsize;
-
-  procfs_set_thread (regcache->ptid ());
-  if (devctl (ctl_fd, DCMD_PROC_GETGREG, &reg, sizeof (reg), &regsize) == EOK)
-    nto_supply_gregset (regcache, (char *) &reg.greg);
-  if (devctl (ctl_fd, DCMD_PROC_GETFPREG, &reg, sizeof (reg), &regsize)
-      == EOK)
-    nto_supply_fpregset (regcache, (char *) &reg.fpreg);
-  if (devctl (ctl_fd, DCMD_PROC_GETALTREG, &reg, sizeof (reg), &regsize)
-      == EOK)
-    nto_supply_altregset (regcache, (char *) &reg.altreg);
-}
-
-/* Helper for procfs_xfer_partial that handles memory transfers.
-   Arguments are like target_xfer_partial.  */
-
-static enum target_xfer_status
-procfs_xfer_memory (gdb_byte *readbuf, const gdb_byte *writebuf,
-		    ULONGEST memaddr, ULONGEST len, ULONGEST *xfered_len)
-{
-  int nbytes;
-
-  if (lseek (ctl_fd, (off_t) memaddr, SEEK_SET) != (off_t) memaddr)
-    return TARGET_XFER_E_IO;
-
-  if (writebuf != NULL)
-    nbytes = write (ctl_fd, writebuf, len);
-  else
-    nbytes = read (ctl_fd, readbuf, len);
-  if (nbytes <= 0)
-    return TARGET_XFER_E_IO;
-  *xfered_len = nbytes;
-  return TARGET_XFER_OK;
-}
-
-/* Target to_xfer_partial implementation.  */
-
-enum target_xfer_status
-nto_procfs_target::xfer_partial (enum target_object object,
-				 const char *annex, gdb_byte *readbuf,
-				 const gdb_byte *writebuf, ULONGEST offset,
-				 ULONGEST len, ULONGEST *xfered_len)
-{
-  switch (object)
-    {
-    case TARGET_OBJECT_MEMORY:
-      return procfs_xfer_memory (readbuf, writebuf, offset, len, xfered_len);
-    case TARGET_OBJECT_AUXV:
-      if (readbuf != NULL)
-	{
-	  int err;
-	  CORE_ADDR initial_stack;
-	  debug_process_t procinfo;
-	  /* For 32-bit architecture, size of auxv_t is 8 bytes.  */
-	  const unsigned int sizeof_auxv_t = sizeof (auxv_t);
-	  const unsigned int sizeof_tempbuf = 20 * sizeof_auxv_t;
-	  int tempread;
-	  gdb_byte *const tempbuf = alloca (sizeof_tempbuf);
-
-	  if (tempbuf == NULL)
-	    return TARGET_XFER_E_IO;
-
-	  err = devctl (ctl_fd, DCMD_PROC_INFO, &procinfo,
-			sizeof procinfo, 0);
-	  if (err != EOK)
-	    return TARGET_XFER_E_IO;
-
-	  initial_stack = procinfo.initial_stack;
-
-	  /* procfs is always 'self-hosted', no byte-order manipulation.  */
-	  tempread = nto_read_auxv_from_initial_stack (initial_stack, tempbuf,
-						       sizeof_tempbuf,
-						       sizeof (auxv_t));
-	  tempread = std::min (tempread, len) - offset;
-	  memcpy (readbuf, tempbuf + offset, tempread);
-	  *xfered_len = tempread;
-	  return tempread ? TARGET_XFER_OK : TARGET_XFER_EOF;
-	}
-	/* Fallthru */
-    default:
-      return this->beneath ()->xfer_partial (object, annex,
-					     readbuf, writebuf, offset, len,
-					     xfered_len);
-    }
-}
-
-/* Take a program previously attached to and detaches it.
-   The program resumes execution and will no longer stop
-   on signals, etc.  We'd better not have left any breakpoints
-   in the program or it'll die when it hits one.  */
-void
-nto_procfs_target::detach (inferior *inf, int from_tty)
-{
-  target_announce_detach ();
-
-  if (siggnal)
-    SignalKill (nto_node (), inf->pid, 0, 0, 0, 0);
-
-  close (ctl_fd);
-  ctl_fd = -1;
-
-  switch_to_no_thread ();
-  detach_inferior (inf->pid);
-  init_thread_list ();
-  inf_child_maybe_unpush_target (ops);
-}
-
-static int
-procfs_breakpoint (CORE_ADDR addr, int type, int size)
-{
-  procfs_break brk;
-
-  brk.type = type;
-  brk.addr = addr;
-  brk.size = size;
-  errno = devctl (ctl_fd, DCMD_PROC_BREAK, &brk, sizeof (brk), 0);
-  if (errno != EOK)
-    return 1;
-  return 0;
-}
-
-int
-nto_procfs_target::insert_breakpoint (struct gdbarch *gdbarch,
-				      struct bp_target_info *bp_tgt)
-{
-  bp_tgt->placed_address = bp_tgt->reqstd_address;
-  return procfs_breakpoint (bp_tgt->placed_address, _DEBUG_BREAK_EXEC, 0);
-}
-
-int
-nto_procfs_target::remove_breakpoint (struct gdbarch *gdbarch,
-				      struct bp_target_info *bp_tgt,
-				      enum remove_bp_reason reason)
-{
-  return procfs_breakpoint (bp_tgt->placed_address, _DEBUG_BREAK_EXEC, -1);
-}
-
-int
-nto_procfs_target::insert_hw_breakpoint (struct gdbarch *gdbarch,
-					 struct bp_target_info *bp_tgt)
-{
-  bp_tgt->placed_address = bp_tgt->reqstd_address;
-  return procfs_breakpoint (bp_tgt->placed_address,
-			    _DEBUG_BREAK_EXEC | _DEBUG_BREAK_HW, 0);
-}
-
-int
-nto_procfs_target::remove_hw_breakpoint (struct gdbarch *gdbarch,
-					 struct bp_target_info *bp_tgt)
-{
-  return procfs_breakpoint (bp_tgt->placed_address,
-			    _DEBUG_BREAK_EXEC | _DEBUG_BREAK_HW, -1);
-}
-
-void
-nto_procfs_target::resume (ptid_t ptid, int step, enum gdb_signal signo)
-{
-  int signal_to_pass;
-  procfs_status status;
-  sigset_t *run_fault = (sigset_t *) (void *) &run.fault;
-
-  if (inferior_ptid == null_ptid)
-    return;
-
-  procfs_set_thread (ptid == minus_one_ptid ? inferior_ptid :
-		     ptid);
-
-  run.flags = _DEBUG_RUN_FAULT | _DEBUG_RUN_TRACE;
-  if (step)
-    run.flags |= _DEBUG_RUN_STEP;
-
-  sigemptyset (run_fault);
-  sigaddset (run_fault, FLTBPT);
-  sigaddset (run_fault, FLTTRACE);
-  sigaddset (run_fault, FLTILL);
-  sigaddset (run_fault, FLTPRIV);
-  sigaddset (run_fault, FLTBOUNDS);
-  sigaddset (run_fault, FLTIOVF);
-  sigaddset (run_fault, FLTIZDIV);
-  sigaddset (run_fault, FLTFPE);
-  /* Peter V will be changing this at some point.  */
-  sigaddset (run_fault, FLTPAGE);
-
-  run.flags |= _DEBUG_RUN_ARM;
-
-  signal_to_pass = gdb_signal_to_host (signo);
-
-  if (signal_to_pass)
-    {
-      devctl (ctl_fd, DCMD_PROC_STATUS, &status, sizeof (status), 0);
-      signal_to_pass = gdb_signal_to_host (signo);
-      if (status.why & (_DEBUG_WHY_SIGNALLED | _DEBUG_WHY_FAULTED))
-	{
-	  if (signal_to_pass != status.info.si_signo)
-	    {
-	      SignalKill (nto_node (), inferior_ptid.pid (), 0,
-			  signal_to_pass, 0, 0);
-	      run.flags |= _DEBUG_RUN_CLRFLT | _DEBUG_RUN_CLRSIG;
-	    }
-	  else		/* Let it kill the program without telling us.  */
-	    sigdelset (&run.trace, signal_to_pass);
-	}
-    }
-  else
-    run.flags |= _DEBUG_RUN_CLRSIG | _DEBUG_RUN_CLRFLT;
-
-  errno = devctl (ctl_fd, DCMD_PROC_RUN, &run, sizeof (run), 0);
-  if (errno != EOK)
-    {
-      perror (_("run error!\n"));
-      return;
-    }
-}
-
-void
-nto_procfs_target::mourn_inferior ()
-{
-  if (inferior_ptid != null_ptid)
-    {
-      SignalKill (nto_node (), inferior_ptid.pid (), 0, SIGKILL, 0, 0);
-      close (ctl_fd);
-    }
-  switch_to_no_thread ();
-  init_thread_list ();
-  inf_child_mourn_inferior (ops);
-}
-
-/* This function breaks up an argument string into an argument
-   vector suitable for passing to execvp().
-   E.g., on "run a b c d" this routine would get as input
-   the string "a b c d", and as output it would fill in argv with
-   the four arguments "a", "b", "c", "d".  The only additional
-   functionality is simple quoting.  The gdb command:
-	run a "b c d" f
-   will fill in argv with the three args "a", "b c d", "e".  */
-static void
-breakup_args (char *scratch, char **argv)
-{
-  char *pp, *cp = scratch;
-  char quoting = 0;
-
-  for (;;)
-    {
-      /* Scan past leading separators.  */
-      quoting = 0;
-      while (*cp == ' ' || *cp == '\t' || *cp == '\n')
-	cp++;
-
-      /* Break if at end of string.  */
-      if (*cp == '\0')
-	break;
-
-      /* Take an arg.  */
-      if (*cp == '"')
-	{
-	  cp++;
-	  quoting = strchr (cp, '"') ? 1 : 0;
-	}
-
-      *argv++ = cp;
-
-      /* Scan for next arg separator.  */
-      pp = cp;
-      if (quoting)
-	cp = strchr (pp, '"');
-      if ((cp == NULL) || (!quoting))
-	cp = strchr (pp, ' ');
-      if (cp == NULL)
-	cp = strchr (pp, '\t');
-      if (cp == NULL)
-	cp = strchr (pp, '\n');
-
-      /* No separators => end of string => break.  */
-      if (cp == NULL)
-	{
-	  pp = cp;
-	  break;
-	}
-
-      /* Replace the separator with a terminator.  */
-      *cp++ = '\0';
-    }
-
-  /* Execv requires a null-terminated arg vector.  */
-  *argv = NULL;
-}
-
-void
-nto_procfs_target::create_inferior (const char *exec_file,
-				    const std::string &allargs,
-				    char **env, int from_tty)
-{
-  if (exec_file == nullptr)
-    no_executable_specified_error ();
-
-  struct inheritance inherit;
-  pid_t pid;
-  int flags, errn;
-  char **argv, *args;
-  const char *in = "", *out = "", *err = "";
-  int fd, fds[3];
-  sigset_t set;
-  struct inferior *inf;
-
-  argv = xmalloc ((allargs.size () / (unsigned) 2 + 2) *
-		  sizeof (*argv));
-  argv[0] = exec_file;
-  args = xstrdup (allargs.c_str ());
-  breakup_args (args, &argv[1]);
-
-  argv = nto_parse_redirection (argv, &in, &out, &err);
-
-  fds[0] = STDIN_FILENO;
-  fds[1] = STDOUT_FILENO;
-  fds[2] = STDERR_FILENO;
-
-  /* If the user specified I/O via gdb's --tty= arg, use it, but only
-     if the i/o is not also being specified via redirection.  */
-  const char *inferior_tty = current_inferior ()->tty ();
-  if (inferior_tty != nullptr)
-    {
-      if (!in[0])
-	in = inferior_tty;
-      if (!out[0])
-	out = inferior_tty;
-      if (!err[0])
-	err = inferior_tty;
-    }
-
-  if (in[0])
-    {
-      fd = open (in, O_RDONLY);
-      if (fd == -1)
-	perror (in);
-      else
-	fds[0] = fd;
-    }
-  if (out[0])
-    {
-      fd = open (out, O_WRONLY);
-      if (fd == -1)
-	perror (out);
-      else
-	fds[1] = fd;
-    }
-  if (err[0])
-    {
-      fd = open (err, O_WRONLY);
-      if (fd == -1)
-	perror (err);
-      else
-	fds[2] = fd;
-    }
-
-  /* Clear any pending SIGUSR1's but keep the behavior the same.  */
-  signal (SIGUSR1, signal (SIGUSR1, SIG_IGN));
-
-  sigemptyset (&set);
-  sigaddset (&set, SIGUSR1);
-  sigprocmask (SIG_UNBLOCK, &set, NULL);
-
-  memset (&inherit, 0, sizeof (inherit));
-
-  if (ND_NODE_CMP (nto_procfs_node, ND_LOCAL_NODE) != 0)
-    {
-      inherit.nd = nto_node ();
-      inherit.flags |= SPAWN_SETND;
-      inherit.flags &= ~SPAWN_EXEC;
-    }
-  inherit.flags |= SPAWN_SETGROUP | SPAWN_HOLD;
-  inherit.pgroup = SPAWN_NEWPGROUP;
-  pid = spawnp (argv[0], 3, fds, &inherit, argv,
-		ND_NODE_CMP (nto_procfs_node, ND_LOCAL_NODE) == 0 ? env : 0);
-  xfree (args);
-
-  sigprocmask (SIG_BLOCK, &set, NULL);
-
-  if (pid == -1)
-    error (_("Error spawning %s: %d (%s)"), argv[0], errno,
-	   safe_strerror (errno));
-
-  if (fds[0] != STDIN_FILENO)
-    close (fds[0]);
-  if (fds[1] != STDOUT_FILENO)
-    close (fds[1]);
-  if (fds[2] != STDERR_FILENO)
-    close (fds[2]);
-
-  ptid_t ptid = do_attach (ptid_t (pid));
-  update_thread_list ();
-  switch_to_thread (this->find_thread (ptid));
-
-  inf = current_inferior ();
-  inferior_appeared (inf, pid);
-  inf->attach_flag = false;
-
-  flags = _DEBUG_FLAG_KLC;	/* Kill-on-Last-Close flag.  */
-  errn = devctl (ctl_fd, DCMD_PROC_SET_FLAG, &flags, sizeof (flags), 0);
-  if (errn != EOK)
-    {
-      /* FIXME: expected warning?  */
-      /* warning( "Failed to set Kill-on-Last-Close flag: errno = %d(%s)\n",
-	 errn, safe_strerror(errn) ); */
-    }
-  if (!inf->target_is_pushed (ops))
-    inf->push_target (ops);
-  target_terminal::init ();
-
-  if (current_program_space->exec_bfd () != NULL
-      || (current_program_space->symfile_object_file != NULL
-	  && current_program_space->symfile_object_file->obfd != NULL))
-    solib_create_inferior_hook (0);
-}
-
-void
-nto_procfs_target::interrupt ()
-{
-  devctl (ctl_fd, DCMD_PROC_STOP, NULL, 0, 0);
-}
-
-void
-nto_procfs_target::kill ()
-{
-  target_mourn_inferior (inferior_ptid);
-}
-
-/* Fill buf with regset and return devctl cmd to do the setting.  Return
-   -1 if we fail to get the regset.  Store size of regset in regsize.  */
-static int
-get_regset (int regset, char *buf, int bufsize, int *regsize)
-{
-  int dev_get, dev_set;
-  switch (regset)
-    {
-    case NTO_REG_GENERAL:
-      dev_get = DCMD_PROC_GETGREG;
-      dev_set = DCMD_PROC_SETGREG;
-      break;
-
-    case NTO_REG_FLOAT:
-      dev_get = DCMD_PROC_GETFPREG;
-      dev_set = DCMD_PROC_SETFPREG;
-      break;
-
-    case NTO_REG_ALT:
-      dev_get = DCMD_PROC_GETALTREG;
-      dev_set = DCMD_PROC_SETALTREG;
-      break;
-
-    case NTO_REG_SYSTEM:
-    default:
-      return -1;
-    }
-  if (devctl (ctl_fd, dev_get, buf, bufsize, regsize) != EOK)
-    return -1;
-
-  return dev_set;
-}
-
-void
-nto_procfs_target::store_registers (struct regcache *regcache, int regno)
-{
-  union
-  {
-    procfs_greg greg;
-    procfs_fpreg fpreg;
-    procfs_altreg altreg;
-  }
-  reg;
-  unsigned off;
-  int len, regset, regsize, dev_set, err;
-  char *data;
-  ptid_t ptid = regcache->ptid ();
-
-  if (ptid == null_ptid)
-    return;
-  procfs_set_thread (ptid);
-
-  if (regno == -1)
-    {
-      for (regset = NTO_REG_GENERAL; regset < NTO_REG_END; regset++)
-	{
-	  dev_set = get_regset (regset, (char *) &reg,
-				sizeof (reg), &regsize);
-	  if (dev_set == -1)
-	    continue;
-
-	  if (nto_regset_fill (regcache, regset, (char *) &reg) == -1)
-	    continue;
-
-	  err = devctl (ctl_fd, dev_set, &reg, regsize, 0);
-	  if (err != EOK)
-	    gdb_printf (gdb_stderr,
-			"Warning unable to write regset %d: %s\n",
-			regno, safe_strerror (err));
-	}
-    }
-  else
-    {
-      regset = nto_regset_id (regno);
-      if (regset == -1)
-	return;
-
-      dev_set = get_regset (regset, (char *) &reg, sizeof (reg), &regsize);
-      if (dev_set == -1)
-	return;
-
-      len = nto_register_area (regcache->arch (),
-			       regno, regset, &off);
-
-      if (len < 1)
-	return;
-
-      regcache->raw_collect (regno, (char *) &reg + off);
-
-      err = devctl (ctl_fd, dev_set, &reg, regsize, 0);
-      if (err != EOK)
-	gdb_printf (gdb_stderr,
-		    "Warning unable to write regset %d: %s\n", regno,
-		    safe_strerror (err));
-    }
-}
-
-/* Set list of signals to be handled in the target.  */
-
-void
-nto_procfs_target::pass_signals
-  (gdb::array_view<const unsigned char> pass_signals)
-{
-  int signo;
-
-  sigfillset (&run.trace);
-
-  for (signo = 1; signo < NSIG; signo++)
-    {
-      int target_signo = gdb_signal_from_host (signo);
-      if (target_signo < pass_signals.size () && pass_signals[target_signo])
-	sigdelset (&run.trace, signo);
-    }
-}
-
-std::string
-nto_procfs_target::pid_to_str (ptid_t ptid)
-{
-  int pid, tid;
-  struct tidinfo *tip;
-
-  pid = ptid.pid ();
-  tid = ptid.tid ();
-
-#if 0				/* NYI */
-  tip = procfs_thread_info (pid, tid);
-  if (tip != NULL)
-    snprintf (&buf[n], 1023, " (state = 0x%02x)", tip->state);
-#endif
-
-  return string_printf ("process %d", pid);
-}
-
-/* to_can_run implementation for "target procfs".  Note this really
-  means "can this target be the default run target", which there can
-  be only one, and we make it be "target native" like other ports.
-  "target procfs <node>" wouldn't make sense as default run target, as
-  it needs <node>.  */
-
-int
-nto_procfs_target::can_run ()
-{
-  return 0;
-}
-
-/* "target procfs".  */
-static nto_procfs_target_procfs nto_procfs_ops;
-
-/* "target native".  */
-static nto_procfs_target_native nto_native_ops;
-
-/* Create the "native" and "procfs" targets.  */
-
-static void
-init_procfs_targets (void)
-{
-  /* Register "target native".  This is the default run target.  */
-  add_target (nto_native_target_info, inf_child_open_target);
-  set_native_target (&nto_native_ops);
-
-  /* Register "target procfs <node>".  */
-  add_target (nto_procfs_target_info, inf_child_open_target);
-}
-
-#define OSTYPE_NTO 1
-
-void _initialize_procfs ();
-void
-_initialize_procfs ()
-{
-  sigset_t set;
-
-  init_procfs_targets ();
-
-  /* We use SIGUSR1 to gain control after we block waiting for a process.
-     We use sigwaitevent to wait.  */
-  sigemptyset (&set);
-  sigaddset (&set, SIGUSR1);
-  sigprocmask (SIG_BLOCK, &set, NULL);
-
-  /* Initially, make sure all signals are reported.  */
-  sigfillset (&run.trace);
-
-  /* Stuff some information.  */
-  nto_cpuinfo_flags = SYSPAGE_ENTRY (cpuinfo)->flags;
-  nto_cpuinfo_valid = 1;
-
-  add_info ("pidlist", procfs_pidlist, _("pidlist"));
-  add_info ("meminfo", procfs_meminfo, _("memory information"));
-
-  nto_is_nto_target = procfs_is_nto_target;
-}
-
-
-static int
-procfs_hw_watchpoint (int addr, int len, enum target_hw_bp_type type)
-{
-  procfs_break brk;
-
-  switch (type)
-    {
-    case hw_read:
-      brk.type = _DEBUG_BREAK_RD;
-      break;
-    case hw_access:
-      brk.type = _DEBUG_BREAK_RW;
-      break;
-    default:			/* Modify.  */
-/* FIXME: brk.type = _DEBUG_BREAK_RWM gives EINVAL for some reason.  */
-      brk.type = _DEBUG_BREAK_RW;
-    }
-  brk.type |= _DEBUG_BREAK_HW;	/* Always ask for HW.  */
-  brk.addr = addr;
-  brk.size = len;
-
-  errno = devctl (ctl_fd, DCMD_PROC_BREAK, &brk, sizeof (brk), 0);
-  if (errno != EOK)
-    {
-      perror (_("Failed to set hardware watchpoint"));
-      return -1;
-    }
-  return 0;
-}
-
-bool
-nto_procfs_target::can_use_hw_breakpoint (enum bptype type,
-					  int cnt, int othertype)
-{
-  return 1;
-}
-
-int
-nto_procfs_target::remove_hw_watchpoint (CORE_ADDR addr, int len,
-					 enum target_hw_bp_type type,
-					 struct expression *cond)
-{
-  return procfs_hw_watchpoint (addr, -1, type);
-}
-
-int
-nto_procfs_target::insert_hw_watchpoint (CORE_ADDR addr, int len,
-					 enum target_hw_bp_type type,
-					 struct expression *cond)
-{
-  return procfs_hw_watchpoint (addr, len, type);
-}
-
-bool
-nto_procfs_target::stopped_by_watchpoint ()
-{
-  /* NOTE: nto_stopped_by_watchpoint will be called ONLY while we are
-     stopped due to a SIGTRAP.  This assumes gdb works in 'all-stop' mode;
-     future gdb versions will likely run in 'non-stop' mode in which case
-     we will have to store/examine statuses per thread in question.
-     Until then, this will work fine.  */
-
-  struct inferior *inf = current_inferior ();
-  struct nto_inferior_data *inf_data;
-
-  gdb_assert (inf != NULL);
-
-  inf_data = nto_inferior_data (inf);
-
-  return inf_data->stopped_flags
-	 & (_DEBUG_FLAG_TRACE_RD
-	    | _DEBUG_FLAG_TRACE_WR
-	    | _DEBUG_FLAG_TRACE_MODIFY);
-}
diff --git a/gdb/nto-tdep.c b/gdb/nto-tdep.c
deleted file mode 100644
index eeef52db..0000000
--- a/gdb/nto-tdep.c
+++ /dev/null
@@ -1,521 +0,0 @@
-/* nto-tdep.c - general QNX Neutrino target functionality.
-
-   Copyright (C) 2003-2024 Free Software Foundation, Inc.
-
-   Contributed by QNX Software Systems Ltd.
-
-   This file is part of GDB.
-
-   This program is free software; you can redistribute it and/or modify
-   it under the terms of the GNU General Public License as published by
-   the Free Software Foundation; either version 3 of the License, or
-   (at your option) any later version.
-
-   This program is distributed in the hope that it will be useful,
-   but WITHOUT ANY WARRANTY; without even the implied warranty of
-   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-   GNU General Public License for more details.
-
-   You should have received a copy of the GNU General Public License
-   along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
-
-#include <sys/stat.h>
-#include "nto-tdep.h"
-#include "extract-store-integer.h"
-#include "top.h"
-#include "inferior.h"
-#include "infrun.h"
-#include "gdbarch.h"
-#include "bfd.h"
-#include "elf-bfd.h"
-#include "solib-svr4.h"
-#include "gdbcore.h"
-#include "objfiles.h"
-#include "source.h"
-#include "gdbsupport/pathstuff.h"
-
-#define QNX_NOTE_NAME	"QNX"
-#define QNX_INFO_SECT_NAME "QNX_info"
-
-#ifdef __CYGWIN__
-#include <sys/cygwin.h>
-#endif
-
-#ifdef __CYGWIN__
-static char default_nto_target[] = "C:\\QNXsdk\\target\\qnx6";
-#elif defined(__sun__) || defined(linux)
-static char default_nto_target[] = "/opt/QNXsdk/target/qnx6";
-#else
-static char default_nto_target[] = "";
-#endif
-
-struct nto_target_ops current_nto_target;
-
-static const registry<inferior>::key<struct nto_inferior_data>
-  nto_inferior_data_reg;
-
-static char *
-nto_target (void)
-{
-  char *p = getenv ("QNX_TARGET");
-
-#ifdef __CYGWIN__
-  static char buf[PATH_MAX];
-  if (p)
-    cygwin_conv_path (CCP_WIN_A_TO_POSIX, p, buf, PATH_MAX);
-  else
-    cygwin_conv_path (CCP_WIN_A_TO_POSIX, default_nto_target, buf, PATH_MAX);
-  return buf;
-#else
-  return p ? p : default_nto_target;
-#endif
-}
-
-/* Take a string such as i386, rs6000, etc. and map it onto CPUTYPE_X86,
-   CPUTYPE_PPC, etc. as defined in nto-share/dsmsgs.h.  */
-int
-nto_map_arch_to_cputype (const char *arch)
-{
-  if (!strcmp (arch, "i386") || !strcmp (arch, "x86"))
-    return CPUTYPE_X86;
-  if (!strcmp (arch, "rs6000") || !strcmp (arch, "powerpc"))
-    return CPUTYPE_PPC;
-  if (!strcmp (arch, "mips"))
-    return CPUTYPE_MIPS;
-  if (!strcmp (arch, "arm"))
-    return CPUTYPE_ARM;
-  if (!strcmp (arch, "sh"))
-    return CPUTYPE_SH;
-  return CPUTYPE_UNKNOWN;
-}
-
-int
-nto_find_and_open_solib (const char *solib, unsigned o_flags,
-			 gdb::unique_xmalloc_ptr<char> *temp_pathname)
-{
-  char *buf, *arch_path, *nto_root;
-  const char *endian;
-  const char *base;
-  const char *arch;
-  int arch_len, len, ret;
-#define PATH_FMT \
-  "%s/lib:%s/usr/lib:%s/usr/photon/lib:%s/usr/photon/dll:%s/lib/dll"
-
-  nto_root = nto_target ();
-  gdbarch *gdbarch = current_inferior ()->arch ();
-  if (strcmp (gdbarch_bfd_arch_info (gdbarch)->arch_name, "i386") == 0)
-    {
-      arch = "x86";
-      endian = "";
-    }
-  else if (strcmp (gdbarch_bfd_arch_info (gdbarch)->arch_name,
-		   "rs6000") == 0
-	   || strcmp (gdbarch_bfd_arch_info (gdbarch)->arch_name,
-		   "powerpc") == 0)
-    {
-      arch = "ppc";
-      endian = "be";
-    }
-  else
-    {
-      arch = gdbarch_bfd_arch_info (gdbarch)->arch_name;
-      endian = gdbarch_byte_order (gdbarch)
-	       == BFD_ENDIAN_BIG ? "be" : "le";
-    }
-
-  /* In case nto_root is short, add strlen(solib)
-     so we can reuse arch_path below.  */
-
-  arch_len = (strlen (nto_root) + strlen (arch) + strlen (endian) + 2
-	      + strlen (solib));
-  arch_path = (char *) alloca (arch_len);
-  xsnprintf (arch_path, arch_len, "%s/%s%s", nto_root, arch, endian);
-
-  len = strlen (PATH_FMT) + strlen (arch_path) * 5 + 1;
-  buf = (char *) alloca (len);
-  xsnprintf (buf, len, PATH_FMT, arch_path, arch_path, arch_path, arch_path,
-	     arch_path);
-
-  base = lbasename (solib);
-  ret = openp (buf, OPF_TRY_CWD_FIRST | OPF_RETURN_REALPATH, base, o_flags,
-	       temp_pathname);
-  if (ret < 0 && base != solib)
-    {
-      xsnprintf (arch_path, arch_len, "/%s", solib);
-      ret = open (arch_path, o_flags, 0);
-      if (temp_pathname)
-	{
-	  if (ret >= 0)
-	    *temp_pathname = gdb_realpath (arch_path);
-	  else
-	    temp_pathname->reset (NULL);
-	}
-    }
-  return ret;
-}
-
-void
-nto_init_solib_absolute_prefix (void)
-{
-  char buf[PATH_MAX * 2], arch_path[PATH_MAX];
-  char *nto_root;
-  const char *endian;
-  const char *arch;
-
-  nto_root = nto_target ();
-  gdbarch *gdbarch = current_inferior ()->arch ();
-  if (strcmp (gdbarch_bfd_arch_info (gdbarch)->arch_name, "i386") == 0)
-    {
-      arch = "x86";
-      endian = "";
-    }
-  else if (strcmp (gdbarch_bfd_arch_info (gdbarch)->arch_name,
-		   "rs6000") == 0
-	   || strcmp (gdbarch_bfd_arch_info (gdbarch)->arch_name,
-		   "powerpc") == 0)
-    {
-      arch = "ppc";
-      endian = "be";
-    }
-  else
-    {
-      arch = gdbarch_bfd_arch_info (gdbarch)->arch_name;
-      endian = gdbarch_byte_order (gdbarch)
-	       == BFD_ENDIAN_BIG ? "be" : "le";
-    }
-
-  xsnprintf (arch_path, sizeof (arch_path), "%s/%s%s", nto_root, arch, endian);
-
-  xsnprintf (buf, sizeof (buf), "set solib-absolute-prefix %s", arch_path);
-  execute_command (buf, 0);
-}
-
-char **
-nto_parse_redirection (char *pargv[], const char **pin, const char **pout, 
-		       const char **perr)
-{
-  char **argv;
-  const char *in, *out, *err, *p;
-  int argc, i, n;
-
-  for (n = 0; pargv[n]; n++);
-  if (n == 0)
-    return NULL;
-  in = "";
-  out = "";
-  err = "";
-
-  argv = XCNEWVEC (char *, n + 1);
-  argc = n;
-  for (i = 0, n = 0; n < argc; n++)
-    {
-      p = pargv[n];
-      if (*p == '>')
-	{
-	  p++;
-	  if (*p)
-	    out = p;
-	  else
-	    out = pargv[++n];
-	}
-      else if (*p == '<')
-	{
-	  p++;
-	  if (*p)
-	    in = p;
-	  else
-	    in = pargv[++n];
-	}
-      else if (*p++ == '2' && *p++ == '>')
-	{
-	  if (*p == '&' && *(p + 1) == '1')
-	    err = out;
-	  else if (*p)
-	    err = p;
-	  else
-	    err = pargv[++n];
-	}
-      else
-	argv[i++] = pargv[n];
-    }
-  *pin = in;
-  *pout = out;
-  *perr = err;
-  return argv;
-}
-
-static CORE_ADDR
-lm_addr (const solib &so)
-{
-  auto *li = gdb::checked_static_cast<const lm_info_svr4 *> (so.lm_info.get ());
-
-  return li->l_addr;
-}
-
-static CORE_ADDR
-nto_truncate_ptr (CORE_ADDR addr)
-{
-  gdbarch *gdbarch = current_inferior ()->arch ();
-  if (gdbarch_ptr_bit (gdbarch) == sizeof (CORE_ADDR) * 8)
-    /* We don't need to truncate anything, and the bit twiddling below
-       will fail due to overflow problems.  */
-    return addr;
-  else
-    return addr & (((CORE_ADDR) 1 << gdbarch_ptr_bit (gdbarch)) - 1);
-}
-
-static Elf_Internal_Phdr *
-find_load_phdr (bfd *abfd)
-{
-  Elf_Internal_Phdr *phdr;
-  unsigned int i;
-
-  if (!elf_tdata (abfd))
-    return NULL;
-
-  phdr = elf_tdata (abfd)->phdr;
-  for (i = 0; i < elf_elfheader (abfd)->e_phnum; i++, phdr++)
-    {
-      if (phdr->p_type == PT_LOAD && (phdr->p_flags & PF_X))
-	return phdr;
-    }
-  return NULL;
-}
-
-void
-nto_relocate_section_addresses (solib &so, target_section *sec)
-{
-  /* Neutrino treats the l_addr base address field in link.h as different than
-     the base address in the System V ABI and so the offset needs to be
-     calculated and applied to relocations.  */
-  Elf_Internal_Phdr *phdr = find_load_phdr (sec->the_bfd_section->owner);
-  unsigned vaddr = phdr ? phdr->p_vaddr : 0;
-
-  sec->addr = nto_truncate_ptr (sec->addr + lm_addr (so) - vaddr);
-  sec->endaddr = nto_truncate_ptr (sec->endaddr + lm_addr (so) - vaddr);
-}
-
-/* This is cheating a bit because our linker code is in libc.so.  If we
-   ever implement lazy linking, this may need to be re-examined.  */
-int
-nto_in_dynsym_resolve_code (CORE_ADDR pc)
-{
-  if (in_plt_section (pc))
-    return 1;
-  return 0;
-}
-
-void
-nto_dummy_supply_regset (struct regcache *regcache, char *regs)
-{
-  /* Do nothing.  */
-}
-
-static void
-nto_sniff_abi_note_section (bfd *abfd, asection *sect, void *obj)
-{
-  const char *sectname;
-  unsigned int sectsize;
-  /* Buffer holding the section contents.  */
-  char *note;
-  unsigned int namelen;
-  const char *name;
-  const unsigned sizeof_Elf_Nhdr = 12;
-
-  sectname = bfd_section_name (sect);
-  sectsize = bfd_section_size (sect);
-
-  if (sectsize > 128)
-    sectsize = 128;
-
-  if (sectname != NULL && strstr (sectname, QNX_INFO_SECT_NAME) != NULL)
-    *(enum gdb_osabi *) obj = GDB_OSABI_QNXNTO;
-  else if (sectname != NULL && strstr (sectname, "note") != NULL
-	   && sectsize > sizeof_Elf_Nhdr)
-    {
-      note = XNEWVEC (char, sectsize);
-      bfd_get_section_contents (abfd, sect, note, 0, sectsize);
-      namelen = (unsigned int) bfd_h_get_32 (abfd, note);
-      name = note + sizeof_Elf_Nhdr;
-      if (sectsize >= namelen + sizeof_Elf_Nhdr
-	  && namelen == sizeof (QNX_NOTE_NAME)
-	  && 0 == strcmp (name, QNX_NOTE_NAME))
-	*(enum gdb_osabi *) obj = GDB_OSABI_QNXNTO;
-
-      XDELETEVEC (note);
-    }
-}
-
-enum gdb_osabi
-nto_elf_osabi_sniffer (bfd *abfd)
-{
-  enum gdb_osabi osabi = GDB_OSABI_UNKNOWN;
-
-  bfd_map_over_sections (abfd,
-			 nto_sniff_abi_note_section,
-			 &osabi);
-
-  return osabi;
-}
-
-static const char * const nto_thread_state_str[] =
-{
-  "DEAD",		/* 0  0x00 */
-  "RUNNING",	/* 1  0x01 */
-  "READY",	/* 2  0x02 */
-  "STOPPED",	/* 3  0x03 */
-  "SEND",		/* 4  0x04 */
-  "RECEIVE",	/* 5  0x05 */
-  "REPLY",	/* 6  0x06 */
-  "STACK",	/* 7  0x07 */
-  "WAITTHREAD",	/* 8  0x08 */
-  "WAITPAGE",	/* 9  0x09 */
-  "SIGSUSPEND",	/* 10 0x0a */
-  "SIGWAITINFO",	/* 11 0x0b */
-  "NANOSLEEP",	/* 12 0x0c */
-  "MUTEX",	/* 13 0x0d */
-  "CONDVAR",	/* 14 0x0e */
-  "JOIN",		/* 15 0x0f */
-  "INTR",		/* 16 0x10 */
-  "SEM",		/* 17 0x11 */
-  "WAITCTX",	/* 18 0x12 */
-  "NET_SEND",	/* 19 0x13 */
-  "NET_REPLY"	/* 20 0x14 */
-};
-
-const char *
-nto_extra_thread_info (struct target_ops *self, struct thread_info *ti)
-{
-  if (ti != NULL && ti->priv != NULL)
-    {
-      nto_thread_info *priv = get_nto_thread_info (ti);
-
-      if (priv->state < ARRAY_SIZE (nto_thread_state_str))
-	return nto_thread_state_str [priv->state];
-    }
-  return "";
-}
-
-void
-nto_initialize_signals (void)
-{
-  /* We use SIG45 for pulses, or something, so nostop, noprint
-     and pass them.  */
-  signal_stop_update (gdb_signal_from_name ("SIG45"), 0);
-  signal_print_update (gdb_signal_from_name ("SIG45"), 0);
-  signal_pass_update (gdb_signal_from_name ("SIG45"), 1);
-
-  /* By default we don't want to stop on these two, but we do want to pass.  */
-#if defined(SIGSELECT)
-  signal_stop_update (SIGSELECT, 0);
-  signal_print_update (SIGSELECT, 0);
-  signal_pass_update (SIGSELECT, 1);
-#endif
-
-#if defined(SIGPHOTON)
-  signal_stop_update (SIGPHOTON, 0);
-  signal_print_update (SIGPHOTON, 0);
-  signal_pass_update (SIGPHOTON, 1);
-#endif
-}
-
-/* Read AUXV from initial_stack.  */
-LONGEST
-nto_read_auxv_from_initial_stack (CORE_ADDR initial_stack, gdb_byte *readbuf,
-				  LONGEST len, size_t sizeof_auxv_t)
-{
-  gdb_byte targ32[4]; /* For 32 bit target values.  */
-  gdb_byte targ64[8]; /* For 64 bit target values.  */
-  CORE_ADDR data_ofs = 0;
-  ULONGEST anint;
-  LONGEST len_read = 0;
-  gdb_byte *buff;
-  enum bfd_endian byte_order;
-  int ptr_size;
-
-  if (sizeof_auxv_t == 16)
-    ptr_size = 8;
-  else
-    ptr_size = 4;
-
-  /* Skip over argc, argv and envp... Comment from ldd.c:
-
-     The startup frame is set-up so that we have:
-     auxv
-     NULL
-     ...
-     envp2
-     envp1 <----- void *frame + (argc + 2) * sizeof(char *)
-     NULL
-     ...
-     argv2
-     argv1
-     argc  <------ void * frame
-
-     On entry to ldd, frame gives the address of argc on the stack.  */
-  /* Read argc. 4 bytes on both 64 and 32 bit arches and luckily little
-   * endian. So we just read first 4 bytes.  */
-  if (target_read_memory (initial_stack + data_ofs, targ32, 4) != 0)
-    return 0;
-
-  byte_order = gdbarch_byte_order (current_inferior ()->arch ());
-
-  anint = extract_unsigned_integer (targ32, sizeof (targ32), byte_order);
-
-  /* Size of pointer is assumed to be 4 bytes (32 bit arch.) */
-  data_ofs += (anint + 2) * ptr_size; /* + 2 comes from argc itself and
-						NULL terminating pointer in
-						argv.  */
-
-  /* Now loop over env table:  */
-  anint = 0;
-  while (target_read_memory (initial_stack + data_ofs, targ64, ptr_size)
-	 == 0)
-    {
-      if (extract_unsigned_integer (targ64, ptr_size, byte_order) == 0)
-	anint = 1; /* Keep looping until non-null entry is found.  */
-      else if (anint)
-	break;
-      data_ofs += ptr_size;
-    }
-  initial_stack += data_ofs;
-
-  memset (readbuf, 0, len);
-  buff = readbuf;
-  while (len_read <= len-sizeof_auxv_t)
-    {
-      if (target_read_memory (initial_stack + len_read, buff, sizeof_auxv_t)
-	  == 0)
-	{
-	  /* Both 32 and 64 bit structures have int as the first field.  */
-	  const ULONGEST a_type
-	    = extract_unsigned_integer (buff, sizeof (targ32), byte_order);
-
-	  if (a_type == AT_NULL)
-	    break;
-	  buff += sizeof_auxv_t;
-	  len_read += sizeof_auxv_t;
-	}
-      else
-	break;
-    }
-  return len_read;
-}
-
-/* Return nto_inferior_data for the given INFERIOR.  If not yet created,
-   construct it.  */
-
-struct nto_inferior_data *
-nto_inferior_data (struct inferior *const inferior)
-{
-  struct inferior *const inf = inferior ? inferior : current_inferior ();
-  struct nto_inferior_data *inf_data;
-
-  gdb_assert (inf != NULL);
-
-  inf_data = nto_inferior_data_reg.get (inf);
-  if (inf_data == NULL)
-    inf_data = nto_inferior_data_reg.emplace (inf);
-
-  return inf_data;
-}
diff --git a/gdb/nto-tdep.h b/gdb/nto-tdep.h
deleted file mode 100644
index 249a4f6..0000000
--- a/gdb/nto-tdep.h
+++ /dev/null
@@ -1,194 +0,0 @@
-/* nto-tdep.h - QNX Neutrino target header.
-
-   Copyright (C) 2003-2024 Free Software Foundation, Inc.
-
-   Contributed by QNX Software Systems Ltd.
-
-   This file is part of GDB.
-
-   This program is free software; you can redistribute it and/or modify
-   it under the terms of the GNU General Public License as published by
-   the Free Software Foundation; either version 3 of the License, or
-   (at your option) any later version.
-
-   This program is distributed in the hope that it will be useful,
-   but WITHOUT ANY WARRANTY; without even the implied warranty of
-   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-   GNU General Public License for more details.
-
-   You should have received a copy of the GNU General Public License
-   along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
-
-#ifndef NTO_TDEP_H
-#define NTO_TDEP_H
-
-#include "solist.h"
-#include "osabi.h"
-#include "regset.h"
-#include "gdbthread.h"
-#include "gdbsupport/gdb-checked-static-cast.h"
-
-/* Target operations defined for Neutrino targets (<target>-nto-tdep.c).  */
-
-struct nto_target_ops
-{
-/* The CPUINFO flags from the remote.  Currently used by
-   i386 for fxsave but future proofing other hosts.
-   This is initialized in procfs_attach or nto_start_remote
-   depending on our host/target.  It would only be invalid
-   if we were talking to an older pdebug which didn't support
-   the cpuinfo message.  */
-  unsigned cpuinfo_flags;
-
-/* True if successfully retrieved cpuinfo from remote.  */
-  int cpuinfo_valid;
-
-/* Given a register, return an id that represents the Neutrino
-   regset it came from.  If reg == -1 update all regsets.  */
-  int (*regset_id) (int);
-
-  void (*supply_gregset) (struct regcache *, char *);
-
-  void (*supply_fpregset) (struct regcache *, char *);
-
-  void (*supply_altregset) (struct regcache *, char *);
-
-/* Given a regset, tell gdb about registers stored in data.  */
-  void (*supply_regset) (struct regcache *, int, char *);
-
-/* Given a register and regset, calculate the offset into the regset
-   and stuff it into the last argument.  If regno is -1, calculate the
-   size of the entire regset.  Returns length of data, -1 if unknown
-   regset, 0 if unknown register.  */
-  int (*register_area) (struct gdbarch *, int, int, unsigned *);
-
-/* Build the Neutrino register set info into the data buffer.
-   Return -1 if unknown regset, 0 otherwise.  */
-  int (*regset_fill) (const struct regcache *, int, char *);
-
-/* Gives the fetch_link_map_offsets function exposure outside of
-   solib-svr4.c so that we can override relocate_section_addresses().  */
-  struct link_map_offsets *(*fetch_link_map_offsets) (void);
-
-/* Used by nto_elf_osabi_sniffer to determine if we're connected to an
-   Neutrino target.  */
-  enum gdb_osabi (*is_nto_target) (bfd *abfd);
-};
-
-extern struct nto_target_ops current_nto_target;
-
-#define nto_cpuinfo_flags (current_nto_target.cpuinfo_flags)
-
-#define nto_cpuinfo_valid (current_nto_target.cpuinfo_valid)
-
-#define nto_regset_id (current_nto_target.regset_id)
-
-#define nto_supply_gregset (current_nto_target.supply_gregset)
-
-#define nto_supply_fpregset (current_nto_target.supply_fpregset)
-
-#define nto_supply_altregset (current_nto_target.supply_altregset)
-
-#define nto_supply_regset (current_nto_target.supply_regset)
-
-#define nto_register_area (current_nto_target.register_area)
-
-#define nto_regset_fill (current_nto_target.regset_fill)
-
-#define nto_fetch_link_map_offsets \
-(current_nto_target.fetch_link_map_offsets)
-
-#define nto_is_nto_target (current_nto_target.is_nto_target)
-
-/* Keep this consistant with neutrino syspage.h.  */
-enum
-{
-  CPUTYPE_X86,
-  CPUTYPE_PPC,
-  CPUTYPE_MIPS,
-  CPUTYPE_SPARE,
-  CPUTYPE_ARM,
-  CPUTYPE_SH,
-  CPUTYPE_UNKNOWN
-};
-
-enum
-{
-  OSTYPE_QNX4,
-  OSTYPE_NTO
-};
-
-/* These correspond to the DSMSG_* versions in dsmsgs.h.  */
-enum
-{
-  NTO_REG_GENERAL,
-  NTO_REG_FLOAT,
-  NTO_REG_SYSTEM,
-  NTO_REG_ALT,
-  NTO_REG_END
-};
-
-typedef char qnx_reg64[8];
-
-typedef struct _debug_regs
-{
-  qnx_reg64 padding[1024];
-} nto_regset_t;
-
-struct nto_thread_info : public private_thread_info
-{
-  short tid = 0;
-  unsigned char state = 0;
-  unsigned char flags = 0;
-  std::string name;
-};
-
-static inline nto_thread_info *
-get_nto_thread_info (thread_info *thread)
-{
-  return gdb::checked_static_cast<nto_thread_info *> (thread->priv.get ());
-}
-
-/* Per-inferior data, common for both procfs and remote.  */
-struct nto_inferior_data
-{
-  /* Last stopped flags result from wait function */
-  unsigned int stopped_flags = 0;
-
-  /* Last known stopped PC */
-  CORE_ADDR stopped_pc = 0;
-};
-
-/* Generic functions in nto-tdep.c.  */
-
-void nto_init_solib_absolute_prefix (void);
-
-char **nto_parse_redirection (char *start_argv[], const char **in,
-			      const char **out, const char **err);
-
-void nto_relocate_section_addresses (solib &, target_section *);
-
-int nto_map_arch_to_cputype (const char *);
-
-int nto_find_and_open_solib (const char *, unsigned,
-			     gdb::unique_xmalloc_ptr<char> *);
-
-enum gdb_osabi nto_elf_osabi_sniffer (bfd *abfd);
-
-void nto_initialize_signals (void);
-
-/* Dummy function for initializing nto_target_ops on targets which do
-   not define a particular regset.  */
-void nto_dummy_supply_regset (struct regcache *regcache, char *regs);
-
-int nto_in_dynsym_resolve_code (CORE_ADDR pc);
-
-const char *nto_extra_thread_info (struct target_ops *self, struct thread_info *);
-
-LONGEST nto_read_auxv_from_initial_stack (CORE_ADDR initial_stack,
-					  gdb_byte *readbuf,
-					  LONGEST len, size_t sizeof_auxv_t);
-
-struct nto_inferior_data *nto_inferior_data (struct inferior *inf);
-
-#endif /* NTO_TDEP_H */
diff --git a/gdb/objc-lang.c b/gdb/objc-lang.c
index 3655445..fa2befd 100644
--- a/gdb/objc-lang.c
+++ b/gdb/objc-lang.c
@@ -120,9 +120,11 @@ lookup_objc_class (struct gdbarch *gdbarch, const char *classname)
       return 0;
     }
 
-  if (lookup_minimal_symbol("objc_lookUpClass", 0, 0).minsym)
+  if (lookup_minimal_symbol (current_program_space,
+			     "objc_lookUpClass").minsym != nullptr)
     function = find_function_in_inferior("objc_lookUpClass", NULL);
-  else if (lookup_minimal_symbol ("objc_lookup_class", 0, 0).minsym)
+  else if (lookup_minimal_symbol (current_program_space,
+				  "objc_lookup_class").minsym != nullptr)
     function = find_function_in_inferior("objc_lookup_class", NULL);
   else
     {
@@ -149,9 +151,11 @@ lookup_child_selector (struct gdbarch *gdbarch, const char *selname)
       return 0;
     }
 
-  if (lookup_minimal_symbol("sel_getUid", 0, 0).minsym)
+  if (lookup_minimal_symbol (current_program_space, "sel_getUid").minsym
+      != nullptr)
     function = find_function_in_inferior("sel_getUid", NULL);
-  else if (lookup_minimal_symbol ("sel_get_any_uid", 0, 0).minsym)
+  else if (lookup_minimal_symbol (current_program_space,
+				  "sel_get_any_uid").minsym != nullptr)
     function = find_function_in_inferior("sel_get_any_uid", NULL);
   else
     {
@@ -180,17 +184,21 @@ value_nsstring (struct gdbarch *gdbarch, const char *ptr, int len)
   stringValue[2] = value_string(ptr, len, char_type);
   stringValue[2] = value_coerce_array(stringValue[2]);
   /* _NSNewStringFromCString replaces "istr" after Lantern2A.  */
-  if (lookup_minimal_symbol("_NSNewStringFromCString", 0, 0).minsym)
+  if (lookup_minimal_symbol (current_program_space,
+			     "_NSNewStringFromCString").minsym != nullptr)
     {
       function = find_function_in_inferior("_NSNewStringFromCString", NULL);
       nsstringValue = call_function_by_hand(function, NULL, stringValue[2]);
     }
-  else if (lookup_minimal_symbol("istr", 0, 0).minsym)
+  else if (lookup_minimal_symbol (current_program_space,
+				  "istr").minsym != nullptr)
     {
       function = find_function_in_inferior("istr", NULL);
       nsstringValue = call_function_by_hand(function, NULL, stringValue[2]);
     }
-  else if (lookup_minimal_symbol("+[NSString stringWithCString:]", 0, 0).minsym)
+  else if (lookup_minimal_symbol (current_program_space,
+				  "+[NSString stringWithCString:]").minsym
+	   != nullptr)
     {
       function
 	= find_function_in_inferior("+[NSString stringWithCString:]", NULL);
@@ -544,7 +552,7 @@ compare_selectors (const void *a, const void *b)
  *
  * Implements the "Info selectors" command.  Takes an optional regexp
  * arg.  Lists all objective c selectors that match the regexp.  Works
- * by grepping thru all symbols for objective c methods.  Output list
+ * by grepping through all symbols for objective c methods.  Output list
  * is sorted and uniqued. 
  */
 
@@ -593,7 +601,7 @@ info_selectors_command (const char *regexp, int from_tty)
 	error (_("Invalid regexp (%s): %s"), val, regexp);
     }
 
-  /* First time thru is JUST to get max length and count.  */
+  /* First time through is JUST to get max length and count.  */
   for (objfile *objfile : current_program_space->objfiles ())
     {
       for (minimal_symbol *msymbol : objfile->msymbols ())
@@ -708,7 +716,7 @@ compare_classes (const void *a, const void *b)
  *
  * Implements the "info classes" command for objective c classes.
  * Lists all objective c classes that match the optional regexp.
- * Works by grepping thru the list of objective c methods.  List will
+ * Works by grepping through the list of objective c methods.  List will
  * be sorted and uniqued (since one class may have many methods).
  * BUGS: will not list a class that has no methods. 
  */
@@ -747,7 +755,7 @@ info_classes_command (const char *regexp, int from_tty)
 	error (_("Invalid regexp (%s): %s"), val, regexp);
     }
 
-  /* First time thru is JUST to get max length and count.  */
+  /* First time through is JUST to get max length and count.  */
   for (objfile *objfile : current_program_space->objfiles ())
     {
       for (minimal_symbol *msymbol : objfile->msymbols ())
@@ -1137,8 +1145,8 @@ find_imps (const char *method, std::vector<const char *> *symbol_names)
 	symbol_names->push_back (sym->natural_name ());
       else
 	{
-	  struct bound_minimal_symbol msym
-	    = lookup_minimal_symbol (selector, 0, 0);
+	  bound_minimal_symbol msym
+	    = lookup_minimal_symbol (current_program_space, selector);
 
 	  if (msym.minsym != NULL) 
 	    symbol_names->push_back (msym.minsym->natural_name ());
@@ -1240,13 +1248,13 @@ find_objc_msgsend (void)
 
   for (i = 0; i < nmethcalls; i++)
     {
-      struct bound_minimal_symbol func;
-
       /* Try both with and without underscore.  */
-      func = lookup_bound_minimal_symbol (methcalls[i].name);
+      bound_minimal_symbol func
+	= lookup_minimal_symbol (current_program_space, methcalls[i].name);
       if ((func.minsym == NULL) && (methcalls[i].name[0] == '_'))
 	{
-	  func = lookup_bound_minimal_symbol (methcalls[i].name + 1);
+	  func = lookup_minimal_symbol (current_program_space,
+					methcalls[i].name + 1);
 	}
       if (func.minsym == NULL)
 	{ 
diff --git a/gdb/objfiles.h b/gdb/objfiles.h
index 50bd6f8..d92570a 100644
--- a/gdb/objfiles.h
+++ b/gdb/objfiles.h
@@ -597,14 +597,15 @@ public:
      gdb::function_view<expand_symtabs_symbol_matcher_ftype> symbol_matcher,
      gdb::function_view<expand_symtabs_exp_notify_ftype> expansion_notify,
      block_search_flags search_flags,
-     domain_search_flags domain);
+     domain_search_flags domain,
+     gdb::function_view<expand_symtabs_lang_matcher_ftype> lang_matcher
+       = nullptr);
 
   /* See quick_symbol_functions.  */
-  struct compunit_symtab *find_pc_sect_compunit_symtab
-    (struct bound_minimal_symbol msymbol,
-     CORE_ADDR pc,
-     struct obj_section *section,
-     int warn_if_readin);
+  struct compunit_symtab *
+  find_pc_sect_compunit_symtab (bound_minimal_symbol msymbol, CORE_ADDR pc,
+				struct obj_section *section,
+				int warn_if_readin);
 
   /* See quick_symbol_functions.  */
   void map_symbol_filenames (gdb::function_view<symbol_filename_ftype> fun,
diff --git a/gdb/obsd-tdep.c b/gdb/obsd-tdep.c
index 5142984..00de5c0 100644
--- a/gdb/obsd-tdep.c
+++ b/gdb/obsd-tdep.c
@@ -27,9 +27,8 @@
 CORE_ADDR
 obsd_skip_solib_resolver (struct gdbarch *gdbarch, CORE_ADDR pc)
 {
-  struct bound_minimal_symbol msym;
-
-  msym = lookup_minimal_symbol("_dl_bind", NULL, NULL);
+  bound_minimal_symbol msym
+    = lookup_minimal_symbol (current_program_space, "_dl_bind");
   if (msym.minsym && msym.value_address () == pc)
     return frame_unwind_caller_pc (get_current_frame ());
   else
diff --git a/gdb/osabi.c b/gdb/osabi.c
index d494d89..236d425 100644
--- a/gdb/osabi.c
+++ b/gdb/osabi.c
@@ -25,6 +25,7 @@
 #include "gdb_bfd.h"
 
 #include "elf-bfd.h"
+#include "inferior.h"
 
 #ifndef GDB_OSABI_DEFAULT
 #define GDB_OSABI_DEFAULT GDB_OSABI_UNKNOWN
@@ -41,94 +42,6 @@ static const char *gdb_osabi_available_names[GDB_OSABI_INVALID + 3] = {
 };
 static const char *set_osabi_string;
 
-/* Names associated with each osabi.  */
-
-struct osabi_names
-{
-  /* The "pretty" name.  */
-
-  const char *pretty;
-
-  /* The triplet regexp, or NULL if not known.  */
-
-  const char *regexp;
-};
-
-/* This table matches the indices assigned to enum gdb_osabi.  Keep
-   them in sync.  */
-static const struct osabi_names gdb_osabi_names[] =
-{
-  { "unknown", NULL },
-  { "none", NULL },
-
-  { "SVR4", NULL },
-  { "GNU/Hurd", NULL },
-  { "Solaris", NULL },
-  { "GNU/Linux", "linux(-gnu[^-]*)?" },
-  { "FreeBSD", NULL },
-  { "NetBSD", NULL },
-  { "OpenBSD", NULL },
-  { "WindowsCE", NULL },
-  { "DJGPP", NULL },
-  { "QNX-Neutrino", NULL },
-  { "Cygwin", NULL },
-  { "Windows", NULL },
-  { "AIX", NULL },
-  { "DICOS", NULL },
-  { "Darwin", NULL },
-  { "OpenVMS", NULL },
-  { "LynxOS178", NULL },
-  { "Newlib", NULL },
-  { "SDE", NULL },
-  { "PikeOS", NULL },
-
-  { "<invalid>", NULL }
-};
-
-const char *
-gdbarch_osabi_name (enum gdb_osabi osabi)
-{
-  if (osabi >= GDB_OSABI_UNKNOWN && osabi < GDB_OSABI_INVALID)
-    return gdb_osabi_names[osabi].pretty;
-
-  return gdb_osabi_names[GDB_OSABI_INVALID].pretty;
-}
-
-/* See osabi.h.  */
-
-const char *
-osabi_triplet_regexp (enum gdb_osabi osabi)
-{
-  if (osabi >= GDB_OSABI_UNKNOWN && osabi < GDB_OSABI_INVALID)
-    return gdb_osabi_names[osabi].regexp;
-
-  return gdb_osabi_names[GDB_OSABI_INVALID].regexp;
-}
-
-/* Lookup the OS ABI corresponding to the specified target description
-   string.  */
-
-enum gdb_osabi
-osabi_from_tdesc_string (const char *name)
-{
-  int i;
-
-  for (i = 0; i < ARRAY_SIZE (gdb_osabi_names); i++)
-    if (strcmp (name, gdb_osabi_names[i].pretty) == 0)
-      {
-	/* See note above: the name table matches the indices assigned
-	   to enum gdb_osabi.  */
-	enum gdb_osabi osabi = (enum gdb_osabi) i;
-
-	if (osabi == GDB_OSABI_INVALID)
-	  return GDB_OSABI_UNKNOWN;
-	else
-	  return osabi;
-      }
-
-  return GDB_OSABI_UNKNOWN;
-}
-
 /* Handler for a given architecture/OS ABI pair.  There should be only
    one handler for a given OS ABI each architecture family.  */
 struct gdb_osabi_handler
@@ -611,6 +524,35 @@ generic_elf_osabi_sniffer (bfd *abfd)
 
   return osabi;
 }
+
+/* See osabi.h.  */
+
+const char *
+gdbarch_osabi_enum_name (enum gdb_osabi osabi)
+{
+  switch (osabi)
+    {
+#define GDB_OSABI_DEF_FIRST(Enum, Name, Regex)	\
+      case GDB_OSABI_ ## Enum:			\
+	return "GDB_OSABI_" #Enum;
+
+#define GDB_OSABI_DEF(Enum, Name, Regex)	\
+      case GDB_OSABI_ ## Enum:			\
+	return "GDB_OSABI_" #Enum;
+
+#define GDB_OSABI_DEF_LAST(Enum, Name, Regex)	\
+      case GDB_OSABI_ ## Enum:			\
+	return "GDB_OSABI_" #Enum;
+
+#include "gdbsupport/osabi.def"
+
+#undef GDB_OSABI_DEF_LAST
+#undef GDB_OSABI_DEF
+#undef GDB_OSABI_DEF_FIRST
+    }
+
+  gdb_assert_not_reached ();
+}
 
 static void
 set_osabi (const char *args, int from_tty, struct cmd_list_element *c)
@@ -645,7 +587,7 @@ set_osabi (const char *args, int from_tty, struct cmd_list_element *c)
   /* NOTE: At some point (true multiple architectures) we'll need to be more
      graceful here.  */
   gdbarch_info info;
-  if (! gdbarch_update_p (info))
+  if (!gdbarch_update_p (current_inferior (), info))
     internal_error (_("Updating OS ABI failed."));
 }
 
@@ -671,10 +613,6 @@ void _initialize_gdb_osabi ();
 void
 _initialize_gdb_osabi ()
 {
-  if (strcmp (gdb_osabi_names[GDB_OSABI_INVALID].pretty, "<invalid>") != 0)
-    internal_error
-      (_("_initialize_gdb_osabi: gdb_osabi_names[] is inconsistent"));
-
   /* Register a generic sniffer for ELF flavoured files.  */
   gdbarch_register_osabi_sniffer (bfd_arch_unknown,
 				  bfd_target_elf_flavour,
diff --git a/gdb/osabi.h b/gdb/osabi.h
index c1a85d1..2d828d5 100644
--- a/gdb/osabi.h
+++ b/gdb/osabi.h
@@ -19,36 +19,7 @@
 #ifndef OSABI_H
 #define OSABI_H
 
-/* * List of known OS ABIs.  If you change this, make sure to update the
-   table in osabi.c.  */
-enum gdb_osabi
-{
-  GDB_OSABI_UNKNOWN = 0,	/* keep this zero */
-  GDB_OSABI_NONE,
-
-  GDB_OSABI_SVR4,
-  GDB_OSABI_HURD,
-  GDB_OSABI_SOLARIS,
-  GDB_OSABI_LINUX,
-  GDB_OSABI_FREEBSD,
-  GDB_OSABI_NETBSD,
-  GDB_OSABI_OPENBSD,
-  GDB_OSABI_WINCE,
-  GDB_OSABI_GO32,
-  GDB_OSABI_QNXNTO,
-  GDB_OSABI_CYGWIN,
-  GDB_OSABI_WINDOWS,
-  GDB_OSABI_AIX,
-  GDB_OSABI_DICOS,
-  GDB_OSABI_DARWIN,
-  GDB_OSABI_OPENVMS,
-  GDB_OSABI_LYNXOS178,
-  GDB_OSABI_NEWLIB,
-  GDB_OSABI_SDE,
-  GDB_OSABI_PIKEOS,
-
-  GDB_OSABI_INVALID		/* keep this last */
-};
+#include "gdbsupport/osabi.h"
 
 /* Register an OS ABI sniffer.  Each arch/flavour may have more than
    one sniffer.  This is used to e.g. differentiate one OS's a.out from
@@ -70,26 +41,19 @@ void gdbarch_register_osabi (enum bfd_architecture, unsigned long,
 /* Lookup the OS ABI corresponding to the specified BFD.  */
 enum gdb_osabi gdbarch_lookup_osabi (bfd *);
 
-/* Lookup the OS ABI corresponding to the specified target description
-   string.  */
-enum gdb_osabi osabi_from_tdesc_string (const char *text);
-
 /* Return true if there's an OS ABI handler for INFO.  */
 bool has_gdb_osabi_handler (struct gdbarch_info info);
 
 /* Initialize the gdbarch for the specified OS ABI variant.  */
 void gdbarch_init_osabi (struct gdbarch_info, struct gdbarch *);
 
-/* Return the name of the specified OS ABI.  */
-const char *gdbarch_osabi_name (enum gdb_osabi);
-
-/* Return a regular expression that matches the OS part of a GNU
-   configury triplet for the given OSABI.  */
-const char *osabi_triplet_regexp (enum gdb_osabi osabi);
-
 /* Helper routine for ELF file sniffers.  This looks at ABI tag note
    sections to determine the OS ABI from the note.  */
 void generic_elf_osabi_sniff_abi_tag_sections (bfd *, asection *,
 					       enum gdb_osabi *);
 
+/* Return a string version of OSABI.  This is used when generating code
+   which calls set_tdesc_osabi and an 'enum gdb_osabi' value is needed.  */
+const char *gdbarch_osabi_enum_name (enum gdb_osabi osabi);
+
 #endif /* OSABI_H */
diff --git a/gdb/p-exp.y b/gdb/p-exp.y
index 0a0fa95..938d3cf 100644
--- a/gdb/p-exp.y
+++ b/gdb/p-exp.y
@@ -614,7 +614,7 @@ block	:	BLOCKNAME
 			    {
 			      std::string copy = copy_name ($1.stoken);
 			      struct symtab *tem =
-				  lookup_symtab (copy.c_str ());
+				  lookup_symtab (current_program_space, copy.c_str ());
 			      if (tem)
 				$$ = (tem->compunit ()->blockvector ()
 				      ->static_block ());
@@ -717,11 +717,10 @@ variable:	name_not_typename
 			    }
 			  else
 			    {
-			      struct bound_minimal_symbol msymbol;
 			      std::string arg = copy_name ($1.stoken);
 
-			      msymbol =
-				lookup_bound_minimal_symbol (arg.c_str ());
+			      bound_minimal_symbol msymbol
+				= lookup_minimal_symbol (current_program_space, arg.c_str ());
 			      if (msymbol.minsym != NULL)
 				pstate->push_new<var_msym_value_operation>
 				  (msymbol);
@@ -1521,7 +1520,7 @@ yylex (void)
        no psymtabs (coff, xcoff, or some future change to blow away the
        psymtabs once once symbols are read).  */
     if ((sym && sym->aclass () == LOC_BLOCK)
-	|| lookup_symtab (tmp.c_str ()))
+	|| lookup_symtab (current_program_space, tmp.c_str ()))
       {
 	yylval.ssym.sym.symbol = sym;
 	yylval.ssym.sym.block = NULL;
diff --git a/gdb/p-lang.c b/gdb/p-lang.c
index d3d491c..4c5d4dd 100644
--- a/gdb/p-lang.c
+++ b/gdb/p-lang.c
@@ -59,22 +59,23 @@ static const char GPC_MAIN_PROGRAM_NAME_2[] = "pascal_main_program";
 const char *
 pascal_main_name (void)
 {
-  struct bound_minimal_symbol msym;
-
-  msym = lookup_minimal_symbol (GPC_P_INITIALIZE, NULL, NULL);
+  bound_minimal_symbol msym
+    = lookup_minimal_symbol (current_program_space, GPC_P_INITIALIZE);
 
   /*  If '_p_initialize' was not found, the main program is likely not
      written in Pascal.  */
   if (msym.minsym == NULL)
     return NULL;
 
-  msym = lookup_minimal_symbol (GPC_MAIN_PROGRAM_NAME_1, NULL, NULL);
+  msym
+    = lookup_minimal_symbol (current_program_space, GPC_MAIN_PROGRAM_NAME_1);
   if (msym.minsym != NULL)
     {
       return GPC_MAIN_PROGRAM_NAME_1;
     }
 
-  msym = lookup_minimal_symbol (GPC_MAIN_PROGRAM_NAME_2, NULL, NULL);
+  msym
+    = lookup_minimal_symbol (current_program_space, GPC_MAIN_PROGRAM_NAME_2);
   if (msym.minsym != NULL)
     {
       return GPC_MAIN_PROGRAM_NAME_2;
diff --git a/gdb/p-valprint.c b/gdb/p-valprint.c
index bdb9524..aa7f1a9 100644
--- a/gdb/p-valprint.c
+++ b/gdb/p-valprint.c
@@ -225,8 +225,8 @@ pascal_language::value_print_inner (struct value *val,
 	{
 	  /* Print vtbl's nicely.  */
 	  CORE_ADDR vt_address = unpack_pointer (type, valaddr);
-	  struct bound_minimal_symbol msymbol =
-	    lookup_minimal_symbol_by_pc (vt_address);
+	  bound_minimal_symbol msymbol
+	    = lookup_minimal_symbol_by_pc (vt_address);
 
 	  /* If 'symbol_print' is set, we did the work above.  */
 	  if (!options->symbol_print
diff --git a/gdb/parse.c b/gdb/parse.c
index 2541a2e..e0837de 100644
--- a/gdb/parse.c
+++ b/gdb/parse.c
@@ -145,7 +145,8 @@ parser_state::push_symbol (const char *name, block_symbol sym)
     }
   else
     {
-      struct bound_minimal_symbol msymbol = lookup_bound_minimal_symbol (name);
+      bound_minimal_symbol msymbol
+	= lookup_minimal_symbol (current_program_space, name);
       if (msymbol.minsym != NULL)
 	push_new<expr::var_msym_value_operation> (msymbol);
       else if (!have_full_symbols (current_program_space)
@@ -162,7 +163,6 @@ void
 parser_state::push_dollar (struct stoken str)
 {
   struct block_symbol sym;
-  struct bound_minimal_symbol msym;
   struct internalvar *isym = NULL;
   std::string copy;
 
@@ -232,7 +232,8 @@ parser_state::push_dollar (struct stoken str)
       push_new<expr::var_value_operation> (sym);
       return;
     }
-  msym = lookup_bound_minimal_symbol (copy.c_str ());
+  bound_minimal_symbol msym
+    = lookup_minimal_symbol (current_program_space, copy.c_str ());
   if (msym.minsym)
     {
       push_new<expr::var_msym_value_operation> (msym);
@@ -422,8 +423,7 @@ parse_exp_in_context (const char **stringptr, CORE_ADDR pc,
 		   expression_context_pc, flags, *stringptr,
 		   completer != nullptr, tracker);
 
-  scoped_restore_current_language lang_saver;
-  set_language (lang->la_language);
+  scoped_restore_current_language lang_saver (lang->la_language);
 
   try
     {
@@ -489,10 +489,7 @@ parse_expression_with_language (const char *string, enum language lang)
 {
   std::optional<scoped_restore_current_language> lang_saver;
   if (current_language->la_language != lang)
-    {
-      lang_saver.emplace ();
-      set_language (lang);
-    }
+    lang_saver.emplace (lang);
 
   return parse_expression (string);
 }
diff --git a/gdb/ppc-linux-tdep.c b/gdb/ppc-linux-tdep.c
index e100045..8a5eea7 100644
--- a/gdb/ppc-linux-tdep.c
+++ b/gdb/ppc-linux-tdep.c
@@ -133,7 +133,7 @@ static solib_ops powerpc_so_ops;
 	    (gdb) b main
 	    Breakpoint 2 at 0x100006a0: file gdb.base/shmain.c, line 44.
 
-	Examine the instruction (and the immediatly following instruction)
+	Examine the instruction (and the immediately following instruction)
 	upon which the breakpoint was placed.  Note that the PLT entry
 	for shr1 contains zeros.
 
@@ -313,15 +313,13 @@ static const struct ppc_insn_pattern powerpc32_plt_stub_so_2[] =
 static int
 powerpc_linux_in_dynsym_resolve_code (CORE_ADDR pc)
 {
-  struct bound_minimal_symbol sym;
-
   /* Check whether PC is in the dynamic linker.  This also checks
      whether it is in the .plt section, used by non-PIC executables.  */
   if (svr4_in_dynsym_resolve_code (pc))
     return 1;
 
   /* Check if we are in the resolver.  */
-  sym = lookup_minimal_symbol_by_pc (pc);
+  bound_minimal_symbol sym = lookup_minimal_symbol_by_pc (pc);
   if (sym.minsym != NULL
       && (strcmp (sym.minsym->linkage_name (), "__glink") == 0
 	  || strcmp (sym.minsym->linkage_name (), "__glink_PLTresolve") == 0))
@@ -1670,10 +1668,9 @@ ppc_elfv2_elf_make_msymbol_special (asymbol *sym, struct minimal_symbol *msym)
 static CORE_ADDR
 ppc_elfv2_skip_entrypoint (struct gdbarch *gdbarch, CORE_ADDR pc)
 {
-  struct bound_minimal_symbol fun;
   int local_entry_offset = 0;
 
-  fun = lookup_minimal_symbol_by_pc (pc);
+  bound_minimal_symbol fun = lookup_minimal_symbol_by_pc (pc);
   if (fun.minsym == NULL)
     return pc;
 
diff --git a/gdb/ppc-netbsd-tdep.c b/gdb/ppc-netbsd-tdep.c
index d8e4c42..b412030 100644
--- a/gdb/ppc-netbsd-tdep.c
+++ b/gdb/ppc-netbsd-tdep.c
@@ -28,7 +28,6 @@
 
 #include "ppc-tdep.h"
 #include "netbsd-tdep.h"
-#include "ppc-tdep.h"
 #include "solib-svr4.h"
 
 /* Register offsets from <machine/reg.h>.  */
diff --git a/gdb/ppc-sysv-tdep.c b/gdb/ppc-sysv-tdep.c
index 47e6292..f317c94 100644
--- a/gdb/ppc-sysv-tdep.c
+++ b/gdb/ppc-sysv-tdep.c
@@ -1044,12 +1044,10 @@ static int
 convert_code_addr_to_desc_addr (CORE_ADDR code_addr, CORE_ADDR *desc_addr)
 {
   struct obj_section *dot_fn_section;
-  struct bound_minimal_symbol dot_fn;
-  struct bound_minimal_symbol fn;
 
   /* Find the minimal symbol that corresponds to CODE_ADDR (should
      have a name of the form ".FN").  */
-  dot_fn = lookup_minimal_symbol_by_pc (code_addr);
+  bound_minimal_symbol dot_fn = lookup_minimal_symbol_by_pc (code_addr);
   if (dot_fn.minsym == NULL || dot_fn.minsym->linkage_name ()[0] != '.')
     return 0;
   /* Get the section that contains CODE_ADDR.  Need this for the
@@ -1061,8 +1059,10 @@ convert_code_addr_to_desc_addr (CORE_ADDR code_addr, CORE_ADDR *desc_addr)
      address.  Only look for the minimal symbol in ".FN"'s object file
      - avoids problems when two object files (i.e., shared libraries)
      contain a minimal symbol with the same name.  */
-  fn = lookup_minimal_symbol (dot_fn.minsym->linkage_name () + 1, NULL,
-			      dot_fn_section->objfile);
+  bound_minimal_symbol fn
+    = lookup_minimal_symbol (current_program_space,
+			     dot_fn.minsym->linkage_name () + 1,
+			     dot_fn_section->objfile);
   if (fn.minsym == NULL)
     return 0;
   /* Found a descriptor.  */
diff --git a/gdb/printcmd.c b/gdb/printcmd.c
index e37e30e..f1aaa64 100644
--- a/gdb/printcmd.c
+++ b/gdb/printcmd.c
@@ -606,7 +606,6 @@ build_address_symbolic (struct gdbarch *gdbarch,
 			int *line,       /* OUT */
 			int *unmapped)   /* OUT */
 {
-  struct bound_minimal_symbol msymbol;
   struct symbol *symbol;
   CORE_ADDR name_location = 0;
   struct obj_section *section = NULL;
@@ -638,7 +637,8 @@ build_address_symbolic (struct gdbarch *gdbarch,
      save some memory, but for many debug format--ELF/DWARF or
      anything/stabs--it would be inconvenient to eliminate those minimal
      symbols anyway).  */
-  msymbol = lookup_minimal_symbol_by_pc_section (addr, section);
+  bound_minimal_symbol msymbol
+    = lookup_minimal_symbol_by_pc_section (addr, section);
   symbol = find_pc_sect_function (addr, section);
 
   if (symbol)
@@ -1575,7 +1575,6 @@ info_address_command (const char *exp, int from_tty)
   struct gdbarch *gdbarch;
   int regno;
   struct symbol *sym;
-  struct bound_minimal_symbol msymbol;
   long val;
   struct obj_section *section;
   CORE_ADDR load_addr, context_pc = 0;
@@ -1601,7 +1600,8 @@ info_address_command (const char *exp, int from_tty)
 	  return;
 	}
 
-      msymbol = lookup_bound_minimal_symbol (exp);
+      bound_minimal_symbol msymbol
+	= lookup_minimal_symbol (current_program_space, exp);
 
       if (msymbol.minsym != NULL)
 	{
@@ -1753,9 +1753,9 @@ info_address_command (const char *exp, int from_tty)
 
     case LOC_UNRESOLVED:
       {
-	struct bound_minimal_symbol msym;
-
-	msym = lookup_bound_minimal_symbol (sym->linkage_name ());
+	bound_minimal_symbol msym
+	  = lookup_minimal_symbol (current_program_space,
+				   sym->linkage_name ());
 	if (msym.minsym == NULL)
 	  gdb_printf ("unresolved");
 	else
diff --git a/gdb/proc-service.c b/gdb/proc-service.c
index 1889a00..ce2d69a 100644
--- a/gdb/proc-service.c
+++ b/gdb/proc-service.c
@@ -99,7 +99,8 @@ ps_pglobal_lookup (struct ps_prochandle *ph, const char *obj,
   set_current_program_space (inf->pspace);
 
   /* FIXME: kettenis/2000-09-03: What should we do with OBJ?  */
-  bound_minimal_symbol ms = lookup_minimal_symbol (name, NULL, NULL);
+  bound_minimal_symbol ms
+    = lookup_minimal_symbol (current_program_space, name);
   if (ms.minsym == NULL)
     return PS_NOSYM;
 
diff --git a/gdb/procfs.c b/gdb/procfs.c
index a9a26c6..c6abe3e 100644
--- a/gdb/procfs.c
+++ b/gdb/procfs.c
@@ -205,7 +205,7 @@ procfs_target::auxv_parse (const gdb_byte **readptr,
    concerning a /proc process.  There should be exactly one procinfo
    for each process, and since GDB currently can debug only one
    process at a time, that means there should be only one procinfo.
-   All of the LWP's of a process can be accessed indirectly thru the
+   All of the LWP's of a process can be accessed indirectly through the
    single process procinfo.
 
    However, against the day when GDB may debug more than one process,
diff --git a/gdb/progspace.h b/gdb/progspace.h
index 82c0a74..999e7a3 100644
--- a/gdb/progspace.h
+++ b/gdb/progspace.h
@@ -289,7 +289,7 @@ struct program_space
   struct objfile *objfile_for_address (CORE_ADDR address);
 
   /* Return the list of  all the solibs in this program space.  */
-  intrusive_list<solib> &solibs ()
+  owning_intrusive_list<solib> &solibs ()
   { return so_list; }
 
   /* Similar to `bfd_get_filename (exec_bfd ())` but in original form given
@@ -399,7 +399,7 @@ struct program_space
 
   /* List of shared objects mapped into this space.  Managed by
      solib.c.  */
-  intrusive_list<solib> so_list;
+  owning_intrusive_list<solib> so_list;
 
   /* Number of calls to solib_add.  */
   unsigned int solib_add_generation = 0;
diff --git a/gdb/psymtab.c b/gdb/psymtab.c
index 7d6648c..f8c83d9 100644
--- a/gdb/psymtab.c
+++ b/gdb/psymtab.c
@@ -87,7 +87,7 @@ static struct partial_symtab *
 find_pc_sect_psymtab_closer (struct objfile *objfile,
 			     CORE_ADDR pc, struct obj_section *section,
 			     struct partial_symtab *pst,
-			     struct bound_minimal_symbol msymbol)
+			     bound_minimal_symbol msymbol)
 {
   struct partial_symtab *tpst;
   struct partial_symtab *best_pst = pst;
@@ -161,7 +161,7 @@ struct partial_symtab *
 psymbol_functions::find_pc_sect_psymtab (struct objfile *objfile,
 					 CORE_ADDR pc,
 					 struct obj_section *section,
-					 struct bound_minimal_symbol msymbol)
+					 bound_minimal_symbol msymbol)
 {
   for (partial_symtab *pst : partial_symbols (objfile))
     if (pc >= pst->text_low (objfile) && pc < pst->text_high (objfile))
@@ -181,12 +181,11 @@ psymbol_functions::find_pc_sect_psymtab (struct objfile *objfile,
    the definition of quick_symbol_functions in symfile.h.  */
 
 struct compunit_symtab *
-psymbol_functions::find_pc_sect_compunit_symtab
-     (struct objfile *objfile,
-      struct bound_minimal_symbol msymbol,
-      CORE_ADDR pc,
-      struct obj_section *section,
-      int warn_if_readin)
+psymbol_functions::find_pc_sect_compunit_symtab (struct objfile *objfile,
+						 bound_minimal_symbol msymbol,
+						 CORE_ADDR pc,
+						 struct obj_section *section,
+						 int warn_if_readin)
 {
   struct partial_symtab *ps = find_pc_sect_psymtab (objfile,
 						    pc, section,
@@ -894,7 +893,9 @@ psymbol_functions::expand_symtabs_matching
    gdb::function_view<expand_symtabs_symbol_matcher_ftype> symbol_matcher,
    gdb::function_view<expand_symtabs_exp_notify_ftype> expansion_notify,
    block_search_flags search_flags,
-   domain_search_flags domain)
+   domain_search_flags domain,
+   gdb::function_view<expand_symtabs_lang_matcher_ftype>
+     lang_matcher ATTRIBUTE_UNUSED)
 {
   /* Clear the search flags.  */
   for (partial_symtab *ps : partial_symbols (objfile))
@@ -1083,7 +1084,7 @@ void
 partial_symtab::add_psymbol (std::string_view name, bool copy_name,
 			     domain_enum domain,
 			     enum address_class theclass,
-			     short section,
+			     int section,
 			     psymbol_placement where,
 			     unrelocated_addr coreaddr,
 			     enum language language,
@@ -1281,7 +1282,7 @@ maintenance_print_psymbols (const char *args, int from_tty)
 
 	  if (address_arg != NULL)
 	    {
-	      struct bound_minimal_symbol msymbol;
+	      bound_minimal_symbol msymbol;
 
 	      /* We don't assume each pc has a unique objfile (this is for
 		 debugging).  */
diff --git a/gdb/psymtab.h b/gdb/psymtab.h
index f41f241..b23aadb 100644
--- a/gdb/psymtab.h
+++ b/gdb/psymtab.h
@@ -349,7 +349,7 @@ struct partial_symtab
   void add_psymbol (std::string_view name,
 		    bool copy_name, domain_enum domain,
 		    enum address_class theclass,
-		    short section,
+		    int section,
 		    psymbol_placement where,
 		    unrelocated_addr coreaddr,
 		    enum language language,
@@ -633,11 +633,13 @@ struct psymbol_functions : public quick_symbol_functions
      gdb::function_view<expand_symtabs_symbol_matcher_ftype> symbol_matcher,
      gdb::function_view<expand_symtabs_exp_notify_ftype> expansion_notify,
      block_search_flags search_flags,
-     domain_search_flags kind) override;
+     domain_search_flags kind,
+     gdb::function_view<expand_symtabs_lang_matcher_ftype> lang_matcher)
+       override;
 
   struct compunit_symtab *find_pc_sect_compunit_symtab
-    (struct objfile *objfile, struct bound_minimal_symbol msymbol,
-     CORE_ADDR pc, struct obj_section *section, int warn_if_readin) override;
+    (struct objfile *objfile, bound_minimal_symbol msymbol, CORE_ADDR pc,
+     struct obj_section *section, int warn_if_readin) override;
 
   struct compunit_symtab *find_compunit_symtab_by_address
     (struct objfile *objfile, CORE_ADDR address) override
@@ -672,11 +674,10 @@ struct psymbol_functions : public quick_symbol_functions
      exactly matches PC, or, if we cannot find an exact match, the
      psymtab that contains a symbol whose address is closest to PC.  */
 
-  struct partial_symtab *find_pc_sect_psymtab
-       (struct objfile *objfile,
-	CORE_ADDR pc,
-	struct obj_section *section,
-	struct bound_minimal_symbol msymbol);
+  struct partial_symtab *find_pc_sect_psymtab (struct objfile *objfile,
+					       CORE_ADDR pc,
+					       struct obj_section *section,
+					       bound_minimal_symbol msymbol);
 
 private:
 
diff --git a/gdb/python/lib/gdb/dap/__init__.py b/gdb/python/lib/gdb/dap/__init__.py
index 51b9546..145aeb6 100644
--- a/gdb/python/lib/gdb/dap/__init__.py
+++ b/gdb/python/lib/gdb/dap/__init__.py
@@ -92,5 +92,8 @@ def pre_command_loop():
         # session.
         session_started = True
         startup.thread_log("starting DAP server")
+        # These are handy for bug reports.
+        startup.exec_and_log("show version")
+        startup.exec_and_log("show configuration")
         global server
         startup.start_dap(server.main_loop)
diff --git a/gdb/python/lib/gdb/dap/breakpoint.py b/gdb/python/lib/gdb/dap/breakpoint.py
index e60265b..15055f2 100644
--- a/gdb/python/lib/gdb/dap/breakpoint.py
+++ b/gdb/python/lib/gdb/dap/breakpoint.py
@@ -23,7 +23,14 @@ import gdb
 
 from .server import capability, request, send_event
 from .sources import make_source
-from .startup import DAPException, LogLevel, in_gdb_thread, log_stack, parse_and_eval
+from .startup import (
+    DAPException,
+    LogLevel,
+    exec_mi_and_log,
+    in_gdb_thread,
+    log_stack,
+    parse_and_eval,
+)
 from .typecheck import type_check
 
 # True when suppressing new breakpoint events.
@@ -97,11 +104,16 @@ breakpoint_map = {}
 @in_gdb_thread
 def _breakpoint_descriptor(bp):
     "Return the Breakpoint object descriptor given a gdb Breakpoint."
+    # If there are no objfiles (that is, before the launch request),
+    # we consider all breakpoints to be pending.  This is done to work
+    # around the gdb oddity that setting a breakpoint by address will
+    # always succeed.
+    pending = bp.pending or len(gdb.objfiles()) == 0
     result = {
         "id": bp.number,
-        "verified": not bp.pending,
+        "verified": not pending,
     }
-    if bp.pending:
+    if pending:
         result["reason"] = "pending"
     if bp.locations:
         # Just choose the first location, because DAP doesn't allow
@@ -196,9 +208,9 @@ def _set_breakpoints_callback(kind, specs, creator):
                     }
                 )
 
-    # Delete any breakpoints that were not reused.
-    for entry in saved_map.values():
-        entry.delete()
+        # Delete any breakpoints that were not reused.
+        for entry in saved_map.values():
+            entry.delete()
     return result
 
 
@@ -368,10 +380,13 @@ def _catch_exception(filterId, **args):
         cmd = "-catch-" + filterId
     else:
         raise DAPException("Invalid exception filterID: " + str(filterId))
-    result = gdb.execute_mi(cmd)
+    result = exec_mi_and_log(cmd)
+    # While the Ada catchpoints emit a "bkptno" field here, the C++
+    # ones do not.  So, instead we look at the "number" field.
+    num = result["bkpt"]["number"]
     # A little lame that there's no more direct way.
     for bp in gdb.breakpoints():
-        if bp.number == result["bkptno"]:
+        if bp.number == num:
             return bp
     # Not a DAPException because this is definitely unexpected.
     raise Exception("Could not find catchpoint after creating")
diff --git a/gdb/python/lib/gdb/dap/globalvars.py b/gdb/python/lib/gdb/dap/globalvars.py
index 149c9a8..38bdc5c 100644
--- a/gdb/python/lib/gdb/dap/globalvars.py
+++ b/gdb/python/lib/gdb/dap/globalvars.py
@@ -60,7 +60,8 @@ class _Globals(BaseReference):
 
     @in_gdb_thread
     def fetch_one_child(self, idx):
-        return self.var_list[idx].value()
+        sym = self.var_list[idx]
+        return (sym.name, sym.value())
 
 
 @in_gdb_thread
diff --git a/gdb/python/lib/gdb/dap/launch.py b/gdb/python/lib/gdb/dap/launch.py
index 2674e02..65444bf 100644
--- a/gdb/python/lib/gdb/dap/launch.py
+++ b/gdb/python/lib/gdb/dap/launch.py
@@ -13,6 +13,8 @@
 # You should have received a copy of the GNU General Public License
 # along with this program.  If not, see <http://www.gnu.org/licenses/>.
 
+import re
+
 # These are deprecated in 3.9, but required in older versions.
 from typing import Mapping, Optional, Sequence
 
@@ -20,7 +22,16 @@ import gdb
 
 from .events import exec_and_expect_stop, expect_process, expect_stop
 from .server import capability, request
-from .startup import DAPException, exec_and_log
+from .startup import DAPException, exec_and_log, in_gdb_thread
+
+
+# A wrapper for the 'file' command that correctly quotes its argument.
+@in_gdb_thread
+def file_command(program):
+    # Handle whitespace, quotes, and backslashes here.  Exactly what
+    # to quote depends on libiberty's buildargv and safe-ctype.
+    program = re.sub("[ \t\n\r\f\v\\\\'\"]", "\\\\\\g<0>", program)
+    exec_and_log("file " + program)
 
 
 # Any parameters here are necessarily extensions -- DAP requires this
@@ -34,12 +45,13 @@ def launch(
     args: Sequence[str] = (),
     env: Optional[Mapping[str, str]] = None,
     stopAtBeginningOfMainSubprogram: bool = False,
+    stopOnEntry: bool = False,
     **extra,
 ):
     if cwd is not None:
         exec_and_log("cd " + cwd)
     if program is not None:
-        exec_and_log("file " + program)
+        file_command(program)
     inf = gdb.selected_inferior()
     if stopAtBeginningOfMainSubprogram:
         main = inf.main_name
@@ -51,7 +63,7 @@ def launch(
         for name, value in env.items():
             inf.set_env(name, value)
     expect_process("process")
-    exec_and_expect_stop("run")
+    exec_and_expect_stop("starti" if stopOnEntry else "run")
 
 
 @request("attach")
@@ -63,7 +75,7 @@ def attach(
     **args,
 ):
     if program is not None:
-        exec_and_log("file " + program)
+        file_command(program)
     if pid is not None:
         cmd = "attach " + str(pid)
     elif target is not None:
diff --git a/gdb/python/lib/gdb/dap/locations.py b/gdb/python/lib/gdb/dap/locations.py
index 92e68f5..967322f 100644
--- a/gdb/python/lib/gdb/dap/locations.py
+++ b/gdb/python/lib/gdb/dap/locations.py
@@ -16,10 +16,9 @@
 # This is deprecated in 3.9, but required in older versions.
 from typing import Optional
 
-import gdb
-
 from .server import capability, request
 from .sources import decode_source
+from .startup import exec_mi_and_log
 
 
 # Note that the spec says that the arguments to this are optional.
@@ -36,7 +35,7 @@ def breakpoint_locations(*, source, line: int, endLine: Optional[int] = None, **
         endLine = line
     filename = decode_source(source)
     lines = set()
-    for entry in gdb.execute_mi("-symbol-list-lines", filename)["lines"]:
+    for entry in exec_mi_and_log("-symbol-list-lines", filename)["lines"]:
         this_line = entry["line"]
         if this_line >= line and this_line <= endLine:
             lines.add(this_line)
diff --git a/gdb/python/lib/gdb/dap/sources.py b/gdb/python/lib/gdb/dap/sources.py
index ad0c913..a9f4ea6 100644
--- a/gdb/python/lib/gdb/dap/sources.py
+++ b/gdb/python/lib/gdb/dap/sources.py
@@ -15,10 +15,8 @@
 
 import os
 
-import gdb
-
 from .server import capability, request
-from .startup import DAPException, in_gdb_thread
+from .startup import DAPException, exec_mi_and_log, in_gdb_thread
 
 # The next available source reference ID.  Must be greater than 0.
 _next_source = 1
@@ -83,7 +81,7 @@ def decode_source(source):
 @capability("supportsLoadedSourcesRequest")
 def loaded_sources(**extra):
     result = []
-    for elt in gdb.execute_mi("-file-list-exec-source-files")["files"]:
+    for elt in exec_mi_and_log("-file-list-exec-source-files")["files"]:
         result.append(make_source(elt["fullname"], elt["file"]))
     return {
         "sources": result,
diff --git a/gdb/python/lib/gdb/dap/startup.py b/gdb/python/lib/gdb/dap/startup.py
index 3952447..a3f048b 100644
--- a/gdb/python/lib/gdb/dap/startup.py
+++ b/gdb/python/lib/gdb/dap/startup.py
@@ -217,3 +217,10 @@ def exec_and_log(cmd, propagate_exception=False):
             raise DAPException(str(e)) from e
         else:
             log_stack()
+
+
+@in_gdb_thread
+def exec_mi_and_log(*args):
+    """Wrap gdb.execute_mi, logging the command."""
+    log("+++ " + str(args))
+    return gdb.execute_mi(*args)
diff --git a/gdb/python/lib/gdb/dap/varref.py b/gdb/python/lib/gdb/dap/varref.py
index 57e84a1..0dd9879 100644
--- a/gdb/python/lib/gdb/dap/varref.py
+++ b/gdb/python/lib/gdb/dap/varref.py
@@ -18,6 +18,7 @@ from collections import defaultdict
 from contextlib import contextmanager
 
 import gdb
+import gdb.printing
 
 from .server import client_bool_capability
 from .startup import DAPException, in_gdb_thread
diff --git a/gdb/python/lib/gdb/disassembler.py b/gdb/python/lib/gdb/disassembler.py
index 72d311b..7d0e781 100644
--- a/gdb/python/lib/gdb/disassembler.py
+++ b/gdb/python/lib/gdb/disassembler.py
@@ -147,7 +147,7 @@ class maint_info_py_disassemblers_cmd(gdb.Command):
         # Figure out the name of the current architecture.  There
         # should always be a current inferior, but if, somehow, there
         # isn't, then leave curr_arch as the empty string, which will
-        # not then match agaisnt any architecture in the dictionary.
+        # not then match against any architecture in the dictionary.
         curr_arch = ""
         if gdb.selected_inferior() is not None:
             curr_arch = gdb.selected_inferior().architecture().name()
diff --git a/gdb/python/lib/gdb/missing_debug.py b/gdb/python/lib/gdb/missing_debug.py
index 6d57462..7ccc4fe 100644
--- a/gdb/python/lib/gdb/missing_debug.py
+++ b/gdb/python/lib/gdb/missing_debug.py
@@ -31,9 +31,33 @@ if sys.version_info >= (3, 7):
         return ch.isalnum()
 
 else:
-    # Fall back to curses.ascii.isascii() and curses.ascii.isalnum() for
-    # earlier versions.
-    from curses.ascii import isalnum, isascii
+    # Older version of Python doesn't have str.isascii() and
+    # str.isalnum() so provide our own.
+    #
+    # We could import isalnum() and isascii() from the curses library,
+    # but that adds an extra dependency.  Given these functions are
+    # both small and trivial lets implement them here.
+    #
+    # These definitions are based on those in the curses library, but
+    # simplified as we know C will always be a single character 'str'.
+
+    def isdigit(c):
+        return 48 <= ord(c) <= 57
+
+    def islower(c):
+        return 97 <= ord(c) <= 122
+
+    def isupper(c):
+        return 65 <= ord(c) <= 90
+
+    def isalpha(c):
+        return isupper(c) or islower(c)
+
+    def isalnum(c):
+        return isalpha(c) or isdigit(c)
+
+    def isascii(c):
+        return 0 <= ord(c) <= 127
 
 
 def _validate_name(name):
diff --git a/gdb/python/lib/gdb/printer/bound_registers.py b/gdb/python/lib/gdb/printer/bound_registers.py
deleted file mode 100644
index d00b455..0000000
--- a/gdb/python/lib/gdb/printer/bound_registers.py
+++ /dev/null
@@ -1,39 +0,0 @@
-# Pretty-printers for bounds registers.
-# Copyright (C) 2013-2024 Free Software Foundation, Inc.
-
-# This program is free software; you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation; either version 3 of the License, or
-# (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program.  If not, see <http://www.gnu.org/licenses/>.
-
-import gdb
-import gdb.printing
-
-
-class MpxBound128Printer(gdb.ValuePrinter):
-    """Adds size field to a mpx __gdb_builtin_type_bound128 type."""
-
-    def __init__(self, val):
-        self.__val = val
-
-    def to_string(self):
-        upper = self.__val["ubound"]
-        lower = self.__val["lbound"]
-        size = upper - lower
-        if size > -1:
-            size = size + 1
-        result = "{lbound = %s, ubound = %s} : size %s" % (lower, upper, size)
-        return result
-
-
-gdb.printing.add_builtin_pretty_printer(
-    "mpx_bound128", "^builtin_type_bound128", MpxBound128Printer
-)
diff --git a/gdb/python/lib/gdb/ptwrite.py b/gdb/python/lib/gdb/ptwrite.py
new file mode 100644
index 0000000..3be65fe
--- /dev/null
+++ b/gdb/python/lib/gdb/ptwrite.py
@@ -0,0 +1,77 @@
+# Ptwrite utilities.
+# Copyright (C) 2023 Free Software Foundation, Inc.
+
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
+"""Utilities for working with ptwrite filters."""
+
+import gdb
+
+# _ptwrite_filter contains the per thread copies of the filter function.
+# The keys are tuples of inferior id and thread id.
+# The filter functions are created for each thread by calling the
+# _ptwrite_filter_factory.
+_ptwrite_filter = {}
+_ptwrite_filter_factory = None
+
+
+def _ptwrite_exit_handler(event):
+    """Exit handler to prune _ptwrite_filter on thread exit."""
+    _ptwrite_filter.pop(event.inferior_thread.ptid, None)
+
+
+gdb.events.thread_exited.connect(_ptwrite_exit_handler)
+
+
+def _clear_traces():
+    """Helper function to clear the trace of all threads."""
+    current_thread = gdb.selected_thread()
+
+    for inferior in gdb.inferiors():
+        for thread in inferior.threads():
+            thread.switch()
+            recording = gdb.current_recording()
+            if recording is not None:
+                recording.clear()
+
+    current_thread.switch()
+
+
+def register_filter_factory(filter_factory_):
+    """Register the ptwrite filter factory."""
+    if filter_factory_ is not None and not callable(filter_factory_):
+        raise TypeError("The filter factory must be callable or 'None'.")
+
+    # Clear the traces of all threads of all inferiors to force
+    # re-decoding with the new filter.
+    _clear_traces()
+
+    _ptwrite_filter.clear()
+    global _ptwrite_filter_factory
+    _ptwrite_filter_factory = filter_factory_
+
+
+def get_filter():
+    """Returns the filter of the current thread."""
+    thread = gdb.selected_thread()
+    key = thread.ptid
+
+    # Create a new filter for new threads.
+    if key not in _ptwrite_filter:
+        if _ptwrite_filter_factory is not None:
+            _ptwrite_filter[key] = _ptwrite_filter_factory(thread)
+        else:
+            return None
+
+    return _ptwrite_filter[key]
diff --git a/gdb/python/py-arch.c b/gdb/python/py-arch.c
index c6f5662..d73d7fc 100644
--- a/gdb/python/py-arch.c
+++ b/gdb/python/py-arch.c
@@ -199,8 +199,7 @@ archpy_disassemble (PyObject *self, PyObject *args, PyObject *kw)
 	}
       catch (const gdb_exception &except)
 	{
-	  gdbpy_convert_exception (except);
-	  return NULL;
+	  return gdbpy_handle_gdb_exception (nullptr, except);
 	}
 
       gdbpy_ref<> pc_obj = gdb_py_object_from_ulongest (pc);
@@ -362,11 +361,7 @@ static int CPYCHECKER_NEGATIVE_RESULT_SETS_EXCEPTION
 gdbpy_initialize_arch (void)
 {
   arch_object_type.tp_new = PyType_GenericNew;
-  if (PyType_Ready (&arch_object_type) < 0)
-    return -1;
-
-  return gdb_pymodule_addobject (gdb_module, "Architecture",
-				 (PyObject *) &arch_object_type);
+  return gdbpy_type_ready (&arch_object_type);
 }
 
 GDBPY_INITIALIZE_FILE (gdbpy_initialize_arch);
diff --git a/gdb/python/py-block.c b/gdb/python/py-block.c
index 62e93d5..aeb9acb 100644
--- a/gdb/python/py-block.c
+++ b/gdb/python/py-block.c
@@ -493,19 +493,14 @@ static int CPYCHECKER_NEGATIVE_RESULT_SETS_EXCEPTION
 gdbpy_initialize_blocks (void)
 {
   block_object_type.tp_new = PyType_GenericNew;
-  if (PyType_Ready (&block_object_type) < 0)
+  if (gdbpy_type_ready (&block_object_type) < 0)
     return -1;
 
   block_syms_iterator_object_type.tp_new = PyType_GenericNew;
-  if (PyType_Ready (&block_syms_iterator_object_type) < 0)
+  if (gdbpy_type_ready (&block_syms_iterator_object_type) < 0)
     return -1;
 
-  if (gdb_pymodule_addobject (gdb_module, "Block",
-			      (PyObject *) &block_object_type) < 0)
-    return -1;
-
-  return gdb_pymodule_addobject (gdb_module, "BlockIterator",
-				 (PyObject *) &block_syms_iterator_object_type);
+  return 0;
 }
 
 GDBPY_INITIALIZE_FILE (gdbpy_initialize_blocks);
diff --git a/gdb/python/py-breakpoint.c b/gdb/python/py-breakpoint.c
index e7dd470..1edd556 100644
--- a/gdb/python/py-breakpoint.c
+++ b/gdb/python/py-breakpoint.c
@@ -207,7 +207,7 @@ bppy_set_enabled (PyObject *self, PyObject *newvalue, void *closure)
     }
   catch (const gdb_exception &except)
     {
-      GDB_PY_SET_HANDLE_EXCEPTION (except);
+      return gdbpy_handle_gdb_exception (-1, except);
     }
 
   return 0;
@@ -394,7 +394,7 @@ bppy_set_task (PyObject *self, PyObject *newvalue, void *closure)
 	}
       catch (const gdb_exception &except)
 	{
-	  GDB_PY_SET_HANDLE_EXCEPTION (except);
+	  return gdbpy_handle_gdb_exception (-1, except);
 	}
 
       if (! valid_id)
@@ -443,7 +443,7 @@ bppy_delete_breakpoint (PyObject *self, PyObject *args)
     }
   catch (const gdb_exception &except)
     {
-      GDB_PY_HANDLE_EXCEPTION (except);
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
 
   Py_RETURN_NONE;
@@ -484,7 +484,7 @@ bppy_set_ignore_count (PyObject *self, PyObject *newvalue, void *closure)
     }
   catch (const gdb_exception &except)
     {
-      GDB_PY_SET_HANDLE_EXCEPTION (except);
+      return gdbpy_handle_gdb_exception (-1, except);
     }
 
   return 0;
@@ -611,9 +611,9 @@ bppy_set_condition (PyObject *self, PyObject *newvalue, void *closure)
     {
       set_breakpoint_condition (self_bp->bp, exp, 0, false);
     }
-  catch (gdb_exception &ex)
+  catch (const gdb_exception &ex)
     {
-      GDB_PY_SET_HANDLE_EXCEPTION (ex);
+      return gdbpy_handle_gdb_exception (-1, ex);
     }
 
   return 0;
@@ -640,8 +640,7 @@ bppy_get_commands (PyObject *self, void *closure)
     }
   catch (const gdb_exception &except)
     {
-      gdbpy_convert_exception (except);
-      return NULL;
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
 
   return host_string_to_python_string (stb.c_str ()).release ();
@@ -677,9 +676,9 @@ bppy_set_commands (PyObject *self, PyObject *newvalue, void *closure)
       counted_command_line lines = read_command_lines_1 (reader, 1, nullptr);
       breakpoint_set_commands (self_bp->bp, std::move (lines));
     }
-  catch (gdb_exception &ex)
+  catch (const gdb_exception &ex)
     {
-      GDB_PY_SET_HANDLE_EXCEPTION (ex);
+      return gdbpy_handle_gdb_exception (-1, ex);
     }
 
   return 0;
@@ -1055,8 +1054,7 @@ bppy_init (PyObject *self, PyObject *args, PyObject *kwargs)
   catch (const gdb_exception &except)
     {
       bppy_pending_object = NULL;
-      gdbpy_convert_exception (except);
-      return -1;
+      return gdbpy_handle_gdb_exception (-1, except);
     }
 
   BPPY_SET_REQUIRE_VALID ((gdbpy_breakpoint_object *) self);
@@ -1116,7 +1114,7 @@ gdbpy_breakpoint_init_breakpoint_type ()
   if (breakpoint_object_type.tp_new == nullptr)
     {
       breakpoint_object_type.tp_new = PyType_GenericNew;
-      if (PyType_Ready (&breakpoint_object_type) < 0)
+      if (gdbpy_type_ready (&breakpoint_object_type) < 0)
 	{
 	  /* Reset tp_new back to nullptr so future calls to this function
 	     will try calling PyType_Ready again.  */
@@ -1361,10 +1359,6 @@ gdbpy_initialize_breakpoints (void)
   if (!gdbpy_breakpoint_init_breakpoint_type ())
     return -1;
 
-  if (gdb_pymodule_addobject (gdb_module, "Breakpoint",
-			      (PyObject *) &breakpoint_object_type) < 0)
-    return -1;
-
   gdb::observers::breakpoint_created.attach (gdbpy_breakpoint_created,
 					     "py-breakpoint");
   gdb::observers::breakpoint_deleted.attach (gdbpy_breakpoint_deleted,
@@ -1396,14 +1390,7 @@ gdbpy_initialize_breakpoints (void)
 static int CPYCHECKER_NEGATIVE_RESULT_SETS_EXCEPTION
 gdbpy_initialize_breakpoint_locations ()
 {
-  if (PyType_Ready (&breakpoint_location_object_type) < 0)
-    return -1;
-
-  if (gdb_pymodule_addobject (gdb_module, "BreakpointLocation",
-			      (PyObject *) &breakpoint_location_object_type)
-      < 0)
-    return -1;
-  return 0;
+  return gdbpy_type_ready (&breakpoint_location_object_type);
 }
 
 
@@ -1597,7 +1584,7 @@ bplocpy_set_enabled (PyObject *py_self, PyObject *newvalue, void *closure)
     }
   catch (const gdb_exception &except)
     {
-      GDB_PY_SET_HANDLE_EXCEPTION (except);
+      return gdbpy_handle_gdb_exception (-1, except);
     }
   return 0;
 }
diff --git a/gdb/python/py-cmd.c b/gdb/python/py-cmd.c
index f83b45d..2bb9b82 100644
--- a/gdb/python/py-cmd.c
+++ b/gdb/python/py-cmd.c
@@ -39,7 +39,7 @@ struct cmdpy_completer
 static const struct cmdpy_completer completers[] =
 {
   { "COMPLETE_NONE", noop_completer },
-  { "COMPLETE_FILENAME", filename_completer },
+  { "COMPLETE_FILENAME", filename_maybe_quoted_completer },
   { "COMPLETE_LOCATION", location_completer },
   { "COMPLETE_COMMAND", command_completer },
   { "COMPLETE_SYMBOL", symbol_completer },
@@ -541,8 +541,7 @@ cmdpy_init (PyObject *self, PyObject *args, PyObject *kw)
     }
   catch (const gdb_exception &except)
     {
-      gdbpy_convert_exception (except);
-      return -1;
+      return gdbpy_handle_gdb_exception (-1, except);
     }
 
   return 0;
@@ -558,7 +557,7 @@ gdbpy_initialize_commands (void)
   int i;
 
   cmdpy_object_type.tp_new = PyType_GenericNew;
-  if (PyType_Ready (&cmdpy_object_type) < 0)
+  if (gdbpy_type_ready (&cmdpy_object_type) < 0)
     return -1;
 
   /* Note: alias and user are special.  */
@@ -588,10 +587,6 @@ gdbpy_initialize_commands (void)
 	return -1;
     }
 
-  if (gdb_pymodule_addobject (gdb_module, "Command",
-			      (PyObject *) &cmdpy_object_type) < 0)
-    return -1;
-
   invoke_cst = PyUnicode_FromString ("invoke");
   if (invoke_cst == NULL)
     return -1;
diff --git a/gdb/python/py-connection.c b/gdb/python/py-connection.c
index dcca76b..1fdcd73 100644
--- a/gdb/python/py-connection.c
+++ b/gdb/python/py-connection.c
@@ -287,18 +287,10 @@ connpy_get_connection_details (PyObject *self, void *closure)
 static int CPYCHECKER_NEGATIVE_RESULT_SETS_EXCEPTION
 gdbpy_initialize_connection (void)
 {
-  if (PyType_Ready (&connection_object_type) < 0)
+  if (gdbpy_type_ready (&connection_object_type) < 0)
     return -1;
 
-  if (gdb_pymodule_addobject (gdb_module, "TargetConnection",
-			      (PyObject *) &connection_object_type) < 0)
-    return -1;
-
-  if (PyType_Ready (&remote_connection_object_type) < 0)
-    return -1;
-
-  if (gdb_pymodule_addobject (gdb_module, "RemoteTargetConnection",
-			      (PyObject *) &remote_connection_object_type) < 0)
+  if (gdbpy_type_ready (&remote_connection_object_type) < 0)
     return -1;
 
   return 0;
@@ -431,8 +423,7 @@ connpy_send_packet (PyObject *self, PyObject *args, PyObject *kw)
     }
   catch (const gdb_exception &except)
     {
-      gdbpy_convert_exception (except);
-      return nullptr;
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
 }
 
diff --git a/gdb/python/py-disasm.c b/gdb/python/py-disasm.c
index 87fea26..7b64436 100644
--- a/gdb/python/py-disasm.c
+++ b/gdb/python/py-disasm.c
@@ -595,7 +595,7 @@ disasmpy_builtin_disassemble (PyObject *self, PyObject *args, PyObject *kw)
 	    }
 	  catch (const gdb_exception &except)
 	    {
-	      GDB_PY_HANDLE_EXCEPTION (except);
+	      return gdbpy_handle_gdb_exception (nullptr, except);
 	    }
 	  if (!str.empty ())
 	    PyErr_SetString (gdbpy_gdberror_exc, str.c_str ());
@@ -933,7 +933,7 @@ disasmpy_result_str (PyObject *self)
     }
   catch (const gdb_exception &except)
     {
-      GDB_PY_HANDLE_EXCEPTION (except);
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
 
   return PyUnicode_Decode (str.c_str (), str.size (),
@@ -1306,7 +1306,7 @@ gdbpy_print_insn (struct gdbarch *gdbarch, CORE_ADDR memaddr,
 	}
       else
 	{
-	  gdbpy_print_stack ();
+	  gdbpy_print_stack_or_quit ();
 	  return std::optional<int> (-1);
 	}
 
@@ -1512,7 +1512,7 @@ disasmpy_addr_part_str (PyObject *self)
     }
   catch (const gdb_exception &except)
     {
-      GDB_PY_HANDLE_EXCEPTION (except);
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
 
   return PyUnicode_Decode (str.c_str (), str.size (),
@@ -1665,45 +1665,23 @@ gdbpy_initialize_disasm ()
     }
 
   disasm_info_object_type.tp_new = PyType_GenericNew;
-  if (PyType_Ready (&disasm_info_object_type) < 0)
-    return -1;
-
-  if (gdb_pymodule_addobject (gdb_disassembler_module, "DisassembleInfo",
-			      (PyObject *) &disasm_info_object_type) < 0)
+  if (gdbpy_type_ready (&disasm_info_object_type, gdb_disassembler_module) < 0)
     return -1;
 
   disasm_result_object_type.tp_new = PyType_GenericNew;
-  if (PyType_Ready (&disasm_result_object_type) < 0)
-    return -1;
-
-  if (gdb_pymodule_addobject (gdb_disassembler_module, "DisassemblerResult",
-			      (PyObject *) &disasm_result_object_type) < 0)
+  if (gdbpy_type_ready (&disasm_result_object_type, gdb_disassembler_module) < 0)
     return -1;
 
   disasm_part_object_type.tp_new = PyType_GenericNew;
-  if (PyType_Ready (&disasm_part_object_type) < 0)
-    return -1;
-
-  if (gdb_pymodule_addobject (gdb_disassembler_module, "DisassemblerPart",
-			      (PyObject *) &disasm_part_object_type) < 0)
+  if (gdbpy_type_ready (&disasm_part_object_type, gdb_disassembler_module) < 0)
     return -1;
 
   disasm_addr_part_object_type.tp_new = PyType_GenericNew;
-  if (PyType_Ready (&disasm_addr_part_object_type) < 0)
-    return -1;
-
-  if (gdb_pymodule_addobject (gdb_disassembler_module,
-			      "DisassemblerAddressPart",
-			      (PyObject *) &disasm_addr_part_object_type) < 0)
+  if (gdbpy_type_ready (&disasm_addr_part_object_type, gdb_disassembler_module) < 0)
     return -1;
 
   disasm_text_part_object_type.tp_new = PyType_GenericNew;
-  if (PyType_Ready (&disasm_text_part_object_type) < 0)
-    return -1;
-
-  if (gdb_pymodule_addobject (gdb_disassembler_module,
-			      "DisassemblerTextPart",
-			      (PyObject *) &disasm_text_part_object_type) < 0)
+  if (gdbpy_type_ready (&disasm_text_part_object_type, gdb_disassembler_module) < 0)
     return -1;
 
   return 0;
diff --git a/gdb/python/py-event.c b/gdb/python/py-event.c
index 47a2997..a918136 100644
--- a/gdb/python/py-event.c
+++ b/gdb/python/py-event.c
@@ -56,25 +56,9 @@ evpy_add_attribute (PyObject *event, const char *name, PyObject *attr)
 static int CPYCHECKER_NEGATIVE_RESULT_SETS_EXCEPTION
 gdbpy_initialize_event (void)
 {
-  return gdbpy_initialize_event_generic (&event_object_type,
-					 "Event");
+  return gdbpy_type_ready (&event_object_type);
 }
 
-/* Initialize the given event type.  If BASE is not NULL it will
-  be set as the types base.
-  Returns 0 if initialization was successful -1 otherwise.  */
-
-int
-gdbpy_initialize_event_generic (PyTypeObject *type,
-				const char *name)
-{
-  if (PyType_Ready (type) < 0)
-    return -1;
-
-  return gdb_pymodule_addobject (gdb_module, name, (PyObject *) type);
-}
-
-
 /* Notify the list of listens that the given EVENT has occurred.
    returns 0 if emit is successful -1 otherwise.  */
 
diff --git a/gdb/python/py-event.h b/gdb/python/py-event.h
index 388c513..a723824 100644
--- a/gdb/python/py-event.h
+++ b/gdb/python/py-event.h
@@ -84,7 +84,5 @@ extern void evpy_dealloc (PyObject *self);
 extern int evpy_add_attribute (PyObject *event,
 			       const char *name, PyObject *attr)
   CPYCHECKER_NEGATIVE_RESULT_SETS_EXCEPTION;
-int gdbpy_initialize_event_generic (PyTypeObject *type, const char *name)
-  CPYCHECKER_NEGATIVE_RESULT_SETS_EXCEPTION;
 
 #endif /* PYTHON_PY_EVENT_H */
diff --git a/gdb/python/py-evtregistry.c b/gdb/python/py-evtregistry.c
index 1f486e2..7ae3997 100644
--- a/gdb/python/py-evtregistry.c
+++ b/gdb/python/py-evtregistry.c
@@ -104,11 +104,7 @@ evregpy_dealloc (PyObject *self)
 static int CPYCHECKER_NEGATIVE_RESULT_SETS_EXCEPTION
 gdbpy_initialize_eventregistry (void)
 {
-  if (PyType_Ready (&eventregistry_object_type) < 0)
-    return -1;
-
-  return gdb_pymodule_addobject (gdb_module, "EventRegistry",
-				 (PyObject *) &eventregistry_object_type);
+  return gdbpy_type_ready (&eventregistry_object_type);
 }
 
 /* Return the number of listeners currently connected to this
diff --git a/gdb/python/py-finishbreakpoint.c b/gdb/python/py-finishbreakpoint.c
index 78030be..bc53d4e 100644
--- a/gdb/python/py-finishbreakpoint.c
+++ b/gdb/python/py-finishbreakpoint.c
@@ -217,8 +217,7 @@ bpfinishpy_init (PyObject *self, PyObject *args, PyObject *kwargs)
     }
   catch (const gdb_exception &except)
     {
-      gdbpy_convert_exception (except);
-      return -1;
+      return gdbpy_handle_gdb_exception (-1, except);
     }
 
   if (PyErr_Occurred ())
@@ -318,7 +317,7 @@ bpfinishpy_init (PyObject *self, PyObject *args, PyObject *kwargs)
     }
   catch (const gdb_exception &except)
     {
-      GDB_PY_SET_HANDLE_EXCEPTION (except);
+      return gdbpy_handle_gdb_exception (-1, except);
     }
 
   self_bpfinish->py_bp.bp->frame_id = frame_id;
@@ -440,11 +439,7 @@ gdbpy_initialize_finishbreakpoints (void)
   if (!gdbpy_breakpoint_init_breakpoint_type ())
     return -1;
 
-  if (PyType_Ready (&finish_breakpoint_object_type) < 0)
-    return -1;
-
-  if (gdb_pymodule_addobject (gdb_module, "FinishBreakpoint",
-			      (PyObject *) &finish_breakpoint_object_type) < 0)
+  if (gdbpy_type_ready (&finish_breakpoint_object_type) < 0)
     return -1;
 
   gdb::observers::normal_stop.attach (bpfinishpy_handle_stop,
diff --git a/gdb/python/py-frame.c b/gdb/python/py-frame.c
index bbb42af..88646ee 100644
--- a/gdb/python/py-frame.c
+++ b/gdb/python/py-frame.c
@@ -115,7 +115,7 @@ frapy_is_valid (PyObject *self, PyObject *args)
     }
   catch (const gdb_exception &except)
     {
-      GDB_PY_HANDLE_EXCEPTION (except);
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
 
   if (frame == NULL)
@@ -143,7 +143,7 @@ frapy_name (PyObject *self, PyObject *args)
     }
   catch (const gdb_exception &except)
     {
-      GDB_PY_HANDLE_EXCEPTION (except);
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
 
   if (name)
@@ -177,7 +177,7 @@ frapy_type (PyObject *self, PyObject *args)
     }
   catch (const gdb_exception &except)
     {
-      GDB_PY_HANDLE_EXCEPTION (except);
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
 
   return gdb_py_object_from_longest (type).release ();
@@ -198,7 +198,7 @@ frapy_arch (PyObject *self, PyObject *args)
     }
   catch (const gdb_exception &except)
     {
-      GDB_PY_HANDLE_EXCEPTION (except);
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
 
   return gdbarch_to_arch_object (obj->gdbarch);
@@ -219,7 +219,7 @@ frapy_unwind_stop_reason (PyObject *self, PyObject *args)
     }
   catch (const gdb_exception &except)
     {
-      GDB_PY_HANDLE_EXCEPTION (except);
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
 
   stop_reason = get_frame_unwind_stop_reason (frame);
@@ -244,7 +244,7 @@ frapy_pc (PyObject *self, PyObject *args)
     }
   catch (const gdb_exception &except)
     {
-      GDB_PY_HANDLE_EXCEPTION (except);
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
 
   return gdb_py_object_from_ulongest (pc).release ();
@@ -286,7 +286,7 @@ frapy_read_register (PyObject *self, PyObject *args, PyObject *kw)
     }
   catch (const gdb_exception &except)
     {
-      GDB_PY_HANDLE_EXCEPTION (except);
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
 
   return result;
@@ -308,7 +308,7 @@ frapy_block (PyObject *self, PyObject *args)
     }
   catch (const gdb_exception &except)
     {
-      GDB_PY_HANDLE_EXCEPTION (except);
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
 
   for (fn_block = block;
@@ -347,7 +347,7 @@ frapy_function (PyObject *self, PyObject *args)
     }
   catch (const gdb_exception &except)
     {
-      GDB_PY_HANDLE_EXCEPTION (except);
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
 
   if (sym)
@@ -389,8 +389,7 @@ frame_info_to_frame_object (const frame_info_ptr &frame)
     }
   catch (const gdb_exception &except)
     {
-      gdbpy_convert_exception (except);
-      return NULL;
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
 
   return (PyObject *) frame_obj.release ();
@@ -414,7 +413,7 @@ frapy_older (PyObject *self, PyObject *args)
     }
   catch (const gdb_exception &except)
     {
-      GDB_PY_HANDLE_EXCEPTION (except);
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
 
   if (prev)
@@ -446,7 +445,7 @@ frapy_newer (PyObject *self, PyObject *args)
     }
   catch (const gdb_exception &except)
     {
-      GDB_PY_HANDLE_EXCEPTION (except);
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
 
   if (next)
@@ -478,7 +477,7 @@ frapy_find_sal (PyObject *self, PyObject *args)
     }
   catch (const gdb_exception &except)
     {
-      GDB_PY_HANDLE_EXCEPTION (except);
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
 
   return sal_obj;
@@ -538,8 +537,7 @@ frapy_read_var (PyObject *self, PyObject *args, PyObject *kw)
 	}
       catch (const gdb_exception &except)
 	{
-	  gdbpy_convert_exception (except);
-	  return NULL;
+	  return gdbpy_handle_gdb_exception (nullptr, except);
 	}
 
       if (!var)
@@ -569,7 +567,7 @@ frapy_read_var (PyObject *self, PyObject *args, PyObject *kw)
     }
   catch (const gdb_exception &except)
     {
-      GDB_PY_HANDLE_EXCEPTION (except);
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
 
   return result;
@@ -590,7 +588,7 @@ frapy_select (PyObject *self, PyObject *args)
     }
   catch (const gdb_exception &except)
     {
-      GDB_PY_HANDLE_EXCEPTION (except);
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
 
   Py_RETURN_NONE;
@@ -611,7 +609,7 @@ frapy_level (PyObject *self, PyObject *args)
     }
   catch (const gdb_exception &except)
     {
-      GDB_PY_HANDLE_EXCEPTION (except);
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
 
   Py_RETURN_NONE;
@@ -634,7 +632,7 @@ frapy_language (PyObject *self, PyObject *args)
     }
   catch (const gdb_exception &except)
     {
-      GDB_PY_HANDLE_EXCEPTION (except);
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
 
   Py_RETURN_NONE;
@@ -655,7 +653,7 @@ frapy_static_link (PyObject *self, PyObject *args)
     }
   catch (const gdb_exception &except)
     {
-      GDB_PY_HANDLE_EXCEPTION (except);
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
 
   if (link == nullptr)
@@ -678,7 +676,7 @@ gdbpy_newest_frame (PyObject *self, PyObject *args)
     }
   catch (const gdb_exception &except)
     {
-      GDB_PY_HANDLE_EXCEPTION (except);
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
 
   return frame_info_to_frame_object (frame);
@@ -698,7 +696,7 @@ gdbpy_selected_frame (PyObject *self, PyObject *args)
     }
   catch (const gdb_exception &except)
     {
-      GDB_PY_HANDLE_EXCEPTION (except);
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
 
   return frame_info_to_frame_object (frame);
@@ -763,7 +761,7 @@ static int CPYCHECKER_NEGATIVE_RESULT_SETS_EXCEPTION
 gdbpy_initialize_frames (void)
 {
   frame_object_type.tp_new = PyType_GenericNew;
-  if (PyType_Ready (&frame_object_type) < 0)
+  if (gdbpy_type_ready (&frame_object_type) < 0)
     return -1;
 
   /* Note: These would probably be best exposed as class attributes of
@@ -787,8 +785,7 @@ gdbpy_initialize_frames (void)
 #include "unwind_stop_reasons.def"
 #undef SET
 
-  return gdb_pymodule_addobject (gdb_module, "Frame",
-				 (PyObject *) &frame_object_type);
+  return 0;
 }
 
 GDBPY_INITIALIZE_FILE (gdbpy_initialize_frames);
diff --git a/gdb/python/py-framefilter.c b/gdb/python/py-framefilter.c
index 89695ff..daec6dd 100644
--- a/gdb/python/py-framefilter.c
+++ b/gdb/python/py-framefilter.c
@@ -923,12 +923,12 @@ py_print_frame (PyObject *filter, frame_filter_flags flags,
 	  else if (PyLong_Check (py_func.get ()))
 	    {
 	      CORE_ADDR addr;
-	      struct bound_minimal_symbol msymbol;
 
 	      if (get_addr_from_python (py_func.get (), &addr) < 0)
 		return EXT_LANG_BT_ERROR;
 
-	      msymbol = lookup_minimal_symbol_by_pc (addr);
+	      bound_minimal_symbol msymbol
+		= lookup_minimal_symbol_by_pc (addr);
 	      if (msymbol.minsym != NULL)
 		function = msymbol.minsym->print_name ();
 	    }
@@ -1007,7 +1007,7 @@ py_print_frame (PyObject *filter, frame_filter_flags flags,
 
 	      out->text (":");
 	      annotate_frame_source_line ();
-	      out->field_signed ("line", line);
+	      out->field_signed ("line", line, line_number_style.style ());
 	    }
 	}
       if (out->is_mi_like_p ())
diff --git a/gdb/python/py-function.c b/gdb/python/py-function.c
index 2bbfb9d..58ae0d0 100644
--- a/gdb/python/py-function.c
+++ b/gdb/python/py-function.c
@@ -137,11 +137,7 @@ static int CPYCHECKER_NEGATIVE_RESULT_SETS_EXCEPTION
 gdbpy_initialize_functions (void)
 {
   fnpy_object_type.tp_new = PyType_GenericNew;
-  if (PyType_Ready (&fnpy_object_type) < 0)
-    return -1;
-
-  return gdb_pymodule_addobject (gdb_module, "Function",
-				 (PyObject *) &fnpy_object_type);
+  return gdbpy_type_ready (&fnpy_object_type);
 }
 
 GDBPY_INITIALIZE_FILE (gdbpy_initialize_functions);
diff --git a/gdb/python/py-gdb-readline.c b/gdb/python/py-gdb-readline.c
index 92287ee..dd0ee45 100644
--- a/gdb/python/py-gdb-readline.c
+++ b/gdb/python/py-gdb-readline.c
@@ -59,8 +59,7 @@ gdbpy_readline_wrapper (FILE *sys_stdin, FILE *sys_stdout,
       /* This readline callback is called without the GIL held.  */
       gdbpy_gil gil;
 
-      gdbpy_convert_exception (except);
-      return NULL;
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
 
   /* Detect EOF (Ctrl-D).  */
diff --git a/gdb/python/py-inferior.c b/gdb/python/py-inferior.c
index a1042ee..60bf56d 100644
--- a/gdb/python/py-inferior.c
+++ b/gdb/python/py-inferior.c
@@ -412,7 +412,7 @@ infpy_threads (PyObject *self, PyObject *args)
     }
   catch (const gdb_exception &except)
     {
-      GDB_PY_HANDLE_EXCEPTION (except);
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
 
   tuple = PyTuple_New (inf_obj->threads->size ());
@@ -578,7 +578,7 @@ infpy_read_memory (PyObject *self, PyObject *args, PyObject *kw)
     }
   catch (const gdb_exception &except)
     {
-      GDB_PY_HANDLE_EXCEPTION (except);
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
 
 
@@ -631,9 +631,9 @@ infpy_write_memory (PyObject *self, PyObject *args, PyObject *kw)
 
       write_memory_with_notification (addr, buffer, length);
     }
-  catch (gdb_exception &ex)
+  catch (const gdb_exception &ex)
     {
-      GDB_PY_HANDLE_EXCEPTION (ex);
+      return gdbpy_handle_gdb_exception (nullptr, ex);
     }
 
   Py_RETURN_NONE;
@@ -705,9 +705,9 @@ infpy_search_memory (PyObject *self, PyObject *args, PyObject *kw)
 				    buffer, pattern_size,
 				    &found_addr);
     }
-  catch (gdb_exception &ex)
+  catch (const gdb_exception &ex)
     {
-      GDB_PY_HANDLE_EXCEPTION (ex);
+      return gdbpy_handle_gdb_exception (nullptr, ex);
     }
 
   if (found)
@@ -783,7 +783,7 @@ infpy_thread_from_thread_handle (PyObject *self, PyObject *args, PyObject *kw)
     }
   catch (const gdb_exception &except)
     {
-      GDB_PY_HANDLE_EXCEPTION (except);
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
 
   Py_RETURN_NONE;
@@ -1009,11 +1009,7 @@ gdbpy_selected_inferior (PyObject *self, PyObject *args)
 static int CPYCHECKER_NEGATIVE_RESULT_SETS_EXCEPTION
 gdbpy_initialize_inferior (void)
 {
-  if (PyType_Ready (&inferior_object_type) < 0)
-    return -1;
-
-  if (gdb_pymodule_addobject (gdb_module, "Inferior",
-			      (PyObject *) &inferior_object_type) < 0)
+  if (gdbpy_type_ready (&inferior_object_type) < 0)
     return -1;
 
   gdb::observers::new_thread.attach (add_thread_object, "py-inferior");
diff --git a/gdb/python/py-infthread.c b/gdb/python/py-infthread.c
index a17f25e..4340666 100644
--- a/gdb/python/py-infthread.c
+++ b/gdb/python/py-infthread.c
@@ -104,7 +104,7 @@ thpy_get_details (PyObject *self, void *ignore)
     }
   catch (const gdb_exception &except)
     {
-      GDB_PY_HANDLE_EXCEPTION (except);
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
   if (extra_info == nullptr)
     Py_RETURN_NONE;
@@ -212,7 +212,7 @@ thpy_get_ptid_string (PyObject *self, void *closure)
     }
   catch (const gdb_exception &except)
     {
-      GDB_PY_HANDLE_EXCEPTION (except);
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
 }
 
@@ -245,7 +245,7 @@ thpy_switch (PyObject *self, PyObject *args)
     }
   catch (const gdb_exception &except)
     {
-      GDB_PY_HANDLE_EXCEPTION (except);
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
 
   Py_RETURN_NONE;
@@ -330,7 +330,7 @@ thpy_thread_handle (PyObject *self, PyObject *args)
     }
   catch (const gdb_exception &except)
     {
-      GDB_PY_HANDLE_EXCEPTION (except);
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
 
   if (hv.size () == 0)
@@ -412,11 +412,7 @@ gdbpy_selected_thread (PyObject *self, PyObject *args)
 static int CPYCHECKER_NEGATIVE_RESULT_SETS_EXCEPTION
 gdbpy_initialize_thread (void)
 {
-  if (PyType_Ready (&thread_object_type) < 0)
-    return -1;
-
-  return gdb_pymodule_addobject (gdb_module, "InferiorThread",
-				 (PyObject *) &thread_object_type);
+  return gdbpy_type_ready (&thread_object_type);
 }
 
 GDBPY_INITIALIZE_FILE (gdbpy_initialize_thread);
diff --git a/gdb/python/py-instruction.c b/gdb/python/py-instruction.c
index bc3945a..7d77572 100644
--- a/gdb/python/py-instruction.c
+++ b/gdb/python/py-instruction.c
@@ -66,7 +66,7 @@ py_insn_get_insn_type ()
       py_insn_type.tp_doc = "GDB instruction object";
       py_insn_type.tp_getset = py_insn_getset;
 
-      if (PyType_Ready (&py_insn_type) < 0)
+      if (gdbpy_type_ready (&py_insn_type) < 0)
 	{
 	  /* Reset the tp_new field so any subsequent calls to this
 	     function will retry to make the type ready.  */
diff --git a/gdb/python/py-lazy-string.c b/gdb/python/py-lazy-string.c
index 8779716..4898a1f 100644
--- a/gdb/python/py-lazy-string.c
+++ b/gdb/python/py-lazy-string.c
@@ -148,7 +148,7 @@ stpy_convert_to_value (PyObject *self, PyObject *args)
     }
   catch (const gdb_exception &except)
     {
-      GDB_PY_HANDLE_EXCEPTION (except);
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
 
   return result;
@@ -236,11 +236,7 @@ gdbpy_create_lazy_string_object (CORE_ADDR address, long length,
 static int CPYCHECKER_NEGATIVE_RESULT_SETS_EXCEPTION
 gdbpy_initialize_lazy_string (void)
 {
-  if (PyType_Ready (&lazy_string_object_type) < 0)
-    return -1;
-
-  Py_INCREF (&lazy_string_object_type);
-  return 0;
+  return gdbpy_type_ready (&lazy_string_object_type);
 }
 
 /* Determine whether the printer object pointed to by OBJ is a
@@ -315,7 +311,7 @@ stpy_str (PyObject *self)
     }
   catch (const gdb_exception &exc)
     {
-      GDB_PY_HANDLE_EXCEPTION (exc);
+      return gdbpy_handle_gdb_exception (nullptr, exc);
     }
 
   return host_string_to_python_string (stream.c_str ()).release ();
diff --git a/gdb/python/py-linetable.c b/gdb/python/py-linetable.c
index e3e71f9..fc57f36 100644
--- a/gdb/python/py-linetable.c
+++ b/gdb/python/py-linetable.c
@@ -169,7 +169,7 @@ ltpy_get_pcs_for_line (PyObject *self, PyObject *args)
     }
   catch (const gdb_exception &except)
     {
-      GDB_PY_HANDLE_EXCEPTION (except);
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
 
   return build_line_table_tuple_from_pcs (py_line, pcs);
@@ -287,27 +287,11 @@ ltpy_dealloc (PyObject *self)
 static int CPYCHECKER_NEGATIVE_RESULT_SETS_EXCEPTION
 gdbpy_initialize_linetable (void)
 {
-  if (PyType_Ready (&linetable_object_type) < 0)
+  if (gdbpy_type_ready (&linetable_object_type) < 0)
     return -1;
-  if (PyType_Ready (&linetable_entry_object_type) < 0)
+  if (gdbpy_type_ready (&linetable_entry_object_type) < 0)
     return -1;
-  if (PyType_Ready (&ltpy_iterator_object_type) < 0)
-    return -1;
-
-  Py_INCREF (&linetable_object_type);
-  Py_INCREF (&linetable_entry_object_type);
-  Py_INCREF (&ltpy_iterator_object_type);
-
-  if (gdb_pymodule_addobject (gdb_module, "LineTable",
-			      (PyObject *) &linetable_object_type) < 0)
-    return -1;
-
-  if (gdb_pymodule_addobject (gdb_module, "LineTableEntry",
-			      (PyObject *) &linetable_entry_object_type) < 0)
-    return -1;
-
-  if (gdb_pymodule_addobject (gdb_module, "LineTableIterator",
-			      (PyObject *) &ltpy_iterator_object_type) < 0)
+  if (gdbpy_type_ready (&ltpy_iterator_object_type) < 0)
     return -1;
 
   return 0;
diff --git a/gdb/python/py-membuf.c b/gdb/python/py-membuf.c
index af48d01..25ebc99 100644
--- a/gdb/python/py-membuf.c
+++ b/gdb/python/py-membuf.c
@@ -102,11 +102,7 @@ static int CPYCHECKER_NEGATIVE_RESULT_SETS_EXCEPTION
 gdbpy_initialize_membuf (void)
 {
   membuf_object_type.tp_new = PyType_GenericNew;
-  if (PyType_Ready (&membuf_object_type) < 0)
-    return -1;
-
-  return gdb_pymodule_addobject (gdb_module, "Membuf",
-				 (PyObject *) &membuf_object_type);
+  return gdbpy_type_ready (&membuf_object_type);
 }
 
 GDBPY_INITIALIZE_FILE (gdbpy_initialize_membuf);
diff --git a/gdb/python/py-mi.c b/gdb/python/py-mi.c
index bc95e86..f0e28d9 100644
--- a/gdb/python/py-mi.c
+++ b/gdb/python/py-mi.c
@@ -86,7 +86,8 @@ py_ui_out::do_end (ui_out_type type)
 
 void
 py_ui_out::do_field_signed (int fldno, int width, ui_align align,
-			    const char *fldname, LONGEST value)
+			    const char *fldname, LONGEST value,
+			    const ui_file_style &style)
 {
   if (m_error.has_value ())
     return;
@@ -168,8 +169,7 @@ gdbpy_execute_mi_command (PyObject *self, PyObject *args, PyObject *kw)
     }
   catch (const gdb_exception &except)
     {
-      gdbpy_convert_exception (except);
-      return nullptr;
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
 
   return uiout.result ().release ();
diff --git a/gdb/python/py-micmd.c b/gdb/python/py-micmd.c
index 54427d4..f4abf2b 100644
--- a/gdb/python/py-micmd.c
+++ b/gdb/python/py-micmd.c
@@ -447,12 +447,7 @@ static int CPYCHECKER_NEGATIVE_RESULT_SETS_EXCEPTION
 gdbpy_initialize_micommands ()
 {
   micmdpy_object_type.tp_new = PyType_GenericNew;
-  if (PyType_Ready (&micmdpy_object_type) < 0)
-    return -1;
-
-  if (gdb_pymodule_addobject (gdb_module, "MICommand",
-			      (PyObject *) &micmdpy_object_type)
-      < 0)
+  if (gdbpy_type_ready (&micmdpy_object_type) < 0)
     return -1;
 
   invoke_cst = PyUnicode_FromString ("invoke");
diff --git a/gdb/python/py-objfile.c b/gdb/python/py-objfile.c
index 6e8d5b5..6ce58a1 100644
--- a/gdb/python/py-objfile.c
+++ b/gdb/python/py-objfile.c
@@ -162,7 +162,7 @@ objfpy_get_build_id (PyObject *self, void *closure)
     }
   catch (const gdb_exception &except)
     {
-      GDB_PY_HANDLE_EXCEPTION (except);
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
 
   if (build_id != NULL)
@@ -453,7 +453,7 @@ objfpy_add_separate_debug_file (PyObject *self, PyObject *args, PyObject *kw)
     }
   catch (const gdb_exception &except)
     {
-      GDB_PY_HANDLE_EXCEPTION (except);
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
 
   Py_RETURN_NONE;
@@ -488,7 +488,7 @@ objfpy_lookup_global_symbol (PyObject *self, PyObject *args, PyObject *kw)
     }
   catch (const gdb_exception &except)
     {
-      GDB_PY_HANDLE_EXCEPTION (except);
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
 
   Py_RETURN_NONE;
@@ -523,7 +523,7 @@ objfpy_lookup_static_symbol (PyObject *self, PyObject *args, PyObject *kw)
     }
   catch (const gdb_exception &except)
     {
-      GDB_PY_HANDLE_EXCEPTION (except);
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
 
   Py_RETURN_NONE;
@@ -709,11 +709,7 @@ objfile_to_objfile_object (struct objfile *objfile)
 static int CPYCHECKER_NEGATIVE_RESULT_SETS_EXCEPTION
 gdbpy_initialize_objfile (void)
 {
-  if (PyType_Ready (&objfile_object_type) < 0)
-    return -1;
-
-  return gdb_pymodule_addobject (gdb_module, "Objfile",
-				 (PyObject *) &objfile_object_type);
+  return gdbpy_type_ready (&objfile_object_type);
 }
 
 GDBPY_INITIALIZE_FILE (gdbpy_initialize_objfile);
diff --git a/gdb/python/py-param.c b/gdb/python/py-param.c
index 621f85d..9741782 100644
--- a/gdb/python/py-param.c
+++ b/gdb/python/py-param.c
@@ -885,8 +885,7 @@ parmpy_init (PyObject *self, PyObject *args, PyObject *kwds)
   catch (const gdb_exception &except)
     {
       Py_DECREF (self);
-      gdbpy_convert_exception (except);
-      return -1;
+      return gdbpy_handle_gdb_exception (-1, except);
     }
 
   return 0;
@@ -910,7 +909,7 @@ gdbpy_initialize_parameters (void)
   int i;
 
   parmpy_object_type.tp_new = PyType_GenericNew;
-  if (PyType_Ready (&parmpy_object_type) < 0)
+  if (gdbpy_type_ready (&parmpy_object_type) < 0)
     return -1;
 
   set_doc_cst = PyUnicode_FromString ("set_doc");
@@ -928,8 +927,7 @@ gdbpy_initialize_parameters (void)
 	return -1;
     }
 
-  return gdb_pymodule_addobject (gdb_module, "Parameter",
-				 (PyObject *) &parmpy_object_type);
+  return 0;
 }
 
 GDBPY_INITIALIZE_FILE (gdbpy_initialize_parameters);
diff --git a/gdb/python/py-prettyprint.c b/gdb/python/py-prettyprint.c
index 368b3a3..e061ea1 100644
--- a/gdb/python/py-prettyprint.c
+++ b/gdb/python/py-prettyprint.c
@@ -836,10 +836,7 @@ PyTypeObject printer_object_type =
 static int
 gdbpy_initialize_prettyprint ()
 {
-  if (PyType_Ready (&printer_object_type) < 0)
-    return -1;
-  return gdb_pymodule_addobject (gdb_module, "ValuePrinter",
-				 (PyObject *) &printer_object_type);
+  return gdbpy_type_ready (&printer_object_type);
 }
 
 GDBPY_INITIALIZE_FILE (gdbpy_initialize_prettyprint);
diff --git a/gdb/python/py-progspace.c b/gdb/python/py-progspace.c
index 5bc0015..aa1e713 100644
--- a/gdb/python/py-progspace.c
+++ b/gdb/python/py-progspace.c
@@ -522,7 +522,7 @@ pspy_block_for_pc (PyObject *o, PyObject *args)
     }
   catch (const gdb_exception &except)
     {
-      GDB_PY_HANDLE_EXCEPTION (except);
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
 
   if (cust == NULL || cust->objfile () == NULL)
@@ -564,7 +564,7 @@ pspy_find_pc_line (PyObject *o, PyObject *args)
     }
   catch (const gdb_exception &except)
     {
-      GDB_PY_HANDLE_EXCEPTION (except);
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
 
   return result;
@@ -747,11 +747,10 @@ gdbpy_initialize_pspace (void)
   gdb::observers::free_program_space.attach (gdbpy_free_program_space_event,
 					     "py-progspace");
 
-  if (PyType_Ready (&pspace_object_type) < 0)
+  if (gdbpy_type_ready (&pspace_object_type) < 0)
     return -1;
 
-  return gdb_pymodule_addobject (gdb_module, "Progspace",
-				 (PyObject *) &pspace_object_type);
+  return 0;
 }
 
 GDBPY_INITIALIZE_FILE (gdbpy_initialize_pspace);
diff --git a/gdb/python/py-record-btrace.c b/gdb/python/py-record-btrace.c
index 36454fc..bdfebf1 100644
--- a/gdb/python/py-record-btrace.c
+++ b/gdb/python/py-record-btrace.c
@@ -44,7 +44,8 @@ struct btpy_list_object {
   /* Stride size.  */
   Py_ssize_t step;
 
-  /* Either &BTPY_CALL_TYPE or &RECPY_INSN_TYPE.  */
+  /* Either &recpy_func_type, &recpy_insn_type, &recpy_aux_type or
+     &recpy_gap_type.  */
   PyTypeObject* element_type;
 };
 
@@ -140,15 +141,21 @@ btrace_func_from_recpy_func (const PyObject * const pyobject)
 }
 
 /* Looks at the recorded item with the number NUMBER and create a
-   gdb.RecordInstruction or gdb.RecordGap object for it accordingly.  */
+   gdb.RecordInstruction, gdb.RecordGap or gdb.RecordAuxiliary object
+   for it accordingly.  */
 
 static PyObject *
-btpy_insn_or_gap_new (thread_info *tinfo, Py_ssize_t number)
+btpy_item_new (thread_info *tinfo, Py_ssize_t number)
 {
   btrace_insn_iterator iter;
   int err_code;
 
-  btrace_find_insn_by_number (&iter, &tinfo->btrace, number);
+  if (btrace_find_insn_by_number (&iter, &tinfo->btrace, number) == 0)
+    {
+      PyErr_Format (gdbpy_gdb_error, _("No such instruction."));
+      return nullptr;
+    }
+
   err_code = btrace_insn_get_error (&iter);
 
   if (err_code != 0)
@@ -162,6 +169,12 @@ btpy_insn_or_gap_new (thread_info *tinfo, Py_ssize_t number)
       return recpy_gap_new (err_code, err_string, number);
     }
 
+  const struct btrace_insn *insn = btrace_insn_get (&iter);
+  gdb_assert (insn != nullptr);
+
+  if (insn->iclass == BTRACE_INSN_AUX)
+    return recpy_aux_new (tinfo, RECORD_METHOD_BTRACE, number);
+
   return recpy_insn_new (tinfo, RECORD_METHOD_BTRACE, number);
 }
 
@@ -204,7 +217,7 @@ recpy_bt_insn_sal (PyObject *self, void *closure)
     }
   catch (const gdb_exception &except)
     {
-      GDB_PY_HANDLE_EXCEPTION (except);
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
 
   return result;
@@ -275,7 +288,7 @@ recpy_bt_insn_data (PyObject *self, void *closure)
     }
   catch (const gdb_exception &except)
     {
-      GDB_PY_HANDLE_EXCEPTION (except);
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
 
   object = PyBytes_FromStringAndSize ((const char *) buffer.data (),
@@ -305,8 +318,7 @@ recpy_bt_insn_decoded (PyObject *self, void *closure)
     }
   catch (const gdb_exception &except)
     {
-      gdbpy_convert_exception (except);
-      return NULL;
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
 
   return PyBytes_FromString (strfile.string ().c_str ());
@@ -423,6 +435,48 @@ recpy_bt_func_next (PyObject *self, void *closure)
 			 RECORD_METHOD_BTRACE, func->next);
 }
 
+/* Implementation of Auxiliary.data [str] for btrace.  */
+
+PyObject *
+recpy_bt_aux_data (PyObject *self, void *closure)
+{
+  const btrace_insn *insn;
+  const recpy_element_object *obj;
+  thread_info *tinfo;
+  btrace_insn_iterator iter;
+
+  if (Py_TYPE (self) != &recpy_aux_type)
+    {
+      PyErr_Format (gdbpy_gdb_error, _("Must be a gdb.Auxiliary."));
+      return nullptr;
+    }
+
+  obj = (const recpy_element_object *) self;
+  tinfo = obj->thread;
+
+  if (tinfo == nullptr || btrace_is_empty (tinfo))
+    {
+      PyErr_Format (gdbpy_gdb_error, _("No such auxiliary object."));
+      return nullptr;
+    }
+
+  if (btrace_find_insn_by_number (&iter, &tinfo->btrace, obj->number) == 0)
+    {
+      PyErr_Format (gdbpy_gdb_error, _("No such auxiliary object."));
+      return nullptr;
+    }
+
+  insn = btrace_insn_get (&iter);
+  if (insn == nullptr || insn->iclass != BTRACE_INSN_AUX)
+    {
+      PyErr_Format (gdbpy_gdb_error, _("Not a valid auxiliary object."));
+      return nullptr;
+    }
+
+  return PyUnicode_FromString
+    (iter.btinfo->aux_data.at (insn->aux_data_index).c_str ());
+}
+
 /* Implementation of BtraceList.__len__ (self) -> int.  */
 
 static Py_ssize_t
@@ -439,8 +493,9 @@ btpy_list_length (PyObject *self)
 }
 
 /* Implementation of
-   BtraceList.__getitem__ (self, key) -> BtraceInstruction and
-   BtraceList.__getitem__ (self, key) -> BtraceFunctionCall.  */
+   BtraceList.__getitem__ (self, key) -> BtraceInstruction,
+   BtraceList.__getitem__ (self, key) -> BtraceFunctionCall,
+   BtraceList.__getitem__ (self, key) -> BtraceAuxiliary.  */
 
 static PyObject *
 btpy_list_item (PyObject *self, Py_ssize_t index)
@@ -454,10 +509,13 @@ btpy_list_item (PyObject *self, Py_ssize_t index)
 
   number = obj->first + (obj->step * index);
 
-  if (obj->element_type == &recpy_insn_type)
-    return recpy_insn_new (obj->thread, RECORD_METHOD_BTRACE, number);
-  else
+  if (obj->element_type == &recpy_func_type)
     return recpy_func_new (obj->thread, RECORD_METHOD_BTRACE, number);
+  else if (obj->element_type == &recpy_insn_type
+	   || obj->element_type == &recpy_aux_type)
+    return btpy_item_new (obj->thread, number);
+  else
+    return PyErr_Format (gdbpy_gdb_error, _("Not a valid BtraceList object."));
 }
 
 /* Implementation of BtraceList.__getitem__ (self, slice) -> BtraceList.  */
@@ -644,8 +702,7 @@ recpy_bt_replay_position (PyObject *self, void *closure)
   if (tinfo->btrace.replay == NULL)
     Py_RETURN_NONE;
 
-  return btpy_insn_or_gap_new (tinfo,
-			       btrace_insn_number (tinfo->btrace.replay));
+  return btpy_item_new (tinfo, btrace_insn_number (tinfo->btrace.replay));
 }
 
 /* Implementation of
@@ -667,7 +724,7 @@ recpy_bt_begin (PyObject *self, void *closure)
     Py_RETURN_NONE;
 
   btrace_insn_begin (&iterator, &tinfo->btrace);
-  return btpy_insn_or_gap_new (tinfo, btrace_insn_number (&iterator));
+  return btpy_item_new (tinfo, btrace_insn_number (&iterator));
 }
 
 /* Implementation of
@@ -689,7 +746,7 @@ recpy_bt_end (PyObject *self, void *closure)
     Py_RETURN_NONE;
 
   btrace_insn_end (&iterator, &tinfo->btrace);
-  return btpy_insn_or_gap_new (tinfo, btrace_insn_number (&iterator));
+  return btpy_item_new (tinfo, btrace_insn_number (&iterator));
 }
 
 /* Implementation of
@@ -750,6 +807,109 @@ recpy_bt_function_call_history (PyObject *self, void *closure)
   return btpy_list_new (tinfo, first, last, 1, &recpy_func_type);
 }
 
+/* Helper function that calls PTW_FILTER with PAYLOAD and IP as arguments.
+   Returns the string that will be printed, if there is a filter to call.  */
+static std::optional<std::string>
+recpy_call_filter (const uint64_t payload, std::optional<uint64_t> ip,
+		   const void *ptw_filter)
+{
+  std::optional<std::string> result;
+
+  gdb_assert (ptw_filter != nullptr);
+  if ((PyObject *) ptw_filter == Py_None)
+    return result;
+
+  gdbpy_enter enter_py;
+
+  gdbpy_ref<> py_payload = gdb_py_object_from_ulongest (payload);
+
+  gdbpy_ref<> py_ip;
+  if (!ip.has_value ())
+    py_ip = gdbpy_ref<>::new_reference (Py_None);
+  else
+    py_ip = gdb_py_object_from_ulongest (*ip);
+
+  gdbpy_ref<> py_result (PyObject_CallFunctionObjArgs ((PyObject *) ptw_filter,
+							py_payload.get (),
+							py_ip.get (),
+							nullptr));
+
+  if (py_result == nullptr)
+    {
+      gdbpy_print_stack ();
+      gdbpy_error (_("Couldn't call the ptwrite filter."));
+    }
+
+  /* Py_None is valid and results in no output.  */
+  if (py_result == Py_None)
+    {
+      result = "";
+      return result;
+    }
+
+  gdb::unique_xmalloc_ptr<char> user_string
+    = gdbpy_obj_to_string (py_result.get ());
+
+  if (user_string == nullptr)
+    {
+      gdbpy_print_stack ();
+      gdbpy_error (_("The ptwrite filter didn't return a string."));
+    }
+  else
+    result = user_string.get ();
+
+  return result;
+}
+
+/* Helper function returning the current ptwrite filter.  */
+
+static PyObject *
+get_ptwrite_filter ()
+{
+  gdbpy_ref<> module (PyImport_ImportModule ("gdb.ptwrite"));
+
+  if (PyErr_Occurred ())
+  {
+    gdbpy_print_stack ();
+    gdbpy_error (_("Couldn't import gdb.ptwrite."));
+  }
+
+  /* We need to keep the reference count.  */
+  gdbpy_ref<> ptw_filter (gdbpy_call_method (module.get (), "get_filter"));
+
+  if (PyErr_Occurred ())
+    {
+      gdbpy_print_stack ();
+      gdbpy_error (_("Couldn't get the ptwrite filter."));
+    }
+
+  return ptw_filter.get();
+}
+
+/* Used for registering any python ptwrite filter to the current thread.  A
+   pointer to this function is stored in the python extension interface.  */
+
+void
+gdbpy_load_ptwrite_filter (const struct extension_language_defn *extlang,
+			   struct btrace_thread_info *btinfo)
+{
+  gdb_assert (btinfo != nullptr);
+
+  gdbpy_enter enter_py;
+
+  btinfo->ptw_context = get_ptwrite_filter ();
+
+#if defined (HAVE_STRUCT_PT_EVENT_VARIANT_PTWRITE)
+  if (!btinfo->target->conf.pt.ptwrite && btinfo->ptw_context != Py_None)
+    warning (_("The target doesn't support decoding ptwrite events."));
+#else
+  if (btinfo->ptw_context != Py_None)
+    warning (_("Libipt doesn't support decoding ptwrite events."));
+#endif /* defined (HAVE_STRUCT_PT_EVENT_VARIANT_PTWRITE) */
+
+  btinfo->ptw_callback_fun = &recpy_call_filter;
+}
+
 /* Implementation of BtraceRecord.goto (self, BtraceInstruction) -> None.  */
 
 PyObject *
@@ -783,12 +943,25 @@ recpy_bt_goto (PyObject *self, PyObject *args)
     }
   catch (const gdb_exception &except)
     {
-      GDB_PY_HANDLE_EXCEPTION (except);
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
 
   Py_RETURN_NONE;
 }
 
+/* Implementation of BtraceRecord.clear (self) -> None.  */
+
+PyObject *
+recpy_bt_clear (PyObject *self, PyObject *args)
+{
+  const recpy_record_object * const record = (recpy_record_object *) self;
+  thread_info *const tinfo = record->thread;
+
+  btrace_clear (tinfo);
+
+  Py_RETURN_NONE;
+}
+
 /* BtraceList methods.  */
 
 static PyMethodDef btpy_list_methods[] =
@@ -833,7 +1006,7 @@ gdbpy_initialize_btrace (void)
 
   btpy_list_mapping_methods.mp_subscript = btpy_list_slice;
 
-  return PyType_Ready (&btpy_list_type);
+  return gdbpy_type_ready (&btpy_list_type);
 }
 
 GDBPY_INITIALIZE_FILE (gdbpy_initialize_btrace);
diff --git a/gdb/python/py-record-btrace.h b/gdb/python/py-record-btrace.h
index 8678e77..3be5860 100644
--- a/gdb/python/py-record-btrace.h
+++ b/gdb/python/py-record-btrace.h
@@ -31,6 +31,9 @@ extern PyObject *recpy_bt_format (PyObject *self, void *closure);
 /* Implementation of record.goto (instruction) -> None.  */
 extern PyObject *recpy_bt_goto (PyObject *self, PyObject *value);
 
+/* Implementation of BtraceRecord.clear (self) -> None.  */
+extern PyObject *recpy_bt_clear (PyObject *self, PyObject *args);
+
 /* Implementation of record.instruction_history [list].  */
 extern PyObject *recpy_bt_instruction_history (PyObject *self, void *closure);
 
@@ -88,4 +91,7 @@ extern PyObject *recpy_bt_func_prev (PyObject *self, void *closure);
 /* Implementation of RecordFunctionSegment.next [RecordFunctionSegment].  */
 extern PyObject *recpy_bt_func_next (PyObject *self, void *closure);
 
+/* Implementation of RecordAuxiliary.decoded [str].  */
+extern PyObject *recpy_bt_aux_data (PyObject *self, void *closure);
+
 #endif /* PYTHON_PY_RECORD_BTRACE_H */
diff --git a/gdb/python/py-record.c b/gdb/python/py-record.c
index d489126..2995dc1 100644
--- a/gdb/python/py-record.c
+++ b/gdb/python/py-record.c
@@ -48,6 +48,12 @@ static PyTypeObject recpy_gap_type = {
   PyVarObject_HEAD_INIT (NULL, 0)
 };
 
+/* Python RecordAuxiliary type.  */
+
+PyTypeObject recpy_aux_type = {
+  PyVarObject_HEAD_INIT (nullptr, 0)
+};
+
 /* Python RecordGap object.  */
 struct recpy_gap_object
 {
@@ -108,6 +114,19 @@ recpy_goto (PyObject *self, PyObject *value)
   return PyErr_Format (PyExc_NotImplementedError, _("Not implemented."));
 }
 
+/* Implementation of record.clear () -> None.  */
+
+static PyObject *
+recpy_clear (PyObject *self, PyObject *value)
+{
+  const recpy_record_object * const obj = (recpy_record_object *) self;
+
+  if (obj->method == RECORD_METHOD_BTRACE)
+    return recpy_bt_clear (self, value);
+
+  return PyErr_Format (PyExc_NotImplementedError, _("Not implemented."));
+}
+
 /* Implementation of record.replay_position [instruction]  */
 
 static PyObject *
@@ -389,8 +408,8 @@ recpy_element_hash (PyObject *self)
   return obj->number;
 }
 
-/* Implementation of operator == and != of RecordInstruction and
-   RecordFunctionSegment.  */
+/* Implementation of operator == and != of RecordInstruction,
+   RecordFunctionSegment and RecordAuxiliary.  */
 
 static PyObject *
 recpy_element_richcompare (PyObject *self, PyObject *other, int op)
@@ -478,12 +497,47 @@ recpy_gap_reason_string (PyObject *self, void *closure)
   return PyUnicode_FromString (obj->reason_string);
 }
 
+/* Create a new gdb.Auxiliary object.  */
+
+PyObject *
+recpy_aux_new (thread_info *thread, enum record_method method,
+	       Py_ssize_t number)
+{
+  recpy_element_object * const obj = PyObject_New (recpy_element_object,
+						   &recpy_aux_type);
+
+  if (obj == NULL)
+   return NULL;
+
+  obj->thread = thread;
+  obj->method = method;
+  obj->number = number;
+
+  return (PyObject *) obj;
+}
+
+/* Implementation of Auxiliary.data [buffer].  */
+
+static PyObject *
+recpy_aux_data (PyObject *self, void *closure)
+{
+  const recpy_element_object * const obj = (recpy_element_object *) self;
+
+  if (obj->method == RECORD_METHOD_BTRACE)
+    return recpy_bt_aux_data (self, closure);
+
+  return PyErr_Format (PyExc_NotImplementedError, _("Not implemented."));
+}
+
 /* Record method list.  */
 
 static PyMethodDef recpy_record_methods[] = {
   { "goto", recpy_goto, METH_VARARGS,
     "goto (instruction|function_call) -> None.\n\
 Rewind to given location."},
+  { "clear", recpy_clear, METH_VARARGS,
+    "clear () -> None.\n\
+Clears the trace."},
   { NULL }
 };
 
@@ -543,6 +597,14 @@ static gdb_PyGetSetDef recpy_gap_getset[] = {
   { NULL }
 };
 
+/* RecordAuxiliary member list.  */
+
+static gdb_PyGetSetDef recpy_aux_getset[] = {
+  { "number", recpy_element_number, nullptr, "element number", nullptr},
+  { "data", recpy_aux_data, nullptr, "data", nullptr},
+  { nullptr }
+};
+
 /* Sets up the record API in the gdb module.  */
 
 static int CPYCHECKER_NEGATIVE_RESULT_SETS_EXCEPTION
@@ -582,10 +644,20 @@ gdbpy_initialize_record (void)
   recpy_gap_type.tp_doc = "GDB recorded gap object";
   recpy_gap_type.tp_getset = recpy_gap_getset;
 
-  if (PyType_Ready (&recpy_record_type) < 0
-      || PyType_Ready (&recpy_insn_type) < 0
-      || PyType_Ready (&recpy_func_type) < 0
-      || PyType_Ready (&recpy_gap_type) < 0)
+  recpy_aux_type.tp_new = PyType_GenericNew;
+  recpy_aux_type.tp_flags = Py_TPFLAGS_DEFAULT;
+  recpy_aux_type.tp_basicsize = sizeof (recpy_element_object);
+  recpy_aux_type.tp_name = "gdb.RecordAuxiliary";
+  recpy_aux_type.tp_doc = "GDB recorded auxiliary object";
+  recpy_aux_type.tp_getset = recpy_aux_getset;
+  recpy_aux_type.tp_richcompare = recpy_element_richcompare;
+  recpy_aux_type.tp_hash = recpy_element_hash;
+
+  if (gdbpy_type_ready (&recpy_record_type) < 0
+      || gdbpy_type_ready (&recpy_insn_type) < 0
+      || gdbpy_type_ready (&recpy_func_type) < 0
+      || gdbpy_type_ready (&recpy_gap_type) < 0
+      || gdbpy_type_ready (&recpy_aux_type) < 0)
     return -1;
   else
     return 0;
@@ -598,7 +670,6 @@ gdbpy_start_recording (PyObject *self, PyObject *args)
 {
   const char *method = NULL;
   const char *format = NULL;
-  PyObject *ret = NULL;
 
   if (!PyArg_ParseTuple (args, "|ss", &method, &format))
     return NULL;
@@ -606,14 +677,12 @@ gdbpy_start_recording (PyObject *self, PyObject *args)
   try
     {
       record_start (method, format, 0);
-      ret = gdbpy_current_recording (self, args);
+      return gdbpy_current_recording (self, args);
     }
   catch (const gdb_exception &except)
     {
-      gdbpy_convert_exception (except);
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
-
-  return ret;
 }
 
 /* Implementation of gdb.current_recording (self) -> gdb.Record.  */
@@ -644,7 +713,7 @@ gdbpy_stop_recording (PyObject *self, PyObject *args)
     }
   catch (const gdb_exception &except)
     {
-      GDB_PY_HANDLE_EXCEPTION (except);
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
 
   Py_RETURN_NONE;
diff --git a/gdb/python/py-record.h b/gdb/python/py-record.h
index 7e11610..0988584 100644
--- a/gdb/python/py-record.h
+++ b/gdb/python/py-record.h
@@ -59,6 +59,9 @@ extern PyTypeObject recpy_insn_type;
 /* Python RecordFunctionSegment type.  */
 extern PyTypeObject recpy_func_type;
 
+/* Python RecordAuxiliary type.  */
+extern PyTypeObject recpy_aux_type;
+
 /* Create a new gdb.RecordInstruction object.  */
 extern PyObject *recpy_insn_new (thread_info *thread, enum record_method method,
 				 Py_ssize_t number);
@@ -71,4 +74,8 @@ extern PyObject *recpy_func_new (thread_info *thread, enum record_method method,
 extern PyObject *recpy_gap_new (int reason_code, const char *reason_string,
 				Py_ssize_t number);
 
+/* Create a new gdb.RecordGap object.  */
+extern PyObject *recpy_aux_new (thread_info *thread, enum record_method method,
+				Py_ssize_t number);
+
 #endif /* PYTHON_PY_RECORD_H */
diff --git a/gdb/python/py-registers.c b/gdb/python/py-registers.c
index f03274c..229dd62 100644
--- a/gdb/python/py-registers.c
+++ b/gdb/python/py-registers.c
@@ -430,35 +430,22 @@ static int CPYCHECKER_NEGATIVE_RESULT_SETS_EXCEPTION
 gdbpy_initialize_registers ()
 {
   register_descriptor_object_type.tp_new = PyType_GenericNew;
-  if (PyType_Ready (&register_descriptor_object_type) < 0)
-    return -1;
-  if (gdb_pymodule_addobject
-      (gdb_module, "RegisterDescriptor",
-       (PyObject *) &register_descriptor_object_type) < 0)
+  if (gdbpy_type_ready (&register_descriptor_object_type) < 0)
     return -1;
 
   reggroup_iterator_object_type.tp_new = PyType_GenericNew;
-  if (PyType_Ready (&reggroup_iterator_object_type) < 0)
-    return -1;
-  if (gdb_pymodule_addobject
-      (gdb_module, "RegisterGroupsIterator",
-       (PyObject *) &reggroup_iterator_object_type) < 0)
+  if (gdbpy_type_ready (&reggroup_iterator_object_type) < 0)
     return -1;
 
   reggroup_object_type.tp_new = PyType_GenericNew;
-  if (PyType_Ready (&reggroup_object_type) < 0)
-    return -1;
-  if (gdb_pymodule_addobject
-      (gdb_module, "RegisterGroup",
-       (PyObject *) &reggroup_object_type) < 0)
+  if (gdbpy_type_ready (&reggroup_object_type) < 0)
     return -1;
 
   register_descriptor_iterator_object_type.tp_new = PyType_GenericNew;
-  if (PyType_Ready (&register_descriptor_iterator_object_type) < 0)
+  if (gdbpy_type_ready (&register_descriptor_iterator_object_type) < 0)
     return -1;
-  return (gdb_pymodule_addobject
-	  (gdb_module, "RegisterDescriptorIterator",
-	   (PyObject *) &register_descriptor_iterator_object_type));
+
+  return 0;
 }
 
 GDBPY_INITIALIZE_FILE (gdbpy_initialize_registers);
diff --git a/gdb/python/py-stopevent.c b/gdb/python/py-stopevent.c
index be26bc1..485bbb1 100644
--- a/gdb/python/py-stopevent.c
+++ b/gdb/python/py-stopevent.c
@@ -74,8 +74,7 @@ py_print_bpstat (bpstat *bs, enum gdb_signal stop_signal)
     }
   catch (const gdb_exception &except)
     {
-      gdbpy_convert_exception (except);
-      return nullptr;
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
 
   gdbpy_ref<> dict = uiout.result ();
diff --git a/gdb/python/py-symbol.c b/gdb/python/py-symbol.c
index 754420f..24b53bb 100644
--- a/gdb/python/py-symbol.c
+++ b/gdb/python/py-symbol.c
@@ -222,7 +222,7 @@ sympy_needs_frame (PyObject *self, void *closure)
     }
   catch (const gdb_exception &except)
     {
-      GDB_PY_HANDLE_EXCEPTION (except);
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
 
   if (result)
@@ -307,7 +307,7 @@ sympy_value (PyObject *self, PyObject *args)
     }
   catch (const gdb_exception &except)
     {
-      GDB_PY_HANDLE_EXCEPTION (except);
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
 
   return result;
@@ -425,7 +425,7 @@ gdbpy_lookup_symbol (PyObject *self, PyObject *args, PyObject *kw)
 	}
       catch (const gdb_exception &except)
 	{
-	  GDB_PY_HANDLE_EXCEPTION (except);
+	  return gdbpy_handle_gdb_exception (nullptr, except);
 	}
     }
 
@@ -436,7 +436,7 @@ gdbpy_lookup_symbol (PyObject *self, PyObject *args, PyObject *kw)
     }
   catch (const gdb_exception &except)
     {
-      GDB_PY_HANDLE_EXCEPTION (except);
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
 
   gdbpy_ref<> ret_tuple (PyTuple_New (2));
@@ -485,7 +485,7 @@ gdbpy_lookup_global_symbol (PyObject *self, PyObject *args, PyObject *kw)
     }
   catch (const gdb_exception &except)
     {
-      GDB_PY_HANDLE_EXCEPTION (except);
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
 
   if (symbol)
@@ -553,7 +553,7 @@ gdbpy_lookup_static_symbol (PyObject *self, PyObject *args, PyObject *kw)
     }
   catch (const gdb_exception &except)
     {
-      GDB_PY_HANDLE_EXCEPTION (except);
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
 
   if (symbol)
@@ -631,7 +631,7 @@ gdbpy_lookup_static_symbols (PyObject *self, PyObject *args, PyObject *kw)
     }
   catch (const gdb_exception &except)
     {
-      GDB_PY_HANDLE_EXCEPTION (except);
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
 
   return return_list.release ();
@@ -640,7 +640,7 @@ gdbpy_lookup_static_symbols (PyObject *self, PyObject *args, PyObject *kw)
 static int CPYCHECKER_NEGATIVE_RESULT_SETS_EXCEPTION
 gdbpy_initialize_symbols (void)
 {
-  if (PyType_Ready (&symbol_object_type) < 0)
+  if (gdbpy_type_ready (&symbol_object_type) < 0)
     return -1;
 
   if (PyModule_AddIntConstant (gdb_module, "SYMBOL_LOC_UNDEF", LOC_UNDEF) < 0
@@ -685,8 +685,7 @@ gdbpy_initialize_symbols (void)
 #include "sym-domains.def"
 #undef SYM_DOMAIN
 
-  return gdb_pymodule_addobject (gdb_module, "Symbol",
-				 (PyObject *) &symbol_object_type);
+  return 0;
 }
 
 GDBPY_INITIALIZE_FILE (gdbpy_initialize_symbols);
diff --git a/gdb/python/py-symtab.c b/gdb/python/py-symtab.c
index 7290b85..99a5094 100644
--- a/gdb/python/py-symtab.c
+++ b/gdb/python/py-symtab.c
@@ -512,19 +512,14 @@ static int CPYCHECKER_NEGATIVE_RESULT_SETS_EXCEPTION
 gdbpy_initialize_symtabs (void)
 {
   symtab_object_type.tp_new = PyType_GenericNew;
-  if (PyType_Ready (&symtab_object_type) < 0)
+  if (gdbpy_type_ready (&symtab_object_type) < 0)
     return -1;
 
   sal_object_type.tp_new = PyType_GenericNew;
-  if (PyType_Ready (&sal_object_type) < 0)
+  if (gdbpy_type_ready (&sal_object_type) < 0)
     return -1;
 
-  if (gdb_pymodule_addobject (gdb_module, "Symtab",
-			      (PyObject *) &symtab_object_type) < 0)
-    return -1;
-
-  return gdb_pymodule_addobject (gdb_module, "Symtab_and_line",
-				 (PyObject *) &sal_object_type);
+  return 0;
 }
 
 GDBPY_INITIALIZE_FILE (gdbpy_initialize_symtabs);
diff --git a/gdb/python/py-tui.c b/gdb/python/py-tui.c
index 984fa9b..afa6f36 100644
--- a/gdb/python/py-tui.c
+++ b/gdb/python/py-tui.c
@@ -95,7 +95,7 @@ public:
       {
 	wnoutrefresh (handle.get ());
 	touchwin (m_inner_window.get ());
-	tui_wrefresh (m_inner_window.get ());
+	wnoutrefresh (m_inner_window.get ());
       }
     else
       tui_win_info::refresh_window ();
@@ -180,6 +180,8 @@ tui_py_window::~tui_py_window ()
 void
 tui_py_window::rerender ()
 {
+  tui_batch_rendering batch;
+
   tui_win_info::rerender ();
 
   gdbpy_enter enter_py;
@@ -206,6 +208,8 @@ tui_py_window::rerender ()
 void
 tui_py_window::do_scroll_horizontal (int num_to_scroll)
 {
+  tui_batch_rendering batch;
+
   gdbpy_enter enter_py;
 
   if (PyObject_HasAttrString (m_window.get (), "hscroll"))
@@ -220,6 +224,8 @@ tui_py_window::do_scroll_horizontal (int num_to_scroll)
 void
 tui_py_window::do_scroll_vertical (int num_to_scroll)
 {
+  tui_batch_rendering batch;
+
   gdbpy_enter enter_py;
 
   if (PyObject_HasAttrString (m_window.get (), "vscroll"))
@@ -242,6 +248,8 @@ tui_py_window::resize (int height_, int width_, int origin_x_, int origin_y_)
 void
 tui_py_window::click (int mouse_x, int mouse_y, int mouse_button)
 {
+  tui_batch_rendering batch;
+
   gdbpy_enter enter_py;
 
   if (PyObject_HasAttrString (m_window.get (), "click"))
@@ -258,6 +266,8 @@ tui_py_window::output (const char *text, bool full_window)
 {
   if (m_inner_window != nullptr)
     {
+      tui_batch_rendering batch;
+
       if (full_window)
 	werase (m_inner_window.get ());
 
@@ -265,7 +275,7 @@ tui_py_window::output (const char *text, bool full_window)
       if (full_window)
 	check_and_display_highlight_if_needed ();
       else
-	tui_wrefresh (m_inner_window.get ());
+	wnoutrefresh (m_inner_window.get ());
     }
 }
 
@@ -415,8 +425,7 @@ gdbpy_register_tui_window (PyObject *self, PyObject *args, PyObject *kw)
     }
   catch (const gdb_exception &except)
     {
-      gdbpy_convert_exception (except);
-      return nullptr;
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
 
   Py_RETURN_NONE;
@@ -616,7 +625,7 @@ gdbpy_initialize_tui ()
 {
 #ifdef TUI
   gdbpy_tui_window_object_type.tp_new = PyType_GenericNew;
-  if (PyType_Ready (&gdbpy_tui_window_object_type) < 0)
+  if (gdbpy_type_ready (&gdbpy_tui_window_object_type) < 0)
     return -1;
 #endif	/* TUI */
 
diff --git a/gdb/python/py-type.c b/gdb/python/py-type.c
index 863e6f6..284960a 100644
--- a/gdb/python/py-type.c
+++ b/gdb/python/py-type.c
@@ -292,7 +292,7 @@ typy_fields_items (PyObject *self, enum gdbpy_iter_kind kind)
     }
   catch (const gdb_exception &except)
     {
-      GDB_PY_HANDLE_EXCEPTION (except);
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
 
   gdbpy_ref<> type_holder;
@@ -456,7 +456,7 @@ typy_is_array_like (PyObject *self, void *closure)
     }
   catch (const gdb_exception &except)
     {
-      GDB_PY_HANDLE_EXCEPTION (except);
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
 
   if (result)
@@ -480,7 +480,7 @@ typy_is_string_like (PyObject *self, void *closure)
     }
   catch (const gdb_exception &except)
     {
-      GDB_PY_HANDLE_EXCEPTION (except);
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
 
   if (result)
@@ -501,7 +501,7 @@ typy_strip_typedefs (PyObject *self, PyObject *args)
     }
   catch (const gdb_exception &except)
     {
-      GDB_PY_HANDLE_EXCEPTION (except);
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
 
   return type_to_type_object (type);
@@ -522,7 +522,7 @@ typy_get_composite (struct type *type)
 	}
       catch (const gdb_exception &except)
 	{
-	  GDB_PY_HANDLE_EXCEPTION (except);
+	  return gdbpy_handle_gdb_exception (nullptr, except);
 	}
 
       if (!type->is_pointer_or_reference ())
@@ -592,7 +592,7 @@ typy_array_1 (PyObject *self, PyObject *args, int is_vector)
     }
   catch (const gdb_exception &except)
     {
-      GDB_PY_HANDLE_EXCEPTION (except);
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
 
   return type_to_type_object (array);
@@ -626,7 +626,7 @@ typy_pointer (PyObject *self, PyObject *args)
     }
   catch (const gdb_exception &except)
     {
-      GDB_PY_HANDLE_EXCEPTION (except);
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
 
   return type_to_type_object (type);
@@ -698,7 +698,7 @@ typy_reference (PyObject *self, PyObject *args)
     }
   catch (const gdb_exception &except)
     {
-      GDB_PY_HANDLE_EXCEPTION (except);
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
 
   return type_to_type_object (type);
@@ -732,7 +732,7 @@ typy_const (PyObject *self, PyObject *args)
     }
   catch (const gdb_exception &except)
     {
-      GDB_PY_HANDLE_EXCEPTION (except);
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
 
   return type_to_type_object (type);
@@ -750,7 +750,7 @@ typy_volatile (PyObject *self, PyObject *args)
     }
   catch (const gdb_exception &except)
     {
-      GDB_PY_HANDLE_EXCEPTION (except);
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
 
   return type_to_type_object (type);
@@ -768,7 +768,7 @@ typy_unqualified (PyObject *self, PyObject *args)
     }
   catch (const gdb_exception &except)
     {
-      GDB_PY_HANDLE_EXCEPTION (except);
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
 
   return type_to_type_object (type);
@@ -859,7 +859,7 @@ typy_lookup_typename (const char *type_name, const struct block *block)
     }
   catch (const gdb_exception &except)
     {
-      GDB_PY_HANDLE_EXCEPTION (except);
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
 
   return type;
@@ -913,7 +913,7 @@ typy_lookup_type (struct demangle_component *demangled,
 	}
       catch (const gdb_exception &except)
 	{
-	  GDB_PY_HANDLE_EXCEPTION (except);
+	  return gdbpy_handle_gdb_exception (nullptr, except);
 	}
     }
 
@@ -955,7 +955,7 @@ typy_legacy_template_argument (struct type *type, const struct block *block,
     }
   catch (const gdb_exception &except)
     {
-      GDB_PY_HANDLE_EXCEPTION (except);
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
 
   if (! info)
@@ -1034,7 +1034,7 @@ typy_template_argument (PyObject *self, PyObject *args)
     }
   catch (const gdb_exception &except)
     {
-      GDB_PY_HANDLE_EXCEPTION (except);
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
 
   /* We might not have DW_TAG_template_*, so try to parse the type's
@@ -1069,7 +1069,7 @@ typy_template_argument (PyObject *self, PyObject *args)
     }
   catch (const gdb_exception &except)
     {
-      GDB_PY_HANDLE_EXCEPTION (except);
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
 
   return result;
@@ -1093,7 +1093,7 @@ typy_repr (PyObject *self)
     }
   catch (const gdb_exception &except)
     {
-      GDB_PY_HANDLE_EXCEPTION (except);
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
   auto py_typename = PyUnicode_Decode (type_name.c_str (), type_name.size (),
 				       host_charset (), NULL);
@@ -1115,7 +1115,7 @@ typy_str (PyObject *self)
     }
   catch (const gdb_exception &except)
     {
-      GDB_PY_HANDLE_EXCEPTION (except);
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
 
   return PyUnicode_Decode (thetype.c_str (), thetype.size (),
@@ -1151,7 +1151,7 @@ typy_richcompare (PyObject *self, PyObject *other, int op)
 	{
 	  /* If there is a GDB exception, a comparison is not capable
 	     (or trusted), so exit.  */
-	  GDB_PY_HANDLE_EXCEPTION (except);
+	  return gdbpy_handle_gdb_exception (nullptr, except);
 	}
     }
 
@@ -1465,10 +1465,14 @@ type_to_type_object (struct type *type)
       if (type->is_stub ())
 	type = check_typedef (type);
     }
-  catch (...)
+  catch (const gdb_exception_error &)
     {
       /* Just ignore failures in check_typedef.  */
     }
+  catch (const gdb_exception &except)
+    {
+      return gdbpy_handle_gdb_exception (nullptr, except);
+    }
 
   type_obj = PyObject_New (type_object, &type_object_type);
   if (type_obj)
@@ -1522,11 +1526,11 @@ gdbpy_lookup_type (PyObject *self, PyObject *args, PyObject *kw)
 static int CPYCHECKER_NEGATIVE_RESULT_SETS_EXCEPTION
 gdbpy_initialize_types (void)
 {
-  if (PyType_Ready (&type_object_type) < 0)
+  if (gdbpy_type_ready (&type_object_type) < 0)
     return -1;
-  if (PyType_Ready (&field_object_type) < 0)
+  if (gdbpy_type_ready (&field_object_type) < 0)
     return -1;
-  if (PyType_Ready (&type_iterator_object_type) < 0)
+  if (gdbpy_type_ready (&type_iterator_object_type) < 0)
     return -1;
 
   for (const auto &item : pyty_codes)
@@ -1535,16 +1539,7 @@ gdbpy_initialize_types (void)
 	return -1;
     }
 
-  if (gdb_pymodule_addobject (gdb_module, "Type",
-			      (PyObject *) &type_object_type) < 0)
-    return -1;
-
-  if (gdb_pymodule_addobject (gdb_module, "TypeIterator",
-			      (PyObject *) &type_iterator_object_type) < 0)
-    return -1;
-
-  return gdb_pymodule_addobject (gdb_module, "Field",
-				 (PyObject *) &field_object_type);
+  return 0;
 }
 
 GDBPY_INITIALIZE_FILE (gdbpy_initialize_types);
diff --git a/gdb/python/py-uiout.h b/gdb/python/py-uiout.h
index a2fc90e..5f8c530 100644
--- a/gdb/python/py-uiout.h
+++ b/gdb/python/py-uiout.h
@@ -86,7 +86,8 @@ protected:
   void do_end (ui_out_type type) override;
 
   void do_field_signed (int fldno, int width, ui_align align,
-			const char *fldname, LONGEST value) override;
+			const char *fldname, LONGEST value,
+			const ui_file_style &style) override;
   void do_field_unsigned (int fldno, int width, ui_align align,
 			  const char *fldname, ULONGEST value) override;
 
diff --git a/gdb/python/py-unwind.c b/gdb/python/py-unwind.c
index e36768e..68deaf9 100644
--- a/gdb/python/py-unwind.c
+++ b/gdb/python/py-unwind.c
@@ -228,7 +228,7 @@ unwind_infopy_str (PyObject *self)
 	      }
 	    catch (const gdb_exception &except)
 	      {
-		GDB_PY_HANDLE_EXCEPTION (except);
+		return gdbpy_handle_gdb_exception (nullptr, except);
 	      }
 	  }
 	else
@@ -378,7 +378,7 @@ unwind_infopy_add_saved_register (PyObject *self, PyObject *args, PyObject *kw)
     }
   catch (const gdb_exception &except)
     {
-      GDB_PY_HANDLE_EXCEPTION (except);
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
 
   gdbpy_ref<> new_value = gdbpy_ref<>::new_reference (pyo_reg_value);
@@ -429,7 +429,7 @@ pending_framepy_str (PyObject *self)
     }
   catch (const gdb_exception &except)
     {
-      GDB_PY_HANDLE_EXCEPTION (except);
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
 
   return PyUnicode_FromFormat ("SP=%s,PC=%s", sp_str, pc_str);
@@ -456,7 +456,7 @@ pending_framepy_repr (PyObject *self)
     }
   catch (const gdb_exception &except)
     {
-      GDB_PY_HANDLE_EXCEPTION (except);
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
 
   return PyUnicode_FromFormat ("<%s level=%d, sp=%s, pc=%s>",
@@ -505,7 +505,7 @@ pending_framepy_read_register (PyObject *self, PyObject *args, PyObject *kw)
     }
   catch (const gdb_exception &except)
     {
-      GDB_PY_HANDLE_EXCEPTION (except);
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
 
   return result;
@@ -546,7 +546,7 @@ pending_framepy_name (PyObject *self, PyObject *args)
     }
   catch (const gdb_exception &except)
     {
-      GDB_PY_HANDLE_EXCEPTION (except);
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
 
   if (name != nullptr)
@@ -574,7 +574,7 @@ pending_framepy_pc (PyObject *self, PyObject *args)
     }
   catch (const gdb_exception &except)
     {
-      GDB_PY_HANDLE_EXCEPTION (except);
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
 
   return gdb_py_object_from_ulongest (pc).release ();
@@ -601,7 +601,7 @@ pending_framepy_language (PyObject *self, PyObject *args)
     }
   catch (const gdb_exception &except)
     {
-      GDB_PY_HANDLE_EXCEPTION (except);
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
 
   Py_RETURN_NONE;
@@ -628,7 +628,7 @@ pending_framepy_find_sal (PyObject *self, PyObject *args)
     }
   catch (const gdb_exception &except)
     {
-      GDB_PY_HANDLE_EXCEPTION (except);
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
 
   return sal_obj;
@@ -653,7 +653,7 @@ pending_framepy_block (PyObject *self, PyObject *args)
     }
   catch (const gdb_exception &except)
     {
-      GDB_PY_HANDLE_EXCEPTION (except);
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
 
   for (fn_block = block;
@@ -696,7 +696,7 @@ pending_framepy_function (PyObject *self, PyObject *args)
     }
   catch (const gdb_exception &except)
     {
-      GDB_PY_HANDLE_EXCEPTION (except);
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
 
   if (sym != nullptr)
@@ -1002,17 +1002,13 @@ gdbpy_initialize_unwind (void)
 {
   gdb::observers::new_architecture.attach (pyuw_on_new_gdbarch, "py-unwind");
 
-  if (PyType_Ready (&pending_frame_object_type) < 0)
+  if (gdbpy_type_ready (&pending_frame_object_type) < 0)
     return -1;
-  int rc = gdb_pymodule_addobject (gdb_module, "PendingFrame",
-				   (PyObject *) &pending_frame_object_type);
-  if (rc != 0)
-    return rc;
 
-  if (PyType_Ready (&unwind_info_object_type) < 0)
+  if (gdbpy_type_ready (&unwind_info_object_type) < 0)
     return -1;
-  return gdb_pymodule_addobject (gdb_module, "UnwindInfo",
-      (PyObject *) &unwind_info_object_type);
+
+  return 0;
 }
 
 void _initialize_py_unwind ();
diff --git a/gdb/python/py-utils.c b/gdb/python/py-utils.c
index 47f65f4..0bc18a6 100644
--- a/gdb/python/py-utils.c
+++ b/gdb/python/py-utils.c
@@ -247,7 +247,7 @@ get_addr_from_python (PyObject *obj, CORE_ADDR *addr)
 	}
       catch (const gdb_exception &except)
 	{
-	  GDB_PY_SET_HANDLE_EXCEPTION (except);
+	  return gdbpy_handle_gdb_exception (-1, except);
 	}
     }
   else
@@ -390,6 +390,35 @@ gdbpy_handle_exception ()
 
   if (fetched_error.type_matches (PyExc_KeyboardInterrupt))
     throw_quit ("Quit");
+  else if (fetched_error.type_matches (PyExc_SystemExit))
+    {
+      gdbpy_ref<> value = fetched_error.value ();
+      gdbpy_ref<> code (PyObject_GetAttrString (value.get (), "code"));
+      int exit_arg;
+
+      if (code.get () == Py_None)
+	{
+	  /* CODE == None: exit status is 0.  */
+	  exit_arg = 0;
+	}
+      else if (code.get () != nullptr && PyLong_Check (code.get ()))
+	{
+	  /* CODE == integer: exit status is aforementioned integer.  */
+	  exit_arg = PyLong_AsLong (code.get ());
+	}
+      else
+	{
+	  if (code.get () == nullptr)
+	    gdbpy_print_stack ();
+
+	  /* Otherwise: exit status is 1, print code to stderr.  */
+	  if (msg != nullptr)
+	    gdb_printf (gdb_stderr, "%s\n", msg.get ());
+	  exit_arg = 1;
+	}
+
+      quit_force (&exit_arg, 0);
+    }
   else if (! fetched_error.type_matches (gdbpy_gdberror_exc)
 	   || msg == NULL || *msg == '\0')
     {
diff --git a/gdb/python/py-value.c b/gdb/python/py-value.c
index 5c62ef6..119bf9f 100644
--- a/gdb/python/py-value.c
+++ b/gdb/python/py-value.c
@@ -257,7 +257,7 @@ valpy_dereference (PyObject *self, PyObject *args)
     }
   catch (const gdb_exception &except)
     {
-      GDB_PY_HANDLE_EXCEPTION (except);
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
 
   return result;
@@ -300,7 +300,7 @@ valpy_referenced_value (PyObject *self, PyObject *args)
     }
   catch (const gdb_exception &except)
     {
-      GDB_PY_HANDLE_EXCEPTION (except);
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
 
   return result;
@@ -323,7 +323,7 @@ valpy_reference_value (PyObject *self, PyObject *args, enum type_code refcode)
     }
   catch (const gdb_exception &except)
     {
-      GDB_PY_HANDLE_EXCEPTION (except);
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
 
   return result;
@@ -369,7 +369,7 @@ valpy_to_array (PyObject *self, PyObject *args)
     }
   catch (const gdb_exception &except)
     {
-      GDB_PY_HANDLE_EXCEPTION (except);
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
 
   return result;
@@ -393,7 +393,7 @@ valpy_const_value (PyObject *self, PyObject *args)
     }
   catch (const gdb_exception &except)
     {
-      GDB_PY_HANDLE_EXCEPTION (except);
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
 
   return result;
@@ -499,7 +499,7 @@ valpy_get_dynamic_type (PyObject *self, void *closure)
     }
   catch (const gdb_exception &except)
     {
-      GDB_PY_HANDLE_EXCEPTION (except);
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
 
   if (type == NULL)
@@ -605,7 +605,7 @@ valpy_lazy_string (PyObject *self, PyObject *args, PyObject *kw)
     }
   catch (const gdb_exception &except)
     {
-      GDB_PY_HANDLE_EXCEPTION (except);
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
 
   return str_obj;
@@ -640,7 +640,7 @@ valpy_string (PyObject *self, PyObject *args, PyObject *kw)
     }
   catch (const gdb_exception &except)
     {
-      GDB_PY_HANDLE_EXCEPTION (except);
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
 
   encoding = (user_encoding && *user_encoding) ? user_encoding : la_encoding;
@@ -824,7 +824,7 @@ valpy_format_string (PyObject *self, PyObject *args, PyObject *kw)
     }
   catch (const gdb_exception &except)
     {
-      GDB_PY_HANDLE_EXCEPTION (except);
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
 
   return PyUnicode_Decode (stb.c_str (), stb.size (), host_charset (), NULL);
@@ -869,7 +869,7 @@ valpy_do_cast (PyObject *self, PyObject *args, enum exp_opcode op)
     }
   catch (const gdb_exception &except)
     {
-      GDB_PY_HANDLE_EXCEPTION (except);
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
 
   return result;
@@ -921,8 +921,7 @@ valpy_assign_core (value_object *self, struct value *new_value)
     }
   catch (const gdb_exception &except)
     {
-      gdbpy_convert_exception (except);
-      return false;
+      return gdbpy_handle_gdb_exception (false, except);
     }
 
   return true;
@@ -997,7 +996,7 @@ value_has_field (struct value *v, PyObject *field)
     }
   catch (const gdb_exception &except)
     {
-      GDB_PY_SET_HANDLE_EXCEPTION (except);
+      return gdbpy_handle_gdb_exception (-1, except);
     }
 
   return has_field;
@@ -1178,9 +1177,9 @@ valpy_getitem (PyObject *self, PyObject *key)
       if (res_val)
 	result = value_to_value_object (res_val);
     }
-  catch (gdb_exception &ex)
+  catch (const gdb_exception &ex)
     {
-      GDB_PY_HANDLE_EXCEPTION (ex);
+      return gdbpy_handle_gdb_exception (nullptr, ex);
     }
 
   return result;
@@ -1211,7 +1210,7 @@ valpy_call (PyObject *self, PyObject *args, PyObject *keywords)
     }
   catch (const gdb_exception &except)
     {
-      GDB_PY_HANDLE_EXCEPTION (except);
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
 
   if (ftype->code () != TYPE_CODE_FUNC && ftype->code () != TYPE_CODE_METHOD
@@ -1268,7 +1267,7 @@ valpy_call (PyObject *self, PyObject *args, PyObject *keywords)
     }
   catch (const gdb_exception &except)
     {
-      GDB_PY_HANDLE_EXCEPTION (except);
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
 
   return result;
@@ -1293,7 +1292,7 @@ valpy_str (PyObject *self)
     }
   catch (const gdb_exception &except)
     {
-      GDB_PY_HANDLE_EXCEPTION (except);
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
 
   return PyUnicode_Decode (stb.c_str (), stb.size (), host_charset (), NULL);
@@ -1312,7 +1311,7 @@ valpy_get_is_optimized_out (PyObject *self, void *closure)
     }
   catch (const gdb_exception &except)
     {
-      GDB_PY_HANDLE_EXCEPTION (except);
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
 
   if (opt)
@@ -1334,7 +1333,7 @@ valpy_get_is_lazy (PyObject *self, void *closure)
     }
   catch (const gdb_exception &except)
     {
-      GDB_PY_HANDLE_EXCEPTION (except);
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
 
   if (opt)
@@ -1364,7 +1363,7 @@ valpy_get_bytes (PyObject *self, void *closure)
     }
   catch (const gdb_exception &except)
     {
-      GDB_PY_HANDLE_EXCEPTION (except);
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
 
   value_obj->content_bytes
@@ -1408,7 +1407,7 @@ valpy_fetch_lazy (PyObject *self, PyObject *args)
     }
   catch (const gdb_exception &except)
     {
-      GDB_PY_HANDLE_EXCEPTION (except);
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
 
   Py_RETURN_NONE;
@@ -1579,7 +1578,7 @@ valpy_binop (enum valpy_opcode opcode, PyObject *self, PyObject *other)
     }
   catch (const gdb_exception &except)
     {
-      GDB_PY_HANDLE_EXCEPTION (except);
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
 
   return result;
@@ -1647,7 +1646,7 @@ valpy_negative (PyObject *self)
     }
   catch (const gdb_exception &except)
     {
-      GDB_PY_HANDLE_EXCEPTION (except);
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
 
   return result;
@@ -1674,7 +1673,7 @@ valpy_absolute (PyObject *self)
     }
   catch (const gdb_exception &except)
     {
-      GDB_PY_HANDLE_EXCEPTION (except);
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
 
   if (isabs)
@@ -1704,12 +1703,12 @@ valpy_nonzero (PyObject *self)
 	/* All other values are True.  */
 	nonzero = 1;
     }
-  catch (gdb_exception &ex)
+  catch (const gdb_exception &ex)
     {
       /* This is not documented in the Python documentation, but if
 	 this function fails, return -1 as slot_nb_nonzero does (the
 	 default Python nonzero function).  */
-      GDB_PY_SET_HANDLE_EXCEPTION (ex);
+      return gdbpy_handle_gdb_exception (-1, ex);
     }
 
   return nonzero;
@@ -1729,7 +1728,7 @@ valpy_invert (PyObject *self)
     }
   catch (const gdb_exception &except)
     {
-      GDB_PY_HANDLE_EXCEPTION (except);
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
 
   return result;
@@ -1856,7 +1855,7 @@ valpy_richcompare (PyObject *self, PyObject *other, int op)
     }
   catch (const gdb_exception &except)
     {
-      GDB_PY_HANDLE_EXCEPTION (except);
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
 
   /* In this case, the Python exception has already been set.  */
@@ -1895,7 +1894,7 @@ valpy_long (PyObject *self)
     }
   catch (const gdb_exception &except)
     {
-      GDB_PY_HANDLE_EXCEPTION (except);
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
 
   if (type->is_unsigned ())
@@ -1930,7 +1929,7 @@ valpy_float (PyObject *self)
     }
   catch (const gdb_exception &except)
     {
-      GDB_PY_HANDLE_EXCEPTION (except);
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
 
   return PyFloat_FromDouble (d);
@@ -2056,8 +2055,7 @@ convert_value_from_python (PyObject *obj)
     }
   catch (const gdb_exception &except)
     {
-      gdbpy_convert_exception (except);
-      return NULL;
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
 
   return value;
@@ -2081,7 +2079,7 @@ gdbpy_history (PyObject *self, PyObject *args)
     }
   catch (const gdb_exception &except)
     {
-      GDB_PY_HANDLE_EXCEPTION (except);
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
 
   return result;
@@ -2108,7 +2106,7 @@ gdbpy_add_history (PyObject *self, PyObject *args)
     }
   catch (const gdb_exception &except)
     {
-      GDB_PY_HANDLE_EXCEPTION (except);
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
 
   return nullptr;
@@ -2153,7 +2151,7 @@ gdbpy_convenience_variable (PyObject *self, PyObject *args)
     }
   catch (const gdb_exception &except)
     {
-      GDB_PY_HANDLE_EXCEPTION (except);
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
 
   if (result == nullptr && !found)
@@ -2199,7 +2197,7 @@ gdbpy_set_convenience_variable (PyObject *self, PyObject *args)
     }
   catch (const gdb_exception &except)
     {
-      GDB_PY_HANDLE_EXCEPTION (except);
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
 
   Py_RETURN_NONE;
@@ -2216,11 +2214,7 @@ gdbpy_is_value_object (PyObject *obj)
 static int CPYCHECKER_NEGATIVE_RESULT_SETS_EXCEPTION
 gdbpy_initialize_values (void)
 {
-  if (PyType_Ready (&value_object_type) < 0)
-    return -1;
-
-  return gdb_pymodule_addobject (gdb_module, "Value",
-				 (PyObject *) &value_object_type);
+  return gdbpy_type_ready (&value_object_type);
 }
 
 GDBPY_INITIALIZE_FILE (gdbpy_initialize_values);
diff --git a/gdb/python/python-internal.h b/gdb/python/python-internal.h
index 5db3088..d723c4d 100644
--- a/gdb/python/python-internal.h
+++ b/gdb/python/python-internal.h
@@ -464,6 +464,9 @@ extern enum ext_lang_rc gdbpy_apply_val_pretty_printer
    struct ui_file *stream, int recurse,
    const struct value_print_options *options,
    const struct language_defn *language);
+extern void gdbpy_load_ptwrite_filter
+  (const struct extension_language_defn *extlang,
+   struct btrace_thread_info *btinfo);
 extern enum ext_lang_bt_status gdbpy_apply_frame_filter
   (const struct extension_language_defn *,
    const frame_info_ptr &frame, frame_filter_flags flags,
@@ -929,22 +932,6 @@ private:
   PyGILState_STATE m_state;
 };
 
-/* Use this in a 'catch' block to convert the exception to a Python
-   exception and return nullptr.  */
-#define GDB_PY_HANDLE_EXCEPTION(Exception)	\
-  do {						\
-    gdbpy_convert_exception (Exception);	\
-    return nullptr;				\
-  } while (0)
-
-/* Use this in a 'catch' block to convert the exception to a Python
-   exception and return -1.  */
-#define GDB_PY_SET_HANDLE_EXCEPTION(Exception)				\
-    do {								\
-      gdbpy_convert_exception (Exception);				\
-      return -1;							\
-    } while (0)
-
 int gdbpy_print_python_errors_p (void);
 void gdbpy_print_stack (void);
 void gdbpy_print_stack_or_quit ();
@@ -1010,6 +997,18 @@ extern PyObject *gdbpy_gdberror_exc;
 extern void gdbpy_convert_exception (const struct gdb_exception &)
     CPYCHECKER_SETS_EXCEPTION;
 
+ /* Use this in a 'catch' block to convert the exception E to a Python
+    exception and return value VAL to signal that an exception occurred.
+    Typically at the use site, that value will be returned immediately.  */
+
+template<typename T>
+[[nodiscard]] T
+gdbpy_handle_gdb_exception (T val, const gdb_exception &e)
+{
+  gdbpy_convert_exception (e);
+  return val;
+}
+
 int get_addr_from_python (PyObject *obj, CORE_ADDR *addr)
     CPYCHECKER_NEGATIVE_RESULT_SETS_EXCEPTION;
 
@@ -1116,4 +1115,34 @@ extern std::optional<int> gdbpy_print_insn (struct gdbarch *gdbarch,
 					    CORE_ADDR address,
 					    disassemble_info *info);
 
+/* A wrapper for PyType_Ready that also automatically registers the
+   type in the appropriate module.  Returns 0 on success, -1 on error.
+   If MOD is supplied, then the type is added to that module.  If MOD
+   is not supplied, the type name (tp_name field) must be of the form
+   "gdb.Mumble", and the type will be added to the gdb module.  */
+
+static inline int
+gdbpy_type_ready (PyTypeObject *type, PyObject *mod = nullptr)
+{
+  if (PyType_Ready (type) < 0)
+    return -1;
+  if (mod == nullptr)
+    {
+      gdb_assert (startswith (type->tp_name, "gdb."));
+      mod = gdb_module;
+    }
+  const char *dot = strrchr (type->tp_name, '.');
+  gdb_assert (dot != nullptr);
+  return gdb_pymodule_addobject (mod, dot + 1, (PyObject *) type);
+}
+
+/* Poison PyType_Ready.  Only gdbpy_type_ready should be used, to
+   avoid forgetting to register the type.  See PR python/32163.  */
+#undef PyType_Ready
+#ifdef __GNUC__
+# pragma GCC poison PyType_Ready
+#else
+# define PyType_Ready POISONED_PyType_Ready
+#endif
+
 #endif /* PYTHON_PYTHON_INTERNAL_H */
diff --git a/gdb/python/python.c b/gdb/python/python.c
index d86a031..cc06526 100644
--- a/gdb/python/python.c
+++ b/gdb/python/python.c
@@ -159,6 +159,8 @@ static const struct extension_language_ops python_extension_ops =
 
   gdbpy_apply_frame_filter,
 
+  gdbpy_load_ptwrite_filter,
+
   gdbpy_preserve_values,
 
   gdbpy_breakpoint_has_cond,
@@ -591,7 +593,7 @@ gdbpy_parameter (PyObject *self, PyObject *args)
     }
   catch (const gdb_exception &ex)
     {
-      GDB_PY_HANDLE_EXCEPTION (ex);
+      return gdbpy_handle_gdb_exception (nullptr, ex);
     }
 
   if (cmd == CMD_LIST_AMBIGUOUS)
@@ -754,7 +756,7 @@ execute_gdb_command (PyObject *self, PyObject *args, PyObject *kw)
 	 convert the exception and continue back in Python, we should
 	 re-enable stdin here.  */
       async_enable_stdin ();
-      GDB_PY_HANDLE_EXCEPTION (except);
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
 
   if (to_string)
@@ -970,8 +972,7 @@ gdbpy_decode_line (PyObject *self, PyObject *args)
   catch (const gdb_exception &ex)
     {
       /* We know this will always throw.  */
-      gdbpy_convert_exception (ex);
-      return NULL;
+      return gdbpy_handle_gdb_exception (nullptr, ex);
     }
 
   if (!sals.empty ())
@@ -1052,7 +1053,7 @@ gdbpy_parse_and_eval (PyObject *self, PyObject *args, PyObject *kw)
     }
   catch (const gdb_exception &except)
     {
-      GDB_PY_HANDLE_EXCEPTION (except);
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
 
   return result;
@@ -1537,7 +1538,7 @@ gdbpy_write (PyObject *self, PyObject *args, PyObject *kw)
     }
   catch (const gdb_exception &except)
     {
-      GDB_PY_HANDLE_EXCEPTION (except);
+      return gdbpy_handle_gdb_exception (nullptr, except);
     }
 
   Py_RETURN_NONE;
@@ -2315,7 +2316,7 @@ init_done:
     return false;
 
 #define GDB_PY_DEFINE_EVENT_TYPE(name, py_name, doc, base)	\
-  if (gdbpy_initialize_event_generic (&name##_event_object_type, py_name) < 0) \
+  if (gdbpy_type_ready (&name##_event_object_type) < 0) \
     return false;
 #include "py-event-types.def"
 #undef GDB_PY_DEFINE_EVENT_TYPE
diff --git a/gdb/quick-symbol.h b/gdb/quick-symbol.h
index 676c3ed..0d76e18 100644
--- a/gdb/quick-symbol.h
+++ b/gdb/quick-symbol.h
@@ -47,6 +47,11 @@ typedef bool (expand_symtabs_file_matcher_ftype) (const char *filename,
 typedef bool (expand_symtabs_symbol_matcher_ftype) (const char *name);
 
 /* Callback for quick_symbol_functions->expand_symtabs_matching
+   to match a language.  */
+
+typedef bool (expand_symtabs_lang_matcher_ftype) (enum language lang);
+
+/* Callback for quick_symbol_functions->expand_symtabs_matching
    to be called after a symtab has been expanded.  If this returns
    true, more symtabs are checked; if it returns false, iteration
    stops.  */
@@ -122,6 +127,10 @@ struct quick_symbol_functions
 
   /* Expand all symbol tables in OBJFILE matching some criteria.
 
+     If LANG_MATCHER returns false, expansion of the symbol table may be
+     skipped.  It may also not be skipped, which the caller needs to take into
+     account.
+
      FILE_MATCHER is called for each file in OBJFILE.  The file name
      is passed to it.  If the matcher returns false, the file is
      skipped.  If FILE_MATCHER is NULL the file is not skipped.  If
@@ -154,7 +163,9 @@ struct quick_symbol_functions
      gdb::function_view<expand_symtabs_symbol_matcher_ftype> symbol_matcher,
      gdb::function_view<expand_symtabs_exp_notify_ftype> expansion_notify,
      block_search_flags search_flags,
-     domain_search_flags domain) = 0;
+     domain_search_flags domain,
+     gdb::function_view<expand_symtabs_lang_matcher_ftype> lang_matcher
+       = nullptr) = 0;
 
   /* Return the comp unit from OBJFILE that contains PC and
      SECTION.  Return NULL if there is no such compunit.  This
@@ -163,8 +174,8 @@ struct quick_symbol_functions
      compunit that contains a symbol whose address is closest to
      PC.  */
   virtual struct compunit_symtab *find_pc_sect_compunit_symtab
-    (struct objfile *objfile, struct bound_minimal_symbol msymbol,
-     CORE_ADDR pc, struct obj_section *section, int warn_if_readin) = 0;
+    (struct objfile *objfile, bound_minimal_symbol msymbol, CORE_ADDR pc,
+     struct obj_section *section, int warn_if_readin) = 0;
 
   /* Return the comp unit from OBJFILE that contains a symbol at
      ADDRESS.  Return NULL if there is no such comp unit.  Unlike
diff --git a/gdb/ravenscar-thread.c b/gdb/ravenscar-thread.c
index 1957f3c..47db72b 100644
--- a/gdb/ravenscar-thread.c
+++ b/gdb/ravenscar-thread.c
@@ -326,18 +326,17 @@ ravenscar_thread_target::add_active_thread ()
    and return its associated minimal symbol.
    Return NULL if not found.  */
 
-static struct bound_minimal_symbol
+static bound_minimal_symbol
 get_running_thread_msymbol ()
 {
-  struct bound_minimal_symbol msym;
-
-  msym = lookup_minimal_symbol (running_thread_name, NULL, NULL);
+  bound_minimal_symbol msym
+    = lookup_minimal_symbol (current_program_space, running_thread_name);
   if (!msym.minsym)
     /* Older versions of the GNAT runtime were using a different
        (less ideal) name for the symbol where the active thread ID
        is stored.  If we couldn't find the symbol using the latest
        name, then try the old one.  */
-    msym = lookup_minimal_symbol ("running_thread", NULL, NULL);
+    msym = lookup_minimal_symbol (current_program_space, "running_thread");
 
   return msym;
 }
@@ -348,14 +347,14 @@ get_running_thread_msymbol ()
 static bool
 has_ravenscar_runtime ()
 {
-  struct bound_minimal_symbol msym_ravenscar_runtime_initializer
-    = lookup_minimal_symbol (ravenscar_runtime_initializer, NULL, NULL);
-  struct bound_minimal_symbol msym_known_tasks
-    = lookup_minimal_symbol (known_tasks_name, NULL, NULL);
-  struct bound_minimal_symbol msym_first_task
-    = lookup_minimal_symbol (first_task_name, NULL, NULL);
-  struct bound_minimal_symbol msym_running_thread
-    = get_running_thread_msymbol ();
+  bound_minimal_symbol msym_ravenscar_runtime_initializer
+    = lookup_minimal_symbol (current_program_space,
+			     ravenscar_runtime_initializer);
+  bound_minimal_symbol msym_known_tasks
+    = lookup_minimal_symbol (current_program_space, known_tasks_name);
+  bound_minimal_symbol msym_first_task
+    = lookup_minimal_symbol (current_program_space, first_task_name);
+  bound_minimal_symbol msym_running_thread = get_running_thread_msymbol ();
 
   return (msym_ravenscar_runtime_initializer.minsym
 	  && (msym_known_tasks.minsym || msym_first_task.minsym)
@@ -377,7 +376,7 @@ ravenscar_thread_target::runtime_initialized ()
 static CORE_ADDR
 get_running_thread_id (int cpu)
 {
-  struct bound_minimal_symbol object_msym = get_running_thread_msymbol ();
+  bound_minimal_symbol object_msym = get_running_thread_msymbol ();
   int object_size;
   int buf_size;
   gdb_byte *buf;
@@ -642,7 +641,8 @@ ravenscar_thread_target::get_fpu_state (struct regcache *regcache,
     return NOTHING_SPECIAL;
 
   bound_minimal_symbol fpu_context
-    = lookup_minimal_symbol ("system__bb__cpu_primitives__current_fpu_context",
+    = lookup_minimal_symbol (current_program_space,
+			     "system__bb__cpu_primitives__current_fpu_context",
 			     nullptr, nullptr);
   /* If the symbol can't be found, just fall back.  */
   if (fpu_context.minsym == nullptr)
diff --git a/gdb/record-btrace.c b/gdb/record-btrace.c
index 9fec611..8fcf638 100644
--- a/gdb/record-btrace.c
+++ b/gdb/record-btrace.c
@@ -827,6 +827,22 @@ btrace_insn_history (struct ui_out *uiout,
 	  btrace_ui_out_decode_error (uiout, btrace_insn_get_error (&it),
 				      conf->format);
 	}
+      else if (insn->iclass == BTRACE_INSN_AUX)
+	{
+	  if ((flags & DISASSEMBLY_OMIT_AUX_INSN) != 0)
+	    continue;
+
+	  uiout->field_fmt ("insn-number", "%u", btrace_insn_number (&it));
+	  uiout->text ("\t");
+	  /* Add 3 spaces to match the instructions and 2 to indent the aux
+	     string to make it more visible.  */
+	  uiout->spaces (5);
+	  uiout->text ("[");
+	  uiout->field_fmt ("aux-data", "%s",
+			    it.btinfo->aux_data.at
+			     (insn->aux_data_index).c_str ());
+	  uiout->text ("]\n");
+	}
       else
 	{
 	  struct disasm_insn dinsn;
@@ -1145,6 +1161,31 @@ btrace_get_bfun_name (const struct btrace_function *bfun)
     return "??";
 }
 
+static void
+btrace_print_aux_insn (struct ui_out *uiout,
+		       const struct btrace_function *bfun,
+		       const struct btrace_thread_info *btinfo,
+		       int level)
+{
+  for (const btrace_insn &insn : bfun->insn)
+    {
+      if (insn.iclass == BTRACE_INSN_AUX)
+	{
+	  /* Indent to the function level.  */
+	  uiout->text ("\t");
+	  /* Adjust for RECORD_PRINT_INDENT_CALLS and indent one
+	     additional level.  */
+	  for (int i = 0; i <= level; ++i)
+	    uiout->text ("  ");
+
+	  uiout->text ("[");
+	  uiout->field_fmt ("aux-data", "%s",
+			    btinfo->aux_data.at (insn.aux_data_index).c_str ());
+	  uiout->text ("]\n");
+	}
+    }
+}
+
 /* Disassemble a section of the recorded function trace.  */
 
 static void
@@ -1165,6 +1206,7 @@ btrace_call_history (struct ui_out *uiout,
       const struct btrace_function *bfun;
       struct minimal_symbol *msym;
       struct symbol *sym;
+      int level = 0;
 
       bfun = btrace_call_get (&it);
       sym = bfun->sym;
@@ -1191,9 +1233,9 @@ btrace_call_history (struct ui_out *uiout,
 
       if ((flags & RECORD_PRINT_INDENT_CALLS) != 0)
 	{
-	  int level = bfun->level + btinfo->level, i;
+	  level = bfun->level + btinfo->level;
 
-	  for (i = 0; i < level; ++i)
+	  for (int i = 0; i < level; ++i)
 	    uiout->text ("  ");
 	}
 
@@ -1220,6 +1262,10 @@ btrace_call_history (struct ui_out *uiout,
 	}
 
       uiout->text ("\n");
+
+      if (((flags & RECORD_DONT_PRINT_AUX) == 0)
+	  && ((bfun->flags & BFUN_CONTAINS_AUX) != 0))
+	btrace_print_aux_insn (uiout, bfun, btinfo, level);
     }
 }
 
@@ -2345,9 +2391,13 @@ record_btrace_single_step_forward (struct thread_info *tp)
     return btrace_step_stopped ();
 
   /* Skip gaps during replay.  If we end up at a gap (at the end of the trace),
-     jump back to the instruction at which we started.  */
+     jump back to the instruction at which we started.  If we're stepping a
+     BTRACE_INSN_AUX instruction, print the auxiliary data and skip the
+     instruction.  */
+
   start = *replay;
-  do
+
+  for (;;)
     {
       unsigned int steps;
 
@@ -2359,8 +2409,23 @@ record_btrace_single_step_forward (struct thread_info *tp)
 	  *replay = start;
 	  return btrace_step_no_history ();
 	}
+
+      const struct btrace_insn *insn = btrace_insn_get (replay);
+      if (insn == nullptr)
+	continue;
+
+      /* If we're stepping a BTRACE_INSN_AUX instruction, print the auxiliary
+	 data and skip the instruction.  */
+      if (insn->iclass == BTRACE_INSN_AUX)
+	{
+	  gdb_printf ("[%s]\n",
+		      btinfo->aux_data.at (insn->aux_data_index).c_str ());
+	  continue;
+	}
+
+      /* We have an instruction, we are done.  */
+      break;
     }
-  while (btrace_insn_get (replay) == NULL);
 
   /* Determine the end of the instruction trace.  */
   btrace_insn_end (&end, btinfo);
@@ -2391,9 +2456,12 @@ record_btrace_single_step_backward (struct thread_info *tp)
 
   /* If we can't step any further, we reached the end of the history.
      Skip gaps during replay.  If we end up at a gap (at the beginning of
-     the trace), jump back to the instruction at which we started.  */
+     the trace), jump back to the instruction at which we started.
+     If we're stepping a BTRACE_INSN_AUX instruction, print the auxiliary
+     data and skip the instruction.  */
   start = *replay;
-  do
+
+  for (;;)
     {
       unsigned int steps;
 
@@ -2403,8 +2471,22 @@ record_btrace_single_step_backward (struct thread_info *tp)
 	  *replay = start;
 	  return btrace_step_no_history ();
 	}
+
+      const struct btrace_insn *insn = btrace_insn_get (replay);
+      if (insn == nullptr)
+	continue;
+
+      /* Check if we're stepping a BTRACE_INSN_AUX instruction and skip it.  */
+      if (insn->iclass == BTRACE_INSN_AUX)
+	{
+	  gdb_printf ("[%s]\n",
+		      btinfo->aux_data.at (insn->aux_data_index).c_str ());
+	  continue;
+	}
+
+      /* We have an instruction, we are done.  */
+      break;
     }
-  while (btrace_insn_get (replay) == NULL);
 
   /* Check if we're stepping a breakpoint.
 
@@ -2826,26 +2908,33 @@ record_btrace_target::goto_record_end ()
 /* The goto_record method of target record-btrace.  */
 
 void
-record_btrace_target::goto_record (ULONGEST insn)
+record_btrace_target::goto_record (ULONGEST insn_number)
 {
   struct thread_info *tp;
   struct btrace_insn_iterator it;
   unsigned int number;
   int found;
 
-  number = insn;
+  number = insn_number;
 
   /* Check for wrap-arounds.  */
-  if (number != insn)
+  if (number != insn_number)
     error (_("Instruction number out of range."));
 
   tp = require_btrace_thread ();
 
   found = btrace_find_insn_by_number (&it, &tp->btrace, number);
 
-  /* Check if the instruction could not be found or is a gap.  */
-  if (found == 0 || btrace_insn_get (&it) == NULL)
+  /* Check if the instruction could not be found or is a gap or an
+     auxiliary instruction.  */
+  if (found == 0)
+    error (_("No such instruction."));
+
+  const struct btrace_insn *insn = btrace_insn_get (&it);
+  if (insn == NULL)
     error (_("No such instruction."));
+  if (insn->iclass == BTRACE_INSN_AUX)
+    error (_("Can't go to an auxiliary instruction."));
 
   record_btrace_set_replay (tp, &it);
 }
@@ -3091,6 +3180,36 @@ show_record_pt_buffer_size_value (struct ui_file *file, int from_tty,
 	      value);
 }
 
+
+static bool event_tracing = false;
+
+/* The "record pt event-tracing" show value function.  */
+
+static void
+show_record_pt_event_tracing_value (struct ui_file *file, int from_tty,
+				    struct cmd_list_element *c,
+				    const char *value)
+{
+#if (LIBIPT_VERSION >= 0x201)
+  gdb_printf (file, _("record pt event-tracing is %s.\n"), value);
+#else
+  gdb_printf (_("Event-tracing is not supported by GDB.\n"));
+#endif /* defined (LIBIPT_VERSION >= 0x201) */
+}
+
+/* The "record pt event-tracing" set value function.  */
+
+static void
+set_record_pt_event_tracing_value (const char *args, int from_tty,
+				   cmd_list_element *c)
+{
+#if (LIBIPT_VERSION >= 0x201)
+  record_btrace_conf.pt.event_tracing = event_tracing;
+#else
+  gdb_printf (_("Event-tracing is not supported by GDB.\n"));
+#endif /* defined (LIBIPT_VERSION >= 0x201) */
+}
+
 /* Initialize btrace commands.  */
 
 void _initialize_record_btrace ();
@@ -3210,6 +3329,19 @@ to see the actual buffer size."), NULL, show_record_pt_buffer_size_value,
 			    &set_record_btrace_pt_cmdlist,
 			    &show_record_btrace_pt_cmdlist);
 
+  add_setshow_boolean_cmd ("event-tracing", no_class, &event_tracing,
+			   _("Set event-tracing for record pt."),
+			   _("Show event-tracing for record pt."),
+			   _("\
+Use \"on\" to enable event tracing for recordings with Intel Processor Trace,  \
+and \"off\" to disable it.\n\
+Without an argument, event tracing is enabled.  Changing this setting has no\
+effect on an active recording."),
+			   set_record_pt_event_tracing_value,
+			   show_record_pt_event_tracing_value,
+			   &set_record_btrace_pt_cmdlist,
+			   &show_record_btrace_pt_cmdlist);
+
   add_target (record_btrace_target_info, record_btrace_target_open);
 
   bfcache = htab_create_alloc (50, bfcache_hash, bfcache_eq, NULL,
@@ -3217,4 +3349,10 @@ to see the actual buffer size."), NULL, show_record_pt_buffer_size_value,
 
   record_btrace_conf.bts.size = 64 * 1024;
   record_btrace_conf.pt.size = 16 * 1024;
+#if (LIBIPT_VERSION >= 0x200)
+  record_btrace_conf.pt.ptwrite = true;
+#else
+  record_btrace_conf.pt.ptwrite = false;
+#endif
+  record_btrace_conf.pt.event_tracing = false;
 }
diff --git a/gdb/record-full.c b/gdb/record-full.c
index ab854e0..a681ef9 100644
--- a/gdb/record-full.c
+++ b/gdb/record-full.c
@@ -2892,12 +2892,12 @@ _initialize_record_full ()
 	       _("Restore the execution log from a file.\n\
 Argument is filename.  File must be created with 'record save'."),
 	       &record_full_cmdlist);
-  set_cmd_completer (record_full_restore_cmd, filename_completer);
+  set_cmd_completer (record_full_restore_cmd, deprecated_filename_completer);
 
   /* Deprecate the old version without "full" prefix.  */
   c = add_alias_cmd ("restore", record_full_restore_cmd, class_obscure, 1,
 		     &record_cmdlist);
-  set_cmd_completer (c, filename_completer);
+  set_cmd_completer (c, deprecated_filename_completer);
   deprecate_cmd (c, "record full restore");
 
   add_setshow_prefix_cmd ("full", class_support,
diff --git a/gdb/record.c b/gdb/record.c
index b254457..8bf8a69 100644
--- a/gdb/record.c
+++ b/gdb/record.c
@@ -491,6 +491,9 @@ get_insn_history_modifiers (const char **arg)
 
 	  switch (*args)
 	    {
+	    case 'a':
+	      modifiers |= DISASSEMBLY_OMIT_AUX_INSN;
+	      break;
 	    case 'm':
 	    case 's':
 	      modifiers |= DISASSEMBLY_SOURCE;
@@ -641,6 +644,9 @@ get_call_history_modifiers (const char **arg)
 	    case 'c':
 	      modifiers |= RECORD_PRINT_INDENT_CALLS;
 	      break;
+	    case 'a':
+	      modifiers |= RECORD_DONT_PRINT_AUX;
+	      break;
 	    default:
 	      error (_("Invalid modifier: %c."), *args);
 	    }
@@ -821,7 +827,7 @@ A size of \"unlimited\" means unlimited lines.  The default is 10."),
 Usage: record save [FILENAME]\n\
 Default filename is 'gdb_record.PROCESS_ID'."),
 	       &record_cmdlist);
-  set_cmd_completer (c, filename_completer);
+  set_cmd_completer (c, deprecated_filename_completer);
 
   cmd_list_element *record_delete_cmd
     =  add_cmd ("delete", class_obscure, cmd_record_delete,
@@ -859,6 +865,8 @@ With a /m or /s modifier, source lines are included (if available).\n\
 With a /r modifier, raw instructions in hex are included.\n\
 With a /f modifier, function names are omitted.\n\
 With a /p modifier, current position markers are omitted.\n\
+With a /a modifier, omits output of auxiliary data, which is enabled \
+by default.\n\
 With no argument, disassembles ten more instructions after the previous \
 disassembly.\n\
 \"record instruction-history -\" disassembles ten instructions before a \
@@ -881,6 +889,8 @@ Without modifiers, it prints the function name.\n\
 With a /l modifier, the source file and line number range is included.\n\
 With a /i modifier, the instruction number range is included.\n\
 With a /c modifier, the output is indented based on the call stack depth.\n\
+With a /a modifier, omits output of auxiliary data, which is enabled \
+by default.\n\
 With no argument, prints ten more lines after the previous ten-line print.\n\
 \"record function-call-history -\" prints ten lines before a previous ten-line \
 print.\n\
diff --git a/gdb/record.h b/gdb/record.h
index f44b395..aea6507 100644
--- a/gdb/record.h
+++ b/gdb/record.h
@@ -62,7 +62,10 @@ enum record_print_flag
   RECORD_PRINT_INSN_RANGE = (1 << 1),
 
   /* Indent based on call stack depth (if applicable).  */
-  RECORD_PRINT_INDENT_CALLS = (1 << 2)
+  RECORD_PRINT_INDENT_CALLS = (1 << 2),
+
+  /* Deactivate printing auxiliary data (if applicable).  */
+  RECORD_DONT_PRINT_AUX = (1 << 3)
 };
 DEF_ENUM_FLAGS_TYPE (enum record_print_flag, record_print_flags);
 
diff --git a/gdb/regcache-dump.c b/gdb/regcache-dump.c
index bc665dc..6b711bf 100644
--- a/gdb/regcache-dump.c
+++ b/gdb/regcache-dump.c
@@ -162,7 +162,7 @@ protected:
   {
     if (regnum < 0)
       {
-	gdb_printf (file, "Rmt Nr  g/G Offset");
+	gdb_printf (file, "Rmt Nr  g/G Offset  Expedited");
       }
     else if (regnum < gdbarch_num_regs (m_gdbarch))
       {
@@ -170,7 +170,12 @@ protected:
 
 	if (remote_register_number_and_offset (m_gdbarch, regnum,
 					       &pnum, &poffset))
-	  gdb_printf (file, "%7d %11d", pnum, poffset);
+	  {
+	    if (remote_register_is_expedited (regnum))
+	      gdb_printf (file, "%7d %11d  yes", pnum, poffset);
+	    else
+	      gdb_printf (file, "%7d %11d", pnum, poffset);
+	  }
       }
   }
 };
@@ -324,9 +329,11 @@ _initialize_regcache_dump ()
 	     "Takes an optional file parameter."),
 	   &maintenanceprintlist);
   add_cmd ("remote-registers", class_maintenance,
-	   maintenance_print_remote_registers, _("\
-Print the internal register configuration including remote register number "
-"and g/G packets offset.\n\
-Takes an optional file parameter."),
+	   maintenance_print_remote_registers,
+	   _("Print the internal register configuration including remote "
+	     "register number and g/G packets offset.\n"
+	     "Also prints which registers were sent in the last stop reply "
+	     "packet (i.e. expedited).\n"
+	     "Takes an optional file parameter."),
 	   &maintenanceprintlist);
 }
diff --git a/gdb/remote.c b/gdb/remote.c
index 4948a54..5323491 100644
--- a/gdb/remote.c
+++ b/gdb/remote.c
@@ -361,6 +361,12 @@ enum {
   /* Support for the Qbtrace-conf:pt:size packet.  */
   PACKET_Qbtrace_conf_pt_size,
 
+  /* Support for the Qbtrace-conf:pt:ptwrite packet.  */
+  PACKET_Qbtrace_conf_pt_ptwrite,
+
+  /* Support for the Qbtrace-conf:pt:event-tracing packet.  */
+  PACKET_Qbtrace_conf_pt_event_tracing,
+
   /* Support for exec events.  */
   PACKET_exec_event_feature,
 
@@ -679,7 +685,7 @@ public: /* data */
 
   /* FIXME: cagney/1999-09-23: Even though getpkt was called with
      ``forever'' still use the normal timeout mechanism.  This is
-     currently used by the ASYNC code to guarentee that target reads
+     currently used by the ASYNC code to guarantee that target reads
      during the initial connect always time-out.  Once getpkt has been
      modified to return a timeout indication and, in turn
      remote_wait()/wait_for_inferior() have gained a timeout parameter
@@ -690,6 +696,10 @@ public: /* data */
      qSupported.  */
   gdb_thread_options supported_thread_options = 0;
 
+  /* Contains the regnums of the expedited registers in the last stop
+     reply packet.  */
+  std::set<int> last_seen_expedited_registers;
+
 private:
   /* Asynchronous signal handle registered as event loop source for
      when we have pending events ready to be passed to the core.  */
@@ -1487,6 +1497,20 @@ is_remote_target (process_stratum_target *target)
   return as_remote_target (target) != nullptr;
 }
 
+/* See remote.h.  */
+
+bool
+remote_register_is_expedited (int regnum)
+{
+  remote_target *rt = as_remote_target (current_inferior ()->process_target ());
+
+  if (rt == nullptr)
+    return false;
+
+  remote_state *rs = rt->get_remote_state ();
+  return rs->last_seen_expedited_registers.count (regnum) > 0;
+}
+
 /* Per-program-space data key.  */
 static const registry<program_space>::key<char, gdb::xfree_deleter<char>>
   remote_pspace_data;
@@ -3908,7 +3932,7 @@ remote_target::remote_get_threadlist (int startflag, threadref *nextthread,
       /* FIXME: This is a good reason to drop the packet.  */
       /* Possibly, there is a duplicate response.  */
       /* Possibilities :
-	 retransmit immediatly - race conditions
+	 retransmit immediately - race conditions
 	 retransmit after timeout - yes
 	 exit
 	 wait for packet, then exit
@@ -5504,13 +5528,12 @@ remote_target::remote_check_symbols ()
 
   while (startswith (reply.data (), "qSymbol:"))
     {
-      struct bound_minimal_symbol sym;
-
       tmp = &reply[8];
       end = hex2bin (tmp, reinterpret_cast <gdb_byte *> (msg.data ()),
 		     strlen (tmp) / 2);
       msg[end] = '\0';
-      sym = lookup_minimal_symbol (msg.data (), NULL, NULL);
+      bound_minimal_symbol sym
+	= lookup_minimal_symbol (current_program_space, msg.data ());
       if (sym.minsym == NULL)
 	xsnprintf (msg.data (), get_remote_packet_size (), "qSymbol::%s",
 		   &reply[8]);
@@ -5811,6 +5834,10 @@ static const struct protocol_feature remote_protocol_features[] = {
     PACKET_exec_event_feature },
   { "Qbtrace-conf:pt:size", PACKET_DISABLE, remote_supported_packet,
     PACKET_Qbtrace_conf_pt_size },
+  { "Qbtrace-conf:pt:ptwrite", PACKET_DISABLE, remote_supported_packet,
+    PACKET_Qbtrace_conf_pt_ptwrite },
+  { "Qbtrace-conf:pt:event-tracing", PACKET_DISABLE, remote_supported_packet,
+    PACKET_Qbtrace_conf_pt_event_tracing },
   { "vContSupported", PACKET_DISABLE, remote_supported_packet, PACKET_vContSupported },
   { "QThreadEvents", PACKET_DISABLE, remote_supported_packet, PACKET_QThreadEvents },
   { "QThreadOptions", PACKET_DISABLE, remote_supported_thread_options,
@@ -6265,7 +6292,7 @@ remote_target::open_1 (const char *name, int from_tty, int extended_p)
 
   /* Start the remote connection.  If error() or QUIT, discard this
      target (we'd otherwise be in an inconsistent state) and then
-     propogate the error on up the exception chain.  This ensures that
+     propagate the error on up the exception chain.  This ensures that
      the caller doesn't stumble along blindly assuming that the
      function succeeded.  The CLI doesn't have this problem but other
      UI's, such as MI do.
@@ -8514,6 +8541,10 @@ remote_target::process_stop_reply (stop_reply_up stop_reply,
 {
   *status = stop_reply->ws;
   ptid_t ptid = stop_reply->ptid;
+  struct remote_state *rs = get_remote_state ();
+
+  /* Forget about last reply's expedited registers.  */
+  rs->last_seen_expedited_registers.clear ();
 
   /* If no thread/process was reported by the stub then select a suitable
      thread/process.  */
@@ -8540,7 +8571,10 @@ remote_target::process_stop_reply (stop_reply_up stop_reply,
 					stop_reply->arch);
 
 	  for (cached_reg_t &reg : stop_reply->regcache)
-	    regcache->raw_supply (reg.num, reg.data.get ());
+	    {
+	      regcache->raw_supply (reg.num, reg.data.get ());
+	      rs->last_seen_expedited_registers.insert (reg.num);
+	    }
 	}
 
       remote_thread_info *remote_thr = get_remote_thread_info (this, ptid);
@@ -13233,6 +13267,18 @@ public:
 	    fileio_error remote_errno;
 	    m_remote->remote_hostio_close (m_fd, &remote_errno);
 	  }
+	catch (const gdb_exception_quit &ex)
+	  {
+	    /* We can't throw from a destructor, so re-set the quit flag
+	      for later QUIT checking.  */
+	    set_quit_flag ();
+	  }
+	catch (const gdb_exception_forced_quit &ex)
+	  {
+	    /* Like above, but (eventually) cause GDB to terminate by
+	       setting sync_quit_force_run.  */
+	    set_force_quit_flag ();
+	  }
 	catch (...)
 	  {
 	    /* Swallow exception before it escapes the dtor.  If
@@ -14737,7 +14783,7 @@ parse_xml_btrace_conf_pt (struct gdb_xml_parser *parser,
 			  std::vector<gdb_xml_value> &attributes)
 {
   struct btrace_config *conf;
-  struct gdb_xml_value *size;
+  struct gdb_xml_value *size, *ptwrite, *event_tracing;
 
   conf = (struct btrace_config *) user_data;
   conf->format = BTRACE_FORMAT_PT;
@@ -14746,10 +14792,22 @@ parse_xml_btrace_conf_pt (struct gdb_xml_parser *parser,
   size = xml_find_attribute (attributes, "size");
   if (size != NULL)
     conf->pt.size = (unsigned int) *(ULONGEST *) size->value.get ();
+
+  ptwrite = xml_find_attribute (attributes, "ptwrite");
+  if (ptwrite != nullptr)
+    conf->pt.ptwrite = (bool) *(ULONGEST *) ptwrite->value.get ();
+
+  event_tracing = xml_find_attribute (attributes, "event-tracing");
+  if (event_tracing != nullptr)
+    conf->pt.event_tracing = (bool) *(ULONGEST *) event_tracing->value.get ();
 }
 
 static const struct gdb_xml_attribute btrace_conf_pt_attributes[] = {
   { "size", GDB_XML_AF_OPTIONAL, gdb_xml_parse_attr_ulongest, NULL },
+  { "ptwrite", GDB_XML_AF_OPTIONAL, gdb_xml_parse_attr_enum,
+    gdb_xml_enums_boolean },
+  { "event-tracing", GDB_XML_AF_OPTIONAL, gdb_xml_parse_attr_enum,
+    gdb_xml_enums_boolean },
   { NULL, GDB_XML_AF_NONE, NULL, NULL }
 };
 
@@ -14855,6 +14913,65 @@ remote_target::btrace_sync_conf (const btrace_config *conf)
 
       rs->btrace_config.pt.size = conf->pt.size;
     }
+
+  if ((m_features.packet_support (PACKET_Qbtrace_conf_pt_ptwrite)
+       == PACKET_ENABLE)
+	&& conf->pt.ptwrite != rs->btrace_config.pt.ptwrite)
+    {
+      pos = buf;
+      const char *ptw = conf->pt.ptwrite ? "yes" : "no";
+      const char *name
+	= packets_descriptions[PACKET_Qbtrace_conf_pt_ptwrite].name;
+      pos += xsnprintf (pos, endbuf - pos, "%s=\"%s\"", name, ptw);
+
+      putpkt (buf);
+      getpkt (&rs->buf, 0);
+
+      packet_result result
+	= m_features.packet_ok (buf, PACKET_Qbtrace_conf_pt_ptwrite);
+      if (result.status () == PACKET_ERROR)
+	{
+	  if (buf[0] == 'E' && buf[1] == '.')
+	    error (_("Failed to sync ptwrite config: %s"), buf + 2);
+	  else
+	    error (_("Failed to sync ptwrite config."));
+	}
+
+      rs->btrace_config.pt.ptwrite = conf->pt.ptwrite;
+    }
+
+  /* Event tracing is a user setting, warn if it is set but the target
+     doesn't support it.  */
+  if ((m_features.packet_support (PACKET_Qbtrace_conf_pt_event_tracing)
+       != PACKET_ENABLE)
+	&& conf->pt.event_tracing)
+    warning (_("Target does not support event-tracing."));
+
+  if ((m_features.packet_support (PACKET_Qbtrace_conf_pt_event_tracing)
+       == PACKET_ENABLE)
+	&& conf->pt.event_tracing != rs->btrace_config.pt.event_tracing)
+    {
+      pos = buf;
+      const char *event_tracing = conf->pt.event_tracing ? "yes" : "no";
+      const char *name
+	= packets_descriptions[PACKET_Qbtrace_conf_pt_event_tracing].name;
+      pos += xsnprintf (pos, endbuf - pos, "%s=\"%s\"", name, event_tracing);
+
+      putpkt (buf);
+      getpkt (&rs->buf, 0);
+
+      packet_result result
+	= m_features.packet_ok (buf, PACKET_Qbtrace_conf_pt_event_tracing);
+      if (result.status () == PACKET_ERROR)
+	{
+	  if (buf[0] == 'E' && buf[1] == '.')
+	    error (_("Failed to sync event-tracing config: %s"), buf + 2);
+	  else
+	    error (_("Failed to sync event-tracing config."));
+	}
+
+      rs->btrace_config.pt.event_tracing = conf->pt.event_tracing;
+    }
 }
 
 /* Read TP's btrace configuration from the target and store it into CONF.  */
@@ -15210,7 +15327,7 @@ static serial_event_ftype remote_async_serial_handler;
 static void
 remote_async_serial_handler (struct serial *scb, void *context)
 {
-  /* Don't propogate error information up to the client.  Instead let
+  /* Don't propagate error information up to the client.  Instead let
      the client find out about the error by querying the target.  */
   inferior_event_handler (INF_REG_EVENT);
 }
@@ -16309,6 +16426,13 @@ Show the maximum size of the address (in bits) in a memory packet."), NULL,
   add_packet_config_cmd (PACKET_Qbtrace_conf_pt_size, "Qbtrace-conf:pt:size",
 			 "btrace-conf-pt-size", 0);
 
+  add_packet_config_cmd (PACKET_Qbtrace_conf_pt_ptwrite, "Qbtrace-conf:pt:ptwrite",
+			 "btrace-conf-pt-ptwrite", 0);
+
+  add_packet_config_cmd (PACKET_Qbtrace_conf_pt_event_tracing,
+			 "Qbtrace-conf:pt:event-tracing",
+			 "btrace-conf-pt-event-tracing", 0);
+
   add_packet_config_cmd (PACKET_vContSupported, "vContSupported",
 			 "verbose-resume-supported", 0);
 
diff --git a/gdb/remote.h b/gdb/remote.h
index cb0a66d..bfe3c65 100644
--- a/gdb/remote.h
+++ b/gdb/remote.h
@@ -121,4 +121,9 @@ extern void send_remote_packet (gdb::array_view<const char> &buf,
 
 extern bool is_remote_target (process_stratum_target *target);
 
+/* Return true if REGNUM was returned as an expedited register in the last
+   stop reply we received.  */
+
+extern bool remote_register_is_expedited (int regnum);
+
 #endif
diff --git a/gdb/rs6000-aix-nat.c b/gdb/rs6000-aix-nat.c
index 908671a..6a20f61 100644
--- a/gdb/rs6000-aix-nat.c
+++ b/gdb/rs6000-aix-nat.c
@@ -993,7 +993,7 @@ rs6000_nat_target::create_inferior (const char *exec_file,
   info.bfd_arch_info = bfd_get_arch_info (&abfd);
   info.abfd = current_program_space->exec_bfd ();
 
-  if (!gdbarch_update_p (info))
+  if (!gdbarch_update_p (current_inferior (), info))
     internal_error (_("rs6000_create_inferior: failed "
 		      "to select architecture"));
 }
diff --git a/gdb/rs6000-aix-tdep.c b/gdb/rs6000-aix-tdep.c
index 3faefe5..3cc0232 100644
--- a/gdb/rs6000-aix-tdep.c
+++ b/gdb/rs6000-aix-tdep.c
@@ -524,7 +524,7 @@ rs6000_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
      on PPC variants that lack them.  */
   gdb_assert (ppc_floating_point_unit_p (gdbarch));
 
-  /* The first eight words of ther arguments are passed in registers.
+  /* The first eight words of the arguments are passed in registers.
      Copy them appropriately.  */
   ii = 0;
 
diff --git a/gdb/rs6000-lynx178-tdep.c b/gdb/rs6000-lynx178-tdep.c
index 17244b3..a5a6bb9 100644
--- a/gdb/rs6000-lynx178-tdep.c
+++ b/gdb/rs6000-lynx178-tdep.c
@@ -56,7 +56,7 @@ rs6000_lynx178_push_dummy_call (struct gdbarch *gdbarch,
      on PPC variants that lack them.  */
   gdb_assert (ppc_floating_point_unit_p (gdbarch));
 
-  /* The first eight words of ther arguments are passed in registers.
+  /* The first eight words of the arguments are passed in registers.
      Copy them appropriately.  */
   ii = 0;
 
diff --git a/gdb/rs6000-tdep.c b/gdb/rs6000-tdep.c
index 2edb823..d7f9698 100644
--- a/gdb/rs6000-tdep.c
+++ b/gdb/rs6000-tdep.c
@@ -1389,7 +1389,7 @@ rs6000_fetch_instruction (struct gdbarch *gdbarch, const CORE_ADDR pc)
   return op;
 }
 
-/* GCC generates several well-known sequences of instructions at the begining
+/* GCC generates several well-known sequences of instructions at the beginning
    of each function prologue when compiling with -fstack-check.  If one of
    such sequences starts at START_PC, then return the address of the
    instruction immediately past this sequence.  Otherwise, return START_PC.  */
@@ -2250,7 +2250,7 @@ rs6000_skip_main_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
     {
       CORE_ADDR displ = op & BL_DISPLACEMENT_MASK;
       CORE_ADDR call_dest = pc + 4 + displ;
-      struct bound_minimal_symbol s = lookup_minimal_symbol_by_pc (call_dest);
+      bound_minimal_symbol s = lookup_minimal_symbol_by_pc (call_dest);
 
       /* We check for ___eabi (three leading underscores) in addition
 	 to __eabi in case the GCC option "-fleading-underscore" was
@@ -2324,7 +2324,6 @@ rs6000_skip_trampoline_code (const frame_info_ptr &frame, CORE_ADDR pc)
   unsigned int ii, op;
   int rel;
   CORE_ADDR solib_target_pc;
-  struct bound_minimal_symbol msymbol;
 
   static unsigned trampoline_code[] =
   {
@@ -2339,7 +2338,7 @@ rs6000_skip_trampoline_code (const frame_info_ptr &frame, CORE_ADDR pc)
   };
 
   /* Check for bigtoc fixup code.  */
-  msymbol = lookup_minimal_symbol_by_pc (pc);
+  bound_minimal_symbol msymbol = lookup_minimal_symbol_by_pc (pc);
   if (msymbol.minsym
       && rs6000_in_solib_return_trampoline (gdbarch, pc,
 					    msymbol.minsym->linkage_name ()))
@@ -4299,7 +4298,7 @@ ppc_record_ACC_fpscr (struct regcache *regcache, ppc_gdbarch_tdep *tdep,
 	 ACC[7][3] -> VSR[31]
 
      NOTE:
-     In ISA 3.1 the ACC is mapped on top of VSR[0] thru VSR[31].
+     In ISA 3.1 the ACC is mapped on top of VSR[0] through VSR[31].
 
      In the future, the ACC may be implemented as an independent register file
      rather than mapping on top of the VSRs.  This will then require the ACC to
@@ -8604,7 +8603,7 @@ powerpc_set_soft_float (const char *args, int from_tty,
   struct gdbarch_info info;
 
   /* Update the architecture.  */
-  if (!gdbarch_update_p (info))
+  if (!gdbarch_update_p (current_inferior (), info))
     internal_error (_("could not update architecture"));
 }
 
@@ -8630,7 +8629,7 @@ powerpc_set_vector_abi (const char *args, int from_tty,
 
   /* Update the architecture.  */
   gdbarch_info info;
-  if (!gdbarch_update_p (info))
+  if (!gdbarch_update_p (current_inferior (), info))
     internal_error (_("could not update architecture"));
 }
 
diff --git a/gdb/run-on-main-thread.c b/gdb/run-on-main-thread.c
index e30daba..746ea35 100644
--- a/gdb/run-on-main-thread.c
+++ b/gdb/run-on-main-thread.c
@@ -74,7 +74,20 @@ run_events (int error, gdb_client_data client_data)
 	{
 	  item ();
 	}
-      catch (...)
+      catch (const gdb_exception_forced_quit &e)
+	{
+	  /* GDB is terminating, so:
+	     - make sure this is propagated, and
+	     - no need to keep running things, so propagate immediately.  */
+	  throw;
+	}
+      catch (const gdb_exception_quit &e)
+	{
+	  /* Should cancelation of a runnable event cancel the execution of
+	     the following one?  The answer is not clear, so keep doing what
+	     we've done so far: ignore this exception.  */
+	}
+      catch (const gdb_exception &)
 	{
 	  /* Ignore exceptions in the callback.  */
 	}
diff --git a/gdb/rust-lang.h b/gdb/rust-lang.h
index 9ae5961..866d1ac 100644
--- a/gdb/rust-lang.h
+++ b/gdb/rust-lang.h
@@ -45,7 +45,7 @@ extern const char *rust_last_path_segment (const char *path);
 
 /* Create a new slice type.  NAME is the name of the type.  ELT_TYPE
    is the type of the elements of the slice.  USIZE_TYPE is the Rust
-   "usize" type to use.  The new type is allocated whereever ELT_TYPE
+   "usize" type to use.  The new type is allocated wherever ELT_TYPE
    is allocated.  */
 extern struct type *rust_slice_type (const char *name, struct type *elt_type,
 				     struct type *usize_type);
diff --git a/gdb/s390-tdep.c b/gdb/s390-tdep.c
index 6687127..064cf68 100644
--- a/gdb/s390-tdep.c
+++ b/gdb/s390-tdep.c
@@ -1897,7 +1897,7 @@ s390_handle_arg (struct s390_arg_state *as, struct value *arg,
    for S/390 ELF Application Binary Interface Supplement".
 
    SP is the current stack pointer.  We must put arguments, links,
-   padding, etc. whereever they belong, and return the new stack
+   padding, etc. wherever they belong, and return the new stack
    pointer value.
 
    If STRUCT_RETURN is non-zero, then the function we're calling is
diff --git a/gdb/ser-base.c b/gdb/ser-base.c
index 81ef942..838560e 100644
--- a/gdb/ser-base.c
+++ b/gdb/ser-base.c
@@ -148,7 +148,7 @@ run_async_handler_and_reschedule (struct serial *scb)
 /* FD_EVENT: This is scheduled when the input FIFO is empty (and there
    is no pending error).  As soon as data arrives, it is read into the
    input FIFO and the client notified.  The client should then drain
-   the FIFO using readchar().  If the FIFO isn't immediatly emptied,
+   the FIFO using readchar().  If the FIFO isn't immediately emptied,
    push_event() is used to nag the client until it is.  */
 
 static void
@@ -419,7 +419,7 @@ do_ser_base_readchar (struct serial *scb, int timeout)
    pre-reads the input into that FIFO.  Once that has been emptied,
    further data is obtained by polling the input FD using the device
    specific readchar() function.  Note: reschedule() is called after
-   every read.  This is because there is no guarentee that the lower
+   every read.  This is because there is no guarantee that the lower
    level fd_event() poll_event() code (which also calls reschedule())
    will be called.  */
 
diff --git a/gdb/sh-tdep.c b/gdb/sh-tdep.c
index 0dbb905..d211265 100644
--- a/gdb/sh-tdep.c
+++ b/gdb/sh-tdep.c
@@ -1057,7 +1057,7 @@ sh_push_dummy_call_fpu (struct gdbarch *gdbarch,
 
   /* Now load as many as possible of the first arguments into
      registers, and push the rest onto the stack.  There are 16 bytes
-     in four registers available.  Loop thru args from first to last.  */
+     in four registers available.  Loop through args from first to last.  */
   for (argnum = 0; argnum < nargs; argnum++)
     {
       type = args[argnum]->type ();
@@ -1195,7 +1195,7 @@ sh_push_dummy_call_nofpu (struct gdbarch *gdbarch,
 
   /* Now load as many as possible of the first arguments into
      registers, and push the rest onto the stack.  There are 16 bytes
-     in four registers available.  Loop thru args from first to last.  */
+     in four registers available.  Loop through args from first to last.  */
   for (argnum = 0; argnum < nargs; argnum++)
     {
       type = args[argnum]->type ();
@@ -2171,7 +2171,7 @@ sh_corefile_collect_regset (const struct regset *regset,
 }
 
 /* The following two regsets have the same contents, so it is tempting to
-   unify them, but they are distiguished by their address, so don't.  */
+   unify them, but they are distinguished by their address, so don't.  */
 
 const struct regset sh_corefile_gregset =
 {
diff --git a/gdb/skip.c b/gdb/skip.c
index 72f4efd..3791c29 100644
--- a/gdb/skip.c
+++ b/gdb/skip.c
@@ -684,7 +684,7 @@ Ignore a file while stepping.\n\
 Usage: skip file [FILE-NAME]\n\
 If no filename is given, ignore the current file."),
 	       &skiplist);
-  set_cmd_completer (c, filename_completer);
+  set_cmd_completer (c, deprecated_filename_completer);
 
   c = add_cmd ("function", class_breakpoint, skip_function_command, _("\
 Ignore a function while stepping.\n\
diff --git a/gdb/sol-thread.c b/gdb/sol-thread.c
index 77740fe..db86079 100644
--- a/gdb/sol-thread.c
+++ b/gdb/sol-thread.c
@@ -759,9 +759,8 @@ ps_err_e
 ps_pglobal_lookup (struct ps_prochandle *ph, const char *ld_object_name,
 		   const char *ld_symbol_name, psaddr_t *ld_symbol_addr)
 {
-  struct bound_minimal_symbol ms;
-
-  ms = lookup_minimal_symbol (ld_symbol_name, NULL, NULL);
+  bound_minimal_symbol ms
+    = lookup_minimal_symbol (current_program_space, ld_symbol_name);
   if (!ms.minsym)
     return PS_NOSYM;
 
@@ -1068,7 +1067,7 @@ info_cb (const td_thrhandle_t *th, void *s)
       /* Print thr_create start function.  */
       if (ti.ti_startfunc != 0)
 	{
-	  const struct bound_minimal_symbol msym
+	  const bound_minimal_symbol msym
 	    = lookup_minimal_symbol_by_pc (ti.ti_startfunc);
 
 	  gdb_printf ("   startfunc=%s",
@@ -1081,7 +1080,7 @@ info_cb (const td_thrhandle_t *th, void *s)
       /* If thread is asleep, print function that went to sleep.  */
       if (ti.ti_state == TD_THR_SLEEP)
 	{
-	  const struct bound_minimal_symbol msym
+	  const bound_minimal_symbol msym
 	    = lookup_minimal_symbol_by_pc (ti.ti_pc);
 
 	  gdb_printf ("   sleepfunc=%s",
diff --git a/gdb/sol2-tdep.c b/gdb/sol2-tdep.c
index 468b132..0beab74 100644
--- a/gdb/sol2-tdep.c
+++ b/gdb/sol2-tdep.c
@@ -63,9 +63,8 @@ sol2_sigtramp_p (const frame_info_ptr &this_frame)
 static CORE_ADDR
 sol2_skip_solib_resolver (struct gdbarch *gdbarch, CORE_ADDR pc)
 {
-  struct bound_minimal_symbol msym;
-
-  msym = lookup_minimal_symbol("elf_bndr", NULL, NULL);
+  bound_minimal_symbol msym
+    = lookup_minimal_symbol (current_program_space, "elf_bndr");
   if (msym.minsym && msym.value_address () == pc)
     return frame_unwind_caller_pc (get_current_frame ());
 
diff --git a/gdb/solib-aix.c b/gdb/solib-aix.c
index a50bb16..926f1ed 100644
--- a/gdb/solib-aix.c
+++ b/gdb/solib-aix.c
@@ -444,7 +444,7 @@ solib_aix_solib_create_inferior_hook (int from_tty)
 
 /* Implement the "current_sos" solib_ops method.  */
 
-static intrusive_list<solib>
+static owning_intrusive_list<solib>
 solib_aix_current_sos ()
 {
   std::optional<std::vector<lm_info_aix>> &library_list
@@ -452,14 +452,13 @@ solib_aix_current_sos ()
   if (!library_list.has_value ())
     return {};
 
-  intrusive_list<solib> sos;
+  owning_intrusive_list<solib> sos;
 
   /* Build a struct solib for each entry on the list.
      We skip the first entry, since this is the entry corresponding
      to the main executable, not a shared library.  */
   for (int ix = 1; ix < library_list->size (); ix++)
     {
-      solib *new_solib = new solib;
       std::string so_name;
 
       lm_info_aix &info = (*library_list)[ix];
@@ -481,12 +480,11 @@ solib_aix_current_sos ()
 				  info.member_name.c_str ());
 	}
 
-      new_solib->so_original_name = so_name;
-      new_solib->so_name = so_name;
-      new_solib->lm_info = std::make_unique<lm_info_aix> (info);
-
       /* Add it to the list.  */
-      sos.push_back (*new_solib);
+      auto &new_solib = sos.emplace_back ();
+      new_solib.so_original_name = so_name;
+      new_solib.so_name = so_name;
+      new_solib.lm_info = std::make_unique<lm_info_aix> (info);
     }
 
   return sos;
@@ -689,6 +687,11 @@ const solib_ops solib_aix_so_ops =
   solib_aix_open_symbol_file_object,
   solib_aix_in_dynsym_resolve_code,
   solib_aix_bfd_open,
+  nullptr,
+  nullptr,
+  nullptr,
+  nullptr,
+  default_find_solib_addr,
 };
 
 void _initialize_solib_aix ();
diff --git a/gdb/solib-darwin.c b/gdb/solib-darwin.c
index dd4da93..6c7d906 100644
--- a/gdb/solib-darwin.c
+++ b/gdb/solib-darwin.c
@@ -212,7 +212,7 @@ open_symbol_file_object (int from_tty)
 
 /* Build a list of currently loaded shared objects.  See solib-svr4.c.  */
 
-static intrusive_list<solib>
+static owning_intrusive_list<solib>
 darwin_current_sos ()
 {
   type *ptr_type
@@ -230,7 +230,7 @@ darwin_current_sos ()
 
   image_info_size = ptr_len * 3;
 
-  intrusive_list<solib> sos;
+  owning_intrusive_list<solib> sos;
 
   /* Read infos for each solib.
      The first entry was rumored to be the executable itself, but this is not
@@ -272,16 +272,15 @@ darwin_current_sos ()
 	break;
 
       /* Create and fill the new struct solib element.  */
-      solib *newobj = new solib;
+      auto &newobj = sos.emplace_back ();
 
       auto li = std::make_unique<lm_info_darwin> ();
 
-      newobj->so_name = file_path.get ();
-      newobj->so_original_name = newobj->so_name;
+      newobj.so_name = file_path.get ();
+      newobj.so_original_name = newobj.so_name;
       li->lm_addr = load_addr;
 
-      newobj->lm_info = std::move (li);
-      sos.push_back (*newobj);
+      newobj.lm_info = std::move (li);
     }
 
   return sos;
@@ -665,4 +664,9 @@ const solib_ops darwin_so_ops =
   open_symbol_file_object,
   darwin_in_dynsym_resolve_code,
   darwin_bfd_open,
+  nullptr,
+  nullptr,
+  nullptr,
+  nullptr,
+  default_find_solib_addr,
 };
diff --git a/gdb/solib-dsbt.c b/gdb/solib-dsbt.c
index 908c78a..360aede 100644
--- a/gdb/solib-dsbt.c
+++ b/gdb/solib-dsbt.c
@@ -434,7 +434,6 @@ static CORE_ADDR
 lm_base (void)
 {
   bfd_endian byte_order = gdbarch_byte_order (current_inferior ()->arch ());
-  struct bound_minimal_symbol got_sym;
   CORE_ADDR addr;
   gdb_byte buf[TIC6X_PTR_SIZE];
   dsbt_info *info = get_dsbt_info (current_program_space);
@@ -451,8 +450,9 @@ lm_base (void)
   if (info->lm_base_cache)
     return info->lm_base_cache;
 
-  got_sym = lookup_minimal_symbol ("_GLOBAL_OFFSET_TABLE_", NULL,
-				   current_program_space->symfile_object_file);
+  bound_minimal_symbol got_sym
+    = lookup_minimal_symbol (current_program_space, "_GLOBAL_OFFSET_TABLE_",
+			     current_program_space->symfile_object_file);
 
   if (got_sym.minsym != 0)
     {
@@ -512,13 +512,13 @@ lm_base (void)
    themselves.  The declaration of `struct solib' says which fields
    we provide values for.  */
 
-static intrusive_list<solib>
+static owning_intrusive_list<solib>
 dsbt_current_sos (void)
 {
   bfd_endian byte_order = gdbarch_byte_order (current_inferior ()->arch ());
   CORE_ADDR lm_addr;
   dsbt_info *info = get_dsbt_info (current_program_space);
-  intrusive_list<solib> sos;
+  owning_intrusive_list<solib> sos;
 
   /* Make sure that the main executable has been relocated.  This is
      required in order to find the address of the global offset table,
@@ -594,7 +594,7 @@ dsbt_current_sos (void)
 	      break;
 	    }
 
-	  solib *sop = new solib;
+	  auto &sop = sos.emplace_back ();
 	  auto li = std::make_unique<lm_info_dsbt> ();
 	  li->map = loadmap;
 	  /* Fetch the name.  */
@@ -612,12 +612,11 @@ dsbt_current_sos (void)
 		gdb_printf (gdb_stdlog, "current_sos: name = %s\n",
 			    name_buf.get ());
 
-	      sop->so_name = name_buf.get ();
-	      sop->so_original_name = sop->so_name;
+	      sop.so_name = name_buf.get ();
+	      sop.so_original_name = sop.so_name;
 	    }
 
-	  sop->lm_info = std::move (li);
-	  sos.push_back (*sop);
+	  sop.lm_info = std::move (li);
 	}
       else
 	{
@@ -914,6 +913,11 @@ const solib_ops dsbt_so_ops =
   open_symbol_file_object,
   dsbt_in_dynsym_resolve_code,
   solib_bfd_open,
+  nullptr,
+  nullptr,
+  nullptr,
+  nullptr,
+  default_find_solib_addr,
 };
 
 void _initialize_dsbt_solib ();
diff --git a/gdb/solib-frv.c b/gdb/solib-frv.c
index f84ff89..25873e6 100644
--- a/gdb/solib-frv.c
+++ b/gdb/solib-frv.c
@@ -264,7 +264,6 @@ static CORE_ADDR
 lm_base (void)
 {
   bfd_endian byte_order = gdbarch_byte_order (current_inferior ()->arch ());
-  struct bound_minimal_symbol got_sym;
   CORE_ADDR addr;
   gdb_byte buf[FRV_PTR_SIZE];
 
@@ -280,8 +279,9 @@ lm_base (void)
   if (lm_base_cache)
     return lm_base_cache;
 
-  got_sym = lookup_minimal_symbol ("_GLOBAL_OFFSET_TABLE_", NULL,
-				   current_program_space->symfile_object_file);
+  bound_minimal_symbol got_sym
+    = lookup_minimal_symbol (current_program_space, "_GLOBAL_OFFSET_TABLE_",
+			     current_program_space->symfile_object_file);
   if (got_sym.minsym == 0)
     {
       solib_debug_printf ("_GLOBAL_OFFSET_TABLE_ not found.");
@@ -306,12 +306,12 @@ lm_base (void)
 
 /* Implement the "current_sos" solib_ops method.  */
 
-static intrusive_list<solib>
+static owning_intrusive_list<solib>
 frv_current_sos ()
 {
   bfd_endian byte_order = gdbarch_byte_order (current_inferior ()->arch ());
   CORE_ADDR lm_addr, mgot;
-  intrusive_list<solib> sos;
+  owning_intrusive_list<solib> sos;
 
   /* Make sure that the main executable has been relocated.  This is
      required in order to find the address of the global offset table,
@@ -377,12 +377,12 @@ frv_current_sos ()
 	      break;
 	    }
 
-	  solib *sop = new solib;
+	  auto &sop = sos.emplace_back ();
 	  auto li = std::make_unique<lm_info_frv> ();
 	  li->map = loadmap;
 	  li->got_value = got_addr;
 	  li->lm_addr = lm_addr;
-	  sop->lm_info = std::move (li);
+	  sop.lm_info = std::move (li);
 
 	  /* Fetch the name.  */
 	  addr = extract_unsigned_integer (lm_buf.l_name,
@@ -397,11 +397,9 @@ frv_current_sos ()
 	    warning (_("Can't read pathname for link map entry."));
 	  else
 	    {
-	      sop->so_name = name_buf.get ();
-	      sop->so_original_name = sop->so_name;
+	      sop.so_name = name_buf.get ();
+	      sop.so_original_name = sop.so_name;
 	    }
-
-	  sos.push_back (*sop);
 	}
       else
 	{
@@ -840,10 +838,10 @@ frv_relocate_section_addresses (solib &so, target_section *sec)
 static CORE_ADDR
 main_got (void)
 {
-  struct bound_minimal_symbol got_sym;
-
   objfile *objf = current_program_space->symfile_object_file;
-  got_sym = lookup_minimal_symbol ("_GLOBAL_OFFSET_TABLE_", NULL, objf);
+  bound_minimal_symbol got_sym
+    = lookup_minimal_symbol (current_program_space, "_GLOBAL_OFFSET_TABLE_",
+			     objf);
   if (got_sym.minsym == 0)
     return 0;
 
@@ -1086,4 +1084,9 @@ const solib_ops frv_so_ops =
   open_symbol_file_object,
   frv_in_dynsym_resolve_code,
   solib_bfd_open,
+  nullptr,
+  nullptr,
+  nullptr,
+  nullptr,
+  default_find_solib_addr,
 };
diff --git a/gdb/solib-rocm.c b/gdb/solib-rocm.c
index 9b995c7..156b36a 100644
--- a/gdb/solib-rocm.c
+++ b/gdb/solib-rocm.c
@@ -204,20 +204,18 @@ rocm_solib_handle_event ()
 
 /* Create so_list objects from rocm_so objects in SOS.  */
 
-static intrusive_list<solib>
+static owning_intrusive_list<solib>
 so_list_from_rocm_sos (const std::vector<rocm_so> &sos)
 {
-  intrusive_list<solib> dst;
+  owning_intrusive_list<solib> dst;
 
   for (const rocm_so &so : sos)
     {
-      solib *newobj = new solib;
-      newobj->lm_info = std::make_unique<lm_info_svr4> (*so.lm_info);
+      auto &newobj = dst.emplace_back ();
 
-      newobj->so_name = so.name;
-      newobj->so_original_name = so.unique_name;
-
-      dst.push_back (*newobj);
+      newobj.lm_info = std::make_unique<lm_info_svr4> (*so.lm_info);
+      newobj.so_name = so.name;
+      newobj.so_original_name = so.unique_name;
     }
 
   return dst;
@@ -226,11 +224,11 @@ so_list_from_rocm_sos (const std::vector<rocm_so> &sos)
 /* Build a list of `struct solib' objects describing the shared
    objects currently loaded in the inferior.  */
 
-static intrusive_list<solib>
+static owning_intrusive_list<solib>
 rocm_solib_current_sos ()
 {
   /* First, retrieve the host-side shared library list.  */
-  intrusive_list<solib> sos = svr4_so_ops.current_sos ();
+  owning_intrusive_list<solib> sos = svr4_so_ops.current_sos ();
 
   /* Then, the device-side shared library list.  */
   std::vector<rocm_so> &dev_sos = get_solib_info (current_inferior ())->solib_list;
@@ -238,7 +236,7 @@ rocm_solib_current_sos ()
   if (dev_sos.empty ())
     return sos;
 
-  intrusive_list<solib> dev_so_list = so_list_from_rocm_sos (dev_sos);
+  owning_intrusive_list<solib> dev_so_list = so_list_from_rocm_sos (dev_sos);
 
   if (sos.empty ())
     return dev_so_list;
diff --git a/gdb/solib-svr4.c b/gdb/solib-svr4.c
index 9f377f4..7999a8e 100644
--- a/gdb/solib-svr4.c
+++ b/gdb/solib-svr4.c
@@ -619,7 +619,7 @@ find_program_interpreter (void)
 
 
 /* Scan for DESIRED_DYNTAG in .dynamic section of the target's main executable,
-   found by consulting the OS auxillary vector.  If DESIRED_DYNTAG is found, 1
+   found by consulting the OS auxiliary vector.  If DESIRED_DYNTAG is found, 1
    is returned and the corresponding PTR is set.  */
 
 static int
@@ -695,7 +695,6 @@ scan_dyntag_auxv (const int desired_dyntag, CORE_ADDR *ptr,
 static CORE_ADDR
 elf_locate_base (void)
 {
-  struct bound_minimal_symbol msymbol;
   CORE_ADDR dyn_ptr, dyn_ptr_addr;
 
   if (!svr4_have_link_map_offsets ())
@@ -751,8 +750,9 @@ elf_locate_base (void)
 
   /* This may be a static executable.  Look for the symbol
      conventionally named _r_debug, as a last resort.  */
-  msymbol = lookup_minimal_symbol ("_r_debug", NULL,
-				   current_program_space->symfile_object_file);
+  bound_minimal_symbol msymbol
+    = lookup_minimal_symbol (current_program_space, "_r_debug",
+			     current_program_space->symfile_object_file);
   if (msymbol.minsym != NULL)
     return msymbol.value_address ();
 
@@ -991,20 +991,18 @@ svr4_clear_so (const solib &so)
 
 /* Create the so_list objects equivalent to the svr4_sos in SOS.  */
 
-static intrusive_list<solib>
+static owning_intrusive_list<solib>
 so_list_from_svr4_sos (const std::vector<svr4_so> &sos)
 {
-  intrusive_list<solib> dst;
+  owning_intrusive_list<solib> dst;
 
   for (const svr4_so &so : sos)
     {
-      struct solib *newobj = new struct solib;
+      auto &newobj = dst.emplace_back ();
 
-      newobj->so_name = so.name;
-      newobj->so_original_name = so.name;
-      newobj->lm_info = std::make_unique<lm_info_svr4> (*so.lm_info);
-
-      dst.push_back (*newobj);
+      newobj.so_name = so.name;
+      newobj.so_original_name = so.name;
+      newobj.lm_info = std::make_unique<lm_info_svr4> (*so.lm_info);
     }
 
   return dst;
@@ -1184,25 +1182,24 @@ svr4_current_sos_via_xfer_libraries (struct svr4_library_list *list,
 /* If no shared library information is available from the dynamic
    linker, build a fallback list from other sources.  */
 
-static intrusive_list<solib>
+static owning_intrusive_list<solib>
 svr4_default_sos (svr4_info *info)
 {
   if (!info->debug_loader_offset_p)
     return {};
 
-  solib *newobj = new solib;
   auto li = std::make_unique<lm_info_svr4> ();
 
   /* Nothing will ever check the other fields if we set l_addr_p.  */
   li->l_addr = li->l_addr_inferior = info->debug_loader_offset;
   li->l_addr_p = 1;
 
-  newobj->lm_info = std::move (li);
-  newobj->so_name = info->debug_loader_name;
-  newobj->so_original_name = newobj->so_name;
+  owning_intrusive_list<solib> sos;
+  auto &newobj = sos.emplace_back ();
 
-  intrusive_list<solib> sos;
-  sos.push_back (*newobj);
+  newobj.lm_info = std::move (li);
+  newobj.so_name = info->debug_loader_name;
+  newobj.so_original_name = newobj.so_name;
 
   return sos;
 }
@@ -1373,10 +1370,10 @@ svr4_current_sos_direct (struct svr4_info *info)
 
 /* Collect sos read and stored by the probes interface.  */
 
-static intrusive_list<solib>
+static owning_intrusive_list<solib>
 svr4_collect_probes_sos (svr4_info *info)
 {
-  intrusive_list<solib> res;
+  owning_intrusive_list<solib> res;
 
   for (const auto &tuple : info->solib_lists)
     {
@@ -1390,10 +1387,10 @@ svr4_collect_probes_sos (svr4_info *info)
 /* Implement the main part of the "current_sos" solib_ops
    method.  */
 
-static intrusive_list<solib>
+static owning_intrusive_list<solib>
 svr4_current_sos_1 (svr4_info *info)
 {
-  intrusive_list<solib> sos;
+  owning_intrusive_list<solib> sos;
 
   /* If we're using the probes interface, we can use the cache as it will
      be maintained by probe update/reload actions.  */
@@ -1417,11 +1414,11 @@ svr4_current_sos_1 (svr4_info *info)
 
 /* Implement the "current_sos" solib_ops method.  */
 
-static intrusive_list<solib>
+static owning_intrusive_list<solib>
 svr4_current_sos ()
 {
   svr4_info *info = get_svr4_info (current_program_space);
-  intrusive_list<solib> sos = svr4_current_sos_1 (info);
+  owning_intrusive_list<solib> sos = svr4_current_sos_1 (info);
   struct mem_range vsyscall_range;
 
   /* Filter out the vDSO module, if present.  Its symbol file would
@@ -1478,9 +1475,7 @@ svr4_current_sos ()
 
 	  if (vsyscall_range.contains (li->l_ld))
 	    {
-	      auto next = sos.erase (so);
-	      delete &*so;
-	      so = next;
+	      so = sos.erase (so);
 	      break;
 	    }
 
@@ -1948,7 +1943,7 @@ svr4_handle_solib_event (void)
 	  {
 	    link_map_id_val = pa->prob->evaluate_argument (0, frame);
 	  }
-	catch (const gdb_exception_error)
+	catch (const gdb_exception_error &)
 	  {
 	    link_map_id_val = NULL;
 	  }
@@ -2227,7 +2222,6 @@ svr4_create_solib_event_breakpoints (svr4_info *info, struct gdbarch *gdbarch,
 static int
 enable_break (struct svr4_info *info, int from_tty)
 {
-  struct bound_minimal_symbol msymbol;
   const char * const *bkpt_namep;
   asection *interp_sect;
   CORE_ADDR sym_addr;
@@ -2361,7 +2355,7 @@ enable_break (struct svr4_info *info, int from_tty)
 	}
 
       /* If we were not able to find the base address of the loader
-	 from our so_list, then try using the AT_BASE auxilliary entry.  */
+	 from our so_list, then try using the AT_BASE auxiliary entry.  */
       if (!load_addr_found)
 	if (target_auxv_search (AT_BASE, &load_addr) > 0)
 	  {
@@ -2482,7 +2476,8 @@ enable_break (struct svr4_info *info, int from_tty)
   objfile *objf = current_program_space->symfile_object_file;
   for (bkpt_namep = solib_break_names; *bkpt_namep != NULL; bkpt_namep++)
     {
-      msymbol = lookup_minimal_symbol (*bkpt_namep, NULL, objf);
+      bound_minimal_symbol msymbol
+	= lookup_minimal_symbol (current_program_space, *bkpt_namep, objf);
       if ((msymbol.minsym != NULL)
 	  && (msymbol.value_address () != 0))
 	{
@@ -2501,7 +2496,8 @@ enable_break (struct svr4_info *info, int from_tty)
     {
       for (bkpt_namep = bkpt_names; *bkpt_namep != NULL; bkpt_namep++)
 	{
-	  msymbol = lookup_minimal_symbol (*bkpt_namep, NULL, objf);
+	  bound_minimal_symbol msymbol
+	    = lookup_minimal_symbol (current_program_space, *bkpt_namep, objf);
 	  if ((msymbol.minsym != NULL)
 	      && (msymbol.value_address () != 0))
 	    {
@@ -2620,8 +2616,8 @@ svr4_exec_displacement (CORE_ADDR *displacementp)
 	return 0;
     }
 
-  /* Verify that the auxilliary vector describes the same file as exec_bfd, by
-     comparing their program headers.  If the program headers in the auxilliary
+  /* Verify that the auxiliary vector describes the same file as exec_bfd, by
+     comparing their program headers.  If the program headers in the auxiliary
      vector do not match the program headers in the executable, then we are
      looking at a different file than the one used by the kernel - for
      instance, "gdb program" connected to "gdbserver :PORT ld.so program".  */
@@ -3354,6 +3350,15 @@ svr4_iterate_over_objfiles_in_search_order
     }
 }
 
+/* See solib_ops::find_solib_addr in solist.h.  */
+
+static std::optional<CORE_ADDR>
+svr4_find_solib_addr (solib &so)
+{
+  auto *li = gdb::checked_static_cast<lm_info_svr4 *> (so.lm_info.get ());
+  return li->l_addr_inferior;
+}
+
 const struct solib_ops svr4_so_ops =
 {
   svr4_relocate_section_addresses,
@@ -3364,11 +3369,11 @@ const struct solib_ops svr4_so_ops =
   open_symbol_file_object,
   svr4_in_dynsym_resolve_code,
   solib_bfd_open,
-  nullptr,
   svr4_same,
   svr4_keep_data_in_core,
   svr4_update_solib_event_breakpoints,
   svr4_handle_solib_event,
+  svr4_find_solib_addr,
 };
 
 void _initialize_svr4_solib ();
diff --git a/gdb/solib-target.c b/gdb/solib-target.c
index 6563da0..8f73d5d 100644
--- a/gdb/solib-target.c
+++ b/gdb/solib-target.c
@@ -226,10 +226,10 @@ solib_target_parse_libraries (const char *library)
 }
 #endif
 
-static intrusive_list<solib>
+static owning_intrusive_list<solib>
 solib_target_current_sos (void)
 {
-  intrusive_list<solib> sos;
+  owning_intrusive_list<solib> sos;
 
   /* Fetch the list of shared libraries.  */
   std::optional<gdb::char_vector> library_document
@@ -245,15 +245,12 @@ solib_target_current_sos (void)
   /* Build a struct solib for each entry on the list.  */
   for (lm_info_target_up &info : library_list)
     {
-      solib *new_solib = new solib;
+      auto &new_solib = sos.emplace_back ();
 
       /* We don't need a copy of the name in INFO anymore.  */
-      new_solib->so_name = std::move (info->name);
-      new_solib->so_original_name = new_solib->so_name;
-      new_solib->lm_info = std::move (info);
-
-      /* Add it to the list.  */
-      sos.push_back (*new_solib);
+      new_solib.so_name = std::move (info->name);
+      new_solib.so_original_name = new_solib.so_name;
+      new_solib.lm_info = std::move (info);
     }
 
   return sos;
@@ -412,4 +409,9 @@ const solib_ops solib_target_so_ops =
   solib_target_open_symbol_file_object,
   solib_target_in_dynsym_resolve_code,
   solib_bfd_open,
+  nullptr,
+  nullptr,
+  nullptr,
+  nullptr,
+  default_find_solib_addr,
 };
diff --git a/gdb/solib.c b/gdb/solib.c
index 931fa57..5c926de 100644
--- a/gdb/solib.c
+++ b/gdb/solib.c
@@ -46,7 +46,6 @@
 #include "gdb_bfd.h"
 #include "gdbsupport/filestuff.h"
 #include "gdbsupport/scoped_fd.h"
-#include "debuginfod-support.h"
 #include "source.h"
 #include "cli/cli-style.h"
 
@@ -114,7 +113,6 @@ show_solib_search_path (struct ui_file *file, int from_tty,
 static gdb::unique_xmalloc_ptr<char>
 solib_find_1 (const char *in_pathname, int *fd, bool is_solib)
 {
-  const solib_ops *ops = gdbarch_so_ops (current_inferior ()->arch ());
   int found_file = -1;
   gdb::unique_xmalloc_ptr<char> temp_pathname;
   const char *fskind = effective_target_file_system_kind ();
@@ -297,12 +295,6 @@ solib_find_1 (const char *in_pathname, int *fd, bool is_solib)
 			target_lbasename (fskind, in_pathname),
 			O_RDONLY | O_BINARY, &temp_pathname);
 
-  /* If not found, and we're looking for a solib, try to use target
-     supplied solib search method.  */
-  if (is_solib && found_file < 0 && ops->find_and_open_solib)
-    found_file = ops->find_and_open_solib (in_pathname, O_RDONLY | O_BINARY,
-					   &temp_pathname);
-
   /* If not found, next search the inferior's $PATH environment variable.  */
   if (found_file < 0 && sysroot == NULL)
     found_file = openp (current_inferior ()->environment.get ("PATH"),
@@ -476,58 +468,6 @@ solib_bfd_open (const char *pathname)
   return abfd;
 }
 
-/* Mapping of a core file's shared library sonames to their respective
-   build-ids.  Added to the registries of core file bfds.  */
-
-typedef std::unordered_map<std::string, std::string> soname_build_id_map;
-
-/* Key used to associate a soname_build_id_map to a core file bfd.  */
-
-static const struct registry<bfd>::key<soname_build_id_map>
-  cbfd_soname_build_id_data_key;
-
-/* See solib.h.  */
-
-void
-set_cbfd_soname_build_id (gdb_bfd_ref_ptr abfd, const char *soname,
-			  const bfd_build_id *build_id)
-{
-  gdb_assert (abfd.get () != nullptr);
-  gdb_assert (soname != nullptr);
-  gdb_assert (build_id != nullptr);
-
-  soname_build_id_map *mapptr
-    = cbfd_soname_build_id_data_key.get (abfd.get ());
-
-  if (mapptr == nullptr)
-    mapptr = cbfd_soname_build_id_data_key.emplace (abfd.get ());
-
-  (*mapptr)[soname] = build_id_to_string (build_id);
-}
-
-/* If SONAME had a build-id associated with it in ABFD's registry by a
-   previous call to set_cbfd_soname_build_id then return the build-id
-   as a NULL-terminated hex string.  */
-
-static gdb::unique_xmalloc_ptr<char>
-get_cbfd_soname_build_id (gdb_bfd_ref_ptr abfd, const char *soname)
-{
-  if (abfd.get () == nullptr || soname == nullptr)
-    return {};
-
-  soname_build_id_map *mapptr
-    = cbfd_soname_build_id_data_key.get (abfd.get ());
-
-  if (mapptr == nullptr)
-    return {};
-
-  auto it = mapptr->find (lbasename (soname));
-  if (it == mapptr->end ())
-    return {};
-
-  return make_unique_xstrdup (it->second.c_str ());
-}
-
 /* Given a pointer to one of the shared objects in our list of mapped
    objects, use the recorded name to open a bfd descriptor for the
    object, build a section table, relocate all the section addresses
@@ -547,36 +487,54 @@ solib_map_sections (solib &so)
 
   gdb::unique_xmalloc_ptr<char> filename (tilde_expand (so.so_name.c_str ()));
   gdb_bfd_ref_ptr abfd (ops->bfd_open (filename.get ()));
-  gdb::unique_xmalloc_ptr<char> build_id_hexstr
-    = get_cbfd_soname_build_id (current_program_space->cbfd,
-				so.so_name.c_str ());
+
+  /* If we have a core target then the core target might have some helpful
+     information (i.e. build-ids) about the shared libraries we are trying
+     to load.  Grab those hints now and use the below to validate or find
+     the shared libraries.
+
+     If we don't have a core target then this will return an empty struct
+     with no hint information, we then lookup the shared library based on
+     its filename.  */
+  std::optional<CORE_ADDR> solib_addr = ops->find_solib_addr (so);
+  std::optional <const core_target_mapped_file_info> mapped_file_info
+    = core_target_find_mapped_file (so.so_name.c_str (), solib_addr);
 
   /* If we already know the build-id of this solib from a core file, verify
      it matches ABFD's build-id.  If there is a mismatch or the solib wasn't
      found, attempt to query debuginfod for the correct solib.  */
-  if (build_id_hexstr.get () != nullptr)
+  if (mapped_file_info.has_value ())
     {
-      bool mismatch = false;
+      bool mismatch = (abfd != nullptr
+		       && build_id_bfd_get (abfd.get ()) != nullptr
+		       && !build_id_equal (mapped_file_info->build_id (),
+					   build_id_bfd_get (abfd.get ())));
 
-      if (abfd != nullptr && abfd->build_id != nullptr)
-	{
-	  std::string build_id = build_id_to_string (abfd->build_id);
-
-	  if (build_id != build_id_hexstr.get ())
-	    mismatch = true;
-	}
       if (abfd == nullptr || mismatch)
 	{
-	  scoped_fd fd = debuginfod_exec_query (
-	    (const unsigned char *) build_id_hexstr.get (), 0,
-	    so.so_name.c_str (), &filename);
-
-	  if (fd.get () >= 0)
-	    abfd = ops->bfd_open (filename.get ());
-	  else if (mismatch)
-	    warning (_ ("Build-id of %ps does not match core file."),
-		     styled_string (file_name_style.style (),
-				    filename.get ()));
+	  /* If GDB found a suitable file during the file mapping
+	     processing stage then lets use that.  We don't check the
+	     build-id after opening this file, either this file was found
+	     by build-id, in which case it's going to match, or this file
+	     doesn't have a build-id, so checking tells us nothing.
+	     However, if it was good enough during the mapped file
+	     processing, we assume it's good enough now.  */
+	  if (!mapped_file_info->filename ().empty ())
+	    abfd = ops->bfd_open (mapped_file_info->filename ().c_str ());
+	  else
+	    abfd = nullptr;
+
+	  if (abfd == nullptr)
+	    abfd = find_objfile_by_build_id (mapped_file_info->build_id (),
+					     so.so_name.c_str ());
+
+	  if (abfd == nullptr && mismatch)
+	    {
+	      warning (_ ("Build-id of %ps does not match core file."),
+		       styled_string (file_name_style.style (),
+				      filename.get ()));
+	      abfd = nullptr;
+	    }
 	}
     }
 
@@ -797,8 +755,8 @@ update_solib_list (int from_tty)
      the time we're done walking GDB's list, the inferior's list
      contains only the new shared objects, which we then add.  */
 
-  intrusive_list<solib> inferior = ops->current_sos ();
-  intrusive_list<solib>::iterator gdb_iter
+  owning_intrusive_list<solib> inferior = ops->current_sos ();
+  owning_intrusive_list<solib>::iterator gdb_iter
     = current_program_space->so_list.begin ();
   while (gdb_iter != current_program_space->so_list.end ())
     {
@@ -827,7 +785,6 @@ update_solib_list (int from_tty)
       if (inferior_iter != inferior.end ())
 	{
 	  inferior.erase (inferior_iter);
-	  delete &*inferior_iter;
 	  ++gdb_iter;
 	}
 
@@ -840,9 +797,6 @@ update_solib_list (int from_tty)
 
 	  current_program_space->deleted_solibs.push_back (gdb_iter->so_name);
 
-	  intrusive_list<solib>::iterator gdb_iter_next
-	    = current_program_space->so_list.erase (gdb_iter);
-
 	  /* Unless the user loaded it explicitly, free SO's objfile.  */
 	  if (gdb_iter->objfile != nullptr
 	      && !(gdb_iter->objfile->flags & OBJF_USERLOADED)
@@ -853,8 +807,7 @@ update_solib_list (int from_tty)
 	     sections from so.abfd; remove them.  */
 	  current_program_space->remove_target_sections (&*gdb_iter);
 
-	  delete &*gdb_iter;
-	  gdb_iter = gdb_iter_next;
+	  gdb_iter = current_program_space->so_list.erase (gdb_iter);
 	}
     }
 
@@ -1193,11 +1146,13 @@ clear_solib (program_space *pspace)
 
   disable_breakpoints_in_shlibs (pspace);
 
-  pspace->so_list.clear_and_dispose ([pspace] (solib *so) {
-    notify_solib_unloaded (pspace, *so);
-    pspace->remove_target_sections (so);
-    delete so;
-  });
+  for (solib &so : pspace->so_list)
+    {
+      notify_solib_unloaded (pspace, so);
+      pspace->remove_target_sections (&so);
+    };
+
+  pspace->so_list.clear ();
 
   if (ops->clear_solib != nullptr)
     ops->clear_solib (pspace);
@@ -1715,6 +1670,14 @@ remove_user_added_objfile (struct objfile *objfile)
     }
 }
 
+/* See solist.h.  */
+
+std::optional<CORE_ADDR>
+default_find_solib_addr (solib &so)
+{
+  return {};
+}
+
 void _initialize_solib ();
 
 void
diff --git a/gdb/solib.h b/gdb/solib.h
index 25ed77c..eacff65 100644
--- a/gdb/solib.h
+++ b/gdb/solib.h
@@ -136,11 +136,4 @@ extern void update_solib_breakpoints (void);
 
 extern void handle_solib_event (void);
 
-/* Associate SONAME with BUILD_ID in ABFD's registry so that it can be
-   retrieved with get_cbfd_soname_build_id.  */
-
-extern void set_cbfd_soname_build_id (gdb_bfd_ref_ptr abfd,
-				      const char *soname,
-				      const bfd_build_id *build_id);
-
 #endif /* SOLIB_H */
diff --git a/gdb/solist.h b/gdb/solist.h
index f0d2208..336bb01 100644
--- a/gdb/solist.h
+++ b/gdb/solist.h
@@ -20,9 +20,11 @@
 #define SOLIST_H
 
 #define SO_NAME_MAX_PATH_SIZE 512	/* FIXME: Should be dynamic */
+
 /* For domain_enum domain.  */
 #include "symtab.h"
 #include "gdb_bfd.h"
+#include "gdbsupport/owning_intrusive_list.h"
 #include "target-section.h"
 
 /* Base class for target-specific link map information.  */
@@ -119,7 +121,7 @@ struct solib_ops
      inferior --- we don't examine any of the shared library files
      themselves.  The declaration of `struct solib' says which fields
      we provide values for.  */
-  intrusive_list<solib> (*current_sos) ();
+  owning_intrusive_list<solib> (*current_sos) ();
 
   /* Find, open, and read the symbols for the main executable.  If
      FROM_TTY is non-zero, allow messages to be printed.  */
@@ -132,14 +134,6 @@ struct solib_ops
   /* Find and open shared library binary file.  */
   gdb_bfd_ref_ptr (*bfd_open) (const char *pathname);
 
-  /* Optional extra hook for finding and opening a solib.
-     If TEMP_PATHNAME is non-NULL: If the file is successfully opened a
-     pointer to a malloc'd and realpath'd copy of SONAME is stored there,
-     otherwise NULL is stored there.  */
-  int (*find_and_open_solib) (const char *soname,
-			      unsigned o_flags,
-			      gdb::unique_xmalloc_ptr<char> *temp_pathname);
-
   /* Given two so_list objects, one from the GDB thread list
      and another from the list returned by current_sos, return 1
      if they represent the same library.
@@ -167,6 +161,23 @@ struct solib_ops
      NULL, in which case no specific preprocessing is necessary
      for this target.  */
   void (*handle_event) (void);
+
+  /* Return an address within the inferior's address space which is known
+     to be part of SO.  If there is no such address, or GDB doesn't know
+     how to figure out such an address then an empty optional is
+     returned.
+
+     The returned address can be used when loading the shared libraries
+     for a core file.  GDB knows the build-ids for (some) files mapped
+     into the inferior's address space, and knows the address ranges which
+     those mapped files cover.  If GDB can figure out a representative
+     address for the library then this can be used to match a library to a
+     mapped file, and thus to a build-id.  GDB can then use this
+     information to help locate the shared library objfile, if the objfile
+     is not in the expected place (as defined by the shared libraries file
+     name).  */
+
+  std::optional<CORE_ADDR> (*find_solib_addr) (solib &so);
 };
 
 /* A unique pointer to a so_list.  */
@@ -186,4 +197,9 @@ extern gdb_bfd_ref_ptr solib_bfd_fopen (const char *pathname, int fd);
 /* Find solib binary file and open it.  */
 extern gdb_bfd_ref_ptr solib_bfd_open (const char *in_pathname);
 
+/* A default implementation of the solib_ops::find_solib_addr callback.
+   This just returns an empty std::optional<CORE_ADDR> indicating GDB is
+   unable to find an address within the library SO.  */
+extern std::optional<CORE_ADDR> default_find_solib_addr (solib &so);
+
 #endif
diff --git a/gdb/source-cache.c b/gdb/source-cache.c
index 6af984f..f08c872 100644
--- a/gdb/source-cache.c
+++ b/gdb/source-cache.c
@@ -195,7 +195,7 @@ get_language_name (enum language lang)
 #endif /* HAVE_SOURCE_HIGHLIGHT */
 
 /* Try to highlight CONTENTS from file FULLNAME in language LANG using
-   the GNU source-higlight library.  Return true if highlighting
+   the GNU source-highlight library.  Return true if highlighting
    succeeded.  */
 
 static bool
@@ -282,6 +282,12 @@ static void gnu_source_highlight_test ()
     {
       res = try_source_highlight (styled_prog, language_c, fullname);
     }
+  catch (const gdb_exception &e)
+    {
+      if (e.reason != RETURN_ERROR)
+	throw;
+      saw_exception = true;
+    }
   catch (...)
     {
       saw_exception = true;
diff --git a/gdb/source.c b/gdb/source.c
index 25d6e71..292d2bf 100644
--- a/gdb/source.c
+++ b/gdb/source.c
@@ -319,13 +319,13 @@ select_source_symtab ()
 				     SEARCH_FUNCTION_DOMAIN, nullptr);
   if (bsym.symbol != nullptr)
     {
-      symtab_and_line sal = find_function_start_sal (bsym.symbol, true);
+      symtab_and_line sal = find_function_start_sal (bsym.symbol, false);
       if (sal.symtab == NULL)
 	/* We couldn't find the location of `main', possibly due to missing
 	   line number info, fall back to line 1 in the corresponding file.  */
 	loc->set (bsym.symbol->symtab (), 1);
       else
-	loc->set (sal.symtab, std::max (sal.line - (lines_to_list - 1), 1));
+	loc->set (sal.symtab, sal.line);
       return;
     }
 
@@ -1345,7 +1345,7 @@ print_source_lines_base (struct symtab *s, int line, int stopline,
 	     fields.  ui_source_list is set only for CLI, not for
 	     TUI.  */
 
-	  uiout->field_signed ("line", line);
+	  uiout->field_signed ("line", line, line_number_style.style ());
 	  uiout->text ("\tin ");
 
 	  uiout->field_string ("file", symtab_to_filename_for_display (s),
@@ -1386,11 +1386,15 @@ print_source_lines_base (struct symtab *s, int line, int stopline,
       last_line_listed = loc->line ();
       if (flags & PRINT_SOURCE_LINES_FILENAME)
 	{
-	  uiout->text (symtab_to_filename_for_display (s));
+	  uiout->message ("%ps",
+			  styled_string (file_name_style.style (),
+					 symtab_to_filename_for_display (s)));
 	  uiout->text (":");
 	}
-      xsnprintf (buf, sizeof (buf), "%d\t", new_lineno++);
-      uiout->text (buf);
+
+      uiout->message ("%ps\t", styled_string (line_number_style.style (),
+					      pulongest (new_lineno)));
+      ++new_lineno;
 
       while (*iter != '\0')
 	{
@@ -1551,9 +1555,11 @@ info_line_command (const char *arg, int from_tty)
 
 	  if (start_pc == end_pc)
 	    {
-	      gdb_printf ("Line %d of \"%s\"",
-			  sal.line,
-			  symtab_to_filename_for_display (sal.symtab));
+	      gdb_printf ("Line %ps of \"%ps\"",
+			  styled_string (line_number_style.style (),
+					 pulongest (sal.line)),
+			  styled_string (file_name_style.style (),
+					 symtab_to_filename_for_display (sal.symtab)));
 	      gdb_stdout->wrap_here (2);
 	      gdb_printf (" is at address ");
 	      print_address (gdbarch, start_pc, gdb_stdout);
@@ -1562,9 +1568,11 @@ info_line_command (const char *arg, int from_tty)
 	    }
 	  else
 	    {
-	      gdb_printf ("Line %d of \"%s\"",
-			  sal.line,
-			  symtab_to_filename_for_display (sal.symtab));
+	      gdb_printf ("Line %ps of \"%ps\"",
+			  styled_string (line_number_style.style (),
+					 pulongest (sal.line)),
+			  styled_string (file_name_style.style (),
+					 symtab_to_filename_for_display (sal.symtab)));
 	      gdb_stdout->wrap_here (2);
 	      gdb_printf (" starts at address ");
 	      print_address (gdbarch, start_pc, gdb_stdout);
@@ -1589,8 +1597,11 @@ info_line_command (const char *arg, int from_tty)
 	/* Is there any case in which we get here, and have an address
 	   which the user would want to see?  If we have debugging symbols
 	   and no line numbers?  */
-	gdb_printf (_("Line number %d is out of range for \"%s\".\n"),
-		    sal.line, symtab_to_filename_for_display (sal.symtab));
+	gdb_printf (_("Line number %ps is out of range for \"%ps\".\n"),
+		    styled_string (line_number_style.style (),
+				   pulongest (sal.line)),
+		    styled_string (file_name_style.style (),
+				   symtab_to_filename_for_display (sal.symtab)));
     }
 }
 
@@ -1915,7 +1926,7 @@ directory in which the source file was compiled into object code.\n\
 With no argument, reset the search path to $cdir:$cwd, the default."),
 	       &cmdlist);
 
-  set_cmd_completer (directory_cmd, filename_completer);
+  set_cmd_completer (directory_cmd, deprecated_filename_completer);
 
   add_setshow_optional_filename_cmd ("directories",
 				     class_files,
diff --git a/gdb/sparc-tdep.c b/gdb/sparc-tdep.c
index edbc038..e97a7d9 100644
--- a/gdb/sparc-tdep.c
+++ b/gdb/sparc-tdep.c
@@ -769,7 +769,7 @@ sparc_alloc_frame_cache (void)
   return cache;
 }
 
-/* GCC generates several well-known sequences of instructions at the begining
+/* GCC generates several well-known sequences of instructions at the beginning
    of each function prologue when compiling with -fstack-check.  If one of
    such sequences starts at START_PC, then return the address of the
    instruction immediately past this sequence.  Otherwise, return START_PC.  */
diff --git a/gdb/stabsread.c b/gdb/stabsread.c
index 1158519..e479820 100644
--- a/gdb/stabsread.c
+++ b/gdb/stabsread.c
@@ -33,6 +33,7 @@
 #include "symfile.h"
 #include "objfiles.h"
 #include "aout/stab_gnu.h"
+#include "psymtab.h"
 #include "libaout.h"
 #include "aout/aout64.h"
 #include "gdb-stabs.h"
@@ -46,6 +47,8 @@
 #include "cp-abi.h"
 #include "cp-support.h"
 #include <ctype.h>
+#include "block.h"
+#include "filenames.h"
 
 #include "stabsread.h"
 
@@ -61,6 +64,26 @@ int *this_object_header_files;
 int n_this_object_header_files;
 int n_allocated_this_object_header_files;
 
+/* See stabsread.h.  */
+
+const registry<objfile>::key<dbx_symfile_info> dbx_objfile_data_key;
+
+dbx_symfile_info::~dbx_symfile_info ()
+{
+  if (header_files != NULL)
+    {
+      int i = n_header_files;
+      struct header_file *hfiles = header_files;
+
+      while (--i >= 0)
+	{
+	  xfree (hfiles[i].name);
+	  xfree (hfiles[i].vector);
+	}
+      xfree (hfiles);
+    }
+}
+
 struct stabs_nextfield
 {
   struct stabs_nextfield *next;
@@ -165,6 +188,26 @@ void stabsread_clear_cache (void);
 static const char vptr_name[] = "_vptr$";
 static const char vb_name[] = "_vb$";
 
+void
+unknown_symtype_complaint (const char *arg1)
+{
+  complaint (_("unknown symbol type %s"), arg1);
+}
+
+void
+lbrac_mismatch_complaint (int arg1)
+{
+  complaint (_("N_LBRAC/N_RBRAC symbol mismatch at symtab pos %d"), arg1);
+}
+
+void
+repeated_header_complaint (const char *arg1, int arg2)
+{
+  complaint (_("\"repeated\" header file %s not "
+	       "previously seen, at symtab pos %d"),
+	     arg1, arg2);
+}
+
 static void
 invalid_cpp_abbrev_complaint (const char *arg1)
 {
@@ -184,6 +227,14 @@ stabs_general_complaint (const char *arg1)
   complaint ("%s", arg1);
 }
 
+static void
+function_outside_compilation_unit_complaint (const char *arg1)
+{
+  complaint (_("function `%s' appears to be defined "
+	       "outside of all compilation units"),
+	     arg1);
+}
+
 /* Make a list of forward references which haven't been defined.  */
 
 static struct type **undef_types;
@@ -491,6 +542,2440 @@ read_type_number (const char **pp, int *typenums)
 }
 
 
+/* Free up old header file tables.  */
+
+void
+free_header_files (void)
+{
+  if (this_object_header_files)
+    {
+      xfree (this_object_header_files);
+      this_object_header_files = NULL;
+    }
+  n_allocated_this_object_header_files = 0;
+}
+
+/* Allocate new header file tables.  */
+
+void
+init_header_files (void)
+{
+  n_allocated_this_object_header_files = 10;
+  this_object_header_files = XNEWVEC (int, 10);
+}
+
+/* Close off the current usage of PST.
+   Returns PST or NULL if the partial symtab was empty and thrown away.
+
+   FIXME:  List variables and peculiarities of same.  */
+
+legacy_psymtab *
+stabs_end_psymtab (struct objfile *objfile, psymtab_storage *partial_symtabs,
+		   legacy_psymtab *pst,
+		   const char **include_list, int num_includes,
+		   int capping_symbol_offset, unrelocated_addr capping_text,
+		   legacy_psymtab **dependency_list,
+		   int number_dependencies,
+		   int textlow_not_set)
+{
+  int i;
+  struct gdbarch *gdbarch = objfile->arch ();
+  dbx_symfile_info *key = dbx_objfile_data_key. get (objfile);
+
+  if (capping_symbol_offset != -1)
+    LDSYMLEN (pst) = capping_symbol_offset - LDSYMOFF (pst);
+  pst->set_text_high (capping_text);
+
+  /* Under Solaris, the N_SO symbols always have a value of 0,
+     instead of the usual address of the .o file.  Therefore,
+     we have to do some tricks to fill in texthigh and textlow.
+     The first trick is: if we see a static
+     or global function, and the textlow for the current pst
+     is not set (ie: textlow_not_set), then we use that function's
+     address for the textlow of the pst.  */
+
+  /* Now, to fill in texthigh, we remember the last function seen
+     in the .o file.  Also, there's a hack in
+     bfd/elf.c and gdb/elfread.c to pass the ELF st_size field
+     to here via the misc_info field.  Therefore, we can fill in
+     a reliable texthigh by taking the address plus size of the
+     last function in the file.  */
+
+  if (!pst->text_high_valid && key->ctx.last_function_name
+      && gdbarch_sofun_address_maybe_missing (gdbarch))
+    {
+      int n;
+
+      const char *colon = strchr (key->ctx.last_function_name, ':');
+      if (colon == NULL)
+	n = 0;
+      else
+	n = colon - key->ctx.last_function_name;
+      char *p = (char *) alloca (n + 2);
+      strncpy (p, key->ctx.last_function_name, n);
+      p[n] = 0;
+
+      bound_minimal_symbol minsym
+	= lookup_minimal_symbol (current_program_space, p, objfile,
+				 pst->filename);
+      if (minsym.minsym == NULL)
+	{
+	  /* Sun Fortran appends an underscore to the minimal symbol name,
+	     try again with an appended underscore if the minimal symbol
+	     was not found.  */
+	  p[n] = '_';
+	  p[n + 1] = 0;
+	  minsym = lookup_minimal_symbol (current_program_space, p, objfile,
+					  pst->filename);
+	}
+
+      if (minsym.minsym)
+	pst->set_text_high
+	  (unrelocated_addr (CORE_ADDR (minsym.minsym->unrelocated_address ())
+			     + minsym.minsym->size ()));
+
+      key->ctx.last_function_name = NULL;
+    }
+
+  if (!gdbarch_sofun_address_maybe_missing (gdbarch))
+    ;
+  /* This test will be true if the last .o file is only data.  */
+  else if (textlow_not_set)
+    pst->set_text_low (pst->unrelocated_text_high ());
+  else
+    {
+      /* If we know our own starting text address, then walk through all other
+	 psymtabs for this objfile, and if any didn't know their ending text
+	 address, set it to our starting address.  Take care to not set our
+	 own ending address to our starting address.  */
+
+      for (partial_symtab *p1 : partial_symtabs->range ())
+	if (!p1->text_high_valid && p1->text_low_valid && p1 != pst)
+	  p1->set_text_high (pst->unrelocated_text_low ());
+    }
+
+  /* End of kludge for patching Solaris textlow and texthigh.  */
+
+  pst->end ();
+
+  pst->number_of_dependencies = number_dependencies;
+  if (number_dependencies)
+    {
+      pst->dependencies
+	= partial_symtabs->allocate_dependencies (number_dependencies);
+      memcpy (pst->dependencies, dependency_list,
+	      number_dependencies * sizeof (legacy_psymtab *));
+    }
+  else
+    pst->dependencies = 0;
+
+  for (i = 0; i < num_includes; i++)
+    {
+      legacy_psymtab *subpst =
+	new legacy_psymtab (include_list[i], partial_symtabs, objfile->per_bfd);
+
+      subpst->read_symtab_private =
+	XOBNEW (&objfile->objfile_obstack, struct symloc);
+      LDSYMOFF (subpst) =
+	LDSYMLEN (subpst) = 0;
+
+      /* We could save slight bits of space by only making one of these,
+	 shared by the entire set of include files.  FIXME-someday.  */
+      subpst->dependencies =
+	partial_symtabs->allocate_dependencies (1);
+      subpst->dependencies[0] = pst;
+      subpst->number_of_dependencies = 1;
+
+      subpst->legacy_read_symtab = pst->legacy_read_symtab;
+      subpst->legacy_expand_psymtab = pst->legacy_expand_psymtab;
+    }
+
+  if (num_includes == 0
+      && number_dependencies == 0
+      && pst->empty ()
+      && key->ctx.has_line_numbers == 0)
+    {
+      /* Throw away this psymtab, it's empty.  */
+      /* Empty psymtabs happen as a result of header files which don't have
+	 any symbols in them.  There can be a lot of them.  But this check
+	 is wrong, in that a psymtab with N_SLINE entries but nothing else
+	 is not empty, but we don't realize that.  Fixing that without slowing
+	 things down might be tricky.  */
+
+      partial_symtabs->discard_psymtab (pst);
+
+      /* Indicate that psymtab was thrown away.  */
+      pst = NULL;
+    }
+  return pst;
+}
+
+/* Set namestring based on nlist.  If the string table index is invalid, 
+   give a fake name, and print a single error message per symbol file read,
+   rather than abort the symbol reading or flood the user with messages.  */
+
+static const char *
+set_namestring (struct objfile *objfile, const struct internal_nlist *nlist)
+{
+  const char *namestring;
+  struct dbx_symfile_info *key = dbx_objfile_data_key.get (objfile);
+
+  if (nlist->n_strx + key->ctx.file_string_table_offset
+      >= DBX_STRINGTAB_SIZE (objfile)
+      || nlist->n_strx + key->ctx.file_string_table_offset < nlist->n_strx)
+    {
+      complaint (_("bad string table offset in symbol %d"),
+		 symnum);
+      namestring = "<bad string table offset>";
+    } 
+  else
+    namestring = (nlist->n_strx + key->ctx.file_string_table_offset
+		  + DBX_STRINGTAB (objfile));
+  return namestring;
+}
+
+static void
+stabs_seek (int sym_offset, struct objfile *objfile)
+{
+  dbx_symfile_info *key = dbx_objfile_data_key.get (objfile);
+  if (key->ctx.stabs_data)
+    {
+      key->ctx.symbuf_read += sym_offset;
+      key->ctx.symbuf_left -= sym_offset;
+    }
+  else
+    if (bfd_seek (objfile->obfd.get (), sym_offset, SEEK_CUR) != 0)
+      perror_with_name (bfd_get_filename (objfile->obfd.get ()));
+}
+
+/* Buffer for reading the symbol table entries.  */
+static struct external_nlist symbuf[4096];
+static int symbuf_idx;
+static int symbuf_end;
+
+/* Refill the symbol table input buffer
+   and set the variables that control fetching entries from it.
+   Reports an error if no data available.
+   This function can read past the end of the symbol table
+   (into the string table) but this does no harm.  */
+
+static void
+fill_symbuf (bfd *sym_bfd, struct objfile *objfile)
+{
+  unsigned int count;
+  int nbytes;
+  struct dbx_symfile_info *key = dbx_objfile_data_key.get (objfile);
+
+  if (key->ctx.stabs_data)
+    {
+      nbytes = sizeof (symbuf);
+      if (nbytes > key->ctx.symbuf_left)
+	nbytes = key->ctx.symbuf_left;
+      memcpy (symbuf, key->ctx.stabs_data + key->ctx.symbuf_read, nbytes);
+    }
+  else if (key->ctx.symbuf_sections == NULL)
+    {
+      count = sizeof (symbuf);
+      nbytes = bfd_read (symbuf, count, sym_bfd);
+    }
+  else
+    {
+      if (key->ctx.symbuf_left <= 0)
+	{
+	  file_ptr filepos = (*key->ctx.symbuf_sections)[key->ctx.sect_idx]->filepos;
+
+	  if (bfd_seek (sym_bfd, filepos, SEEK_SET) != 0)
+	    perror_with_name (bfd_get_filename (sym_bfd));
+	  key->ctx.symbuf_left = bfd_section_size ((*key->ctx.symbuf_sections)[key->ctx.sect_idx]);
+	  key->ctx.symbol_table_offset = filepos - key->ctx.symbuf_read;
+	  ++key->ctx.sect_idx;
+	}
+
+      count = key->ctx.symbuf_left;
+      if (count > sizeof (symbuf))
+	count = sizeof (symbuf);
+      nbytes = bfd_read (symbuf, count, sym_bfd);
+    }
+
+  if (nbytes < 0)
+    perror_with_name (bfd_get_filename (sym_bfd));
+  else if (nbytes == 0)
+    error (_("Premature end of file reading symbol table"));
+  symbuf_end = nbytes / key->ctx.symbol_size;
+  symbuf_idx = 0;
+  key->ctx.symbuf_left -= nbytes;
+  key->ctx.symbuf_read += nbytes;
+}
+
+/* Read in a defined section of a specific object file's symbols.  */
+
+static void
+read_ofile_symtab (struct objfile *objfile, legacy_psymtab *pst)
+{
+  const char *namestring;
+  struct external_nlist *bufp;
+  struct internal_nlist nlist;
+  unsigned char type;
+  unsigned max_symnum;
+  bfd *abfd;
+  int sym_offset;		/* Offset to start of symbols to read */
+  int sym_size;			/* Size of symbols to read */
+  CORE_ADDR text_offset;	/* Start of text segment for symbols */
+  int text_size;		/* Size of text segment for symbols */
+  struct dbx_symfile_info *key = dbx_objfile_data_key.get (objfile);
+
+  sym_offset = LDSYMOFF (pst);
+  sym_size = LDSYMLEN (pst);
+  text_offset = pst->text_low (objfile);
+  text_size = pst->text_high (objfile) - pst->text_low (objfile);
+  const section_offsets &section_offsets = objfile->section_offsets;
+
+  key->ctx.stringtab_global = DBX_STRINGTAB (objfile);
+  set_last_source_file (NULL);
+
+  abfd = objfile->obfd.get ();
+  symbuf_end = symbuf_idx = 0;
+  key->ctx.symbuf_read = 0;
+  key->ctx.symbuf_left = sym_offset + sym_size;
+
+  /* It is necessary to actually read one symbol *before* the start
+     of this symtab's symbols, because the GCC_COMPILED_FLAG_SYMBOL
+     occurs before the N_SO symbol.
+
+     Detecting this in read_stabs_symtab
+     would slow down initial readin, so we look for it here instead.  */
+  if (!key->ctx.processing_acc_compilation && sym_offset >= (int) key->ctx.symbol_size)
+    {
+      stabs_seek (sym_offset - key->ctx.symbol_size, objfile);
+      fill_symbuf (abfd, objfile);
+      bufp = &symbuf[symbuf_idx++];
+      INTERNALIZE_SYMBOL (nlist, bufp, abfd);
+      OBJSTAT (objfile, n_stabs++);
+
+      namestring = set_namestring (objfile, &nlist);
+
+      processing_gcc_compilation = 0;
+      if (nlist.n_type == N_TEXT)
+	{
+	  const char *tempstring = namestring;
+
+	  if (strcmp (namestring, GCC_COMPILED_FLAG_SYMBOL) == 0)
+	    processing_gcc_compilation = 1;
+	  else if (strcmp (namestring, GCC2_COMPILED_FLAG_SYMBOL) == 0)
+	    processing_gcc_compilation = 2;
+	  if (*tempstring != '\0'
+	      && *tempstring == bfd_get_symbol_leading_char (objfile->obfd.get ()))
+	    ++tempstring;
+	  if (startswith (tempstring, "__gnu_compiled"))
+	    processing_gcc_compilation = 2;
+	}
+    }
+  else
+    {
+      /* The N_SO starting this symtab is the first symbol, so we
+	 better not check the symbol before it.  I'm not this can
+	 happen, but it doesn't hurt to check for it.  */
+      stabs_seek (sym_offset, objfile);
+      processing_gcc_compilation = 0;
+    }
+
+  if (symbuf_idx == symbuf_end)
+    fill_symbuf (abfd, objfile);
+  bufp = &symbuf[symbuf_idx];
+  if (bfd_h_get_8 (abfd, bufp->e_type) != N_SO)
+    error (_("First symbol in segment of executable not a source symbol"));
+
+  max_symnum = sym_size / key->ctx.symbol_size;
+
+  for (symnum = 0;
+       symnum < max_symnum;
+       symnum++)
+    {
+      QUIT;			/* Allow this to be interruptable.  */
+      if (symbuf_idx == symbuf_end)
+	fill_symbuf (abfd, objfile);
+      bufp = &symbuf[symbuf_idx++];
+      INTERNALIZE_SYMBOL (nlist, bufp, abfd);
+      OBJSTAT (objfile, n_stabs++);
+
+      type = bfd_h_get_8 (abfd, bufp->e_type);
+
+      namestring = set_namestring (objfile, &nlist);
+
+      if (type & N_STAB)
+	{
+	  if (sizeof (nlist.n_value) > 4
+	      /* We are a 64-bit debugger debugging a 32-bit program.  */
+	      && (type == N_LSYM || type == N_PSYM))
+	      /* We have to be careful with the n_value in the case of N_LSYM
+		 and N_PSYM entries, because they are signed offsets from frame
+		 pointer, but we actually read them as unsigned 32-bit values.
+		 This is not a problem for 32-bit debuggers, for which negative
+		 values end up being interpreted correctly (as negative
+		 offsets) due to integer overflow.
+		 But we need to sign-extend the value for 64-bit debuggers,
+		 or we'll end up interpreting negative values as very large
+		 positive offsets.  */
+	    nlist.n_value = (nlist.n_value ^ 0x80000000) - 0x80000000;
+	  process_one_symbol (type, nlist.n_desc, nlist.n_value,
+			      namestring, section_offsets, objfile,
+			      PST_LANGUAGE (pst));
+	}
+      /* We skip checking for a new .o or -l file; that should never
+	 happen in this routine.  */
+      else if (type == N_TEXT)
+	{
+	  /* I don't think this code will ever be executed, because
+	     the GCC_COMPILED_FLAG_SYMBOL usually is right before
+	     the N_SO symbol which starts this source file.
+	     However, there is no reason not to accept
+	     the GCC_COMPILED_FLAG_SYMBOL anywhere.  */
+
+	  if (strcmp (namestring, GCC_COMPILED_FLAG_SYMBOL) == 0)
+	    processing_gcc_compilation = 1;
+	  else if (strcmp (namestring, GCC2_COMPILED_FLAG_SYMBOL) == 0)
+	    processing_gcc_compilation = 2;
+	}
+      else if (type & N_EXT || type == (unsigned char) N_TEXT
+	       || type == (unsigned char) N_NBTEXT)
+	{
+	  /* Global symbol: see if we came across a dbx definition for
+	     a corresponding symbol.  If so, store the value.  Remove
+	     syms from the chain when their values are stored, but
+	     search the whole chain, as there may be several syms from
+	     different files with the same name.  */
+	  /* This is probably not true.  Since the files will be read
+	     in one at a time, each reference to a global symbol will
+	     be satisfied in each file as it appears.  So we skip this
+	     section.  */
+	  ;
+	}
+    }
+
+  /* In a Solaris elf file, this variable, which comes from the value
+     of the N_SO symbol, will still be 0.  Luckily, text_offset, which
+     comes from low text address of PST, is correct.  */
+  if (get_last_source_start_addr () == 0)
+    set_last_source_start_addr (text_offset);
+
+  /* In reordered executables last_source_start_addr may not be the
+     lower bound for this symtab, instead use text_offset which comes
+     from the low text address of PST, which is correct.  */
+  if (get_last_source_start_addr () > text_offset)
+    set_last_source_start_addr (text_offset);
+
+  pst->compunit_symtab = end_compunit_symtab (text_offset + text_size);
+
+  end_stabs ();
+
+}
+
+static void
+dbx_expand_psymtab (legacy_psymtab *pst, struct objfile *objfile)
+{
+  gdb_assert (!pst->readin);
+  struct dbx_symfile_info *key = dbx_objfile_data_key.get (objfile);
+
+  /* Read in all partial symtabs on which this one is dependent.  */
+  pst->expand_dependencies (objfile);
+
+  if (LDSYMLEN (pst))		/* Otherwise it's a dummy.  */
+    {
+      /* Init stuff necessary for reading in symbols */
+      stabsread_init ();
+      scoped_free_pendings free_pending;
+      key->ctx.file_string_table_offset = FILE_STRING_OFFSET (pst);
+      key->ctx.symbol_size = SYMBOL_SIZE (pst);
+
+      /* Read in this file's symbols.  */
+      if (bfd_seek (objfile->obfd.get (), SYMBOL_OFFSET (pst), SEEK_SET) == 0)
+	read_ofile_symtab (objfile, pst);
+    }
+
+  pst->readin = true;
+}
+
+/* Invariant: The symbol pointed to by symbuf_idx is the first one
+   that hasn't been swapped.  Swap the symbol at the same time
+   that symbuf_idx is incremented.  */
+
+/* dbx allows the text of a symbol name to be continued into the
+   next symbol name!  When such a continuation is encountered
+   (a \ at the end of the text of a name)
+   call this function to get the continuation.  */
+
+static const char *
+dbx_next_symbol_text (struct objfile *objfile)
+{
+  struct internal_nlist nlist;
+  dbx_symfile_info *key = dbx_objfile_data_key.get (objfile);
+
+  if (symbuf_idx == symbuf_end)
+    fill_symbuf (objfile->obfd.get (), objfile);
+
+  symnum++;
+  INTERNALIZE_SYMBOL (nlist, &symbuf[symbuf_idx], objfile->obfd.get ());
+  OBJSTAT (objfile, n_stabs++);
+
+  symbuf_idx++;
+
+  return nlist.n_strx + key->ctx.stringtab_global
+    + key->ctx.file_string_table_offset;
+}
+
+/* Read in all of the symbols for a given psymtab for real.
+   Be verbose about it if the user wants that.  SELF is not NULL.  */
+
+static void
+stabs_read_symtab (legacy_psymtab *self, struct objfile *objfile)
+{
+  gdb_assert (!self->readin);
+
+  if (LDSYMLEN (self) || self->number_of_dependencies)
+    {
+      next_symbol_text_func = dbx_next_symbol_text;
+      dbx_symfile_info *key = dbx_objfile_data_key.get (objfile);
+
+      {
+	scoped_restore restore_stabs_data = make_scoped_restore (&key->ctx.stabs_data);
+	gdb::unique_xmalloc_ptr<gdb_byte> data_holder;
+	if (DBX_STAB_SECTION (objfile))
+	  {
+	    key->ctx.stabs_data
+	      = symfile_relocate_debug_section (objfile,
+						DBX_STAB_SECTION (objfile),
+						NULL);
+	    data_holder.reset (key->ctx.stabs_data);
+	  }
+
+	self->expand_psymtab (objfile);
+      }
+
+      /* Match with global symbols.  This only needs to be done once,
+	 after all of the symtabs and dependencies have been read in.   */
+      scan_file_globals (objfile);
+    }
+}
+
+static void
+record_minimal_symbol (minimal_symbol_reader &reader,
+		       const char *name, unrelocated_addr address, int type,
+		       struct objfile *objfile)
+{
+  enum minimal_symbol_type ms_type;
+  int section;
+  struct dbx_symfile_info *key = dbx_objfile_data_key.get (objfile);
+
+  switch (type)
+    {
+    case N_TEXT | N_EXT:
+      ms_type = mst_text;
+      section = SECT_OFF_TEXT (objfile);
+      break;
+    case N_DATA | N_EXT:
+      ms_type = mst_data;
+      section = SECT_OFF_DATA (objfile);
+      break;
+    case N_BSS | N_EXT:
+      ms_type = mst_bss;
+      section = SECT_OFF_BSS (objfile);
+      break;
+    case N_ABS | N_EXT:
+      ms_type = mst_abs;
+      section = -1;
+      break;
+#ifdef N_SETV
+    case N_SETV | N_EXT:
+      ms_type = mst_data;
+      section = SECT_OFF_DATA (objfile);
+      break;
+    case N_SETV:
+      /* I don't think this type actually exists; since a N_SETV is the result
+	 of going over many .o files, it doesn't make sense to have one
+	 file local.  */
+      ms_type = mst_file_data;
+      section = SECT_OFF_DATA (objfile);
+      break;
+#endif
+    case N_TEXT:
+    case N_NBTEXT:
+    case N_FN:
+    case N_FN_SEQ:
+      ms_type = mst_file_text;
+      section = SECT_OFF_TEXT (objfile);
+      break;
+    case N_DATA:
+      ms_type = mst_file_data;
+
+      /* Check for __DYNAMIC, which is used by Sun shared libraries. 
+	 Record it as global even if it's local, not global, so
+	 lookup_minimal_symbol can find it.  We don't check symbol_leading_char
+	 because for SunOS4 it always is '_'.  */
+      if (strcmp ("__DYNAMIC", name) == 0)
+	ms_type = mst_data;
+
+      /* Same with virtual function tables, both global and static.  */
+      {
+	const char *tempstring = name;
+
+	if (*tempstring != '\0'
+	    && *tempstring == bfd_get_symbol_leading_char (objfile->obfd.get ()))
+	  ++tempstring;
+	if (is_vtable_name (tempstring))
+	  ms_type = mst_data;
+      }
+      section = SECT_OFF_DATA (objfile);
+      break;
+    case N_BSS:
+      ms_type = mst_file_bss;
+      section = SECT_OFF_BSS (objfile);
+      break;
+    default:
+      ms_type = mst_unknown;
+      section = -1;
+      break;
+    }
+
+  if ((ms_type == mst_file_text || ms_type == mst_text)
+      && address < key->ctx.lowest_text_address)
+    key->ctx.lowest_text_address = address;
+
+  reader.record_with_info (name, address, ms_type, section);
+}
+
+/* Given a name, value pair, find the corresponding
+   bincl in the list.  Return the partial symtab associated
+   with that header_file_location.  */
+
+static legacy_psymtab *
+find_corresponding_bincl_psymtab (const char *name, int instance,
+				  struct objfile* objfile)
+{
+  stabsread_context ctx = dbx_objfile_data_key.get (objfile) -> ctx;
+  for (const header_file_location &bincl : ctx.bincl_list)
+    if (bincl.instance == instance
+	&& strcmp (name, bincl.name) == 0)
+      return bincl.pst;
+
+  repeated_header_complaint (name, symnum);
+  return (legacy_psymtab *) 0;
+}
+
+/* Allocate and partially fill a partial symtab.  It will be
+   completely filled at the end of the symbol list.
+
+   SYMFILE_NAME is the name of the symbol-file we are reading from, and ADDR
+   is the address relative to which its symbols are (incremental) or 0
+   (normal).  */
+
+static legacy_psymtab *
+start_psymtab (psymtab_storage *partial_symtabs, struct objfile *objfile,
+	       const char *filename, unrelocated_addr textlow, int ldsymoff)
+{
+  legacy_psymtab *result = new legacy_psymtab (filename, partial_symtabs,
+					       objfile->per_bfd, textlow);
+
+  struct dbx_symfile_info *key = dbx_objfile_data_key.get(objfile);
+
+  result->read_symtab_private =
+    XOBNEW (&objfile->objfile_obstack, struct symloc);
+  LDSYMOFF (result) = ldsymoff;
+  result->legacy_read_symtab = stabs_read_symtab;
+  result->legacy_expand_psymtab = dbx_expand_psymtab;
+  SYMBOL_SIZE (result) = key->ctx.symbol_size;
+  SYMBOL_OFFSET (result) = key->ctx.symbol_table_offset;
+  STRING_OFFSET (result) = 0; /* This used to be an uninitialized global.  */
+  FILE_STRING_OFFSET (result) = key->ctx.file_string_table_offset;
+
+  /* Deduce the source language from the filename for this psymtab.  */
+  key->ctx.psymtab_language = deduce_language_from_filename (filename);
+  PST_LANGUAGE (result) = key->ctx.psymtab_language;
+
+  return result;
+}
+
+/* See stabsread.h. */
+
+static void
+read_stabs_symtab_1 (minimal_symbol_reader &reader,
+		     psymtab_storage *partial_symtabs,
+		     struct objfile *objfile)
+{
+  struct gdbarch *gdbarch = objfile->arch ();
+  struct external_nlist *bufp = 0;	/* =0 avoids gcc -Wall glitch.  */
+  struct internal_nlist nlist;
+  CORE_ADDR text_addr;
+  int text_size;
+  const char *sym_name;
+  int sym_len;
+  unsigned int next_file_string_table_offset = 0;
+  struct dbx_symfile_info *dbx = dbx_objfile_data_key.get(objfile);
+
+  const char *namestring;
+  int nsl;
+  int past_first_source_file = 0;
+  CORE_ADDR last_function_start = 0;
+  bfd *abfd;
+  int textlow_not_set;
+  int data_sect_index;
+
+  /* Current partial symtab.  */
+  legacy_psymtab *pst;
+
+  /* List of current psymtab's include files.  */
+  const char **psymtab_include_list;
+  int includes_allocated;
+  int includes_used;
+
+  /* Index within current psymtab dependency list.  */
+  legacy_psymtab **dependency_list;
+  int dependencies_used, dependencies_allocated;
+
+  text_addr = DBX_TEXT_ADDR (objfile);
+  text_size = DBX_TEXT_SIZE (objfile);
+
+  /* FIXME.  We probably want to change stringtab_global rather than add this
+     while processing every symbol entry.  FIXME.  */
+  dbx->ctx.file_string_table_offset = 0;
+
+  dbx->ctx.stringtab_global = DBX_STRINGTAB (objfile);
+
+  pst = (legacy_psymtab *) 0;
+
+  includes_allocated = 30;
+  includes_used = 0;
+  psymtab_include_list = (const char **) alloca (includes_allocated *
+						 sizeof (const char *));
+
+  dependencies_allocated = 30;
+  dependencies_used = 0;
+  dependency_list =
+    (legacy_psymtab **) alloca (dependencies_allocated *
+				sizeof (legacy_psymtab *));
+
+  /* Init bincl list */
+  std::vector<struct header_file_location> bincl_storage;
+  scoped_restore restore_bincl_global
+    = make_scoped_restore (&(dbx->ctx.bincl_list), bincl_storage);
+
+  set_last_source_file (NULL);
+
+  dbx->ctx.lowest_text_address = (unrelocated_addr) -1;
+
+  abfd = objfile->obfd.get ();
+  symbuf_end = symbuf_idx = 0;
+  next_symbol_text_func = dbx_next_symbol_text;
+  textlow_not_set = 1;
+  dbx->ctx.has_line_numbers = 0;
+
+  /* FIXME: jimb/2003-09-12: We don't apply the right section's offset
+     to global and static variables.  The stab for a global or static
+     variable doesn't give us any indication of which section it's in,
+     so we can't tell immediately which offset in
+     objfile->section_offsets we should apply to the variable's
+     address.
+
+     We could certainly find out which section contains the variable
+     by looking up the variable's unrelocated address with
+     find_pc_section, but that would be expensive; this is the
+     function that constructs the partial symbol tables by examining
+     every symbol in the entire executable, and it's
+     performance-critical.  So that expense would not be welcome.  I'm
+     not sure what to do about this at the moment.
+
+     What we have done for years is to simply assume that the .data
+     section's offset is appropriate for all global and static
+     variables.  Recently, this was expanded to fall back to the .bss
+     section's offset if there is no .data section, and then to the
+     .rodata section's offset.  */
+  data_sect_index = objfile->sect_index_data;
+  if (data_sect_index == -1)
+    data_sect_index = SECT_OFF_BSS (objfile);
+  if (data_sect_index == -1)
+    data_sect_index = SECT_OFF_RODATA (objfile);
+
+  /* If data_sect_index is still -1, that's okay.  It's perfectly fine
+     for the file to have no .data, no .bss, and no .text at all, if
+     it also has no global or static variables.  */
+
+  for (symnum = 0; symnum < DBX_SYMCOUNT (objfile); symnum++)
+    {
+      /* Get the symbol for this run and pull out some info.  */
+      QUIT;			/* Allow this to be interruptable.  */
+      if (symbuf_idx == symbuf_end)
+	fill_symbuf (abfd, objfile);
+      bufp = &symbuf[symbuf_idx++];
+
+      /*
+       * Special case to speed up readin.
+       */
+      if (bfd_h_get_8 (abfd, bufp->e_type) == N_SLINE)
+	{
+	  dbx->ctx.has_line_numbers = 1;
+	  continue;
+	}
+
+      INTERNALIZE_SYMBOL (nlist, bufp, abfd);
+      OBJSTAT (objfile, n_stabs++);
+
+      /* Ok.  There is a lot of code duplicated in the rest of this
+	 switch statement (for efficiency reasons).  Since I don't
+	 like duplicating code, I will do my penance here, and
+	 describe the code which is duplicated:
+
+	 *) The assignment to namestring.
+	 *) The call to strchr.
+	 *) The addition of a partial symbol the two partial
+	 symbol lists.  This last is a large section of code, so
+	 I've embedded it in the following macro.  */
+
+      switch (nlist.n_type)
+	{
+	  /*
+	   * Standard, external, non-debugger, symbols
+	   */
+
+	case N_TEXT | N_EXT:
+	case N_NBTEXT | N_EXT:
+	  goto record_it;
+
+	case N_DATA | N_EXT:
+	case N_NBDATA | N_EXT:
+	  goto record_it;
+
+	case N_BSS:
+	case N_BSS | N_EXT:
+	case N_NBBSS | N_EXT:
+	case N_SETV | N_EXT:		/* FIXME, is this in BSS? */
+	  goto record_it;
+
+	case N_ABS | N_EXT:
+	  record_it:
+	  namestring = set_namestring (objfile, &nlist);
+
+	  record_minimal_symbol (reader, namestring,
+				 unrelocated_addr (nlist.n_value),
+				 nlist.n_type, objfile);	/* Always */
+	  continue;
+
+	  /* Standard, local, non-debugger, symbols.  */
+
+	case N_NBTEXT:
+
+	  /* We need to be able to deal with both N_FN or N_TEXT,
+	     because we have no way of knowing whether the sys-supplied ld
+	     or GNU ld was used to make the executable.  Sequents throw
+	     in another wrinkle -- they renumbered N_FN.  */
+
+	case N_FN:
+	case N_FN_SEQ:
+	case N_TEXT:
+	  namestring = set_namestring (objfile, &nlist);
+
+	  if ((namestring[0] == '-' && namestring[1] == 'l')
+	      || (namestring[(nsl = strlen (namestring)) - 1] == 'o'
+		  && namestring[nsl - 2] == '.'))
+	    {
+	      unrelocated_addr unrel_val = unrelocated_addr (nlist.n_value);
+
+	      if (past_first_source_file && pst
+		  /* The gould NP1 uses low values for .o and -l symbols
+		     which are not the address.  */
+		  && unrel_val >= pst->unrelocated_text_low ())
+		{
+		  stabs_end_psymtab (objfile, partial_symtabs,
+				     pst, psymtab_include_list,
+				     includes_used, symnum * dbx->ctx.symbol_size,
+				     unrel_val > pst->unrelocated_text_high ()
+				     ? unrel_val : pst->unrelocated_text_high (),
+				     dependency_list, dependencies_used,
+				     textlow_not_set);
+		  pst = (legacy_psymtab *) 0;
+		  includes_used = 0;
+		  dependencies_used = 0;
+		  dbx->ctx.has_line_numbers = 0;
+		}
+	      else
+		past_first_source_file = 1;
+	    }
+	  else
+	    goto record_it;
+	  continue;
+
+	case N_DATA:
+	  goto record_it;
+
+	case N_UNDF | N_EXT:
+	  /* The case (nlist.n_value != 0) is a "Fortran COMMON" symbol.
+	     We used to rely on the target to tell us whether it knows
+	     where the symbol has been relocated to, but none of the
+	     target implementations actually provided that operation.
+	     So we just ignore the symbol, the same way we would do if
+	     we had a target-side symbol lookup which returned no match.
+
+	     All other symbols (with nlist.n_value == 0), are really
+	     undefined, and so we ignore them too.  */
+	  continue;
+
+	case N_UNDF:
+	  if (dbx->ctx.processing_acc_compilation && nlist.n_strx == 1)
+	    {
+	      /* Deal with relative offsets in the string table
+		 used in ELF+STAB under Solaris.  If we want to use the
+		 n_strx field, which contains the name of the file,
+		 we must adjust file_string_table_offset *before* calling
+		 set_namestring().  */
+	      past_first_source_file = 1;
+	      dbx->ctx.file_string_table_offset = next_file_string_table_offset;
+	     next_file_string_table_offset =
+		dbx->ctx.file_string_table_offset + nlist.n_value;
+	      if (next_file_string_table_offset < dbx->ctx.file_string_table_offset)
+		error (_("string table offset backs up at %d"), symnum);
+	      /* FIXME -- replace error() with complaint.  */
+	      continue;
+	    }
+	  continue;
+
+	  /* Lots of symbol types we can just ignore.  */
+
+	case N_ABS:
+	case N_NBDATA:
+	case N_NBBSS:
+	  continue;
+
+	  /* Keep going . . .  */
+
+	  /*
+	   * Special symbol types for GNU
+	   */
+	case N_INDR:
+	case N_INDR | N_EXT:
+	case N_SETA:
+	case N_SETA | N_EXT:
+	case N_SETT:
+	case N_SETT | N_EXT:
+	case N_SETD:
+	case N_SETD | N_EXT:
+	case N_SETB:
+	case N_SETB | N_EXT:
+	case N_SETV:
+	  continue;
+
+	  /*
+	   * Debugger symbols
+	   */
+
+	case N_SO:
+	  {
+	    CORE_ADDR valu;
+	    static int prev_so_symnum = -10;
+	    static int first_so_symnum;
+	    const char *p;
+	    static const char *dirname_nso;
+	    int prev_textlow_not_set;
+
+	    valu = nlist.n_value;
+
+	    prev_textlow_not_set = textlow_not_set;
+
+	    /* A zero value is probably an indication for the SunPRO 3.0
+	       compiler.  stabs_end_psymtab explicitly tests for zero, so
+	       don't relocate it.  */
+
+	    if (nlist.n_value == 0
+		&& gdbarch_sofun_address_maybe_missing (gdbarch))
+	      {
+		textlow_not_set = 1;
+		valu = 0;
+	      }
+	    else
+	      textlow_not_set = 0;
+
+	    past_first_source_file = 1;
+
+	    if (prev_so_symnum != symnum - 1)
+	      {			/* Here if prev stab wasn't N_SO.  */
+		first_so_symnum = symnum;
+
+		if (pst)
+		  {
+		    unrelocated_addr unrel_value = unrelocated_addr (valu);
+		    stabs_end_psymtab (objfile, partial_symtabs,
+				       pst, psymtab_include_list,
+				       includes_used, symnum * dbx->ctx.symbol_size,
+				       unrel_value > pst->unrelocated_text_high ()
+				       ? unrel_value
+				       : pst->unrelocated_text_high (),
+				       dependency_list, dependencies_used,
+				       prev_textlow_not_set);
+		    pst = (legacy_psymtab *) 0;
+		    includes_used = 0;
+		    dependencies_used = 0;
+		    dbx->ctx.has_line_numbers = 0;
+		  }
+	      }
+
+	    prev_so_symnum = symnum;
+
+	    /* End the current partial symtab and start a new one.  */
+
+	    namestring = set_namestring (objfile, &nlist);
+
+	    /* Null name means end of .o file.  Don't start a new one.  */
+	    if (*namestring == '\000')
+	      continue;
+
+	    /* Some compilers (including gcc) emit a pair of initial N_SOs.
+	       The first one is a directory name; the second the file name.
+	       If pst exists, is empty, and has a filename ending in '/',
+	       we assume the previous N_SO was a directory name.  */
+
+	    p = lbasename (namestring);
+	    if (p != namestring && *p == '\000')
+	      {
+		/* Save the directory name SOs locally, then save it into
+		   the psymtab when it's created below.  */
+		dirname_nso = namestring;
+		continue;		
+	      }
+
+	    /* Some other compilers (C++ ones in particular) emit useless
+	       SOs for non-existant .c files.  We ignore all subsequent SOs
+	       that immediately follow the first.  */
+
+	    if (!pst)
+	      {
+		pst = start_psymtab (partial_symtabs, objfile,
+				     namestring,
+				     unrelocated_addr (valu),
+				     first_so_symnum * dbx->ctx.symbol_size);
+		pst->dirname = dirname_nso;
+		dirname_nso = NULL;
+	      }
+	    continue;
+	  }
+
+	case N_BINCL:
+	  {
+	    enum language tmp_language;
+
+	    /* Add this bincl to the bincl_list for future EXCLs.  No
+	       need to save the string; it'll be around until
+	       read_stabs_symtab function returns.  */
+
+	    namestring = set_namestring (objfile, &nlist);
+	    tmp_language = deduce_language_from_filename (namestring);
+
+	    /* Only change the psymtab's language if we've learned
+	       something useful (eg. tmp_language is not language_unknown).
+	       In addition, to match what start_subfile does, never change
+	       from C++ to C.  */
+	    if (tmp_language != language_unknown
+		&& (tmp_language != language_c
+		    || dbx->ctx.psymtab_language != language_cplus))
+	      dbx->ctx.psymtab_language = tmp_language;
+
+	    if (pst == NULL)
+	      {
+		/* FIXME: we should not get here without a PST to work on.
+		   Attempt to recover.  */
+		complaint (_("N_BINCL %s not in entries for "
+			     "any file, at symtab pos %d"),
+			   namestring, symnum);
+		continue;
+	      }
+	    dbx->ctx.bincl_list.emplace_back (namestring, nlist.n_value, pst);
+
+	    /* Mark down an include file in the current psymtab.  */
+
+	    goto record_include_file;
+	  }
+
+	case N_SOL:
+	  {
+	    enum language tmp_language;
+
+	    /* Mark down an include file in the current psymtab.  */
+	    namestring = set_namestring (objfile, &nlist);
+	    tmp_language = deduce_language_from_filename (namestring);
+
+	    /* Only change the psymtab's language if we've learned
+	       something useful (eg. tmp_language is not language_unknown).
+	       In addition, to match what start_subfile does, never change
+	       from C++ to C.  */
+	    if (tmp_language != language_unknown
+		&& (tmp_language != language_c
+		    || dbx->ctx.psymtab_language != language_cplus))
+	      dbx->ctx.psymtab_language = tmp_language;
+
+	    /* In C++, one may expect the same filename to come round many
+	       times, when code is coming alternately from the main file
+	       and from inline functions in other files.  So I check to see
+	       if this is a file we've seen before -- either the main
+	       source file, or a previously included file.
+
+	       This seems to be a lot of time to be spending on N_SOL, but
+	       things like "break c-exp.y:435" need to work (I
+	       suppose the psymtab_include_list could be hashed or put
+	       in a binary tree, if profiling shows this is a major hog).  */
+	    if (pst && filename_cmp (namestring, pst->filename) == 0)
+	      continue;
+	    {
+	      int i;
+
+	      for (i = 0; i < includes_used; i++)
+		if (filename_cmp (namestring, psymtab_include_list[i]) == 0)
+		  {
+		    i = -1;
+		    break;
+		  }
+	      if (i == -1)
+		continue;
+	    }
+
+	  record_include_file:
+
+	    psymtab_include_list[includes_used++] = namestring;
+	    if (includes_used >= includes_allocated)
+	      {
+		const char **orig = psymtab_include_list;
+
+		psymtab_include_list = (const char **)
+		  alloca ((includes_allocated *= 2) * sizeof (const char *));
+		memcpy (psymtab_include_list, orig,
+			includes_used * sizeof (const char *));
+	      }
+	    continue;
+	  }
+	case N_LSYM:		/* Typedef or automatic variable.  */
+	case N_STSYM:		/* Data seg var -- static.  */
+	case N_LCSYM:		/* BSS      "  */
+	case N_ROSYM:		/* Read-only data seg var -- static.  */
+	case N_NBSTS:		/* Gould nobase.  */
+	case N_NBLCS:		/* symbols.  */
+	case N_FUN:
+	case N_GSYM:		/* Global (extern) variable; can be
+				   data or bss (sigh FIXME).  */
+
+	  /* Following may probably be ignored; I'll leave them here
+	     for now (until I do Pascal and Modula 2 extensions).  */
+
+	case N_PC:		/* I may or may not need this; I
+				   suspect not.  */
+	case N_M2C:		/* I suspect that I can ignore this here.  */
+	case N_SCOPE:		/* Same.   */
+	{
+	  const char *p;
+
+	  namestring = set_namestring (objfile, &nlist);
+
+	  /* See if this is an end of function stab.  */
+	  if (pst && nlist.n_type == N_FUN && *namestring == '\000')
+	    {
+	      unrelocated_addr valu;
+
+	      /* It's value is the size (in bytes) of the function for
+		 function relative stabs, or the address of the function's
+		 end for old style stabs.  */
+	      valu = unrelocated_addr (nlist.n_value + last_function_start);
+	      if (pst->unrelocated_text_high () == unrelocated_addr (0)
+		  || valu > pst->unrelocated_text_high ())
+		pst->set_text_high (valu);
+	      break;
+	    }
+
+	  p = (char *) strchr (namestring, ':');
+	  if (!p)
+	    continue;		/* Not a debugging symbol.   */
+
+	  sym_len = 0;
+	  sym_name = NULL;	/* pacify "gcc -Werror" */
+	  if (dbx->ctx.psymtab_language == language_cplus)
+	    {
+	      std::string name (namestring, p - namestring);
+	      gdb::unique_xmalloc_ptr<char> new_name
+		= cp_canonicalize_string (name.c_str ());
+	      if (new_name != nullptr)
+		{
+		  sym_len = strlen (new_name.get ());
+		  sym_name = obstack_strdup (&objfile->objfile_obstack,
+					     new_name.get ());
+		}
+	    }
+	  else if (dbx->ctx.psymtab_language == language_c)
+	    {
+	      std::string name (namestring, p - namestring);
+	      gdb::unique_xmalloc_ptr<char> new_name
+		= c_canonicalize_name (name.c_str ());
+	      if (new_name != nullptr)
+		{
+		  sym_len = strlen (new_name.get ());
+		  sym_name = obstack_strdup (&objfile->objfile_obstack,
+					     new_name.get ());
+		}
+	    }
+
+	  if (sym_len == 0)
+	    {
+	      sym_name = namestring;
+	      sym_len = p - namestring;
+	    }
+
+	  /* Main processing section for debugging symbols which
+	     the initial read through the symbol tables needs to worry
+	     about.  If we reach this point, the symbol which we are
+	     considering is definitely one we are interested in.
+	     p must also contain the (valid) index into the namestring
+	     which indicates the debugging type symbol.  */
+
+	  switch (p[1])
+	    {
+	    case 'S':
+	      if (pst != nullptr)
+		pst->add_psymbol (std::string_view (sym_name, sym_len), true,
+				  VAR_DOMAIN, LOC_STATIC,
+				  data_sect_index,
+				  psymbol_placement::STATIC,
+				  unrelocated_addr (nlist.n_value),
+				  dbx->ctx.psymtab_language,
+				  partial_symtabs, objfile);
+	      else
+		complaint (_("static `%*s' appears to be defined "
+			     "outside of all compilation units"),
+			   sym_len, sym_name);
+	      continue;
+
+	    case 'G':
+	      /* The addresses in these entries are reported to be
+		 wrong.  See the code that reads 'G's for symtabs.  */
+	      if (pst != nullptr)
+		pst->add_psymbol (std::string_view (sym_name, sym_len), true,
+				  VAR_DOMAIN, LOC_STATIC,
+				  data_sect_index,
+				  psymbol_placement::GLOBAL,
+				  unrelocated_addr (nlist.n_value),
+				  dbx->ctx.psymtab_language,
+				  partial_symtabs, objfile);
+	      else
+		complaint (_("global `%*s' appears to be defined "
+			     "outside of all compilation units"),
+			   sym_len, sym_name);
+	      continue;
+
+	    case 'T':
+	      /* When a 'T' entry is defining an anonymous enum, it
+		 may have a name which is the empty string, or a
+		 single space.  Since they're not really defining a
+		 symbol, those shouldn't go in the partial symbol
+		 table.  We do pick up the elements of such enums at
+		 'check_enum:', below.  */
+	      if (p >= namestring + 2
+		  || (p == namestring + 1
+		      && namestring[0] != ' '))
+		{
+		  if (pst != nullptr)
+		    pst->add_psymbol (std::string_view (sym_name, sym_len),
+				      true, STRUCT_DOMAIN, LOC_TYPEDEF, -1,
+				      psymbol_placement::STATIC,
+				      unrelocated_addr (0),
+				      dbx->ctx.psymtab_language,
+				      partial_symtabs, objfile);
+		  else
+		    complaint (_("enum, struct, or union `%*s' appears "
+				 "to be defined outside of all "
+				 "compilation units"),
+			       sym_len, sym_name);
+		  if (p[2] == 't')
+		    {
+		      /* Also a typedef with the same name.  */
+		      if (pst != nullptr)
+			pst->add_psymbol (std::string_view (sym_name, sym_len),
+					  true, VAR_DOMAIN, LOC_TYPEDEF, -1,
+					  psymbol_placement::STATIC,
+					  unrelocated_addr (0),
+					  dbx->ctx.psymtab_language,
+					  partial_symtabs, objfile);
+		      else
+			complaint (_("typedef `%*s' appears to be defined "
+				     "outside of all compilation units"),
+				   sym_len, sym_name);
+		      p += 1;
+		    }
+		}
+	      goto check_enum;
+
+	    case 't':
+	      if (p != namestring)	/* a name is there, not just :T...  */
+		{
+		  if (pst != nullptr)
+		    pst->add_psymbol (std::string_view (sym_name, sym_len),
+				      true, VAR_DOMAIN, LOC_TYPEDEF, -1,
+				      psymbol_placement::STATIC,
+				      unrelocated_addr (0),
+				      dbx->ctx.psymtab_language,
+				      partial_symtabs, objfile);
+		  else
+		    complaint (_("typename `%*s' appears to be defined "
+				 "outside of all compilation units"),
+			       sym_len, sym_name);
+		}
+	    check_enum:
+	      /* If this is an enumerated type, we need to
+		 add all the enum constants to the partial symbol
+		 table.  This does not cover enums without names, e.g.
+		 "enum {a, b} c;" in C, but fortunately those are
+		 rare.  There is no way for GDB to find those from the
+		 enum type without spending too much time on it.  Thus
+		 to solve this problem, the compiler needs to put out the
+		 enum in a nameless type.  GCC2 does this.  */
+
+	      /* We are looking for something of the form
+		 <name> ":" ("t" | "T") [<number> "="] "e"
+		 {<constant> ":" <value> ","} ";".  */
+
+	      /* Skip over the colon and the 't' or 'T'.  */
+	      p += 2;
+	      /* This type may be given a number.  Also, numbers can come
+		 in pairs like (0,26).  Skip over it.  */
+	      while ((*p >= '0' && *p <= '9')
+		     || *p == '(' || *p == ',' || *p == ')'
+		     || *p == '=')
+		p++;
+
+	      if (*p++ == 'e')
+		{
+		  /* The aix4 compiler emits extra crud before the members.  */
+		  if (*p == '-')
+		    {
+		      /* Skip over the type (?).  */
+		      while (*p != ':')
+			p++;
+
+		      /* Skip over the colon.  */
+		      p++;
+		    }
+
+		  /* We have found an enumerated type.  */
+		  /* According to comments in read_enum_type
+		     a comma could end it instead of a semicolon.
+		     I don't know where that happens.
+		     Accept either.  */
+		  while (*p && *p != ';' && *p != ',')
+		    {
+		      const char *q;
+
+		      /* Check for and handle cretinous dbx symbol name
+			 continuation!  */
+		      if (*p == '\\' || (*p == '?' && p[1] == '\0'))
+			p = next_symbol_text (objfile);
+
+		      /* Point to the character after the name
+			 of the enum constant.  */
+		      for (q = p; *q && *q != ':'; q++)
+			;
+		      /* Note that the value doesn't matter for
+			 enum constants in psymtabs, just in symtabs.  */
+		      if (pst != nullptr)
+			pst->add_psymbol (std::string_view (p, q - p), true,
+					  VAR_DOMAIN, LOC_CONST, -1,
+					  psymbol_placement::STATIC,
+					  unrelocated_addr (0),
+					  dbx->ctx.psymtab_language,
+					  partial_symtabs, objfile);
+		      else
+			complaint (_("enum constant `%*s' appears to be defined "
+				     "outside of all compilation units"),
+				   ((int) (q - p)), p);
+		      /* Point past the name.  */
+		      p = q;
+		      /* Skip over the value.  */
+		      while (*p && *p != ',')
+			p++;
+		      /* Advance past the comma.  */
+		      if (*p)
+			p++;
+		    }
+		}
+	      continue;
+
+	    case 'c':
+	      /* Constant, e.g. from "const" in Pascal.  */
+	      if (pst != nullptr)
+		pst->add_psymbol (std::string_view (sym_name, sym_len), true,
+				  VAR_DOMAIN, LOC_CONST, -1,
+				  psymbol_placement::STATIC,
+				  unrelocated_addr (0),
+				  dbx->ctx.psymtab_language,
+				  partial_symtabs, objfile);
+	      else
+		complaint (_("constant `%*s' appears to be defined "
+			     "outside of all compilation units"),
+			   sym_len, sym_name);
+
+	      continue;
+
+	    case 'f':
+	      if (! pst)
+		{
+		  std::string name (namestring, (p - namestring));
+		  function_outside_compilation_unit_complaint (name.c_str ());
+		}
+	      /* Kludges for ELF/STABS with Sun ACC.  */
+	      dbx->ctx.last_function_name = namestring;
+	      /* Do not fix textlow==0 for .o or NLM files, as 0 is a legit
+		 value for the bottom of the text seg in those cases.  */
+	      if (nlist.n_value == 0
+		  && gdbarch_sofun_address_maybe_missing (gdbarch))
+		{
+		  bound_minimal_symbol minsym
+		    = find_stab_function (namestring,
+					  pst ? pst->filename : NULL, objfile);
+		  if (minsym.minsym != NULL)
+		    nlist.n_value
+		      = CORE_ADDR (minsym.minsym->unrelocated_address ());
+		}
+	      if (pst && textlow_not_set
+		  && gdbarch_sofun_address_maybe_missing (gdbarch))
+		{
+		  pst->set_text_low (unrelocated_addr (nlist.n_value));
+		  textlow_not_set = 0;
+		}
+	      /* End kludge.  */
+
+	      /* Keep track of the start of the last function so we
+		 can handle end of function symbols.  */
+	      last_function_start = nlist.n_value;
+
+	      /* In reordered executables this function may lie outside
+		 the bounds created by N_SO symbols.  If that's the case
+		 use the address of this function as the low bound for
+		 the partial symbol table.  */
+	      if (pst
+		  && (textlow_not_set
+		      || (unrelocated_addr (nlist.n_value)
+			  < pst->unrelocated_text_low ()
+			  && (nlist.n_value != 0))))
+		{
+		  pst->set_text_low (unrelocated_addr (nlist.n_value));
+		  textlow_not_set = 0;
+		}
+	      if (pst != nullptr)
+		pst->add_psymbol (std::string_view (sym_name, sym_len), true,
+				  VAR_DOMAIN, LOC_BLOCK,
+				  SECT_OFF_TEXT (objfile),
+				  psymbol_placement::STATIC,
+				  unrelocated_addr (nlist.n_value),
+				  dbx->ctx.psymtab_language,
+				  partial_symtabs, objfile);
+	      continue;
+
+	      /* Global functions were ignored here, but now they
+		 are put into the global psymtab like one would expect.
+		 They're also in the minimal symbol table.  */
+	    case 'F':
+	      if (! pst)
+		{
+		  std::string name (namestring, (p - namestring));
+		  function_outside_compilation_unit_complaint (name.c_str ());
+		}
+	      /* Kludges for ELF/STABS with Sun ACC.  */
+	      dbx->ctx.last_function_name = namestring;
+	      /* Do not fix textlow==0 for .o or NLM files, as 0 is a legit
+		 value for the bottom of the text seg in those cases.  */
+	      if (nlist.n_value == 0
+		  && gdbarch_sofun_address_maybe_missing (gdbarch))
+		{
+		  bound_minimal_symbol minsym
+		    = find_stab_function (namestring,
+					  pst ? pst->filename : NULL, objfile);
+		  if (minsym.minsym != NULL)
+		    nlist.n_value
+		      = CORE_ADDR (minsym.minsym->unrelocated_address ());
+		}
+	      if (pst && textlow_not_set
+		  && gdbarch_sofun_address_maybe_missing (gdbarch))
+		{
+		  pst->set_text_low (unrelocated_addr (nlist.n_value));
+		  textlow_not_set = 0;
+		}
+	      /* End kludge.  */
+
+	      /* Keep track of the start of the last function so we
+		 can handle end of function symbols.  */
+	      last_function_start = nlist.n_value;
+
+	      /* In reordered executables this function may lie outside
+		 the bounds created by N_SO symbols.  If that's the case
+		 use the address of this function as the low bound for
+		 the partial symbol table.  */
+	      if (pst
+		  && (textlow_not_set
+		      || (unrelocated_addr (nlist.n_value)
+			  < pst->unrelocated_text_low ()
+			  && (nlist.n_value != 0))))
+		{
+		  pst->set_text_low (unrelocated_addr (nlist.n_value));
+		  textlow_not_set = 0;
+		}
+	      if (pst != nullptr)
+		pst->add_psymbol (std::string_view (sym_name, sym_len), true,
+				  VAR_DOMAIN, LOC_BLOCK,
+				  SECT_OFF_TEXT (objfile),
+				  psymbol_placement::GLOBAL,
+				  unrelocated_addr (nlist.n_value),
+				  dbx->ctx.psymtab_language,
+				  partial_symtabs, objfile);
+	      continue;
+
+	      /* Two things show up here (hopefully); static symbols of
+		 local scope (static used inside braces) or extensions
+		 of structure symbols.  We can ignore both.  */
+	    case 'V':
+	    case '(':
+	    case '0':
+	    case '1':
+	    case '2':
+	    case '3':
+	    case '4':
+	    case '5':
+	    case '6':
+	    case '7':
+	    case '8':
+	    case '9':
+	    case '-':
+	    case '#':	/* For symbol identification (used in live ranges).  */
+	      continue;
+
+	    case ':':
+	      /* It is a C++ nested symbol.  We don't need to record it
+		 (I don't think); if we try to look up foo::bar::baz,
+		 then symbols for the symtab containing foo should get
+		 read in, I think.  */
+	      /* Someone says sun cc puts out symbols like
+		 /foo/baz/maclib::/usr/local/bin/maclib,
+		 which would get here with a symbol type of ':'.  */
+	      continue;
+
+	    default:
+	      /* Unexpected symbol descriptor.  The second and subsequent stabs
+		 of a continued stab can show up here.  The question is
+		 whether they ever can mimic a normal stab--it would be
+		 nice if not, since we certainly don't want to spend the
+		 time searching to the end of every string looking for
+		 a backslash.  */
+
+	      complaint (_("unknown symbol descriptor `%c'"),
+			 p[1]);
+
+	      /* Ignore it; perhaps it is an extension that we don't
+		 know about.  */
+	      continue;
+	    }
+	}
+
+	case N_EXCL:
+
+	  namestring = set_namestring (objfile, &nlist);
+
+	  /* Find the corresponding bincl and mark that psymtab on the
+	     psymtab dependency list.  */
+	  {
+	    legacy_psymtab *needed_pst =
+	      find_corresponding_bincl_psymtab (namestring, nlist.n_value, objfile);
+
+	    /* If this include file was defined earlier in this file,
+	       leave it alone.  */
+	    if (needed_pst == pst)
+	      continue;
+
+	    if (needed_pst)
+	      {
+		int i;
+		int found = 0;
+
+		for (i = 0; i < dependencies_used; i++)
+		  if (dependency_list[i] == needed_pst)
+		    {
+		      found = 1;
+		      break;
+		    }
+
+		/* If it's already in the list, skip the rest.  */
+		if (found)
+		  continue;
+
+		dependency_list[dependencies_used++] = needed_pst;
+		if (dependencies_used >= dependencies_allocated)
+		  {
+		    legacy_psymtab **orig = dependency_list;
+
+		    dependency_list =
+		      (legacy_psymtab **)
+		      alloca ((dependencies_allocated *= 2)
+			      * sizeof (legacy_psymtab *));
+		    memcpy (dependency_list, orig,
+			    (dependencies_used
+			     * sizeof (legacy_psymtab *)));
+#ifdef DEBUG_INFO
+		    gdb_printf (gdb_stderr,
+				"Had to reallocate "
+				"dependency list.\n");
+		    gdb_printf (gdb_stderr,
+				"New dependencies allocated: %d\n",
+				dependencies_allocated);
+#endif
+		  }
+	      }
+	  }
+	  continue;
+
+	case N_ENDM:
+	  /* Solaris 2 end of module, finish current partial symbol
+	     table.  stabs_end_psymtab will set the high text address of
+	     PST to the proper value, which is necessary if a module
+	     compiled without debugging info follows this module.  */
+	  if (pst && gdbarch_sofun_address_maybe_missing (gdbarch))
+	    {
+	      stabs_end_psymtab (objfile, partial_symtabs, pst,
+				 psymtab_include_list, includes_used,
+				 symnum * dbx->ctx.symbol_size,
+				 (unrelocated_addr) 0, dependency_list,
+				 dependencies_used, textlow_not_set);
+	      pst = (legacy_psymtab *) 0;
+	      includes_used = 0;
+	      dependencies_used = 0;
+	      dbx->ctx.has_line_numbers = 0;
+	    }
+	  continue;
+
+	case N_RBRAC:
+#ifdef HANDLE_RBRAC
+	  HANDLE_RBRAC (nlist.n_value);
+	  continue;
+#endif
+	case N_EINCL:
+	case N_DSLINE:
+	case N_BSLINE:
+	case N_SSYM:		/* Claim: Structure or union element.
+				   Hopefully, I can ignore this.  */
+	case N_ENTRY:		/* Alternate entry point; can ignore.  */
+	case N_MAIN:		/* Can definitely ignore this.   */
+	case N_CATCH:		/* These are GNU C++ extensions */
+	case N_EHDECL:		/* that can safely be ignored here.  */
+	case N_LENG:
+	case N_BCOMM:
+	case N_ECOMM:
+	case N_ECOML:
+	case N_FNAME:
+	case N_SLINE:
+	case N_RSYM:
+	case N_PSYM:
+	case N_BNSYM:
+	case N_ENSYM:
+	case N_LBRAC:
+	case N_NSYMS:		/* Ultrix 4.0: symbol count */
+	case N_DEFD:		/* GNU Modula-2 */
+	case N_ALIAS:		/* SunPro F77: alias name, ignore for now.  */
+
+	case N_OBJ:		/* Useless types from Solaris.  */
+	case N_OPT:
+	case N_PATCH:
+	  /* These symbols aren't interesting; don't worry about them.  */
+	  continue;
+
+	default:
+	  /* If we haven't found it yet, ignore it.  It's probably some
+	     new type we don't know about yet.  */
+	  unknown_symtype_complaint (hex_string (nlist.n_type));
+	  continue;
+	}
+    }
+
+  /* If there's stuff to be cleaned up, clean it up.  */
+  if (pst)
+    {
+      /* Don't set high text address of PST lower than it already
+	 is.  */
+      unrelocated_addr text_end
+	= (unrelocated_addr
+	   ((dbx->ctx.lowest_text_address == (unrelocated_addr) -1
+	     ? text_addr
+	     : CORE_ADDR (dbx->ctx.lowest_text_address))
+	    + text_size));
+
+      stabs_end_psymtab (objfile, partial_symtabs,
+			 pst, psymtab_include_list, includes_used,
+			 symnum * dbx->ctx.symbol_size,
+			 (text_end > pst->unrelocated_text_high ()
+			  ? text_end : pst->unrelocated_text_high ()),
+			 dependency_list, dependencies_used, textlow_not_set);
+    }
+}
+
+/* Scan and build partial symbols for a symbol file.
+   We have been initialized by a call to dbx_symfile_init, which 
+   put all the relevant info into a "struct dbx_symfile_info",
+   hung off the objfile structure.  */
+
+void
+read_stabs_symtab (struct objfile *objfile, symfile_add_flags symfile_flags)
+{
+  bfd *sym_bfd;
+  int val;
+  struct dbx_symfile_info *key = dbx_objfile_data_key.get (objfile);
+
+  sym_bfd = objfile->obfd.get ();
+
+  /* .o and .nlm files are relocatables with text, data and bss segs based at
+     0.  This flag disables special (Solaris stabs-in-elf only) fixups for
+     symbols with a value of 0.  */
+
+  key->ctx.symfile_relocatable = bfd_get_file_flags (sym_bfd) & HAS_RELOC;
+
+  val = bfd_seek (sym_bfd, DBX_SYMTAB_OFFSET (objfile), SEEK_SET);
+  if (val < 0)
+    perror_with_name (objfile_name (objfile));
+
+  key->ctx.symbol_size = DBX_SYMBOL_SIZE (objfile);
+  key->ctx.symbol_table_offset = DBX_SYMTAB_OFFSET (objfile);
+
+  scoped_free_pendings free_pending;
+
+  minimal_symbol_reader reader (objfile);
+
+  /* Read stabs data from executable file and define symbols.  */
+
+  psymbol_functions *psf = new psymbol_functions ();
+  psymtab_storage *partial_symtabs = psf->get_partial_symtabs ().get ();
+  objfile->qf.emplace_front (psf);
+  read_stabs_symtab_1 (reader, partial_symtabs, objfile);
+
+  /* Install any minimal symbols that have been collected as the current
+     minimal symbols for this objfile.  */
+
+  reader.install ();
+}
+
+/* Record the namespace that the function defined by SYMBOL was
+   defined in, if necessary.  BLOCK is the associated block; use
+   OBSTACK for allocation.  */
+
+static void
+cp_set_block_scope (const struct symbol *symbol,
+		    struct block *block,
+		    struct obstack *obstack)
+{
+  if (symbol->demangled_name () != NULL)
+    {
+      /* Try to figure out the appropriate namespace from the
+	 demangled name.  */
+
+      /* FIXME: carlton/2003-04-15: If the function in question is
+	 a method of a class, the name will actually include the
+	 name of the class as well.  This should be harmless, but
+	 is a little unfortunate.  */
+
+      const char *name = symbol->demangled_name ();
+      unsigned int prefix_len = cp_entire_prefix_len (name);
+
+      block->set_scope (obstack_strndup (obstack, name, prefix_len),
+			obstack);
+    }
+}
+
+bound_minimal_symbol
+find_stab_function (const char *namestring, const char *filename,
+		    struct objfile *objfile)
+{
+  int n;
+
+  const char *colon = strchr (namestring, ':');
+  if (colon == NULL)
+    n = 0;
+  else
+    n = colon - namestring;
+
+  char *p = (char *) alloca (n + 2);
+  strncpy (p, namestring, n);
+  p[n] = 0;
+
+  bound_minimal_symbol msym
+    = lookup_minimal_symbol (current_program_space, p, objfile, filename);
+  if (msym.minsym == NULL)
+    {
+      /* Sun Fortran appends an underscore to the minimal symbol name,
+	 try again with an appended underscore if the minimal symbol
+	 was not found.  */
+      p[n] = '_';
+      p[n + 1] = 0;
+      msym
+	= lookup_minimal_symbol (current_program_space, p, objfile, filename);
+    }
+
+  if (msym.minsym == NULL && filename != NULL)
+    {
+      /* Try again without the filename.  */
+      p[n] = 0;
+      msym = lookup_minimal_symbol (current_program_space, p, objfile);
+    }
+  if (msym.minsym == NULL && filename != NULL)
+    {
+      /* And try again for Sun Fortran, but without the filename.  */
+      p[n] = '_';
+      p[n + 1] = 0;
+      msym = lookup_minimal_symbol (current_program_space, p, objfile);
+    }
+
+  return msym;
+}
+
+/* Add header file number I for this object file
+   at the next successive FILENUM.  */
+
+static void
+add_this_object_header_file (int i)
+{
+  if (n_this_object_header_files == n_allocated_this_object_header_files)
+    {
+      n_allocated_this_object_header_files *= 2;
+      this_object_header_files
+	= (int *) xrealloc ((char *) this_object_header_files,
+		       n_allocated_this_object_header_files * sizeof (int));
+    }
+
+  this_object_header_files[n_this_object_header_files++] = i;
+}
+
+/* Add to this file an "old" header file, one already seen in
+   a previous object file.  NAME is the header file's name.
+   INSTANCE is its instance code, to select among multiple
+   symbol tables for the same header file.  */
+
+static void
+add_old_header_file (const char *name, int instance, struct objfile *objfile)
+{
+  struct header_file *p = HEADER_FILES (objfile);
+  int i;
+
+  for (i = 0; i < N_HEADER_FILES (objfile); i++)
+    if (filename_cmp (p[i].name, name) == 0 && instance == p[i].instance)
+      {
+	add_this_object_header_file (i);
+	return;
+      }
+  repeated_header_complaint (name, symnum);
+}
+
+/* Add to this file a "new" header file: definitions for its types follow.
+   NAME is the header file's name.
+   Most often this happens only once for each distinct header file,
+   but not necessarily.  If it happens more than once, INSTANCE has
+   a different value each time, and references to the header file
+   use INSTANCE values to select among them.
+
+   dbx output contains "begin" and "end" markers for each new header file,
+   but at this level we just need to know which files there have been;
+   so we record the file when its "begin" is seen and ignore the "end".  */
+
+static void
+add_new_header_file (const char *name, int instance, struct objfile *objfile)
+{
+  int i;
+  struct header_file *hfile;
+
+  /* Make sure there is room for one more header file.  */
+
+  i = N_ALLOCATED_HEADER_FILES (objfile);
+
+  if (N_HEADER_FILES (objfile) == i)
+    {
+      if (i == 0)
+	{
+	  N_ALLOCATED_HEADER_FILES (objfile) = 10;
+	  HEADER_FILES (objfile) = (struct header_file *)
+	    xmalloc (10 * sizeof (struct header_file));
+	}
+      else
+	{
+	  i *= 2;
+	  N_ALLOCATED_HEADER_FILES (objfile) = i;
+	  HEADER_FILES (objfile) = (struct header_file *)
+	    xrealloc ((char *) HEADER_FILES (objfile),
+		      (i * sizeof (struct header_file)));
+	}
+    }
+
+  /* Create an entry for this header file.  */
+
+  i = N_HEADER_FILES (objfile)++;
+  hfile = HEADER_FILES (objfile) + i;
+  hfile->name = xstrdup (name);
+  hfile->instance = instance;
+  hfile->length = 10;
+  hfile->vector = XCNEWVEC (struct type *, 10);
+
+  add_this_object_header_file (i);
+}
+
+/* See stabsread.h.  */
+
+void
+process_one_symbol (int type, int desc, CORE_ADDR valu, const char *name,
+		    const section_offsets &section_offsets,
+		    struct objfile *objfile, enum language language)
+{
+  struct gdbarch *gdbarch = objfile->arch ();
+  struct context_stack *newobj;
+  struct context_stack cstk;
+  /* This remembers the address of the start of a function.  It is
+     used because in Solaris 2, N_LBRAC, N_RBRAC, and N_SLINE entries
+     are relative to the current function's start address.  On systems
+     other than Solaris 2, this just holds the SECT_OFF_TEXT value,
+     and is used to relocate these symbol types rather than
+     SECTION_OFFSETS.  */
+  static CORE_ADDR function_start_offset;
+
+  /* This holds the address of the start of a function, without the
+     system peculiarities of function_start_offset.  */
+  static CORE_ADDR last_function_start;
+
+  /* If this is nonzero, we've seen an N_SLINE since the start of the
+     current function.  We use this to tell us to move the first sline
+     to the beginning of the function regardless of what its given
+     value is.  */
+  static int sline_found_in_function = 1;
+
+  /* If this is nonzero, we've seen a non-gcc N_OPT symbol for this
+     source file.  Used to detect the SunPRO solaris compiler.  */
+  static int n_opt_found;
+
+  /* The section index for this symbol.  */
+  int section_index = -1;
+
+  struct dbx_symfile_info *key = dbx_objfile_data_key.get (objfile);
+
+  /* Something is wrong if we see real data before seeing a source
+     file name.  */
+
+  if (get_last_source_file () == NULL && type != (unsigned char) N_SO)
+    {
+      /* Ignore any symbols which appear before an N_SO symbol.
+	 Currently no one puts symbols there, but we should deal
+	 gracefully with the case.  A complain()t might be in order,
+	 but this should not be an error ().  */
+      return;
+    }
+
+  switch (type)
+    {
+    case N_FUN:
+    case N_FNAME:
+
+      if (*name == '\000')
+	{
+	  /* This N_FUN marks the end of a function.  This closes off
+	     the current block.  */
+	  struct block *block;
+
+	  if (outermost_context_p ())
+	    {
+	      lbrac_mismatch_complaint (symnum);
+	      break;
+	    }
+
+	  /* The following check is added before recording line 0 at
+	     end of function so as to handle hand-generated stabs
+	     which may have an N_FUN stabs at the end of the function,
+	     but no N_SLINE stabs.  */
+	  if (sline_found_in_function)
+	    {
+	      CORE_ADDR addr = last_function_start + valu;
+
+	      record_line
+		(get_current_subfile (), 0,
+		 unrelocated_addr (gdbarch_addr_bits_remove (gdbarch, addr)
+				   - objfile->text_section_offset ()));
+	    }
+
+	  within_function = 0;
+	  cstk = pop_context ();
+
+	  /* Make a block for the local symbols within.  */
+	  block = finish_block (cstk.name,
+				cstk.old_blocks, NULL,
+				cstk.start_addr, cstk.start_addr + valu);
+
+	  /* For C++, set the block's scope.  */
+	  if (cstk.name->language () == language_cplus)
+	    cp_set_block_scope (cstk.name, block, &objfile->objfile_obstack);
+
+	  /* May be switching to an assembler file which may not be using
+	     block relative stabs, so reset the offset.  */
+	  function_start_offset = 0;
+
+	  break;
+	}
+
+      sline_found_in_function = 0;
+
+      /* Relocate for dynamic loading.  */
+      section_index = SECT_OFF_TEXT (objfile);
+      valu += section_offsets[SECT_OFF_TEXT (objfile)];
+      valu = gdbarch_addr_bits_remove (gdbarch, valu);
+      last_function_start = valu;
+
+      goto define_a_symbol;
+
+    case N_LBRAC:
+      /* This "symbol" just indicates the start of an inner lexical
+	 context within a function.  */
+
+      /* Ignore extra outermost context from SunPRO cc and acc.  */
+      if (n_opt_found && desc == 1)
+	break;
+
+      valu += function_start_offset;
+
+      push_context (desc, valu);
+      break;
+
+    case N_RBRAC:
+      /* This "symbol" just indicates the end of an inner lexical
+	 context that was started with N_LBRAC.  */
+
+      /* Ignore extra outermost context from SunPRO cc and acc.  */
+      if (n_opt_found && desc == 1)
+	break;
+
+      valu += function_start_offset;
+
+      if (outermost_context_p ())
+	{
+	  lbrac_mismatch_complaint (symnum);
+	  break;
+	}
+
+      cstk = pop_context ();
+      if (desc != cstk.depth)
+	lbrac_mismatch_complaint (symnum);
+
+      if (*get_local_symbols () != NULL)
+	{
+	  /* GCC development snapshots from March to December of
+	     2000 would output N_LSYM entries after N_LBRAC
+	     entries.  As a consequence, these symbols are simply
+	     discarded.  Complain if this is the case.  */
+	  complaint (_("misplaced N_LBRAC entry; discarding local "
+		       "symbols which have no enclosing block"));
+	}
+      *get_local_symbols () = cstk.locals;
+
+      if (get_context_stack_depth () > 1)
+	{
+	  /* This is not the outermost LBRAC...RBRAC pair in the
+	     function, its local symbols preceded it, and are the ones
+	     just recovered from the context stack.  Define the block
+	     for them (but don't bother if the block contains no
+	     symbols.  Should we complain on blocks without symbols?
+	     I can't think of any useful purpose for them).  */
+	  if (*get_local_symbols () != NULL)
+	    {
+	      /* Muzzle a compiler bug that makes end < start.
+
+		 ??? Which compilers?  Is this ever harmful?.  */
+	      if (cstk.start_addr > valu)
+		{
+		  complaint (_("block start larger than block end"));
+		  cstk.start_addr = valu;
+		}
+	      /* Make a block for the local symbols within.  */
+	      finish_block (0, cstk.old_blocks, NULL,
+			    cstk.start_addr, valu);
+	    }
+	}
+      else
+	{
+	  /* This is the outermost LBRAC...RBRAC pair.  There is no
+	     need to do anything; leave the symbols that preceded it
+	     to be attached to the function's own block.  We need to
+	     indicate that we just moved outside of the function.  */
+	  within_function = 0;
+	}
+
+      break;
+
+    case N_FN:
+    case N_FN_SEQ:
+      /* This kind of symbol indicates the start of an object file.
+	 Relocate for dynamic loading.  */
+      section_index = SECT_OFF_TEXT (objfile);
+      valu += section_offsets[SECT_OFF_TEXT (objfile)];
+      break;
+
+    case N_SO:
+      /* This type of symbol indicates the start of data for one
+	 source file.  Finish the symbol table of the previous source
+	 file (if any) and start accumulating a new symbol table.
+	 Relocate for dynamic loading.  */
+      section_index = SECT_OFF_TEXT (objfile);
+      valu += section_offsets[SECT_OFF_TEXT (objfile)];
+
+      n_opt_found = 0;
+
+      if (get_last_source_file ())
+	{
+	  /* Check if previous symbol was also an N_SO (with some
+	     sanity checks).  If so, that one was actually the
+	     directory name, and the current one is the real file
+	     name.  Patch things up.  */
+	  if (previous_stab_code == (unsigned char) N_SO)
+	    {
+	      patch_subfile_names (get_current_subfile (), name);
+	      break;		/* Ignore repeated SOs.  */
+	    }
+	  end_compunit_symtab (valu);
+	  end_stabs ();
+	}
+
+      /* Null name means this just marks the end of text for this .o
+	 file.  Don't start a new symtab in this case.  */
+      if (*name == '\000')
+	break;
+
+      function_start_offset = 0;
+
+      start_stabs ();
+      start_compunit_symtab (objfile, name, NULL, valu, language);
+      record_debugformat ("stabs");
+      break;
+
+    case N_SOL:
+      /* This type of symbol indicates the start of data for a
+	 sub-source-file, one whose contents were copied or included
+	 in the compilation of the main source file (whose name was
+	 given in the N_SO symbol).  Relocate for dynamic loading.  */
+      section_index = SECT_OFF_TEXT (objfile);
+      valu += section_offsets[SECT_OFF_TEXT (objfile)];
+      start_subfile (name);
+      break;
+
+    case N_BINCL:
+      push_subfile ();
+      add_new_header_file (name, valu, objfile);
+      start_subfile (name);
+      break;
+
+    case N_EINCL:
+      start_subfile (pop_subfile ());
+      break;
+
+    case N_EXCL:
+      add_old_header_file (name, valu, objfile);
+      break;
+
+    case N_SLINE:
+      /* This type of "symbol" really just records one line-number --
+	 core-address correspondence.  Enter it in the line list for
+	 this symbol table.  */
+
+      /* Relocate for dynamic loading and for ELF acc
+	 function-relative symbols.  */
+      valu += function_start_offset;
+
+      /* GCC 2.95.3 emits the first N_SLINE stab somewhere in the
+	 middle of the prologue instead of right at the start of the
+	 function.  To deal with this we record the address for the
+	 first N_SLINE stab to be the start of the function instead of
+	 the listed location.  We really shouldn't to this.  When
+	 compiling with optimization, this first N_SLINE stab might be
+	 optimized away.  Other (non-GCC) compilers don't emit this
+	 stab at all.  There is no real harm in having an extra
+	 numbered line, although it can be a bit annoying for the
+	 user.  However, it totally screws up our testsuite.
+
+	 So for now, keep adjusting the address of the first N_SLINE
+	 stab, but only for code compiled with GCC.  */
+
+      if (within_function && sline_found_in_function == 0)
+	{
+	  CORE_ADDR addr = processing_gcc_compilation == 2 ?
+			   last_function_start : valu;
+
+	  record_line
+	    (get_current_subfile (), desc,
+	     unrelocated_addr (gdbarch_addr_bits_remove (gdbarch, addr)
+			       - objfile->text_section_offset ()));
+	  sline_found_in_function = 1;
+	}
+      else
+	record_line
+	  (get_current_subfile (), desc,
+	   unrelocated_addr (gdbarch_addr_bits_remove (gdbarch, valu)
+			     - objfile->text_section_offset ()));
+      break;
+
+    case N_BCOMM:
+      common_block_start (name, objfile);
+      break;
+
+    case N_ECOMM:
+      common_block_end (objfile);
+      break;
+
+      /* The following symbol types need to have the appropriate
+	 offset added to their value; then we process symbol
+	 definitions in the name.  */
+
+    case N_STSYM:		/* Static symbol in data segment.  */
+    case N_LCSYM:		/* Static symbol in BSS segment.  */
+    case N_ROSYM:		/* Static symbol in read-only data segment.  */
+      /* HORRID HACK DEPT.  However, it's Sun's furgin' fault.
+	 Solaris 2's stabs-in-elf makes *most* symbols relative but
+	 leaves a few absolute (at least for Solaris 2.1 and version
+	 2.0.1 of the SunPRO compiler).  N_STSYM and friends sit on
+	 the fence.  .stab "foo:S...",N_STSYM is absolute (ld
+	 relocates it) .stab "foo:V...",N_STSYM is relative (section
+	 base subtracted).  This leaves us no choice but to search for
+	 the 'S' or 'V'...  (or pass the whole section_offsets stuff
+	 down ONE MORE function call level, which we really don't want
+	 to do).  */
+      {
+	const char *p;
+
+	/* Normal object file and NLMs have non-zero text seg offsets,
+	   but don't need their static syms offset in this fashion.
+	   XXX - This is really a crock that should be fixed in the
+	   solib handling code so that I don't have to work around it
+	   here.  */
+
+	if (!key->ctx.symfile_relocatable)
+	  {
+	    p = strchr (name, ':');
+	    if (p != 0 && p[1] == 'S')
+	      {
+		/* The linker relocated it.  We don't want to add a
+		   Sun-stabs Tfoo.foo-like offset, but we *do*
+		   want to add whatever solib.c passed to
+		   symbol_file_add as addr (this is known to affect
+		   SunOS 4, and I suspect ELF too).  Since there is no
+		   Ttext.text symbol, we can get addr from the text offset.  */
+		section_index = SECT_OFF_TEXT (objfile);
+		valu += section_offsets[SECT_OFF_TEXT (objfile)];
+		goto define_a_symbol;
+	      }
+	  }
+	/* Since it's not the kludge case, re-dispatch to the right
+	   handler.  */
+	switch (type)
+	  {
+	  case N_STSYM:
+	    goto case_N_STSYM;
+	  case N_LCSYM:
+	    goto case_N_LCSYM;
+	  case N_ROSYM:
+	    goto case_N_ROSYM;
+	  default:
+	    internal_error (_("failed internal consistency check"));
+	  }
+      }
+
+    case_N_STSYM:		/* Static symbol in data segment.  */
+    case N_DSLINE:		/* Source line number, data segment.  */
+      section_index = SECT_OFF_DATA (objfile);
+      valu += section_offsets[SECT_OFF_DATA (objfile)];
+      goto define_a_symbol;
+
+    case_N_LCSYM:		/* Static symbol in BSS segment.  */
+    case N_BSLINE:		/* Source line number, BSS segment.  */
+      /* N_BROWS: overlaps with N_BSLINE.  */
+      section_index = SECT_OFF_BSS (objfile);
+      valu += section_offsets[SECT_OFF_BSS (objfile)];
+      goto define_a_symbol;
+
+    case_N_ROSYM:		/* Static symbol in read-only data segment.  */
+      section_index = SECT_OFF_RODATA (objfile);
+      valu += section_offsets[SECT_OFF_RODATA (objfile)];
+      goto define_a_symbol;
+
+    case N_ENTRY:		/* Alternate entry point.  */
+      /* Relocate for dynamic loading.  */
+      section_index = SECT_OFF_TEXT (objfile);
+      valu += section_offsets[SECT_OFF_TEXT (objfile)];
+      goto define_a_symbol;
+
+      /* The following symbol types we don't know how to process.
+	 Handle them in a "default" way, but complain to people who
+	 care.  */
+    default:
+    case N_CATCH:		/* Exception handler catcher.  */
+    case N_EHDECL:		/* Exception handler name.  */
+    case N_PC:			/* Global symbol in Pascal.  */
+    case N_M2C:			/* Modula-2 compilation unit.  */
+      /* N_MOD2: overlaps with N_EHDECL.  */
+    case N_SCOPE:		/* Modula-2 scope information.  */
+    case N_ECOML:		/* End common (local name).  */
+    case N_NBTEXT:		/* Gould Non-Base-Register symbols???  */
+    case N_NBDATA:
+    case N_NBBSS:
+    case N_NBSTS:
+    case N_NBLCS:
+      unknown_symtype_complaint (hex_string (type));
+
+    define_a_symbol:
+      [[fallthrough]];
+      /* These symbol types don't need the address field relocated,
+	 since it is either unused, or is absolute.  */
+    case N_GSYM:		/* Global variable.  */
+    case N_NSYMS:		/* Number of symbols (Ultrix).  */
+    case N_NOMAP:		/* No map?  (Ultrix).  */
+    case N_RSYM:		/* Register variable.  */
+    case N_DEFD:		/* Modula-2 GNU module dependency.  */
+    case N_SSYM:		/* Struct or union element.  */
+    case N_LSYM:		/* Local symbol in stack.  */
+    case N_PSYM:		/* Parameter variable.  */
+    case N_LENG:		/* Length of preceding symbol type.  */
+      if (name)
+	{
+	  int deftype;
+	  const char *colon_pos = strchr (name, ':');
+
+	  if (colon_pos == NULL)
+	    deftype = '\0';
+	  else
+	    deftype = colon_pos[1];
+
+	  switch (deftype)
+	    {
+	    case 'f':
+	    case 'F':
+	      /* Deal with the SunPRO 3.0 compiler which omits the
+		 address from N_FUN symbols.  */
+	      if (type == N_FUN
+		  && valu == section_offsets[SECT_OFF_TEXT (objfile)]
+		  && gdbarch_sofun_address_maybe_missing (gdbarch))
+		{
+		  bound_minimal_symbol minsym
+		    = find_stab_function (name, get_last_source_file (),
+					  objfile);
+		  if (minsym.minsym != NULL)
+		    valu = minsym.value_address ();
+		}
+
+	      /* These addresses are absolute.  */
+	      function_start_offset = valu;
+
+	      within_function = 1;
+
+	      if (get_context_stack_depth () > 1)
+		{
+		  complaint (_("unmatched N_LBRAC before symtab pos %d"),
+			     symnum);
+		  break;
+		}
+
+	      if (!outermost_context_p ())
+		{
+		  struct block *block;
+
+		  cstk = pop_context ();
+		  /* Make a block for the local symbols within.  */
+		  block = finish_block (cstk.name,
+					cstk.old_blocks, NULL,
+					cstk.start_addr, valu);
+
+		  /* For C++, set the block's scope.  */
+		  if (cstk.name->language () == language_cplus)
+		    cp_set_block_scope (cstk.name, block,
+					&objfile->objfile_obstack);
+		}
+
+	      newobj = push_context (0, valu);
+	      newobj->name = define_symbol (valu, name, desc, type, objfile);
+	      if (newobj->name != nullptr)
+		newobj->name->set_section_index (section_index);
+	      break;
+
+	    default:
+	      {
+		struct symbol *sym = define_symbol (valu, name, desc, type,
+						    objfile);
+		if (sym != nullptr)
+		  sym->set_section_index (section_index);
+	      }
+	      break;
+	    }
+	}
+      break;
+
+      /* We use N_OPT to carry the gcc2_compiled flag.  Sun uses it
+	 for a bunch of other flags, too.  Someday we may parse their
+	 flags; for now we ignore theirs and hope they'll ignore ours.  */
+    case N_OPT:			/* Solaris 2: Compiler options.  */
+      if (name)
+	{
+	  if (strcmp (name, GCC2_COMPILED_FLAG_SYMBOL) == 0)
+	    {
+	      processing_gcc_compilation = 2;
+	    }
+	  else
+	    n_opt_found = 1;
+	}
+      break;
+
+    case N_MAIN:		/* Name of main routine.  */
+      /* FIXME: If one has a symbol file with N_MAIN and then replaces
+	 it with a symbol file with "main" and without N_MAIN.  I'm
+	 not sure exactly what rule to follow but probably something
+	 like: N_MAIN takes precedence over "main" no matter what
+	 objfile it is in; If there is more than one N_MAIN, choose
+	 the one in the symfile_objfile; If there is more than one
+	 N_MAIN within a given objfile, complain() and choose
+	 arbitrarily.  (kingdon) */
+      if (name != NULL)
+	set_objfile_main_name (objfile, name, language_unknown);
+      break;
+
+      /* The following symbol types can be ignored.  */
+    case N_OBJ:			/* Solaris 2: Object file dir and name.  */
+    case N_PATCH:		/* Solaris 2: Patch Run Time Checker.  */
+      /* N_UNDF:                   Solaris 2: File separator mark.  */
+      /* N_UNDF: -- we will never encounter it, since we only process
+	 one file's symbols at once.  */
+    case N_ENDM:		/* Solaris 2: End of module.  */
+    case N_ALIAS:		/* SunPro F77: alias name, ignore for now.  */
+      break;
+    }
+
+  /* '#' is a GNU C extension to allow one symbol to refer to another
+     related symbol.
+
+     Generally this is used so that an alias can refer to its main
+     symbol.  */
+  gdb_assert (name);
+  if (name[0] == '#')
+    {
+      /* Initialize symbol reference names and determine if this is a
+	 definition.  If a symbol reference is being defined, go ahead
+	 and add it.  Otherwise, just return.  */
+
+      const char *s = name;
+      int refnum;
+
+      /* If this stab defines a new reference ID that is not on the
+	 reference list, then put it on the reference list.
+
+	 We go ahead and advance NAME past the reference, even though
+	 it is not strictly necessary at this time.  */
+      refnum = symbol_reference_defined (&s);
+      if (refnum >= 0)
+	if (!ref_search (refnum))
+	  ref_add (refnum, 0, name, valu);
+      name = s;
+    }
+
+  previous_stab_code = type;
+}
+
 #define VISIBILITY_PRIVATE	'0'	/* Stabs character for private field */
 #define VISIBILITY_PROTECTED	'1'	/* Stabs character for protected fld */
 #define VISIBILITY_PUBLIC	'2'	/* Stabs character for public field */
@@ -2289,7 +4774,7 @@ read_member_functions (struct stab_field_info *fip, const char **pp,
 
       if ((*pp)[0] == 'o' && (*pp)[1] == 'p' && is_cplus_marker ((*pp)[2]))
 	{
-	  /* This is a completely wierd case.  In order to stuff in the
+	  /* This is a completely weird case.  In order to stuff in the
 	     names that might contain colons (the usual name delimiter),
 	     Mike Tiemann defined a different name format which is
 	     signalled if the identifier is "op$".  In that case, the
@@ -3911,7 +6396,7 @@ read_huge_number (const char **pp, int end, int *bits,
 	}
 
       /* -0x7f is the same as 0x80.  So deal with it by adding one to
-	 the number of bits.  Two's complement represention octals
+	 the number of bits.  Two's complement representation octals
 	 can't have a '-' in front.  */
       if (sign == -1 && !twos_complement_representation)
 	++nbits;
diff --git a/gdb/stabsread.h b/gdb/stabsread.h
index 0a86840..565038a 100644
--- a/gdb/stabsread.h
+++ b/gdb/stabsread.h
@@ -1,5 +1,5 @@
-/* Include file for stabs debugging format support functions.
-   Copyright (C) 1986-2024 Free Software Foundation, Inc.
+  /* Include file for stabs debugging format support functions.
+     Copyright (C) 1986-2024 Free Software Foundation, Inc.
 
    This file is part of GDB.
 
@@ -54,7 +54,7 @@ extern unsigned char processing_gcc_compilation;
 extern int within_function;
 
 /* Hash table of global symbols whose values are not known yet.
-   They are chained thru the SYMBOL_VALUE_CHAIN, since we don't
+   They are chained through the SYMBOL_VALUE_CHAIN, since we don't
    have the correct data for that slot yet.
 
    The use of the LOC_BLOCK code in this chain is nonstandard--
@@ -173,7 +173,7 @@ class psymtab_storage;
 /* Functions exported by dbxread.c.  These are not in stabsread.c because
    they are only used by some stabs readers.  */
 
-extern legacy_psymtab *dbx_end_psymtab
+extern legacy_psymtab *stabs_end_psymtab
   (struct objfile *objfile, psymtab_storage *partial_symtabs,
    legacy_psymtab *pst,
    const char **include_list, int num_includes,
@@ -185,6 +185,12 @@ extern void process_one_symbol (int, int, CORE_ADDR, const char *,
 				const section_offsets &,
 				struct objfile *, enum language);
 
+/* Setup partial_symtab's describing each source file for which
+   debugging information is available.  */
+
+void
+read_stabs_symtab (struct objfile *, symfile_add_flags);
+
 extern void elfstab_build_psymtabs (struct objfile *objfile,
 				    asection *stabsect,
 				    file_ptr stabstroffset,
@@ -215,4 +221,91 @@ extern void init_header_files (void);
 
 extern void scan_file_globals (struct objfile *objfile);
 
+/* Complaints about the symbols we have encountered.  */
+
+void
+unknown_symtype_complaint (const char *);
+
+void
+lbrac_mismatch_complaint (int);
+
+void
+repeated_header_complaint (const char *, int);
+
+bound_minimal_symbol
+find_stab_function (const char *, const char *, struct objfile *);
+
+/* This handles a single symbol from the symbol-file, building symbols
+   into a GDB symtab.  It takes these arguments and an implicit argument.
+
+   TYPE is the type field of the ".stab" symbol entry.
+   DESC is the desc field of the ".stab" entry.
+   VALU is the value field of the ".stab" entry.
+   NAME is the symbol name, in our address space.
+   SECTION_OFFSETS is a set of amounts by which the sections of this
+   object file were relocated when it was loaded into memory.  Note
+   that these section_offsets are not the objfile->section_offsets but
+   the pst->section_offsets.  All symbols that refer to memory
+   locations need to be offset by these amounts.
+   OBJFILE is the object file from which we are reading symbols.  It
+   is used in end_compunit_symtab.
+   LANGUAGE is the language of the symtab.
+*/
+
+void
+process_one_symbol (int, int, CORE_ADDR, const char *,
+		    const section_offsets &,
+		    struct objfile *, enum language);
+
+#define LDSYMOFF(p) (((struct symloc *)((p)->read_symtab_private))->ldsymoff)
+#define LDSYMLEN(p) (((struct symloc *)((p)->read_symtab_private))->ldsymlen)
+#define SYMLOC(p) ((struct symloc *)((p)->read_symtab_private))
+#define SYMBOL_SIZE(p) (SYMLOC(p)->symbol_size)
+#define SYMBOL_OFFSET(p) (SYMLOC(p)->symbol_offset)
+#define STRING_OFFSET(p) (SYMLOC(p)->string_offset)
+#define FILE_STRING_OFFSET(p) (SYMLOC(p)->file_string_offset)
+#define PST_LANGUAGE(p) (SYMLOC(p)->pst_language)
+
+#define INTERNALIZE_SYMBOL(intern, extern, abfd)			\
+  {									\
+    (intern).n_strx = bfd_h_get_32 (abfd, (extern)->e_strx);		\
+    (intern).n_type = bfd_h_get_8 (abfd, (extern)->e_type);		\
+    (intern).n_other = 0;						\
+    (intern).n_desc = bfd_h_get_16 (abfd, (extern)->e_desc);  		\
+    if (bfd_get_sign_extend_vma (abfd))					\
+      (intern).n_value = bfd_h_get_signed_32 (abfd, (extern)->e_value);	\
+    else								\
+      (intern).n_value = bfd_h_get_32 (abfd, (extern)->e_value);	\
+  }
+
+/* We put a pointer to this structure in the read_symtab_private field
+   of the psymtab.  */
+
+struct symloc
+  {
+    /* Offset within the file symbol table of first local symbol for this
+       file.  */
+
+    int ldsymoff;
+
+    /* Length (in bytes) of the section of the symbol table devoted to
+       this file's symbols (actually, the section bracketed may contain
+       more than just this file's symbols).  If ldsymlen is 0, the only
+       reason for this thing's existence is the dependency list.  Nothing
+       else will happen when it is read in.  */
+
+    int ldsymlen;
+
+    /* The size of each symbol in the symbol file (in external form).  */
+
+    int symbol_size;
+
+    /* Further information needed to locate the symbols if they are in
+       an ELF file.  */
+
+    int symbol_offset;
+    int string_offset;
+    int file_string_offset;
+    enum language pst_language;
+  };
 #endif /* STABSREAD_H */
diff --git a/gdb/stack.c b/gdb/stack.c
index b36193b..4a3e7e4 100644
--- a/gdb/stack.c
+++ b/gdb/stack.c
@@ -50,7 +50,6 @@
 #include "linespec.h"
 #include "cli/cli-utils.h"
 #include "objfiles.h"
-#include "annotate.h"
 
 #include "symfile.h"
 #include "extension.h"
@@ -1299,13 +1298,12 @@ find_frame_funname (const frame_info_ptr &frame, enum language *funlang,
     }
   else
     {
-      struct bound_minimal_symbol msymbol;
       CORE_ADDR pc;
 
       if (!get_frame_address_in_block_if_available (frame, &pc))
 	return funname;
 
-      msymbol = lookup_minimal_symbol_by_pc (pc);
+      bound_minimal_symbol msymbol = lookup_minimal_symbol_by_pc (pc);
       if (msymbol.minsym != NULL)
 	{
 	  funname.reset (xstrdup (msymbol.minsym->print_name ()));
@@ -1419,7 +1417,7 @@ print_frame (struct ui_out *uiout,
 	annotate_frame_source_file_end ();
 	uiout->text (":");
 	annotate_frame_source_line ();
-	uiout->field_signed ("line", sal.line);
+	uiout->field_signed ("line", sal.line, line_number_style.style ());
 	annotate_frame_source_end ();
       }
 
@@ -1529,9 +1527,7 @@ info_frame_command_core (const frame_info_ptr &fi, bool selected_frame_p)
     }
   else if (frame_pc_p)
     {
-      struct bound_minimal_symbol msymbol;
-
-      msymbol = lookup_minimal_symbol_by_pc (frame_pc);
+      bound_minimal_symbol msymbol = lookup_minimal_symbol_by_pc (frame_pc);
       if (msymbol.minsym != NULL)
 	{
 	  funname = msymbol.minsym->print_name ();
diff --git a/gdb/stubs/ia64vms-stub.c b/gdb/stubs/ia64vms-stub.c
index e7578d8..7e08119 100644
--- a/gdb/stubs/ia64vms-stub.c
+++ b/gdb/stubs/ia64vms-stub.c
@@ -210,7 +210,7 @@ union ia64_ireg
 /* Predicate registers: There are 64 of these 1-bit registers.  We
    define a single register which is used to communicate these values
    to/from the target.  We will somehow contrive to make it appear
-   that IA64_PR0_REGNUM thru IA64_PR63_REGNUM hold the actual values.  */
+   that IA64_PR0_REGNUM through IA64_PR63_REGNUM hold the actual values.  */
 #define IA64_PR_REGNUM		330
 
 /* Instruction pointer: 64 bits wide.  */
@@ -311,7 +311,7 @@ term_raw_write (const char *str, unsigned int len)
     LIB$SIGNAL (status);
 }
 
-/* Flush ther term buffer.  */
+/* Flush the term buffer.  */
 
 static void
 term_flush (void)
diff --git a/gdb/stubs/m32r-stub.c b/gdb/stubs/m32r-stub.c
index 1f55f85..16be231 100644
--- a/gdb/stubs/m32r-stub.c
+++ b/gdb/stubs/m32r-stub.c
@@ -409,7 +409,7 @@ handle_exception (int exceptionVector)
 		  hex2mem (ptr, (unsigned char *) &registers[regno], 4, 0);
 		  /*
 		   * Since we just changed a single CPU register, let's
-		   * make sure to keep the several stack pointers consistant.
+		   * make sure to keep the several stack pointers consistent.
 		   */
 		  stackmode = registers[PSW] & 0x80;
 		  if (regno == R15)	/* stack pointer changed */
@@ -975,7 +975,7 @@ isShortBranch (unsigned char *instr)
 
   if (instr0 == 0x1E || instr0 == 0x1F)	/* JL or JMP */
     if ((instr[1] & 0xF0) == 0xC0)
-      return 2;			/* jump thru a register */
+      return 2;			/* jump through a register.  */
 
   if (instr0 == 0x7C || instr0 == 0x7D ||	/* BC, BNC, BL, BRA */
       instr0 == 0x7E || instr0 == 0x7F)
@@ -1088,7 +1088,7 @@ branchDestination (unsigned char *instr, int branchCode)
     case 1:			/* RTE */
       return registers[BPC] & ~3;	/* pop BPC into PC */
     case 2:			/* JL or JMP */
-      return registers[instr[1] & 0x0F] & ~3;	/* jump thru a register */
+      return registers[instr[1] & 0x0F] & ~3;	/* jump through a register.  */
     case 3:			/* BC, BNC, BL, BRA (short, 8-bit relative offset) */
       return (((int) instr) & ~3) + ((char) instr[1] << 2);
     case 4:			/* BC, BNC, BL, BRA (long, 24-bit relative offset) */
diff --git a/gdb/symfile-debug.c b/gdb/symfile-debug.c
index 3a223d0..6bf8dc3 100644
--- a/gdb/symfile-debug.c
+++ b/gdb/symfile-debug.c
@@ -376,7 +376,8 @@ objfile::expand_symtabs_matching
    gdb::function_view<expand_symtabs_symbol_matcher_ftype> symbol_matcher,
    gdb::function_view<expand_symtabs_exp_notify_ftype> expansion_notify,
    block_search_flags search_flags,
-   domain_search_flags domain)
+   domain_search_flags domain,
+   gdb::function_view<expand_symtabs_lang_matcher_ftype> lang_matcher)
 {
   /* This invariant is documented in quick-functions.h.  */
   gdb_assert (lookup_name != nullptr || symbol_matcher == nullptr);
@@ -393,13 +394,14 @@ objfile::expand_symtabs_matching
   for (const auto &iter : qf)
     if (!iter->expand_symtabs_matching (this, file_matcher, lookup_name,
 					symbol_matcher, expansion_notify,
-					search_flags, domain))
+					search_flags, domain,
+					lang_matcher))
       return false;
   return true;
 }
 
 struct compunit_symtab *
-objfile::find_pc_sect_compunit_symtab (struct bound_minimal_symbol msymbol,
+objfile::find_pc_sect_compunit_symtab (bound_minimal_symbol msymbol,
 				       CORE_ADDR pc,
 				       struct obj_section *section,
 				       int warn_if_readin)
diff --git a/gdb/symfile.c b/gdb/symfile.c
index 06c7faf..1502fdb 100644
--- a/gdb/symfile.c
+++ b/gdb/symfile.c
@@ -1371,17 +1371,13 @@ find_separate_debug_file (const char *dir,
      objfile_name (objfile));
 
   /* First try in the same directory as the original file.  */
-  std::string debugfile = dir;
-  debugfile += debuglink;
+  std::string debugfile = path_join (dir, debuglink);
 
   if (separate_debug_file_exists (debugfile, crc32, objfile, warnings))
     return debugfile;
 
   /* Then try in the subdirectory named DEBUG_SUBDIRECTORY.  */
-  debugfile = dir;
-  debugfile += DEBUG_SUBDIRECTORY;
-  debugfile += "/";
-  debugfile += debuglink;
+  debugfile = path_join (dir, DEBUG_SUBDIRECTORY, debuglink);
 
   if (separate_debug_file_exists (debugfile, crc32, objfile, warnings))
     return debugfile;
@@ -1394,10 +1390,13 @@ find_separate_debug_file (const char *dir,
   bool target_prefix = is_target_filename (dir);
   const char *dir_notarget
     = target_prefix ? dir + strlen (TARGET_SYSROOT_PREFIX) : dir;
+  const char *target_prefix_str = target_prefix ? TARGET_SYSROOT_PREFIX : "";
   std::vector<gdb::unique_xmalloc_ptr<char>> debugdir_vec
     = dirnames_to_char_ptr_vec (debug_file_directory.c_str ());
-  gdb::unique_xmalloc_ptr<char> canon_sysroot
-    = gdb_realpath (gdb_sysroot.c_str ());
+  const char *sysroot_str = gdb_sysroot.c_str ();
+  if (is_target_filename (sysroot_str) && target_filesystem_is_local ())
+    sysroot_str += strlen (TARGET_SYSROOT_PREFIX);
+  gdb::unique_xmalloc_ptr<char> canon_sysroot = gdb_realpath (sysroot_str);
 
  /* MS-Windows/MS-DOS don't allow colons in file names; we must
     convert the drive letter into a one-letter directory, so that the
@@ -1422,12 +1421,8 @@ find_separate_debug_file (const char *dir,
 
   for (const gdb::unique_xmalloc_ptr<char> &debugdir : debugdir_vec)
     {
-      debugfile = target_prefix ? TARGET_SYSROOT_PREFIX : "";
-      debugfile += debugdir;
-      debugfile += "/";
-      debugfile += drive;
-      debugfile += dir_notarget;
-      debugfile += debuglink;
+      debugfile = path_join (target_prefix_str, debugdir.get (),
+			     drive.c_str (), dir_notarget, debuglink);
 
       if (separate_debug_file_exists (debugfile, crc32, objfile, warnings))
 	return debugfile;
@@ -1444,39 +1439,18 @@ find_separate_debug_file (const char *dir,
 	{
 	  /* If the file is in the sysroot, try using its base path in
 	     the global debugfile directory.  */
-	  debugfile = target_prefix ? TARGET_SYSROOT_PREFIX : "";
-	  debugfile += debugdir;
-	  debugfile += "/";
-	  debugfile += base_path;
-	  debugfile += "/";
-	  debugfile += debuglink;
+	  debugfile = path_join (target_prefix_str, debugdir.get (),
+				 base_path, debuglink);
 
 	  if (separate_debug_file_exists (debugfile, crc32, objfile, warnings))
 	    return debugfile;
 
 	  /* If the file is in the sysroot, try using its base path in
-	     the sysroot's global debugfile directory.  GDB_SYSROOT
-	     might refer to a target: path; we strip the "target:"
-	     prefix -- but if that would yield the empty string, we
-	     don't bother at all, because that would just give the
-	     same result as above.  */
+	     the sysroot's global debugfile directory.  */
 	  if (gdb_sysroot != TARGET_SYSROOT_PREFIX)
 	    {
-	      debugfile = target_prefix ? TARGET_SYSROOT_PREFIX : "";
-	      if (is_target_filename (gdb_sysroot))
-		{
-		  std::string root
-		    = gdb_sysroot.substr (strlen (TARGET_SYSROOT_PREFIX));
-		  gdb_assert (!root.empty ());
-		  debugfile += root;
-		}
-	      else
-		debugfile += gdb_sysroot;
-	      debugfile += debugdir;
-	      debugfile += "/";
-	      debugfile += base_path;
-	      debugfile += "/";
-	      debugfile += debuglink;
+	      debugfile = path_join (gdb_sysroot.c_str (), debugdir.get (),
+				     base_path, debuglink);
 
 	      if (separate_debug_file_exists (debugfile, crc32, objfile,
 					      warnings))
@@ -2356,39 +2330,90 @@ add_symbol_file_command (const char *args, int from_tty)
 }
 
 
+/* Option support for 'remove-symbol-file' command.  */
+
+struct remove_symbol_file_options
+{
+  /* True when the '-a' flag was passed.  */
+  bool address_flag = false;
+};
+
+using remove_symbol_file_options_opt_def
+  = gdb::option::flag_option_def<remove_symbol_file_options>;
+
+static const gdb::option::option_def remove_symbol_file_opt_defs[] = {
+  remove_symbol_file_options_opt_def {
+    "a",
+    [] (remove_symbol_file_options *opt) { return &opt->address_flag; },
+    N_("Select a symbol file containing ADDRESS.")
+  },
+};
+
+static inline gdb::option::option_def_group
+make_remove_symbol_file_def_group (remove_symbol_file_options *opts)
+{
+  return {{remove_symbol_file_opt_defs}, opts};
+}
+
+/* Completion function for 'remove-symbol-file' command.  */
+
+static void
+remove_symbol_file_command_completer (struct cmd_list_element *ignore,
+				      completion_tracker &tracker,
+				      const char *text, const char * /* word */)
+{
+  /* Unlike many command completion functions we do gather the option
+     values here.  How we complete the rest of the command depends on
+     whether the '-a' flag has been given or not.  */
+  remove_symbol_file_options opts;
+  auto grp = make_remove_symbol_file_def_group (&opts);
+  if (gdb::option::complete_options
+      (tracker, &text, gdb::option::PROCESS_OPTIONS_UNKNOWN_IS_ERROR, grp))
+    return;
+
+  /* Complete the rest of the command line as either a filename or an
+     expression (which will evaluate to an address) if the '-a' flag was
+     given.  */
+  if (!opts.address_flag)
+    {
+      const char *word
+	= advance_to_filename_maybe_quoted_complete_word_point (tracker, text);
+      filename_maybe_quoted_completer (ignore, tracker, text, word);
+    }
+  else
+    {
+      const char *word
+	= advance_to_expression_complete_word_point (tracker, text);
+      symbol_completer (ignore, tracker, text, word);
+    }
+}
+
 /* This function removes a symbol file that was added via add-symbol-file.  */
 
 static void
 remove_symbol_file_command (const char *args, int from_tty)
 {
-  struct objfile *objf = NULL;
-  struct program_space *pspace = current_program_space;
-
   dont_repeat ();
 
-  if (args == NULL)
-    error (_("remove-symbol-file: no symbol file provided"));
+  remove_symbol_file_options opts;
+  auto grp = make_remove_symbol_file_def_group (&opts);
+  gdb::option::process_options
+    (&args, gdb::option::PROCESS_OPTIONS_UNKNOWN_IS_ERROR, grp);
 
-  gdb_argv argv (args);
+  struct objfile *objf = nullptr;
 
-  if (strcmp (argv[0], "-a") == 0)
+  if (opts.address_flag)
     {
-      /* Interpret the next argument as an address.  */
-      CORE_ADDR addr;
-
-      if (argv[1] == NULL)
-	error (_("Missing address argument"));
+      if (args == nullptr || *args == '\0')
+	error (_("remove-symbol-file: no address provided"));
 
-      if (argv[2] != NULL)
-	error (_("Junk after %s"), argv[1]);
-
-      addr = parse_and_eval_address (argv[1]);
+      CORE_ADDR addr = parse_and_eval_address (args);
 
       for (objfile *objfile : current_program_space->objfiles ())
 	{
 	  if ((objfile->flags & OBJF_USERLOADED) != 0
 	      && (objfile->flags & OBJF_SHARED) != 0
-	      && objfile->pspace () == pspace
+	      && objfile->pspace () == current_program_space
 	      && is_addr_in_objfile (addr, objfile))
 	    {
 	      objf = objfile;
@@ -2396,21 +2421,18 @@ remove_symbol_file_command (const char *args, int from_tty)
 	    }
 	}
     }
-  else if (argv[0] != NULL)
+  else
     {
-      /* Interpret the current argument as a file name.  */
-
-      if (argv[1] != NULL)
-	error (_("Junk after %s"), argv[0]);
-
-      gdb::unique_xmalloc_ptr<char> filename (tilde_expand (argv[0]));
+      std::string filename = extract_single_filename_arg (args);
+      if (filename.empty ())
+	error (_("remove-symbol-file: no symbol file provided"));
 
       for (objfile *objfile : current_program_space->objfiles ())
 	{
 	  if ((objfile->flags & OBJF_USERLOADED) != 0
 	      && (objfile->flags & OBJF_SHARED) != 0
-	      && objfile->pspace () == pspace
-	      && filename_cmp (filename.get (), objfile_name (objfile)) == 0)
+	      && objfile->pspace () == current_program_space
+	      && filename_cmp (filename.c_str (), objfile_name (objfile)) == 0)
 	    {
 	      objf = objfile;
 	      break;
@@ -3428,14 +3450,13 @@ read_target_long_array (CORE_ADDR memaddr, unsigned int *myaddr,
 static int
 simple_read_overlay_table (void)
 {
-  struct bound_minimal_symbol novlys_msym;
-  struct bound_minimal_symbol ovly_table_msym;
   struct gdbarch *gdbarch;
   int word_size;
   enum bfd_endian byte_order;
 
   simple_free_overlay_table ();
-  novlys_msym = lookup_minimal_symbol ("_novlys", NULL, NULL);
+  bound_minimal_symbol novlys_msym
+    = lookup_minimal_symbol (current_program_space, "_novlys");
   if (! novlys_msym.minsym)
     {
       error (_("Error reading inferior's overlay table: "
@@ -3444,7 +3465,8 @@ simple_read_overlay_table (void)
       return 0;
     }
 
-  ovly_table_msym = lookup_bound_minimal_symbol ("_ovly_table");
+  bound_minimal_symbol ovly_table_msym
+    = lookup_minimal_symbol (current_program_space, "_ovly_table");
   if (! ovly_table_msym.minsym)
     {
       error (_("Error reading inferior's overlay table: couldn't find "
@@ -3523,8 +3545,8 @@ simple_overlay_update (struct obj_section *osect)
       {
 	/* Does its cached location match what's currently in the
 	   symtab?  */
-	struct bound_minimal_symbol minsym
-	  = lookup_minimal_symbol ("_ovly_table", NULL, NULL);
+	bound_minimal_symbol minsym
+	  = lookup_minimal_symbol (current_program_space, "_ovly_table");
 
 	if (minsym.minsym == NULL)
 	  error (_("Error reading inferior's overlay table: couldn't "
@@ -3737,7 +3759,8 @@ expand_symtabs_matching
    gdb::function_view<expand_symtabs_symbol_matcher_ftype> symbol_matcher,
    gdb::function_view<expand_symtabs_exp_notify_ftype> expansion_notify,
    block_search_flags search_flags,
-   domain_search_flags domain)
+   domain_search_flags domain,
+   gdb::function_view<expand_symtabs_lang_matcher_ftype> lang_matcher)
 {
   for (objfile *objfile : current_program_space->objfiles ())
     if (!objfile->expand_symtabs_matching (file_matcher,
@@ -3745,7 +3768,8 @@ expand_symtabs_matching
 					   symbol_matcher,
 					   expansion_notify,
 					   search_flags,
-					   domain))
+					   domain,
+					   lang_matcher))
       return false;
   return true;
 }
@@ -3840,7 +3864,7 @@ Usage: symbol-file [-readnow | -readnever] [-o OFF] FILE\n\
 OFF is an optional offset which is added to each section address.\n\
 The `file' command can also load symbol tables, as well as setting the file\n\
 to execute.\n" READNOW_READNEVER_HELP), &cmdlist);
-  set_cmd_completer (c, filename_completer);
+  set_cmd_completer (c, filename_maybe_quoted_completer);
 
   c = add_cmd ("add-symbol-file", class_files, add_symbol_file_command, _("\
 Load symbols from FILE, assuming FILE has been dynamically loaded.\n\
@@ -3854,16 +3878,24 @@ OFF is an optional offset which is added to the default load addresses\n\
 of all sections for which no other address was specified.\n"
 READNOW_READNEVER_HELP),
 	       &cmdlist);
-  set_cmd_completer (c, filename_completer);
+  set_cmd_completer (c, filename_maybe_quoted_completer);
 
-  c = add_cmd ("remove-symbol-file", class_files,
-	       remove_symbol_file_command, _("\
+  const auto remove_symbol_file_opts
+    = make_remove_symbol_file_def_group (nullptr);
+  static std::string remove_symbol_file_cmd_help
+    = gdb::option::build_help (_("\
 Remove a symbol file added via the add-symbol-file command.\n\
 Usage: remove-symbol-file FILENAME\n\
        remove-symbol-file -a ADDRESS\n\
 The file to remove can be identified by its filename or by an address\n\
-that lies within the boundaries of this symbol file in memory."),
+that lies within the boundaries of this symbol file in memory.\n\
+Options:\n\
+%OPTIONS%"), remove_symbol_file_opts);
+  c = add_cmd ("remove-symbol-file", class_files,
+	       remove_symbol_file_command,
+	       remove_symbol_file_cmd_help.c_str (),
 	       &cmdlist);
+  set_cmd_completer_handle_brkchars (c, remove_symbol_file_command_completer);
 
   c = add_cmd ("load", class_files, load_command, _("\
 Dynamically load FILE into the running program.\n\
@@ -3872,7 +3904,7 @@ Usage: load [FILE] [OFFSET]\n\
 An optional load OFFSET may also be given as a literal address.\n\
 When OFFSET is provided, FILE must also be provided.  FILE can be provided\n\
 on its own."), &cmdlist);
-  set_cmd_completer (c, filename_completer);
+  set_cmd_completer (c, deprecated_filename_completer);
 
   cmd_list_element *overlay_cmd
     = add_basic_prefix_cmd ("overlay", class_support,
diff --git a/gdb/symfile.h b/gdb/symfile.h
index 508ba48..74187c8 100644
--- a/gdb/symfile.h
+++ b/gdb/symfile.h
@@ -352,7 +352,9 @@ bool expand_symtabs_matching
    gdb::function_view<expand_symtabs_symbol_matcher_ftype> symbol_matcher,
    gdb::function_view<expand_symtabs_exp_notify_ftype> expansion_notify,
    block_search_flags search_flags,
-   domain_search_flags kind);
+   domain_search_flags kind,
+   gdb::function_view<expand_symtabs_lang_matcher_ftype> lang_matcher
+     = nullptr);
 
 void map_symbol_filenames (gdb::function_view<symbol_filename_ftype> fun,
 			   bool need_fullname);
diff --git a/gdb/symmisc.c b/gdb/symmisc.c
index b4e0360..a484fb2 100644
--- a/gdb/symmisc.c
+++ b/gdb/symmisc.c
@@ -366,8 +366,7 @@ dump_symtab (struct symtab *symtab, struct ui_file *outfile)
      But use only real languages, not placeholders.  */
   if (symtab->language () != language_unknown)
     {
-      scoped_restore_current_language save_lang;
-      set_language (symtab->language ());
+      scoped_restore_current_language save_lang (symtab->language ());
       dump_symtab_1 (symtab, outfile);
     }
   else
@@ -378,7 +377,9 @@ static void
 maintenance_print_symbols (const char *args, int from_tty)
 {
   struct ui_file *outfile = gdb_stdout;
-  char *address_arg = NULL, *source_arg = NULL, *objfile_arg = NULL;
+  const char *address_arg = nullptr;
+  const char *source_arg = nullptr;
+  const char *objfile_arg = nullptr;
   int i, outfile_idx;
 
   dont_repeat ();
@@ -656,7 +657,7 @@ static void
 maintenance_print_msymbols (const char *args, int from_tty)
 {
   struct ui_file *outfile = gdb_stdout;
-  char *objfile_arg = NULL;
+  const char *objfile_arg = nullptr;
   int i, outfile_idx;
 
   dont_repeat ();
@@ -888,7 +889,7 @@ maintenance_check_symtabs (const char *ignore, int from_tty)
 static void
 maintenance_expand_symtabs (const char *args, int from_tty)
 {
-  char *regexp = NULL;
+  const char *regexp = nullptr;
 
   /* We use buildargv here so that we handle spaces in the regexp
      in a way that allows adding more arguments later.  */
@@ -904,18 +905,25 @@ maintenance_expand_symtabs (const char *args, int from_tty)
 	}
     }
 
-  if (regexp)
-    re_comp (regexp);
+  if (regexp == nullptr)
+    {
+      for (struct program_space *pspace : program_spaces)
+	for (objfile *objfile : pspace->objfiles ())
+	  objfile->expand_all_symtabs ();
+
+      return;
+    }
+
+  re_comp (regexp);
 
   for (struct program_space *pspace : program_spaces)
     for (objfile *objfile : pspace->objfiles ())
       objfile->expand_symtabs_matching
 	([&] (const char *filename, bool basenames)
-	 {
-	   /* KISS: Only apply the regexp to the complete file name.  */
-	   return (!basenames
-		   && (regexp == NULL || re_exec (filename)));
-	 },
+	   {
+	     /* KISS: Only apply the regexp to the complete file name.  */
+	     return !basenames && re_exec (filename);
+	   },
 	 NULL,
 	 NULL,
 	 NULL,
@@ -991,7 +999,8 @@ maintenance_print_one_line_table (struct symtab *symtab, void *data)
 	  ui_out_emit_tuple tuple_emitter (uiout, nullptr);
 	  uiout->field_signed ("index", i);
 	  if (item->line > 0)
-	    uiout->field_signed ("line", item->line);
+	    uiout->field_signed ("line", item->line,
+				 line_number_style.style ());
 	  else
 	    uiout->field_string ("line", _("END"));
 	  uiout->field_core_addr ("rel-address", objfile->arch (),
diff --git a/gdb/symtab.c b/gdb/symtab.c
index 9d11703..a479e92 100644
--- a/gdb/symtab.c
+++ b/gdb/symtab.c
@@ -700,15 +700,10 @@ iterate_over_some_symtabs (const char *name,
   return false;
 }
 
-/* Check for a symtab of a specific name; first in symtabs, then in
-   psymtabs.  *If* there is no '/' in the name, a match after a '/'
-   in the symtab filename will also work.
-
-   Calls CALLBACK with each symtab that is found.  If CALLBACK returns
-   true, the search stops.  */
+/* See symtab.h.  */
 
 void
-iterate_over_symtabs (const char *name,
+iterate_over_symtabs (program_space *pspace, const char *name,
 		      gdb::function_view<bool (symtab *)> callback)
 {
   gdb::unique_xmalloc_ptr<char> real_path;
@@ -721,34 +716,28 @@ iterate_over_symtabs (const char *name,
       gdb_assert (IS_ABSOLUTE_PATH (real_path.get ()));
     }
 
-  for (objfile *objfile : current_program_space->objfiles ())
-    {
-      if (iterate_over_some_symtabs (name, real_path.get (),
-				     objfile->compunit_symtabs, NULL,
-				     callback))
+  for (objfile *objfile : pspace->objfiles ())
+    if (iterate_over_some_symtabs (name, real_path.get (),
+				   objfile->compunit_symtabs, nullptr,
+				   callback))
 	return;
-    }
 
-  /* Same search rules as above apply here, but now we look thru the
+  /* Same search rules as above apply here, but now we look through the
      psymtabs.  */
-
-  for (objfile *objfile : current_program_space->objfiles ())
-    {
-      if (objfile->map_symtabs_matching_filename (name, real_path.get (),
-						  callback))
-	return;
-    }
+  for (objfile *objfile : pspace->objfiles ())
+    if (objfile->map_symtabs_matching_filename (name, real_path.get (),
+						callback))
+      return;
 }
 
-/* A wrapper for iterate_over_symtabs that returns the first matching
-   symtab, or NULL.  */
+/* See symtab.h.  */
 
-struct symtab *
-lookup_symtab (const char *name)
+symtab *
+lookup_symtab (program_space *pspace, const char *name)
 {
   struct symtab *result = NULL;
 
-  iterate_over_symtabs (name, [&] (symtab *symtab)
+  iterate_over_symtabs (pspace, name, [&] (symtab *symtab)
     {
       result = symtab;
       return true;
@@ -1563,6 +1552,7 @@ symbol_cache_mark_not_found (struct block_symbol_cache *bsc,
 static void
 symbol_cache_flush (struct program_space *pspace)
 {
+  ada_clear_symbol_cache (pspace);
   struct symbol_cache *cache = symbol_cache_key.get (pspace);
   int pass;
 
@@ -1928,6 +1918,28 @@ lookup_name_info::match_any ()
   return lookup_name;
 }
 
+/* See symtab.h.  */
+
+unsigned int
+lookup_name_info::search_name_hash (language lang) const
+{
+  /* This works around an obscure problem.  If currently in Ada mode,
+     and the name is wrapped in '<...>' (indicating verbatim mode),
+     force the use of the Ada language here so that the '<' and '>'
+     will be removed.  */
+  if (current_language->la_language == language_ada && ada ().verbatim_p ())
+    lang = language_ada;
+
+  /* Only compute each language's hash once.  */
+  if (!m_demangled_hashes_p[lang])
+    {
+      m_demangled_hashes[lang]
+	= ::search_name_hash (lang, language_lookup_name (lang));
+      m_demangled_hashes_p[lang] = true;
+    }
+  return m_demangled_hashes[lang];
+}
+
 /* Compute the demangled form of NAME as used by the various symbol
    lookup functions.  The result can either be the input NAME
    directly, or a pointer to a buffer owned by the STORAGE object.
@@ -2892,14 +2904,14 @@ find_pc_sect_compunit_symtab (CORE_ADDR pc, struct obj_section *section)
 {
   struct compunit_symtab *best_cust = NULL;
   CORE_ADDR best_cust_range = 0;
-  struct bound_minimal_symbol msymbol;
 
   /* If we know that this is not a text address, return failure.  This is
      necessary because we loop based on the block's high and low code
      addresses, which do not include the data ranges, and because
      we call find_pc_sect_psymtab which has a similar restriction based
      on the partial_symtab's texthigh and textlow.  */
-  msymbol = lookup_minimal_symbol_by_pc_section (pc, section);
+  bound_minimal_symbol msymbol
+    = lookup_minimal_symbol_by_pc_section (pc, section);
   if (msymbol.minsym && msymbol.minsym->data_p ())
     return NULL;
 
@@ -2980,7 +2992,7 @@ find_pc_sect_compunit_symtab (CORE_ADDR pc, struct obj_section *section)
 					   section.  */
 	    }
 
-	  /* Cust is best found sofar, save it.  */
+	  /* Cust is best found so far, save it.  */
 	  best_cust = cust;
 	  best_cust_range = range;
 	}
@@ -3091,7 +3103,6 @@ find_pc_sect_line (CORE_ADDR pc, struct obj_section *section, int notcurrent)
   int len;
   const linetable_entry *item;
   const struct blockvector *bv;
-  struct bound_minimal_symbol msymbol;
 
   /* Info on best line seen so far, and where it starts, and its file.  */
 
@@ -3170,13 +3181,14 @@ find_pc_sect_line (CORE_ADDR pc, struct obj_section *section, int notcurrent)
    *      check for the address being the same, to avoid an
    *      infinite recursion.
    */
-  msymbol = lookup_minimal_symbol_by_pc (pc);
+  bound_minimal_symbol msymbol = lookup_minimal_symbol_by_pc (pc);
   if (msymbol.minsym != NULL)
     if (msymbol.minsym->type () == mst_solib_trampoline)
       {
-	struct bound_minimal_symbol mfunsym
-	  = lookup_minimal_symbol_text (msymbol.minsym->linkage_name (),
-					NULL);
+	bound_minimal_symbol mfunsym
+	  = lookup_minimal_symbol_text (current_program_space,
+					msymbol.minsym->linkage_name (),
+					nullptr);
 
 	if (mfunsym.minsym == NULL)
 	  /* I eliminated this warning since it is coming out
@@ -3919,7 +3931,7 @@ skip_prologue_sal (struct symtab_and_line *sal)
     }
   else
     {
-      struct bound_minimal_symbol msymbol
+      bound_minimal_symbol msymbol
 	= lookup_minimal_symbol_by_pc_section (sal->pc, sal->section);
 
       if (msymbol.minsym == NULL)
@@ -5290,7 +5302,7 @@ print_symbol_info (struct symbol *sym, int block, const char *last)
    for non-debugging symbols to gdb_stdout.  */
 
 static void
-print_msymbol_info (struct bound_minimal_symbol msymbol)
+print_msymbol_info (bound_minimal_symbol msymbol)
 {
   struct gdbarch *gdbarch = msymbol.objfile->arch ();
   const char *tmp;
@@ -6294,7 +6306,7 @@ collect_file_symbol_completion_matches (completion_tracker &tracker,
 
   /* Go through symtabs for SRCFILE and check the externs and statics
      for symbols which match.  */
-  iterate_over_symtabs (srcfile, [&] (symtab *s)
+  iterate_over_symtabs (current_program_space, srcfile, [&] (symtab *s)
     {
       add_symtab_completions (s->compunit (),
 			      tracker, mode, lookup_name,
@@ -6777,10 +6789,12 @@ symbol::get_maybe_copied_address () const
   gdb_assert (this->aclass () == LOC_STATIC);
 
   const char *linkage_name = this->linkage_name ();
-  bound_minimal_symbol minsym = lookup_minimal_symbol_linkage (linkage_name,
-							       false);
+  bound_minimal_symbol minsym
+    = lookup_minimal_symbol_linkage (this->objfile ()->pspace (), linkage_name,
+				     false);
   if (minsym.minsym != nullptr)
     return minsym.value_address ();
+
   return this->m_value.address;
 }
 
@@ -6793,10 +6807,11 @@ minimal_symbol::get_maybe_copied_address (objfile *objf) const
   gdb_assert ((objf->flags & OBJF_MAINLINE) == 0);
 
   const char *linkage_name = this->linkage_name ();
-  bound_minimal_symbol found = lookup_minimal_symbol_linkage (linkage_name,
-							      true);
+  bound_minimal_symbol found
+    = lookup_minimal_symbol_linkage (objf->pspace (), linkage_name, true);
   if (found.minsym != nullptr)
     return found.value_address ();
+
   return (this->m_value.address
 	  + objf->section_offsets[this->section_index ()]);
 }
diff --git a/gdb/symtab.h b/gdb/symtab.h
index a5631a2..aa86a80 100644
--- a/gdb/symtab.h
+++ b/gdb/symtab.h
@@ -266,17 +266,7 @@ class lookup_name_info final
   }
 
   /* Get the search name hash for searches in language LANG.  */
-  unsigned int search_name_hash (language lang) const
-  {
-    /* Only compute each language's hash once.  */
-    if (!m_demangled_hashes_p[lang])
-      {
-	m_demangled_hashes[lang]
-	  = ::search_name_hash (lang, language_lookup_name (lang));
-	m_demangled_hashes_p[lang] = true;
-      }
-    return m_demangled_hashes[lang];
-  }
+  unsigned int search_name_hash (language lang) const;
 
   /* Get the search name for searches in language LANG.  */
   const char *language_lookup_name (language lang) const
@@ -611,20 +601,20 @@ struct general_symbol_info
      section_offsets for this objfile.  Negative means that the symbol
      does not get relocated relative to a section.  */
 
-  short m_section;
+  int m_section;
 
   /* Set the index into the obj_section list (within the containing
      objfile) for the section that contains this symbol.  See M_SECTION
      for more details.  */
 
-  void set_section_index (short idx)
+  void set_section_index (int idx)
   { m_section = idx; }
 
   /* Return the index into the obj_section list (within the containing
      objfile) for the section that contains this symbol.  See M_SECTION
      for more details.  */
 
-  short section_index () const
+  auto section_index () const
   { return m_section; }
 
   /* Return the obj_section from OBJFILE for this symbol.  The symbol
@@ -818,7 +808,7 @@ struct minimal_symbol : public general_symbol_info
     m_target_flag_2 = target_flag_2;
   }
 
-  /* Size of this symbol.  dbx_end_psymtab in dbxread.c uses this
+  /* Size of this symbol.  stabs_end_psymtab in stabsread.c uses this
      information to calculate the end of the partial symtab based on the
      address of the last symbol plus the size of the last symbol.  */
 
@@ -2099,9 +2089,9 @@ extern const char multiple_symbols_cancel[];
 
 const char *multiple_symbols_select_mode (void);
 
-/* lookup a symbol table by source file name.  */
+/* Lookup a symbol table in PSPACE by source file name.  */
 
-extern struct symtab *lookup_symtab (const char *);
+extern symtab *lookup_symtab (program_space *pspace, const char *name);
 
 /* An object of this type is passed as the 'is_a_field_of_this'
    argument to lookup_symbol and lookup_symbol_in_language.  */
@@ -2599,7 +2589,7 @@ struct symbol_search
 
   /* If msymbol is non-null, then a match was made on something for
      which only minimal_symbols exist.  */
-  struct bound_minimal_symbol msymbol;
+  bound_minimal_symbol msymbol;
 
 private:
 
@@ -2818,9 +2808,15 @@ bool iterate_over_some_symtabs (const char *name,
 				struct compunit_symtab *after_last,
 				gdb::function_view<bool (symtab *)> callback);
 
-void iterate_over_symtabs (const char *name,
-			   gdb::function_view<bool (symtab *)> callback);
+/* Check in PSPACE for a symtab of a specific name; first in symtabs, then in
+   psymtabs.  *If* there is no '/' in the name, a match after a '/' in the
+   symtab filename will also work.
+
+   Call CALLBACK with each symtab that is found.  If CALLBACK returns
+   true, the search stops.  */
 
+void iterate_over_symtabs (program_space *pspace, const char *name,
+			   gdb::function_view<bool (symtab *)> callback);
 
 std::vector<CORE_ADDR> find_pcs_for_symtab_line
     (struct symtab *symtab, int line, const linetable_entry **best_entry);
diff --git a/gdb/target-debug.h b/gdb/target-debug.h
index b5eb338..4a4e72e 100644
--- a/gdb/target-debug.h
+++ b/gdb/target-debug.h
@@ -26,7 +26,7 @@
    behavior is needed.
 
    References to these printers are automatically generated by
-   make-target-delegates.  See the generated file target-delegates.c.
+   make-target-delegates.  See the generated file target-delegates-gen.c.
 
    In a couple cases, a special printing function is defined and then
    used via the TARGET_DEBUG_PRINTER macro.  See target.h.
@@ -46,8 +46,8 @@
 #include "target/waitstatus.h"
 
 /* The functions defined in this header file are not marked "inline", such
-   that any function not used by target-delegates.c (the only user of this file)
-   will be flagged as unused.  */
+   that any function not used by target-delegates-gen.c (the only user of this
+   file) will be flagged as unused.  */
 
 static std::string
 target_debug_print_target_object (target_object object)
@@ -368,8 +368,6 @@ target_debug_print_x86_xsave_layout (const x86_xsave_layout &layout)
     string_appendf (s, ", " #region "_offset=%d", layout.region##_offset);
 
   POFFS(avx);
-  POFFS(bndregs);
-  POFFS(bndcfg);
   POFFS(k);
   POFFS(zmm_h);
   POFFS(zmm);
diff --git a/gdb/target-delegates.c b/gdb/target-delegates-gen.c
index dd20e14..dd20e14 100644
--- a/gdb/target-delegates.c
+++ b/gdb/target-delegates-gen.c
diff --git a/gdb/target-descriptions.c b/gdb/target-descriptions.c
index 4f21044..1bd22c2 100644
--- a/gdb/target-descriptions.c
+++ b/gdb/target-descriptions.c
@@ -500,7 +500,7 @@ target_find_description (void)
       struct gdbarch_info info;
 
       info.target_desc = tdesc_info->tdesc;
-      if (!gdbarch_update_p (info))
+      if (!gdbarch_update_p (current_inferior (), info))
 	{
 	  warning (_("Architecture rejected target-supplied description"));
 	  tdesc_info->tdesc = nullptr;
@@ -537,18 +537,16 @@ target_clear_description (void)
   tdesc_info->tdesc = nullptr;
 
   gdbarch_info info;
-  if (!gdbarch_update_p (info))
+  if (!gdbarch_update_p (current_inferior (), info))
     internal_error (_("Could not remove target-supplied description"));
 }
 
-/* Return the global current target description.  This should only be
-   used by gdbarch initialization code; most access should be through
-   an existing gdbarch.  */
+/* See target-descriptions.h.  */
 
-const struct target_desc *
-target_current_description (void)
+const target_desc *
+target_current_description (inferior *inf)
 {
-  target_desc_info *tdesc_info = &current_inferior ()->tdesc_info;
+  target_desc_info *tdesc_info = &inf->tdesc_info;
 
   if (tdesc_info->fetched)
     return tdesc_info->tdesc;
@@ -1202,12 +1200,6 @@ set_tdesc_architecture (struct target_desc *target_desc,
 /* See gdbsupport/tdesc.h.  */
 
 void
-set_tdesc_osabi (struct target_desc *target_desc, const char *name)
-{
-  set_tdesc_osabi (target_desc, osabi_from_tdesc_string (name));
-}
-
-void
 set_tdesc_osabi (struct target_desc *target_desc, enum gdb_osabi osabi)
 {
   target_desc->osabi = osabi;
@@ -1319,9 +1311,8 @@ public:
     if (tdesc_osabi (e) > GDB_OSABI_UNKNOWN
 	&& tdesc_osabi (e) < GDB_OSABI_INVALID)
       {
-	gdb_printf
-	  ("  set_tdesc_osabi (result.get (), osabi_from_tdesc_string (\"%s\"));\n",
-	   gdbarch_osabi_name (tdesc_osabi (e)));
+	const char *enum_name = gdbarch_osabi_enum_name (tdesc_osabi (e));
+	gdb_printf ("  set_tdesc_osabi (result.get (), %s);\n", enum_name);
 	gdb_printf ("\n");
       }
 
@@ -1693,14 +1684,15 @@ static void
 maint_print_c_tdesc_cmd (const char *args, int from_tty)
 {
   const struct target_desc *tdesc;
-  const char *filename;
 
   maint_print_c_tdesc_options opts;
   auto grp = make_maint_print_c_tdesc_options_def_group (&opts);
   gdb::option::process_options
     (&args, gdb::option::PROCESS_OPTIONS_UNKNOWN_IS_ERROR, grp);
 
-  if (args == NULL)
+  std::string filename = extract_single_filename_arg (args);
+
+  if (filename.empty ())
     {
       /* Use the global target-supplied description, not the current
 	 architecture's.  This lets a GDB for one architecture generate C
@@ -1708,26 +1700,24 @@ maint_print_c_tdesc_cmd (const char *args, int from_tty)
 	 initialization code will reject the new description.  */
       target_desc_info *tdesc_info = &current_inferior ()->tdesc_info;
       tdesc = tdesc_info->tdesc;
-      filename = tdesc_info->filename.data ();
+      if (tdesc_info->filename.data () != nullptr)
+	filename = std::string (tdesc_info->filename.data ());
     }
   else
     {
       /* Use the target description from the XML file.  */
-      filename = args;
-      tdesc = file_read_description_xml (filename);
+      tdesc = file_read_description_xml (filename.c_str ());
     }
 
   if (tdesc == NULL)
     error (_("There is no target description to print."));
 
-  if (filename == NULL)
+  if (filename.empty ())
     filename = "fetched from target";
 
-  std::string filename_after_features (filename);
-  auto loc = filename_after_features.rfind ("/features/");
-
+  auto loc = filename.rfind ("/features/");
   if (loc != std::string::npos)
-    filename_after_features = filename_after_features.substr (loc + 10);
+    filename = filename.substr (loc + 10);
 
   /* Print c files for target features instead of target descriptions,
      because c files got from target features are more flexible than the
@@ -1738,13 +1728,13 @@ maint_print_c_tdesc_cmd (const char *args, int from_tty)
 	error (_("only target descriptions with 1 feature can be used "
 		 "with -single-feature option"));
 
-      print_c_feature v (filename_after_features);
+      print_c_feature v (filename);
 
       tdesc->accept (v);
     }
   else
     {
-      print_c_tdesc v (filename_after_features);
+      print_c_tdesc v (filename);
 
       tdesc->accept (v);
     }
@@ -1762,8 +1752,8 @@ maint_print_c_tdesc_cmd_completer (struct cmd_list_element *ignore,
       (tracker, &text, gdb::option::PROCESS_OPTIONS_UNKNOWN_IS_ERROR, grp))
     return;
 
-  word = advance_to_filename_complete_word_point (tracker, text);
-  filename_completer (ignore, tracker, text, word);
+  word = advance_to_filename_maybe_quoted_complete_word_point (tracker, text);
+  filename_maybe_quoted_completer (ignore, tracker, text, word);
 }
 
 /* Implement the maintenance print xml-tdesc command.  */
@@ -1947,7 +1937,7 @@ that feature within an already existing target_desc object."), grp);
   cmd = add_cmd ("xml-tdesc", class_maintenance, maint_print_xml_tdesc_cmd, _("\
 Print the current target description as an XML file."),
 		 &maintenanceprintlist);
-  set_cmd_completer (cmd, filename_completer);
+  set_cmd_completer (cmd, deprecated_filename_completer);
 
   cmd = add_cmd ("xml-descriptions", class_maintenance,
 		 maintenance_check_xml_descriptions, _("\
@@ -1956,5 +1946,5 @@ Check the target descriptions created in GDB equal the descriptions\n\
 created from XML files in the directory.\n\
 The parameter is the directory name."),
 		 &maintenancechecklist);
-  set_cmd_completer (cmd, filename_completer);
+  set_cmd_completer (cmd, deprecated_filename_completer);
 }
diff --git a/gdb/target-descriptions.h b/gdb/target-descriptions.h
index 54c1f23..dc83db0 100644
--- a/gdb/target-descriptions.h
+++ b/gdb/target-descriptions.h
@@ -39,11 +39,10 @@ void target_find_description (void);
 
 void target_clear_description (void);
 
-/* Return the current inferior's target description.  This should only
-   be used by gdbarch initialization code; most access should be
-   through an existing gdbarch.  */
+/* Return INF's target description.  This should only be used by gdbarch
+   initialization code; most access should be through an existing gdbarch.  */
 
-const struct target_desc *target_current_description (void);
+const target_desc *target_current_description (inferior *inf);
 
 /* Record architecture-specific functions to call for pseudo-register
    support.  If tdesc_use_registers is called and gdbarch_num_pseudo_regs
@@ -220,7 +219,6 @@ int tdesc_register_in_reggroup_p (struct gdbarch *gdbarch, int regno,
 
 void set_tdesc_architecture (struct target_desc *,
 			     const struct bfd_arch_info *);
-void set_tdesc_osabi (struct target_desc *, enum gdb_osabi osabi);
 void set_tdesc_property (struct target_desc *,
 			 const char *key, const char *value);
 void tdesc_add_compatible (struct target_desc *,
diff --git a/gdb/target.c b/gdb/target.c
index a80b133..4378c05 100644
--- a/gdb/target.c
+++ b/gdb/target.c
@@ -1754,7 +1754,7 @@ target_xfer_partial (struct target_ops *ops,
    If an error occurs, no guarantee is made about the contents of the data at
    MYADDR.  In particular, the caller should not depend upon partial reads
    filling the buffer with good data.  There is no way for the caller to know
-   how much good data might have been transfered anyway.  Callers that can
+   how much good data might have been transferred anyway.  Callers that can
    deal with partial reads should call target_read (which will retry until
    it makes no progress, and then return how much was transferred).  */
 
@@ -2575,18 +2575,12 @@ target_wait (ptid_t ptid, struct target_waitstatus *status,
   if (!target_can_async_p (target))
     gdb_assert ((options & TARGET_WNOHANG) == 0);
 
-  try
-    {
-      gdb::observers::target_pre_wait.notify (ptid);
-      ptid_t event_ptid = target->wait (ptid, status, options);
-      gdb::observers::target_post_wait.notify (event_ptid);
-      return event_ptid;
-    }
-  catch (...)
-    {
-      gdb::observers::target_post_wait.notify (null_ptid);
-      throw;
-    }
+  ptid_t event_ptid = null_ptid;
+  SCOPE_EXIT { gdb::observers::target_post_wait.notify (event_ptid); };
+  gdb::observers::target_pre_wait.notify (ptid);
+  event_ptid = target->wait (ptid, status, options);
+
+  return event_ptid;
 }
 
 /* See target.h.  */
@@ -3698,7 +3692,7 @@ dummy_make_corefile_notes (struct target_ops *self,
   return NULL;
 }
 
-#include "target-delegates.c"
+#include "target-delegates-gen.c"
 
 /* The initial current target, so that there is always a semi-valid
    current target.  */
diff --git a/gdb/target.h b/gdb/target.h
index dcf68a6..6da58c7 100644
--- a/gdb/target.h
+++ b/gdb/target.h
@@ -134,7 +134,7 @@ enum inferior_event_type
     INF_EXEC_COMPLETE,
   };
 
-/* Target objects which can be transfered using target_read,
+/* Target objects which can be transferred using target_read,
    target_write, et cetera.  */
 
 enum target_object
@@ -156,7 +156,7 @@ enum target_object
   TARGET_OBJECT_CODE_MEMORY,
   /* Kernel Unwind Table.  See "ia64-tdep.c".  */
   TARGET_OBJECT_UNWIND_TABLE,
-  /* Transfer auxilliary vector.  */
+  /* Transfer auxiliary vector.  */
   TARGET_OBJECT_AUXV,
   /* StackGhost cookie.  See "sparc-tdep.c".  */
   TARGET_OBJECT_WCOOKIE,
@@ -177,7 +177,7 @@ enum target_object
   /* Currently loaded libraries specific to AIX systems, in XML format.  */
   TARGET_OBJECT_LIBRARIES_AIX,
   /* Get OS specific data.  The ANNEX specifies the type (running
-     processes, etc.).  The data being transfered is expected to follow
+     processes, etc.).  The data being transferred is expected to follow
      the DTD specified in features/osdata.dtd.  */
   TARGET_OBJECT_OSDATA,
   /* Extra signal info.  Usually the contents of `siginfo_t' on unix
@@ -821,7 +821,7 @@ struct target_ops
        transferring if desired.  This is handled in target.c.
 
        The interface does not support a "retry" mechanism.  Instead it
-       assumes that at least one addressable unit will be transfered on each
+       assumes that at least one addressable unit will be transferred on each
        successful call.
 
        NOTE: cagney/2003-10-17: The current interface can lead to
diff --git a/gdb/testsuite/gdb.ada/O2_float_param.exp b/gdb/testsuite/gdb.ada/O2_float_param.exp
index d44f2e5..86b67ff 100644
--- a/gdb/testsuite/gdb.ada/O2_float_param.exp
+++ b/gdb/testsuite/gdb.ada/O2_float_param.exp
@@ -26,10 +26,8 @@ if {[is_aarch64_target]} {
     }
 }
 
-foreach_with_prefix scenario {all minimal} {
-    set flags [list debug \
-		   optimize=-O2 \
-		   additional_flags=-fgnat-encodings=$scenario]
+foreach_gnat_encoding scenario flags {all minimal} {
+    lappend flags debug optimize=-O2
 
     if {[gdb_compile_ada "${srcfile}" "${binfile}-${scenario}" executable $flags] != ""} {
 	return -1
diff --git a/gdb/testsuite/gdb.ada/access_to_unbounded_array.exp b/gdb/testsuite/gdb.ada/access_to_unbounded_array.exp
index 7f7bfb3..eeaceb0 100644
--- a/gdb/testsuite/gdb.ada/access_to_unbounded_array.exp
+++ b/gdb/testsuite/gdb.ada/access_to_unbounded_array.exp
@@ -19,8 +19,8 @@ require allow_ada_tests
 
 standard_ada_testfile foo
 
-foreach_with_prefix scenario {all minimal} {
-    set flags [list debug additional_flags=-fgnat-encodings=$scenario]
+foreach_gnat_encoding scenario flags {all minimal} {
+    lappend flags debug
 
     if {[gdb_compile_ada "${srcfile}" "${binfile}-${scenario}" executable $flags] != ""} {
 	return -1
diff --git a/gdb/testsuite/gdb.ada/arr_acc_idx_w_gap.exp b/gdb/testsuite/gdb.ada/arr_acc_idx_w_gap.exp
index 569bb2e..4ecb4f8 100644
--- a/gdb/testsuite/gdb.ada/arr_acc_idx_w_gap.exp
+++ b/gdb/testsuite/gdb.ada/arr_acc_idx_w_gap.exp
@@ -19,8 +19,8 @@ require allow_ada_tests
 
 standard_ada_testfile enum_with_gap_main
 
-foreach_with_prefix scenario {all minimal} {
-    set flags [list debug additional_flags=-fgnat-encodings=$scenario]
+foreach_gnat_encoding scenario flags {all minimal} {
+    lappend flags debug
 
     if {[gdb_compile_ada "${srcfile}" "${binfile}-${scenario}" \
 	     executable $flags] != ""} {
diff --git a/gdb/testsuite/gdb.ada/arr_enum_idx_w_gap.exp b/gdb/testsuite/gdb.ada/arr_enum_idx_w_gap.exp
index 5a88f5f..491402b 100644
--- a/gdb/testsuite/gdb.ada/arr_enum_idx_w_gap.exp
+++ b/gdb/testsuite/gdb.ada/arr_enum_idx_w_gap.exp
@@ -19,8 +19,8 @@ require allow_ada_tests
 
 standard_ada_testfile foo_q418_043
 
-foreach_with_prefix scenario {all minimal} {
-    set flags [list debug additional_flags=-fgnat-encodings=$scenario]
+foreach_gnat_encoding scenario flags {all minimal} {
+    lappend flags debug
 
     if {[gdb_compile_ada "${srcfile}" "${binfile}-${scenario}" executable $flags] != ""} {
 	return -1
diff --git a/gdb/testsuite/gdb.ada/array_of_symbolic_length.exp b/gdb/testsuite/gdb.ada/array_of_symbolic_length.exp
index bcf7369..134b448 100644
--- a/gdb/testsuite/gdb.ada/array_of_symbolic_length.exp
+++ b/gdb/testsuite/gdb.ada/array_of_symbolic_length.exp
@@ -19,8 +19,8 @@ require allow_ada_tests
 
 standard_ada_testfile foo
 
-foreach_with_prefix scenario {all minimal} {
-    set flags [list debug additional_flags=-fgnat-encodings=$scenario]
+foreach_gnat_encoding scenario flags {all minimal} {
+    lappend flags debug
 
     if {[gdb_compile_ada "${srcfile}" "${binfile}-${scenario}" executable $flags] != ""} {
 	return -1
diff --git a/gdb/testsuite/gdb.ada/array_of_variable_length.exp b/gdb/testsuite/gdb.ada/array_of_variable_length.exp
index 3397760..3c68c80 100644
--- a/gdb/testsuite/gdb.ada/array_of_variable_length.exp
+++ b/gdb/testsuite/gdb.ada/array_of_variable_length.exp
@@ -19,8 +19,8 @@ require allow_ada_tests
 
 standard_ada_testfile foo
 
-foreach_with_prefix scenario {all minimal} {
-    set flags [list debug additional_flags=-fgnat-encodings=$scenario]
+foreach_gnat_encoding scenario flags {all minimal} {
+    lappend flags debug
 
     if {[gdb_compile_ada "${srcfile}" "${binfile}-${scenario}" executable $flags] != ""} {
 	return -1
diff --git a/gdb/testsuite/gdb.ada/array_of_variant.exp b/gdb/testsuite/gdb.ada/array_of_variant.exp
index 1a155d4..f93260a 100644
--- a/gdb/testsuite/gdb.ada/array_of_variant.exp
+++ b/gdb/testsuite/gdb.ada/array_of_variant.exp
@@ -40,8 +40,8 @@ proc gdb_test_with_xfail { cmd re re_xfail msg } {
     }
 }
 
-foreach_with_prefix scenario {all minimal} {
-    set flags [list debug additional_flags=-fgnat-encodings=$scenario]
+foreach_gnat_encoding scenario flags {all minimal} {
+    lappend flags debug
 
     if {[gdb_compile_ada "${srcfile}" "${binfile}-${scenario}" executable $flags] != ""} {
 	return -1
diff --git a/gdb/testsuite/gdb.ada/array_ptr_renaming.exp b/gdb/testsuite/gdb.ada/array_ptr_renaming.exp
index b013fc7..eadfcb6 100644
--- a/gdb/testsuite/gdb.ada/array_ptr_renaming.exp
+++ b/gdb/testsuite/gdb.ada/array_ptr_renaming.exp
@@ -19,8 +19,8 @@ require allow_ada_tests
 
 standard_ada_testfile foo
 
-foreach_with_prefix scenario {all minimal} {
-    set flags [list debug additional_flags=-fgnat-encodings=$scenario]
+foreach_gnat_encoding scenario flags {all minimal} {
+    lappend flags debug
 
     if {[gdb_compile_ada "${srcfile}" "${binfile}-${scenario}" executable $flags] != ""} {
 	return -1
diff --git a/gdb/testsuite/gdb.ada/arrayparam.exp b/gdb/testsuite/gdb.ada/arrayparam.exp
index 2921d64..ef00037 100644
--- a/gdb/testsuite/gdb.ada/arrayparam.exp
+++ b/gdb/testsuite/gdb.ada/arrayparam.exp
@@ -22,8 +22,8 @@ standard_ada_testfile foo
 # Note we don't test the "none" (no -fgnat-encodings option) scenario
 # here, because "all" and "minimal" cover the cases, and this way we
 # don't have to update the test when gnat changes its default.
-foreach_with_prefix scenario {all minimal} {
-    set flags [list debug additional_flags=-fgnat-encodings=$scenario]
+foreach_gnat_encoding scenario flags {all minimal} {
+    lappend flags debug
 
     if {[gdb_compile_ada "${srcfile}" "${binfile}-${scenario}" executable $flags] != ""} {
 	return -1
diff --git a/gdb/testsuite/gdb.ada/arrayptr.exp b/gdb/testsuite/gdb.ada/arrayptr.exp
index ca48993..335573b 100644
--- a/gdb/testsuite/gdb.ada/arrayptr.exp
+++ b/gdb/testsuite/gdb.ada/arrayptr.exp
@@ -19,8 +19,8 @@ require allow_ada_tests
 
 standard_ada_testfile foo
 
-foreach_with_prefix scenario {all minimal} {
-    set flags [list debug additional_flags=-fgnat-encodings=$scenario]
+foreach_gnat_encoding scenario flags {all minimal} {
+    lappend flags debug
 
     if {[gdb_compile_ada "${srcfile}" "${binfile}-${scenario}" executable $flags] != ""} {
 	return -1
diff --git a/gdb/testsuite/gdb.ada/big_packed_array.exp b/gdb/testsuite/gdb.ada/big_packed_array.exp
index 1ba2c48..0078c77 100644
--- a/gdb/testsuite/gdb.ada/big_packed_array.exp
+++ b/gdb/testsuite/gdb.ada/big_packed_array.exp
@@ -21,8 +21,8 @@ standard_ada_testfile foo_ra24_010
 
 set old_gcc [expr [test_compiler_info {gcc-[0-8]-*}]]
 
-foreach_with_prefix scenario {all minimal} {
-    set flags [list debug additional_flags=-fgnat-encodings=$scenario]
+foreach_gnat_encoding scenario flags {all minimal} {
+    lappend flags debug
 
     if {[gdb_compile_ada "${srcfile}" "${binfile}-${scenario}" executable $flags] != ""} {
 	return -1
diff --git a/gdb/testsuite/gdb.ada/bp_c_mixed_case.exp b/gdb/testsuite/gdb.ada/bp_c_mixed_case.exp
index 8ab5f03..2286e46 100644
--- a/gdb/testsuite/gdb.ada/bp_c_mixed_case.exp
+++ b/gdb/testsuite/gdb.ada/bp_c_mixed_case.exp
@@ -92,14 +92,14 @@ gdb_test "p <NoDebugMixedCaseFunc>" \
 
 set test "break <MixedCaseFunc>, in C"
 gdb_test_multiple "break <MixedCaseFunc>" $test {
-	-re "Function \"<MixedCaseFunc>\" not defined\..*Make breakpoint pending on future shared library load.*y or .n.. $" {
+	-re "Function \"<MixedCaseFunc>\" not defined\\..*Make breakpoint pending on future shared library load.*y or .n.. $" {
 		gdb_test_no_output "n" $test
 	}
 }
 
 set test "break <NoDebugMixedCaseFunc>, in C"
 gdb_test_multiple "break <NoDebugMixedCaseFunc>" $test {
-	-re "Function \"<NoDebugMixedCaseFunc>\" not defined\..*Make breakpoint pending on future shared library load.*y or .n.. $" {
+	-re "Function \"<NoDebugMixedCaseFunc>\" not defined\\..*Make breakpoint pending on future shared library load.*y or .n.. $" {
 		gdb_test_no_output "n" $test
 	}
 }
diff --git a/gdb/testsuite/gdb.ada/bp_inlined_func.exp b/gdb/testsuite/gdb.ada/bp_inlined_func.exp
index 761d103..db56a11 100644
--- a/gdb/testsuite/gdb.ada/bp_inlined_func.exp
+++ b/gdb/testsuite/gdb.ada/bp_inlined_func.exp
@@ -48,5 +48,5 @@ for {set i 0} {$i < 4} {incr i} {
 }
 
 gdb_test "continue" \
-         "Continuing\..*$inferior_exited_re.*" \
+         "Continuing\\..*$inferior_exited_re.*" \
          "continuing to program completion"
diff --git a/gdb/testsuite/gdb.ada/call_pn.exp b/gdb/testsuite/gdb.ada/call_pn.exp
index 5d3f9d6..9114d30 100644
--- a/gdb/testsuite/gdb.ada/call_pn.exp
+++ b/gdb/testsuite/gdb.ada/call_pn.exp
@@ -35,7 +35,10 @@ if {![runto "foo.adb:$bp_location"]} {
 # related to PR25764 - "LOC_UNRESOLVED symbol missing from partial symtab".
 # Stabilize test results by ensuring that the xfail triggers for the "before"
 # print.
-gdb_test_no_output "maint expand-symtabs"
+gdb_test_no_output {maint expand-symtabs "\(pck\|foo\)\.adb"}
+
+set gcc_major_version [gcc_major_version]
+set have_xfail [expr $gcc_major_version >= 8 &&  $gcc_major_version <= 9]
 
 # The xfail is for PR gcc/94469, which occurs with target board
 # unix/-flto/-O0/-flto-partition=none/-ffat-lto-objects and gcc-8 and later.
@@ -45,14 +48,17 @@ set xfail_re \
     [multi_line \
 	 "Multiple matches for last_node_id" \
 	 "\\\[0\\\] cancel" \
-	 "\\\[1\\\] pck\.last_node_id at .*.adb:17" \
-	 "\\\[2\\\] pck\.last_node_id at .*.adb:17" \
+	 "\\\[1\\\] pck\\.last_node_id at .*.adb:17" \
+	 "\\\[2\\\] pck\\.last_node_id at .*.adb:17" \
 	 "> $"]
 
 # Make sure that last_node_id is set to zero...
 gdb_test_multiple "print last_node_id" "print last_node_id before calling pn" {
     -re $xfail_re {
-	xfail $gdb_test_name
+	if { $have_xfail } {
+	    setup_xfail *-*-*
+	}
+	fail $gdb_test_name
 	# One of the choices will print the correct value, the other one
 	# <optimized out>.  Since we don't known which one to choose to get
 	# the correct value, cancel.
@@ -74,7 +80,10 @@ gdb_test "print pn(4321)" "= 4321"
 # Make sure that last_node_id now has the correct value...
 gdb_test_multiple "print last_node_id" "print last_node_id after calling pn" {
     -re $xfail_re {
-	xfail $gdb_test_name
+	if { $have_xfail } {
+	    setup_xfail *-*-*
+	}
+	fail $gdb_test_name
 	# Cancel
 	gdb_test_multiple "0" "cancel after xfail 2" {
 	    -re -wrap "cancelled" {
diff --git a/gdb/testsuite/gdb.ada/catch_assert_if.exp b/gdb/testsuite/gdb.ada/catch_assert_if.exp
index 312b7aa..48b1c85 100644
--- a/gdb/testsuite/gdb.ada/catch_assert_if.exp
+++ b/gdb/testsuite/gdb.ada/catch_assert_if.exp
@@ -52,9 +52,9 @@ set bp_location [gdb_get_line_number "STOP" ${testdir}/bla.adb]
 set catchpoint_msg \
   "Catchpoint $decimal, failed assertion at $hex in bla \\\(\\\).*at .*bla.adb:$bp_location"
 gdb_test "continue" \
-	 "Continuing\.$eol$eol$catchpoint_msg$eol.*STOP" \
+	 "Continuing\\.$eol$eol$catchpoint_msg$eol.*STOP" \
          "continuing to expected failed assertion"
 
 gdb_test "continue" \
-         "Continuing\..*$inferior_exited_re.*" \
+         "Continuing\\..*$inferior_exited_re.*" \
          "continuing to program completion"
diff --git a/gdb/testsuite/gdb.ada/catch_ex.exp b/gdb/testsuite/gdb.ada/catch_ex.exp
index 0fcc013..48ace25 100644
--- a/gdb/testsuite/gdb.ada/catch_ex.exp
+++ b/gdb/testsuite/gdb.ada/catch_ex.exp
@@ -55,13 +55,13 @@ gdb_test "info break" \
 set catchpoint_msg \
   "Catchpoint $any_nb, CONSTRAINT_ERROR (\\\(ignore C_E\\\) )?at $any_addr in foo \\\(\\\).*at .*foo.adb:$any_nb"
 gdb_test "continue" \
-	 "Continuing\.$eol$eol$catchpoint_msg$eol.*SPOT1" \
+	 "Continuing\\.$eol$eol$catchpoint_msg$eol.*SPOT1" \
          "continuing to first exception"
 
 set catchpoint_msg \
   "Catchpoint $any_nb, PROGRAM_ERROR (\\\(foo\\.adb:$decimal explicit raise\\\) )?at $any_addr in foo \\\(\\\).*at .*foo.adb:$any_nb"
 gdb_test "continue" \
-	 "Continuing\.$eol$eol$catchpoint_msg$eol.*SPOT2" \
+	 "Continuing\\.$eol$eol$catchpoint_msg$eol.*SPOT2" \
          "continuing to second exception"
 
 ################################################
@@ -108,23 +108,23 @@ gdb_test "info break" \
 set catchpoint_msg \
   "Catchpoint $any_nb, PROGRAM_ERROR (\\\(foo.adb:$decimal explicit raise\\\) )?at $any_addr in foo \\\(\\\).*at .*foo.adb:$any_nb"
 gdb_test "continue" \
-	 "Continuing\.$eol$eol$catchpoint_msg$eol.*SPOT2" \
+	 "Continuing\\.$eol$eol$catchpoint_msg$eol.*SPOT2" \
          "continuing to Program_Error exception"
 
 set catchpoint_msg \
   "Catchpoint $any_nb, failed assertion at $any_addr in foo \\\(\\\).*at .*foo.adb:$any_nb"
 gdb_test "continue" \
-	 "Continuing\.$eol$eol$catchpoint_msg$eol.*SPOT3" \
+	 "Continuing\\.$eol$eol$catchpoint_msg$eol.*SPOT3" \
          "continuing to failed assertion"
 
 set catchpoint_msg \
   "Catchpoint $any_nb, unhandled CONSTRAINT_ERROR at $any_addr in foo \\\(\\\).*at .*foo.adb:$any_nb"
 gdb_test "continue" \
-	 "Continuing\.$eol$eol$catchpoint_msg$eol.*SPOT4" \
+	 "Continuing\\.$eol$eol$catchpoint_msg$eol.*SPOT4" \
          "continuing to unhandled exception"
 
 gdb_test "continue" \
-         "Continuing\..*$inferior_exited_re.*" \
+         "Continuing\\..*$inferior_exited_re.*" \
          "continuing to program completion"
 
 #################################
@@ -148,12 +148,12 @@ gdb_test "tcatch exception" \
 set temp_catchpoint_msg \
   "Temporary catchpoint $any_nb, CONSTRAINT_ERROR (\\\(.*\\\) )?at $any_addr in foo \\\(\\\).*at .*foo.adb:$any_nb"
 gdb_test "continue" \
-	 "Continuing\.$eol$eol$temp_catchpoint_msg$eol.*SPOT1" \
+	 "Continuing\\.$eol$eol$temp_catchpoint_msg$eol.*SPOT1" \
          "continuing to temporary catchpoint"
 
 with_test_prefix "temporary catchpoint" {
     gdb_test "continue" \
-	"Continuing\..*$inferior_exited_re.*" \
+	"Continuing\\..*$inferior_exited_re.*" \
 	"continuing to program completion"
 }
 
diff --git a/gdb/testsuite/gdb.ada/catch_ex_std.exp b/gdb/testsuite/gdb.ada/catch_ex_std.exp
index dbd3729..2eae854 100644
--- a/gdb/testsuite/gdb.ada/catch_ex_std.exp
+++ b/gdb/testsuite/gdb.ada/catch_ex_std.exp
@@ -73,7 +73,7 @@ gdb_test "catch exception some_kind_of_error" \
     "Catchpoint \[0-9\]+: `some_kind_of_error' Ada exception"
 
 gdb_test "cont" \
-    "Catchpoint \[0-9\]+, .* at .*foo\.adb:\[0-9\]+.*" \
+    "Catchpoint \[0-9\]+, .* at .*foo\\.adb:\[0-9\]+.*" \
     "caught the exception"
 
 gdb_test "print \$_ada_exception = some_package.some_kind_of_error'Address" \
diff --git a/gdb/testsuite/gdb.ada/complete.exp b/gdb/testsuite/gdb.ada/complete.exp
index 41ea8ae..6263c4e 100644
--- a/gdb/testsuite/gdb.ada/complete.exp
+++ b/gdb/testsuite/gdb.ada/complete.exp
@@ -124,7 +124,7 @@ test_gdb_complete "pck.my" \
                   "p pck.my_global_variable"
 
 # A fully qualified package name
-test_gdb_complete "pck.inne" \
+test_gdb_complete "pck.inner" \
     "p pck.inner.inside_variable" \
     "complete fully qualified package name"
 
@@ -214,7 +214,7 @@ test_gdb_complete "ambiguous_f" \
 test_gdb_complete "ambiguous_func" \
                   "p ambiguous_func"
 
-# Perform a test intented to verify the behavior where the number
+# Perform a test intended to verify the behavior where the number
 # of possible completions is very large.  The goal is not to verify
 # precisely the list returned by the complete command (this depends
 # on too many parameters -- targets, compiler version, runtime, etc).
diff --git a/gdb/testsuite/gdb.ada/enum_idx_packed.exp b/gdb/testsuite/gdb.ada/enum_idx_packed.exp
index 1976092..d56d73b 100644
--- a/gdb/testsuite/gdb.ada/enum_idx_packed.exp
+++ b/gdb/testsuite/gdb.ada/enum_idx_packed.exp
@@ -19,8 +19,8 @@ require allow_ada_tests
 
 standard_ada_testfile foo
 
-foreach_with_prefix scenario {all minimal} {
-    set flags [list debug additional_flags=-fgnat-encodings=$scenario]
+foreach_gnat_encoding scenario flags {all minimal} {
+    lappend flags debug
 
     if {[gdb_compile_ada "${srcfile}" "${binfile}-${scenario}" executable $flags] != ""} {
 	return -1
diff --git a/gdb/testsuite/gdb.ada/excep_handle.exp b/gdb/testsuite/gdb.ada/excep_handle.exp
index ad92aff..2a99457 100644
--- a/gdb/testsuite/gdb.ada/excep_handle.exp
+++ b/gdb/testsuite/gdb.ada/excep_handle.exp
@@ -55,7 +55,7 @@ gdb_test "catch handlers" \
 # Continue.  The program should stop at first exception handling.
 
 gdb_test "continue" \
-    "Continuing\.$eol$eol$catchpoint_constraint_error_msg" \
+    "Continuing\\.$eol$eol$catchpoint_constraint_error_msg" \
     "continuing to first Constraint_Error exception handlers"
 
 # Resume the program's exception.
@@ -66,7 +66,7 @@ gdb_test "continue" \
 # the next exception being raised.
 
 gdb_test "continue" \
-    "Continuing\.$eol$eol$catchpoint_storage_error_msg" \
+    "Continuing\\.$eol$eol$catchpoint_storage_error_msg" \
     "continuing and stopping in Storage_Error exception handlers"
 
 gdb_test_no_output "delete 2" \
@@ -85,7 +85,7 @@ gdb_test "catch handlers Program_Error" \
 # Continue, we should not stop at ABORT_SIGNAL but at Program_Error one.
 
 gdb_test "continue" \
-    "Continuing\.$eol$eol$catchpoint_program_error_msg" \
+    "Continuing\\.$eol$eol$catchpoint_program_error_msg" \
     "continuing without stopping to Program_Error exception handlers"
 
 gdb_test_no_output \
@@ -101,7 +101,7 @@ gdb_test "catch handlers Storage_Error" \
 # Continue, we should stop at Storage_Error handlers.
 
 gdb_test "continue" \
-    "Continuing\.$eol$eol$catchpoint_storage_error_msg" \
+    "Continuing\\.$eol$eol$catchpoint_storage_error_msg" \
     "continuing without stopping to Storage_Error exception handlers"
 
 gdb_test_no_output \
@@ -126,7 +126,7 @@ gdb_test "info breakpoint" "stop only if Global_Var = 2" \
 # Continue, we should not stop at ABORT_SIGNAL but at Program_Error one.
 
 gdb_test "continue" \
-    "Continuing\.$eol$eol$catchpoint_constraint_error_msg" \
+    "Continuing\\.$eol$eol$catchpoint_constraint_error_msg" \
     "continuing to second Constraint_Error exception handlers"
 
 gdb_test_no_output \
@@ -148,11 +148,11 @@ gdb_test "catch handlers Program_Error if Global_Var = 4" \
 # the second one.
 
 gdb_test "continue" \
-    "Continuing\.$eol$eol$catchpoint_program_error_msg" \
+    "Continuing\\.$eol$eol$catchpoint_program_error_msg" \
     "continuing to Program_Error exception handlers"
 
 # Continue, the program should exit properly.
 
 gdb_test "continue" \
-         "Continuing\..*$inferior_exited_re.*" \
+         "Continuing\\..*$inferior_exited_re.*" \
          "continuing to program completion"
diff --git a/gdb/testsuite/gdb.ada/exception-lto.c b/gdb/testsuite/gdb.ada/exception-lto.c
new file mode 100644
index 0000000..c5ee69d
--- /dev/null
+++ b/gdb/testsuite/gdb.ada/exception-lto.c
@@ -0,0 +1,40 @@
+/* This test program is part of GDB, the GNU debugger.
+
+   Copyright 2024 Free Software Foundation, Inc.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
+
+/* We need a few extra functions here to ensure that the dictionary
+   for the global block has more than one slot.  */
+
+void f1 () { }
+void f2 () { }
+void f3 () { }
+void f4 () { }
+
+void
+__gnat_debug_raise_exception ()
+{
+}
+
+void
+__gnat_begin_handler_v1 ()
+{
+}
+
+int
+main ()
+{
+  return 0;
+}
diff --git a/gdb/testsuite/gdb.ada/exception-lto.exp b/gdb/testsuite/gdb.ada/exception-lto.exp
new file mode 100644
index 0000000..21059a3
--- /dev/null
+++ b/gdb/testsuite/gdb.ada/exception-lto.exp
@@ -0,0 +1,35 @@
+# Copyright 2024 Free Software Foundation, Inc.
+
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
+# This test mimics the situation where an Ada program (including the
+# runtime) is built with -flto.  In this situation, gcc emits the
+# exception handling functions in the DWARF -- but in a CU that is
+# marked as coming from "C".  This then triggered a bug causing the
+# Ada catchpoint code not to find the underlying runtime functions.
+
+require allow_ada_tests
+
+standard_testfile .c
+
+if {[build_executable "failed to prepare" $testfile $srcfile] == -1} {
+    return -1
+}
+
+# Try this test in both the C and Ada language modes.
+foreach_with_prefix lang {c ada} {
+    clean_restart $testfile
+    gdb_test_no_output "set lang $lang"
+    gdb_test "catch exception" "Catchpoint 1: all Ada exceptions"
+}
diff --git a/gdb/testsuite/gdb.ada/exec_changed.exp b/gdb/testsuite/gdb.ada/exec_changed.exp
index 8fb8d1c..69f386e 100644
--- a/gdb/testsuite/gdb.ada/exec_changed.exp
+++ b/gdb/testsuite/gdb.ada/exec_changed.exp
@@ -86,7 +86,7 @@ if { [gdb_start_cmd] < 0 } {
 
 clean_restart "${binfile}$EXEEXT"
 
-# Ensure we don't accidently use the main symbol cache.
+# Ensure we don't accidentally use the main symbol cache.
 gdb_test_no_output "mt set symbol-cache-size 0"
 
 # Put something in the symbol lookup cache that will get looked up when
diff --git a/gdb/testsuite/gdb.ada/fixed_cmp.exp b/gdb/testsuite/gdb.ada/fixed_cmp.exp
index de506fd..dcd4745 100644
--- a/gdb/testsuite/gdb.ada/fixed_cmp.exp
+++ b/gdb/testsuite/gdb.ada/fixed_cmp.exp
@@ -19,8 +19,8 @@ require allow_ada_tests
 
 standard_ada_testfile fixed
 
-foreach_with_prefix gnat_encodings {all minimal} {
-    set flags [list debug additional_flags=-fgnat-encodings=$gnat_encodings]
+foreach_gnat_encoding gnat_encodings flags {all minimal} {
+    lappend flags debug
 
     if {[gdb_compile_ada "${srcfile}" "${binfile}-${gnat_encodings}" executable $flags] != "" } {
       return -1
diff --git a/gdb/testsuite/gdb.ada/fixed_points.exp b/gdb/testsuite/gdb.ada/fixed_points.exp
index 4665595..ceed34a 100644
--- a/gdb/testsuite/gdb.ada/fixed_points.exp
+++ b/gdb/testsuite/gdb.ada/fixed_points.exp
@@ -19,8 +19,8 @@ require allow_ada_tests
 
 standard_ada_testfile fixed_points
 
-foreach_with_prefix scenario {all minimal} {
-    set flags [list debug additional_flags=-fgnat-encodings=$scenario]
+foreach_gnat_encoding scenario flags {all minimal} {
+    lappend flags debug
     if {[gdb_compile_ada "${srcfile}" "${binfile}-${scenario}" executable $flags] != ""} {
 	return -1
     }
diff --git a/gdb/testsuite/gdb.ada/frame_arg_lang.exp b/gdb/testsuite/gdb.ada/frame_arg_lang.exp
index 918a922..b629c42 100644
--- a/gdb/testsuite/gdb.ada/frame_arg_lang.exp
+++ b/gdb/testsuite/gdb.ada/frame_arg_lang.exp
@@ -27,11 +27,10 @@ gdb_compile "${csrcfile}" "${cobject}" object [list debug]
 # Note we don't test the "none" (no -fgnat-encodings option) scenario
 # here, because "all" and "minimal" cover the cases, and this way we
 # don't have to update the test when gnat changes its default.
-foreach_with_prefix scenario {all minimal} {
-    set flags [list debug additional_flags=-largs \
-		   additional_flags=${cobject} \
-		   additional_flags=-margs \
-		   additional_flags=-fgnat-encodings=$scenario]
+foreach_gnat_encoding scenario flags {all minimal} {
+    lappend flags debug additional_flags=-largs \
+	additional_flags=${cobject} \
+	additional_flags=-margs
 
     if {[gdb_compile_ada "${srcfile}" "${binfile}-${scenario}" executable $flags] != ""} {
 	return -1
diff --git a/gdb/testsuite/gdb.ada/fun_overload_menu.exp b/gdb/testsuite/gdb.ada/fun_overload_menu.exp
index ec5465d..8e7a3fb 100644
--- a/gdb/testsuite/gdb.ada/fun_overload_menu.exp
+++ b/gdb/testsuite/gdb.ada/fun_overload_menu.exp
@@ -54,8 +54,8 @@ proc test_menu {expr function menu_entries selection output} {
 with_test_prefix "func" {
     test_menu "f (1, null)" "f" \
 	[multi_line \
-	     "\\\[1\\\] foo\.f \\(integer; foo\.integer_access\\) return boolean at .*foo.adb:.*" \
-	     "\\\[2\\\] foo\.f \\(foo\.new_integer; foo\.integer_access\\) return boolean at .*foo.adb:.*"] \
+	     "\\\[1\\\] foo\\.f \\(integer; foo\\.integer_access\\) return boolean at .*foo.adb:.*" \
+	     "\\\[2\\\] foo\\.f \\(foo\\.new_integer; foo\\.integer_access\\) return boolean at .*foo.adb:.*"] \
 	"1" "= true"
 }
 
@@ -63,8 +63,8 @@ with_test_prefix "func" {
 with_test_prefix "proc" {
     test_menu "p (1, null)" "p" \
 	[multi_line \
-	     "\\\[1\\\] foo\.p \\(integer; foo\.integer_access\\) at .*foo.adb:.*" \
-	     "\\\[2\\\] foo\.p \\(foo\.new_integer; foo\.integer_access\\) at .*foo.adb:.*" ] \
+	     "\\\[1\\\] foo\\.p \\(integer; foo\\.integer_access\\) at .*foo.adb:.*" \
+	     "\\\[2\\\] foo\\.p \\(foo\\.new_integer; foo\\.integer_access\\) at .*foo.adb:.*" ] \
 	"1" "= (void)"
 }
 
@@ -73,7 +73,7 @@ gdb_test "set ada print-signatures off" ""
 with_test_prefix "signatures disabled" {
     test_menu "f (1, null)" "f" \
 	[multi_line \
-	     "\\\[1\\\] foo\.f at .*foo.adb:.*" \
-	     "\\\[2\\\] foo\.f at .*foo.adb:.*"] \
+	     "\\\[1\\\] foo\\.f at .*foo.adb:.*" \
+	     "\\\[2\\\] foo\\.f at .*foo.adb:.*"] \
 	"1" "= true"
 }
diff --git a/gdb/testsuite/gdb.ada/fun_renaming.exp b/gdb/testsuite/gdb.ada/fun_renaming.exp
index 33c9b95..08c44b7 100644
--- a/gdb/testsuite/gdb.ada/fun_renaming.exp
+++ b/gdb/testsuite/gdb.ada/fun_renaming.exp
@@ -37,10 +37,10 @@ gdb_test "print fun_rename_test_next(1)" " = 2"
 
 set test "print fun_rename_test_n(1)"
 gdb_test_multiple $test $test {
-    -re " = 2\..*$gdb_prompt $"  {
+    -wrap -re " = 2"  {
         pass $test
     }
-    -re "No definition of \"fun_rename_test_n\" in current context\..*$gdb_prompt $" {
+    -wrap -re "No definition of \"fun_rename_test_n\" in current context\\." {
         if {[test_compiler_info {gcc-6*}]} {
             fail $test
         } else {
@@ -51,10 +51,10 @@ gdb_test_multiple $test $test {
 }
 set test "print renamed_fun_rename_test_next(1)"
 gdb_test_multiple $test $test {
-    -re " = 2\..*$gdb_prompt $" {
+    -wrap -re " = 2" {
         pass $test
     }
-    -re "No definition of \"renamed_fun_rename_test_next\" in current context\..*$gdb_prompt $" {
+    -wrap -re "No definition of \"renamed_fun_rename_test_next\" in current context\\." {
         if {[test_compiler_info {gcc-6*}]} {
             fail $test
         } else {
@@ -65,17 +65,17 @@ gdb_test_multiple $test $test {
 
 set test "print pack.renamed_fun_rename_test_next(1)"
 gdb_test_multiple $test $test {
-    -re " = 2\..*$gdb_prompt $" {
+    -wrap -re " = 2" {
         pass $test
     }
-    -re "No definition of \"pack\.renamed_fun_rename_test_next\" in current context\..*$gdb_prompt $" {
+    -wrap -re "No definition of \"pack\\.renamed_fun_rename_test_next\" in current context\\." {
         if {[test_compiler_info {gcc-6*}]} {
             fail $test
         } else {
             xfail $test
         }
     }
-    -re "Type <data variable, no debug info> is not a structure or union type\..*$gdb_prompt $" {
+    -wrap -re "Type <data variable, no debug info> is not a structure or union type\\." {
         if {[test_compiler_info {gcc-6*}]} {
             fail $test
         } else {
diff --git a/gdb/testsuite/gdb.ada/funcall_ref.exp b/gdb/testsuite/gdb.ada/funcall_ref.exp
index 518ceb7..1c28392 100644
--- a/gdb/testsuite/gdb.ada/funcall_ref.exp
+++ b/gdb/testsuite/gdb.ada/funcall_ref.exp
@@ -22,8 +22,8 @@ standard_ada_testfile foo
 # Note we don't test the "none" (no -fgnat-encodings option) scenario
 # here, because "all" and "minimal" cover the cases, and this way we
 # don't have to update the test when gnat changes its default.
-foreach_with_prefix scenario {all minimal} {
-    set flags [list debug additional_flags=-fgnat-encodings=$scenario]
+foreach_gnat_encoding scenario flags {all minimal} {
+    lappend flags debug
 
     if {[gdb_compile_ada "${srcfile}" "${binfile}-${scenario}" executable $flags] != ""} {
 	return -1
diff --git a/gdb/testsuite/gdb.ada/homonym.exp b/gdb/testsuite/gdb.ada/homonym.exp
index 64a6edf..91a4e62 100644
--- a/gdb/testsuite/gdb.ada/homonym.exp
+++ b/gdb/testsuite/gdb.ada/homonym.exp
@@ -76,7 +76,7 @@ gdb_test "print lcl" \
 
 set bp_location [gdb_get_line_number "BREAK_2" ${testdir}/homonym.adb]
 gdb_test "break homonym.adb:$bp_location" \
-         "Breakpoint \[0-9\]+ at 0x\[0-9a-fA-F\]+: file .*homonym\.adb, line \[0-9\]+\." \
+         "Breakpoint \[0-9\]+ at 0x\[0-9a-fA-F\]+: file .*homonym\\.adb, line \[0-9\]+\\." \
          "break at BREAK_2"
 
 gdb_test "continue" \
diff --git a/gdb/testsuite/gdb.ada/mi_string_access.exp b/gdb/testsuite/gdb.ada/mi_string_access.exp
index 15b8cf1..8fd116b 100644
--- a/gdb/testsuite/gdb.ada/mi_string_access.exp
+++ b/gdb/testsuite/gdb.ada/mi_string_access.exp
@@ -22,8 +22,8 @@ standard_ada_testfile bar
 load_lib mi-support.exp
 set MIFLAGS "-i=mi"
 
-foreach_with_prefix scenario {all minimal} {
-    set flags [list debug additional_flags=-fgnat-encodings=$scenario]
+foreach_gnat_encoding scenario flags {all minimal} {
+    lappend flags debug
 
     if {[gdb_compile_ada "${srcfile}" "${binfile}-${scenario}" executable $flags] != ""} {
 	return -1
diff --git a/gdb/testsuite/gdb.ada/mi_var_access.exp b/gdb/testsuite/gdb.ada/mi_var_access.exp
index e797a15..15419bb 100644
--- a/gdb/testsuite/gdb.ada/mi_var_access.exp
+++ b/gdb/testsuite/gdb.ada/mi_var_access.exp
@@ -41,7 +41,7 @@ mi_continue_to_line \
 # The value of NUMCHILD may vary on different systems.  Use generic $decimal
 # to match possible values.
 set re_ok "\\^done,name=\"A_String_Access\",numchild=\"$decimal\",.*"
-set re_error "\\^error,msg=\"Value out of range\.\".*"
+set re_error "\\^error,msg=\"Value out of range\\.\".*"
 set re_error2 "\\^error,msg=\"Cannot access memory at address $hex\""
 mi_gdb_test "-var-create A_String_Access * A_String_Access" \
     "($re_ok|$re_error|$re_error2)" \
diff --git a/gdb/testsuite/gdb.ada/mi_var_array.exp b/gdb/testsuite/gdb.ada/mi_var_array.exp
index 2b50481..dd770a1 100644
--- a/gdb/testsuite/gdb.ada/mi_var_array.exp
+++ b/gdb/testsuite/gdb.ada/mi_var_array.exp
@@ -22,11 +22,8 @@ standard_ada_testfile bar
 load_lib mi-support.exp
 set MIFLAGS "-i=mi"
 
-foreach_with_prefix scenario {none all minimal} {
-    set flags {debug}
-    if {$scenario != "none"} {
-	lappend flags additional_flags=-fgnat-encodings=$scenario
-    }
+foreach_gnat_encoding scenario flags {none all minimal} {
+    lappend flags debug
 
     if {[gdb_compile_ada "${srcfile}" "${binfile}-${scenario}" executable $flags] != "" } {
 	return -1
diff --git a/gdb/testsuite/gdb.ada/mi_var_union.exp b/gdb/testsuite/gdb.ada/mi_var_union.exp
index eb23c0a..64bfe33 100644
--- a/gdb/testsuite/gdb.ada/mi_var_union.exp
+++ b/gdb/testsuite/gdb.ada/mi_var_union.exp
@@ -24,11 +24,8 @@ set MIFLAGS "-i=mi"
 
 set float "\\-?((\[0-9\]+(\\.\[0-9\]+)?(e\[-+\]\[0-9\]+)?)|(nan\\($hex\\)))"
 
-foreach_with_prefix scenario {none all minimal} {
-    set flags {debug}
-    if {$scenario != "none"} {
-	lappend flags additional_flags=-fgnat-encodings=$scenario
-    }
+foreach_gnat_encoding scenario flags {none all minimal} {
+    lappend flags debug
 
     if {[gdb_compile_ada "${srcfile}" "${binfile}-${scenario}" executable $flags] != "" } {
 	return -1
diff --git a/gdb/testsuite/gdb.ada/mi_variant.exp b/gdb/testsuite/gdb.ada/mi_variant.exp
index 7f10b3c..f4be5a0 100644
--- a/gdb/testsuite/gdb.ada/mi_variant.exp
+++ b/gdb/testsuite/gdb.ada/mi_variant.exp
@@ -23,11 +23,8 @@ standard_ada_testfile pkg
 load_lib mi-support.exp
 set MIFLAGS "-i=mi"
 
-foreach_with_prefix scenario {none all minimal} {
-    set flags {debug}
-    if {$scenario != "none"} {
-	lappend flags additional_flags=-fgnat-encodings=$scenario
-    }
+foreach_gnat_encoding scenario flags {none all minimal} {
+    lappend flags debug
 
     if {[gdb_compile_ada "${srcfile}" "${binfile}-${scenario}" executable $flags] != ""} {
 	return -1
diff --git a/gdb/testsuite/gdb.ada/mod_from_name.exp b/gdb/testsuite/gdb.ada/mod_from_name.exp
index c6acc80..33bd854 100644
--- a/gdb/testsuite/gdb.ada/mod_from_name.exp
+++ b/gdb/testsuite/gdb.ada/mod_from_name.exp
@@ -19,8 +19,8 @@ require allow_ada_tests
 
 standard_ada_testfile foo
 
-foreach_with_prefix scenario {all minimal} {
-    set flags [list debug additional_flags=-fgnat-encodings=$scenario]
+foreach_gnat_encoding scenario flags {all minimal} {
+    lappend flags debug
 
     if {[gdb_compile_ada "${srcfile}" "${binfile}-${scenario}" executable $flags] != ""} {
 	return -1
diff --git a/gdb/testsuite/gdb.ada/multiarray.exp b/gdb/testsuite/gdb.ada/multiarray.exp
index 3475647..91ba1ec 100644
--- a/gdb/testsuite/gdb.ada/multiarray.exp
+++ b/gdb/testsuite/gdb.ada/multiarray.exp
@@ -19,10 +19,11 @@ require allow_ada_tests
 
 standard_ada_testfile p
 
-foreach_with_prefix scenario {all minimal} {
-    set flags [list debug additional_flags=-fgnat-encodings=$scenario]
+foreach_gnat_encoding scenario flags {all minimal} {
+    lappend flags debug
 
-    if {[gdb_compile_ada "${srcfile}" "${binfile}-${scenario}" executable {debug}] != ""} {
+    if {[gdb_compile_ada "${srcfile}" "${binfile}-${scenario}" \
+	     executable $flags] != ""} {
 	return -1
     }
 
diff --git a/gdb/testsuite/gdb.ada/operator_bp.exp b/gdb/testsuite/gdb.ada/operator_bp.exp
index ff81a9f..2335d49 100644
--- a/gdb/testsuite/gdb.ada/operator_bp.exp
+++ b/gdb/testsuite/gdb.ada/operator_bp.exp
@@ -36,7 +36,7 @@ runto "ops_test.adb:$bp_location"
 set bp_re "Breakpoint $decimal at $hex"
 foreach op { "+" "-" } {
     set op_re [string_to_regexp $op]
-    gdb_test "break \"$op\"" "$bp_re: \"$op_re\"\. \\($decimal locations\\).*"
+    gdb_test "break \"$op\"" "$bp_re: \"$op_re\"\\. \\($decimal locations\\).*"
 }
 
 foreach op { "*" "/" "mod" "rem" "**" "<" "<=" ">" ">=" "=" "and" "or" "xor" "&" "abs" "not"} {
@@ -45,7 +45,7 @@ foreach op { "*" "/" "mod" "rem" "**" "<" "<=" ">" ">=" "=" "and" "or" "xor" "&"
 	-re -wrap "$bp_re: file .*ops.adb, line $decimal." {
 	    pass $gdb_test_name
 	}
-	-re -wrap "$bp_re: \"$op_re\"\. \\($decimal locations\\).*" {
+	-re -wrap "$bp_re: \"$op_re\"\\. \\($decimal locations\\).*" {
 	    pass $gdb_test_name
 	}
     }
@@ -72,7 +72,7 @@ runto "ops_test.adb:$bp_location"
 foreach op { "+" "-" } {
     set op_re [string_to_regexp $op]
     gdb_test "break ops.\"$op\"" \
-             "Breakpoint $decimal at $hex: ops\\.\"$op_re\"\. \\(2 locations\\)"
+             "Breakpoint $decimal at $hex: ops\\.\"$op_re\"\\. \\(2 locations\\)"
 }
 
 foreach op { "*" "/" "mod" "rem" "**" "<" "<=" ">" ">=" "=" "and" "or" "xor" "&" "abs" "not"} {
diff --git a/gdb/testsuite/gdb.ada/out_of_line_in_inlined.exp b/gdb/testsuite/gdb.ada/out_of_line_in_inlined.exp
index eaa88a3..2adef97 100644
--- a/gdb/testsuite/gdb.ada/out_of_line_in_inlined.exp
+++ b/gdb/testsuite/gdb.ada/out_of_line_in_inlined.exp
@@ -19,10 +19,8 @@ require allow_ada_tests
 
 standard_ada_testfile foo_o224_021
 
-foreach_with_prefix scenario {all minimal} {
-    set flags [list debug \
-		   optimize=-O2 \
-		   additional_flags=-fgnat-encodings=$scenario]
+foreach_gnat_encoding scenario flags {all minimal} {
+    lappend flags debug optimize=-O2
 
     if {[gdb_compile_ada "${srcfile}" "${binfile}-${scenario}" executable $flags] != ""} {
 	return -1
diff --git a/gdb/testsuite/gdb.ada/packed_array.exp b/gdb/testsuite/gdb.ada/packed_array.exp
index a3d7136..85bc59d 100644
--- a/gdb/testsuite/gdb.ada/packed_array.exp
+++ b/gdb/testsuite/gdb.ada/packed_array.exp
@@ -19,8 +19,8 @@ require allow_ada_tests
 
 standard_ada_testfile pa
 
-foreach_with_prefix scenario {all minimal} {
-    set flags [list debug additional_flags=-fgnat-encodings=$scenario]
+foreach_gnat_encoding scenario flags {all minimal} {
+    lappend flags debug
 
     if {[gdb_compile_ada "${srcfile}" "${binfile}-${scenario}" executable $flags] != ""} {
 	return -1
diff --git a/gdb/testsuite/gdb.ada/packed_record.exp b/gdb/testsuite/gdb.ada/packed_record.exp
index fa058f7..bbba9b2 100644
--- a/gdb/testsuite/gdb.ada/packed_record.exp
+++ b/gdb/testsuite/gdb.ada/packed_record.exp
@@ -19,8 +19,8 @@ require allow_ada_tests
 
 standard_ada_testfile pr
 
-foreach_with_prefix scenario {all minimal} {
-    set flags [list debug additional_flags=-fgnat-encodings=$scenario]
+foreach_gnat_encoding scenario flags {all minimal} {
+    lappend flags debug
 
     if {[gdb_compile_ada "${srcfile}" "${binfile}-${scenario}" executable $flags] != ""} {
 	return -1
diff --git a/gdb/testsuite/gdb.ada/packed_tagged.exp b/gdb/testsuite/gdb.ada/packed_tagged.exp
index faccc14..1c9e5a0 100644
--- a/gdb/testsuite/gdb.ada/packed_tagged.exp
+++ b/gdb/testsuite/gdb.ada/packed_tagged.exp
@@ -22,11 +22,8 @@ standard_ada_testfile comp_bug
 # Note we don't test the "none" (no -fgnat-encodings option) scenario
 # here, because "all" and "minimal" cover the cases, and this way we
 # don't have to update the test when gnat changes its default.
-foreach_with_prefix scenario {all minimal} {
-    set flags {debug}
-    if {$scenario != "none"} {
-	lappend flags additional_flags=-fgnat-encodings=$scenario
-    }
+foreach_gnat_encoding scenario flags {all minimal} {
+    lappend flags debug
 
     if {[gdb_compile_ada "${srcfile}" "${binfile}-${scenario}" executable $flags] != ""} {
 	return -1
diff --git a/gdb/testsuite/gdb.ada/pckd_arr_ren.exp b/gdb/testsuite/gdb.ada/pckd_arr_ren.exp
index 083ee13..18bb84f 100644
--- a/gdb/testsuite/gdb.ada/pckd_arr_ren.exp
+++ b/gdb/testsuite/gdb.ada/pckd_arr_ren.exp
@@ -19,8 +19,8 @@ require allow_ada_tests
 
 standard_ada_testfile foo
 
-foreach_with_prefix scenario {all minimal} {
-    set flags [list debug additional_flags=-fgnat-encodings=$scenario]
+foreach_gnat_encoding scenario flags {all minimal} {
+    lappend flags debug
 
     if {[gdb_compile_ada "${srcfile}" "${binfile}-${scenario}" executable $flags] != ""} {
 	return -1
diff --git a/gdb/testsuite/gdb.ada/ptype-o.exp b/gdb/testsuite/gdb.ada/ptype-o.exp
index f778219..5038ee1 100644
--- a/gdb/testsuite/gdb.ada/ptype-o.exp
+++ b/gdb/testsuite/gdb.ada/ptype-o.exp
@@ -21,8 +21,8 @@ require allow_ada_tests
 
 standard_ada_testfile prog
 
-foreach_with_prefix scenario {all minimal} {
-    set flags [list debug additional_flags=-fgnat-encodings=$scenario]
+foreach_gnat_encoding scenario flags {all minimal} {
+    lappend flags debug
 
     if {[gdb_compile_ada "${srcfile}" "${binfile}-${scenario}" executable $flags] != ""} {
 	return -1
diff --git a/gdb/testsuite/gdb.ada/rec_comp.exp b/gdb/testsuite/gdb.ada/rec_comp.exp
index 4638786..641ebb6 100644
--- a/gdb/testsuite/gdb.ada/rec_comp.exp
+++ b/gdb/testsuite/gdb.ada/rec_comp.exp
@@ -33,6 +33,6 @@ if {![runto "bar_o203_012.adb:$bp_location"]} {
 gdb_test "whatis r.ia" " = bar_o203_012.int_access"
 
 gdb_test "ptype r" \
-    " = record\r\n *ia: bar_o203_012\.int_access;\r\nend record"
+    " = record\r\n *ia: bar_o203_012\\.int_access;\r\nend record"
 
 gdb_test "ptype r.ia" " = access <$decimal-byte integer>"
diff --git a/gdb/testsuite/gdb.ada/rec_ptype.exp b/gdb/testsuite/gdb.ada/rec_ptype.exp
index f75d09b..fc7bb8b 100644
--- a/gdb/testsuite/gdb.ada/rec_ptype.exp
+++ b/gdb/testsuite/gdb.ada/rec_ptype.exp
@@ -22,8 +22,8 @@ standard_ada_testfile main
 # Note we don't test the "none" (no -fgnat-encodings option) scenario
 # here, because "all" and "minimal" cover the cases, and this way we
 # don't have to update the test when gnat changes its default.
-foreach_with_prefix scenario {all minimal} {
-    set flags [list debug additional_flags=-fgnat-encodings=$scenario]
+foreach_gnat_encoding scenario flags {all minimal} {
+    lappend flags debug
 
     if {[gdb_compile_ada "${srcfile}" "${binfile}-${scenario}" executable $flags] != ""} {
 	return -1
diff --git a/gdb/testsuite/gdb.ada/same_component_name.exp b/gdb/testsuite/gdb.ada/same_component_name.exp
index 7167a41..84a48b4 100644
--- a/gdb/testsuite/gdb.ada/same_component_name.exp
+++ b/gdb/testsuite/gdb.ada/same_component_name.exp
@@ -19,8 +19,8 @@ require allow_ada_tests
 
 standard_ada_testfile foo
 
-foreach_with_prefix scenario {all minimal} {
-    set flags [list debug additional_flags=-fgnat-encodings=$scenario]
+foreach_gnat_encoding scenario flags {all minimal} {
+    lappend flags debug
 
     if {[gdb_compile_ada "${srcfile}" "${binfile}-${scenario}" executable $flags] != "" } {
 	return -1
diff --git a/gdb/testsuite/gdb.ada/set_pckd_arr_elt.exp b/gdb/testsuite/gdb.ada/set_pckd_arr_elt.exp
index d77f8fe..2979cb9 100644
--- a/gdb/testsuite/gdb.ada/set_pckd_arr_elt.exp
+++ b/gdb/testsuite/gdb.ada/set_pckd_arr_elt.exp
@@ -19,8 +19,8 @@ require allow_ada_tests
 
 standard_ada_testfile foo
 
-foreach_with_prefix scenario {all minimal} {
-    set flags [list debug additional_flags=-fgnat-encodings=$scenario]
+foreach_gnat_encoding scenario flags {all minimal} {
+    lappend flags debug
 
     if {[gdb_compile_ada "${srcfile}" "${binfile}-${scenario}" executable $flags] != ""} {
 	return -1
diff --git a/gdb/testsuite/gdb.ada/tagged-lookup.exp b/gdb/testsuite/gdb.ada/tagged-lookup.exp
index 3803319..f1473aa 100644
--- a/gdb/testsuite/gdb.ada/tagged-lookup.exp
+++ b/gdb/testsuite/gdb.ada/tagged-lookup.exp
@@ -51,11 +51,7 @@ gdb_test_multiple "print *the_local_var" "only one CU expanded" -lbl {
     -re ".symtab-create. start_subfile: name = \[^,\]*, name_for_id = \[^\r\n\]*\r\n" {
 	exp_continue
     }
-    -re -wrap ".* = \\\(n => $decimal\\\)" {
-	if {$found_pck + $found_pck2 <= 1} {
-	    pass $gdb_test_name
-	} else {
-	    fail $gdb_test_name
-	}
+    -re -wrap "" {
+	gdb_assert {$found_pck + $found_pck2 <= 1} $gdb_test_name
     }
 }
diff --git a/gdb/testsuite/gdb.ada/tagged_access.exp b/gdb/testsuite/gdb.ada/tagged_access.exp
index 9b4ac6c..57f7440 100644
--- a/gdb/testsuite/gdb.ada/tagged_access.exp
+++ b/gdb/testsuite/gdb.ada/tagged_access.exp
@@ -21,17 +21,22 @@ require gnat_runtime_has_debug_info
 
 standard_ada_testfile p
 
-if {[gdb_compile_ada "${srcfile}" "${binfile}" executable [list debug]] != "" } {
-  return -1
-}
+foreach_gnat_encoding scenario flags {all minimal} {
+    lappend flags debug
+
+    if {[gdb_compile_ada "${srcfile}" "${binfile}-${scenario}" \
+	     executable $flags] != ""} {
+	return -1
+    }
 
-clean_restart ${testfile}
+    clean_restart ${testfile}-${scenario}
 
-set bp_location [gdb_get_line_number "BREAK" ${testdir}/p.adb]
-runto "p.adb:$bp_location"
+    set bp_location [gdb_get_line_number "BREAK" ${testdir}/p.adb]
+    runto "p.adb:$bp_location"
 
-gdb_test "ptype c.all" \
-         " = new pack\\.interactive_command with record\r\n\\s+menu_name: pack\\.string_access;\r\nend record"
+    gdb_test "ptype c.all" \
+	" = new pack\\.interactive_command with record\r\n\\s+menu_name: pack\\.string_access;\r\nend record"
 
-gdb_test "ptype c.menu_name" \
-         " = access array \\(<>\\) of character"
+    gdb_test "ptype c.menu_name" \
+	" = access array \\(<>\\) of character"
+}
diff --git a/gdb/testsuite/gdb.ada/task_bp.exp b/gdb/testsuite/gdb.ada/task_bp.exp
index cf6251e..4b32a3d 100644
--- a/gdb/testsuite/gdb.ada/task_bp.exp
+++ b/gdb/testsuite/gdb.ada/task_bp.exp
@@ -37,7 +37,7 @@ if {[gdb_compile_ada "${srcfile}" "${binfile}" executable [list debug]] != "" }
 
 proc test_bp { loc msg } {
    gdb_test "break $loc" \
-     "Breakpoint \[0-9\]+ at 0x\[0-9a-fA-F\]+: file .*pck.adb, line \[0-9\]+\." \
+     "Breakpoint \[0-9\]+ at 0x\[0-9a-fA-F\]+: file .*pck.adb, line \[0-9\]+\\." \
      "break $loc - $msg"
 
    gdb_run_cmd
diff --git a/gdb/testsuite/gdb.ada/task_switch_in_core.exp b/gdb/testsuite/gdb.ada/task_switch_in_core.exp
index 63a951c..dd63bb8 100644
--- a/gdb/testsuite/gdb.ada/task_switch_in_core.exp
+++ b/gdb/testsuite/gdb.ada/task_switch_in_core.exp
@@ -41,7 +41,7 @@ if {!$core_supported} {
   return -1
 }
 
-# Now taht the core file has been created, we can start the real
+# Now that the core file has been created, we can start the real
 # part of this testcase, which is to debug using that core file.
 # Restart GDB and load that core file.
 
diff --git a/gdb/testsuite/gdb.ada/tasks.exp b/gdb/testsuite/gdb.ada/tasks.exp
index 6e58840..ecbfbd5 100644
--- a/gdb/testsuite/gdb.ada/tasks.exp
+++ b/gdb/testsuite/gdb.ada/tasks.exp
@@ -55,11 +55,11 @@ gdb_test "watch j task 1 task 3" "You can specify only one task\\."
 
 # Check that attempting to combine 'task' and 'thread' gives an error.
 gdb_test "break break_me task 1 thread 1" \
-    "You can specify only one of thread or task\\."
+    "You can specify only one of thread, inferior, or task\\."
 gdb_test "break break_me thread 1 task 1" \
-    "You can specify only one of thread or task\\."
+    "You can specify only one of thread, inferior, or task\\."
 gdb_test "break break_me inferior 1 task 1" \
-    "You can specify only one of inferior or task\\."
+    "You can specify only one of thread, inferior, or task\\."
 gdb_test "watch j task 1 thread 1" \
     "You can specify only one of thread or task\\."
 gdb_test "watch j thread 1 task 1" \
diff --git a/gdb/testsuite/gdb.ada/unc_arr_ptr_in_var_rec.exp b/gdb/testsuite/gdb.ada/unc_arr_ptr_in_var_rec.exp
index 6b2a6fd..2bcc027 100644
--- a/gdb/testsuite/gdb.ada/unc_arr_ptr_in_var_rec.exp
+++ b/gdb/testsuite/gdb.ada/unc_arr_ptr_in_var_rec.exp
@@ -19,8 +19,8 @@ require allow_ada_tests
 
 standard_ada_testfile foo
 
-foreach_with_prefix scenario {all minimal} {
-    set flags [list debug additional_flags=-fgnat-encodings=$scenario]
+foreach_gnat_encoding scenario flags {all minimal} {
+    lappend flags debug
 
     if {[gdb_compile_ada "${srcfile}" "${binfile}-${scenario}" executable $flags] != ""} {
 	return -1
diff --git a/gdb/testsuite/gdb.ada/unchecked_union.exp b/gdb/testsuite/gdb.ada/unchecked_union.exp
index bff71bd..5d3256b 100644
--- a/gdb/testsuite/gdb.ada/unchecked_union.exp
+++ b/gdb/testsuite/gdb.ada/unchecked_union.exp
@@ -51,11 +51,8 @@ set pair_string {    case ? is
 }
 set pair_full "type = record\n${inner_string}${pair_string}end record"
 
-foreach_with_prefix scenario {none all minimal} {
-    set flags {debug}
-    if {$scenario != "none"} {
-	lappend flags additional_flags=-fgnat-encodings=$scenario
-    }
+foreach_gnat_encoding scenario flags {none all minimal} {
+    lappend flags debug
 
     if {[gdb_compile_ada "${srcfile}" "${binfile}-${scenario}" executable $flags] != ""} {
 	return -1
diff --git a/gdb/testsuite/gdb.ada/var_rec_arr.exp b/gdb/testsuite/gdb.ada/var_rec_arr.exp
index a859108..20598ea 100644
--- a/gdb/testsuite/gdb.ada/var_rec_arr.exp
+++ b/gdb/testsuite/gdb.ada/var_rec_arr.exp
@@ -22,8 +22,8 @@ standard_ada_testfile foo_na09_042
 # Note we don't test the "none" (no -fgnat-encodings option) scenario
 # here, because "all" and "minimal" cover the cases, and this way we
 # don't have to update the test when gnat changes its default.
-foreach_with_prefix scenario {all minimal} {
-    set flags [list debug additional_flags=-fgnat-encodings=$scenario]
+foreach_gnat_encoding scenario flags {all minimal} {
+    lappend flags debug
 
     if {[gdb_compile_ada "${srcfile}" "${binfile}-${scenario}" executable $flags] != ""} {
 	return -1
diff --git a/gdb/testsuite/gdb.ada/variant.exp b/gdb/testsuite/gdb.ada/variant.exp
index 9fbc449..227331c 100644
--- a/gdb/testsuite/gdb.ada/variant.exp
+++ b/gdb/testsuite/gdb.ada/variant.exp
@@ -20,11 +20,8 @@ require allow_ada_tests
 
 standard_ada_testfile pkg
 
-foreach_with_prefix scenario {none all minimal} {
-    set flags {debug}
-    if {$scenario != "none"} {
-	lappend flags additional_flags=-fgnat-encodings=$scenario
-    }
+foreach_gnat_encoding scenario flags {none all minimal} {
+    lappend flags debug
 
     if {[gdb_compile_ada "${srcfile}" "${binfile}-${scenario}" executable $flags] != ""} {
 	return -1
diff --git a/gdb/testsuite/gdb.ada/variant_record_packed_array.exp b/gdb/testsuite/gdb.ada/variant_record_packed_array.exp
index f6b4e41..8f4192c 100644
--- a/gdb/testsuite/gdb.ada/variant_record_packed_array.exp
+++ b/gdb/testsuite/gdb.ada/variant_record_packed_array.exp
@@ -19,8 +19,8 @@ require allow_ada_tests
 
 standard_ada_testfile foo
 
-foreach_with_prefix scenario {all minimal} {
-    set flags [list debug additional_flags=-fgnat-encodings=$scenario]
+foreach_gnat_encoding scenario flags {all minimal} {
+    lappend flags debug
 
     if {[gdb_compile_ada "${srcfile}" "${binfile}-${scenario}" executable $flags] != ""} {
 	return -1
diff --git a/gdb/testsuite/gdb.arch/amd64-disp-step-self-call.exp b/gdb/testsuite/gdb.arch/amd64-disp-step-self-call.exp
index 762d19a..2db3ff2 100644
--- a/gdb/testsuite/gdb.arch/amd64-disp-step-self-call.exp
+++ b/gdb/testsuite/gdb.arch/amd64-disp-step-self-call.exp
@@ -77,6 +77,6 @@ gdb_assert {[expr $sp == $new_sp]} \
     "check stack pointer was updated as expected"
 
 # Check the contents of the stack were updated to the expected value.
-set next_insn_addr 0x[format %016X $next_insn_addr]
+set next_insn_addr 0x[format %016x $next_insn_addr]
 gdb_test "x/1gx 0x[format %x $sp]" "$hex:\\s+$next_insn_addr" \
     "check return address was updated correctly"
diff --git a/gdb/testsuite/gdb.arch/arm-single-step-kernel-helper.c b/gdb/testsuite/gdb.arch/arm-single-step-kernel-helper.c
index 393004e..9b5e137 100644
--- a/gdb/testsuite/gdb.arch/arm-single-step-kernel-helper.c
+++ b/gdb/testsuite/gdb.arch/arm-single-step-kernel-helper.c
@@ -15,7 +15,8 @@
    You should have received a copy of the GNU General Public License
    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
 
-static int *kernel_user_helper_version = (int *) 0xffff0ffc;
+static int *kernel_user_helper_version_ptr = (int *) 0xffff0ffc;
+static int kernel_user_helper_version;
 
 typedef void * (kernel_user_func_t)(void);
 #define kernel_user_get_tls (*(kernel_user_func_t *) 0xffff0fe0)
@@ -25,6 +26,8 @@ main (void)
 {
   int i;
 
+  kernel_user_helper_version = *kernel_user_helper_version_ptr;
+
   for (i = 0; i < 8; i++)
     kernel_user_get_tls ();
 }
diff --git a/gdb/testsuite/gdb.arch/arm-single-step-kernel-helper.exp b/gdb/testsuite/gdb.arch/arm-single-step-kernel-helper.exp
index 27be5d5..788bc86 100644
--- a/gdb/testsuite/gdb.arch/arm-single-step-kernel-helper.exp
+++ b/gdb/testsuite/gdb.arch/arm-single-step-kernel-helper.exp
@@ -26,10 +26,13 @@ if { ![runto_main] } {
     return -1
 }
 
+# Initialize kernel_user_helper_version.
+gdb_test "next" "for .*"
+
 # Check kernel helpers are supported or not.
 
 set kernel_helper_supported 0
-gdb_test_multiple "p *kernel_user_helper_version" \
+gdb_test_multiple "p kernel_user_helper_version" \
     "check kernel helper version" {
 	-re " = ($decimal)\r\n$gdb_prompt $" {
 	    if { $expect_out(1,string) >= 1 } {
diff --git a/gdb/testsuite/gdb.arch/e500-prologue.exp b/gdb/testsuite/gdb.arch/e500-prologue.exp
index 50837ff..7732393 100644
--- a/gdb/testsuite/gdb.arch/e500-prologue.exp
+++ b/gdb/testsuite/gdb.arch/e500-prologue.exp
@@ -53,7 +53,7 @@ proc insert_breakpoint {function expected_location} {
     # If we managed to get the breakpoing address, then check that
     # we inserted it at the expected location by examining the
     # instruction at that address (we're not interested in the insn
-    # itself, but rather at the address printed at the begining of
+    # itself, but rather at the address printed at the beginning of
     # the instruction).
     if {$address != ""} {
        gdb_test "x /i $address" \
diff --git a/gdb/testsuite/gdb.arch/ftrace-insn-reloc.exp b/gdb/testsuite/gdb.arch/ftrace-insn-reloc.exp
index 9549b59..4ea86b4 100644
--- a/gdb/testsuite/gdb.arch/ftrace-insn-reloc.exp
+++ b/gdb/testsuite/gdb.arch/ftrace-insn-reloc.exp
@@ -33,6 +33,7 @@ if ![gdb_target_supports_trace] {
     return -1
 }
 
+require allow_in_proc_agent
 set libipa [get_in_proc_agent]
 
 # Can't use prepare_for_testing, because that splits compiling into
diff --git a/gdb/testsuite/gdb.arch/i386-disp-step-self-call.exp b/gdb/testsuite/gdb.arch/i386-disp-step-self-call.exp
index b2cb902..5de7ebc 100644
--- a/gdb/testsuite/gdb.arch/i386-disp-step-self-call.exp
+++ b/gdb/testsuite/gdb.arch/i386-disp-step-self-call.exp
@@ -77,6 +77,6 @@ gdb_assert {[expr $sp == $new_sp]} \
     "check stack pointer was updated as expected"
 
 # Check the contents of the stack were updated to the expected value.
-set next_insn_addr 0x[format %08X $next_insn_addr]
+set next_insn_addr 0x[format %08x $next_insn_addr]
 gdb_test "x/1wx 0x[format %x $sp]" "$hex:\\s+$next_insn_addr" \
     "check return address was updated correctly"
diff --git a/gdb/testsuite/gdb.arch/i386-mpx-call.c b/gdb/testsuite/gdb.arch/i386-mpx-call.c
deleted file mode 100644
index 5949202..0000000
--- a/gdb/testsuite/gdb.arch/i386-mpx-call.c
+++ /dev/null
@@ -1,105 +0,0 @@
-/* Test for inferior function calls MPX context.
-
-   Copyright (C) 2017-2024 Free Software Foundation, Inc.
-
-   This program is free software; you can redistribute it and/or modify
-   it under the terms of the GNU General Public License as published by
-   the Free Software Foundation; either version 3 of the License, or
-   (at your option) any later version.
-
-   This program is distributed in the hope that it will be useful,
-   but WITHOUT ANY WARRANTY; without even the implied warranty of
-   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-   GNU General Public License for more details.
-
-   You should have received a copy of the GNU General Public License
-   along with this program.  If not, see <http://www.gnu.org/licenses/>. */
-
-#include <stdlib.h>
-#include <string.h>
-
-/* Defined size for arrays.  */
-#define ARRAY_LENGTH    5
-
-
-int
-upper (int *a, int *b, int *c, int *d, int len)
-{
-  int value;
-
-  value = *(a + len);
-  value = *(b + len);
-  value = *(c + len);
-  value = *(d + len);
-
-  value = value - *a + 1;
-  return value;
-}
-
-
-int
-lower (int *a, int *b, int *c, int *d, int len)
-{
-  int value;
-
-  value = *(a - len);
-  value = *(b - len);
-  value = *(c - len);
-  value = *(d - len);
-
-  value = value - *a + 1;
-  return value;
-}
-
-
-char
-char_upper (char *str, int length)
-{
-  char ch;
-  ch = *(str + length);
-
-  return ch;
-}
-
-
-char
-char_lower (char *str, int length)
-{
-  char ch;
-  ch = *(str - length);
-
-  return ch;
-}
-
-
-int
-main (void)
-{
-  int sa[ARRAY_LENGTH];
-  int sb[ARRAY_LENGTH];
-  int sc[ARRAY_LENGTH];
-  int sd[ARRAY_LENGTH];
-  int *x, *a, *b, *c, *d;
-  char mchar;
-  char hello[] = "Hello";
-
-  x = malloc (sizeof (int) * ARRAY_LENGTH);
-  a = malloc (sizeof (int) * ARRAY_LENGTH);
-  b = malloc (sizeof (int) * ARRAY_LENGTH);
-  c = malloc (sizeof (int) * ARRAY_LENGTH);
-  d = malloc (sizeof (int) * ARRAY_LENGTH);
-
-  *x = upper (sa, sb, sc, sd, 0);  /* bkpt 1.  */
-  *x = lower (a, b, c, d, 0);
-
-  mchar = char_upper (hello, 10);
-  mchar = char_lower (hello, 10);
-
-  free (x);
-  free (a);
-  free (b);
-  free (c);
-  free (d);
-
-  return 0;
-}
diff --git a/gdb/testsuite/gdb.arch/i386-mpx-call.exp b/gdb/testsuite/gdb.arch/i386-mpx-call.exp
deleted file mode 100644
index e225484..0000000
--- a/gdb/testsuite/gdb.arch/i386-mpx-call.exp
+++ /dev/null
@@ -1,398 +0,0 @@
-# Copyright (C) 2017-2024 Free Software Foundation, Inc.
-#
-# This program is free software; you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation; either version 3 of the License, or
-# (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program.  If not, see <http://www.gnu.org/licenses/>.
-
-
-require {is_any_target "i?86-*-*" "x86_64-*-*"}
-
-standard_testfile
-
-require supports_mpx_check_pointer_bounds have_mpx
-
-set comp_flags "-mmpx -fcheck-pointer-bounds -I${srcdir}/../nat"
-
-if {[prepare_for_testing "failed to prepare" ${testfile} ${srcfile} \
-    [list debug additional_flags=${comp_flags}]] } {
-    return -1
-}
-
-if ![runto_main] {
-    return -1
-}
-
-set bounds_table 0
-gdb_test_multiple "disassemble upper" "" {
-    -re -wrap "bndldx.*" {
-	set bounds_table 1
-    }
-    -re -wrap "" {
-    }
-}
-
-# Convenience for returning from an inferior call that causes a BND violation.
-#
-gdb_test_no_output "set confirm off"
-
-# Convenience variable.
-#
-set bound_reg " = \\\{lbound = $hex, ubound = $hex\\\}.*"
-set int_braw_reg " = \\\{lbound = 0x0, ubound_raw = 0x0\\\}.*"
-set bndcfg_reg " = \\\{raw = $hex, config = \\\{base = $hex, reserved = $hex,\
-               preserved = $hex, enabled = $hex\\\}\\\}"
-set bndstatus_reg  " = \\\{raw = $hex, status = \\\{bde = $hex,\
-                    error = $hex\\\}\\\}"
-set u_fault [multi_line "Program received signal SIGSEGV, Segmentation fault" \
-                        "Upper bound violation while accessing address $hex" \
-                        "Bounds: \\\[lower = $hex, upper = $hex\\\]"]
-
-
-# Simplify the tests below.
-#
-proc sanity_check_bndregs {arglist} {
-
-    global int_braw_reg
-
-    foreach a $arglist {
-        gdb_test "p /x $a" "$int_braw_reg"\
-            "$a"
-    }
-}
-
-# Set bnd register to have no access to memory.
-#
-proc remove_memory_access {reg} {
-    global hex
-
-    sanity_check_bndregs {"\$bnd0raw" "\$bnd1raw" "\$bnd2raw" "\$bnd3raw"}
-
-    gdb_test "p /x $reg.lbound = $reg.ubound" "= $hex"\
-        "$reg lower bound set"
-    gdb_test "p /x $reg.ubound = 0" " = 0x0"\
-        "$reg upper bound set"
-}
-
-
-# Prepare convenience variables for bndconfig and status
-# for posterior comparison.
-#
-proc prepare_bndcfg_bndstatus {} {
-
-    global bndcfg_reg
-    global bndstatus_reg
-
-    gdb_test "p /x \$temp_bndcfgu = \$bndcfgu" "$bndcfg_reg"\
-        "bndcfgu should not change"
-
-    gdb_test "p /x \$temp_bndstatus = \$bndstatus" "$bndstatus_reg"\
-        "bndstatus should not change"
-}
-
-# Compare values set for convenience variables and actual values of bndconfig
-# and bndstatus registers.
-#
-proc compare_bndstatus_with_convenience {} {
-
-    gdb_test "p \$temp_bndcfgu == \$bndcfgu" "= 1"\
-        "bndcfgu compare before and after"
-    gdb_test "p \$temp_bndstatus == \$bndstatus" "= 1"\
-        "bndstatus compare before and after"
-}
-
-# Perform an inferior call defined in func.
-#
-proc perform_a_call {func} {
-
-    global inf_call_stopped
-    global gdb_prompt
-
-    gdb_test "p /x $func" [multi_line "The program being debugged\
-                          stopped while in a function called from GDB." \
-                          "Evaluation of the expression containing the\
-                          function.*" \
-                          ] "inferior call stopped"
-}
-
-# Perform an inferior call defined in func.
-#
-proc check_bound_violation {parm parm_type is_positive} {
-
-    global u_fault bounds_table
-
-    set have_bnd_violation 0
-    gdb_test_multiple "continue" "continue to a bnd violation" {
-	-re -wrap "Continuing\." {
-	    if { $bounds_table } {
-		pass $gdb_test_name
-	    } else {
-		fail $gdb_test_name
-	    }
-	}
-	-re -wrap "$u_fault.*" {
-	    pass $gdb_test_name
-	    set have_bnd_violation 1
-	}
-    }
-    if { ! $have_bnd_violation } {
-	return
-    }
-
-    set message "access only one position"
-    if {$is_positive == 1} {
-        gdb_test "p (((void *)\$_siginfo._sifields._sigfault.si_addr\
-                  - (void*)$parm))/sizeof($parm_type) == 1"\
-                  " = 1" $message
-    } else {
-        gdb_test "p ((void*)$parm\
-                  - (void *)\$_siginfo._sifields._sigfault.si_addr)\
-                  /sizeof($parm_type) == 1"\
-                  " = 1" $message
-    }
-    gdb_test "return" "\\\#.*main.*i386-mpx-call\\\.c:.*" "return from the fault"
-}
-
-
-# Start testing!
-#
-
-# Set up for stopping in the middle of main for calling a function in the
-# inferior.
-#
-set break "bkpt 1."
-gdb_breakpoint [gdb_get_line_number "${break}"]
-gdb_continue_to_breakpoint "${break}" ".*${break}.*"
-
-
-# Consistency:
-#    default run execution of call should succeed without violations.
-#
-with_test_prefix "default_run" {
-
-    gdb_test "p \$keep_bnd0_value=\$bnd0" $bound_reg\
-        "store bnd0 register in a convenience variable"
-
-    gdb_test "p /x upper (a, b, c, d, 0)" " = $hex"\
-        "default inferior call"
-
-    gdb_test "p ((\$bnd0.lbound==\$keep_bnd0_value.lbound) &&\
-        (\$bnd0.ubound==\$keep_bnd0_value.ubound))" "= 1" \
-        "bnd register value after and before call"
-}
-
-# Consistency:  Examine bnd registers values before and after the call.
-#
-#
-with_test_prefix "verify_default_values" {
-
-    prepare_bndcfg_bndstatus
-
-    gdb_breakpoint "*upper"
-    perform_a_call "upper (a, b, c, d, 1)"
-
-    sanity_check_bndregs {"\$bnd0raw" "\$bnd1raw" "\$bnd2raw" "\$bnd3raw"}
-
-    compare_bndstatus_with_convenience
-
-    gdb_test_multiple "continue" "inferior call test" {
-        -re ".*Continuing.\r\n$gdb_prompt " {
-            pass "inferior call performed"
-        }
-    }
-}
-
-# Examine:  Cause an upper bound violation changing BND0.
-#
-#
-with_test_prefix "upper_bnd0" {
-
-    prepare_bndcfg_bndstatus
-
-    gdb_breakpoint "*upper"
-    perform_a_call "upper (a, b, c, d, 1)"
-
-    remove_memory_access "\$bnd0"
-
-    compare_bndstatus_with_convenience
-
-    check_bound_violation "a" "int" 1
-}
-
-# Examine:  Cause an upper bound violation changing BND1.
-#
-#
-with_test_prefix "upper_bnd1" {
-
-    prepare_bndcfg_bndstatus
-
-    gdb_breakpoint "*upper"
-    perform_a_call "upper (a, b, c, d, 1)"
-
-    remove_memory_access "\$bnd1"
-
-    compare_bndstatus_with_convenience
-
-    check_bound_violation "b" "int" 1
-}
-
-# Examine:  Cause an upper bound violation changing BND2.
-#
-#
-with_test_prefix "upper_bnd2" {
-
-    prepare_bndcfg_bndstatus
-
-    gdb_breakpoint "*upper"
-    perform_a_call "upper (a, b, c, d, 1)"
-
-    remove_memory_access "\$bnd2"
-
-    compare_bndstatus_with_convenience
-
-    check_bound_violation "c" "int" 1
-}
-
-# Examine:  Cause an upper bound violation changing BND3.
-#
-#
-with_test_prefix "upper_bnd3" {
-    prepare_bndcfg_bndstatus
-
-    gdb_breakpoint "*upper"
-    perform_a_call "upper (a, b, c, d, 1)"
-
-    remove_memory_access "\$bnd3"
-
-    compare_bndstatus_with_convenience
-
-    check_bound_violation "d" "int" 1
-}
-
-# Examine:  Cause a lower bound violation changing BND0.
-#
-#
-with_test_prefix "lower_bnd0" {
-
-    prepare_bndcfg_bndstatus
-
-    gdb_breakpoint "*lower"
-    perform_a_call "lower (a, b, c, d, 1)"
-
-    remove_memory_access "\$bnd0"
-
-    compare_bndstatus_with_convenience
-
-    check_bound_violation "a" "int" 0
-}
-
-# Examine:  Cause a lower bound violation changing BND1.
-#
-#
-with_test_prefix "lower_bnd1" {
-
-    prepare_bndcfg_bndstatus
-
-    gdb_breakpoint "*lower"
-    perform_a_call "lower (a, b, c, d, 1)"
-
-    remove_memory_access "\$bnd1"
-
-    compare_bndstatus_with_convenience
-
-    check_bound_violation "b" "int" 0
-}
-
-# Examine:  Cause a lower bound violation changing BND2.
-#
-#
-with_test_prefix "lower_bnd2" {
-
-    prepare_bndcfg_bndstatus
-
-    gdb_breakpoint "*lower"
-    perform_a_call "lower (a, b, c, d, 1)"
-
-    remove_memory_access "\$bnd2"
-
-    compare_bndstatus_with_convenience
-
-    check_bound_violation "c" "int" 0
-}
-
-# Examine:  Cause a lower bound violation changing BND3.
-#
-#
-with_test_prefix "lower_bnd3" {
-
-    prepare_bndcfg_bndstatus
-
-    gdb_breakpoint "*lower"
-    perform_a_call "lower (a, b, c, d, 1)"
-
-    remove_memory_access "\$bnd3"
-
-    compare_bndstatus_with_convenience
-
-    check_bound_violation "d" "int" 0
-}
-
-# Examine:  String causing a upper bound violation changing BND0.
-#
-#
-with_test_prefix "chars_up" {
-
-    prepare_bndcfg_bndstatus
-
-    gdb_breakpoint "*char_upper"
-    perform_a_call "char_upper (hello, 1)"
-
-    remove_memory_access "\$bnd0"
-
-    compare_bndstatus_with_convenience
-
-    check_bound_violation "str" "char" 1
-}
-
-
-# Examine:  String causing an lower bound violation changing BND0.
-#
-#
-with_test_prefix "chars_low" {
-
-    prepare_bndcfg_bndstatus
-
-    gdb_breakpoint "*char_lower"
-    perform_a_call "char_lower (hello, 1)"
-
-    remove_memory_access "\$bnd0"
-
-    compare_bndstatus_with_convenience
-
-    check_bound_violation "str" "char" 0
-}
-
-# Examine:  String causing an lower bound violation changing BND0.
-#
-#
-with_test_prefix "chars_low_adhoc_parm" {
-
-    prepare_bndcfg_bndstatus
-
-    gdb_breakpoint "*char_lower"
-    perform_a_call "char_lower (\"tryme\", 1)"
-
-    remove_memory_access "\$bnd0"
-
-    compare_bndstatus_with_convenience
-
-    check_bound_violation "str" "char" 0
-}
diff --git a/gdb/testsuite/gdb.arch/i386-mpx-map.c b/gdb/testsuite/gdb.arch/i386-mpx-map.c
deleted file mode 100644
index c072e74..0000000
--- a/gdb/testsuite/gdb.arch/i386-mpx-map.c
+++ /dev/null
@@ -1,61 +0,0 @@
-/* Test program for MPX map allocated bounds.
-
-   Copyright 2015-2024 Free Software Foundation, Inc.
-
-   Contributed by Intel Corp. <walfred.tedeschi@intel.com>
-			      <mircea.gherzan@intel.com>
-
-   This file is part of GDB.
-
-   This program is free software; you can redistribute it and/or modify
-   it under the terms of the GNU General Public License as published by
-   the Free Software Foundation; either version 3 of the License, or
-   (at your option) any later version.
-
-   This program is distributed in the hope that it will be useful,
-   but WITHOUT ANY WARRANTY; without even the implied warranty of
-   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-   GNU General Public License for more details.
-
-   You should have received a copy of the GNU General Public License
-   along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
-
-#include <stdlib.h>
-#define SIZE  5
-
-typedef int T;
-
-void
-foo (T *p)
-{
-  T *x;
-
-#if defined  __GNUC__ && !defined __INTEL_COMPILER
-  __bnd_store_ptr_bounds (p, &p);
-#endif
-
-  x = p + SIZE - 1;
-
-#if defined  __GNUC__ && !defined __INTEL_COMPILER
-  __bnd_store_ptr_bounds (x, &x);
-#endif
-  /* Dummy assign.  */
-  x = x + 1;			/* after-assign */
-  return;
-}
-
-int
-main (void)
-{
-  T *a = NULL;
-
-  a = calloc (SIZE, sizeof (T));	/* after-decl */
-#if defined  __GNUC__ && !defined __INTEL_COMPILER
-  __bnd_store_ptr_bounds (a, &a);
-#endif
-
-  foo (a);				/* after-alloc */
-  free (a);
-
-  return 0;
-}
diff --git a/gdb/testsuite/gdb.arch/i386-mpx-map.exp b/gdb/testsuite/gdb.arch/i386-mpx-map.exp
deleted file mode 100644
index d955187..0000000
--- a/gdb/testsuite/gdb.arch/i386-mpx-map.exp
+++ /dev/null
@@ -1,56 +0,0 @@
-# Copyright 2015-2024 Free Software Foundation, Inc.
-#
-# Contributed by Intel Corp. <walfred.tedeschi@intel.com>,
-#                            <mircea.gherzan@intel.com>
-#
-# This program is free software; you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation; either version 3 of the License, or
-# (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program.  If not, see <http://www.gnu.org/licenses/>.
-
-require {is_any_target i?86-*-* x86_64-*-*}
-
-standard_testfile
-
-require supports_mpx_check_pointer_bounds have_mpx
-
-set comp_flags "-mmpx -fcheck-pointer-bounds -I${srcdir}/../nat/"
-
-if { [prepare_for_testing "failed to prepare" ${testfile} ${srcfile} \
- [list debug nowarnings additional_flags=${comp_flags}]] } {
-    return -1
-}
-
-if ![runto_main] {
-	return -1
-}
-
-gdb_breakpoint [ gdb_get_line_number "after-decl" ]
-gdb_breakpoint [ gdb_get_line_number "after-alloc" ]
-gdb_breakpoint [ gdb_get_line_number "after-assign" ]
-
-gdb_test "show mpx bound 0x0" "Invalid bounds directory entry at $hex." "NULL address of the pointer"
-
-gdb_continue_to_breakpoint "after-decl" ".*after-decl.*"
-gdb_test "show mpx bound a" "Invalid bounds directory entry at $hex." "pointer instead of pointer address"
-
-gdb_continue_to_breakpoint "after-alloc" ".*after-alloc.*"
-gdb_test "show mpx bound a" "\\\{lbound = $hex, ubound = $hex\\\}: pointer value = $hex, size = \[8, 4\], metadata = 0x0+" "pointer after allocation"
-
-gdb_continue_to_breakpoint "after-assign" ".*after-assign.*"
-gdb_test "show mpx bound x" "\\\{lbound = $hex, ubound = $hex\\\}: pointer value = $hex, size = \[8, 4\], metadata = 0x0+" "pointer after assignment"
-gdb_test "set mpx bound 0x0, 0x1, 0x2" "Invalid bounds directory entry at $hex." "set mpx bound: NULL address of the pointer"
-gdb_test_no_output "set mpx bound x, 0xcafebabe, 0xdeadbeef" "set mpx bound: set bounds for a valid pointer address"
-gdb_test "show mpx bound x" "\\\{lbound = .*cafebabe, ubound = .*deadbeef\\\}: pointer value = $hex, size = $decimal, metadata = 0x0+" "set mpx bound: bounds map entry after set mpx bound"
-
-
-gdb_test "set mpx bound 0x0, 0x1 0x2" "A syntax error in expression.*" "set mpx bound: Controlling syntax error, missing comma "
-gdb_test "set mpx bound 0x0, 0x1" "Wrong number of arguments.*" "set mpx bound: Controlling syntax error, missing argument "
diff --git a/gdb/testsuite/gdb.arch/i386-mpx-sigsegv.c b/gdb/testsuite/gdb.arch/i386-mpx-sigsegv.c
deleted file mode 100644
index 54722e3..0000000
--- a/gdb/testsuite/gdb.arch/i386-mpx-sigsegv.c
+++ /dev/null
@@ -1,92 +0,0 @@
-/* Copyright (C) 2015-2024 Free Software Foundation, Inc.
-
-   Contributed by Intel Corp. <walfred.tedeschi@intel.com>
-
-   This program is free software; you can redistribute it and/or modify
-   it under the terms of the GNU General Public License as published by
-   the Free Software Foundation; either version 3 of the License, or
-   (at your option) any later version.
-
-   This program is distributed in the hope that it will be useful,
-   but WITHOUT ANY WARRANTY; without even the implied warranty of
-   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-   GNU General Public License for more details.
-
-   You should have received a copy of the GNU General Public License
-   along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
-
-#define OUR_SIZE    5
-
-int gx[OUR_SIZE];
-int ga[OUR_SIZE];
-int gb[OUR_SIZE];
-int gc[OUR_SIZE];
-int gd[OUR_SIZE];
-
-int
-bp1 (int value)
-{
-  return 1;
-}
-
-int
-bp2 (int value)
-{
-  return 1;
-}
-
-void
-upper (int * p, int * a, int * b, int * c, int * d, int len)
-{
-  int value;
-  value = *(p + len);
-  value = *(a + len);
-  value = *(b + len);
-  value = *(c + len);
-  value = *(d + len);
-}
-
-void
-lower (int * p, int * a, int * b, int * c, int * d, int len)
-{
-  int value;
-  value = *(p - len);
-  value = *(a - len);
-  value = *(b - len);
-  value = *(c - len);
-  bp2 (value);
-  value = *(d - len);
-}
-
-int
-main (void)
-{
-  int sx[OUR_SIZE];
-  int sa[OUR_SIZE];
-  int sb[OUR_SIZE];
-  int sc[OUR_SIZE];
-  int sd[OUR_SIZE];
-  int *x, *a, *b, *c, *d;
-
-  x = calloc (OUR_SIZE, sizeof (int));
-  a = calloc (OUR_SIZE, sizeof (int));
-  b = calloc (OUR_SIZE, sizeof (int));
-  c = calloc (OUR_SIZE, sizeof (int));
-  d = calloc (OUR_SIZE, sizeof (int));
-
-  upper (x, a, b, c, d, OUR_SIZE + 2);
-  upper (sx, sa, sb, sc, sd, OUR_SIZE + 2);
-  upper (gx, ga, gb, gc, gd, OUR_SIZE + 2);
-  lower (x, a, b, c, d, 1);
-  lower (sx, sa, sb, sc, sd, 1);
-  bp1 (*x);
-  lower (gx, ga, gb, gc, gd, 1);
-
-  free (x);
-  free (a);
-  free (b);
-  free (c);
-  free (d);
-
-  return 0;
-}
diff --git a/gdb/testsuite/gdb.arch/i386-mpx-sigsegv.exp b/gdb/testsuite/gdb.arch/i386-mpx-sigsegv.exp
deleted file mode 100644
index 75f7e65..0000000
--- a/gdb/testsuite/gdb.arch/i386-mpx-sigsegv.exp
+++ /dev/null
@@ -1,64 +0,0 @@
-# Copyright (C) 2015-2024 Free Software Foundation, Inc.
-#
-# Contributed by Intel Corp. <walfred.tedeschi@intel.com>
-#
-# This program is free software; you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation; either version 3 of the License, or
-# (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program.  If not, see <http://www.gnu.org/licenses/>.
-
-
-require {is_any_target "i?86-*-*" "x86_64-*-*"}
-
-standard_testfile
-
-require supports_mpx_check_pointer_bounds have_mpx
-
-set comp_flags "-mmpx -fcheck-pointer-bounds -I${srcdir}/../nat/"
-
-if { [prepare_for_testing "failed to prepare" ${testfile} ${srcfile} \
- [list debug nowarnings additional_flags=${comp_flags}]] } {
-    return -1
-}
-
-if ![runto_main] {
-    return -1
-}
-
-set u_fault [multi_line "Program received signal SIGSEGV, Segmentation fault" \
-                        "Upper bound violation while accessing address $hex" \
-                        "Bounds: \\\[lower = $hex, upper = $hex\\\]"]
-
-set l_fault [multi_line "Program received signal SIGSEGV, Segmentation fault" \
-                        "Lower bound violation while accessing address $hex" \
-                        "Bounds: \\\[lower = $hex, upper = $hex\\\]"]
-
-for {set i 0} {$i < 15} {incr i} {
-    set message "MPX signal segv Upper: ${i}"
-
-    if {[gdb_test "continue" "$u_fault.*" $message] != 0} {
-       break
-    }
-
-    gdb_test "where" ".*#0  $hex in upper.*"\
-             "$message: should be in upper"
-}
-
-for {set i 0} {$i < 15} {incr i} {
-    set message "MPX signal segv Lower: ${i}"
-
-    if {[gdb_test "continue" "$l_fault.*" $message] != 0} {
-       break
-    }
-
-    gdb_test "where" ".*#0  $hex in lower.*"\
-             "$message: should be in lower"
-}
diff --git a/gdb/testsuite/gdb.arch/i386-mpx-simple_segv.exp b/gdb/testsuite/gdb.arch/i386-mpx-simple_segv.exp
deleted file mode 100644
index 8a6c9dd..0000000
--- a/gdb/testsuite/gdb.arch/i386-mpx-simple_segv.exp
+++ /dev/null
@@ -1,124 +0,0 @@
-# Copyright (C) 2015-2024 Free Software Foundation, Inc.
-#
-# Contributed by Intel Corp.  <walfred.tedeschi@intel.com>
-#
-# This program is free software; you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation; either version 3 of the License, or
-# (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program.  If not, see <http://www.gnu.org/licenses/>.
-
-# Testing handle setup together with boundary violation signals.
-#
-# Some states are not allowed as reported on the manual, as noprint
-# implies nostop, but nostop might print.
-#
-# Caveat: Setting the handle to nopass, ends up in a endless loop.
-
-require {is_any_target i?86-*-* x86_64-*-*}
-
-standard_testfile
-
-require supports_mpx_check_pointer_bounds have_mpx
-
-set comp_flags "-mmpx -fcheck-pointer-bounds -I${srcdir}/../nat/"
-
-if { [prepare_for_testing "failed to prepare" ${testfile} ${srcfile} \
- [list debug nowarnings additional_flags=${comp_flags}]] } {
-    return -1
-}
-
-if ![runto_main] {
-    return -1
-}
-
-set violation [multi_line "Program received signal SIGSEGV, Segmentation fault" \
-                          "Upper bound violation while accessing address $hex" \
-                          "Bounds: \\\[lower = $hex, upper = $hex\\\]"]
-
-set segv_with_exit "Program received signal SIGSEGV,\
-        Segmentation fault.*$inferior_exited_re.*"
-
-
-# Test handler for segmentation fault for:
-# print pass stop
-#
-set parameters "print pass stop"
-with_test_prefix "$parameters" {
-    if ![runto_main] {
-        return -1
-    }
-
-    gdb_test "handle SIGSEGV $parameters"\
-             ".*SIGSEGV.*Yes.*Yes.*Yes.*Segmentation fault.*"\
-             "set parameters"
-
-    gdb_test "continue" ".*$violation.*" "display"
-
-    gdb_test "where" ".*#0  $hex in upper.*"\
-             "should be in upper"
-}
-
-# Test handler for segmentation fault for:
-# print pass nostop
-#
-set parameters "print pass nostop"
-with_test_prefix "$parameters" {
-    if ![runto_main] {
-        return -1
-    }
-
-    gdb_test "handle SIGSEGV $parameters"\
-             ".*SIGSEGV.*No.*Yes.*Yes.*Segmentation fault.*"\
-             "set parameters"
-
-    gdb_test "continue" ".*$segv_with_exit.*" "display"
-
-    gdb_test "where" "No stack." "no inferior"
-}
-
-# Test handler for segmentation fault for:
-# print nopass stop
-#
-set parameters "print nopass stop"
-with_test_prefix "$parameters" {
-    if ![runto_main] {
-        return -1
-    }
-
-    gdb_test "handle SIGSEGV $parameters"\
-             ".*SIGSEGV.*Yes.*Yes.*No.*Segmentation fault.*"\
-             "set parameters"
-
-    gdb_test "continue" ".*$violation.*" "display"
-
-    gdb_test "where" ".*#0  $hex in upper.*"\
-             "should be in upper"
-}
-
-# Test handler for segmentation fault for:
-# print nopass stop
-#
-set parameters "noprint pass nostop"
-with_test_prefix "$parameters" {
-    if ![runto_main] {
-        return -1
-    }
-
-    gdb_test "handle SIGSEGV $parameters"\
-             ".*SIGSEGV.*No.*No.*Yes.*Segmentation fault.*"\
-             "set parameters"
-
-    gdb_test "continue" "Continuing\..*$inferior_exited_re.*"\
-             "Display"
-
-    gdb_test "where" "No stack." "no inferior"
-}
-
diff --git a/gdb/testsuite/gdb.arch/i386-mpx.c b/gdb/testsuite/gdb.arch/i386-mpx.c
deleted file mode 100644
index 99f6744..0000000
--- a/gdb/testsuite/gdb.arch/i386-mpx.c
+++ /dev/null
@@ -1,59 +0,0 @@
-/* Test program for MPX registers.
-
-   Copyright 2013-2024 Free Software Foundation, Inc.
-
-   This file is part of GDB.
-
-   This program is free software; you can redistribute it and/or modify
-   it under the terms of the GNU General Public License as published by
-   the Free Software Foundation; either version 3 of the License, or
-   (at your option) any later version.
-
-   This program is distributed in the hope that it will be useful,
-   but WITHOUT ANY WARRANTY; without even the implied warranty of
-   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-   GNU General Public License for more details.
-
-   You should have received a copy of the GNU General Public License
-   along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
-
-int
-main (void)
-{
-#ifdef __x86_64__
-  asm ("mov $10, %rax\n\t"
-       "mov $9, %rdx\n\t"
-       "bndmk (%rax,%rdx), %bnd0\n\t"
-       "mov $20, %rax\n\t"
-       "mov $9, %rdx\n\t"
-       "bndmk (%rax,%rdx), %bnd1\n\t"
-       "mov $30, %rax\n\t"
-       "mov $9, %rdx\n\t"
-       "bndmk (%rax,%rdx), %bnd2\n\t"
-       "mov $40, %rax\n\t"
-       "mov $9, %rdx\n\t"
-       "bndmk (%rax,%rdx), %bnd3\n\t"
-       "bndstx %bnd3, (%rax) \n\t"
-       "nop\n\t"
-       );
-#else
-  asm ("mov $10, %eax\n\t"
-       "mov $9, %edx\n\t"
-       "bndmk (%eax,%edx), %bnd0\n\t"
-       "mov $20, %eax\n\t"
-       "mov $9, %edx\n\t"
-       "bndmk (%eax,%edx), %bnd1\n\t"
-       "mov $30, %eax\n\t"
-       "mov $9, %edx\n\t"
-       "bndmk (%eax,%edx), %bnd2\n\t"
-       "mov $40, %eax\n\t"
-       "mov $9, %edx\n\t"
-       "bndmk (%eax,%edx), %bnd3\n\t"
-       "bndstx  %bnd3, (%eax)\n\t"
-       "nop\n\t"
-       );
-#endif
-  asm ("nop\n\t");	/* break here.  */
-
-  return 0;
-}
diff --git a/gdb/testsuite/gdb.arch/i386-mpx.exp b/gdb/testsuite/gdb.arch/i386-mpx.exp
deleted file mode 100644
index 9d71feb..0000000
--- a/gdb/testsuite/gdb.arch/i386-mpx.exp
+++ /dev/null
@@ -1,123 +0,0 @@
-# Copyright 2013-2024 Free Software Foundation, Inc.
-#
-# Contributed by Intel Corp. <walfred.tedeschi@intel.com>
-#
-# This program is free software; you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation; either version 3 of the License, or
-# (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program.  If not, see <http://www.gnu.org/licenses/>.
-
-require {is_any_target i?86-*-* x86_64-*-*}
-
-standard_testfile
-
-require {is_any_target i?86-*-* x86_64-*-*}
-
-require supports_mpx_check_pointer_bounds have_mpx
-
-set comp_flags "-mmpx -fcheck-pointer-bounds -I${srcdir}/../nat/"
-
-if { [prepare_for_testing "failed to prepare" ${testfile} ${srcfile} \
-     [list debug nowarnings additional_flags=${comp_flags}]] } {
-    return -1
-}
-
-if ![runto_main] {
-    return -1
-}
-
-# Test bndcfg register and bndstatus at startup
-set test_string "\\\{raw = 0x\[0-9a-f\]+, config = \\\{base = \[0-9\]+,\
-reserved = \[0-9\]+, preserved = \[0-9\]+, enabled = \[0-9\]+\\\}\\\}"
-
-gdb_test "print \$bndcfgu" $test_string "bndcfgu formating"
-gdb_test "print \$bndcfgu.config.enabled" "= 1" "test if bndstatus is enabled"
-gdb_test "print \$bndstatus" "\\\{raw = 0x0, status = \\\{bde = 0, error = 0\\\}\\\}" \
-		"bndstatus formating"
-gdb_test "print \$bndstatus.raw" "= \\\(void \\\*\\\) 0x0" "bndstatus is zero by startup"
-
-# Read values from pseudo registers.
-gdb_breakpoint [ gdb_get_line_number "break here" ]
-gdb_continue_to_breakpoint "break here" ".*break here.*"
-
-set test_string ".*\\\{lbound = 0xa, ubound = 0x13\\\}.*"
-gdb_test "info register bnd0" ".*bnd0$test_string" "pure bnd0 register"
-
-set test_string ".*\\\{lbound = 0x14, ubound = 0x1d\\\}.*"
-gdb_test "info register bnd1" ".*bnd1$test_string" "pure bnd1 register"
-
-set test_string ".*\\\{lbound = 0x1e, ubound = 0x27\\\}.*"
-gdb_test "info register bnd2" ".*bnd2$test_string" "pure bnd2 register"
-
-set test_string ".*\\\{lbound = 0x28, ubound = 0x31\\\}.*"
-gdb_test "info register bnd3" ".*bnd3$test_string" "pure bnd3 register"
-
-# Read value from registers bndrs.
-
-set test_string ".*\\\{lbound = 0xa, ubound_raw = 0x\[f\]+ec\\\}.*"
-gdb_test "info register bnd0raw" ".*bnd0$test_string" "pure bnd0r register"
-
-set test_string ".*\\\{lbound = 0x14, ubound_raw = 0x\[f\]+e2\\\}.*"
-gdb_test "info register bnd1raw" ".*bnd1$test_string" "pure bnd1r register"
-
-set test_string ".*\\\{lbound = 0x1e, ubound_raw = 0x\[f\]+d8\\\}.*"
-gdb_test "info register bnd2raw" ".*bnd2$test_string" "pure bnd2r register"
-
-set test_string ".*\\\{lbound = 0x28, ubound_raw = 0x\[f\]+ce\\\}.*"
-gdb_test "info register bnd3raw" ".*bnd3$test_string" "pure bnd3r register"
-
-# Setting fields on bnds
-set test_string ".*\\\{lbound = 0xa, ubound = 0x400\\\}.*"
-gdb_test "print \$bnd0.ubound = 0x400" "= \\\(void \\\*\\\) 0x400" "set value for bnd0.ubound"
-gdb_test "print  \$bnd0" "$test_string" "after setting bnd0.ubound"
-set test_string ".*\\\{lbound = 0xa, ubound_raw = 0x\[f\]+bff\\\}.*"
-gdb_test "print /x \$bnd0raw" "$test_string" "bnd0raw after set bnd0.ubound"
-
-set test_string ".*\\\{lbound = 0x1, ubound = 0x400\\\}.*"
-gdb_test "print \$bnd0.lbound = 0x1" "= \\\(void \\\*\\\) 0x1" "set value for bnd0.lbound"
-gdb_test "print  \$bnd0" "$test_string" "after setting bnd0.lbound"
-set test_string ".*\\\{lbound = 0x1, ubound_raw = 0x\[f\]+bff\\\}.*"
-gdb_test "print /x \$bnd0raw" "$test_string" "bnd0raw after set bnd0.lbound"
-
-# Setting fields on bnd0raw.
-set test_string ".*\\\{lbound = 0x1, ubound_raw = 0x600\\\}.*"
-gdb_test "print /x \$bnd0raw.ubound_raw = 0x600" "= 0x600" "set value for bnd0raw.ubound"
-gdb_test "print /x \$bnd0raw" "$test_string" "bnd0raw after setting bnd0raw.ubound"
-set test_string ".*\\\{lbound = 0x1, ubound = 0x\[f\]+9ff\\\}.*"
-gdb_test "print /x \$bnd0" "$test_string" "bnd0 after set bnd0raw.ubound"
-
-set test_string ".*\\\{lbound = 0x100, ubound_raw = 0x600\\\}.*"
-gdb_test "print /x \$bnd0raw.lbound = 0x100" "= 0x100" "set value for bnd0raw.lbound"
-gdb_test "print /x \$bnd0raw" "$test_string" "bnd0raw after setting bnd0raw.lbound"
-set test_string ".*\\\{lbound = 0x100, ubound = 0x\[f\]+9ff\\\}.*"
-gdb_test "print /x \$bnd0" "$test_string" "bnd0 after set bnd0raw.lbound"
-
-# Set full value bnd raw
-set test_string ".*\\\{lbound = 0x10, ubound_raw = 0x\[f\]+cff\\\}.*"
-gdb_test "print /x \$bnd0raw = {0x10, ~0x300}" "$test_string" "set full value for bnd0raw"
-set test_string ".*\\\{lbound = 0x10, ubound = 0x300\\\}.*"
-gdb_test "print /x \$bnd0" "$test_string" "bnd0raw after setting full bnd0raw"
-
-# Set full value bnd
-set test_string ".*\\\{lbound = 0x10, ubound = 0x300\\\}.*"
-gdb_test "print /x \$bnd0 = {0x10, 0x300}" "$test_string" "set full value for bnd0"
-set test_string ".*\\\{lbound = 0x10, ubound_raw = 0x\[f\]+cff\\\}.*"
-gdb_test "print /x \$bnd0raw" "$test_string" "bnd0raw after setting full bnd0"
-
-# Test bndcfg register and bndstatus after a failure on bndstr
-gdb_test "print \$bndstatus.status.error" "= 2" "bndstatus error is 2\
-after a failure on allocating an entry"
-
-# Going to test the python extension for lenght.
-if { ![allow_python_tests] } { continue }
-# Verify if size is right
-set test_string ".*\\\: size 0x11.*"
-gdb_test "print /x \$bnd0 = {0x10, 0x20}" "$test_string" "verify size for bnd0"
diff --git a/gdb/testsuite/gdb.arch/powerpc-aix-prologue.exp b/gdb/testsuite/gdb.arch/powerpc-aix-prologue.exp
index 24c3129..ed595d4 100644
--- a/gdb/testsuite/gdb.arch/powerpc-aix-prologue.exp
+++ b/gdb/testsuite/gdb.arch/powerpc-aix-prologue.exp
@@ -54,7 +54,7 @@ proc insert_breakpoint {function expected_location} {
     # If we managed to get the breakpoing address, then check that
     # we inserted it at the expected location by examining the
     # instruction at that address (we're not interested in the insn
-    # itself, but rather at the address printed at the begining of
+    # itself, but rather at the address printed at the beginning of
     # the instruction).
     if {$address != ""} {
        gdb_test "x /i $address" \
diff --git a/gdb/testsuite/gdb.arch/ppc64-break-on-_exit.exp b/gdb/testsuite/gdb.arch/ppc64-break-on-_exit.exp
index d60f63e..f91bebe 100644
--- a/gdb/testsuite/gdb.arch/ppc64-break-on-_exit.exp
+++ b/gdb/testsuite/gdb.arch/ppc64-break-on-_exit.exp
@@ -18,7 +18,7 @@
 # if the breakpoint is set past the syscall due to faulty prologue skipping,
 # the breakpoint will not trigger.
 #
-# In particular, we're trying to excercise the instruction analysis
+# In particular, we're trying to exercise the instruction analysis
 # functionality of prologue skipping.  If non-minimal symbols are
 # read, then that functionality might not be used because f.i.
 # line-info is used instead.  So, we use nodebug.
diff --git a/gdb/testsuite/gdb.arch/riscv-tdesc-loading.exp b/gdb/testsuite/gdb.arch/riscv-tdesc-loading.exp
index 0e009b4..1cf9848 100644
--- a/gdb/testsuite/gdb.arch/riscv-tdesc-loading.exp
+++ b/gdb/testsuite/gdb.arch/riscv-tdesc-loading.exp
@@ -29,7 +29,7 @@ foreach filename [lsort [glob $srcdir/$subdir/riscv-tdesc-loading-*.xml]] {
     }
 
     # Currently it is expected that all of the target descriptions in
-    # this test will load successfully, so we expect no additonal
+    # this test will load successfully, so we expect no additional
     # output from GDB.
     gdb_test_no_output "set tdesc filename $test_path" \
 	"check [file tail $filename]"
diff --git a/gdb/testsuite/gdb.arch/riscv-tdesc-regs.exp b/gdb/testsuite/gdb.arch/riscv-tdesc-regs.exp
index bd4ba38..58859d1 100644
--- a/gdb/testsuite/gdb.arch/riscv-tdesc-regs.exp
+++ b/gdb/testsuite/gdb.arch/riscv-tdesc-regs.exp
@@ -156,17 +156,5 @@ gdb_test_no_output "set tdesc filename $remote_file" \
     "load the target description that lacks fflags and frm"
 
 foreach reg {fflags frm} {
-    gdb_test_multiple "info registers $reg" "" {
-	-re "^info registers $reg\r\n" {
-	    exp_continue
-	}
-
-	-wrap -re "^Invalid register `$reg`" {
-	    fail $gdb_test_name
-	}
-
-	-wrap -re "^$reg\\s+\[^\r\n\]+" {
-	    pass $gdb_test_name
-	}
-    }
+    gdb_test "info registers $reg" "^$reg\\s+\[^\r\n\]+"
 }
diff --git a/gdb/testsuite/gdb.arch/skip-prologue.c b/gdb/testsuite/gdb.arch/skip-prologue.c
new file mode 100644
index 0000000..08ceacb
--- /dev/null
+++ b/gdb/testsuite/gdb.arch/skip-prologue.c
@@ -0,0 +1,54 @@
+/* Copyright 2024 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
+
+void
+f1 (void)
+{
+  asm ("f1_prologue_end: .globl f1_prologue_end");
+}
+
+int
+f2 (int a)
+{
+  asm ("f2_prologue_end: .globl f2_prologue_end");
+  return a;
+}
+
+void
+f3 (void)
+{
+  asm ("f3_prologue_end: .globl f3_prologue_end");
+  f1 ();
+}
+
+int
+f4 (int a)
+{
+  asm ("f4_prologue_end: .globl f4_prologue_end");
+  return f2 (a);
+}
+
+int
+main (void)
+{
+  f1 ();
+  f2 (0);
+  f3 ();
+  f4 (0);
+
+  return 0;
+}
diff --git a/gdb/testsuite/gdb.arch/skip-prologue.exp b/gdb/testsuite/gdb.arch/skip-prologue.exp
new file mode 100644
index 0000000..89d2225
--- /dev/null
+++ b/gdb/testsuite/gdb.arch/skip-prologue.exp
@@ -0,0 +1,76 @@
+# Copyright 2024 Free Software Foundation, Inc.
+
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
+# Test-case that checks architecture-specific prologue analyzers.
+
+standard_testfile
+
+if { [prepare_for_testing "failed to prepare"  $testfile $srcfile \
+	  {nodebug}] } {
+    return -1
+}
+
+proc do_test { f } {
+    set bp_addr ""
+    gdb_test_multiple "break $f" "" {
+	-re -wrap "Breakpoint $::decimal at ($::hex)" {
+	    set bp_addr $expect_out(1,string)
+	    pass $gdb_test_name
+	}
+    }
+
+    if { $bp_addr == "" } {
+	return
+    }
+
+    set prologue_end_addr ""
+    gdb_test_multiple "p /x &${f}_prologue_end" "" {
+	-re -wrap " = ($::hex)" {
+	    set prologue_end_addr $expect_out(1,string)
+	    pass $gdb_test_name
+	}
+    }
+
+    if { $prologue_end_addr == "" } {
+	return
+    }
+
+    set test {$bp_addr == $prologue_end_addr}
+    if { [expr $test] } {
+	pass $test
+    } elseif { $bp_addr < $prologue_end_addr } {
+	# We'll allow this.  For instance, amd64 has a prologue
+	# analyzer that doesn't skip the 3rd instruction here, which saves an
+	# argument register to stack:
+	#
+	#   00000000004004ae <f2>:
+	#   4004ae:       55                      push   %rbp
+	#   4004af:       48 89 e5                mov    %rsp,%rbp
+	#   4004b2:       89 7d fc                mov    %edi,-0x4(%rbp)
+	#   00000000004004b5 <f2_prologue_end>:
+	#
+	pass "$test (skipped less than possible)"
+    } elseif { $bp_addr > $prologue_end_addr } {
+	fail "$test (skipped too much)"
+    } else {
+	fail "$test"
+    }
+}
+
+foreach f { f1 f2 f3 f4 } {
+    with_test_prefix $f {
+	do_test $f
+    }
+}
diff --git a/gdb/testsuite/gdb.arch/sparc64-adi.c b/gdb/testsuite/gdb.arch/sparc64-adi.c
index aee5aca..97f6a99 100644
--- a/gdb/testsuite/gdb.arch/sparc64-adi.c
+++ b/gdb/testsuite/gdb.arch/sparc64-adi.c
@@ -31,7 +31,6 @@
 #include <string.h>
 #include <signal.h>
 #include <sys/shm.h>
-#include <errno.h>
 #include <sys/mman.h>
 #include <sys/stat.h>
 #include <fcntl.h>
diff --git a/gdb/testsuite/gdb.base/attach-deleted-exec.exp b/gdb/testsuite/gdb.base/attach-deleted-exec.exp
index 3e31c36..1196115 100644
--- a/gdb/testsuite/gdb.base/attach-deleted-exec.exp
+++ b/gdb/testsuite/gdb.base/attach-deleted-exec.exp
@@ -45,9 +45,27 @@ clean_restart
 
 # Attach.  GDB should spot that the executable is gone and fallback to
 # use /proc/PID/exe.
-gdb_test "attach $testpid" \
-    "Attaching to process $decimal\r\nReading symbols from /proc/${testpid}/exe\\.\\.\\..*" \
-    "attach to process with deleted executable"
+set test "attach to process with deleted executable"
+set re \
+    [multi_line \
+	 "Attaching to process $decimal" \
+	 "Reading symbols from (\[^\r\n\]+)[string_to_regexp ...]" \
+	 ".*"]
+set filename ""
+gdb_test_multiple "attach $testpid" $test {
+    -re -wrap $re {
+	set filename $expect_out(1,string)
+	pass $gdb_test_name
+    }
+}
+
+set test "filename /proc/PID/exe"
+set re_nfs \[^\r\n\]+[string_to_regexp /.nfs]\[^\r\n\]+
+if { [regexp $re_nfs $filename] } {
+    unsupported $test
+} else {
+    gdb_assert { [string equal $filename /proc/${testpid}/exe] } $test
+}
 
 # Cleanup.
 kill_wait_spawned_process $test_spawn_id
diff --git a/gdb/testsuite/gdb.base/batch-exit-status.exp b/gdb/testsuite/gdb.base/batch-exit-status.exp
index 3721fd5..5151464 100644
--- a/gdb/testsuite/gdb.base/batch-exit-status.exp
+++ b/gdb/testsuite/gdb.base/batch-exit-status.exp
@@ -92,5 +92,5 @@ test_exit_status 1 "-batch -x $good_commands -ex \"set not-a-thing 4\"" \
 set test "No such file or directory"
 set no_such_re ": $test\\."
 test_exit_status 1 "-batch \"\"" "1x: $test" ^[multi_line $no_such_re ""]$
-test_exit_status 1 "-batch \"\" \"\"" "2x: $test" \
-    ^[multi_line $no_such_re $no_such_re ""]$
+test_exit_status 1 "-batch \"\" \"\"" "$test and No core file specified" \
+    ^[multi_line $no_such_re "No core file specified\\." ""]$
diff --git a/gdb/testsuite/gdb.base/bp-cond-failure.c b/gdb/testsuite/gdb.base/bp-cond-failure.c
index ffab098..b742139 100644
--- a/gdb/testsuite/gdb.base/bp-cond-failure.c
+++ b/gdb/testsuite/gdb.base/bp-cond-failure.c
@@ -15,8 +15,14 @@
    You should have received a copy of the GNU General Public License
    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
 
-static inline int __attribute__((__always_inline__))
-foo ()
+static int
+foo (int x)
+{
+  return 0;
+}
+
+static int
+foo (char c)
 {
   return 0;	/* Multi-location breakpoint here.  */
 }
@@ -24,7 +30,7 @@ foo ()
 static int __attribute__((noinline))
 bar ()
 {
-  int res = foo ();	/* Single-location breakpoint here.  */
+  int res = foo ('1');	/* Single-location breakpoint here.  */
 
   return res;
 }
@@ -34,7 +40,7 @@ main ()
 {
   int res = bar ();
 
-  res = foo ();
+  res = foo (1);
 
   return res;
 }
diff --git a/gdb/testsuite/gdb.base/bp-cond-failure.exp b/gdb/testsuite/gdb.base/bp-cond-failure.exp
index a82cedd..b4c046c 100644
--- a/gdb/testsuite/gdb.base/bp-cond-failure.exp
+++ b/gdb/testsuite/gdb.base/bp-cond-failure.exp
@@ -27,7 +27,7 @@
 standard_testfile
 
 if { [prepare_for_testing "failed to prepare" ${binfile} "${srcfile}" \
-	  {debug}] == -1 } {
+	  {debug c++}] == -1 } {
     return
 }
 
@@ -44,7 +44,7 @@ if { [is_address_zero_readable] } {
     return
 }
 
-proc run_test { cond_eval access_type lineno nloc } {
+proc run_test { cond_eval access_type bpexpr nloc } {
     clean_restart ${::binfile}
 
     if { ![runto_main] } {
@@ -56,23 +56,37 @@ proc run_test { cond_eval access_type lineno nloc } {
     }
 
     # Setup the conditional breakpoint and record its number.
-    gdb_breakpoint "${::srcfile}:${lineno} if (*(${access_type} *) 0) == 0"
+    gdb_breakpoint "${bpexpr} if (*(${access_type} *) 0) == 0"
+
+    # This test aims to test that GDB displays the correct breakpoint number
+    # and location when there is an error testing a breakpoint condition,
+    # so it is important to hardcode the breakpoint number into the regex,
+    # along with the location, if applicable.
     set bp_num [get_integer_valueof "\$bpnum" "*UNKNOWN*"]
 
     if { $nloc > 1 } {
-	set bp_num_pattern "${bp_num}.1"
+	# We hardcode location 2 because, for some reason, Clang will always
+	# order the debug information so we hit the second location.  For
+	# simplicity the .c is ordered in such a way that GCC will also order
+	# the debug info to have us land on location 2.
+	gdb_test "continue" \
+	    [multi_line \
+		 "Continuing\\." \
+		 "Error in testing condition for breakpoint ${bp_num}.2:" \
+		 "Cannot access memory at address 0x0" \
+		 "" \
+		 "Breakpoint ${bp_num}.2, foo \\(c=49 ...\\) at \[^\r\n\]+:\[0-9\]+" \
+		 "${::decimal}\\s+\[^\r\n\]+ breakpoint here\\. \[^\r\n\]+"]
     } else {
-	set bp_num_pattern "${bp_num}"
+	gdb_test "continue" \
+	    [multi_line \
+		 "Continuing\\." \
+		 "Error in testing condition for breakpoint ${bp_num}:" \
+		 "Cannot access memory at address 0x0" \
+		 "" \
+		 "Breakpoint ${bp_num}, bar \\(\\) at \[^\r\n\]+:\[0-9\]+" \
+		 "${::decimal}\\s+\[^\r\n\]+ breakpoint here\\. \[^\r\n\]+"]
     }
-
-    gdb_test "continue" \
-	[multi_line \
-	     "Continuing\\." \
-	     "Error in testing condition for breakpoint ${bp_num_pattern}:" \
-	     "Cannot access memory at address 0x0" \
-	     "" \
-	     "Breakpoint ${bp_num_pattern}, \(foo\|bar\) \\(\\) at \[^\r\n\]+:${lineno}" \
-	     "${::decimal}\\s+\[^\r\n\]+ breakpoint here\\. \[^\r\n\]+"]
 }
 
 # If we're using a remote target then conditions could be evaulated
@@ -101,7 +115,7 @@ gdb_test_multiple "show breakpoint condition-evaluation" "" {
 }
 
 # Where the breakpoint will be placed.
-set bp_line_multi_loc [gdb_get_line_number "Multi-location breakpoint here"]
+set bp_line_multi_loc "foo"
 set bp_line_single_loc [gdb_get_line_number "Single-location breakpoint here"]
 
 foreach_with_prefix access_type { "char" "short" "int" "long long" } {
@@ -110,7 +124,7 @@ foreach_with_prefix access_type { "char" "short" "int" "long long" } {
 	    run_test $cond_eval $access_type $bp_line_multi_loc 2
 	}
 	with_test_prefix "single-loc" {
-	    run_test $cond_eval $access_type $bp_line_single_loc 1
+	    run_test $cond_eval $access_type "${srcfile}:${bp_line_single_loc}" 1
 	}
     }
 }
diff --git a/gdb/testsuite/gdb.base/break-interp.exp b/gdb/testsuite/gdb.base/break-interp.exp
index 98f67ee..fd8afdd 100644
--- a/gdb/testsuite/gdb.base/break-interp.exp
+++ b/gdb/testsuite/gdb.base/break-interp.exp
@@ -495,26 +495,14 @@ proc test_ld {file ifmain trynosym displacement} {
 	if $ifmain {
 	    reach $solib_bp run $displacement 3
 
-	    # Use two separate gdb_test_multiple statements to avoid timeouts due
-	    # to slow processing of wildcard capturing long output
-	    set test "info files"
 	    set entrynohex ""
-	    set info_line [join [list \
-				     "\r\n" "\[\t\]" "0x\[0-9af\]+" " - " \
-				     "0x\[0-9af\]+" " @ " "0x\[0-9af\]+"  \
-				     " is " "\[^\r\n\]+"] ""]
-	    gdb_test_multiple $test $test {
+	    gdb_test_multiple "info files" "" -lbl {
 		-re "\r\n\[\t \]*Entry point:\[\t \]*0x(\[0-9a-f\]+)\r\n" {
 		    set entrynohex $expect_out(1,string)
-		    gdb_test_multiple "" $test {
-			-re "\r\n$gdb_prompt $" {
-			    pass $test
-			}
-			-re $info_line {
-			    # Avoid timeout with check-read1
-			    exp_continue
-			}
-		    }
+		    exp_continue
+		}
+		-re -wrap "" {
+		    gdb_assert { ![string equal $entrynohex ""] } $gdb_test_name
 		}
 	    }
 
diff --git a/gdb/testsuite/gdb.base/break-on-linker-gcd-function.exp b/gdb/testsuite/gdb.base/break-on-linker-gcd-function.exp
index 67afe4c..cf1596a 100644
--- a/gdb/testsuite/gdb.base/break-on-linker-gcd-function.exp
+++ b/gdb/testsuite/gdb.base/break-on-linker-gcd-function.exp
@@ -40,10 +40,13 @@ proc set_breakpoint_on_gcd_function {} {
     # Single hex digit
     set xd {[0-9a-f]}
 
-    # This accepts e.g. "Breakpoint 1 at 0x40968a" (fixed GDB)
-    # but rejects e.g. "Breakpoint 1 at 0x4" (broken GDB).
-    gdb_test "b [gdb_get_line_number "gdb break here"]" \
-	"Breakpoint \[0-9\] at 0x${xd}${xd}+: .*"
+    set lineno [gdb_get_line_number "gdb break here"]
+    gdb_test "set breakpoint pending on"
+    gdb_test "b $lineno" \
+	[multi_line \
+	     "^No compiled code for line $lineno in the current file\\." \
+	     "Breakpoint $::decimal \\($lineno\\) pending\\."] \
+	"break on line in garbage collected function"
 }
 
 set_breakpoint_on_gcd_function
diff --git a/gdb/testsuite/gdb.base/break.exp b/gdb/testsuite/gdb.base/break.exp
index cdb4c22..34ac219 100644
--- a/gdb/testsuite/gdb.base/break.exp
+++ b/gdb/testsuite/gdb.base/break.exp
@@ -476,9 +476,6 @@ proc_with_prefix test_no_break_on_catchpoint {} {
 
 test_no_break_on_catchpoint
 
-# Verify that GDB responds gracefully when asked to set a breakpoint
-# on a nonexistent source line.
-
 proc_with_prefix test_break_nonexistent_line {} {
     clean_restart break
 
@@ -486,9 +483,11 @@ proc_with_prefix test_break_nonexistent_line {} {
 	return
     }
 
+    # Verify that GDB responds gracefully when asked to set a
+    # breakpoint on a nonexistent source line.
     gdb_test_no_output "set breakpoint pending off"
     gdb_test "break 999" \
-	"No line 999 in the current file." \
+	"^No compiled code for line 999 in the current file\\." \
 	"break on non-existent source line"
 }
 
diff --git a/gdb/testsuite/gdb.base/call-sc.exp b/gdb/testsuite/gdb.base/call-sc.exp
index c485c9b..91a4e5b 100644
--- a/gdb/testsuite/gdb.base/call-sc.exp
+++ b/gdb/testsuite/gdb.base/call-sc.exp
@@ -184,7 +184,7 @@ proc test_scalar_returns { } {
     # known, both failed to print a final "source and line" and misplaced
     # the frame ("No frame").
 
-    # The test is writen so that it only reports one FAIL/PASS for the
+    # The test is written so that it only reports one FAIL/PASS for the
     # entire operation.  The value returned is checked further down.
     # "return_value_unknown", if non-empty, records why GDB realised
     # that it didn't know where the return value was.
diff --git a/gdb/testsuite/gdb.base/catch-syscall.exp b/gdb/testsuite/gdb.base/catch-syscall.exp
index 431bfd5..2e20b8f 100644
--- a/gdb/testsuite/gdb.base/catch-syscall.exp
+++ b/gdb/testsuite/gdb.base/catch-syscall.exp
@@ -19,39 +19,18 @@
 # It was written by Sergio Durigan Junior <sergiodj@linux.vnet.ibm.com>
 # on September/2008.
 
+require supports_catch_syscall
+
 standard_testfile
 
 if  { [prepare_for_testing "failed to prepare" $testfile ${testfile}.c] } {
      return -1
 }
 
-# Check target supports catch syscall or not.
 if {![runto_main]} {
     return
 }
 
-set test "catch syscall"
-gdb_test_multiple $test $test {
-    -re "The feature \'catch syscall\' is not supported.*\r\n$gdb_prompt $" {
-	unsupported "catch syscall isn't supported"
-	return -1
-    }
-    -re ".*$gdb_prompt $" {
-	pass $test
-    }
-}
-
-set test "check catch syscall"
-gdb_test_multiple "continue" $test {
-    -re ".*Your system does not support this type\r\nof catchpoint.*$gdb_prompt $" {
-	unsupported "catch syscall isn't supported"
-	return -1
-    }
-    -re ".*Catchpoint.*$gdb_prompt $" {
-      pass $test
-    }
-}
-
 # Test-case for PR27313.  Verify that negative syscall numbers are refused.
 gdb_test "catch syscall -1" "Unknown syscall number '-1'\\."
 
diff --git a/gdb/testsuite/gdb.base/checkpoint.exp b/gdb/testsuite/gdb.base/checkpoint.exp
index f87f528..31b5a13 100644
--- a/gdb/testsuite/gdb.base/checkpoint.exp
+++ b/gdb/testsuite/gdb.base/checkpoint.exp
@@ -295,30 +295,48 @@ clean_restart $binfile
 runto_main
 gdb_breakpoint $break1_loc
 
-gdb_test "commands\nsilent\nif (lines % 2)\ncheckpoint\nend\n  continue\nend" \
+set cmd \
+    [join \
+	 [list \
+	      "commands" \
+	      "if (lines % 2)" \
+	      "  checkpoint" \
+	      "else" \
+	      "  continue" \
+	      "end" \
+	      "end"] \
+	 "\n"]
+gdb_test $cmd \
     "" \
     "set checkpoint breakpoint"
 
-set prev_timeout $timeout
-set timeout [expr $timeout + 120]
-verbose "Timeout now $timeout sec."
-
-gdb_breakpoint $break2_loc
-gdb_test "continue" "breakpoint 2.*" "break2 with many checkpoints"
+set nr_ok 0
+for {set iter 0} {$iter < 600} {incr iter} {
+    set ok 0
+    gdb_test_multiple "continue" "" {
+	-re -wrap "breakpoint 1.*" {
+	    set ok 1
+	}
+	-re -wrap "" {
+	}
+    }
+    if { $ok } {
+	incr nr_ok
+    } else {
+	break
+    }
+}
+gdb_assert { $nr_ok == 600 } "break1 with many checkpoints"
 
 set count 0
 set msg "info checkpoints with at least 600 checkpoints"
 gdb_test_multiple "info checkpoints" $msg {
-    -re "  $decimal process \[^\r\]*\r\n" {
+    -re "\r\n  $decimal process \[^\r\]*" {
 	incr count
 	exp_continue
     }
-    -re "$gdb_prompt $" {
-	if { $count >= 600 } {
-	    pass $msg
-	} else {
-	    fail $msg
-	}
+    -re -wrap "" {
+	gdb_assert { $count == 600 } $gdb_test_name
     }
 }
 
@@ -329,10 +347,6 @@ gdb_test_multiple "info checkpoints" $msg {
 gdb_test "kill" "" "kill all one with many checkpoints" \
     "Kill the program being debugged.*y or n. $" "y"
 
-# Restore old timeout
-set timeout $prev_timeout
-verbose "Timeout now $timeout sec."
-
 #
 # Finished: cleanup
 #
diff --git a/gdb/testsuite/gdb.base/completion.exp b/gdb/testsuite/gdb.base/completion.exp
index 4a0a373..57b4d1c 100644
--- a/gdb/testsuite/gdb.base/completion.exp
+++ b/gdb/testsuite/gdb.base/completion.exp
@@ -145,7 +145,7 @@ append regs_output "\n"
 append regs_output [capture_command_output "mt print user-registers" \
 		     ".*Name.*Nr\[^\n]*\n"]
 set all_regs {}
-foreach {- reg} [regexp -all -inline -line {^\s+(\w+)} $regs_output] {
+foreach {- reg} [regexp -all -inline -line {^\s*(\w+)} $regs_output] {
     lappend all_regs $reg
 }
 
diff --git a/gdb/testsuite/gdb.base/condbreak.exp b/gdb/testsuite/gdb.base/condbreak.exp
index 65d19b3..3b619e4 100644
--- a/gdb/testsuite/gdb.base/condbreak.exp
+++ b/gdb/testsuite/gdb.base/condbreak.exp
@@ -179,6 +179,10 @@ gdb_test "break -q main if (1==1) thread 999" \
     "Unknown thread 999\\."
 gdb_test "break -q main thread 999 if (1==1)" \
     "Unknown thread 999\\."
+gdb_test "break -q main if (1==1) thread 999 -force-condition" \
+    "Unknown thread 999\\."
+gdb_test "break -q main thread 999 if (1==1) -force-condition" \
+    "Unknown thread 999\\."
 
 # Verify that both if and thread can be distinguished from a breakpoint
 # address expression.
@@ -186,20 +190,71 @@ gdb_test "break *main if (1==1) thread 999" \
     "Unknown thread 999\\."
 gdb_test "break *main thread 999 if (1==1)" \
     "Unknown thread 999\\."
+gdb_test "break *main if (1==1) thread 999 -force-condition" \
+    "Unknown thread 999\\."
+gdb_test "break *main thread 999 if (1==1) -force-condition" \
+    "Unknown thread 999\\."
 
 # Similarly for task.
 gdb_test "break *main if (1==1) task 999" \
     "Unknown task 999\\."
 gdb_test "break *main task 999 if (1==1)" \
     "Unknown task 999\\."
+gdb_test "break *main if (1==1) task 999 -force-condition" \
+    "Unknown task 999\\."
+gdb_test "break *main task 999 if (1==1) -force-condition" \
+    "Unknown task 999\\."
 
-# GDB accepts abbreviations for "thread" and "task".
+# GDB accepts abbreviations for "thread", "task" and
+# "-force-condition", when these keywords appear after
+# the breakpoint condition.
 gdb_test "break *main if (1==1) t 999" \
     "Unknown thread 999\\."
 gdb_test "break *main if (1==1) th 999" \
     "Unknown thread 999\\."
 gdb_test "break *main if (1==1) ta 999" \
     "Unknown task 999\\."
+gdb_test "break *main if (1==1) t 999 -force" \
+    "Unknown thread 999\\."
+gdb_test "break *main if (1==1) th 999 -force" \
+    "Unknown thread 999\\."
+gdb_test "break *main if (1==1) ta 999 -force" \
+    "Unknown task 999\\."
+
+# Check the use of abbreviations before the condition.  This works
+# because, when the location spec starts with '*' GDB is able to
+# figure out that the complete location is '*main'.
+gdb_test "break *main t 999 if (1==1)" \
+    "Unknown thread 999\\."
+gdb_test "break *main th 999 if (1==1)" \
+    "Unknown thread 999\\."
+gdb_test "break *main ta 999 if (1==1)" \
+    "Unknown task 999\\."
+gdb_test "break *main t 999 -force if (1==1)" \
+    "Unknown thread 999\\."
+gdb_test "break *main th 999 -force if (1==1)" \
+    "Unknown thread 999\\."
+gdb_test "break *main ta 999 -force if (1==1)" \
+    "Unknown task 999\\."
+
+# However, when the location spec doesn't start with '*' GDB relies on
+# the linespec parser to spot the keyword which marks the end of the
+# linespec, and this parser doesn't check for abbreviations.
+gdb_test "with breakpoint pending off -- break main t 999 if (1==1)" \
+    "Function \"main t 999\" not defined\\."
+gdb_test "with breakpoint pending off -- break main th 999 if (1==1)" \
+    "Function \"main th 999\" not defined\\."
+gdb_test "with breakpoint pending off -- break main ta 999 if (1==1)" \
+    "Function \"main ta 999\" not defined\\."
+
+# GDB does not treat a "-force-condition" flag that appears
+# immediately after the condition as the flag, but instead treats it
+# as " - force - condition", that is, subtraction of the symbol
+# "force" followed by subtraction of symbol "context".  This is really
+# just a quirk of how this used to be implemented, and should maybe be
+# changed in the future.  However, for now GDB retains this behaviour.
+gdb_test "break *main if (1==1) -force-condition" \
+    "No symbol \"force\" in current context\\."
 
 set test "run until breakpoint at marker3"
 gdb_test_multiple "continue" $test {
diff --git a/gdb/testsuite/gdb.base/corefile-buildid.exp b/gdb/testsuite/gdb.base/corefile-buildid.exp
index e1b9804..fc54cf2 100644
--- a/gdb/testsuite/gdb.base/corefile-buildid.exp
+++ b/gdb/testsuite/gdb.base/corefile-buildid.exp
@@ -268,12 +268,13 @@ proc do_corefile_buildid_tests {args} {
 	    return
 	}
 
-	# Grab the build-id from the binary, removing ".debug" from the end.
-	set buildid [build_id_debug_filename_get $program_to_run]
+	# Get the build-id filename without ".debug" on the end.  This
+	# will have the format: '.build-id/xx/xxxxx'
+	set buildid [build_id_debug_filename_get $program_to_run ""]
 	if {$buildid == ""} {
 	    untested "binary has no build-id"
+	    return
 	}
-	regsub {\.debug$} $buildid {} buildid
 	verbose -log "build-id is $buildid"
 
 	locate_exec_from_core_build_id $corefile $buildid \
diff --git a/gdb/testsuite/gdb.base/corefile.exp b/gdb/testsuite/gdb.base/corefile.exp
index 79363c5..f4f102a 100644
--- a/gdb/testsuite/gdb.base/corefile.exp
+++ b/gdb/testsuite/gdb.base/corefile.exp
@@ -199,6 +199,45 @@ gdb_test "up" "#\[0-9\]* *(\[0-9xa-fH'\]* in)? .* \\(.*\\).*" "up, reinit"
 
 gdb_test "core" "No core file now."
 
+# Temporarily move coremmap.data out of the way and reload the core
+# file.  We should still be able to read buf2 as the contents of this
+# are written into the core file.  In contrast buf2ro should no longer
+# be readable as the contents of this region are not within the core
+# file, GDB relies on reading this from the coremmap.data file, which
+# can no longer be found.
+set coremmap_data_filename \
+    [standard_output_file coredir.[getpid]/coremmap.data]
+set coremmap_data_backup_filename \
+    [standard_output_file coredir.[getpid]/coremmap.data.backup]
+remote_exec host "mv ${coremmap_data_filename} \
+		  ${coremmap_data_backup_filename}"
+
+clean_restart $binfile
+
+# Load the core file and check we get a warning about the
+# coremmap.data file being missing.
+gdb_test_multiple "core-file $corefile" "warn about coremmap.data missing" {
+    -re -wrap "warning: Can't open file \[^\r\n\]+/coremmap.data during file-backed mapping note processing\r\n.*" {
+	pass $gdb_test_name
+    }
+}
+
+# This xfail was just copied from earlier in the script where we also
+# read from buf2.
+setup_xfail "*-*-sunos*" "*-*-aix*"
+gdb_test "x/8bd buf2" \
+    ".*:.*0.*1.*2.*3.*4.*5.*6.*7.*" \
+    "accessing mmapped data in core file with coremmap.data removed"
+
+gdb_test "x/8bd buf2ro" \
+    "$hex\[^:\]*:\\s+Cannot access memory at address $hex" \
+    "accessing read-only mmapped data in core file with coremmap.data removed"
+
+# Restore the coremmap.data file so later tests don't give warnings
+# when the core file is reloaded.
+remote_exec host "mv ${coremmap_data_backup_filename} \
+		  ${coremmap_data_filename}"
+
 # Test that we can unload the core with the "detach" command.
 
 proc_with_prefix corefile_detach {} {
diff --git a/gdb/testsuite/gdb.base/cursal.c b/gdb/testsuite/gdb.base/cursal.c
index 8dc713f..bc1e46f 100644
--- a/gdb/testsuite/gdb.base/cursal.c
+++ b/gdb/testsuite/gdb.base/cursal.c
@@ -31,7 +31,7 @@ func1 ()
 
 int
 main ()
-{
+{ /* main prologue */
   int v0 = 0;
   func1 ();
 
diff --git a/gdb/testsuite/gdb.base/cursal.exp b/gdb/testsuite/gdb.base/cursal.exp
index 3acced8..6c1fe38 100644
--- a/gdb/testsuite/gdb.base/cursal.exp
+++ b/gdb/testsuite/gdb.base/cursal.exp
@@ -25,9 +25,9 @@ clean_restart
 gdb_file_cmd ${binfile}
 gdb_test_no_output "set listsize 1"
 
-# initial sal should be first statement in main
+# initial sal should be main's prologue.
 gdb_test "list" \
-    "v0 = 0;" \
+    "{ /\\* main prologue \\*/" \
     "list before run"
 
 gdb_load ${binfile}
diff --git a/gdb/testsuite/gdb.base/empty-host-env-vars.exp b/gdb/testsuite/gdb.base/empty-host-env-vars.exp
index e6e9d6e..5fab65a 100644
--- a/gdb/testsuite/gdb.base/empty-host-env-vars.exp
+++ b/gdb/testsuite/gdb.base/empty-host-env-vars.exp
@@ -21,16 +21,14 @@ require {!is_remote host}
 
 set all_env_vars { HOME XDG_CACHE_HOME LOCALAPPDATA XDG_CONFIG_HOME }
 
-# Record the initial value of the index-cache directory.
+set re_pre \
+    [string_to_regexp {The directory of the index cache is "}]
+set re_post \
+    [string_to_regexp {".}]
+
+# Show the initial value of the index-cache directory.
 clean_restart
-set index_cache_directory ""
-gdb_test_multiple "show index-cache directory" "" {
-    -re -wrap "The directory of the index cache is \"(.*)\"\\." {
-	set index_cache_directory $expect_out(1,string)
-	set index_cache_directory [string_to_regexp $index_cache_directory]
-	pass $gdb_test_name
-    }
-}
+gdb_test "show index-cache directory" $re_pre\[^\r\n\]*$re_post
 
 foreach_with_prefix env_var_name $all_env_vars {
     # Restore the original state of the environment variable.
@@ -38,18 +36,7 @@ foreach_with_prefix env_var_name $all_env_vars {
 	set env($env_var_name) {}
 	clean_restart
 
-	# Verify that the empty environment variable didn't affect the
-	# index-cache directory setting, that we still see the initial value.
-	# "HOME" is different, because if that  one is unset, GDB isn't even
-	# able to compute the default location.  In that case, we expect it to
-	# be empty.
-	if { $env_var_name == "HOME" } {
-	    gdb_test "show index-cache directory" \
-		"The directory of the index cache is \"\"\\."
-	} else {
-	    gdb_test "show index-cache directory" \
-		"The directory of the index cache is \"$index_cache_directory\"\\."
-	}
+	gdb_test "show index-cache directory" $re_pre\[^\r\n\]*$re_post
     }
 }
 
@@ -69,7 +56,6 @@ with_test_prefix "all env vars" {
 
 	clean_restart
 
-	gdb_test "show index-cache directory" \
-	    "The directory of the index cache is \"\"\\."
+	gdb_test "show index-cache directory" $re_pre$re_post
     }
 }
diff --git a/gdb/testsuite/gdb.base/ending-run.exp b/gdb/testsuite/gdb.base/ending-run.exp
index b9a72b0..90359fd 100644
--- a/gdb/testsuite/gdb.base/ending-run.exp
+++ b/gdb/testsuite/gdb.base/ending-run.exp
@@ -32,24 +32,15 @@ if { [prepare_for_testing "failed to prepare" $testfile $srcfile $flags] } {
 }
 remote_exec build "rm -f core"
 
-# CHFts23469: Test that you can "clear" a bp set at
-# a line _before_ the routine (which will default to the
-# first line in the routine, which turns out to correspond
-# to the prolog--that's another bug...)
-#
-
-gdb_test "b ending-run.c:1" ".*Breakpoint.*ending-run.c, line 1.*" \
-	"bpt at line before routine"
-
 set break1_line [gdb_get_line_number "-break1-"]
 gdb_test "b ending-run.c:$break1_line" \
-	".*Note.*also.*Breakpoint 2.*ending-run.c, line $break1_line.*" \
+	"Breakpoint 1 at ${::hex}.*" \
 	"b ending-run.c:$break1_line, one"
 
 # Set up to go to the next-to-last line of the program
 #
 set break2_line [gdb_get_line_number "-break2-"]
-gdb_test "b ending-run.c:$break2_line" ".*Breakpoint 3.*ending-run.c, line $break2_line.*"
+gdb_test "b ending-run.c:$break2_line" ".*Breakpoint 2.*ending-run.c, line $break2_line.*"
 
 # Expect to hit the bp at line "1", but symbolize this
 # as line "13".  Then try to clear it--this should work.
@@ -57,29 +48,28 @@ gdb_test "b ending-run.c:$break2_line" ".*Breakpoint 3.*ending-run.c, line $brea
 gdb_run_cmd
 gdb_test "" ".*Breakpoint.*1.*callee.*$break1_line.*" "run"
 
-gdb_test "cle" ".*Deleted breakpoints 1 2.*" "clear worked"
-gdb_test_multiple "i b" "cleared bp at line before routine" {
-    -re ".* breakpoint .* breakpoint .*$gdb_prompt $" { 
-	fail "cleared bp at line before routine" 
+gdb_test "cle" "Deleted breakpoint 1 " "clear worked"
+gdb_test_multiple "i b" "cleared bp at stopped line" {
+    -re ".* breakpoint .* breakpoint .*$gdb_prompt $" {
+	fail $gdb_test_name
     }
-    -re ".*3.*main.*$break2_line.*$gdb_prompt $" {
-	pass "cleared bp at line before routine" 
+    -re ".*2.*main.*$break2_line.*$gdb_prompt $" {
+	pass $gdb_test_name
     }
 }
 
 # Test some other "clear" combinations
 #
-gdb_test "b ending-run.c:1" ".*Breakpoint.*4.*"
-gdb_test "b ending-run.c:$break1_line" ".*Note.*also.*Breakpoint.*5.*" "b ending-run.c:$break1_line, two"
+gdb_test "b ending-run.c:$break1_line" "Breakpoint 3 at ${::hex}.*" "b ending-run.c:$break1_line, two"
 gdb_test "cle ending-run.c:$break1_line" \
-	".*Deleted breakpoints 4 5.*" "Cleared 2 by line"
+	"Deleted breakpoint 3 " "Cleared 2 by line"
 
 gdb_test_multiple "info line ending-run.c:$break1_line" "" {
     -re ".*address (0x\[0-9a-fA-F]*).*$gdb_prompt $" {
         set line_nine $expect_out(1,string)
-        gdb_test "b ending-run.c:$break1_line" ".*Breakpoint 6.*ending-run.c, line $break1_line.*"
-        gdb_test "b *$line_nine" ".*Note.*also.*Breakpoint 7.*" "breakpoint 7 at *ending-run.c:$break1_line"
-        gdb_test "cle" ".*Deleted breakpoints 6 7.*" "clear 2 by default"
+	gdb_test "b ending-run.c:$break1_line" ".*Breakpoint 4.*ending-run.c, line $break1_line.*"
+	gdb_test "b *$line_nine" ".*Note.*also.*Breakpoint 5.*" "breakpoint 7 at *ending-run.c:$break1_line"
+	gdb_test "cle" "Deleted breakpoints 4 5 " "clear 2 by default"
     }
     -re ".*$gdb_prompt $" {
         fail "need to fix test for new compile outcome"
@@ -90,7 +80,7 @@ gdb_test_multiple "i b" "all set to continue" {
     -re ".* breakpoint .* breakpoint .*$gdb_prompt $" {
         fail "all set to continue (didn't clear bps)" 
     }
-    -re ".*3.*main.*$break2_line.*$gdb_prompt $" {
+    -re ".*2.*main.*$break2_line.*$gdb_prompt $" {
         pass "all set to continue"
     }
     -re ".*$gdb_prompt $" {
diff --git a/gdb/testsuite/gdb.base/filename-completion.exp b/gdb/testsuite/gdb.base/filename-completion.exp
index b700977..389e2d7 100644
--- a/gdb/testsuite/gdb.base/filename-completion.exp
+++ b/gdb/testsuite/gdb.base/filename-completion.exp
@@ -23,8 +23,16 @@ load_lib completion-support.exp
 #
 # root/			[ DIRECTORY ]
 #   aaa/		[ DIRECTORY ]
+#     aa bb		[ FILE ]
+#     aa cc		[ FILE ]
+#   aaa/		[ DIRECTORY ]
 #   bb1/		[ DIRECTORY ]
 #   bb2/		[ DIRECTORY ]
+#     dir 1/		[ DIRECTORY ]
+#       unique file	[ FILE ]
+#     dir 2/		[ DIRECTORY ]
+#       file 1		[ FILE ]
+#       file 2		[ FILE ]
 #   cc1/		[ DIRECTORY ]
 #   cc2			[ FILE ]
 proc setup_directory_tree {} {
@@ -36,18 +44,226 @@ proc setup_directory_tree {} {
     remote_exec host "mkdir -p ${root}/bb2"
     remote_exec host "mkdir -p ${root}/cc1"
     remote_exec host "touch ${root}/cc2"
-
     remote_exec host "touch \"${root}/aaa/aa bb\""
     remote_exec host "touch \"${root}/aaa/aa cc\""
+    remote_exec host "mkdir -p \"${root}/bb2/dir 1\""
+    remote_exec host "mkdir -p \"${root}/bb2/dir 2\""
+    remote_exec host "touch \"${root}/bb2/dir 1/unique file\""
+    remote_exec host "touch \"${root}/bb2/dir 2/file 1\""
+    remote_exec host "touch \"${root}/bb2/dir 2/file 2\""
+
+    remote_exec host "touch \"${root}/bb1/aa\\\"bb\""
+    remote_exec host "touch \"${root}/bb1/aa'bb\""
 
     return $root
 }
 
-# Run filename completetion tests.  ROOT is the base directory as
-# returned from setup_directory_tree, though, if ROOT is a
-# sub-directory of the user's home directory ROOT might have been
-# modified to replace the $HOME prefix with a single "~" character.
-proc run_tests { root } {
+# This proc started as a copy of test_gdb_complete_multiple, however, this
+# version does some extra work.  See the original test_gdb_complete_multiple
+# for a description of all the arguments.
+#
+# When using the 'complete' command with filenames, GDB will add a trailing
+# quote for filenames, and a trailing "/" for directory names.  As the
+# trailing "/" is also added in the tab-completion output the
+# COMPLETION_LIST will include the "/" character, but the trailing quote is
+# only added when using the 'complete' command.
+#
+# Pass the trailing quote will be passed as END_QUOTE_CHAR, this proc will
+# run the tab completion test, and will then add the trailing quote to those
+# entries in COMPLETION_LIST that don't have a trailing "/" before running
+# the 'complete' command test.
+proc test_gdb_complete_filename_multiple {
+  cmd_prefix completion_word add_completed_line completion_list
+  {start_quote_char ""} {end_quote_char ""} {max_completions false}
+  {testname ""}
+} {
+    if { [readline_is_used] } {
+	test_gdb_complete_tab_multiple "$cmd_prefix$completion_word" \
+	    $add_completed_line $completion_list $max_completions $testname
+    }
+
+    if { $start_quote_char eq "" } {
+	set updated_completion_list {}
+
+	foreach entry $completion_list {
+	    # If ENTRY is quoted with double quotes, then any double
+	    # quotes within the entry need to be escaped.
+	    if { $end_quote_char eq "\"" } {
+		regsub -all "\"" $entry "\\\"" entry
+	    }
+
+	    if { $end_quote_char eq "" } {
+		regsub -all " " $entry "\\ " entry
+		regsub -all "\"" $entry "\\\"" entry
+		regsub -all "'" $entry "\\'" entry
+	    }
+
+	    if {[string range $entry end end] ne "/"} {
+		set entry $entry$end_quote_char
+	    }
+	    lappend updated_completion_list $entry
+	}
+
+	set completion_list $updated_completion_list
+	set end_quote_char ""
+    }
+
+    test_gdb_complete_cmd_multiple $cmd_prefix $completion_word \
+	$completion_list $start_quote_char $end_quote_char $max_completions \
+	$testname
+}
+
+# Helper proc.  Returns a string containing the escape sequence to move the
+# cursor COUNT characters to the left.  There's no sanity checking performed
+# on COUNT, so the user of this proc must ensure there are more than COUNT
+# characters on the current line.
+proc c_left { count } {
+    string repeat "\033\[D" $count
+}
+
+# This proc is based off of test_gdb_complete_tab_multiple in
+# completion-support.exp library.  This proc however tests completing a
+# filename in the middle of a command line.
+#
+# INPUT_LINE is the line to complete, BACK_COUNT is the number of characters
+# to move the cursor left before sending tab to complete the line.
+# ADD_COMPLETED_LINE is what we expect to be unconditionally added the first
+# time tab is sent.  On additional tabs COMPLETION_LIST will be displayed.
+# TESTNAME is used as expected.
+proc test_tab_complete_within_line_multiple { input_line back_count \
+						  add_completed_line \
+						  completion_list \
+						  testname } {
+    global gdb_prompt
+
+    # After displaying the completion list the line will be reprinted, but
+    # now with ADD_COMPLETED_LINE inserted.  Build the regexp to match
+    # against this expanded line.  The new content will be inserted
+    # BACK_COUNT character from the end of the line.
+    set expanded_line \
+	[join [list \
+		   [string range $input_line 0 end-$back_count] \
+		   ${add_completed_line} \
+		   [string range $input_line end-[expr $back_count - 1] end]] \
+	     ""]
+    set expanded_line_re [string_to_regexp $expanded_line]
+
+    # Convert input arguments into regexp.
+    set input_line_re [string_to_regexp $input_line]
+    set add_completed_line_re [string_to_regexp $add_completed_line]
+    set completion_list_re [make_tab_completion_list_re $completion_list]
+
+    # Similar to test_tab_complete_within_line_unique, build two
+    # regexp for matching the line after the first tab.  Which regexp
+    # matches will depend on the version and/or configuration of
+    # readline.  This first regexp moves the cursor backwards and then
+    # inserts new content into the line.
+    set after_tab_re1 "^$input_line_re"
+    set after_tab_re1 "$after_tab_re1\\\x08{$back_count}"
+    set after_tab_re1 "$after_tab_re1${completion::bell_re}"
+    set after_tab_re1 "$after_tab_re1\\\x1b\\\x5b[string length $add_completed_line]\\\x40"
+    set after_tab_re1 "$after_tab_re1$add_completed_line_re\$"
+
+    # This second regexp moves the cursor backwards and overwrites the
+    # end of the line, then moves the cursor backwards again to the
+    # correct position within the line.
+    set after_tab_re2 "^$input_line_re"
+    set after_tab_re2 "$after_tab_re2\\\x08{$back_count}"
+    set after_tab_re2 "$after_tab_re2${completion::bell_re}"
+    set tail [string range $input_line end-[expr $back_count - 1] end]
+    set after_tab_re2 "$after_tab_re2$add_completed_line_re"
+    set after_tab_re2 "$after_tab_re2[string_to_regexp $tail]"
+    set after_tab_re2 "$after_tab_re2\\\x08{$back_count}"
+
+    send_gdb "$input_line[c_left $back_count]\t"
+    gdb_test_multiple "" "$testname (first tab)" {
+	-re "(?:(?:$after_tab_re1)|(?:$after_tab_re2))" {
+	    send_gdb "\t"
+	    # If we auto-completed to an ambiguous prefix, we need an
+	    # extra tab to show the matches list.
+	    if {$add_completed_line != ""} {
+		send_gdb "\t"
+		set maybe_bell ${completion::bell_re}
+	    } else {
+		set maybe_bell ""
+	    }
+	    gdb_test_multiple "" "$testname (second tab)" {
+		-re "^${maybe_bell}\r\n$completion_list_re\r\n$gdb_prompt " {
+		    gdb_test_multiple "" "$testname (second tab)" {
+			-re "^$expanded_line_re\\\x08{$back_count}$" {
+			    pass $gdb_test_name
+			}
+		    }
+		}
+		-re "${maybe_bell}\r\n.+\r\n$gdb_prompt $" {
+		    fail $gdb_test_name
+		}
+	    }
+	}
+    }
+
+    clear_input_line $testname
+}
+
+# Wrapper around test_gdb_complete_tab_unique to test completing a unique
+# item in the middle of a line.  INPUT_LINE is the line to complete.
+# BACK_COUNT is the number of characters to move left within INPUT_LINE
+# before sending tab to perform completion.  INSERT_STR is what we expect to
+# see inserted by the completion engine in GDB.
+proc test_tab_complete_within_line_unique { input_line back_count insert_str } {
+    # Build regexp for the line after completion has occurred.  As
+    # completion is being performed in the middle of the line the
+    # sequence of characters we see can vary depending on which
+    # version of readline is in use, and/or how readline is
+    # configured.  Currently two different approaches are covered as
+    # RE1 and RE2.  Both of these regexp cover the complete possible
+    # output.
+    #
+    # In the first case we see the input line followed by some number
+    # of characters to move the cursor backwards.  After this we see a
+    # control sequence that tells the terminal that some characters
+    # are going to be inserted into the middle of the line, the new
+    # characters are then emitted.  The terminal itself is responsible
+    # for preserving the tail of the line, so these characters are not
+    # re-emitted.
+    set re1 [string_to_regexp $input_line]
+    set re1 $re1\\\x08{$back_count}
+    set re1 $re1\\\x1b\\\x5b[string length $insert_str]\\\x40
+    set re1 $re1[string_to_regexp $insert_str]
+
+    # In this second regexp we again start with the input line
+    # followed by the control characters to move the cursor backwards.
+    # This time though readline emits the new characters and then
+    # re-emits the tail of the original line.  This new content will
+    # overwrite the original output on the terminal.  Finally, control
+    # characters are emitted to move the cursor back to the correct
+    # place in the middle of the line.
+    set re2 [string_to_regexp $input_line]
+    set re2 $re2\\\x08{$back_count}
+    set re2 $re2[string_to_regexp $insert_str]
+    set tail [string range $input_line end-[expr $back_count - 1] end]
+    set re2 $re2[string_to_regexp $tail]
+    set re2 $re2\\\x08{$back_count}
+
+    # We can now perform the tab-completion, we check for either of
+    # the possible output regexp patterns.
+    test_gdb_complete_tab_unique \
+	"${input_line}[c_left $back_count]" \
+	"(?:(?:$re1)|(?:$re2))" \
+	"" \
+	"complete unique file within command line"
+}
+
+
+# Run filename completion tests for those command that accept quoting and
+# escaping of the filename argument.  CMD is the initial part of the command
+# line, paths to complete will be added after CMD.
+#
+# ROOT is the base directory as returned from setup_directory_tree, though,
+# if ROOT is a sub-directory of the user's home directory ROOT might have
+# been modified to replace the $HOME prefix with a single "~" character.
+proc run_quoting_and_escaping_tests_1 { root cmd } {
+    gdb_start
 
     # Completing 'thread apply all ...' commands uses a custom word
     # point.  At one point we had a bug where doing this would break
@@ -57,47 +273,240 @@ proc run_tests { root } {
 	"complete a 'thread apply all' command"
 
     foreach_with_prefix qc [list "" "'" "\""] {
-	test_gdb_complete_none "file ${qc}${root}/xx" \
+	test_gdb_complete_none "$cmd ${qc}${root}/xx" \
 	    "expand a non-existent filename"
 
-	test_gdb_complete_unique "file ${qc}${root}/a" \
-	    "file ${qc}${root}/aaa/" "" false \
+	test_gdb_complete_unique "$cmd ${qc}${root}/a" \
+	    "$cmd ${qc}${root}/aaa/" "" false \
+	    "expand a unique directory name"
+
+	test_gdb_complete_unique "$cmd ${qc}${root}/cc2" \
+	    "$cmd ${qc}${root}/cc2${qc}" " " false \
 	    "expand a unique filename"
 
-	test_gdb_complete_multiple "file ${qc}${root}/" \
+	test_gdb_complete_filename_multiple "$cmd ${qc}${root}/" \
 	    "b" "b" {
 		"bb1/"
 		"bb2/"
 	    } "" "${qc}" false \
 	    "expand multiple directory names"
 
-	test_gdb_complete_multiple "file ${qc}${root}/" \
+	test_gdb_complete_filename_multiple "$cmd ${qc}${root}/" \
 	    "c" "c" {
 		"cc1/"
 		"cc2"
 	    } "" "${qc}" false \
 	    "expand mixed directory and file names"
 
-	# GDB does not currently escape word break characters
-	# (e.g. white space) correctly in unquoted filenames.
 	if { $qc ne "" } {
 	    set sp " "
+	} else {
+	    set sp "\\ "
+	}
 
-	    test_gdb_complete_multiple "file ${qc}${root}/aaa/" \
-		"a" "a${sp}" {
-		    "aa bb"
-		    "aa cc"
-		} "" "${qc}" false \
-		"expand filenames containing spaces"
+	if { $qc eq "'" } {
+	    set dq "\""
+	} else {
+	    set dq "\\\""
+	}
+
+	test_gdb_complete_unique "${cmd} ${qc}${root}/bb2/dir${sp}1/" \
+	    "${cmd} ${qc}${root}/bb2/dir${sp}1/unique${sp}file${qc}" " " \
+	    false \
+	    "expand a unique file name in a directory containing a space"
+
+	test_gdb_complete_filename_multiple "$cmd ${qc}${root}/bb2/" \
+	    "d" "ir${sp}" {
+		"dir 1/"
+		"dir 2/"
+	    } "" "${qc}" false \
+	    "expand multiple directory names containing spaces"
+
+	test_gdb_complete_filename_multiple "${cmd} ${qc}${root}/bb2/dir${sp}2/" \
+	    "f" "ile${sp}" {
+		"file 1"
+		"file 2"
+	    } "" "${qc}" false \
+	    "expand contents of a directory containing a space"
+
+	test_gdb_complete_filename_multiple "$cmd ${qc}${root}/aaa/" \
+	    "a" "a${sp}" {
+		"aa bb"
+		"aa cc"
+	    } "" "${qc}" false \
+	    "expand filenames containing spaces"
+
+	test_gdb_complete_filename_multiple "$cmd ${qc}${root}/bb1/" \
+	    "a" "a" {
+		"aa\"bb"
+		"aa'bb"
+	    } "" "${qc}" false \
+	    "expand filenames containing quotes"
+
+	test_gdb_complete_unique "$cmd ${qc}${root}/bb1/aa${dq}" \
+	    "$cmd ${qc}${root}/bb1/aa${dq}bb${qc}" " " false \
+	    "expand unique filename containing double quotes"
+
+	# It is not possible to include a single quote character
+	# within a single quoted string.  However, GDB does not do
+	# anything smart if a user tries to do this.  Avoid testing
+	# this case.  Maybe in the future we'll figure a way to avoid
+	# this situation.
+	if { $qc ne "'" } {
+	    if { $qc eq "" } {
+		set sq "\\'"
+	    } else {
+		set sq "'"
+	    }
+
+	    test_gdb_complete_unique "$cmd ${qc}${root}/bb1/aa${sq}" \
+		"$cmd ${qc}${root}/bb1/aa${sq}bb${qc}" " " false \
+		"expand unique filename containing single quote"
 	}
     }
+
+    gdb_exit
 }
 
-gdb_start
+# Tests for completing a filename in the middle of a command line.  This
+# represents a user typing out a command line then moving the cursor left
+# (e.g. with the left arrow key), editing a filename argument, and then
+# using tab completion to try and complete the filename even though there is
+# other content on the command line after the filename.
+proc run_mid_line_completion_tests { root cmd } {
+    gdb_start
+
+    test_tab_complete_within_line_unique \
+	"$cmd \"$root/bb2/dir 1/unique fi \"xxx\"" 6 "le\""
+
+    test_tab_complete_within_line_multiple \
+	"$cmd \"$root/aaa/a \"xxx\"" 6 "a " \
+	[list "aa bb" "aa cc"] \
+	"complete filename mid-line with multiple possibilities"
+
+    gdb_exit
+}
+
+# Run filename completion tests for those command that accept quoting and
+# escaping of the filename argument.
+#
+# ROOT is the base directory as returned from setup_directory_tree, though,
+# if ROOT is a sub-directory of the user's home directory ROOT might have
+# been modified to replace the $HOME prefix with a single "~" character.
+proc run_quoting_and_escaping_tests { root } {
+    # Test all the commands which allow quoting of filenames, and
+    # which require whitespace to be escaped in unquoted filenames.
+    foreach_with_prefix cmd { file exec-file symbol-file add-symbol-file \
+				  remove-symbol-file \
+				  "target core" "target exec" "target tfile" \
+				  "maint print c-tdesc" "compile file" \
+				  "save gdb-index" "save gdb-index -dwarf-5" } {
+	# Try each test placing the filename as the first argument
+	# then again with a quoted string immediately after the
+	# command.  This works because the filename completer will
+	# complete any number of filenames, even if the command only
+	# takes a single filename.
+	foreach_with_prefix filler { "" " \"xxx\"" " 'zzz'" " yyy"} {
+	    run_quoting_and_escaping_tests_1 $root "$cmd$filler"
+	}
+
+	run_mid_line_completion_tests $root $cmd
+    }
+}
+
+# Helper for run_unquoted_tests.  ROOT is the root directory as setup
+# by setup_directory_tree.  CMD is the GDB command to test.  PREFIX is
+# a possible prefix filename to prepend to the filename being
+# completed.
+proc run_unquoted_tests_core { root cmd { prefix "" } } {
+    gdb_start
+
+    if { $prefix != "" } {
+	# Platform specific path separator (':' on UNIX, ';' on MS-DOS).
+	set pathsep $::tcl_platform(pathSeparator)
+
+	set prefix ${prefix}${pathsep}
+    }
+
+    test_gdb_complete_none "$cmd ${prefix}${root}${root}/xx" \
+	"expand a non-existent filename"
+
+    test_gdb_complete_unique "$cmd ${prefix}${root}/a" \
+	"$cmd ${prefix}${root}/aaa/" "" false \
+	"expand a unique filename"
+
+    test_gdb_complete_unique "$cmd ${prefix}${root}/bb2/dir 1/uni" \
+	"$cmd ${prefix}${root}/bb2/dir 1/unique file" " " false \
+	"expand a unique filename containing whitespace"
+
+    test_gdb_complete_multiple "$cmd ${prefix}${root}/" \
+	"b" "b" {
+	    "bb1/"
+	    "bb2/"
+	} "" "" false \
+	"expand multiple directory names"
+
+    test_gdb_complete_multiple "$cmd ${prefix}${root}/" \
+	"c" "c" {
+	    "cc1/"
+	    "cc2"
+	} "" "" false \
+	"expand mixed directory and file names"
+
+    test_gdb_complete_multiple "$cmd ${prefix}${root}/aaa/" \
+	"a" "a " {
+	    "aa bb"
+	    "aa cc"
+	} "" "" false \
+	"expand filenames containing spaces"
+
+    test_gdb_complete_multiple "$cmd ${prefix}${root}/bb2/dir 2/" \
+	"fi" "le " {
+	    "file 1"
+	    "file 2"
+	} "" "" false \
+	"expand filenames containing spaces in path"
+
+    gdb_exit
+}
+
+
+# Run filename completion tests for a sample of commands that take an
+# unquoted, unescaped filename as an argument.  Only a sample of commands
+# are (currently) tested as there's a lot of commands that accept this style
+# of filename argument.
+#
+# ROOT is the base directory as returned from setup_directory_tree, though,
+# if ROOT is a sub-directory of the user's home directory ROOT might have
+# been modified to replace the $HOME prefix with a single "~" character.
+proc run_unquoted_tests { root } {
+    # Test all the commands which allow quoting of filenames, and
+    # which require whitespace to be escaped in unquoted filenames.
+    foreach_with_prefix cmd { "set logging file" "add-auto-load-safe-path" } {
+	run_unquoted_tests_core $root $cmd
+    }
+
+    foreach prefix [list \
+			"${root}/bb2/dir 1" \
+			"${root}/bb2/dir 1/unique file" \
+			"${root}/cc1" \
+			"${root}/cc2"] {
+
+	# Don't use the full path in the test name, just use the
+	# part after the ROOT directory.
+	set id [string range $prefix [string length ${root}] end]
+	with_test_prefix "prefix=$id" {
+	    foreach_with_prefix cmd { "add-auto-load-safe-path" "path" } {
+		run_unquoted_tests_core $root $cmd $prefix
+	    }
+	}
+    }
+}
 
 set root [setup_directory_tree]
 
-run_tests $root
+run_quoting_and_escaping_tests $root
+run_unquoted_tests $root
 
 # This test relies on using the $HOME directory.  We could make this
 # work for remote hosts, but right now, this isn't supported.
@@ -114,7 +523,8 @@ if {![is_remote host]} {
 
 	with_test_prefix "with tilde" {
 	    # And rerun the tests.
-	    run_tests $tilde_root
+	    run_quoting_and_escaping_tests $tilde_root
+	    run_unquoted_tests $tilde_root
 	}
     }
 }
diff --git a/gdb/testsuite/gdb.base/foll-exec-mode.exp b/gdb/testsuite/gdb.base/foll-exec-mode.exp
index 65054b5..56a2ffc 100644
--- a/gdb/testsuite/gdb.base/foll-exec-mode.exp
+++ b/gdb/testsuite/gdb.base/foll-exec-mode.exp
@@ -127,7 +127,7 @@ proc do_follow_exec_mode_tests { mode cmd infswitch } {
 	# past it.
 	#
 	if {$cmd == "continue"} {
-	    gdb_breakpoint "$execd_line"
+	    gdb_breakpoint "$execd_line" "allow-pending"
 	}
 
 	# Execute past the exec call.
diff --git a/gdb/testsuite/gdb.base/gnu-ifunc.exp b/gdb/testsuite/gdb.base/gnu-ifunc.exp
index 5bc534b..ff1d561 100644
--- a/gdb/testsuite/gdb.base/gnu-ifunc.exp
+++ b/gdb/testsuite/gdb.base/gnu-ifunc.exp
@@ -225,7 +225,7 @@ proc misc_tests {resolver_attr resolver_debug final_debug} {
 	return 1
     }
 
-    # The "if" condition is artifical to test regression of a former patch.
+    # The "if" condition is artificial to test regression of a former patch.
     gdb_breakpoint "[gdb_get_line_number "break-at-nextcall"] if i && (int) gnu_ifunc (i) != 42"
 
     gdb_breakpoint [gdb_get_line_number "break-at-call"]
diff --git a/gdb/testsuite/gdb.base/hbreak-unmapped.exp b/gdb/testsuite/gdb.base/hbreak-unmapped.exp
index ccb4b20..b28af6d 100644
--- a/gdb/testsuite/gdb.base/hbreak-unmapped.exp
+++ b/gdb/testsuite/gdb.base/hbreak-unmapped.exp
@@ -68,8 +68,7 @@ gdb_test "hbreak *0" "Hardware assisted breakpoint \[0-9\]+ at 0x0"
 gdb_test "info break" "hw breakpoint.*y.*0x0\+\[ \t\]\+" \
     "info break shows hw breakpoint"
 
-gdb_test_no_output "delete \$bpnum" "" "delete" \
-    "delete hw breakpoint"
+gdb_test_no_output "delete \$bpnum" "delete hw breakpoint"
 
 gdb_test "info break" "No breakpoints, watchpoints, tracepoints, or catchpoints\." \
     "info break shows no breakpoints, watchpoints, tracepoints, or catchpoints"
diff --git a/gdb/testsuite/gdb.base/hbreak2.exp b/gdb/testsuite/gdb.base/hbreak2.exp
index d22b363..37c001a 100644
--- a/gdb/testsuite/gdb.base/hbreak2.exp
+++ b/gdb/testsuite/gdb.base/hbreak2.exp
@@ -296,7 +296,7 @@ if {![runto_main]} {
 #
 gdb_test_no_output "set breakpoint pending off"
 gdb_test "hbreak 999" \
-    "No line 999 in the current file." \
+    "^No compiled code for line 999 in the current file\\." \
     "hardware break on non-existent source line"
 
 # Run to the desired default location.  If not positioned here, the
diff --git a/gdb/testsuite/gdb.base/info_sources_2.exp b/gdb/testsuite/gdb.base/info_sources_2.exp
index aa33f38..90442d0 100644
--- a/gdb/testsuite/gdb.base/info_sources_2.exp
+++ b/gdb/testsuite/gdb.base/info_sources_2.exp
@@ -120,7 +120,7 @@ proc run_info_sources { extra_args args } {
 	    }
 	}
 
-	# Now check ARGS agaisnt the values held in INFO_SOURCES map.
+	# Now check ARGS against the values held in INFO_SOURCES map.
 	foreach {objfile sourcefile} $args {
 	    # First, figure out if we're expecting SOURCEFILE to be present,
 	    # or not.
diff --git a/gdb/testsuite/gdb.base/killed-outside.exp b/gdb/testsuite/gdb.base/killed-outside.exp
index 87bd7be..88f4afe 100644
--- a/gdb/testsuite/gdb.base/killed-outside.exp
+++ b/gdb/testsuite/gdb.base/killed-outside.exp
@@ -102,7 +102,7 @@ with_test_prefix "continue" {
     }
 }
 
-# Try stepping the program.  Stepping may go through diferent code
+# Try stepping the program.  Stepping may go through different code
 # paths in the target backends.
 with_test_prefix "stepi" {
     test {
diff --git a/gdb/testsuite/gdb.base/limited-length.c b/gdb/testsuite/gdb.base/limited-length.c
index 627c34d..c8ece16 100644
--- a/gdb/testsuite/gdb.base/limited-length.c
+++ b/gdb/testsuite/gdb.base/limited-length.c
@@ -41,6 +41,8 @@ int large_2d_array[][10] = {
   {90, 91, 92, 93, 94, 95, 96, 97, 98, 99}
 };
 
+char large_empty_string[100000] = "";
+
 int
 main ()
 {
diff --git a/gdb/testsuite/gdb.base/limited-length.exp b/gdb/testsuite/gdb.base/limited-length.exp
index a24adcb..2d160e1 100644
--- a/gdb/testsuite/gdb.base/limited-length.exp
+++ b/gdb/testsuite/gdb.base/limited-length.exp
@@ -240,3 +240,13 @@ with_test_prefix "with unlimited print elements" {
 	"value is not available" \
 	"output expression referring unavailable element from history"
 }
+
+gdb_test_no_output "set max-value-size 10000"
+gdb_test_no_output "set print elements 200"
+
+gdb_test "print large_empty_string" \
+    " = \\\{0 '\\\\000' <repeats 10000 times>, <unavailable> <repeats 90000 times>\\\}" \
+    "print large empty string which is not fully available"
+gdb_test -nonl "output large_empty_string" \
+    "\\\{0 '\\\\000' <repeats 10000 times>, <unavailable> <repeats 90000 times>\\\}" \
+    "output large empty string which is not fully available"
diff --git a/gdb/testsuite/gdb.base/lineinc.exp b/gdb/testsuite/gdb.base/lineinc.exp
index 1fe1390..2386113 100644
--- a/gdb/testsuite/gdb.base/lineinc.exp
+++ b/gdb/testsuite/gdb.base/lineinc.exp
@@ -70,7 +70,7 @@
 # #included by a given source file in a list sorted by the line at
 # which they were #included; this gives GDB the chance to detect
 # multiple #inclusions at the same line, complain, and assign
-# distinct, albiet incorrect, line numbers to each #inclusion.
+# distinct, albeit incorrect, line numbers to each #inclusion.
 #
 # However, at one point GDB was sorting the list in reverse order,
 # while the code to assign new, distinct line numbers assumed it was
diff --git a/gdb/testsuite/gdb.base/list-ambiguous0.c b/gdb/testsuite/gdb.base/list-ambiguous0.c
index cff16e5..db11702 100644
--- a/gdb/testsuite/gdb.base/list-ambiguous0.c
+++ b/gdb/testsuite/gdb.base/list-ambiguous0.c
@@ -37,6 +37,6 @@ static int __attribute__ ((used)) ambiguous_var;
 
 int
 main (void)
-{
+{ /* main prologue */
   return 0;
 }
diff --git a/gdb/testsuite/gdb.base/list-before-start.exp b/gdb/testsuite/gdb.base/list-before-start.exp
new file mode 100644
index 0000000..5499257
--- /dev/null
+++ b/gdb/testsuite/gdb.base/list-before-start.exp
@@ -0,0 +1,36 @@
+# Copyright 2024 Free Software Foundation, Inc.
+
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
+# Test the "list" command to print the location around main before the
+# program is started.
+
+standard_testfile list-ambiguous0.c
+
+if {[prepare_for_testing "failed to prepare" $testfile $srcfile debug]} {
+    return -1
+}
+
+set fill "${decimal}\\s+\[^\n\r\]+"
+
+gdb_test_no_output "set listsize 10"
+
+gdb_test "list" \
+    [multi_line \
+	"${decimal}\\s+" \
+	"${decimal}\\s+int" \
+	"${decimal}\\s+main\[^\n\r\]+" \
+	"${decimal}\\s+\\{ /\\* main prologue \\*/" \
+	"${fill}" \
+	"${fill}" ]
diff --git a/gdb/testsuite/gdb.base/maint-info-inline-frames-and-blocks.c b/gdb/testsuite/gdb.base/maint-info-inline-frames-and-blocks.c
new file mode 100644
index 0000000..35b2064
--- /dev/null
+++ b/gdb/testsuite/gdb.base/maint-info-inline-frames-and-blocks.c
@@ -0,0 +1,57 @@
+/* This testcase is part of GDB, the GNU debugger.
+
+   Copyright 2024 Free Software Foundation, Inc.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
+
+static void inline_func_a (void);
+static void inline_func_b (void);
+static void normal_func (void);
+
+volatile int global_var = 0;
+
+static void __attribute__((noinline))
+normal_func (void)
+{
+  /* Do some work.  */
+  ++global_var;
+  ++global_var;
+
+  /* Now the inline function.  */
+  inline_func_a ();
+
+  /* Do some work.  */
+  ++global_var;		/* After inline function.  */
+  ++global_var;
+}
+
+static inline void __attribute__((__always_inline__))
+inline_func_a (void)
+{
+  inline_func_b ();
+}
+
+static inline void __attribute__((__always_inline__))
+inline_func_b (void)
+{
+  ++global_var;
+  ++global_var;
+}
+
+int
+main ()
+{
+  normal_func ();
+  return 0;
+}
diff --git a/gdb/testsuite/gdb.base/maint-info-inline-frames-and-blocks.exp b/gdb/testsuite/gdb.base/maint-info-inline-frames-and-blocks.exp
new file mode 100644
index 0000000..16be22a
--- /dev/null
+++ b/gdb/testsuite/gdb.base/maint-info-inline-frames-and-blocks.exp
@@ -0,0 +1,214 @@
+# Copyright (C) 2024 Free Software Foundation, Inc.
+
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
+# Check the 'maint info inline-frames' and 'maint info blocks'
+# commands.
+
+standard_testfile
+
+if { [prepare_for_testing "failed to prepare" ${testfile} ${srcfile} \
+	  {debug nopie}]} {
+    return -1
+}
+
+if {![runto normal_func]} {
+    return 0
+}
+
+# Make a pattern to match 'maint info blocks' output.  ARGS is the
+# list of function names we expect to see.  If the function name
+# starts with 'inline_func' then we expect to see an inline block,
+# otherwise blocks are not expected to be inline.
+proc make_blocks_result { args } {
+    set result \
+	[list \
+	     "Blocks at $::hex:" \
+	     "  from objfile: \\\[\\(objfile \\*\\) $::hex\\\] [string_to_regexp $::binfile]" \
+	     ""\
+	     "\\\[\\(block \\*\\) $::hex\\\] $::hex\\.\\.$::hex" \
+	     "  entry pc: $::hex" \
+	     "  is global block" \
+	     ".*" \
+	     "\\\[\\(block \\*\\) $::hex\\\] $::hex\\.\\.$::hex" \
+	     "  entry pc: $::hex" \
+	     "  is static block" \
+	     ".*" ]
+
+    foreach func $args {
+	lappend result \
+	    "\\\[\\(block \\*\\) $::hex\\\] $::hex\\.\\.$::hex" \
+	    "  entry pc: $::hex"
+
+	if { [string range $func 0 10] eq "inline_func" } {
+	    lappend result"  inline function: $func"
+	} else {
+	    lappend result"  function: $func"
+	}
+
+	lappend result ".*"
+    }
+
+    return [multi_line {*}$result]
+}
+
+gdb_test "maint info blocks" [make_blocks_result normal_func] \
+    "maint info blocks in normal_func only"
+
+# Next forward until we find the call to inline_func_a().  The hope is
+# that when we see the 'inline_func_a()' line this will be the start of
+# the inlined function.  This might not be the case on all
+# architectures if the compiler needs to perform some preamble.
+gdb_test_multiple "next" "next forward to inline_func_a" {
+    -re "^$decimal\\s+inline_func_a \\(\\);\r\n" {
+	# Consume the next prompt.
+	gdb_expect {
+	    -re "^$gdb_prompt $" {}
+	}
+	pass $gdb_test_name
+    }
+
+    -re "^$decimal\\s+\[^\r\n\]+After inline function\[^\r\n\]+\r\n" {
+	# We've gone too far!
+	fail $gdb_test_name
+    }
+
+    -re "^$decimal\\s+\[^\r\n\]+\r\n" {
+	send_gdb "next\n"
+	exp_continue
+    }
+
+    -re "^\[^\r\n\]+\r\n" {
+	exp_continue
+    }
+}
+
+gdb_test "maint info blocks" [make_blocks_result normal_func \
+				  inline_func_a inline_func_b] \
+    "maint info blocks when all blocks visible"
+
+# View the inline frame information.  This should display that we are
+# at the start of inline_func_a() within normal_func().
+gdb_test "maint info inline-frames" \
+    [multi_line \
+	 "^Cached inline state information for thread $decimal\\." \
+	 "program counter = $hex" \
+	 "skipped frames = 2" \
+	 "  inline_func_b" \
+	 "  inline_func_a" \
+	 "> normal_func"] \
+    "check inline-frames state when in normal_func"
+
+# Step, we should now enter the inlined function.
+gdb_test "step" ".*" \
+    "step to enter inline_func"
+
+# And the inline-frames information should update.
+gdb_test "maint info inline-frames" \
+    [multi_line \
+	 "^Cached inline state information for thread $decimal\\." \
+	 "program counter = $hex" \
+	 "skipped frames = 1" \
+	 "  inline_func_b" \
+	 "> inline_func_a" \
+	 "  normal_func"] \
+    "check inline-frames state when just entered inline_func_a"
+
+# Record the current program counter.
+set pc [get_hexadecimal_valueof "\$pc" "UNKNOWN"]
+
+# Use the recorded $pc value to check inline frames.
+gdb_test "maint info inline-frames $pc" \
+    [multi_line \
+	 "^program counter = $hex" \
+	 "skipped frames = 2" \
+	 "  inline_func_b" \
+	 "  inline_func_a" \
+	 "> normal_func"] \
+    "check inline-frames state at recorded \$pc while at the \$pc"
+
+# Step again, we should now enter inlined_func_b().
+gdb_test "step" ".*" \
+    "step into inline_func_b"
+
+gdb_test "maint info inline-frames" \
+    [multi_line \
+	 "^Cached inline state information for thread $decimal\\." \
+	 "program counter = $hex" \
+	 "skipped frames = 0" \
+	 "> inline_func_b" \
+	 "  inline_func_a" \
+	 "  normal_func"] \
+    "check inline-frames state when just entered inline_func_b"
+
+gdb_test "maint info blocks" [make_blocks_result normal_func \
+				  inline_func_a inline_func_b] \
+    "maint info blocks when all blocks still visible"
+
+gdb_test "step" ".*" \
+    "step into the body of inline_func_b"
+
+# Now we are no longer at the start of the inlined function we should
+# no longer see normal_func() in the inline-frames information.
+gdb_test "maint info inline-frames" \
+    [multi_line \
+	 "^Cached inline state information for thread $decimal\\." \
+	 "program counter = $hex" \
+	 "skipped frames = 0" \
+	 "> inline_func_b"] \
+    "check inline-frames state when within inline_func_b"
+
+gdb_test "maint info blocks" [make_blocks_result normal_func \
+				  inline_func_a inline_func_b] \
+    "maint info blocks within inline function, all blocks still visible"
+
+# Use the recorded $pc value to check inline frames.
+gdb_test "maint info inline-frames $pc" \
+    [multi_line \
+	 "^program counter = $hex" \
+	 "skipped frames = 2" \
+	 "  inline_func_b" \
+	 "  inline_func_a" \
+	 "> normal_func"] \
+    "check inline-frames state at recorded \$pc"
+
+gdb_test "maint info blocks" [make_blocks_result normal_func \
+				  inline_func_a inline_func_b] \
+    "maint info blocks using stored \$pc, inferior still running"
+
+clean_restart $binfile
+
+# Use the recorded $pc value to check inline frames when the inferior
+# is not executing.
+gdb_test "maint info inline-frames $pc" \
+    [multi_line \
+	 "^program counter = $hex" \
+	 "skipped frames = 2" \
+	 "  inline_func_b" \
+	 "  inline_func_a" \
+	 "> normal_func"] \
+    "check inline-frames state at recorded \$pc before execution starts"
+
+gdb_test "maint info blocks $pc" [make_blocks_result normal_func \
+				      inline_func_a inline_func_b] \
+    "maint info blocks using stored \$pc, inferior not running"
+
+# Trying to read the $pc from the current thread should fail if the
+# inferior is not yet running.
+gdb_test "maint info inline-frames" \
+    "^no inferior thread" \
+    "check inline-frames state of current thread before execution starts"
+
+gdb_test "maint info blocks" "^no inferior thread" \
+    "maint info blocks with no \$pc and inferior not running"
diff --git a/gdb/testsuite/gdb.base/new-ui.exp b/gdb/testsuite/gdb.base/new-ui.exp
index 2dfcbf7..a56d213 100644
--- a/gdb/testsuite/gdb.base/new-ui.exp
+++ b/gdb/testsuite/gdb.base/new-ui.exp
@@ -184,9 +184,11 @@ proc_with_prefix do_test_invalid_args {} {
 	     "new-ui with bad interpreter name"
 
     # Test that the TUI cannot be used for a new UI.
-    gdb_test "new-ui tui $extra_tty_name" \
-	"interpreter 'tui' cannot be used with a new UI" \
-	"new-ui with tui"
+    if [allow_tui_tests] {
+	gdb_test "new-ui tui $extra_tty_name" \
+	    "interpreter 'tui' cannot be used with a new UI" \
+	    "new-ui with tui"
+    }
 
     # Test that we can continue working normally.
     if ![runto_main] {
diff --git a/gdb/testsuite/gdb.base/overlays.exp b/gdb/testsuite/gdb.base/overlays.exp
index 2adde30..c8730ec 100644
--- a/gdb/testsuite/gdb.base/overlays.exp
+++ b/gdb/testsuite/gdb.base/overlays.exp
@@ -150,7 +150,7 @@ if {$data_overlays} {
 }
 
 # Verify that early-mapped overlays have been bumped out 
-# by later-mapped overlays layed over in the same VMA range.
+# by later-mapped overlays laid over in the same VMA range.
 
 send_gdb "overlay list\n"
 gdb_expect {
diff --git a/gdb/testsuite/gdb.base/pending.exp b/gdb/testsuite/gdb.base/pending.exp
index 5ee31d3..833e084 100644
--- a/gdb/testsuite/gdb.base/pending.exp
+++ b/gdb/testsuite/gdb.base/pending.exp
@@ -170,7 +170,8 @@ gdb_test "info break" \
 \[\t \]+stop only if k == 1.*
 \[\t \]+print k.*
 \[0-9\]+\[\t \]+breakpoint     keep y.* in main at .*$srcfile:$mainline.*
-\[0-9\]+\[\t \]+breakpoint     keep y.*PENDING.*pendshr.c:$bp2_loc if x > 3.*" \
+\[0-9\]+\[\t \]+breakpoint     keep y.*PENDING.*pendshr.c:$bp2_loc.*
+\\s+stop only if x > 3.*" \
 "multiple pending breakpoints"
 
 
@@ -195,8 +196,10 @@ gdb_test "info break" \
 \[\t \]+stop only if k == 1.*
 \[\t \]+print k.*
 \[0-9\]+\[\t \]+breakpoint     keep y.* in main at .*$srcfile:$mainline.*
-\[0-9\]+\[\t \]+breakpoint     keep y.*PENDING.*pendshr.c:$bp2_loc if x > 3.*
-\[0-9\]+\[\t \]+breakpoint     keep y.*PENDING.*pendshr.c:$bp3_loc.*ignore next 2 hits.*" \
+\[0-9\]+\[\t \]+breakpoint     keep y.*PENDING.*pendshr.c:$bp2_loc.*
+\\s+stop only if x > 3.*
+\[0-9\]+\[\t \]+breakpoint     keep y.*PENDING.*pendshr.c:$bp3_loc.*
+\\s+ignore next 2 hits.*" \
 "multiple pending breakpoints 2"
 
 #
@@ -267,3 +270,24 @@ gdb_test "info break" \
 \[0-9\]+\[\t \]+breakpoint     keep y.* in main at .*$srcfile:$mainline.*
 \[0-9\]+\[\t \]+breakpoint     keep y.*PENDING.*imaginary.*" \
 "verify pending breakpoint after restart"
+
+# Test GDB's parsing of pending breakpoint thread and condition.
+
+gdb_test_no_output "set breakpoint pending on"
+gdb_test "break foo if (unknown_var && another_unknown_var) thread 1" \
+    "Breakpoint $decimal \\(foo\\) pending\\."
+set bpnum [get_integer_valueof "\$bpnum" "*INVALID" \
+	       "get number for foo breakpoint"]
+
+if {[gdb_protocol_is_remote]} {
+    set evals_re "(?: \\(\[^) \]+ evals\\))?"
+} else {
+    set evals_re ""
+}
+
+gdb_test "info breakpoints $bpnum" \
+    [multi_line \
+	 "$bpnum\\s+breakpoint\\s+keep\\s+y\\s+<PENDING>\\s+foo" \
+	 "\\s+stop only if \\(unknown_var && another_unknown_var\\)${evals_re}" \
+	 "\\s+stop only in thread 1"] \
+    "check pending breakpoint on foo"
diff --git a/gdb/testsuite/gdb.base/reggroups.exp b/gdb/testsuite/gdb.base/reggroups.exp
index f96153b..56c00e5 100644
--- a/gdb/testsuite/gdb.base/reggroups.exp
+++ b/gdb/testsuite/gdb.base/reggroups.exp
@@ -27,7 +27,7 @@ if {![runto_main]} {
     return 0
 }
 
-set invalid_register_re "Invalid register .*"
+set invalid_register_re "Invalid register \[^\r\n\]*"
 
 # Fetch all reggroups from 'maint print reggroups'.
 
@@ -51,6 +51,7 @@ proc fetch_reggroups {test} {
 	}
     }
 
+    verbose -log "found reggroups: $reggroups"
     return $reggroups
 }
 
@@ -78,21 +79,34 @@ proc fetch_reggroup_regs {reggroup test} {
     # xmm0           {v4_float = {0x0, 0x0, 0x0, 0x0}, v2_double = {0x0, ... }}
     #
     set regs {}
-    gdb_test_multiple "info reg $reggroup" $test {
-	-re "info reg $reggroup\r\n" {
+    set have_invalid_register_fail 0
+    set re_regname "\[0-9a-zA-Z_-\]+"
+    set re_hws "\[ \t\]+"
+    set re_hs "\[^\n\r\]+"
+    set re_eol "\r\n"
+    set re_lookahead_eol "(?=$re_eol)"
+    gdb_test_multiple "info reg $reggroup" $test -lbl {
+	-re "^info reg $reggroup" {
 	    exp_continue
 	}
-	-re "^(\[0-9a-zA-Z-\]+)\[ \t\]+(0x\[0-9a-f\]+)\[ \t\]+(\[^\n\r\]+)\r\n" {
+	-re "^${re_eol}($re_regname)$re_hws$::hex$re_hws${re_hs}$re_lookahead_eol" {
 	    lappend regs $expect_out(1,string)
 	    exp_continue
 	}
 	-re $invalid_register_re {
-	    fail "$test (unexpected invalid register response)"
+	    set have_invalid_register_fail 1
+	    exp_continue
 	}
-	-re "$gdb_prompt $" {
-	    pass $test
+	-re -wrap "" {
+	    if { $have_invalid_register_fail } {
+		fail "$test (unexpected invalid register response)"
+	    } else {
+		pass $test
+	    }
 	}
     }
+
+    verbose -log "found regs in reggroup $reggroup: [join $regs]"
     return $regs
 }
 
diff --git a/gdb/testsuite/gdb.base/remote.exp b/gdb/testsuite/gdb.base/remote.exp
index 015cc56..52c4d27 100644
--- a/gdb/testsuite/gdb.base/remote.exp
+++ b/gdb/testsuite/gdb.base/remote.exp
@@ -167,7 +167,7 @@ set sizeof_random_data [get_sizeof "random_data" 48*1024]
 clean_restart $binfile
 
 #
-# Part THREE: Check the upload behavour
+# Part THREE: Check the upload behavior.
 #
 if {![runto_main]} {
     return
diff --git a/gdb/testsuite/gdb.base/reset-catchpoint-cond-lib.c b/gdb/testsuite/gdb.base/reset-catchpoint-cond-lib.c
new file mode 100644
index 0000000..06f3c3d
--- /dev/null
+++ b/gdb/testsuite/gdb.base/reset-catchpoint-cond-lib.c
@@ -0,0 +1,75 @@
+/* This testcase is part of GDB, the GNU debugger.
+
+   Copyright 2024 Free Software Foundation, Inc.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
+
+#include <stdio.h>
+#include <signal.h>
+#include <unistd.h>
+#include <sys/types.h>
+#include <sys/wait.h>
+#include <assert.h>
+#include <stdlib.h>
+
+/* This type is used by GDB.  */
+struct lib_type
+{
+  int a;
+  int b;
+  int c;
+};
+
+/* Ensure the type above is used.  */
+volatile struct lib_type global_lib_object = { 1, 2, 3 };
+
+/* This pointer is checked by GDB.  */
+volatile void *opaque_ptr = 0;
+
+void
+lib_func_test_syscall (void)
+{
+  puts ("Inside library\n");
+  fflush (stdout);
+}
+
+static void
+sig_handler (int signo)
+{
+  /* Nothing.  */
+}
+
+void
+lib_func_test_signal (void)
+{
+  signal (SIGUSR1, sig_handler);
+
+  kill (getpid (), SIGUSR1);
+}
+
+void
+lib_func_test_fork (void)
+{
+  pid_t pid = fork ();
+  assert (pid != -1);
+
+  if (pid == 0)
+    {
+      /* Child: just exit.  */
+      exit (0);
+    }
+
+  /* Parent.  */
+  waitpid (pid, NULL, 0);
+}
diff --git a/gdb/testsuite/gdb.base/reset-catchpoint-cond.c b/gdb/testsuite/gdb.base/reset-catchpoint-cond.c
new file mode 100644
index 0000000..0c1d5ea
--- /dev/null
+++ b/gdb/testsuite/gdb.base/reset-catchpoint-cond.c
@@ -0,0 +1,50 @@
+/* This testcase is part of GDB, the GNU debugger.
+
+   Copyright 2024 Free Software Foundation, Inc.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
+
+extern void lib_func_test_syscall (void);
+extern void lib_func_test_signal (void);
+extern void lib_func_test_fork (void);
+
+/* We use this to perform some filler work.  */
+volatile int global_var = 0;
+
+/* Just somewhere for GDB to put a breakpoint.  */
+void
+breakpt_before_exit (void)
+{
+  /* Nothing.  */
+}
+
+int
+main (void)
+{
+#if defined TEST_SYSCALL
+  lib_func_test_syscall ();
+#elif defined TEST_SIGNAL
+  lib_func_test_signal ();
+#elif defined TEST_FORK
+  lib_func_test_fork ();
+#else
+# error compile with suitable -DTEST_xxx macro defined
+#endif
+
+  ++global_var;
+
+  breakpt_before_exit ();
+
+  return 0;
+}
diff --git a/gdb/testsuite/gdb.base/reset-catchpoint-cond.exp b/gdb/testsuite/gdb.base/reset-catchpoint-cond.exp
new file mode 100644
index 0000000..e119c32
--- /dev/null
+++ b/gdb/testsuite/gdb.base/reset-catchpoint-cond.exp
@@ -0,0 +1,169 @@
+# Copyright 2024 Free Software Foundation, Inc.
+
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
+# Test that the condition for a catchpoint is correctly reset after
+# shared libraries are unloaded, as happens when an inferior is
+# restarted.
+#
+# If this is not done then, when the catchpoint is hit on the second
+# run, we'll evaluate the parsed expression from the first run, which
+# might include references to types owned by the now deleted objfile
+# (for the shared library loaded in the first run).
+#
+# This scripts tests a number of different catchpoint types.  Inside
+# GDB these are all sub-classes of the 'catchpoint' type, which is
+# where the fix for the above issue resides, so all catchpoint types
+# should work correctly.
+
+standard_testfile .c -lib.c
+
+set libfile $binfile-lib.so
+
+set pyfile [gdb_remote_download host ${srcdir}/${subdir}/${testfile}.py]
+
+if {[build_executable "build shared library" $libfile $srcfile2 \
+	 {debug shlib}] == -1} {
+    return
+}
+
+# Depending on whether or not libc debug info is installed, when we
+# hit a syscall catchpoint inside libc there might be a source line
+# included in the output.
+#
+# This regexp will match an optional line and can be added to the
+# expected catchpoint output to ignore the (possibly missing) source
+# line.
+set libc_src_line_re "(?:\r\n\[^\r\n\]+)?"
+
+# Check the Python bp_modified_list and then reset the list back to
+# empty.  TESTNAME is just a string.  BP_NUM is a list of breakpoint
+# numbers that are expected to appear (in the given order) in the
+# bp_modified_list.
+
+proc check_modified_bp_list { testname bp_num } {
+    if { [allow_python_tests] } {
+	set expected [join $bp_num ", "]
+
+	gdb_test "python print(bp_modified_list)" "\\\[$expected\\\]" \
+	    $testname
+	gdb_test_no_output -nopass "python bp_modified_list=\[\]" \
+	    "reset bp_modified_list after $testname"
+    }
+}
+
+# Build an executable and run tests on 'catch MODE'.
+
+proc run_test { mode } {
+    set exec_name ${::binfile}-${mode}
+
+    set macro TEST_[string toupper $mode]
+
+    if {[build_executable "build test executable" $exec_name $::srcfile \
+	     [list debug shlib=$::libfile additional_flags=-D${macro}]] == -1} {
+	return
+    }
+
+    clean_restart $exec_name
+    gdb_load_shlib $::libfile
+
+    if {![runto_main]} {
+	return
+    }
+
+    if { $mode eq "syscall" } {
+	gdb_test "catch syscall write" \
+	    "Catchpoint $::decimal \\(syscall 'write' \[^)\]+\\)"
+	set catch_re "call to syscall write"
+    } elseif { $mode eq "signal" } {
+	gdb_test "catch signal SIGUSR1" \
+	    "Catchpoint $::decimal \\(signal SIGUSR1\\)"
+	set catch_re "signal SIGUSR1"
+    } elseif { $mode eq "fork" } {
+	gdb_test "catch fork" \
+	    "Catchpoint $::decimal \\(fork\\)"
+	set catch_re "forked process $::decimal"
+    } else {
+	error "unknown mode $mode"
+    }
+    set cp_num [get_integer_valueof "\$bpnum" "*UNKNOWN*"]
+
+    gdb_breakpoint "breakpt_before_exit"
+
+    gdb_test "continue" \
+	"Catchpoint ${cp_num} \[^\r\n\]+$::libc_src_line_re"
+
+    if { [allow_python_tests] } {
+	gdb_test_no_output "source $::pyfile" "import python scripts"
+	check_modified_bp_list \
+	    "check b/p modified observer has not yet triggered" {}
+    }
+
+    with_test_prefix "with false condition" {
+	gdb_test_no_output "condition $cp_num ((struct lib_type *) opaque_ptr) != 0" \
+	    "set catchpoint condition"
+
+	check_modified_bp_list \
+	    "catchpoint modified once by setting condition" \
+	    [list $cp_num]
+
+	gdb_run_cmd
+	gdb_test "" [multi_line \
+			 "Breakpoint $::decimal, main \\(\\) \[^\r\n\]+" \
+			 "$::decimal\\s+\[^\r\n\]+"]
+
+	check_modified_bp_list "catchpoint modified twice at startup" \
+	    [list $cp_num $cp_num "$::decimal"]
+
+	gdb_test "continue" \
+	    [multi_line \
+		 "Breakpoint $::decimal, breakpt_before_exit \\(\\) at \[^\r\n\]+" \
+		 "$::decimal\\s+\[^\r\n\]+"] \
+	    "continue to breakpt_before_exit"
+    }
+
+    # Check the bp_modified_list against '.*'.  We don't care at this
+    # point what's in the list (nothing relevant has happened since we
+    # last checked), but this has the side effect of clearing the list.
+    check_modified_bp_list "clear bp modified list" { .* }
+
+    with_test_prefix "with true condition" {
+	gdb_test_no_output "condition $cp_num ((struct lib_type *) opaque_ptr) == 0" \
+	    "set catchpoint condition"
+
+	check_modified_bp_list \
+	    "catchpoint modified once by setting condition" \
+	    [list $cp_num]
+
+	gdb_run_cmd
+	gdb_test "" [multi_line \
+			 "Breakpoint $::decimal, main \\(\\) \[^\r\n\]+" \
+			 "$::decimal\\s+\[^\r\n\]+"]
+
+	check_modified_bp_list "catchpoint modified twice at startup" \
+	    [list $cp_num $cp_num "$::decimal"]
+
+	gdb_test "continue" \
+	    "Catchpoint $cp_num \\($catch_re\\), \[^\r\n\]+$::libc_src_line_re" \
+	    "continue until catchpoint hit"
+
+	check_modified_bp_list "catchpoint modified again when hit" \
+	    [list $cp_num]
+    }
+}
+
+# Run the tests.
+foreach_with_prefix mode { syscall signal fork } {
+    run_test $mode
+}
diff --git a/gdb/testsuite/gdb.base/reset-catchpoint-cond.py b/gdb/testsuite/gdb.base/reset-catchpoint-cond.py
new file mode 100644
index 0000000..bf90ec8
--- /dev/null
+++ b/gdb/testsuite/gdb.base/reset-catchpoint-cond.py
@@ -0,0 +1,23 @@
+# Copyright (C) 2024 Free Software Foundation, Inc.
+
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
+bp_modified_list = []
+
+
+def bp_modified(bp):
+    bp_modified_list.append(bp.number)
+
+
+gdb.events.breakpoint_modified.connect(bp_modified)
diff --git a/gdb/testsuite/gdb.base/return.exp b/gdb/testsuite/gdb.base/return.exp
index 29de995..23016f8 100644
--- a/gdb/testsuite/gdb.base/return.exp
+++ b/gdb/testsuite/gdb.base/return.exp
@@ -15,12 +15,12 @@
 
 # This file was written by Jeff Law. (law@cs.utah.edu)
 
+set allow_float_test [allow_float_test]
+
 if { [prepare_for_testing "failed to prepare" "return"] } {
     return -1
 }
 
-set allow_float_test [allow_float_test]
-
 proc return_tests { } {
     global gdb_prompt allow_float_test
 
diff --git a/gdb/testsuite/gdb.base/savedregs.exp b/gdb/testsuite/gdb.base/savedregs.exp
index ce3ab94..f20fd7c 100644
--- a/gdb/testsuite/gdb.base/savedregs.exp
+++ b/gdb/testsuite/gdb.base/savedregs.exp
@@ -57,7 +57,7 @@ proc process_saved_regs { current inner outer } {
     # and for dummy frames won't have saved registers.  If there's a
     # problem, fail but capture the output anyway, hopefully later
     # "info frame" requests for that same frame will at least fail in
-    # a consistent manner (stops propogated fails).
+    # a consistent manner (stops propagated fails).
 
     foreach func $inner {
 	set saved_regs($func) "error"
diff --git a/gdb/testsuite/gdb.base/scope-hw-watch-disable.exp b/gdb/testsuite/gdb.base/scope-hw-watch-disable.exp
index 6113770..29eb682 100644
--- a/gdb/testsuite/gdb.base/scope-hw-watch-disable.exp
+++ b/gdb/testsuite/gdb.base/scope-hw-watch-disable.exp
@@ -29,6 +29,15 @@ if {![runto_main]} {
     return -1
 }
 
+gdb_test_multiple "maint info break" "maint info break before" {
+    -re -wrap "watchpoint.*" {
+	fail $gdb_test_name
+    }
+    -re -wrap "" {
+	pass $gdb_test_name
+    }
+}
+
 gdb_test "awatch a" \
     "Can't set read/access watchpoint when hardware watchpoints are disabled." \
     "unsuccessful attempt to create an access watchpoint"
@@ -36,5 +45,14 @@ gdb_test "rwatch b" \
     "Can't set read/access watchpoint when hardware watchpoints are disabled." \
     "unsuccessful attempt to create a read watchpoint"
 
+gdb_test_multiple "maint info break" "maint info break after" {
+    -re -wrap "watchpoint.*" {
+	fail $gdb_test_name
+    }
+    -re -wrap "" {
+	pass $gdb_test_name
+    }
+}
+
 # The program continues until termination.
 gdb_continue_to_end
diff --git a/gdb/testsuite/gdb.base/sepdebug.exp b/gdb/testsuite/gdb.base/sepdebug.exp
index ee9bea2..eb3515b 100644
--- a/gdb/testsuite/gdb.base/sepdebug.exp
+++ b/gdb/testsuite/gdb.base/sepdebug.exp
@@ -296,7 +296,7 @@ gdb_test "catch exec" "Catchpoint \[0-9\]+ \\(exec\\)" \
 #
 
 gdb_test_no_output "set breakpoint pending off"
-gdb_test "break 999" "No line 999 in the current file." \
+gdb_test "break 999" "^No compiled code for line 999 in the current file\\." \
     "break on non-existent source line"
 
 # Run to the desired default location. If not positioned here, the
diff --git a/gdb/testsuite/gdb.base/sigbpt.exp b/gdb/testsuite/gdb.base/sigbpt.exp
index 4855400..6f4616e 100644
--- a/gdb/testsuite/gdb.base/sigbpt.exp
+++ b/gdb/testsuite/gdb.base/sigbpt.exp
@@ -22,7 +22,7 @@
 # This test is known to tickle the following problems: kernel letting
 # the inferior execute both the system call, and the instruction
 # following, when single-stepping a system call; kernel failing to
-# propogate the single-step state when single-stepping the sigreturn
+# propagate the single-step state when single-stepping the sigreturn
 # system call, instead resuming the inferior at full speed; GDB
 # doesn't know how to software single-step across a sigreturn
 # instruction.  Since the kernel problems can be "fixed" using
diff --git a/gdb/testsuite/gdb.base/signals.exp b/gdb/testsuite/gdb.base/signals.exp
index 38c63b5..e6bd35a 100644
--- a/gdb/testsuite/gdb.base/signals.exp
+++ b/gdb/testsuite/gdb.base/signals.exp
@@ -105,7 +105,7 @@ if {[runto_main]} {
 	"next to ++count #2"
     sleep 2
 
-    # ...call the function, which is immediatly interrupted
+    # ...call the function, which is immediately interrupted
 
     gdb_test "p func1 ()" \
 "Breakpoint \[0-9\]*, handler.*
diff --git a/gdb/testsuite/gdb.base/sigrepeat.c b/gdb/testsuite/gdb.base/sigrepeat.c
index 8717721..79fe648 100644
--- a/gdb/testsuite/gdb.base/sigrepeat.c
+++ b/gdb/testsuite/gdb.base/sigrepeat.c
@@ -59,7 +59,7 @@ handler (int sig)
   while (1)
     {
       /* Wait until a signal has become pending, that way when this
-	 handler returns it will be immediatly delivered leading to
+	 handler returns it will be immediately delivered leading to
 	 back-to-back signals.  */
       sigset_t set;
       sigemptyset (&set);
diff --git a/gdb/testsuite/gdb.base/solib-search.exp b/gdb/testsuite/gdb.base/solib-search.exp
index f038a04..bf021c8 100644
--- a/gdb/testsuite/gdb.base/solib-search.exp
+++ b/gdb/testsuite/gdb.base/solib-search.exp
@@ -43,7 +43,11 @@ set right_binfile2_lib \
 set binfile1_lib [standard_output_file ${libname1}.so]
 set binfile2_lib [standard_output_file ${libname2}.so]
 
-set lib_flags [list debug ldflags=-Wl,-Bsymbolic]
+# When this test was written, GDB's ability to track down shared
+# libraries for a core file based on the build-id much poorer.  As GDB
+# has improved we now need to disable build-ids in order for this test
+# to function as expected.
+set lib_flags [list debug no-build-id ldflags=-Wl,-Bsymbolic]
 set wrong_lib_flags "$lib_flags additional_flags=-DARRAY_SIZE=1"
 set right_lib_flags "$lib_flags additional_flags=-DARRAY_SIZE=8192 additional_flags=-DRIGHT"
 
diff --git a/gdb/testsuite/gdb.base/step-into-other-file.c b/gdb/testsuite/gdb.base/step-into-other-file.c
new file mode 100644
index 0000000..5ec7c33
--- /dev/null
+++ b/gdb/testsuite/gdb.base/step-into-other-file.c
@@ -0,0 +1,31 @@
+/* This testcase is part of GDB, the GNU debugger.
+
+   Copyright 2024 Free Software Foundation, Inc.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
+
+int var;
+
+int
+foo (void)
+{
+  var = 1;
+#include "step-into-other-file.h"
+}
+
+int
+main ()
+{
+  return foo ();
+}
diff --git a/gdb/testsuite/gdb.base/step-into-other-file.exp b/gdb/testsuite/gdb.base/step-into-other-file.exp
new file mode 100644
index 0000000..f0e8c3f
--- /dev/null
+++ b/gdb/testsuite/gdb.base/step-into-other-file.exp
@@ -0,0 +1,36 @@
+# Copyright (C) 2024 Free Software Foundation, Inc.
+
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
+# Check that when stepping into another file, the file is shown.
+
+standard_testfile .c .h
+
+set flags {}
+lappend flags debug
+lappend_include_file flags $srcdir/$subdir/$srcfile2
+
+if { [prepare_for_testing "failed to prepare" $testfile $srcfile \
+	  $flags] == -1 } {
+    return -1
+}
+
+if ![runto_main] {
+    return -1
+}
+
+gdb_test step $srcfile:$decimal\r\n.*
+
+# Regression test for PR32011.
+gdb_test next $srcfile2:$decimal\r\n.*
diff --git a/gdb/testsuite/gdb.base/step-into-other-file.h b/gdb/testsuite/gdb.base/step-into-other-file.h
new file mode 100644
index 0000000..60b4816
--- /dev/null
+++ b/gdb/testsuite/gdb.base/step-into-other-file.h
@@ -0,0 +1,18 @@
+/* This testcase is part of GDB, the GNU debugger.
+
+   Copyright 2024 Free Software Foundation, Inc.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
+
+  return 1;
diff --git a/gdb/testsuite/gdb.base/store.exp b/gdb/testsuite/gdb.base/store.exp
index 9286253..2271156 100644
--- a/gdb/testsuite/gdb.base/store.exp
+++ b/gdb/testsuite/gdb.base/store.exp
@@ -196,7 +196,7 @@ proc check_field { t } {
     gdb_test "continue" "register struct f_${t} u = f_${t};" \
 	    "continue field ${t}"
 
-    # Match either the return statement, or the line immediatly after
+    # Match either the return statement, or the line immediately after
     # it.  The compiler can end up merging the return statement into
     # the return instruction.
     gdb_test "next" "(return u;|\})" "next field ${t}"
diff --git a/gdb/testsuite/gdb.base/structs.exp b/gdb/testsuite/gdb.base/structs.exp
index 31b2bbe..7f1192d 100644
--- a/gdb/testsuite/gdb.base/structs.exp
+++ b/gdb/testsuite/gdb.base/structs.exp
@@ -296,7 +296,7 @@ proc test_struct_returns { n } {
     # known, both failed to print a final "source and line" and misplaced
     # the frame ("No frame").
 
-    # The test is writen so that it only reports one FAIL/PASS for the
+    # The test is written so that it only reports one FAIL/PASS for the
     # entire operation.  The value returned is checked further down.
     # "return_value_known", if non-zero, indicates that GDB knew where
     # the return value was located.
diff --git a/gdb/testsuite/gdb.base/style-logging.exp b/gdb/testsuite/gdb.base/style-logging.exp
index 882418b..d866d36 100644
--- a/gdb/testsuite/gdb.base/style-logging.exp
+++ b/gdb/testsuite/gdb.base/style-logging.exp
@@ -41,7 +41,8 @@ with_ansi_styling_terminal {
 
     set main_expr [style main function]
     set base_file_expr [style ".*style\\.c" file]
-    set file_expr "$base_file_expr:\[0-9\]"
+    set line_expr [style $decimal line-number]
+    set file_expr "$base_file_expr:$line_expr"
     set arg_expr [style "arg." variable]
     gdb_test "frame" \
 	"$main_expr.*$arg_expr.*$arg_expr.*$file_expr.*"
diff --git a/gdb/testsuite/gdb.base/style.exp b/gdb/testsuite/gdb.base/style.exp
index aff6545..d29b238 100644
--- a/gdb/testsuite/gdb.base/style.exp
+++ b/gdb/testsuite/gdb.base/style.exp
@@ -99,7 +99,8 @@ proc run_style_tests { } {
 
 	set main_expr [limited_style main function]
 	set base_file_expr [limited_style ".*style\\.c" file]
-	set file_expr "$base_file_expr:\[0-9\]+"
+	set line_expr [limited_style $decimal line-number]
+	set file_expr "$base_file_expr:$line_expr"
 	set arg_expr [limited_style "arg." variable]
 
 	# On some embedded targets that don't fully support argc/argv,
@@ -109,12 +110,12 @@ proc run_style_tests { } {
 	gdb_test "frame" \
 	    [multi_line \
 		 "#0\\s+$main_expr\\s+\\($arg_expr=$decimal,\\s+$arg_expr=$hex.*\\)\\s+at\\s+$file_expr" \
-		 "\[0-9\]+\\s+.*return.* break here .*"]
+		 "$line_expr\\s+.*return.* break here .*"]
 	gdb_test "info breakpoints" "$main_expr at $file_expr.*"
 
 	gdb_test_no_output "set style sources off"
 	gdb_test "frame" \
-	    "\r\n\[^\033\]*break here.*" \
+	    "\r\n$line_expr\[^\033\]*break here.*" \
 	    "frame without sources styling"
 	gdb_test_no_output "set style sources on"
 
@@ -139,18 +140,18 @@ proc run_style_tests { } {
 		[multi_line \
 		     "#0\\s+$main_expr\\s+\\($arg_expr=$decimal,\\s+$arg_expr=$hex\\)" \
 		     "\\s+at\\s+$file_expr" \
-		     "\[0-9\]+\\s+.*return.* break here .*"]
+		     "$line_expr\\s+.*return.* break here .*"]
 	    set re1_styled \
 		[multi_line \
 		     "#0\\s+$main_expr\\s+\\($arg_expr=$decimal,\\s+" \
 		     "\\s+$arg_expr=$hex.*\\)" \
 		     "\\s+at\\s+$file_expr" \
-		     "\[0-9\]+\\s+.*return.* break here .*"]
+		     "$line_expr\\s+.*return.* break here .*"]
 	    set re2_styled \
 		[multi_line \
 		     "#0\\s+$main_expr\\s+\\($arg_expr=.*" \
 		     "\\s+$arg_expr=$hex.*\\)\\s+at\\s+$file_expr" \
-		     "\[0-9\]+\\s+.*return.* break here .*"]
+		     "$line_expr\\s+.*return.* break here .*"]
 
 	    # The length of the line containing argv containing:
 	    # - 4 leading spaces
diff --git a/gdb/testsuite/gdb.base/sym-file.exp b/gdb/testsuite/gdb.base/sym-file.exp
index 3e36e65..17650cb 100644
--- a/gdb/testsuite/gdb.base/sym-file.exp
+++ b/gdb/testsuite/gdb.base/sym-file.exp
@@ -67,134 +67,156 @@ if {[prepare_for_testing "failed to prepare"  $binfile "$srcfile $srcfile2" $exe
 
 gdb_load_shlib ${lib_so}
 
-if {![runto_main]} {
-    return
-}
-
-# 1) Run to gdb_add_symbol_file in $srcfile for adding the library's
-#    symbols.
-gdb_breakpoint gdb_add_symbol_file
-gdb_continue_to_breakpoint gdb_add_symbol_file
-
-# 2) Set a pending breakpoint at bar in $srcfile3.
-set result [gdb_breakpoint bar allow-pending]
-if {!$result} {
-   return
-}
-
-# 3) Add the library's symbols using 'add-symbol-file'.
-set result [gdb_test "add-symbol-file ${lib_syms} addr" \
-		     "Reading symbols from .*${lib_syms}\\.\\.\\." \
-		     "add-symbol-file ${lib_basename}.so addr" \
-		     "add symbol table from file \".*${lib_basename}\\.so\"\
- at.*\\(y or n\\) " \
-		     "y"]
-if {$result != 0} {
-   return
-}
-
-# 4) 'info files' must display $srcfile3.
-gdb_test "info files" \
-	 "^(?=(.*${lib_basename})).*" \
-	 "info files must display ${lib_basename}"
-
-# 5) Continue to bar in $srcfile3 to ensure that the breakpoint
-#    was bound correctly after adding $shilb_name.
-set lnum_bar [gdb_get_line_number "break at bar" $srcfile3]
-gdb_continue_to_breakpoint bar ".*${lib_basename}\\.c:$lnum_bar.*"
-
-# 6) Set a breakpoint at foo in $srcfile3.
-set result [gdb_breakpoint foo]
-if {!$result} {
-    return
-}
-
-# 7) Continue to foo in $srcfile3 to ensure that the breakpoint
-#    was bound correctly.
-set lnum_foo [gdb_get_line_number "break at foo" $srcfile3]
-gdb_continue_to_breakpoint foo ".*${lib_basename}\\.c:$lnum_foo.*"
-
-# 8) Set a breakpoint at gdb_remove_symbol_file in $srcfile for
-#    removing the library's symbols.
-set result [gdb_breakpoint gdb_remove_symbol_file]
-if {!$result} {
-    return
-}
+proc do_test { remove_expr } {
+    global lib_basename lib_syms srcfile srcfile3
 
-# 9) Continue to gdb_remove_symbol_file in $srcfile.
-gdb_continue_to_breakpoint gdb_remove_symbol_file
-
-# 10) Remove the library's symbols using 'remove-symbol-file'.
-set result [gdb_test "remove-symbol-file -a addr" \
-		     ""\
-		     "remove-symbol-file -a addr" \
-		     "Remove symbol table from file \".*${lib_basename}\\.so\"\\?\
-.*\\(y or n\\) " \
-		     "y"]
-if {$result != 0} {
-    return
-}
+    clean_restart $::binfile
 
-# 11) 'info files' must not display ${lib_basename}, anymore.
-gdb_test "info files" \
-	 "^(?!(.*${lib_basename})).*" \
-	 "info files must not display ${lib_basename}"
+    if {![runto_main]} {
+	return
+    }
 
-# 12) Check that the breakpoints at foo and bar are pending after
-#     removing the library's symbols.
-gdb_test "info breakpoints 3" \
-	 ".*PENDING.*" \
-	 "breakpoint at foo is pending"
-
-gdb_test "info breakpoints 4" \
-	 ".*PENDING.*" \
-	 "breakpoint at bar is pending"
-
-# 13) Check that the execution can continue without error.
-set lnum_reload [gdb_get_line_number "reload lib here"]
-gdb_breakpoint $lnum_reload
-gdb_continue_to_breakpoint reload ".*${srcfile}:$lnum_reload.*"
-
-# 14) Regression test for a stale breakpoints bug.  Check whether
-# unloading symbols manually without the program actually unloading
-# the library, when breakpoints are inserted doesn't leave stale
-# breakpoints behind.
-with_test_prefix "stale bkpts" {
-    # Force breakpoints always inserted.
-    gdb_test_no_output "set breakpoint always-inserted on"
-
-    # Get past the library reload.
+    # 1) Run to gdb_add_symbol_file in $srcfile for adding the library's
+    #    symbols.
+    gdb_breakpoint gdb_add_symbol_file
     gdb_continue_to_breakpoint gdb_add_symbol_file
 
-    # Load the library's symbols.
-    gdb_test "add-symbol-file ${lib_syms} addr" \
-	"Reading symbols from .*${lib_syms}\\.\\.\\." \
-	"add-symbol-file ${lib_basename}.so addr" \
-	"add symbol table from file \".*${lib_syms}\"\
+    # 2) Set a pending breakpoint at bar in $srcfile3.
+    set result [gdb_breakpoint bar allow-pending]
+    if {!$result} {
+	return
+    }
+
+    # 3) Add the library's symbols using 'add-symbol-file'.
+    set result [gdb_test "add-symbol-file ${lib_syms} addr" \
+		    "Reading symbols from .*${lib_syms}\\.\\.\\." \
+		    "add-symbol-file ${lib_basename}.so addr" \
+		    "add symbol table from file \".*${lib_basename}\\.so\"\
+ at.*\\(y or n\\) " \
+		    "y"]
+    if {$result != 0} {
+	return
+    }
+
+    # 4) 'info files' must display $srcfile3.
+    gdb_test "info files" \
+	"^(?=(.*${lib_basename})).*" \
+	"info files must display ${lib_basename}"
+
+    # 5) Continue to bar in $srcfile3 to ensure that the breakpoint
+    #    was bound correctly after adding $shilb_name.
+    set lnum_bar [gdb_get_line_number "break at bar" $srcfile3]
+    gdb_continue_to_breakpoint bar ".*${lib_basename}\\.c:$lnum_bar.*"
+
+    # 6) Set a breakpoint at foo in $srcfile3.
+    set result [gdb_breakpoint foo]
+    if {!$result} {
+	return
+    }
+
+    # 7) Continue to foo in $srcfile3 to ensure that the breakpoint
+    #    was bound correctly.
+    set lnum_foo [gdb_get_line_number "break at foo" $srcfile3]
+    gdb_continue_to_breakpoint foo ".*${lib_basename}\\.c:$lnum_foo.*"
+
+    # 8) Set a breakpoint at gdb_remove_symbol_file in $srcfile for
+    #    removing the library's symbols.
+    set result [gdb_breakpoint gdb_remove_symbol_file]
+    if {!$result} {
+	return
+    }
+
+    # 9) Continue to gdb_remove_symbol_file in $srcfile.
+    gdb_continue_to_breakpoint gdb_remove_symbol_file
+
+    # 10) Remove the library's symbols using 'remove-symbol-file'.
+    set result [gdb_test "remove-symbol-file ${remove_expr}" \
+		    ""\
+		    "remove-symbol-file" \
+		    "Remove symbol table from file \".*${lib_basename}\\.so\"\\?\
+.*\\(y or n\\) " \
+		    "y"]
+    if {$result != 0} {
+	return
+    }
+
+    # 11) 'info files' must not display ${lib_basename}, anymore.
+    gdb_test "info files" \
+	"^(?!(.*${lib_basename})).*" \
+	"info files must not display ${lib_basename}"
+
+    # 12) Check that the breakpoints at foo and bar are pending after
+    #     removing the library's symbols.
+    gdb_test "info breakpoints 3" \
+	".*PENDING.*" \
+	"breakpoint at foo is pending"
+
+    gdb_test "info breakpoints 4" \
+	".*PENDING.*" \
+	"breakpoint at bar is pending"
+
+    # 13) Check that the execution can continue without error.
+    set lnum_reload [gdb_get_line_number "reload lib here"]
+    gdb_breakpoint $lnum_reload
+    gdb_continue_to_breakpoint reload ".*${srcfile}:$lnum_reload.*"
+
+    # 14) Regression test for a stale breakpoints bug.  Check whether
+    # unloading symbols manually without the program actually unloading
+    # the library, when breakpoints are inserted doesn't leave stale
+    # breakpoints behind.
+    with_test_prefix "stale bkpts" {
+	# Force breakpoints always inserted.
+	gdb_test_no_output "set breakpoint always-inserted on"
+
+	# Get past the library reload.
+	gdb_continue_to_breakpoint gdb_add_symbol_file
+
+	# Load the library's symbols.
+	gdb_test "add-symbol-file ${lib_syms} addr" \
+	    "Reading symbols from .*${lib_syms}\\.\\.\\." \
+	    "add-symbol-file ${lib_basename}.so addr" \
+	    "add symbol table from file \".*${lib_syms}\"\
 at.*\\(y or n\\) " \
-	"y"
+	    "y"
 
-    # Set a breakpoint at baz, in the library.
-    gdb_breakpoint baz
+	# Set a breakpoint at baz, in the library.
+	gdb_breakpoint baz
 
-    gdb_test "info breakpoints 7" ".*y.*0x.*in baz.*" \
-	"breakpoint at baz is resolved"
+	gdb_test "info breakpoints 7" ".*y.*0x.*in baz.*" \
+	    "breakpoint at baz is resolved"
 
-    # Unload symbols manually without the program actually unloading
-    # the library.
-    gdb_test "remove-symbol-file -a addr" \
-	"" \
-	"remove-symbol-file -a addr" \
-	"Remove symbol table from file \".*${lib_basename}\\.so\"\\?\
+	# Unload symbols manually without the program actually unloading
+	# the library.
+	gdb_test "remove-symbol-file ${remove_expr}" \
+	    "" \
+	    "remove-symbol-file" \
+	    "Remove symbol table from file \".*${lib_basename}\\.so\"\\?\
 .*\\(y or n\\) " \
-	"y"
+	    "y"
+
+	gdb_test "info breakpoints 7" ".*PENDING.*" \
+	    "breakpoint at baz is pending"
 
-    gdb_test "info breakpoints 7" ".*PENDING.*" \
-	"breakpoint at baz is pending"
+	# Check that execution can continue without error.  If GDB leaves
+	# breakpoints behind, we'll get back a spurious SIGTRAP.
+	set lnum_end [gdb_get_line_number "end here"]
+	gdb_breakpoint $lnum_end
+	gdb_continue_to_breakpoint "end here" ".*end here.*"
+    }
+}
 
-    # Check that execution can continue without error.  If GDB leaves
-    # breakpoints behind, we'll get back a spurious SIGTRAP.
-    set lnum_end [gdb_get_line_number "end here"]
-    gdb_breakpoint $lnum_end
-    gdb_continue_to_breakpoint "end here" ".*end here.*"
+foreach remove_expr [list addr bar "bar + 0x10" "${lib_syms}" ] {
+    # Don't use full filenames in the test prefix.  Also, add '-a' to
+    # all the REMOVE_EXPR values which are addresses rather than
+    # filenames.
+    set prefix $remove_expr
+    if { $prefix == $lib_syms } {
+	set prefix [file tail $prefix]
+    } else {
+	set remove_expr "-a $remove_expr"
+    }
+
+    with_test_prefix "remove_expr=$prefix" {
+	do_test $remove_expr
+    }
 }
diff --git a/gdb/testsuite/gdb.base/sysroot-debug-lookup.exp b/gdb/testsuite/gdb.base/sysroot-debug-lookup.exp
index 36f6519..80cad95 100644
--- a/gdb/testsuite/gdb.base/sysroot-debug-lookup.exp
+++ b/gdb/testsuite/gdb.base/sysroot-debug-lookup.exp
@@ -171,24 +171,9 @@ proc_with_prefix lookup_via_debuglink {} {
 	# in the sysroot.
 	gdb_file_cmd ${sysroot_prefix}$exec_in_sysroot
 
-	# Giving a sysroot a 'target:' prefix doesn't seem to work as
-	# might be expected for debug-link based lookups.  For this
-	# style of lookup GDB only seems to care if the original file
-	# itself had a 'target:' prefix.  The 'target:' prefix on the
-	# sysroot just seems to cause GDB to bail on looking up via
-	# the 'target:' prefixed sysroot.
-	#
-	# Bug PR gdb/30866 seems to be the (or a) relevant bug for
-	# this problem.
-	if { $sysroot_prefix ne "" } {
-	    setup_kfail "*-*-*" 31804
-	}
 	gdb_assert { $::gdb_file_cmd_debug_info eq "debug" } \
 	    "ensure debug information was found"
 
-	if { $sysroot_prefix ne "" } {
-	    setup_kfail "*-*-*" 31804
-	}
 	set re [string_to_regexp "Reading symbols from ${sysroot_prefix}$debug_symlink..."]
 	gdb_assert {[regexp $re $::gdb_file_cmd_msg]} \
 	    "debug symbols read from correct file"
diff --git a/gdb/testsuite/gdb.base/testenv.exp b/gdb/testsuite/gdb.base/testenv.exp
index 847647e..908918a 100644
--- a/gdb/testsuite/gdb.base/testenv.exp
+++ b/gdb/testsuite/gdb.base/testenv.exp
@@ -68,7 +68,7 @@ proc find_env {varname} {
 	    }
 	    -re "$gdb_prompt $" {
 		# If this fails, bail out, otherwise we get stuck in
-		# an infinite loop.  The caller will end up emiting a
+		# an infinite loop.  The caller will end up emitting a
 		# FAIL.
 		return "<fail>"
 	    }
diff --git a/gdb/testsuite/gdb.base/watchpoint-stops-at-right-insn.exp b/gdb/testsuite/gdb.base/watchpoint-stops-at-right-insn.exp
index 30fa12e..154514f 100644
--- a/gdb/testsuite/gdb.base/watchpoint-stops-at-right-insn.exp
+++ b/gdb/testsuite/gdb.base/watchpoint-stops-at-right-insn.exp
@@ -62,7 +62,7 @@
 #
 # If the target has non-continuable watchpoints, while GDB thinks it
 # has continuable watchpoints, GDB will see a watchpoint trigger,
-# notice no value changed, and immediatly continue the target.  Now,
+# notice no value changed, and immediately continue the target.  Now,
 # either the target manages to step-over the watchpoint transparently,
 # and GDB thus fails to present to value change to the user, or, the
 # watchpoint will keep re-triggering, with the program never making
diff --git a/gdb/testsuite/gdb.base/whatis-ptype-typedefs.exp b/gdb/testsuite/gdb.base/whatis-ptype-typedefs.exp
index ebe009a..7088299 100644
--- a/gdb/testsuite/gdb.base/whatis-ptype-typedefs.exp
+++ b/gdb/testsuite/gdb.base/whatis-ptype-typedefs.exp
@@ -55,7 +55,7 @@ proc prepare {lang} {
     return 1
 }
 
-# The following list is layed out as a table.  It is composed by
+# The following list is laid out as a table.  It is composed by
 # sub-lists (lines), with each line representing one whatis/ptype
 # test.  The sub-list (line) elements (columns) are (in order):
 #
diff --git a/gdb/testsuite/gdb.base/wrap-line.exp b/gdb/testsuite/gdb.base/wrap-line.exp
index b0931a3..323cd6c 100644
--- a/gdb/testsuite/gdb.base/wrap-line.exp
+++ b/gdb/testsuite/gdb.base/wrap-line.exp
@@ -19,8 +19,10 @@
 # build == host.
 require {!is_remote host}
 
-# Test both ansi (no auto-wrap) and xterm (auto-wrap).
-set terms {ansi xterm}
+# Test both ansi (no auto-wrap) and xterm (auto-wrap).  Also test dumb, which
+# shows the effective behaviour on stub-termcap systems, regardless of the
+# TERM setting.
+set terms {ansi xterm dumb}
 
 # Fill line, assuming we start after the gdb prompt.
 proc fill_line { width } {
@@ -44,9 +46,11 @@ proc get_screen_width { } {
     upvar gdb_width gdb_width
     upvar readline_width readline_width
     upvar env_width env_width
+    upvar wrap_mode wrap_mode
     set gdb_width 0
     set readline_width 0
     set env_width 0
+    set wrap_mode ""
     set re1 "Number of characters gdb thinks are in a line is ($::decimal)\[^\r\n\]*\\."
     set re2 \
 	"Number of characters readline reports are in a line is ($::decimal)\[^\r\n\]*\\."
@@ -54,6 +58,7 @@ proc get_screen_width { } {
 	"Number of characters curses thinks are in a line is $::decimal\\."
     set re4 \
 	"Number of characters environment thinks are in a line is ($::decimal) \\(COLUMNS\\)."
+    set re5 [string cat "Readline wrapping mode: (\[^\r\n]*\)\\."]
     set cmd "maint info screen"
     set re \
 	[multi_line \
@@ -61,12 +66,14 @@ proc get_screen_width { } {
 	     $re2 \
 	     "(?:$re3" \
 	     ")?$re4" \
-	     .*]
+	     .* \
+	     $re5]
     gdb_test_multiple $cmd  "" {
 	-re -wrap $re {
 	    set gdb_width $expect_out(1,string)
 	    set readline_width $expect_out(2,string)
 	    set env_width $expect_out(3,string)
+	    set wrap_mode $expect_out(4,string)
 	    pass $gdb_test_name
 	}
     }
@@ -79,10 +86,16 @@ proc test_wrap { width_auto_detected } {
 
     get_screen_width
 
-    if { $::term == "xterm" } {
+    set wrap_mode_terminal "terminal (terminal is auto wrap capable)"
+    set wrap_mode_readline \
+	"readline (terminal is not auto wrap capable, last column reserved)"
+    set have_wrap 1
+    if { $wrap_mode == $wrap_mode_terminal } {
 	gdb_assert { $gdb_width == $readline_width }
-    } else {
+    } elseif { $wrap_mode == $wrap_mode_readline } {
 	gdb_assert { $gdb_width == [expr $readline_width + 1] }
+    } else {
+	set have_wrap 0
     }
 
     gdb_assert { $gdb_width == $env_width } "width"
@@ -113,7 +126,10 @@ proc test_wrap { width_auto_detected } {
 
     gdb_test_multiple "" "wrap" {
 	-re $re {
-	    pass $gdb_test_name
+	    gdb_assert {$have_wrap} $gdb_test_name
+	}
+	-re "\r<.*" {
+	    gdb_assert {!$have_wrap} $gdb_test_name
 	}
     }
 
diff --git a/gdb/testsuite/gdb.arch/i386-mpx-simple_segv.c b/gdb/testsuite/gdb.btrace/event-tracing-gap.c
index 6843317..b04f74d 100644
--- a/gdb/testsuite/gdb.arch/i386-mpx-simple_segv.c
+++ b/gdb/testsuite/gdb.btrace/event-tracing-gap.c
@@ -1,6 +1,6 @@
-/* Copyright (C) 2015-2024 Free Software Foundation, Inc.
+/* This testcase is part of GDB, the GNU debugger.
 
-   Contributed by Intel Corp. <walfred.tedeschi@intel.com>
+   Copyright 2024 Free Software Foundation, Inc.
 
    This program is free software; you can redistribute it and/or modify
    it under the terms of the GNU General Public License as published by
@@ -15,22 +15,18 @@
    You should have received a copy of the GNU General Public License
    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
 
-#define OUR_SIZE    5
-
-void
-upper (int * p, int len)
+static int
+square (int num)
 {
-  int value;
-  len++;			/* b0-size-test.  */
-  value = *(p + len);
+  return num * num;  /* bp1.  */
 }
 
 int
 main (void)
 {
-  int a = 0;			/* Dummy variable for debugging purposes.  */
-  int sx[OUR_SIZE];
-  a++;				/* register-eval.  */
-  upper (sx, OUR_SIZE + 2);
-  return sx[1];
+  int a = 2;
+  int ans = 0;
+
+  ans = square (a);
+  return 0;  /* bp2.  */
 }
diff --git a/gdb/testsuite/gdb.btrace/event-tracing-gap.exp b/gdb/testsuite/gdb.btrace/event-tracing-gap.exp
new file mode 100644
index 0000000..d33e8e8
--- /dev/null
+++ b/gdb/testsuite/gdb.btrace/event-tracing-gap.exp
@@ -0,0 +1,75 @@
+# This testcase is part of GDB, the GNU debugger.
+#
+# Copyright 2024 Free Software Foundation, Inc.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
+# Test event tracing with gaps.
+
+require allow_btrace_pt_event_trace_tests
+
+standard_testfile
+
+if {[prepare_for_testing "failed to prepare" $testfile $srcfile]} {
+    return -1
+}
+
+if {![runto_main]} {
+    return -1
+}
+
+gdb_test_no_output "set record btrace pt event-tracing on"
+gdb_test_no_output "record btrace pt"
+
+set bp_1 [gdb_get_line_number "bp1"]
+set bp_2 [gdb_get_line_number "bp2"]
+gdb_breakpoint $bp_1
+gdb_breakpoint $bp_2
+
+gdb_test "next"
+
+# Inferior calls and return commands will create gaps in the recording.
+gdb_test "call square (3)" [multi_line \
+    "" \
+    "Breakpoint $decimal, square \\(num=3\\) at \[^\r\n\]+:$bp_1" \
+    "$decimal.*bp1.*" \
+    "The program being debugged stopped while in a function called from GDB\\." \
+    "Evaluation of the expression containing the function" \
+    "\\(square\\) will be abandoned\\." \
+    "When the function is done executing, GDB will silently stop\\."]
+
+gdb_test "return 9" "0.*main.*" \
+    "return" \
+    "Make.*return now\\? \\(y or n\\) " "y"
+
+gdb_continue_to_breakpoint "break at bp_1" ".*$srcfile:$bp_1.*"
+gdb_continue_to_breakpoint "break at bp_2" ".*$srcfile:$bp_2.*"
+
+# We should have 2 gaps and events for each breakpoint we hit.
+# Note that due to the asynchronous nature of certain events, we use
+# gdb_test_sequence and check only for events that we can control.
+gdb_test_sequence "record function-call-history" "function-call-history" {
+    "\[0-9\]+\tmain"
+    "\\\[iret(: ip = $hex)?\\\]"
+    "\[0-9\]+\t\\\[non-contiguous\\\]"
+    "\[0-9\]+\tsquare"
+    "\\\[interrupt: vector = 0x3 \\\(#bp\\\)(, ip = 0x\[0-9a-fA-F\]+)?\\\]"
+    "\\\[iret(: ip = $hex)?\\\]"
+    "\[0-9\]+\t\\\[non-contiguous\\\]"
+    "\[0-9\]+\tmain"
+    "\[0-9\]+\tsquare"
+    "\\\[interrupt: vector = 0x3 \\\(#bp\\\)(, ip = 0x\[0-9a-fA-F\]+)?\\\]"
+    "\\\[iret(: ip = $hex)?\\\]"
+    "\[0-9\]+\tmain"
+}
diff --git a/gdb/testsuite/gdb.btrace/event-tracing.exp b/gdb/testsuite/gdb.btrace/event-tracing.exp
new file mode 100644
index 0000000..1a5eee0
--- /dev/null
+++ b/gdb/testsuite/gdb.btrace/event-tracing.exp
@@ -0,0 +1,52 @@
+# This testcase is part of GDB, the GNU debugger.
+#
+# Copyright 2024 Free Software Foundation, Inc.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
+# Test basic Intel PT event tracing
+
+require allow_btrace_pt_event_trace_tests
+
+standard_testfile null-deref.c
+
+if {[prepare_for_testing "failed to prepare" $testfile $srcfile]} {
+    return -1
+}
+
+if {![runto_main]} {
+    return -1
+}
+
+gdb_test_no_output "set record btrace pt event-tracing on"
+gdb_test_no_output "record btrace pt"
+
+gdb_test "continue" "Program received signal SIGSEGV, Segmentation fault.*"
+
+# Test printing of at least one INTERRUPT and one IRET event.
+# This uses test_sequence to avoid random events failing the tests.
+gdb_test_sequence "record function-call-history" "function-call-history" {
+    "\[0-9\]+\tmain"
+    "\t  \\\[iret(: ip = $hex)?\\\]"
+    "\t  \\\[interrupt: vector = 0xe \\\(#pf\\\)(, cr2 = 0x0)?(, ip = 0x\[0-9a-fA-F\]+)?\\\]"
+}
+
+# Test the instruction-history.  Assembly can differ between compilers. To
+# avoid creating a .S file for this test we just check the event at the end.
+gdb_test "record instruction-history" \
+  "$decimal\t     \\\[interrupt: vector = 0xe \\\(#pf\\\)(, cr2 = 0x0)?(, ip = $hex)?\\\]"
+
+# Test reverse stepping and replay stepping
+gdb_test "reverse-stepi" "\\\[interrupt: vector = 0xe \\\(#pf\\\)(, cr2 = 0x0)?(, ip = $hex)?\\\].*"
+gdb_test "stepi" "\\\[interrupt: vector = 0xe \\\(#pf\\\)(, cr2 = 0x0)?(, ip = $hex)?\\\].*"
diff --git a/gdb/testsuite/gdb.btrace/i386-ptwrite.S b/gdb/testsuite/gdb.btrace/i386-ptwrite.S
new file mode 100644
index 0000000..5c649cf
--- /dev/null
+++ b/gdb/testsuite/gdb.btrace/i386-ptwrite.S
@@ -0,0 +1,550 @@
+/* This testcase is part of GDB, the GNU debugger.
+
+   Copyright 2024 Free Software Foundation, Inc.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
+
+   This file has been generated using gcc version 10.3.1 20210422
+   (Red Hat 10.3.1-1):
+   gcc -S -dA -g -m32 -mptwrite ptwrite.c -o i386-ptwrite.S.  */
+
+
+	.file	"ptwrite.c"
+	.text
+.Ltext0:
+	.globl	ptwrite1
+	.type	ptwrite1, @function
+ptwrite1:
+.LFB4021:
+	.file 1 "ptwrite.c"
+	# ptwrite.c:22:1
+	.loc 1 22 1
+	.cfi_startproc
+# BLOCK 2 seq:0
+# PRED: ENTRY (FALLTHRU)
+	pushl	%ebp
+	.cfi_def_cfa_offset 8
+	.cfi_offset 5, -8
+	movl	%esp, %ebp
+	.cfi_def_cfa_register 5
+	subl	$16, %esp
+	# ptwrite.c:23:3
+	.loc 1 23 3
+	movl	8(%ebp), %eax
+	movl	%eax, -4(%ebp)
+.LBB6:
+.LBB7:
+	.file 2 "/usr/lib/gcc/x86_64-redhat-linux/10/include/immintrin.h"
+	# /usr/lib/gcc/x86_64-redhat-linux/10/include/immintrin.h:307:3
+	.loc 2 307 3
+	movl	-4(%ebp), %eax
+	ptwrite	%eax
+	# /usr/lib/gcc/x86_64-redhat-linux/10/include/immintrin.h:308:1
+	.loc 2 308 1
+	nop
+.LBE7:
+.LBE6:
+	# ptwrite.c:24:1
+	.loc 1 24 1
+	nop
+	leave
+	.cfi_restore 5
+	.cfi_def_cfa 4, 4
+# SUCC: EXIT [always]
+	ret
+	.cfi_endproc
+.LFE4021:
+	.size	ptwrite1, .-ptwrite1
+	.globl	ptwrite2
+	.type	ptwrite2, @function
+ptwrite2:
+.LFB4022:
+	# ptwrite.c:28:1
+	.loc 1 28 1
+	.cfi_startproc
+# BLOCK 2 seq:0
+# PRED: ENTRY (FALLTHRU)
+	pushl	%ebp
+	.cfi_def_cfa_offset 8
+	.cfi_offset 5, -8
+	movl	%esp, %ebp
+	.cfi_def_cfa_register 5
+	subl	$16, %esp
+	# ptwrite.c:29:3
+	.loc 1 29 3
+	movl	8(%ebp), %eax
+	movl	%eax, -4(%ebp)
+.LBB8:
+.LBB9:
+	# /usr/lib/gcc/x86_64-redhat-linux/10/include/immintrin.h:307:3
+	.loc 2 307 3
+	movl	-4(%ebp), %eax
+	ptwrite	%eax
+	# /usr/lib/gcc/x86_64-redhat-linux/10/include/immintrin.h:308:1
+	.loc 2 308 1
+	nop
+.LBE9:
+.LBE8:
+	# ptwrite.c:30:1
+	.loc 1 30 1
+	nop
+	leave
+	.cfi_restore 5
+	.cfi_def_cfa 4, 4
+# SUCC: EXIT [always]
+	ret
+	.cfi_endproc
+.LFE4022:
+	.size	ptwrite2, .-ptwrite2
+	.globl	main
+	.type	main, @function
+main:
+.LFB4023:
+	# ptwrite.c:34:1
+	.loc 1 34 1
+	.cfi_startproc
+# BLOCK 2 seq:0
+# PRED: ENTRY (FALLTHRU)
+	pushl	%ebp
+	.cfi_def_cfa_offset 8
+	.cfi_offset 5, -8
+	movl	%esp, %ebp
+	.cfi_def_cfa_register 5
+	# ptwrite.c:35:3
+	.loc 1 35 3
+	pushl	$66
+	call	ptwrite1
+	addl	$4, %esp
+	# ptwrite.c:36:3
+	.loc 1 36 3
+	pushl	$67
+	call	ptwrite2
+	addl	$4, %esp
+	# ptwrite.c:38:10
+	.loc 1 38 10
+	movl	$0, %eax
+	# ptwrite.c:39:1
+	.loc 1 39 1
+	leave
+	.cfi_restore 5
+	.cfi_def_cfa 4, 4
+# SUCC: EXIT [always]
+	ret
+	.cfi_endproc
+.LFE4023:
+	.size	main, .-main
+.Letext0:
+	.section	.debug_info,"",@progbits
+.Ldebug_info0:
+	.long	0x129	# Length of Compilation Unit Info
+	.value	0x4	# DWARF version number
+	.long	.Ldebug_abbrev0	# Offset Into Abbrev. Section
+	.byte	0x4	# Pointer Size (in bytes)
+	.uleb128 0x1	# (DIE (0xb) DW_TAG_compile_unit)
+	.long	.LASF15	# DW_AT_producer: "GNU C17 10.3.1 20210422 (Red Hat 10.3.1-1) -m32 -mptwrite -mtune=generic -march=i686 -g"
+	.byte	0xc	# DW_AT_language
+	.long	.LASF16	# DW_AT_name: "ptwrite.c"
+	.long	.LASF17	# DW_AT_comp_dir: "gdb/gdb/testsuite/gdb.btrace"
+	.long	.Ltext0	# DW_AT_low_pc
+	.long	.Letext0-.Ltext0	# DW_AT_high_pc
+	.long	.Ldebug_line0	# DW_AT_stmt_list
+	.uleb128 0x2	# (DIE (0x25) DW_TAG_base_type)
+	.byte	0x4	# DW_AT_byte_size
+	.byte	0x5	# DW_AT_encoding
+	.ascii "int\0"	# DW_AT_name
+	.uleb128 0x3	# (DIE (0x2c) DW_TAG_base_type)
+	.byte	0x2	# DW_AT_byte_size
+	.byte	0x5	# DW_AT_encoding
+	.long	.LASF0	# DW_AT_name: "short int"
+	.uleb128 0x3	# (DIE (0x33) DW_TAG_base_type)
+	.byte	0x1	# DW_AT_byte_size
+	.byte	0x6	# DW_AT_encoding
+	.long	.LASF1	# DW_AT_name: "char"
+	.uleb128 0x3	# (DIE (0x3a) DW_TAG_base_type)
+	.byte	0x8	# DW_AT_byte_size
+	.byte	0x5	# DW_AT_encoding
+	.long	.LASF2	# DW_AT_name: "long long int"
+	.uleb128 0x3	# (DIE (0x41) DW_TAG_base_type)
+	.byte	0x4	# DW_AT_byte_size
+	.byte	0x4	# DW_AT_encoding
+	.long	.LASF3	# DW_AT_name: "float"
+	.uleb128 0x3	# (DIE (0x48) DW_TAG_base_type)
+	.byte	0x4	# DW_AT_byte_size
+	.byte	0x7	# DW_AT_encoding
+	.long	.LASF4	# DW_AT_name: "unsigned int"
+	.uleb128 0x3	# (DIE (0x4f) DW_TAG_base_type)
+	.byte	0x4	# DW_AT_byte_size
+	.byte	0x5	# DW_AT_encoding
+	.long	.LASF5	# DW_AT_name: "long int"
+	.uleb128 0x3	# (DIE (0x56) DW_TAG_base_type)
+	.byte	0x1	# DW_AT_byte_size
+	.byte	0x8	# DW_AT_encoding
+	.long	.LASF6	# DW_AT_name: "unsigned char"
+	.uleb128 0x3	# (DIE (0x5d) DW_TAG_base_type)
+	.byte	0x2	# DW_AT_byte_size
+	.byte	0x7	# DW_AT_encoding
+	.long	.LASF7	# DW_AT_name: "short unsigned int"
+	.uleb128 0x3	# (DIE (0x64) DW_TAG_base_type)
+	.byte	0x4	# DW_AT_byte_size
+	.byte	0x7	# DW_AT_encoding
+	.long	.LASF8	# DW_AT_name: "long unsigned int"
+	.uleb128 0x3	# (DIE (0x6b) DW_TAG_base_type)
+	.byte	0x1	# DW_AT_byte_size
+	.byte	0x6	# DW_AT_encoding
+	.long	.LASF9	# DW_AT_name: "signed char"
+	.uleb128 0x3	# (DIE (0x72) DW_TAG_base_type)
+	.byte	0x8	# DW_AT_byte_size
+	.byte	0x7	# DW_AT_encoding
+	.long	.LASF10	# DW_AT_name: "long long unsigned int"
+	.uleb128 0x3	# (DIE (0x79) DW_TAG_base_type)
+	.byte	0x8	# DW_AT_byte_size
+	.byte	0x4	# DW_AT_encoding
+	.long	.LASF11	# DW_AT_name: "double"
+	.uleb128 0x4	# (DIE (0x80) DW_TAG_subprogram)
+			# DW_AT_external
+	.long	.LASF18	# DW_AT_name: "main"
+	.byte	0x1	# DW_AT_decl_file (ptwrite.c)
+	.byte	0x21	# DW_AT_decl_line
+	.byte	0x1	# DW_AT_decl_column
+			# DW_AT_prototyped
+	.long	0x25	# DW_AT_type
+	.long	.LFB4023	# DW_AT_low_pc
+	.long	.LFE4023-.LFB4023	# DW_AT_high_pc
+	.uleb128 0x1	# DW_AT_frame_base
+	.byte	0x9c	# DW_OP_call_frame_cfa
+			# DW_AT_GNU_all_tail_call_sites
+	.uleb128 0x5	# (DIE (0x96) DW_TAG_subprogram)
+			# DW_AT_external
+	.long	.LASF12	# DW_AT_name: "ptwrite2"
+	.byte	0x1	# DW_AT_decl_file (ptwrite.c)
+	.byte	0x1b	# DW_AT_decl_line
+	.byte	0x1	# DW_AT_decl_column
+			# DW_AT_prototyped
+	.long	.LFB4022	# DW_AT_low_pc
+	.long	.LFE4022-.LFB4022	# DW_AT_high_pc
+	.uleb128 0x1	# DW_AT_frame_base
+	.byte	0x9c	# DW_OP_call_frame_cfa
+			# DW_AT_GNU_all_call_sites
+	.long	0xd5	# DW_AT_sibling
+	.uleb128 0x6	# (DIE (0xac) DW_TAG_formal_parameter)
+	.long	.LASF14	# DW_AT_name: "value"
+	.byte	0x1	# DW_AT_decl_file (ptwrite.c)
+	.byte	0x1b	# DW_AT_decl_line
+	.byte	0xf	# DW_AT_decl_column
+	.long	0x25	# DW_AT_type
+	.uleb128 0x2	# DW_AT_location
+	.byte	0x91	# DW_OP_fbreg
+	.sleb128 0
+	.uleb128 0x7	# (DIE (0xbb) DW_TAG_inlined_subroutine)
+	.long	0x114	# DW_AT_abstract_origin
+	.long	.LBB8	# DW_AT_low_pc
+	.long	.LBE8-.LBB8	# DW_AT_high_pc
+	.byte	0x1	# DW_AT_call_file (ptwrite.c)
+	.byte	0x1d	# DW_AT_call_line
+	.byte	0x3	# DW_AT_call_column
+	.uleb128 0x8	# (DIE (0xcb) DW_TAG_formal_parameter)
+	.long	0x11e	# DW_AT_abstract_origin
+	.uleb128 0x2	# DW_AT_location
+	.byte	0x91	# DW_OP_fbreg
+	.sleb128 -12
+	.byte	0	# end of children of DIE 0xbb
+	.byte	0	# end of children of DIE 0x96
+	.uleb128 0x5	# (DIE (0xd5) DW_TAG_subprogram)
+			# DW_AT_external
+	.long	.LASF13	# DW_AT_name: "ptwrite1"
+	.byte	0x1	# DW_AT_decl_file (ptwrite.c)
+	.byte	0x15	# DW_AT_decl_line
+	.byte	0x1	# DW_AT_decl_column
+			# DW_AT_prototyped
+	.long	.LFB4021	# DW_AT_low_pc
+	.long	.LFE4021-.LFB4021	# DW_AT_high_pc
+	.uleb128 0x1	# DW_AT_frame_base
+	.byte	0x9c	# DW_OP_call_frame_cfa
+			# DW_AT_GNU_all_call_sites
+	.long	0x114	# DW_AT_sibling
+	.uleb128 0x6	# (DIE (0xeb) DW_TAG_formal_parameter)
+	.long	.LASF14	# DW_AT_name: "value"
+	.byte	0x1	# DW_AT_decl_file (ptwrite.c)
+	.byte	0x15	# DW_AT_decl_line
+	.byte	0xf	# DW_AT_decl_column
+	.long	0x25	# DW_AT_type
+	.uleb128 0x2	# DW_AT_location
+	.byte	0x91	# DW_OP_fbreg
+	.sleb128 0
+	.uleb128 0x7	# (DIE (0xfa) DW_TAG_inlined_subroutine)
+	.long	0x114	# DW_AT_abstract_origin
+	.long	.LBB6	# DW_AT_low_pc
+	.long	.LBE6-.LBB6	# DW_AT_high_pc
+	.byte	0x1	# DW_AT_call_file (ptwrite.c)
+	.byte	0x17	# DW_AT_call_line
+	.byte	0x3	# DW_AT_call_column
+	.uleb128 0x8	# (DIE (0x10a) DW_TAG_formal_parameter)
+	.long	0x11e	# DW_AT_abstract_origin
+	.uleb128 0x2	# DW_AT_location
+	.byte	0x91	# DW_OP_fbreg
+	.sleb128 -12
+	.byte	0	# end of children of DIE 0xfa
+	.byte	0	# end of children of DIE 0xd5
+	.uleb128 0x9	# (DIE (0x114) DW_TAG_subprogram)
+			# DW_AT_external
+	.long	.LASF19	# DW_AT_name: "_ptwrite32"
+	.byte	0x2	# DW_AT_decl_file (/usr/lib/gcc/x86_64-redhat-linux/10/include/immintrin.h)
+	.value	0x131	# DW_AT_decl_line
+	.byte	0x1	# DW_AT_decl_column
+			# DW_AT_prototyped
+	.byte	0x3	# DW_AT_inline
+			# DW_AT_artificial
+	.uleb128 0xa	# (DIE (0x11e) DW_TAG_formal_parameter)
+	.ascii "__B\0"	# DW_AT_name
+	.byte	0x2	# DW_AT_decl_file (/usr/lib/gcc/x86_64-redhat-linux/10/include/immintrin.h)
+	.value	0x131	# DW_AT_decl_line
+	.byte	0x16	# DW_AT_decl_column
+	.long	0x48	# DW_AT_type
+	.byte	0	# end of children of DIE 0x114
+	.byte	0	# end of children of DIE 0xb
+	.section	.debug_abbrev,"",@progbits
+.Ldebug_abbrev0:
+	.uleb128 0x1	# (abbrev code)
+	.uleb128 0x11	# (TAG: DW_TAG_compile_unit)
+	.byte	0x1	# DW_children_yes
+	.uleb128 0x25	# (DW_AT_producer)
+	.uleb128 0xe	# (DW_FORM_strp)
+	.uleb128 0x13	# (DW_AT_language)
+	.uleb128 0xb	# (DW_FORM_data1)
+	.uleb128 0x3	# (DW_AT_name)
+	.uleb128 0xe	# (DW_FORM_strp)
+	.uleb128 0x1b	# (DW_AT_comp_dir)
+	.uleb128 0xe	# (DW_FORM_strp)
+	.uleb128 0x11	# (DW_AT_low_pc)
+	.uleb128 0x1	# (DW_FORM_addr)
+	.uleb128 0x12	# (DW_AT_high_pc)
+	.uleb128 0x6	# (DW_FORM_data4)
+	.uleb128 0x10	# (DW_AT_stmt_list)
+	.uleb128 0x17	# (DW_FORM_sec_offset)
+	.byte	0
+	.byte	0
+	.uleb128 0x2	# (abbrev code)
+	.uleb128 0x24	# (TAG: DW_TAG_base_type)
+	.byte	0	# DW_children_no
+	.uleb128 0xb	# (DW_AT_byte_size)
+	.uleb128 0xb	# (DW_FORM_data1)
+	.uleb128 0x3e	# (DW_AT_encoding)
+	.uleb128 0xb	# (DW_FORM_data1)
+	.uleb128 0x3	# (DW_AT_name)
+	.uleb128 0x8	# (DW_FORM_string)
+	.byte	0
+	.byte	0
+	.uleb128 0x3	# (abbrev code)
+	.uleb128 0x24	# (TAG: DW_TAG_base_type)
+	.byte	0	# DW_children_no
+	.uleb128 0xb	# (DW_AT_byte_size)
+	.uleb128 0xb	# (DW_FORM_data1)
+	.uleb128 0x3e	# (DW_AT_encoding)
+	.uleb128 0xb	# (DW_FORM_data1)
+	.uleb128 0x3	# (DW_AT_name)
+	.uleb128 0xe	# (DW_FORM_strp)
+	.byte	0
+	.byte	0
+	.uleb128 0x4	# (abbrev code)
+	.uleb128 0x2e	# (TAG: DW_TAG_subprogram)
+	.byte	0	# DW_children_no
+	.uleb128 0x3f	# (DW_AT_external)
+	.uleb128 0x19	# (DW_FORM_flag_present)
+	.uleb128 0x3	# (DW_AT_name)
+	.uleb128 0xe	# (DW_FORM_strp)
+	.uleb128 0x3a	# (DW_AT_decl_file)
+	.uleb128 0xb	# (DW_FORM_data1)
+	.uleb128 0x3b	# (DW_AT_decl_line)
+	.uleb128 0xb	# (DW_FORM_data1)
+	.uleb128 0x39	# (DW_AT_decl_column)
+	.uleb128 0xb	# (DW_FORM_data1)
+	.uleb128 0x27	# (DW_AT_prototyped)
+	.uleb128 0x19	# (DW_FORM_flag_present)
+	.uleb128 0x49	# (DW_AT_type)
+	.uleb128 0x13	# (DW_FORM_ref4)
+	.uleb128 0x11	# (DW_AT_low_pc)
+	.uleb128 0x1	# (DW_FORM_addr)
+	.uleb128 0x12	# (DW_AT_high_pc)
+	.uleb128 0x6	# (DW_FORM_data4)
+	.uleb128 0x40	# (DW_AT_frame_base)
+	.uleb128 0x18	# (DW_FORM_exprloc)
+	.uleb128 0x2116	# (DW_AT_GNU_all_tail_call_sites)
+	.uleb128 0x19	# (DW_FORM_flag_present)
+	.byte	0
+	.byte	0
+	.uleb128 0x5	# (abbrev code)
+	.uleb128 0x2e	# (TAG: DW_TAG_subprogram)
+	.byte	0x1	# DW_children_yes
+	.uleb128 0x3f	# (DW_AT_external)
+	.uleb128 0x19	# (DW_FORM_flag_present)
+	.uleb128 0x3	# (DW_AT_name)
+	.uleb128 0xe	# (DW_FORM_strp)
+	.uleb128 0x3a	# (DW_AT_decl_file)
+	.uleb128 0xb	# (DW_FORM_data1)
+	.uleb128 0x3b	# (DW_AT_decl_line)
+	.uleb128 0xb	# (DW_FORM_data1)
+	.uleb128 0x39	# (DW_AT_decl_column)
+	.uleb128 0xb	# (DW_FORM_data1)
+	.uleb128 0x27	# (DW_AT_prototyped)
+	.uleb128 0x19	# (DW_FORM_flag_present)
+	.uleb128 0x11	# (DW_AT_low_pc)
+	.uleb128 0x1	# (DW_FORM_addr)
+	.uleb128 0x12	# (DW_AT_high_pc)
+	.uleb128 0x6	# (DW_FORM_data4)
+	.uleb128 0x40	# (DW_AT_frame_base)
+	.uleb128 0x18	# (DW_FORM_exprloc)
+	.uleb128 0x2117	# (DW_AT_GNU_all_call_sites)
+	.uleb128 0x19	# (DW_FORM_flag_present)
+	.uleb128 0x1	# (DW_AT_sibling)
+	.uleb128 0x13	# (DW_FORM_ref4)
+	.byte	0
+	.byte	0
+	.uleb128 0x6	# (abbrev code)
+	.uleb128 0x5	# (TAG: DW_TAG_formal_parameter)
+	.byte	0	# DW_children_no
+	.uleb128 0x3	# (DW_AT_name)
+	.uleb128 0xe	# (DW_FORM_strp)
+	.uleb128 0x3a	# (DW_AT_decl_file)
+	.uleb128 0xb	# (DW_FORM_data1)
+	.uleb128 0x3b	# (DW_AT_decl_line)
+	.uleb128 0xb	# (DW_FORM_data1)
+	.uleb128 0x39	# (DW_AT_decl_column)
+	.uleb128 0xb	# (DW_FORM_data1)
+	.uleb128 0x49	# (DW_AT_type)
+	.uleb128 0x13	# (DW_FORM_ref4)
+	.uleb128 0x2	# (DW_AT_location)
+	.uleb128 0x18	# (DW_FORM_exprloc)
+	.byte	0
+	.byte	0
+	.uleb128 0x7	# (abbrev code)
+	.uleb128 0x1d	# (TAG: DW_TAG_inlined_subroutine)
+	.byte	0x1	# DW_children_yes
+	.uleb128 0x31	# (DW_AT_abstract_origin)
+	.uleb128 0x13	# (DW_FORM_ref4)
+	.uleb128 0x11	# (DW_AT_low_pc)
+	.uleb128 0x1	# (DW_FORM_addr)
+	.uleb128 0x12	# (DW_AT_high_pc)
+	.uleb128 0x6	# (DW_FORM_data4)
+	.uleb128 0x58	# (DW_AT_call_file)
+	.uleb128 0xb	# (DW_FORM_data1)
+	.uleb128 0x59	# (DW_AT_call_line)
+	.uleb128 0xb	# (DW_FORM_data1)
+	.uleb128 0x57	# (DW_AT_call_column)
+	.uleb128 0xb	# (DW_FORM_data1)
+	.byte	0
+	.byte	0
+	.uleb128 0x8	# (abbrev code)
+	.uleb128 0x5	# (TAG: DW_TAG_formal_parameter)
+	.byte	0	# DW_children_no
+	.uleb128 0x31	# (DW_AT_abstract_origin)
+	.uleb128 0x13	# (DW_FORM_ref4)
+	.uleb128 0x2	# (DW_AT_location)
+	.uleb128 0x18	# (DW_FORM_exprloc)
+	.byte	0
+	.byte	0
+	.uleb128 0x9	# (abbrev code)
+	.uleb128 0x2e	# (TAG: DW_TAG_subprogram)
+	.byte	0x1	# DW_children_yes
+	.uleb128 0x3f	# (DW_AT_external)
+	.uleb128 0x19	# (DW_FORM_flag_present)
+	.uleb128 0x3	# (DW_AT_name)
+	.uleb128 0xe	# (DW_FORM_strp)
+	.uleb128 0x3a	# (DW_AT_decl_file)
+	.uleb128 0xb	# (DW_FORM_data1)
+	.uleb128 0x3b	# (DW_AT_decl_line)
+	.uleb128 0x5	# (DW_FORM_data2)
+	.uleb128 0x39	# (DW_AT_decl_column)
+	.uleb128 0xb	# (DW_FORM_data1)
+	.uleb128 0x27	# (DW_AT_prototyped)
+	.uleb128 0x19	# (DW_FORM_flag_present)
+	.uleb128 0x20	# (DW_AT_inline)
+	.uleb128 0xb	# (DW_FORM_data1)
+	.uleb128 0x34	# (DW_AT_artificial)
+	.uleb128 0x19	# (DW_FORM_flag_present)
+	.byte	0
+	.byte	0
+	.uleb128 0xa	# (abbrev code)
+	.uleb128 0x5	# (TAG: DW_TAG_formal_parameter)
+	.byte	0	# DW_children_no
+	.uleb128 0x3	# (DW_AT_name)
+	.uleb128 0x8	# (DW_FORM_string)
+	.uleb128 0x3a	# (DW_AT_decl_file)
+	.uleb128 0xb	# (DW_FORM_data1)
+	.uleb128 0x3b	# (DW_AT_decl_line)
+	.uleb128 0x5	# (DW_FORM_data2)
+	.uleb128 0x39	# (DW_AT_decl_column)
+	.uleb128 0xb	# (DW_FORM_data1)
+	.uleb128 0x49	# (DW_AT_type)
+	.uleb128 0x13	# (DW_FORM_ref4)
+	.byte	0
+	.byte	0
+	.byte	0
+	.section	.debug_aranges,"",@progbits
+	.long	0x1c	# Length of Address Ranges Info
+	.value	0x2	# DWARF aranges version
+	.long	.Ldebug_info0	# Offset of Compilation Unit Info
+	.byte	0x4	# Size of Address
+	.byte	0	# Size of Segment Descriptor
+	.value	0	# Pad to 8 byte boundary
+	.value	0
+	.long	.Ltext0	# Address
+	.long	.Letext0-.Ltext0	# Length
+	.long	0
+	.long	0
+	.section	.debug_line,"",@progbits
+.Ldebug_line0:
+	.section	.debug_str,"MS",@progbits,1
+.LASF2:
+	.string	"long long int"
+.LASF14:
+	.string	"value"
+.LASF19:
+	.string	"_ptwrite32"
+.LASF4:
+	.string	"unsigned int"
+.LASF17:
+	.string	"gdb/gdb/testsuite/gdb.btrace"
+.LASF18:
+	.string	"main"
+.LASF16:
+	.string	"ptwrite.c"
+.LASF8:
+	.string	"long unsigned int"
+.LASF10:
+	.string	"long long unsigned int"
+.LASF13:
+	.string	"ptwrite1"
+.LASF12:
+	.string	"ptwrite2"
+.LASF6:
+	.string	"unsigned char"
+.LASF1:
+	.string	"char"
+.LASF5:
+	.string	"long int"
+.LASF15:
+	.string	"GNU C17 10.3.1 20210422 (Red Hat 10.3.1-1) -m32 -mptwrite -mtune=generic -march=i686 -g"
+.LASF11:
+	.string	"double"
+.LASF7:
+	.string	"short unsigned int"
+.LASF9:
+	.string	"signed char"
+.LASF3:
+	.string	"float"
+.LASF0:
+	.string	"short int"
+	.ident	"GCC: (GNU) 10.3.1 20210422 (Red Hat 10.3.1-1)"
+	.section	.note.GNU-stack,"",@progbits
diff --git a/gdb/testsuite/gdb.btrace/multi-thread-step.exp b/gdb/testsuite/gdb.btrace/multi-thread-step.exp
index 154db9a..cd20e8a 100644
--- a/gdb/testsuite/gdb.btrace/multi-thread-step.exp
+++ b/gdb/testsuite/gdb.btrace/multi-thread-step.exp
@@ -111,14 +111,14 @@ proc test_cont {} {
     with_test_prefix "cont" {
         gdb_test "thread 1" ".*"
         with_test_prefix "thread 1" {
-            gdb_test "continue" "No more reverse-execution history.*"
+            gdb_test "continue" "Reached end of recorded history.*"
 
             check_not_replaying 1
             check_replay_insn 2 2
         }
         gdb_test "thread 2" ".*"
         with_test_prefix "thread 2" {
-            gdb_test "continue" "No more reverse-execution history.*"
+            gdb_test "continue" "Reached end of recorded history.*"
 
             check_not_replaying 1
             check_not_replaying 2
@@ -128,7 +128,7 @@ proc test_cont {} {
 
 proc test_cont_all {} {
     with_test_prefix "cont-all" {
-        gdb_test "continue" "No more reverse-execution history.*"
+        gdb_test "continue" "Reached end of recorded history.*"
 
         # this works because we're lock-stepping threads that executed exactly
         # the same code starting from the same instruction.
diff --git a/gdb/testsuite/gdb.btrace/nohist.exp b/gdb/testsuite/gdb.btrace/nohist.exp
index d719091..ac6a41c 100644
--- a/gdb/testsuite/gdb.btrace/nohist.exp
+++ b/gdb/testsuite/gdb.btrace/nohist.exp
@@ -42,7 +42,7 @@ with_test_prefix "forward" {
     check_not_replaying
 }
 
-gdb_test "reverse-continue" "No more reverse-execution history\.\r\n.*"
+gdb_test "reverse-continue" "Reached end of recorded history; stopping.*"
 
 with_test_prefix "backward" {
     check_not_replaying
diff --git a/gdb/testsuite/gdb.btrace/non-stop.exp b/gdb/testsuite/gdb.btrace/non-stop.exp
index 62c940e..8397c20 100644
--- a/gdb/testsuite/gdb.btrace/non-stop.exp
+++ b/gdb/testsuite/gdb.btrace/non-stop.exp
@@ -79,14 +79,26 @@ proc gdb_cont_to_bp_line { line threads nthreads } {
         $nthreads
 }
 
-proc gdb_cont_to_no_history { threads cmd nthreads } {
+proc gdb_cont_to_no_history_backward { threads cmd nthreads } {
     gdb_cont_to $threads $cmd \
-        [multi_line \
-             "No more reverse-execution history\." \
-             "\[^\\\r\\\n\]*" \
-             "\[^\\\r\\\n\]*" \
-            ] \
-        $nthreads
+	[multi_line \
+	     "Reached end of recorded history; stopping\." \
+	     "Backward execution from here not possible\." \
+	     "\[^\\\r\\\n\]*" \
+	     "\[^\\\r\\\n\]*" \
+	     ] \
+	$nthreads
+}
+
+proc gdb_cont_to_no_history_forward { threads cmd nthreads } {
+    gdb_cont_to $threads $cmd \
+	[multi_line \
+	     "Reached end of recorded history; stopping\." \
+	     "Following forward execution will be added to history\." \
+	     "\[^\\\r\\\n\]*" \
+	     "\[^\\\r\\\n\]*" \
+	    ] \
+	$nthreads
 }
 
 # trace the code between the two breakpoints
@@ -176,14 +188,14 @@ with_test_prefix "reverse-step" {
 with_test_prefix "continue" {
     with_test_prefix "thread 1" {
 	with_test_prefix "continue" {
-	    gdb_cont_to_no_history 1 "continue" 1
+	    gdb_cont_to_no_history_forward 1 "continue" 1
 	    gdb_test "thread apply 1 info record" \
 		".*Recorded \[0-9\]+ instructions \[^\\\r\\\n\]*"
 	    gdb_test "thread apply 2 info record" \
 		".*Replay in progress\.  At instruction 5\."
 	}
 	with_test_prefix "reverse-continue" {
-	    gdb_cont_to_no_history 1 "reverse-continue" 1
+	    gdb_cont_to_no_history_backward 1 "reverse-continue" 1
 	    gdb_test "thread apply 1 info record" \
 		".*Replay in progress\.  At instruction 1\."
 	    gdb_test "thread apply 2 info record" \
@@ -193,14 +205,14 @@ with_test_prefix "continue" {
 
     with_test_prefix "thread 2" {
 	with_test_prefix "continue" {
-	    gdb_cont_to_no_history 2 "continue" 1
+	    gdb_cont_to_no_history_forward 2 "continue" 1
 	    gdb_test "thread apply 1 info record" \
 		".*Replay in progress\.  At instruction 1\."
 	    gdb_test "thread apply 2 info record" \
 		".*Recorded \[0-9\]+ instructions \[^\\\r\\\n\]*"
 	}
 	with_test_prefix "reverse-continue" {
-	    gdb_cont_to_no_history 2 "reverse-continue" 1
+	    gdb_cont_to_no_history_backward 2 "reverse-continue" 1
 	    gdb_test "thread apply 1 info record" \
 		".*Replay in progress\.  At instruction 1\."
 	    gdb_test "thread apply 2 info record" \
@@ -215,8 +227,8 @@ with_test_prefix "no progress" {
         gdb_test "thread apply 1 record goto end" ".*"
         gdb_test "thread apply 2 record goto begin" ".*"
 
-        gdb_cont_to_no_history 1 "continue" 1
-        gdb_cont_to_no_history 1 "step" 1
+        gdb_cont_to_no_history_forward 1 "continue" 1
+        gdb_cont_to_no_history_forward 1 "step" 1
         gdb_test "thread apply 1 info record" \
             ".*Recorded \[0-9\]+ instructions \[^\\\r\\\n\]*"
         gdb_test "thread apply 2 info record" \
@@ -227,8 +239,8 @@ with_test_prefix "no progress" {
         gdb_test "thread apply 1 record goto begin" ".*"
         gdb_test "thread apply 2 record goto end" ".*"
 
-        gdb_cont_to_no_history 2 "continue" 1
-        gdb_cont_to_no_history 2 "step" 1
+        gdb_cont_to_no_history_forward 2 "continue" 1
+        gdb_cont_to_no_history_forward 2 "step" 1
         gdb_test "thread apply 1 info record" \
             ".*Replay in progress\.  At instruction 1\."
         gdb_test "thread apply 2 info record" \
@@ -238,7 +250,7 @@ with_test_prefix "no progress" {
     with_test_prefix "all" {
         gdb_test "thread apply all record goto begin" ".*"
 
-        gdb_cont_to_no_history all "continue" 2
+        gdb_cont_to_no_history_forward all "continue" 2
         gdb_test "thread apply 1 info record" \
             ".*Recorded \[0-9\]+ instructions \[^\\\r\\\n\]*"
         gdb_test "thread apply 2 info record" \
diff --git a/gdb/testsuite/gdb.btrace/null-deref.c b/gdb/testsuite/gdb.btrace/null-deref.c
new file mode 100644
index 0000000..f0de31f
--- /dev/null
+++ b/gdb/testsuite/gdb.btrace/null-deref.c
@@ -0,0 +1,26 @@
+/* Copyright 2024 Free Software Foundation, Inc.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
+
+#include <stddef.h>
+
+int
+main ()
+{
+ int a = 34;
+ int *b = NULL;
+
+ a = *b; /* BP1.  */
+ return 0;
+}
diff --git a/gdb/testsuite/gdb.btrace/ptwrite.c b/gdb/testsuite/gdb.btrace/ptwrite.c
new file mode 100644
index 0000000..e10b885
--- /dev/null
+++ b/gdb/testsuite/gdb.btrace/ptwrite.c
@@ -0,0 +1,39 @@
+/* This testcase is part of GDB, the GNU debugger.
+
+ Copyright 2024 Free Software Foundation, Inc.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
+
+#include <immintrin.h>
+
+void
+ptwrite1 (int value)
+{
+  _ptwrite32 (value);
+}
+
+void
+ptwrite2 (int value)
+{
+  _ptwrite32 (value);
+}
+
+int
+main (void)
+{
+  ptwrite1 (0x42);
+  ptwrite2 (0x43);
+
+  return 0;
+}
diff --git a/gdb/testsuite/gdb.btrace/ptwrite.exp b/gdb/testsuite/gdb.btrace/ptwrite.exp
new file mode 100644
index 0000000..0970d31
--- /dev/null
+++ b/gdb/testsuite/gdb.btrace/ptwrite.exp
@@ -0,0 +1,201 @@
+# This testcase is part of GDB, the GNU debugger.
+#
+# Copyright 2024 Free Software Foundation, Inc.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
+load_lib gdb-python.exp
+
+require allow_btrace_ptw_tests allow_python_tests
+
+set opts {}
+
+if [info exists COMPILE] {
+    # make check RUNTESTFLAGS="gdb.btrace/ptwrite.exp COMPILE=1"
+    standard_testfile ptwrite.c
+    lappend opts debug additional_flags=-mptwrite
+} elseif {[istarget "i?86-*-*"] || [istarget "x86_64-*-*"]} {
+    if {[is_amd64_regs_target]} {
+	standard_testfile x86_64-ptwrite.S
+    } else {
+	standard_testfile i386-ptwrite.S
+    }
+} else {
+    unsupported "target architecture not supported"
+    return -1
+}
+
+if [prepare_for_testing "failed to prepare" $testfile $srcfile $opts] {
+    return -1
+}
+
+if { ![runto_main] } {
+    untested "failed to run to main"
+    return -1
+}
+
+### 1. Default testrun
+
+# Setup recording
+gdb_test_no_output "set record instruction-history-size unlimited"
+gdb_test_no_output "record btrace pt"
+gdb_test "next 2" ".*"
+
+with_test_prefix "Default" {
+    # Test record instruction-history
+    gdb_test "record instruction-history 1" [multi_line \
+	".*\[0-9\]+\t   $hex <ptwrite1\\+\[0-9\]+>:\tptwrite %\[a-z\]+" \
+	"\[0-9\]+\t     \\\[0x42\\\]" \
+	".*\[0-9\]+\t   $hex <ptwrite2\\+\[0-9\]+>:\tptwrite %\[a-z\]+" \
+	"\[0-9\]+\t     \\\[0x43\\\].*" \
+	]
+
+    gdb_test "record instruction-history /a 1" [multi_line \
+	".*\[0-9\]+\t   $hex <ptwrite1\\+\[0-9\]+>:\tptwrite %\[a-z\]+" \
+	".*\[0-9\]+\t   $hex <ptwrite2\\+\[0-9\]+>:\tptwrite %\[a-z\]+.*" \
+	]
+
+    # Test function call history
+    gdb_test "record function-call-history 1,4" [multi_line \
+	"1\tmain" \
+	"2\tptwrite1" \
+	"\t  \\\[0x42\\\]" \
+	"3\tmain" \
+	"4\tptwrite2" \
+	"\t  \\\[0x43\\\]" \
+	]
+
+    gdb_test "record function-call-history /a 1,4" [multi_line \
+	"1\tmain" \
+	"2\tptwrite1" \
+	"3\tmain" \
+	"4\tptwrite2" \
+	]
+}
+
+# Test payload printing during stepping
+with_test_prefix "Stepping" {
+    gdb_test "record goto 10" "Can't go to an auxiliary instruction\."
+    gdb_test "record goto 9" ".*ptwrite.* at .*"
+    gdb_test "stepi" ".*\\\[0x42\\\].*"
+    gdb_test "reverse-stepi" ".*\\\[0x42\\\].*"
+    gdb_test "continue" [multi_line \
+	    ".*\\\[0x42\\\]" \
+	    "\\\[0x43\\\].*" \
+	    ]
+    gdb_test "reverse-continue" [multi_line \
+	    ".*\\\[0x43\\\]" \
+	    "\\\[0x42\\\].*" \
+	    ]
+}
+
+# Test auxiliary type in python
+gdb_test_multiline "auxiliary type in python" \
+    "python" "" \
+    "h = gdb.current_recording().instruction_history" "" \
+    "for insn in h:" "" \
+    "    if hasattr(insn, 'decoded'):" "" \
+    "        print(insn.decoded.decode())" "" \
+    "    elif hasattr(insn, 'data'):" "" \
+    "        print(insn.data)" "" \
+    "end" \
+    [multi_line \
+	".*mov    -0x4\\\(%(e|r)bp\\\),%(e|r)ax" \
+	"ptwrite %eax" \
+	"0x42" \
+	"nop.*" \
+	"mov    -0x4\\\(%(e|r)bp\\\),%(e|r)ax" \
+	"ptwrite %eax" \
+	"0x43" \
+	"nop.*"
+    ]
+
+
+### 2. Test filter registration
+### 2.1 Custom filter
+with_test_prefix "Custom" {
+    gdb_test_multiline "register filter in python" \
+	"python" "" \
+	"def my_filter(payload, ip):" "" \
+	"    if  payload == 66:" "" \
+	"        return \"payload: {0}, ip: {1:#x}\".format(payload, ip)" "" \
+	"    else:" "" \
+	"        return None" "" \
+	"def factory(thread): return my_filter" "" \
+	"import gdb.ptwrite" "" \
+	"gdb.ptwrite.register_filter_factory(factory)" "" \
+	"end" ""
+
+    gdb_test "record instruction-history 1" [multi_line \
+	".*\[0-9\]+\t   $hex <ptwrite1\\+\[0-9\]+>:\tptwrite %\[a-z\]+" \
+	"\[0-9\]+\t     \\\[payload: 66, ip: $hex\\\]" \
+	".*\[0-9\]+\t   $hex <ptwrite2\\+\[0-9\]+>:\tptwrite %\[a-z\]+" \
+	"\[0-9\]+\t   $hex <ptwrite2\\+\[0-9\]+>:.*" \
+	]
+}
+
+### 2.2 None as filter. This resets the default behaviour.
+with_test_prefix "None" {
+    gdb_test_multiline "register filter in python" \
+	"python" "" \
+	"import gdb.ptwrite" "" \
+	"gdb.ptwrite.register_filter_factory(None)" "" \
+	"end" ""
+
+    gdb_test "record instruction-history 1" [multi_line \
+	".*\[0-9\]+\t   $hex <ptwrite1\\+\[0-9\]+>:\tptwrite %\[a-z\]+" \
+	"\[0-9\]+\t     \\\[0x42\\\]" \
+	".*\[0-9\]+\t   $hex <ptwrite2\\+\[0-9\]+>:\tptwrite %\[a-z\]+" \
+	"\[0-9\]+\t     \\\[0x43\\\].*" \
+	]
+}
+
+### 2.3 Lambdas as filter
+with_test_prefix "Lambdas" {
+    gdb_test_multiline "register filter in python" \
+	"python" "" \
+	"import gdb.ptwrite" "" \
+	"lambda_filter = lambda payload, ip: \"{}\".format(payload + 2)" "" \
+	"gdb.ptwrite.register_filter_factory(lambda thread : lambda_filter)" "" \
+	"end" ""
+
+    gdb_test "record instruction-history 1" [multi_line \
+	".*\[0-9\]+\t   $hex <ptwrite1\\+\[0-9\]+>:\tptwrite %\[a-z\]+" \
+	"\[0-9\]+\t     \\\[68\\\]" \
+	".*\[0-9\]+\t   $hex <ptwrite2\\+\[0-9\]+>:\tptwrite %\[a-z\]+" \
+	"\[0-9\]+\t     \\\[69\\\].*" \
+	] "Lambdas: record instruction-history 1"
+}
+
+### 2.4 Functors as filter
+with_test_prefix "Functors" {
+    gdb_test_multiline "register filter in python" \
+	"python" "" \
+	"import gdb.ptwrite" "" \
+	"class foobar(object):" "" \
+	"    def __init__(self):" "" \
+	"        self.variable = 0" "" \
+	"    def __call__(self, payload, ip):" "" \
+	"        self.variable += 1" "" \
+	"        return \"{}, {}\".format(self.variable, payload)" "" \
+	"gdb.ptwrite.register_filter_factory(lambda thread : foobar())" "" \
+	"end" ""
+
+    gdb_test "record instruction-history 1" [multi_line \
+	".*\[0-9\]+\t   $hex <ptwrite1\\+\[0-9\]+>:\tptwrite %\[a-z\]+" \
+	"\[0-9\]+\t     \\\[1, 66\\\]" \
+	".*\[0-9\]+\t   $hex <ptwrite2\\+\[0-9\]+>:\tptwrite %\[a-z\]+" \
+	"\[0-9\]+\t     \\\[2, 67\\\].*" \
+	] "Functors: record instruction-history 1"
+}
diff --git a/gdb/testsuite/gdb.btrace/stepi.exp b/gdb/testsuite/gdb.btrace/stepi.exp
index a70a5ad..689bc79 100644
--- a/gdb/testsuite/gdb.btrace/stepi.exp
+++ b/gdb/testsuite/gdb.btrace/stepi.exp
@@ -100,7 +100,7 @@ with_test_prefix "reverse-nexti.1" {
 # we can't reverse-nexti any further
 with_test_prefix "reverse-nexti.2" {
     gdb_test "reverse-nexti" \
-	"No more reverse-execution history\.\r\n.*main\.2.*" \
+	"Reached end of recorded history; stopping\.\r\n.*main\.2.*" \
 	"reverse-nexti.2"
     check_replay_at 1
 }
@@ -140,20 +140,20 @@ with_test_prefix "goto begin" {
 
     with_test_prefix "reverse-stepi" {
 	gdb_test "reverse-stepi" \
-	    "No more reverse-execution history\.\r\n.*main\.2.*" \
+	    "Reached end of recorded history; stopping\.\r\n.*main\.2.*" \
 	    "reverse-stepi.1"
 	gdb_test "reverse-stepi" \
-	    "No more reverse-execution history\.\r\n.*main\.2.*" \
+	    "Reached end of recorded history; stopping\.\r\n.*main\.2.*" \
 	    "reverse-stepi.2"
 	check_replay_at 1
     }
 
     with_test_prefix "reverse-nexti" {
 	gdb_test "reverse-nexti" \
-	    "No more reverse-execution history\.\r\n.*main\.2.*" \
+	    "Reached end of recorded history; stopping\.\r\n.*main\.2.*" \
 	    "reverse-nexti.1"
 	gdb_test "reverse-nexti" \
-	    "No more reverse-execution history\.\r\n.*main\.2.*" \
+	    "Reached end of recorded history; stopping\.\r\n.*main\.2.*" \
 	    "reverse-nexti.2"
 	check_replay_at 1
     }
@@ -169,10 +169,10 @@ with_test_prefix "goto begin" {
 with_test_prefix "reverse-stepi" {
     gdb_test "reverse-stepi" ".*main\.2.*" "reverse-stepi.1"
     gdb_test "reverse-stepi" \
-	"No more reverse-execution history\.\r\n.*main\.2.*" \
+	"Reached end of recorded history; stopping\.\r\n.*main\.2.*" \
 	"reverse-stepi.2"
     gdb_test "reverse-stepi" \
-	"No more reverse-execution history\.\r\n.*main\.2.*" \
+	"Reached end of recorded history; stopping\.\r\n.*main\.2.*" \
 	"reverse-stepi.3"
     check_replay_at 1
 }
diff --git a/gdb/testsuite/gdb.btrace/x86_64-ptwrite.S b/gdb/testsuite/gdb.btrace/x86_64-ptwrite.S
new file mode 100644
index 0000000..be4d204
--- /dev/null
+++ b/gdb/testsuite/gdb.btrace/x86_64-ptwrite.S
@@ -0,0 +1,544 @@
+/* This testcase is part of GDB, the GNU debugger.
+
+   Copyright 2024 Free Software Foundation, Inc.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
+
+   This file has been generated using gcc version 10.3.1 20210422
+   (Red Hat 10.3.1-1):
+   gcc -S -dA -g -mptwrite ptwrite.c -o x86_64-ptwrite.S.  */
+
+	.file	"ptwrite.c"
+	.text
+.Ltext0:
+	.globl	ptwrite1
+	.type	ptwrite1, @function
+ptwrite1:
+.LFB4096:
+	.file 1 "ptwrite.c"
+	# ptwrite.c:22:1
+	.loc 1 22 1
+	.cfi_startproc
+# BLOCK 2 seq:0
+# PRED: ENTRY (FALLTHRU)
+	pushq	%rbp
+	.cfi_def_cfa_offset 16
+	.cfi_offset 6, -16
+	movq	%rsp, %rbp
+	.cfi_def_cfa_register 6
+	movl	%edi, -20(%rbp)
+	# ptwrite.c:23:3
+	.loc 1 23 3
+	movl	-20(%rbp), %eax
+	movl	%eax, -4(%rbp)
+.LBB6:
+.LBB7:
+	.file 2 "/usr/lib/gcc/x86_64-redhat-linux/10/include/immintrin.h"
+	# /usr/lib/gcc/x86_64-redhat-linux/10/include/immintrin.h:307:3
+	.loc 2 307 3
+	movl	-4(%rbp), %eax
+	ptwrite	%eax
+	# /usr/lib/gcc/x86_64-redhat-linux/10/include/immintrin.h:308:1
+	.loc 2 308 1
+	nop
+.LBE7:
+.LBE6:
+	# ptwrite.c:24:1
+	.loc 1 24 1
+	nop
+	popq	%rbp
+	.cfi_def_cfa 7, 8
+# SUCC: EXIT [always]
+	ret
+	.cfi_endproc
+.LFE4096:
+	.size	ptwrite1, .-ptwrite1
+	.globl	ptwrite2
+	.type	ptwrite2, @function
+ptwrite2:
+.LFB4097:
+	# ptwrite.c:28:1
+	.loc 1 28 1
+	.cfi_startproc
+# BLOCK 2 seq:0
+# PRED: ENTRY (FALLTHRU)
+	pushq	%rbp
+	.cfi_def_cfa_offset 16
+	.cfi_offset 6, -16
+	movq	%rsp, %rbp
+	.cfi_def_cfa_register 6
+	movl	%edi, -20(%rbp)
+	# ptwrite.c:29:3
+	.loc 1 29 3
+	movl	-20(%rbp), %eax
+	movl	%eax, -4(%rbp)
+.LBB8:
+.LBB9:
+	# /usr/lib/gcc/x86_64-redhat-linux/10/include/immintrin.h:307:3
+	.loc 2 307 3
+	movl	-4(%rbp), %eax
+	ptwrite	%eax
+	# /usr/lib/gcc/x86_64-redhat-linux/10/include/immintrin.h:308:1
+	.loc 2 308 1
+	nop
+.LBE9:
+.LBE8:
+	# ptwrite.c:30:1
+	.loc 1 30 1
+	nop
+	popq	%rbp
+	.cfi_def_cfa 7, 8
+# SUCC: EXIT [always]
+	ret
+	.cfi_endproc
+.LFE4097:
+	.size	ptwrite2, .-ptwrite2
+	.globl	main
+	.type	main, @function
+main:
+.LFB4098:
+	# ptwrite.c:34:1
+	.loc 1 34 1
+	.cfi_startproc
+# BLOCK 2 seq:0
+# PRED: ENTRY (FALLTHRU)
+	pushq	%rbp
+	.cfi_def_cfa_offset 16
+	.cfi_offset 6, -16
+	movq	%rsp, %rbp
+	.cfi_def_cfa_register 6
+	# ptwrite.c:35:3
+	.loc 1 35 3
+	movl	$66, %edi
+	call	ptwrite1
+	# ptwrite.c:36:3
+	.loc 1 36 3
+	movl	$67, %edi
+	call	ptwrite2
+	# ptwrite.c:38:10
+	.loc 1 38 10
+	movl	$0, %eax
+	# ptwrite.c:39:1
+	.loc 1 39 1
+	popq	%rbp
+	.cfi_def_cfa 7, 8
+# SUCC: EXIT [always]
+	ret
+	.cfi_endproc
+.LFE4098:
+	.size	main, .-main
+.Letext0:
+	.section	.debug_info,"",@progbits
+.Ldebug_info0:
+	.long	0x159	# Length of Compilation Unit Info
+	.value	0x4	# DWARF version number
+	.long	.Ldebug_abbrev0	# Offset Into Abbrev. Section
+	.byte	0x8	# Pointer Size (in bytes)
+	.uleb128 0x1	# (DIE (0xb) DW_TAG_compile_unit)
+	.long	.LASF15	# DW_AT_producer: "GNU C17 10.3.1 20210422 (Red Hat 10.3.1-1) -mptwrite -mtune=generic -march=x86-64 -g"
+	.byte	0xc	# DW_AT_language
+	.long	.LASF16	# DW_AT_name: "ptwrite.c"
+	.long	.LASF17	# DW_AT_comp_dir: "gdb/gdb/testsuite/gdb.btrace"
+	.quad	.Ltext0	# DW_AT_low_pc
+	.quad	.Letext0-.Ltext0	# DW_AT_high_pc
+	.long	.Ldebug_line0	# DW_AT_stmt_list
+	.uleb128 0x2	# (DIE (0x2d) DW_TAG_base_type)
+	.byte	0x4	# DW_AT_byte_size
+	.byte	0x5	# DW_AT_encoding
+	.ascii "int\0"	# DW_AT_name
+	.uleb128 0x3	# (DIE (0x34) DW_TAG_base_type)
+	.byte	0x2	# DW_AT_byte_size
+	.byte	0x5	# DW_AT_encoding
+	.long	.LASF0	# DW_AT_name: "short int"
+	.uleb128 0x3	# (DIE (0x3b) DW_TAG_base_type)
+	.byte	0x1	# DW_AT_byte_size
+	.byte	0x6	# DW_AT_encoding
+	.long	.LASF1	# DW_AT_name: "char"
+	.uleb128 0x3	# (DIE (0x42) DW_TAG_base_type)
+	.byte	0x8	# DW_AT_byte_size
+	.byte	0x5	# DW_AT_encoding
+	.long	.LASF2	# DW_AT_name: "long long int"
+	.uleb128 0x3	# (DIE (0x49) DW_TAG_base_type)
+	.byte	0x4	# DW_AT_byte_size
+	.byte	0x4	# DW_AT_encoding
+	.long	.LASF3	# DW_AT_name: "float"
+	.uleb128 0x3	# (DIE (0x50) DW_TAG_base_type)
+	.byte	0x8	# DW_AT_byte_size
+	.byte	0x7	# DW_AT_encoding
+	.long	.LASF4	# DW_AT_name: "long unsigned int"
+	.uleb128 0x3	# (DIE (0x57) DW_TAG_base_type)
+	.byte	0x8	# DW_AT_byte_size
+	.byte	0x5	# DW_AT_encoding
+	.long	.LASF5	# DW_AT_name: "long int"
+	.uleb128 0x3	# (DIE (0x5e) DW_TAG_base_type)
+	.byte	0x1	# DW_AT_byte_size
+	.byte	0x8	# DW_AT_encoding
+	.long	.LASF6	# DW_AT_name: "unsigned char"
+	.uleb128 0x3	# (DIE (0x65) DW_TAG_base_type)
+	.byte	0x2	# DW_AT_byte_size
+	.byte	0x7	# DW_AT_encoding
+	.long	.LASF7	# DW_AT_name: "short unsigned int"
+	.uleb128 0x3	# (DIE (0x6c) DW_TAG_base_type)
+	.byte	0x4	# DW_AT_byte_size
+	.byte	0x7	# DW_AT_encoding
+	.long	.LASF8	# DW_AT_name: "unsigned int"
+	.uleb128 0x3	# (DIE (0x73) DW_TAG_base_type)
+	.byte	0x1	# DW_AT_byte_size
+	.byte	0x6	# DW_AT_encoding
+	.long	.LASF9	# DW_AT_name: "signed char"
+	.uleb128 0x3	# (DIE (0x7a) DW_TAG_base_type)
+	.byte	0x8	# DW_AT_byte_size
+	.byte	0x7	# DW_AT_encoding
+	.long	.LASF10	# DW_AT_name: "long long unsigned int"
+	.uleb128 0x3	# (DIE (0x81) DW_TAG_base_type)
+	.byte	0x8	# DW_AT_byte_size
+	.byte	0x4	# DW_AT_encoding
+	.long	.LASF11	# DW_AT_name: "double"
+	.uleb128 0x4	# (DIE (0x88) DW_TAG_subprogram)
+			# DW_AT_external
+	.long	.LASF18	# DW_AT_name: "main"
+	.byte	0x1	# DW_AT_decl_file (ptwrite.c)
+	.byte	0x21	# DW_AT_decl_line
+	.byte	0x1	# DW_AT_decl_column
+			# DW_AT_prototyped
+	.long	0x2d	# DW_AT_type
+	.quad	.LFB4098	# DW_AT_low_pc
+	.quad	.LFE4098-.LFB4098	# DW_AT_high_pc
+	.uleb128 0x1	# DW_AT_frame_base
+	.byte	0x9c	# DW_OP_call_frame_cfa
+			# DW_AT_GNU_all_tail_call_sites
+	.uleb128 0x5	# (DIE (0xa6) DW_TAG_subprogram)
+			# DW_AT_external
+	.long	.LASF12	# DW_AT_name: "ptwrite2"
+	.byte	0x1	# DW_AT_decl_file (ptwrite.c)
+	.byte	0x1b	# DW_AT_decl_line
+	.byte	0x1	# DW_AT_decl_column
+			# DW_AT_prototyped
+	.quad	.LFB4097	# DW_AT_low_pc
+	.quad	.LFE4097-.LFB4097	# DW_AT_high_pc
+	.uleb128 0x1	# DW_AT_frame_base
+	.byte	0x9c	# DW_OP_call_frame_cfa
+			# DW_AT_GNU_all_call_sites
+	.long	0xf5	# DW_AT_sibling
+	.uleb128 0x6	# (DIE (0xc4) DW_TAG_formal_parameter)
+	.long	.LASF14	# DW_AT_name: "value"
+	.byte	0x1	# DW_AT_decl_file (ptwrite.c)
+	.byte	0x1b	# DW_AT_decl_line
+	.byte	0xf	# DW_AT_decl_column
+	.long	0x2d	# DW_AT_type
+	.uleb128 0x2	# DW_AT_location
+	.byte	0x91	# DW_OP_fbreg
+	.sleb128 -36
+	.uleb128 0x7	# (DIE (0xd3) DW_TAG_inlined_subroutine)
+	.long	0x144	# DW_AT_abstract_origin
+	.quad	.LBB8	# DW_AT_low_pc
+	.quad	.LBE8-.LBB8	# DW_AT_high_pc
+	.byte	0x1	# DW_AT_call_file (ptwrite.c)
+	.byte	0x1d	# DW_AT_call_line
+	.byte	0x3	# DW_AT_call_column
+	.uleb128 0x8	# (DIE (0xeb) DW_TAG_formal_parameter)
+	.long	0x14e	# DW_AT_abstract_origin
+	.uleb128 0x2	# DW_AT_location
+	.byte	0x91	# DW_OP_fbreg
+	.sleb128 -20
+	.byte	0	# end of children of DIE 0xd3
+	.byte	0	# end of children of DIE 0xa6
+	.uleb128 0x5	# (DIE (0xf5) DW_TAG_subprogram)
+			# DW_AT_external
+	.long	.LASF13	# DW_AT_name: "ptwrite1"
+	.byte	0x1	# DW_AT_decl_file (ptwrite.c)
+	.byte	0x15	# DW_AT_decl_line
+	.byte	0x1	# DW_AT_decl_column
+			# DW_AT_prototyped
+	.quad	.LFB4096	# DW_AT_low_pc
+	.quad	.LFE4096-.LFB4096	# DW_AT_high_pc
+	.uleb128 0x1	# DW_AT_frame_base
+	.byte	0x9c	# DW_OP_call_frame_cfa
+			# DW_AT_GNU_all_call_sites
+	.long	0x144	# DW_AT_sibling
+	.uleb128 0x6	# (DIE (0x113) DW_TAG_formal_parameter)
+	.long	.LASF14	# DW_AT_name: "value"
+	.byte	0x1	# DW_AT_decl_file (ptwrite.c)
+	.byte	0x15	# DW_AT_decl_line
+	.byte	0xf	# DW_AT_decl_column
+	.long	0x2d	# DW_AT_type
+	.uleb128 0x2	# DW_AT_location
+	.byte	0x91	# DW_OP_fbreg
+	.sleb128 -36
+	.uleb128 0x7	# (DIE (0x122) DW_TAG_inlined_subroutine)
+	.long	0x144	# DW_AT_abstract_origin
+	.quad	.LBB6	# DW_AT_low_pc
+	.quad	.LBE6-.LBB6	# DW_AT_high_pc
+	.byte	0x1	# DW_AT_call_file (ptwrite.c)
+	.byte	0x17	# DW_AT_call_line
+	.byte	0x3	# DW_AT_call_column
+	.uleb128 0x8	# (DIE (0x13a) DW_TAG_formal_parameter)
+	.long	0x14e	# DW_AT_abstract_origin
+	.uleb128 0x2	# DW_AT_location
+	.byte	0x91	# DW_OP_fbreg
+	.sleb128 -20
+	.byte	0	# end of children of DIE 0x122
+	.byte	0	# end of children of DIE 0xf5
+	.uleb128 0x9	# (DIE (0x144) DW_TAG_subprogram)
+			# DW_AT_external
+	.long	.LASF19	# DW_AT_name: "_ptwrite32"
+	.byte	0x2	# DW_AT_decl_file (/usr/lib/gcc/x86_64-redhat-linux/10/include/immintrin.h)
+	.value	0x131	# DW_AT_decl_line
+	.byte	0x1	# DW_AT_decl_column
+			# DW_AT_prototyped
+	.byte	0x3	# DW_AT_inline
+			# DW_AT_artificial
+	.uleb128 0xa	# (DIE (0x14e) DW_TAG_formal_parameter)
+	.ascii "__B\0"	# DW_AT_name
+	.byte	0x2	# DW_AT_decl_file (/usr/lib/gcc/x86_64-redhat-linux/10/include/immintrin.h)
+	.value	0x131	# DW_AT_decl_line
+	.byte	0x16	# DW_AT_decl_column
+	.long	0x6c	# DW_AT_type
+	.byte	0	# end of children of DIE 0x144
+	.byte	0	# end of children of DIE 0xb
+	.section	.debug_abbrev,"",@progbits
+.Ldebug_abbrev0:
+	.uleb128 0x1	# (abbrev code)
+	.uleb128 0x11	# (TAG: DW_TAG_compile_unit)
+	.byte	0x1	# DW_children_yes
+	.uleb128 0x25	# (DW_AT_producer)
+	.uleb128 0xe	# (DW_FORM_strp)
+	.uleb128 0x13	# (DW_AT_language)
+	.uleb128 0xb	# (DW_FORM_data1)
+	.uleb128 0x3	# (DW_AT_name)
+	.uleb128 0xe	# (DW_FORM_strp)
+	.uleb128 0x1b	# (DW_AT_comp_dir)
+	.uleb128 0xe	# (DW_FORM_strp)
+	.uleb128 0x11	# (DW_AT_low_pc)
+	.uleb128 0x1	# (DW_FORM_addr)
+	.uleb128 0x12	# (DW_AT_high_pc)
+	.uleb128 0x7	# (DW_FORM_data8)
+	.uleb128 0x10	# (DW_AT_stmt_list)
+	.uleb128 0x17	# (DW_FORM_sec_offset)
+	.byte	0
+	.byte	0
+	.uleb128 0x2	# (abbrev code)
+	.uleb128 0x24	# (TAG: DW_TAG_base_type)
+	.byte	0	# DW_children_no
+	.uleb128 0xb	# (DW_AT_byte_size)
+	.uleb128 0xb	# (DW_FORM_data1)
+	.uleb128 0x3e	# (DW_AT_encoding)
+	.uleb128 0xb	# (DW_FORM_data1)
+	.uleb128 0x3	# (DW_AT_name)
+	.uleb128 0x8	# (DW_FORM_string)
+	.byte	0
+	.byte	0
+	.uleb128 0x3	# (abbrev code)
+	.uleb128 0x24	# (TAG: DW_TAG_base_type)
+	.byte	0	# DW_children_no
+	.uleb128 0xb	# (DW_AT_byte_size)
+	.uleb128 0xb	# (DW_FORM_data1)
+	.uleb128 0x3e	# (DW_AT_encoding)
+	.uleb128 0xb	# (DW_FORM_data1)
+	.uleb128 0x3	# (DW_AT_name)
+	.uleb128 0xe	# (DW_FORM_strp)
+	.byte	0
+	.byte	0
+	.uleb128 0x4	# (abbrev code)
+	.uleb128 0x2e	# (TAG: DW_TAG_subprogram)
+	.byte	0	# DW_children_no
+	.uleb128 0x3f	# (DW_AT_external)
+	.uleb128 0x19	# (DW_FORM_flag_present)
+	.uleb128 0x3	# (DW_AT_name)
+	.uleb128 0xe	# (DW_FORM_strp)
+	.uleb128 0x3a	# (DW_AT_decl_file)
+	.uleb128 0xb	# (DW_FORM_data1)
+	.uleb128 0x3b	# (DW_AT_decl_line)
+	.uleb128 0xb	# (DW_FORM_data1)
+	.uleb128 0x39	# (DW_AT_decl_column)
+	.uleb128 0xb	# (DW_FORM_data1)
+	.uleb128 0x27	# (DW_AT_prototyped)
+	.uleb128 0x19	# (DW_FORM_flag_present)
+	.uleb128 0x49	# (DW_AT_type)
+	.uleb128 0x13	# (DW_FORM_ref4)
+	.uleb128 0x11	# (DW_AT_low_pc)
+	.uleb128 0x1	# (DW_FORM_addr)
+	.uleb128 0x12	# (DW_AT_high_pc)
+	.uleb128 0x7	# (DW_FORM_data8)
+	.uleb128 0x40	# (DW_AT_frame_base)
+	.uleb128 0x18	# (DW_FORM_exprloc)
+	.uleb128 0x2116	# (DW_AT_GNU_all_tail_call_sites)
+	.uleb128 0x19	# (DW_FORM_flag_present)
+	.byte	0
+	.byte	0
+	.uleb128 0x5	# (abbrev code)
+	.uleb128 0x2e	# (TAG: DW_TAG_subprogram)
+	.byte	0x1	# DW_children_yes
+	.uleb128 0x3f	# (DW_AT_external)
+	.uleb128 0x19	# (DW_FORM_flag_present)
+	.uleb128 0x3	# (DW_AT_name)
+	.uleb128 0xe	# (DW_FORM_strp)
+	.uleb128 0x3a	# (DW_AT_decl_file)
+	.uleb128 0xb	# (DW_FORM_data1)
+	.uleb128 0x3b	# (DW_AT_decl_line)
+	.uleb128 0xb	# (DW_FORM_data1)
+	.uleb128 0x39	# (DW_AT_decl_column)
+	.uleb128 0xb	# (DW_FORM_data1)
+	.uleb128 0x27	# (DW_AT_prototyped)
+	.uleb128 0x19	# (DW_FORM_flag_present)
+	.uleb128 0x11	# (DW_AT_low_pc)
+	.uleb128 0x1	# (DW_FORM_addr)
+	.uleb128 0x12	# (DW_AT_high_pc)
+	.uleb128 0x7	# (DW_FORM_data8)
+	.uleb128 0x40	# (DW_AT_frame_base)
+	.uleb128 0x18	# (DW_FORM_exprloc)
+	.uleb128 0x2117	# (DW_AT_GNU_all_call_sites)
+	.uleb128 0x19	# (DW_FORM_flag_present)
+	.uleb128 0x1	# (DW_AT_sibling)
+	.uleb128 0x13	# (DW_FORM_ref4)
+	.byte	0
+	.byte	0
+	.uleb128 0x6	# (abbrev code)
+	.uleb128 0x5	# (TAG: DW_TAG_formal_parameter)
+	.byte	0	# DW_children_no
+	.uleb128 0x3	# (DW_AT_name)
+	.uleb128 0xe	# (DW_FORM_strp)
+	.uleb128 0x3a	# (DW_AT_decl_file)
+	.uleb128 0xb	# (DW_FORM_data1)
+	.uleb128 0x3b	# (DW_AT_decl_line)
+	.uleb128 0xb	# (DW_FORM_data1)
+	.uleb128 0x39	# (DW_AT_decl_column)
+	.uleb128 0xb	# (DW_FORM_data1)
+	.uleb128 0x49	# (DW_AT_type)
+	.uleb128 0x13	# (DW_FORM_ref4)
+	.uleb128 0x2	# (DW_AT_location)
+	.uleb128 0x18	# (DW_FORM_exprloc)
+	.byte	0
+	.byte	0
+	.uleb128 0x7	# (abbrev code)
+	.uleb128 0x1d	# (TAG: DW_TAG_inlined_subroutine)
+	.byte	0x1	# DW_children_yes
+	.uleb128 0x31	# (DW_AT_abstract_origin)
+	.uleb128 0x13	# (DW_FORM_ref4)
+	.uleb128 0x11	# (DW_AT_low_pc)
+	.uleb128 0x1	# (DW_FORM_addr)
+	.uleb128 0x12	# (DW_AT_high_pc)
+	.uleb128 0x7	# (DW_FORM_data8)
+	.uleb128 0x58	# (DW_AT_call_file)
+	.uleb128 0xb	# (DW_FORM_data1)
+	.uleb128 0x59	# (DW_AT_call_line)
+	.uleb128 0xb	# (DW_FORM_data1)
+	.uleb128 0x57	# (DW_AT_call_column)
+	.uleb128 0xb	# (DW_FORM_data1)
+	.byte	0
+	.byte	0
+	.uleb128 0x8	# (abbrev code)
+	.uleb128 0x5	# (TAG: DW_TAG_formal_parameter)
+	.byte	0	# DW_children_no
+	.uleb128 0x31	# (DW_AT_abstract_origin)
+	.uleb128 0x13	# (DW_FORM_ref4)
+	.uleb128 0x2	# (DW_AT_location)
+	.uleb128 0x18	# (DW_FORM_exprloc)
+	.byte	0
+	.byte	0
+	.uleb128 0x9	# (abbrev code)
+	.uleb128 0x2e	# (TAG: DW_TAG_subprogram)
+	.byte	0x1	# DW_children_yes
+	.uleb128 0x3f	# (DW_AT_external)
+	.uleb128 0x19	# (DW_FORM_flag_present)
+	.uleb128 0x3	# (DW_AT_name)
+	.uleb128 0xe	# (DW_FORM_strp)
+	.uleb128 0x3a	# (DW_AT_decl_file)
+	.uleb128 0xb	# (DW_FORM_data1)
+	.uleb128 0x3b	# (DW_AT_decl_line)
+	.uleb128 0x5	# (DW_FORM_data2)
+	.uleb128 0x39	# (DW_AT_decl_column)
+	.uleb128 0xb	# (DW_FORM_data1)
+	.uleb128 0x27	# (DW_AT_prototyped)
+	.uleb128 0x19	# (DW_FORM_flag_present)
+	.uleb128 0x20	# (DW_AT_inline)
+	.uleb128 0xb	# (DW_FORM_data1)
+	.uleb128 0x34	# (DW_AT_artificial)
+	.uleb128 0x19	# (DW_FORM_flag_present)
+	.byte	0
+	.byte	0
+	.uleb128 0xa	# (abbrev code)
+	.uleb128 0x5	# (TAG: DW_TAG_formal_parameter)
+	.byte	0	# DW_children_no
+	.uleb128 0x3	# (DW_AT_name)
+	.uleb128 0x8	# (DW_FORM_string)
+	.uleb128 0x3a	# (DW_AT_decl_file)
+	.uleb128 0xb	# (DW_FORM_data1)
+	.uleb128 0x3b	# (DW_AT_decl_line)
+	.uleb128 0x5	# (DW_FORM_data2)
+	.uleb128 0x39	# (DW_AT_decl_column)
+	.uleb128 0xb	# (DW_FORM_data1)
+	.uleb128 0x49	# (DW_AT_type)
+	.uleb128 0x13	# (DW_FORM_ref4)
+	.byte	0
+	.byte	0
+	.byte	0
+	.section	.debug_aranges,"",@progbits
+	.long	0x2c	# Length of Address Ranges Info
+	.value	0x2	# DWARF aranges version
+	.long	.Ldebug_info0	# Offset of Compilation Unit Info
+	.byte	0x8	# Size of Address
+	.byte	0	# Size of Segment Descriptor
+	.value	0	# Pad to 16 byte boundary
+	.value	0
+	.quad	.Ltext0	# Address
+	.quad	.Letext0-.Ltext0	# Length
+	.quad	0
+	.quad	0
+	.section	.debug_line,"",@progbits
+.Ldebug_line0:
+	.section	.debug_str,"MS",@progbits,1
+.LASF2:
+	.string	"long long int"
+.LASF14:
+	.string	"value"
+.LASF19:
+	.string	"_ptwrite32"
+.LASF8:
+	.string	"unsigned int"
+.LASF17:
+	.string	"gdb/gdb/testsuite/gdb.btrace"
+.LASF18:
+	.string	"main"
+.LASF16:
+	.string	"ptwrite.c"
+.LASF4:
+	.string	"long unsigned int"
+.LASF10:
+	.string	"long long unsigned int"
+.LASF15:
+	.string	"GNU C17 10.3.1 20210422 (Red Hat 10.3.1-1) -mptwrite -mtune=generic -march=x86-64 -g"
+.LASF13:
+	.string	"ptwrite1"
+.LASF12:
+	.string	"ptwrite2"
+.LASF6:
+	.string	"unsigned char"
+.LASF1:
+	.string	"char"
+.LASF5:
+	.string	"long int"
+.LASF11:
+	.string	"double"
+.LASF7:
+	.string	"short unsigned int"
+.LASF9:
+	.string	"signed char"
+.LASF3:
+	.string	"float"
+.LASF0:
+	.string	"short int"
+	.ident	"GCC: (GNU) 10.3.1 20210422 (Red Hat 10.3.1-1)"
+	.section	.note.GNU-stack,"",@progbits
diff --git a/gdb/testsuite/gdb.compile/compile.exp b/gdb/testsuite/gdb.compile/compile.exp
index cd59633..2c2e321 100644
--- a/gdb/testsuite/gdb.compile/compile.exp
+++ b/gdb/testsuite/gdb.compile/compile.exp
@@ -66,7 +66,7 @@ if {[skip_compile_feature_untested]} {
 gdb_test_no_output "compile -- f = 10" \
     "test abbreviations and code delimiter"
 
-gdb_test "compile f = 10;" ".*= 10;: No such file.*" \
+gdb_test "compile f = 10;" "^Junk after filename \"=\": 10;" \
     "Test abbreviations and code collision"
 
 gdb_test_no_output "compile -r -- void _gdb_expr(){int i = 5;}" \
diff --git a/gdb/testsuite/gdb.cp/breakpoint-shlib-func.exp b/gdb/testsuite/gdb.cp/breakpoint-shlib-func.exp
index 9924d9b..085020f 100644
--- a/gdb/testsuite/gdb.cp/breakpoint-shlib-func.exp
+++ b/gdb/testsuite/gdb.cp/breakpoint-shlib-func.exp
@@ -47,18 +47,9 @@ gdb_load_shlib $libobj
 gdb_test "break foo" "Breakpoint $decimal at $hex"
 gdb_test "info breakpoints" "<foo\\(\\)@plt>"
 
-# This is used as an override for delete_breakpoints when we don't
-# want functions in gdb.exp to delete breakpoints behind the scenes
-# for us.
-proc do_not_delete_breakpoints {} {
-    # Just do nothing.
-}
-
 # Runto main, but don't delete all the breakpoints.
-with_override delete_breakpoints do_not_delete_breakpoints {
-    if {![runto_main]} {
-	return -1
-    }
+if {![runto_main no-delete-breakpoints]} {
+    return -1
 }
 
 # The breakpoint should now be showing in `foo` for real.
diff --git a/gdb/testsuite/gdb.cp/rtti.exp b/gdb/testsuite/gdb.cp/rtti.exp
index 9651691..5caf4d1 100644
--- a/gdb/testsuite/gdb.cp/rtti.exp
+++ b/gdb/testsuite/gdb.cp/rtti.exp
@@ -73,7 +73,7 @@ gdb_test_multiple "print *e1" "print *e1" {
 
 # NOTE: carlton/2004-01-14: This test with an "<incomplete type>"
 # message because, within rtt1.cc, GDB has no way of knowing that the
-# class is called 'n2::D2' instead of just 'D2'.  This is an artifical
+# class is called 'n2::D2' instead of just 'D2'.  This is an artificial
 # test case, though: if we were using these classes in a more
 # substantial way, G++ would emit more debug info.  As is, I don't
 # think there's anything that GDB can do about this case until G++
diff --git a/gdb/testsuite/gdb.cp/step-and-next-inline.exp b/gdb/testsuite/gdb.cp/step-and-next-inline.exp
index 446cd82..af1719d 100644
--- a/gdb/testsuite/gdb.cp/step-and-next-inline.exp
+++ b/gdb/testsuite/gdb.cp/step-and-next-inline.exp
@@ -26,7 +26,7 @@ proc do_test { use_header } {
 
     if { $use_header } {
 	# This test will not pass due to poor debug information
-	# generated by GCC (at least upto 10.x).  See
+	# generated by GCC (at least up to 10.x).  See
 	# https://gcc.gnu.org/bugzilla/show_bug.cgi?id=94474
 	return
     }
diff --git a/gdb/testsuite/gdb.cp/virtfunc.exp b/gdb/testsuite/gdb.cp/virtfunc.exp
index 9add69e..636497e 100644
--- a/gdb/testsuite/gdb.cp/virtfunc.exp
+++ b/gdb/testsuite/gdb.cp/virtfunc.exp
@@ -197,7 +197,7 @@ proc test_virtual_calls {} {
     # wrong value "202"
     #   gcc 2.95.3 -gdwarf-2
     #   gcc 2.95.3 -gstabs+
-    # attempt to take addres of value not located in memory
+    # attempt to take address of value not located in memory
     #   gcc 3.3.2 -gdwarf-2
     #   gcc 3.3.2 -gstabs+
     #
diff --git a/gdb/testsuite/gdb.dap/catch-exception.exp b/gdb/testsuite/gdb.dap/catch-exception.exp
index 166b862..a1ced06 100644
--- a/gdb/testsuite/gdb.dap/catch-exception.exp
+++ b/gdb/testsuite/gdb.dap/catch-exception.exp
@@ -57,6 +57,12 @@ foreach spec $bps {
 	    gdb_assert {[dict get $spec source path] != "null"} \
 		"breakpoint $i path"
 	}
+
+	# Breakpoint should be unverified and pending.
+	gdb_assert {[dict get $spec verified] == "false"} \
+	    "catchpoint $i is unverified"
+	gdb_assert {[dict get $spec reason] == "pending"} \
+	    "catchpoint $i is pending"
     }
     incr i
 }
diff --git a/gdb/testsuite/gdb.dap/cxx-exception.exp b/gdb/testsuite/gdb.dap/cxx-exception.exp
index b54b11a..1332043 100644
--- a/gdb/testsuite/gdb.dap/cxx-exception.exp
+++ b/gdb/testsuite/gdb.dap/cxx-exception.exp
@@ -37,6 +37,16 @@ set bps [dict get [lindex $obj 0] body breakpoints]
 # breakpoints.
 gdb_assert {[llength $bps] == 3} "three breakpoints"
 
+# Each breakpoint should be unverified and pending.
+foreach bp $bps {
+    with_test_prefix [dict get $bp id] {
+	gdb_assert {[dict get $bp verified] == "false"} \
+	    "catchpoint is unverified"
+	gdb_assert {[dict get $bp reason] == "pending"} \
+	    "catchpoint is pending"
+    }
+}
+
 dap_check_request_and_response "configurationDone" configurationDone
 
 if {[dap_launch $testfile] == ""} {
diff --git a/gdb/testsuite/gdb.dap/global.c b/gdb/testsuite/gdb.dap/global.c
new file mode 100644
index 0000000..d3b7085
--- /dev/null
+++ b/gdb/testsuite/gdb.dap/global.c
@@ -0,0 +1,31 @@
+/* This testcase is part of GDB, the GNU debugger.
+
+   Copyright 2024 Free Software Foundation, Inc.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
+
+static struct {
+  int x;
+  struct {
+    int x2;
+  } y;
+} global;
+
+int
+main ()
+{
+  global.x = 23;
+  global.y.x2 = 47;
+  return 0;			/* BREAK */
+}
diff --git a/gdb/testsuite/gdb.dap/global.exp b/gdb/testsuite/gdb.dap/global.exp
new file mode 100644
index 0000000..79f7f2f
--- /dev/null
+++ b/gdb/testsuite/gdb.dap/global.exp
@@ -0,0 +1,72 @@
+# Copyright 2024 Free Software Foundation, Inc.
+
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
+require allow_dap_tests
+
+load_lib dap-support.exp
+
+standard_testfile
+
+if {[build_executable ${testfile}.exp $testfile $srcfile] == -1} {
+    return
+}
+
+if {[dap_initialize] == ""} {
+    return
+}
+
+set line [gdb_get_line_number "BREAK"]
+set obj [dap_check_request_and_response "set breakpoint by line number" \
+	     setBreakpoints \
+	     [format {o source [o path [%s]] breakpoints [a [o line [i %d]]]} \
+		  [list s $srcfile] $line]]
+set line_bpno [dap_get_breakpoint_number $obj]
+
+dap_check_request_and_response "configurationDone" configurationDone
+
+if {[dap_launch $testfile] == ""} {
+    return
+}
+dap_wait_for_event_and_check "inferior started" thread "body reason" started
+
+dap_wait_for_event_and_check "stopped at line breakpoint" stopped \
+    "body reason" breakpoint \
+    "body hitBreakpointIds" $line_bpno
+
+set bt [lindex [dap_check_request_and_response "backtrace" stackTrace \
+		    {o threadId [i 1]}] \
+	    0]
+set frame_id [dict get [lindex [dict get $bt body stackFrames] 0] id]
+
+set scopes [dap_check_request_and_response "get scopes" scopes \
+		[format {o frameId [i %d]} $frame_id]]
+set scopes [dict get [lindex $scopes 0] body scopes]
+
+gdb_assert {[llength $scopes] == 2} "two scopes"
+
+lassign $scopes reg_scope global_scope
+
+gdb_assert {[dict get $global_scope name] == "Globals"} "scope is globals"
+
+gdb_assert {[dict get $global_scope namedVariables] == 1} "one var in globals"
+
+set num [dict get $global_scope variablesReference]
+set refs [lindex [dap_check_request_and_response "fetch variables" \
+		      "variables" \
+		      [format {o variablesReference [i %d] count [i 1]} \
+			   $num]] \
+	      0]
+
+dap_shutdown
diff --git a/gdb/testsuite/gdb.dap/insn-bp.exp b/gdb/testsuite/gdb.dap/insn-bp.exp
new file mode 100644
index 0000000..4a4c144
--- /dev/null
+++ b/gdb/testsuite/gdb.dap/insn-bp.exp
@@ -0,0 +1,100 @@
+# Copyright 2024 Free Software Foundation, Inc.
+
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
+# Test instruction breakpoint resolution.
+
+require allow_dap_tests
+
+load_lib dap-support.exp
+
+standard_testfile basic-dap.c
+
+if {[build_executable ${testfile}.exp $testfile $srcfile] == -1} {
+    return
+}
+
+# Get the address of a function.  Make sure the inferior is running
+# first -- on the ARM builder, the function address changed during
+# startup, and we want to find the final relocated address.
+clean_restart $testfile
+if {![runto_main]} {
+    return
+}
+set addr [get_var_address address_breakpoint_here]
+gdb_exit
+
+if {[dap_initialize] == ""} {
+    return
+}
+
+set obj [dap_check_request_and_response "set breakpoint on main" \
+	     setFunctionBreakpoints \
+	     {o breakpoints [a [o name [s main]]]}]
+set fn_bpno [dap_get_breakpoint_number $obj]
+
+set obj [dap_check_request_and_response "set breakpoint by address" \
+	     setInstructionBreakpoints \
+	     [format {o breakpoints [a [o instructionReference [s %s]]]} \
+		  $addr]]
+set bpno [dap_get_breakpoint_number $obj]
+
+set bp [lindex [dict get [lindex $obj 0] body breakpoints] 0]
+gdb_assert {[dict get $bp verified] == "false"} \
+    "breakpoint is not verified"
+
+dap_check_request_and_response "configurationDone" configurationDone
+
+if {[dap_launch $testfile] == ""} {
+    return
+}
+
+# The event we're looking for should occur during startup, but we want
+# to leave open the possibility that it occurs when waiting for the
+# stopped event.  So, keep both event lists around and search them
+# once below.
+lassign [dap_wait_for_event_and_check "inferior started" \
+	     thread "body reason" started] \
+    unused objs1
+lassign [dap_wait_for_event_and_check "stopped at breakpoint" stopped \
+	    "body reason" breakpoint \
+	    "body hitBreakpointIds" $fn_bpno] unused objs2
+
+set found_bp_event 0
+foreach obj [concat $objs1 $objs2] {
+    if { [dict get $obj "type"] != "event" } {
+	continue
+    }
+
+    if { [dict get $obj "event"] != "breakpoint" } {
+	continue
+    }
+
+    set body [dict get $obj "body"]
+
+    if { [dict get $body "reason"] != "changed" } {
+	continue
+    }
+
+    set breakpoint [dict get $body breakpoint]
+    if {[dict get $breakpoint id] == $bpno} {
+	gdb_assert {[dict get $breakpoint source name] == "basic-dap.c"} \
+	    "breakpoint modification event has source"
+	set found_bp_event 1
+    }
+}
+
+gdb_assert {$found_bp_event} "found the breakpoint event"
+
+dap_shutdown
diff --git a/gdb/testsuite/gdb.dap/memory.exp b/gdb/testsuite/gdb.dap/memory.exp
index 7082706..c4e4fb3 100644
--- a/gdb/testsuite/gdb.dap/memory.exp
+++ b/gdb/testsuite/gdb.dap/memory.exp
@@ -25,11 +25,12 @@ if {[build_executable ${testfile}.exp $testfile] == -1} {
     return
 }
 
-save_vars { env(ASAN_OPTIONS) } {
+save_vars { env(ASAN_OPTIONS) env(TSAN_OPTIONS) } {
     # The request readMemory with count 18446744073709551615 triggers address
     # sanitizer.  Suppress the error, leaving us with just this warning:
     #   WARNING: AddressSanitizer failed to allocate 0xffffffffffffffff bytes
     set_sanitizer ASAN_OPTIONS allocator_may_return_null 1
+    set_sanitizer TSAN_OPTIONS allocator_may_return_null 1
 
     if {[dap_initialize] == ""} {
 	return
diff --git a/gdb/testsuite/gdb.debuginfod/corefile-mapped-file-1.c b/gdb/testsuite/gdb.debuginfod/corefile-mapped-file-1.c
new file mode 100644
index 0000000..dd6b3f1
--- /dev/null
+++ b/gdb/testsuite/gdb.debuginfod/corefile-mapped-file-1.c
@@ -0,0 +1,24 @@
+/* Copyright 2024 Free Software Foundation, Inc.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
+
+/* This is in the shared library.  */
+extern int foo (void);
+
+int
+main (void)
+{
+  int res = foo ();
+  return res;
+}
diff --git a/gdb/testsuite/gdb.debuginfod/corefile-mapped-file-2.c b/gdb/testsuite/gdb.debuginfod/corefile-mapped-file-2.c
new file mode 100644
index 0000000..ccf35b7
--- /dev/null
+++ b/gdb/testsuite/gdb.debuginfod/corefile-mapped-file-2.c
@@ -0,0 +1,22 @@
+/* Copyright 2024 Free Software Foundation, Inc.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
+
+volatile int *library_ptr = (int *) POINTER_VALUE;
+
+int
+foo (void)
+{
+  return *library_ptr;
+}
diff --git a/gdb/testsuite/gdb.debuginfod/corefile-mapped-file-3.c b/gdb/testsuite/gdb.debuginfod/corefile-mapped-file-3.c
new file mode 100644
index 0000000..98ed952
--- /dev/null
+++ b/gdb/testsuite/gdb.debuginfod/corefile-mapped-file-3.c
@@ -0,0 +1,44 @@
+/* Copyright 2024 Free Software Foundation, Inc.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
+
+#include <assert.h>
+#include <sys/stat.h>
+#include <fcntl.h>
+#include <sys/types.h>
+#include <unistd.h>
+#include <sys/mman.h>
+
+volatile void* library_base_address = 0;
+volatile int *ptr = 0;
+
+int
+main ()
+{
+  struct stat buf;
+  int res;
+
+  int fd = open (SHLIB_FILENAME, O_RDONLY);
+  assert (fd != -1);
+
+  res = fstat (fd, &buf);
+  assert (res == 0);
+
+  library_base_address
+    = mmap (NULL, buf.st_size, PROT_READ, MAP_PRIVATE, fd, 0);
+
+  res = *ptr;	/* Undefined behaviour here.  */
+
+  return 0;
+}
diff --git a/gdb/testsuite/gdb.debuginfod/corefile-mapped-file.exp b/gdb/testsuite/gdb.debuginfod/corefile-mapped-file.exp
new file mode 100644
index 0000000..cf96b41
--- /dev/null
+++ b/gdb/testsuite/gdb.debuginfod/corefile-mapped-file.exp
@@ -0,0 +1,380 @@
+# Copyright 2024 Free Software Foundation, Inc.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
+
+# This test checks GDB's ability to use build-ids when setting up file backed
+# mappings as part of reading a core-file.
+#
+# A core-file contains a list of the files that were mapped into the process
+# at the time of the core-file creation.  If the file was mapped read-only
+# then the file contents will not be present in the core-file, but instead GDB
+# is expected to open the mapped file and read the contents from there if
+# needed.  And this is what GDB does.
+#
+# GDB (via the BFD library) will also spot if a mapped looks like a valid ELF
+# and contains a build-id, this build-id is passed back to GDB so that GDB can
+# validate the on-disk file it finds matches the file that was mapped when the
+# core-file was created.
+#
+# In addition, if the on-disk file is found to have a non-matching build-id
+# then GDB can use debuginfod to (try) and download a suitable file.
+#
+# This test is about checking that this file backed mapping mechanism works
+# correctly; that GDB will spot when the build-ids fail to match and will
+# refuse to load an incorrect file.  Additionally we check that the correct
+# file can be downloaded from debuginfod.
+#
+# The test is rather contrived though.  Instead of relying on having a shared
+# library mapped at the time of crash we mmap a shared library into the
+# process and then check this mapping within the test.
+#
+# The problem with using a normal shared library load for this test is that
+# the shared library list is processed as part of a separate step when opening
+# the core file.  Right now this separate step doesn't check the build-ids
+# correctly, so GDB will potentially open the wrong shared library file.  The
+# sections of this incorrect shared library are then added to GDB's list of
+# target sections, and are used to satisfy memory reads, which can give the
+# wrong results.
+#
+# This obviously needs fixing, but is a separate problem from the one being
+# tested here, so this test deliberately checks the mapping using a file that
+# is mmaped rather than loaded as a shared library, as such the file is in the
+# core-files list of mapped files, but is not in the shared library list.
+#
+# Despite this test living in the gdb.debuginfod/ directory, only the last
+# part of this test actually uses debuginfod, everything up to that point is
+# pretty generic.
+
+require {!is_remote host}
+require {!is_remote target}
+
+load_lib debuginfod-support.exp
+
+require allow_shlib_tests
+
+standard_testfile -1.c -2.c -3.c
+
+# Compile an executable that loads the shared library as an actual
+# shared library, then use GDB to figure out the offset of the
+# variable 'library_ptr' within the library.
+set library_filename [standard_output_file "libfoo.so"]
+set binfile2 [standard_output_file "library_loader"]
+
+if {[prepare_for_testing_full "build exec which loads the shared library" \
+	 [list $library_filename \
+	      { debug shlib build-id \
+		    additional_flags=-DPOINTER_VALUE=0x12345678 } \
+	      $srcfile2 {}] \
+	 [list $binfile2 [list debug shlib=$library_filename ] \
+	      $srcfile { debug }]] != 0} {
+    return
+}
+
+if {![runto_main]} {
+    return
+}
+
+if { [is_address_zero_readable] } {
+    return
+}
+
+set ptr_address [get_hexadecimal_valueof "&library_ptr" "unknown"]
+
+set ptr_offset "unknown"
+gdb_test_multiple "info proc mappings" "" {
+    -re "^($hex)\\s+($hex)\\s+$hex\\s+($hex)\[^\r\n\]+$library_filename\\s*\r\n" {
+	set low_addr $expect_out(1,string)
+	set high_addr $expect_out(2,string)
+	set file_offset $expect_out(3,string)
+
+	if {[expr $ptr_address >= $low_addr] && [expr $ptr_address < $high_addr]} {
+	    set mapping_offset [expr $ptr_address - $low_addr]
+	    set ptr_offset [format 0x%x [expr $file_offset + $mapping_offset]]
+	}
+
+	exp_continue
+    }
+
+    -re "^$gdb_prompt $" {
+    }
+
+    -re "(^\[^\r\n\]*)\r\n" {
+	set tmp $expect_out(1,string)
+	exp_continue
+    }
+}
+
+gdb_assert { $ptr_offset ne "unknown" } \
+    "found pointer offset"
+
+set ptr_size [get_integer_valueof "sizeof (library_ptr)" "unknown"]
+set ptr_format_char ""
+if { $ptr_size == 2 } {
+    set ptr_format_char "b"
+} elseif { $ptr_size == 4 } {
+    set ptr_format_char "w"
+} elseif { $ptr_size == 8 } {
+    set ptr_format_char "g"
+}
+if { $ptr_format_char eq "" } {
+    untested "could not figure out size of library_ptr variable"
+    return
+}
+
+# Helper proc to read a value from inferior memory.  Reads at address held in
+# global PTR_ADDRESS, and use PTR_FORMAT_CHAR for the size of the read.
+proc read_ptr_value { } {
+    set value ""
+    gdb_test_multiple "x/1${::ptr_format_char}x ${::ptr_address}" "" {
+	-re -wrap "^${::hex}(?:\\s+<\[^>\]+>)?:\\s+($::hex)" {
+	    set value $expect_out(1,string)
+	}
+	-re -wrap "^${::hex}(?:\\s+<\[^>\]+>)?:\\s+Cannot access memory at address ${::hex}" {
+	    set value "unavailable"
+	}
+    }
+    return $value
+}
+
+set ptr_expected_value [read_ptr_value]
+if { $ptr_expected_value eq "" } {
+    untested "could not find expected value for library_ptr"
+    return
+}
+
+# Now compile a second executable.  This one doesn't load the shared
+# library as an actual shared library, but instead mmaps the library
+# into the executable.
+#
+# Load this executable within GDB and confirm that we can use the
+# offset we calculated previously to view the value of 'library_ptr'.
+set opts [list debug additional_flags=-DSHLIB_FILENAME=\"$library_filename\"]
+if {[prepare_for_testing "prepare second executable" $binfile \
+	 $srcfile3 $opts] != 0} {
+    return
+}
+
+if {![runto_main]} {
+    return
+}
+
+gdb_breakpoint [gdb_get_line_number "Undefined behaviour here" $srcfile3]
+gdb_continue_to_breakpoint "run to breakpoint"
+
+set library_base_address \
+    [get_hexadecimal_valueof "library_base_address" "unknown"]
+set ptr_address [format 0x%x [expr $library_base_address + $ptr_offset]]
+
+set ptr_value [read_ptr_value]
+gdb_assert { $ptr_value == $ptr_expected_value } \
+    "check value of pointer variable"
+
+# Now rerun the second executable outside of GDB.  The executable should crash
+# and generate a corefile.
+set corefile [core_find $binfile]
+if {$corefile eq ""} {
+    untested "could not generate core file"
+    return
+}
+
+# Load a core file from the global COREFILE.  Use TESTNAME as the name
+# of the test.
+#
+# If LINE_RE is not the empty string then this is a regexp for a line
+# that we expect to see in the output when loading the core file, if
+# the line is not present then this test will fail.
+#
+# Any lines beginning with 'warning: ' will cause this test to fail.
+#
+# A couple of other standard lines that are produced when loading a
+# core file are also checked for, just to make sure the core file
+# loading has progressed as expected.
+proc load_core_file { testname { line_re "" } } {
+    set code {}
+
+    if { $line_re ne "" } {
+	append code {
+	    -re "^$line_re\r\n" {
+		set saw_expected_line true
+		exp_continue
+	    }
+	}
+	set saw_expected_line false
+    } else {
+	set saw_expected_line true
+    }
+
+    set saw_unknown_warning false
+    set saw_generated_by_line false
+    set saw_prog_terminated_line false
+
+    append code {
+	-re "^warning: \[^\r\n\]+\r\n" {
+	    set saw_unknown_warning true
+	    exp_continue
+	}
+
+	-re "^Core was generated by \[^\r\n\]+\r\n" {
+	    set saw_generated_by_line true
+	    exp_continue
+	}
+
+	-re "^Program terminated with signal SIGSEGV, Segmentation fault\\.\r\n" {
+	    set saw_prog_terminated_line true
+	    exp_continue
+	}
+
+	-re "^$::gdb_prompt $" {
+	    gdb_assert {$saw_generated_by_line \
+			    && $saw_prog_terminated_line \
+			    && $saw_expected_line \
+			    && !$saw_unknown_warning} \
+		$gdb_test_name
+	}
+
+	-re "^\[^\r\n\]*\r\n" {
+	    exp_continue
+	}
+    }
+
+    set res [catch { return [gdb_test_multiple "core-file $::corefile" \
+				 "$testname" $code] } string]
+
+    if {$res == 1} {
+	global errorInfo errorCode
+	return -code error -errorinfo $errorInfo -errorcode $errorCode $string
+    } elseif {$res == 2} {
+	return $string
+    } else {
+	# We expect RES to be 2 (TCL_RETURN) or 1 (TCL_ERROR).  If we get
+	# here then somehow the 'catch' above finished without hitting
+	# either of those cases, which is .... weird.
+	perror "unexepcted return value, code = $res, value = $string"
+	return -1
+    }
+}
+
+# And now restart GDB, load the core-file and check that the library shows as
+# being mapped in, and that we can still read the library_ptr value from
+# memory.
+clean_restart $binfile
+
+load_core_file "load core file"
+
+set library_base_address [get_hexadecimal_valueof "library_base_address" \
+			      "unknown" "get library_base_address in core-file"]
+set ptr_address [format 0x%x [expr $library_base_address + $ptr_offset]]
+
+set ptr_value [read_ptr_value]
+gdb_assert { $ptr_value == $ptr_expected_value } \
+    "check value of pointer variable from core-file"
+
+# Now move the shared library file away and restart GDB.  This time when we
+# load the core-file we should see a warning that GDB has failed to map in the
+# library file.  An attempt to read the variable from the library file should
+# fail / give a warning.
+set library_backup_filename [standard_output_file "libfoo.so.backup"]
+remote_exec build "mv \"$library_filename\" \"$library_backup_filename\""
+
+clean_restart $binfile
+
+load_core_file "load corefile with library file missing" \
+    "warning: Can't open file [string_to_regexp $library_filename] during file-backed mapping note processing"
+
+set ptr_value [read_ptr_value]
+gdb_assert { $ptr_value eq "unavailable" } \
+    "check value of pointer is unavailable with library file missing"
+
+# Now symlink the .build-id/xx/xxx...xxx filename within the debug
+# directory to library we just moved aside.  Restart GDB and setup the
+# debug-file-directory before loading the core file.
+#
+# GDB should lookup the file to map via the build-id link in the
+# .build-id/ directory.
+set debugdir [standard_output_file "debugdir"]
+set build_id_filename \
+    $debugdir/[build_id_debug_filename_get $library_backup_filename ""]
+
+remote_exec build "mkdir -p [file dirname $build_id_filename]"
+remote_exec build "ln -sf $library_backup_filename $build_id_filename"
+
+clean_restart $binfile
+
+gdb_test_no_output "set debug-file-directory $debugdir" \
+    "set debug-file-directory"
+
+load_core_file "load corefile, lookup in debug-file-directory"
+
+set ptr_value [read_ptr_value]
+gdb_assert { $ptr_value == $ptr_expected_value } \
+    "check value of pointer variable from core-file, lookup in debug-file-directory"
+
+# Build a new version of the shared library, keep the library the same size,
+# but change the contents so the build-id changes.  Then restart GDB and load
+# the core-file again.  GDB should spot that the build-id for the shared
+# library is not as expected, and should refuse to map in the shared library.
+if {[build_executable "build second version of shared library" \
+	 $library_filename $srcfile2 \
+	 { debug shlib build-id \
+	       additional_flags=-DPOINTER_VALUE=0x11223344 }] != 0} {
+    return
+}
+
+clean_restart $binfile
+
+load_core_file "load corefile with wrong library in place" \
+    "warning: File [string_to_regexp $library_filename] doesn't match build-id from core-file during file-backed mapping processing"
+
+set ptr_value [read_ptr_value]
+gdb_assert { $ptr_value eq "unavailable" } \
+    "check value of pointer is unavailable with wrong library in place"
+
+# Setup a debuginfod server which can serve the original shared library file.
+# Then restart GDB and load the core-file.  GDB should download the original
+# shared library from debuginfod and use that to provide the file backed
+# mapping.
+if {![allow_debuginfod_tests]} {
+    untested "skippig debuginfod parts of this test"
+    return
+}
+
+set server_dir [standard_output_file "debuginfod.server"]
+file mkdir $server_dir
+file rename -force $library_backup_filename $server_dir
+
+prepare_for_debuginfod cache db
+
+set url [start_debuginfod $db $server_dir]
+if { $url eq "" } {
+    unresolved "failed to start debuginfod server"
+    return
+}
+
+with_debuginfod_env $cache {
+    setenv DEBUGINFOD_URLS $url
+
+    clean_restart
+    gdb_test_no_output "set debuginfod enabled on" \
+	"enabled debuginfod for initial test"
+    gdb_load $binfile
+
+    load_core_file "load corefile, download library from debuginfod" \
+	"Downloading\[^\r\n\]* executable for [string_to_regexp $library_filename]\\.\\.\\."
+
+    set ptr_value [read_ptr_value]
+    gdb_assert { $ptr_value == $ptr_expected_value } \
+	"check value of pointer variable after downloading library file"
+}
+
+stop_debuginfod
diff --git a/gdb/testsuite/gdb.debuginfod/fetch_src_and_symbols.exp b/gdb/testsuite/gdb.debuginfod/fetch_src_and_symbols.exp
index 401af0d..450d890 100644
--- a/gdb/testsuite/gdb.debuginfod/fetch_src_and_symbols.exp
+++ b/gdb/testsuite/gdb.debuginfod/fetch_src_and_symbols.exp
@@ -195,12 +195,6 @@ proc test_urls {urls pattern_re test} {
 	$test
 }
 
-# Used as a replacement for delete_breakpoints while calling
-# runto_main in one case where we don't want to delete all the
-# breakpoints.
-proc disable_delete_breakpoints {} {
-}
-
 # Uses the global variables DEBUGDIR and DB which are setup elsewhere
 # in this script.
 #
@@ -234,14 +228,15 @@ proc_with_prefix local_url { } {
     # the contents of DW_AT_comp_dir and DW_AT_name.
     gdb_test "set cwd $debugdir" "" "file [file tail $binfile] cwd"
     gdb_breakpoint $lineno
-    with_override delete_breakpoints disable_delete_breakpoints {
-	if {![runto_main]} {
-	    return
-	}
-	gdb_continue_to_breakpoint "runto breakpoint in main" \
-	    ".* Breakpoint here\\. .*"
+
+    # Run to main, but don't delete all breakpoints.
+    if {![runto_main no-delete-breakpoints]} {
+	return
     }
 
+    gdb_continue_to_breakpoint "runto breakpoint in main" \
+	".* Breakpoint here\\. .*"
+
     # GDB should now find the executable file.
     set enable_debuginfod_question \
 	"Enable debuginfod for this session. \\(y or \\\[n\\\]\\) "
diff --git a/gdb/testsuite/gdb.debuginfod/solib-with-soname-1.c b/gdb/testsuite/gdb.debuginfod/solib-with-soname-1.c
new file mode 100644
index 0000000..30e9267
--- /dev/null
+++ b/gdb/testsuite/gdb.debuginfod/solib-with-soname-1.c
@@ -0,0 +1,39 @@
+/* Copyright 2024 Free Software Foundation, Inc.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
+
+#include <stdlib.h>
+
+/* It is important that these two variables have names of the same length
+   so that the debug information in the two library versions is laid out
+   the same.  If they differ then the .dynamic section might move, which
+   will trigger a different check within GDB than the one we actually want
+   to check.  */
+
+#if LIB_VERSION == 1
+volatile int *library_1_var = (volatile int *) 0x12345678;
+#elif LIB_VERSION == 2
+volatile int *library_2_var = (volatile int *) 0x11223344;
+#else
+# error Unknown library version
+#endif
+
+int
+foo (void)
+{
+  /* This should trigger a core dump.  */
+  abort ();
+
+  return 0;
+}
diff --git a/gdb/testsuite/gdb.debuginfod/solib-with-soname-2.c b/gdb/testsuite/gdb.debuginfod/solib-with-soname-2.c
new file mode 100644
index 0000000..a51d48e
--- /dev/null
+++ b/gdb/testsuite/gdb.debuginfod/solib-with-soname-2.c
@@ -0,0 +1,41 @@
+/* Copyright 2024 Free Software Foundation, Inc.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
+
+#include <assert.h>
+#include <dlfcn.h>
+#include <stddef.h>
+
+/* This is in the shared library.  */
+extern int foo (void);
+
+/* This is updated by the .exp file.  */
+char *libname = "libfoo_2.so";
+
+int
+main (void)
+{
+  void *handle;
+  int res, tmp;
+
+  handle = dlopen (libname, RTLD_LAZY);
+  assert (handle != NULL);
+
+  res = foo ();
+
+  tmp = dlclose (handle);
+  assert (tmp == 0);
+
+  return res;
+}
diff --git a/gdb/testsuite/gdb.debuginfod/solib-with-soname.exp b/gdb/testsuite/gdb.debuginfod/solib-with-soname.exp
new file mode 100644
index 0000000..9ef1204
--- /dev/null
+++ b/gdb/testsuite/gdb.debuginfod/solib-with-soname.exp
@@ -0,0 +1,290 @@
+# Copyright 2024 Free Software Foundation, Inc.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
+
+# This test exercises GDB's ability to validate build-ids when loading
+# shared libraries for a core file.
+#
+# The test creates two "versions" of a shared library, sets up a
+# symlink to point to one version of the library, and creates a core file.
+#
+# We then try re-loading the core file and executable and check that
+# GDB is able to correctly load the shared library.  To confuse things
+# we retarget the library symlink at the other version of the library.
+#
+# After that we repeat the test, but this time deleting the symlink
+# completely.
+#
+# Then we remove the version of the library completely, at this point
+# we do expect GDB to give a warning about being unable to load the library.
+#
+# And finally, we setup debuginfod and have it serve the missing
+# library file, GDB should correctly download the library file.
+#
+# Despite this test living in the gdb.debuginfod/ directory, only the last
+# part of this test actually uses debuginfod, everything up to that point is
+# pretty generic.
+
+load_lib debuginfod-support.exp
+
+require allow_shlib_tests
+require {istarget "*-linux*"}
+require {!is_remote host}
+require {!using_fission}
+
+standard_testfile -1.c -2.c
+
+# Build two similar, but slightly different versions of the shared
+# library.  Both libraries have DT_SONAME set to the generic
+# libfoo.so, we'll create a symlink with that name later.
+set library_1_filename [standard_output_file "libfoo_1.so"]
+set library_2_filename [standard_output_file "libfoo_2.so"]
+
+# The generic name for the library.
+set library_filename [standard_output_file "libfoo.so"]
+
+# When compiling a shared library the -Wl,-soname,NAME option is
+# automatically added based on the final name of the library.  We want
+# to compile libfoo_1.so, but set the soname to libfoo.so.  To achieve
+# this we first compile into libfoo.so, and then rename the library to
+# libfoo_1.so.
+if {[build_executable "build libfoo_1.so" $library_filename \
+	 $srcfile \
+	      { debug shlib build-id \
+		    additional_flags=-DLIB_VERSION=1 }] == -1} {
+    return
+}
+remote_exec build "mv ${library_filename} ${library_1_filename}"
+
+# See the comment above, but this time we rename to libfoo_2.so.
+if {[build_executable "build libfoo_2.so" $library_filename \
+	 $srcfile \
+	      { debug shlib build-id \
+		    additional_flags=-DLIB_VERSION=2 }] == -1} {
+    return
+}
+remote_exec build "mv ${library_filename} ${library_2_filename}"
+
+# Create libfoo.so symlink to the libfoo_1.so library.  If this
+# symlink creation fails then we assume we can't create symlinks on
+# this host.  If this succeeds then later symlink creation is required
+# to succeed, and will trigger an FAIL if it doesn't.
+set status \
+    [remote_exec build \
+	 "ln -sf ${library_1_filename} ${library_filename}"]
+if {[lindex $status 0] != 0} {
+    unsupported "host does not support symbolic links"
+    return
+}
+
+# Build the executable.  This links against libfoo.so, which is
+# poining at libfoo_1.so.  Just to confuse things even more, this
+# executable uses dlopen to load libfoo_2.so.  Weird!
+if { [build_executable "build executable" ${binfile} ${srcfile2} \
+	  [list debug shlib=${library_filename} shlib_load]] == -1 } {
+    return
+}
+
+# If the board file is automatically splitting the debug information
+# into a separate file (e.g. the cc-with-gnu-debuglink.exp board) then
+# this test isn't going to work.
+clean_restart
+gdb_file_cmd $binfile
+if {$gdb_file_cmd_debug_info ne "debug"} {
+    unsupported "failed to find debug information"
+    return
+}
+if {[regexp "${testfile}.debug" $gdb_file_cmd_msg]} {
+    unsupported "debug information has been split to a separate file"
+    return
+}
+
+# Run BINFILE which will generate a corefile.
+set corefile [core_find $binfile]
+if {$corefile eq ""} {
+    untested "could not generate core file"
+    return
+}
+
+# Helper proc to load global BINFILE and then load global COREFILE.
+#
+# If EXPECT_WARNING is true then we require a warning about being
+# unable to load the shared library symbols, otherwise, EXPECT_WARNING
+# is false and we require no warning.
+#
+# If EXPECT_DOWNLOAD is true then we require a line indicating that
+# the shared library is being downloaded from debuginfod, otherwise
+# the shared library should not be downloaded.
+#
+# If DEBUGDIR is not the empty string then 'debug-file-directory' is
+# set to the value of DEBUGDIR.
+proc load_exec_and_core_file { expect_warning expect_download testname \
+				   {debugdir ""} } {
+    with_test_prefix $testname {
+	clean_restart $::binfile
+
+	if { $debugdir ne "" } {
+	    gdb_test_no_output "set debug-file-directory $debugdir" \
+		"set debug directory"
+	}
+
+	set saw_warning false
+	set saw_download false
+	set saw_generated false
+	set saw_terminated false
+
+	gdb_test_multiple "core-file $::corefile" "load core file" {
+	    -re "^Core was generated by \[^\r\n\]+\r\n" {
+		set saw_generated true
+		exp_continue
+	    }
+	    -re "^Program terminated with signal \[^\r\n\]+\r\n" {
+		set saw_terminated true
+		exp_continue
+	    }
+	    -re "^warning: Can't open file \[^\r\n\]+ during file-backed mapping note processing\r\n" {
+		# Ignore warnings from the file backed mapping phase.
+		exp_continue
+	    }
+	    -re "^warning: Could not load shared library symbols for \[^\r\n\]+/libfoo\\.so\\.\r\n" {
+		set saw_warning true
+		exp_continue
+	    }
+	    -re "^Downloading executable for \[^\r\n\]+/libfoo_1\\.so\\.\\.\\.\r\n" {
+		set saw_download true
+		exp_continue
+	    }
+	    -re "^$::gdb_prompt $" {
+		gdb_assert { $saw_generated && $saw_terminated \
+				 && $saw_warning == $expect_warning \
+				 && $saw_download == $expect_download } \
+		    $gdb_test_name
+	    }
+	    -re "^\[^\r\n\]*\r\n" {
+		exp_continue
+	    }
+	}
+
+	# If we don't expect a warning then debug symbols from the
+	# shared library should be available.  Confirm we can read a
+	# variable from the shared library.  If we do expect a warning
+	# then the shared library debug symbols have not loaded, and
+	# the library variable should not be available.
+	if { !$expect_warning } {
+	    gdb_test "print/x library_1_var" " = 0x12345678" \
+		"check library_1_var can be read"
+	} else {
+	    gdb_test "print/x library_1_var" \
+		"^No symbol \"library_1_var\" in current context\\." \
+		"check library_1_var cannot be read"
+	}
+    }
+}
+
+# Initial test, just load the executable and core file.  At this point
+# everything should load fine as everything is where we expect to find
+# it.
+load_exec_and_core_file false false \
+    "load core file, all libraries as expected"
+
+# Update libfoo.so symlink to point at the second library then reload
+# the core file.  GDB should spot that the symlink points to the wrong
+# file, but should be able to figure out the correct file to load as
+# the right file will be in the mapped file list.
+set status [remote_exec build \
+		"ln -sf ${library_2_filename} ${library_filename}"]
+gdb_assert { [lindex $status 0] == 0 } \
+    "update library symlink to point to the wrong file"
+
+load_exec_and_core_file false false \
+    "load core file, symlink points to wrong file"
+
+# Remove libfoo.so symlink and reload the core file.  As in the
+# previous test GDB should be able to figure out the correct file to
+# load as the correct file will still appear in the mapped file list.
+set status [remote_exec build "rm -f ${library_filename}"]
+gdb_assert { [lindex $status 0] == 0 } "remove library symlink"
+
+load_exec_and_core_file false false \
+    "load core file, symlink removed"
+
+# Remove LIBRARY_1_FILENAME.  We'll now see a warning that the mapped
+# file can't be loaded (we ignore that warning), and we'll see a
+# warning that the shared library can't be loaded.
+set library_1_backup_filename ${library_1_filename}.backup
+set status \
+    [remote_exec build \
+	 "mv ${library_1_filename} ${library_1_backup_filename}"]
+gdb_assert { [lindex $status 0] == 0 } \
+    "remove libfoo_1.so"
+
+load_exec_and_core_file true false \
+    "load core file, libfoo_1.so removed"
+
+# Symlink the .build-id/xx/xxx...xxx filename within the debug
+# directory to LIBRARY_1_BACKUP_FILENAME, now when we restart GDB it
+# should find the missing library within the debug directory.
+set debugdir [standard_output_file "debugdir"]
+set build_id_filename \
+    $debugdir/[build_id_debug_filename_get $library_1_backup_filename ""]
+set status \
+    [remote_exec build \
+	 "mkdir -p [file dirname $build_id_filename]"]
+gdb_assert { [lindex $status 0] == 0 } \
+    "create sub-directory within the debug directory"
+set status \
+    [remote_exec build \
+	 "ln -sf $library_1_backup_filename $build_id_filename"]
+gdb_assert { [lindex $status 0] == 0 } \
+    "create symlink within the debug directory "
+
+load_exec_and_core_file false false \
+    "load core file, find libfoo_1.so through debug-file-directory" \
+    $debugdir
+
+# Setup a debuginfod server which can serve the original shared
+# library file.
+if {![allow_debuginfod_tests]} {
+    untested "skippig debuginfod parts of this test"
+    return
+}
+
+set server_dir [standard_output_file "debuginfod.server"]
+file mkdir $server_dir
+file rename -force $library_1_backup_filename $server_dir
+
+prepare_for_debuginfod cache db
+
+set url [start_debuginfod $db $server_dir]
+if { $url eq "" } {
+    unresolved "failed to start debuginfod server"
+    return
+}
+
+with_debuginfod_env $cache {
+    setenv DEBUGINFOD_URLS $url
+
+    save_vars { GDBFLAGS } {
+	append GDBFLAGS " -ex \"set debuginfod enabled on\""
+
+	# Reload the executable and core file.  GDB should download
+	# the file libfoo_1.so using debuginfod during the mapped file
+	# phase, but should then reuse that download during the shared
+	# library phase.
+	load_exec_and_core_file false true \
+	    "load core file, use debuginfod"
+    }
+}
+
+stop_debuginfod
diff --git a/gdb/testsuite/gdb.dwarf2/backward-spec-inter-cu.exp b/gdb/testsuite/gdb.dwarf2/backward-spec-inter-cu.exp
index 59b3db5..2f41db9 100644
--- a/gdb/testsuite/gdb.dwarf2/backward-spec-inter-cu.exp
+++ b/gdb/testsuite/gdb.dwarf2/backward-spec-inter-cu.exp
@@ -98,6 +98,7 @@ foreach_with_prefix worker_threads $worker_threads_list {
 
     gdb_load $binfile
 
-    gdb_test "maint print objfiles" "$eol$ws+qualified:$ws+ns::v$eol.*" \
+    gdb_test "pipe maint print objfiles | grep ns::v" \
+	"$ws+qualified:$ws+ns::v" \
 	"v has parent ns"
 }
diff --git a/gdb/testsuite/gdb.dwarf2/count.exp b/gdb/testsuite/gdb.dwarf2/count.exp
index 52deb19..096e093 100644
--- a/gdb/testsuite/gdb.dwarf2/count.exp
+++ b/gdb/testsuite/gdb.dwarf2/count.exp
@@ -124,25 +124,11 @@ Dwarf::assemble $asm_file {
     }
 }
 
-if { [gdb_compile ${srcdir}/${subdir}/${srcfile} ${binfile}1.o \
-	  object {nodebug}] != "" } {
+if { [prepare_for_testing "failed to prepare" $testfile \
+	  [list $srcfile $asm_file] {nodebug}] } {
     return -1
 }
 
-if { [gdb_compile $asm_file ${binfile}2.o object {nodebug}] != "" } {
-    return -1
-}
-
-if { [gdb_compile [list ${binfile}1.o ${binfile}2.o] \
-	  "${binfile}" executable {}] != "" } {
-    return -1
-}
-
-save_vars { GDBFLAGS } {
-    set GDBFLAGS [concat $GDBFLAGS " -readnow"]
-    clean_restart ${testfile}
-}
-
 if ![runto_main] {
     return -1
 }
diff --git a/gdb/testsuite/gdb.dwarf2/dw2-bad-parameter-type.exp b/gdb/testsuite/gdb.dwarf2/dw2-bad-parameter-type.exp
index 547ab81..d6b8d2e 100644
--- a/gdb/testsuite/gdb.dwarf2/dw2-bad-parameter-type.exp
+++ b/gdb/testsuite/gdb.dwarf2/dw2-bad-parameter-type.exp
@@ -28,7 +28,7 @@ if  { [gdb_compile "${srcdir}/${subdir}/${srcfile}" "${binfile}" object {}] != "
 clean_restart $executable
 
 # The first access (as we do not use -readnow) prints some:
-# Dwarf Error: Cannot find DIE at 0x0 referenced from DIE at 0x29 [in module ...]
+# DWARF Error: Cannot find DIE at 0x0 referenced from DIE at 0x29 [in module ...]
 with_test_prefix "first" {
     gdb_test "ptype f"
 }
diff --git a/gdb/testsuite/gdb.dwarf2/dw2-error.exp b/gdb/testsuite/gdb.dwarf2/dw2-error.exp
index 8081e7f..526b394 100644
--- a/gdb/testsuite/gdb.dwarf2/dw2-error.exp
+++ b/gdb/testsuite/gdb.dwarf2/dw2-error.exp
@@ -37,7 +37,7 @@ set host_binfile [gdb_remote_download host $binfile]
 
 # First test that reading symbols fails.
 gdb_test "file $host_binfile" \
-    {Reading symbols.*Dwarf Error: wrong version in compilation unit header \(is 153, should be 2, 3, 4 or 5\).*} \
+    {Reading symbols.*DWARF Error: wrong version in compilation unit header \(is 153, should be 2, 3, 4 or 5\).*} \
     "file $testfile"
 
 # We can't use proc readnow, because the PR makes it return 0.
diff --git a/gdb/testsuite/gdb.dwarf2/dw2-fixed-point.c b/gdb/testsuite/gdb.dwarf2/dw2-fixed-point.c
index 58b97ca..2789e6a 100644
--- a/gdb/testsuite/gdb.dwarf2/dw2-fixed-point.c
+++ b/gdb/testsuite/gdb.dwarf2/dw2-fixed-point.c
@@ -46,11 +46,5 @@ int8_t pck__fp1_range_var = 16;
 int
 main (void)
 {
-  pck__fp1_var++;
-  pck__fp1_var2++;
-  pck__fp2_var++;
-  pck__fp3_var++;
-  pck__fp1_range_var++;
-
   return 0;
 }
diff --git a/gdb/testsuite/gdb.dwarf2/dw2-inter-cu-error-2.exp b/gdb/testsuite/gdb.dwarf2/dw2-inter-cu-error-2.exp
new file mode 100644
index 0000000..585fd54
--- /dev/null
+++ b/gdb/testsuite/gdb.dwarf2/dw2-inter-cu-error-2.exp
@@ -0,0 +1,51 @@
+# Copyright 2024 Free Software Foundation, Inc.
+
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
+# Check that GDB doesn't crash on invalid dwarf, specifically an inter-CU
+# reference pointing to a dummy CU.
+
+load_lib dwarf.exp
+
+# This test can only be run on targets which support DWARF-2 and use gas.
+require dwarf2_support
+
+standard_testfile main.c .S
+
+# Create the DWARF.
+set asm_file [standard_output_file $srcfile2]
+Dwarf::assemble $asm_file {
+    declare_labels label1
+
+    cu {} {
+	compile_unit {{language @DW_LANG_C}} {
+	    subprogram {
+		{MACRO_AT_range { main }}
+		{DW_AT_specification %$label1}
+	    }
+	}
+    }
+
+    label1: cu {} {
+    }
+}
+
+if [prepare_for_testing "failed to prepare" $testfile \
+	[list $asm_file $srcfile] {nodebug}] {
+    return -1
+}
+
+gdb_assert \
+    { [regexp "DWARF Error: cannot follow reference" $gdb_file_cmd_msg] } \
+    "Error message"
diff --git a/gdb/testsuite/gdb.dwarf2/dw2-inter-cu-error.exp b/gdb/testsuite/gdb.dwarf2/dw2-inter-cu-error.exp
new file mode 100644
index 0000000..92ffcae
--- /dev/null
+++ b/gdb/testsuite/gdb.dwarf2/dw2-inter-cu-error.exp
@@ -0,0 +1,51 @@
+# Copyright 2024 Free Software Foundation, Inc.
+
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
+load_lib dwarf.exp
+
+# This test can only be run on targets which support DWARF-2 and use gas.
+require dwarf2_support
+
+standard_testfile main.c .S
+
+# Create the DWARF.
+set asm_file [standard_output_file $srcfile2]
+Dwarf::assemble $asm_file {
+    declare_labels label1
+
+    cu {} {
+	compile_unit {{language @DW_LANG_C}} {
+	    subprogram {
+		{MACRO_AT_range { main }}
+		{DW_AT_specification %$label1}
+	    }
+	}
+    }
+
+    cu {} {
+	compile_unit {{language @DW_LANG_C}} {
+	    label1:
+	}
+    }
+}
+
+if [prepare_for_testing "failed to prepare" $testfile \
+	[list $asm_file $srcfile] {nodebug}] {
+    return -1
+}
+
+# Verify that GDB notices the null DIE.
+gdb_assert { [regexp "DWARF Error: Unexpected null DIE" $gdb_file_cmd_msg] } \
+	"Null DIE error missing"
diff --git a/gdb/testsuite/gdb.dwarf2/dw2-inter-cu-forth-and-back.exp b/gdb/testsuite/gdb.dwarf2/dw2-inter-cu-forth-and-back.exp
new file mode 100644
index 0000000..62674bd
--- /dev/null
+++ b/gdb/testsuite/gdb.dwarf2/dw2-inter-cu-forth-and-back.exp
@@ -0,0 +1,60 @@
+# Copyright 2024 Free Software Foundation, Inc.
+
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
+# Check that the cooked index reader can handle inter-CU references:
+# - DIE1@CU1 -> DIE2@CU2
+# - DIE2@CU2 -> DIE3@CU1.
+
+load_lib dwarf.exp
+
+# This test can only be run on targets which support DWARF-2 and use gas.
+require dwarf2_support
+
+standard_testfile main.c .S
+
+# Create the DWARF.
+set asm_file [standard_output_file $srcfile2]
+Dwarf::assemble $asm_file {
+    declare_labels label1 label2
+
+    cu {} {
+	compile_unit {{language @DW_LANG_C}} {
+	    subprogram {
+		{MACRO_AT_range { main }}
+		{DW_AT_specification %$label1}
+	    }
+
+	    label2: subprogram {
+		{DW_AT_name main}
+	    }
+	}
+    }
+
+    cu {} {
+	compile_unit {{language @DW_LANG_C}} {
+	    label1: subprogram {
+		{DW_AT_specification %$label2}
+	    }
+	}
+    }
+}
+
+if [prepare_for_testing "failed to prepare" $testfile \
+	[list $asm_file $srcfile] {nodebug}] {
+    return -1
+}
+
+# Regression test for PR32081.
+gdb_assert { ![regexp -nocase "error:" $gdb_file_cmd_msg] } "No Error message"
diff --git a/gdb/testsuite/gdb.dwarf2/dw2-line-number-zero.exp b/gdb/testsuite/gdb.dwarf2/dw2-line-number-zero.exp
index c510de4..9124aff 100644
--- a/gdb/testsuite/gdb.dwarf2/dw2-line-number-zero.exp
+++ b/gdb/testsuite/gdb.dwarf2/dw2-line-number-zero.exp
@@ -56,6 +56,10 @@ Dwarf::assemble $asm_file {
 	file_name "$srcfile" 1
 
 	program {
+	    DW_LNE_set_address $bar1_start
+	    line 25
+	    DW_LNS_copy
+
 	    DW_LNE_set_address bar1_label
 	    line 27
 	    DW_LNS_copy
@@ -76,6 +80,10 @@ Dwarf::assemble $asm_file {
 	    DW_LNE_end_sequence
 
 
+	    DW_LNE_set_address $bar2_start
+	    line 39
+	    DW_LNS_copy
+
 	    DW_LNE_set_address bar2_label
 	    line 41
 	    DW_LNS_copy
diff --git a/gdb/testsuite/gdb.dwarf2/dw2-lines.c b/gdb/testsuite/gdb.dwarf2/dw2-lines.c
index 67c98fe..221d7b9 100644
--- a/gdb/testsuite/gdb.dwarf2/dw2-lines.c
+++ b/gdb/testsuite/gdb.dwarf2/dw2-lines.c
@@ -22,7 +22,7 @@ foo (int x)
 
 void
 bar (void)
-{
+{ /* bar: */
   asm ("bar_label: .globl bar_label");
   foo (1);
   asm ("bar_label_2: .globl bar_label_2");
diff --git a/gdb/testsuite/gdb.dwarf2/dw2-lines.exp b/gdb/testsuite/gdb.dwarf2/dw2-lines.exp
index 9617782..4814f49 100644
--- a/gdb/testsuite/gdb.dwarf2/dw2-lines.exp
+++ b/gdb/testsuite/gdb.dwarf2/dw2-lines.exp
@@ -88,6 +88,10 @@ proc test_1 { _cv _cdw64 _lv _ldw64 {_string_form ""}} {
 		# to set the current file explicitly.
 		DW_LNS_set_file $diridx
 
+		DW_LNE_set_address $bar_start
+		line [line_for bar]
+		DW_LNS_copy
+
 		DW_LNE_set_address bar_label
 		line [line_for bar_label]
 		DW_LNS_copy
diff --git a/gdb/testsuite/gdb.dwarf2/dw2-missing-cu-tag.exp b/gdb/testsuite/gdb.dwarf2/dw2-missing-cu-tag.exp
index 3eadeb2..f84142a 100644
--- a/gdb/testsuite/gdb.dwarf2/dw2-missing-cu-tag.exp
+++ b/gdb/testsuite/gdb.dwarf2/dw2-missing-cu-tag.exp
@@ -56,7 +56,7 @@ gdb_test_no_output "maint set dwarf synchronous on"
 set pattern1 \
     [multi_line \
 	 "Reading symbols from \[^\r\n\]+" \
-	 "Dwarf Error: unexpected tag 'DW_TAG_subprogram' at offset $hex"]
+	 "DWARF Error: unexpected tag 'DW_TAG_subprogram' at offset $hex"]
 
 # This pattern is hit when GDB does use -readnow (e.g. running with
 # --target_board=readnow).
@@ -64,7 +64,7 @@ set pattern2 \
     [multi_line \
 	 "Reading symbols from \[^\r\n\]+" \
 	 "Expanding full symbols from \[^\r\n\]+" \
-	 "Dwarf Error: unexpected tag 'DW_TAG_subprogram' at offset $hex"]
+	 "DWARF Error: unexpected tag 'DW_TAG_subprogram' at offset $hex"]
 
 # Load the executable, we expect an error from the DWARF parser.
 gdb_test_multiple "file $host_binfile" "file $testfile" {
diff --git a/gdb/testsuite/gdb.dwarf2/dw2-ranges-base.exp b/gdb/testsuite/gdb.dwarf2/dw2-ranges-base.exp
index 1a3d53c..2be211f 100644
--- a/gdb/testsuite/gdb.dwarf2/dw2-ranges-base.exp
+++ b/gdb/testsuite/gdb.dwarf2/dw2-ranges-base.exp
@@ -40,7 +40,7 @@ Dwarf::assemble $asm_file {
 	[function_range frame3 [list ${srcdir}/${subdir}/$srcfile]]
 
     # Very simple info for this test program.  We don't care about
-    # this information being correct (w.r.t. funtion / argument types)
+    # this information being correct (w.r.t. function / argument types)
     # just so long as the compilation using makes use of the
     # .debug_ranges data then the test achieves its objective.
     cu { label cu_label } {
diff --git a/gdb/testsuite/gdb.dwarf2/dw2-step-out-of-function-no-stmt.exp b/gdb/testsuite/gdb.dwarf2/dw2-step-out-of-function-no-stmt.exp
index a59c637..55f4373 100644
--- a/gdb/testsuite/gdb.dwarf2/dw2-step-out-of-function-no-stmt.exp
+++ b/gdb/testsuite/gdb.dwarf2/dw2-step-out-of-function-no-stmt.exp
@@ -19,7 +19,7 @@
 #
 # This sort of thing can occur in optimized code, f.i. here a slightly more
 # elaborate case with another is-stmt=no entry (the one with line number 12)
-# inbetween:
+# in between:
 # INDEX  LINE   ADDRESS            IS-STMT
 # 12     13     0x00000000004003ed
 # 13     12     0x00000000004003f2
diff --git a/gdb/testsuite/gdb.dwarf2/dw2-using-debug-str.exp b/gdb/testsuite/gdb.dwarf2/dw2-using-debug-str.exp
index cd3dd0b..c84a530 100644
--- a/gdb/testsuite/gdb.dwarf2/dw2-using-debug-str.exp
+++ b/gdb/testsuite/gdb.dwarf2/dw2-using-debug-str.exp
@@ -131,7 +131,7 @@ clean_restart
 gdb_test_no_output "maint set dwarf synchronous on"
 
 set line1 "Reading symbols from \[^\r\n\]+"
-set dwarf_error "Dwarf Error: DW_FORM_strp used without required section"
+set dwarf_error "DWARF Error: DW_FORM_strp used without required section"
 
 # This pattern is hit when GDB does not use -readnow (i.e. the default
 # behaviour).
diff --git a/gdb/testsuite/gdb.dwarf2/dwz-unused-pu.exp b/gdb/testsuite/gdb.dwarf2/dwz-unused-pu.exp
new file mode 100644
index 0000000..1dd91ee
--- /dev/null
+++ b/gdb/testsuite/gdb.dwarf2/dwz-unused-pu.exp
@@ -0,0 +1,75 @@
+# Copyright 2024 Free Software Foundation, Inc.
+
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
+# Check that a symbol from an unused PU is not accessible.
+
+load_lib dwarf.exp
+
+# This test can only be run on targets which support DWARF-2 and use gas.
+require dwarf2_support
+
+standard_testfile main.c -dw.S
+
+# Create the DWARF.
+set asm_file [standard_output_file $srcfile2]
+Dwarf::assemble $asm_file {
+    declare_labels partial_label int_label int_label2
+
+    cu {} {
+	compile_unit {{language @DW_LANG_C}} {
+	    subprogram {
+		{MACRO_AT_func { main }}
+	    }
+	}
+    }
+
+    cu {} {
+	partial_unit {} {
+	    int_label: base_type {
+		{name int}
+		{byte_size 4 sdata}
+		{encoding @DW_ATE_signed}
+	    }
+
+	    constant {
+		{name the_int}
+		{type :$int_label}
+		{const_value 99 data1}
+	    }
+	}
+    }
+}
+
+if { [prepare_for_testing "failed to prepare" $testfile \
+	  [list $asm_file $srcfile] {nodebug}] } {
+    return -1
+}
+
+set cmd "p the_int"
+set re \
+    [string_to_regexp \
+	 {No symbol "the_int" in current context.}]
+
+# Check that the unreferenced PU is not expanded.
+gdb_test $cmd $re
+
+# This should expand all CUs and referenced PUs, but not an unreferenced PU.
+gdb_test_no_output "maint expand-symtabs"
+
+# Flush the symbol cache to do a new symbol lookup.
+gdb_test_no_output "maint flush symbol-cache"
+
+# Check that the unreferenced PU is not expanded after "maint expand-symtabs".
+gdb_test $cmd $re "$cmd, again"
diff --git a/gdb/testsuite/gdb.dwarf2/enum-type-c++.cc b/gdb/testsuite/gdb.dwarf2/enum-type-c++.cc
new file mode 100644
index 0000000..691c7fc
--- /dev/null
+++ b/gdb/testsuite/gdb.dwarf2/enum-type-c++.cc
@@ -0,0 +1,35 @@
+/* This testcase is part of GDB, the GNU debugger.
+
+   Copyright 2024 Free Software Foundation, Inc.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
+
+namespace ns {
+
+class A {
+public:
+  enum {
+    val1 = 1
+  };
+};
+
+enum class ec
+{
+  val2 = 2,
+};
+}
+
+int u1 = ns::A::val1;
+
+int u2 = (int)ns::ec::val2;
diff --git a/gdb/testsuite/gdb.dwarf2/enum-type-c++.exp b/gdb/testsuite/gdb.dwarf2/enum-type-c++.exp
new file mode 100644
index 0000000..4f9610c
--- /dev/null
+++ b/gdb/testsuite/gdb.dwarf2/enum-type-c++.exp
@@ -0,0 +1,67 @@
+# Copyright 2024 Free Software Foundation, Inc.
+
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
+require !readnow
+
+load_lib dwarf.exp
+
+# This test can only be run on targets which support DWARF-2 and use gas.
+require dwarf2_support
+
+standard_testfile main.c .cc
+
+if { [prepare_for_testing "failed to prepare" $testfile \
+	  [list $srcfile $srcfile2] {debug c++}] } {
+    return -1
+}
+
+require {string equal [have_index $binfile] ""}
+
+set lines [gdb_get_lines "maint print objfiles"]
+set re_ws "\[ \t\]"
+
+# Regression test for PR31900.
+set val1 ns::A::val1
+set test "val1 has a parent"
+if { [regexp val1 $lines] } {
+    set re \
+	[multi_line \
+	     "" \
+	     "$re_ws+qualified:$re_ws+$val1" \
+	     ".*"]
+    gdb_assert {[regexp $re $lines]} $test
+
+    gdb_test "print $val1" " = $val1"
+} else {
+    # Clang doesn't emit a DIE for val1.
+    unsupported $test
+}
+
+# Regression test for PR32158.
+set val2 ns::ec::val2
+set test "val2 has correct parent"
+if { [regexp val2 $lines] } {
+    set re \
+	[multi_line \
+	     "" \
+	     "$re_ws+qualified:$re_ws+$val2" \
+	     ".*"]
+    gdb_assert {[regexp $re $lines]} $test
+
+    gdb_test "print $val2" " = $val2"
+} else {
+    # Clang doesn't emit a DIE for val2.
+    unsupported $test
+}
diff --git a/gdb/testsuite/gdb.dwarf2/enum-type.exp b/gdb/testsuite/gdb.dwarf2/enum-type.exp
index 394d287..ec12db5 100644
--- a/gdb/testsuite/gdb.dwarf2/enum-type.exp
+++ b/gdb/testsuite/gdb.dwarf2/enum-type.exp
@@ -65,6 +65,41 @@ Dwarf::assemble $asm_file {
 	    }
 	}
     }
+
+    cu {} {
+	DW_TAG_compile_unit {
+		{DW_AT_language @DW_LANG_C_plus_plus}
+		{DW_AT_name	tmp.c}
+		{DW_AT_comp_dir /tmp}
+	} {
+	    declare_labels integer_label forward
+
+	    integer_label: DW_TAG_base_type {
+		{DW_AT_byte_size 4 DW_FORM_sdata}
+		{DW_AT_encoding	 @DW_ATE_signed}
+		{DW_AT_name	 int}
+	    }
+
+	    DW_TAG_enumeration_type {
+		{DW_AT_specification :$forward}
+	    } {
+		DW_TAG_enumerator {
+		    {DW_AT_name val1}
+		    {DW_AT_const_value 1 DW_FORM_sdata}
+		}
+	    }
+
+	    DW_TAG_namespace {
+		{DW_AT_name ns}
+	    } {
+		forward: DW_TAG_enumeration_type {
+		    {DW_AT_name e}
+		    {DW_AT_type :$integer_label}
+		    {DW_AT_declaration 1 flag}
+		}
+	    }
+	}
+    }
 }
 
 if { [prepare_for_testing "failed to prepare" ${testfile} \
@@ -79,3 +114,18 @@ gdb_test "ptype enum EU" "type = enum EU {TWO = 2}" \
 gdb_test_no_output "set lang c++"
 gdb_test "ptype enum EU" "type = enum EU : unsigned int {TWO = 2}" \
     "ptype EU in C++"
+
+gdb_test "p ns::val1" \
+    " = ns::val1"
+
+require !readnow
+require {string equal [have_index $binfile] ""}
+
+set re_ws "\[ \t\]"
+
+gdb_test_lines "maint print objfiles" \
+    "val1 has a parent" \
+    [multi_line \
+	 "" \
+	 "$re_ws+qualified:$re_ws+ns::val1" \
+	 ".*"]
diff --git a/gdb/testsuite/gdb.dwarf2/fission-reread.S b/gdb/testsuite/gdb.dwarf2/fission-reread.S
index 1763fab..279f6f3 100644
--- a/gdb/testsuite/gdb.dwarf2/fission-reread.S
+++ b/gdb/testsuite/gdb.dwarf2/fission-reread.S
@@ -97,7 +97,7 @@ SYMBOL(main):
 	.byte	0x87
 	.4byte	.Lskeleton_debug_line0	/* DW_AT_stmt_list */
 
-	/* Manually inserted to have a DW_AT_specification refering to
+	/* Manually inserted to have a DW_AT_specification referring to
 	   something and appearing ahead of it.  */
 	.uleb128 0x8	/* DW_TAG_class_type */
 	.4byte .Ltu_class_type - .Ltu_start_dwo
diff --git a/gdb/testsuite/gdb.dwarf2/forward-spec-inter-cu.exp b/gdb/testsuite/gdb.dwarf2/forward-spec-inter-cu.exp
index d8367b0..b734c30 100644
--- a/gdb/testsuite/gdb.dwarf2/forward-spec-inter-cu.exp
+++ b/gdb/testsuite/gdb.dwarf2/forward-spec-inter-cu.exp
@@ -98,6 +98,7 @@ foreach_with_prefix worker_threads $worker_threads_list {
 
     gdb_load $binfile
 
-    gdb_test "maint print objfiles" "$eol$ws+qualified:$ws+ns::v$eol.*" \
+    gdb_test "pipe maint print objfiles | grep ns::v" \
+	"$ws+qualified:$ws+ns::v" \
 	"v has parent ns"
 }
diff --git a/gdb/testsuite/gdb.dwarf2/forward-spec.exp b/gdb/testsuite/gdb.dwarf2/forward-spec.exp
index b045c02..5d41f87 100644
--- a/gdb/testsuite/gdb.dwarf2/forward-spec.exp
+++ b/gdb/testsuite/gdb.dwarf2/forward-spec.exp
@@ -16,6 +16,8 @@
 # Check that the DWARF reader works with a a DW_AT_specification that
 # refers to a later DIE.
 
+require !readnow
+
 load_lib dwarf.exp
 
 # This test can only be run on targets which support DWARF-2 and use gas.
@@ -72,31 +74,13 @@ if {[prepare_for_testing "failed to prepare" ${testfile} \
     return -1
 }
 
-set in_v 0
-gdb_test_multiple "maint print objfiles" "v has a parent" {
-    -re "^ *\\\[\[0-9\]\\\] *\\(\\(cooked_index_entry\[^\r\n\]*" {
-	set in_v 0
-	exp_continue
-    }
-    -re "^ *name: *v\[\r\n\]*" {
-	set in_v 1
-	exp_continue
-    }
-    -re "^ *parent: *\\(\\(cooked_index_entry \\*\\) (0|$hex)\\)" {
-	if {$in_v} {
-	    if {$expect_out(1,string) == "0"} {
-		fail $gdb_test_name
-	    } else {
-		pass $gdb_test_name
-	    }
-	    set in_v 0
-	}
-	exp_continue
-    }
-    -re "^\[^\r\n\]*\[\r\n\]+" {
-	exp_continue
-    }
-    -re "$gdb_prompt " {
-	# Done.
-    }
-}
+require {string equal [have_index $binfile] ""}
+
+set re_ws "\[ \t\]"
+
+gdb_test_lines "maint print objfiles" \
+    "v has a parent" \
+    [multi_line \
+	 "" \
+	 "$re_ws+qualified:$re_ws+ns::v" \
+	 ".*"]
diff --git a/gdb/testsuite/gdb.dwarf2/gdb-index.exp b/gdb/testsuite/gdb.dwarf2/gdb-index.exp
index 4e44227..23d60da 100644
--- a/gdb/testsuite/gdb.dwarf2/gdb-index.exp
+++ b/gdb/testsuite/gdb.dwarf2/gdb-index.exp
@@ -95,7 +95,13 @@ proc local_add_gdb_index { program } {
 # building an index from a program already using one.
 
 set test "check if index present"
-gdb_test_multiple "mt print objfiles ${testfile}" $test {
+set filter "gdb_index|debug_names|Psymtabs|Cooked"
+set cmd "pipe mt print objfiles ${testfile} | grep -E \"$filter\""
+set cmd_re [string_to_regexp $cmd]
+gdb_test_multiple $cmd $test {
+    -re ^$cmd_re {
+	exp_continue
+    }
     -re "gdb_index.*${gdb_prompt} $" {
 	set binfile_with_index $binfile
 	set host_binfile_with_index [gdb_remote_download host $binfile]
diff --git a/gdb/testsuite/gdb.dwarf2/implptrconst.exp b/gdb/testsuite/gdb.dwarf2/implptrconst.exp
index 8e6dbf0..541331c 100644
--- a/gdb/testsuite/gdb.dwarf2/implptrconst.exp
+++ b/gdb/testsuite/gdb.dwarf2/implptrconst.exp
@@ -83,18 +83,11 @@ Dwarf::assemble $asm_file {
     }
 }
 
-if { [build_executable ${testfile}.exp ${testfile} \
+if { [prepare_for_testing "failed to prepare" ${testfile} \
 	  [list $srcfile $asm_file] {nodebug}] } {
     return -1
 }
 
-# We need --readnow because otherwise we never read in the CU we
-# created above.
-save_vars { GDBFLAGS } {
-    set GDBFLAGS "$GDBFLAGS -readnow"
-    clean_restart ${testfile}
-}
-
 if ![runto_main] {
     return -1
 }
diff --git a/gdb/testsuite/gdb.dwarf2/implptrpiece.exp b/gdb/testsuite/gdb.dwarf2/implptrpiece.exp
index 585cd74..867789f 100644
--- a/gdb/testsuite/gdb.dwarf2/implptrpiece.exp
+++ b/gdb/testsuite/gdb.dwarf2/implptrpiece.exp
@@ -101,18 +101,11 @@ Dwarf::assemble $asm_file {
     }
 }
 
-if { [build_executable ${testfile}.exp ${testfile} \
+if { [prepare_for_testing "failed to prepare" ${testfile} \
 	  [list $srcfile $asm_file] {nodebug}] } {
     return -1
 }
 
-# We need --readnow because otherwise we never read in the CU we
-# created above.
-save_vars { GDBFLAGS } {
-    set GDBFLAGS "$GDBFLAGS -readnow"
-    clean_restart ${testfile}
-}
-
 if ![runto_main] {
     return -1
 }
diff --git a/gdb/testsuite/gdb.dwarf2/multidictionary.exp b/gdb/testsuite/gdb.dwarf2/multidictionary.exp
index 36c0bb4..4c7dc0e 100644
--- a/gdb/testsuite/gdb.dwarf2/multidictionary.exp
+++ b/gdb/testsuite/gdb.dwarf2/multidictionary.exp
@@ -23,7 +23,7 @@ require dwarf2_support
 standard_testfile main.c .S
 
 # Create the DWARF.  This is derived from the reproducer in the bug
-# mentioned above.  This DIE tree is typical of compilations wtih
+# mentioned above.  This DIE tree is typical of compilations with
 # LTO enabled.
 
 set asm_file [standard_output_file $srcfile2]
diff --git a/gdb/testsuite/gdb.dwarf2/pr13961.S b/gdb/testsuite/gdb.dwarf2/pr13961.S
index 856d211..2423ee9 100644
--- a/gdb/testsuite/gdb.dwarf2/pr13961.S
+++ b/gdb/testsuite/gdb.dwarf2/pr13961.S
@@ -101,7 +101,7 @@ SYMBOL(main):
 	.byte	0x87
 	.4byte	.Ldebug_line0	/* DW_AT_stmt_list */
 
-	/* Manually inserted to have a DW_AT_specification refering to
+	/* Manually inserted to have a DW_AT_specification referring to
 	   something and appearing ahead of it.  */
 	.uleb128 0x8	/* DW_TAG_class_type */
 	.4byte .Ltu_class_type - .Ldebug_types0
@@ -185,7 +185,7 @@ SYMBOL(main):
 		.byte	0x3	/* DW_OP_addr */
 		.4byte	baz
 
-		/* Manually inserted to have a DW_AT_specification refering to
+		/* Manually inserted to have a DW_AT_specification referring to
 		   something and appearing ahead of it.  */
 		.uleb128 0x8	/* DW_TAG_class_type */
 		.4byte .Lcu_class_type - .Ldebug_info0 /* DW_AT_specification */
diff --git a/gdb/testsuite/gdb.dwarf2/pr13961.exp b/gdb/testsuite/gdb.dwarf2/pr13961.exp
index a306c45..e4ea9d0 100644
--- a/gdb/testsuite/gdb.dwarf2/pr13961.exp
+++ b/gdb/testsuite/gdb.dwarf2/pr13961.exp
@@ -36,7 +36,8 @@ gdb_test "break -q main" "Breakpoint.*at.*"
 pass $testfile
 
 # Regression test for PR symtab/30739.
-gdb_test_multiple "maint print objfiles $binfile" "no foo::foo" {
+set cmd "pipe maint print objfiles $binfile | grep foo::foo"
+gdb_test_multiple $cmd "no foo::foo" {
     -re -wrap "\r\n *qualified: *foo::foo\r\n.*" {
 	fail $gdb_test_name
     }
diff --git a/gdb/testsuite/gdb.dwarf2/self-spec.exp b/gdb/testsuite/gdb.dwarf2/self-spec.exp
index 2e8fe6b..9bb4064 100644
--- a/gdb/testsuite/gdb.dwarf2/self-spec.exp
+++ b/gdb/testsuite/gdb.dwarf2/self-spec.exp
@@ -59,8 +59,8 @@ require {string eq $index ""}
 
 require !readnow
 
-gdb_test "maint print objfiles $testfile" \
-    "\r\n *qualified: *c1\r\n.*" \
+gdb_test "pipe maint print objfiles $testfile | grep c1" \
+    " *qualified: *c1" \
     "class c1 in cooked index"
 
 gdb_test "maint expand-symtabs"
diff --git a/gdb/testsuite/gdb.dwarf2/struct-with-sig-2.exp b/gdb/testsuite/gdb.dwarf2/struct-with-sig-2.exp
index 111de43..00af725 100644
--- a/gdb/testsuite/gdb.dwarf2/struct-with-sig-2.exp
+++ b/gdb/testsuite/gdb.dwarf2/struct-with-sig-2.exp
@@ -128,5 +128,5 @@ save_vars { GDBFLAGS } {
     }
 }
 
-set re "Dwarf Error: .debug_types section not supported in dwz file"
+set re "DWARF Error: .debug_types section not supported in dwz file"
 gdb_assert { [regexp $re $gdb_file_cmd_msg] } "Dwarf Error message"
diff --git a/gdb/testsuite/gdb.fortran/info-types.exp b/gdb/testsuite/gdb.fortran/info-types.exp
index 52ce7ac..ad2c988 100644
--- a/gdb/testsuite/gdb.fortran/info-types.exp
+++ b/gdb/testsuite/gdb.fortran/info-types.exp
@@ -27,10 +27,8 @@ if { [prepare_for_testing "failed to prepare" $testfile \
     return -1
 }
 
-if { ![fortran_runto_main] } {
-    perror "Could not run to main."
-    return
-}
+# Don't run to main to avoid increasing the search scope to include
+# debug info of shared libraries like libc, libgcc, libgfortran etc.
 
 set integer4 [fortran_int4]
 set integer8 [fortran_int8]
diff --git a/gdb/testsuite/gdb.fortran/types.exp b/gdb/testsuite/gdb.fortran/types.exp
index edbf5ab..494ed1e 100644
--- a/gdb/testsuite/gdb.fortran/types.exp
+++ b/gdb/testsuite/gdb.fortran/types.exp
@@ -60,7 +60,7 @@ proc test_float_literal_types_accepted {} {
     # Test various floating point formats
 
     # this used to guess whether to look for "real*4" or
-    # "real*8" based on a target config variable, but noone
+    # "real*8" based on a target config variable, but no one
     # maintained it properly.
 
     gdb_test "pt .44" "type = real\\*\[0-9\]+"
diff --git a/gdb/testsuite/gdb.fortran/vla-value-sub-arbitrary.exp b/gdb/testsuite/gdb.fortran/vla-value-sub-arbitrary.exp
index 1ec9576..64e86ac 100644
--- a/gdb/testsuite/gdb.fortran/vla-value-sub-arbitrary.exp
+++ b/gdb/testsuite/gdb.fortran/vla-value-sub-arbitrary.exp
@@ -27,11 +27,11 @@ if ![fortran_runto_main] {
     return -1
 }
 
-# Check VLA with arbitary length and check that elements outside of
+# Check VLA with arbitrary length and check that elements outside of
 # bounds of the passed VLA can be accessed correctly.
 gdb_breakpoint [gdb_get_line_number "end-of-bar"]
 gdb_continue_to_breakpoint "end-of-bar"
-gdb_test "p array1(42)" " = 3" "print arbitary array1(42)"
-gdb_test "p array1(100)" " = 100" "print arbitary array1(100)"
-gdb_test "p array2(4,10)" " = 1" "print arbitary array2(4,10)"
-gdb_test "p array2(4,100)" " = 1" "print arbitary array2(4,100)"
+gdb_test "p array1(42)" " = 3" "print arbitrary array1(42)"
+gdb_test "p array1(100)" " = 100" "print arbitrary array1(100)"
+gdb_test "p array2(4,10)" " = 1" "print arbitrary array2(4,10)"
+gdb_test "p array2(4,100)" " = 1" "print arbitrary array2(4,100)"
diff --git a/gdb/testsuite/gdb.gdb/python-helper.exp b/gdb/testsuite/gdb.gdb/python-helper.exp
index 4589edc..c17523a 100644
--- a/gdb/testsuite/gdb.gdb/python-helper.exp
+++ b/gdb/testsuite/gdb.gdb/python-helper.exp
@@ -263,7 +263,7 @@ proc test_python_helper {} {
     # Test the htab_t pretty-printer.
     gdb_test -prompt $outer_prompt_re "print all_bfds" "htab_t with ${::decimal} elements = \\{${::hex}.*\\}"
 
-    # Test the intrusive_list pretty-printer.  A bug occured in the
+    # Test the intrusive_list pretty-printer.  A bug occurred in the
     # pretty-printer for lists with more than one element.  Verify that
     # we see both elements of the inferior_list list being printed.
     gdb_test -prompt $outer_prompt_re "print inferior_list" "intrusive list of inferior = {.*, num = 1,.*, num = 2,.*}"
diff --git a/gdb/testsuite/gdb.go/integers.exp b/gdb/testsuite/gdb.go/integers.exp
index fec8422..7837542 100644
--- a/gdb/testsuite/gdb.go/integers.exp
+++ b/gdb/testsuite/gdb.go/integers.exp
@@ -66,7 +66,7 @@ gdb_test "print i + k" " = 4"
 gdb_test "print j + k" " = 5"
 gdb_test "print i + j + k" " = 6"
 
-# Test substraction
+# Test subtraction
 gdb_test "print j - i" " = 1"
 gdb_test "print i - j" "= -1"
 gdb_test "print k -i -j" " = 0"
diff --git a/gdb/testsuite/gdb.linespec/cp-replace-typedefs-ns-template.exp b/gdb/testsuite/gdb.linespec/cp-replace-typedefs-ns-template.exp
index 68cd11a..214242f 100644
--- a/gdb/testsuite/gdb.linespec/cp-replace-typedefs-ns-template.exp
+++ b/gdb/testsuite/gdb.linespec/cp-replace-typedefs-ns-template.exp
@@ -30,7 +30,7 @@ if {[prepare_for_testing "failed to prepare" $testfile $srcfile \
 gdb_test_no_output "set max-completions unlimited"
 
 # Confirm that the important global namespace typedefs were indeed
-# emited in the debug info.
+# emitted in the debug info.
 gdb_test "ptype NS2" "type = int"
 gdb_test "ptype object" "type = struct NS1::NS2::object {.*"
 gdb_test "ptype Templ1" "type = struct NS1::NS2::Templ1<unsigned int> .*"
diff --git a/gdb/testsuite/gdb.linespec/cpcompletion.exp b/gdb/testsuite/gdb.linespec/cpcompletion.exp
index 480e034..09bd9a2 100644
--- a/gdb/testsuite/gdb.linespec/cpcompletion.exp
+++ b/gdb/testsuite/gdb.linespec/cpcompletion.exp
@@ -831,7 +831,7 @@ proc_with_prefix template-class-with-method {} {
 	}
 }
 
-# Test completion of a const-overloaded funtion (const-overload).
+# Test completion of a const-overloaded function (const-overload).
 # Note that "const" appears after the function/method parameters.
 
 proc_with_prefix const-overload {} {
diff --git a/gdb/testsuite/gdb.linespec/cpexplicit.exp b/gdb/testsuite/gdb.linespec/cpexplicit.exp
index 5c93c34..62033d5 100644
--- a/gdb/testsuite/gdb.linespec/cpexplicit.exp
+++ b/gdb/testsuite/gdb.linespec/cpexplicit.exp
@@ -80,7 +80,7 @@ namespace eval $testfile {
     add linespecs "-function myclass::myfunction -line 3" $location(normal)
     add linespecs "-function myclass::myfunction -label top -line 3" \
 	$location(top)
-    add linespecs "-line 3" $location(normal)
+    add linespecs "-line 25" $location(normal)
     add linespecs "-function myclass::operator," $location(operator)
     add linespecs "-function 'myclass::operator,'" $location(operator)
     add linespecs "-function \"myclass::operator,\"" $location(operator)
diff --git a/gdb/testsuite/gdb.linespec/explicit.exp b/gdb/testsuite/gdb.linespec/explicit.exp
index 625f9ce..e8ae10a 100644
--- a/gdb/testsuite/gdb.linespec/explicit.exp
+++ b/gdb/testsuite/gdb.linespec/explicit.exp
@@ -86,7 +86,7 @@ namespace eval $testfile {
     # These are also not yet supported; -line is silently ignored.
     add linespecs "-function myfunction -line 3" $location(normal)
     add linespecs "-function myfunction -label top -line 3" $location(top)
-    add linespecs "-line 3" $location(normal)
+    add linespecs "-line 25" $location(normal)
 
     # Fire up gdb.
     if {![runto_main]} {
@@ -575,22 +575,30 @@ namespace eval $testfile {
 	      allow-pending]} {
 	fail "set $tst"
     } else {
-	gdb_test "info break" ".*PENDING.*myfunction if foofoofoo == 1.*" $tst
+	gdb_test "info break" ".*PENDING.*myfunction\r\n\\s+stop only if foofoofoo == 1.*" $tst
     }
 
     gdb_exit
     gdb_start
 
+    if {[target_info gdb_protocol] == "extended-remote"} {
+	set evals_re "(?: \\(\[^) \]+ evals\\))?"
+    } else {
+	set evals_re ""
+    }
+
     set tst "pending valid conditional explicit breakpoint"
     if {![gdb_breakpoint "-func myfunction if arg == 0" \
 	      allow-pending]} {
 	fail "set $tst"
     } else {
-	gdb_test "info break" ".*PENDING.*myfunction if arg == 0" $tst
+	gdb_test "info break" \
+	    ".*PENDING.*myfunction\r\n\\s+stop only if arg == 0${evals_re}" \
+	    $tst
 
 	gdb_load [standard_output_file $exefile]
 	gdb_test "info break" \
-	    ".*in myfunction at .*$srcfile:.*stop only if arg == 0.*" \
+	    ".*in myfunction at .*$srcfile:.*stop only if arg == 0${evals_re}" \
 	    "$tst resolved"
     }
 
diff --git a/gdb/testsuite/gdb.linespec/keywords.exp b/gdb/testsuite/gdb.linespec/keywords.exp
index 36a919c..d2596d2 100644
--- a/gdb/testsuite/gdb.linespec/keywords.exp
+++ b/gdb/testsuite/gdb.linespec/keywords.exp
@@ -55,7 +55,7 @@ with_test_prefix "trailing whitespace" {
 gdb_test "break thread 123" "Unknown thread 123\\."
 gdb_test "break thread foo" "Invalid thread ID: foo"
 gdb_test "break task 123" "Unknown task 123\\."
-gdb_test "break task foo" "Junk after task keyword\\."
+gdb_test "break task foo" "Junk 'foo' after task keyword\\."
 gdb_breakpoint "thread if 0" "message"
 
 # These are also NULL locations, but using a subsequent keyword
@@ -63,9 +63,9 @@ gdb_breakpoint "thread if 0" "message"
 gdb_test "break thread thread" "Invalid thread ID: thread"
 gdb_test "break thread task" "Invalid thread ID: task"
 gdb_test "break thread if" "Invalid thread ID: if"
-gdb_test "break task task" "Junk after task keyword\\."
-gdb_test "break task thread" "Junk after task keyword\\."
-gdb_test "break task if" "Junk after task keyword\\."
+gdb_test "break task task" "Junk 'task' after task keyword\\."
+gdb_test "break task thread" "Junk 'thread' after task keyword\\."
+gdb_test "break task if" "Junk 'if' after task keyword\\."
 
 # Test locations containing keyword followed by keyword.
 gdb_test "break thread thread 123" "Unknown thread 123\\."
diff --git a/gdb/testsuite/gdb.linespec/line-breakpoint-outside-function.c b/gdb/testsuite/gdb.linespec/line-breakpoint-outside-function.c
new file mode 100644
index 0000000..93c4383
--- /dev/null
+++ b/gdb/testsuite/gdb.linespec/line-breakpoint-outside-function.c
@@ -0,0 +1,51 @@
+/* This testcase is part of GDB, the GNU debugger.
+
+   Copyright 2022-2024 Free Software Foundation, Inc.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
+
+/* The section where THE_LIB_PATH is not defined is compiled as a shared
+   library.  The rest is compiled as the main executable (which loads the
+   shared library.  */
+
+#if !defined(THE_LIB_PATH)
+
+void
+the_lib_func (void)
+{
+  static int x;
+  /* break here */
+  x++;
+}
+
+#else
+#include <dlfcn.h>
+#include <assert.h>
+#include <stdlib.h>
+
+int
+main (void)
+{
+  void *lib = dlopen (THE_LIB_PATH, RTLD_NOW);
+  assert (lib != NULL);
+
+  void (*the_lib_func) (void) = dlsym (lib, "the_lib_func");
+  assert (the_lib_func != NULL);
+
+  the_lib_func ();
+
+  return 0;
+}
+
+#endif
diff --git a/gdb/testsuite/gdb.linespec/line-breakpoint-outside-function.exp b/gdb/testsuite/gdb.linespec/line-breakpoint-outside-function.exp
new file mode 100644
index 0000000..946304a
--- /dev/null
+++ b/gdb/testsuite/gdb.linespec/line-breakpoint-outside-function.exp
@@ -0,0 +1,55 @@
+# Copyright 2022-2024 Free Software Foundation, Inc.
+
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
+# Test that placing a line breakpoint outside a function results in a pending
+# breakpoint.  More importantly, that it does "drift" and place a
+# breakpoint on the next function.
+#
+# See the .c file for more details.
+
+standard_testfile
+
+set shlib_path [standard_output_file ${testfile}-lib.so]
+if {[build_executable "build shlib" $shlib_path $srcfile {debug shlib}]} {
+    return
+}
+
+set opts [list debug shlib_load additional_flags=-DTHE_LIB_PATH="${shlib_path}"]
+if {[build_executable "failed to prepare" ${testfile} ${srcfile} $opts]} {
+    return
+}
+
+proc do_test {} {
+    clean_restart $::binfile
+
+    # To make things easier, just so we don't have to deal with the question.
+    gdb_test_no_output "set breakpoint pending on"
+
+    set lineno [gdb_get_line_number "break here"]
+    gdb_test "break $lineno" \
+	[multi_line \
+	     "No compiled code for line $lineno in the current file\\." \
+	     "Breakpoint 1 \\($lineno\\) pending\\."] \
+	"breakpoint on a line outside any function"
+
+    gdb_run_cmd
+    gdb_test_multiple "" "stop on lib function breakpoint" {
+	-re -wrap "Breakpoint 1, the_lib_func .*29.*x\\+\\+.*" {
+	    pass $gdb_test_name
+	}
+    }
+}
+
+do_test
diff --git a/gdb/testsuite/gdb.linespec/ls-errs.c b/gdb/testsuite/gdb.linespec/ls-errs.c
index 73b06fc..1dfccab 100644
--- a/gdb/testsuite/gdb.linespec/ls-errs.c
+++ b/gdb/testsuite/gdb.linespec/ls-errs.c
@@ -21,6 +21,16 @@ myfunction (int aa)
   int i;
 
   i = aa + 42;
+
+  /* These lines are intentionally left blank such that the tests trying
+     to place breakpoints at line -10 relative to the "set.breakpoint.here"
+     line below land on a valid breakpoint location, inside the function.  */
+
+
+
+
+
+
   return i;    /* set breakpoint here */
 }
 
diff --git a/gdb/testsuite/gdb.linespec/ls-errs.exp b/gdb/testsuite/gdb.linespec/ls-errs.exp
index 48c8a5f..58125f3 100644
--- a/gdb/testsuite/gdb.linespec/ls-errs.exp
+++ b/gdb/testsuite/gdb.linespec/ls-errs.exp
@@ -71,8 +71,8 @@ proc do_test {lang} {
 	    "Undefined convenience variable or function \"%s\" not defined in \"%s\"."
 	invalid_label "No label \"%s\" defined in function \"%s\"."
 	invalid_parm "invalid linespec argument, \"%s\""
-	invalid_offset "No line %d in the current file."
-	invalid_offset_f "No line %d in file \"%s\"."
+	invalid_offset "No compiled code for line %d in the current file."
+	invalid_offset_f "No compiled code for line %d in file \"%s\"."
 	malformed_line_offset "malformed line offset: \"%s\""
 	source_incomplete \
 	    "Source filename requires function, label, or line offset."
@@ -135,14 +135,14 @@ proc do_test {lang} {
 
     foreach x {1 +1 +100 -10} {
 	test_break "3 $x" unexpected_opt "number" $x
-	test_break "-line 3 $x" garbage $x
+	test_break "-line 34 $x" garbage $x
 	test_break "+10 $x" unexpected_opt "number" $x
 	test_break "-line +10 $x" garbage $x
 	test_break "-10 $x" unexpected_opt "number" $x
 	test_break "-line -10 $x" garbage $x
     }
 
-    foreach x {3 +10 -10} {
+    foreach x {34 +10 -10} {
 	test_break "$x foo" unexpected_opt "string" "foo"
 	test_break "-line $x foo" garbage "foo"
     }
@@ -207,12 +207,12 @@ proc do_test {lang} {
 
     test_break "${srcfile}::" invalid_function "${srcfile}::"
     test_break "$srcfile:3 1" unexpected_opt "number" "1"
-    test_break "-source $srcfile -line 3 1" garbage "1"
+    test_break "-source $srcfile -line 34 1" garbage "1"
     test_break "$srcfile:3 +100" unexpected_opt "number" "+100"
-    test_break "-source $srcfile -line 3 +100" garbage "+100"
+    test_break "-source $srcfile -line 34 +100" garbage "+100"
     test_break "$srcfile:3 -100" unexpected_opt "number" "-100"
     test_break "$srcfile:3 foo" unexpected_opt "string" "foo"
-    test_break "-source $srcfile -line 3 foo" garbage "foo"
+    test_break "-source $srcfile -line 34 foo" garbage "foo"
 
     foreach x $invalid_offsets {
 	test_break "$srcfile:$x" invalid_offset_f $x $srcfile
diff --git a/gdb/testsuite/gdb.mi/dw2-ref-missing-frame.exp b/gdb/testsuite/gdb.mi/dw2-ref-missing-frame.exp
index 73b25bd..b91f915 100644
--- a/gdb/testsuite/gdb.mi/dw2-ref-missing-frame.exp
+++ b/gdb/testsuite/gdb.mi/dw2-ref-missing-frame.exp
@@ -20,6 +20,16 @@ set MIFLAGS "-i=mi"
 
 require dwarf2_support
 
+# Clang reorders global assembly labels, placing them all side by side.
+# This results in having low and high PCs what have the same value for
+# the CU and all the functions (in my system, they are all 0x1130).  If
+# this test is rewritten to use the dwarf assembler instead, we can enable
+# this test with clang again.
+if {[test_compiler_info {clang-*-*}]} {
+    unsupported "can't generate debug info"
+    return
+}
+
 standard_testfile .S dw2-ref-missing-frame-func.c dw2-ref-missing-frame-main.c
 set objsfile [standard_output_file ${testfile}.o]
 set objfuncfile [standard_output_file ${testfile}-func.o]
diff --git a/gdb/testsuite/gdb.mi/mi-break-qualified.exp b/gdb/testsuite/gdb.mi/mi-break-qualified.exp
index 7543d98..20e2bb8 100644
--- a/gdb/testsuite/gdb.mi/mi-break-qualified.exp
+++ b/gdb/testsuite/gdb.mi/mi-break-qualified.exp
@@ -69,7 +69,7 @@ proc test_break_qualified {} {
 		  -enabled "y" \
 		  -func "$func" \
 		  -file ".*mi-break-qualified.cc" \
-		  -line="$line_no"]
+		  -line $line_no]
     }
 
     set loc1 [make_loc_re "NS::func\\(int\\)" $loc_ns_func_line]
diff --git a/gdb/testsuite/gdb.mi/mi-break.exp b/gdb/testsuite/gdb.mi/mi-break.exp
index bfe839d..86e7b57 100644
--- a/gdb/testsuite/gdb.mi/mi-break.exp
+++ b/gdb/testsuite/gdb.mi/mi-break.exp
@@ -313,7 +313,7 @@ proc_with_prefix test_explicit_breakpoints {} {
 
     mi_create_breakpoint "-c \"intarg == 3\" --function callee2" \
 	"insert explicit conditional breakpoint in callee2" \
-	-func callee2 ".*$srcfile" -line $line_callee2_body \
+	-func callee2 -file ".*$srcfile" -line $line_callee2_body \
 	-cond "intarg == 3"
 
     # mi_create_breakpoint cannot deal with displaying canonical
@@ -357,7 +357,7 @@ proc_with_prefix test_forced_conditions {} {
 	"dprintf with forced condition"
 
     # Define a plain breakpoint first, and a condition later.
-    mi_create_breakpoint "callme" "define a bp" ""
+    mi_create_breakpoint "callme" "define a bp"
     mi_gdb_test "-break-condition --force 16 bad == 42" \
 	"${warning}\\^done" \
 	"invalid condition is forced"
diff --git a/gdb/testsuite/gdb.mi/mi-breakpoint-changed.exp b/gdb/testsuite/gdb.mi/mi-breakpoint-changed.exp
index d7f8132..305c061 100644
--- a/gdb/testsuite/gdb.mi/mi-breakpoint-changed.exp
+++ b/gdb/testsuite/gdb.mi/mi-breakpoint-changed.exp
@@ -15,6 +15,8 @@
 
 require allow_shlib_tests
 
+set supports_catch_syscall [supports_catch_syscall]
+
 load_lib mi-support.exp
 
 standard_testfile pending.c
@@ -85,17 +87,34 @@ proc test_insert_delete_modify { } {
     mi_gdb_test ${test} \
 	{(&.*)*.*~".*atchpoint 3: .*\\n".*=breakpoint-created,bkpt=\{number="3",type="(hw |)watchpoint".*\}.*\n\^done} \
 	$test
+
     set test "trace marker"
     mi_gdb_test $test \
 	{(&.*)*.*~"Tracepoint 4 at .*\\n".*=breakpoint-created,bkpt=\{number="4",type="tracepoint".*\}.*\n\^done} \
 	$test
+
     set test "catch syscall"
-    mi_gdb_test $test \
-	{(&.*)*.*~"Catchpoint 5 .*\\n".*=breakpoint-created,bkpt=\{number="5",type="catchpoint".*\}.*\n\^done} \
-	$test
+    if { $::supports_catch_syscall } {
+	mi_gdb_test $test \
+	    {(&.*)*.*~"Catchpoint 5 .*\\n".*=breakpoint-created,bkpt=\{number="5",type="catchpoint".*\}.*\n\^done} \
+	    $test
+	set bp_nr 6
+    } else {
+	unsupported $test
+	set bp_nr 5
+    }
+
     set test "dprintf marker, \"arg\" \""
+    set bp_re [mi_make_breakpoint \
+		   -number $bp_nr \
+		   -type dprintf \
+		   -func marker \
+		   -script [string_to_regexp {["printf \"arg\" \""]}]]
     mi_gdb_test $test \
-	{.*=breakpoint-created,bkpt=\{number="6",type="dprintf".*,script=\[\"printf \\\"arg\\\" \\\"\"\].*\}\r\n\^done} \
+	[multi_line \
+	     ".*" \
+	     "=breakpoint-created,${bp_re}" \
+	     "\\^done"] \
 	$test
 
     # 2. when modifying condition
@@ -143,7 +162,7 @@ proc test_insert_delete_modify { } {
 
     # Delete some breakpoints and verify that '=breakpoint-deleted
     # notification is correctly emitted.
-    for {set i 3} {$i < 7} {incr i} {
+    for {set i 3} {$i <= $bp_nr} {incr i} {
 	mi_gdb_test "delete ${i}" ".*=breakpoint-deleted,id=\"${i}\".*\\^done" \
 	    "delete ${i}"
     }
@@ -153,7 +172,7 @@ with_test_prefix "test_insert_delete_modify" {
     test_insert_delete_modify
 }
 
-# Test 'breakpoint-modified' notification is emited when pending breakpoints are
+# Test 'breakpoint-modified' notification is emitted when pending breakpoints are
 # resolved.
 
 proc test_pending_resolved { } {
diff --git a/gdb/testsuite/gdb.mi/mi-catch-cpp-exceptions.cc b/gdb/testsuite/gdb.mi/mi-catch-cpp-exceptions.cc
index be1f50f..d41b55d 100644
--- a/gdb/testsuite/gdb.mi/mi-catch-cpp-exceptions.cc
+++ b/gdb/testsuite/gdb.mi/mi-catch-cpp-exceptions.cc
@@ -43,8 +43,7 @@ foo ()
       try
 	{
 	  bar ();
-	}
-      catch (const my_exception &ex)	/* Catch 1.  */
+	} catch (const my_exception &ex)	/* Catch 1.  */
 	{
 	  if (i == 1)
 	    throw;	/* Throw 2.  */
@@ -60,8 +59,7 @@ main ()
       try
 	{
 	  foo ();
-	}
-      catch (const my_exception &ex)	/* Catch 2.  */
+	} catch (const my_exception &ex)	/* Catch 2.  */
 	{
 	  if (i == 1)
 	    return 1;	/* Stop here.  */
diff --git a/gdb/testsuite/gdb.mi/mi-complete.exp b/gdb/testsuite/gdb.mi/mi-complete.exp
index 91564a4..7fccaa2 100644
--- a/gdb/testsuite/gdb.mi/mi-complete.exp
+++ b/gdb/testsuite/gdb.mi/mi-complete.exp
@@ -28,7 +28,8 @@ if { [gdb_compile "${srcdir}/${subdir}/${srcfile}" "${binfile}" executable {debu
 
 mi_clean_restart $binfile
 
-mi_runto_main
+# Don't run to main to avoid increasing the search scope to include
+# debug info of shared libraries like glibc, libgcc, etc.
 
 mi_gdb_test "1-complete br" \
             "1\\^done,completion=\"break\",matches=\\\[.*\"break\",.*\"break-range\".*\\\],max_completions_reached=\"0\"" \
diff --git a/gdb/testsuite/gdb.mi/mi-dprintf-pending.exp b/gdb/testsuite/gdb.mi/mi-dprintf-pending.exp
index fd5684b..4cf6dec 100644
--- a/gdb/testsuite/gdb.mi/mi-dprintf-pending.exp
+++ b/gdb/testsuite/gdb.mi/mi-dprintf-pending.exp
@@ -50,7 +50,8 @@ set bp_location1 [gdb_get_line_number "set breakpoint 1 here"]
 # Set pending dprintf via MI.
 set bp [mi_make_breakpoint_pending -number "1" -type "dprintf" \
 	    -disp "keep" -enabled "y" -pending "pendfunc1" \
-	    -original-location "pendfunc1"]
+	    -original-location "pendfunc1" \
+	    -script {\["printf \\\"hello\\\""\]}]
 mi_gdb_test "-dprintf-insert -f pendfunc1 \"hello\"" \
     ".*\\^done,$bp" "mi set dprintf"
 
diff --git a/gdb/testsuite/gdb.mi/mi-file.exp b/gdb/testsuite/gdb.mi/mi-file.exp
index 8e404f9..00d2888 100644
--- a/gdb/testsuite/gdb.mi/mi-file.exp
+++ b/gdb/testsuite/gdb.mi/mi-file.exp
@@ -42,16 +42,10 @@ proc test_file_list_exec_source_file {} {
     }
 
     # get the path and absolute path to the current executable
-    #
-    # In gdb 6.2 (at least), the default line number is set by
-    # select_source_symtab to the first line of "main" minus
-    # the value of "lines_to_list" (which defaults to 10) plus one.
-    # --chastain 2004-08-13
 
     set line_main_head [gdb_get_line_number "main ("]
-    set line_main_body [expr $line_main_head + 2]
-    set gdb_lines_to_list 10
-    set line_default [expr $line_main_body - $gdb_lines_to_list + 1]
+    set line_main_prologue [expr $line_main_head + 1]
+    set line_default $line_main_prologue
 
     mi_gdb_test "111-file-list-exec-source-file" \
 	    "111\\\^done,line=\"$line_default\",file=\"${srcfilepath}\",fullname=\"$fullname_syntax${srcfile}\",macro-info=\"0\"" \
diff --git a/gdb/testsuite/gdb.mi/mi-multi-commands.exp b/gdb/testsuite/gdb.mi/mi-multi-commands.exp
index 3a2e774..028e187 100644
--- a/gdb/testsuite/gdb.mi/mi-multi-commands.exp
+++ b/gdb/testsuite/gdb.mi/mi-multi-commands.exp
@@ -103,7 +103,7 @@ proc run_test { args } {
 		set seen_first_message true
 		exp_continue
 	    }
-	    -re "\r\n$mi_gdb_prompt" {
+	    -re "$mi_gdb_prompt" {
 		gdb_assert $seen_first_message $gdb_test_name
 	    }
 	}
diff --git a/gdb/testsuite/gdb.mi/mi-nsmoribund.exp b/gdb/testsuite/gdb.mi/mi-nsmoribund.exp
index ba6ff5a..270dbc1 100644
--- a/gdb/testsuite/gdb.mi/mi-nsmoribund.exp
+++ b/gdb/testsuite/gdb.mi/mi-nsmoribund.exp
@@ -50,7 +50,7 @@ set bkpt_line [gdb_get_line_number "set breakpoint here"]
 
 mi_create_breakpoint "$srcfile:$bkpt_line" \
     "breakpoint at thread_function" \
-    -number 2 -function thread_function
+    -number 2 -func thread_function
 
 mi_send_resuming_command "exec-continue --all" "resume all"
 for {set i 0} {$i < $nthreads} {incr i} {
diff --git a/gdb/testsuite/gdb.mi/mi-nsthrexec.exp b/gdb/testsuite/gdb.mi/mi-nsthrexec.exp
index fdfdd05..dba7847 100644
--- a/gdb/testsuite/gdb.mi/mi-nsthrexec.exp
+++ b/gdb/testsuite/gdb.mi/mi-nsthrexec.exp
@@ -47,7 +47,7 @@ if { [mi_runto_main] < 0 } {
 
 mi_create_breakpoint thread_execler \
     "breakpoint at thread_execler" \
-    -number 2 -function thread_execler
+    -number 2 -func thread_execler
 
 # All threads should stop, except the main thread.
 mi_send_resuming_command "exec-continue --all" "resume all"
diff --git a/gdb/testsuite/gdb.mi/mi-pending.exp b/gdb/testsuite/gdb.mi/mi-pending.exp
index 99dbab4..4358c18 100644
--- a/gdb/testsuite/gdb.mi/mi-pending.exp
+++ b/gdb/testsuite/gdb.mi/mi-pending.exp
@@ -66,8 +66,8 @@ mi_create_breakpoint_pending "-f pendfunc1" \
 mi_gdb_test "-break-commands 1 \"print 1\" \"print 2\" \"print 3\""\
     "\\^done" \
     "set breakpoint commands on pending breakpoint"
-set bp [mi_make_breakpoint_pending -number 1 -disp keep -func pendfunc1 \
-	    -disp keep -enabled y -original-location pendfunc1 \
+set bp [mi_make_breakpoint_pending -number 1 -disp keep \
+	    -enabled y -original-location pendfunc1 \
 	    -script {\["print 1","print 2","print 3"\]}]
 mi_gdb_test "-break-info 1" \
     "\\^done,[mi_make_breakpoint_table [list $bp]]" \
diff --git a/gdb/testsuite/gdb.mi/mi-sym-info.exp b/gdb/testsuite/gdb.mi/mi-sym-info.exp
index 40c0644..b8db2af 100644
--- a/gdb/testsuite/gdb.mi/mi-sym-info.exp
+++ b/gdb/testsuite/gdb.mi/mi-sym-info.exp
@@ -35,7 +35,8 @@ if {[build_executable "failed to prepare" ${testfile} \
 
 mi_clean_restart $binfile
 
-mi_runto_main
+# Don't run to main to avoid increasing the search scope to include
+# debug info of shared libraries like libc, libgcc, etc.
 
 set qstr "\"\[^\"\]+\""
 set fun_re \
diff --git a/gdb/testsuite/gdb.mi/mi-thread-bp-deleted.exp b/gdb/testsuite/gdb.mi/mi-thread-bp-deleted.exp
index c048aca..08c7218 100644
--- a/gdb/testsuite/gdb.mi/mi-thread-bp-deleted.exp
+++ b/gdb/testsuite/gdb.mi/mi-thread-bp-deleted.exp
@@ -73,7 +73,7 @@ foreach_mi_ui_mode mode {
     # UI.
     if {$mode eq "separate"} {
 	with_spawn_id $gdb_main_spawn_id {
-	    gdb_test_multiple "" "drain CLI output upto breakpoint" {
+	    gdb_test_multiple "" "drain CLI output up to breakpoint" {
 		-re "Thread 1 \[^\r\n\]+ hit Breakpoint $decimal,\
 		      breakpt \\(\\) at\
 		      \[^\r\n\]+\r\n$decimal\\s+\[^\r\n\]+\r\n" {
diff --git a/gdb/testsuite/gdb.mi/mi-var-cp.cc b/gdb/testsuite/gdb.mi/mi-var-cp.cc
index e8dd325..c40bdcf 100644
--- a/gdb/testsuite/gdb.mi/mi-var-cp.cc
+++ b/gdb/testsuite/gdb.mi/mi-var-cp.cc
@@ -42,7 +42,7 @@ struct S2 : S {};
 int base_in_reference_test (S2& s2)
 {
   /*: BEGIN: base_in_reference :*/
-  return s2.i;
+  int x = s2.i + s2.j;
   /*: 
     mi_create_varobj "S2" "s2" "create varobj for s2"
     mi_list_varobj_children "S2" {
@@ -62,6 +62,7 @@ int base_in_reference_test (S2& s2)
     
   :*/
   /*: END: base_in_reference :*/
+  return x;
 }
         
 void base_in_reference_test_main ()
diff --git a/gdb/testsuite/gdb.mi/mi-vla-c99.exp b/gdb/testsuite/gdb.mi/mi-vla-c99.exp
index ee4bc26..a8a77ac 100644
--- a/gdb/testsuite/gdb.mi/mi-vla-c99.exp
+++ b/gdb/testsuite/gdb.mi/mi-vla-c99.exp
@@ -37,7 +37,7 @@ set bp_lineno [gdb_get_line_number "vla-filled"]
 
 mi_create_breakpoint "-t vla.c:$bp_lineno" \
     "insert breakpoint at line $bp_lineno after vla is filled" \
-    -function func -line $bp_lineno -file ".*vla.c" -disp del
+    -func func -line $bp_lineno -file ".*vla.c" -disp del
 
 mi_run_cmd
 mi_expect_stop "breakpoint-hit" "func" "\{name=\"n\",value=\"5\"\}" \
diff --git a/gdb/testsuite/gdb.mi/mi-vla-fortran.exp b/gdb/testsuite/gdb.mi/mi-vla-fortran.exp
index e27f0ec..6097c02 100644
--- a/gdb/testsuite/gdb.mi/mi-vla-fortran.exp
+++ b/gdb/testsuite/gdb.mi/mi-vla-fortran.exp
@@ -41,7 +41,7 @@ if {[mi_clean_restart $binfile]} {
 set bp_lineno [gdb_get_line_number "vla1-not-allocated"]
 mi_create_breakpoint "-t vla.f90:$bp_lineno" \
     "insert breakpoint at line $bp_lineno (vla not allocated)" \
-    -number 1 -disp del -func vla ".*vla.f90" $bp_lineno $hex
+    -number 1 -disp del -func vla
 mi_run_cmd
 mi_expect_stop "breakpoint-hit" "vla" "" ".*vla.f90" "$bp_lineno" \
   { "" "disp=\"del\"" } "run to breakpoint at line $bp_lineno"
@@ -67,7 +67,7 @@ mi_list_array_varobj_children_with_index "vla1_not_allocated" "0" "1" \
 set bp_lineno [gdb_get_line_number "vla1-allocated"]
 mi_create_breakpoint "-t vla.f90:$bp_lineno" \
     "insert breakpoint at line $bp_lineno (vla allocated)" \
-    -number 2 -disp del -func vla ".*vla.f90" $bp_lineno $hex
+    -number 2 -disp del -func vla
 mi_run_cmd
 mi_expect_stop "breakpoint-hit" "vla" "" ".*vla.f90" "$bp_lineno" \
   { "" "disp=\"del\"" } "run to breakpoint at line $bp_lineno"
@@ -92,7 +92,7 @@ mi_list_array_varobj_children_with_index "vla1_allocated" "5" "1" \
 set bp_lineno [gdb_get_line_number "vla1-filled"]
 mi_create_breakpoint "-t vla.f90:$bp_lineno" \
     "insert breakpoint at line $bp_lineno" \
-    -number 3 -disp del -func vla ".*vla.f90" $bp_lineno $hex
+    -number 3 -disp del -func vla
 mi_run_cmd
 mi_expect_stop "breakpoint-hit" "vla" "" ".*vla.f90" "$bp_lineno" \
   { "" "disp=\"del\"" } "run to breakpoint at line $bp_lineno"
@@ -103,7 +103,7 @@ mi_gdb_test "520-data-evaluate-expression vla1" \
 set bp_lineno [gdb_get_line_number "vla1-modified"]
 mi_create_breakpoint "-t vla.f90:$bp_lineno" \
     "insert breakpoint at line $bp_lineno" \
-    -number 4 -disp del -func vla ".*vla.f90" $bp_lineno $hex
+    -number 4 -disp del -func vla
 mi_run_cmd
 mi_expect_stop "breakpoint-hit" "vla" "" ".*vla.f90" "$bp_lineno" \
   { "" "disp=\"del\"" } "run to breakpoint at line $bp_lineno"
@@ -120,7 +120,7 @@ mi_gdb_test "560-data-evaluate-expression vla1(4)" \
 set bp_lineno [gdb_get_line_number "vla1-deallocated"]
 mi_create_breakpoint "-t vla.f90:$bp_lineno" \
     "insert breakpoint at line $bp_lineno" \
-    -number 5 -disp del -func vla ".*vla.f90" $bp_lineno $hex
+    -number 5 -disp del -func vla
 mi_run_cmd
 mi_expect_stop "breakpoint-hit" "vla" "" ".*vla.f90" "$bp_lineno" \
   { "" "disp=\"del\"" } "run to breakpoint at line $bp_lineno"
@@ -131,7 +131,7 @@ mi_gdb_test "570-data-evaluate-expression vla1" \
 set bp_lineno [gdb_get_line_number "pvla2-not-associated"]
 mi_create_breakpoint "-t vla.f90:$bp_lineno" \
     "insert breakpoint at line $bp_lineno" \
-    -number 6 -disp "del" -func "vla" ".*vla.f90" $bp_lineno $hex
+    -number 6 -disp "del" -func "vla"
 mi_run_cmd
 mi_expect_stop "breakpoint-hit" "vla" "" ".*vla.f90" "$bp_lineno" \
   { "" "disp=\"del\"" } "run to breakpoint at line $bp_lineno"
@@ -172,7 +172,7 @@ gdb_expect {
 set bp_lineno [gdb_get_line_number "pvla2-associated"]
 mi_create_breakpoint "-t vla.f90:$bp_lineno" \
     "insert breakpoint at line $bp_lineno" \
-    -number 7 -disp del -func vla ".*vla.f90" $bp_lineno $hex
+    -number 7 -disp del -func vla
 mi_run_cmd
 mi_expect_stop "breakpoint-hit" "vla" "" ".*vla.f90" "$bp_lineno" \
   { "" "disp=\"del\"" } "run to breakpoint at line $bp_lineno"
@@ -196,7 +196,7 @@ mi_gdb_test "593-var-evaluate-expression pvla2_associated" \
 set bp_lineno [gdb_get_line_number "pvla2-set-to-null"]
 mi_create_breakpoint "-t vla.f90:$bp_lineno" \
     "insert breakpoint at line $bp_lineno" \
-    -number 8 -disp del -func vla ".*vla.f90" $bp_lineno $hex
+    -number 8 -disp del -func vla
 mi_run_cmd
 mi_expect_stop "breakpoint-hit" "vla" "" ".*vla.f90" "$bp_lineno" \
   { "" "disp=\"del\"" } "run to breakpoint at line $bp_lineno"
diff --git a/gdb/testsuite/gdb.mi/new-ui-bp-deleted.exp b/gdb/testsuite/gdb.mi/new-ui-bp-deleted.exp
index f736994..938e6de 100644
--- a/gdb/testsuite/gdb.mi/new-ui-bp-deleted.exp
+++ b/gdb/testsuite/gdb.mi/new-ui-bp-deleted.exp
@@ -76,8 +76,12 @@ foreach_mi_ui_mode mode {
     set loc2 [make_bp_loc "$::decimal\\.2"]
 
     # Create the inferior-specific breakpoint.
-    mi_create_breakpoint_multi "-g i2 foo" "create breakpoint in inferior 2" \
-	-inferior "2" -locations "\\\[$loc1,$loc2\\\]"
+    mi_create_breakpoint "-g i2 foo" "create breakpoint in inferior 2" \
+	-number "$decimal" \
+	-type "breakpoint" \
+	-enabled "y" \
+	-func "foo" \
+	-inferior "2"
     set bpnum [mi_get_valueof "/d" "\$bpnum" "INVALID"]
 
     if {$mode eq "separate"} {
diff --git a/gdb/testsuite/gdb.mi/user-selected-context-sync.exp b/gdb/testsuite/gdb.mi/user-selected-context-sync.exp
index 93b91b4..e168a5e 100644
--- a/gdb/testsuite/gdb.mi/user-selected-context-sync.exp
+++ b/gdb/testsuite/gdb.mi/user-selected-context-sync.exp
@@ -364,15 +364,9 @@ proc test_continue_to_start { mode inf } {
 
 		# Consume MI output.
 		with_spawn_id $mi_spawn_id {
-		    if { $inf == 1} {
-			mi_expect_stop "breakpoint-hit" "child_sub_function" \
-			    "" "$srcfile" "$decimal" {"" "disp=\"del\""} \
-			    "thread $inf.2 stops MI"
-		    } else {
-			mi_expect_stop "breakpoint-hit" "child_sub_function" \
-			    "" "$srcfile" "$decimal" {"" "disp=\"del\"" "locno=\"[0-9]+\""} \
-			    "thread $inf.2 stops MI"
-		    }
+		    mi_expect_stop "breakpoint-hit" "child_sub_function" \
+			"" "$srcfile" "$decimal" {"" "disp=\"del\""} \
+			"thread $inf.2 stops MI"
 		}
 	    }
 	}
@@ -439,7 +433,7 @@ proc_with_prefix test_setup { mode } {
 
 	with_spawn_id $mi_spawn_id {
 	    mi_expect_stop "breakpoint-hit" "main" "" "$srcfile" "$decimal" \
-		{"" "disp=\"del\"" "locno=\"[0-9]+\""} "main stop"
+		{"" "disp=\"del\""} "main stop"
 	}
 
 	# Consume CLI output.
diff --git a/gdb/testsuite/gdb.modula2/builtin-procedure-adr.exp b/gdb/testsuite/gdb.modula2/builtin-procedure-adr.exp
new file mode 100644
index 0000000..6588020
--- /dev/null
+++ b/gdb/testsuite/gdb.modula2/builtin-procedure-adr.exp
@@ -0,0 +1,32 @@
+# Copyright 2024 Free Software Foundation, Inc.
+
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
+# This file is part of the gdb testsuite.  It contains tests for printing
+# the elements of an unbounded array using the Modula-2 language mode of
+# gdb.
+
+standard_testfile unbounded1.c
+
+if {[prepare_for_testing "failed to prepare" $testfile $srcfile {debug quiet}]} {
+    return -1
+}
+
+if {![runto main]} {
+    return
+}
+
+gdb_test "set lang modula-2" ".*does not match.*" "switch to modula-2"
+
+gdb_test "print ADR(i)" ".*0x.*" "print the address of local variable i"
diff --git a/gdb/testsuite/gdb.multi/bp-thread-specific.exp b/gdb/testsuite/gdb.multi/bp-thread-specific.exp
index 7635e84..11dc248 100644
--- a/gdb/testsuite/gdb.multi/bp-thread-specific.exp
+++ b/gdb/testsuite/gdb.multi/bp-thread-specific.exp
@@ -32,9 +32,33 @@ if {![runto_main]} {
     return -1
 }
 
+delete_breakpoints
+
+# Create a thread-specific b/p on main.
+gdb_breakpoint "main thread 1"
+set bpnum [get_integer_valueof "\$bpnum" "INVALID" \
+	      "get number for thread specific b/p on main"]
+
+# Check the b/p has a location and is displayed correctly.
+gdb_test "info breakpoints" \
+    [multi_line \
+	 "" \
+	 "$bpnum\\s+breakpoint\\s+keep\\s+y\\s+$hex\\s+in main at \[^\r\n\]+/$srcfile:$decimal"\
+	 "\\s+stop only in thread 1"] \
+    "check thread b/p on main has a location"
+
 gdb_test "add-inferior -exec ${binfile}" "Added inferior 2.*" "add inferior 2"
 gdb_test "inferior 2"
 
+# The breakpoint should still have a location, but should now display
+# information indicating this breakpoint is only in inferior 1.
+gdb_test "info breakpoints" \
+    [multi_line \
+	 "" \
+	 "$bpnum\\s+breakpoint\\s+keep\\s+y\\s+$hex\\s+in main at \[^\r\n\]+/$srcfile:$decimal inf 1"\
+	 "\\s+stop only in thread 1\\.1"] \
+    "check thread b/p on main still has updated correctly"
+
 if {![runto_main]} {
     return -1
 }
@@ -50,7 +74,7 @@ gdb_test "info threads" \
 # locations ('foo' in both inferiors) even though only one of those
 # locations will ever trigger ('foo' in inferior 2).
 gdb_test "break foo thread 2.1" \
-    "Breakpoint $decimal at $hex: foo\\. \\(2 locations\\)"
+    "Breakpoint $decimal at $hex: file \[^\r\n\]+$srcfile, line $decimal\\."
 
 set bpnum [get_integer_valueof "\$bpnum" "INVALID"]
 
@@ -58,10 +82,7 @@ set bpnum [get_integer_valueof "\$bpnum" "INVALID"]
 # earlier breakpoint.  Check that the thread-id used when describing
 # the earlier breakpoints is correct.
 gdb_test "break foo thread 1.1" \
-    [multi_line \
-	 "Note: breakpoint $bpnum \\(thread 2.1\\) also set at pc $hex\\." \
-	 "Note: breakpoint $bpnum \\(thread 2.1\\) also set at pc $hex\\." \
-	 "Breakpoint $decimal at $hex: foo\\. \\(2 locations\\)"]
+    "Breakpoint $decimal at $hex: file \[^\r\n\]+$srcfile, line $decimal\\."
 
 # Save the breakpoints into a file.
 if {[is_remote host]} {
diff --git a/gdb/testsuite/gdb.multi/inferior-specific-bp-1.c b/gdb/testsuite/gdb.multi/inferior-specific-bp-1.c
index 59a6e32..16db062 100644
--- a/gdb/testsuite/gdb.multi/inferior-specific-bp-1.c
+++ b/gdb/testsuite/gdb.multi/inferior-specific-bp-1.c
@@ -35,7 +35,7 @@ foo (void)
 static void
 bar (void)
 {
-  global_var = 0;
+  global_var = 0;	/* First location of bar.  */
 
   foo ();
 }
diff --git a/gdb/testsuite/gdb.multi/inferior-specific-bp-2.c b/gdb/testsuite/gdb.multi/inferior-specific-bp-2.c
index cbae745..bde6fbf 100644
--- a/gdb/testsuite/gdb.multi/inferior-specific-bp-2.c
+++ b/gdb/testsuite/gdb.multi/inferior-specific-bp-2.c
@@ -36,7 +36,7 @@ main (void)
 static int
 bar (void)
 {
-  return baz ();
+  return baz ();		/* Second location of bar.  */
 }
 
 static int
diff --git a/gdb/testsuite/gdb.multi/inferior-specific-bp.exp b/gdb/testsuite/gdb.multi/inferior-specific-bp.exp
index 5cc451b..82cc924 100644
--- a/gdb/testsuite/gdb.multi/inferior-specific-bp.exp
+++ b/gdb/testsuite/gdb.multi/inferior-specific-bp.exp
@@ -51,9 +51,9 @@ if {![runto_main]} {
 # this should fail.  Try with the keywords in both orders just in case the
 # parser has a bug.
 gdb_test "break foo thread 1.1 inferior 1" \
-    "You can specify only one of inferior or thread\\."
+    "You can specify only one of thread, inferior, or task\\."
 gdb_test "break foo inferior 1 thread 1.1" \
-    "You can specify only one of inferior or thread\\."
+    "You can specify only one of thread, inferior, or task\\."
 
 # Try to create a breakpoint using the 'inferior' keyword multiple times.
 gdb_test "break foo inferior 1 inferior 2" \
@@ -62,6 +62,73 @@ gdb_test "break foo inferior 1 inferior 2" \
 # Clear out any other breakpoints.
 delete_breakpoints
 
+# Create an inferior specific breakpoint and then change the inferior
+# using the Python API.  Use 'info breakpoint' to check that the
+# breakpoint was updated as we expect.
+if { [allow_python_tests] } {
+    with_test_prefix "update breakpoint inferior" {
+	# Create the b/p and grab its number.
+	gdb_breakpoint "bar inferior 1"
+	set bpnum [get_integer_valueof "\$bpnum" "INVALID" \
+		       "get b/p number for breakpoint on bar"]
+
+	# Get the line number for the two locations, the first in
+	# inferior 1, the second in inferior 2.
+	set bar_lineno_1 \
+	    [gdb_get_line_number "First location of bar" $srcfile]
+	set bar_lineno_2 \
+	    [gdb_get_line_number "Second location of bar" $srcfile2]
+
+	# Check the b/p was created with a single location where we
+	# expect it.
+	gdb_test "info breakpoint $bpnum" \
+	    [multi_line \
+		 "" \
+		 "$bpnum\\s+breakpoint\\s+keep\\s+y\\s+$hex\\s+in bar at \[^\r\n\]+/$srcfile:$bar_lineno_1 inf 1" \
+		 "\\s+stop only in inferior 1"] \
+	    "check original details for breakpoint on bar"
+
+	# Use the Python API to update the b/p's inferior.
+	gdb_test_no_output "python bp = gdb.breakpoints()\[0\]"
+	gdb_test_no_output "python bp.inferior = 2"
+
+	# We should still only have a single location, but now in
+	# inferior 2.
+	gdb_test "info breakpoint $bpnum" \
+	    [multi_line \
+		 "" \
+		 "$bpnum\\s+breakpoint\\s+keep\\s+y\\s+$hex\\s+in bar at \[^\r\n\]+/$srcfile2:$bar_lineno_2 inf 2" \
+		 "\\s+stop only in inferior 2"] \
+	    "check updated details for breakpoint on bar"
+
+	# Use the Python API to remove the inferior restriction on the
+	# breakpoint.
+	gdb_test_no_output "python bp.inferior = None"
+
+	# The breakpoint should now have multiple locations.
+	gdb_test "info breakpoint $bpnum" \
+	    [multi_line \
+		 "" \
+		 "$bpnum\\s+breakpoint\\s+keep\\s+y\\s+<MULTIPLE>\\s*" \
+		 "$bpnum.1\\s+y\\s+$hex\\s+in bar at\[^\r\n\]+$srcfile:$bar_lineno_1 inf 1" \
+		 "$bpnum.2\\s+y\\s+$hex\\s+in bar at\[^\r\n\]+$srcfile2:$bar_lineno_2 inf 2"] \
+	    "check breakpoint bar now inferior requirement is gone"
+
+	# Finally, add the inferior requirement back.
+	gdb_test_no_output "python bp.inferior = 1"
+
+	# Check the original location and restriction is restored.
+	gdb_test "info breakpoint $bpnum" \
+	    [multi_line \
+		 "" \
+		 "$bpnum\\s+breakpoint\\s+keep\\s+y\\s+$hex\\s+in bar at \[^\r\n\]+/$srcfile:$bar_lineno_1 inf 1" \
+		 "\\s+stop only in inferior 1"] \
+	    "check original details for breakpoint on bar are back"
+
+	delete_breakpoints
+    }
+}
+
 # Use 'info breakpoint' to check that the inferior specific breakpoint is
 # present in the breakpoint list.  TESTNAME is the name used for this test,
 # BP_NUMBER is the number for the breakpoint, and EXPECTED_LOC_COUNT is the
@@ -105,16 +172,8 @@ proc check_info_breakpoints { testname bp_number expected_loc_count } {
 # Create an inferior-specific breakpoint.  Use gdb_test instead of
 # gdb_breakpoint here as we want to check the breakpoint was placed in
 # multiple locations.
-#
-# Currently GDB still places inferior specific breakpoints into every
-# inferior, just like it does with thread specific breakpoints.
-# Hopefully this will change in the future, at which point, this test
-# will need updating.
-#
-# Two of these locations are in inferior 1, while the third is in
-# inferior 2.
 gdb_test "break foo inferior 1" \
-    "Breakpoint $decimal at $hex: foo\\. \\(3 locations\\)"
+    "Breakpoint $decimal at $hex: foo\\. \\(2 locations\\)"
 set bp_number [get_integer_valueof "\$bpnum" "INVALID" \
 		  "get b/p number for inferior specific breakpoint"]
 
@@ -123,7 +182,7 @@ set location_count 0
 set saw_inf_cond false
 
 check_info_breakpoints "first check for inferior specific breakpoint" \
-    $bp_number 3
+    $bp_number 2
 
 # Create a multi-inferior breakpoint to stop at.
 gdb_breakpoint "stop_breakpt" message
diff --git a/gdb/testsuite/gdb.multi/multi-target-continue.exp b/gdb/testsuite/gdb.multi/multi-target-continue.exp
index d220106..d4b2fc2 100644
--- a/gdb/testsuite/gdb.multi/multi-target-continue.exp
+++ b/gdb/testsuite/gdb.multi/multi-target-continue.exp
@@ -30,7 +30,7 @@ proc test_continue {non-stop} {
 
     proc set_break {inf} {
 	gdb_test "break function${inf} thread ${inf}.1" \
-	"Breakpoint .* function${inf}\\..*"
+	    "Breakpoint ${::decimal} at ${::hex}: file .*, line ${::decimal}\\."
     }
 
     # Select inferior INF, and then run to a breakpoint on inferior
diff --git a/gdb/testsuite/gdb.multi/multi-target-ping-pong-next.exp b/gdb/testsuite/gdb.multi/multi-target-ping-pong-next.exp
index 0aff708..36f9d24 100644
--- a/gdb/testsuite/gdb.multi/multi-target-ping-pong-next.exp
+++ b/gdb/testsuite/gdb.multi/multi-target-ping-pong-next.exp
@@ -52,12 +52,12 @@ proc test_ping_pong_next {} {
     gdb_test "thread 1.1" "Switching to thread 1.1 .*"
 
     gdb_test "break $srcfile:$line1 thread 1.1" \
-	"Breakpoint .*$srcfile:$line1\\..*"
+	"Breakpoint .*$srcfile, line $line1\\."
 
     gdb_test "continue" "hit Breakpoint .*"
 
     gdb_test "break $srcfile:$line2 thread 2.1" \
-	"Breakpoint .*$srcfile:$line2\\..*"
+	"Breakpoint .*$srcfile, line $line2\\."
 
     # Now block inferior 1 and issue "next".  We should stop at the
     # breakpoint for inferior 2, given schedlock off.
diff --git a/gdb/testsuite/gdb.multi/multi-term-settings.c b/gdb/testsuite/gdb.multi/multi-term-settings.c
index 6880206..e9e7e95 100644
--- a/gdb/testsuite/gdb.multi/multi-term-settings.c
+++ b/gdb/testsuite/gdb.multi/multi-term-settings.c
@@ -22,7 +22,6 @@
 #include <stdio.h>
 #include <sys/types.h>
 #include <termios.h>
-#include <unistd.h>
 #include <signal.h>
 
 int
diff --git a/gdb/testsuite/gdb.multi/multi-term-settings.exp b/gdb/testsuite/gdb.multi/multi-term-settings.exp
index 59ff8ce..0aeba1f 100644
--- a/gdb/testsuite/gdb.multi/multi-term-settings.exp
+++ b/gdb/testsuite/gdb.multi/multi-term-settings.exp
@@ -94,7 +94,7 @@ proc create_inferior {which_inf inf_how} {
 		 "attach"] == 0} {
 
 	    # The program is now stopped, but if testing against
-	    # gdbserver, then the inferior's output emmitted before it
+	    # gdbserver, then the inferior's output emitted before it
 	    # stopped isn't flushed unless we explicitly do so,
 	    # because it is on a different spawn_id.  Do it now, to
 	    # avoid confusing tests further below.
diff --git a/gdb/testsuite/gdb.multi/pending-bp-del-inferior.c b/gdb/testsuite/gdb.multi/pending-bp-del-inferior.c
new file mode 100644
index 0000000..1d03000
--- /dev/null
+++ b/gdb/testsuite/gdb.multi/pending-bp-del-inferior.c
@@ -0,0 +1,28 @@
+/* This testcase is part of GDB, the GNU debugger.
+
+   Copyright 2023 Free Software Foundation, Inc.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
+
+int
+foo (void)
+{
+  return 0;
+}
+
+int
+main (void)
+{
+  return foo ();
+}
diff --git a/gdb/testsuite/gdb.multi/pending-bp-del-inferior.exp b/gdb/testsuite/gdb.multi/pending-bp-del-inferior.exp
new file mode 100644
index 0000000..12c0a84
--- /dev/null
+++ b/gdb/testsuite/gdb.multi/pending-bp-del-inferior.exp
@@ -0,0 +1,214 @@
+# Copyright 2023 Free Software Foundation, Inc.
+
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
+# Setup two inferiors.  Select one inferior and create a pending
+# thread specific breakpoint in the other inferior.
+#
+# Delete the selected inferior (the one for which the thread specific
+# breakpoint doesn't apply), and check that the breakpoint still exists.
+#
+# Repeat this process, but this time, create an inferior specific
+# breakpoint.
+
+# The plain remote target can't do multiple inferiors.
+require !use_gdb_stub
+
+standard_testfile
+
+if {[prepare_for_testing "failed to prepare" $testfile $srcfile]} {
+    return -1
+}
+
+# Setup for the tests.  Create two inferiors, both running the global
+# BINFILE, and proceed to main in both inferiors.  Delete all
+# breakpoints, and check that we do have two threads.
+#
+# Return true after a successful setup, otherwise, return false.
+proc test_setup {} {
+    clean_restart $::binfile
+
+    if {![runto_main]} {
+	return 0
+    }
+
+    gdb_test "add-inferior -exec ${::binfile}" "Added inferior 2.*" \
+	"add inferior 2"
+    gdb_test "inferior 2" "Switching to inferior 2 .*" \
+	"select inferior 2"
+
+    if {![runto_main]} {
+	return 0
+    }
+
+    delete_breakpoints
+
+    gdb_test "info threads" \
+	[multi_line \
+	     "  Id\\s+Target Id\\s+Frame\\s*" \
+	     "  1\\.1\\s+\[^\r\n\]+" \
+	     "\\* 2\\.1\\s+\[^\r\n\]+"] \
+	"check we have the expected threads"
+
+    return 1
+}
+
+# Assuming inferior 2 is already selected, kill the current inferior
+# (inferior 2), select inferior 1, and then remove inferior 2.
+proc kill_and_remove_inferior_2 {} {
+    gdb_test "kill" "" "kill inferior 2" \
+	"Kill the program being debugged.*y or n. $" "y"
+
+    gdb_test "inferior 1" "Switching to inferior 1 .*" \
+	"select inferior 1"
+
+    gdb_test_no_output "remove-inferiors 2"
+}
+
+# Setup two inferiors, then create a breakpoint.  If BP_PENDING is
+# true then the breakpoint will be pending, otherwise, the breakpoint
+# will be non-pending.
+#
+# BP_TYPE is either 'thread' or 'inferior', and indicates if the
+# created breakpoint should be thread or inferior specific.
+#
+# The breakpoint is created while inferior 2 is selected, and the
+# thread/inferior restriction always identifies inferior 1.
+#
+# Then inferior 2 is killed and removed.
+#
+# Finally, check that the breakpoint still exists and correctly refers
+# to inferior 1.
+proc do_bp_test { bp_type bp_pending } {
+    if {![test_setup]} {
+	return
+    }
+
+    if { $bp_pending } {
+	set bp_func "bar"
+    } else {
+	set bp_func "foo"
+    }
+
+    if { $bp_type eq "thread" } {
+	set bp_restriction "thread 1.1"
+    } else {
+	set bp_restriction "inferior 1"
+    }
+
+    gdb_breakpoint "$bp_func $bp_restriction" allow-pending
+    set bp_number [get_integer_valueof "\$bpnum" "INVALID" \
+		       "get b/p number for previous breakpoint"]
+
+    if { $bp_restriction eq "thread 1.1" } {
+	set bp_after_restriction "thread 1"
+    } else {
+	set bp_after_restriction $bp_restriction
+    }
+
+    if { $bp_pending } {
+	set bp_pattern_before \
+	    [multi_line \
+		 "$bp_number\\s+breakpoint\\s+keep\\s+y\\s+<PENDING>\\s+${bp_func}" \
+		 "\\s+stop only in [string_to_regexp $bp_restriction]"]
+	set bp_pattern_after \
+	    [multi_line \
+		 "$bp_number\\s+breakpoint\\s+keep\\s+y\\s+<PENDING>\\s+${bp_func}" \
+		 "\\s+stop only in [string_to_regexp $bp_after_restriction]"]
+    } else {
+	set bp_pattern_before \
+	    [multi_line \
+		 "$bp_number\\s+breakpoint\\s+keep\\s+y\\s+$::hex in $bp_func at \[^\r\n\]+ inf 1" \
+		 "\\s+stop only in [string_to_regexp $bp_restriction]"]
+
+	set bp_pattern_after \
+	    [multi_line \
+		 "$bp_number\\s+breakpoint\\s+keep\\s+y\\s+$::hex in $bp_func at \[^\r\n\]+" \
+		 "\\s+stop only in [string_to_regexp $bp_after_restriction]"]
+    }
+
+    gdb_test "info breakpoints" $bp_pattern_before \
+	"info breakpoints before inferior removal"
+
+    kill_and_remove_inferior_2
+
+    gdb_test "info breakpoints" $bp_pattern_after \
+	"info breakpoints after inferior removal"
+}
+
+# Setup two inferiors, then create a dprintf.  If BP_PENDING is
+# true then the dprintf will be pending, otherwise, the dprintf
+# will be non-pending.
+#
+# The dprintf is created while inferior 2 is selected.  Then inferior
+# 2 is killed and removed.
+#
+# Finally, check that the dprintf still exists.
+proc do_dprintf_test { bp_pending } {
+    if {![test_setup]} {
+	return
+    }
+
+    if { $bp_pending } {
+	set bp_func "bar"
+
+	gdb_test "dprintf $bp_func,\"in $bp_func\"" ".*" \
+	    "create dprintf breakpoint" \
+	    "Make dprintf pending on future shared library load\\? \\(y or .n.\\) $" "y"
+    } else {
+	set bp_func "foo"
+
+	gdb_test "dprintf $bp_func,\"in $bp_func\"" ".*" \
+	    "create dprintf breakpoint"
+    }
+
+    set bp_number [get_integer_valueof "\$bpnum" "INVALID" \
+		       "get b/p number for previous breakpoint"]
+
+    if { $bp_pending } {
+	set bp_pattern_before \
+	    [multi_line \
+		 "$bp_number\\s+dprintf\\s+keep\\s+y\\s+<PENDING>\\s+${bp_func}" \
+		 "\\s+printf \"in $bp_func\""]
+	set bp_pattern_after $bp_pattern_before
+    } else {
+	set bp_pattern_before \
+	    [multi_line \
+		 "$bp_number\\s+dprintf\\s+keep\\s+y\\s+<MULTIPLE>\\s*" \
+		 "\\s+printf \"in $bp_func\"" \
+		 "$bp_number\\.1\\s+y\\s+$::hex in $bp_func at \[^\r\n\]+ inf 1" \
+		 "$bp_number\\.2\\s+y\\s+$::hex in $bp_func at \[^\r\n\]+ inf 2"]
+
+	set bp_pattern_after \
+	    [multi_line \
+		 "$bp_number\\s+dprintf\\s+keep\\s+y\\s+$::hex in $bp_func at \[^\r\n\]+" \
+		 "\\s+printf \"in $bp_func\""]
+    }
+
+    gdb_test "info breakpoints" $bp_pattern_before \
+	"info breakpoints before inferior removal"
+
+    kill_and_remove_inferior_2
+
+    gdb_test "info breakpoints" $bp_pattern_after \
+	"info breakpoints after inferior removal"
+}
+
+foreach_with_prefix bp_pending { true false } {
+    foreach_with_prefix bp_type { thread inferior } {
+	do_bp_test $bp_type $bp_pending
+    }
+
+    do_dprintf_test $bp_pending
+}
diff --git a/gdb/testsuite/gdb.multi/pending-bp.exp b/gdb/testsuite/gdb.multi/pending-bp.exp
index 13f76f4..2a0644b 100644
--- a/gdb/testsuite/gdb.multi/pending-bp.exp
+++ b/gdb/testsuite/gdb.multi/pending-bp.exp
@@ -72,6 +72,48 @@ proc do_test_setup { inf_1_stop inf_2_stop } {
     return true
 }
 
+# Create a breakpoint on the function 'foo' in THREAD.  It is expected
+# that the breakpoint created will be pending, this is checked by
+# running the 'info breakpoints' command.
+#
+# Returns the number for the newly created breakpoint.
+proc do_create_pending_foo_breakpoint { {thread "1.1"} } {
+    gdb_test "break foo thread $thread" \
+	[multi_line \
+	     "Function \"foo\" not defined\\." \
+	     "Breakpoint $::decimal \\(foo\\) pending\."] \
+	"set pending thread-specific breakpoint"
+    set bpnum [get_integer_valueof "\$bpnum" "*INVALID*" \
+		   "get number for thread-specific breakpoint on foo"]
+    gdb_test "info breakpoints $bpnum" \
+	[multi_line \
+	     "$bpnum\\s+breakpoint\\s+keep\\s+y\\s+<PENDING>\\s+foo" \
+	     "\\s+stop only in thread [string_to_regexp $thread]"] \
+	"check thread-specific breakpoint is initially pending"
+
+    return $bpnum
+}
+
+# Create a breakpoint on the function 'foo' in THREAD.  It is expected
+# that the breakpoint created will not be pending, this is checked by
+# running the 'info breakpoints' command.
+#
+# Returns the number for the newly created breakpoint.
+proc do_create_foo_breakpoint { {thread "1.1"} } {
+    gdb_test "break foo thread $thread" \
+	"Breakpoint $::decimal at $::hex" \
+	"set thread-specific breakpoint"
+    set bpnum [get_integer_valueof "\$bpnum" "*INVALID*" \
+		   "get number for thread-specific breakpoint on foo"]
+    gdb_test "info breakpoints $bpnum" \
+	[multi_line \
+	     "$bpnum\\s+breakpoint\\s+keep\\s+y\\s+$::hex\\s+<foo\[^>\]*> inf $::decimal" \
+	     "\\s+stop only in thread [string_to_regexp $thread]"] \
+	"check thread-specific breakpoint is initially pending"
+
+    return $bpnum
+}
+
 # Check that when a breakpoint is in the pending state, but that breakpoint
 # does have some locations (those locations themselves are pending), GDB
 # doesn't display the inferior list in the 'info breakpoints' output.
@@ -122,5 +164,169 @@ proc_with_prefix test_no_inf_display {} {
 	"check info breakpoints while breakpoint is pending"
 }
 
+# Setup two inferiors.  In #1 the symbol 'foo' has not yet been
+# loaded, while in #2 the symbol 'foo' has been loaded.
+#
+# Create a thread-specific breakpoint on 'foo' tied to a thread in
+# inferior #1, the breakpoint should be pending -- 'foo' is not yet
+# loaded in #1.
+#
+# Now move inferior #1 forward until 'foo' is loaded, check the
+# breakpoint is no longer pending.
+#
+# Move inferior #1 forward more until 'foo' is unloaded, check that
+# the breakpoint returns to the pending state.
+proc_with_prefix test_pending_toggle { } {
+
+    do_test_setup "Break before open" "Break before close"
+
+    set bpnum [do_create_pending_foo_breakpoint]
+
+    # Now return to inferior 1 and continue until the shared library is
+    # loaded, the breakpoint should become non-pending.
+    gdb_test "inferior 1" "Switching to inferior 1 .*" \
+	"switch back to inferior 1"
+    gdb_continue_to_breakpoint "stop in foo in inferior 1" "foo \\(\\) .*"
+
+    gdb_test "info breakpoint $bpnum" \
+	[multi_line \
+	     "$bpnum\\s+breakpoint\\s+keep\\s+y\\s+$::hex <foo\[^>\]*> inf 1" \
+	     "\\s+stop only in thread 1\\.1" \
+	     "\\s+breakpoint already hit 1 time"] \
+	"check thread-specific breakpoint is no longer pending"
+
+    gdb_breakpoint [gdb_get_line_number "Break after close"] temporary
+    gdb_continue_to_breakpoint "close library"
+    gdb_test "info breakpoints $bpnum" \
+	[multi_line \
+	     "$bpnum\\s+breakpoint\\s+keep\\s+y\\s+<PENDING>\\s+foo" \
+	     "\\s+stop only in thread 1\\.1" \
+	     "\\s+breakpoint already hit 1 time"] \
+	"check thread-specific breakpoint is pending again"
+}
+
+# Create a Python variable VAR and set it to the gdb.Breakpoint object
+# corresponding to the breakpoint numbered BPNUM.  If THREAD is not
+# the empty string then THREAD should be an integer, check that
+# gdb.Breakpoint.thread is set to the value of THREAD.  Otherwise, if
+# THREAD is the empty string, check that gdb.Breakpoint.thread is set
+# to None.
+proc py_find_breakpoint { var bpnum {thread ""} } {
+    gdb_test_no_output \
+	"python ${var}=\[b for b in gdb.breakpoints() if b.number == $bpnum\]\[0\]" \
+	"find Python gdb.Breakpoint object"
+    if { $thread ne "" } {
+	gdb_test_no_output "python assert(${var}.thread == ${thread})" \
+	    "check thread attribute is currently correct"
+    } else {
+	gdb_test_no_output "python assert(${var}.thread is None)" \
+	    "check thread attribute is currently correct"
+    }
+}
+
+# Setup two inferiors.  In #1 the symbol 'foo' has not yet been
+# loaded, while in #2 the symbol 'foo' has been loaded.
+#
+# Create a thread-specific breakpoint on 'foo' tied to a thread in
+# inferior #1, the breakpoint should be pending -- 'foo' is not yet
+# loaded in #1.
+#
+# Use Python to change the thread of the thread-specific breakpoint to
+# a thread in inferior #2, at this point the thread should gain a
+# location and become non-pending.
+#
+# Set the thread back to a thread in inferior #1, the breakpoint
+# should return to the pending state.
+proc_with_prefix py_test_toggle_thread {} {
+    do_test_setup "Break before open" "Break after open"
+
+    set bpnum [do_create_pending_foo_breakpoint]
+
+    py_find_breakpoint "bp" $bpnum 1
+
+    gdb_test_no_output "python bp.thread = 2" \
+	"change thread on thread-specific breakpoint"
+    gdb_test "info breakpoint $bpnum" \
+	[multi_line \
+	     "$bpnum\\s+breakpoint\\s+keep\\s+y\\s+$::hex <foo\[^>\]*> inf 2" \
+	     "\\s+stop only in thread 2\\.1"] \
+	"check thread-specific breakpoint now has a location"
+
+    gdb_test_no_output "set call_count = 2" "set call_count in inferior 2"
+    gdb_continue_to_breakpoint "stop at foo in inferior 2" "foo \\(\\) .*"
+
+    gdb_test_no_output "python bp.thread = 1" \
+	"restore thread on thread-specific breakpoint"
+    gdb_test "info breakpoints $bpnum" \
+	[multi_line \
+	     "$bpnum\\s+breakpoint\\s+keep\\s+y\\s+<PENDING>\\s+foo" \
+	     "\\s+stop only in thread 1\\.1" \
+	     "\\s+breakpoint already hit 1 time"] \
+	"check thread-specific breakpoint has returned to pending"
+
+    gdb_breakpoint [gdb_get_line_number "Break after close"] temporary
+    gdb_continue_to_breakpoint "stop after close in inferior 2" \
+	".* Break after close\\. .*"
+
+    gdb_test "inferior 1" "Switching to inferior 1 .*" \
+	"switch to inferior 1"
+    gdb_continue_to_breakpoint "stop at foo in inferior 1" "foo \\(\\) .*"
+}
+
+# Setup two inferiors.  Both inferiors have the symbol 'foo'
+# available.
+#
+# Create a thread-specific breakpoint on 'foo' tied to a thread in
+# inferior #1, the breakpoint should not be pending, but will only
+# have a single location, the location in inferior #1.
+#
+# Use Python to change the thread of the thread-specific breakpoint to
+# None.  At this point the breakpoint should gain a second location, a
+# location in inferior #2.
+proc_with_prefix py_test_clear_thread {} {
+    do_test_setup "Break after open" "Break after open"
+
+    set bpnum [do_create_foo_breakpoint]
+
+    py_find_breakpoint "bp" $bpnum 1
+
+    gdb_test_no_output "python bp.thread = None" \
+	"clear thread on thread-specific breakpoint"
+    gdb_test "info breakpoints $bpnum" \
+	[multi_line \
+	     "${bpnum}\\s+breakpoint\\s+keep y\\s+<MULTIPLE>\\s*" \
+	     "${bpnum}\\.1\\s+y\\s+${::hex}\\s+<foo\[^>\]*> inf $::decimal" \
+	     "${bpnum}\\.2\\s+y\\s+${::hex}\\s+<foo\[^>\]*> inf $::decimal"] \
+	"check for a location in both inferiors"
+
+    gdb_continue_to_breakpoint "stop at foo in inferior 2" "foo \\(\\) .*"
+    gdb_test_no_output "set call_count = 2" "set call_count in inferior 2"
+
+    gdb_test "inferior 1" "Switching to inferior 1 .*" \
+	"switch to inferior 1"
+    gdb_continue_to_breakpoint "stop at foo in inferior 1" "foo \\(\\) .*"
+    gdb_test_no_output "set call_count = 2" "set call_count in inferior 1"
+
+    gdb_test_no_output "python bp.thread = 2"
+    gdb_test "info breakpoints $bpnum" \
+	[multi_line \
+	     "${bpnum}\\s+breakpoint\\s+keep y\\s+${::hex}\\s+<foo\[^>\]*> inf 2" \
+	     "\\s+stop only in thread 2\\.1" \
+	     "\\s+breakpoint already hit 2 times"] \
+	"check for a location only in inferior 2"
+
+    gdb_breakpoint [gdb_get_line_number "Break after close"] temporary
+    gdb_continue_to_breakpoint "stop after close in inferior 1" \
+	".* Break after close\\. .*"
+
+    gdb_test "inferior 2" "Switching to inferior 2 .*" \
+	"switch back to inferior 2"
+    gdb_continue_to_breakpoint "stop at foo again in inferior 2" \
+	"foo \\(\\) .*"
+}
+
 # Run all the tests.
 test_no_inf_display
+test_pending_toggle
+py_test_toggle_thread
+py_test_clear_thread
diff --git a/gdb/testsuite/gdb.multi/tids.exp b/gdb/testsuite/gdb.multi/tids.exp
index 573b02f..4f78884 100644
--- a/gdb/testsuite/gdb.multi/tids.exp
+++ b/gdb/testsuite/gdb.multi/tids.exp
@@ -433,11 +433,13 @@ if { [allow_python_tests] } {
 
 	gdb_py_test_silent_cmd "python bp = gdb.breakpoints()\[0\]" \
 	    "get python breakpoint" 0
-	gdb_test "python bp.thread = 6" "thread = 6" \
+	gdb_test_no_output "python bp.thread = 6" \
 	    "make breakpoint thread-specific with python"
 	# Check that the inferior-qualified ID is correct.
 	gdb_test "info breakpoint" \
-	    "stop only in thread 1.3\r\n.*" \
+	    [multi_line \
+		 "$decimal\\s+\[^\r\n\]+ in thread_function1 at \[^\r\n\]+" \
+		 "\\s+stop only in thread 1\\.3"] \
 	    "thread specific breakpoint right thread"
     }
 }
diff --git a/gdb/testsuite/gdb.opt/break-on-_exit.exp b/gdb/testsuite/gdb.opt/break-on-_exit.exp
index 59a1c61..59fecaa 100644
--- a/gdb/testsuite/gdb.opt/break-on-_exit.exp
+++ b/gdb/testsuite/gdb.opt/break-on-_exit.exp
@@ -18,7 +18,7 @@
 # set past the syscall due to faulty prologue skipping, the breakpoint will not
 # trigger.
 #
-# In particular, we're trying to excercise the instruction analysis
+# In particular, we're trying to exercise the instruction analysis
 # functionality of prologue skipping.  If the non-minimal symbols are
 # read for libc, then that functionality might not be used because f.i.
 # line-info is used instead.  Also, if the minimal symbols are not read
diff --git a/gdb/testsuite/gdb.pascal/floats.exp b/gdb/testsuite/gdb.pascal/floats.exp
index 3e836a3..d96fb9b 100644
--- a/gdb/testsuite/gdb.pascal/floats.exp
+++ b/gdb/testsuite/gdb.pascal/floats.exp
@@ -87,7 +87,7 @@ gdb_test "print r + (-1)" " = 0\\.2(499.*|5|500.*)"
 gdb_test "print r + (-5)" " = -3\\.7(499.*|5|500.*)"
 gdb_test "print r + (-10)" " = -8\\.7(499.*|5|500.*)"
 
-# Test substraction
+# Test subtraction
 gdb_test "print r - s" " = -0\\.9(499.*|5|500.*)"
 gdb_test "print r - t" " = 4\\.4(499.*|5|500.*)"
 
diff --git a/gdb/testsuite/gdb.pascal/integers.exp b/gdb/testsuite/gdb.pascal/integers.exp
index ec5f53c..974de6f 100644
--- a/gdb/testsuite/gdb.pascal/integers.exp
+++ b/gdb/testsuite/gdb.pascal/integers.exp
@@ -71,7 +71,7 @@ gdb_test "print i + k" " = 4"
 gdb_test "print j + k" " = 5"
 gdb_test "print i + j + k" " = 6"
 
-# Test substraction
+# Test subtraction
 gdb_test "print j - i" " = 1"
 gdb_test "print i - j" "= -1"
 gdb_test "print k -i -j" " = 0"
diff --git a/gdb/testsuite/gdb.pascal/types.exp b/gdb/testsuite/gdb.pascal/types.exp
index 5b8d00b..262045e 100644
--- a/gdb/testsuite/gdb.pascal/types.exp
+++ b/gdb/testsuite/gdb.pascal/types.exp
@@ -59,7 +59,7 @@ proc test_float_literal_types_accepted {} {
     # Test various floating point formats
 
     # this used to guess whether to look for "real*4" or
-    # "real*8" based on a target config variable, but noone
+    # "real*8" based on a target config variable, but no one
     # maintained it properly.
 
     gdb_test "pt .44" "type = double"
diff --git a/gdb/testsuite/gdb.python/py-arch.exp b/gdb/testsuite/gdb.python/py-arch.exp
index 3c58bf1..aef4186 100644
--- a/gdb/testsuite/gdb.python/py-arch.exp
+++ b/gdb/testsuite/gdb.python/py-arch.exp
@@ -28,7 +28,7 @@ if ![runto_main] {
 # internal GDB assert.
 gdb_py_test_silent_cmd "python empty = gdb.Architecture()" "get empty arch" 0
 gdb_test "python print(repr (empty))" "<gdb\\.Architecture \\(invalid\\)>" \
-    "Test empty achitecture __repr__ does not trigger an assert"
+    "Test empty architecture __repr__ does not trigger an assert"
 gdb_test "python print(empty.name())" ".*Architecture is invalid.*" \
     "Test empty architecture.name does not trigger an assert"
 gdb_test "python print(empty.disassemble())" ".*Architecture is invalid.*" \
diff --git a/gdb/testsuite/gdb.python/py-breakpoint.exp b/gdb/testsuite/gdb.python/py-breakpoint.exp
index c44477c..934690d 100644
--- a/gdb/testsuite/gdb.python/py-breakpoint.exp
+++ b/gdb/testsuite/gdb.python/py-breakpoint.exp
@@ -743,7 +743,9 @@ proc_with_prefix test_bkpt_explicit_loc {} {
 	"No source file named foo.*" \
 	"set invalid explicit breakpoint by missing source and line"
     gdb_test "python bp1 = gdb.Breakpoint (source=\"$srcfile\", line=\"900\")" \
-	"No line 900 in file \"$srcfile\".*" \
+	[multi_line \
+	     "^No compiled code for line 900 in file \"$srcfile\"\\." \
+	     "Breakpoint $::decimal \[^\r\n\]+ pending\\."] \
 	"set invalid explicit breakpoint by source and invalid line"
     gdb_test "python bp1 = gdb.Breakpoint (function=\"blah\")" \
 	"Function \"blah\" not defined.*" \
diff --git a/gdb/testsuite/gdb.python/py-format-string.exp b/gdb/testsuite/gdb.python/py-format-string.exp
index 9209213..d0349c5 100644
--- a/gdb/testsuite/gdb.python/py-format-string.exp
+++ b/gdb/testsuite/gdb.python/py-format-string.exp
@@ -82,7 +82,7 @@ set default_pointer_regexp "0x\[a-fA-F0-9\]+"
 
 # A regular expression for a non-expanded C++ reference.
 #
-# Stringifying a C++ reference produces an address preceeded by a "@" in
+# Stringifying a C++ reference produces an address preceded by a "@" in
 # Python, but, by default, the C++ reference/class is expanded by the
 # GDB print command.
 set default_ref_regexp "@${default_pointer_regexp}"
diff --git a/gdb/testsuite/gdb.python/py-inferior.exp b/gdb/testsuite/gdb.python/py-inferior.exp
index ee30390..58475bd 100644
--- a/gdb/testsuite/gdb.python/py-inferior.exp
+++ b/gdb/testsuite/gdb.python/py-inferior.exp
@@ -27,12 +27,13 @@ if { [gdb_compile_pthreads ${srcdir}/${subdir}/${srcfile} ${binfile} executable
 }
 
 # Start with a fresh gdb.
-save_vars { env(ASAN_OPTIONS) } {
+save_vars { env(ASAN_OPTIONS) env(TSAN_OPTIONS) } {
     # The call to gdb.selected_inferior().read_memory (0, 0xffffffffffffffff)
     # triggers address sanitizer.  Suppress the error, leaving us with just
     # this warning:
     #   WARNING: AddressSanitizer failed to allocate 0xffffffffffffffff bytes
     set_sanitizer ASAN_OPTIONS allocator_may_return_null 1
+    set_sanitizer TSAN_OPTIONS allocator_may_return_null 1
 
     clean_restart ${testfile}
 }
diff --git a/gdb/testsuite/gdb.python/py-mi-cmd.exp b/gdb/testsuite/gdb.python/py-mi-cmd.exp
index 28c71cd..5291409 100644
--- a/gdb/testsuite/gdb.python/py-mi-cmd.exp
+++ b/gdb/testsuite/gdb.python/py-mi-cmd.exp
@@ -119,13 +119,47 @@ mi_gdb_test "-pycmd dash-key" \
 # With this argument the command raises a gdb.GdbError with no message
 # string.  GDB considers this a bug in the user program, so prints a
 # backtrace, and a generic error message.
-mi_gdb_test "-pycmd exp" \
-    [multi_line ".*&\"Traceback \\(most recent call last\\):..\"" \
-	 "&\"\[^\r\n\]+${testfile}.py\[^\r\n\]+\"" \
-	 "&\"\[^\r\n\]+raise gdb.GdbError\\(\\)..\"" \
-	 "&\"gdb.GdbError..\"" \
-	 "\\^error,msg=\"Error occurred in Python\\.\""] \
-    "-pycmd exp"
+
+set line1 \
+    [string_to_regexp {Traceback (most recent call last):\n}]
+set line2 \
+    [string cat \
+	 [string_to_regexp {  File \"}] \
+	 "\[^\r\n\]+" \
+	 [string_to_regexp ${testfile}.py] \
+	 [string_to_regexp {\", line }] \
+	 $decimal \
+	 [string_to_regexp {, in invoke\n}]]
+set line3 \
+    [string_to_regexp {    raise gdb.GdbError()\n}]
+set line4 \
+    [string_to_regexp {gdb.GdbError\n}]
+set errline \
+    [string_to_regexp {^error,msg="Error occurred in Python."}]
+
+set start_line \
+    [string_to_regexp {&"}]
+set end_line \
+    [string_to_regexp {"}]
+
+# With python <= 3.12.
+set re1 \
+    [multi_line \
+	 $start_line$line1$end_line \
+	 $start_line$line2$end_line \
+	 $start_line$line3$end_line \
+	 $start_line$line4$end_line \
+	 $errline]
+
+# With python >= 3.13.
+set re2 \
+    [multi_line \
+	 $start_line$line1$end_line \
+	 $start_line$line2$line3$end_line \
+	 $start_line$line4$end_line \
+	 $errline]
+
+mi_gdb_test "-pycmd exp" ($re1|$re2)
 
 mi_gdb_test "python pycmd2('-pycmd')" \
     ".*\\^done" \
diff --git a/gdb/testsuite/gdb.python/py-pp-cast.py b/gdb/testsuite/gdb.python/py-pp-cast.py
index 6eff800..c071920 100644
--- a/gdb/testsuite/gdb.python/py-pp-cast.py
+++ b/gdb/testsuite/gdb.python/py-pp-cast.py
@@ -13,6 +13,8 @@
 # You should have received a copy of the GNU General Public License
 # along with this program.  If not, see <http://www.gnu.org/licenses/>.
 
+import gdb.printing
+
 
 class PpIntPrinter(object):
     def __init__(self, val):
diff --git a/gdb/testsuite/gdb.python/py-pp-maint.exp b/gdb/testsuite/gdb.python/py-pp-maint.exp
index f224ae7..1ee206c 100644
--- a/gdb/testsuite/gdb.python/py-pp-maint.exp
+++ b/gdb/testsuite/gdb.python/py-pp-maint.exp
@@ -55,7 +55,7 @@ gdb_test "print flt" " = x=<42> y=<43>" \
 gdb_test "print ss" " = a=<a=<1> b=<$hex>> b=<a=<2> b=<$hex>>" \
     "print ss enabled #1"
 
-set num_pp 7
+set num_pp 6
 
 gdb_test "disable pretty-printer" \
     "$num_pp printers disabled.*0 of $num_pp printers enabled"
@@ -75,7 +75,7 @@ gdb_test "disable pretty-printer global lookup_function_lookup_test" \
     "1 printer disabled.*[expr $num_pp - 1] of $num_pp printers enabled"
 
 gdb_test "disable pretty-printer global pp-test;.*" \
-    "[expr $num_pp - 2] printers disabled.*1 of $num_pp printers enabled"
+    "[expr 5] printers disabled.*0 of $num_pp printers enabled"
 
 gdb_test "info pretty-printer global .*function" \
     {.*function_lookup_test \[disabled\].*} \
@@ -92,13 +92,13 @@ gdb_test "print ss" " = {a = {a = 1, b = $hex}, b = {a = 2, b = $hex}}" \
     "print ss disabled"
 
 gdb_test "enable pretty-printer global lookup_function_lookup_test" \
-    "1 printer enabled.*2 of $num_pp printers enabled"
+    "1 printer enabled.*1 of $num_pp printers enabled"
 
 # This doesn't enable any printers because each subprinter in the collection
 # is still individually disabled.  But this is still needed, to enable the
 # collection itself.
 gdb_test "enable pretty-printer global pp-test" \
-    "0 printers enabled.*2 of $num_pp printers enabled"
+    "0 printers enabled.*1 of $num_pp printers enabled"
 
 gdb_test "enable pretty-printer global pp-test;.*ss.*" \
     "2 printers enabled.*[expr $num_pp - 3] of $num_pp printers enabled"
diff --git a/gdb/testsuite/gdb.python/py-pp-re-notag.py b/gdb/testsuite/gdb.python/py-pp-re-notag.py
index 6aefad1..00bc5c7 100644
--- a/gdb/testsuite/gdb.python/py-pp-re-notag.py
+++ b/gdb/testsuite/gdb.python/py-pp-re-notag.py
@@ -16,6 +16,7 @@
 from time import asctime, gmtime
 
 import gdb  # silence pyflakes
+import gdb.printing
 
 
 class TimePrinter:
diff --git a/gdb/testsuite/gdb.python/py-prettyprint-stub.py b/gdb/testsuite/gdb.python/py-prettyprint-stub.py
index 565ae19..2378f55 100644
--- a/gdb/testsuite/gdb.python/py-prettyprint-stub.py
+++ b/gdb/testsuite/gdb.python/py-prettyprint-stub.py
@@ -16,6 +16,8 @@
 # This file is part of the GDB testsuite.
 # It tests Python-based pretty-printing of stubs.
 
+import gdb.printing
+
 
 class SPrinter:
     def __init__(self, val):
diff --git a/gdb/testsuite/gdb.python/py-progspace-events.exp b/gdb/testsuite/gdb.python/py-progspace-events.exp
index 95e4ca8..9dfc757 100644
--- a/gdb/testsuite/gdb.python/py-progspace-events.exp
+++ b/gdb/testsuite/gdb.python/py-progspace-events.exp
@@ -79,37 +79,16 @@ gdb_test "continue" \
 	 "\\\[Inferior $decimal \[^\r\n\]+ exited normally\\\]"] \
     "continue until inferior 2 exits"
 
-gdb_test "inferior 1" "\\\[Switching to inferior 1 .*"
-
-# Step the inferior.  During this process GDB will prune the now
+# Switch to inferior 1.  During this process GDB will prune the now
 # defunct inferior, which deletes its program space, which should
 # trigger the FreeProgspaceEvent.
 #
-# However, there is a slight problem.  When the target is remote, and
-# GDB is accessing files using remote fileio, then GDB will attempt to
-# prune the inferior at a point in time when the remote target is
-# waiting for a stop reply.  Pruning an inferior causes GDB to close
-# files associated with that inferior.
-#
-# In non-async mode we can't send fileio packets while waiting for a
-# stop reply, so the attempts to close files fails, and this shows up
-# as an error.
-#
-# As this error has nothing to do with the feature being tested here,
-# we just accept the error message, the important part is the
-# 'FreeProgspaceEvent' string, so long as that appears (just once)
-# then the test is a success.
-set warning_msg \
-    [multi_line \
-	 "warning: cannot close \"\[^\r\n\]+\": Cannot execute this command while the target is running\\." \
-	 "Use the \"interrupt\" command to stop the target" \
-	 "and then try again\\."]
 
-gdb_test "step" \
+gdb_test "inferior 1" \
     [multi_line \
-	 "^FreeProgspaceEvent.*: <gdb.Progspace object at $hex>(?:\r\n$warning_msg)*" \
-	 "do_parent_stuff \\(\\) at \[^\r\n\]+" \
-	 "$decimal\\s+\[^\r\n\]+"]
+	 "\\\[Switching to inferior 1 .*" \
+	 ".*" \
+	 "FreeProgspaceEvent.*: <gdb.Progspace object at $hex>"]
 
 # Let this inferior run to completion.
 gdb_continue_to_end
diff --git a/gdb/testsuite/gdb.python/py-read-memory-leak.c b/gdb/testsuite/gdb.python/py-read-memory-leak.c
new file mode 100644
index 0000000..75035cd
--- /dev/null
+++ b/gdb/testsuite/gdb.python/py-read-memory-leak.c
@@ -0,0 +1,27 @@
+/* This testcase is part of GDB, the GNU debugger.
+
+   Copyright 2014-2024 Free Software Foundation, Inc.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
+
+static struct x
+{
+  char unsigned u[4096];
+} x, *px = &x;
+
+int
+main (void)
+{
+  return 0;
+}
diff --git a/gdb/testsuite/gdb.python/py-read-memory-leak.exp b/gdb/testsuite/gdb.python/py-read-memory-leak.exp
new file mode 100644
index 0000000..52b072f
--- /dev/null
+++ b/gdb/testsuite/gdb.python/py-read-memory-leak.exp
@@ -0,0 +1,44 @@
+# Copyright (C) 2024 Free Software Foundation, Inc.
+
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
+# This file is part of the GDB testsuite.  It checks for memory leaks
+# associated with calling gdb.Inferior.read_memory().
+
+load_lib gdb-python.exp
+
+require allow_python_tests
+
+standard_testfile
+
+if { [prepare_for_testing "failed to prepare" ${testfile} ${srcfile}] } {
+    return -1
+}
+
+if ![runto_main] {
+   return -1
+}
+
+# Skip this test if the tracemalloc module is not available.
+if { ![gdb_py_module_available "tracemalloc"] } {
+    unsupported "tracemalloc module not available"
+    return
+}
+
+set pyfile [gdb_remote_download host ${srcdir}/${subdir}/${testfile}.py]
+
+# Source the Python script, this runs the test (which is written
+# completely in Python), and either prints PASS, or throws an
+# exception.
+gdb_test "source ${pyfile}" "PASS" "source python script"
diff --git a/gdb/testsuite/gdb.python/py-read-memory-leak.py b/gdb/testsuite/gdb.python/py-read-memory-leak.py
new file mode 100644
index 0000000..430c5c2
--- /dev/null
+++ b/gdb/testsuite/gdb.python/py-read-memory-leak.py
@@ -0,0 +1,93 @@
+# Copyright (C) 2024 Free Software Foundation, Inc.
+
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
+import os
+import tracemalloc
+
+import gdb
+
+# A global variable in which we store a reference to the memory buffer
+# returned from gdb.Inferior.read_memory().
+mem_buf = None
+
+
+# A global filters list, we only care about memory allocations
+# originating from this script.
+filters = [tracemalloc.Filter(True, "*" + os.path.basename(__file__))]
+
+
+# Run the test.  When CLEAR is True we clear the global INF variable
+# before comparing the before and after memory allocation traces.
+# When CLEAR is False we leave INF set to reference the gdb.Inferior
+# object, thus preventing the gdb.Inferior from being deallocated.
+def test(clear):
+    global filters, mem_buf
+
+    addr = gdb.parse_and_eval("px")
+    inf = gdb.inferiors()[0]
+
+    # Start tracing, and take a snapshot of the current allocations.
+    tracemalloc.start()
+    snapshot1 = tracemalloc.take_snapshot()
+
+    # Read from the inferior, this allocate a memory buffer object.
+    mem_buf = inf.read_memory(addr, 4096)
+
+    # Possibly clear the global INF variable.
+    if clear:
+        mem_buf = None
+
+    # Now grab a second snapshot of memory allocations, and stop
+    # tracing memory allocations.
+    snapshot2 = tracemalloc.take_snapshot()
+    tracemalloc.stop()
+
+    # Filter the snapshots; we only care about allocations originating
+    # from this file.
+    snapshot1 = snapshot1.filter_traces(filters)
+    snapshot2 = snapshot2.filter_traces(filters)
+
+    # Compare the snapshots, this leaves only things that were
+    # allocated, but not deallocated since the first snapshot.
+    stats = snapshot2.compare_to(snapshot1, "traceback")
+
+    # Total up all the allocated things.
+    total = 0
+    for stat in stats:
+        total += stat.size_diff
+    return total
+
+
+# The first time we run this some global state will be allocated which
+# shows up as memory that is allocated, but not released.  So, run the
+# test once and discard the result.
+test(True)
+
+# Now run the test twice, the first time we clear our global reference
+# to the memory buffer object, which should allow Python to deallocate
+# the object.  The second time we hold onto the global reference,
+# preventing Python from performing the deallocation.
+bytes_with_clear = test(True)
+bytes_without_clear = test(False)
+
+# The bug that used to exist in GDB was that even when we released the
+# global reference the gdb.Inferior object would not be deallocated.
+if bytes_with_clear > 0:
+    raise gdb.GdbError("memory leak when memory buffer should be released")
+if bytes_without_clear == 0:
+    raise gdb.GdbError("memory buffer object is no longer allocated")
+
+# Print a PASS message that the test script can see.
+print("PASS")
diff --git a/gdb/testsuite/gdb.python/py-record-btrace.exp b/gdb/testsuite/gdb.python/py-record-btrace.exp
index fba0b98..b035e14 100644
--- a/gdb/testsuite/gdb.python/py-record-btrace.exp
+++ b/gdb/testsuite/gdb.python/py-record-btrace.exp
@@ -198,3 +198,14 @@ with_test_prefix "level" {
     gdb_test "python print(gdb.current_recording().function_call_history\[0\].level)" "1"
     gdb_test "python print(gdb.current_recording().function_call_history\[1\].level)" "0"
 }
+
+# Note:  GDB can incrementally add to the recording from the raw trace data.
+# After a clear(), GDB might not have all the raw trace data available in its
+# buffer to recreate the full recording it had before the clear().
+# So, do this testing last to avoid disturbing subsequent tests.
+with_test_prefix "clear" {
+    gdb_test_no_output "python r.clear()"
+    gdb_test "python insn = r.instruction_history"
+    gdb_test_no_output "python i = insn\[0\]"
+    gdb_test "python print(i.size)" "$decimal"
+}
diff --git a/gdb/testsuite/gdb.python/python.exp b/gdb/testsuite/gdb.python/python.exp
index 175a6de..e8eb9ec 100644
--- a/gdb/testsuite/gdb.python/python.exp
+++ b/gdb/testsuite/gdb.python/python.exp
@@ -561,3 +561,12 @@ if { [use_gdb_stub] == 0 } {
 	}
     }
 }
+
+# Regression test for PR python/32163: several types were not
+# previously registered with the module, so could not be inspected
+# directly.
+foreach type {Instruction LazyString Membuf Record RecordFunctionSegment \
+		  RecordGap RecordInstruction TuiWindow} {
+    gdb_test "python print(type(gdb.$type))" "<class 'type'>" \
+	"gdb.$type is registered"
+}
diff --git a/gdb/testsuite/gdb.python/sys-exit.exp b/gdb/testsuite/gdb.python/sys-exit.exp
new file mode 100644
index 0000000..3396b8d
--- /dev/null
+++ b/gdb/testsuite/gdb.python/sys-exit.exp
@@ -0,0 +1,69 @@
+# Copyright 2024 Free Software Foundation, Inc.
+
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
+# Check that python sys.exit makes gdb exit, with the correct exit status.
+
+require allow_python_tests
+
+# Have this code in a proc avoids clashing with runtest variable exit_status.
+
+proc do_test { n {expected_exit_status ""} {msg ""}} {
+    if { $expected_exit_status == "" } {
+	set expected_exit_status $n
+    }
+
+    with_test_prefix $n {
+	clean_restart
+
+	# Regression test for PR python/31946.
+	set seen_message 0
+	gdb_test_multiple "python sys.exit ($n)" "python sys.exit" {
+	    -re "\r\n$msg\r\n" {
+		set seen_message 1
+		exp_continue
+	    }
+	    eof {
+		set wait_status [wait -i $::gdb_spawn_id]
+		clear_gdb_spawn_id
+
+		verbose -log "GDB process exited with wait status $wait_status"
+
+		set os_error [lindex $wait_status 2]
+		set exit_status [lindex $wait_status 3]
+
+		gdb_assert \
+		    { $os_error == 0 \
+			  && $exit_status == $expected_exit_status } \
+		    $gdb_test_name
+
+		if { $msg != "" } {
+		    gdb_assert { $seen_message }
+		}
+	    }
+	}
+    }
+}
+
+# Test sys.exit (<int>).
+do_test 0
+do_test 1
+do_test 2
+
+# Test sys.exit (None).
+do_test None 0
+
+# Test sys.exit (<string>).
+do_test {"Error Message"} 1 "Error Message"
+do_test {""} 1
diff --git a/gdb/testsuite/gdb.reverse/break-precsave.exp b/gdb/testsuite/gdb.reverse/break-precsave.exp
index b9d9468..6d9b312 100644
--- a/gdb/testsuite/gdb.reverse/break-precsave.exp
+++ b/gdb/testsuite/gdb.reverse/break-precsave.exp
@@ -73,7 +73,7 @@ proc precsave_tests {} {
 	-re ".*Breakpoint $decimal,.*$srcfile:$end_location.*$gdb_prompt $"  {
 	    pass "go to end of main forward"
 	}
-	-re "No more reverse-execution history.* end of main .*$gdb_prompt $" {
+	-re -wrap "Reached end of recorded.*Following forward.* end of main .*" {
 	    pass "go to end of main forward"
 	}
     }
@@ -87,7 +87,7 @@ proc precsave_tests {} {
 	-re ".*Breakpoint $decimal,.*$srcfile:$main_location.*$gdb_prompt $" {
 	    pass "main backward"
 	}
-	-re "No more reverse-execution history.* break in main .*$gdb_prompt $" {
+	-re -wrap "Reached end of recorded.*Backward execution.* break in main .*" {
 	    pass "main backward"
 	}
     }
@@ -103,7 +103,7 @@ proc precsave_tests {} {
 	-re ".*Breakpoint $decimal,.*$srcfile:$end_location.*$gdb_prompt $" {
 	    pass "end of record log"
 	}
-	-re "No more reverse-execution history.* end of main .*$gdb_prompt $" {
+	-re -wrap "Reached end of recorded.*Following forward.* end of main .*" {
 	    pass "end of record log"
 	}
     }
diff --git a/gdb/testsuite/gdb.reverse/break-reverse.exp b/gdb/testsuite/gdb.reverse/break-reverse.exp
index 1dd327c..66e9712 100644
--- a/gdb/testsuite/gdb.reverse/break-reverse.exp
+++ b/gdb/testsuite/gdb.reverse/break-reverse.exp
@@ -64,7 +64,7 @@ gdb_test_multiple "continue" "main backward" {
     -re ".*Breakpoint $decimal,.*$srcfile:$main_location.*$gdb_prompt $" {
 	pass "main backward"
     }
-    -re "No more reverse-execution history.* break in main .*$gdb_prompt $" {
+    -re -wrap "Reached end of recorded history.*Backward execution.*" {
 	pass "main backward"
     }
 }
@@ -80,7 +80,7 @@ gdb_test_multiple "continue" "end of record log" {
     -re ".*Breakpoint $decimal,.*$srcfile:$end_location.*$gdb_prompt $" {
 	pass "end of record log"
     }
-    -re "No more reverse-execution history.* end of main .*$gdb_prompt $" {
+    -re -wrap "Reached end of recorded history.*Following forward.*" {
 	pass "end of record log"
     }
 }
diff --git a/gdb/testsuite/gdb.reverse/func-map-to-same-line.exp b/gdb/testsuite/gdb.reverse/func-map-to-same-line.exp
index 9949907..8f933eb 100644
--- a/gdb/testsuite/gdb.reverse/func-map-to-same-line.exp
+++ b/gdb/testsuite/gdb.reverse/func-map-to-same-line.exp
@@ -37,7 +37,7 @@ proc run_tests {} {
 	gdb_test_no_output "record" "turn on process record"
 
 	# This regression test verifies the reverse-step and reverse-next
-	# commands work properly when executing backwards thru a source line
+	# commands work properly when executing backwards through a source line
 	# containing two function calls on the same source line, i.e.
 	# func1 (); func2 ();.  This test is compiled so the dwarf info
 	# does not contain the line table information.
@@ -100,7 +100,7 @@ proc run_tests {} {
 	#   the called function, stopping at the beginning of the last
 	#   statement in the called function (typically a return statement).
 	#   Also, as with the step command, if non-debuggable functions are
-	#   called, reverse-step will run thru them backward without
+	#   called, reverse-step will run through them backward without
 	#   stopping.
 
 	gdb_continue_to_breakpoint \
diff --git a/gdb/testsuite/gdb.reverse/machinestate-precsave.exp b/gdb/testsuite/gdb.reverse/machinestate-precsave.exp
index 19c5934..cedca0f 100644
--- a/gdb/testsuite/gdb.reverse/machinestate-precsave.exp
+++ b/gdb/testsuite/gdb.reverse/machinestate-precsave.exp
@@ -85,7 +85,7 @@ gdb_test_multiple "continue" "go to end of main forward" {
     -re ".*Breakpoint $decimal,.*$srcfile:$endmain.*$gdb_prompt $"  {
 	pass "go to end of main forward"
     }
-    -re "No more reverse-execution history.* end main .*$gdb_prompt $" {
+    -re -wrap "Reached end of recorded history.*Following forward.*" {
 	pass "go to end of main forward"
     }
 }
diff --git a/gdb/testsuite/gdb.reverse/ppc_record_test_isa_3_1.c b/gdb/testsuite/gdb.reverse/ppc_record_test_isa_3_1.c
index 290a584..2c0be65 100644
--- a/gdb/testsuite/gdb.reverse/ppc_record_test_isa_3_1.c
+++ b/gdb/testsuite/gdb.reverse/ppc_record_test_isa_3_1.c
@@ -28,7 +28,7 @@ main ()
      pmxvi4ger8*, pmxvi8ger4* pmxvi16ger2* instructions were officially changed
      to pmdmxbf16ger*, pmdmxvf32ger*, pmdmxvf64ger*, pmdmxvi4ger8*,
      pmdmxvi8ger4*, pmdmxvi16ger* respectively.  The old mnemonics are used in
-     this test for backward compatibity.   */
+     this test for backward compatibility.   */
   ra = 0xABCDEF012;
   rb = 0;
   rs = 0x012345678;
diff --git a/gdb/testsuite/gdb.reverse/sigall-precsave.exp b/gdb/testsuite/gdb.reverse/sigall-precsave.exp
index e5890ad..aab4551 100644
--- a/gdb/testsuite/gdb.reverse/sigall-precsave.exp
+++ b/gdb/testsuite/gdb.reverse/sigall-precsave.exp
@@ -128,7 +128,7 @@ proc test_one_sig_reverse {prevsig} {
 		xfail "$testmsg (handled)"
 	    }
 	}
-	-re "No more reverse-execution history.*kill.*$gdb_prompt " {
+	-re "Reached end of recorded history.*Backward execution.*kill.*$gdb_prompt " {
 	    if {$saw_signal} {
 		pass "$testmsg (handled)"
 	    } else {
diff --git a/gdb/testsuite/gdb.reverse/sigall-reverse.exp b/gdb/testsuite/gdb.reverse/sigall-reverse.exp
index f2cf55b..884b178 100644
--- a/gdb/testsuite/gdb.reverse/sigall-reverse.exp
+++ b/gdb/testsuite/gdb.reverse/sigall-reverse.exp
@@ -134,7 +134,7 @@ proc test_one_sig_reverse {prevsig} {
 		xfail "$testmsg (handled)"
 	    }
 	}
-	-re "No more reverse-execution history.*kill.*$gdb_prompt " {
+	-re "Reached end of recorded.*Backward execution.*kill.*$gdb_prompt " {
 	    if {$saw_signal} {
 		pass "$testmsg (handled)"
 	    } else {
diff --git a/gdb/testsuite/gdb.reverse/singlejmp-reverse.exp b/gdb/testsuite/gdb.reverse/singlejmp-reverse.exp
index 971d88b..7392356 100644
--- a/gdb/testsuite/gdb.reverse/singlejmp-reverse.exp
+++ b/gdb/testsuite/gdb.reverse/singlejmp-reverse.exp
@@ -50,11 +50,13 @@ gdb_test "next" {nodebug \(\);} "next to nodebug"
 gdb_test "next" {v = 3;} "next to v = 3"
 
 # FAIL was:
-# No more reverse-execution history.
+# Reached end of recorded history; stopping.
+# Backward execution from here not possible.
 # {
 gdb_test "reverse-step" {nodebug \(\);}
 
 # FAIL was:
-# No more reverse-execution history.
+# Reached end of recorded history; stopping.
+# Backward execution from here not possible.
 # {
 gdb_test "reverse-next" {f \(\);}
diff --git a/gdb/testsuite/gdb.reverse/step-precsave.exp b/gdb/testsuite/gdb.reverse/step-precsave.exp
index 9ae67b3..a3979b7 100644
--- a/gdb/testsuite/gdb.reverse/step-precsave.exp
+++ b/gdb/testsuite/gdb.reverse/step-precsave.exp
@@ -153,7 +153,7 @@ gdb_test_multiple "stepi" "$test_message" {
     }
 }
 
-# stepi thru return of a function call
+# stepi through return of a function call
 
 set test_message "stepi back from function call"
 gdb_test_multiple "stepi" "$test_message" {
@@ -185,10 +185,10 @@ gdb_test_multiple "stepi" "$test_message" {
 
 gdb_test_no_output "set exec-dir reverse" "set reverse execution"
 
-# stepi backward thru return and into a function
+# stepi backward through return and into a function
 
 set stepi_location  [gdb_get_line_number "ARRIVED IN CALLEE" "$srcfile"]
-set test_message "reverse stepi thru function return"
+set test_message "reverse stepi through function return"
 gdb_test_multiple "stepi" "$test_message" {
     -re "NEXTI TEST.*$gdb_prompt $" {
 	fail "$test_message (start statement)"
diff --git a/gdb/testsuite/gdb.reverse/step-reverse.exp b/gdb/testsuite/gdb.reverse/step-reverse.exp
index 2db73e9..a3c3b5a 100644
--- a/gdb/testsuite/gdb.reverse/step-reverse.exp
+++ b/gdb/testsuite/gdb.reverse/step-reverse.exp
@@ -114,7 +114,7 @@ gdb_test_multiple "stepi" "$test_message" {
     }
 }
 
-# stepi thru return of a function call
+# stepi through return of a function call
 
 set test_message "stepi back from function call"
 gdb_test_multiple "stepi" "$test_message" {
@@ -145,10 +145,10 @@ gdb_test_multiple "stepi" "$test_message" {
 # Set reverse execution direction
 gdb_test_no_output "set exec-dir reverse" "set reverse execution"
 
-# stepi backward thru return and into a function
+# stepi backward through return and into a function
 
 set stepi_location  [gdb_get_line_number "ARRIVED IN CALLEE" "$srcfile"]
-set test_message "reverse stepi thru function return"
+set test_message "reverse stepi through function return"
 gdb_test_multiple "stepi" "$test_message" {
     -re "NEXTI TEST.*$gdb_prompt $" {
 	fail "$test_message (start statement)"
diff --git a/gdb/testsuite/gdb.server/exit-multiple-threads.c b/gdb/testsuite/gdb.server/exit-multiple-threads.c
index 989f1f2..5bf0fc8 100644
--- a/gdb/testsuite/gdb.server/exit-multiple-threads.c
+++ b/gdb/testsuite/gdb.server/exit-multiple-threads.c
@@ -20,7 +20,6 @@
 #include <stdio.h>
 #include <unistd.h>
 #include <stdlib.h>
-#include <pthread.h>
 
 /* The number of threads to create.  */
 int thread_count = 3;
diff --git a/gdb/testsuite/gdb.server/server-pipe.exp b/gdb/testsuite/gdb.server/server-pipe.exp
index b369759..3d73c2e 100644
--- a/gdb/testsuite/gdb.server/server-pipe.exp
+++ b/gdb/testsuite/gdb.server/server-pipe.exp
@@ -49,11 +49,12 @@ if {[build_executable "failed to prepare" $testfile $srcfile debug]} {
 # or "extended-remote".  Check the output of 'info connections', and
 # the contents of the gdb.TargetConnection.details string.
 proc do_test { target } {
+    global timeout
     clean_restart ${::binfile}
 
     # Make sure we're disconnected, in case we're testing with an
     # extended-remote board, therefore already connected.
-    gdb_test "disconnect" ".*"
+    gdb_test "disconnect" ".*" "disconnect before running the test"
 
     gdb_test "target ${target} | ${::gdbserver} - ${::binfile}" ".*" \
 	"start gdbserver using pipe syntax"
@@ -68,6 +69,16 @@ proc do_test { target } {
 	gdb_test_no_output "python conn = gdb.selected_inferior().connection"
 	gdb_test "python print(conn.details)" "\| ${::gdbserver} - ${::binfile}"
     }
+
+    # Make sure GDB server doesn't attempt to reconnect with a closed STDIN.
+    # Here we set the timeout to a short value to see if GDB will hang in an
+    # attempt to reconnect with the now closed STDIN. For this test to be
+    # useful the new temporary timeout MUST be shorter than PIPE_CLOSE_TIMEOUT
+    # defined in gdb/ser-pipe.c (5 seconds at the time of writing).
+    set prev_timeout $timeout
+    set timeout 2
+    gdb_test "disconnect" ".*" "disconnect and test for hang"
+    set timeout $prev_timeout
 }
 
 save_vars { GDBFLAGS } {
diff --git a/gdb/testsuite/gdb.server/server-run.exp b/gdb/testsuite/gdb.server/server-run.exp
index 92eb38b..af5a5f5 100644
--- a/gdb/testsuite/gdb.server/server-run.exp
+++ b/gdb/testsuite/gdb.server/server-run.exp
@@ -52,3 +52,36 @@ if { [istarget *-*-linux*] } {
 
 gdb_breakpoint main
 gdb_test "continue" "Breakpoint.* main .*" "continue to main"
+
+if { [istarget "aarch64*-*-*"]
+     || [istarget "arm*-*-*"]
+     || [istarget "csky*-*-*"]
+     || [istarget "loongarch*-*-*"]
+     || [istarget "riscv*-*-*"] } {
+    set pc_regname "pc"
+} elseif { [is_amd64_regs_target] } {
+    set pc_regname "rip"
+} elseif { [is_x86_like_target] } {
+    set pc_regname "eip"
+} elseif { [istarget "tic6x-*-*"] } {
+    set pc_regname "PC"
+}
+
+# Sending the PC register in advance is good practice.  Test that this is
+# actually done for the targets where gdbserver is supposed to.
+set expedited_pc_test_name "send PC as expedited register in stop reply"
+if { [info exists pc_regname] } {
+    set seen_line false
+    gdb_test_multiple "maintenance print remote-registers" \
+	     $expedited_pc_test_name -lbl {
+	-re " ${pc_regname}\[\[:space:\]\]+${decimal}.*${decimal}  yes" {
+	    set seen_line true
+	    exp_continue
+	}
+	-re "\r\n$gdb_prompt $" {
+	    gdb_assert { $seen_line } $gdb_test_name
+	}
+    }
+} else {
+    untested $expedited_pc_test_name
+}
diff --git a/gdb/testsuite/gdb.testsuite/parse_options_args.exp b/gdb/testsuite/gdb.testsuite/parse_options_args.exp
index 19ad67a..7239ef7 100644
--- a/gdb/testsuite/gdb.testsuite/parse_options_args.exp
+++ b/gdb/testsuite/gdb.testsuite/parse_options_args.exp
@@ -38,7 +38,7 @@ with_test_prefix parse_options {
 
 with_test_prefix parse_args {
     proc test2 { args } {
-	parse_args {
+	parse_some_args {
 	    { opt1 defval1 }
 	    { opt2 defval2 }
 	    { opt3 }
diff --git a/gdb/testsuite/gdb.threads/create-fail.c b/gdb/testsuite/gdb.threads/create-fail.c
index 01633e4..e4cd27e 100644
--- a/gdb/testsuite/gdb.threads/create-fail.c
+++ b/gdb/testsuite/gdb.threads/create-fail.c
@@ -23,10 +23,8 @@
 #include <errno.h>
 #include <string.h>
 #include <assert.h>
-#include <stdio.h>
 #include <sys/types.h>
 #include <dirent.h>
-#include <assert.h>
 #include <unistd.h>
 
 /* Count the number of tasks/threads in the PID thread group.  */
diff --git a/gdb/testsuite/gdb.threads/del-pending-thread-bp-lib.c b/gdb/testsuite/gdb.threads/del-pending-thread-bp-lib.c
new file mode 100644
index 0000000..15d1b98
--- /dev/null
+++ b/gdb/testsuite/gdb.threads/del-pending-thread-bp-lib.c
@@ -0,0 +1,22 @@
+/* Copyright 2023 Free Software Foundation, Inc.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
+
+int global_var = 0;
+
+void
+foo (int arg)
+{
+  global_var = arg;
+}
diff --git a/gdb/testsuite/gdb.threads/del-pending-thread-bp.c b/gdb/testsuite/gdb.threads/del-pending-thread-bp.c
new file mode 100644
index 0000000..6fc76db
--- /dev/null
+++ b/gdb/testsuite/gdb.threads/del-pending-thread-bp.c
@@ -0,0 +1,85 @@
+/* Copyright 2023 Free Software Foundation, Inc.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
+
+#include <dlfcn.h>
+#include <pthread.h>
+#include <stdlib.h>
+
+pthread_barrier_t barrier;
+
+static void
+barrier_wait (pthread_barrier_t *b)
+{
+  int res = pthread_barrier_wait (b);
+  if (res != 0 && res != PTHREAD_BARRIER_SERIAL_THREAD)
+    abort ();
+}
+
+static void *
+thread_worker (void *arg)
+{
+  barrier_wait (&barrier);
+  return NULL;
+}
+
+void
+breakpt (void)
+{
+  /* Nothing.  */
+}
+
+int
+main (void)
+{
+  void *handle;
+  void (*func)(int);
+  pthread_t thread;
+
+  if (pthread_barrier_init (&barrier, NULL, 2) != 0)
+    abort ();
+
+  if (pthread_create (&thread, NULL, thread_worker, NULL) != 0)
+    abort ();
+
+  breakpt ();
+
+  /* Allow the worker thread to complete.  */
+  barrier_wait (&barrier);
+
+  if (pthread_join (thread, NULL) != 0)
+    abort ();
+
+  breakpt ();
+
+  /* Now load the shared library.  */
+  handle = dlopen (SHLIB_NAME, RTLD_LAZY);
+  if (handle == NULL)
+    abort ();
+
+  /* Find the function symbol.  */
+  func = (void (*)(int)) dlsym (handle, "foo");
+
+  /* Call the library function.  */
+  func (1);
+
+  /* Unload the shared library.  */
+  if (dlclose (handle) != 0)
+    abort ();
+
+  breakpt ();
+
+  return 0;
+}
+
diff --git a/gdb/testsuite/gdb.threads/del-pending-thread-bp.exp b/gdb/testsuite/gdb.threads/del-pending-thread-bp.exp
new file mode 100644
index 0000000..14a91a4
--- /dev/null
+++ b/gdb/testsuite/gdb.threads/del-pending-thread-bp.exp
@@ -0,0 +1,98 @@
+# Copyright 2023 Free Software Foundation, Inc.
+
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
+# This test checks that pending thread-specific breakpoints are
+# correctly deleted when the thread the breakpoint is for goes out of
+# scope.
+#
+# We also check that we can't create a pending thread-specific
+# breakpoint for a non-existent thread.
+
+require allow_shlib_tests
+
+standard_testfile
+
+set libname $testfile-lib
+set srcfile_lib $srcdir/$subdir/$libname.c
+set binfile_lib [standard_output_file $libname.so]
+
+if { [gdb_compile_shlib $srcfile_lib $binfile_lib {}] != "" } {
+    untested "failed to compile shared library 1"
+    return -1
+}
+
+set binfile_lib_target [gdb_download_shlib $binfile_lib]
+
+if { [prepare_for_testing "failed to prepare" $testfile $srcfile \
+	  [list debug \
+	       additional_flags=-DSHLIB_NAME=\"$binfile_lib_target\" \
+	       shlib_load pthreads]] } {
+    return -1
+}
+
+gdb_locate_shlib $binfile_lib
+
+if ![runto_main] {
+    return 0
+}
+
+# Run until we have two threads.
+gdb_breakpoint "breakpt"
+gdb_continue_to_breakpoint "first breakpt call"
+
+# Confirm that we have a thread '2'.
+gdb_test "info threads" "\r\n\\s+2\\s+\[^\r\n\]+"
+
+# Create a pending, thread-specific, breakpoint on 'foo'.
+gdb_breakpoint "foo thread 2" allow-pending
+set bpnum [get_integer_valueof "\$bpnum" "*INVALID*" \
+	       "get breakpoint number"]
+
+# Check we can't create a pending thread-specific breakpoint for a
+# non-existent thread.
+gdb_test "with breakpoint pending on -- break foo thread 99" \
+    "Unknown thread 99\\."
+
+# Continue to 'breakpt' again.  Don't use gdb_continue_to_breakpoint
+# as we are looking for the thread exited and breakpoint deleted
+# messages.
+gdb_test "continue" \
+    [multi_line \
+	 "Continuing\\." \
+	 "\\\[Thread \[^\r\n\]+ exited\\\]" \
+	 "Thread-specific breakpoint $bpnum deleted - thread 2 no longer in the thread list\\." \
+	 "" \
+	 "Thread 1 \[^\r\n\]+, breakpt \\(\\) at \[^\r\n\]+" \
+	 "$decimal\\s+\[^\r\n\]+"] \
+    "second breakpt call"
+
+# Confirm breakpoint has been deleted.
+gdb_test "info breakpoints $bpnum" \
+    "No breakpoint, watchpoint, tracepoint, or catchpoint matching '$bpnum'\\."
+
+# Continue again.  This will pass through 'foo'.  We should not stop
+# in 'foo', the breakpoint has been deleted.  We should next stop in
+# breakpt again.
+gdb_test "continue" \
+    [multi_line \
+	 "Continuing\\." \
+	 "" \
+	 "Thread 1 \[^\r\n\]+ hit Breakpoint $decimal, breakpt \\(\\) at \[^\r\n\]+" \
+	 "$decimal\\s+\[^\r\n\]+"] \
+    "third breakpt call"
+gdb_test "bt 1" \
+    [multi_line \
+	 "#0\\s+breakpt \\(\\) at \[^\r\n\]+" \
+	 "\\(More stack frames follow\\.\\.\\.\\)"]
diff --git a/gdb/testsuite/gdb.threads/fork-thread-pending.c b/gdb/testsuite/gdb.threads/fork-thread-pending.c
index 01dcc40..a9b557a 100644
--- a/gdb/testsuite/gdb.threads/fork-thread-pending.c
+++ b/gdb/testsuite/gdb.threads/fork-thread-pending.c
@@ -21,7 +21,6 @@
 #include <stdio.h>
 #include <stdlib.h>
 #include <errno.h>
-#include <unistd.h>
 #include <sys/types.h>
 #include <sys/wait.h>
 
diff --git a/gdb/testsuite/gdb.threads/interrupt-while-step-over.exp b/gdb/testsuite/gdb.threads/interrupt-while-step-over.exp
index bb05754..89c1d06 100644
--- a/gdb/testsuite/gdb.threads/interrupt-while-step-over.exp
+++ b/gdb/testsuite/gdb.threads/interrupt-while-step-over.exp
@@ -67,7 +67,7 @@ proc return_if_nonzero { result } {
     }
 }
 
-# Do one iteration of "c -a& -> interrupt -a".  Return zero on sucess,
+# Do one iteration of "c -a& -> interrupt -a".  Return zero on success,
 # and non-zero if some test fails.
 
 proc test_one_iteration {} {
diff --git a/gdb/testsuite/gdb.threads/signal-command-handle-nopass.c b/gdb/testsuite/gdb.threads/signal-command-handle-nopass.c
index 6d82bd6..548d0d3 100644
--- a/gdb/testsuite/gdb.threads/signal-command-handle-nopass.c
+++ b/gdb/testsuite/gdb.threads/signal-command-handle-nopass.c
@@ -21,6 +21,8 @@
 #include <pthread.h>
 #include <signal.h>
 
+static pthread_barrier_t barrier;
+
 void
 handler (int sig)
 {
@@ -35,6 +37,13 @@ thread_function (void *arg)
     usleep (1);
 }
 
+void *
+thread_function_sync (void *arg)
+{
+  pthread_barrier_wait (&barrier);
+  return thread_function (arg);
+}
+
 int
 main (void)
 {
@@ -42,7 +51,15 @@ main (void)
   int i;
 
   signal (SIGUSR1, handler);
-  pthread_create (&child_thread, NULL, thread_function, NULL);
+
+  pthread_barrier_init (&barrier, NULL, 2);
+
+  pthread_create (&child_thread, NULL, thread_function_sync, NULL);
+
+  /* Make sure that pthread_create is done once the breakpoint on
+     thread_function triggers.  */
+  pthread_barrier_wait (&barrier);
+
   pthread_join (child_thread, NULL);
 
   return 0;
diff --git a/gdb/testsuite/gdb.threads/signal-sigtrap.c b/gdb/testsuite/gdb.threads/signal-sigtrap.c
index 24625ba..7c903a1 100644
--- a/gdb/testsuite/gdb.threads/signal-sigtrap.c
+++ b/gdb/testsuite/gdb.threads/signal-sigtrap.c
@@ -20,6 +20,8 @@
 #include <pthread.h>
 #include <signal.h>
 
+static pthread_barrier_t barrier;
+
 void
 sigtrap_handler (int sig)
 {
@@ -31,6 +33,13 @@ thread_function (void *arg)
   return NULL;
 }
 
+void *
+thread_function_sync (void *arg)
+{
+  pthread_barrier_wait (&barrier);
+  return thread_function (arg);
+}
+
 int
 main (void)
 {
@@ -38,7 +47,13 @@ main (void)
 
   signal (SIGTRAP, sigtrap_handler);
 
-  pthread_create (&child_thread, NULL, thread_function, NULL);
+  pthread_barrier_init (&barrier, NULL, 2);
+
+  pthread_create (&child_thread, NULL, thread_function_sync, NULL);
+
+  /* Make sure that pthread_create is done once the breakpoint on
+     thread_function triggers.  */
+  pthread_barrier_wait (&barrier);
 
   pthread_join (child_thread, NULL);
 
diff --git a/gdb/testsuite/gdb.threads/stepi-over-clone.exp b/gdb/testsuite/gdb.threads/stepi-over-clone.exp
index da8bbf6..b93cfe6 100644
--- a/gdb/testsuite/gdb.threads/stepi-over-clone.exp
+++ b/gdb/testsuite/gdb.threads/stepi-over-clone.exp
@@ -50,7 +50,7 @@ gdb_test_multiple "catch syscall group:process" "catch process syscalls" {
 
 set re_loc1 "$hex in (__)?clone\[23\]? \\(\\)"
 set re_loc2 "$decimal\[ \t\]+in \[^\r\n\]+"
-set re_loc3 "clone\[23\]? \\(\\) at \[^:\]+:$decimal"
+set re_loc3 "(__)?clone\[23\]? \\(\\) at \[^:\]+:$decimal"
 
 gdb_test "continue" \
     "Catchpoint $decimal \\(call to syscall clone\[23\]?\\), ($re_loc1|$re_loc3).*"
diff --git a/gdb/testsuite/gdb.threads/thread-bp-deleted.exp b/gdb/testsuite/gdb.threads/thread-bp-deleted.exp
index 5d15a29..3851f8f 100644
--- a/gdb/testsuite/gdb.threads/thread-bp-deleted.exp
+++ b/gdb/testsuite/gdb.threads/thread-bp-deleted.exp
@@ -124,7 +124,7 @@ if {$is_remote} {
     #
     # However, we might be too quick sending the 'info threads 99' command,
     # so, if we see the output of that command without any thread exited
-    # text, we wait for a short while and try again.  We wait for upto 5
+    # text, we wait for a short while and try again.  We wait for up to 5
     # seconds (5 tries).  However, this might mean on a _really_ slow
     # machine that the thread still hasn't exited.  I guess if we start
     # seeing that then we can just update ATTEMPT_COUNT below.
diff --git a/gdb/testsuite/gdb.threads/thread_check.exp b/gdb/testsuite/gdb.threads/thread_check.exp
index 83fa86d..658f15e 100644
--- a/gdb/testsuite/gdb.threads/thread_check.exp
+++ b/gdb/testsuite/gdb.threads/thread_check.exp
@@ -47,7 +47,7 @@ if {![runto_main]} {
 
 
 #
-# set breakpoint at thread fucntion tf
+# set breakpoint at thread function tf
 #
 gdb_test "break tf" \
     "Breakpoint.*at.* file .*$srcfile, line.*" \
diff --git a/gdb/testsuite/gdb.threads/tls-sepdebug.exp b/gdb/testsuite/gdb.threads/tls-sepdebug.exp
index 14a0c45..4a322e0 100644
--- a/gdb/testsuite/gdb.threads/tls-sepdebug.exp
+++ b/gdb/testsuite/gdb.threads/tls-sepdebug.exp
@@ -65,16 +65,21 @@ if  { [gdb_compile_pthreads \
 }
 
 set absdir [file dirname [standard_output_file ${binsharedbase}]]
+if { [info exists ::env(LD_LIBRARY_PATH)] } {
+    set ld_library_path $::env(LD_LIBRARY_PATH)
+} else {
+    set ld_library_path ""
+}
 
-foreach ld_library_path [list $absdir [relative_filename [pwd] $absdir]] \
+foreach library_path [list $absdir [relative_filename [pwd] $absdir]] \
 	name { absolute relative } {
     with_test_prefix $name {
 
 	# Restart, but defer loading until after setting LD_LIBRARY_PATH.
 	clean_restart
-
-	gdb_test_no_output "set env LD_LIBRARY_PATH=$ld_library_path" \
-			   "set env LD_LIBRARY_PATH"
+	gdb_test_no_output \
+	    "set env LD_LIBRARY_PATH=$ld_library_path:$library_path" \
+	    "set env LD_LIBRARY_PATH"
 
 	gdb_load ${binmainfile}
 
diff --git a/gdb/testsuite/gdb.threads/watchpoint-fork-mt.c b/gdb/testsuite/gdb.threads/watchpoint-fork-mt.c
index b74a841..eb65d45 100644
--- a/gdb/testsuite/gdb.threads/watchpoint-fork-mt.c
+++ b/gdb/testsuite/gdb.threads/watchpoint-fork-mt.c
@@ -27,7 +27,6 @@
 #include <pthread.h>
 
 #include <asm/unistd.h>
-#include <unistd.h>
 #define gettid() syscall (__NR_gettid)
 
 /* Non-atomic `var++' should not hurt as we synchronize the threads by the STEP
diff --git a/gdb/testsuite/gdb.trace/basic-libipa.exp b/gdb/testsuite/gdb.trace/basic-libipa.exp
index e28f61e..c49192a 100644
--- a/gdb/testsuite/gdb.trace/basic-libipa.exp
+++ b/gdb/testsuite/gdb.trace/basic-libipa.exp
@@ -25,13 +25,9 @@ require allow_shlib_tests
 
 standard_testfile
 
+require allow_in_proc_agent
 set libipa [get_in_proc_agent]
 
-if { ![file exists $libipa] } {
-    unsupported "missing libinproctrace.so"
-    return -1
-}
-
 gdb_download_shlib $libipa
 
 if { [prepare_for_testing "failed to prepare" $testfile $srcfile \
diff --git a/gdb/testsuite/gdb.trace/change-loc.exp b/gdb/testsuite/gdb.trace/change-loc.exp
index fb55153..1316d92 100644
--- a/gdb/testsuite/gdb.trace/change-loc.exp
+++ b/gdb/testsuite/gdb.trace/change-loc.exp
@@ -346,6 +346,7 @@ tracepoint_change_loc_2 "trace"
 tracepoint_install_in_trace_disabled "trace"
 
 # Re-compile test case with IPA.
+require allow_in_proc_agent
 set libipa [get_in_proc_agent]
 gdb_load_shlib $libipa
 
diff --git a/gdb/testsuite/gdb.trace/collection.exp b/gdb/testsuite/gdb.trace/collection.exp
index b7d0f9f..9c6d3f5 100644
--- a/gdb/testsuite/gdb.trace/collection.exp
+++ b/gdb/testsuite/gdb.trace/collection.exp
@@ -161,7 +161,7 @@ proc gdb_collect_args_test { myargs msg } {
 	# collected.  In C, an array as function parameters is a special
 	# case; it's just a pointer into the caller's array, and as such,
 	# that's what normally the debug info describes.  Maybe this was
-	# originaly written for a compiler where array parameters were
+	# originally written for a compiler where array parameters were
 	# really described as arrays in debug info.
 
 	setup_xfail "*-*-*"
@@ -250,7 +250,7 @@ proc gdb_collect_argarray_test { myargs msg } {
 	# are collected.  In C, an array as function parameters is a
 	# special case; it's just a pointer into the caller's array,
 	# and as such, that's what normally the debug info describes.
-	# Maybe this was originaly written for a compiler where array
+	# Maybe this was originally written for a compiler where array
 	# parameters were really described as arrays in debug info.
 
 	setup_xfail "*-*-*"
diff --git a/gdb/testsuite/gdb.trace/entry-values.exp b/gdb/testsuite/gdb.trace/entry-values.exp
index 3b358cc..82ae5a8 100644
--- a/gdb/testsuite/gdb.trace/entry-values.exp
+++ b/gdb/testsuite/gdb.trace/entry-values.exp
@@ -53,6 +53,8 @@ if { [istarget "arm*-*-*"] || [istarget "aarch64*-*-*"] } {
     # returns.  The only exception is JALRC, in which case execution
     # resumes from `insn1' instead.
     set call_insn {jalrc|[jb]al[sxr]*[ \t][^\r\n]+\r\n}
+} elseif { [istarget "riscv64*-*-*"] } {
+    set call_insn jal
 } else {
     set call_insn "call"
 }
diff --git a/gdb/testsuite/gdb.trace/ftrace-lock.exp b/gdb/testsuite/gdb.trace/ftrace-lock.exp
index ce2b890..637d5eb 100644
--- a/gdb/testsuite/gdb.trace/ftrace-lock.exp
+++ b/gdb/testsuite/gdb.trace/ftrace-lock.exp
@@ -48,6 +48,7 @@ with_test_prefix "runtime trace support check" {
 }
 
 # Compile the test case with the in-process agent library.
+require allow_in_proc_agent
 set libipa [get_in_proc_agent]
 set remote_libipa [gdb_load_shlib $libipa]
 
diff --git a/gdb/testsuite/gdb.trace/ftrace.exp b/gdb/testsuite/gdb.trace/ftrace.exp
index 9b100ce..408cd37 100644
--- a/gdb/testsuite/gdb.trace/ftrace.exp
+++ b/gdb/testsuite/gdb.trace/ftrace.exp
@@ -39,6 +39,7 @@ if ![gdb_target_supports_trace] {
     return -1
 }
 
+require allow_in_proc_agent
 set libipa [get_in_proc_agent]
 set remote_libipa [gdb_load_shlib $libipa]
 
diff --git a/gdb/testsuite/gdb.trace/mi-tracepoint-changed.exp b/gdb/testsuite/gdb.trace/mi-tracepoint-changed.exp
index e6672db..dee7142 100644
--- a/gdb/testsuite/gdb.trace/mi-tracepoint-changed.exp
+++ b/gdb/testsuite/gdb.trace/mi-tracepoint-changed.exp
@@ -148,7 +148,7 @@ proc test_reconnect { } {
     }
 }
 
-# Test 'breakpoint-modified' notification is emited when pending tracepoints are
+# Test 'breakpoint-modified' notification is emitted when pending tracepoints are
 # resolved.
 
 proc test_pending_resolved { } {
diff --git a/gdb/testsuite/gdb.trace/pending.exp b/gdb/testsuite/gdb.trace/pending.exp
index b836be0..66209ad 100644
--- a/gdb/testsuite/gdb.trace/pending.exp
+++ b/gdb/testsuite/gdb.trace/pending.exp
@@ -494,6 +494,7 @@ pending_tracepoint_with_action_resolved "trace"
 pending_tracepoint_installed_during_trace "trace"
 
 # Re-compile test case with IPA.
+require allow_in_proc_agent
 set libipa [get_in_proc_agent]
 gdb_load_shlib $libipa
 
diff --git a/gdb/testsuite/gdb.trace/range-stepping.exp b/gdb/testsuite/gdb.trace/range-stepping.exp
index e3af2e5..373a0bf 100644
--- a/gdb/testsuite/gdb.trace/range-stepping.exp
+++ b/gdb/testsuite/gdb.trace/range-stepping.exp
@@ -67,6 +67,7 @@ range_stepping_with_tracepoint "trace"
 
 require allow_shlib_tests
 
+require allow_in_proc_agent
 set libipa [get_in_proc_agent]
 set remote_libipa [gdb_load_shlib $libipa]
 
diff --git a/gdb/testsuite/gdb.trace/strace.exp b/gdb/testsuite/gdb.trace/strace.exp
index 99b199e..ef243a4 100644
--- a/gdb/testsuite/gdb.trace/strace.exp
+++ b/gdb/testsuite/gdb.trace/strace.exp
@@ -19,6 +19,7 @@ require allow_shlib_tests
 standard_testfile
 set executable $testfile
 
+require allow_in_proc_agent
 set libipa [get_in_proc_agent]
 
 set lib_opts debug
diff --git a/gdb/testsuite/gdb.trace/tfind.exp b/gdb/testsuite/gdb.trace/tfind.exp
index 9d1f6e3..c6ac80b 100644
--- a/gdb/testsuite/gdb.trace/tfind.exp
+++ b/gdb/testsuite/gdb.trace/tfind.exp
@@ -342,10 +342,10 @@ gdb_test "disassemble gdb_c_test" \
     "8.36: trace disassembly"
 
 gdb_test "tfind line 0" \
-	"out of range.*|failed to find.*|No line 0 in .*" \
+	"out of range.*|failed to find.*|No compiled code for line 0 in .*" \
 	"8.18: tfind line 0"
 gdb_test "tfind line 32767" \
-	"out of range.*|failed to find.*|No line 32767 in .*" \
+	"out of range.*|failed to find.*|No compiled code for line 32767 in .*" \
 	"8.27: tfind line 32767"
 gdb_test "tfind line NoSuChFiLe.c:$baseline" \
 	"No source file named.*" \
diff --git a/gdb/testsuite/gdb.trace/trace-break.exp b/gdb/testsuite/gdb.trace/trace-break.exp
index 7e5820c..cac4aa5 100644
--- a/gdb/testsuite/gdb.trace/trace-break.exp
+++ b/gdb/testsuite/gdb.trace/trace-break.exp
@@ -344,6 +344,7 @@ break_trace_same_addr_6 "trace" "disable" "trace" "enable"
 
 require allow_shlib_tests
 
+require allow_in_proc_agent
 set libipa [get_in_proc_agent]
 set remote_libipa [gdb_load_shlib $libipa]
 
diff --git a/gdb/testsuite/gdb.trace/trace-condition.exp b/gdb/testsuite/gdb.trace/trace-condition.exp
index 42453bc..17acda8 100644
--- a/gdb/testsuite/gdb.trace/trace-condition.exp
+++ b/gdb/testsuite/gdb.trace/trace-condition.exp
@@ -39,6 +39,7 @@ if ![gdb_target_supports_trace] {
     return -1
 }
 
+require allow_in_proc_agent
 set libipa [get_in_proc_agent]
 set remote_libipa [gdb_load_shlib $libipa]
 
diff --git a/gdb/testsuite/gdb.trace/trace-enable-disable.exp b/gdb/testsuite/gdb.trace/trace-enable-disable.exp
index 280f2e4..c2c8381 100644
--- a/gdb/testsuite/gdb.trace/trace-enable-disable.exp
+++ b/gdb/testsuite/gdb.trace/trace-enable-disable.exp
@@ -42,6 +42,7 @@ if ![gdb_target_supports_trace] {
 }
 
 # Compile the test case with the in-process agent library.
+require allow_in_proc_agent
 set libipa [get_in_proc_agent]
 gdb_load_shlib $libipa
 
diff --git a/gdb/testsuite/gdb.trace/trace-mt.exp b/gdb/testsuite/gdb.trace/trace-mt.exp
index e56064b..7246ddc 100644
--- a/gdb/testsuite/gdb.trace/trace-mt.exp
+++ b/gdb/testsuite/gdb.trace/trace-mt.exp
@@ -103,6 +103,7 @@ step_over_tracepoint $binfile "trace"
 
 require allow_shlib_tests
 
+require allow_in_proc_agent
 set libipa [get_in_proc_agent]
 set remote_libipa [gdb_load_shlib $libipa]
 
diff --git a/gdb/testsuite/gdb.trace/tracecmd.exp b/gdb/testsuite/gdb.trace/tracecmd.exp
index 96596ea..688980c 100644
--- a/gdb/testsuite/gdb.trace/tracecmd.exp
+++ b/gdb/testsuite/gdb.trace/tracecmd.exp
@@ -64,7 +64,8 @@ gdb_test "info trace" "in gdb_recursion_test.*$srcfile:$testline2.
 # 1.2 trace invalid source line
 gdb_delete_tracepoints
 gdb_test_no_output "set breakpoint pending off"
-gdb_test "trace $srcfile:99999" "No line 99999 in file \".*$srcfile\"." \
+gdb_test "trace $srcfile:99999" \
+	"No compiled code for line 99999 in file \".*$srcfile\"\\." \
 	"1.2a: trace invalid line in sourcefile"
 gdb_test "info trace" "No tracepoints.*" \
 	"1.2b: reject invalid line in srcfile"
diff --git a/gdb/testsuite/gdb.trace/tspeed.exp b/gdb/testsuite/gdb.trace/tspeed.exp
index 7ade5c2..c74680b 100644
--- a/gdb/testsuite/gdb.trace/tspeed.exp
+++ b/gdb/testsuite/gdb.trace/tspeed.exp
@@ -43,6 +43,7 @@ if ![gdb_target_supports_trace] {
 }
 
 # Compile the test case with the in-process agent library.
+require allow_in_proc_agent
 set ipalib [get_in_proc_agent]
 
 if { [gdb_compile "$srcdir/$subdir/$srcfile" $binfile \
diff --git a/gdb/testsuite/gdb.tui/info-win.exp b/gdb/testsuite/gdb.tui/info-win.exp
index 36c7815..4d71f04 100644
--- a/gdb/testsuite/gdb.tui/info-win.exp
+++ b/gdb/testsuite/gdb.tui/info-win.exp
@@ -40,7 +40,7 @@ Term::command "layout h"
 Term::command "winheight cmd + 3"
 
 # As the tuiterm.exp library just waits for the prompt and command to
-# be echo'ed bcak to the screen, multiple 'info win' calls like this
+# be echo'ed back to the screen, multiple 'info win' calls like this
 # have a problem.  Dejagnu will send the command to gdb, but will then
 # immediately see the '(gdb) info win' output from the first use
 # above.  This means we end up rushing ahead, and some tests might
diff --git a/gdb/testsuite/gdb.tui/wrap-line.exp b/gdb/testsuite/gdb.tui/wrap-line.exp
index 9cddcf1..d3020bf 100644
--- a/gdb/testsuite/gdb.tui/wrap-line.exp
+++ b/gdb/testsuite/gdb.tui/wrap-line.exp
@@ -50,7 +50,7 @@ proc fill_line { width } {
 }
 
 # Test wrapping.
-proc test_wrap { wrap_width } {
+proc test_wrap { wrap_width tui } {
     # Generate a prompt and parse it.
     send_gdb "\003"
     gdb_assert { [Term::wait_for "(^|$::gdb_prompt )$::re_control_c"] } "start line"
@@ -65,12 +65,31 @@ proc test_wrap { wrap_width } {
     send_gdb "W"
 
     # Check that the wrap occurred at the expected location.
-    gdb_assert { [Term::wait_for_region_contents 0 0 $::cols $::lines \
-		      "$::gdb_prompt $str$space\r\nW"] } "wrap"
+    set re_wrap \
+	[multi_line \
+	     "$::gdb_prompt $str$space" \
+	     "W"]
+    set re_no_wrap \
+	[multi_line \
+	     "" \
+	     "<.*W"]
+    if { $tui } {
+	set re $re_wrap
+    } else {
+	set re ($re_wrap|$re_no_wrap)
+    }
+    gdb_assert { [Term::wait_for_region_contents 0 0 $::cols $::lines $re] } "wrap"
 
     # Generate a prompt and parse it.
     send_gdb "\003"
-    gdb_assert { [Term::wait_for "^W$::re_control_c"] } "prompt after wrap"
+    set re_wrap W$::re_control_c
+    set re_no_wrap <.*W$::re_control_c
+    if { $tui } {
+	set re $re_wrap
+    } else {
+	set re ($re_wrap|$re_no_wrap)
+    }
+    gdb_assert { [Term::wait_for ^$re] } "prompt after wrap"
 }
 
 # Test wrapping in both CLI and TUI.
@@ -107,7 +126,7 @@ proc test_wrap_cli_tui { auto_detected_width } {
     with_test_prefix cli {
 	set wrap_width $readline_width
 
-	test_wrap $wrap_width
+	test_wrap $wrap_width 0
     }
 
     with_test_prefix tui {
@@ -126,7 +145,7 @@ proc test_wrap_cli_tui { auto_detected_width } {
 	# for wrapping from curses.
 	set wrap_width $::cols
 
-	test_wrap $wrap_width
+	test_wrap $wrap_width 1
     }
 }
 
diff --git a/gdb/testsuite/gdb.xml/tdesc-regs.exp b/gdb/testsuite/gdb.xml/tdesc-regs.exp
index 7c8b0b8..344e387 100644
--- a/gdb/testsuite/gdb.xml/tdesc-regs.exp
+++ b/gdb/testsuite/gdb.xml/tdesc-regs.exp
@@ -80,21 +80,38 @@ switch -glob -- [istarget] {
 	set regdir "i386/"
         set core-regs {64bit-core.xml 64bit-sse.xml}
     }
+    "riscv64*-*-*" {
+       set architecture "riscv:rv64"
+       set regdir "riscv/"
+       set core-regs 64bit-cpu.xml
+    }
 }
 
-# If no core registers were specified, assume this target does not
-# support target-defined registers.  Verify that we get a warning if
-# we try to use them.  This not only tests the warning, but also
-# reminds maintainers to add test support when they add the feature.
-
 set single_reg_xml [gdb_remote_download host  \
 			"$srcdir/$subdir/single-reg.xml"]
 
 if {[string equal ${core-regs} ""]} {
-    gdb_test "set tdesc file $single_reg_xml" \
-	"warning: Target-supplied registers are not supported.*" \
-	"set tdesc file single-reg.xml"
-    unsupported "register tests"
+    set test "set tdesc file single-reg.xml"
+    set feature_unsupported 0
+    set feature_test_unsupported 0
+    gdb_test_multiple "set tdesc file $single_reg_xml" $test {
+	-re -wrap "warning: Target-supplied registers are not supported" {
+	    set feature_unsupported 1
+	    pass $gdb_test_name
+	}
+	-re -wrap "warning: Architecture rejected target-supplied description" {
+	    set feature_test_unsupported 1
+	    pass $gdb_test_name
+	}
+    }
+
+    if { $feature_unsupported } {
+	unsupported "register tests"
+    } elseif { $feature_test_unsupported } {
+	# Remind maintainers to add test support.
+	unsupported "register tests (missing architecture-specific core-regs setting)"
+    }
+
     return 0
 }
 
diff --git a/gdb/testsuite/lib/ada.exp b/gdb/testsuite/lib/ada.exp
index 1bc0dc1..0544544 100644
--- a/gdb/testsuite/lib/ada.exp
+++ b/gdb/testsuite/lib/ada.exp
@@ -13,6 +13,25 @@
 # You should have received a copy of the GNU General Public License
 # along with this program.  If not, see <http://www.gnu.org/licenses/>.
 
+# A wrapper for foreach_with_prefix that applies suitable
+# -fgnat-encodings arguments to a command line.  SCENARIO_ARG is the
+# name of a loop variable that will hold the scenario currently being
+# evaluated.  FLAGS_ARG will be set to the appropriate compiler flags
+# (if any) for this scenario.  LIST is the list of desired scenarios
+# to run, and BODY is what actually does the work.
+
+proc foreach_gnat_encoding {scenario_arg flags_arg list body} {
+    upvar 1 $scenario_arg scenario
+    upvar 1 $flags_arg flags
+    foreach_with_prefix scenario $list {
+	set flags {}
+	if {$scenario != "none"} {
+	    lappend flags additional_flags=-fgnat-encodings=$scenario
+	}
+	uplevel 1 $body
+    }
+}
+
 # Call target_compile with SOURCE DEST TYPE and OPTIONS as argument,
 # after having temporarily changed the current working directory to
 # BUILDDIR.
diff --git a/gdb/testsuite/lib/cache.exp b/gdb/testsuite/lib/cache.exp
index 092b7f1..ca3dca2 100644
--- a/gdb/testsuite/lib/cache.exp
+++ b/gdb/testsuite/lib/cache.exp
@@ -59,13 +59,38 @@ proc gdb_exit_called { args } {
     set ::gdb_exit_called true
 }
 
-# If DO_EXIT is false then this proc does nothing.  If DO_EXIT is true
-# then call gdb_exit the first time this proc is called for each
-# unique value of NAME within a single test.  Every subsequent time
-# this proc is called within a single test (for a given value of
-# NAME), don't call gdb_exit.
+# While calling the implementation of a caching proc, that
+# implementation might itself call additional caching procs.  We need
+# to track all of the nested caching procs that are called and we do
+# that in this list which is a list containing the names of any nested
+# caching procs that are called.
 
-proc gdb_cache_maybe_gdb_exit { name do_exit } {
+set gdb_nested_caching_proc_calls {}
+
+# Called before returning from gdb_do_cache.  NAME is the name of the
+# caching proc that was called.
+#
+# When DO_EXIT is true then this proc should call gdb_exit before
+# returning, otherwise gdb_exit is not called.
+#
+# ALSO_CALLED is a list of the names all the nested caching procs that
+# the proc NAME called.  This proc appends NAME as well as everything
+# in ALSO_CALLED to the global GDB_NESTED_CACHING_PROC_CALLS, this
+# aids in tracking recursive caching proc calls.
+
+proc gdb_cache_maybe_gdb_exit { name do_exit also_called } {
+
+    # Record all the procs that have been called, but only if the exit
+    # trace is in place (this is done in gdb_do_cache) and indicates
+    # that we are in data gathering mode.
+    if { [info exists ::gdb_exit_trace_in_place] } {
+	set ::gdb_nested_caching_proc_calls \
+	    [list {*}$::gdb_nested_caching_proc_calls $name {*}$also_called]
+    }
+
+    # The cache 'exit' entry will be true if this caching proc, or any
+    # caching proc that is recursively called from this caching proc,
+    # called exit.
     if { !$do_exit } {
 	return
     }
@@ -76,7 +101,15 @@ proc gdb_cache_maybe_gdb_exit { name do_exit } {
     set global_name __${name}__cached_gdb_exit_called
     if { ![info exists ::${global_name}] } {
 	gdb_exit
+	verbose -log "gdb_caching_proc $name caused gdb_exit to be called"
 	set ::${global_name} true
+	verbose -log "  gdb_caching_proc $name marked as called"
+
+	foreach other_name $also_called {
+	    verbose -log "  gdb_caching_proc $other_name marked as called"
+	    set global_name __${other_name}__cached_gdb_exit_called
+	    set ::${global_name} true
+	}
     }
 }
 
@@ -86,6 +119,8 @@ proc gdb_do_cache {name args} {
     global gdb_data_cache objdir
     global GDB_PARALLEL
 
+    verbose -log "gdb_do_cache: $name ( $args )"
+
     # Normally, if we have a cached value, we skip computation and return
     # the cached value.  If set to 1, instead don't skip computation and
     # verify against the cached value.
@@ -107,9 +142,10 @@ proc gdb_do_cache {name args} {
     if {[info exists gdb_data_cache(${cache_name},value)]} {
 	set cached_value $gdb_data_cache(${cache_name},value)
 	set cached_exit $gdb_data_cache(${cache_name},exit)
+	set cached_also_called $gdb_data_cache(${cache_name},also_called)
 	verbose "$name: returning '$cached_value' from cache" 2
 	if { $cache_verify == 0 } {
-	    gdb_cache_maybe_gdb_exit $name $cached_exit
+	    gdb_cache_maybe_gdb_exit $name $cached_exit $cached_also_called
 	    return $cached_value
 	}
 	set is_cached 1
@@ -123,11 +159,13 @@ proc gdb_do_cache {name args} {
 	    close $fd
 	    set gdb_data_cache(${cache_name},value) [lindex $content 0]
 	    set gdb_data_cache(${cache_name},exit) [lindex $content 1]
+	    set gdb_data_cache(${cache_name},also_called) [lindex $content 2]
 	    set cached_value $gdb_data_cache(${cache_name},value)
 	    set cached_exit $gdb_data_cache(${cache_name},exit)
+	    set cached_also_called $gdb_data_cache(${cache_name},also_called)
 	    verbose "$name: returning '$cached_value' from file cache" 2
 	    if { $cache_verify == 0 } {
-		gdb_cache_maybe_gdb_exit $name $cached_exit
+		gdb_cache_maybe_gdb_exit $name $cached_exit $cached_also_called
 		return $cached_value
 	    }
 	    set is_cached 1
@@ -164,9 +202,29 @@ proc gdb_do_cache {name args} {
     set old_gdb_exit_called $::gdb_exit_called
     set ::gdb_exit_called false
 
+    # As with the exit tracking above we also need to track any nested
+    # caching procs that this proc might call.  To do this we backup
+    # the current global list of nested caching proc calls and reset
+    # the global back ot the empty list.  As nested caching procs are
+    # called their names are added to the global list, see
+    # gdb_cache_maybe_gdb_exit for where this is done.
+    set old_gdb_nested_caching_proc_calls $::gdb_nested_caching_proc_calls
+    set ::gdb_nested_caching_proc_calls {}
+
     set real_name gdb_real__$name
     set gdb_data_cache(${cache_name},value) [gdb_do_cache_wrap $real_name {*}$args]
     set gdb_data_cache(${cache_name},exit) $::gdb_exit_called
+    set gdb_data_cache(${cache_name},also_called) \
+	[lsort -unique $::gdb_nested_caching_proc_calls]
+
+    # Now that the actual implementation of this caching proc has been
+    # executed the gdb_nested_caching_proc_calls global will contain
+    # the names of any nested caching procs that were called.  We
+    # append this new set of names onto the set of names we backed up
+    # above.
+    set ::gdb_nested_caching_proc_calls \
+	[list {*}$old_gdb_nested_caching_proc_calls \
+	     {*}$::gdb_nested_caching_proc_calls]
 
     # See comment above where OLD_GDB_EXIT_CALLED is set: if
     # GDB_EXIT_CALLED was previously true then this is a recursive
@@ -183,6 +241,7 @@ proc gdb_do_cache {name args} {
 	trace remove execution gdb_exit enter gdb_exit_called
 	unset ::gdb_exit_trace_in_place
 	set ::gdb_exit_called false
+	set ::gdb_nested_caching_proc_calls {}
     }
 
     # If a value being stored in the cache contains a newline then
@@ -196,6 +255,7 @@ proc gdb_do_cache {name args} {
     if { $cache_verify == 1 && $is_cached == 1 } {
 	set computed_value $gdb_data_cache(${cache_name},value)
 	set computed_exit $gdb_data_cache(${cache_name},exit)
+	set computed_also_called $gdb_data_cache(${cache_name},also_called)
 	if { $cached_value != $computed_value } {
 	    error [join [list "Inconsistent value results for $cache_name:"
 			 "cached: $cached_value vs. computed: $computed_value"]]
@@ -204,6 +264,10 @@ proc gdb_do_cache {name args} {
 	    error [join [list "Inconsistent exit results for $cache_name:"
 			 "cached: $cached_exit vs. computed: $computed_exit"]]
 	}
+	if { $cached_also_called != $computed_also_called } {
+	    error [join [list "Inconsistent also_called results for $cache_name:"
+			 "cached: $cached_also_called vs. computed: $computed_also_called"]]
+	}
     }
 
     if {[info exists GDB_PARALLEL]} {
@@ -213,10 +277,12 @@ proc gdb_do_cache {name args} {
 	set fd [open $cache_filename.[pid] w]
 	puts $fd $gdb_data_cache(${cache_name},value)
 	puts $fd $gdb_data_cache(${cache_name},exit)
+	puts $fd $gdb_data_cache(${cache_name},also_called)
 	close $fd
 	file rename -force -- $cache_filename.[pid] $cache_filename
     }
-    gdb_cache_maybe_gdb_exit $name $gdb_data_cache(${cache_name},exit)
+    gdb_cache_maybe_gdb_exit $name $gdb_data_cache(${cache_name},exit) \
+	$gdb_data_cache(${cache_name},also_called)
     return $gdb_data_cache(${cache_name},value)
 }
 
diff --git a/gdb/testsuite/lib/dwarf.exp b/gdb/testsuite/lib/dwarf.exp
index 995cdca..f9be6c4 100644
--- a/gdb/testsuite/lib/dwarf.exp
+++ b/gdb/testsuite/lib/dwarf.exp
@@ -2771,7 +2771,7 @@ namespace eval Dwarf {
     # section_version n
     #                - section version number to emit
     #                default = 2
-    # seg_size n   - the size of the adress selector in bytes: 0, 4, or 8
+    # seg_size n   - the size of the address selector in bytes: 0, 4, or 8
     #                default = 0
     #
     # LABEL is the label of the corresponding CU.
diff --git a/gdb/testsuite/lib/gdb-utils.exp b/gdb/testsuite/lib/gdb-utils.exp
index 41989da..a1fdf73 100644
--- a/gdb/testsuite/lib/gdb-utils.exp
+++ b/gdb/testsuite/lib/gdb-utils.exp
@@ -64,7 +64,7 @@ proc string_list_to_regexp { args } {
 
 # STYLE can either be the payload part of an ANSI terminal sequence,
 # or a shorthand for one of the gdb standard styles: "file",
-# "function", "variable", or "address".
+# "function", "variable", "address", etc.
 
 proc style {str style} {
     switch -exact -- $style {
@@ -76,6 +76,7 @@ proc style {str style} {
 	address { set style 34 }
 	metadata { set style 2 }
 	version { set style "35;1" }
+	line-number { set style 2 }
 	none { return $str }
     }
     return "\033\\\[${style}m${str}\033\\\[m"
diff --git a/gdb/testsuite/lib/gdb.exp b/gdb/testsuite/lib/gdb.exp
index acb932e..f0a8939 100644
--- a/gdb/testsuite/lib/gdb.exp
+++ b/gdb/testsuite/lib/gdb.exp
@@ -750,19 +750,24 @@ proc gdb_breakpoint { linespec args } {
 # single quoted C++ function specifier.
 #
 # If there are additional arguments, pass them to gdb_breakpoint.
-# We recognize no-message/message ourselves.
+# We recognize no-message/message ourselves as well as no-delete-brekpoints.
 #
 # no-message is messed up here, like gdb_breakpoint: to preserve
 # historical usage fails are always printed by default.
 # no-message: turns off printing of fails (and passes, but they're already off)
 # message: turns on printing of passes (and fails, but they're already on)
+#
+# The 'no-delete-brekpoints' option stops this proc from deleting all
+# breakpoints.
 
 proc runto { linespec args } {
     global gdb_prompt
     global bkptno_numopt_re
     global decimal
 
-    delete_breakpoints
+    if {[lsearch -exact $args no-delete-breakpoints] == -1} {
+	delete_breakpoints
+    }
 
     set print_pass 0
     set print_fail 1
@@ -786,7 +791,7 @@ proc runto { linespec args } {
     # the "at foo.c:36" output we get with -g.
     # the "in func" output we get without -g.
     gdb_expect {
-	-re "(?:Break|Temporary break).* at .*:$decimal.*$gdb_prompt $" {
+	-re "(?:Break|Temporary break).* at .*:.*$decimal.*$gdb_prompt $" {
 	    if { $print_pass } {
 		pass $test_name
 	    }
@@ -838,11 +843,11 @@ proc runto { linespec args } {
 
 # Ask gdb to run until we hit a breakpoint at main.
 #
-# N.B. This function deletes all existing breakpoints.
-# If you don't want that, use gdb_start_cmd.
+# N.B. By default this function deletes all existing breakpoints.  If
+# you don't want that then pass the 'no-delete-breakpoints' argument.
 
-proc runto_main { } {
-    return [runto main qualified]
+proc runto_main { args } {
+    return [runto main qualified {*}$args]
 }
 
 ### Continue, and expect to hit a breakpoint.
@@ -1554,7 +1559,7 @@ proc gdb_test { args } {
     global gdb_prompt
     upvar timeout timeout
 
-    parse_args {
+    parse_some_args {
 	{prompt ""}
 	{no-prompt-anchor}
 	{lbl}
@@ -1562,7 +1567,8 @@ proc gdb_test { args } {
 	{nonl}
     }
 
-    lassign $args command pattern message question response
+    set args [lassign $args command pattern message question response]
+    check_no_args_left
 
     # Can't have a question without a response.
     if { $question != "" && $response == "" || [llength $args] > 5 } {
@@ -1697,6 +1703,16 @@ if { [tcl_version_at_least 8 6] == 0 } {
 
 	return $res
     }
+
+    # ::tcl_platform(pathSeparator) was added in 8.6.
+    switch $::tcl_platform(platform) {
+	windows {
+	    set ::tcl_platform(pathSeparator) ;
+	}
+	default {
+	    set ::tcl_platform(pathSeparator) :
+	}
+    }
 }
 
 if { [tcl_version_at_least 8 6 2] == 0 } {
@@ -1726,13 +1742,14 @@ if { [tcl_version_at_least 8 6 2] == 0 } {
 proc gdb_test_no_output { args } {
     global gdb_prompt
 
-    parse_args {
+    parse_some_args {
 	{prompt ""}
 	{no-prompt-anchor}
 	{nopass}
     }
 
-    lassign $args command message
+    set args [lassign $args command message]
+    check_no_args_left
 
     set prompt [fill_in_default_prompt $prompt [expr !${no-prompt-anchor}]]
 
@@ -1774,7 +1791,7 @@ proc gdb_test_no_output { args } {
 proc gdb_test_sequence { args } {
     global gdb_prompt
 
-    parse_args {{prompt ""}}
+    parse_some_args {{prompt ""}}
 
     if { $prompt == "" } {
 	set prompt "$gdb_prompt $"
@@ -1800,6 +1817,55 @@ proc gdb_test_sequence { args } {
 }
 
 
+# Issue COMMAND, and return corresponding output lines.  Helper function for
+# gdb_get_lines_no_pass and gdb_get_lines.
+
+proc gdb_get_lines_1 { command message } {
+    set no_pass [string equal $message ""]
+    set lines ""
+    set ok 0
+    gdb_test_multiple $command $message {
+	-re "\r\n(\[^\r\n\]*)(?=\r\n)" {
+	    set line $expect_out(1,string)
+	    if { $lines eq "" } {
+		append lines "$line"
+	    } else {
+		append lines "\r\n$line"
+	    }
+	    exp_continue
+	}
+	-re -wrap "" {
+	    append lines "\r\n"
+	    set ok 1
+	    if { ! $no_pass } {
+		pass $gdb_test_name
+	    }
+	}
+    }
+
+    if { ! $ok } {
+	return ""
+    }
+
+    return $lines
+}
+
+# Issue COMMAND, and return corresponding output lines.  Don't generate a pass.
+
+proc gdb_get_lines_no_pass { command } {
+    gdb_get_lines_1 $command ""
+}
+
+# Issue COMMAND, and return corresponding output lines.  Generate a pass.
+
+proc gdb_get_lines { command {message ""} } {
+    if { $message == "" } {
+	set message [command_to_message $command]
+    }
+
+    gdb_get_lines_1 $command $message
+}
+
 # Match output of COMMAND using RE.  Read output line-by-line.
 # Report pass/fail with MESSAGE.
 # For a command foo with output:
@@ -1839,22 +1905,7 @@ proc gdb_test_lines { command message re args } {
 	set message [command_to_message $command]
     }
 
-    set lines ""
-    gdb_test_multiple $command $message {
-	-re "\r\n(\[^\r\n\]*)(?=\r\n)" {
-	    set line $expect_out(1,string)
-	    if { $lines eq "" } {
-		append lines "$line"
-	    } else {
-		append lines "\r\n$line"
-	    }
-	    exp_continue
-	}
-	-re -wrap "" {
-	    append lines "\r\n"
-	}
-    }
-
+    set lines [gdb_get_lines_no_pass $command]
     gdb_assert { [regexp $re $lines] } $message
 
     foreach re $re_not {
@@ -3563,6 +3614,55 @@ gdb_caching_proc supports_memtag {} {
     return 0
 }
 
+# Return 1 if catch syscall is supported, otherwise return 0.
+
+gdb_caching_proc supports_catch_syscall {} {
+    set me "supports_catch_syscall"
+
+    # Compile a test program.
+    set src {
+	int main() {
+	    return 0;
+	}
+    }
+    if {![gdb_simple_compile $me $src executable]} {
+	verbose -log "$me: failed to compile"
+	return 0
+    }
+
+    # No error message, compilation succeeded so now run it via gdb.
+
+    gdb_exit
+    gdb_start
+    gdb_reinitialize_dir $::srcdir/$::subdir
+    gdb_load $obj
+    if { ![runto_main] } {
+	verbose -log "$me: failed to run to main"
+	return 0
+    }
+
+    # To make sure we test both setting and inserting the catchpoint.
+    gdb_test_no_output "set breakpoint always-inserted on"
+
+    set res 0
+    set re_yes \
+	[string_to_regexp \
+	     "Catchpoint 2 (any syscall)"]
+    gdb_test_multiple "catch syscall" "" {
+	-re -wrap ^$re_yes {
+	    set res 1
+	}
+	-re -wrap "" {
+	}
+    }
+
+    gdb_exit
+    remote_file build delete $obj
+
+    verbose "$me: returning $res" 2
+    return $res
+}
+
 # Return 1 if the target supports hardware single stepping.
 
 proc can_hardware_single_step {} {
@@ -4299,6 +4399,135 @@ gdb_caching_proc allow_btrace_pt_tests {} {
     return $allow_btrace_pt_tests
 }
 
+# Run a test on the target to see if it supports ptwrite instructions and
+# if GDB can decode ptwrite events.  Return 1 if so, 0 if it does not.
+
+gdb_caching_proc allow_btrace_ptw_tests {} {
+    global srcdir subdir gdb_prompt inferior_exited_re decimal
+
+    require allow_btrace_pt_tests
+    set me "allow_btrace_ptw_tests"
+
+    set src {
+	#include <immintrin.h>
+
+	int
+	main ()
+	{
+	  _ptwrite32 (0x42);
+	  return 0;
+	}
+    }
+
+    set compile_flags "additional_flags=-mptwrite"
+    if {![gdb_simple_compile $me $src executable $compile_flags]} {
+	return 0
+    }
+
+    gdb_exit
+    gdb_start
+    gdb_reinitialize_dir $srcdir/$subdir
+    gdb_load "$obj"
+    if ![runto_main] {
+	return 1
+    }
+
+    gdb_test_no_output "record btrace pt" "$me: record btrace pt"
+
+    set allow_btrace_ptw_tests 0
+    gdb_test_multiple "next" "$me: next" {
+	-re -wrap ".*Illegal instruction.*" {
+	    verbose -log "$me:  ptwrite instruction support not detected."
+	}
+	-re -wrap ".*$inferior_exited_re normally.*" {
+	    verbose -log "$me:  ptwrite support not detected."
+	}
+	-re -wrap "$decimal.*(at|in|return 0).*" {
+	    set allow_btrace_ptw_tests 1
+	}
+    }
+
+    if { $allow_btrace_ptw_tests == 1 } {
+	# Show the func-call-history to get the packet trace.
+	gdb_test "record function-call-history" ".*"
+
+	gdb_test_multiple "maintenance btrace packet-history 0,1000" \
+	    "$me: check decoding support" {
+	    -re  "ptw" {
+		verbose -log "$me:  ptwrite decoding support detected."
+		set allow_btrace_ptw_tests 1
+	    }
+	    -re -wrap "" {
+		verbose -log "$me:  ptwrite decoding support not detected."
+		set allow_btrace_ptw_tests 0
+	    }
+	}
+    }
+
+    gdb_exit
+    remote_file build delete $obj
+
+    verbose "$me:  returning $allow_btrace_ptw_tests" 2
+    return $allow_btrace_ptw_tests
+}
+
+
+# Run a test on the target to see if GDB supports event tracing on it.
+# Return 1 if so, 0 if it does not.
+
+gdb_caching_proc allow_btrace_pt_event_trace_tests {} {
+    global srcdir subdir
+    set me "allow_btrace_pt_event_trace_tests"
+    require allow_btrace_pt_tests
+
+    set src {
+	int
+	main ()
+	{
+	  return 0;
+	}
+    }
+
+    if {![gdb_simple_compile $me $src executable]} {
+	return 0
+    }
+
+    gdb_exit
+    gdb_start
+    gdb_reinitialize_dir $srcdir/$subdir
+    gdb_load "$obj"
+    if ![runto_main] {
+	return 0
+    }
+
+    set allow_event_trace_tests 0
+    gdb_test_multiple "set record btrace pt event-tracing on" "$me:  first check" {
+	-re -wrap "Event-tracing is not supported by GDB." {
+	}
+	-re -wrap "" {
+	    set allow_event_trace_tests 1
+	}
+    }
+
+    if { $allow_event_trace_tests == 1 } {
+	gdb_test_multiple "record btrace pt" "$me:  check OS support" {
+	    -re -wrap "^" {
+	    }
+	    -re -wrap "" {
+		verbose -log "$me:  Target doesn't support event tracing."
+		set allow_event_trace_tests 0
+	    }
+	}
+    }
+
+    gdb_exit
+    remote_file build delete $obj
+
+    verbose "$me:  returning $allow_event_trace_tests" 2
+    return $allow_event_trace_tests
+}
+
+
 # Run a test on the target to see if it supports Aarch64 SVE hardware.
 # Return 1 if so, 0 if it does not.  Note this causes a restart of GDB.
 
@@ -5506,10 +5735,11 @@ proc gdb_compile {source dest type options} {
     }
 
     # If the 'build-id' option is used, then ensure that we generate a
-    # build-id.  GCC does this by default, but Clang does not, so
-    # enable it now.
-    if {[lsearch -exact $options build-id] > 0
-	&& [test_compiler_info "clang-*"]} {
+    # build-id.  It is possible that the compiler is configured to do
+    # so automatically, but at least for GCC the configure option
+    # --enable-linker-build-id is not enabled by default.
+    # So to be sure, enable it explicitly.
+    if {[lsearch -exact $options build-id] > 0} {
 	lappend new_options "ldflags=-Wl,--build-id"
     }
 
@@ -8113,7 +8343,6 @@ gdb_caching_proc gdb_has_argv0 {} {
 	  || [istarget *-wince-pe] || [istarget *-*-mingw32ce*]
 	  || [istarget *-*-osf*]
 	  || [istarget *-*-dicos*]
-	  || [istarget *-*-nto*]
 	  || [istarget *-*-*vms*]
 	  || [istarget *-*-lynx*178]) } {
 	fail "argv\[0\] should be available on this target"
@@ -8179,14 +8408,17 @@ proc get_build_id { filename } {
 
 # Return the build-id hex string (usually 160 bits as 40 hex characters)
 # converted to the form: .build-id/ab/cdef1234...89.debug
+#
+# The '.debug' suffix can be changed by passing the SUFFIX argument.
+#
 # Return "" if no build-id found.
-proc build_id_debug_filename_get { filename } {
+proc build_id_debug_filename_get { filename {suffix ".debug"} } {
     set data [get_build_id $filename]
     if { $data == "" } {
 	return ""
     }
     regsub {^..} $data {\0/} data
-    return ".build-id/${data}.debug"
+    return ".build-id/${data}${suffix}"
 }
 
 # DEST should be a file compiled with debug information.  This proc
@@ -9150,7 +9382,7 @@ proc using_fission { } {
 #
 # Example:
 # proc myproc {foo args} {
-#   parse_list args 1 {{bar} {baz "abc"} {qux}} "-" false
+#   parse_list 1 args {{bar} {baz "abc"} {qux}} "-" false
 #    # ...
 # }
 # myproc ABC -bar -baz DEF peanut butter
@@ -9211,13 +9443,32 @@ proc parse_list { level listname argset prefix eval } {
 # Search the caller's args variable and set variables according to the list of
 # valid options described by ARGSET.
 
-proc parse_args { argset } {
+proc parse_some_args { argset } {
     parse_list 2 args $argset "-" false
 
     # The remaining args should be checked to see that they match the
     # number of items expected to be passed into the procedure...
 }
 
+# Check that the caller's args variable is empty.
+
+proc check_no_args_left {} {
+    # Require no remaining args.
+    upvar 1 args args
+    if { [llength $args] != 0 } {
+	error "Args left unparsed: $args"
+    }
+}
+
+# As parse_some_args, but check that no args remain after parsing.
+
+proc parse_args { argset } {
+    uplevel parse_some_args [list $argset]
+
+    # Require no remaining args.
+    uplevel check_no_args_left
+}
+
 # Process the caller's options variable and set variables according
 # to the list of valid options described by OPTIONSET.
 
@@ -9598,18 +9849,6 @@ gdb_caching_proc supports_statement_frontiers {} {
     } executable "additional_flags=-gstatement-frontiers"]
 }
 
-# Return 1 if compiler supports -mmpx -fcheck-pointer-bounds.  Otherwise,
-# return 0.
-
-gdb_caching_proc supports_mpx_check_pointer_bounds {} {
-    set flags "additional_flags=-mmpx additional_flags=-fcheck-pointer-bounds"
-    return [gdb_can_simple_compile supports_mpx_check_pointer_bounds {
-	int main () {
-	    return 0;
-	}
-    } executable $flags]
-}
-
 # Return 1 if compiler supports -fcf-protection=.  Otherwise,
 # return 0.
 
@@ -10038,83 +10277,6 @@ gdb_caching_proc supports_gnuc {} {
     return [gdb_simple_compile $me $src object ""]
 }
 
-# Return 1 if target supports mpx, otherwise return 0.
-gdb_caching_proc have_mpx {} {
-    global srcdir
-
-    set me "have_mpx"
-    if { ![istarget "i?86-*-*"] && ![istarget "x86_64-*-*"] } {
-        verbose "$me: target does not support mpx, returning 0" 2
-        return 0
-    }
-
-    # Compile a test program.
-    set src {
-       #include "nat/x86-cpuid.h"
-
-        int main() {
-	  unsigned int eax, ebx, ecx, edx;
-
-	  if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
-	    return 0;
-
-	  if ((ecx & bit_OSXSAVE) == bit_OSXSAVE)
-	    {
-	      if (__get_cpuid_max (0, (void *)0) < 7)
-		return 0;
-
-		__cpuid_count (7, 0, eax, ebx, ecx, edx);
-
-		if ((ebx & bit_MPX) == bit_MPX)
-		  return 1;
-
-	    }
-	  return 0;
-	}
-    }
-    set compile_flags "incdir=${srcdir}/.."
-    if {![gdb_simple_compile $me $src executable $compile_flags]} {
-        return 0
-    }
-
-    set target_obj [gdb_remote_download target $obj]
-    set result [remote_exec target $target_obj]
-    set status [lindex $result 0]
-    set output [lindex $result 1]
-    if { $output != "" } {
-	set status 0
-    }
-
-    remote_file build delete $obj
-
-    if { $status == 0 } {
-	verbose "$me:  returning $status" 2
-	return $status
-    }
-
-    # Compile program with -mmpx -fcheck-pointer-bounds, try to trigger
-    # 'No MPX support', in other words, see if kernel supports mpx.
-    set src { int main (void) { return 0; } }
-    set comp_flags {}
-    append comp_flags " additional_flags=-mmpx"
-    append comp_flags " additional_flags=-fcheck-pointer-bounds"
-    if {![gdb_simple_compile $me-2 $src executable $comp_flags]} {
-        return 0
-    }
-
-    set target_obj [gdb_remote_download target $obj]
-    set result [remote_exec target $target_obj]
-    set status [lindex $result 0]
-    set output [lindex $result 1]
-    set status [expr ($status == 0) \
-		    && ![regexp "^No MPX support\r?\n" $output]]
-
-    remote_file build delete $obj
-
-    verbose "$me:  returning $status" 2
-    return $status
-}
-
 # Return 1 if target supports avx, otherwise return 0.
 gdb_caching_proc have_avx {} {
     global srcdir
diff --git a/gdb/testsuite/lib/mi-support.exp b/gdb/testsuite/lib/mi-support.exp
index a79b133..3832137 100644
--- a/gdb/testsuite/lib/mi-support.exp
+++ b/gdb/testsuite/lib/mi-support.exp
@@ -2680,7 +2680,7 @@ proc mi_make_info_frame_regexp {args} {
 # build the regexp for matching against the -stack-info-frame output.
 
 proc mi_info_frame { test args } {
-    parse_args {{frame ""} {thread ""}}
+    parse_some_args {{frame ""} {thread ""}}
 
     set re [eval mi_make_info_frame_regexp $args]
 
diff --git a/gdb/testsuite/lib/prelink-support.exp b/gdb/testsuite/lib/prelink-support.exp
index 8be5067..894af39 100644
--- a/gdb/testsuite/lib/prelink-support.exp
+++ b/gdb/testsuite/lib/prelink-support.exp
@@ -57,7 +57,7 @@ proc symlink_resolve {file} {
 	} else {
 	    set src2 $target
 	}
-	verbose -log "Resolved symlink $file targetting $target as $src2"
+	verbose -log "Resolved symlink $file targeting $target as $src2"
 	set file $src2
 
 	set loop [expr $loop + 1]
diff --git a/gdb/testsuite/lib/selftest-support.exp b/gdb/testsuite/lib/selftest-support.exp
index 00d7e30..0d76e2f 100644
--- a/gdb/testsuite/lib/selftest-support.exp
+++ b/gdb/testsuite/lib/selftest-support.exp
@@ -100,7 +100,7 @@ proc selftest_setup { executable function } {
 # self-test, then return an empty string.
 proc selftest_prepare {} {
     # Are we testing with a remote board?  In that case, the target
-    # won't have access to the GDB's auxilliary data files
+    # won't have access to the GDB's auxiliary data files
     # (data-directory, etc.).  It's simpler to just skip.
     if { [is_remote target]  || [is_remote host] } {
 	return
diff --git a/gdb/testsuite/lib/trace-support.exp b/gdb/testsuite/lib/trace-support.exp
index c9c9697..770a930 100644
--- a/gdb/testsuite/lib/trace-support.exp
+++ b/gdb/testsuite/lib/trace-support.exp
@@ -366,6 +366,20 @@ proc gdb_find_recursion_test_baseline { filename } {
     return $baseline
 }
 
+# Return 1 if the IPA library is available and 0 otherwise.
+
+proc allow_in_proc_agent {} {
+    global objdir
+
+    if [target_info exists in_proc_agent] {
+	return 1
+    } elseif [file exists "$objdir/../../gdbserver/libinproctrace.so"] {
+	return 1
+    } else {
+	return 0
+    }
+}
+
 # Return the location of the IPA library.
 
 proc get_in_proc_agent {} {
diff --git a/gdb/tid-parse.c b/gdb/tid-parse.c
index 1b8f343..442d5b3 100644
--- a/gdb/tid-parse.c
+++ b/gdb/tid-parse.c
@@ -47,40 +47,43 @@ get_positive_number_trailer (const char **pp, int trailer, const char *string)
   return num;
 }
 
-/* See tid-parse.h.  */
+/* Parse TIDSTR as a per-inferior thread ID, in either INF_NUM.THR_NUM
+   or THR_NUM form, and return a pair, the first item of the pair is
+   INF_NUM and the second item is THR_NUM.
 
-struct thread_info *
-parse_thread_id (const char *tidstr, const char **end)
+   If TIDSTR does not include an INF_NUM component, then the first item in
+   the pair will be 0 (which is an invalid inferior number), this indicates
+   that TIDSTR references the current inferior.
+
+   This function does not validate the INF_NUM and THR_NUM are actually
+   valid numbers, that is, they might reference inferiors or threads that
+   don't actually exist; this function just splits the string into its
+   component parts.
+
+   If there is an error parsing TIDSTR then this function will raise an
+   exception.  */
+
+static std::pair<int, int>
+parse_thread_id_1 (const char *tidstr, const char **end)
 {
   const char *number = tidstr;
   const char *dot, *p1;
-  struct inferior *inf;
-  int thr_num;
-  int explicit_inf_id = 0;
+  int thr_num, inf_num;
 
   dot = strchr (number, '.');
 
   if (dot != NULL)
     {
       /* Parse number to the left of the dot.  */
-      int inf_num;
-
       p1 = number;
       inf_num = get_positive_number_trailer (&p1, '.', number);
       if (inf_num == 0)
 	invalid_thread_id_error (number);
-
-      inf = find_inferior_id (inf_num);
-      if (inf == NULL)
-	error (_("No inferior number '%d'"), inf_num);
-
-      explicit_inf_id = 1;
       p1 = dot + 1;
     }
   else
     {
-      inf = current_inferior ();
-
+      inf_num = 0;
       p1 = number;
     }
 
@@ -88,6 +91,32 @@ parse_thread_id (const char *tidstr, const char **end)
   if (thr_num == 0)
     invalid_thread_id_error (number);
 
+  if (end != nullptr)
+    *end = p1;
+
+  return { inf_num, thr_num };
+}
+
+/* See tid-parse.h.  */
+
+struct thread_info *
+parse_thread_id (const char *tidstr, const char **end)
+{
+  const auto [inf_num, thr_num] = parse_thread_id_1 (tidstr, end);
+
+  inferior *inf;
+  bool explicit_inf_id = false;
+
+  if (inf_num != 0)
+    {
+      inf = find_inferior_id (inf_num);
+      if (inf == nullptr)
+	error (_("No inferior number '%d'"), inf_num);
+      explicit_inf_id = true;
+    }
+  else
+    inf = current_inferior ();
+
   thread_info *tp = nullptr;
   for (thread_info *it : inf->threads ())
     if (it->per_inf_num == thr_num)
@@ -96,7 +125,7 @@ parse_thread_id (const char *tidstr, const char **end)
 	break;
       }
 
-  if (tp == NULL)
+  if (tp == nullptr)
     {
       if (show_inferior_qualified_tids () || explicit_inf_id)
 	error (_("Unknown thread %d.%d."), inf->num, thr_num);
@@ -104,14 +133,27 @@ parse_thread_id (const char *tidstr, const char **end)
 	error (_("Unknown thread %d."), thr_num);
     }
 
-  if (end != NULL)
-    *end = p1;
-
   return tp;
 }
 
 /* See tid-parse.h.  */
 
+bool
+is_thread_id (const char *tidstr, const char **end)
+{
+  try
+    {
+      (void) parse_thread_id_1 (tidstr, end);
+      return true;
+    }
+  catch (const gdb_exception_error &)
+    {
+      return false;
+    }
+}
+
+/* See tid-parse.h.  */
+
 tid_range_parser::tid_range_parser (const char *tidlist,
 				    int default_inferior)
 {
diff --git a/gdb/tid-parse.h b/gdb/tid-parse.h
index 7bbdeab..0ea58bb 100644
--- a/gdb/tid-parse.h
+++ b/gdb/tid-parse.h
@@ -36,6 +36,14 @@ struct thread_info;
    thrown.  */
 struct thread_info *parse_thread_id (const char *tidstr, const char **end);
 
+/* Return true if TIDSTR is pointing to a string that looks like a
+   thread-id.  This doesn't mean that TIDSTR identifies a valid thread, but
+   the string does at least look like a valid thread-id.  If END is not
+   NULL, parse_thread_id stores the address of the first character after
+   the thread-id into *END.  */
+
+bool is_thread_id (const char *tidstr, const char **end);
+
 /* Parse a thread ID or a thread range list.
 
    A range will be of the form
diff --git a/gdb/tilegx-linux-nat.c b/gdb/tilegx-linux-nat.c
index bbfeaef..440a5cc 100644
--- a/gdb/tilegx-linux-nat.c
+++ b/gdb/tilegx-linux-nat.c
@@ -57,7 +57,7 @@ static tilegx_linux_nat_target the_tilegx_linux_nat_target;
 
 /* Mapping between the general-purpose registers in `struct user'
    format and GDB's register array layout.  Note that we map the
-   first 56 registers (0 thru 55) one-to-one.  GDB maps the pc to
+   first 56 registers (0 through 55) one-to-one.  GDB maps the pc to
    slot 64, but ptrace returns it in slot 56.  */
 static const int regmap[] =
 {
diff --git a/gdb/top.c b/gdb/top.c
index d6bf1d4..d34e733 100644
--- a/gdb/top.c
+++ b/gdb/top.c
@@ -632,19 +632,9 @@ execute_fn_to_string (std::string &res, std::function<void(void)> fn,
 {
   string_file str_file (term_out);
 
-  try
-    {
-      execute_fn_to_ui_file (&str_file, fn);
-    }
-  catch (...)
-    {
-      /* Finally.  */
-      res = str_file.release ();
-      throw;
-    }
+  SCOPE_EXIT { res = str_file.release (); };
 
-  /* And finally.  */
-  res = str_file.release ();
+  execute_fn_to_ui_file (&str_file, fn);
 }
 
 /* See top.h.  */
@@ -1389,6 +1379,11 @@ This GDB was configured as follows:\n\
    configure --host=%s --target=%s\n\
 "), host_name, target_name);
 
+#ifdef ENABLE_TARGETS
+  gdb_printf (stream, _("\
+	     --enable-targets=%s\n"), ENABLE_TARGETS);
+#endif
+
   gdb_printf (stream, _("\
 	     --with-auto-load-dir=%s\n\
 	     --with-auto-load-safe-path=%s\n\
diff --git a/gdb/tracectf.c b/gdb/tracectf.c
index 282a825..b4997f8 100644
--- a/gdb/tracectf.c
+++ b/gdb/tracectf.c
@@ -1111,7 +1111,7 @@ ctf_read_tp (struct uploaded_tp **uploaded_tps)
    second packet which contains events on trace blocks.  */
 
 static void
-ctf_target_open (const char *dirname, int from_tty)
+ctf_target_open (const char *args, int from_tty)
 {
   struct bt_ctf_event *event;
   uint32_t event_id;
@@ -1119,10 +1119,11 @@ ctf_target_open (const char *dirname, int from_tty)
   struct uploaded_tsv *uploaded_tsvs = NULL;
   struct uploaded_tp *uploaded_tps = NULL;
 
-  if (!dirname)
+  std::string dirname = extract_single_filename_arg (args);
+  if (dirname.empty ())
     error (_("No CTF directory specified."));
 
-  ctf_open_dir (dirname);
+  ctf_open_dir (dirname.c_str ());
 
   target_preopen (from_tty);
 
@@ -1162,7 +1163,7 @@ ctf_target_open (const char *dirname, int from_tty)
   start_pos = bt_iter_get_pos (bt_ctf_get_iter (ctf_iter));
   gdb_assert (start_pos->type == BT_SEEK_RESTORE);
 
-  trace_dirname = make_unique_xstrdup (dirname);
+  trace_dirname = make_unique_xstrdup (dirname.c_str ());
   current_inferior ()->push_target (&ctf_ops);
 
   inferior_appeared (current_inferior (), CTF_PID);
@@ -1721,6 +1722,7 @@ void
 _initialize_ctf ()
 {
 #if HAVE_LIBBABELTRACE
-  add_target (ctf_target_info, ctf_target_open, filename_completer);
+  add_target (ctf_target_info, ctf_target_open,
+	      filename_maybe_quoted_completer);
 #endif
 }
diff --git a/gdb/tracefile-tfile.c b/gdb/tracefile-tfile.c
index 4a4c4a2..b59b5c7 100644
--- a/gdb/tracefile-tfile.c
+++ b/gdb/tracefile-tfile.c
@@ -462,24 +462,24 @@ tfile_target_open (const char *arg, int from_tty)
   struct uploaded_tsv *uploaded_tsvs = NULL;
 
   target_preopen (from_tty);
-  if (!arg)
+  std::string filename = extract_single_filename_arg (arg);
+  if (filename.empty ())
     error (_("No trace file specified."));
 
-  gdb::unique_xmalloc_ptr<char> filename (tilde_expand (arg));
-  if (!IS_ABSOLUTE_PATH (filename.get ()))
-    filename = make_unique_xstrdup (gdb_abspath (filename).c_str ());
+  if (!IS_ABSOLUTE_PATH (filename.c_str ()))
+    filename = gdb_abspath (filename);
 
   flags = O_BINARY | O_LARGEFILE;
   flags |= O_RDONLY;
-  scratch_chan = gdb_open_cloexec (filename.get (), flags, 0).release ();
+  scratch_chan = gdb_open_cloexec (filename.c_str (), flags, 0).release ();
   if (scratch_chan < 0)
-    perror_with_name (filename.get ());
+    perror_with_name (filename.c_str ());
 
   /* Looks semi-reasonable.  Toss the old trace file and work on the new.  */
 
   current_inferior ()->unpush_target (&tfile_ops);
 
-  trace_filename = std::move (filename);
+  trace_filename = make_unique_xstrdup (filename.c_str ());
   trace_fd = scratch_chan;
 
   /* Make sure this is clear.  */
@@ -1120,5 +1120,6 @@ void _initialize_tracefile_tfile ();
 void
 _initialize_tracefile_tfile ()
 {
-  add_target (tfile_target_info, tfile_target_open, filename_completer);
+  add_target (tfile_target_info, tfile_target_open,
+	      filename_maybe_quoted_completer);
 }
diff --git a/gdb/tracepoint.c b/gdb/tracepoint.c
index e9bcbfd..ca6f616 100644
--- a/gdb/tracepoint.c
+++ b/gdb/tracepoint.c
@@ -671,7 +671,7 @@ validate_actionline (const char *line, tracepoint *t)
 		  p = strchr (p, ',');
 		  continue;
 		}
-	      /* else fall thru, treat p as an expression and parse it!  */
+	      /* else fall through, treat p as an expression and parse it!  */
 	    }
 	  tmp_p = p;
 	  for (bp_location &loc : t->locations ())
@@ -2110,7 +2110,7 @@ tfind_1 (enum trace_find_type type, int num,
 	 if you're in a user-defined command or especially in a
 	 loop, then you need a way to detect that the command
 	 failed WITHOUT aborting.  This allows you to write
-	 scripts that search thru the trace buffer until the end,
+	 scripts that search through the trace buffer until the end,
 	 and then continue on to do something else.  */
   
       if (from_tty)
@@ -2351,8 +2351,9 @@ tfind_line_command (const char *args, int from_tty)
     {
       if (start_pc == end_pc)
 	{
-	  gdb_printf ("Line %d of \"%s\"",
-		      sal.line,
+	  gdb_printf ("Line %ps of \"%s\"",
+		      styled_string (line_number_style.style (),
+				     pulongest (sal.line)),
 		      symtab_to_filename_for_display (sal.symtab));
 	  gdb_stdout->wrap_here (2);
 	  gdb_printf (" is at address ");
@@ -2363,8 +2364,9 @@ tfind_line_command (const char *args, int from_tty)
 	  if (sal.line > 0
 	      && find_line_pc_range (sal, &start_pc, &end_pc)
 	      && start_pc != end_pc)
-	    gdb_printf ("Attempting to find line %d instead.\n",
-			sal.line);
+	    gdb_printf ("Attempting to find line %ps instead.\n",
+			styled_string (line_number_style.style (),
+				       pulongest (sal.line)));
 	  else
 	    error (_("Cannot find a good line."));
 	}
@@ -2455,7 +2457,6 @@ tfind_outside_command (const char *args, int from_tty)
 static void
 info_scope_command (const char *args_in, int from_tty)
 {
-  struct bound_minimal_symbol msym;
   const struct block *block;
   const char *symname;
   const char *save_args = args_in;
@@ -2579,17 +2580,20 @@ info_scope_command (const char *args_in, int from_tty)
 					sym->value_block ()->entry_pc ()));
 		  break;
 		case LOC_UNRESOLVED:
-		  msym = lookup_minimal_symbol (sym->linkage_name (),
-						NULL, NULL);
-		  if (msym.minsym == NULL)
-		    gdb_printf ("Unresolved Static");
-		  else
-		    {
-		      gdb_printf ("static storage at address ");
-		      gdb_printf ("%s",
-				  paddress (gdbarch, msym.value_address ()));
-		    }
-		  break;
+		  {
+		    bound_minimal_symbol msym
+		      = lookup_minimal_symbol (current_program_space,
+					       sym->linkage_name ());
+		    if (msym.minsym == NULL)
+		      gdb_printf ("Unresolved Static");
+		    else
+		      {
+			gdb_printf ("static storage at address ");
+			gdb_printf ("%s",
+				    paddress (gdbarch, msym.value_address ()));
+		      }
+		    break;
+		  }
 		case LOC_OPTIMIZED_OUT:
 		  gdb_printf ("optimized out.\n");
 		  continue;
@@ -3642,7 +3646,7 @@ print_one_static_tracepoint_marker (int count,
       else
 	uiout->field_skip ("fullname");
 
-      uiout->field_signed ("line", sal.line);
+      uiout->field_signed ("line", sal.line, line_number_style.style ());
     }
   else
     {
diff --git a/gdb/tui/tui-command.c b/gdb/tui/tui-command.c
index b9bc19e..677721d 100644
--- a/gdb/tui/tui-command.c
+++ b/gdb/tui/tui-command.c
@@ -51,13 +51,3 @@ tui_cmd_window::resize (int height_, int width_, int origin_x, int origin_y)
       wmove (handle.get (), 0, 0);
     }
 }
-
-/* See tui-command.h.  */
-
-void
-tui_refresh_cmd_win (void)
-{
-  WINDOW *w = tui_cmd_win ()->handle.get ();
-
-  tui_wrefresh (w);
-}
diff --git a/gdb/tui/tui-command.h b/gdb/tui/tui-command.h
index 90b8de7..f167d95 100644
--- a/gdb/tui/tui-command.h
+++ b/gdb/tui/tui-command.h
@@ -26,8 +26,7 @@
 
 /* The TUI command window.  */
 struct tui_cmd_window
-  : public tui_noscroll_window, tui_nobox_window, tui_norefresh_window,
-    tui_always_visible_window
+  : public tui_noscroll_window, tui_nobox_window, tui_always_visible_window
 {
   tui_cmd_window () = default;
 
@@ -63,7 +62,4 @@ tui_cmd_win ()
   return dynamic_cast<tui_cmd_window *> (tui_win_list[CMD_WIN]);
 }
 
-/* Refresh the command window.  */
-extern void tui_refresh_cmd_win (void);
-
 #endif /* TUI_TUI_COMMAND_H */
diff --git a/gdb/tui/tui-data.h b/gdb/tui/tui-data.h
index b9922db..79a4163 100644
--- a/gdb/tui/tui-data.h
+++ b/gdb/tui/tui-data.h
@@ -117,13 +117,6 @@ public:
     return true;
   }
 
-  /* Disable output until the next call to doupdate.  */
-  void no_refresh ()
-  {
-    if (handle != nullptr)
-      wnoutrefresh (handle.get ());
-  }
-
   /* Called after the tab width has been changed.  */
   virtual void update_tab_width ()
   {
@@ -260,15 +253,6 @@ struct tui_nobox_window : public virtual tui_win_info
   }
 };
 
-/* A TUI window that is not refreshed.  */
-
-struct tui_norefresh_window : public virtual tui_win_info
-{
-  virtual void refresh_window () final override
-  {
-  }
-};
-
 /* A TUI window that is always visible.  */
 
 struct tui_always_visible_window : public virtual tui_win_info
diff --git a/gdb/tui/tui-disasm.c b/gdb/tui/tui-disasm.c
index 53be866..cd82853 100644
--- a/gdb/tui/tui-disasm.c
+++ b/gdb/tui/tui-disasm.c
@@ -157,11 +157,11 @@ tui_disassemble (struct gdbarch *gdbarch,
 static CORE_ADDR
 tui_find_backward_disassembly_start_address (CORE_ADDR addr)
 {
-  struct bound_minimal_symbol msym, msym_prev;
-
-  msym = lookup_minimal_symbol_by_pc_section (addr - 1, nullptr,
-					      lookup_msym_prefer::TEXT,
-					      &msym_prev);
+  bound_minimal_symbol msym_prev;
+  bound_minimal_symbol msym
+    = lookup_minimal_symbol_by_pc_section (addr - 1, nullptr,
+					   lookup_msym_prefer::TEXT,
+					   &msym_prev);
   if (msym.minsym != nullptr)
     return msym.value_address ();
   else if (msym_prev.minsym != nullptr)
@@ -402,8 +402,8 @@ tui_get_begin_asm_address (struct gdbarch **gdbarch_p, CORE_ADDR *addr_p)
 
       if (addr == 0)
 	{
-	  struct bound_minimal_symbol main_symbol
-	    = lookup_minimal_symbol (main_name (), nullptr, nullptr);
+	  bound_minimal_symbol main_symbol
+	    = lookup_minimal_symbol (current_program_space, main_name ());
 	  if (main_symbol.minsym != nullptr)
 	    addr = main_symbol.value_address ();
 	}
diff --git a/gdb/tui/tui-file.c b/gdb/tui/tui-file.c
index 7878190..17ac138 100644
--- a/gdb/tui/tui-file.c
+++ b/gdb/tui/tui-file.c
@@ -25,7 +25,7 @@ tui_file::puts (const char *linebuffer)
 {
   tui_puts (linebuffer);
   if (!m_buffered)
-    tui_refresh_cmd_win ();
+    tui_cmd_win ()->refresh_window ();
 }
 
 void
@@ -33,13 +33,13 @@ tui_file::write (const char *buf, long length_buf)
 {
   tui_write (buf, length_buf);
   if (!m_buffered)
-    tui_refresh_cmd_win ();
+    tui_cmd_win ()->refresh_window ();
 }
 
 void
 tui_file::flush ()
 {
   if (m_buffered)
-    tui_refresh_cmd_win ();
+    tui_cmd_win ()->refresh_window ();
   stdio_file::flush ();
 }
diff --git a/gdb/tui/tui-layout.c b/gdb/tui/tui-layout.c
index 665b521..2b6cb31 100644
--- a/gdb/tui/tui-layout.c
+++ b/gdb/tui/tui-layout.c
@@ -61,6 +61,8 @@ std::vector<tui_win_info *> tui_windows;
 void
 tui_apply_current_layout (bool preserve_cmd_win_size_p)
 {
+  tui_batch_rendering defer;
+
   for (tui_win_info *win_info : tui_windows)
     win_info->make_visible (false);
 
diff --git a/gdb/tui/tui-regs.c b/gdb/tui/tui-regs.c
index 2be8187..38ddd23 100644
--- a/gdb/tui/tui-regs.c
+++ b/gdb/tui/tui-regs.c
@@ -151,8 +151,8 @@ tui_data_window::first_reg_element_no_inline (int line_no) const
     return (-1);
 }
 
-/* Show the registers of the given group in the data window
-   and refresh the window.  */
+/* See tui-regs.h.  */
+
 void
 tui_data_window::set_register_group (const reggroup *group)
 {
@@ -166,9 +166,6 @@ tui_data_window::set_register_group (const reggroup *group)
 void
 tui_data_window::update_register_data (const reggroup *group)
 {
-  if (group == nullptr)
-    group = general_reggroup;
-
   if (!target_has_registers ()
       || !target_has_stack ()
       || !target_has_memory ())
@@ -180,6 +177,9 @@ tui_data_window::update_register_data (const reggroup *group)
       return;
     }
 
+  if (group == nullptr)
+    group = general_reggroup;
+
   frame_info_ptr frame = get_selected_frame (nullptr);
   struct gdbarch *gdbarch = get_frame_arch (frame);
 
@@ -269,8 +269,6 @@ tui_data_window::display_registers_from (int start_element_no)
   /* Mark register windows below the visible area.  */
   for (; i < m_regs_content.size (); i++)
     m_regs_content[i].y = 0;
-
-  refresh_window ();
 }
 
 /* See tui-regs.h.  */
@@ -359,7 +357,7 @@ tui_data_window::rerender ()
     erase_data_content ();
   else
     display_registers_from (0);
-  tui_wrefresh (handle.get ());
+  refresh_window ();
 }
 
 
@@ -382,6 +380,7 @@ tui_data_window::do_scroll_vertical (int num_to_scroll)
     {
       first_line += num_to_scroll;
       display_registers_from_line (first_line);
+      refresh_window ();
     }
 }
 
@@ -391,29 +390,23 @@ tui_data_window::do_scroll_vertical (int num_to_scroll)
 void
 tui_data_window::check_register_values (const frame_info_ptr &frame)
 {
-  if (frame == nullptr)
+  /* If the frame architecture changed, we need to reset the register
+     group.  */
+  if (frame == nullptr || get_frame_arch (frame) != m_gdbarch)
     set_register_group (nullptr);
   else
     {
-      /* If the frame architecture changed, we need to reset the
-	 register group.  */
-      struct gdbarch *gdbarch = get_frame_arch (frame);
-      if (gdbarch != m_gdbarch)
-	set_register_group (nullptr);
-      else
+      for (tui_register_info &data_item_win : m_regs_content)
 	{
-	  for (tui_register_info &data_item_win : m_regs_content)
-	    {
-	      bool was_hilighted = data_item_win.highlighted ();
+	  bool was_hilighted = data_item_win.highlighted ();
 
-	      data_item_win.update (frame);
+	  data_item_win.update (frame);
 
-	      if ((data_item_win.highlighted () || was_hilighted)
-		  && data_item_win.visible ())
-		data_item_win.rerender (handle.get (), m_item_width);
-	    }
+	  if ((data_item_win.highlighted () || was_hilighted)
+	      && data_item_win.visible ())
+	    data_item_win.rerender (handle.get (), m_item_width);
 	}
-      tui_wrefresh (handle.get ());
+      refresh_window ();
     }
 }
 
@@ -499,11 +492,11 @@ tui_reg_command (const char *args, int from_tty)
     {
       size_t len = strlen (args);
 
+      tui_batch_rendering suppress;
+
       /* Make sure the curses mode is enabled.  */
       tui_enable ();
 
-      tui_suppress_output suppress;
-
       /* Make sure the register window is visible.  If not, select an
 	 appropriate layout.  We need to do this before trying to run the
 	 'next' or 'prev' commands.  */
diff --git a/gdb/tui/tui-regs.h b/gdb/tui/tui-regs.h
index 61bfdd2..fa1a3dd 100644
--- a/gdb/tui/tui-regs.h
+++ b/gdb/tui/tui-regs.h
@@ -81,6 +81,8 @@ struct tui_data_window : public tui_win_info
 
   void check_register_values (const frame_info_ptr &frame);
 
+  /* Set the current register and redisplay the window.  If GROUP is
+     NULL, the general register group will be used.  */
   void set_register_group (const reggroup *group);
 
   const reggroup *get_current_group () const
diff --git a/gdb/tui/tui-source.c b/gdb/tui/tui-source.c
index ee64e41..503fb00 100644
--- a/gdb/tui/tui-source.c
+++ b/gdb/tui/tui-source.c
@@ -32,6 +32,20 @@
 #include "tui/tui-winsource.h"
 #include "tui/tui-source.h"
 #include "tui/tui-location.h"
+#include "tui/tui-io.h"
+#include "cli/cli-style.h"
+
+tui_source_window::tui_source_window ()
+{
+  line_number_style.changed.attach
+    (std::bind (&tui_source_window::style_changed, this),
+     m_src_observable, "tui-source");
+}
+
+tui_source_window::~tui_source_window ()
+{
+  line_number_style.changed.detach (m_src_observable);
+}
 
 /* Function to display source in the source window.  */
 bool
@@ -247,5 +261,7 @@ tui_source_window::show_line_number (int offset) const
 		 tui_left_margin_verbose ? "%0*d%c" : "%*d%c", m_digits - 1,
 		 lineno, space);
     }
+  tui_apply_style (handle.get (), line_number_style.style ());
   display_string (text);
+  tui_apply_style (handle.get (), ui_file_style ());
 }
diff --git a/gdb/tui/tui-source.h b/gdb/tui/tui-source.h
index f32167f..d8f7189 100644
--- a/gdb/tui/tui-source.h
+++ b/gdb/tui/tui-source.h
@@ -30,7 +30,8 @@
 
 struct tui_source_window : public tui_source_window_base
 {
-  tui_source_window () = default;
+  tui_source_window ();
+  ~tui_source_window ();
 
   DISABLE_COPY_AND_ASSIGN (tui_source_window);
 
@@ -81,6 +82,9 @@ private:
 
   /* It is the resolved form as returned by symtab_to_fullname.  */
   gdb::unique_xmalloc_ptr<char> m_fullname;
+
+  /* A token used to register and unregister an observer.  */
+  gdb::observers::token m_src_observable;
 };
 
 /* Return the instance of the source window.  */
diff --git a/gdb/tui/tui-win.c b/gdb/tui/tui-win.c
index c67c4f5..e9a8e46 100644
--- a/gdb/tui/tui-win.c
+++ b/gdb/tui/tui-win.c
@@ -473,11 +473,7 @@ void
 tui_refresh_all_win (void)
 {
   clearok (curscr, TRUE);
-  for (tui_win_info *win_info : all_tui_windows ())
-    {
-      if (win_info->is_visible ())
-	win_info->refresh_window ();
-    }
+  doupdate ();
 }
 
 void
diff --git a/gdb/tui/tui-wingeneral.c b/gdb/tui/tui-wingeneral.c
index d113d77..369d152 100644
--- a/gdb/tui/tui-wingeneral.c
+++ b/gdb/tui/tui-wingeneral.c
@@ -27,42 +27,27 @@
 
 #include "gdb_curses.h"
 
-/* This is true if we're currently suppressing output, via
-   wnoutrefresh.  This is needed in case we create a new window while
-   in this mode.  */
+/* This is true when there is a live instance of tui_batch_rendering.
+   The outermost tui_batch_rendering will cause a flush to the
+   screen.  */
 
 static bool suppress_output;
 
 /* See tui-data.h.  */
 
-tui_suppress_output::tui_suppress_output ()
+tui_batch_rendering::tui_batch_rendering ()
   : m_saved_suppress (suppress_output)
 {
   suppress_output = true;
-
-  for (const auto &win : all_tui_windows ())
-    win->no_refresh ();
 }
 
 /* See tui-data.h.  */
 
-tui_suppress_output::~tui_suppress_output ()
+tui_batch_rendering::~tui_batch_rendering ()
 {
   suppress_output = m_saved_suppress;
   if (!suppress_output)
     doupdate ();
-
-  for (const auto &win : all_tui_windows ())
-    win->refresh_window ();
-}
-
-/* See tui-data.h.  */
-
-void
-tui_wrefresh (WINDOW *win)
-{
-  if (!suppress_output)
-    wrefresh (win);
 }
 
 /* See tui-data.h.  */
@@ -71,7 +56,7 @@ void
 tui_win_info::refresh_window ()
 {
   if (handle != NULL)
-    tui_wrefresh (handle.get ());
+    wnoutrefresh (handle.get ());
 }
 
 /* Draw a border around the window.  */
diff --git a/gdb/tui/tui-wingeneral.h b/gdb/tui/tui-wingeneral.h
index 652cef9..83ecb7d 100644
--- a/gdb/tui/tui-wingeneral.h
+++ b/gdb/tui/tui-wingeneral.h
@@ -29,18 +29,20 @@ struct tui_win_info;
 extern void tui_unhighlight_win (struct tui_win_info *);
 extern void tui_highlight_win (struct tui_win_info *);
 
-/* An RAII class that suppresses output on construction (calling
-   wnoutrefresh on the existing windows), and then flushes the output
-   (via doupdate) when destroyed.  */
+/* An RAII class that calls doupdate on destruction (really the
+   destruction of the outermost instance).  This is used to prevent
+   flickering -- window implementations should only call wnoutrefresh,
+   and any time rendering is needed, an object of this type should be
+   instantiated.  */
 
-class tui_suppress_output
+class tui_batch_rendering
 {
 public:
 
-  tui_suppress_output ();
-  ~tui_suppress_output ();
+  tui_batch_rendering ();
+  ~tui_batch_rendering ();
 
-  DISABLE_COPY_AND_ASSIGN (tui_suppress_output);
+  DISABLE_COPY_AND_ASSIGN (tui_batch_rendering);
 
 private:
 
@@ -48,8 +50,4 @@ private:
   bool m_saved_suppress;
 };
 
-/* Call wrefresh on the given window.  However, if output is being
-   suppressed via tui_suppress_output, do not call wrefresh.  */
-extern void tui_wrefresh (WINDOW *win);
-
 #endif /* TUI_TUI_WINGENERAL_H */
diff --git a/gdb/tui/tui-winsource.c b/gdb/tui/tui-winsource.c
index b08fca7..a313e44 100644
--- a/gdb/tui/tui-winsource.c
+++ b/gdb/tui/tui-winsource.c
@@ -343,7 +343,7 @@ tui_source_window_base::refresh_window ()
   int smincol = x + box_width () + left_margin;
   int smaxrow = sminrow + m_content.size () - 1;
   int smaxcol = smincol + view_width - 1;
-  prefresh (m_pad.get (), 0, pad_x, sminrow, smincol, smaxrow, smaxcol);
+  pnoutrefresh (m_pad.get (), 0, pad_x, sminrow, smincol, smaxrow, smaxcol);
 }
 
 void
diff --git a/gdb/tui/tui-winsource.h b/gdb/tui/tui-winsource.h
index 29828c1..a262c63 100644
--- a/gdb/tui/tui-winsource.h
+++ b/gdb/tui/tui-winsource.h
@@ -189,6 +189,11 @@ public:
      update_source_windows_with_addr.  */
   void update_source_window_with_addr (struct gdbarch *, CORE_ADDR);
 
+protected:
+
+  /* Called when a user style setting is changed.  */
+  void style_changed ();
+
 private:
 
   /* Used for horizontal scroll.  */
@@ -236,9 +241,6 @@ private:
      the initial escape that sets the color will still be applied.  */
   void puts_to_pad_with_skip (const char *string, int skip);
 
-  /* Called when the user "set style enabled" setting is changed.  */
-  void style_changed ();
-
   /* A token used to register and unregister an observer.  */
   gdb::observers::token m_observable;
 
diff --git a/gdb/tui/tui.c b/gdb/tui/tui.c
index 781ec85..bc96cd8 100644
--- a/gdb/tui/tui.c
+++ b/gdb/tui/tui.c
@@ -568,7 +568,7 @@ tui_disable_command (const char *args, int from_tty)
 void
 tui_show_assembly (struct gdbarch *gdbarch, CORE_ADDR addr)
 {
-  tui_suppress_output suppress;
+  tui_batch_rendering suppress;
   tui_add_win_to_layout (DISASSEM_WIN);
   tui_update_source_windows_with_addr (gdbarch, addr);
 }
diff --git a/gdb/typeprint.c b/gdb/typeprint.c
index 2e1c5ea..274f602 100644
--- a/gdb/typeprint.c
+++ b/gdb/typeprint.c
@@ -513,7 +513,7 @@ whatis_exp (const char *exp, int show)
       val = expr->evaluate_type ();
       type = val->type ();
 
-      if (show == -1 && expr->first_opcode () == OP_TYPE)
+      if (show == -1 && expr->type_p ())
 	{
 	  /* The user expression names a type directly.  */
 
diff --git a/gdb/ui-out.c b/gdb/ui-out.c
index 7e9f238..3330cc8 100644
--- a/gdb/ui-out.c
+++ b/gdb/ui-out.c
@@ -433,7 +433,8 @@ ui_out::end (ui_out_type type)
 }
 
 void
-ui_out::field_signed (const char *fldname, LONGEST value)
+ui_out::field_signed (const char *fldname, LONGEST value,
+		      const ui_file_style &style)
 {
   int fldno;
   int width;
@@ -441,7 +442,7 @@ ui_out::field_signed (const char *fldname, LONGEST value)
 
   verify_field (&fldno, &width, &align);
 
-  do_field_signed (fldno, width, align, fldname, value);
+  do_field_signed (fldno, width, align, fldname, value, style);
 }
 
 void
@@ -454,7 +455,8 @@ ui_out::field_fmt_signed (int input_width, ui_align input_align,
 
   verify_field (&fldno, &width, &align);
 
-  do_field_signed (fldno, input_width, input_align, fldname, value);
+  do_field_signed (fldno, input_width, input_align, fldname, value,
+		   ui_file_style ());
 }
 
 /* See ui-out.h.  */
diff --git a/gdb/ui-out.h b/gdb/ui-out.h
index ef9ce4f..f9d96de 100644
--- a/gdb/ui-out.h
+++ b/gdb/ui-out.h
@@ -182,7 +182,8 @@ class ui_out
   void begin (ui_out_type type, const char *id);
   void end (ui_out_type type);
 
-  void field_signed (const char *fldname, LONGEST value);
+  void field_signed (const char *fldname, LONGEST value,
+		     const ui_file_style &style = ui_file_style ());
   void field_fmt_signed (int width, ui_align align, const char *fldname,
 			 LONGEST value);
   /* Like field_signed, but print an unsigned value.  */
@@ -346,7 +347,8 @@ protected:
   virtual void do_begin (ui_out_type type, const char *id) = 0;
   virtual void do_end (ui_out_type type) = 0;
   virtual void do_field_signed (int fldno, int width, ui_align align,
-				const char *fldname, LONGEST value) = 0;
+				const char *fldname, LONGEST value,
+				const ui_file_style &style) = 0;
   virtual void do_field_unsigned (int fldno, int width, ui_align align,
 				  const char *fldname, ULONGEST value) = 0;
   virtual void do_field_skip (int fldno, int width, ui_align align,
diff --git a/gdb/ui.c b/gdb/ui.c
index e5c7965..88a3a14 100644
--- a/gdb/ui.c
+++ b/gdb/ui.c
@@ -106,7 +106,7 @@ ui::input_interactive_p () const
 
 
 /* When there is an event ready on the stdin file descriptor, instead
-   of calling readline directly throught the callback function, or
+   of calling readline directly through the callback function, or
    instead of calling gdb_readline_no_editing_callback, give gdb a
    chance to detect errors and do something.  */
 
diff --git a/gdb/unittests/enum-flags-selftests.c b/gdb/unittests/enum-flags-selftests.c
index b55d8c3..dddb1e2 100644
--- a/gdb/unittests/enum-flags-selftests.c
+++ b/gdb/unittests/enum-flags-selftests.c
@@ -29,49 +29,49 @@ namespace enum_flags_tests {
    make it simpler to use.  They could be named differently.  */
 
 /* A "real enum".  */
-enum RE
-  {
-    RE_FLAG1 = 1 << 1,
-    RE_FLAG2 = 1 << 2,
-  };
+enum RawEnum
+{
+  RawEnum_Flag1 = 1 << 1,
+  RawEnum_Flag2 = 1 << 2,
+};
 
 /* Another "real enum".  */
-enum RE2
-  {
-    RE2_FLAG1 = 1 << 1,
-    RE2_FLAG2 = 1 << 2,
-  };
+enum RawEnum2
+{
+  RawEnum2_Flag1 = 1 << 1,
+  RawEnum2_Flag2 = 1 << 2,
+};
 
 /* An unsigned "real enum".  */
-enum URE : unsigned
-  {
-    URE_FLAG1 = 1 << 1,
-    URE_FLAG2 = 1 << 2,
-    URE_FLAG3 = 0xffffffff,
-  };
+enum UnsignedRawEnum : unsigned
+{
+  UnsignedRawEnum_Flag1 = 1 << 1,
+  UnsignedRawEnum_Flag2 = 1 << 2,
+  UnsignedRawEnum_Flag3 = 0xffffffff,
+};
 
 /* A non-flags enum.  */
-enum NF
-  {
-    NF_FLAG1 = 1 << 1,
-    NF_FLAG2 = 1 << 2,
-  };
+enum NonFlagsEnum
+{
+  NonFlagsEnum_Flag1 = 1 << 1,
+  NonFlagsEnum_Flag2 = 1 << 2,
+};
 
 /* The corresponding "enum flags" types.  */
-DEF_ENUM_FLAGS_TYPE (RE, EF);
-DEF_ENUM_FLAGS_TYPE (RE2, EF2);
-DEF_ENUM_FLAGS_TYPE (URE, UEF);
+DEF_ENUM_FLAGS_TYPE (RawEnum,         EnumFlag);
+DEF_ENUM_FLAGS_TYPE (RawEnum2,        EnumFlag2);
+DEF_ENUM_FLAGS_TYPE (UnsignedRawEnum, UnsignedEnumFlag);
 
 /* So that std::vectors of types that have enum_flags fields can
    reallocate efficiently memcpy.  */
-static_assert (std::is_trivially_copyable<EF>::value);
+static_assert (std::is_trivially_copyable<EnumFlag>::value);
 
 /* A couple globals used as lvalues in the CHECK_VALID expressions
    below.  Their names (and types) match the uppercase type names
    exposed by CHECK_VALID just to make the expressions easier to
    follow.  */
-static RE re ATTRIBUTE_UNUSED;
-static EF ef ATTRIBUTE_UNUSED;
+static RawEnum re ATTRIBUTE_UNUSED;
+static EnumFlag ef ATTRIBUTE_UNUSED;
 
 /* First, compile-time tests that:
 
@@ -82,30 +82,32 @@ static EF ef ATTRIBUTE_UNUSED;
      types do compile and that they return the correct type.
 */
 
-#define CHECK_VALID(VALID, EXPR_TYPE, EXPR)		\
-  CHECK_VALID_EXPR_6 (EF, RE, EF2, RE2, UEF, URE, VALID, EXPR_TYPE, EXPR)
+#define CHECK_VALID(VALID, EXPR_TYPE, EXPR)                                \
+  CHECK_VALID_EXPR_6 (EnumFlag, RawEnum, EnumFlag2, RawEnum2,              \
+		      UnsignedEnumFlag, UnsignedRawEnum, VALID, EXPR_TYPE, \
+		      EXPR)
 
-typedef std::underlying_type<RE>::type und;
+using und = std::underlying_type<RawEnum>::type;
 
 /* Test construction / conversion from/to different types.  */
 
 /* RE/EF -> underlying (explicit) */
-CHECK_VALID (true,  und,  und (RE ()))
-CHECK_VALID (true,  und,  und (EF ()))
+CHECK_VALID (true, und, und (RawEnum ()))
+CHECK_VALID (true, und, und (EnumFlag ()))
 
 /* RE/EF -> int (explicit) */
-CHECK_VALID (true,  int,  int (RE ()))
-CHECK_VALID (true,  int,  int (EF ()))
+CHECK_VALID (true, int, int (RawEnum ()))
+CHECK_VALID (true, int, int (EnumFlag ()))
 
 /* other -> RE */
 
 /* You can construct a raw enum value from an int explicitly to punch
    a hole in the type system if need to.  */
-CHECK_VALID (true,  RE,   RE (1))
-CHECK_VALID (true,  RE,   RE (RE2 ()))
-CHECK_VALID (false, void, RE (EF2 ()))
-CHECK_VALID (true,  RE,   RE (RE ()))
-CHECK_VALID (false, void, RE (EF ()))
+CHECK_VALID (true,  RawEnum, RawEnum (1))
+CHECK_VALID (true,  RawEnum, RawEnum (RawEnum2 ()))
+CHECK_VALID (false, void,    RawEnum (EnumFlag2 ()))
+CHECK_VALID (true,  RawEnum, RawEnum (RawEnum ()))
+CHECK_VALID (false, void,    RawEnum (EnumFlag ()))
 
 /* other -> EF.  */
 
@@ -113,125 +115,125 @@ CHECK_VALID (false, void, RE (EF ()))
    enum.  Unlike with raw enums, you can't construct an enum flags
    from an integer nor from an unrelated enum type explicitly.  Add an
    intermediate conversion via the raw enum if you really need it.  */
-CHECK_VALID (false, void, EF (1))
-CHECK_VALID (false, void, EF (1u))
-CHECK_VALID (false, void, EF (RE2 ()))
-CHECK_VALID (false, void, EF (EF2 ()))
-CHECK_VALID (true,  EF,   EF (RE ()))
-CHECK_VALID (true,  EF,   EF (EF ()))
+CHECK_VALID (false, void,     EnumFlag (1))
+CHECK_VALID (false, void,     EnumFlag (1u))
+CHECK_VALID (false, void,     EnumFlag (RawEnum2 ()))
+CHECK_VALID (false, void,     EnumFlag (EnumFlag2 ()))
+CHECK_VALID (true,  EnumFlag, EnumFlag (RawEnum ()))
+CHECK_VALID (true,  EnumFlag, EnumFlag (EnumFlag ()))
 
 /* Test operators.  */
 
 /* operator OP (raw_enum, int) */
 
-CHECK_VALID (false, void, RE () | 1)
-CHECK_VALID (false, void, RE () & 1)
-CHECK_VALID (false, void, RE () ^ 1)
+CHECK_VALID (false, void, RawEnum () | 1)
+CHECK_VALID (false, void, RawEnum () & 1)
+CHECK_VALID (false, void, RawEnum () ^ 1)
 
 /* operator OP (int, raw_enum) */
 
-CHECK_VALID (false, void, 1 | RE ())
-CHECK_VALID (false, void, 1 & RE ())
-CHECK_VALID (false, void, 1 ^ RE ())
+CHECK_VALID (false, void, 1 | RawEnum ())
+CHECK_VALID (false, void, 1 & RawEnum ())
+CHECK_VALID (false, void, 1 ^ RawEnum ())
 
 /* operator OP (enum_flags, int) */
 
-CHECK_VALID (false, void, EF () | 1)
-CHECK_VALID (false, void, EF () & 1)
-CHECK_VALID (false, void, EF () ^ 1)
+CHECK_VALID (false, void, EnumFlag () | 1)
+CHECK_VALID (false, void, EnumFlag () & 1)
+CHECK_VALID (false, void, EnumFlag () ^ 1)
 
 /* operator OP (int, enum_flags) */
 
-CHECK_VALID (false, void, 1 | EF ())
-CHECK_VALID (false, void, 1 & EF ())
-CHECK_VALID (false, void, 1 ^ EF ())
+CHECK_VALID (false, void, 1 | EnumFlag ())
+CHECK_VALID (false, void, 1 & EnumFlag ())
+CHECK_VALID (false, void, 1 ^ EnumFlag ())
 
 /* operator OP (raw_enum, raw_enum) */
 
-CHECK_VALID (false, void, RE () | RE2 ())
-CHECK_VALID (false, void, RE () & RE2 ())
-CHECK_VALID (false, void, RE () ^ RE2 ())
-CHECK_VALID (true,  RE,   RE () | RE ())
-CHECK_VALID (true,  RE,   RE () & RE ())
-CHECK_VALID (true,  RE,   RE () ^ RE ())
+CHECK_VALID (false, void,    RawEnum () | RawEnum2 ())
+CHECK_VALID (false, void,    RawEnum () & RawEnum2 ())
+CHECK_VALID (false, void,    RawEnum () ^ RawEnum2 ())
+CHECK_VALID (true,  RawEnum, RawEnum () | RawEnum ())
+CHECK_VALID (true,  RawEnum, RawEnum () & RawEnum ())
+CHECK_VALID (true,  RawEnum, RawEnum () ^ RawEnum ())
 
 /* operator OP (enum_flags, raw_enum) */
 
-CHECK_VALID (false, void, EF () | RE2 ())
-CHECK_VALID (false, void, EF () & RE2 ())
-CHECK_VALID (false, void, EF () ^ RE2 ())
-CHECK_VALID (true,  EF,   EF () | RE ())
-CHECK_VALID (true,  EF,   EF () & RE ())
-CHECK_VALID (true,  EF,   EF () ^ RE ())
+CHECK_VALID (false, void,     EnumFlag () | RawEnum2 ())
+CHECK_VALID (false, void,     EnumFlag () & RawEnum2 ())
+CHECK_VALID (false, void,     EnumFlag () ^ RawEnum2 ())
+CHECK_VALID (true,  EnumFlag, EnumFlag () | RawEnum ())
+CHECK_VALID (true,  EnumFlag, EnumFlag () & RawEnum ())
+CHECK_VALID (true,  EnumFlag, EnumFlag () ^ RawEnum ())
 
 /* operator OP= (raw_enum, raw_enum), rvalue ref on the lhs. */
 
-CHECK_VALID (false, void, RE () |= RE2 ())
-CHECK_VALID (false, void, RE () &= RE2 ())
-CHECK_VALID (false, void, RE () ^= RE2 ())
-CHECK_VALID (false, void, RE () |= RE ())
-CHECK_VALID (false, void, RE () &= RE ())
-CHECK_VALID (false, void, RE () ^= RE ())
+CHECK_VALID (false, void, RawEnum () |= RawEnum2 ())
+CHECK_VALID (false, void, RawEnum () &= RawEnum2 ())
+CHECK_VALID (false, void, RawEnum () ^= RawEnum2 ())
+CHECK_VALID (false, void, RawEnum () |= RawEnum ())
+CHECK_VALID (false, void, RawEnum () &= RawEnum ())
+CHECK_VALID (false, void, RawEnum () ^= RawEnum ())
 
 /* operator OP= (raw_enum, raw_enum), lvalue ref on the lhs. */
 
-CHECK_VALID (false, void, re |= RE2 ())
-CHECK_VALID (false, void, re &= RE2 ())
-CHECK_VALID (false, void, re ^= RE2 ())
-CHECK_VALID (true,  RE&,  re |= RE ())
-CHECK_VALID (true,  RE&,  re &= RE ())
-CHECK_VALID (true,  RE&,  re ^= RE ())
+CHECK_VALID (false, void,     re |= RawEnum2 ())
+CHECK_VALID (false, void,     re &= RawEnum2 ())
+CHECK_VALID (false, void,     re ^= RawEnum2 ())
+CHECK_VALID (true,  RawEnum&, re |= RawEnum ())
+CHECK_VALID (true,  RawEnum&, re &= RawEnum ())
+CHECK_VALID (true,  RawEnum&, re ^= RawEnum ())
 
 /* operator OP= (enum_flags, raw_enum), rvalue ref on the lhs.  */
 
-CHECK_VALID (false, void, EF () |= RE2 ())
-CHECK_VALID (false, void, EF () &= RE2 ())
-CHECK_VALID (false, void, EF () ^= RE2 ())
-CHECK_VALID (false, void, EF () |= RE ())
-CHECK_VALID (false, void, EF () &= RE ())
-CHECK_VALID (false, void, EF () ^= RE ())
+CHECK_VALID (false, void, EnumFlag () |= RawEnum2 ())
+CHECK_VALID (false, void, EnumFlag () &= RawEnum2 ())
+CHECK_VALID (false, void, EnumFlag () ^= RawEnum2 ())
+CHECK_VALID (false, void, EnumFlag () |= RawEnum ())
+CHECK_VALID (false, void, EnumFlag () &= RawEnum ())
+CHECK_VALID (false, void, EnumFlag () ^= RawEnum ())
 
 /* operator OP= (enum_flags, raw_enum), lvalue ref on the lhs.  */
 
-CHECK_VALID (false, void, ef |= RE2 ())
-CHECK_VALID (false, void, ef &= RE2 ())
-CHECK_VALID (false, void, ef ^= RE2 ())
-CHECK_VALID (true,  EF&,  ef |= EF ())
-CHECK_VALID (true,  EF&,  ef &= EF ())
-CHECK_VALID (true,  EF&,  ef ^= EF ())
+CHECK_VALID (false, void,      ef |= RawEnum2 ())
+CHECK_VALID (false, void,      ef &= RawEnum2 ())
+CHECK_VALID (false, void,      ef ^= RawEnum2 ())
+CHECK_VALID (true,  EnumFlag&, ef |= EnumFlag ())
+CHECK_VALID (true,  EnumFlag&, ef &= EnumFlag ())
+CHECK_VALID (true,  EnumFlag&, ef ^= EnumFlag ())
 
 /* operator OP= (enum_flags, enum_flags), rvalue ref on the lhs.  */
 
-CHECK_VALID (false, void, EF () |= EF2 ())
-CHECK_VALID (false, void, EF () &= EF2 ())
-CHECK_VALID (false, void, EF () ^= EF2 ())
-CHECK_VALID (false, void, EF () |= EF ())
-CHECK_VALID (false, void, EF () &= EF ())
-CHECK_VALID (false, void, EF () ^= EF ())
+CHECK_VALID (false, void, EnumFlag () |= EnumFlag2 ())
+CHECK_VALID (false, void, EnumFlag () &= EnumFlag2 ())
+CHECK_VALID (false, void, EnumFlag () ^= EnumFlag2 ())
+CHECK_VALID (false, void, EnumFlag () |= EnumFlag ())
+CHECK_VALID (false, void, EnumFlag () &= EnumFlag ())
+CHECK_VALID (false, void, EnumFlag () ^= EnumFlag ())
 
 /* operator OP= (enum_flags, enum_flags), lvalue ref on the lhs.  */
 
-CHECK_VALID (false, void, ef |= EF2 ())
-CHECK_VALID (false, void, ef &= EF2 ())
-CHECK_VALID (false, void, ef ^= EF2 ())
-CHECK_VALID (true,  EF&,  ef |= EF ())
-CHECK_VALID (true,  EF&,  ef &= EF ())
-CHECK_VALID (true,  EF&,  ef ^= EF ())
+CHECK_VALID (false, void, ef |= EnumFlag2 ())
+CHECK_VALID (false, void, ef &= EnumFlag2 ())
+CHECK_VALID (false, void, ef ^= EnumFlag2 ())
+CHECK_VALID (true,  EnumFlag&,  ef |= EnumFlag ())
+CHECK_VALID (true,  EnumFlag&,  ef &= EnumFlag ())
+CHECK_VALID (true,  EnumFlag&,  ef ^= EnumFlag ())
 
 /* operator~ (raw_enum) */
 
-CHECK_VALID (false,  void,   ~RE ())
-CHECK_VALID (true,   URE,    ~URE ())
+CHECK_VALID (false, void,            ~RawEnum ())
+CHECK_VALID (true,  UnsignedRawEnum, ~UnsignedRawEnum ())
 
 /* operator~ (enum_flags) */
 
-CHECK_VALID (false,  void,   ~EF ())
-CHECK_VALID (true,   UEF,    ~UEF ())
+CHECK_VALID (false, void,             ~EnumFlag ())
+CHECK_VALID (true,  UnsignedEnumFlag, ~UnsignedEnumFlag ())
 
 /* Check ternary operator.  This exercises implicit conversions.  */
 
-CHECK_VALID (true,  EF,   true ? EF () : RE ())
-CHECK_VALID (true,  EF,   true ? RE () : EF ())
+CHECK_VALID (true, EnumFlag, true ? EnumFlag () : RawEnum ())
+CHECK_VALID (true, EnumFlag, true ? RawEnum ()  : EnumFlag ())
 
 /* These are valid, but it's not a big deal since you won't be able to
    assign the resulting integer to an enum or an enum_flags without a
@@ -246,19 +248,19 @@ CHECK_VALID (true,  EF,   true ? RE () : EF ())
    They've been confirmed to compile/pass with gcc 5.3, gcc 7.1 and
    clang 3.7.  */
 
-CHECK_VALID (true,  int,  true ? EF () : EF2 ())
-CHECK_VALID (true,  int,  true ? EF2 () : EF ())
-CHECK_VALID (true,  int,  true ? EF () : RE2 ())
-CHECK_VALID (true,  int,  true ? RE2 () : EF ())
+CHECK_VALID (true, int, true ? EnumFlag ()  : EnumFlag2 ())
+CHECK_VALID (true, int, true ? EnumFlag2 () : EnumFlag ())
+CHECK_VALID (true, int, true ? EnumFlag ()  : RawEnum2 ())
+CHECK_VALID (true, int, true ? RawEnum2 ()  : EnumFlag ())
 
 /* Same, but with an unsigned enum.  */
 
-typedef unsigned int uns;
+using uns = unsigned int;
 
-CHECK_VALID (true,  uns,  true ? EF () : UEF ())
-CHECK_VALID (true,  uns,  true ? UEF () : EF ())
-CHECK_VALID (true,  uns,  true ? EF () : URE ())
-CHECK_VALID (true,  uns,  true ? URE () : EF ())
+CHECK_VALID (true, uns, true ? EnumFlag ()         : UnsignedEnumFlag ())
+CHECK_VALID (true, uns, true ? UnsignedEnumFlag () : EnumFlag ())
+CHECK_VALID (true, uns, true ? EnumFlag ()         : UnsignedRawEnum ())
+CHECK_VALID (true, uns, true ? UnsignedRawEnum ()  : EnumFlag ())
 
 /* Unfortunately this can't work due to the way C++ computes the
    return type of the ternary conditional operator.  int isn't
@@ -270,39 +272,39 @@ CHECK_VALID (true,  uns,  true ? URE () : EF ())
      error: operands to ?: have different types ‘enum_flags<RE>’ and ‘int’
    Confirmed to work with gcc 4.9, 5.3 and clang 3.7.
 */
-CHECK_VALID (false, void, true ? EF () : 0)
-CHECK_VALID (false, void, true ? 0 : EF ())
+CHECK_VALID (false, void, true ? EnumFlag () : 0)
+CHECK_VALID (false, void, true ? 0           : EnumFlag ())
 
 /* Check that the ++/--/<</>>/<<=/>>= operators are deleted.  */
 
-CHECK_VALID (false, void, RE ()++)
-CHECK_VALID (false, void, ++RE ())
-CHECK_VALID (false, void, --RE ())
-CHECK_VALID (false, void, RE ()--)
+CHECK_VALID (false, void, RawEnum ()++)
+CHECK_VALID (false, void, ++RawEnum ())
+CHECK_VALID (false, void, --RawEnum ())
+CHECK_VALID (false, void, RawEnum ()--)
 
-CHECK_VALID (false, void, RE () << 1)
-CHECK_VALID (false, void, RE () >> 1)
-CHECK_VALID (false, void, EF () << 1)
-CHECK_VALID (false, void, EF () >> 1)
+CHECK_VALID (false, void, RawEnum () << 1)
+CHECK_VALID (false, void, RawEnum () >> 1)
+CHECK_VALID (false, void, EnumFlag () << 1)
+CHECK_VALID (false, void, EnumFlag () >> 1)
 
-CHECK_VALID (false, void, RE () <<= 1)
-CHECK_VALID (false, void, RE () >>= 1)
-CHECK_VALID (false, void, EF () <<= 1)
-CHECK_VALID (false, void, EF () >>= 1)
+CHECK_VALID (false, void, RawEnum () <<= 1)
+CHECK_VALID (false, void, RawEnum () >>= 1)
+CHECK_VALID (false, void, EnumFlag () <<= 1)
+CHECK_VALID (false, void, EnumFlag () >>= 1)
 
 /* Test comparison operators.  */
 
-CHECK_VALID (false, void, EF () == EF2 ())
-CHECK_VALID (false, void, EF () == RE2 ())
-CHECK_VALID (false, void, RE () == EF2 ())
+CHECK_VALID (false, void, EnumFlag () == EnumFlag2 ())
+CHECK_VALID (false, void, EnumFlag () == RawEnum2 ())
+CHECK_VALID (false, void, RawEnum ()  == EnumFlag2 ())
 
-CHECK_VALID (true,  bool, EF (RE (1)) == EF (RE (1)))
-CHECK_VALID (true,  bool, EF (RE (1)) == RE (1))
-CHECK_VALID (true,  bool, RE (1)      == EF (RE (1)))
+CHECK_VALID (true,  bool, EnumFlag (RawEnum (1)) == EnumFlag (RawEnum (1)))
+CHECK_VALID (true,  bool, EnumFlag (RawEnum (1)) == RawEnum (1))
+CHECK_VALID (true,  bool, RawEnum (1)            == EnumFlag (RawEnum (1)))
 
-CHECK_VALID (false, void, EF () != EF2 ())
-CHECK_VALID (false, void, EF () != RE2 ())
-CHECK_VALID (false, void, RE () != EF2 ())
+CHECK_VALID (false, void, EnumFlag () != EnumFlag2 ())
+CHECK_VALID (false, void, EnumFlag () != RawEnum2 ())
+CHECK_VALID (false, void, RawEnum ()  != EnumFlag2 ())
 
 /* Disable -Wenum-compare due to:
 
@@ -323,23 +325,23 @@ CHECK_VALID (false, void, RE () != EF2 ())
 # pragma GCC diagnostic push
 # pragma GCC diagnostic ignored "-Wenum-compare"
 #endif
-CHECK_VALID (true,  bool, RE () == RE2 ())
-CHECK_VALID (true,  bool, RE () != RE2 ())
+CHECK_VALID (true,  bool, RawEnum () == RawEnum2 ())
+CHECK_VALID (true,  bool, RawEnum () != RawEnum2 ())
 #if defined __GNUC__
 # pragma GCC diagnostic pop
 #endif
 
-CHECK_VALID (true,  bool, EF (RE (1)) != EF (RE (2)))
-CHECK_VALID (true,  bool, EF (RE (1)) != RE (2))
-CHECK_VALID (true,  bool, RE (1)      != EF (RE (2)))
+CHECK_VALID (true,  bool, EnumFlag (RawEnum (1)) != EnumFlag (RawEnum (2)))
+CHECK_VALID (true,  bool, EnumFlag (RawEnum (1)) != RawEnum (2))
+CHECK_VALID (true,  bool, RawEnum (1)            != EnumFlag (RawEnum (2)))
 
-CHECK_VALID (true,  bool, EF () == 0)
+CHECK_VALID (true,  bool, EnumFlag () == 0)
 
 /* Check we didn't disable/delete comparison between non-flags enums
    and unrelated types by mistake.  */
-CHECK_VALID (true,  bool, NF (1) == NF (1))
-CHECK_VALID (true,  bool, NF (1) == int (1))
-CHECK_VALID (true,  bool, NF (1) == char (1))
+CHECK_VALID (true,  bool, NonFlagsEnum (1) == NonFlagsEnum (1))
+CHECK_VALID (true,  bool, NonFlagsEnum (1) == int (1))
+CHECK_VALID (true,  bool, NonFlagsEnum (1) == char (1))
 
 /* -------------------------------------------------------------------- */
 
diff --git a/gdb/unittests/intrusive_list-selftests.c b/gdb/unittests/intrusive_list-selftests.c
index b17ce92..fbd89ed 100644
--- a/gdb/unittests/intrusive_list-selftests.c
+++ b/gdb/unittests/intrusive_list-selftests.c
@@ -18,9 +18,15 @@
 
 
 #include "gdbsupport/intrusive_list.h"
+#include "gdbsupport/owning_intrusive_list.h"
 #include "gdbsupport/selftest.h"
 #include <unordered_set>
 
+/* Count of how many item_with_base or item_with_member objects are
+   currently alive.  */
+
+static int items_alive = 0;
+
 /* An item type using intrusive_list_node by inheriting from it and its
    corresponding list type.  Put another base before intrusive_list_node
    so that a pointer to the node != a pointer to the item.  */
@@ -35,7 +41,13 @@ struct item_with_base : public other_base,
 {
   explicit item_with_base (const char *name)
     : name (name)
-  {}
+  {
+    ++items_alive;
+  }
+
+  DISABLE_COPY_AND_ASSIGN (item_with_base);
+
+  ~item_with_base () { --items_alive; }
 
   const char *const name;
 };
@@ -50,64 +62,78 @@ struct item_with_member
 {
   explicit item_with_member (const char *name)
     : name (name)
-  {}
+  {
+    ++items_alive;
+  }
+
+  DISABLE_COPY_AND_ASSIGN (item_with_member);
+
+  ~item_with_member () { --items_alive; }
 
   const char *const name;
   intrusive_list_node<item_with_member> node;
 };
 
-using item_with_member_node
-  = intrusive_member_node<item_with_member, &item_with_member::node>;
-using item_with_member_list
-  = intrusive_list<item_with_member, item_with_member_node>;
+/* Verify that LIST contains exactly the items in EXPECTED.
 
-/* To run all tests using both the base and member methods, all tests are
-   declared in this templated class, which is instantiated once for each
-   list type.  */
+   Traverse the list forward and backwards to exercise all links.  */
 
 template <typename ListType>
-struct intrusive_list_test
+static void
+verify_items (const ListType &list,
+	      gdb::array_view<const typename ListType::value_type *> expected)
 {
   using item_type = typename ListType::value_type;
 
-  /* Verify that LIST contains exactly the items in EXPECTED.
+  int i = 0;
 
-     Traverse the list forward and backwards to exercise all links.  */
+  for (typename ListType::iterator it = list.begin (); it != list.end (); ++it)
+    {
+      const item_type &item = *it;
 
-  static void
-  verify_items (const ListType &list,
-		gdb::array_view<const typename ListType::value_type *> expected)
-  {
-    int i = 0;
+      SELF_CHECK (i < expected.size ());
+      SELF_CHECK (&item == expected[i]);
 
-    for (typename ListType::iterator it = list.begin ();
-	 it != list.end ();
-	 ++it)
-      {
-	const item_type &item = *it;
+      /* Access the item, to make sure the object is still alive.  */
+      SELF_CHECK (strcmp (item.name, expected[i]->name) == 0);
 
-	SELF_CHECK (i < expected.size ());
-	SELF_CHECK (&item == expected[i]);
+      ++i;
+    }
 
-	++i;
-      }
+  SELF_CHECK (i == expected.size ());
 
-    SELF_CHECK (i == expected.size ());
+  for (typename ListType::reverse_iterator it = list.rbegin ();
+       it != list.rend (); ++it)
+    {
+      const item_type &item = *it;
 
-    for (typename ListType::reverse_iterator it = list.rbegin ();
-	 it != list.rend ();
-	 ++it)
-      {
-	const item_type &item = *it;
+      --i;
 
-	--i;
+      SELF_CHECK (i >= 0);
+      SELF_CHECK (&item == expected[i]);
 
-	SELF_CHECK (i >= 0);
-	SELF_CHECK (&item == expected[i]);
-      }
+      /* Access the item, to make sure the object is still alive.  */
+      SELF_CHECK (strcmp (item.name, expected[i]->name) == 0);
+    }
 
-    SELF_CHECK (i == 0);
-  }
+  SELF_CHECK (i == 0);
+}
+
+/* intrusive_list tests
+
+   To run all tests using both the base and member methods, all tests are
+   declared in this templated class, which is instantiated once for each
+   list type.  */
+
+using item_with_member_node
+  = intrusive_member_node<item_with_member, &item_with_member::node>;
+using item_with_member_list
+  = intrusive_list<item_with_member, item_with_member_node>;
+
+template <typename ListType>
+struct intrusive_list_test
+{
+  using item_type = typename ListType::value_type;
 
   static void
   test_move_constructor ()
@@ -446,15 +472,18 @@ struct intrusive_list_test
       ListType list;
 
 
-      list.insert (list.begin (), a);
+      auto a_it = list.insert (list.begin (), a);
+      SELF_CHECK (&*a_it == &a);
       expected = {&a};
       verify_items (list, expected);
 
-      list.insert (list.begin (), b);
+      auto b_it = list.insert (list.begin (), b);
+      SELF_CHECK (&*b_it == &b);
       expected = {&b, &a};
       verify_items (list, expected);
 
-      list.insert (list.begin (), c);
+      auto c_it = list.insert (list.begin (), c);
+      SELF_CHECK (&*c_it == &c);
       expected = {&c, &b, &a};
       verify_items (list, expected);
     }
@@ -465,15 +494,18 @@ struct intrusive_list_test
       ListType list;
 
 
-      list.insert (list.end (), a);
+      auto a_it = list.insert (list.end (), a);
+      SELF_CHECK (&*a_it == &a);
       expected = {&a};
       verify_items (list, expected);
 
-      list.insert (list.end (), b);
+      auto b_it = list.insert (list.end (), b);
+      SELF_CHECK (&*b_it == &b);
       expected = {&a, &b};
       verify_items (list, expected);
 
-      list.insert (list.end (), c);
+      auto c_it = list.insert (list.end (), c);
+      SELF_CHECK (&*c_it == &c);
       expected = {&a, &b, &c};
       verify_items (list, expected);
     }
@@ -486,7 +518,8 @@ struct intrusive_list_test
       list.push_back (a);
       list.push_back (b);
 
-      list.insert (list.iterator_to (b), c);
+      auto c_it = list.insert (list.iterator_to (b), c);
+      SELF_CHECK (&*c_it == &c);
       expected = {&a, &c, &b};
       verify_items (list, expected);
     }
@@ -496,7 +529,8 @@ struct intrusive_list_test
       item_type a ("a");
       ListType list;
 
-      list.insert (list.end (), a);
+      auto a_it = list.insert (list.end (), a);
+      SELF_CHECK (&*a_it == &a);
       expected = {&a};
       verify_items (list, expected);
     }
@@ -773,6 +807,811 @@ test_intrusive_list_1 ()
   tests.test_begin_end ();
 }
 
+/* owning_intrusive_list tests
+
+   To run all tests using both the base and member methods, all tests are
+   declared in this templated class, which is instantiated once for each
+   list type.  */
+
+using item_with_base_owning_list = owning_intrusive_list<item_with_base>;
+using item_with_member_owning_list
+  = owning_intrusive_list<item_with_member, item_with_member_node>;
+
+template<typename ListType>
+struct owning_intrusive_list_test
+{
+  using item_type = typename ListType::value_type;
+
+  static void test_move_constructor ()
+  {
+    {
+      /* Other list is not empty.  */
+      ListType list1;
+      std::vector<const item_type *> expected;
+
+      auto &a = list1.emplace_back ("a");
+      auto &b = list1.emplace_back ("b");
+      auto &c = list1.emplace_back ("c");
+
+      SELF_CHECK (items_alive == 3);
+      ListType list2 (std::move (list1));
+      SELF_CHECK (items_alive == 3);
+
+      expected = {};
+      verify_items (list1, expected);
+
+      expected = { &a, &b, &c };
+      verify_items (list2, expected);
+    }
+
+    {
+      /* Other list contains 1 element.  */
+      ListType list1;
+      std::vector<const item_type *> expected;
+
+      auto &a = list1.emplace_back ("a");
+
+      SELF_CHECK (items_alive == 1);
+      ListType list2 (std::move (list1));
+      SELF_CHECK (items_alive == 1);
+
+      expected = {};
+      verify_items (list1, expected);
+
+      expected = { &a };
+      verify_items (list2, expected);
+    }
+
+    {
+      /* Other list is empty.  */
+      ListType list1;
+      std::vector<const item_type *> expected;
+
+      SELF_CHECK (items_alive == 0);
+      ListType list2 (std::move (list1));
+      SELF_CHECK (items_alive == 0);
+
+      expected = {};
+      verify_items (list1, expected);
+
+      expected = {};
+      verify_items (list2, expected);
+    }
+  }
+
+  static void test_move_assignment ()
+  {
+    {
+      /* Both lists are not empty.  */
+      ListType list1;
+      ListType list2;
+      std::vector<const item_type *> expected;
+
+      auto &a = list1.emplace_back ("a");
+      auto &b = list1.emplace_back ("b");
+      auto &c = list1.emplace_back ("c");
+
+      list2.emplace_back ("d");
+      list2.emplace_back ("e");
+
+      SELF_CHECK (items_alive == 5);
+      list2 = std::move (list1);
+      SELF_CHECK (items_alive == 3);
+
+      expected = {};
+      verify_items (list1, expected);
+
+      expected = { &a, &b, &c };
+      verify_items (list2, expected);
+    }
+
+    {
+      /* rhs list is empty.  */
+      ListType list1;
+      ListType list2;
+      std::vector<const item_type *> expected;
+
+      list2.emplace_back ("a");
+      list2.emplace_back ("b");
+      list2.emplace_back ("c");
+
+      SELF_CHECK (items_alive == 3);
+      list2 = std::move (list1);
+      SELF_CHECK (items_alive == 0);
+
+      expected = {};
+      verify_items (list1, expected);
+
+      expected = {};
+      verify_items (list2, expected);
+    }
+
+    {
+      /* lhs list is empty.  */
+      ListType list1;
+      ListType list2;
+      std::vector<const item_type *> expected;
+
+      auto &a = list1.emplace_back ("a");
+      auto &b = list1.emplace_back ("b");
+      auto &c = list1.emplace_back ("c");
+
+      SELF_CHECK (items_alive == 3);
+      list2 = std::move (list1);
+      SELF_CHECK (items_alive == 3);
+
+      expected = {};
+      verify_items (list1, expected);
+
+      expected = { &a, &b, &c };
+      verify_items (list2, expected);
+    }
+
+    {
+      /* Both lists contain 1 item.  */
+      ListType list1;
+      ListType list2;
+      std::vector<const item_type *> expected;
+
+      auto &a = list1.emplace_back ("a");
+      list2.emplace_back ("b");
+
+      SELF_CHECK (items_alive == 2);
+      list2 = std::move (list1);
+      SELF_CHECK (items_alive == 1);
+
+      expected = {};
+      verify_items (list1, expected);
+
+      expected = { &a };
+      verify_items (list2, expected);
+    }
+
+    {
+      /* Both lists are empty.  */
+      ListType list1;
+      ListType list2;
+      std::vector<const item_type *> expected;
+
+      SELF_CHECK (items_alive == 0);
+      list2 = std::move (list1);
+      SELF_CHECK (items_alive == 0);
+
+      expected = {};
+      verify_items (list1, expected);
+
+      expected = {};
+      verify_items (list2, expected);
+    }
+  }
+
+  static void test_swap ()
+  {
+    {
+      /* Two non-empty lists.  */
+      ListType list1;
+      ListType list2;
+      std::vector<const item_type *> expected;
+
+      auto &a = list1.emplace_back ("a");
+      auto &b = list1.emplace_back ("b");
+      auto &c = list1.emplace_back ("c");
+
+      auto &d = list2.emplace_back ("d");
+      auto &e = list2.emplace_back ("e");
+
+      SELF_CHECK (items_alive == 5);
+      std::swap (list1, list2);
+      SELF_CHECK (items_alive == 5);
+
+      expected = { &d, &e };
+      verify_items (list1, expected);
+
+      expected = { &a, &b, &c };
+      verify_items (list2, expected);
+    }
+
+    {
+      /* Other is empty.  */
+      ListType list1;
+      ListType list2;
+      std::vector<const item_type *> expected;
+
+      auto &a = list1.emplace_back ("a");
+      auto &b = list1.emplace_back ("b");
+      auto &c = list1.emplace_back ("c");
+
+      SELF_CHECK (items_alive == 3);
+      std::swap (list1, list2);
+      SELF_CHECK (items_alive == 3);
+
+      expected = {};
+      verify_items (list1, expected);
+
+      expected = { &a, &b, &c };
+      verify_items (list2, expected);
+    }
+
+    {
+      /* *this is empty.  */
+      ListType list1;
+      ListType list2;
+      std::vector<const item_type *> expected;
+
+      auto &a = list2.emplace_back ("a");
+      auto &b = list2.emplace_back ("b");
+      auto &c = list2.emplace_back ("c");
+
+      SELF_CHECK (items_alive == 3);
+      std::swap (list1, list2);
+      SELF_CHECK (items_alive == 3);
+
+      expected = { &a, &b, &c };
+      verify_items (list1, expected);
+
+      expected = {};
+      verify_items (list2, expected);
+    }
+
+    {
+      /* Both lists empty.  */
+      ListType list1;
+      ListType list2;
+      std::vector<const item_type *> expected;
+
+      SELF_CHECK (items_alive == 0);
+      std::swap (list1, list2);
+      SELF_CHECK (items_alive == 0);
+
+      expected = {};
+      verify_items (list1, expected);
+
+      expected = {};
+      verify_items (list2, expected);
+    }
+
+    {
+      /* Swap one element twice.  */
+      ListType list1;
+      ListType list2;
+      std::vector<const item_type *> expected;
+
+      auto &a = list1.emplace_back ("a");
+
+      SELF_CHECK (items_alive == 1);
+      std::swap (list1, list2);
+      SELF_CHECK (items_alive == 1);
+
+      expected = {};
+      verify_items (list1, expected);
+
+      expected = { &a };
+      verify_items (list2, expected);
+
+      std::swap (list1, list2);
+      SELF_CHECK (items_alive == 1);
+
+      expected = { &a };
+      verify_items (list1, expected);
+
+      expected = {};
+      verify_items (list2, expected);
+    }
+  }
+
+  static void test_front_back ()
+  {
+    ListType list;
+    const ListType &clist = list;
+
+    auto &a = list.emplace_back ("a");
+    list.emplace_back ("b");
+    auto &c = list.emplace_back ("c");
+
+    SELF_CHECK (&list.front () == &a);
+    SELF_CHECK (&clist.front () == &a);
+    SELF_CHECK (&list.back () == &c);
+    SELF_CHECK (&clist.back () == &c);
+  }
+
+  static void test_push_front ()
+  {
+    ListType list;
+    std::vector<const item_type *> expected;
+
+    SELF_CHECK (items_alive == 0);
+    list.push_front (std::make_unique<item_type> ("a"));
+    auto &a = list.front ();
+    expected = { &a };
+    verify_items (list, expected);
+    SELF_CHECK (items_alive == 1);
+
+    list.push_front (std::make_unique<item_type> ("b"));
+    auto &b = list.front ();
+    expected = { &b, &a };
+    verify_items (list, expected);
+    SELF_CHECK (items_alive == 2);
+
+    list.push_front (std::make_unique<item_type> ("c"));
+    auto &c = list.front ();
+    expected = { &c, &b, &a };
+    verify_items (list, expected);
+    SELF_CHECK (items_alive == 3);
+  }
+
+  static void test_push_back ()
+  {
+    ListType list;
+    std::vector<const item_type *> expected;
+
+    SELF_CHECK (items_alive == 0);
+    list.push_back (std::make_unique<item_type> ("a"));
+    auto &a = list.back ();
+    expected = { &a };
+    verify_items (list, expected);
+    SELF_CHECK (items_alive == 1);
+
+    list.push_back (std::make_unique<item_type> ("b"));
+    auto &b = list.back ();
+    expected = { &a, &b };
+    verify_items (list, expected);
+    SELF_CHECK (items_alive == 2);
+
+    list.push_back (std::make_unique<item_type> ("c"));
+    auto &c = list.back ();
+    expected = { &a, &b, &c };
+    verify_items (list, expected);
+    SELF_CHECK (items_alive == 3);
+  }
+
+  static void test_insert ()
+  {
+    std::vector<const item_type *> expected;
+
+    {
+      /* Insert at beginning.  */
+      ListType list;
+
+      auto &a = *list.insert (list.begin (), std::make_unique<item_type> ("a"));
+      expected = { &a };
+      verify_items (list, expected);
+      SELF_CHECK (items_alive == 1);
+
+      auto &b = *list.insert (list.begin (), std::make_unique<item_type> ("b"));
+      expected = { &b, &a };
+      verify_items (list, expected);
+      SELF_CHECK (items_alive == 2);
+
+      auto &c = *list.insert (list.begin (), std::make_unique<item_type> ("c"));
+      expected = { &c, &b, &a };
+      verify_items (list, expected);
+      SELF_CHECK (items_alive == 3);
+    }
+
+    {
+      /* Insert at end.  */
+      ListType list;
+
+      auto &a = *list.insert (list.end (), std::make_unique<item_type> ("a"));
+      expected = { &a };
+      verify_items (list, expected);
+      SELF_CHECK (items_alive == 1);
+
+      auto &b = *list.insert (list.end (), std::make_unique<item_type> ("b"));
+      expected = { &a, &b };
+      verify_items (list, expected);
+      SELF_CHECK (items_alive == 2);
+
+      auto &c = *list.insert (list.end (), std::make_unique<item_type> ("c"));
+      expected = { &a, &b, &c };
+      verify_items (list, expected);
+      SELF_CHECK (items_alive == 3);
+    }
+
+    {
+      /* Insert in the middle.  */
+      ListType list;
+
+      auto &a = list.emplace_back ("a");
+      auto &b = list.emplace_back ("b");
+
+      SELF_CHECK (items_alive == 2);
+      auto &c = *list.insert (list.iterator_to (b),
+			      std::make_unique<item_type> ("c"));
+      expected = { &a, &c, &b };
+      verify_items (list, expected);
+      SELF_CHECK (items_alive == 3);
+    }
+
+    {
+      /* Insert in empty list. */
+      ListType list;
+
+      SELF_CHECK (items_alive == 0);
+      auto &a = *list.insert (list.end (), std::make_unique<item_type> ("a"));
+      expected = { &a };
+      verify_items (list, expected);
+      SELF_CHECK (items_alive == 1);
+    }
+  }
+
+  static void test_emplace_front ()
+  {
+    ListType list;
+    std::vector<const item_type *> expected;
+
+    SELF_CHECK (items_alive == 0);
+    auto &a = list.emplace_front ("a");
+    expected = { &a };
+    verify_items (list, expected);
+    SELF_CHECK (items_alive == 1);
+
+    auto &b = list.emplace_front ("b");
+    expected = { &b, &a };
+    verify_items (list, expected);
+    SELF_CHECK (items_alive == 2);
+
+    auto &c = list.emplace_front ("c");
+    expected = { &c, &b, &a };
+    verify_items (list, expected);
+    SELF_CHECK (items_alive == 3);
+  }
+
+  static void test_emplace_back ()
+  {
+    ListType list;
+    std::vector<const item_type *> expected;
+
+    SELF_CHECK (items_alive == 0);
+    auto &a = list.emplace_back ("a");
+    expected = { &a };
+    verify_items (list, expected);
+    SELF_CHECK (items_alive == 1);
+
+    auto &b = list.emplace_back ("b");
+    expected = { &a, &b };
+    verify_items (list, expected);
+    SELF_CHECK (items_alive == 2);
+
+    auto &c = list.emplace_back ("c");
+    expected = { &a, &b, &c };
+    verify_items (list, expected);
+    SELF_CHECK (items_alive == 3);
+  }
+
+  static void test_emplace ()
+  {
+    std::vector<const item_type *> expected;
+
+    {
+      /* Emplace at beginning.  */
+      ListType list;
+
+      auto &a = list.emplace (list.begin (), "a");
+      expected = { &a };
+      verify_items (list, expected);
+      SELF_CHECK (items_alive == 1);
+
+      auto &b = list.emplace (list.begin (), "b");
+      expected = { &b, &a };
+      verify_items (list, expected);
+      SELF_CHECK (items_alive == 2);
+
+      auto &c = list.emplace (list.begin (), "c");
+      expected = { &c, &b, &a };
+      verify_items (list, expected);
+      SELF_CHECK (items_alive == 3);
+    }
+
+    {
+      /* Emplace at end.  */
+      ListType list;
+
+      auto &a = list.emplace (list.end (), "a");
+      expected = { &a };
+      verify_items (list, expected);
+      SELF_CHECK (items_alive == 1);
+
+      auto &b = list.emplace (list.end (), "b");
+      expected = { &a, &b };
+      verify_items (list, expected);
+      SELF_CHECK (items_alive == 2);
+
+      auto &c = list.emplace (list.end (), "c");
+      expected = { &a, &b, &c };
+      verify_items (list, expected);
+      SELF_CHECK (items_alive == 3);
+    }
+
+    {
+      /* Emplace in the middle.  */
+      ListType list;
+
+      auto &a = list.emplace_back ("a");
+      auto &b = list.emplace_back ("b");
+
+      SELF_CHECK (items_alive == 2);
+      auto &c = list.emplace (list.iterator_to (b), "c");
+      expected = { &a, &c, &b };
+      verify_items (list, expected);
+      SELF_CHECK (items_alive == 3);
+    }
+
+    {
+      /* Emplace in empty list. */
+      ListType list;
+
+      SELF_CHECK (items_alive == 0);
+      auto &a = list.emplace (list.end (), "a");
+      expected = { &a };
+      verify_items (list, expected);
+      SELF_CHECK (items_alive == 1);
+    }
+  }
+
+  static void test_splice ()
+  {
+    {
+      /* Two non-empty lists.  */
+      ListType list1;
+      ListType list2;
+      std::vector<const item_type *> expected;
+
+      auto &a = list1.emplace_back ("a");
+      auto &b = list1.emplace_back ("b");
+      auto &c = list1.emplace_back ("c");
+
+      auto &d = list2.emplace_back ("d");
+      auto &e = list2.emplace_back ("e");
+
+      SELF_CHECK (items_alive == 5);
+      list1.splice (std::move (list2));
+      SELF_CHECK (items_alive == 5);
+
+      expected = { &a, &b, &c, &d, &e };
+      verify_items (list1, expected);
+
+      expected = {};
+      verify_items (list2, expected);
+    }
+
+    {
+      /* Receiving list empty.  */
+      ListType list1;
+      ListType list2;
+      std::vector<const item_type *> expected;
+
+      auto &a = list2.emplace_back ("a");
+      auto &b = list2.emplace_back ("b");
+      auto &c = list2.emplace_back ("c");
+
+      SELF_CHECK (items_alive == 3);
+      list1.splice (std::move (list2));
+      SELF_CHECK (items_alive == 3);
+
+      expected = { &a, &b, &c };
+      verify_items (list1, expected);
+
+      expected = {};
+      verify_items (list2, expected);
+    }
+
+    {
+      /* Giving list empty.  */
+      ListType list1;
+      ListType list2;
+      std::vector<const item_type *> expected;
+
+      auto &a = list1.emplace_back ("a");
+      auto &b = list1.emplace_back ("b");
+      auto &c = list1.emplace_back ("c");
+
+      SELF_CHECK (items_alive == 3);
+      list1.splice (std::move (list2));
+      SELF_CHECK (items_alive == 3);
+
+      expected = { &a, &b, &c };
+      verify_items (list1, expected);
+
+      expected = {};
+      verify_items (list2, expected);
+    }
+
+    {
+      /* Both lists empty.  */
+      ListType list1;
+      ListType list2;
+      std::vector<const item_type *> expected;
+
+      SELF_CHECK (items_alive == 0);
+      list1.splice (std::move (list2));
+      SELF_CHECK (items_alive == 0);
+
+      expected = {};
+      verify_items (list1, expected);
+
+      expected = {};
+      verify_items (list2, expected);
+    }
+  }
+
+  static void test_pop_front ()
+  {
+    ListType list;
+    std::vector<const item_type *> expected;
+
+    list.emplace_back ("a");
+    auto &b = list.emplace_back ("b");
+    auto &c = list.emplace_back ("c");
+
+    SELF_CHECK (items_alive == 3);
+    list.pop_front ();
+    expected = { &b, &c };
+    verify_items (list, expected);
+    SELF_CHECK (items_alive == 2);
+
+    list.pop_front ();
+    expected = { &c };
+    verify_items (list, expected);
+    SELF_CHECK (items_alive == 1);
+
+    list.pop_front ();
+    expected = {};
+    verify_items (list, expected);
+    SELF_CHECK (items_alive == 0);
+  }
+
+  static void test_pop_back ()
+  {
+    ListType list;
+    std::vector<const item_type *> expected;
+
+    auto &a = list.emplace_back ("a");
+    auto &b = list.emplace_back ("b");
+    list.emplace_back ("c");
+
+    SELF_CHECK (items_alive == 3);
+    list.pop_back ();
+    expected = { &a, &b };
+    verify_items (list, expected);
+    SELF_CHECK (items_alive == 2);
+
+    list.pop_back ();
+    expected = { &a };
+    verify_items (list, expected);
+    SELF_CHECK (items_alive == 1);
+
+    list.pop_back ();
+    expected = {};
+    verify_items (list, expected);
+    SELF_CHECK (items_alive == 0);
+  }
+
+  static void test_release ()
+  {
+    ListType list;
+    std::vector<const item_type *> expected;
+
+    auto &a = list.emplace_back ("a");
+    auto &b = list.emplace_back ("b");
+    auto &c = list.emplace_back ("c");
+
+    {
+      SELF_CHECK (items_alive == 3);
+      auto [next_it, released] = list.release (list.iterator_to (b));
+      SELF_CHECK (&*next_it == &c);
+      expected = { &a, &c };
+      verify_items (list, expected);
+      SELF_CHECK (items_alive == 3);
+      released.reset ();
+      SELF_CHECK (items_alive == 2);
+    }
+
+    {
+      auto [next_it, released] = list.release (list.iterator_to (c));
+      SELF_CHECK (next_it == list.end ());
+      expected = { &a };
+      verify_items (list, expected);
+      SELF_CHECK (items_alive == 2);
+      released.reset ();
+      SELF_CHECK (items_alive == 1);
+    }
+
+    {
+      auto [next_it, released] = list.release (list.iterator_to (a));
+      SELF_CHECK (next_it == list.end ());
+      expected = {};
+      verify_items (list, expected);
+      SELF_CHECK (items_alive == 1);
+      released.reset ();
+      SELF_CHECK (items_alive == 0);
+    }
+  }
+
+  static void test_clear ()
+  {
+    ListType list;
+    std::vector<const item_type *> expected;
+
+    list.emplace_back ("a");
+    list.emplace_back ("b");
+    list.emplace_back ("c");
+
+    SELF_CHECK (items_alive == 3);
+    list.clear ();
+    expected = {};
+    verify_items (list, expected);
+    SELF_CHECK (items_alive == 0);
+
+    /* Verify idempotency.  */
+    list.clear ();
+    expected = {};
+    verify_items (list, expected);
+    SELF_CHECK (items_alive == 0);
+  }
+
+  static void test_empty ()
+  {
+    ListType list;
+
+    SELF_CHECK (list.empty ());
+    auto &a = list.emplace_back ("a");
+    SELF_CHECK (!list.empty ());
+    list.erase (list.iterator_to (a));
+    SELF_CHECK (list.empty ());
+  }
+
+  static void test_begin_end ()
+  {
+    ListType list;
+    const ListType &clist = list;
+
+    auto &a = list.emplace_back ("a");
+    list.emplace_back ("b");
+    auto &c = list.emplace_back ("c");
+
+    SELF_CHECK (&*list.begin () == &a);
+    SELF_CHECK (&*list.cbegin () == &a);
+    SELF_CHECK (&*clist.begin () == &a);
+    SELF_CHECK (&*list.rbegin () == &c);
+    SELF_CHECK (&*list.crbegin () == &c);
+    SELF_CHECK (&*clist.rbegin () == &c);
+
+    /* At least check that they compile.  */
+    list.end ();
+    list.cend ();
+    clist.end ();
+    list.rend ();
+    list.crend ();
+    clist.end ();
+  }
+};
+
+template<typename ListType>
+static void
+test_owning_intrusive_list_1 ()
+{
+  owning_intrusive_list_test<ListType> tests;
+
+  tests.test_move_constructor ();
+  tests.test_move_assignment ();
+  tests.test_swap ();
+  tests.test_front_back ();
+  tests.test_push_front ();
+  tests.test_push_back ();
+  tests.test_insert ();
+  tests.test_emplace_front ();
+  tests.test_emplace_back ();
+  tests.test_emplace ();
+  tests.test_splice ();
+  tests.test_pop_front ();
+  tests.test_pop_back ();
+  tests.test_release ();
+  tests.test_clear ();
+  tests.test_empty ();
+  tests.test_begin_end ();
+}
+
 static void
 test_node_is_linked ()
 {
@@ -804,13 +1643,15 @@ test_intrusive_list ()
 {
   test_intrusive_list_1<item_with_base_list> ();
   test_intrusive_list_1<item_with_member_list> ();
+  test_owning_intrusive_list_1<item_with_base_owning_list> ();
+  test_owning_intrusive_list_1<item_with_member_owning_list> ();
   test_node_is_linked ();
 }
 
 void _initialize_intrusive_list_selftests ();
+
 void
 _initialize_intrusive_list_selftests ()
 {
-  selftests::register_test
-    ("intrusive_list", test_intrusive_list);
+  selftests::register_test ("intrusive_list", test_intrusive_list);
 }
diff --git a/gdb/unittests/scoped_mmap-selftests.c b/gdb/unittests/scoped_mmap-selftests.c
index 7b3a6f5..09a94ed 100644
--- a/gdb/unittests/scoped_mmap-selftests.c
+++ b/gdb/unittests/scoped_mmap-selftests.c
@@ -114,7 +114,7 @@ test_invalid_filename ()
 
   try {
       ::scoped_mmap m = ::mmap_file ("/this/file/should/not/exist");
-  } catch (gdb_exception &e) {
+  } catch (const gdb_exception &e) {
       threw = true;
   }
 
diff --git a/gdb/user-regs.c b/gdb/user-regs.c
index ac04f63..2ace46e 100644
--- a/gdb/user-regs.c
+++ b/gdb/user-regs.c
@@ -222,9 +222,19 @@ maintenance_print_user_registers (const char *args, int from_tty)
   struct gdb_user_regs *regs = get_user_regs (gdbarch);
   regnum = gdbarch_num_cooked_regs (gdbarch);
 
-  gdb_printf (" %-11s %3s\n", "Name", "Nr");
+  ui_out_emit_table emitter (current_uiout, 2, -1, "UserRegs");
+
+  current_uiout->table_header (11, ui_left, "name", "Name");
+  current_uiout->table_header (3, ui_left, "regnum", "Nr");
+  current_uiout->table_body ();
+
   for (reg = regs->first; reg != NULL; reg = reg->next, ++regnum)
-    gdb_printf (" %-11s %3d\n", reg->name, regnum);
+    {
+      ui_out_emit_tuple tuple_emitter (current_uiout, nullptr);
+      current_uiout->field_string ("name", reg->name);
+      current_uiout->field_signed ("regnum", regnum);
+      current_uiout->text ("\n");
+    }
 }
 
 void _initialize_user_regs ();
diff --git a/gdb/utils.c b/gdb/utils.c
index 9431030..a1bf9e4 100644
--- a/gdb/utils.c
+++ b/gdb/utils.c
@@ -80,6 +80,7 @@
 #include "gdbsupport/buildargv.h"
 #include "pager.h"
 #include "run-on-main-thread.h"
+#include "gdbsupport/gdb_tilde_expand.h"
 
 void (*deprecated_error_begin_hook) (void);
 
@@ -818,7 +819,9 @@ defaulted_query (const char *ctlstr, const char defchar, va_list args)
     }
 
   /* Format the question outside of the loop, to avoid reusing args.  */
-  std::string question = string_vprintf (ctlstr, args);
+  string_file tem (gdb_stdout->can_emit_style_escape ());
+  gdb_vprintf (&tem, ctlstr, args);
+  std::string question = tem.release ();
   std::string prompt
     = string_printf (_("%s%s(%s or %s) %s"),
 		     annotation_level > 1 ? "\n\032\032pre-query\n" : "",
@@ -1281,6 +1284,14 @@ set_screen_width_and_height (int width, int height)
   set_width ();
 }
 
+/* Import termcap variable UP (instead of readline private variable
+   _rl_term_up, which we're trying to avoid, see PR build/10723).  The UP
+   variable doesn't seem be part of the regular termcap interface, but rather
+   curses-specific.  But if it's missing in the termcap library, then readline
+   provides a fallback version.  Let's assume the fallback is not part of the
+   private readline interface.  */
+extern "C" char *UP;
+
 /* Implement "maint info screen".  */
 
 static void
@@ -1339,6 +1350,46 @@ maintenance_info_screen (const char *args, int from_tty)
 	      _("Number of lines environment thinks "
 		"are in a page is %s (LINES).\n"),
 	      getenv ("LINES"));
+
+  bool have_up = UP != nullptr && *UP != '\0';
+
+  /* Fetch value of readline variable horizontal-scroll-mode.  */
+  const char *horizontal_scroll_mode_value
+    = rl_variable_value ("horizontal-scroll-mode");
+  bool force_horizontal_scroll_mode
+    = (horizontal_scroll_mode_value != nullptr
+       && strcmp (horizontal_scroll_mode_value, "on") == 0);
+
+  const char *mode = nullptr;
+  const char *reason = nullptr;
+  if (batch_flag)
+    {
+      mode = "unsupported";
+      reason = "gdb batch mode";
+    }
+  else if (!have_up)
+    {
+      mode = "unsupported";
+      reason = "terminal is not Cursor Up capable";
+    }
+  else if (force_horizontal_scroll_mode)
+    {
+      mode = "disabled";
+      reason = "horizontal-scroll-mode";
+    }
+  else if (readline_hidden_cols)
+    {
+      mode = "readline";
+      reason = "terminal is not auto wrap capable, last column reserved";
+    }
+  else
+    {
+      mode = "terminal";
+      reason = "terminal is auto wrap capable";
+    }
+
+  gdb_printf (gdb_stdout, _("Readline wrapping mode: %s (%s).\n"), mode,
+	      reason);
 }
 
 void
@@ -3667,6 +3718,23 @@ copy_bitwise (gdb_byte *dest, ULONGEST dest_offset,
     }
 }
 
+/* See utils.h.  */
+
+std::string
+extract_single_filename_arg (const char *args)
+{
+  if (args == nullptr)
+    return {};
+
+  std::string filename = extract_string_maybe_quoted (&args);
+  args = skip_spaces (args);
+  if (*args != '\0')
+    error (_("Junk after filename \"%s\": %s"), filename.c_str (), args);
+  if (!filename.empty ())
+    filename = gdb_tilde_expand (filename.c_str ());
+  return filename;
+}
+
 #if GDB_SELF_TEST
 static void
 test_assign_set_return_if_changed ()
diff --git a/gdb/utils.h b/gdb/utils.h
index 90c8012..d69c81c 100644
--- a/gdb/utils.h
+++ b/gdb/utils.h
@@ -371,6 +371,20 @@ assign_return_if_changed (T &lval, const T &val)
   return true;
 }
 
+/* ARG is an argument string as passed to a GDB command which is expected
+   to contain a single, possibly quoted, filename argument.  Extract the
+   filename and return it as a string.  If the filename is quoted then the
+   quotes will have been removed.  If the filename is not quoted then any
+   escaping within the filename will have been removed.
+
+   If there is any content in ARG after the filename then an error will be
+   thrown complaining about the extra content.
+
+   If there is no filename in ARG, or if ARG is nullptr, then an empty
+   string will be returned.  */
+
+extern std::string extract_single_filename_arg (const char *arg);
+
 /* A class that can be used to intercept warnings.  A class is used
    here, rather than a gdb::function_view because it proved difficult
    to use a function view in conjunction with ATTRIBUTE_PRINTF in a
diff --git a/gdb/v850-tdep.c b/gdb/v850-tdep.c
index 531fdb4..de1cc6c 100644
--- a/gdb/v850-tdep.c
+++ b/gdb/v850-tdep.c
@@ -201,7 +201,7 @@ enum
     E_R149_REGNUM,
     E_NUM_OF_V850E2_REGS,
 
-    /* v850e3v5 system registers, selID 1 thru 7.  */
+    /* v850e3v5 system registers, selID 1 through 7.  */
     E_SELID_1_R0_REGNUM = E_NUM_OF_V850E2_REGS,
     E_SELID_1_R31_REGNUM = E_SELID_1_R0_REGNUM + 31,
 
@@ -1047,7 +1047,7 @@ v850_push_dummy_call (struct gdbarch *gdbarch,
 
   /* Now load as many as possible of the first arguments into
      registers, and push the rest onto the stack.  There are 16 bytes
-     in four registers available.  Loop thru args from first to last.  */
+     in four registers available.  Loop through args from first to last.  */
   for (argnum = 0; argnum < nargs; argnum++)
     {
       int len;
diff --git a/gdb/valops.c b/gdb/valops.c
index a0e945c..88a42d3 100644
--- a/gdb/valops.c
+++ b/gdb/valops.c
@@ -40,7 +40,6 @@
 #include "observable.h"
 #include "objfiles.h"
 #include "extension.h"
-#include "gdbtypes.h"
 #include "gdbsupport/byte-vector.h"
 #include "typeprint.h"
 
@@ -129,8 +128,8 @@ find_function_in_inferior (const char *name, struct objfile **objf_p)
     }
   else
     {
-      struct bound_minimal_symbol msymbol = 
-	lookup_bound_minimal_symbol (name);
+      bound_minimal_symbol msymbol
+	= lookup_minimal_symbol (current_program_space, name);
 
       if (msymbol.minsym != NULL)
 	{
@@ -1487,7 +1486,7 @@ value_coerce_to_target (struct value *val)
    nonzero lower bound.
 
    FIXME: A previous comment here indicated that this routine should
-   be substracting the array's lower bound.  It's not clear to me that
+   be subtracting the array's lower bound.  It's not clear to me that
    this is correct.  Given an array subscripting operation, it would
    certainly work to do the adjustment here, essentially computing:
 
diff --git a/gdb/value.c b/gdb/value.c
index 09fb19b..d9b3c6e 100644
--- a/gdb/value.c
+++ b/gdb/value.c
@@ -1700,25 +1700,7 @@ value::record_latest ()
      the value was taken, and fast watchpoints should be able to assume that
      a value on the value history never changes.  */
   if (lazy ())
-    {
-      /* We know that this is a _huge_ array, any attempt to fetch this
-	 is going to cause GDB to throw an error.  However, to allow
-	 the array to still be displayed we fetch its contents up to
-	 `max_value_size' and mark anything beyond "unavailable" in
-	 the history.  */
-      if (m_type->code () == TYPE_CODE_ARRAY
-	  && m_type->length () > max_value_size
-	  && array_length_limiting_element_count.has_value ()
-	  && m_enclosing_type == m_type
-	  && calculate_limited_array_length (m_type) <= max_value_size)
-	m_limited_length = max_value_size;
-
-      fetch_lazy ();
-    }
-
-  ULONGEST limit = m_limited_length;
-  if (limit != 0)
-    mark_bytes_unavailable (limit, m_enclosing_type->length () - limit);
+    fetch_lazy ();
 
   /* Mark the value as recorded in the history for the availability check.  */
   m_in_history = true;
@@ -2992,8 +2974,8 @@ value_static_field (struct type *type, int fieldno)
 	{
 	  /* With some compilers, e.g. HP aCC, static data members are
 	     reported as non-debuggable symbols.  */
-	  struct bound_minimal_symbol msym
-	    = lookup_minimal_symbol (phys_name, NULL, NULL);
+	  bound_minimal_symbol msym
+	    = lookup_minimal_symbol (current_program_space, phys_name);
 	  struct type *field_type = type->field (fieldno).type ();
 
 	  if (!msym.minsym)
@@ -3175,13 +3157,13 @@ value_fn_field (struct value **arg1p, struct fn_field *f,
   struct type *ftype = TYPE_FN_FIELD_TYPE (f, j);
   const char *physname = TYPE_FN_FIELD_PHYSNAME (f, j);
   struct symbol *sym;
-  struct bound_minimal_symbol msym;
+  bound_minimal_symbol msym;
 
   sym = lookup_symbol (physname, nullptr, SEARCH_FUNCTION_DOMAIN,
 		       nullptr).symbol;
   if (sym == nullptr)
     {
-      msym = lookup_bound_minimal_symbol (physname);
+      msym = lookup_minimal_symbol (current_program_space, physname);
       if (msym.minsym == NULL)
 	return NULL;
     }
@@ -3990,6 +3972,11 @@ value::fetch_lazy_memory ()
   if (len > 0)
     read_value_memory (this, 0, stack (), addr,
 		       contents_all_raw ().data (), len);
+
+  /* If only part of an array was loaded, mark the rest as unavailable.  */
+  if (m_limited_length > 0)
+    mark_bytes_unavailable (m_limited_length,
+			    m_enclosing_type->length () - m_limited_length);
 }
 
 /* See value.h.  */
diff --git a/gdb/varobj.c b/gdb/varobj.c
index 0cd0bd0..04f1fc8 100644
--- a/gdb/varobj.c
+++ b/gdb/varobj.c
@@ -323,10 +323,7 @@ varobj_create (const char *objname,
 	}
 
       /* Don't allow variables to be created for types.  */
-      enum exp_opcode opcode = var->root->exp->first_opcode ();
-      if (opcode == OP_TYPE
-	  || opcode == OP_TYPEOF
-	  || opcode == OP_DECLTYPE)
+      if (var->root->exp->type_p ())
 	{
 	  gdb_printf (gdb_stderr, "Attempt to use a type name"
 		      " as an expression.\n");
diff --git a/gdb/x86-tdep.c b/gdb/x86-tdep.c
index 5d7aa95..e50b5fb 100644
--- a/gdb/x86-tdep.c
+++ b/gdb/x86-tdep.c
@@ -42,7 +42,7 @@ bool
 x86_in_indirect_branch_thunk (CORE_ADDR pc, const char * const *register_names,
 			      int lo, int hi)
 {
-  struct bound_minimal_symbol bmfun = lookup_minimal_symbol_by_pc (pc);
+  bound_minimal_symbol bmfun = lookup_minimal_symbol_by_pc (pc);
   if (bmfun.minsym == nullptr)
     return false;
 
diff --git a/gdb/yy-remap.h b/gdb/yy-remap.h
index e32ce39..b3fcbc6 100644
--- a/gdb/yy-remap.h
+++ b/gdb/yy-remap.h
@@ -19,7 +19,7 @@
 #define YY_REMAP_H
 
 /* Remap normal yacc parser interface names (yyparse, yylex, yyerror,
-   etc), as well as gratuitiously global symbol names, so we can have
+   etc), as well as gratuitously global symbol names, so we can have
    multiple yacc generated parsers in gdb.  Note that these are only
    the variables produced by yacc.  If other parser generators (bison,
    byacc, etc) produce additional global names that conflict at link
diff --git a/gdb/z80-tdep.c b/gdb/z80-tdep.c
index 23cdb68..c442b60 100644
--- a/gdb/z80-tdep.c
+++ b/gdb/z80-tdep.c
@@ -356,8 +356,8 @@ z80_scan_prologue (struct gdbarch *gdbarch, CORE_ADDR pc_beg, CORE_ADDR pc_end,
   /* stage2: check for FP saving scheme */
   if (prologue[pos] == 0xcd) /* call nn */
     {
-      struct bound_minimal_symbol msymbol;
-      msymbol = lookup_minimal_symbol ("__sdcc_enter_ix", NULL, NULL);
+      bound_minimal_symbol msymbol
+	= lookup_minimal_symbol (current_program_space, "__sdcc_enter_ix");
       if (msymbol.minsym)
 	{
 	  value = msymbol.value_address ();
@@ -621,8 +621,8 @@ z80_frame_unwind_cache (const frame_info_ptr &this_frame,
 		break; /* found */
 	      for (i = sizeof(names)/sizeof(*names)-1; i >= 0; --i)
 		{
-		  struct bound_minimal_symbol msymbol;
-		  msymbol = lookup_minimal_symbol (names[i], NULL, NULL);
+		  bound_minimal_symbol msymbol
+		    = lookup_minimal_symbol (current_program_space, names[i]);
 		  if (!msymbol.minsym)
 		    continue;
 		  if (addr == msymbol.value_address ())
@@ -719,8 +719,8 @@ z80_breakpoint_kind_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pcptr)
   static int addr = -1;
   if (addr == -1)
     {
-      struct bound_minimal_symbol bh;
-      bh = lookup_minimal_symbol ("_break_handler", NULL, NULL);
+      bound_minimal_symbol bh
+	= lookup_minimal_symbol (current_program_space, "_break_handler");
       if (bh.minsym)
 	addr = bh.value_address ();
       else
@@ -894,14 +894,13 @@ read_target_long_array (CORE_ADDR memaddr, unsigned int *myaddr,
 static int
 z80_read_overlay_region_table ()
 {
-  struct bound_minimal_symbol novly_regions_msym;
-  struct bound_minimal_symbol ovly_region_table_msym;
   struct gdbarch *gdbarch;
   int word_size;
   enum bfd_endian byte_order;
 
   z80_free_overlay_region_table ();
-  novly_regions_msym = lookup_minimal_symbol ("_novly_regions", NULL, NULL);
+  bound_minimal_symbol novly_regions_msym
+    = lookup_minimal_symbol (current_program_space, "_novly_regions");
   if (! novly_regions_msym.minsym)
     {
       error (_("Error reading inferior's overlay table: "
@@ -910,7 +909,8 @@ z80_read_overlay_region_table ()
       return 0;
     }
 
-  ovly_region_table_msym = lookup_bound_minimal_symbol ("_ovly_region_table");
+  bound_minimal_symbol ovly_region_table_msym
+    = lookup_minimal_symbol (current_program_space, "_ovly_region_table");
   if (! ovly_region_table_msym.minsym)
     {
       error (_("Error reading inferior's overlay table: couldn't find "
diff --git a/gdbserver/config.in b/gdbserver/config.in
index 47e1e72..65f9ff6 100644
--- a/gdbserver/config.in
+++ b/gdbserver/config.in
@@ -312,6 +312,9 @@
 /* Define to 1 if you have the <string.h> header file. */
 #undef HAVE_STRING_H
 
+/* Define to 1 if `variant.ptwrite' is a member of `struct pt_event'. */
+#undef HAVE_STRUCT_PT_EVENT_VARIANT_PTWRITE
+
 /* Define to 1 if `enabled' is a member of `struct pt_insn'. */
 #undef HAVE_STRUCT_PT_INSN_ENABLED
 
diff --git a/gdbserver/configure b/gdbserver/configure
index 8d38b95..09cb3c5 100755
--- a/gdbserver/configure
+++ b/gdbserver/configure
@@ -10219,6 +10219,17 @@ _ACEOF
 
 fi
 
+      ac_fn_c_check_member "$LINENO" "struct pt_event" "variant.ptwrite" "ac_cv_member_struct_pt_event_variant_ptwrite" "#include <intel-pt.h>
+"
+if test "x$ac_cv_member_struct_pt_event_variant_ptwrite" = xyes; then :
+
+cat >>confdefs.h <<_ACEOF
+#define HAVE_STRUCT_PT_EVENT_VARIANT_PTWRITE 1
+_ACEOF
+
+
+fi
+
       LIBS=$save_LIBS
     fi
   fi
diff --git a/gdbserver/i387-fp.cc b/gdbserver/i387-fp.cc
index 4d8bcb5..0bf57a3 100644
--- a/gdbserver/i387-fp.cc
+++ b/gdbserver/i387-fp.cc
@@ -23,8 +23,6 @@
 /* Default to SSE.  */
 static uint64_t x86_xcr0 = X86_XSTATE_SSE_MASK;
 
-static const int num_mpx_bnd_registers = 4;
-static const int num_mpx_cfg_registers = 2;
 static const int num_avx512_k_registers = 8;
 static const int num_pkeys_registers = 1;
 
@@ -118,15 +116,6 @@ public:
   unsigned char *ymmh_space ()
   { return xsave () + xsave_layout.avx_offset; }
 
-  /* Memory address of 4 bound registers values of 128 bits.  */
-  unsigned char *bndregs_space ()
-  { return xsave () + xsave_layout.bndregs_offset; }
-
-  /* Memory address of 2 MPX configuration registers of 64 bits
-     plus reserved space.  */
-  unsigned char *bndcfg_space ()
-  { return xsave () + xsave_layout.bndcfg_offset; }
-
   /* Memory address of 8 OpMask register values of 64 bits.  */
   unsigned char *k_space ()
   { return xsave () + xsave_layout.k_offset; }
@@ -308,14 +297,6 @@ i387_cache_to_xsave (struct regcache *regcache, void *buf)
       if ((clear_bv & X86_XSTATE_SSE) && (clear_bv & X86_XSTATE_AVX))
 	memset (((char *) &fp->mxcsr), 0, 4);
 
-      if ((clear_bv & X86_XSTATE_BNDREGS))
-	for (i = 0; i < num_mpx_bnd_registers; i++)
-	  memset (fp->bndregs_space () + i * 16, 0, 16);
-
-      if ((clear_bv & X86_XSTATE_BNDCFG))
-	for (i = 0; i < num_mpx_cfg_registers; i++)
-	  memset (fp->bndcfg_space () + i * 8, 0, 8);
-
       if ((clear_bv & X86_XSTATE_K))
 	for (i = 0; i < num_avx512_k_registers; i++)
 	  memset (fp->k_space () + i * 8, 0, 8);
@@ -384,40 +365,6 @@ i387_cache_to_xsave (struct regcache *regcache, void *buf)
 	}
     }
 
-  /* Check if any bound register has changed.  */
-  if ((x86_xcr0 & X86_XSTATE_BNDREGS))
-    {
-     int bnd0r_regnum = find_regno (regcache->tdesc, "bnd0raw");
-
-      for (i = 0; i < num_mpx_bnd_registers; i++)
-	{
-	  collect_register (regcache, i + bnd0r_regnum, raw);
-	  p = fp->bndregs_space () + i * 16;
-	  if (memcmp (raw, p, 16))
-	    {
-	      xstate_bv |= X86_XSTATE_BNDREGS;
-	      memcpy (p, raw, 16);
-	    }
-	}
-    }
-
-  /* Check if any status register has changed.  */
-  if ((x86_xcr0 & X86_XSTATE_BNDCFG))
-    {
-      int bndcfg_regnum = find_regno (regcache->tdesc, "bndcfgu");
-
-      for (i = 0; i < num_mpx_cfg_registers; i++)
-	{
-	  collect_register (regcache, i + bndcfg_regnum, raw);
-	  p = fp->bndcfg_space () + i * 8;
-	  if (memcmp (raw, p, 8))
-	    {
-	      xstate_bv |= X86_XSTATE_BNDCFG;
-	      memcpy (p, raw, 8);
-	    }
-	}
-    }
-
   /* Check if any K registers are changed.  */
   if ((x86_xcr0 & X86_XSTATE_K))
     {
@@ -765,42 +712,6 @@ i387_xsave_to_cache (struct regcache *regcache, const void *buf)
 	}
     }
 
-  if ((x86_xcr0 & X86_XSTATE_BNDREGS))
-    {
-      int bnd0r_regnum = find_regno (regcache->tdesc, "bnd0raw");
-
-
-      if ((clear_bv & X86_XSTATE_BNDREGS) != 0)
-	{
-	  for (i = 0; i < num_mpx_bnd_registers; i++)
-	    supply_register_zeroed (regcache, i + bnd0r_regnum);
-	}
-      else
-	{
-	  p = fp->bndregs_space ();
-	  for (i = 0; i < num_mpx_bnd_registers; i++)
-	    supply_register (regcache, i + bnd0r_regnum, p + i * 16);
-	}
-
-    }
-
-  if ((x86_xcr0 & X86_XSTATE_BNDCFG))
-    {
-      int bndcfg_regnum = find_regno (regcache->tdesc, "bndcfgu");
-
-      if ((clear_bv & X86_XSTATE_BNDCFG) != 0)
-	{
-	  for (i = 0; i < num_mpx_cfg_registers; i++)
-	    supply_register_zeroed (regcache, i + bndcfg_regnum);
-	}
-      else
-	{
-	  p = fp->bndcfg_space ();
-	  for (i = 0; i < num_mpx_cfg_registers; i++)
-	    supply_register (regcache, i + bndcfg_regnum, p + i * 8);
-	}
-    }
-
   if ((x86_xcr0 & X86_XSTATE_K) != 0)
     {
       int k0_regnum = find_regno (regcache->tdesc, "k0");
diff --git a/gdbserver/linux-aarch32-low.h b/gdbserver/linux-aarch32-low.h
index a33159b..b684a5d 100644
--- a/gdbserver/linux-aarch32-low.h
+++ b/gdbserver/linux-aarch32-low.h
@@ -33,7 +33,6 @@ int arm_breakpoint_at (CORE_ADDR where);
 
 void initialize_low_arch_aarch32 (void);
 
-void init_registers_arm_with_neon (void);
 int arm_is_thumb_mode (void);
 
 #endif /* GDBSERVER_LINUX_AARCH32_LOW_H */
diff --git a/gdbserver/linux-aarch64-low.cc b/gdbserver/linux-aarch64-low.cc
index eb30c31..998ad0a 100644
--- a/gdbserver/linux-aarch64-low.cc
+++ b/gdbserver/linux-aarch64-low.cc
@@ -1538,7 +1538,7 @@ emit_add (uint32_t *buf, struct aarch64_register rd,
 
    RD is the destination register.
    RN is the input register.
-   IMM is the immediate to substract to RN.  */
+   IMM is the immediate to subtract to RN.  */
 
 static int
 emit_sub (uint32_t *buf, struct aarch64_register rd,
diff --git a/gdbserver/linux-aarch64-tdesc.cc b/gdbserver/linux-aarch64-tdesc.cc
index 5d3b6dd..31ec785 100644
--- a/gdbserver/linux-aarch64-tdesc.cc
+++ b/gdbserver/linux-aarch64-tdesc.cc
@@ -52,14 +52,10 @@ aarch64_linux_read_description (const aarch64_features &features)
     {
       tdesc = aarch64_create_target_description (features);
 
-      /* Configure the expedited registers.  By default we include x29, sp
-	 and pc, but we allow for up to 6 pointers as this is (currently)
-	 the most that we push.
-
-	 Calling init_target_desc takes a copy of all the strings pointed
-	 to by expedited_registers so this vector only needs to live for
-	 the scope of this function.  */
-      std::vector<const char *> expedited_registers (6);
+      /* Configure the expedited registers.  Calling init_target_desc takes
+	 a copy of all the strings pointed to by expedited_registers so this
+	 vector only needs to live for the scope of this function.  */
+      std::vector<const char *> expedited_registers;
       expedited_registers.push_back ("x29");
       expedited_registers.push_back ("sp");
       expedited_registers.push_back ("pc");
diff --git a/gdbserver/linux-arc-low.cc b/gdbserver/linux-arc-low.cc
index dda224f..1bcaf6c 100644
--- a/gdbserver/linux-arc-low.cc
+++ b/gdbserver/linux-arc-low.cc
@@ -282,7 +282,7 @@ arc_store_gregset (struct regcache *regcache, const void *buf)
   unsigned long pcl = regbuf->stop_pc & ~3L;
   supply_register_by_name (regcache, "pcl", &pcl);
 
-  /* Other auxilliary registers.  */
+  /* Other auxiliary registers.  */
   supply_register_by_name (regcache, "status32", &(regbuf->scratch.status32));
 
   /* BTA.  */
diff --git a/gdbserver/linux-arm-low.cc b/gdbserver/linux-arm-low.cc
index ee89949..af534c7 100644
--- a/gdbserver/linux-arm-low.cc
+++ b/gdbserver/linux-arm-low.cc
@@ -361,7 +361,7 @@ get_next_pcs_is_thumb (struct arm_get_next_pcs *self)
 }
 
 /* Read memory from the inferior.
-   BYTE_ORDER is ignored and there to keep compatiblity with GDB's
+   BYTE_ORDER is ignored and there to keep compatibility with GDB's
    read_memory_unsigned_integer. */
 static ULONGEST
 get_next_pcs_read_memory_unsigned_integer (CORE_ADDR memaddr,
diff --git a/gdbserver/linux-low.cc b/gdbserver/linux-low.cc
index 266c7de..79512c0 100644
--- a/gdbserver/linux-low.cc
+++ b/gdbserver/linux-low.cc
@@ -6968,6 +6968,11 @@ linux_process_target::read_btrace_conf (const btrace_target_info *tinfo,
 	  string_xml_appendf (*buffer, "<pt");
 	  string_xml_appendf (*buffer, " size=\"0x%x\"", conf->pt.size);
 	  string_xml_appendf (*buffer, "/>\n");
+	  string_xml_appendf (*buffer, " ptwrite=\"%s\"",
+			     conf->pt.ptwrite ? "yes" : "no");
+	  string_xml_appendf (*buffer, " event-tracing=\"%s\"",
+			     conf->pt.event_tracing ? "yes" : "no");
+	  string_xml_appendf (*buffer, "/>\n");
 	  break;
 	}
     }
diff --git a/gdbserver/linux-x86-low.cc b/gdbserver/linux-x86-low.cc
index e4a455c..afb1954 100644
--- a/gdbserver/linux-x86-low.cc
+++ b/gdbserver/linux-x86-low.cc
@@ -240,6 +240,8 @@ static const int x86_64_regmap[] =
   -1, -1, -1, -1, -1, -1, -1, -1,
   ORIG_RAX * 8,
   21 * 8,  22 * 8,
+  /* MPX is deprecated.  Yet we keep this to not give the registers below
+     a new number.  That could break older gdbs.  */
   -1, -1, -1, -1,			/* MPX registers BND0 ... BND3.  */
   -1, -1,				/* MPX registers BNDCFGU, BNDSTATUS.  */
   -1, -1, -1, -1, -1, -1, -1, -1,       /* xmm16 ... xmm31 (AVX512)  */
diff --git a/gdbserver/netbsd-amd64-low.cc b/gdbserver/netbsd-amd64-low.cc
index 2c8c711..b3f3aab 100644
--- a/gdbserver/netbsd-amd64-low.cc
+++ b/gdbserver/netbsd-amd64-low.cc
@@ -63,6 +63,8 @@ enum netbsd_x86_64_gdb_regnum
   AMD64_MXCSR_REGNUM = AMD64_XMM0_REGNUM + 16,
   AMD64_YMM0H_REGNUM,	   /* %ymm0h */
   AMD64_YMM15H_REGNUM = AMD64_YMM0H_REGNUM + 15,
+  /* MPX is deprecated.  Yet we keep this to not give the registers below
+     a new number.  That could break older gdbservers.  */
   AMD64_BND0R_REGNUM = AMD64_YMM15H_REGNUM + 1,
   AMD64_BND3R_REGNUM = AMD64_BND0R_REGNUM + 3,
   AMD64_BNDCFGU_REGNUM,
diff --git a/gdbserver/server.cc b/gdbserver/server.cc
index 87b2a26..69ffb72 100644
--- a/gdbserver/server.cc
+++ b/gdbserver/server.cc
@@ -537,6 +537,32 @@ handle_btrace_conf_general_set (char *own_buf)
 
       current_btrace_conf.pt.size = (unsigned int) size;
     }
+  else if (strncmp (op, "pt:ptwrite=", strlen ("pt:ptwrite=")) == 0)
+    {
+      op += strlen ("pt:ptwrite=");
+      if (strncmp (op, "\"yes\"", strlen ("\"yes\"")) == 0)
+	current_btrace_conf.pt.ptwrite = true;
+      else if (strncmp (op, "\"no\"", strlen ("\"no\"")) == 0)
+	current_btrace_conf.pt.ptwrite = false;
+      else
+	{
+	  strcpy (own_buf, "E.Bad ptwrite value.");
+	  return -1;
+	}
+    }
+  else if (strncmp (op, "pt:event-tracing=", strlen ("pt:event-tracing=")) == 0)
+    {
+      op += strlen ("pt:event-tracing=");
+      if (strncmp (op, "\"yes\"", strlen ("\"yes\"")) == 0)
+	current_btrace_conf.pt.event_tracing = true;
+      else if (strncmp (op, "\"no\"", strlen ("\"no\"")) == 0)
+	current_btrace_conf.pt.event_tracing = false;
+      else
+	{
+	  strcpy (own_buf, "E.Bad event-tracing value.");
+	  return -1;
+	}
+    }
   else
     {
       strcpy (own_buf, "E.Bad Qbtrace configuration option.");
@@ -1760,7 +1786,7 @@ struct qxfer
      the starting point.  The ANNEX can be used to provide additional
      data-specific information to the target.
 
-     Return the number of bytes actually transfered, zero when no
+     Return the number of bytes actually transferred, zero when no
      further transfer is possible, -1 on error, -2 when the transfer
      is not supported, and -3 on a verbose error message that should
      be preserved.  Return of a positive value smaller than LEN does
@@ -2484,6 +2510,8 @@ supported_btrace_packets (char *buf)
   strcat (buf, ";Qbtrace-conf:bts:size+");
   strcat (buf, ";Qbtrace:pt+");
   strcat (buf, ";Qbtrace-conf:pt:size+");
+  strcat (buf, ";Qbtrace-conf:pt:ptwrite+");
+  strcat (buf, ";Qbtrace-conf:pt:event-tracing+");
   strcat (buf, ";Qbtrace:off+");
   strcat (buf, ";qXfer:btrace:read+");
   strcat (buf, ";qXfer:btrace-conf:read+");
@@ -4195,6 +4223,10 @@ captured_main (int argc, char *argv[])
 	  /* "-" specifies a stdio connection and is a form of port
 	     specification.  */
 	  port = STDIO_CONNECTION_NAME;
+
+	  /* Implying --once here prevents a hang after stdin has been closed.  */
+	  run_once = true;
+
 	  next_arg++;
 	  break;
 	}
diff --git a/gdbserver/tdesc.cc b/gdbserver/tdesc.cc
index 3265793..d052f43 100644
--- a/gdbserver/tdesc.cc
+++ b/gdbserver/tdesc.cc
@@ -20,12 +20,6 @@
 
 #ifndef IN_PROCESS_AGENT
 
-target_desc::~target_desc ()
-{
-  xfree ((char *) arch);
-  xfree ((char *) osabi);
-}
-
 bool target_desc::operator== (const target_desc &other) const
 {
   if (reg_defs != other.reg_defs)
@@ -162,7 +156,7 @@ tdesc_compatible_info_arch_name (const tdesc_compatible_info_up &c_info)
 const char *
 tdesc_architecture_name (const struct target_desc *target_desc)
 {
-  return target_desc->arch;
+  return target_desc->arch.get ();
 }
 
 /* See gdbsupport/tdesc.h.  */
@@ -171,7 +165,7 @@ void
 set_tdesc_architecture (struct target_desc *target_desc,
 			const char *name)
 {
-  target_desc->arch = xstrdup (name);
+  target_desc->arch = make_unique_xstrdup (name);
 }
 
 /* See gdbsupport/tdesc.h.  */
@@ -179,15 +173,16 @@ set_tdesc_architecture (struct target_desc *target_desc,
 const char *
 tdesc_osabi_name (const struct target_desc *target_desc)
 {
-  return target_desc->osabi;
+  return target_desc->osabi.get ();
 }
 
 /* See gdbsupport/tdesc.h.  */
 
 void
-set_tdesc_osabi (struct target_desc *target_desc, const char *name)
+set_tdesc_osabi (struct target_desc *target_desc, enum gdb_osabi osabi)
 {
-  target_desc->osabi = xstrdup (name);
+  const char *name = gdbarch_osabi_name (osabi);
+  target_desc->osabi = make_unique_xstrdup (name);
 }
 
 /* See gdbsupport/tdesc.h.  */
@@ -198,7 +193,7 @@ tdesc_get_features_xml (const target_desc *tdesc)
   /* Either .xmltarget or .features is not NULL.  */
   gdb_assert (tdesc->xmltarget != NULL
 	      || (!tdesc->features.empty ()
-		  && tdesc->arch != NULL));
+		  && tdesc_architecture_name (tdesc) != nullptr));
 
   if (tdesc->xmltarget == NULL)
     {
diff --git a/gdbserver/tdesc.h b/gdbserver/tdesc.h
index 534b8b0..4796b50 100644
--- a/gdbserver/tdesc.h
+++ b/gdbserver/tdesc.h
@@ -54,18 +54,16 @@ struct target_desc final : tdesc_element
   mutable const char *xmltarget = NULL;
 
   /* The value of <architecture> element in the XML, replying GDB.  */
-  const char *arch = NULL;
+  gdb::unique_xmalloc_ptr<char> arch;
 
   /* The value of <osabi> element in the XML, replying GDB.  */
-  const char *osabi = NULL;
+  gdb::unique_xmalloc_ptr<char> osabi;
 
 public:
   target_desc ()
     : registers_size (0)
   {}
 
-  ~target_desc ();
-
   bool operator== (const target_desc &other) const;
 
   bool operator!= (const target_desc &other) const
diff --git a/gdbsupport/Makefile.am b/gdbsupport/Makefile.am
index 36e561e..e772987 100644
--- a/gdbsupport/Makefile.am
+++ b/gdbsupport/Makefile.am
@@ -76,6 +76,7 @@ libgdbsupport_a_SOURCES = \
     job-control.cc \
     netstuff.cc \
     new-op.cc \
+    osabi.cc \
     pathstuff.cc \
     print-utils.cc \
     ptid.cc \
diff --git a/gdbsupport/Makefile.in b/gdbsupport/Makefile.in
index 9cff86b..db3d6f6 100644
--- a/gdbsupport/Makefile.in
+++ b/gdbsupport/Makefile.in
@@ -162,12 +162,13 @@ am_libgdbsupport_a_OBJECTS = agent.$(OBJEXT) btrace-common.$(OBJEXT) \
 	gdb-dlfcn.$(OBJEXT) gdb_obstack.$(OBJEXT) gdb_regex.$(OBJEXT) \
 	gdb_tilde_expand.$(OBJEXT) gdb_wait.$(OBJEXT) \
 	gdb_vecs.$(OBJEXT) job-control.$(OBJEXT) netstuff.$(OBJEXT) \
-	new-op.$(OBJEXT) pathstuff.$(OBJEXT) print-utils.$(OBJEXT) \
-	ptid.$(OBJEXT) rsp-low.$(OBJEXT) run-time-clock.$(OBJEXT) \
-	safe-strerror.$(OBJEXT) scoped_mmap.$(OBJEXT) search.$(OBJEXT) \
-	signals.$(OBJEXT) signals-state-save-restore.$(OBJEXT) \
-	task-group.$(OBJEXT) tdesc.$(OBJEXT) thread-pool.$(OBJEXT) \
-	xml-utils.$(OBJEXT) $(am__objects_1) $(am__objects_2)
+	new-op.$(OBJEXT) osabi.$(OBJEXT) pathstuff.$(OBJEXT) \
+	print-utils.$(OBJEXT) ptid.$(OBJEXT) rsp-low.$(OBJEXT) \
+	run-time-clock.$(OBJEXT) safe-strerror.$(OBJEXT) \
+	scoped_mmap.$(OBJEXT) search.$(OBJEXT) signals.$(OBJEXT) \
+	signals-state-save-restore.$(OBJEXT) task-group.$(OBJEXT) \
+	tdesc.$(OBJEXT) thread-pool.$(OBJEXT) xml-utils.$(OBJEXT) \
+	$(am__objects_1) $(am__objects_2)
 libgdbsupport_a_OBJECTS = $(am_libgdbsupport_a_OBJECTS)
 AM_V_P = $(am__v_P_@AM_V@)
 am__v_P_ = $(am__v_P_@AM_DEFAULT_V@)
@@ -433,6 +434,7 @@ libgdbsupport_a_SOURCES = \
     job-control.cc \
     netstuff.cc \
     new-op.cc \
+    osabi.cc \
     pathstuff.cc \
     print-utils.cc \
     ptid.cc \
@@ -542,6 +544,7 @@ distclean-compile:
 @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/job-control.Po@am__quote@
 @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/netstuff.Po@am__quote@
 @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/new-op.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/osabi.Po@am__quote@
 @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/pathstuff.Po@am__quote@
 @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/print-utils.Po@am__quote@
 @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/ptid.Po@am__quote@
diff --git a/gdbsupport/btrace-common.h b/gdbsupport/btrace-common.h
index bf57bc1..490a176 100644
--- a/gdbsupport/btrace-common.h
+++ b/gdbsupport/btrace-common.h
@@ -117,6 +117,15 @@ struct btrace_config_pt
      This is unsigned int and not size_t since it is registered as
      control variable for "set record btrace pt buffer-size".  */
   unsigned int size;
+
+  /* Configuration bit for ptwrite packets.
+
+     If both gdb and gdbserver support this, gdb will try to enable ptwrite
+     packets when tracing is started.  */
+  bool ptwrite;
+
+  /* Event tracing setting.  */
+  bool event_tracing;
 };
 
 /* A branch tracing configuration.
diff --git a/gdbsupport/common-utils.h b/gdbsupport/common-utils.h
index 23cd40c..2fb2291 100644
--- a/gdbsupport/common-utils.h
+++ b/gdbsupport/common-utils.h
@@ -100,6 +100,16 @@ startswith (std::string_view string, std::string_view pattern)
 	  && strncmp (string.data (), pattern.data (), pattern.length ()) == 0);
 }
 
+/* Version of startswith that takes a string_view for only one of its
+   arguments.  Return true if STR starts with PREFIX, otherwise return
+   false.  */
+
+static inline bool
+startswith (const char *str, const std::string_view &prefix)
+{
+  return strncmp (str, prefix.data (), prefix.length ()) == 0;
+}
+
 /* Return true if the strings are equal.  */
 
 static inline bool
diff --git a/gdbsupport/common.m4 b/gdbsupport/common.m4
index 6c317ff..d89c3ae 100644
--- a/gdbsupport/common.m4
+++ b/gdbsupport/common.m4
@@ -200,6 +200,8 @@ AC_DEFUN([GDB_AC_COMMON], [
       AC_CHECK_FUNCS(pt_insn_event)
       AC_CHECK_MEMBERS([struct pt_insn.enabled, struct pt_insn.resynced], [], [],
 		       [#include <intel-pt.h>])
+      AC_CHECK_MEMBERS([struct pt_event.variant.ptwrite], [], [],
+		       [#include <intel-pt.h>])
       LIBS=$save_LIBS
     fi
   fi
diff --git a/gdbsupport/config.in b/gdbsupport/config.in
index 832c92b..8467072 100644
--- a/gdbsupport/config.in
+++ b/gdbsupport/config.in
@@ -256,6 +256,9 @@
 /* Define to 1 if you have the <string.h> header file. */
 #undef HAVE_STRING_H
 
+/* Define to 1 if `variant.ptwrite' is a member of `struct pt_event'. */
+#undef HAVE_STRUCT_PT_EVENT_VARIANT_PTWRITE
+
 /* Define to 1 if `enabled' is a member of `struct pt_insn'. */
 #undef HAVE_STRUCT_PT_INSN_ENABLED
 
diff --git a/gdbsupport/configure b/gdbsupport/configure
index 54e32bb..0240847 100755
--- a/gdbsupport/configure
+++ b/gdbsupport/configure
@@ -12993,6 +12993,17 @@ _ACEOF
 
 fi
 
+      ac_fn_c_check_member "$LINENO" "struct pt_event" "variant.ptwrite" "ac_cv_member_struct_pt_event_variant_ptwrite" "#include <intel-pt.h>
+"
+if test "x$ac_cv_member_struct_pt_event_variant_ptwrite" = xyes; then :
+
+cat >>confdefs.h <<_ACEOF
+#define HAVE_STRUCT_PT_EVENT_VARIANT_PTWRITE 1
+_ACEOF
+
+
+fi
+
       LIBS=$save_LIBS
     fi
   fi
diff --git a/gdbsupport/enum-flags.h b/gdbsupport/enum-flags.h
index 5078004..764d521 100644
--- a/gdbsupport/enum-flags.h
+++ b/gdbsupport/enum-flags.h
@@ -51,13 +51,11 @@
     some_flags f = 1; // error
 */
 
-#ifdef __cplusplus
-
 /* Use this to mark an enum as flags enum.  It defines FLAGS_TYPE as
    enum_flags wrapper class for ENUM, and enables the global operator
    overloads for ENUM.  */
 #define DEF_ENUM_FLAGS_TYPE(enum_type, flags_type)	\
-  typedef enum_flags<enum_type> flags_type;		\
+  using flags_type = enum_flags<enum_type>;		\
   void is_enum_flags_enum_type (enum_type *)
 
 /* To enable the global enum_flags operators for enum, declare an
@@ -78,24 +76,24 @@
 /* Note that std::underlying_type<enum_type> is not what we want here,
    since that returns unsigned int even when the enum decays to signed
    int.  */
-template<int size, bool sign> class integer_for_size { typedef void type; };
-template<> struct integer_for_size<1, 0> { typedef uint8_t type; };
-template<> struct integer_for_size<2, 0> { typedef uint16_t type; };
-template<> struct integer_for_size<4, 0> { typedef uint32_t type; };
-template<> struct integer_for_size<8, 0> { typedef uint64_t type; };
-template<> struct integer_for_size<1, 1> { typedef int8_t type; };
-template<> struct integer_for_size<2, 1> { typedef int16_t type; };
-template<> struct integer_for_size<4, 1> { typedef int32_t type; };
-template<> struct integer_for_size<8, 1> { typedef int64_t type; };
+template<int size, bool sign> class integer_for_size { using type = void; };
+template<> struct integer_for_size<1, 0> { using type = uint8_t; };
+template<> struct integer_for_size<2, 0> { using type = uint16_t; };
+template<> struct integer_for_size<4, 0> { using type = uint32_t; };
+template<> struct integer_for_size<8, 0> { using type = uint64_t; };
+template<> struct integer_for_size<1, 1> { using type = int8_t; };
+template<> struct integer_for_size<2, 1> { using type = int16_t; };
+template<> struct integer_for_size<4, 1> { using type = int32_t; };
+template<> struct integer_for_size<8, 1> { using type = int64_t; };
 
 template<typename T>
 struct enum_underlying_type
 {
   DIAGNOSTIC_PUSH
   DIAGNOSTIC_IGNORE_ENUM_CONSTEXPR_CONVERSION
-  typedef typename
-    integer_for_size<sizeof (T), static_cast<bool>(T (-1) < T (0))>::type
-    type;
+  using type
+    = typename integer_for_size<sizeof (T),
+				static_cast<bool>(T (-1) < T (0))>::type;
   DIAGNOSTIC_POP
 };
 
@@ -130,8 +128,8 @@ template <typename E>
 class enum_flags
 {
 public:
-  typedef E enum_type;
-  typedef typename enum_underlying_type<enum_type>::type underlying_type;
+  using enum_type = E;
+  using underlying_type = typename enum_underlying_type<enum_type>::type;
 
   /* For to_string.  Maps one enumerator of E to a string.  */
   struct string_mapping
@@ -484,13 +482,4 @@ enum_flags<E>::to_string (const string_mapping (&mapping)[N]) const
   return res;
 }
 
-#else /* __cplusplus */
-
-/* In C, the flags type is just a typedef for the enum type.  */
-
-#define DEF_ENUM_FLAGS_TYPE(enum_type, flags_type) \
-  typedef enum_type flags_type
-
-#endif /* __cplusplus */
-
 #endif /* COMMON_ENUM_FLAGS_H */
diff --git a/gdbsupport/gdb_signals.h b/gdbsupport/gdb_signals.h
index 7a71f0d..305290e 100644
--- a/gdbsupport/gdb_signals.h
+++ b/gdbsupport/gdb_signals.h
@@ -35,9 +35,9 @@ extern int gdb_signal_to_host_p (enum gdb_signal signo);
    gdb_signal_to_host() returns 0 and prints a warning() on GDB's
    console if SIGNO has no equivalent host representation.  */
 /* FIXME: cagney/1999-11-22: Here ``host'' is used incorrectly, it is
-   refering to the target operating system's signal numbering.
+   referring to the target operating system's signal numbering.
    Similarly, ``enum gdb_signal'' is named incorrectly, ``enum
-   gdb_signal'' would probably be better as it is refering to GDB's
+   gdb_signal'' would probably be better as it is referring to GDB's
    internal representation of a target operating system's signal.  */
 extern enum gdb_signal gdb_signal_from_host (int);
 extern int gdb_signal_to_host (enum gdb_signal);
diff --git a/gdbsupport/intrusive_list.h b/gdbsupport/intrusive_list.h
index 2262d9f..345fd7d 100644
--- a/gdbsupport/intrusive_list.h
+++ b/gdbsupport/intrusive_list.h
@@ -27,7 +27,7 @@ template<typename T>
 class intrusive_list_node
 {
 public:
-  bool is_linked () const
+  bool is_linked () const noexcept
   {
     return next != INTRUSIVE_LIST_UNLINKED_VALUE;
   }
@@ -56,7 +56,7 @@ private:
 template<typename T>
 struct intrusive_base_node
 {
-  static intrusive_list_node<T> *as_node (T *elem)
+  static intrusive_list_node<T> *as_node (T *elem) noexcept
   { return elem; }
 };
 
@@ -65,7 +65,7 @@ struct intrusive_base_node
 template<typename T, intrusive_list_node<T> T::*MemberNode>
 struct intrusive_member_node
 {
-  static intrusive_list_node<T> *as_node (T *elem)
+  static intrusive_list_node<T> *as_node (T *elem) noexcept
   { return &(elem->*MemberNode); }
 };
 
@@ -86,29 +86,29 @@ struct intrusive_list_base_iterator
   using node_type = intrusive_list_node<T>;
 
   /* Create an iterator pointing to ELEM.  */
-  explicit intrusive_list_base_iterator (pointer elem)
+  explicit intrusive_list_base_iterator (pointer elem) noexcept
     : m_elem (elem)
   {}
 
   /* Create a past-the-end iterator.  */
-  intrusive_list_base_iterator ()
+  intrusive_list_base_iterator () noexcept
     : m_elem (nullptr)
   {}
 
-  reference operator* () const
+  reference operator* () const noexcept
   { return *m_elem; }
 
-  pointer operator-> () const
+  pointer operator-> () const noexcept
   { return m_elem; }
 
-  bool operator== (const self_type &other) const
+  bool operator== (const self_type &other) const noexcept
   { return m_elem == other.m_elem; }
 
-  bool operator!= (const self_type &other) const
+  bool operator!= (const self_type &other) const noexcept
   { return m_elem != other.m_elem; }
 
 protected:
-  static node_type *as_node (pointer elem)
+  static node_type *as_node (pointer elem) noexcept
   { return AsNode::as_node (elem); }
 
   /* A past-end-the iterator points to the list's head.  */
@@ -131,14 +131,14 @@ struct intrusive_list_iterator
   using base::base;
   using base::m_elem;
 
-  self_type &operator++ ()
+  self_type &operator++ () noexcept
   {
     node_type *node = this->as_node (m_elem);
     m_elem = node->next;
     return *this;
   }
 
-  self_type operator++ (int)
+  self_type operator++ (int) noexcept
   {
     self_type temp = *this;
     node_type *node = this->as_node (m_elem);
@@ -146,14 +146,14 @@ struct intrusive_list_iterator
     return temp;
   }
 
-  self_type &operator-- ()
+  self_type &operator-- () noexcept
   {
     node_type *node = this->as_node (m_elem);
     m_elem = node->prev;
     return *this;
   }
 
-  self_type operator-- (int)
+  self_type operator-- (int) noexcept
   {
     self_type temp = *this;
     node_type *node = this->as_node (m_elem);
@@ -178,14 +178,14 @@ struct intrusive_list_reverse_iterator
   using base::m_elem;
   using node_type = typename base::node_type;
 
-  self_type &operator++ ()
+  self_type &operator++ () noexcept
   {
     node_type *node = this->as_node (m_elem);
     m_elem = node->prev;
     return *this;
   }
 
-  self_type operator++ (int)
+  self_type operator++ (int) noexcept
   {
     self_type temp = *this;
     node_type *node = this->as_node (m_elem);
@@ -193,14 +193,14 @@ struct intrusive_list_reverse_iterator
     return temp;
   }
 
-  self_type &operator-- ()
+  self_type &operator-- () noexcept
   {
     node_type *node = this->as_node (m_elem);
     m_elem = node->next;
     return *this;
   }
 
-  self_type operator-- (int)
+  self_type operator-- (int) noexcept
   {
     self_type temp = *this;
     node_type *node = this->as_node (m_elem);
@@ -243,14 +243,14 @@ public:
     = const intrusive_list_reverse_iterator<T, AsNode>;
   using node_type = intrusive_list_node<T>;
 
-  intrusive_list () = default;
+  intrusive_list () noexcept = default;
 
   ~intrusive_list ()
   {
     clear ();
   }
 
-  intrusive_list (intrusive_list &&other)
+  intrusive_list (intrusive_list &&other) noexcept
     : m_front (other.m_front),
       m_back (other.m_back)
   {
@@ -258,7 +258,7 @@ public:
     other.m_back = nullptr;
   }
 
-  intrusive_list &operator= (intrusive_list &&other)
+  intrusive_list &operator= (intrusive_list &&other) noexcept
   {
     m_front = other.m_front;
     m_back = other.m_back;
@@ -268,47 +268,47 @@ public:
     return *this;
   }
 
-  void swap (intrusive_list &other)
+  void swap (intrusive_list &other) noexcept
   {
     std::swap (m_front, other.m_front);
     std::swap (m_back, other.m_back);
   }
 
-  iterator iterator_to (reference value)
+  iterator iterator_to (reference value) noexcept
   {
     return iterator (&value);
   }
 
-  const_iterator iterator_to (const_reference value)
+  const_iterator iterator_to (const_reference value) noexcept
   {
     return const_iterator (&value);
   }
 
-  reference front ()
+  reference front () noexcept
   {
     gdb_assert (!this->empty ());
     return *m_front;
   }
 
-  const_reference front () const
+  const_reference front () const noexcept
   {
     gdb_assert (!this->empty ());
     return *m_front;
   }
 
-  reference back ()
+  reference back () noexcept
   {
     gdb_assert (!this->empty ());
     return *m_back;
   }
 
-  const_reference back () const
+  const_reference back () const noexcept
   {
     gdb_assert (!this->empty ());
     return *m_back;
   }
 
-  void push_front (reference elem)
+  void push_front (reference elem) noexcept
   {
     intrusive_list_node<T> *elem_node = as_node (&elem);
 
@@ -321,7 +321,7 @@ public:
       this->push_front_non_empty (elem);
   }
 
-  void push_back (reference elem)
+  void push_back (reference elem) noexcept
   {
     intrusive_list_node<T> *elem_node = as_node (&elem);
 
@@ -334,8 +334,10 @@ public:
       this->push_back_non_empty (elem);
   }
 
-  /* Inserts ELEM before POS.  */
-  void insert (const_iterator pos, reference elem)
+  /* Inserts ELEM before POS.
+
+     Returns an iterator to the inserted element.  */
+  iterator insert (const_iterator pos, reference elem) noexcept
   {
     if (this->empty ())
       return this->push_empty (elem);
@@ -359,10 +361,12 @@ public:
     prev_node->next = &elem;
     elem_node->next = pos_elem;
     pos_node->prev = &elem;
+
+    return this->iterator_to (elem);
   }
 
   /* Move elements from LIST at the end of the current list.  */
-  void splice (intrusive_list &&other)
+  void splice (intrusive_list &&other) noexcept
   {
     if (other.empty ())
       return;
@@ -388,21 +392,21 @@ public:
     other.m_back = nullptr;
   }
 
-  void pop_front ()
+  void pop_front () noexcept
   {
     gdb_assert (!this->empty ());
-    erase_element (*m_front);
+    unlink_element (*m_front);
   }
 
-  void pop_back ()
+  void pop_back () noexcept
   {
     gdb_assert (!this->empty ());
-    erase_element (*m_back);
+    unlink_element (*m_back);
   }
 
 private:
   /* Push ELEM in the list, knowing the list is empty.  */
-  void push_empty (reference elem)
+  iterator push_empty (reference elem) noexcept
   {
     gdb_assert (this->empty ());
 
@@ -415,10 +419,12 @@ private:
     m_back = &elem;
     elem_node->prev = nullptr;
     elem_node->next = nullptr;
+
+    return this->iterator_to (elem);
   }
 
   /* Push ELEM at the front of the list, knowing the list is not empty.  */
-  void push_front_non_empty (reference elem)
+  iterator push_front_non_empty (reference elem) noexcept
   {
     gdb_assert (!this->empty ());
 
@@ -432,10 +438,12 @@ private:
     front_node->prev = &elem;
     elem_node->prev = nullptr;
     m_front = &elem;
+
+    return this->iterator_to (elem);
   }
 
   /* Push ELEM at the back of the list, knowing the list is not empty.  */
-  void push_back_non_empty (reference elem)
+  iterator push_back_non_empty (reference elem) noexcept
   {
     gdb_assert (!this->empty ());
 
@@ -449,9 +457,12 @@ private:
     back_node->next = &elem;
     elem_node->next = nullptr;
     m_back = &elem;
+
+    return this->iterator_to (elem);
   }
 
-  void erase_element (reference elem)
+protected:
+  void unlink_element (reference elem) noexcept
   {
     intrusive_list_node<T> *elem_node = as_node (&elem);
 
@@ -489,18 +500,18 @@ private:
 public:
   /* Remove the element pointed by I from the list.  The element
      pointed by I is not destroyed.  */
-  iterator erase (const_iterator i)
+  iterator erase (const_iterator i) noexcept
   {
     iterator ret = i;
     ++ret;
 
-    erase_element (*i);
+    unlink_element (*i);
 
     return ret;
   }
 
   /* Erase all the elements.  The elements are not destroyed.  */
-  void clear ()
+  void clear () noexcept
   {
     while (!this->empty ())
       pop_front ();
@@ -509,7 +520,7 @@ public:
   /* Erase all the elements.  Disposer::operator()(pointer) is called
      for each of the removed elements.  */
   template<typename Disposer>
-  void clear_and_dispose (Disposer disposer)
+  void clear_and_dispose (Disposer disposer) noexcept
   {
     while (!this->empty ())
       {
@@ -519,7 +530,7 @@ public:
       }
   }
 
-  bool empty () const
+  bool empty () const noexcept
   {
     return m_front == nullptr;
   }
@@ -585,7 +596,7 @@ public:
   }
 
 private:
-  static node_type *as_node (pointer elem)
+  static node_type *as_node (pointer elem) noexcept
   {
     return AsNode::as_node (elem);
   }
diff --git a/gdbsupport/offset-type.h b/gdbsupport/offset-type.h
index 256703c..b49310f 100644
--- a/gdbsupport/offset-type.h
+++ b/gdbsupport/offset-type.h
@@ -33,7 +33,7 @@
    - You can compare offsets of the same type for equality and order.
      You can't compare an offset with an unrelated type.
 
-   - You can add/substract an integer to/from an offset, which gives
+   - You can add/subtract an integer to/from an offset, which gives
      you back a shifted offset.
 
    - You can subtract two offsets of the same type, which gives you
diff --git a/gdbsupport/osabi.cc b/gdbsupport/osabi.cc
new file mode 100644
index 0000000..1e41b5f
--- /dev/null
+++ b/gdbsupport/osabi.cc
@@ -0,0 +1,98 @@
+/* OS ABI variant handling for GDB and gdbserver.
+
+   Copyright (C) 2001-2024 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
+
+#include "gdbsupport/osabi.h"
+
+/* Names associated with each osabi.  */
+
+struct osabi_names
+{
+  /* The "pretty" name.  */
+
+  const char *pretty;
+
+  /* The triplet regexp, or NULL if not known.  */
+
+  const char *regexp;
+};
+
+/* This table matches the indices assigned to enum gdb_osabi.  Keep
+   them in sync.  */
+static const struct osabi_names gdb_osabi_names[] =
+{
+#define GDB_OSABI_DEF_FIRST(Enum, Name, Regex)	\
+  { Name, Regex },
+
+#define GDB_OSABI_DEF(Enum, Name, Regex)	\
+  { Name, Regex },
+
+#define GDB_OSABI_DEF_LAST(Enum, Name, Regex)	\
+  { Name, Regex }
+
+#include "gdbsupport/osabi.def"
+
+#undef GDB_OSABI_DEF_LAST
+#undef GDB_OSABI_DEF
+#undef GDB_OSABI_DEF_FIRST
+};
+
+/* See gdbsupport/osabi.h.  */
+
+const char *
+gdbarch_osabi_name (enum gdb_osabi osabi)
+{
+  if (osabi >= GDB_OSABI_UNKNOWN && osabi < GDB_OSABI_INVALID)
+    return gdb_osabi_names[osabi].pretty;
+
+  return gdb_osabi_names[GDB_OSABI_INVALID].pretty;
+}
+
+/* See gdbsupport/osabi.h.  */
+
+enum gdb_osabi
+osabi_from_tdesc_string (const char *name)
+{
+  int i;
+
+  for (i = 0; i < ARRAY_SIZE (gdb_osabi_names); i++)
+    if (strcmp (name, gdb_osabi_names[i].pretty) == 0)
+      {
+	/* See note above: the name table matches the indices assigned
+	   to enum gdb_osabi.  */
+	enum gdb_osabi osabi = (enum gdb_osabi) i;
+
+	if (osabi == GDB_OSABI_INVALID)
+	  return GDB_OSABI_UNKNOWN;
+	else
+	  return osabi;
+      }
+
+  return GDB_OSABI_UNKNOWN;
+}
+
+/* See gdbsupport/osabi.h.  */
+
+const char *
+osabi_triplet_regexp (enum gdb_osabi osabi)
+{
+  if (osabi >= GDB_OSABI_UNKNOWN && osabi < GDB_OSABI_INVALID)
+    return gdb_osabi_names[osabi].regexp;
+
+  return gdb_osabi_names[GDB_OSABI_INVALID].regexp;
+}
diff --git a/gdbsupport/osabi.def b/gdbsupport/osabi.def
new file mode 100644
index 0000000..637da26
--- /dev/null
+++ b/gdbsupport/osabi.def
@@ -0,0 +1,57 @@
+/* OS ABI variant definitions for GDB and gdbserver.
+
+   Copyright (C) 2001-2024 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
+
+/* Each definition in this file is an osabi known to GDB.
+
+   The first argument is used to create the enum name and is appended
+   to 'GDB_OSABI_'.
+
+   The second argument is the osabi name.  These strings can't be
+   changed _ever_ as gdbserver will emit these.  Changing these
+   strings would break compatibility with already released versions of
+   GDB and/or gdbserver.
+
+   The third argument is a regexp which matches against a target
+   triplet.  */
+
+GDB_OSABI_DEF_FIRST (UNKNOWN, "unknown", nullptr)
+
+GDB_OSABI_DEF (NONE, "none", nullptr)
+
+GDB_OSABI_DEF (SVR4, "SVR4", nullptr)
+GDB_OSABI_DEF (HURD, "GNU/Hurd", nullptr)
+GDB_OSABI_DEF (SOLARIS, "Solaris", nullptr)
+GDB_OSABI_DEF (LINUX, "GNU/Linux", "linux(-gnu[^-]*)?")
+GDB_OSABI_DEF (FREEBSD, "FreeBSD", nullptr)
+GDB_OSABI_DEF (NETBSD, "NetBSD", nullptr)
+GDB_OSABI_DEF (OPENBSD, "OpenBSD", nullptr)
+GDB_OSABI_DEF (WINCE, "WindowsCE", nullptr)
+GDB_OSABI_DEF (GO32, "DJGPP", nullptr)
+GDB_OSABI_DEF (CYGWIN, "Cygwin", nullptr)
+GDB_OSABI_DEF (WINDOWS, "Windows", nullptr)
+GDB_OSABI_DEF (AIX, "AIX", nullptr)
+GDB_OSABI_DEF (DICOS, "DICOS", nullptr)
+GDB_OSABI_DEF (DARWIN, "Darwin", nullptr)
+GDB_OSABI_DEF (OPENVMS, "OpenVMS", nullptr)
+GDB_OSABI_DEF (LYNXOS178, "LynxOS178", nullptr)
+GDB_OSABI_DEF (NEWLIB, "Newlib", nullptr)
+GDB_OSABI_DEF (SDE, "SDE", nullptr)
+GDB_OSABI_DEF (PIKEOS, "PikeOS", nullptr)
+
+GDB_OSABI_DEF_LAST (INVALID, "<invalid>", nullptr)
diff --git a/gdbsupport/osabi.h b/gdbsupport/osabi.h
new file mode 100644
index 0000000..6763bd8
--- /dev/null
+++ b/gdbsupport/osabi.h
@@ -0,0 +1,54 @@
+/* OS ABI variant handling for GDB and gdbserver.
+
+   Copyright (C) 2001-2024 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
+
+#ifndef OSABI_COMMON_H
+#define OSABI_COMMON_H
+
+/* List of known OS ABIs.  If you change this, make sure to update the
+   table in osabi.cc.  */
+enum gdb_osabi
+{
+#define GDB_OSABI_DEF_FIRST(Enum, Name, Regex)	\
+  GDB_OSABI_ ## Enum = 0,
+
+#define GDB_OSABI_DEF(Enum, Name, Regex)	\
+  GDB_OSABI_ ## Enum,
+
+#define GDB_OSABI_DEF_LAST(Enum, Name, Regex)	\
+  GDB_OSABI_ ## Enum
+
+#include "gdbsupport/osabi.def"
+
+#undef GDB_OSABI_DEF_LAST
+#undef GDB_OSABI_DEF
+#undef GDB_OSABI_DEF_FIRST
+};
+
+/* Lookup the OS ABI corresponding to the specified target description
+   string.  */
+enum gdb_osabi osabi_from_tdesc_string (const char *text);
+
+/* Return the name of the specified OS ABI.  */
+const char *gdbarch_osabi_name (enum gdb_osabi);
+
+/* Return a regular expression that matches the OS part of a GNU
+   configury triplet for the given OSABI.  */
+const char *osabi_triplet_regexp (enum gdb_osabi osabi);
+
+#endif /* OSABI_COMMON_H */
diff --git a/gdbsupport/owning_intrusive_list.h b/gdbsupport/owning_intrusive_list.h
new file mode 100644
index 0000000..4c72d9b
--- /dev/null
+++ b/gdbsupport/owning_intrusive_list.h
@@ -0,0 +1,168 @@
+/* Owning version of intrusive_list for GDB, the GNU debugger.
+   Copyright (C) 2024 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
+
+#ifndef GDBSUPPORT_OWNING_INTRUSIVE_LIST_H
+#define GDBSUPPORT_OWNING_INTRUSIVE_LIST_H
+
+#include "intrusive_list.h"
+
+/* An owning version of intrusive_list.  */
+
+template<typename T, typename AsNode = intrusive_base_node<T>>
+class owning_intrusive_list : private intrusive_list<T, AsNode>
+{
+  using base = intrusive_list<T, AsNode>;
+
+public:
+  using value_type = typename base::value_type;
+  using reference = typename base::reference;
+  using iterator = typename base::iterator;
+  using reverse_iterator = typename base::reverse_iterator;
+  using const_iterator = typename base::const_iterator;
+  using unique_pointer = std::unique_ptr<T>;
+
+  using base::iterator_to;
+  using base::front;
+  using base::back;
+  using base::empty;
+  using base::begin;
+  using base::cbegin;
+  using base::end;
+  using base::cend;
+  using base::rbegin;
+  using base::crbegin;
+  using base::rend;
+  using base::crend;
+
+  owning_intrusive_list () noexcept = default;
+
+  owning_intrusive_list (owning_intrusive_list &&other) noexcept
+    : base (std::move (other))
+  {
+  }
+
+  ~owning_intrusive_list ()
+  { this->clear (); }
+
+  owning_intrusive_list &operator= (owning_intrusive_list &&other) noexcept
+  {
+    this->clear ();
+    this->base::operator= (std::move (other));
+    return *this;
+  }
+
+  void swap (owning_intrusive_list &other) noexcept
+  { this->base::swap (other); }
+
+  /* Insert ELEM at the front of the list.
+
+     The list takes ownership of ELEM.  */
+  void push_front (unique_pointer elem) noexcept
+  { this->base::push_front (*elem.release ()); }
+
+  /* Insert ELEM at the back of the list.
+
+     The list takes ownership of ELEM.  */
+  void push_back (unique_pointer elem) noexcept
+  { this->base::push_back (*elem.release ()); }
+
+  /* Insert ELEM before POS in the list.
+
+     The list takes ownership of ELEM.  */
+  iterator insert (const_iterator pos, unique_pointer elem) noexcept
+  { return  this->base::insert (pos, *elem.release ());  }
+
+  void splice (owning_intrusive_list &&other) noexcept
+  { this->base::splice (std::move (other)); }
+
+  /* Remove the element at the front of the list.  The element is destroyed.  */
+  void pop_front () noexcept
+  {
+    unique_pointer holder (&this->front ());
+    this->base::pop_front ();
+  }
+
+  /* Remove the element at the back of the list.  The element is destroyed.  */
+  void pop_back () noexcept
+  {
+    unique_pointer holder (&this->back ());
+    this->base::pop_back ();
+  }
+
+  /* Remove the element pointed by I from the list.  The element
+     pointed by I is destroyed.  */
+  iterator erase (const_iterator i) noexcept
+  {
+    unique_pointer holder (&*i);
+    return this->base::erase (i);
+  }
+
+  /* Remove all elements from the list.  All elements are destroyed.  */
+  void clear () noexcept
+  {
+    while (!this->empty ())
+      this->pop_front ();
+  }
+
+  /* Construct an element in-place at the front of the list.
+
+     Return a reference to the new element.  */
+  template<typename... Args>
+  reference emplace_front (Args &&...args)
+  { return this->emplace (this->begin (), std::forward<Args> (args)...); }
+
+  /* Construct an element in-place at the back of the list.
+
+     Return a reference to the new element.  */
+  template<typename... Args>
+  reference emplace_back (Args &&...args)
+  { return this->emplace (this->end (), std::forward<Args> (args)...); }
+
+  /* Construct an element in-place in the list, before POS.
+
+     Return a reference to the new element.  */
+  template<typename... Args>
+  reference emplace (const_iterator pos, Args &&...args)
+  {
+    return *this->insert (pos,
+			 std::make_unique<T> (std::forward<Args> (args)...));
+  }
+
+  /* Return type for the release method.  */
+  struct release_ret
+  {
+    /* Iterator to the following element in the list.  */
+    iterator next;
+
+    /* The released element.  */
+    unique_pointer released;
+  };
+
+  release_ret release (const_iterator i) noexcept
+  {
+    iterator next = i;
+    ++next;
+    unique_pointer released (&*i);
+
+    this->unlink_element (*i);
+
+    return { next, std::move (released) };
+  }
+};
+
+#endif /* GDBSUPPORT_OWNING_INTRUSIVE_LIST_H */
diff --git a/gdbsupport/pathstuff.cc b/gdbsupport/pathstuff.cc
index 9c3816c..029e3c9 100644
--- a/gdbsupport/pathstuff.cc
+++ b/gdbsupport/pathstuff.cc
@@ -198,11 +198,17 @@ path_join (gdb::array_view<const char *> paths)
     {
       const char *path = paths[i];
 
-      if (i > 0)
-	gdb_assert (strlen (path) == 0 || !IS_ABSOLUTE_PATH (path));
-
-      if (!ret.empty () && !IS_DIR_SEPARATOR (ret.back ()))
-	  ret += '/';
+      if (!ret.empty ())
+	{
+	  /* If RET doesn't already end with a separator then add one.  */
+	  if (!IS_DIR_SEPARATOR (ret.back ()))
+	    ret += '/';
+
+	  /* Now that RET ends with a separator, ignore any at the start of
+	     PATH.  */
+	  while (IS_DIR_SEPARATOR (path[0]))
+	    ++path;
+	}
 
       ret.append (path);
     }
diff --git a/gdbsupport/pathstuff.h b/gdbsupport/pathstuff.h
index a61ce23..22170bb 100644
--- a/gdbsupport/pathstuff.h
+++ b/gdbsupport/pathstuff.h
@@ -80,8 +80,10 @@ extern const char *child_path (const char *parent, const char *child);
 
 /* Join elements in PATHS into a single path.
 
-   The first element can be absolute or relative.  All the others must be
-   relative.  */
+   The first element can be absolute or relative.  Only a single directory
+   separator will be placed between elements of PATHS, if one element ends
+   with a directory separator, or an element starts with a directory
+   separator, then these will be collapsed into a single separator.  */
 
 extern std::string path_join (gdb::array_view<const char *> paths);
 
diff --git a/gdbsupport/scope-exit.h b/gdbsupport/scope-exit.h
index 86b2969..2871a59 100644
--- a/gdbsupport/scope-exit.h
+++ b/gdbsupport/scope-exit.h
@@ -109,6 +109,9 @@ public:
       /* "If the initialization of exit_function throws an exception,
 	 calls f()."  */
       f ();
+      /* "throws: Nothing, unless the initialization of exit_function
+	 throws."  */
+      throw;
     }
 
   template<typename EFP,
diff --git a/gdbsupport/signals.cc b/gdbsupport/signals.cc
index 4989b3f..2cf641b 100644
--- a/gdbsupport/signals.cc
+++ b/gdbsupport/signals.cc
@@ -30,14 +30,12 @@ struct gdbarch;
    _available_ realtime signal, not the lowest supported; glibc takes
    several for its own use.  */
 
-#ifndef REALTIME_LO
-# if defined(__SIGRTMIN)
-#  define REALTIME_LO __SIGRTMIN
-#  define REALTIME_HI (__SIGRTMAX + 1)
-# elif defined(SIGRTMIN)
-#  define REALTIME_LO SIGRTMIN
-#  define REALTIME_HI (SIGRTMAX + 1)
-# endif
+#if defined(__SIGRTMIN)
+# define REALTIME_LO __SIGRTMIN
+# define REALTIME_HI (__SIGRTMAX + 1)
+#elif defined(SIGRTMIN)
+# define REALTIME_LO SIGRTMIN
+# define REALTIME_HI (SIGRTMAX + 1)
 #endif
 
 /* This table must match in order and size the signals in enum
diff --git a/gdbsupport/tdesc.h b/gdbsupport/tdesc.h
index fa9431b..c9e7603 100644
--- a/gdbsupport/tdesc.h
+++ b/gdbsupport/tdesc.h
@@ -18,6 +18,8 @@
 #ifndef COMMON_TDESC_H
 #define COMMON_TDESC_H
 
+#include "gdbsupport/osabi.h"
+
 struct tdesc_feature;
 struct tdesc_type;
 struct tdesc_type_builtin;
@@ -338,8 +340,8 @@ void set_tdesc_architecture (target_desc *target_desc,
    or NULL if no architecture was specified.  */
 const char *tdesc_architecture_name (const struct target_desc *target_desc);
 
-/* Set TARGET_DESC's osabi by NAME.  */
-void set_tdesc_osabi (target_desc *target_desc, const char *name);
+/* Set TARGET_DESC's osabi to OSABI.  */
+void set_tdesc_osabi (target_desc *target_desc, enum gdb_osabi osabi);
 
 /* Return the osabi associated with this target description as a string,
    or NULL if no osabi was specified.  */
diff --git a/gdbsupport/x86-xstate.h b/gdbsupport/x86-xstate.h
index 11b3754..b9a9b6c 100644
--- a/gdbsupport/x86-xstate.h
+++ b/gdbsupport/x86-xstate.h
@@ -24,8 +24,6 @@
 #define X86_XSTATE_X87_ID	0
 #define X86_XSTATE_SSE_ID	1
 #define X86_XSTATE_AVX_ID	2
-#define X86_XSTATE_BNDREGS_ID	3
-#define X86_XSTATE_BNDCFG_ID	4
 #define X86_XSTATE_K_ID		5
 #define X86_XSTATE_ZMM_H_ID	6
 #define X86_XSTATE_ZMM_ID	7
@@ -35,9 +33,6 @@
 #define X86_XSTATE_X87		(1ULL << X86_XSTATE_X87_ID)
 #define X86_XSTATE_SSE		(1ULL << X86_XSTATE_SSE_ID)
 #define X86_XSTATE_AVX		(1ULL << X86_XSTATE_AVX_ID)
-#define X86_XSTATE_BNDREGS	(1ULL << X86_XSTATE_BNDREGS_ID)
-#define X86_XSTATE_BNDCFG	(1ULL << X86_XSTATE_BNDCFG_ID)
-#define X86_XSTATE_MPX		(X86_XSTATE_BNDREGS | X86_XSTATE_BNDCFG)
 
 /* AVX 512 adds three feature bits.  All three must be enabled.  */
 #define X86_XSTATE_K		(1ULL << X86_XSTATE_K_ID)
@@ -56,8 +51,6 @@ struct x86_xsave_layout
 {
   int sizeof_xsave = 0;
   int avx_offset = 0;
-  int bndregs_offset = 0;
-  int bndcfg_offset = 0;
   int k_offset = 0;
   int zmm_h_offset = 0;
   int zmm_offset = 0;
@@ -69,8 +62,6 @@ constexpr bool operator== (const x86_xsave_layout &lhs,
 {
   return lhs.sizeof_xsave == rhs.sizeof_xsave
     && lhs.avx_offset == rhs.avx_offset
-    && lhs.bndregs_offset == rhs.bndregs_offset
-    && lhs.bndcfg_offset == rhs.bndcfg_offset
     && lhs.k_offset == rhs.k_offset
     && lhs.zmm_h_offset == rhs.zmm_h_offset
     && lhs.zmm_offset == rhs.zmm_offset
@@ -88,21 +79,17 @@ constexpr bool operator!= (const x86_xsave_layout &lhs,
 #define X86_XSTATE_X87_MASK	X86_XSTATE_X87
 #define X86_XSTATE_SSE_MASK	(X86_XSTATE_X87 | X86_XSTATE_SSE)
 #define X86_XSTATE_AVX_MASK	(X86_XSTATE_SSE_MASK | X86_XSTATE_AVX)
-#define X86_XSTATE_MPX_MASK	(X86_XSTATE_SSE_MASK | X86_XSTATE_MPX)
-#define X86_XSTATE_AVX_MPX_MASK	(X86_XSTATE_AVX_MASK | X86_XSTATE_MPX)
 #define X86_XSTATE_AVX_AVX512_MASK	(X86_XSTATE_AVX_MASK | X86_XSTATE_AVX512)
-#define X86_XSTATE_AVX_MPX_AVX512_PKU_MASK 	(X86_XSTATE_AVX_MPX_MASK\
+#define X86_XSTATE_AVX_AVX512_PKU_MASK 	(X86_XSTATE_AVX_MASK\
 					| X86_XSTATE_AVX512 | X86_XSTATE_PKRU)
 
-#define X86_XSTATE_ALL_MASK		(X86_XSTATE_AVX_MPX_AVX512_PKU_MASK)
+#define X86_XSTATE_ALL_MASK		(X86_XSTATE_AVX_AVX512_PKU_MASK)
 
 
 #define X86_XSTATE_SSE_SIZE	576
 #define X86_XSTATE_AVX_SIZE	832
 
 
-/* In case one of the MPX XCR0 bits is set we consider we have MPX.  */
-#define HAS_MPX(XCR0) (((XCR0) & X86_XSTATE_MPX) != 0)
 #define HAS_AVX(XCR0) (((XCR0) & X86_XSTATE_AVX) != 0)
 #define HAS_AVX512(XCR0) (((XCR0) & X86_XSTATE_AVX512) != 0)
 #define HAS_PKRU(XCR0) (((XCR0) & X86_XSTATE_PKRU) != 0)
diff --git a/gold/symtab.cc b/gold/symtab.cc
index 5857dd7..91b551c 100644
--- a/gold/symtab.cc
+++ b/gold/symtab.cc
@@ -450,7 +450,16 @@ Symbol::final_value_is_known() const
        || parameters->options().relocatable())
       && !(this->type() == elfcpp::STT_TLS
            && parameters->options().pie()))
-    return false;
+    {
+      // Non-default weak undefined symbols in executable and shared
+      // library are always resolved to 0 at runtime.
+      if (this->visibility() != elfcpp::STV_DEFAULT
+	  && this->is_weak_undefined()
+	  && !parameters->options().relocatable())
+	return true;
+
+      return false;
+    }
 
   // If the symbol is not from an object file, and is not undefined,
   // then it is defined, and known.
diff --git a/gold/symtab.h b/gold/symtab.h
index 0a1f6a6..9c25559 100644
--- a/gold/symtab.h
+++ b/gold/symtab.h
@@ -709,6 +709,13 @@ class Symbol
     if (this->is_absolute())
       return false;
 
+    // Non-default weak undefined symbols in executable and shared
+    // library are always resolved to 0 at runtime.
+    if (this->visibility() != elfcpp::STV_DEFAULT
+	&& this->is_weak_undefined()
+	&& !parameters->options().relocatable())
+      return false;
+
     // An absolute reference within a position-independent output file
     // will need a dynamic relocation.
     if ((flags & ABSOLUTE_REF)
diff --git a/gold/testsuite/Makefile.am b/gold/testsuite/Makefile.am
index 2f1348f..8f158ba 100644
--- a/gold/testsuite/Makefile.am
+++ b/gold/testsuite/Makefile.am
@@ -865,6 +865,23 @@ weak_undef_file3.o: weak_undef_file3.cc
 weak_undef_file4.o: weak_undef_file4.cc
 	$(CXXCOMPILE) -c -o $@ $<
 
+check_PROGRAMS += weak_undef_test_3
+weak_undef_test_3_SOURCES = weak_undef_test_3.c
+weak_undef_test_3_DEPENDENCIES = gcctestdir/ld
+weak_undef_test_3_CFLAGS = -fPIE
+weak_undef_test_3_LDFLAGS = -pie
+
+check_PROGRAMS += weak_undef_test_4
+weak_undef_test_4_SOURCES = weak_undef_test_4.c
+weak_undef_test_4_DEPENDENCIES = gcctestdir/ld weak_undef_lib_4.so
+weak_undef_test_4_LDADD = weak_undef_lib_4.so
+weak_undef_test_4_LDFLAGS =  -Wl,-R,.
+MOSTLYCLEANFILES += weak_undef_lib_4.o weak_undef_lib_4.so
+weak_undef_lib_4.o:  weak_undef_lib_4.c
+	$(COMPILE) -fPIC -c -o $@ $<
+weak_undef_lib_4.so: gcctestdir/ld weak_undef_lib_4.o
+	$(LINK) -shared -o $@ weak_undef_lib_4.o
+
 if FN_PTRS_IN_SO_WITHOUT_PIC
 check_PROGRAMS += weak_undef_nonpic_test
 MOSTLYCLEANFILES += alt/weak_undef_lib_nonpic.so
@@ -2839,8 +2856,6 @@ ifuncmain1static_LDFLAGS = -static
 ifuncmain1static_LDADD = ifuncdep1.o
 
 check_PROGRAMS += ifuncmain1picstatic
-ifuncmain1picstatic: ifuncmain1pic.o ifuncmod1.o gcctestdir/ld
-	$(LINK) -static ifuncmain1pic.o ifuncmod1.o
 
 check_SCRIPTS += ifuncmod1.sh
 check_DATA += ifuncmod1.so.stderr
@@ -2849,6 +2864,9 @@ ifuncmod1.so.stderr: ifuncmod1.so
 endif
 endif
 
+ifuncmain1picstatic: ifuncmain1pic.o ifuncmod1.o gcctestdir/ld
+	$(LINK) -static ifuncmain1pic.o ifuncmod1.o
+
 check_PROGRAMS += ifuncmain1
 ifuncmain1_SOURCES = ifuncmain1.c
 ifuncmain1_DEPENDENCIES = gcctestdir/ld ifuncmod1.so
@@ -2904,11 +2922,12 @@ ifuncmain2static_LDFLAGS = -static
 ifuncmain2static_LDADD =
 
 check_PROGRAMS += ifuncmain2picstatic
-ifuncmain2picstatic: ifuncmain2pic.o ifuncdep2pic.o gcctestdir/ld
-	$(LINK) -static ifuncmain2pic.o ifuncdep2pic.o
 endif
 endif
 
+ifuncmain2picstatic: ifuncmain2pic.o ifuncdep2pic.o gcctestdir/ld
+	$(LINK) -static ifuncmain2pic.o ifuncdep2pic.o
+
 check_PROGRAMS += ifuncmain2
 ifuncmain2_SOURCES = ifuncmain2.c ifuncdep2.c
 ifuncmain2_DEPENDENCIES = gcctestdir/ld
@@ -2941,11 +2960,12 @@ ifuncmain4static_LDFLAGS = -static
 ifuncmain4static_LDADD =
 
 check_PROGRAMS += ifuncmain4picstatic
-ifuncmain4picstatic: ifuncmain4pic.o gcctestdir/ld
-	$(LINK) -static ifuncmain4pic.o
 endif
 endif
 
+ifuncmain4picstatic: ifuncmain4pic.o gcctestdir/ld
+	$(LINK) -static ifuncmain4pic.o
+
 check_PROGRAMS += ifuncmain4
 ifuncmain4_SOURCES = ifuncmain4.c
 ifuncmain4_DEPENDENCIES = gcctestdir/ld
@@ -2974,11 +2994,12 @@ ifuncmain5static_LDFLAGS = -static
 ifuncmain5static_LDADD = ifuncdep5.o
 
 check_PROGRAMS += ifuncmain5picstatic
-ifuncmain5picstatic: ifuncmain5pic.o ifuncmod5.o gcctestdir/ld
-	$(LINK) -static ifuncmain5pic.o ifuncmod5.o
 endif
 endif
 
+ifuncmain5picstatic: ifuncmain5pic.o ifuncmod5.o gcctestdir/ld
+	$(LINK) -static ifuncmain5pic.o ifuncmod5.o
+
 check_PROGRAMS += ifuncmain5
 ifuncmain5_SOURCES = ifuncmain5.c
 ifuncmain5_DEPENDENCIES = gcctestdir/ld ifuncmod5.so
@@ -3024,11 +3045,12 @@ ifuncmain7static_LDFLAGS = -static
 ifuncmain7static_LDADD =
 
 check_PROGRAMS += ifuncmain7picstatic
-ifuncmain7picstatic: ifuncmain7pic.o gcctestdir/ld
-	$(LINK) -static ifuncmain7pic.o
 endif
 endif
 
+ifuncmain7picstatic: ifuncmain7pic.o gcctestdir/ld
+	$(LINK) -static ifuncmain7pic.o
+
 check_PROGRAMS += ifuncmain7
 ifuncmain7_SOURCES = ifuncmain7.c
 ifuncmain7_DEPENDENCIES = gcctestdir/ld
diff --git a/gold/testsuite/Makefile.in b/gold/testsuite/Makefile.in
index 9cf21df..357dec0 100644
--- a/gold/testsuite/Makefile.in
+++ b/gold/testsuite/Makefile.in
@@ -211,7 +211,9 @@ check_PROGRAMS = $(am__EXEEXT_1) $(am__EXEEXT_2) $(am__EXEEXT_3) \
 @GCC_TRUE@@NATIVE_LINKER_TRUE@	eh_test_2.sects \
 @GCC_TRUE@@NATIVE_LINKER_TRUE@	two_file_shared.dbg \
 @GCC_TRUE@@NATIVE_LINKER_TRUE@	alt/weak_undef_lib.so \
-@GCC_TRUE@@NATIVE_LINKER_TRUE@	libweak_undef_2.a
+@GCC_TRUE@@NATIVE_LINKER_TRUE@	libweak_undef_2.a \
+@GCC_TRUE@@NATIVE_LINKER_TRUE@	weak_undef_lib_4.o \
+@GCC_TRUE@@NATIVE_LINKER_TRUE@	weak_undef_lib_4.so
 @GCC_TRUE@@NATIVE_LINKER_TRUE@am__append_5 = icf_virtual_function_folding_test \
 @GCC_TRUE@@NATIVE_LINKER_TRUE@	large_symbol_alignment \
 @GCC_TRUE@@NATIVE_LINKER_TRUE@	basic_test basic_pic_test \
@@ -269,7 +271,9 @@ check_PROGRAMS = $(am__EXEEXT_1) $(am__EXEEXT_2) $(am__EXEEXT_3) \
 @GCC_TRUE@@HAVE_STATIC_TRUE@@NATIVE_LINKER_TRUE@am__append_16 = exception_static_test
 @GCC_TRUE@@NATIVE_LINKER_TRUE@am__append_17 = weak_test \
 @GCC_TRUE@@NATIVE_LINKER_TRUE@	weak_undef_test \
-@GCC_TRUE@@NATIVE_LINKER_TRUE@	weak_undef_test_2
+@GCC_TRUE@@NATIVE_LINKER_TRUE@	weak_undef_test_2 \
+@GCC_TRUE@@NATIVE_LINKER_TRUE@	weak_undef_test_3 \
+@GCC_TRUE@@NATIVE_LINKER_TRUE@	weak_undef_test_4
 @GCC_FALSE@weak_test_DEPENDENCIES =
 @NATIVE_LINKER_FALSE@weak_test_DEPENDENCIES =
 @FN_PTRS_IN_SO_WITHOUT_PIC_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@am__append_18 = weak_undef_nonpic_test
@@ -1237,7 +1241,9 @@ libgoldtest_a_OBJECTS = $(am_libgoldtest_a_OBJECTS)
 @GCC_TRUE@@HAVE_STATIC_TRUE@@NATIVE_LINKER_TRUE@am__EXEEXT_13 = exception_static_test$(EXEEXT)
 @GCC_TRUE@@NATIVE_LINKER_TRUE@am__EXEEXT_14 = weak_test$(EXEEXT) \
 @GCC_TRUE@@NATIVE_LINKER_TRUE@	weak_undef_test$(EXEEXT) \
-@GCC_TRUE@@NATIVE_LINKER_TRUE@	weak_undef_test_2$(EXEEXT)
+@GCC_TRUE@@NATIVE_LINKER_TRUE@	weak_undef_test_2$(EXEEXT) \
+@GCC_TRUE@@NATIVE_LINKER_TRUE@	weak_undef_test_3$(EXEEXT) \
+@GCC_TRUE@@NATIVE_LINKER_TRUE@	weak_undef_test_4$(EXEEXT)
 @FN_PTRS_IN_SO_WITHOUT_PIC_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@am__EXEEXT_15 = weak_undef_nonpic_test$(EXEEXT)
 @GCC_TRUE@@NATIVE_LINKER_TRUE@am__EXEEXT_16 =  \
 @GCC_TRUE@@NATIVE_LINKER_TRUE@	weak_alias_test$(EXEEXT) \
@@ -2247,6 +2253,16 @@ weak_undef_test_LINK = $(CXXLD) $(AM_CXXFLAGS) $(CXXFLAGS) \
 weak_undef_test_2_OBJECTS = $(am_weak_undef_test_2_OBJECTS)
 weak_undef_test_2_LINK = $(CXXLD) $(AM_CXXFLAGS) $(CXXFLAGS) \
 	$(weak_undef_test_2_LDFLAGS) $(LDFLAGS) -o $@
+@GCC_TRUE@@NATIVE_LINKER_TRUE@am_weak_undef_test_3_OBJECTS = weak_undef_test_3-weak_undef_test_3.$(OBJEXT)
+weak_undef_test_3_OBJECTS = $(am_weak_undef_test_3_OBJECTS)
+weak_undef_test_3_LDADD = $(LDADD)
+weak_undef_test_3_LINK = $(CCLD) $(weak_undef_test_3_CFLAGS) $(CFLAGS) \
+	$(weak_undef_test_3_LDFLAGS) $(LDFLAGS) -o $@
+@GCC_TRUE@@NATIVE_LINKER_TRUE@am_weak_undef_test_4_OBJECTS =  \
+@GCC_TRUE@@NATIVE_LINKER_TRUE@	weak_undef_test_4.$(OBJEXT)
+weak_undef_test_4_OBJECTS = $(am_weak_undef_test_4_OBJECTS)
+weak_undef_test_4_LINK = $(CCLD) $(AM_CFLAGS) $(CFLAGS) \
+	$(weak_undef_test_4_LDFLAGS) $(LDFLAGS) -o $@
 @GCC_TRUE@@NATIVE_LINKER_TRUE@am_weak_unresolved_symbols_test_OBJECTS = weak_unresolved_symbols_test-weak_unresolved_symbols_test.$(OBJEXT)
 weak_unresolved_symbols_test_OBJECTS =  \
 	$(am_weak_unresolved_symbols_test_OBJECTS)
@@ -2391,7 +2407,8 @@ SOURCES = $(libgoldtest_a_SOURCES) $(aarch64_pr23870_SOURCES) \
 	$(ver_test_8_SOURCES) $(ver_test_9_SOURCES) \
 	$(weak_alias_test_SOURCES) weak_plt.c $(weak_test_SOURCES) \
 	$(weak_undef_nonpic_test_SOURCES) $(weak_undef_test_SOURCES) \
-	$(weak_undef_test_2_SOURCES) \
+	$(weak_undef_test_2_SOURCES) $(weak_undef_test_3_SOURCES) \
+	$(weak_undef_test_4_SOURCES) \
 	$(weak_unresolved_symbols_test_SOURCES)
 am__can_run_installinfo = \
   case $$AM_UPDATE_INFO_DIR in \
@@ -3118,6 +3135,14 @@ DEPENDENCIES = \
 @GCC_TRUE@@NATIVE_LINKER_TRUE@weak_undef_test_2_DEPENDENCIES = gcctestdir/ld libweak_undef_2.a
 @GCC_TRUE@@NATIVE_LINKER_TRUE@weak_undef_test_2_LDFLAGS = -u weak_undef_2
 @GCC_TRUE@@NATIVE_LINKER_TRUE@weak_undef_test_2_LDADD = -L . -lweak_undef_2
+@GCC_TRUE@@NATIVE_LINKER_TRUE@weak_undef_test_3_SOURCES = weak_undef_test_3.c
+@GCC_TRUE@@NATIVE_LINKER_TRUE@weak_undef_test_3_DEPENDENCIES = gcctestdir/ld
+@GCC_TRUE@@NATIVE_LINKER_TRUE@weak_undef_test_3_CFLAGS = -fPIE
+@GCC_TRUE@@NATIVE_LINKER_TRUE@weak_undef_test_3_LDFLAGS = -pie
+@GCC_TRUE@@NATIVE_LINKER_TRUE@weak_undef_test_4_SOURCES = weak_undef_test_4.c
+@GCC_TRUE@@NATIVE_LINKER_TRUE@weak_undef_test_4_DEPENDENCIES = gcctestdir/ld weak_undef_lib_4.so
+@GCC_TRUE@@NATIVE_LINKER_TRUE@weak_undef_test_4_LDADD = weak_undef_lib_4.so
+@GCC_TRUE@@NATIVE_LINKER_TRUE@weak_undef_test_4_LDFLAGS = -Wl,-R,.
 @FN_PTRS_IN_SO_WITHOUT_PIC_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@weak_undef_nonpic_test_SOURCES = weak_undef_test.cc
 @FN_PTRS_IN_SO_WITHOUT_PIC_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@weak_undef_nonpic_test_DEPENDENCIES = gcctestdir/ld weak_undef_lib_nonpic.so alt/weak_undef_lib_nonpic.so
 @FN_PTRS_IN_SO_WITHOUT_PIC_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@weak_undef_nonpic_test_LDFLAGS = -Wl,-R,alt
@@ -3759,18 +3784,10 @@ ifuncmain1$(EXEEXT): $(ifuncmain1_OBJECTS) $(ifuncmain1_DEPENDENCIES) $(EXTRA_if
 @GCC_FALSE@	@rm -f ifuncmain1picstatic$(EXEEXT)
 @GCC_FALSE@	$(AM_V_CCLD)$(LINK) $(ifuncmain1picstatic_OBJECTS) $(ifuncmain1picstatic_LDADD) $(LIBS)
 
-@HAVE_STATIC_FALSE@ifuncmain1picstatic$(EXEEXT): $(ifuncmain1picstatic_OBJECTS) $(ifuncmain1picstatic_DEPENDENCIES) $(EXTRA_ifuncmain1picstatic_DEPENDENCIES) 
-@HAVE_STATIC_FALSE@	@rm -f ifuncmain1picstatic$(EXEEXT)
-@HAVE_STATIC_FALSE@	$(AM_V_CCLD)$(LINK) $(ifuncmain1picstatic_OBJECTS) $(ifuncmain1picstatic_LDADD) $(LIBS)
-
 @IFUNC_FALSE@ifuncmain1picstatic$(EXEEXT): $(ifuncmain1picstatic_OBJECTS) $(ifuncmain1picstatic_DEPENDENCIES) $(EXTRA_ifuncmain1picstatic_DEPENDENCIES) 
 @IFUNC_FALSE@	@rm -f ifuncmain1picstatic$(EXEEXT)
 @IFUNC_FALSE@	$(AM_V_CCLD)$(LINK) $(ifuncmain1picstatic_OBJECTS) $(ifuncmain1picstatic_LDADD) $(LIBS)
 
-@IFUNC_STATIC_FALSE@ifuncmain1picstatic$(EXEEXT): $(ifuncmain1picstatic_OBJECTS) $(ifuncmain1picstatic_DEPENDENCIES) $(EXTRA_ifuncmain1picstatic_DEPENDENCIES) 
-@IFUNC_STATIC_FALSE@	@rm -f ifuncmain1picstatic$(EXEEXT)
-@IFUNC_STATIC_FALSE@	$(AM_V_CCLD)$(LINK) $(ifuncmain1picstatic_OBJECTS) $(ifuncmain1picstatic_LDADD) $(LIBS)
-
 @NATIVE_LINKER_FALSE@ifuncmain1picstatic$(EXEEXT): $(ifuncmain1picstatic_OBJECTS) $(ifuncmain1picstatic_DEPENDENCIES) $(EXTRA_ifuncmain1picstatic_DEPENDENCIES) 
 @NATIVE_LINKER_FALSE@	@rm -f ifuncmain1picstatic$(EXEEXT)
 @NATIVE_LINKER_FALSE@	$(AM_V_CCLD)$(LINK) $(ifuncmain1picstatic_OBJECTS) $(ifuncmain1picstatic_LDADD) $(LIBS)
@@ -3863,18 +3880,10 @@ ifuncmain2$(EXEEXT): $(ifuncmain2_OBJECTS) $(ifuncmain2_DEPENDENCIES) $(EXTRA_if
 @GCC_FALSE@	@rm -f ifuncmain2picstatic$(EXEEXT)
 @GCC_FALSE@	$(AM_V_CCLD)$(LINK) $(ifuncmain2picstatic_OBJECTS) $(ifuncmain2picstatic_LDADD) $(LIBS)
 
-@HAVE_STATIC_FALSE@ifuncmain2picstatic$(EXEEXT): $(ifuncmain2picstatic_OBJECTS) $(ifuncmain2picstatic_DEPENDENCIES) $(EXTRA_ifuncmain2picstatic_DEPENDENCIES) 
-@HAVE_STATIC_FALSE@	@rm -f ifuncmain2picstatic$(EXEEXT)
-@HAVE_STATIC_FALSE@	$(AM_V_CCLD)$(LINK) $(ifuncmain2picstatic_OBJECTS) $(ifuncmain2picstatic_LDADD) $(LIBS)
-
 @IFUNC_FALSE@ifuncmain2picstatic$(EXEEXT): $(ifuncmain2picstatic_OBJECTS) $(ifuncmain2picstatic_DEPENDENCIES) $(EXTRA_ifuncmain2picstatic_DEPENDENCIES) 
 @IFUNC_FALSE@	@rm -f ifuncmain2picstatic$(EXEEXT)
 @IFUNC_FALSE@	$(AM_V_CCLD)$(LINK) $(ifuncmain2picstatic_OBJECTS) $(ifuncmain2picstatic_LDADD) $(LIBS)
 
-@IFUNC_STATIC_FALSE@ifuncmain2picstatic$(EXEEXT): $(ifuncmain2picstatic_OBJECTS) $(ifuncmain2picstatic_DEPENDENCIES) $(EXTRA_ifuncmain2picstatic_DEPENDENCIES) 
-@IFUNC_STATIC_FALSE@	@rm -f ifuncmain2picstatic$(EXEEXT)
-@IFUNC_STATIC_FALSE@	$(AM_V_CCLD)$(LINK) $(ifuncmain2picstatic_OBJECTS) $(ifuncmain2picstatic_LDADD) $(LIBS)
-
 @NATIVE_LINKER_FALSE@ifuncmain2picstatic$(EXEEXT): $(ifuncmain2picstatic_OBJECTS) $(ifuncmain2picstatic_DEPENDENCIES) $(EXTRA_ifuncmain2picstatic_DEPENDENCIES) 
 @NATIVE_LINKER_FALSE@	@rm -f ifuncmain2picstatic$(EXEEXT)
 @NATIVE_LINKER_FALSE@	$(AM_V_CCLD)$(LINK) $(ifuncmain2picstatic_OBJECTS) $(ifuncmain2picstatic_LDADD) $(LIBS)
@@ -3895,18 +3904,10 @@ ifuncmain4$(EXEEXT): $(ifuncmain4_OBJECTS) $(ifuncmain4_DEPENDENCIES) $(EXTRA_if
 @GCC_FALSE@	@rm -f ifuncmain4picstatic$(EXEEXT)
 @GCC_FALSE@	$(AM_V_CCLD)$(LINK) $(ifuncmain4picstatic_OBJECTS) $(ifuncmain4picstatic_LDADD) $(LIBS)
 
-@HAVE_STATIC_FALSE@ifuncmain4picstatic$(EXEEXT): $(ifuncmain4picstatic_OBJECTS) $(ifuncmain4picstatic_DEPENDENCIES) $(EXTRA_ifuncmain4picstatic_DEPENDENCIES) 
-@HAVE_STATIC_FALSE@	@rm -f ifuncmain4picstatic$(EXEEXT)
-@HAVE_STATIC_FALSE@	$(AM_V_CCLD)$(LINK) $(ifuncmain4picstatic_OBJECTS) $(ifuncmain4picstatic_LDADD) $(LIBS)
-
 @IFUNC_FALSE@ifuncmain4picstatic$(EXEEXT): $(ifuncmain4picstatic_OBJECTS) $(ifuncmain4picstatic_DEPENDENCIES) $(EXTRA_ifuncmain4picstatic_DEPENDENCIES) 
 @IFUNC_FALSE@	@rm -f ifuncmain4picstatic$(EXEEXT)
 @IFUNC_FALSE@	$(AM_V_CCLD)$(LINK) $(ifuncmain4picstatic_OBJECTS) $(ifuncmain4picstatic_LDADD) $(LIBS)
 
-@IFUNC_STATIC_FALSE@ifuncmain4picstatic$(EXEEXT): $(ifuncmain4picstatic_OBJECTS) $(ifuncmain4picstatic_DEPENDENCIES) $(EXTRA_ifuncmain4picstatic_DEPENDENCIES) 
-@IFUNC_STATIC_FALSE@	@rm -f ifuncmain4picstatic$(EXEEXT)
-@IFUNC_STATIC_FALSE@	$(AM_V_CCLD)$(LINK) $(ifuncmain4picstatic_OBJECTS) $(ifuncmain4picstatic_LDADD) $(LIBS)
-
 @NATIVE_LINKER_FALSE@ifuncmain4picstatic$(EXEEXT): $(ifuncmain4picstatic_OBJECTS) $(ifuncmain4picstatic_DEPENDENCIES) $(EXTRA_ifuncmain4picstatic_DEPENDENCIES) 
 @NATIVE_LINKER_FALSE@	@rm -f ifuncmain4picstatic$(EXEEXT)
 @NATIVE_LINKER_FALSE@	$(AM_V_CCLD)$(LINK) $(ifuncmain4picstatic_OBJECTS) $(ifuncmain4picstatic_LDADD) $(LIBS)
@@ -3935,18 +3936,10 @@ ifuncmain5$(EXEEXT): $(ifuncmain5_OBJECTS) $(ifuncmain5_DEPENDENCIES) $(EXTRA_if
 @GCC_FALSE@	@rm -f ifuncmain5picstatic$(EXEEXT)
 @GCC_FALSE@	$(AM_V_CCLD)$(LINK) $(ifuncmain5picstatic_OBJECTS) $(ifuncmain5picstatic_LDADD) $(LIBS)
 
-@HAVE_STATIC_FALSE@ifuncmain5picstatic$(EXEEXT): $(ifuncmain5picstatic_OBJECTS) $(ifuncmain5picstatic_DEPENDENCIES) $(EXTRA_ifuncmain5picstatic_DEPENDENCIES) 
-@HAVE_STATIC_FALSE@	@rm -f ifuncmain5picstatic$(EXEEXT)
-@HAVE_STATIC_FALSE@	$(AM_V_CCLD)$(LINK) $(ifuncmain5picstatic_OBJECTS) $(ifuncmain5picstatic_LDADD) $(LIBS)
-
 @IFUNC_FALSE@ifuncmain5picstatic$(EXEEXT): $(ifuncmain5picstatic_OBJECTS) $(ifuncmain5picstatic_DEPENDENCIES) $(EXTRA_ifuncmain5picstatic_DEPENDENCIES) 
 @IFUNC_FALSE@	@rm -f ifuncmain5picstatic$(EXEEXT)
 @IFUNC_FALSE@	$(AM_V_CCLD)$(LINK) $(ifuncmain5picstatic_OBJECTS) $(ifuncmain5picstatic_LDADD) $(LIBS)
 
-@IFUNC_STATIC_FALSE@ifuncmain5picstatic$(EXEEXT): $(ifuncmain5picstatic_OBJECTS) $(ifuncmain5picstatic_DEPENDENCIES) $(EXTRA_ifuncmain5picstatic_DEPENDENCIES) 
-@IFUNC_STATIC_FALSE@	@rm -f ifuncmain5picstatic$(EXEEXT)
-@IFUNC_STATIC_FALSE@	$(AM_V_CCLD)$(LINK) $(ifuncmain5picstatic_OBJECTS) $(ifuncmain5picstatic_LDADD) $(LIBS)
-
 @NATIVE_LINKER_FALSE@ifuncmain5picstatic$(EXEEXT): $(ifuncmain5picstatic_OBJECTS) $(ifuncmain5picstatic_DEPENDENCIES) $(EXTRA_ifuncmain5picstatic_DEPENDENCIES) 
 @NATIVE_LINKER_FALSE@	@rm -f ifuncmain5picstatic$(EXEEXT)
 @NATIVE_LINKER_FALSE@	$(AM_V_CCLD)$(LINK) $(ifuncmain5picstatic_OBJECTS) $(ifuncmain5picstatic_LDADD) $(LIBS)
@@ -4011,18 +4004,10 @@ ifuncmain7$(EXEEXT): $(ifuncmain7_OBJECTS) $(ifuncmain7_DEPENDENCIES) $(EXTRA_if
 @GCC_FALSE@	@rm -f ifuncmain7picstatic$(EXEEXT)
 @GCC_FALSE@	$(AM_V_CCLD)$(LINK) $(ifuncmain7picstatic_OBJECTS) $(ifuncmain7picstatic_LDADD) $(LIBS)
 
-@HAVE_STATIC_FALSE@ifuncmain7picstatic$(EXEEXT): $(ifuncmain7picstatic_OBJECTS) $(ifuncmain7picstatic_DEPENDENCIES) $(EXTRA_ifuncmain7picstatic_DEPENDENCIES) 
-@HAVE_STATIC_FALSE@	@rm -f ifuncmain7picstatic$(EXEEXT)
-@HAVE_STATIC_FALSE@	$(AM_V_CCLD)$(LINK) $(ifuncmain7picstatic_OBJECTS) $(ifuncmain7picstatic_LDADD) $(LIBS)
-
 @IFUNC_FALSE@ifuncmain7picstatic$(EXEEXT): $(ifuncmain7picstatic_OBJECTS) $(ifuncmain7picstatic_DEPENDENCIES) $(EXTRA_ifuncmain7picstatic_DEPENDENCIES) 
 @IFUNC_FALSE@	@rm -f ifuncmain7picstatic$(EXEEXT)
 @IFUNC_FALSE@	$(AM_V_CCLD)$(LINK) $(ifuncmain7picstatic_OBJECTS) $(ifuncmain7picstatic_LDADD) $(LIBS)
 
-@IFUNC_STATIC_FALSE@ifuncmain7picstatic$(EXEEXT): $(ifuncmain7picstatic_OBJECTS) $(ifuncmain7picstatic_DEPENDENCIES) $(EXTRA_ifuncmain7picstatic_DEPENDENCIES) 
-@IFUNC_STATIC_FALSE@	@rm -f ifuncmain7picstatic$(EXEEXT)
-@IFUNC_STATIC_FALSE@	$(AM_V_CCLD)$(LINK) $(ifuncmain7picstatic_OBJECTS) $(ifuncmain7picstatic_LDADD) $(LIBS)
-
 @NATIVE_LINKER_FALSE@ifuncmain7picstatic$(EXEEXT): $(ifuncmain7picstatic_OBJECTS) $(ifuncmain7picstatic_DEPENDENCIES) $(EXTRA_ifuncmain7picstatic_DEPENDENCIES) 
 @NATIVE_LINKER_FALSE@	@rm -f ifuncmain7picstatic$(EXEEXT)
 @NATIVE_LINKER_FALSE@	$(AM_V_CCLD)$(LINK) $(ifuncmain7picstatic_OBJECTS) $(ifuncmain7picstatic_LDADD) $(LIBS)
@@ -4783,6 +4768,14 @@ weak_undef_test_2$(EXEEXT): $(weak_undef_test_2_OBJECTS) $(weak_undef_test_2_DEP
 	@rm -f weak_undef_test_2$(EXEEXT)
 	$(AM_V_CXXLD)$(weak_undef_test_2_LINK) $(weak_undef_test_2_OBJECTS) $(weak_undef_test_2_LDADD) $(LIBS)
 
+weak_undef_test_3$(EXEEXT): $(weak_undef_test_3_OBJECTS) $(weak_undef_test_3_DEPENDENCIES) $(EXTRA_weak_undef_test_3_DEPENDENCIES) 
+	@rm -f weak_undef_test_3$(EXEEXT)
+	$(AM_V_CCLD)$(weak_undef_test_3_LINK) $(weak_undef_test_3_OBJECTS) $(weak_undef_test_3_LDADD) $(LIBS)
+
+weak_undef_test_4$(EXEEXT): $(weak_undef_test_4_OBJECTS) $(weak_undef_test_4_DEPENDENCIES) $(EXTRA_weak_undef_test_4_DEPENDENCIES) 
+	@rm -f weak_undef_test_4$(EXEEXT)
+	$(AM_V_CCLD)$(weak_undef_test_4_LINK) $(weak_undef_test_4_OBJECTS) $(weak_undef_test_4_LDADD) $(LIBS)
+
 weak_unresolved_symbols_test$(EXEEXT): $(weak_unresolved_symbols_test_OBJECTS) $(weak_unresolved_symbols_test_DEPENDENCIES) $(EXTRA_weak_unresolved_symbols_test_DEPENDENCIES) 
 	@rm -f weak_unresolved_symbols_test$(EXEEXT)
 	$(AM_V_CXXLD)$(weak_unresolved_symbols_test_LINK) $(weak_unresolved_symbols_test_OBJECTS) $(weak_unresolved_symbols_test_LDADD) $(LIBS)
@@ -4955,6 +4948,8 @@ distclean-compile:
 @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/weak_test.Po@am__quote@
 @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/weak_undef_test.Po@am__quote@
 @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/weak_undef_test_2.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/weak_undef_test_3-weak_undef_test_3.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/weak_undef_test_4.Po@am__quote@
 @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/weak_unresolved_symbols_test-weak_unresolved_symbols_test.Po@am__quote@
 
 .c.o:
@@ -5237,6 +5232,20 @@ pr20308e_test-pr20308_main.obj: pr20308_main.c
 @AMDEP_TRUE@@am__fastdepCC_FALSE@	DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
 @am__fastdepCC_FALSE@	$(AM_V_CC@am__nodep@)$(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(pr20308e_test_CFLAGS) $(CFLAGS) -c -o pr20308e_test-pr20308_main.obj `if test -f 'pr20308_main.c'; then $(CYGPATH_W) 'pr20308_main.c'; else $(CYGPATH_W) '$(srcdir)/pr20308_main.c'; fi`
 
+weak_undef_test_3-weak_undef_test_3.o: weak_undef_test_3.c
+@am__fastdepCC_TRUE@	$(AM_V_CC)$(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(weak_undef_test_3_CFLAGS) $(CFLAGS) -MT weak_undef_test_3-weak_undef_test_3.o -MD -MP -MF $(DEPDIR)/weak_undef_test_3-weak_undef_test_3.Tpo -c -o weak_undef_test_3-weak_undef_test_3.o `test -f 'weak_undef_test_3.c' || echo '$(srcdir)/'`weak_undef_test_3.c
+@am__fastdepCC_TRUE@	$(AM_V_at)$(am__mv) $(DEPDIR)/weak_undef_test_3-weak_undef_test_3.Tpo $(DEPDIR)/weak_undef_test_3-weak_undef_test_3.Po
+@AMDEP_TRUE@@am__fastdepCC_FALSE@	$(AM_V_CC)source='weak_undef_test_3.c' object='weak_undef_test_3-weak_undef_test_3.o' libtool=no @AMDEPBACKSLASH@
+@AMDEP_TRUE@@am__fastdepCC_FALSE@	DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
+@am__fastdepCC_FALSE@	$(AM_V_CC@am__nodep@)$(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(weak_undef_test_3_CFLAGS) $(CFLAGS) -c -o weak_undef_test_3-weak_undef_test_3.o `test -f 'weak_undef_test_3.c' || echo '$(srcdir)/'`weak_undef_test_3.c
+
+weak_undef_test_3-weak_undef_test_3.obj: weak_undef_test_3.c
+@am__fastdepCC_TRUE@	$(AM_V_CC)$(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(weak_undef_test_3_CFLAGS) $(CFLAGS) -MT weak_undef_test_3-weak_undef_test_3.obj -MD -MP -MF $(DEPDIR)/weak_undef_test_3-weak_undef_test_3.Tpo -c -o weak_undef_test_3-weak_undef_test_3.obj `if test -f 'weak_undef_test_3.c'; then $(CYGPATH_W) 'weak_undef_test_3.c'; else $(CYGPATH_W) '$(srcdir)/weak_undef_test_3.c'; fi`
+@am__fastdepCC_TRUE@	$(AM_V_at)$(am__mv) $(DEPDIR)/weak_undef_test_3-weak_undef_test_3.Tpo $(DEPDIR)/weak_undef_test_3-weak_undef_test_3.Po
+@AMDEP_TRUE@@am__fastdepCC_FALSE@	$(AM_V_CC)source='weak_undef_test_3.c' object='weak_undef_test_3-weak_undef_test_3.obj' libtool=no @AMDEPBACKSLASH@
+@AMDEP_TRUE@@am__fastdepCC_FALSE@	DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
+@am__fastdepCC_FALSE@	$(AM_V_CC@am__nodep@)$(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(weak_undef_test_3_CFLAGS) $(CFLAGS) -c -o weak_undef_test_3-weak_undef_test_3.obj `if test -f 'weak_undef_test_3.c'; then $(CYGPATH_W) 'weak_undef_test_3.c'; else $(CYGPATH_W) '$(srcdir)/weak_undef_test_3.c'; fi`
+
 .cc.o:
 @am__fastdepCXX_TRUE@	$(AM_V_CXX)$(CXXCOMPILE) -MT $@ -MD -MP -MF $(DEPDIR)/$*.Tpo -c -o $@ $<
 @am__fastdepCXX_TRUE@	$(AM_V_at)$(am__mv) $(DEPDIR)/$*.Tpo $(DEPDIR)/$*.Po
@@ -6872,6 +6881,20 @@ weak_undef_test_2.log: weak_undef_test_2$(EXEEXT)
 	--log-file $$b.log --trs-file $$b.trs \
 	$(am__common_driver_flags) $(AM_LOG_DRIVER_FLAGS) $(LOG_DRIVER_FLAGS) -- $(LOG_COMPILE) \
 	"$$tst" $(AM_TESTS_FD_REDIRECT)
+weak_undef_test_3.log: weak_undef_test_3$(EXEEXT)
+	@p='weak_undef_test_3$(EXEEXT)'; \
+	b='weak_undef_test_3'; \
+	$(am__check_pre) $(LOG_DRIVER) --test-name "$$f" \
+	--log-file $$b.log --trs-file $$b.trs \
+	$(am__common_driver_flags) $(AM_LOG_DRIVER_FLAGS) $(LOG_DRIVER_FLAGS) -- $(LOG_COMPILE) \
+	"$$tst" $(AM_TESTS_FD_REDIRECT)
+weak_undef_test_4.log: weak_undef_test_4$(EXEEXT)
+	@p='weak_undef_test_4$(EXEEXT)'; \
+	b='weak_undef_test_4'; \
+	$(am__check_pre) $(LOG_DRIVER) --test-name "$$f" \
+	--log-file $$b.log --trs-file $$b.trs \
+	$(am__common_driver_flags) $(AM_LOG_DRIVER_FLAGS) $(LOG_DRIVER_FLAGS) -- $(LOG_COMPILE) \
+	"$$tst" $(AM_TESTS_FD_REDIRECT)
 weak_undef_nonpic_test.log: weak_undef_nonpic_test$(EXEEXT)
 	@p='weak_undef_nonpic_test$(EXEEXT)'; \
 	b='weak_undef_nonpic_test'; \
@@ -8304,6 +8327,10 @@ uninstall-am:
 @GCC_TRUE@@NATIVE_LINKER_TRUE@	$(CXXCOMPILE) -c -o $@ $<
 @GCC_TRUE@@NATIVE_LINKER_TRUE@weak_undef_file4.o: weak_undef_file4.cc
 @GCC_TRUE@@NATIVE_LINKER_TRUE@	$(CXXCOMPILE) -c -o $@ $<
+@GCC_TRUE@@NATIVE_LINKER_TRUE@weak_undef_lib_4.o:  weak_undef_lib_4.c
+@GCC_TRUE@@NATIVE_LINKER_TRUE@	$(COMPILE) -fPIC -c -o $@ $<
+@GCC_TRUE@@NATIVE_LINKER_TRUE@weak_undef_lib_4.so: gcctestdir/ld weak_undef_lib_4.o
+@GCC_TRUE@@NATIVE_LINKER_TRUE@	$(LINK) -shared -o $@ weak_undef_lib_4.o
 @FN_PTRS_IN_SO_WITHOUT_PIC_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@weak_undef_file1_nonpic.o: weak_undef_file1.cc
 @FN_PTRS_IN_SO_WITHOUT_PIC_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@	$(CXXCOMPILE) -c -o $@ $<
 @FN_PTRS_IN_SO_WITHOUT_PIC_TRUE@@GCC_TRUE@@NATIVE_LINKER_TRUE@weak_undef_file2_nonpic.o: weak_undef_file2.cc
@@ -9414,10 +9441,11 @@ uninstall-am:
 @GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@	$(COMPILE) -c -fPIC -o $@ $<
 @GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncmain1pie.o: ifuncmain1.c
 @GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@	$(COMPILE) -c -fPIE -o $@ $<
-@GCC_TRUE@@HAVE_STATIC_TRUE@@IFUNC_STATIC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncmain1picstatic: ifuncmain1pic.o ifuncmod1.o gcctestdir/ld
-@GCC_TRUE@@HAVE_STATIC_TRUE@@IFUNC_STATIC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@	$(LINK) -static ifuncmain1pic.o ifuncmod1.o
 @GCC_TRUE@@HAVE_STATIC_TRUE@@IFUNC_STATIC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncmod1.so.stderr: ifuncmod1.so
 @GCC_TRUE@@HAVE_STATIC_TRUE@@IFUNC_STATIC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@	$(TEST_READELF) -s $< > /dev/null 2> $@
+
+@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncmain1picstatic: ifuncmain1pic.o ifuncmod1.o gcctestdir/ld
+@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@	$(LINK) -static ifuncmain1pic.o ifuncmod1.o
 @GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncmain1pic: ifuncmain1pic.o ifuncmod1.so gcctestdir/ld
 @GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@	$(LINK) ifuncmain1pic.o ifuncmod1.so -Wl,-R,.
 @GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncmain1vispic.o: ifuncmain1vis.c
@@ -9440,8 +9468,9 @@ uninstall-am:
 
 @GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncdep2pic.o: ifuncdep2.c
 @GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@	$(COMPILE) -c -fPIC -o $@ $<
-@GCC_TRUE@@HAVE_STATIC_TRUE@@IFUNC_STATIC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncmain2picstatic: ifuncmain2pic.o ifuncdep2pic.o gcctestdir/ld
-@GCC_TRUE@@HAVE_STATIC_TRUE@@IFUNC_STATIC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@	$(LINK) -static ifuncmain2pic.o ifuncdep2pic.o
+
+@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncmain2picstatic: ifuncmain2pic.o ifuncdep2pic.o gcctestdir/ld
+@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@	$(LINK) -static ifuncmain2pic.o ifuncdep2pic.o
 @GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncmain2pic: ifuncmain2pic.o ifuncdep2pic.o gcctestdir/ld
 @GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@	$(LINK) ifuncmain2pic.o ifuncdep2pic.o
 
@@ -9452,8 +9481,9 @@ uninstall-am:
 
 @GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncmain4pic.o: ifuncmain4.c
 @GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@	$(COMPILE) -c -fPIC -o $@ $<
-@GCC_TRUE@@HAVE_STATIC_TRUE@@IFUNC_STATIC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncmain4picstatic: ifuncmain4pic.o gcctestdir/ld
-@GCC_TRUE@@HAVE_STATIC_TRUE@@IFUNC_STATIC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@	$(LINK) -static ifuncmain4pic.o
+
+@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncmain4picstatic: ifuncmain4pic.o gcctestdir/ld
+@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@	$(LINK) -static ifuncmain4pic.o
 
 @GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncmain5pic.o: ifuncmain5.c
 @GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@	$(COMPILE) -c -fPIC -o $@ $<
@@ -9468,8 +9498,9 @@ uninstall-am:
 
 @GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncdep5.o: ifuncmod5.c
 @GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@	$(COMPILE) -c -o $@ $<
-@GCC_TRUE@@HAVE_STATIC_TRUE@@IFUNC_STATIC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncmain5picstatic: ifuncmain5pic.o ifuncmod5.o gcctestdir/ld
-@GCC_TRUE@@HAVE_STATIC_TRUE@@IFUNC_STATIC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@	$(LINK) -static ifuncmain5pic.o ifuncmod5.o
+
+@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncmain5picstatic: ifuncmain5pic.o ifuncmod5.o gcctestdir/ld
+@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@	$(LINK) -static ifuncmain5pic.o ifuncmod5.o
 @GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncmain5pic: ifuncmain5pic.o ifuncmod5.so gcctestdir/ld
 @GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@	$(LINK) ifuncmain5pic.o ifuncmod5.so -Wl,-R,.
 @GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncmain5staticpic: ifuncmain5pic.o ifuncmod5.o gcctestdir/ld
@@ -9492,8 +9523,9 @@ uninstall-am:
 
 @GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncmain7pie.o: ifuncmain7.c
 @GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@	$(COMPILE) -c -fPIE -o $@ $<
-@GCC_TRUE@@HAVE_STATIC_TRUE@@IFUNC_STATIC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncmain7picstatic: ifuncmain7pic.o gcctestdir/ld
-@GCC_TRUE@@HAVE_STATIC_TRUE@@IFUNC_STATIC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@	$(LINK) -static ifuncmain7pic.o
+
+@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncmain7picstatic: ifuncmain7pic.o gcctestdir/ld
+@GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@	$(LINK) -static ifuncmain7pic.o
 @GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncmain7pic: ifuncmain7pic.o gcctestdir/ld
 @GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@	$(LINK) ifuncmain7pic.o
 @GCC_TRUE@@IFUNC_TRUE@@NATIVE_LINKER_TRUE@ifuncmain7pie: ifuncmain7pie.o gcctestdir/ld
diff --git a/gold/testsuite/discard_locals_relocatable_test.c b/gold/testsuite/discard_locals_relocatable_test.c
index 0b36069..98691e9 100644
--- a/gold/testsuite/discard_locals_relocatable_test.c
+++ b/gold/testsuite/discard_locals_relocatable_test.c
@@ -31,14 +31,8 @@
    in the output object file. */
 __asm__ (".Lshould_be_discarded:");
 
-#ifdef __powerpc__
 /* Test wants to keep one local.  Satisfy it.  */
-#ifdef __powerpc64__
-__asm__ (".reloc 0,R_PPC64_NONE,.LC0");
-#else
-__asm__ (".reloc 0,R_PPC_NONE,.LC0");
-#endif
-#endif
+__asm__ (".dc.a .LC0 - .");
 
 extern void print_func (const char* s);
 
diff --git a/gold/testsuite/ver_test_pr31830_b.c b/gold/testsuite/ver_test_pr31830_b.c
index aba07cc..4464d05 100644
--- a/gold/testsuite/ver_test_pr31830_b.c
+++ b/gold/testsuite/ver_test_pr31830_b.c
@@ -1,3 +1,7 @@
 extern void __collector_foo_2_2(void);
+#if defined(__GNUC__) && __GNUC__ >= 10
 __attribute__((__symver__("foo@GLIBC_2.2.5")))
+#else
+__asm__ (".symver __collector_foo_2_2, foo@GLIBC_2.2.5");
+#endif
 void __collector_foo_2_2(void) {}
diff --git a/gold/testsuite/ver_test_pr31830_lto.c b/gold/testsuite/ver_test_pr31830_lto.c
index 999dd63..862ac68 100644
--- a/gold/testsuite/ver_test_pr31830_lto.c
+++ b/gold/testsuite/ver_test_pr31830_lto.c
@@ -1,5 +1,9 @@
 extern __inline __attribute__((__gnu_inline__)) void foo(void) {}
 extern void __collector_foo_2_2(void);
+#if defined(__GNUC__) && __GNUC__ >= 10
 __attribute__((__symver__("foo@GLIBC_2.2.5")))
+#else
+__asm__ (".symver __collector_foo_2_2, foo@GLIBC_2.2.5");
+#endif
 void __collector_foo_2_2(void) {}
 void foo(void) {}
diff --git a/gold/testsuite/weak_undef_lib_4.c b/gold/testsuite/weak_undef_lib_4.c
new file mode 100644
index 0000000..f8609c6
--- /dev/null
+++ b/gold/testsuite/weak_undef_lib_4.c
@@ -0,0 +1,40 @@
+/* weak_undef_lib_4.c -- test non-default weak undefined symbol in DSO.
+
+   Copyright (C) 2024 Free Software Foundation, Inc.
+
+   This file is part of gold.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
+   MA 02110-1301, USA.  */
+
+/* Non-default weak undefined symbol in DSO should be resolved to 0 at
+   runtime.  */
+
+#include <stdlib.h>
+
+extern void undefined (void) __attribute__((visibility("hidden"))) __attribute__((weak));
+extern void protected (void) __attribute__((visibility("protected")))  __attribute__((weak));
+
+extern void foo (void);
+
+void
+foo (void)
+{
+  if (&undefined != NULL)
+    abort ();
+
+  if (&protected != NULL)
+    abort ();
+}
diff --git a/gold/testsuite/weak_undef_test.cc b/gold/testsuite/weak_undef_test.cc
index 134b31a..80973cc 100644
--- a/gold/testsuite/weak_undef_test.cc
+++ b/gold/testsuite/weak_undef_test.cc
@@ -81,12 +81,15 @@ main()
       status = 1;
     }
 
+#if !defined __PIC__ && !defined __aarch64__
+  // This test always fails when GOT is used.
   if (&no_such_symbol_ != NULL)
     {
       fprintf(stderr, "FAILED weak undef test 4: %s\n",
               "&no_such_symbol_ is not NULL");
       status = 1;
     }
+#endif
 
   if (p1 != NULL)
     {
diff --git a/gold/testsuite/weak_undef_test_3.c b/gold/testsuite/weak_undef_test_3.c
new file mode 100644
index 0000000..a7b7750
--- /dev/null
+++ b/gold/testsuite/weak_undef_test_3.c
@@ -0,0 +1,40 @@
+/* weak_undef_test_3.c -- test non-default weak undefined symbol in PIE.
+
+   Copyright (C) 2024 Free Software Foundation, Inc.
+
+   This file is part of gold.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
+   MA 02110-1301, USA.  */
+
+/* Non-default weak undefined symbol in PIE should be resolved to 0 at
+   runtime.  */
+
+#include <stdlib.h>
+
+extern void undefined (void) __attribute__((visibility("hidden"))) __attribute__((weak));
+extern void protected (void) __attribute__((visibility("protected")))  __attribute__((weak));
+
+int
+main (void)
+{
+  if (&undefined != NULL)
+    abort ();
+
+  if (&protected != NULL)
+    abort ();
+
+  return 0;
+}
diff --git a/gold/testsuite/weak_undef_test_4.c b/gold/testsuite/weak_undef_test_4.c
new file mode 100644
index 0000000..ab2f8bc
--- /dev/null
+++ b/gold/testsuite/weak_undef_test_4.c
@@ -0,0 +1,29 @@
+/* weak_undef_test_4.c -- test non-default weak undefined symbol in DSO.
+
+   Copyright (C) 2024 Free Software Foundation, Inc.
+
+   This file is part of gold.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
+   MA 02110-1301, USA.  */
+
+extern void foo (void);
+
+int
+main (void)
+{
+  foo ();
+  return 0;
+}
diff --git a/gprof/po/pt_BR.po b/gprof/po/pt_BR.po
index 6735cb8..b3e9ad2 100644
--- a/gprof/po/pt_BR.po
+++ b/gprof/po/pt_BR.po
@@ -1,22 +1,23 @@
 # Brazilian Portuguese translation for gprof
-# Copyright (C) 2020 Free Software Foundation, Inc.
+# Copyright (C) 2024 Free Software Foundation, Inc.
 # This file is distributed under the same license as the binutils package.
 # Alexandre Folle de Menezes <afmenez@terra.com.br>, 2002.
-# Rafael Fontenelle <rafaelff@gnome.org>, 2013-2020.
+# Rafael Fontenelle <rafaelff@gnome.org>, 2013-2024.
+#
 msgid ""
 msgstr ""
-"Project-Id-Version: gprof 2.33.90\n"
-"Report-Msgid-Bugs-To: bug-binutils@gnu.org\n"
-"POT-Creation-Date: 2020-01-18 14:04+0000\n"
-"PO-Revision-Date: 2020-01-19 22:46-0300\n"
+"Project-Id-Version: gprof 2.41.90\n"
+"Report-Msgid-Bugs-To: https://sourceware.org/bugzilla/\n"
+"POT-Creation-Date: 2024-01-15 14:58+0000\n"
+"PO-Revision-Date: 2024-09-23 13:18-0300\n"
 "Last-Translator: Rafael Fontenelle <rafaelff@gnome.org>\n"
 "Language-Team: Brazilian Portuguese <ldpbr-translation@lists.sourceforge.net>\n"
 "Language: pt_BR\n"
 "MIME-Version: 1.0\n"
 "Content-Type: text/plain; charset=UTF-8\n"
 "Content-Transfer-Encoding: 8bit\n"
-"Plural-Forms: nplurals=2; plural=(n > 1);\n"
-"X-Generator: Virtaal 1.0.0-beta1\n"
+"Plural-Forms: nplurals=2; plural=(n > 1)\n"
+"X-Generator: Gtranslator 46.1\n"
 "X-Bugs: Report translation errors to the Language-Team address.\n"
 
 #: alpha.c:102 mips.c:54
@@ -28,12 +29,12 @@ msgstr "<filho indireto>"
 msgid "[find_call] %s: 0x%lx to 0x%lx\n"
 msgstr "[find_call] %s: 0x%lx até 0x%lx\n"
 
-#: alpha.c:129
+#: alpha.c:131
 #, c-format
 msgid "[find_call] 0x%lx: jsr%s <indirect_child>\n"
 msgstr "[find_call] 0x%lx: jsr%s <filho_indireto>\n"
 
-#: alpha.c:139
+#: alpha.c:141
 #, c-format
 msgid "[find_call] 0x%lx: bsr"
 msgstr "[find_call] 0x%lx: bsr"
@@ -58,7 +59,7 @@ msgstr "%s:%d: (%s:0x%lx) %lu execuções\n"
 msgid "<unknown>"
 msgstr "<desconhecido>"
 
-#: basic_blocks.c:543
+#: basic_blocks.c:539
 #, c-format
 msgid ""
 "\n"
@@ -75,7 +76,7 @@ msgstr ""
 "     Linha     Contador\n"
 "\n"
 
-#: basic_blocks.c:567
+#: basic_blocks.c:563
 #, c-format
 msgid ""
 "\n"
@@ -86,22 +87,22 @@ msgstr ""
 "Resumo da execução:\n"
 "\n"
 
-#: basic_blocks.c:568
+#: basic_blocks.c:564
 #, c-format
 msgid "%9ld   Executable lines in this file\n"
 msgstr "%9ld   Linhas executáveis neste arquivo\n"
 
-#: basic_blocks.c:570
+#: basic_blocks.c:566
 #, c-format
 msgid "%9ld   Lines executed\n"
 msgstr "%9ld   Linhas executadas\n"
 
-#: basic_blocks.c:571
+#: basic_blocks.c:567
 #, c-format
 msgid "%9.2f   Percent of the file executed\n"
 msgstr "%9.2f   Percentagem executada do arquivo\n"
 
-#: basic_blocks.c:575
+#: basic_blocks.c:571
 #, c-format
 msgid ""
 "\n"
@@ -110,7 +111,7 @@ msgstr ""
 "\n"
 "%9lu   Número total de execuções de linha\n"
 
-#: basic_blocks.c:577
+#: basic_blocks.c:573
 #, c-format
 msgid "%9.2f   Average executions per line\n"
 msgstr "%9.2f   Média de execuções por linha\n"
@@ -241,7 +242,7 @@ msgstr "<ciclo %d>"
 msgid "%s: unable to parse mapping file %s.\n"
 msgstr "%s: não foi possível analisar o arquivo de mapeamento %s.\n"
 
-#: corefile.c:89 corefile.c:523
+#: corefile.c:89 corefile.c:524
 #, c-format
 msgid "%s: could not open %s.\n"
 msgstr "%s: não foi possível abrir %s.\n"
@@ -271,107 +272,107 @@ msgstr "%s: impossível fazer -c\n"
 msgid "%s: -c not supported on architecture %s\n"
 msgstr "%s: -c não tem suporte na arquitetura %s\n"
 
-#: corefile.c:532 corefile.c:637
+#: corefile.c:533 corefile.c:640
 #, c-format
 msgid "%s: file `%s' has no symbols\n"
 msgstr "%s: o arquivo \"%s\" não tem sí­mbolos\n"
 
-#: corefile.c:537
+#: corefile.c:538
 #, c-format
 msgid "%s: file `%s' has too many symbols\n"
 msgstr "%s: o arquivo \"%s\" símbolos demais\n"
 
-#: corefile.c:904
+#: corefile.c:907
 #, c-format
 msgid "%s: somebody miscounted: ltab.len=%d instead of %ld\n"
 msgstr "%s: alguém contou mal: ltab.len=%d em lugar de %ld\n"
 
-#: gmon_io.c:83
+#: gmon_io.c:81
 #, c-format
 msgid "%s: address size has unexpected value of %u\n"
 msgstr "%s: tamanho do endereço tem valor inesperado de %u\n"
 
-#: gmon_io.c:318 gmon_io.c:414
+#: gmon_io.c:298 gmon_io.c:394
 #, c-format
 msgid "%s: file too short to be a gmon file\n"
 msgstr "%s: o arquivo é muito pequeno para ser um arquivo gmon\n"
 
-#: gmon_io.c:328 gmon_io.c:457
+#: gmon_io.c:308 gmon_io.c:437
 #, c-format
 msgid "%s: file `%s' has bad magic cookie\n"
 msgstr "%s: o arquivo \"%s\" tem um magic cookie inválido\n"
 
-#: gmon_io.c:339
+#: gmon_io.c:319
 #, c-format
 msgid "%s: file `%s' has unsupported version %d\n"
 msgstr "%s: o arquivo \"%s\" tem a versão sem suporte %d\n"
 
-#: gmon_io.c:369
+#: gmon_io.c:349
 #, c-format
 msgid "%s: %s: found bad tag %d (file corrupted?)\n"
 msgstr "%s: %s: marca %d inválida encontrada (arquivo corrompido?)\n"
 
-#: gmon_io.c:436
+#: gmon_io.c:416
 #, c-format
 msgid "%s: profiling rate incompatible with first gmon file\n"
 msgstr "%s: taxa de análises de perfil incompatível com o primeiro arquivo gmon\n"
 
-#: gmon_io.c:487
+#: gmon_io.c:467
 #, c-format
 msgid "%s: incompatible with first gmon file\n"
 msgstr "%s: incompatível com o primeiro arquivo gmon\n"
 
-#: gmon_io.c:517
+#: gmon_io.c:497
 #, c-format
 msgid "%s: file '%s' does not appear to be in gmon.out format\n"
 msgstr "%s: o arquivo \"%s\" não parece estar no formato gmon.out\n"
 
-#: gmon_io.c:530
+#: gmon_io.c:510
 #, c-format
 msgid "%s: unexpected EOF after reading %d/%d bins\n"
 msgstr "%s: final de arquivo inesperado depois de ler %d/%d binários\n"
 
-#: gmon_io.c:562
+#: gmon_io.c:542
 #, c-format
 msgid "time is in ticks, not seconds\n"
 msgstr "o tempo está em tiques, não em segundos\n"
 
-#: gmon_io.c:568 gmon_io.c:748
+#: gmon_io.c:548 gmon_io.c:728
 #, c-format
 msgid "%s: don't know how to deal with file format %d\n"
 msgstr "%s: não sei como lidar com o arquivo de formato %d\n"
 
-#: gmon_io.c:578
+#: gmon_io.c:558
 #, c-format
 msgid "File `%s' (version %d) contains:\n"
 msgstr "O arquivo \"%s\" (versão %d) contém:\n"
 
-#: gmon_io.c:581
+#: gmon_io.c:561
 #, c-format
 msgid "\t%d histogram record\n"
 msgstr "\t%d registro de histograma\n"
 
-#: gmon_io.c:582
+#: gmon_io.c:562
 #, c-format
 msgid "\t%d histogram records\n"
 msgstr "\t%d registros de histogramas\n"
 
-#: gmon_io.c:584
+#: gmon_io.c:564
 #, c-format
 msgid "\t%d call-graph record\n"
 msgstr "\t%d registro de gráfico de chamadas\n"
 
-#: gmon_io.c:585
+#: gmon_io.c:565
 #, c-format
 msgid "\t%d call-graph records\n"
 msgstr "\t%d registros de gráficos de chamadas\n"
 
-#: gmon_io.c:587
+#: gmon_io.c:567
 #, c-format
 msgid "\t%d basic-block count record\n"
 msgstr "\t%d registro de contagem de blocos básicos\n"
 
-#: gmon_io.c:588
+#: gmon_io.c:568
 #, c-format
 msgid "\t%d basic-block count records\n"
 msgstr "\t%d registros de contagens de blocos básicos\n"
@@ -379,7 +380,7 @@ msgstr "\t%d registros de contagens de blocos básicos\n"
 #: gprof.c:162
 #, c-format
 msgid ""
-"Usage: %s [-[abcDhilLrsTvwxyz]] [-[ACeEfFJnNOpPqQRStZ][name]] [-I dirs]\n"
+"Usage: %s [-[abcDhilLrsTvwxyz]] [-[ABCeEfFJnNOpPqQRStZ][name]] [-I dirs]\n"
 "\t[-d[num]] [-k from/to] [-m min-count] [-t table-length]\n"
 "\t[--[no-]annotated-source[=name]] [--[no-]exec-counts[=name]]\n"
 "\t[--[no-]flat-profile[=name]] [--[no-]graph[=name]]\n"
@@ -393,8 +394,8 @@ msgid ""
 "\t[--demangle[=STYLE]] [--no-demangle] [--external-symbol-table=name] [@FILE]\n"
 "\t[image-file] [profile-file...]\n"
 msgstr ""
-"Uso: %s [-[abcDhilLrsTvwxyz]] [-[ACeEfFJnNOpPqQRStZ][nome]] [-I dirs]\n"
-"\t[-d[num]] [-k de/a] [-m contagem-mín] [-t tamanho-tabela]\n"
+"Uso: %s [-[abcDhilLrsTvwxyz]] [-[ABCeEfFJnNOpPqQRStZ][nome]] [-I dirs]\n"
+"\t[-d[num]] [-k de/para] [-m contagem-mín] [-t tamanho-tabela]\n"
 "\t[--[no-]annotated-source[=nome]] [--[no-]exec-counts[=nome]]\n"
 "\t[--[no-]flat-profile[=nome]] [--[no-]graph[=nome]]\n"
 "\t[--[no-]time=nome] [--all-lines] [--brief] [--debug[=nível]]\n"
@@ -402,7 +403,7 @@ msgstr ""
 "\t[--directory-path=dirs] [--display-unused-functions]\n"
 "\t[--file-format=nome] [--file-info] [--help] [--line] [--min-count=n]\n"
 "\t[--no-static] [--print-path] [--separate-files]\n"
-"\t[--static-call-graph] [--sum] [--table-length=long] [--traditional]\n"
+"\t[--static-call-graph] [--sum] [--table-length=tam] [--traditional]\n"
 "\t[--version] [--width=n] [--ignore-non-functions]\n"
 "\t[--demangle[=ESTILO]] [--no-demangle] [--external-symbol-table=nome] [@ARQ]\n"
 "\t[arquivo-imagem] [arquivo-perfil...]\n"
@@ -414,53 +415,53 @@ msgstr ""
 "Relate erros para %s\n"
 "Relate erros de tradução para <https://translationproject.org/team/pt_BR.html>\n"
 
-#: gprof.c:254
+#: gprof.c:252
 #, c-format
 msgid "%s: debugging not supported; -d ignored\n"
 msgstr "%s: não há suporte para depuração; -d ignorado\n"
 
-#: gprof.c:340
+#: gprof.c:338
 #, c-format
 msgid "%s: unknown file format %s\n"
 msgstr "%s: formato de arquivo %s desconhecido\n"
 
 #. This output is intended to follow the GNU standards document.
-#: gprof.c:428
+#: gprof.c:426
 #, c-format
 msgid "GNU gprof %s\n"
 msgstr "GNU gprof %s\n"
 
-#: gprof.c:429
+#: gprof.c:427
 #, c-format
 msgid "Based on BSD gprof, copyright 1983 Regents of the University of California.\n"
 msgstr "Baseado no BSD gprof, copyright 1983 Regents of the University of California.\n"
 
-#: gprof.c:430
+#: gprof.c:428
 #, c-format
 msgid "This program is free software.  This program has absolutely no warranty.\n"
 msgstr "Este programa é software livre. Este programa tem absolutamente nenhuma garantia.\n"
 
-#: gprof.c:471
+#: gprof.c:469
 #, c-format
 msgid "%s: unknown demangling style `%s'\n"
 msgstr "%s: estilo de desembaralhamento desconhecido \"%s\"\n"
 
-#: gprof.c:494
+#: gprof.c:492
 #, c-format
 msgid "%s: Only one of --function-ordering and --file-ordering may be specified.\n"
 msgstr "%s: Apenas um de --function-ordering e --file-ordering pode ser especificado.\n"
 
-#: gprof.c:546
+#: gprof.c:544
 #, c-format
 msgid "%s: sorry, file format `prof' is not yet supported\n"
 msgstr "%s: sinto muito, mas não há suporte ao formato de arquivo \"prof\"\n"
 
-#: gprof.c:600
+#: gprof.c:598
 #, c-format
 msgid "%s: gmon.out file is missing histogram\n"
 msgstr "%s: falta o histograma do arquivo gmon.out\n"
 
-#: gprof.c:607
+#: gprof.c:605
 #, c-format
 msgid "%s: gmon.out file is missing call-graph data\n"
 msgstr "%s: faltam os dados do gráfico de chamadas do arquivo gmon.out\n"
@@ -577,27 +578,27 @@ msgstr "Perfil plano:\n"
 msgid "%s: found a symbol that covers several histogram records"
 msgstr "%s: encontrado um sí­mbolo que cobre vários registros de histogramas"
 
-#: mips.c:71
+#: mips.c:73
 #, c-format
 msgid "[find_call] 0x%lx: jal"
 msgstr "[find_call] 0x%lx: jal"
 
-#: mips.c:99
+#: mips.c:101
 #, c-format
 msgid "[find_call] 0x%lx: jalr\n"
 msgstr "[find_call] 0x%lx: jalr\n"
 
-#: source.c:162
+#: source.c:166
 #, c-format
 msgid "%s: could not locate `%s'\n"
 msgstr "%s: não foi possível encontrar \"%s\"\n"
 
-#: source.c:237
+#: source.c:244
 #, c-format
 msgid "*** File %s:\n"
 msgstr "*** Arquivo %s:\n"
 
-#: utils.c:106
+#: utils.c:105
 #, c-format
 msgid " <cycle %d>"
 msgstr " <ciclo %d>"
diff --git a/gprofng/common/hwc_cpus.h b/gprofng/common/hwc_cpus.h
index 88788f3..3d22d92 100644
--- a/gprofng/common/hwc_cpus.h
+++ b/gprofng/common/hwc_cpus.h
@@ -128,6 +128,12 @@ extern cpu_info_t *read_cpuinfo();
 #define CPC_SPARC64_X       4006 /* Athena */
 #define CPC_SPARC64_XII     4010 /* Athena++ */
 
+// Arm
+#define CPC_ARM_GENERIC     3500
+#define CPC_ARM64_AMCC      3501 /* Applied Micro Circuits Corporation (ARM) */
+#define CPC_ARM_NEOVERSE_N1 3502
+#define CPC_ARM_AMPERE_1    3503
+
 #define	AMD_FAM_19H_ZEN3_NAME	"AMD Family 19h (Zen3)"
 #define	AMD_FAM_19H_ZEN4_NAME	"AMD Family 19h (Zen4)"
 
diff --git a/gprofng/common/hwcdrv.c b/gprofng/common/hwcdrv.c
index aaf3acd..51492a8 100644
--- a/gprofng/common/hwcdrv.c
+++ b/gprofng/common/hwcdrv.c
@@ -574,6 +574,7 @@ read_sample (counter_state_t *ctr_state, int msgsz, uint64_t *rvalue,
 static void
 dump_perf_event_attr (struct perf_event_attr *at)
 {
+#if defined(DEBUG)
   TprintfT (DBG_LT2, "dump_perf_event_attr:  size=%d  type=%d  sample_period=%lld\n"
 	    "  config=0x%llx  config1=0x%llx  config2=0x%llx  wakeup_events=%lld __reserved_1=%lld\n",
 	    (int) at->size, (int) at->type, (unsigned long long) at->sample_period,
@@ -589,13 +590,13 @@ dump_perf_event_attr (struct perf_event_attr *at)
   DUMP_F (exclude_kernel);
   DUMP_F (exclude_hv);
   DUMP_F (exclude_idle);
-  //    DUMP_F(xmmap);
   DUMP_F (comm);
   DUMP_F (freq);
   DUMP_F (inherit_stat);
   DUMP_F (enable_on_exec);
   DUMP_F (task);
   DUMP_F (watermark);
+#endif
 }
 
 static void
diff --git a/gprofng/common/hwcentry.h b/gprofng/common/hwcentry.h
index b2ab8b9..0b923fc 100644
--- a/gprofng/common/hwcentry.h
+++ b/gprofng/common/hwcentry.h
@@ -200,17 +200,12 @@ extern "C"
   extern char *hwc_get_docref (char *buf, size_t buflen);
   /* Return a CPU HWC document reference, or NULL. */
 
-  // TBR
-  extern char *hwc_get_default_cntrs ();
-  /* Return a default HW counter string; may be NULL, or zero-length */
-  /* NULL means none is defined in the table; or zero-length means string defined could not be loaded */
-
   extern char *hwc_get_default_cntrs2 (int forKernel, int style);
   /* like hwc_get_default_cntrs() for style==1 */
   /* but allows other styles of formatting as well */
   /* deprecate and eventually remove hwc_get_default_cntrs() */
 
-  extern char *hwc_get_orig_default_cntrs ();
+  extern char *hwc_get_orig_default_cntrs (int forKernel);
   /* Get the default HW counter string as set in the table */
   /* NULL means none is defined in the table */
 
diff --git a/gprofng/common/hwctable.c b/gprofng/common/hwctable.c
index 0baf63b..b2b4a99 100644
--- a/gprofng/common/hwctable.c
+++ b/gprofng/common/hwctable.c
@@ -243,6 +243,7 @@ static Hwcentry papi_generic_list[] = {
   {NULL, NULL, 0, NULL, 0, 0, 0, 0, ABST_NONE}
 };
 
+#if defined(__i386__) || defined(__x86_64)
 /* Kernel profiling pseudo-chip, OBSOLETE (To support 12.3 and earlier, TBR) */
 static Hwcentry kproflist[] = {
   {"kcycles", "kcycles", 0, STXT ("KCPU Cycles"), PRELOADS_5, 1, ABST_NONE},
@@ -1215,6 +1216,7 @@ static Hwcentry amd_15h[] = {
   {"insts1", "EX_retired_instr_w_excp_intr", 1, NULL, PRELOADS_8, 0, ABST_NONE},
   {NULL, NULL, 0, NULL, 0, 0, 0, 0, ABST_NONE}
 };
+#endif  /* __i386__ or __x86_64 */
 
 #define INIT_HWC(nm, mtr, cfg, ty) .name = (nm), .metric = (mtr), \
     .config = (cfg), .type = ty, .use_perf_event_type = 1, \
@@ -1296,15 +1298,20 @@ static Hwcentry amd_15h[] = {
   { HWCE("iTLB-loads", STXT("The Instruction TLB Loads"),\
 	 PERF_COUNT_HW_CACHE_ITLB,\
 	 PERF_COUNT_HW_CACHE_OP_READ, PERF_COUNT_HW_CACHE_RESULT_ACCESS) },
-
 static Hwcentry	generic_list[] = {
   HWC_GENERIC
   {NULL, NULL, 0, NULL, 0, 0, 0, 0, ABST_NONE}
 };
 
-#include "hwc_amd_zen3.h"
-#include "hwc_amd_zen4.h"
-#include "hwc_intel_icelake.h"
+#if defined(__i386__) || defined(__x86_64)
+ #include "hwc_amd_zen3.h"
+ #include "hwc_amd_zen4.h"
+ #include "hwc_intel_icelake.h"
+#elif defined(__aarch64__)
+ #include "hwc_arm64_amcc.h"
+ #include "hwc_arm_neoverse_n1.h"
+ #include "hwc_arm_ampere_1.h"
+#endif
 
 /* structure defining the counters for a CPU type */
 typedef struct
@@ -1325,6 +1332,7 @@ typedef struct
  *  If the string is not formatted that way, -h hi and -h lo will fail
  */
 static cpu_list_t cputabs[] = {
+#if defined(__i386__) || defined(__x86_64)
   {CPC_PENTIUM_PRO_MMX, pentiumIIlist, {"insts", 0}},
   {CPC_PENTIUM_PRO, pentiumIIIlist, {"insts", 0}},
   {CPC_PENTIUM_4, pentium4, {"insts", 0}},
@@ -1353,10 +1361,15 @@ static cpu_list_t cputabs[] = {
   {CPC_AMD_FAM_11H, amd_opteron_10h_11h, {"insts,,cycles,,l2dm,,l2dtlbm", 0}},
   {CPC_AMD_FAM_15H, amd_15h, {"insts,,cycles", 0}},
   {CPC_KPROF, kproflist, {NULL}}, // OBSOLETE (To support 12.3 and earlier, TBR)
-  {ARM_CPU_IMP_APM, generic_list, {"insts,,cycles", 0}},
   {CPC_AMD_Authentic, generic_list, {"insts,,cycles", 0}},
   {CPC_AMD_FAM_19H_ZEN3, amd_zen3_list, {"insts,,cycles", 0}},
   {CPC_AMD_FAM_19H_ZEN4, amd_zen4_list, {"insts,,cycles", 0}},
+#elif defined(__aarch64__)
+  {CPC_ARM64_AMCC, arm64_amcc_list, {"insts,,cycles", 0}},
+  {CPC_ARM_NEOVERSE_N1, arm_neoverse_n1_list, {"insts,,cycles", 0}},
+  {CPC_ARM_AMPERE_1, arm_ampere_1_list, {"insts,,cycles", 0}},
+  {CPC_ARM_GENERIC, generic_list, {"insts,,cycles", 0}},
+#endif
   {0, generic_list, {"insts,,cycles", 0}},
 };
 
@@ -1783,7 +1796,7 @@ check_tables ()
 }
 #endif
 
-static int try_a_counter ();
+static int try_a_counter (int forKernel);
 static void hwc_process_raw_ctrs (int forKernel, Hwcentry ***pstd_out,
 				  Hwcentry ***praw_out, Hwcentry ***phidden_out,
 				  Hwcentry**static_tables,
@@ -1856,6 +1869,17 @@ setup_cpc_general (int skip_hwc_test)
 	    cpcx_cpuver = CPC_INTEL_ICELAKE;
 	}
     }
+  else if (strcmp (cpu_p->cpu_vendorstr, AARCH64_VENDORSTR_ARM) == 0)
+    {
+      if (cpu_p->cpu_family == 0x50)
+	cpcx_cpuver = CPC_ARM64_AMCC;
+      else if (cpu_p->cpu_family == 0x41)
+	cpcx_cpuver = CPC_ARM_NEOVERSE_N1;
+      else if (cpu_p->cpu_family == 0xc0)
+	cpcx_cpuver = CPC_ARM_AMPERE_1;
+      else
+	cpcx_cpuver = CPC_ARM_GENERIC;
+    }
 
 #ifdef DISALLOW_PENTIUM_PRO_MMX_7007575
   if (cpcx_cpuver == CPC_PENTIUM_PRO_MMX)
@@ -2824,17 +2848,6 @@ hwc_get_docref (char *buf, size_t buflen)
   return buf;
 }
 
-//TBR:
-
-extern char*
-hwc_get_default_cntrs ()
-{
-  setup_cpcx ();
-  if (cpcx_default_hwcs[0] != NULL)
-    return strdup (cpcx_default_hwcs[0]); // TBR deprecate this
-  return NULL;
-}
-
 extern char*
 hwc_get_default_cntrs2 (int forKernel, int style)
 {
diff --git a/gprofng/doc/Makefile.am b/gprofng/doc/Makefile.am
index 3df0f32..83e6006 100644
--- a/gprofng/doc/Makefile.am
+++ b/gprofng/doc/Makefile.am
@@ -35,26 +35,36 @@ gprofng_ug_TEXINFOS = fdl.texi gp-macros.texi
 TEXINFO_TEX         = .
 MAKEINFOHTML        = $(MAKEINFO) --html --no-split
 
-man_MANS = gprofng.1 gp-archive.1 gp-collect-app.1 gp-display-html.1 gp-display-src.1 gp-display-text.1
+man_MANS = gprofng.1 gprofng-archive.1 gprofng-collect-app.1 \
+	gprofng-display-html.1 gprofng-display-src.1 gprofng-display-text.1
 
 # Build the man page from the texinfo file
 # The sed command removes the no-adjust Nroff command so that
 # the man output looks standard.
 $(man_MANS): $(srcdir)/gp-macros.texi
-	$(AM_V_GEN)touch $@
-	$(AM_V_at)-$(TEXI2POD) $(MANCONF) < $(srcdir)/`basename $@ .1`.texi > $@.pod
-	$(AM_V_at)-($(POD2MAN) $@.pod | sed -e '/^.if n .na/d' > $@.tmp && \
-	  mv -f $@.tmp $@) || (rm -f $@.tmp && exit 1)
-	$(AM_V_at)rm -f $@.pod
+	$(AM_V_at)( nm=`basename $@ .1` ; \
+	  $(TEXI2POD) $(MANCONF) < $(srcdir)/$$nm.texi > $$nm.pod ; \
+	  $(POD2MAN) $$nm.pod | sed -e '/^.if n .na/d' > $$nm.tmp || exit 1 ; \
+	  mv -f $$nm.tmp $@ ; \
+	  rm -f $$nm.pod )
 
 gprofng.1: $(srcdir)/gprofng.texi
-gp-archive.1: $(srcdir)/gp-archive.texi
-gp-collect-app.1: $(srcdir)/gp-collect-app.texi
-gp-display-html.1: $(srcdir)/gp-display-html.texi
-gp-display-src.1: $(srcdir)/gp-display-src.texi
-gp-display-text.1: $(srcdir)/gp-display-text.texi
+gprofng-archive.1: $(srcdir)/gprofng-archive.texi
+gprofng-collect-app.1: $(srcdir)/gprofng-collect-app.texi
+gprofng-display-html.1: $(srcdir)/gprofng-display-html.texi
+gprofng-display-src.1: $(srcdir)/gprofng-display-src.texi
+gprofng-display-text.1: $(srcdir)/gprofng-display-text.texi
 
 MAINTAINERCLEANFILES = gprofng.info $(man_MANS)
 EXTRA_DIST = $(man_MANS) version.texi
 
 info: $(man_MANS)
+
+examples.tar.gz:
+	$(AM_V_at)( tar czf $@ $(srcdir)/../examples )
+
+install-examples:  examples.tar.gz
+	$(mkinstalldirs) $(DESTDIR)$(docdir)/gprofng
+	$(INSTALL_DATA) examples.tar.gz $(DESTDIR)$(docdir)/gprofng
+
+install-am: install-examples
diff --git a/gprofng/doc/Makefile.in b/gprofng/doc/Makefile.in
index 5b57544..98aa105 100644
--- a/gprofng/doc/Makefile.in
+++ b/gprofng/doc/Makefile.in
@@ -375,7 +375,9 @@ info_TEXINFOS = gprofng_ug.texi
 gprofng_ug_TEXINFOS = fdl.texi gp-macros.texi
 TEXINFO_TEX = .
 MAKEINFOHTML = $(MAKEINFO) --html --no-split
-man_MANS = gprofng.1 gp-archive.1 gp-collect-app.1 gp-display-html.1 gp-display-src.1 gp-display-text.1
+man_MANS = gprofng.1 gprofng-archive.1 gprofng-collect-app.1 \
+	gprofng-display-html.1 gprofng-display-src.1 gprofng-display-text.1
+
 MAINTAINERCLEANFILES = gprofng.info $(man_MANS)
 EXTRA_DIST = $(man_MANS) version.texi
 all: all-am
@@ -665,9 +667,6 @@ install-exec: install-exec-am
 install-data: install-data-am
 uninstall: uninstall-am
 
-install-am: all-am
-	@$(MAKE) $(AM_MAKEFLAGS) install-exec-am install-data-am
-
 installcheck: installcheck-am
 install-strip:
 	if test -z '$(STRIP)'; then \
@@ -876,21 +875,30 @@ uninstall-man: uninstall-man1
 # The sed command removes the no-adjust Nroff command so that
 # the man output looks standard.
 $(man_MANS): $(srcdir)/gp-macros.texi
-	$(AM_V_GEN)touch $@
-	$(AM_V_at)-$(TEXI2POD) $(MANCONF) < $(srcdir)/`basename $@ .1`.texi > $@.pod
-	$(AM_V_at)-($(POD2MAN) $@.pod | sed -e '/^.if n .na/d' > $@.tmp && \
-	  mv -f $@.tmp $@) || (rm -f $@.tmp && exit 1)
-	$(AM_V_at)rm -f $@.pod
+	$(AM_V_at)( nm=`basename $@ .1` ; \
+	  $(TEXI2POD) $(MANCONF) < $(srcdir)/$$nm.texi > $$nm.pod ; \
+	  $(POD2MAN) $$nm.pod | sed -e '/^.if n .na/d' > $$nm.tmp || exit 1 ; \
+	  mv -f $$nm.tmp $@ ; \
+	  rm -f $$nm.pod )
 
 gprofng.1: $(srcdir)/gprofng.texi
-gp-archive.1: $(srcdir)/gp-archive.texi
-gp-collect-app.1: $(srcdir)/gp-collect-app.texi
-gp-display-html.1: $(srcdir)/gp-display-html.texi
-gp-display-src.1: $(srcdir)/gp-display-src.texi
-gp-display-text.1: $(srcdir)/gp-display-text.texi
+gprofng-archive.1: $(srcdir)/gprofng-archive.texi
+gprofng-collect-app.1: $(srcdir)/gprofng-collect-app.texi
+gprofng-display-html.1: $(srcdir)/gprofng-display-html.texi
+gprofng-display-src.1: $(srcdir)/gprofng-display-src.texi
+gprofng-display-text.1: $(srcdir)/gprofng-display-text.texi
 
 info: $(man_MANS)
 
+examples.tar.gz:
+	$(AM_V_at)( tar czf $@ $(srcdir)/../examples )
+
+install-examples:  examples.tar.gz
+	$(mkinstalldirs) $(DESTDIR)$(docdir)/gprofng
+	$(INSTALL_DATA) examples.tar.gz $(DESTDIR)$(docdir)/gprofng
+
+install-am: install-examples
+
 # Tell versions [3.59,3.63) of GNU make to not export all variables.
 # Otherwise a system limit (for SysV at least) may be exceeded.
 .NOEXPORT:
diff --git a/gprofng/doc/gp-macros.texi b/gprofng/doc/gp-macros.texi
index 3c207ed..1e36982 100644
--- a/gprofng/doc/gp-macros.texi
+++ b/gprofng/doc/gp-macros.texi
@@ -76,3 +76,21 @@ gprofng
 @end indentedblock
 @end ifclear
 @end macro
+
+@ifnothtml
+@macro mycartouche{text}
+@smallexample
+\text\
+@end smallexample
+@end macro
+@end ifnothtml
+
+@ifhtml
+@macro mycartouche{text}
+@cartouche
+@smallexample
+\text\
+@end smallexample
+@end cartouche
+@end macro
+@end ifhtml
diff --git a/gprofng/doc/gp-archive.texi b/gprofng/doc/gprofng-archive.texi
index e2639a5..5356501 100644
--- a/gprofng/doc/gp-archive.texi
+++ b/gprofng/doc/gprofng-archive.texi
@@ -1,11 +1,11 @@
 @c ----------------------------------------------------------------------------
-@c This is the Texinfo source file for the gp-archive man page.
+@c This is the Texinfo source file for the gprofng-archive man page.
 @c
 @c Author: Ruud van der Pas
 @c ----------------------------------------------------------------------------
 @ifset man
 \input texinfo @c -*-texinfo-*-
-@setfilename gp-archive
+@setfilename gprofng-archive
 @settitle Archive gprofng experiment data
 @include gp-macros.texi
 @end ifset
@@ -367,19 +367,19 @@ experiment was recorded.
 @c man begin SEEALSO
 
 gprofng(1),
-gp-collect-app(1),
-gp-display-gui(1),
-gp-display-html(1),
-gp-display-src(1),
-gp-display-text(1)
+gprofng-collect-app(1),
+@c -- gprofng-display-gui(1),
+gprofng-display-html(1),
+gprofng-display-src(1),
+gprofng-display-text(1)
 
 @iftex
 @vspace{1}
 @end iftex
 
-The user guide for gprofng is maintained as a Texinfo manual.  If the info
-and gprofng programs are correctly installed, the command
-@command{info gprofng} should give access to this document.
+The user guide for gprofng is maintained as a Texinfo manual.  If the
+@command{info} and @command{gprofng} programs are correctly installed, the
+command @command{info gprofng} should give access to this document.
 
 @c man end
 @ManPageEnd{}
diff --git a/gprofng/doc/gp-collect-app.texi b/gprofng/doc/gprofng-collect-app.texi
index cab2555..50196f3 100644
--- a/gprofng/doc/gp-collect-app.texi
+++ b/gprofng/doc/gprofng-collect-app.texi
@@ -1,11 +1,11 @@
 @c ----------------------------------------------------------------------------
-@c This is the Texinfo source file for the gp-collect-app man page.
+@c This is the Texinfo source file for the gprofng-collect-app man page.
 @c
 @c Author: Ruud van der Pas
 @c ----------------------------------------------------------------------------
 @ifset man
 \input texinfo @c -*-texinfo-*-
-@setfilename gp-collect-app
+@setfilename gprofng-collect-app
 @settitle Collect performance data for the target application
 @include gp-macros.texi
 @end ifset
@@ -356,11 +356,11 @@ gprofng can provide more details, but this is not a requirement.
 @c man begin SEEALSO
 
 gprofng(1),
-gp-archive(1),
-gp-display-gui(1),
-gp-display-html(1),
-gp-display-src(1),
-gp-display-text(1)
+gprofng-archive(1),
+@c -- gprofng-display-gui(1),
+gprofng-display-html(1),
+gprofng-display-src(1),
+gprofng-display-text(1)
 
 @iftex
 @vspace{1}
diff --git a/gprofng/doc/gp-display-html.texi b/gprofng/doc/gprofng-display-html.texi
index 9834468..8f8906f 100644
--- a/gprofng/doc/gp-display-html.texi
+++ b/gprofng/doc/gprofng-display-html.texi
@@ -1,11 +1,11 @@
 @c ----------------------------------------------------------------------------
-@c This is the Texinfo source file for the gp-display-html man page.
+@c This is the Texinfo source file for the gprofng-display-html man page.
 @c
 @c Author: Ruud van der Pas
 @c ----------------------------------------------------------------------------
 @ifset man
 \input texinfo @c -*-texinfo-*-
-@setfilename gp-display-html
+@setfilename gprofng-display-html
 @settitle Generate an HTML based directory structure to browse the profiles
 @include gp-macros.texi
 @end ifset
@@ -259,11 +259,11 @@ processing begins.
 @c man begin SEEALSO
 
 gprofng(1),
-gp-archive(1),
-gp-collect-app(1),
-gp-display-gui(1),
-gp-display-src(1),
-gp-display-text(1)
+gprofng-archive(1),
+gprofng-collect-app(1),
+@c -- gprofng-display-gui(1),
+gprofng-display-src(1),
+gprofng-display-text(1)
 
 @iftex
 @vspace{1}
diff --git a/gprofng/doc/gp-display-src.texi b/gprofng/doc/gprofng-display-src.texi
index 5a02cc5..afff961 100644
--- a/gprofng/doc/gp-display-src.texi
+++ b/gprofng/doc/gprofng-display-src.texi
@@ -1,11 +1,11 @@
 @c ----------------------------------------------------------------------------
-@c This is the Texinfo source file for the gp-display-src man page.
+@c This is the Texinfo source file for the gprofng-display-src man page.
 @c
 @c Author: Ruud van der Pas
 @c ----------------------------------------------------------------------------
 @ifset man
 \input texinfo @c -*-texinfo-*-
-@setfilename gp-display-src
+@setfilename gprofng-display-src
 @settitle Display source code and optionally disassembly of the target object
 @include gp-macros.texi
 @end ifset
@@ -204,19 +204,19 @@ indicate generating the source, or disassembly, for all functions in the
 @c man begin SEEALSO
 
 gprofng(1),
-gp-archive(1),
-gp-collect-app(1),
-gp-display-gui(1),
-gp-display-html(1),
-gp-display-text(1)
+gprofng-archive(1),
+gprofng-collect-app(1),
+@c -- gprofng-display-gui(1),
+gprofng-display-html(1),
+gprofng-display-text(1)
 
 @iftex
 @vspace{1}
 @end iftex
 
-The user guide for gprofng is maintained as a Texinfo manual.  If the info
-and gprofng programs are correctly installed, the command
-@command{info gprofng} should give access to this document.
+The user guide for gprofng is maintained as a Texinfo manual.  If the
+@command{info} and @command{gprofng} programs are correctly installed, the
+command @command{info gprofng} should give access to this document.
 
 @c man end
 @ManPageEnd{}
diff --git a/gprofng/doc/gp-display-text.texi b/gprofng/doc/gprofng-display-text.texi
index 8e369b1..9612ee9 100644
--- a/gprofng/doc/gp-display-text.texi
+++ b/gprofng/doc/gprofng-display-text.texi
@@ -1,11 +1,11 @@
 @c ----------------------------------------------------------------------------
-@c This is the Texinfo source file for the gp-display-text man page.
+@c This is the Texinfo source file for the gprofng-display-text man page.
 @c
 @c Author: Ruud van der Pas
 @c ----------------------------------------------------------------------------
 @ifset man
 \input texinfo @c -*-texinfo-*-
-@setfilename gp-display-text
+@setfilename gprofng-display-text
 @settitle Display the performance data in plain text format
 @include gp-macros.texi
 @end ifset
@@ -413,11 +413,11 @@ for C, C++, and Fortran.
 @c man begin SEEALSO
 
 gprofng(1),
-gp-archive(1),
-gp-collect-app(1),
-gp-display-gui(1),
-gp-display-html(1),
-gp-display-src(1)
+gprofng-archive(1),
+gprofng-collect-app(1),
+@c -- gprofng-display-gui(1),
+gprofng-display-html(1),
+gprofng-display-src(1)
 
 @iftex
 @vspace{1}
diff --git a/gprofng/doc/gprofng.texi b/gprofng/doc/gprofng.texi
index 0441997..92ec3b4 100644
--- a/gprofng/doc/gprofng.texi
+++ b/gprofng/doc/gprofng.texi
@@ -242,8 +242,8 @@ to this configuration file to a non-default location.  If this is the case,
 the user may set the @code{GPROFNG_SYSCONFDIR} environment variable to point
 to this location.
 
-Otherwise, the @command{gp-display-text}, @command{gp-display-src}, and
-@command{gp-archive} tools cannot find this file.
+Otherwise, the @command{gprofng display text}, @command{gprofng display src},
+and @command{gprofng archive} tools cannot find this file.
 
 @end table
 
@@ -264,8 +264,8 @@ The gprofng driver supports the following commands.
 @end iftex
 
 @c The man pages for the commands below can be viewed using the command name
-@c with "gprofng" replaced by "gp" and the spaces replaced by a dash ("-").
-@c For example the man page name for "gprofng collect app" is "gp-collect-app".
+@c with the spaces replaced by a dash ("-").  For example
+@c the man page name for "gprofng collect app" is "gprofng-collect-app".
 
 @i{Collect performance data:}
 
@@ -308,6 +308,11 @@ It is also possible to invoke the lower level commands directly, but since
 these are subject to change, in particular the options, we recommend to
 use the driver.
 
+The @emph{gprofng GUI} is an optional tool that provides a graphical interface
+for @code{gprofng}.  It is easy to use and supports many views into the
+performance data.  For those interested in this GUI, we
+recommend to search for @code{gprofng-gui} how to obtain, install and use it.
+
 @c man end
 @ManPageEnd{}
 
@@ -319,11 +324,11 @@ use the driver.
 @c man begin SEEALSO
 
 gp-archive(1),
-gp-collect-app(1),
-gp-display-gui(1),
-gp-display-html(1),
-gp-display-src(1),
-gp-display-text(1)
+gprofng-collect-app(1),
+@c -- gprofng-display-gui(1),
+gprofng-display-html(1),
+gprofng-display-src(1),
+gprofng-display-text(1)
 
 @iftex
 @vspace{1}
diff --git a/gprofng/doc/gprofng_ug.texi b/gprofng/doc/gprofng_ug.texi
index 5aa3533..dc985d3 100644
--- a/gprofng/doc/gprofng_ug.texi
+++ b/gprofng/doc/gprofng_ug.texi
@@ -95,7 +95,7 @@ section entitled ``GNU Free Documentation License.''
 @menu
 * Introduction::                      About this manual.
 * Overview::                          A brief overview of @ProductName{}.
-* A Mini Tutorial::                   A short tutorial covering the key features.
+* A Mini Tutorial::                   A short tutorial with the key features.
 * The gprofng Tools::                 An overview of the tools supported.
 * Performance Data Collection::       Record the performance information.
 * View the Performance Information::  Different ways to view the data.
@@ -113,14 +113,14 @@ Introduction
 Overview
 
 * Main Features::                     A high level overview.
-* Sampling versus Tracing::           The pros and cons of sampling versus tracing.
+* Sampling versus Tracing::           The pros and cons of both approaches.
 * Steps Needed to Create a Profile::  How to create a profile.
 
 A Mini Tutorial
 
-* Getting Started::                 The basics of profiling with @ProductName().
-* Support for Multithreading::      Commands specific to multithreaded applications.
-* View Multiple Experiments::       Analyze multiple experiments simultaneously.
+* Getting Started::                 The basics of profiling with gprofng.
+* Support for Multithreading::      Commands for multithreaded applications.
+* View Multiple Experiments::       Analyze multiple experiments. 
 * Profile Hardware Event Counters:: How to use hardware event counters.
 * Java Profiling::                  How to profile a Java application.
 
@@ -196,7 +196,7 @@ good luck tackling performance bottlenecks.
 @c -- A new node --------------------------------------------------------------
 @c cccccc @node    A Brief Overview of @ProductName{}
 @node    Overview
-@chapter A Brief Overview of @ProductName{}
+@chapter A Brief Overview of gprofng
 @c ----------------------------------------------------------------------------
 
 @menu
@@ -231,16 +231,16 @@ Profiling is supported for an application written in C, C++, Java, or Scala.
 @c TBD Java: up to 1.8 full support, support other than for modules
 
 @item
-Shared libraries are supported.  The information is presented at the instruction
-level.
+Shared libraries are supported.  The information is presented at the
+instruction level.
 
 @item
 The following multithreading programming models are supported: Pthreads,
 OpenMP, and Java threads.
 
 @item
-This tool works with unmodified production level executables.  There is no need to
-recompile the code, but if the @samp{-g} option has been used when building
+This tool works with unmodified production level executables.  There is no need
+to recompile the code, but if the @samp{-g} option has been used when building
 the application, source line level information is available.
 
 @item
@@ -263,8 +263,9 @@ a caller-callees overview are available.
 Through filters, the user can zoom in on an area of interest.
 
 @item
-Two or more profiles can be aggregated, or used in a comparison.  This comparison
-can be obtained at the function, source line, and disassembly level.
+Two or more profiles can be aggregated, or used in a comparison.  This
+comparison can be obtained at the function, source line, and disassembly
+level.
 
 @item
 Through a simple scripting language, and customization of the metrics shown,
@@ -314,13 +315,14 @@ the calls to the instrumentation library may affect the compiler optimizations
 and run time behaviour.
 
 @item
-With sampling, there are very few restrictions on what can be profiled and even without
-access to the source code, a basic profile can be made.
+With sampling, there are very few restrictions on what can be profiled and
+even without access to the source code, a basic profile can be made.
 
 @item
 A downside of sampling is that, depending on the sampling frequency, small
 functions may be missed or not captured accurately.  Although this is rare,
-this may happen and is the reason why the user has control over the sampling rate.
+this may happen and is the reason why the user has control over the sampling
+rate.
 
 @item
 While tracing produces precise information, sampling is statistical in nature.
@@ -344,10 +346,11 @@ generated.  This is followed by a viewing step to create a report from the
 information that has been gathered.
 
 Every @ProductName{} command starts with @ToolName{}, the name of the driver.
-This is followed by a keyword to define the high level functionality.  Depending
-on this keyword, a third qualifier may be needed to further narrow down the request.
-This combination is then followed by options that are specific to the functionality
-desired.
+This is followed by a keyword to define the high level functionality.
+Depending on this keyword, a third qualifier may be needed to further narrow
+down the request.
+This combination is then followed by options that are specific to the
+functionality desired.
 
 The command to gather, or ``collect'', the performance data is called
 @CollectApp{}.  Aside from numerous options, this command takes the name
@@ -448,9 +451,9 @@ is
 @command{mxv-pthreads}.
 
 The matrix sizes can be set through the @code{-m} and @code{-n} options.  The
-number of threads is set with the @code{-t} option.  These are additional threads
-that are used in the multiplication. To increase the duration of the run, the
-computations are executed repeatedly.
+number of threads is set with the @code{-t} option.  These are additional
+threads that are used in the multiplication.  To increase the duration of
+the run, the computations are executed repeatedly.
 
 This is an example that multiplies a @math{8000} by @math{4000} matrix with
 a vector of length @math{4000}.  Although this is a multithreaded application,
@@ -499,16 +502,17 @@ mxv: error check passed - rows = 8000 columns = 4000 threads = 1
 @end smallexample
 
 We see a message that an experiment directory with the name @file{test.1.er}
-has been created.  The process id is also echoed. The application completes
+has been created.  The process id is also echoed.  The application completes
 as usual and we have our first experiment directory that can be analyzed.
 
 The tool we use for this is called @DisplayText{}.  It takes the name of
 the experiment directory as an argument.
 
 @cindex Interpreter mode
-If invoked this way, the tool starts in the interactive @emph{interpreter} mode.
-While in this environment, commands can be given and the tool responds.  This is
-illustrated below:
+If invoked this way, the tool starts in the interactive @emph{interpreter}
+mode.
+While in this environment, commands can be given and the tool responds.  This
+is illustrated below:
 
 @smallexample
 @verbatim
@@ -544,8 +548,6 @@ $ gprofng display text -functions test.1.er
 
 @smallexample
 @verbatim
-$ gprofng display text -functions test.1.er
-
 Functions sorted by metric: Exclusive Total CPU Time
 
 Excl. Total   Incl. Total    Name
@@ -569,7 +571,9 @@ CPU           CPU
 @end verbatim
 @end smallexample
 
-As easy and simple as these steps are, we do have a first profile of our program!
+@noindent
+As easy and simple as these steps are, we do have a first profile of our
+program!
 
 There are five columns.  The first four contain the
 @cindex Total CPU time
@@ -578,28 +582,30 @@ is the sum of the user and system time. @xref{Inclusive and Exclusive Metrics}
 for an explanation of ``exclusive'' and ``inclusive'' times.
 
 The first line echoes the metric that is used to sort the output.  By default,
-this is the exclusive CPU time, but through the @command{sort} command, the sort
-metric can be changed by the user.
+this is the exclusive CPU time, but through the @command{sort} command, the
+sort metric can be changed by the user.
 
 Next, there are four columns with the exclusive and inclusive CPU times and the
 respective percentages.  This is followed by the name of the function.
 
 @IndexSubentry{Miscellaneous, @code{<Total>}}
-The function with the name @code{<Total>} is not a user function. It is a 
+The function with the name @code{<Total>} is not a user function.  It is a
 pseudo function introduced by @ToolName{}.  It is used to display the
 accumulated measured metric values.  In this example, we see that the total
 CPU time of this job was 9.367 seconds and it is scaled to 100%.  All
 other percentages in the same column are relative to this number.
 
-@c -- If the metric is derived, for example the @code{IPC}, the value shown under
-@c -- @code{<Total>} is based upon the total values of the that are metrics used to
+@c -- If the metric is derived, for example the @code{IPC}, the value shown
+@c -- under
+@c -- @code{<Total>} is based upon the total values of the that are metrics
+@c -- used to
 @c -- compute the derived metric.
 @c -- @IndexSubentry{Hardware event counters, IPC}
 
 With 8.926 seconds, function @code{mxv_core} takes 95.30% of the
-total time and is by far the most time consuming function.  
-The exclusive and inclusive metrics are identical, which means that is a 
-leaf function not calling any other functions.
+total time and is by far the most time consuming function.
+The exclusive and inclusive metrics are identical, which means that it
+is a leaf function not calling any other functions.
 
 The next function in the list is @code{init_data}.  Although with 4.49%,
 the CPU time spent in this part is modest, this is an interesting entry because
@@ -615,7 +621,7 @@ certainly not familiar.  It is one of the internal functions used by
 the exclusive time is zero.  This means it doesn't contribute to the
 performance.
 
-The question is how we know where this function originates from?  There are
+The question is how we know where this function originates from.  There are
 several commands to dig deeper an get more details on a function.
 @xref{Information on Load Objects}.
 
@@ -842,16 +848,16 @@ Load Object: mxv-pthreads (found as test.1.er/archives/...)
 @end verbatim
 @end smallexample
 
-For each instruction, the timing values are given and we can immediately 
+For each instruction, the timing values are given and we can immediately
 identify the most expensive instructions.  As with the source level view,
 these are marked with the @code{##} symbol.
 
 It comes as no surprise that the time consuming instructions originate from
 the source code at lines 54-55.
 One thing to note is that the source line numbers no longer appear in
-sequential order. 
+sequential order.
 This is because the compiler has re-ordered the instructions as part of
-the code optimizations it has performed. 
+the code optimizations it has performed.
 
 As illustrated below and similar to the @command{lines} command, we can get
 an overview of the instructions executed by using the
@@ -1050,9 +1056,9 @@ Be aware that the name of the experiment directory has to end with @file{.er}.
 
 @IndexSubentry{Options,  @code{-limit}}
 @IndexSubentry{Commands, @code{limit}}
-The @command{limit} @var{<n>} command can be used to control the number of lines
-printed in various views. For example it impacts the function view, but also
-takes effect for other display commands, like @command{lines}.
+The @command{limit} @var{<n>} command can be used to control the number of
+lines printed in various views.  For example it impacts the function view, but
+also takes effect for other display commands, like @command{lines}.
 
 The argument @var{<n>} should be a positive integer number.  It sets the number
 of lines in the (function) view.  A value of zero resets the limit to the
@@ -1198,11 +1204,12 @@ CPU           CPU
 @end smallexample
 
 In the first part of the output the comment lines in the script file are
-echoed.  These are interleaved with an acknowledgement message for the commands.
+echoed.  These are interleaved with an acknowledgement message for the
+commands.
 
 This is followed by a profile consisting of 5 lines only.  For both metrics,
-the percentages plus the timings are given.  The numbers are sorted with respect
-to the exclusive total CPU time.  Although this is the default, for
+the percentages plus the timings are given.  The numbers are sorted with
+respect to the exclusive total CPU time.  Although this is the default, for
 demonstration purposes we use the @command{sort} command to explicitly define
 the metric for the sort.
 
@@ -1219,7 +1226,7 @@ It is seen that function @code{mxv_core} is responsbile for
 
 The call tree shows the dynamic structure of the application by displaying the
 functions executed and their parent.  The CPU time attributed to each function
-is shown as well. This view helps to find the most expensive
+is shown as well.  This view helps to find the most expensive
 execution path in the program.
 
 @IndexSubentry{Options,  @code{-calltree}}
@@ -1486,11 +1493,10 @@ By default, clock profiling  is enabled when conducting hardware event counter
 experiments (@xref{Profile Hardware Event Counters}).
 With the @code{-p off} option, this can be disabled.
 
-If an explicit value is set for the sampling, the number can be an integer or a
-floating-point number.
-A suffix of @samp{u} for microseconds, or @samp{m} for milliseconds is supported.
-If no suffix is used, the value is assumed to be in milliseconds.
-
+If an explicit value is set for the sampling, the number can be an integer or
+a floating-point number.
+A suffix of @samp{u} for microseconds, or @samp{m} for milliseconds is
+supported.  If no suffix is used, the value is assumed to be in milliseconds.
 For example, the following command sets the sampling rate to
 5123.4 microseconds:
 
@@ -1500,12 +1506,12 @@ $ gprofng collect app -p 5123.4u ./mxv-pthreads -m 8000 -n 4000 -t 1
 @end smallexample
 @end cartouche
 
-If the value is smaller than the clock profiling minimum, a warning message is issued
-and it is set to the minimum.
-In case it is not a multiple of the clock profiling resolution, it is silently rounded
-down to the nearest multiple of the clock resolution.
-If the value exceeds the clock profiling maximum, is negative, or zero, an error is
-reported.
+If the value is smaller than the clock profiling minimum, a warning message
+is issued and it is set to the minimum.
+In case it is not a multiple of the clock profiling resolution, it is
+silently rounded down to the nearest multiple of the clock resolution.
+If the value exceeds the clock profiling maximum, is negative, or zero, an
+error is reported.
 
 @IndexSubentry{Options,  @code{-header}}
 @IndexSubentry{Commands, @code{header}}
@@ -1527,8 +1533,8 @@ Luckily there are three commands that come in handy then.
 @IndexSubentry{Commands, @code{fsingle}}
 @IndexSubentry{Options,  @code{-fsummary}}
 @IndexSubentry{Commands, @code{fsummary}}
-These commands are @command{objects}, @command{fsingle}, and @command{fsummary}.
-They provide details on
+These commands are @command{objects}, @command{fsingle}, and
+@command{fsummary}.  They provide details on
 @cindex Load objects
 load objects (@xref{Load Objects and Functions}).
 
@@ -1564,9 +1570,10 @@ The output includes the name and path of the target executable:
 
 @IndexSubentry{Options,  @code{-fsingle}}
 @IndexSubentry{Commands, @code{fsingle}}
-The @command{fsingle} command may be used to get more details on a specific entry
-in the function view, say.  For example, the command below provides additional
-information on the @code{pthread_create} function shown in the function overview.
+The @command{fsingle} command may be used to get more details on a specific
+entry in the function view, say.  For example, the command below provides
+additional information on the @code{pthread_create} function shown in the
+function overview.
 
 @cartouche
 @smallexample
@@ -1574,8 +1581,8 @@ $ gprofng display text -fsingle pthread_create mxv.1.thr.er
 @end smallexample
 @end cartouche
 
-Below the output from this command.  It has been somewhat modified to match the
-display requirements.
+Below the output from this command.  It has been somewhat modified to match
+the display requirements.
 
 @smallexample
 @verbatim
@@ -1615,26 +1622,26 @@ $ gprofng display text -fsummary mxv.1.thr.er
 Functions sorted by metric: Exclusive Total CPU Time
 
 <Total>
-        Exclusive Total CPU Time: 9.703 (100.0%)
-        Inclusive Total CPU Time: 9.703 (100.0%)
-                            Size:     0
-                      PC Address: 1:0x00000000
-                     Source File: (unknown)
-                     Object File: (unknown)
-                     Load Object: <Total>
-                    Mangled Name:
-                         Aliases:
+       Exclusive Total CPU Time: 9.703 (100.0%)
+       Inclusive Total CPU Time: 9.703 (100.0%)
+                           Size:     0
+                     PC Address: 1:0x00000000
+                    Source File: (unknown)
+                    Object File: (unknown)
+                    Load Object: <Total>
+                   Mangled Name:
+                        Aliases:
 
 mxv_core
-        Exclusive Total CPU Time: 9.226 ( 95.1%)
-        Inclusive Total CPU Time: 9.226 ( 95.1%)
-                            Size:    80
-                      PC Address: 2:0x00001d56
-                     Source File: <apath>/src/mxv.c
-                     Object File: mxv.1.thr.er/archives/mxv-pthreads_ss_pf53V__5
-                     Load Object: <apath>/mxv-pthreads
-                    Mangled Name:
-                         Aliases:
+       Exclusive Total CPU Time: 9.226 ( 95.1%)
+       Inclusive Total CPU Time: 9.226 ( 95.1%)
+                           Size:    80
+                     PC Address: 2:0x00001d56
+                    Source File: <apath>/src/mxv.c
+                    Object File: mxv.1.thr.er/archives/mxv-pthreads_ss_pf53V__5
+                    Load Object: <apath>/mxv-pthreads
+                   Mangled Name:
+                        Aliases:
 
           ... etc ...
 @end verbatim
@@ -1671,11 +1678,12 @@ $ gprofng collect app -O mxv.2.thr.er ./$exe -m $m -n $n -t 2
 @end cartouche
 
 First of all, in as far as @ProductName{} is concerned, no changes are needed.
-Nothing special is needed to profile a multithreaded job when using @ToolName{}.
+Nothing special is needed to profile a multithreaded job when using
+@ToolName{}.
 
 The same is true when displaying the performance results.  The same commands
-that were used before work unmodified.  For example, this is all that is needed to
-get a function overview:
+that were used before work unmodified.  For example, this is all that is
+needed to get a function overview:
 
 @cartouche
 @smallexample
@@ -1683,6 +1691,7 @@ $ gprofng display text -limit 5 -functions mxv.2.thr.er
 @end smallexample
 @end cartouche
 
+@noindent
 This produces the following familiar looking output:
 
 @smallexample
@@ -1825,7 +1834,7 @@ number(s) specified.  This means that the script above shows which
 function(s) each thread executes and how much CPU time they consumed.
 Both the exclusive timings and their percentages are given.
 
-Note that technically this command is a filter and persistent.  The 
+Note that technically this command is a filter and persistent.  The
 selection remains active until changed through another thread selection
 command, or when it is reset with the @samp{all} selection list.
 
@@ -1900,8 +1909,8 @@ CPU
 
 When analyzing the performance of a multithreaded application, it is sometimes
 useful to know whether threads have mostly executed on the same core, say, or
-if they have wandered across multiple cores.  This sort of stickiness is usually
-referred to as
+if they have wandered across multiple cores.  This sort of stickiness is
+usually referred to as
 @cindex Thread affinity
 @emph{thread affinity}.
 
@@ -1916,8 +1925,8 @@ displays how many CPUs have been used.
 @IndexSubentry{Options,  @code{-cpus}}
 @IndexSubentry{Commands, @code{cpus}}
 The equivalent of the @command{threads} threads command, is the @command{cpus}
-command, which shows the numbers of the CPUs that were used and the metric values
-for each one of them.  Both commands are demonstrated below.
+command, which shows the numbers of the CPUs that were used and the metric
+values for each one of them.  Both commands are demonstrated below.
 
 @cartouche
 @smallexample
@@ -1951,7 +1960,7 @@ The first table shows that there is only one experiment and that all of the
 four CPUs have been selected.  The second table shows the exclusive metrics
 for each of the CPUs that have been used.
 
-As also echoed in the output, the data is sorted with respect to the 
+As also echoed in the output, the data is sorted with respect to the
 exclusive CPU time, but it is very easy to sort the data by the CPU id
 @IndexSubentry{Options, -sort}
 @IndexSubentry{Commands, sort}
@@ -2088,10 +2097,10 @@ CPU only.
 @section View Multiple Experiments
 @c ----------------------------------------------------------------------------
 
-One thing we did not cover sofar is that @ToolName{} fully supports the analysis
-of multiple experiments.  The @DisplayText{} tool accepts a list of experiments.
-The data can either be aggregated across the experiments, or used in a
-comparison.
+One thing we did not cover sofar is that @ToolName{} fully supports the
+analysis of multiple experiments.  The @DisplayText{} tool accepts a list of
+experiments.  The data can either be aggregated across the experiments, or
+used in a comparison.
 
 The default is to aggregate the metric values across the experiments that have
 been loaded.  The @command{compare} command can be used to enable the
@@ -2110,7 +2119,7 @@ If the data for multiple experiments is aggregrated, the @DisplayText{} tool
 shows the combined results.
 For example, below is the script to show the function view for the data
 aggregated over two experiments, drop the first experiment and then show
-the function view fo the second experiment only. 
+the function view for the second experiment only.
 We will call it @file{my-script-agg}.
 
 @cartouche
@@ -2203,7 +2212,7 @@ up and the percentages are adjusted accordingly.
 @subsection Comparison of Experiments
 @c ----------------------------------------------------------------------------
 
-The support for multiple experiments really shines in comparison mode.  
+The support for multiple experiments really shines in comparison mode.
 @cindex Compare experiments
 In comparison mode, the data for the various experiments is shown side by
 side, as illustrated below where we compare the results for the multithreaded
@@ -2277,7 +2286,7 @@ The values shown are relative to this difference.  For example if a ratio
 is below one, it means the reference value was higher.
 
 In the example below, we use the same two experiments used in the comparison
-above. The script is also nearly identical.  The only change is that we now
+above.  The script is also nearly identical.  The only change is that we now
 use the @samp{delta} keyword.
 
 As before, the number of lines is restricted to 5 and we focus on
@@ -3248,7 +3257,7 @@ analysis of one or more experiments that have been created using
 The GUI part of @ProductName{} is a GNU project.  This is the link to the
 @url{https://savannah.gnu.org/projects/gprofng-gui, gprofng GUI page}.
 This page contains more information (e.g. how to clone the repo).
-There is also a 
+There is also a
 @url{https://ftp.gnu.org/gnu/gprofng-gui, tar file distribution directory}
 with tar files that include everything that is needed to build and install
 the GUI code.  Various versions are available here.
@@ -3266,7 +3275,7 @@ The @file{gprofng.rc}
 file is used to define default settings for the @DisplayText{}, @Archive{},
 and @DisplaySRC{} tools, but the user can override these defaults through
 local configuration settings when building and installing from the source
-code..
+code.
 
 There are three files that are checked when the tool starts up.  The first
 file has pre-defined settings and comes with the installation, but through
@@ -3279,7 +3288,7 @@ mentioned tools:
 
 @item
 The system-wide filename is called @file{gprofng.rc} and is located in
-the @file{/etc} subdirectory in case an RPM was used for the installation..
+the @file{/etc} subdirectory in case an RPM was used for the installation.
 
 If @ProductName{} has been built from the source, this file is in
 subdirectory @file{etc} in the top level installation directory.
@@ -3365,7 +3374,7 @@ metric corresponding to the default sort metric for the function list.
 @IndexSubentry{Commands, @code{en_desc}}
 
 Set the mode for reading descendant experiments to @samp{on} (enable all
-descendants) or @samp{off} to disable all descendants. If
+descendants) or @samp{off} to disable all descendants.  If
 @samp{=}@var{regex} is used, enable data from those experiments whose
 executable name matches the regular expression.
 
@@ -3381,7 +3390,7 @@ no performance data are ignored by @DisplayText{}.
 @c ----------------------------------------------------------------------------
 
 Various filter commands are supported by @DisplayText{}.
-Thanks to the use of filters, the user can zoom in on a certain area of 
+Thanks to the use of filters, the user can zoom in on a certain area of
 interest.  With filters, it is possible to select one or more threads to
 focus on, define a window in time, select specific call stacks, etc.
 @IndexSubentry{Filters, Intro}
@@ -3456,7 +3465,7 @@ functions
 @end verbatim
 @end smallexample
 
-In general, filters behave differently than commands or options. In 
+In general, filters behave differently than commands or options.  In
 particular there may be an interaction between different filter definitions.
 
 For example, as explained above, in the first script file the
@@ -3592,8 +3601,8 @@ Display the total number of CPUs that have been used during the experiment(s).
 @IndexSubentry{Commands, @code{cpus}}
 
 Show a list of CPUs that were used by the application, along with the metrics
-that have been recorded. The CPUs are represented by a CPU number and show the
-Total CPU time by default.
+that have been recorded.  The CPUs are represented by a CPU number and show
+the Total CPU time by default.
 
 Note that since the data is sorted with respect to the default metric, it may
 be useful to use the @command{sort name} command to show the list sorted with
@@ -3604,7 +3613,7 @@ respect to the CPU id.
 @IndexSubentry{Commands, @code{GCEvents}}
 
 This commands is for Java applications only.  It shows any Garbage Collection
-(GC) events that have occurred while the application was executing..
+(GC) events that have occurred while the application was executing.
 
 @item lwp_list
 @IndexSubentry{Options,  @code{-lwp_list}}
@@ -3619,14 +3628,14 @@ Displays the list of LWPs processed during the experiment(s).
 For each experiment that has been loaded, this command displays a list of
 processes that were created by the application, along with their metrics.
 The processes are represented by process ID (PID) numbers and show the
-Total CPU time metric by default. If additional metrics are recorded in
+Total CPU time metric by default.  If additional metrics are recorded in
 an experiment, these are shown as well.
 
 @item samples
 @IndexSubentry{Options,  @code{-samples}}
 @IndexSubentry{Commands, @code{samples}}
 
-Display a list of sample points and their metrics,  which reflect the
+Display a list of sample points and their metrics, which reflect the
 microstates recorded at each sample point in the loaded experiment.
 The samples are represented by sample numbers and show the Total CPU time
 by default.  Other metrics might also be displayed if enabled.
@@ -3712,7 +3721,7 @@ instruction line in the file, the line on which the metrics occur has a
 @IndexSubentry{Options,  @code{-printmode}}
 @IndexSubentry{Commands, @code{printmode}}
 
-Set the print mode. If the keyword is @code{text}, printing will be done in
+Set the print mode.  If the keyword is @code{text}, printing will be done in
 tabular form using plain text.  In case the @code{html} keyword is selected,
 the output is formatted as an HTML table.
 
@@ -3794,7 +3803,7 @@ be concatenated.
 @IndexSubentry{Commands, @code{pathmap}}
 
 If a file cannot be found using the path list set by @command{addpath}, or
-the @command{setpath} command, one or more path remappings may be set with the 
+the @command{setpath} command, one or more path remappings may be set with the
 @command{pathmap} command.
 
 With path mapping, the user can specify how to replace the leading component
@@ -3808,7 +3817,7 @@ The resulting path is used to find the file.
 For example, if a source file located in directory @file{/tmp}
 is shown in the @DisplayText{} output, but should instead be taken from
 @file{/home/demo}, the following @file{pathmap} command redefines the
-path: 
+path:
 
 @smallexample
 $ gprofng diplay text -pathmap /tmp /home/demo -source ...
@@ -3821,8 +3830,8 @@ tried until the file is found.
 @IndexSubentry{Options,  @code{-setpath}}
 @IndexSubentry{Commands, @code{setpath}}
 
-Set the path used to find source and object files. The path is defined
-through the @var{path-list} keyword. It is a colon separated list of
+Set the path used to find source and object files.  The path is defined
+through the @var{path-list} keyword.  It is a colon separated list of
 directories, jar files, or zip files.
 If any directory has a colon character in it, escape it with a
 backslash (@samp{\}).
@@ -3834,7 +3843,7 @@ You can abbreviate it with a single @samp{$} character.
 The default path is @samp{$expts:..} which is the directories of the
 loaded experiments and the current working directory.
 
-Use @command{setpath} with no argument to display the current path. 
+Use @command{setpath} with no argument to display the current path.
 
 Note that @command{setpath} commands @emph{are not allowed .gprofng.rc
 configuration files}.
@@ -3898,9 +3907,9 @@ this terminology is explained in detail.
 
 @cindex PC
 @cindex Program Counter
-The @emph{Program Counter}, or PC for short, keeps track where program execution is.
-The address of the next instruction to be executed is stored in a special
-purpose register in the processor, or core.
+The @emph{Program Counter}, or PC for short, keeps track where program
+execution is.  The address of the next instruction to be executed is stored
+in a special purpose register in the processor, or core.
 
 @cindex Instruction pointer
 The PC is sometimes also referred to as the @emph{instruction pointer}, but
@@ -3922,9 +3931,9 @@ includes the CPU time spent in @code{B} and @code{C}.
 
 @cindex Exclusive metric
 In contrast with this, the @emph{exclusive} value for a metric is computed
-by excluding the metric values used by other functions called.  In our imaginary
-example, the exclusive CPU time for function @code{A} is the time spent outside
-calling functions @code{B} and @code{C}.
+by excluding the metric values used by other functions called.  In our
+imaginary example, the exclusive CPU time for function @code{A} is the
+time spent outside calling functions @code{B} and @code{C}.
 
 @cindex Leaf function
 In case of a @emph{leaf function}, the inclusive and exclusive values for the
@@ -4081,12 +4090,12 @@ Select all cores from experiments 1 and 2.
 @end table
 
 Recall that there are several list commands that show the mapping between the
-numbers and the targets. 
+numbers and the targets.
 
 @IndexSubentry{Options, @code{-experiment_list}}
 @IndexSubentry{Commands, @code{experiment_list}}
 For example, the @command{experiment_list} command shows the name(s) of the
-experiment(s) loaded and the associated number. In this example it is used
+experiment(s) loaded and the associated number.  In this example it is used
 to get this information for a range of experiments:
 
 @cartouche
@@ -4119,41 +4128,45 @@ the executable.
 During execution, the program may also dynamically load objects.
 
 @cindex Load object
-A @emph{load object} is defined to be an executable, or shared object.  A shared
-library is an example of a load object in @ToolName{}.
+A @emph{load object} is defined to be an executable, or shared object.  A
+shared library is an example of a load object in @ToolName{}.
 
-Each load object, contains a text section with the instructions generated by the
-compiler, a data section for data, and various symbol tables.
+Each load object, contains a text section with the instructions generated by
+the compiler, a data section for data, and various symbol tables.
 All load objects must contain an
 @cindex ELF
 ELF
 symbol table, which gives the names and addresses of all the globally known
 functions in that object.
 
-Load objects compiled with the -g option contain additional symbolic information
-that can augment the ELF symbol table and provide information about functions that
-are not global, additional information about object modules from which the functions
-came, and line number information relating addresses to source lines.
+Load objects compiled with the -g option contain additional symbolic
+information that can augment the ELF symbol table and provide information
+about functions that are not global, additional information about object
+modules from which the functions came, and line number information relating
+addresses to source lines.
 
 The term
 @cindex Function
 @emph{function}
 is used to describe a set of instructions that represent a high-level operation
-described in the source code.  The term also covers methods as used in C++ and in
-the Java programming language.
+described in the source code.  The term also covers methods as used in C++
+and in the Java programming language.
 
 In the @ToolName{} context, functions are provided in source code format.
-Normally their names appear in the symbol table representing a set of addresses.
+Normally their names appear in the symbol table representing a set of
+addresses.
 @cindex Program Counter
 @cindex PC
-If the Program Counter (PC) is within that set, the program is executing within that function.
+If the Program Counter (PC) is within that set, the program is executing within
+that function.
 
-In principle, any address within the text segment of a load object can be mapped to a
-function.  Exactly the same mapping is used for the leaf PC and all the other PCs on the
-call stack.
+In principle, any address within the text segment of a load object can be
+mapped to a function.  Exactly the same mapping is used for the leaf PC and
+all the other PCs on the call stack.
 
-Most of the functions correspond directly to the source model of the program, but
-there are exceptions.  This topic is however outside of the scope of this guide.
+Most of the functions correspond directly to the source model of the program,
+but there are exceptions.  This topic is however outside of the scope of this
+guide.
 
 @c ----------------------------------------------------------------------------
 @node    The Concept of a CPU in gprofng
@@ -4187,8 +4200,8 @@ event counters.
 
 On the hardware side, this means that in the processor there are one or more
 registers dedicated to count certain activities, or ``events''.
-Examples of such events are the number of instructions executed, or the number
-of cache misses at level 2 in the memory hierarchy.
+Examples of such events are the number of instructions executed, or the
+number of cache misses at level 2 in the memory hierarchy.
 
 While there is a limited set of such registers, the user can map events onto
 them.  In case more than one register is available, this allows for the
@@ -4198,9 +4211,10 @@ A simple, yet powerful, example is to simultaneously count the number of CPU
 cycles and the number of instructions excuted.  These two numbers can then be
 used to compute the
 @cindex IPC
-@emph{IPC} value.  IPC stands for ``Instructions Per Clockcycle'' and each processor
-has a maximum.  For example, if this maximum number is 2, it means the
-processor is capable of executing two instructions every clock cycle.
+@emph{IPC} value.  IPC stands for ``Instructions Per Clockcycle'' and each
+processor has an architecturally defined maximum.  For example, if this
+maximum number is 2, it means the processor is capable of executing two
+instructions every clock cycle.
 
 Whether this is actually achieved, depends on several factors, including the
 instruction characteristics.
@@ -4304,8 +4318,9 @@ in the @code{gprofng/doc} subdirectory.
 For example, if you have set the build directory to be @var{<my-build-dir>},
 go to subdirectory @var{<my-build-dir>/gprofng/doc}.
 
-This subdirectory has a single filed called @file{Makefile} that can be used to
-build the documentation in various formats.  We recommend to use these commands.
+This subdirectory has a single file called @file{Makefile} that can be used to
+build the documentation in various formats.  We recommend to use these
+commands.
 
 There are four commands to generate the documentation in the @code{html} or
 @code{pdf} format.  It is assumed that you are in directory @code{gprofng/doc}
@@ -4323,12 +4338,12 @@ Create the pdf file in the current directory.
 Create and install the html file in the binutils documentation directory.
 
 @item make install-pdf
-Creat and install the pdf file in the binutils documentation directory.
+Create and install the pdf file in the binutils documentation directory.
 
 @end table
 
-For example, to install this document in the binutils documentation directory, the
-commands below may be executed.  In this notation, @var{<format>}
+For example, to install this document in the binutils documentation directory,
+the commands below may be executed.  In this notation, @var{<format>}
 is one of @code{html}, or @code{pdf}:
 
 @smallexample
@@ -4338,9 +4353,10 @@ $ make install-<format>
 @end verbatim
 @end smallexample
 
-The binutils installation directory is either the default @code{/usr/local} or the one
-that has been set with the @code{--prefix} option as part of the @code{configure}
-command.  In this example we symbolize this location with @code{<install>}.
+The binutils installation directory is either the default @code{/usr/local} or
+the one that has been set with the @code{--prefix} option as part of the
+@code{configure} command.  In this example we symbolize this location with
+@code{<install>}.
 
 The documentation directory is @code{<install>/share/doc/gprofng} in case
 @code{html} or @code{pdf} is selected and @code{<install>/share/info} for the
@@ -4385,7 +4401,7 @@ In this appendix the man pages for the various @ProductName{} tools are listed.
 @section Man page for @command{gprofng collect app}
 @c ----------------------------------------------------------------------------
 
-@include gp-collect-app.texi
+@include gprofng-collect-app.texi
 
 @c -- A new node --------------------------------------------------------------
 @page
@@ -4393,7 +4409,7 @@ In this appendix the man pages for the various @ProductName{} tools are listed.
 @section Man page for @command{gprofng display text}
 @c ----------------------------------------------------------------------------
 
-@include gp-display-text.texi
+@include gprofng-display-text.texi
 
 @c -- A new node --------------------------------------------------------------
 @page
@@ -4401,7 +4417,7 @@ In this appendix the man pages for the various @ProductName{} tools are listed.
 @section Man page for @command{gprofng display html}
 @c ----------------------------------------------------------------------------
 
-@include gp-display-html.texi
+@include gprofng-display-html.texi
 
 @c -- A new node --------------------------------------------------------------
 @page
@@ -4409,7 +4425,7 @@ In this appendix the man pages for the various @ProductName{} tools are listed.
 @section Man page for @command{gprofng display src}
 @c ----------------------------------------------------------------------------
 
-@include gp-display-src.texi
+@include gprofng-display-src.texi
 
 @c -- A new node --------------------------------------------------------------
 @page
@@ -4417,7 +4433,7 @@ In this appendix the man pages for the various @ProductName{} tools are listed.
 @section Man page for @command{gprofng archive}
 @c ----------------------------------------------------------------------------
 
-@include gp-archive.texi
+@include gprofng-archive.texi
 
 @ifnothtml
 @node       Index
diff --git a/gprofng/gp-display-html/gp-display-html.in b/gprofng/gp-display-html/gp-display-html.in
index 306c99a..8894449 100644
--- a/gprofng/gp-display-html/gp-display-html.in
+++ b/gprofng/gp-display-html/gp-display-html.in
@@ -197,7 +197,7 @@ my $thresh = 0;
 $driver_cmd       = "gprofng display html";
 $tool_name        = "gp-display-html";
 #$binutils_version = "2.38.50";
-$binutils_version = "BINUTILS_VERSION";
+$binutils_version = "2.43.0";
 $version_info     = $tool_name . " GNU binutils version " . $binutils_version;
 
 #------------------------------------------------------------------------------
@@ -908,7 +908,8 @@ sub main
 #------------------------------------------------------------------------------
   $outputdir = append_forward_slash ($outputdir);
 
-  gp_message ("debug", $subr_name, "prepared outputdir = $outputdir");
+  $msg = "prepared outputdir = ". $outputdir;
+  gp_message ("debug", $subr_name, $msg);
 
 #------------------------------------------------------------------------------
 #------------------------------------------------------------------------------
@@ -921,6 +922,13 @@ sub main
   $detail_metrics_system = 'e.totalcpu:e.system';
   $call_metrics          = 'a.totalcpu';
 
+  $msg = "set detail_metrics_system = " . $detail_metrics_system;
+  gp_message ("debug", $subr_name, $msg);
+  $msg = "set detail_metrics        = " . $detail_metrics;
+  gp_message ("debug", $subr_name, $msg);
+  $msg = "set call_metrics          = " . $call_metrics;
+  gp_message ("debug", $subr_name, $msg);
+
   my $cmd_options;
   my $metrics_cmd;
 
@@ -1029,15 +1037,15 @@ sub main
   $number_of_metrics = split (":", $summary_metrics);
 
   $msg = "summary_metrics       = " . $summary_metrics;
-  gp_message ("debugXL", $subr_name, $msg);
+  gp_message ("debugM", $subr_name, $msg);
   $msg = "detail_metrics        = " . $detail_metrics;
-  gp_message ("debugXL", $subr_name, $msg);
+  gp_message ("debugM", $subr_name, $msg);
   $msg = "detail_metrics_system = " . $detail_metrics_system;
-  gp_message ("debugXL", $subr_name, $msg);
+  gp_message ("debugM", $subr_name, $msg);
   $msg = "call_metrics          = " . $call_metrics;
-  gp_message ("debugXL", $subr_name, $msg);
+  gp_message ("debugM", $subr_name, $msg);
   $msg = "number_of_metrics     = " . $number_of_metrics;
-  gp_message ("debugXL", $subr_name, $msg);
+  gp_message ("debugM", $subr_name, $msg);
 
 #------------------------------------------------------------------------------
 # TBD Find a way to better handle this situation:
@@ -1488,6 +1496,9 @@ sub check_and_define_cmds
     {
       $target_cmd = "(command -v $cmd; echo \$\?)";
 
+      $msg = "check target_cmd = " . $target_cmd;
+      gp_message ("debug", $subr_name, $msg);
+
       ($error_code, $output_cmd) = execute_system_cmd ($target_cmd);
 
       if ($error_code != 0)
@@ -4098,8 +4109,7 @@ sub extract_info_from_map_xml
 } #-- End of subroutine extract_info_from_map_xml
 
 #------------------------------------------------------------------------------
-# This routine analyzes the metric line and extracts the metric specifics
-# from it.
+# This routine analyzes the metric line and extracts the metric details.
 # Example input: Exclusive Total CPU Time: e.%totalcpu
 #------------------------------------------------------------------------------
 sub extract_metric_specifics
@@ -4113,11 +4123,13 @@ sub extract_metric_specifics
   my $metric_visibility;
   my $metric_name;
   my $metric_spec;
+  my $msg;
 
 # Ruud   if (($metric =~ /\s*(.*):\s+(\S)((\.\S+)|(\+\S+))/) && !($metric =~/^Current/)){
   if (($metric_line =~ /\s*(.+):\s+([ei])([\.\+%]+)(\S*)/) and !($metric_line =~/^Current/))
     {
-      gp_message ("debug", $subr_name, "line of interest: $metric_line");
+      $msg = "input line = " . $metric_line;
+      gp_message ("debug", $subr_name, $msg);
 
       $metric_description = $1;
       $metric_flavor      = $2;
@@ -4153,6 +4165,17 @@ sub extract_metric_specifics
 #          $metric_spec =~ s/\%//;
 #          print "DB: after  \$metric_spec = $metric_spec\n";
 
+      $msg = "on return: metric_spec        = " . $metric_spec;
+      gp_message ("debugM", $subr_name, $msg);
+      $msg = "on return: metric_flavor      = " . $metric_flavor;
+      gp_message ("debugM", $subr_name, $msg);
+      $msg = "on return: metric_visibility  = " . $metric_visibility;
+      gp_message ("debugM", $subr_name, $msg);
+      $msg = "on return: metric_name        = " .  $metric_name;
+      gp_message ("debugM", $subr_name, $msg);
+      $msg = "on return: metric_description = " . $metric_description;
+      gp_message ("debugM", $subr_name, $msg);
+
       return ($metric_spec, $metric_flavor, $metric_visibility,
               $metric_name, $metric_description);
     }
@@ -4402,7 +4425,7 @@ sub extract_option_value
       $msg .= " in a future update";
       gp_message ("warning", $subr_name, $msg);
 
-      $msg  = "please check the man page of gp-display-html";
+      $msg  = "please check the gprofng-display-html man page";
       $msg .= " for more details";
       gp_message ("warning", $subr_name, $msg);
       $g_total_warning_count++;
@@ -7034,7 +7057,19 @@ sub generate_function_level_info
 #------------------------------------------------------------------------------
   print SCRIPT_PC "# outfile $outputdir"."gp-metrics-calls-PC\n";
   print SCRIPT_PC "outfile $outputdir"."gp-metrics-calls-PC\n";
-  $script_pc_metrics = "address:$call_metrics";
+#------------------------------------------------------------------------------
+# TBD: fix the situation that call_metrics is empty.
+#------------------------------------------------------------------------------
+  if ($call_metrics ne "")
+    {
+      $script_pc_metrics = "address:$call_metrics";
+    }
+  else
+    {
+      $script_pc_metrics = "address";
+      $msg = "warning: call_metrics is empty - only address field printed";
+      gp_message ("debug", $subr_name, $msg);
+    }
   print SCRIPT_PC "# metrics $script_pc_metrics\n";
   print SCRIPT_PC "metrics $script_pc_metrics\n";
 
@@ -9106,6 +9141,7 @@ sub get_hot_functions
   my $expr_name;
   my $first_metric;
   my $gp_display_text_cmd;
+  my $msg;
   my $ignore_value;
 
   my @sort_fields = ();
@@ -9123,6 +9159,15 @@ sub get_hot_functions
 
   @sort_fields = split (":", $summary_metrics);
 
+#-- RUUD
+
+  $msg = "summary_metrics = " . $summary_metrics;
+  gp_message ("debug", $subr_name, $msg);
+  for my $field (@sort_fields)
+    {
+     $msg = "metric field = " . $field; 
+     gp_message ("debug", $subr_name, $msg);
+    }
 #------------------------------------------------------------------------------
 # This is extremely unlikely to happen, but if so, it is a fatal error.
 #------------------------------------------------------------------------------
@@ -10469,7 +10514,7 @@ sub msg_display_text_failure
 } #-- End of subroutine msg_display_text_failure
 
 #------------------------------------------------------------------------------
-# TBD.
+# TBD. Still needed? I think this entire function and usage can be removed.
 #------------------------------------------------------------------------------
 sub name_regex
 {
@@ -10479,16 +10524,21 @@ sub name_regex
 
   my %metric_description = %{ $metric_description_ref };
 
+  my $msg;
+
   my @splitted_metrics;
   my $splitted_metrics;
   my $m;
   my $mf;
   my $nf;
-  my $re;
+  my $re = "This value should never show up anywhere";
   my $Xre;
-  my $noPCfile;
+#------------------------------------------------------------------------------
+# Make sure to check for these to have a value.
+#------------------------------------------------------------------------------
+  my $noPCfile = undef;
+  my $reported_metrics = undef;
   my @reported_metrics;
-  my $reported_metrics;
   my $hdr_regex;
   my $hdr_href_regex;
   my $hdr_src_regex;
@@ -10606,152 +10656,174 @@ sub name_regex
 #
 # TBD: This should be done only once!
 #------------------------------------------------------------------------------
-  @reported_metrics = split (":", $reported_metrics);
-  for my $i (@reported_metrics)
+  if (not defined($reported_metrics))
     {
-      gp_message ("debugXL", $subr_name, "reported_metrics = $i");
+      $msg = "reported_metrics is not defined";
+      gp_message ("debug", $subr_name, $msg);
     }
-
-  $hdr_regex      = "^\\s*";
-  $hdr_href_regex = "^\\s*";
-  $hdr_src_regex  = "^(\\s+|<i>\\s+)";
-
-  for my $m (@reported_metrics)
+  else
     {
+      $msg = "reported_metrics = " . $reported_metrics;
+      gp_message ("debug", $subr_name, $msg);
 
-      my $description = ${ retrieve_metric_description (\$m, \%metric_description) };
-      gp_message ("debugXL", $subr_name, "m = $m description = $description");
-      if (substr ($m,0,1) eq "e")
+      @reported_metrics = split (":", $reported_metrics);
+      for my $i (@reported_metrics)
         {
-          push (@moo,"$m:$description\n");
-          $hdr_regex .= "(Excl\\.\.*)";
-          $hdr_href_regex .= "(<a.*>)(Excl\\.)(<\/a>)([^<]+)";
-          $hdr_src_regex .= "(Excl\\.\.*)";
-          next;
-        }
-      if (substr ($m,0,1) eq "i")
-        {
-          push (@moo,"$m:$description\n");
-          $hdr_regex .= "(Incl\\.\.*)";
-          $hdr_href_regex .= "(<a.*>)(Incl\\.)(<\/a>)([^<]+)";
-          $hdr_src_regex .= "(Incl\\.\.*)";
-          next;
+          gp_message ("debugXL", $subr_name, "reported_metrics = $i");
         }
-      if (substr ($m,0,1) eq "a")
+
+      $hdr_regex      = "^\\s*";
+      $hdr_href_regex = "^\\s*";
+      $hdr_src_regex  = "^(\\s+|<i>\\s+)";
+    
+      for my $m (@reported_metrics)
         {
-          my $a;
-          my $am;
-          $a = $m;
-          $a =~ s/^a/e/;
-          $am = ${ retrieve_metric_description (\$a, \%metric_description) };
-          $am =~ s/Exclusive/Attributed/;
-          push (@moo,"$m:$am\n");
-          $hdr_regex .= "(Attr\\.\.*)";
-          $hdr_href_regex .= "(<a.*>)(Attr\\.)(<\/a>)([^<]+)";
-          $hdr_src_regex .= "(Attr\\.\.*)";next;
+
+          my $description = ${ retrieve_metric_description (\$m, \%metric_description) };
+          gp_message ("debugXL", $subr_name, "m = $m description = $description");
+          if (substr ($m,0,1) eq "e")
+            {
+              push (@moo,"$m:$description\n");
+              $hdr_regex .= "(Excl\\.\.*)";
+              $hdr_href_regex .= "(<a.*>)(Excl\\.)(<\/a>)([^<]+)";
+              $hdr_src_regex .= "(Excl\\.\.*)";
+              next;
+            }
+          if (substr ($m,0,1) eq "i")
+            {
+              push (@moo,"$m:$description\n");
+              $hdr_regex .= "(Incl\\.\.*)";
+              $hdr_href_regex .= "(<a.*>)(Incl\\.)(<\/a>)([^<]+)";
+              $hdr_src_regex .= "(Incl\\.\.*)";
+              next;
+            }
+          if (substr ($m,0,1) eq "a")
+            {
+              my $a;
+              my $am;
+              $a = $m;
+              $a =~ s/^a/e/;
+              $am = ${ retrieve_metric_description (\$a, \%metric_description) };
+              $am =~ s/Exclusive/Attributed/;
+              push (@moo,"$m:$am\n");
+              $hdr_regex .= "(Attr\\.\.*)";
+              $hdr_href_regex .= "(<a.*>)(Attr\\.)(<\/a>)([^<]+)";
+              $hdr_src_regex .= "(Attr\\.\.*)";next;
+            }
         }
     }
+    
+      $hdr_regex      .= "(Name\.*)";
+      $hdr_href_regex .= "(Name\.*)";
 
-  $hdr_regex      .= "(Name\.*)";
-  $hdr_href_regex .= "(Name\.*)";
-
-  @splitted_metrics = split (":","$metrics");
-  $nf               = scalar (@splitted_metrics);
-  gp_message ("debug", $subr_name,"number of fields in $metrics -> $nf");
-
-  open (ZMETRICS, ">", "$noPCfile.metrics")
-    or die ("Not able to open file $noPCfile.metrics for writing - '$!'");
-  gp_message ("debug", $subr_name, "$noPCfile - opened file $noPCfile.metrics for writing");
-
-  print ZMETRICS @moo;
-  close (ZMETRICS);
-
-  gp_message ("debug", $subr_name, "wrote file $noPCfile.metrics");
+      @splitted_metrics = split (":","$metrics");
+      $nf               = scalar (@splitted_metrics);
+      gp_message ("debug", $subr_name,"number of fields in $metrics -> $nf");
 
-  open (XREGEXP, ">", "$noPCfile.c.regex")
-    or die ("Not able to open file $noPCfile.c.regex for writing - '$!'");
-  gp_message ("debug", $subr_name, "$noPCfile - opened file $noPCfile.c.regex for writing");
-
-  print XREGEXP "\# Number of metric fields\n";
-  print XREGEXP "$nf\n";
-  print XREGEXP "\# Header regex\n";
-  print XREGEXP "$hdr_regex\n";
-  print XREGEXP "\# href Header regex\n";
-  print XREGEXP "$hdr_href_regex\n";
-  print XREGEXP "\# src Header regex\n";
-  print XREGEXP "$hdr_src_regex\n";
+      if (not defined($noPCfile))
+        {
+          $msg = "noPCfile is not defined";
+          gp_message ("debug", $subr_name, $msg);
+        }
+      else
+        {
+          $msg = "noPCfile = " . $noPCfile;
+          gp_message ("debug", $subr_name, $msg);
 
-  $mf = 1;
+          open (ZMETRICS, ">", "$noPCfile.metrics")
+            or die ("Not able to open file $noPCfile.metrics for writing - '$!'");
+          gp_message ("debug", $subr_name, "$noPCfile - opened file $noPCfile.metrics for writing");
+    
+          print ZMETRICS @moo;
+          close (ZMETRICS);
+
+          gp_message ("debug", $subr_name, "wrote file $noPCfile.metrics");
+
+          open (XREGEXP, ">", "$noPCfile.c.regex")
+            or die ("Not able to open file $noPCfile.c.regex for writing - '$!'");
+          gp_message ("debug", $subr_name, "$noPCfile - opened file $noPCfile.c.regex for writing");
+
+          print XREGEXP "\# Number of metric fields\n";
+          print XREGEXP "$nf\n";
+          print XREGEXP "\# Header regex\n";
+          print XREGEXP "$hdr_regex\n";
+          print XREGEXP "\# href Header regex\n";
+          print XREGEXP "$hdr_href_regex\n";
+          print XREGEXP "\# src Header regex\n";
+          print XREGEXP "$hdr_src_regex\n";
+
+          $mf = 1;
 #---------------------------------------------------------------------------
 # Find the index of "field" in the metric list, plus one.
 #---------------------------------------------------------------------------
-  if ( ($field eq "functions") or ($field eq "calls") or ($field eq "calltree"))
-    {
-      $mf = $nf + 1;
-    }
-  else
-    {
-      for my $candidate_metric (@splitted_metrics)
-        {
-          gp_message ("debugXL", $subr_name, "field = $field candidate_metric = $candidate_metric and mf = $mf");
-          if ($candidate_metric eq $field)
+          if ( ($field eq "functions") or ($field eq "calls") or ($field eq "calltree"))
             {
-              last;
+              $mf = $nf + 1;
             }
-          $mf++;
-        }
-    }
-  gp_message ("debugXL", $subr_name, "Final value mf = $mf");
-
-  if ($mf == 1)
-    {
-      $re = "^\\s*(\\S+)"; # metric value
-    }
-  else
-    {
-      $re = "^\\s*\\S+";
-    }
-  $Xre = "^\\s*(\\S+)";
+          else
+            {
+              for my $candidate_metric (@splitted_metrics)
+                {
+                  gp_message ("debugXL", $subr_name, "field = $field candidate_metric = $candidate_metric and mf = $mf");
+                  if ($candidate_metric eq $field)
+                    {
+                      last;
+                    }
+                  $mf++;
+                }
+            }
+          gp_message ("debugXL", $subr_name, "Final value mf = $mf");
 
-  $m = 2;
-  while (--$nf)
-    {
-      if ($nf)
-        {
-          if ($m == $mf)
+          if ($mf == 1)
             {
-              $re .= "\\s+(\\S+)"; # metric value
+              $re = "^\\s*(\\S+)"; # metric value
             }
           else
             {
-              $re .= "\\s+\\S+";
+              $re = "^\\s*\\S+";
             }
-          if ($nf != 1)
+          $Xre = "^\\s*(\\S+)";
+
+          $m = 2;
+          while (--$nf)
             {
-              $Xre .= "\\s+(\\S+)";
+              if ($nf)
+                {
+                  if ($m == $mf)
+                    {
+                      $re .= "\\s+(\\S+)"; # metric value
+                    }
+                  else
+                    {
+                      $re .= "\\s+\\S+";
+                    }
+                  if ($nf != 1)
+                    {
+                      $Xre .= "\\s+(\\S+)";
+                    }
+                  $m++;
+                }
             }
-          $m++;
-        }
-    }
-
-  if ($field eq "calltree")
-    {
-      $re .= "\\s+.*\\+-(.*)"; # name
-      $Xre .= "\\s+.*\\+-(.*)\$"; # name (Right?)
-    }
-  else
-    {
-      $re .= "\\s+(.*)"; # name
-      $Xre .= "\\s+(.*)\$"; # name
-    }
 
-  print XREGEXP "\# Metrics and Name regex\n";
-  print XREGEXP "$Xre\n";
-  close (XREGEXP);
+          if ($field eq "calltree")
+            {
+              $re .= "\\s+.*\\+-(.*)"; # name
+              $Xre .= "\\s+.*\\+-(.*)\$"; # name (Right?)
+            }
+          else
+            {
+              $re .= "\\s+(.*)"; # name
+              $Xre .= "\\s+(.*)\$"; # name
+            }
 
-  gp_message ("debug", $subr_name, "wrote file $noPCfile.c.regex");
-  gp_message ("debugXL", $subr_name, "on return Xre = $Xre");
-  gp_message ("debugXL", $subr_name, "on return re  = $re");
+          print XREGEXP "\# Metrics and Name regex\n";
+          print XREGEXP "$Xre\n";
+          close (XREGEXP);
+        
+          gp_message ("debug", $subr_name, "wrote file $noPCfile.c.regex");
+          gp_message ("debugXL", $subr_name, "on return Xre = $Xre");
+          gp_message ("debugXL", $subr_name, "on return re  = $re");
+        }
 
   return ($re);
 
@@ -11388,7 +11460,7 @@ sub prepend_backslashes
 } #-- End of subroutine prepend_backslashes
 
 #------------------------------------------------------------------------------
-# TBD
+# TBD Still needed?
 #------------------------------------------------------------------------------
 sub preprocess_function_files
 {
@@ -12467,6 +12539,7 @@ sub process_function_files
 #------------------------------------------------------------------------------
 # TBD: Name cleanup needed.
 #------------------------------------------------------------------------------
+  my $msg;
 
   my $number_of_metrics;
   my $expr_name;
@@ -12669,7 +12742,11 @@ sub process_function_files
 #------------------------------------------------------------------------------
 # Strip the internal number from the address field.
 #------------------------------------------------------------------------------
+      $msg = "address_field before regex = " . $address_field;
+      gp_message ("debugXL", $subr_name, $msg);
       $address_field =~ s/$remove_number_regex//;
+      $msg = "address_field after  regex = " . $address_field;
+      gp_message ("debugXL", $subr_name, $msg);
 
 ##      $disfile = "file\.$routine_index\.dis";
       $disfile = "file." . $routine_index . "." . $g_html_base_file_name{"disassembly"};
@@ -13553,6 +13630,13 @@ sub process_metrics_data
   my $detail_metrics_system;
   my $call_metrics;
 
+#------------------------------------------------------------------------------
+# The regex section.
+#------------------------------------------------------------------------------
+  my $metrics_line_regex         = '\s*(.*):\s+(\d+\.?\d*)';
+  my $metric_of_interest_1_regex = '^Exclusive\ *';
+  my $metric_of_interest_2_regex = '^Inclusive\ *';
+
   if ($g_user_settings{"default_metrics"}{"current_value"} eq "off")
     {
       $msg  = "g_user_settings{default_metrics}{current_value} = ";
@@ -13575,104 +13659,103 @@ sub process_metrics_data
       gp_message ("debug", $subr_name, "opened $outfile2 to parse metric value data");
 
 #------------------------------------------------------------------------------
-# Below an example of the file that has just been opened.  The lines I marked
-# with a * has been wrapped by my for readability.  This is not the case in the
-# file, but makes for a really long line.
-#
-# Also, the data comes from one PC experiment and two HWC experiments.
+# Below an example of the file that has just been opened.
 #------------------------------------------------------------------------------
 # <Total>
-#              Exclusive Total CPU Time:      32.473 (100.0%)
-#              Inclusive Total CPU Time:      32.473 (100.0%)
-#                  Exclusive CPU Cycles:      23.586 (100.0%)
-#                               " count: 47054706905
-#                  Inclusive CPU Cycles:      23.586 (100.0%)
-#                               " count: 47054706905
-#       Exclusive Instructions Executed: 54417033412 (100.0%)
-#       Inclusive Instructions Executed: 54417033412 (100.0%)
-#     Exclusive Last-Level Cache Misses:   252730685 (100.0%)
-#     Inclusive Last-Level Cache Misses:   252730685 (100.0%)
-#  *   Exclusive Instructions Per Cycle:      Inclusive Instructions Per Cycle:
-#  *         Exclusive Cycles Per Instruction:
-#  *         Inclusive Cycles Per Instruction:
-#  *         Size:           0
-#                            PC Address: 1:0x00000000
-#                           Source File: (unknown)
-#                           Object File: (unknown)
-#                           Load Object: <Total>
-#                          Mangled Name:
-#                               Aliases:
+# 	            Exclusive Total CPU Time:      3.232 (100.0%)
+# 	            Inclusive Total CPU Time:      3.232 (100.0%)
+# 	              Exclusive insts Events: 7628146366 (100.0%)
+# 	              Inclusive insts Events: 7628146366 (100.0%)
+# 	             Exclusive cycles Events: 5167454376 (100.0%)
+# 	             Inclusive cycles Events: 5167454376 (100.0%)
+# 	   Exclusive dTLB-load-misses Events:          0 (  0. %)
+# 	   Inclusive dTLB-load-misses Events:          0 (  0. %)
+# 	    Exclusive Instructions Per Cycle:      1.476
+# 	    Inclusive Instructions Per Cycle:      1.476
+# 	    Exclusive Cycles Per Instruction:      0.677
+# 	    Inclusive Cycles Per Instruction:      0.677
+# 	Exclusive branch-instructions Events: 1268741580 (100.0%)
+# 	Inclusive branch-instructions Events: 1268741580 (100.0%)
+# 	                                Size:          0
+# 	                          PC Address: 1:0x00000000
+# 	                         Source File: (unknown)
+# 	                         Object File: (unknown)
+# 	                         Load Object: <Total>
+# 	                        Mangled Name:
+# 	                             Aliases:
 #------------------------------------------------------------------------------
 
       while (<METRICTOTALS>)
         {
           $metricdata = $_; chomp ($metricdata);
-          gp_message ("debug", $subr_name, "file metrictotals: $metricdata");
+
+          $msg = "file metrictotals: input line = " . $metricdata;
+          gp_message ("debug", $subr_name, $msg);
 
 #------------------------------------------------------------------------------
 # Ignoring whitespace, search for any line with a ":" in it, followed by
-# a number with or without a dot.  So, an integer or floating-point number.
+# a number with, or without, a dot.  So, an integer or floating-point number.
 #------------------------------------------------------------------------------
-          if ($metricdata =~ /\s*(.*):\s+(\d+\.*\d*)/)
+          if ($metricdata =~ /$metrics_line_regex/) 
             {
-              gp_message ("debug", $subr_name, "  candidate => $metricdata");
-              $metric = $1;
-              $value  = $2;
-              if ( ($metric eq "PC Address") or ($metric eq "Size"))
+              $msg = "selected input line for processing"; 
+              gp_message ("debug", $subr_name, $msg);
+
+              if (defined($1) and defined($2))
                 {
-                  gp_message ("debug", $subr_name, "  skipped => $metric $value");
-                  next;
+                  $metric = $1;
+                  $value  = $2;
+                  $msg = "metric = " . $metric; 
+                  gp_message ("debug", $subr_name, $msg);
+                  $msg = "value  = " . $value;
+                  gp_message ("debug", $subr_name, $msg);
                 }
-              gp_message ("debug", $subr_name, "  proceed => $metric $value");
-              if ($metric eq '" count')
+              else
+                {
+                  $msg = "unexpected input in " . $metricdata;
+                  gp_message ("assertion", $subr_name, $msg);
+                }
+
 #------------------------------------------------------------------------------
-# Hardware counter experiments have this info.  Note that this line is not the
-# first one to be encountered, so $last_metric has been defined already.
+# Select the metrics of interest.
 #------------------------------------------------------------------------------
+              if (($metric =~ /$metric_of_interest_1_regex/) or
+                  ($metric =~ /$metric_of_interest_2_regex/) )
                 {
-                  $metric = $last_metric." Count"; # we presume .......
-                  gp_message ("debug", $subr_name, "last_metric = $last_metric metric = $metric");
+                  $msg  = "metric of interest = " . $metric;
+                  $msg .= " - proceed with processing";
+                  gp_message ("debug", $subr_name, $msg);
                 }
-              $i=index ($metricdata,":");
-              $r=rindex ($metricdata,":");
-              gp_message ("debug", $subr_name, "metricdata = $metricdata => i = $i r = $r");
-              if ($i == $r)
+              else
                 {
-                  if ($value > 0) # Not interested in metrics contributing zero
-                    {
-                      $metric_value{$metric} = $value;
-                      gp_message ("debug", $subr_name, "archived metric_value{$metric} = $metric_value{$metric}");
-                      # e.g. $metric_value{Exclusive Total Thread Time} = 302.562
-                      # e.g. $metric_value{Exclusive Instructions Executed} = 2415126222484
-                    }
+                  $msg  = "metric = " . $metric;
+                  $msg .= " - ignored and further processing is skipped";
+                  gp_message ("debug", $subr_name, $msg);
+                  next;
                 }
-              else
+
 #------------------------------------------------------------------------------
-# TBD This code deals with an old bug and may be removed.
+# When we get here, it means that this is a metric we want to process.
 #------------------------------------------------------------------------------
-                { # er_print bug - e.g.
-#  Exclusive Instructions Per Cycle:       Inclusive Instructions Per Cycle:       Exclusive Cycles Per Instruction:   Inclusive Cycles Per Instruction:             Exclusive OpenMP Work Time: 162.284 (100.0%)
-                  gp_message ("debug", $subr_name, "metrictotals odd line:->$metricdata<-");
-                  $r=rindex ($metricdata,":",$r-1);
-                  if ($r == -1)
-                    { # ignore
-                      gp_message ("debug", $subr_name, "metrictotals odd line ignored<-");
-                      $last_metric = "foo";
-                      next;
-                    }
-                  my ($good_part)=substr ($metricdata,$r+1);
-                  if ($good_part =~ /\s*(.*):\s+(\d+\.*\d*)/)
-                    {
-                      $metric = $1;
-                      $value  = $2;
-                      if ($value>0) # Not interested in metrics contributing zero
-                        {
-                          $metric_value{$metric} = $value;
-                          $msg = "metrictotals odd line rescued '$metric'=$value";
-                          gp_message ("debug", $subr_name, $msg);
-                        }
-                    }
+
+#------------------------------------------------------------------------------
+# TBD - Still needed? Don't see it in the input anymore (?)
+#------------------------------------------------------------------------------
+              if ($metric eq '" count')
+#------------------------------------------------------------------------------
+# Hardware counter experiments have this info.  Note that this line is not the
+# first one to be encountered, so $last_metric has been defined already.
+#------------------------------------------------------------------------------
+                {
+                  $metric = $last_metric . " Count";
+                  $msg = "last_metric = $last_metric metric = $metric";
+                  gp_message ("debug", $subr_name, $msg);
                 }
+
+              $metric_value{$metric} = $value;
+              $msg = "archived: metric_value{$metric} = " .
+                     $metric_value{$metric};
+              gp_message ("debug", $subr_name, $msg);
 #------------------------------------------------------------------------------
 # Preserve the current metric.
 #------------------------------------------------------------------------------
@@ -13684,20 +13767,26 @@ sub process_metrics_data
 
     if (scalar (keys %metric_value) == 0)
 #------------------------------------------------------------------------------
-# If we have no metrics > 0, fudge a "Exclusive Total CPU Time", else we
-# blow up later.
-#
-# TBD: See if this can be handled differently.
+# This means that there are no metrics in the input file.  That is a fatal
+# error and execution is terminated.
 #------------------------------------------------------------------------------
       {
-        $metric_value{"Exclusive Total CPU Time"} = 0;
-        gp_message ("debug", $subr_name, "no metrics found and a stub was added");
+        $msg = "no metrics have been found in the input file";
+        gp_message ("assertion", $subr_name, $msg);
+      }
+    else
+#------------------------------------------------------------------------------
+# All is well.  Print the metrics that have been found.
+#------------------------------------------------------------------------------
+      {
+        $msg = "stored the following metrics and values:";
+        gp_message ("debug", $subr_name, $msg);
+        for my $metric (sort keys %metric_value)
+          {
+            $msg = "metric_value{$metric} = " . $metric_value{$metric};
+            gp_message ("debug", $subr_name, $msg);
+          }
       }
-
-  for my $metric (sort keys %metric_value)
-    {
-      gp_message ("debug", $subr_name, "Stored metric_value{$metric} = $metric_value{$metric}");
-    }
 
   gp_message ("debug", $subr_name, "proceed to process file $outfile1");
 
@@ -13740,7 +13829,7 @@ sub process_metrics_data
       $metric_line = $_;
       chomp ($metric_line);
 
-      gp_message ("debug", $subr_name, "processing line $metric_line");
+      gp_message ("debug", $subr_name, "processing line: $metric_line");
 #------------------------------------------------------------------------------
 # The original regex has bugs because the line should not be allowed to start
 # with a ":".  So this is wrong:
@@ -13759,113 +13848,113 @@ sub process_metrics_data
 #------------------------------------------------------------------------------
 # Ruud   if (($metric =~ /\s*(.*):\s+(\S)((\.\S+)|(\+\S+))/) && !($metric =~/^Current/)){
 
-      ($metric_spec, $metric_flavor, $metric_visibility, $metric_name, $metric_text) =
+      ($metric_spec, $metric_flavor, $metric_visibility, $metric_name,
+       $metric_text) =
               extract_metric_specifics ($metric_line);
 
 #      if (($metric_line =~ /\s*(.+):\s+([ei])([\.\+%]+)(\S*)/) and !($metric_line =~/^Current/))
       if ($metric_spec eq "skipped")
         {
-          gp_message ("debug", $subr_name, "skipped line: $metric_line");
+          $msg = "skipped processing line: " . $metric_line;
+          gp_message ("debug", $subr_name, $msg);
+          next
         }
-      else
-        {
-          gp_message ("debug", $subr_name, "line of interest: $metric_line");
+      $msg = "line of interest: " . $metric_line;
+      gp_message ("debug", $subr_name, $msg);
 
-          $metric_found{$metric_spec} = 1;
+      $metric_found{$metric_spec} = $TRUE;
 
-          if ($g_user_settings{"ignore_metrics"}{"defined"})
+#------------------------------------------------------------------------------
+# TBD
+# Currently always FALSE since this feature has not been fully implemented yet.
+#------------------------------------------------------------------------------
+      if ($g_user_settings{"ignore_metrics"}{"defined"})
+        {
+          gp_message ("debug", $subr_name, "check for $metric_spec");
+          if (exists ($ignored_metrics{$metric_name}))
             {
-              gp_message ("debug", $subr_name, "check for $metric_spec");
-              if (exists ($ignored_metrics{$metric_name}))
-                {
-                  gp_message ("debug", $subr_name, "user asked to ignore metric $metric_name");
-                  next;
-                }
-              }
+              $msg = "user asked to ignore metric " . $metric_name;
+              gp_message ("debug", $subr_name, $msg);
+              $msg = "further processing of line of interest is skipped";
+              gp_message ("debug", $subr_name, $msg);
+              next;
+            }
+        }
 
 #------------------------------------------------------------------------------
 # This metric is not on the ignored list and qualifies, so store it.
 #------------------------------------------------------------------------------
-          $metric_description{$metric_spec} = $metric_text;
+      $metric_description{$metric_spec} = $metric_text;
 
 # TBD: add for other visibilities too, like +
-          gp_message ("debug", $subr_name, "stored $metric_description{$metric_spec}          = $metric_description{$metric_spec}");
+      $msg  = "stored metric_description{$metric_spec} = ";
+      $msg .= $metric_description{$metric_spec};
+      gp_message ("debug", $subr_name, $msg);
 
-          if ($metric_flavor ne "e")
-            {
-              gp_message ("debug", $subr_name, "metric $metric_spec is ignored");
-            }
-          else
+      if ($metric_flavor ne "e")
+        {
+          $msg = "metric $metric_spec is ignored";
+          gp_message ("debug", $subr_name, $msg);
+          $msg = "further processing of this line is skipped";
+          gp_message ("debug", $subr_name, $msg);
+        }
+      else
 #------------------------------------------------------------------------------
 # Only the exclusive metrics are shown.
 #------------------------------------------------------------------------------
-            {
-              gp_message ("debug", $subr_name, "metric $metric_spec ($metric_text) is considered");
+        {
+          $msg = "metric $metric_spec ($metric_text) is considered";
+          gp_message ("debug", $subr_name, $msg);
 
-              if ($metric_spec =~ /user/)
-                {
-                  $user_metrics = $TRUE;
-                  gp_message ("debug", $subr_name, "m: user_metrics set to TRUE");
-                }
-              elsif ($metric_spec =~ /system/)
-                {
-                  $system_metrics = $TRUE;
-                  gp_message ("debug", $subr_name, "m: system_metrics set to TRUE");
-                }
-              elsif ($metric_spec =~ /wall/)
-                {
-                  $wall_metrics = $TRUE;
-                  gp_message ("debug", $subr_name, "m: wall_metrics set to TRUE");
-                }
 #------------------------------------------------------------------------------
-# TBD I don't see why these need to be skipped.  Also, should be totalcpu.
+# Legacy metrics, but may re-appear one day and so the code is left in here.
 #------------------------------------------------------------------------------
-              elsif (($metric_spec =~ /^e\.total$/) or ($metric_spec =~/^e\.total_cpu$/))
-                {
-                # skip total thread time and total CPU time
-                  gp_message ("debug", $subr_name, "m: skip above");
-                }
-              elsif (defined ($metric_value{$metric_text}))
+          if ($metric_spec =~ /user/)
+            {
+              $user_metrics = $TRUE;
+              $msg = "user_metrics set to TRUE";
+              gp_message ("debug", $subr_name, $msg);
+            }
+          elsif ($metric_spec =~ /system/)
+            {
+              $system_metrics = $TRUE;
+              $msg = "system_metrics set to TRUE";
+              gp_message ("debug", $subr_name, $msg);
+            }
+          elsif ($metric_spec =~ /wall/)
+            {
+              $wall_metrics = $TRUE;
+              $msg = "wall_metrics set to TRUE";
+              gp_message ("debug", $subr_name, $msg);
+            }
+          elsif (defined ($metric_value{$metric_text}))
+            {
+              $msg  = "total attributed to this metric ";
+              $msg .= "metric_value{" . $metric_text . "} = ";
+              $msg .= $metric_value{$metric_text};
+              gp_message ("debug", $subr_name, $msg);
+
+              if ($summary_metrics ne '')
                 {
-                  gp_message ("debug", $subr_name, "Total attributed to this metric metric_value{$metric_text} = $metric_value{$metric_text}");
-                  if ($summary_metrics ne '')
-                    {
-                      $summary_metrics = $summary_metrics.':'.$metric_spec;
-                      gp_message ("debug", $subr_name, "updated summary_metrics = $summary_metrics - 1");
-                      if ($metric_spec !~ /\.wait$|\.ulock$|\.text$|\.data$|\.owait$|total$|mpiwork$|mpiwait$|ompwork$|ompwait$/)
-                        {
-                          $detail_metrics = $detail_metrics.':'.$metric_spec;
-                          gp_message ("debug", $subr_name, "updated m:detail_metrics=$detail_metrics - 1");
-                          $detail_metrics_system = $detail_metrics_system.':'.$metric_spec;
-                          gp_message ("debug", $subr_name, "updated m:detail_metrics_system=$detail_metrics_system - 1");
-                        }
-                      else
-                        {
-                          gp_message ("debug", $subr_name, "m: no want above metric for detail_metrics or detail_metrics_system");
-                        }
-                    }
-                  else
-                    {
-                      $summary_metrics = $metric_spec;
-                      gp_message ("debug", $subr_name, "initialized summary_metrics = $summary_metrics - 2");
-                      if ($metric_spec !~ /\.wait$|\.ulock$|\.text$|\.data$|\.owait$|total$|mpiwork$|mpiwait$|ompwork$|ompwait$/)
-                        {
-                          $detail_metrics = $metric_spec;
-                          gp_message ("debug", $subr_name, "m:detail_metrics=$detail_metrics - 2");
-                          $detail_metrics_system = $metric_spec;
-                          gp_message ("debug", $subr_name, "m:detail_metrics_system=$detail_metrics_system - 2");
-                        }
-                      else
-                        {
-                          gp_message ("debug", $subr_name, "m: no want above metric for detail_metrics or detail_metrics_system");
-                        }
-                    }
-                  gp_message ("debug", $subr_name, " metric $metric_spec added");
+                  $summary_metrics .= ':' . $metric_spec;
+                  $msg = "updated summary_metrics = " . $summary_metrics;
+                  gp_message ("debug", $subr_name, $msg);
                 }
               else
                 {
-                  gp_message ("debug", $subr_name, "m: no want above metric was a 0 total");
+                  $summary_metrics = $metric_spec;
+                  $msg = "initialized summary_metrics = " . $summary_metrics;
+                  gp_message ("debug", $subr_name, $msg);
                 }
+              gp_message ("debug", $subr_name, "metric $metric_spec added");
+            }
+          else
+            {
+#------------------------------------------------------------------------------
+# TBD: This doesn't seem to make much sense.
+#------------------------------------------------------------------------------
+              $msg = "no action taken for " . $metric_spec;
+              gp_message ("debug", $subr_name, $msg);
             }
         }
     }
@@ -13874,21 +13963,32 @@ sub process_metrics_data
 
   if ($wall_metrics > 0)
     {
-      gp_message ("debug", $subr_name,"m:wall_metrics set adding to summary_metrics");
+      $msg = "adding e.wall to summary_metrics";
+      gp_message ("debug", $subr_name, $msg);
       $summary_metrics = "e.wall:".$summary_metrics;
-      gp_message ("debug", $subr_name,"m:summary_metrics=$summary_metrics - 3");
+      $msg = "after update summary_metrics = " . $summary_metrics;
+      gp_message ("debug", $subr_name, $msg);
     }
 
   if ($system_metrics > 0)
     {
-      gp_message ("debug", $subr_name,"m:system_metrics set adding to summary_metrics,call_metrics and detail_metrics_system");
-      $summary_metrics       = "e.system:".$summary_metrics;
-      $call_metrics          = "i.system:".$call_metrics;
-      $detail_metrics_system ='e.system:'.$detail_metrics_system;
+      $msg = "adding e.system to summary_metrics and detail_metrics_system";
+      gp_message ("debug", $subr_name, $msg);
+
+      $summary_metrics        = "e.system:" . $summary_metrics;
+      $detail_metrics_system  = "e.system:" . $detail_metrics_system;
+
+      $msg = "adding i.system to call_metrics";
+      gp_message ("debug", $subr_name, $msg);
 
-      gp_message ("debug", $subr_name,"m:summary_metrics=$summary_metrics - 4");
-      gp_message ("debug", $subr_name,"m:call_metrics=$call_metrics");
-      gp_message ("debug", $subr_name,"m:detail_metrics_system=$detail_metrics_system - 3");
+      $call_metrics = "i.system:" . $call_metrics;
+
+      $msg = "after update summary_metrics       = " . $summary_metrics;
+      gp_message ("debug", $subr_name, $msg);
+      $msg = "after update call_metrics          = " . $call_metrics;
+      gp_message ("debug", $subr_name, $msg);
+      $msg = "after update detail_metrics_system = " . $detail_metrics_system;
+      gp_message ("debug", $subr_name, $msg);
     }
 
 
@@ -13898,7 +13998,6 @@ sub process_metrics_data
 
   if ($user_metrics > 0)
     {
-      gp_message ("debug", $subr_name,"m:user_metrics set adding to summary_metrics,detail_metrics,detail_metrics_system and call_metrics");
 # Ruud      if (!exists ($IMETRICS{"i.user"})){
       if ($g_user_settings{"ignore_metrics"}{"defined"} and exists ($ignored_metrics{"user"}))
         {
@@ -13908,14 +14007,12 @@ sub process_metrics_data
         {
           $summary_metrics = "e.user:i.user:".$summary_metrics;
         }
+
       $detail_metrics        = "e.user:".$detail_metrics;
       $detail_metrics_system = "e.user:".$detail_metrics_system;
 
-      gp_message ("debug", $subr_name,"m:summary_metrics=$summary_metrics - 5");
-      gp_message ("debug", $subr_name,"m:detail_metrics=$detail_metrics - 3");
-      gp_message ("debug", $subr_name,"m:detail_metrics_system=$detail_metrics_system - 4");
-
-      if ($g_user_settings{"ignore_metrics"}{"defined"} and exists ($ignored_metrics{"user"}))
+      if ($g_user_settings{"ignore_metrics"}{"defined"} and
+          exists ($ignored_metrics{"user"}))
         {
           $call_metrics = "a.user:".$call_metrics;
         }
@@ -13923,28 +14020,47 @@ sub process_metrics_data
         {
           $call_metrics = "a.user:i.user:".$call_metrics;
         }
-      gp_message ("debug", $subr_name,"m:call_metrics=$call_metrics - 2");
+      $msg = "updated summary_metrics = " . $summary_metrics;
+      gp_message ("debug", $subr_name, $msg);
+      $msg = "updated detail_metrics        = " . $detail_metrics;
+      gp_message ("debug", $subr_name, $msg);
+      $msg = "updated detail_metrics_system = " . $detail_metrics_system;
+      gp_message ("debug", $subr_name, $msg);
+      $msg = "updated call_metrics          = " . $call_metrics;
+      gp_message ("debug", $subr_name, $msg);
+
     }
 
+#------------------------------------------------------------------------------
+# TBD
+# It doesn't look right in case call_metrics ends up being set to ""
+#------------------------------------------------------------------------------
   if ($call_metrics eq "")
     {
       $call_metrics = $detail_metrics;
-
-      gp_message ("debug", $subr_name,"m:call_metrics is not set, setting it to detail_metrics ");
-      gp_message ("debug", $subr_name,"m:call_metrics=$call_metrics - 3");
+      $msg = "call_metrics is not set, setting it to " . $call_metrics;
+      gp_message ("debug", $subr_name, $msg);
+      if ($detail_metrics eq '')
+        {
+          $msg  = "detail_metrics and call_metrics are blank and could";
+          $msg .= " cause trouble later on";
+          gp_message ("debug", $subr_name, $msg);
+        }
     }
 
   for my $metric (sort keys %ignored_metrics)
     {
       if ($ignored_metrics{$metric})
         {
-          gp_message ("debug", $subr_name, "active metric, but ignored: $metric");
+          $msg = "active metric, but ignored: " . $metric;
+          gp_message ("debug", $subr_name, $msg);
         }
 
     }
 
-  return (\%metric_value, \%metric_description, \%metric_found, $user_metrics, $system_metrics, $wall_metrics,
-          $summary_metrics, $detail_metrics, $detail_metrics_system, $call_metrics);
+  return (\%metric_value, \%metric_description, \%metric_found, $user_metrics,
+          $system_metrics, $wall_metrics, $summary_metrics, $detail_metrics,
+          $detail_metrics_system, $call_metrics);
 
 } #-- End of subroutine process_metrics_data
 
diff --git a/gprofng/libcollector/collector.c b/gprofng/libcollector/collector.c
index 3a8f27a..2ff95e5 100644
--- a/gprofng/libcollector/collector.c
+++ b/gprofng/libcollector/collector.c
@@ -210,15 +210,10 @@ get_collector_interface ()
 static void
 collector_module_init (CollectorInterface *col_intf)
 {
-  int nmodules = 0;
-
   ModuleInitFunc next_init = (ModuleInitFunc) dlsym (RTLD_DEFAULT, "__collector_module_init");
   if (next_init != NULL)
-    {
-      nmodules++;
-      next_init (col_intf);
-    }
-  TprintfT (DBG_LT1, "collector_module_init: %d modules\n", nmodules);
+    next_init (col_intf);
+  TprintfT (DBG_LT1, "collector_module_init: %d modules\n", next_init ? 1 : 0);
 }
 
 /*   Routines concerned with general experiment start and stop */
@@ -1783,7 +1778,7 @@ __collector_pause ()
 }
 
 void
-__collector_pause_m (char *reason)
+__collector_pause_m (const char *reason)
 {
   hrtime_t now;
   char xreason[MAXPATHLEN];
@@ -2449,8 +2444,8 @@ __collector_dlog (int tflag, int level, char *format, ...)
 
 static void (*__real__exit) (int status) = NULL; /* libc only: _exit */
 static void (*__real__Exit) (int status) = NULL; /* libc only: _Exit */
-void _exit () __attribute__ ((weak, alias ("__collector_exit")));
-void _Exit () __attribute__ ((weak, alias ("__collector_Exit")));
+void _exit (int status) __attribute__ ((weak, alias ("__collector_exit")));
+void _Exit (int status) __attribute__ ((weak, alias ("__collector_Exit")));
 
 void
 __collector_exit (int status)
diff --git a/gprofng/libcollector/collector.h b/gprofng/libcollector/collector.h
index 07a03bd..eda68a0 100644
--- a/gprofng/libcollector/collector.h
+++ b/gprofng/libcollector/collector.h
@@ -123,7 +123,7 @@ extern void __collector_terminate_expt ();
 extern void __collector_terminate_hook ();
 extern void __collector_sample (char *name);
 extern void __collector_pause ();
-extern void __collector_pause_m ();
+extern void __collector_pause_m (const char *reason);
 extern void __collector_resume ();
 extern int collector_sigemt_sigaction (const struct sigaction*,
 				       struct sigaction*);
diff --git a/gprofng/libcollector/collectorAPI.c b/gprofng/libcollector/collectorAPI.c
index 5fa6403..449bbba 100644
--- a/gprofng/libcollector/collectorAPI.c
+++ b/gprofng/libcollector/collectorAPI.c
@@ -26,16 +26,17 @@
 #include "collectorAPI.h"
 #include "gp-experiment.h"
 
-static void *__real_collector_sample = NULL;
-static void *__real_collector_pause = NULL;
-static void *__real_collector_resume = NULL;
-static void *__real_collector_terminate_expt = NULL;
-static void *__real_collector_func_load = NULL;
-static void *__real_collector_func_unload = NULL;
+static void (*__real_collector_sample)(const char *) = NULL;
+static void (*__real_collector_pause)() = NULL;
+static void (*__real_collector_resume)() = NULL;
+static void (*__real_collector_terminate_expt)() = NULL;
+static void (*__real_collector_func_load)(const char *, const char *,
+		const char *, void *, int, int, Lineno *) = NULL;
+static void (*__real_collector_func_unload)(void *) = NULL;
 
 #define INIT_API        if (init_API == 0) collectorAPI_initAPI()
 #define NULL_PTR(x)     (__real_##x == NULL)
-#define CALL_REAL(x)    (*(void(*)())__real_##x)
+#define CALL_REAL(x)    (__real_##x)
 #define CALL_IF_REAL(x) INIT_API; if (!NULL_PTR(x)) CALL_REAL(x)
 
 static int init_API = 0;
diff --git a/gprofng/libcollector/dispatcher.c b/gprofng/libcollector/dispatcher.c
index 8b8ad77..f7cd46e 100644
--- a/gprofng/libcollector/dispatcher.c
+++ b/gprofng/libcollector/dispatcher.c
@@ -908,8 +908,9 @@ sigset (int sig, sighandler_t handler)
 
 // map interposed symbol versions
 static int
-gprofng_timer_create (int (real_func) (), clockid_t clockid,
-                      struct sigevent *sevp, timer_t *timerid)
+gprofng_timer_create (int (real_func) (clockid_t, struct sigevent *, timer_t *),
+		      clockid_t clockid,
+		      struct sigevent *sevp, timer_t *timerid)
 {
   // collector reserves SIGPROF
   if (sevp == NULL || sevp->sigev_notify != SIGEV_SIGNAL ||
@@ -1044,7 +1045,7 @@ __collector_thr_sigsetmask (int how, const sigset_t* iset, sigset_t* oset)
 // map interposed symbol versions
 
 static int
-gprofng_pthread_sigmask (int (real_func) (),
+gprofng_pthread_sigmask (int (real_func) (int, const sigset_t *, sigset_t*),
                          int how, const sigset_t *iset, sigset_t* oset)
 {
   sigset_t lsigset;
@@ -1139,9 +1140,10 @@ collector_root (void *cargs)
 // map interposed symbol versions
 
 static int
-gprofng_pthread_create (int (real_func) (), pthread_t *thread,
-                        const pthread_attr_t *attr,
-                        void *(*func)(void*), void *arg)
+gprofng_pthread_create (int (real_func) (pthread_t *, const pthread_attr_t *,
+					 void *(*)(void *), void *),
+			pthread_t *thread, const pthread_attr_t *attr,
+			void *(*func)(void*), void *arg)
 {
   TprintfT (DBG_LTT, "gprofng_pthread_create @%p\n", real_func);
   if (dispatch_mode != DISPATCH_ON)
@@ -1276,6 +1278,7 @@ __collector_ext_clone_pthread (int (*fn)(void *), void *child_stack, int flags,
 }
 
 // weak symbols:
-int sigprocmask () __attribute__ ((weak, alias ("__collector_sigprocmask")));
-int thr_sigsetmask () __attribute__ ((weak, alias ("__collector_thr_sigsetmask")));
+int sigprocmask (int, const sigset_t*, sigset_t*) __attribute__ ((weak, alias ("__collector_sigprocmask")));
+int thr_sigsetmask (int, const sigset_t*, sigset_t*) __attribute__ ((weak, alias ("__collector_thr_sigsetmask")));
 int setitimer () __attribute__ ((weak, alias ("_setitimer")));
+
diff --git a/gprofng/libcollector/heaptrace.c b/gprofng/libcollector/heaptrace.c
index cf39d12..985fb69 100644
--- a/gprofng/libcollector/heaptrace.c
+++ b/gprofng/libcollector/heaptrace.c
@@ -61,6 +61,8 @@ static ModuleInterface module_interface = {
 
 static CollectorInterface *collector_interface = NULL;
 static int heap_mode = 0;
+static size_t start_range = 0;
+static size_t end_range = SIZE_MAX;
 static CollectorModule heap_hndl = COLLECTOR_MODULE_ERR;
 static const Heap_packet heap_packet0 = { .comm.tsize = sizeof ( Heap_packet) };
 static __thread int reentrance = 0;
@@ -132,6 +134,15 @@ open_experiment (const char *exp)
   if (params == NULL)   /* Heap data collection not specified */
     return COL_ERROR_HEAPINIT;
 
+  if (*params != 'o') // Not -H on. Read a range.
+    {
+      char *s;
+      start_range = (size_t) CALL_UTIL (strtoull) (params, &s, 0);
+      if (*s == '-')
+	end_range = (size_t) CALL_UTIL (strtoull) (s + 1, &s, 0);
+      fprintf(stderr, "Range: %lld - %lld\n", (long long) start_range, (long long) end_range);
+    }
+  
   collector_interface->writeLog ("<profile name=\"%s\">\n", SP_JCMD_HEAPTRACE);
   collector_interface->writeLog ("  <profdata fname=\"%s\"/>\n",
 				 module_interface.description);
@@ -264,6 +275,12 @@ malloc (size_t size)
       return ret;
     }
   PUSH_REENTRANCE;
+  if (size < start_range || size >= end_range)
+    {
+      ret = (void *) CALL_REAL (malloc)(size);
+      POP_REENTRANCE;
+      return ret;
+    }
   Heap_packet hpacket = heap_packet0;
   hpacket.comm.tstamp = gethrtime ();
   ret = (void *) CALL_REAL (malloc)(size);
@@ -333,6 +350,12 @@ realloc (void *ptr, size_t size)
       return ret;
     }
   PUSH_REENTRANCE;
+  if (size < start_range || size >= end_range)
+    {
+      ret = (void *) CALL_REAL (realloc)(ptr, size);
+      POP_REENTRANCE;
+      return ret;
+    }
   Heap_packet hpacket = heap_packet0;
   hpacket.comm.tstamp = gethrtime ();
   ret = (void *) CALL_REAL (realloc)(ptr, size);
@@ -359,6 +382,12 @@ memalign (size_t align, size_t size)
       return ret;
     }
   PUSH_REENTRANCE;
+  if (size < start_range || size >= end_range)
+    {
+      ret = (void *) CALL_REAL (memalign)(align, size);
+      POP_REENTRANCE;
+      return ret;
+    }
   Heap_packet hpacket = heap_packet0;
   hpacket.comm.tstamp = gethrtime ();
   ret = (void *) CALL_REAL (memalign)(align, size);
@@ -386,6 +415,12 @@ valloc (size_t size)
       return ret;
     }
   PUSH_REENTRANCE;
+  if (size < start_range || size >= end_range)
+    {
+      ret = (void *) CALL_REAL (valloc)(size);
+      POP_REENTRANCE;
+      return ret;
+    }
   Heap_packet hpacket = heap_packet0;
   hpacket.comm.tstamp = gethrtime ();
   ret = (void *) CALL_REAL (valloc)(size);
@@ -416,6 +451,13 @@ calloc (size_t size, size_t esize)
       return ret;
     }
   PUSH_REENTRANCE;
+  size_t sz = size * esize;
+  if (sz < start_range || sz >= end_range)
+    {
+      ret = (void *) CALL_REAL (calloc)(size, esize);
+      POP_REENTRANCE;
+      return ret;
+    }
   Heap_packet hpacket = heap_packet0;
   hpacket.comm.tstamp = gethrtime ();
   ret = (void *) CALL_REAL (calloc)(size, esize);
diff --git a/gprofng/libcollector/iotrace.c b/gprofng/libcollector/iotrace.c
index 1806086..3deb441 100644
--- a/gprofng/libcollector/iotrace.c
+++ b/gprofng/libcollector/iotrace.c
@@ -1350,7 +1350,7 @@ mkstemp (char *template)
   unsigned pktSize;
   if (NULL_PTR (mkstemp))
     init_io_intf ();
-  if (CHCK_REENTRANCE (guard) || template == NULL)
+  if (CHCK_REENTRANCE (guard))
     return CALL_REAL (mkstemp)(template);
   PUSH_REENTRANCE (guard);
   hrtime_t reqt = gethrtime ();
@@ -1405,7 +1405,7 @@ mkstemps (char *template, int slen)
   unsigned pktSize;
   if (NULL_PTR (mkstemps))
     init_io_intf ();
-  if (CHCK_REENTRANCE (guard) || template == NULL)
+  if (CHCK_REENTRANCE (guard))
     return CALL_REAL (mkstemps)(template, slen);
   PUSH_REENTRANCE (guard);
   hrtime_t reqt = gethrtime ();
@@ -1485,7 +1485,7 @@ close (int fildes)
 
 /*------------------------------------------------------------- fopen */
 static FILE*
-gprofng_fopen (FILE*(real_fopen) (), const char *filename, const char *mode)
+gprofng_fopen (FILE*(real_fopen) (const char *, const char *), const char *filename, const char *mode)
 {
   int *guard;
   FILE *fp = NULL;
@@ -1559,7 +1559,7 @@ DCL_FOPEN (fopen)
 
 /*------------------------------------------------------------- fclose */
 static int
-gprofng_fclose (int(real_fclose) (), FILE *stream)
+gprofng_fclose (int(real_fclose) (FILE *), FILE *stream)
 {
   int *guard;
   int stat;
@@ -1645,7 +1645,7 @@ fflush (FILE *stream)
 
 /*------------------------------------------------------------- fdopen */
 static FILE*
-gprofng_fdopen (FILE*(real_fdopen) (), int fildes, const char *mode)
+gprofng_fdopen (FILE*(real_fdopen) (int, const char *), int fildes, const char *mode)
 {
   int *guard;
   FILE *fp = NULL;
@@ -2957,7 +2957,7 @@ DCL_FGETPOS (fgetpos)
 
 /*------------------------------------------------------------- fgetpos64 */
 static int
-gprofng_fgetpos64 (int(real_fgetpos64) (), FILE *stream, fpos64_t *pos)
+gprofng_fgetpos64 (int(real_fgetpos64) (FILE *, fpos64_t *), FILE *stream, fpos64_t *pos)
 {
   int *guard;
   int ret;
diff --git a/gprofng/libcollector/libcol_util.c b/gprofng/libcollector/libcol_util.c
index 1e58cf4..baac15d 100644
--- a/gprofng/libcollector/libcol_util.c
+++ b/gprofng/libcollector/libcol_util.c
@@ -1013,7 +1013,6 @@ __collector_open (const char *path, int oflag, ...)
   mode_t mode = 0;
 
   hrtime_t t_timeout = __collector_gethrtime () + 5 * ((hrtime_t) NANOSEC);
-  int nretries = 0;
   long long delay = 100; /* start at some small, arbitrary value */
 
   /* get optional mode argument if it's expected/required */
@@ -1058,7 +1057,6 @@ __collector_open (const char *path, int oflag, ...)
       delay *= 2;
       if (delay > 100000000)
 	delay = 100000000; /* cap at some large, arbitrary value */
-      nretries++;
     }
   return fd;
 }
diff --git a/gprofng/libcollector/libcol_util.h b/gprofng/libcollector/libcol_util.h
index c8ec83f..aa30db7 100644
--- a/gprofng/libcollector/libcol_util.h
+++ b/gprofng/libcollector/libcol_util.h
@@ -81,12 +81,6 @@ extern int __collector_mutex_trylock (collector_mutex_t *mp);
 #define __collector_mutex_init(xx) \
   do { collector_mutex_t tmp=COLLECTOR_MUTEX_INITIALIZER; *(xx)=tmp; } while(0)
 
-void __collector_sample (char *name);
-void __collector_terminate_expt ();
-void __collector_pause ();
-void __collector_pause_m ();
-void __collector_resume ();
-
 struct DT_lineno;
 
 typedef enum
diff --git a/gprofng/libcollector/linetrace.c b/gprofng/libcollector/linetrace.c
index 67b2d7e..66844bc 100644
--- a/gprofng/libcollector/linetrace.c
+++ b/gprofng/libcollector/linetrace.c
@@ -1207,7 +1207,7 @@ __collector_vfork (void)
 }
 
 /*------------------------------------------------------------- execve */
-int execve () __attribute__ ((weak, alias ("__collector_execve")));
+int execve (const char *, char *const [], char *const []) __attribute__ ((weak, alias ("__collector_execve")));
 
 int
 __collector_execve (const char* path, char *const argv[], char *const envp[])
@@ -1237,7 +1237,7 @@ __collector_execve (const char* path, char *const argv[], char *const envp[])
   return ret;
 }
 
-int execvp () __attribute__ ((weak, alias ("__collector_execvp")));
+int execvp (const char *, char *const []) __attribute__ ((weak, alias ("__collector_execvp")));
 
 int
 __collector_execvp (const char* file, char *const argv[])
@@ -1269,7 +1269,7 @@ __collector_execvp (const char* file, char *const argv[])
   return ret;
 }
 
-int execv () __attribute__ ((weak, alias ("__collector_execv")));
+int execv (const char *, char *const []) __attribute__ ((weak, alias ("__collector_execv")));
 
 int
 __collector_execv (const char* path, char *const argv[])
@@ -1408,7 +1408,10 @@ __collector_execl (const char* path, const char *arg0, ...)
 /*-------------------------------------------------------- posix_spawn */
 // map interposed symbol versions
 static int
-gprofng_posix_spawn (int(real_posix_spawn) (),
+gprofng_posix_spawn (int(real_posix_spawn) (pid_t *, const char *,
+				const posix_spawn_file_actions_t *,
+				const posix_spawnattr_t *,
+				char *const [], char *const []),
 		     pid_t *pidp, const char *path,
 		     const posix_spawn_file_actions_t *file_actions,
 		     const posix_spawnattr_t *attrp,
@@ -1466,7 +1469,10 @@ DCL_POSIX_SPAWN (posix_spawn)
 
 /*-------------------------------------------------------- posix_spawnp */
 static int
-gprofng_posix_spawnp (int (real_posix_spawnp) (),
+gprofng_posix_spawnp (int (real_posix_spawnp) (pid_t *, const char *,
+				const posix_spawn_file_actions_t *,
+				const posix_spawnattr_t *,
+				char *const [], char *const []),
                       pid_t *pidp, const char *path,
                       const posix_spawn_file_actions_t *file_actions,
                       const posix_spawnattr_t *attrp,
@@ -1754,8 +1760,8 @@ __collector_clone (int (*fn)(void *), void *child_stack, int flags, void *arg,
 }
 
 /*-------------------------------------------------------------------- setuid */
-int setuid () __attribute__ ((weak, alias ("__collector_setuid")));
-int _setuid () __attribute__ ((weak, alias ("__collector_setuid")));
+int setuid (uid_t) __attribute__ ((weak, alias ("__collector_setuid")));
+int _setuid (uid_t) __attribute__ ((weak, alias ("__collector_setuid")));
 
 int
 __collector_setuid (uid_t ruid)
@@ -1770,8 +1776,8 @@ __collector_setuid (uid_t ruid)
 }
 
 /*------------------------------------------------------------------- seteuid */
-int seteuid () __attribute__ ((weak, alias ("__collector_seteuid")));
-int _seteuid () __attribute__ ((weak, alias ("__collector_seteuid")));
+int seteuid (uid_t) __attribute__ ((weak, alias ("__collector_seteuid")));
+int _seteuid (uid_t) __attribute__ ((weak, alias ("__collector_seteuid")));
 
 int
 __collector_seteuid (uid_t euid)
@@ -1786,8 +1792,8 @@ __collector_seteuid (uid_t euid)
 }
 
 /*------------------------------------------------------------------ setreuid */
-int setreuid () __attribute__ ((weak, alias ("__collector_setreuid")));
-int _setreuid () __attribute__ ((weak, alias ("__collector_setreuid")));
+int setreuid (uid_t, uid_t) __attribute__ ((weak, alias ("__collector_setreuid")));
+int _setreuid (uid_t, uid_t) __attribute__ ((weak, alias ("__collector_setreuid")));
 
 int
 __collector_setreuid (uid_t ruid, uid_t euid)
@@ -1802,8 +1808,8 @@ __collector_setreuid (uid_t ruid, uid_t euid)
 }
 
 /*-------------------------------------------------------------------- setgid */
-int setgid () __attribute__ ((weak, alias ("__collector_setgid")));
-int _setgid () __attribute__ ((weak, alias ("__collector_setgid")));
+int setgid (gid_t) __attribute__ ((weak, alias ("__collector_setgid")));
+int _setgid (gid_t) __attribute__ ((weak, alias ("__collector_setgid")));
 
 int
 __collector_setgid (gid_t rgid)
@@ -1818,8 +1824,8 @@ __collector_setgid (gid_t rgid)
 }
 
 /*------------------------------------------------------------------- setegid */
-int setegid () __attribute__ ((weak, alias ("__collector_setegid")));
-int _setegid () __attribute__ ((weak, alias ("__collector_setegid")));
+int setegid (gid_t) __attribute__ ((weak, alias ("__collector_setegid")));
+int _setegid (gid_t) __attribute__ ((weak, alias ("__collector_setegid")));
 
 int
 __collector_setegid (gid_t egid)
@@ -1834,8 +1840,8 @@ __collector_setegid (gid_t egid)
 }
 
 /*------------------------------------------------------------------ setregid */
-int setregid () __attribute__ ((weak, alias ("__collector_setregid")));
-int _setregid () __attribute__ ((weak, alias ("__collector_setregid")));
+int setregid (gid_t, gid_t) __attribute__ ((weak, alias ("__collector_setregid")));
+int _setregid (gid_t, gid_t) __attribute__ ((weak, alias ("__collector_setregid")));
 
 int
 __collector_setregid (gid_t rgid, gid_t egid)
diff --git a/gprofng/libcollector/unwind.c b/gprofng/libcollector/unwind.c
index 55fa2e9..952d262 100644
--- a/gprofng/libcollector/unwind.c
+++ b/gprofng/libcollector/unwind.c
@@ -1555,8 +1555,8 @@ read_int (unsigned char *pc, int w)
   if (w == 1)
     return *((char *) pc);
   if (w == 2)
-    return *(short*) pc;
-  return *(int*) pc;
+    return pc[0] | (pc[1] << 8);
+  return pc[0] | (pc[1] << 8) | (pc[2] << 16) | (pc[3] << 24);
 }
 
 /* Return codes */
diff --git a/gprofng/src/BaseMetric.cc b/gprofng/src/BaseMetric.cc
index 08ab883..ae0ee32 100644
--- a/gprofng/src/BaseMetric.cc
+++ b/gprofng/src/BaseMetric.cc
@@ -212,7 +212,7 @@ BaseMetric::BaseMetric (const char *_cmd, const char *_username,
   clock_unit = CUNIT_NULL; // should it be CUNIT_TIME or 0 or something?
 
   /* we're not going to process packets for derived metrics */
-  packet_type = (ProfData_type) (-1);
+  packet_type = DATA_NONE;
   value_styles = VAL_VALUE;
   valtype = VT_DOUBLE;
   precision = 1000;
@@ -443,7 +443,7 @@ BaseMetric::specify ()
 
   char buf[256];
   char buf2[256];
-  packet_type = (ProfData_type) - 1; // illegal value
+  packet_type = DATA_NONE;
   clock_unit = CUNIT_TIME;
   switch (type)
     {
diff --git a/gprofng/src/BaseMetric.h b/gprofng/src/BaseMetric.h
index 4a86687..2d7d2f7 100644
--- a/gprofng/src/BaseMetric.h
+++ b/gprofng/src/BaseMetric.h
@@ -194,7 +194,7 @@ private:
   ValueTag valtype;                 // e.g. VT_LLONG
   long long precision;              // e.g. METRIC_SIG_PRECISION, 1, etc.
   Hwcentry *hw_ctr;                 // HWC definition
-  ProfData_type packet_type;        // e.g. DATA_HWC, or -1 for N/A
+  ProfData_type packet_type;        // e.g. DATA_HWC, or DATA_NONE for N/A
   bool zeroThreshold;               // deadlock stuff
   Presentation_clock_unit clock_unit;
 
diff --git a/gprofng/src/BaseMetricTreeNode.h b/gprofng/src/BaseMetricTreeNode.h
index d73d244..7698f9c 100644
--- a/gprofng/src/BaseMetricTreeNode.h
+++ b/gprofng/src/BaseMetricTreeNode.h
@@ -85,7 +85,6 @@ private:
 
   BaseMetricTreeNode *root;     // root of tree
   BaseMetricTreeNode *parent;   // my parent
-  bool aggregation;             // value is based on children's values
   char *name;           // bm->get_cmd() for metrics, unique string otherwise
   char *uname;                  // user-visible text
   char *unit;                   // see UNIT_* defines
diff --git a/gprofng/src/CallStack.cc b/gprofng/src/CallStack.cc
index 6212b5b..5bfafb7 100644
--- a/gprofng/src/CallStack.cc
+++ b/gprofng/src/CallStack.cc
@@ -146,13 +146,17 @@ private:
   CallStackNode *find_preg_stack (uint64_t);
   // objs are in the root..leaf order
   void *add_stack_d (Vector<Histable*> *objs);
-  void add_stack_java (DataDescriptor *dDscr, long idx, FramePacket *frp, hrtime_t tstamp, uint32_t thrid, Vector<DbeInstr*>* natpcs, bool natpc_added, cstk_ctx_chunk *cstCtxChunk);
-  void add_stack_java_epilogue (DataDescriptor *dDscr, long idx, FramePacket *frp, hrtime_t tstamp, uint32_t thrid, Vector<DbeInstr*>* natpcs, Vector<Histable*>* jpcs, bool natpc_added);
+  void add_stack_java (DataDescriptor *dDscr, long idx, FramePacket *frp,
+	hrtime_t tstamp, uint32_t thrid, Vector<Histable*>* natpcs,
+	bool natpc_added, cstk_ctx_chunk *cstCtxChunk);
+  void add_stack_java_epilogue (DataDescriptor *dDscr, long idx,
+	FramePacket *frp, hrtime_t tstamp, uint32_t thrid,
+	Vector<Histable*>* natpcs, Vector<Histable*>* jpcs, bool natpc_added);
 
   // Adjust HW counter event to find better trigger PC, etc.
   DbeInstr *adjustEvent (DbeInstr *leafPC, DbeInstr * candPC,
 			 Vaddr &eventEA, int abst_type);
-  Vector<DbeInstr*> *natpcsP;
+  Vector<Histable*> *natpcsP;
   Vector<Histable*> *jpcsP;
 };
 
@@ -335,7 +339,7 @@ CallStackP::find_preg_stack (uint64_t prid)
 void
 CallStackP::add_stack_java (DataDescriptor *dDscr, long idx, FramePacket *frp,
 			    hrtime_t tstamp, uint32_t thrid,
-			    Vector<DbeInstr*>* natpcs, bool natpc_added,
+			    Vector<Histable*>* natpcs, bool natpc_added,
 			    cstk_ctx_chunk *cstCtxChunk)
 {
   Vector<Histable*> *jpcs = NULL;
@@ -387,7 +391,7 @@ CallStackP::add_stack_java (DataDescriptor *dDscr, long idx, FramePacket *frp,
 	      bool found = false;
 	      for (; nind >= 0; nind--)
 		{
-		  DbeInstr *nat_addr = natpcs->fetch (nind);
+		  DbeInstr *nat_addr = (DbeInstr *) natpcs->fetch (nind);
 		  if (0 == nat_addr)
 		    continue;
 		  Function *nat_func = nat_addr->func;
@@ -415,12 +419,14 @@ CallStackP::add_stack_java (DataDescriptor *dDscr, long idx, FramePacket *frp,
 // It adds the native and java stacks to the stackmap
 
 void
-CallStackP::add_stack_java_epilogue (DataDescriptor *dDscr, long idx, FramePacket *frp, hrtime_t tstamp, uint32_t thrid, Vector<DbeInstr*>* natpcs, Vector<Histable*> *jpcs, bool natpc_added)
+CallStackP::add_stack_java_epilogue (DataDescriptor *dDscr, long idx,
+	FramePacket *frp, hrtime_t tstamp, uint32_t thrid,
+	Vector<Histable*>* natpcs, Vector<Histable*> *jpcs, bool natpc_added)
 {
   CallStackNode *node = NULL;
   if (!natpc_added)
     {
-      node = (CallStackNode *) add_stack ((Vector<Histable*>*)natpcs);
+      node = (CallStackNode *) add_stack (natpcs);
       dDscr->setObjValue (PROP_MSTACK, idx, node);
       dDscr->setObjValue (PROP_XSTACK, idx, node);
       dDscr->setObjValue (PROP_USTACK, idx, node);
@@ -469,7 +475,7 @@ void
 CallStackP::add_stack (DataDescriptor *dDscr, long idx, FramePacket *frp,
 		       cstk_ctx_chunk* cstCtxChunk)
 {
-  Vector<DbeInstr*> *natpcs = NULL;
+  Vector<Histable*> *natpcs = NULL;
   cstk_ctx *cstctx = NULL;
   int stack_size = frp->stackSize ();
   if (cstCtxChunk != NULL)
@@ -485,7 +491,7 @@ CallStackP::add_stack (DataDescriptor *dDscr, long idx, FramePacket *frp,
       // [leaf_pc .. root_pc] == [0..stack_size-1]
       // Leave room for a possible "truncated" frame
       if (natpcsP == NULL)
-	natpcsP = new Vector<DbeInstr*>;
+	natpcsP = new Vector<Histable*>;
       natpcs = natpcsP;
       natpcs->reset ();
     }
@@ -632,7 +638,7 @@ CallStackP::add_stack (DataDescriptor *dDscr, long idx, FramePacket *frp,
       natpcs->append (funwf->find_dbeinstr (0, 0));
     }
 
-  CallStackNode *node = (CallStackNode*) add_stack ((Vector<Histable*>*)natpcs);
+  CallStackNode *node = (CallStackNode*) add_stack (natpcs);
   dDscr->setObjValue (PROP_MSTACK, idx, node);
   dDscr->setObjValue (PROP_XSTACK, idx, node);
   dDscr->setObjValue (PROP_USTACK, idx, node);
@@ -813,7 +819,8 @@ CallStackP::add_stack (DataDescriptor *dDscr, long idx, FramePacket *frp,
 	    bool inOMP = false;
 	    for (btm = 0; btm < natpcs->size (); btm++)
 	      {
-		LoadObject *lo = natpcs->fetch (btm)->func->module->loadobject;
+		DbeInstr *instr = (DbeInstr *) natpcs->fetch (btm);
+		LoadObject *lo = instr->func->module->loadobject;
 		if (!inOMP)
 		  {
 		    if (lo->flags & SEG_FLAG_OMP)
@@ -854,7 +861,7 @@ CallStackP::add_stack (DataDescriptor *dDscr, long idx, FramePacket *frp,
 		    // Process the entire nat_stack. Skip libthread.
 		    for (top = natpcs->size () - 1; top >= 0; top--)
 		      {
-			DbeInstr *instr = natpcs->fetch (top);
+			DbeInstr *instr = (DbeInstr *) natpcs->fetch (top);
 			if (instr->func->module->loadobject->flags & SEG_FLAG_OMP)
 			  break;
 		      }
@@ -886,7 +893,7 @@ CallStackP::add_stack (DataDescriptor *dDscr, long idx, FramePacket *frp,
 	}
       for (int i = btm; i <= top; ++i)
 	{
-	  DbeInstr *instr = natpcs->fetch (i);
+	  DbeInstr *instr = (DbeInstr *) natpcs->fetch (i);
 	  if (instr->func->module->loadobject->flags & SEG_FLAG_OMP)
 	    continue; // Skip all frames from libmtsk
 	  omppcs->append (instr);
diff --git a/gprofng/src/Dbe.cc b/gprofng/src/Dbe.cc
index 95daa72..09b7f94 100644
--- a/gprofng/src/Dbe.cc
+++ b/gprofng/src/Dbe.cc
@@ -9591,14 +9591,12 @@ dbeGetTLDataRepVals (VMode view_mode, hrtime_t start_ts, hrtime_t delta,
 	}
       if (sampleVals != NULL)
 	{
-	  Sample* sample = (Sample*) packets->getObjValue (PROP_SMPLOBJ, packetIdx);
-	  if (!sample || !sample->get_usage ())
-	    sample = sample;
-	  else
+	  Sample *sample = (Sample*) packets->getObjValue (PROP_SMPLOBJ, packetIdx);
+	  if (sample != NULL)
 	    {
-	      PrUsage* prusage = sample->get_usage ();
-	      Vector<long long> *mstateVals = prusage->getMstateValues ();
-	      sampleVals->store (eventIdx, mstateVals);
+	      PrUsage *prusage = sample->get_usage ();
+	      if (prusage != NULL)
+		sampleVals->store (eventIdx, prusage->getMstateValues ());
 	    }
 	}
     }
diff --git a/gprofng/src/DbeSession.cc b/gprofng/src/DbeSession.cc
index a6808d8..3649357 100644
--- a/gprofng/src/DbeSession.cc
+++ b/gprofng/src/DbeSession.cc
@@ -1164,8 +1164,6 @@ DbeSession::open_experiment (Experiment *exp, char *path)
   closedir (exp_dir);
   exp_names->sort (dir_name_cmp);
   Experiment **t_exp_list = new Experiment *[exp_names->size ()];
-  int nsubexps = 0;
-
   for (int j = 0, jsz = exp_names->size (); j < jsz; j++)
     {
       t_exp_list[j] = NULL;
@@ -1222,7 +1220,6 @@ DbeSession::open_experiment (Experiment *exp, char *path)
 	dexp->open (dpath);
       append (dexp);
       t_exp_list[j] = dexp;
-      nsubexps++;
       dexp->set_clock (exp->clock);
 
       // DbeView add_experiment() is split into two parts
diff --git a/gprofng/src/Disasm.cc b/gprofng/src/Disasm.cc
index e41bf67..19f2174 100644
--- a/gprofng/src/Disasm.cc
+++ b/gprofng/src/Disasm.cc
@@ -49,7 +49,6 @@ struct DisContext
 };
 
 static const int MAX_DISASM_STR     = 2048;
-static const int MAX_INSTR_SIZE     = 8;
 
 Disasm::Disasm (char *fname)
 {
diff --git a/gprofng/src/Emsg.h b/gprofng/src/Emsg.h
index 2bd40f9..bc56227 100644
--- a/gprofng/src/Emsg.h
+++ b/gprofng/src/Emsg.h
@@ -38,6 +38,7 @@ class StringBuilder;
 
 typedef enum
 {
+  CMSG_NONE = -1,
   CMSG_WARN = 0,
   CMSG_ERROR,
   CMSG_FATAL,
diff --git a/gprofng/src/Experiment.cc b/gprofng/src/Experiment.cc
index a1f78fc..3e1e1a7 100644
--- a/gprofng/src/Experiment.cc
+++ b/gprofng/src/Experiment.cc
@@ -315,7 +315,7 @@ Experiment::ExperimentHandler::ExperimentHandler (Experiment *_exp)
   pDscr = NULL;
   propDscr = NULL;
   text = NULL;
-  mkind = (Cmsg_warn) - 1; // CMSG_NONE
+  mkind = CMSG_NONE;
   mnum = -1;
   mec = -1;
 }
@@ -368,8 +368,7 @@ Experiment::ExperimentHandler::pushElem (Element elem)
 void
 Experiment::ExperimentHandler::popElem ()
 {
-  stack->remove (stack->size () - 1);
-  curElem = stack->fetch (stack->size () - 1);
+  curElem = stack->remove (stack->size () - 1);
 }
 
 void
@@ -1240,7 +1239,7 @@ Experiment::ExperimentHandler::characters (char *ch, int start, int length)
 void
 Experiment::ExperimentHandler::endElement (char*, char*, char*)
 {
-  if (curElem == EL_EVENT && mkind >= 0 && mnum >= 0)
+  if (curElem == EL_EVENT && mkind != CMSG_NONE && mnum >= 0)
     {
       char *str;
       if (mec > 0)
@@ -1262,7 +1261,7 @@ Experiment::ExperimentHandler::endElement (char*, char*, char*)
 	exp->commentq->append (msg);
       else
 	delete msg;
-      mkind = (Cmsg_warn) - 1;
+      mkind = CMSG_NONE;
       mnum = -1;
       mec = -1;
     }
@@ -1398,7 +1397,7 @@ Experiment::Experiment ()
   archiveMap = NULL;
   nnodes = 0;
   nchunks = 0;
-  chunks = 0;
+  chunks = NULL;
   uidHTable = NULL;
   uidnodes = new Vector<UIDnode*>;
   mrecs = new Vector<MapRecord*>;
@@ -1937,8 +1936,6 @@ private:
   }
 
   Experiment *exp;
-  char *hostname;
-  hrtime_t time, tstamp;
 };
 
 void
@@ -4690,26 +4687,36 @@ Experiment::readPacket (Data_window *dwin, Data_window::Span *span)
   return size;
 }
 
+static uint32_t get_v32(char *p)
+{
+  uint32_t v;
+  memcpy (&v, p, sizeof(uint32_t));
+  return v;
+}
+
+static uint64_t get_v64(char *p)
+{
+  uint64_t v;
+  memcpy (&v, p, sizeof(uint64_t));
+  return v;
+}
+
 void
 Experiment::readPacket (Data_window *dwin, char *ptr, PacketDescriptor *pDscr,
 			DataDescriptor *dDscr, int arg, uint64_t pktsz)
 {
-  union Value
-  {
-    uint32_t val32;
-    uint64_t val64;
-  } *v;
-
   long recn = dDscr->addRecord ();
   Vector<FieldDescr*> *fields = pDscr->getFields ();
+  uint32_t v32;
+  uint64_t v64;
   int sz = fields->size ();
   for (int i = 0; i < sz; i++)
     {
       FieldDescr *field = fields->fetch (i);
-      v = (Value*) (ptr + field->offset);
       if (field->propID == arg)
 	{
-	  dDscr->setValue (PROP_NTICK, recn, dwin->decode (v->val32));
+	  v32 = get_v32(ptr + field->offset);
+	  dDscr->setValue (PROP_NTICK, recn, dwin->decode (v32));
 	  dDscr->setValue (PROP_MSTATE, recn, (uint32_t) (field->propID - PROP_UCPU));
 	}
       if (field->propID == PROP_THRID || field->propID == PROP_LWPID
@@ -4720,11 +4727,13 @@ Experiment::readPacket (Data_window *dwin, char *ptr, PacketDescriptor *pDscr,
 	    {
 	    case TYPE_INT32:
 	    case TYPE_UINT32:
-	      tmp64 = dwin->decode (v->val32);
+	      v32 = get_v32 (ptr + field->offset);
+	      tmp64 = dwin->decode (v32);
 	      break;
 	    case TYPE_INT64:
 	    case TYPE_UINT64:
-	      tmp64 = dwin->decode (v->val64);
+	      v64 = get_v64 (ptr + field->offset);
+	      tmp64 = dwin->decode (v64);
 	      break;
 	    case TYPE_STRING:
 	    case TYPE_DOUBLE:
@@ -4745,11 +4754,13 @@ Experiment::readPacket (Data_window *dwin, char *ptr, PacketDescriptor *pDscr,
 	    {
 	    case TYPE_INT32:
 	    case TYPE_UINT32:
-	      dDscr->setValue (field->propID, recn, dwin->decode (v->val32));
+	      v32 = get_v32 (ptr + field->offset);
+	      dDscr->setValue (field->propID, recn, dwin->decode (v32));
 	      break;
 	    case TYPE_INT64:
 	    case TYPE_UINT64:
-	      dDscr->setValue (field->propID, recn, dwin->decode (v->val64));
+	      v64 = get_v64 (ptr + field->offset);
+	      dDscr->setValue (field->propID, recn, dwin->decode (v64));
 	      break;
 	    case TYPE_STRING:
 	      {
@@ -5041,7 +5052,8 @@ Experiment::new_uid_node (uint64_t uid, uint64_t val)
       // Reallocate Node chunk array
       UIDnode** old_chunks = chunks;
       chunks = new UIDnode*[nchunks + NCHUNKSTEP];
-      memcpy (chunks, old_chunks, nchunks * sizeof (UIDnode*));
+      if (old_chunks)
+	memcpy (chunks, old_chunks, nchunks * sizeof (UIDnode*));
       nchunks += NCHUNKSTEP;
       delete[] old_chunks;
       // Clean future pointers
@@ -5856,20 +5868,20 @@ SegMemCmp (const void *a, const void *b)
 SegMem*
 Experiment::update_ts_in_maps (Vaddr addr, hrtime_t ts)
 {
-  Vector<SegMem *> *segMems = (Vector<SegMem *> *) maps->values ();
-  if (!segMems->is_sorted ())
+  Vector<void *> *segMems = maps->values ();
+  if (segMems && !segMems->is_sorted ())
     {
       Dprintf (DEBUG_MAPS, NTXT ("update_ts_in_maps: segMems.size=%lld\n"), (long long) segMems->size ());
       segMems->sort (SegMemCmp);
     }
   for (int i = 0, sz = segMems ? segMems->size () : 0; i < sz; i++)
     {
-      SegMem *sm = segMems->fetch (i);
+      SegMem *sm = (SegMem *) segMems->fetch (i);
       if (ts < sm->unload_time)
 	{
 	  for (; i < sz; i++)
 	    {
-	      sm = segMems->fetch (i);
+	      sm = (SegMem *) segMems->fetch (i);
 	      if ((addr >= sm->base) && (addr < sm->base + sm->size))
 		{
 		  Dprintf (DEBUG_MAPS,
diff --git a/gprofng/src/Experiment.h b/gprofng/src/Experiment.h
index e2fa30d..b98d373 100644
--- a/gprofng/src/Experiment.h
+++ b/gprofng/src/Experiment.h
@@ -65,7 +65,7 @@ template <class ITEM> class Vector;
 // operate on the next stage
 typedef struct
 {
-  Vector<DbeInstr*> *natpcs;
+  Vector<Histable*> *natpcs;
   Vector<Histable*> *jpcs;
   long idx;
   FramePacket *frp;
diff --git a/gprofng/src/HashMap.h b/gprofng/src/HashMap.h
index 918c0dc..c5fdd34 100644
--- a/gprofng/src/HashMap.h
+++ b/gprofng/src/HashMap.h
@@ -78,9 +78,8 @@ copy_key (uint64_t a)
 }
 
 template<> inline void
-delete_key (uint64_t a)
+delete_key (uint64_t)
 {
-  a = a;
 }
 
 template<> inline int
diff --git a/gprofng/src/IOActivity.h b/gprofng/src/IOActivity.h
index cf462cf..f3a22ad 100644
--- a/gprofng/src/IOActivity.h
+++ b/gprofng/src/IOActivity.h
@@ -78,7 +78,6 @@ private:
   Hist_data *hist_data_file_all;
   Hist_data *hist_data_vfd_all;
   Hist_data *hist_data_callstack_all;
-  Hist_data *hist_data_callstack;
 
   DbeView *dbev;
 };
diff --git a/gprofng/src/Table.h b/gprofng/src/Table.h
index e720343..92f1e78 100644
--- a/gprofng/src/Table.h
+++ b/gprofng/src/Table.h
@@ -71,7 +71,8 @@ enum VType_type
 
 enum ProfData_type
 { // a.k.a "data_id" (not the same as Pckt_type "kind")
-  DATA_SAMPLE,      // Traditional collect "Samples"
+  DATA_NONE = -1,
+  DATA_SAMPLE = 0,  // Traditional collect "Samples"
   DATA_GCEVENT,     // Java Garbage Collection events
   DATA_HEAPSZ,      // heap size tracking based on heap tracing data
   DATA_CLOCK,       // clock profiling data
diff --git a/gprofng/src/collctrl.cc b/gprofng/src/collctrl.cc
index ece01d1..2fa9a88 100644
--- a/gprofng/src/collctrl.cc
+++ b/gprofng/src/collctrl.cc
@@ -77,7 +77,7 @@ read_int (char *from)
 {
   char *val = strchr (from, ':');
   if (val)
-    return atoi (val + 1);
+    return (int) strtol (val + 1, NULL, 0);
   return 0;
 }
 
@@ -109,7 +109,8 @@ read_cpuinfo ()
 	    cpu_info.cpu_clk_freq = read_int (temp + 9);
 	  else if (strncmp (temp, "cpu family", 10) == 0)
 	    cpu_info.cpu_family = read_int (temp + 10);
-	  else if ((strncmp (temp, "vendor_id", 9) || strncmp (temp, "mvendorid", 9)) == 0)
+	  else if (strncmp (temp, "vendor_id", 9) == 0
+		   || strncmp (temp, "mvendorid", 9) == 0)
 	    {
 	      if (cpu_info.cpu_vendorstr == NULL)
 		read_str (temp + 9, &cpu_info.cpu_vendorstr);
@@ -129,7 +130,11 @@ read_cpuinfo ()
       fclose (procf);
     }
   if (cpu_info.cpu_vendorstr == NULL)
+#if defined(__aarch64__)
+    cpu_info.cpu_vendorstr = strdup (AARCH64_VENDORSTR_ARM);
+#else
     cpu_info.cpu_vendorstr = GTXT ("Unknown processor");
+#endif
   if (cpu_info.cpu_modelstr == NULL)
     cpu_info.cpu_modelstr = GTXT ("Unknown cpu model");
   return &cpu_info;
@@ -227,8 +232,7 @@ Coll_Ctrl::Coll_Ctrl (int _interactive, bool _defHWC, bool _kernelHWC)
   synctrace_enabled = 0;
   synctrace_thresh = -1;
   synctrace_scope = 0;
-  heaptrace_enabled = 0;
-  heaptrace_checkenabled = 0;
+  heaptrace_mode = NULL;
   iotrace_enabled = 0;
   count_enabled = 0;
   Iflag = 0;
@@ -300,8 +304,7 @@ Coll_Ctrl::Coll_Ctrl (Coll_Ctrl * cc)
   synctrace_enabled = cc->synctrace_enabled;
   synctrace_thresh = cc->synctrace_thresh;
   synctrace_scope = cc->synctrace_scope;
-  heaptrace_enabled = cc->heaptrace_enabled;
-  heaptrace_checkenabled = cc->heaptrace_checkenabled;
+  heaptrace_mode = dbe_strdup(cc->heaptrace_mode);
   iotrace_enabled = cc->iotrace_enabled;
   count_enabled = cc->count_enabled;
   Iflag = cc->Iflag;
@@ -365,6 +368,7 @@ Coll_Ctrl::~Coll_Ctrl ()
   free (hwc_string);
   free (project_home);
   free (java_path);
+  free (heaptrace_mode);
   hwcprof_enabled_cnt = 0;
 }
 
@@ -452,7 +456,7 @@ Coll_Ctrl::check_consistency ()
   if (count_enabled != 0
       && ((clkprof_default != 1 && clkprof_enabled != 0)
 	  || hwcprof_enabled_cnt != 0 || synctrace_enabled != 0
-	  || heaptrace_enabled != 0 || iotrace_enabled != 0))
+	  || heaptrace_mode != NULL || iotrace_enabled != 0))
     return strdup (GTXT ("Count data cannot be collected along with any other data.\n"));
 
   /* if count data, various other options are not allowed */
@@ -478,12 +482,12 @@ Coll_Ctrl::check_expt (char **warn)
   if (ret != NULL) /* something is wrong, return the error */
     return ret;
   /* check for heaptrace and java -- warn that it covers native allocations only */
-  if (heaptrace_enabled == 1 && java_mode == 1 && java_default == 0)
+  if (heaptrace_mode != NULL && java_mode == 1 && java_default == 0)
     *warn = strdup (GTXT ("Note: Heap profiling will only trace native allocations, not Java allocations.\n"));
 
   /* if no profiling data selected, warn the user */
   if (clkprof_enabled == 0 && hwcprof_enabled_cnt == 0 && synctrace_enabled == 0
-      && heaptrace_enabled == 0 && iotrace_enabled == 0 && count_enabled == 0)
+      && heaptrace_mode == NULL && iotrace_enabled == 0 && count_enabled == 0)
     *warn = strdup (GTXT ("Warning: No function level data requested; only statistics will be collected.\n\n"));
   build_data_desc ();
 
@@ -564,15 +568,8 @@ Coll_Ctrl::show (int i)
 	sb.appendf ("\t  %u. %s\n", ii + 1,
 		hwc_hwcentry_specd_string (ctrbuf, sizeof (ctrbuf), &hwctr[ii]));
     }
-  if (heaptrace_enabled != 0)
-    {
-      if (heaptrace_checkenabled == 0)
-	sb.append (GTXT ("\theap tracing enabled, no checking\n"));
-      else if (heaptrace_checkenabled == 1)
-	sb.append (GTXT ("\theap tracing enabled, over/underrun checking\n"));
-      else
-	sb.append (GTXT ("\theap tracing enabled, over/underrun checking and pattern storing\n"));
-    }
+  if (heaptrace_mode != NULL)
+    sb.append (GTXT ("\theap tracing enabled\n"));
   if (iotrace_enabled != 0)
     sb.append (GTXT ("\tI/O tracing enabled\n"));
   switch (count_enabled)
@@ -712,10 +709,10 @@ Coll_Ctrl::get_collect_args ()
 	}
       *p++ = sb.toString ();
     }
-  if (heaptrace_enabled != 0)
+  if (heaptrace_mode != NULL)
     {
       *p++ = strdup ("-H");
-      *p++ = strdup ("on");
+      *p++ = strdup (heaptrace_mode);
     }
   if (iotrace_enabled != 0)
     {
@@ -879,9 +876,7 @@ Coll_Ctrl::set_clkprof (const char *string, char** warn)
       double dval = strtod (string, &endchar);
       if (*endchar == 'm' || *endchar == 0) /* user specified milliseconds */
 	dval = dval * 1000.;
-      else if (*endchar == 'u') /* user specified microseconds */
-	dval = dval;
-      else
+      else if (*endchar != 'u')
 	return dbe_sprintf (GTXT ("Unrecognized clock-profiling interval `%s'\n"), string);
       nclkprof_timer = (int) (dval + 0.5);
     }
@@ -1048,39 +1043,40 @@ Coll_Ctrl::set_heaptrace (const char *string)
 {
   if (opened == 1)
     return strdup (GTXT ("Experiment is active; command ignored.\n"));
+  free(heaptrace_mode);
+  heaptrace_mode = NULL;  // Same as "off"
+  if (string != NULL && strcmp (string, "off") == 0)
+    return NULL;
+
   if (string == NULL || strlen (string) == 0 || strcmp (string, "on") == 0)
+    heaptrace_mode = strdup ("on");
+  else if (isdigit (*string))
     {
-      heaptrace_enabled = 1;
-      char *ret = check_consistency ();
-      if (ret != NULL)
+      char *s;
+      unsigned long long n = strtoull (string, &s, 0);
+      if (*s == '-' && isdigit (s[1]))
 	{
-	  heaptrace_enabled = 0;
-	  return ret;
+	  unsigned long long n1 = strtoull (s + 1, &s, 0);
+	  if (n1 < n)
+	    return dbe_sprintf (
+	       GTXT ("Incorrect range in heap trace parameter '%s'\n"), string);
 	}
-      return NULL;
+      if (*s != 0)
+	return dbe_sprintf (
+	       GTXT ("Incorrect range in heap trace parameter '%s'\n"), string);
+      heaptrace_mode = strdup (string);
     }
-  if (strcmp (string, "off") == 0)
-    {
-      heaptrace_enabled = 0;
-      return NULL;
-    }
-#if 0
-  if (strcmp (string, "check") == 0)
-    {
-      /* set to check for over/underruns */
-      heaptrace_checkenabled = 1;
-      heaptrace_enabled = 1;
-      return NULL;
-    }
-  if (strcmp (string, "clear") == 0)
+  else
+    return dbe_sprintf (GTXT ("Unrecognized heap tracing parameter `%s'\n"),
+			string);
+  char *ret = check_consistency ();
+  if (ret != NULL)
     {
-      /* set to check for over/underruns, and store patterns */
-      heaptrace_checkenabled = 2;
-      heaptrace_enabled = 1;
-      return NULL;
+      free (heaptrace_mode);
+      heaptrace_mode = NULL;
+      return ret;
     }
-#endif
-  return dbe_sprintf (GTXT ("Unrecognized heap tracing parameter `%s'\n"), string);
+  return NULL;
 }
 
 char *
@@ -1675,8 +1671,8 @@ Coll_Ctrl::build_data_desc ()
     sb.appendf ("p:%d;", clkprof_timer);
   if (synctrace_enabled == 1)
     sb.appendf ("s:%d,%d;", synctrace_thresh, synctrace_scope);
-  if (heaptrace_enabled == 1)
-    sb.appendf ("H:%d;", heaptrace_checkenabled);
+  if (heaptrace_mode != NULL && strcmp (heaptrace_mode, "off") != 0)
+    sb.appendf ("H:%s;", heaptrace_mode);
   if (iotrace_enabled == 1)
     sb.append ("i:;");
   if (hwcprof_enabled_cnt > 0)
@@ -2426,7 +2422,7 @@ Coll_Ctrl::preprocess_names ()
     }
   else
     {
-      expt_dir = dbe_strndup (expt_name, s - expt_name - 1);
+      expt_dir = dbe_strndup (expt_name, s - expt_name);
       base_name = strdup (s + 1);
     }
 
@@ -2790,7 +2786,7 @@ Coll_Ctrl::get (char * control)
     }
   if (!strncmp (control, ipc_str_javaprof, len))
     {
-      if ((java_mode == 0))
+      if (java_mode == 0)
 	return strdup (ipc_str_off);
       return strdup (ipc_str_on);
     }
@@ -2806,7 +2802,7 @@ Coll_Ctrl::get (char * control)
     }
   if (!strncmp (control, ipc_str_sample_sig, len))
     {
-      if ((sample_sig == 0))
+      if (sample_sig == 0)
 	return strdup (ipc_str_off);
       char *str_signal = find_signal_name (sample_sig);
       if (str_signal != NULL)
@@ -2834,21 +2830,21 @@ Coll_Ctrl::get (char * control)
     }
   if (!strncmp (control, ipc_str_heaptrace, len))
     {
-      if ((heaptrace_enabled == 0))
+      if (heaptrace_mode == NULL)
 	return strdup (ipc_str_off);
       return strdup (ipc_str_on);
     }
   if (!strncmp (control, ipc_str_iotrace, len))
     {
-      if ((iotrace_enabled == 0))
+      if (iotrace_enabled == 0)
 	return strdup (ipc_str_off);
       return strdup (ipc_str_on);
     }
   if (!strncmp (control, ipc_str_count, len))
     {
-      if ((count_enabled == 0))
+      if (count_enabled == 0)
 	return strdup (ipc_str_off);
-      if ((count_enabled < 0))
+      if (count_enabled < 0)
 	return strdup ("on\nstatic");
       return strdup (ipc_str_on);
     }
@@ -3019,7 +3015,8 @@ Coll_Ctrl::unset (char * control)
     }
   if (!strncmp (control, ipc_str_heaptrace, len))
     {
-      heaptrace_enabled = 0;
+      free (heaptrace_mode);
+      heaptrace_mode = NULL;
       return NULL;
     }
   if (!strncmp (control, ipc_str_iotrace, len))
diff --git a/gprofng/src/collctrl.h b/gprofng/src/collctrl.h
index a416474..0a98f71 100644
--- a/gprofng/src/collctrl.h
+++ b/gprofng/src/collctrl.h
@@ -101,8 +101,7 @@ public:
 
   /* set the parameters for heap tracing */
   char *set_heaptrace(const char *);
-  int get_heaptrace_mode()    { return heaptrace_enabled; };
-  int get_heaptrace_checkmode() { return heaptrace_checkenabled; };
+  char *get_heaptrace_mode()  { return heaptrace_mode; };
 
   /* set the parameters for I/O tracing */
   char *set_iotrace(const char *);
@@ -272,7 +271,6 @@ private:
   char *node_name;      /* name of machine on which experiment is run */
   long ncpus;           /* number of online CPUs */
   int cpu_clk_freq;     /* chip clock (MHz.), as reported from processor_info */
-  int cpc_cpuver;       /* chip version, as reported from libcpc */
   long sys_resolution;  /* system clock resolution */
   int sample_period;    /* period for sampling, seconds */
   int sample_default;    /* if period for sampling set by default */
@@ -342,12 +340,7 @@ private:
   /* 	definitions in data_pckts.h */
   int synctrace_scope;
 
-  int heaptrace_enabled;    /* T if heap tracing */
-  /* if 0 no checking;
-   * if 1, check for over- and under-write
-   * if 2, also set patterns in malloc'd and free'd areas
-   */
-  int heaptrace_checkenabled;
+  char *heaptrace_mode; /* NULL, or on, or off, or range */
   int iotrace_enabled;  /* T if I/O tracing */
 
   /* count controls */
diff --git a/gprofng/src/collector_module.h b/gprofng/src/collector_module.h
index bb48ead..ebcdbca 100644
--- a/gprofng/src/collector_module.h
+++ b/gprofng/src/collector_module.h
@@ -40,12 +40,12 @@ struct tm;
  * If you add any, please put it in the right place */
 typedef struct CollectorUtilFuncs
 {
-  int (*access)();
+  int (*access)(const char *, int);
   int (*atoi)(const char *nptr);
   void *(*calloc)(size_t nelem, size_t elsize);
   int (*clearenv)(void);
   int (*close)(int);
-  int (*closedir)();
+  int (*closedir)(DIR *);
   int (*execv)(const char *path, char *const argv[]);
   void (*exit)(int status);
   int (*fclose)(FILE *stream);
@@ -66,20 +66,20 @@ typedef struct CollectorUtilFuncs
   off_t (*lseek)(int fd, off_t offset, int whence);
   void *(*malloc)(size_t size);
   void *(*memset)(void *s1, int c, size_t n);
-  int (*mkdir)();
+  int (*mkdir)(const char *, mode_t);
   time_t (*mktime)(struct tm *timeptr);
   void *(*mmap)(void *, size_t, int, int, int, off_t);
-  void *(*mmap64_)();
-  int (*munmap)();
+  void *(*mmap64_)(void *, size_t, int, int, int, off_t);
+  int (*munmap)(void *, size_t);
   int (*open)(const char *, int, ...);
   int (*open_bare)(const char *, int, ...);
-  DIR *(*opendir)();
+  DIR *(*opendir)(const char *);
   int (*pclose)(FILE *stream);
   FILE *(*popen)(const char *command, const char *mode);
   int (*putenv)(char *string);
-  ssize_t (*pwrite)();
-  ssize_t (*pwrite64_)();
-  ssize_t (*read)();
+  ssize_t (*pwrite)(int, const void *, size_t, off_t);
+  ssize_t (*pwrite64_)(int, const void *, size_t, off_t);
+  ssize_t (*read)(int, void *, size_t);
   int (*setenv)(const char *name, const char *value, int overwrite);
   int (*sigfillset)(sigset_t *set);
   int (*sigprocmask)(int how, const sigset_t *set, sigset_t *oldset);
@@ -112,7 +112,7 @@ typedef struct CollectorUtilFuncs
   int (*unsetenv)(const char *name);
   int (*vsnprintf)(char *str, size_t size, const char *format, va_list ap);
   pid_t (*waitpid)(pid_t pid, int *stat_loc, int options);
-  ssize_t (*write)();
+  ssize_t (*write)(int, void *, size_t);
   double (*atof)();
   void *n_a;
 } CollectorUtilFuncs;
diff --git a/gprofng/src/envsets.cc b/gprofng/src/envsets.cc
index 9cef745..70510fb 100644
--- a/gprofng/src/envsets.cc
+++ b/gprofng/src/envsets.cc
@@ -107,7 +107,7 @@ collect::putenv_libcollector_ld_preloads ()
   // for those data types that get extra libs LD_PRELOAD'd, add them
   if (cc->get_synctrace_mode () != 0)
     add_ld_preload ("libgp-sync.so");
-  if (cc->get_heaptrace_mode () != 0)
+  if (cc->get_heaptrace_mode () != NULL)
     add_ld_preload ("libgp-heap.so");
   if (cc->get_iotrace_mode () != 0)
     add_ld_preload ("libgp-iotrace.so");
diff --git a/gprofng/src/gp-collect-app.cc b/gprofng/src/gp-collect-app.cc
index 5a3653f..c80c1b0 100644
--- a/gprofng/src/gp-collect-app.cc
+++ b/gprofng/src/gp-collect-app.cc
@@ -1403,7 +1403,7 @@ collect::usage ()
   end of this long list.
 */
   printf ( GTXT (
-    "Usage: gprofng collect app [OPTION(S)] TARGET [TARGET_ARGUMENTS]\n")),
+    "Usage: gprofng collect app [OPTION(S)] TARGET [TARGET_ARGUMENTS]\n"));
 
 /*
 -------------------------------------------------------------------------------
@@ -1481,7 +1481,8 @@ collect::usage ()
     "                       \"n\" selects native/Pthreads, \"j\" selects Java, and \"nj\" selects both;\n"
     "                       the default is \"-s off\".\n"
     "\n"
-    " -H {off|on}        disable (off), or enable (on) heap tracing; the default is \"-H off\".\n"
+    " -H {off|on|N1[-N2]}  disable (off), or enable (on) heap tracing, or\n"
+    "                      specify the heap data collection range. The default is \"-H off\".\n"
     "\n"
     " -i {off|on}        disable (off), or enable (on) I/O tracing; the default is \"-i off\".\n"
     "\n"
@@ -1494,84 +1495,6 @@ collect::usage ()
     "See also:\n"
     "\n"
     "gprofng(1), gp-archive(1), gp-display-html(1), gp-display-src(1), gp-display-text(1)\n"));
-/*
-  char *s = dbe_sprintf (GTXT ("Usage:  %s <args> target <target-args>\n"),
-			 whoami);
-  writeStr (usage_fd, s);
-  free (s);
-  writeStr (usage_fd, GTXT ("  -p {lo|on|hi|off|<value>}\tspecify clock-profiling\n"));
-  writeStr (usage_fd, GTXT ("\t`lo'    per-thread rate of ~10 samples/second\n"));
-  writeStr (usage_fd, GTXT ("\t`on'    per-thread rate of ~100 samples/second (default)\n"));
-  writeStr (usage_fd, GTXT ("\t`hi'    per-thread rate of ~1000 samples/second\n"));
-  writeStr (usage_fd, GTXT ("\t`off'   disable clock profiling\n"));
-  writeStr (usage_fd, GTXT ("\t<value> specify profile timer period in millisec.\n"));
-  s = dbe_sprintf (GTXT ("\t\t\tRange on this system is from %.3f to %.3f millisec.\n\t\t\tResolution is %.3f millisec.\n"),
-		   (double) cc->get_clk_min () / 1000.,
-		   (double) cc->get_clk_max () / 1000.,
-		   (double) cc->get_clk_res () / 1000.);
-  writeStr (usage_fd, s);
-  free (s);
-  writeStr (usage_fd, GTXT ("  -h <ctr_def>...[,<ctr_n_def>]\tspecify HW counter profiling\n"));
-  s = dbe_sprintf (GTXT ("\tto see the supported HW counters on this machine, run \"%s -h\" with no other arguments\n"),
-		   whoami);
-  writeStr (usage_fd, s);
-  free (s);
-  writeStr (usage_fd, GTXT ("  -s <threshold>[,<scope>]\tspecify synchronization wait tracing\n"));
-  writeStr (usage_fd, GTXT ("\t<scope> is \"j\" for tracing Java-APIs, \"n\" for tracing native-APIs, or \"nj\" for tracing both\n"));
-  writeStr (usage_fd, GTXT ("  -H {on|off}\tspecify heap tracing\n"));
-  writeStr (usage_fd, GTXT ("  -i {on|off}\tspecify I/O tracing\n"));
-  writeStr (usage_fd, GTXT ("  -N <lib>\tspecify library to exclude count from instrumentation (requires -c also)\n"));
-  writeStr (usage_fd, GTXT ("          \tmultiple -N arguments can be provided\n"));
-  writeStr (usage_fd, GTXT ("  -j {on|off|path}\tspecify Java profiling\n"));
-  writeStr (usage_fd, GTXT ("  -J <java-args>\tspecify arguments to Java for Java profiling\n"));
-  writeStr (usage_fd, GTXT ("  -t <duration>\tspecify time over which to record data\n"));
-  writeStr (usage_fd, GTXT ("  -n\tdry run -- don't run target or collect performance data\n"));
-  writeStr (usage_fd, GTXT ("  -y <signal>[,r]\tspecify delayed initialization and pause/resume signal\n"));
-  writeStr (usage_fd, GTXT ("\tWhen set, the target starts in paused mode;\n\t  if the optional r is provided, it starts in resumed mode\n"));
-  writeStr (usage_fd, GTXT ("  -F {on|off|=<regex>}\tspecify following descendant processes\n"));
-  writeStr (usage_fd, GTXT ("  -a {on|ldobjects|src|usedldobjects|usedsrc|off}\tspecify archiving of binaries and other files;\n"));
-  writeStr (usage_fd, GTXT ("  -S {on|off|<seconds>}\t Set the interval for periodic sampling of process-wide resource utilization\n"));
-  writeStr (usage_fd, GTXT ("  -l <signal>\tspecify signal that will trigger a sample of process-wide resource utilization\n"));
-  writeStr (usage_fd, GTXT ("  -o <expt>\tspecify experiment name\n"));
-  writeStr (usage_fd, GTXT ("  --verbose\tprint expanded log of processing\n"));
-  writeStr (usage_fd, GTXT ("  -C <label>\tspecify comment label (up to 10 may appear)\n"));
-  writeStr (usage_fd, GTXT ("  -V|--version\tprint version number and exit\n"));
-*/
-  /* don't document this feature */
-  //	writeStr (usage_fd, GTXT("  -Z\tPreload mem.so, and launch target [no experiment]\n") );
-/*
-  writeStr (usage_fd, GTXT ("\n See the gp-collect(1) man page for more information\n"));
-*/
-
-#if 0
-  /* print an extended usage message */
-  /* find a Java for Java profiling, set Java on to check Java */
-  find_java ();
-  cc->set_java_mode (NTXT ("on"));
-
-  /* check for variable-clock rate */
-  unsigned char mode = COL_CPUFREQ_NONE;
-  get_cpu_frequency (&mode);
-  if (mode != COL_CPUFREQ_NONE)
-    writeStr (usage_fd, GTXT ("NOTE: system has variable clock frequency, which may cause variable program run times.\n"));
-
-  /* show the experiment that would be run */
-  writeStr (usage_fd, GTXT ("\n Default experiment:\n"));
-  char *ccret = cc->setup_experiment ();
-  if (ccret != NULL)
-    {
-      writeStr (usage_fd, ccret);
-      free (ccret);
-      exit (1);
-    }
-  cc->delete_expt ();
-  ccret = cc->show (1);
-  if (ccret != NULL)
-    {
-      writeStr (usage_fd, ccret);
-      free (ccret);
-    }
-#endif
 }
 
 void
diff --git a/gprofng/src/gp-display-src.cc b/gprofng/src/gp-display-src.cc
index 200e608..24af375 100644
--- a/gprofng/src/gp-display-src.cc
+++ b/gprofng/src/gp-display-src.cc
@@ -75,14 +75,6 @@ private:
   bool v_opt;
   int multiple;
   char *str_compcom;
-  bool hex_visible;
-  int src_visible;
-  int vis_src;
-  int vis_dis;
-  int threshold_src;
-  int threshold_dis;
-  int threshold;
-  int vis_bits;
 };
 
 static int
diff --git a/gprofng/src/gp-print.h b/gprofng/src/gp-print.h
index 1b748ea..1a8ad3b 100644
--- a/gprofng/src/gp-print.h
+++ b/gprofng/src/gp-print.h
@@ -19,7 +19,7 @@
    MA 02110-1301, USA.  */
 
 #ifndef _GP_PRINT_H
-#define _ER_PRINT_H
+#define _GP_PRINT_H
 
 #include "Command.h"
 #include "DbeApplication.h"
diff --git a/gprofng/src/hwc_arm64_amcc.h b/gprofng/src/hwc_arm64_amcc.h
new file mode 100644
index 0000000..5d86c6b
--- /dev/null
+++ b/gprofng/src/hwc_arm64_amcc.h
@@ -0,0 +1,182 @@
+/* Copyright (C) 2024 Free Software Foundation, Inc.
+   Contributed by Oracle.
+
+   This file is part of GNU Binutils.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3, or (at your option)
+   any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, 51 Franklin Street - Fifth Floor, Boston,
+   MA 02110-1301, USA.  */
+
+#ifndef _HWC_ARM64_AMCC_H
+#define _HWC_ARM64_AMCC_H
+
+#define I(nm, event, mtr) INIT_HWC(nm, mtr, (event), PERF_TYPE_RAW)
+
+static Hwcentry arm64_amcc_list[] = {
+  HWC_GENERIC
+/* branch: */
+  { I("br_immed_spec", 0x78,
+    STXT("Branch speculatively executed, immediate branch")) },
+  { I("br_indirect_spec", 0x7a,
+    STXT("Branch speculatively executed, indirect branch")) },
+  { I("br_mis_pred", 0x10, STXT("Branch mispredicted")) },
+  { I("br_pred", 0x12, STXT("Predictable branch")) },
+  { I("br_return_spec", 0x79,
+    STXT("Branch speculatively executed, procedure return")) },
+/* bus: */
+  { I("bus_access", 0x19, STXT("Attributable Bus access")) },
+  { I("bus_access_normal", 0x64, STXT("Bus access, Normal")) },
+  { I("bus_access_not_shared", 0x63,
+    STXT("Bus access, not Normal, Cacheable, Shareable")) },
+  { I("bus_access_periph", 0x65, STXT("Bus access, peripheral")) },
+  { I("bus_access_shared", 0x62,
+    STXT("Bus access, Normal, Cacheable, Shareable")) },
+/* cache: */
+  { I("btb_mis_pred", 0x102, STXT("BTB misprediction")) },
+  { I("dtb_miss", 0x104, STXT("DTB miss")) },
+  { I("itb_miss", 0x103, STXT("ITB miss")) },
+  { I("l1_stage2_tlb_refill", 0x111, STXT("L1 stage 2 TLB refill")) },
+  { I("l1d_cache", 0x4, STXT("Level 1 data cache access")) },
+  { I("l1d_cache_inval", 0x48, STXT("L1D cache invalidate")) },
+  { I("l1d_cache_late_miss", 0x105, STXT("L1D cache late miss")) },
+  { I("l1d_cache_prefetch", 0x106, STXT("L1D cache prefetch")) },
+  { I("l1d_cache_refill", 0x3, STXT("Level 1 data cache refill")) },
+  { I("l1d_tlb", 0x25, STXT("L1D TLB access")) },
+  { I("l1d_tlb_refill", 0x5, STXT("Attributable Level 1 data TLB refill")) },
+  { I("l1i_cache", 0x14,
+    STXT("Attributable Level 1 instruction cache access")) },
+  { I("l1i_cache_refill", 0x1, STXT("Level 1 instruction cache refill")) },
+  { I("l1i_tlb", 0x26, STXT("Attributable Level 1 instruction TLB access")) },
+  { I("l1i_tlb_refill", 0x2,
+    STXT("Attributable Level 1 instruction TLB refill")) },
+  { I("l2d_cache", 0x16, STXT("Level 2 data cache access")) },
+  { I("l2d_cache_inval", 0x58, STXT("L2D cache invalidate")) },
+  { I("l2d_cache_prefetch", 0x107, STXT("L2D cache prefetch")) },
+  { I("l2d_cache_rd", 0x50, STXT("L2D cache access, read")) },
+  { I("l2d_cache_refill", 0x17, STXT("Level 2 data refill")) },
+  { I("l2d_cache_refill_rd", 0x52, STXT("L2D cache refill, read")) },
+  { I("l2d_cache_refill_wr", 0x53, STXT("L2D cache refill, write")) },
+  { I("l2d_cache_wb", 0x18,
+    STXT("Attributable Level 2 data cache write-back")) },
+  { I("l2d_cache_wb_clean", 0x57,
+    STXT("L2D cache Write-Back, cleaning and coherency")) },
+  { I("l2d_cache_wb_victim", 0x56, STXT("L2D cache Write-Back, victim")) },
+  { I("l2d_cache_wr", 0x51, STXT("L2D cache access, write")) },
+  { I("l2d_tlb_access", 0x34, STXT("L2D TLB access")) },
+  { I("l2i_tlb_access", 0x35, STXT("L2I TLB access")) },
+  { I("page_walk_l0_stage1_hit", 0x112, STXT("Page walk, L0 stage-1 hit")) },
+  { I("page_walk_l1_stage1_hit", 0x113, STXT("Page walk, L1 stage-1 hit")) },
+  { I("page_walk_l1_stage2_hit", 0x115, STXT("Page walk, L1 stage-2 hit")) },
+  { I("page_walk_l2_stage1_hit", 0x114, STXT("Page walk, L2 stage-1 hit")) },
+  { I("page_walk_l2_stage2_hit", 0x116, STXT("Page walk, L2 stage-2 hit")) },
+/* clock: */
+  { I("cpu_cycles", 0x11, STXT("Cycle")) },
+  { I("fsu_clock_off_cycles", 0x101, STXT("FSU clocking gated off cycle")) },
+  { I("wait_cycles", 0x110, STXT("Wait state cycle")) },
+/* core imp def: */
+  { I("bus_access_rd", 0x60, STXT("Bus access read")) },
+  { I("bus_access_wr", 0x61, STXT("Bus access write")) },
+  { I("l1d_cache_rd", 0x40, STXT("L1D cache access, read")) },
+  { I("l1d_cache_refill_rd", 0x42, STXT("L1D cache refill, read")) },
+  { I("l1d_cache_refill_wr", 0x43, STXT("L1D cache refill, write")) },
+  { I("l1d_cache_wr", 0x41, STXT("L1D cache access, write")) },
+  { I("l1d_tlb_rd", 0x4e, STXT("L1D tlb access, read")) },
+  { I("l1d_tlb_refill_rd", 0x4c, STXT("L1D tlb refill, read")) },
+  { I("l1d_tlb_refill_wr", 0x4d, STXT("L1D tlb refill, write")) },
+  { I("l1d_tlb_wr", 0x4f, STXT("L1D tlb access, write")) },
+/* exception: */
+  { I("exc_dabort", 0x84, STXT("Exception taken, Data Abort and SError")) },
+  { I("exc_fiq", 0x87, STXT("Exception taken, FIQ")) },
+  { I("exc_hvc", 0x8a, STXT("Exception taken, Hypervisor Call")) },
+  { I("exc_irq", 0x86, STXT("Exception taken, IRQ")) },
+  { I("exc_pabort", 0x83, STXT("Exception taken, Instruction Abort")) },
+  { I("exc_return", 0xa,
+    STXT("Instruction architecturally executed, condition check pass, exception"
+      " return")) },
+  { I("exc_svc", 0x82, STXT("Exception taken, Supervisor Call")) },
+  { I("exc_taken", 0x9, STXT("Exception taken")) },
+  { I("exc_trap_dabort", 0x8c,
+    STXT("Exception taken, Data Abort or SError not taken locally")) },
+  { I("exc_trap_fiq", 0x8f, STXT("Exception taken, FIQ not taken locally")) },
+  { I("exc_trap_irq", 0x8e, STXT("Exception taken, IRQ not taken locally")) },
+  { I("exc_trap_other", 0x8d,
+    STXT("Exception taken, Other traps not taken locally")) },
+  { I("exc_trap_pabort", 0x8b,
+    STXT("Exception taken, Instruction Abort not taken locally")) },
+  { I("exc_undef", 0x81, STXT("Exception taken, Other synchronous")) },
+/* instruction: */
+  { I("ase_spec", 0x74,
+    STXT("Operation speculatively executed, Advanced SIMD instruction")) },
+  { I("br_mis_pred_retired", 0x22,
+    STXT("Instruction architecturally executed, mispredicted branch")) },
+  { I("br_retired", 0x21,
+    STXT("Instruction architecturally executed, branch")) },
+  { I("cid_write_retired", 0xb, STXT("Write to CONTEXTIDR")) },
+  { I("crypto_spec", 0x77,
+    STXT("Operation speculatively executed, Cryptographic instruction")) },
+  { I("dmb_spec", 0x7e, STXT("Barrier speculatively executed, DMB")) },
+  { I("dp_spec", 0x73,
+    STXT("Operation speculatively executed, integer data processing")) },
+  { I("dsb_spec", 0x7d, STXT("Barrier speculatively executed, DSB")) },
+  { I("inst_retired", 0x8, STXT("Instruction architecturally executed")) },
+  { I("inst_spec", 0x1b, STXT("Operation speculatively executed")) },
+  { I("isb_spec", 0x7c, STXT("Barrier speculatively executed, ISB")) },
+  { I("ld_spec", 0x70, STXT("Operation speculatively executed, load")) },
+  { I("ldst_spec", 0x72,
+    STXT("Operation speculatively executed, load or store")) },
+  { I("nop_spec", 0x100, STXT("Speculatively executed, NOP")) },
+  { I("pc_write_spec", 0x76,
+    STXT("Operation speculatively executed, software change of the PC")) },
+  { I("rc_ld_spec", 0x90,
+    STXT("Release consistency operation speculatively executed, Load-Acquire")) },
+  { I("rc_st_spec", 0x91,
+    STXT("Release consistency operation speculatively executed, Store-Release")) },
+  { I("st_spec", 0x71, STXT("Operation speculatively executed, store")) },
+  { I("sw_incr", 0, STXT("Software increment")) },
+  { I("ttbr_write_retired", 0x1c,
+    STXT("Instruction architecturally executed, Condition code check pass, write"
+      " to TTBR")) },
+  { I("vfp_spec", 0x75,
+    STXT("Operation speculatively executed, floating-point instruction")) },
+/* intrinsic: */
+  { I("ldrex_spec", 0x6c,
+    STXT("Exclusive operation speculatively executed, LDREX or LDX")) },
+  { I("strex_fail_spec", 0x6e,
+    STXT("Exclusive operation speculatively executed, STREX or STX fail")) },
+  { I("strex_pass_spec", 0x6d,
+    STXT("Exclusive operation speculatively executed, STREX or STX pass")) },
+  { I("strex_spec", 0x6f,
+    STXT("Exclusive operation speculatively executed, STREX or STX")) },
+/* memory: */
+  { I("mem_access", 0x13, STXT("Data memory access")) },
+  { I("mem_access_rd", 0x66, STXT("Data memory access, read")) },
+  { I("mem_access_wr", 0x67, STXT("Data memory access, write")) },
+  { I("memory_error", 0x1a, STXT("Local memory error")) },
+  { I("unaligned_ld_spec", 0x68, STXT("Unaligned access, read")) },
+  { I("unaligned_ldst_spec", 0x6a, STXT("Unaligned access")) },
+  { I("unaligned_st_spec", 0x69, STXT("Unaligned access, write")) },
+/* pipeline: */
+  { I("bx_stall", 0x10c, STXT("BX stalled")) },
+  { I("decode_stall", 0x108, STXT("Decode starved")) },
+  { I("dispatch_stall", 0x109, STXT("Dispatch stalled")) },
+  { I("fx_stall", 0x10f, STXT("FX stalled")) },
+  { I("ixa_stall", 0x10a, STXT("IXA stalled")) },
+  { I("ixb_stall", 0x10b, STXT("IXB stalled")) },
+  { I("lx_stall", 0x10d, STXT("LX stalled")) },
+  { I("sx_stall", 0x10e, STXT("SX stalled")) },
+  { NULL, NULL, 0, NULL }
+};
+
+#undef I
+#endif
diff --git a/gprofng/src/hwc_arm_ampere_1.h b/gprofng/src/hwc_arm_ampere_1.h
new file mode 100644
index 0000000..9d3f826
--- /dev/null
+++ b/gprofng/src/hwc_arm_ampere_1.h
@@ -0,0 +1,419 @@
+/* Copyright (C) 2024 Free Software Foundation, Inc.
+   Contributed by Oracle.
+
+   This file is part of GNU Binutils.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3, or (at your option)
+   any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, 51 Franklin Street - Fifth Floor, Boston,
+   MA 02110-1301, USA.  */
+
+#ifndef _HWC_ARM_AMPERE_1_H_
+#define _HWC_ARM_AMPERE_1_H_
+
+#define I(nm, event, mtr) INIT_HWC(nm, mtr, (event), PERF_TYPE_RAW)
+
+static Hwcentry arm_ampere_1_list[] = {
+  HWC_GENERIC
+/* branch: */
+  { I("br_immed_spec", 0x78,
+    STXT("Branch speculatively executed, immediate branch")) },
+  { I("br_indirect_spec", 0x7a,
+    STXT("Branch speculatively executed, indirect branch")) },
+  { I("br_mis_pred", 0x10,
+    STXT("Mispredicted or not predicted branch speculatively executed. Unit:"
+      " armv8_pmuv3_0")) },
+  { I("br_pred", 0x12,
+    STXT("Predictable branch speculatively executed. Unit: armv8_pmuv3_0")) },
+  { I("br_return_spec", 0x79,
+    STXT("Branch speculatively executed, procedure return")) },
+/* bus: */
+  { I("bus_access", 0x19,
+    STXT("Attributable Bus access. Unit: armv8_pmuv3_0")) },
+  { I("bus_access_normal", 0x64, STXT("Bus access, Normal")) },
+  { I("bus_access_not_shared", 0x63,
+    STXT("Bus access, not Normal, Cacheable, Shareable")) },
+  { I("bus_access_periph", 0x65, STXT("Bus access, peripheral")) },
+  { I("bus_access_rd", 0x60, STXT("Bus access read")) },
+  { I("bus_access_shared", 0x62,
+    STXT("Bus access, Normal, Cacheable, Shareable")) },
+  { I("bus_access_wr", 0x61, STXT("Bus access write")) },
+  { I("bus_cycles", 0x1d, STXT("Bus cycle. Unit: armv8_pmuv3_0")) },
+  { I("cnt_cycles", 0x4004,
+    STXT("Constant frequency cycles. Unit: armv8_pmuv3_0")) },
+  { I("cpu_cycles", 0x11, STXT("Cycle. Unit: armv8_pmuv3_0")) },
+/* cache: */
+  { I("dtlb_walk", 0x34,
+    STXT("Access to data TLB causes a translation table walk. Unit:"
+      " armv8_pmuv3_0")) },
+  { I("itlb_walk", 0x35,
+    STXT("Access to instruction TLB that causes a translation table walk. Unit:"
+      " armv8_pmuv3_0")) },
+  { I("l1d_cache", 0x4,
+    STXT("Level 1 data cache access. Unit: armv8_pmuv3_0")) },
+  { I("l1d_cache_inval", 0x48, STXT("L1D cache invalidate")) },
+  { I("l1d_cache_lmiss_rd", 0x39,
+    STXT("Level 1 data cache long-latency read miss. Unit: armv8_pmuv3_0")) },
+  { I("l1d_cache_rd", 0x40, STXT("L1D cache access, read")) },
+  { I("l1d_cache_refill", 0x3,
+    STXT("Level 1 data cache refill. Unit: armv8_pmuv3_0")) },
+  { I("l1d_cache_refill_rd", 0x42, STXT("L1D cache refill, read")) },
+  { I("l1d_cache_wr", 0x41, STXT("L1D cache access, write")) },
+  { I("l1d_tlb", 0x25,
+    STXT("Attributable Level 1 data or unified TLB access. Unit: armv8_pmuv3_0")) },
+  { I("l1d_tlb_refill", 0x5,
+    STXT("Attributable Level 1 data TLB refill. Unit: armv8_pmuv3_0")) },
+  { I("l1d_tlb_refill_rd", 0x4c, STXT("L1D tlb refill, read")) },
+  { I("l1d_tlb_refill_wr", 0x4d, STXT("L1D tlb refill, write")) },
+  { I("l1i_cache", 0x14,
+    STXT("Attributable Level 1 instruction cache access. Unit: armv8_pmuv3_0")) },
+  { I("l1i_cache_lmiss", 0x4006,
+    STXT("Level 1 instruction cache long-latency read miss. Unit: armv8_pmuv3_0")) },
+  { I("l1i_cache_refill", 0x1,
+    STXT("Level 1 instruction cache refill. Unit: armv8_pmuv3_0")) },
+  { I("l1i_tlb", 0x26,
+    STXT("Attributable Level 1 instruction TLB access. Unit: armv8_pmuv3_0")) },
+  { I("l1i_tlb_refill", 0x2,
+    STXT("Attributable Level 1 instruction TLB refill. Unit: armv8_pmuv3_0")) },
+  { I("l2d_cache", 0x16,
+    STXT("Level 2 data cache access. Unit: armv8_pmuv3_0")) },
+  { I("l2d_cache_inval", 0x58, STXT("L2D cache invalidate")) },
+  { I("l2d_cache_lmiss_rd", 0x4009,
+    STXT("Level 2 data cache long-latency read miss. Unit: armv8_pmuv3_0")) },
+  { I("l2d_cache_rd", 0x50, STXT("L2D cache access, read")) },
+  { I("l2d_cache_refill", 0x17,
+    STXT("Level 2 data refill. Unit: armv8_pmuv3_0")) },
+  { I("l2d_cache_refill_rd", 0x52, STXT("L2D cache refill, read")) },
+  { I("l2d_cache_refill_wr", 0x53, STXT("L2D cache refill, write")) },
+  { I("l2d_cache_wb", 0x18,
+    STXT("Attributable Level 2 data cache write-back. Unit: armv8_pmuv3_0")) },
+  { I("l2d_cache_wb_clean", 0x57,
+    STXT("L2D cache Write-Back, cleaning and coherency")) },
+  { I("l2d_cache_wb_victim", 0x56, STXT("L2D cache Write-Back, victim")) },
+  { I("l2d_cache_wr", 0x51, STXT("L2D cache access, write")) },
+  { I("l2d_tlb", 0x2f,
+    STXT("Attributable Level 2 data or unified TLB access. Unit: armv8_pmuv3_0")) },
+  { I("l2d_tlb_refill", 0x2d,
+    STXT("Attributable Level 2 data TLB refill. Unit: armv8_pmuv3_0")) },
+  { I("l2i_tlb", 0x30,
+    STXT("Attributable Level 2 instruction TLB access. Unit: armv8_pmuv3_0")) },
+  { I("l2i_tlb_refill", 0x2e,
+    STXT("Attributable Level 2 instruction TLB refill. Unit: armv8_pmuv3_0")) },
+/* core imp def: */
+  { I("bpu_branch_no_hit", 0x115,
+    STXT("Predictable branch speculatively executed, unpredicted")) },
+  { I("bpu_btb_update", 0x11c,
+    STXT("Predictable branch speculatively executed, unpredicted, that"
+      " mispredict")) },
+  { I("bpu_conditional_branch_hit_btb", 0x111,
+    STXT("Predictable conditional branch speculatively executed that hit any"
+      " level of BTB")) },
+  { I("bpu_conditional_branch_hit_btb_and_mispredict", 0x117,
+    STXT("Predictable conditional branch speculatively executed that hit any"
+      " level of BTB that (direction) mispredict")) },
+  { I("bpu_flush_mem_fault", 0x121, STXT("Flushes due to memory hazards")) },
+  { I("bpu_hit_btb", 0x110,
+    STXT("Predictable branch speculatively executed that hit any level of BTB")) },
+  { I("bpu_hit_btb_and_mispredict", 0x116,
+    STXT("Predictable branch speculatively executed that hit any level of BTB"
+      " that mispredict")) },
+  { I("bpu_hit_indirect_predictor", 0x112,
+    STXT("Predictable taken branch speculatively executed that hit any level of"
+      " BTB that access the indirect predictor")) },
+  { I("bpu_hit_rsb", 0x113,
+    STXT("Predictable taken branch speculatively executed that hit any level of"
+      " BTB that access the return predictor")) },
+  { I("bpu_hit_rsb_and_mispredict", 0x119,
+    STXT("Predictable taken branch speculatively executed that hit any level of"
+      " BTB that access the return predictor that mispredict")) },
+  { I("bpu_indirect_branch_hit_btb_and_mispredict", 0x118,
+    STXT("Predictable taken branch speculatively executed that hit any level of"
+      " BTB that access the indirect predictor that mispredict")) },
+  { I("bpu_miss_rsb_and_mispredict", 0x11a,
+    STXT("Predictable taken branch speculatively executed that hit any level of"
+      " BTB that access the overflow/underflow return predictor that"
+      " mispredict")) },
+  { I("bpu_no_prediction_mispredict", 0x11b,
+    STXT("Predictable branch speculatively executed, unpredicted, that"
+      " mispredict")) },
+  { I("bpu_rsb_full_stall", 0x11d,
+    STXT("Count predict pipe stalls due to speculative return address predictor"
+      " full")) },
+  { I("bpu_unconditional_branch_miss_btb", 0x114,
+    STXT("Predictable unconditional branch speculatively executed that did not"
+      " hit any level of BTB")) },
+  { I("breakpoint_match", 0xd501,
+    STXT("GPC detected a Breakpoint instruction match")) },
+  { I("fsu_cancel", 0xd404, STXT("Uops canceled (load cancels)")) },
+  { I("fsu_div_sqrt_stall", 0xd405,
+    STXT("Count scheduler stalls due to divide/sqrt")) },
+  { I("fsu_fsx_issued", 0xd401,
+    STXT("Uops issued by the scheduler on pipe X")) },
+  { I("fsu_fsy_issued", 0xd402,
+    STXT("Uops issued by the scheduler on pipe Y")) },
+  { I("fsu_fsz_issued", 0xd403,
+    STXT("Uops issued by the scheduler on pipe Z")) },
+  { I("fsu_issued", 0xd400, STXT("Uops issued by the FSU scheduler")) },
+  { I("gpc_flush", 0x120, STXT("Flushes")) },
+  { I("gpc_swob_drain", 0xd500, STXT("Number of SWOB drains")) },
+  { I("icf_early_mis_pred", 0xd100, STXT("Early mispredict")) },
+  { I("icf_feq_full", 0xd101, STXT("FEQ full cycles")) },
+  { I("icf_inst_fifo_full", 0xd102, STXT("Instruction FIFO Full")) },
+  { I("icf_inst_spec_decode", 0x11f,
+    STXT("Macro-ops speculatively decoded")) },
+  { I("icf_pc_fifo_full", 0xd105, STXT("PC FIFO Full")) },
+  { I("icf_stall", 0xd104,
+    STXT("ICF sent 0 instructions to IDR this cycle")) },
+  { I("idr_stall_bob_id", 0xd200, STXT("Stall due to BOB ID")) },
+  { I("idr_stall_flush", 0xd206,
+    STXT("Dispatch stall due to flush (6 cycles)")) },
+  { I("idr_stall_fsu_sched", 0xd204,
+    STXT("Dispatch stall due to FSU scheduler entries")) },
+  { I("idr_stall_ixu_sched", 0xd203,
+    STXT("Dispatch stall due to IXU scheduler entries")) },
+  { I("idr_stall_lob_id", 0xd201, STXT("Dispatch stall due to LOB entries")) },
+  { I("idr_stall_rob_id", 0xd205, STXT("Dispatch stall due to ROB entries")) },
+  { I("idr_stall_sob_id", 0xd202, STXT("Dispatch stall due to SOB entries")) },
+  { I("idr_stall_swob_full", 0xd20a,
+    STXT("Number of SWOB drains triggered by system register write when SWOB"
+      " full")) },
+  { I("idr_stall_swob_raw", 0xd209,
+    STXT("Number of SWOB drains triggered by system register or special-purpose"
+      " register read-after-write or specific special-purpose register writes"
+      " that cause SWOB drain")) },
+  { I("idr_stall_swob_timeout", 0xd208,
+    STXT("Number of SWOB drains triggered by timeout")) },
+  { I("idr_stall_wfi", 0xd207, STXT("Dispatch stall due to WFI")) },
+  { I("ixu_issue_cancel", 0xd301,
+    STXT("Any uop issued was canceled for any reason")) },
+  { I("ixu_ixa_issued", 0xd304, STXT("Uops issued by the scheduler on IXA")) },
+  { I("ixu_ixa_par0_issued", 0xd305,
+    STXT("Uops issued by the scheduler on IXA Par 0")) },
+  { I("ixu_ixa_par1_issued", 0xd306,
+    STXT("Uops issued by the scheduler on IXA Par 1")) },
+  { I("ixu_ixb_issued", 0xd307, STXT("Uops issued by the scheduler on IXB")) },
+  { I("ixu_ixb_par0_issued", 0xd308,
+    STXT("Uops issued by the scheduler on IXB Par 0")) },
+  { I("ixu_ixb_par1_issued", 0xd309,
+    STXT("Uops issued by the scheduler on IXB Par 1")) },
+  { I("ixu_ixc_issued", 0xd30a, STXT("Uops issued by the scheduler on IXC")) },
+  { I("ixu_ixc_par0_issued", 0xd30b,
+    STXT("Uops issued by the scheduler on IXC Par 0")) },
+  { I("ixu_ixc_par1_issued", 0xd30c,
+    STXT("Uops issued by the scheduler on IXC Par 1")) },
+  { I("ixu_ixd_issued", 0xd30d, STXT("Uops issued by the scheduler on IXD")) },
+  { I("ixu_ixd_par0_issued", 0xd30e,
+    STXT("Uops issued by the scheduler on IXD Par 0")) },
+  { I("ixu_ixd_par1_issued", 0xd30f,
+    STXT("Uops issued by the scheduler on IXD Par 1")) },
+  { I("ixu_load_cancel", 0xd302,
+    STXT("A load wakeup to the scheduler has been cancelled")) },
+  { I("ixu_num_uops_issued", 0xd300,
+    STXT("Instructions issued by the scheduler")) },
+  { I("ixu_slow_cancel", 0xd303,
+    STXT("The scheduler had to cancel one slow Uop due to resource conflict")) },
+  { I("l1_pfetch_dist_inc", 0xd60a,
+    STXT("L1 prefetcher, distance was increased")) },
+  { I("l1_pfetch_dist_rst", 0xd609,
+    STXT("L1 prefetcher, distance was reset")) },
+  { I("l1_pfetch_entry_trained", 0xd60b,
+    STXT("L1 prefetcher, table entry is trained")) },
+  { I("l1_pfetch_l2_req", 0xd608,
+    STXT("L1 prefetcher, load prefetch to L2 generated")) },
+  { I("l1_pfetch_ld_fill", 0xd607,
+    STXT("L1 prefetcher, load prefetch fills into the L1 cache")) },
+  { I("l1_pfetch_ld_gen", 0xd606,
+    STXT("L1 prefetcher, load prefetch requests generated")) },
+  { I("l1d_tlb_miss", 0xd600, STXT("L1D TLB miss")) },
+  { I("l1i_tlb_miss", 0xd103, STXT("L1I TLB miss")) },
+  { I("l2_prefetch_refill", 0x10a,
+    STXT("Level 2 prefetch requests, refilled to L2 cache")) },
+  { I("l2_prefetch_req", 0xd703,
+    STXT("L2 prefetcher, load prefetch requests generated")) },
+  { I("l2_prefetch_upgrade", 0x10b, STXT("Level 2 prefetch requests, late")) },
+  { I("l2c_dat_crd_stall", 0x169, STXT("L2 TXDAT LCRD blocked")) },
+  { I("l2c_data_refill", 0xd702, STXT("L2 refill from D-side miss")) },
+  { I("l2c_inst_refill", 0xd701, STXT("L2 refill from I-side miss")) },
+  { I("l2c_pipe_replay", 0xd700, STXT("L2 pipeline replay")) },
+  { I("l2c_req_crd_stall", 0x16b, STXT("L2 TXREQ LCRD blocked")) },
+  { I("l2c_rsp_crd_stall", 0x16a, STXT("L2 TXRSP LCRD blocked")) },
+  { I("l2c_snoop", 0x156, STXT("Bus request sn")) },
+  { I("ld_from_st_fwd", 0xd605,
+    STXT("Load satisified from store forwarded data")) },
+  { I("lsu_st_retire_stall", 0xd60c, STXT("Store retirement pipe stall")) },
+  { I("mmu_d_otb_alloc", 0xd800, STXT("L2D OTB allocate")) },
+  { I("mmu_d_s1_walk_fault", 0xd80b, STXT("D-side Stage1 tablewalk fault")) },
+  { I("mmu_d_s2_walk_fault", 0xd80c, STXT("D-side Stage2 tablewalk fault")) },
+  { I("mmu_d_walk_steps", 0xd80d,
+    STXT("D-side Tablewalk steps or descriptor fetches")) },
+  { I("mmu_i_otb_alloc", 0xd900, STXT("L2I OTB allocate")) },
+  { I("mmu_i_s1_walk_fault", 0xd90b, STXT("I-side Stage1 tablewalk fault")) },
+  { I("mmu_i_s2_walk_fault", 0xd90c, STXT("I-side Stage2 tablewalk fault")) },
+  { I("mmu_i_walk_steps", 0xd90d,
+    STXT("I-side Tablewalk steps or descriptor fetches")) },
+  { I("msc_etm_extout0", 0x141, STXT("ETM extout bit 0")) },
+  { I("msc_etm_extout1", 0x142, STXT("ETM extout bit 1")) },
+  { I("msc_etm_extout2", 0x143, STXT("ETM extout bit 2")) },
+  { I("msc_etm_extout3", 0x144, STXT("ETM extout bit 3")) },
+  { I("ofb_full", 0xd601, STXT("OFB full cycles")) },
+  { I("stall_backend_cache", 0xd20d,
+    STXT("Dispatch stall due to L1 data cache miss")) },
+  { I("stall_backend_resource", 0xd20f,
+    STXT("Dispatch stall due to lack of any core resource")) },
+  { I("stall_backend_tlb", 0xd20e,
+    STXT("Dispatch stall due to L1 data TLB miss")) },
+  { I("stall_frontend_cache", 0xd20b,
+    STXT("Dispatch stall due to L1 instruction cache miss")) },
+  { I("stall_frontend_tlb", 0xd20c,
+    STXT("Dispatch stall due to L1 instruction TLB miss")) },
+  { I("watchpoint_match", 0xd60d,
+    STXT("LSU detected a Watchpoint data match")) },
+/* exception: */
+  { I("exc_dabort", 0x84, STXT("Exception taken, Data Abort and SError")) },
+  { I("exc_fiq", 0x87, STXT("Exception taken, FIQ")) },
+  { I("exc_hvc", 0x8a, STXT("Exception taken, Hypervisor Call")) },
+  { I("exc_irq", 0x86, STXT("Exception taken, IRQ")) },
+  { I("exc_pabort", 0x83, STXT("Exception taken, Instruction Abort")) },
+  { I("exc_return", 0xa,
+    STXT("Instruction architecturally executed, condition check pass, exception"
+      " return. Unit: armv8_pmuv3_0")) },
+  { I("exc_svc", 0x82, STXT("Exception taken, Supervisor Call")) },
+  { I("exc_taken", 0x9, STXT("Exception taken. Unit: armv8_pmuv3_0")) },
+  { I("exc_trap_dabort", 0x8c,
+    STXT("Exception taken, Data Abort or SError not taken locally")) },
+  { I("exc_trap_fiq", 0x8f, STXT("Exception taken, FIQ not taken locally")) },
+  { I("exc_trap_irq", 0x8e, STXT("Exception taken, IRQ not taken locally")) },
+  { I("exc_trap_other", 0x8d,
+    STXT("Exception taken, Other traps not taken locally")) },
+  { I("exc_trap_pabort", 0x8b,
+    STXT("Exception taken, Instruction Abort not taken locally")) },
+  { I("exc_undef", 0x81, STXT("Exception taken, Other synchronous")) },
+/* instruction: */
+  { I("ase_spec", 0x74,
+    STXT("Operation speculatively executed, Advanced SIMD instruction")) },
+  { I("br_immed_retired", 0xd,
+    STXT("Instruction architecturally executed, immediate branch. Unit:"
+      " armv8_pmuv3_0")) },
+  { I("br_mis_pred_retired", 0x22,
+    STXT("Instruction architecturally executed, mispredicted branch. Unit:"
+      " armv8_pmuv3_0")) },
+  { I("br_retired", 0x21,
+    STXT("Instruction architecturally executed, branch. Unit: armv8_pmuv3_0")) },
+  { I("br_return_retired", 0xe,
+    STXT("Instruction architecturally executed, condition code check pass,"
+      " procedure return. Unit: armv8_pmuv3_0")) },
+  { I("cid_write_retired", 0xb,
+    STXT("Instruction architecturally executed, condition code check pass, write"
+      " to CONTEXTIDR. Unit: armv8_pmuv3_0")) },
+  { I("crypto_spec", 0x77,
+    STXT("Operation speculatively executed, Cryptographic instruction")) },
+  { I("dmb_spec", 0x7e, STXT("Barrier speculatively executed, DMB")) },
+  { I("dp_spec", 0x73,
+    STXT("Operation speculatively executed, integer data processing")) },
+  { I("dsb_spec", 0x7d, STXT("Barrier speculatively executed, DSB")) },
+  { I("inst_retired", 0x8,
+    STXT("Instruction architecturally executed. Unit: armv8_pmuv3_0")) },
+  { I("inst_spec", 0x1b,
+    STXT("Operation speculatively executed. Unit: armv8_pmuv3_0")) },
+  { I("isb_spec", 0x7c, STXT("Barrier speculatively executed, ISB")) },
+  { I("ld_spec", 0x70, STXT("Operation speculatively executed, load")) },
+  { I("ldst_spec", 0x72,
+    STXT("Operation speculatively executed, load or store")) },
+  { I("nop_spec", 0x100, STXT("Speculatively executed, NOP")) },
+  { I("op_retired", 0x3a,
+    STXT("Micro-operation architecturally executed. Unit: armv8_pmuv3_0")) },
+  { I("op_spec", 0x3b,
+    STXT("Micro-operation speculatively executed. Unit: armv8_pmuv3_0")) },
+  { I("pc_write_retired", 0xc,
+    STXT("Instruction architecturally executed, condition code check pass,"
+      " software change of the PC. Unit: armv8_pmuv3_0")) },
+  { I("pc_write_spec", 0x76,
+    STXT("Operation speculatively executed, software change of the PC")) },
+  { I("rc_ld_spec", 0x90,
+    STXT("Release consistency operation speculatively executed, Load-Acquire")) },
+  { I("rc_st_spec", 0x91,
+    STXT("Release consistency operation speculatively executed, Store-Release")) },
+  { I("st_retired", 0x7,
+    STXT("Instruction architecturally executed, condition code check pass,"
+      " store. Unit: armv8_pmuv3_0")) },
+  { I("st_spec", 0x71, STXT("Operation speculatively executed, store")) },
+  { I("sw_incr", 0,
+    STXT("Instruction architecturally executed, Condition code check pass,"
+      " software increment")) },
+  { I("ttbr_write_retired", 0x1c,
+    STXT("Instruction architecturally executed, Condition code check pass, write"
+      " to TTBR. Unit: armv8_pmuv3_0")) },
+  { I("vfp_spec", 0x75,
+    STXT("Operation speculatively executed, floating-point instruction")) },
+/* intrinsic: */
+  { I("ldrex_spec", 0x6c,
+    STXT("Exclusive operation speculatively executed, LDREX or LDX")) },
+  { I("strex_fail_spec", 0x6e,
+    STXT("Exclusive operation speculatively executed, STREX or STX fail")) },
+  { I("strex_pass_spec", 0x6d,
+    STXT("Exclusive operation speculatively executed, STREX or STX pass")) },
+  { I("strex_spec", 0x6f,
+    STXT("Exclusive operation speculatively executed, STREX or STX")) },
+/* memory: */
+  { I("ld_align_lat", 0x4021,
+    STXT("Load with additional latency from alignment. Unit: armv8_pmuv3_0")) },
+  { I("ld_retired", 0x6,
+    STXT("Instruction architecturally executed, condition code check pass, load."
+      " Unit: armv8_pmuv3_0")) },
+  { I("ldst_align_lat", 0x4020,
+    STXT("Access with additional latency from alignment. Unit: armv8_pmuv3_0")) },
+  { I("mem_access", 0x13, STXT("Data memory access. Unit: armv8_pmuv3_0")) },
+  { I("mem_access_checked", 0x4024,
+    STXT("Checked data memory access. Unit: armv8_pmuv3_0")) },
+  { I("mem_access_checked_rd", 0x4025,
+    STXT("Checked data memory access, read. Unit: armv8_pmuv3_0")) },
+  { I("mem_access_checked_wr", 0x4026,
+    STXT("Checked data memory access, write. Unit: armv8_pmuv3_0")) },
+  { I("mem_access_rd", 0x66, STXT("Data memory access, read")) },
+  { I("mem_access_wr", 0x67, STXT("Data memory access, write")) },
+  { I("memory_error", 0x1a, STXT("Local memory error. Unit: armv8_pmuv3_0")) },
+  { I("st_align_lat", 0x4022,
+    STXT("Store with additional latency from alignment. Unit: armv8_pmuv3_0")) },
+  { I("unaligned_ld_spec", 0x68, STXT("Unaligned access, read")) },
+  { I("unaligned_ldst_spec", 0x6a, STXT("Unaligned access")) },
+  { I("unaligned_st_spec", 0x69, STXT("Unaligned access, write")) },
+/* pipeline: */
+  { I("stall", 0x3c,
+    STXT("Impacted by errata, use metrics instead - Spec update: Errata"
+      " AC03_CPU_29. Unit: armv8_pmuv3_0")) },
+  { I("stall_backend", 0x24,
+    STXT("No operation issued due to the backend. Unit: armv8_pmuv3_0")) },
+  { I("stall_backend_mem", 0x4005,
+    STXT("Memory stall cycles. Unit: armv8_pmuv3_0")) },
+  { I("stall_frontend", 0x23,
+    STXT("Impacted by errata, use metrics instead - Spec update: Errata"
+      " AC03_CPU_29. Unit: armv8_pmuv3_0")) },
+  { I("stall_slot", 0x3f, STXT("No operation sent for execution on a slot")) },
+  { I("stall_slot_backend", 0x3d,
+    STXT("No operation sent for execution on a slot due to the backend. Unit:"
+      " armv8_pmuv3_0")) },
+  { I("stall_slot_frontend", 0x3e,
+    STXT("Impacted by errata, use metrics instead - Spec update: Errata"
+      " AC03_CPU_29. Unit: armv8_pmuv3_0")) },
+/* spe: */
+  { I("sample_collision", 0x4003,
+    STXT("Sample collided with previous sample. Unit: armv8_pmuv3_0")) },
+  { I("sample_feed", 0x4001, STXT("Sample Taken. Unit: armv8_pmuv3_0")) },
+  { I("sample_filtrate", 0x4002,
+    STXT("Sample Taken and not removed by filtering. Unit: armv8_pmuv3_0")) },
+  { I("sample_pop", 0x4000, STXT("Sample Population. Unit: armv8_pmuv3_0")) },
+  { NULL, NULL, 0, NULL }
+};
+
+#undef I
+#endif
diff --git a/gprofng/src/hwc_arm_neoverse_n1.h b/gprofng/src/hwc_arm_neoverse_n1.h
new file mode 100644
index 0000000..08378b8
--- /dev/null
+++ b/gprofng/src/hwc_arm_neoverse_n1.h
@@ -0,0 +1,220 @@
+/* Copyright (C) 2024 Free Software Foundation, Inc.
+   Contributed by Oracle.
+
+   This file is part of GNU Binutils.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3, or (at your option)
+   any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, 51 Franklin Street - Fifth Floor, Boston,
+   MA 02110-1301, USA.  */
+
+#ifndef _HWC_ARM_NEOVERSEN1_H_
+#define _HWC_ARM_NEOVERSEN1_H_
+
+#define I(nm, event, mtr) INIT_HWC(nm, mtr, (event), PERF_TYPE_RAW)
+
+static Hwcentry arm_neoverse_n1_list[] = {
+  HWC_GENERIC
+/* bus: */
+  { I("bus_access", 0x19,
+    STXT("Attributable Bus access. Unit: armv8_pmuv3_0")) },
+  { I("bus_access_rd", 0x60, STXT("Bus access read")) },
+  { I("bus_access_wr", 0x61, STXT("Bus access write")) },
+  { I("bus_cycles", 0x1d, STXT("Bus cycle. Unit: armv8_pmuv3_0")) },
+/* exception: */
+  { I("exc_dabort", 0x84, STXT("Exception taken, Data Abort and SError")) },
+  { I("exc_fiq", 0x87, STXT("Exception taken, FIQ")) },
+  { I("exc_hvc", 0x8a, STXT("Exception taken, Hypervisor Call")) },
+  { I("exc_irq", 0x86, STXT("Exception taken, IRQ")) },
+  { I("exc_pabort", 0x83, STXT("Exception taken, Instruction Abort")) },
+  { I("exc_return", 0xa,
+    STXT("Instruction architecturally executed, condition check pass, exception"
+      " return. Unit: armv8_pmuv3_0")) },
+  { I("exc_smc", 0x88, STXT("Exception taken, Secure Monitor Call")) },
+  { I("exc_svc", 0x82, STXT("Exception taken, Supervisor Call")) },
+  { I("exc_taken", 0x9, STXT("Exception taken. Unit: armv8_pmuv3_0")) },
+  { I("exc_trap_dabort", 0x8c,
+    STXT("Exception taken, Data Abort or SError not taken locally")) },
+  { I("exc_trap_fiq", 0x8f, STXT("Exception taken, FIQ not taken locally")) },
+  { I("exc_trap_irq", 0x8e, STXT("Exception taken, IRQ not taken locally")) },
+  { I("exc_trap_other", 0x8d,
+    STXT("Exception taken, Other traps not taken locally")) },
+  { I("exc_trap_pabort", 0x8b,
+    STXT("Exception taken, Instruction Abort not taken locally")) },
+  { I("exc_undef", 0x81, STXT("Exception taken, Other synchronous")) },
+/* general: */
+  { I("cpu_cycles", 0x11, STXT("Cycle. Unit: armv8_pmuv3_0")) },
+/* l1d_cache: */
+  { I("l1d_cache", 0x4,
+    STXT("Level 1 data cache access. Unit: armv8_pmuv3_0")) },
+  { I("l1d_cache_inval", 0x48, STXT("L1D cache invalidate")) },
+  { I("l1d_cache_rd", 0x40, STXT("L1D cache access, read")) },
+  { I("l1d_cache_refill", 0x3,
+    STXT("Level 1 data cache refill. Unit: armv8_pmuv3_0")) },
+  { I("l1d_cache_refill_inner", 0x44, STXT("L1D cache refill, inner")) },
+  { I("l1d_cache_refill_outer", 0x45, STXT("L1D cache refill, outer")) },
+  { I("l1d_cache_refill_rd", 0x42, STXT("L1D cache refill, read")) },
+  { I("l1d_cache_refill_wr", 0x43, STXT("L1D cache refill, write")) },
+  { I("l1d_cache_wb", 0x15,
+    STXT("Attributable Level 1 data cache write-back. Unit: armv8_pmuv3_0")) },
+  { I("l1d_cache_wb_clean", 0x47,
+    STXT("L1D cache Write-Back, cleaning and coherency")) },
+  { I("l1d_cache_wb_victim", 0x46, STXT("L1D cache Write-Back, victim")) },
+  { I("l1d_cache_wr", 0x41, STXT("L1D cache access, write")) },
+/* l1i_cache: */
+  { I("l1i_cache", 0x14,
+    STXT("Attributable Level 1 instruction cache access. Unit: armv8_pmuv3_0")) },
+  { I("l1i_cache_refill", 0x1,
+    STXT("Level 1 instruction cache refill. Unit: armv8_pmuv3_0")) },
+/* l2_cache: */
+  { I("l2d_cache", 0x16,
+    STXT("Level 2 data cache access. Unit: armv8_pmuv3_0")) },
+  { I("l2d_cache_allocate", 0x20,
+    STXT("Attributable Level 2 data cache allocation without refill. Unit:"
+      " armv8_pmuv3_0")) },
+  { I("l2d_cache_inval", 0x58, STXT("L2D cache invalidate")) },
+  { I("l2d_cache_rd", 0x50, STXT("L2D cache access, read")) },
+  { I("l2d_cache_refill", 0x17,
+    STXT("Level 2 data refill. Unit: armv8_pmuv3_0")) },
+  { I("l2d_cache_refill_rd", 0x52, STXT("L2D cache refill, read")) },
+  { I("l2d_cache_refill_wr", 0x53, STXT("L2D cache refill, write")) },
+  { I("l2d_cache_wb", 0x18,
+    STXT("Attributable Level 2 data cache write-back. Unit: armv8_pmuv3_0")) },
+  { I("l2d_cache_wb_clean", 0x57,
+    STXT("L2D cache Write-Back, cleaning and coherency")) },
+  { I("l2d_cache_wb_victim", 0x56, STXT("L2D cache Write-Back, victim")) },
+  { I("l2d_cache_wr", 0x51, STXT("L2D cache access, write")) },
+/* l3_cache: */
+  { I("l3d_cache", 0x2b,
+    STXT("Attributable Level 3 data cache access. Unit: armv8_pmuv3_0")) },
+  { I("l3d_cache_allocate", 0x29,
+    STXT("Attributable Level 3 data cache allocation without refill. Unit:"
+      " armv8_pmuv3_0")) },
+  { I("l3d_cache_rd", 0xa0,
+    STXT("Attributable Level 3 data or unified cache access, read")) },
+  { I("l3d_cache_refill", 0x2a,
+    STXT("Attributable Level 3 data cache refill. Unit: armv8_pmuv3_0")) },
+/* ll_cache: */
+  { I("ll_cache_miss_rd", 0x37, STXT("Last level cache miss, read")) },
+  { I("ll_cache_rd", 0x36,
+    STXT("Attributable Last level cache memory read")) },
+/* memory: */
+  { I("mem_access", 0x13, STXT("Data memory access. Unit: armv8_pmuv3_0")) },
+  { I("mem_access_rd", 0x66, STXT("Data memory access, read")) },
+  { I("mem_access_wr", 0x67, STXT("Data memory access, write")) },
+  { I("memory_error", 0x1a, STXT("Local memory error. Unit: armv8_pmuv3_0")) },
+  { I("remote_access", 0x31,
+    STXT("Access to another socket in a multi-socket system")) },
+/* retired: */
+  { I("br_mis_pred_retired", 0x22,
+    STXT("Instruction architecturally executed, mispredicted branch. Unit:"
+      " armv8_pmuv3_0")) },
+  { I("br_retired", 0x21,
+    STXT("Instruction architecturally executed, branch. Unit: armv8_pmuv3_0")) },
+  { I("cid_write_retired", 0xb,
+    STXT("Instruction architecturally executed, condition code check pass, write"
+      " to CONTEXTIDR. Unit: armv8_pmuv3_0")) },
+  { I("inst_retired", 0x8,
+    STXT("Instruction architecturally executed. Unit: armv8_pmuv3_0")) },
+  { I("sw_incr", 0,
+    STXT("Instruction architecturally executed, Condition code check pass,"
+      " software increment. Unit: armv8_pmuv3_0")) },
+  { I("ttbr_write_retired", 0x1c,
+    STXT("Instruction architecturally executed, Condition code check pass, write"
+      " to TTBR. Unit: armv8_pmuv3_0")) },
+/* spe: */
+  { I("sample_collision", 0x4003,
+    STXT("Sample collided with previous sample. Unit: armv8_pmuv3_0")) },
+  { I("sample_feed", 0x4001, STXT("Sample Taken. Unit: armv8_pmuv3_0")) },
+  { I("sample_filtrate", 0x4002,
+    STXT("Sample Taken and not removed by filtering. Unit: armv8_pmuv3_0")) },
+  { I("sample_pop", 0x4000, STXT("Sample Population. Unit: armv8_pmuv3_0")) },
+/* spec_operation: */
+  { I("ase_spec", 0x74,
+    STXT("Operation speculatively executed, Advanced SIMD instruction")) },
+  { I("br_immed_spec", 0x78,
+    STXT("Branch speculatively executed, immediate branch")) },
+  { I("br_indirect_spec", 0x7a,
+    STXT("Branch speculatively executed, indirect branch")) },
+  { I("br_mis_pred", 0x10,
+    STXT("Mispredicted or not predicted branch speculatively executed. Unit:"
+      " armv8_pmuv3_0")) },
+  { I("br_pred", 0x12,
+    STXT("Predictable branch speculatively executed. Unit: armv8_pmuv3_0")) },
+  { I("br_return_spec", 0x79,
+    STXT("Branch speculatively executed, procedure return")) },
+  { I("crypto_spec", 0x77,
+    STXT("Operation speculatively executed, Cryptographic instruction")) },
+  { I("dmb_spec", 0x7e, STXT("Barrier speculatively executed, DMB")) },
+  { I("dp_spec", 0x73,
+    STXT("Operation speculatively executed, integer data processing")) },
+  { I("dsb_spec", 0x7d, STXT("Barrier speculatively executed, DSB")) },
+  { I("inst_spec", 0x1b,
+    STXT("Operation speculatively executed. Unit: armv8_pmuv3_0")) },
+  { I("isb_spec", 0x7c, STXT("Barrier speculatively executed, ISB")) },
+  { I("ld_spec", 0x70, STXT("Operation speculatively executed, load")) },
+  { I("ldrex_spec", 0x6c,
+    STXT("Exclusive operation speculatively executed, LDREX or LDX")) },
+  { I("pc_write_spec", 0x76,
+    STXT("Operation speculatively executed, software change of the PC")) },
+  { I("rc_ld_spec", 0x90,
+    STXT("Release consistency operation speculatively executed, Load-Acquire")) },
+  { I("rc_st_spec", 0x91,
+    STXT("Release consistency operation speculatively executed, Store-Release")) },
+  { I("st_spec", 0x71, STXT("Operation speculatively executed, store")) },
+  { I("strex_fail_spec", 0x6e,
+    STXT("Exclusive operation speculatively executed, STREX or STX fail")) },
+  { I("strex_pass_spec", 0x6d,
+    STXT("Exclusive operation speculatively executed, STREX or STX pass")) },
+  { I("strex_spec", 0x6f,
+    STXT("Exclusive operation speculatively executed, STREX or STX")) },
+  { I("unaligned_ld_spec", 0x68, STXT("Unaligned access, read")) },
+  { I("unaligned_ldst_spec", 0x6a, STXT("Unaligned access")) },
+  { I("unaligned_st_spec", 0x69, STXT("Unaligned access, write")) },
+  { I("vfp_spec", 0x75,
+    STXT("Operation speculatively executed, floating-point instruction")) },
+/* stall: */
+  { I("stall_backend", 0x24,
+    STXT("No operation issued due to the backend. Unit: armv8_pmuv3_0")) },
+  { I("stall_frontend", 0x23,
+    STXT("No operation issued because of the frontend. Unit: armv8_pmuv3_0")) },
+/* tlb: */
+  { I("dtlb_walk", 0x34,
+    STXT("Access to data TLB causes a translation table walk")) },
+  { I("itlb_walk", 0x35,
+    STXT("Access to instruction TLB that causes a translation table walk")) },
+  { I("l1d_tlb", 0x25,
+    STXT("Attributable Level 1 data or unified TLB access. Unit: armv8_pmuv3_0")) },
+  { I("l1d_tlb_rd", 0x4e, STXT("L1D tlb access, read")) },
+  { I("l1d_tlb_refill", 0x5,
+    STXT("Attributable Level 1 data TLB refill. Unit: armv8_pmuv3_0")) },
+  { I("l1d_tlb_refill_rd", 0x4c, STXT("L1D tlb refill, read")) },
+  { I("l1d_tlb_refill_wr", 0x4d, STXT("L1D tlb refill, write")) },
+  { I("l1d_tlb_wr", 0x4f, STXT("L1D tlb access, write")) },
+  { I("l1i_tlb", 0x26,
+    STXT("Attributable Level 1 instruction TLB access. Unit: armv8_pmuv3_0")) },
+  { I("l1i_tlb_refill", 0x2,
+    STXT("Attributable Level 1 instruction TLB refill. Unit: armv8_pmuv3_0")) },
+  { I("l2d_tlb", 0x2f,
+    STXT("Attributable Level 2 data or unified TLB access. Unit: armv8_pmuv3_0")) },
+  { I("l2d_tlb_rd", 0x5e, STXT("L2D cache access, read")) },
+  { I("l2d_tlb_refill", 0x2d,
+    STXT("Attributable Level 2 data TLB refill. Unit: armv8_pmuv3_0")) },
+  { I("l2d_tlb_refill_rd", 0x5c, STXT("L2D cache refill, read")) },
+  { I("l2d_tlb_refill_wr", 0x5d, STXT("L2D cache refill, write")) },
+  { I("l2d_tlb_wr", 0x5f, STXT("L2D cache access, write")) },
+  { NULL, NULL, 0, NULL }
+};
+
+#undef I
+#endif
diff --git a/gprofng/src/hwc_intel_icelake.h b/gprofng/src/hwc_intel_icelake.h
index 46f4ac5..4fe2e26 100644
--- a/gprofng/src/hwc_intel_icelake.h
+++ b/gprofng/src/hwc_intel_icelake.h
@@ -24,8 +24,10 @@
 #define SH(val, n) (((unsigned long long) (val)) << n)
 #define I(nm, event, umask, edge, cmask, inv, \
 	  offcore_rsp, ldlat, frontend, period, mtr) \
-	  INIT_HWC(nm, mtr, SH(event, 0) | SH(umask, 8) | SH(edge, 18) \
-		     | SH(cmask, 24) | SH(inv, 23), PERF_TYPE_RAW), \
+	  .use_perf_event_type = 1, .type = PERF_TYPE_RAW, \
+	  .name = (nm), .metric = (mtr), .reg_num = REGNO_ANY, \
+	  .config = SH(event, 0) | SH(umask, 8) | SH(edge, 18) | SH(cmask, 24) \
+		  | SH(inv, 23), \
 	  .config1 = SH(offcore_rsp, 0) | SH(ldlat, 0) | SH(frontend, 0), \
 	  .val = period
 
diff --git a/gprofng/src/util.cc b/gprofng/src/util.cc
index 201f708..228140b 100644
--- a/gprofng/src/util.cc
+++ b/gprofng/src/util.cc
@@ -741,17 +741,13 @@ get_relative_link (const char *path_from, const char *path_to)
   s2 = canonical_path (s2);
   long l = dbe_sstrlen (s1);
   // try to find common directories
-  int common_slashes = 0;
   int last_common_slash = -1;
   for (int i = 0; i < l; i++)
     {
-      if (s1[i] != s2[i]) break;
-      if (s1[i] == 0) break;
+      if (s1[i] != s2[i] || s1[i] == 0)
+	break;
       if (s1[i] == '/')
-	{
-	  common_slashes++;
-	  last_common_slash = i;
-	}
+	last_common_slash = i;
     }
   // find slashes in remaining path_to
   int slashes = 0;
diff --git a/gprofng/testsuite/config/default.exp b/gprofng/testsuite/config/default.exp
index 74d1dad..3681c80 100644
--- a/gprofng/testsuite/config/default.exp
+++ b/gprofng/testsuite/config/default.exp
@@ -53,7 +53,7 @@ if { "$CHECK_TARGET" == "check-install" } {
         append ld_library_path ":${BUILDDIR}/../libiberty"
     }
 
-    set f [open "gprofng_wraper" w+]
+    set f [open "gprofng_wrapper" w+]
     puts $f "#!$BASH"
     puts $f "LD_LIBRARY_PATH=$ld_library_path:$orig_ld_library_path"
     puts $f "GPROFNG_SYSCONFDIR=$env(srcroot)/src"
@@ -61,8 +61,8 @@ if { "$CHECK_TARGET" == "check-install" } {
     puts $f "export LD_LIBRARY_PATH GPROFNG_SYSCONFDIR GPROFNG_PRELOAD_LIBDIRS"
     puts $f "${BUILDDIR}/src/gprofng \"\$@\""
     close $f
-    file attributes gprofng_wraper -permissions +rx
-    set ::env(GPROFNG) "$BUILDDIR/gprofng_wraper"
+    file attributes gprofng_wrapper -permissions +rx
+    set ::env(GPROFNG) "$BUILDDIR/gprofng_wrapper"
 }
 puts "### GPROFNG: $env(GPROFNG)"
 
diff --git a/gprofng/testsuite/lib/Makefile.skel b/gprofng/testsuite/lib/Makefile.skel
index 8ea994d..2c98720 100644
--- a/gprofng/testsuite/lib/Makefile.skel
+++ b/gprofng/testsuite/lib/Makefile.skel
@@ -23,7 +23,7 @@ CFLAGS      = -g -Wall
 SHAREDOPT	= -fpic	-shared
 
 #JAVABIN = /usr/java/latest/bin
-JAVABIN = $(shell dirname `which java`)
+JAVABIN = $(shell dirname `command -v java`)
 JAVA    = $(JAVABIN)/java
 JAVAC   = $(JAVABIN)/javac
 
diff --git a/include/coff/i386.h b/include/coff/i386.h
index 982c152..a576d2a 100644
--- a/include/coff/i386.h
+++ b/include/coff/i386.h
@@ -17,11 +17,7 @@
    Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
    MA 02110-1301, USA.  */
 
-#define L_LNNO_SIZE 2
-#define INCLUDE_COMDAT_FIELDS_IN_AUXENT
-#include "coff/external.h"
-
-#define COFF_PAGE_SIZE	0x1000
+#include "coff/x86.h"
 
 /* Bits for f_flags:
  	F_RELFLG	Relocation info stripped from file
@@ -43,15 +39,6 @@
 
 #define LYNXCOFFMAGIC	0415
 
-/* .NET DLLs XOR the Machine number (above) with an override to
-    indicate that the DLL contains OS-specific machine code rather
-    than just IL or bytecode. See
-    https://github.com/dotnet/coreclr/blob/6f7aa7967c607b8c667518314ab937c0d7547025/src/inc/pedecoder.h#L94-L107. */
-#define IMAGE_FILE_MACHINE_NATIVE_APPLE_OVERRIDE   0x4644
-#define IMAGE_FILE_MACHINE_NATIVE_FREEBSD_OVERRIDE 0xadc4
-#define IMAGE_FILE_MACHINE_NATIVE_LINUX_OVERRIDE   0x7b79
-#define IMAGE_FILE_MACHINE_NATIVE_NETBSD_OVERRIDE  0x1993
-
 /* Used in some .NET DLLs that target a specific OS.  */
 #define I386_APPLE_MAGIC   (I386MAGIC ^ IMAGE_FILE_MACHINE_NATIVE_APPLE_OVERRIDE)
 #define I386_FREEBSD_MAGIC (I386MAGIC ^ IMAGE_FILE_MACHINE_NATIVE_FREEBSD_OVERRIDE)
@@ -72,25 +59,6 @@
 #define STMAGIC		0401	/* Target shlib.  */
 #define SHMAGIC		0443	/* Host shlib.  */
 
-/* Define some NT default values.  */
-/*  #define NT_IMAGE_BASE        0x400000 moved to internal.h */
-#define NT_SECTION_ALIGNMENT 0x1000
-#define NT_FILE_ALIGNMENT    0x200
-#define NT_DEF_RESERVE       0x100000
-#define NT_DEF_COMMIT        0x1000
-
-/* Relocation directives.  */
-
-struct external_reloc
-{
-  char r_vaddr[4];
-  char r_symndx[4];
-  char r_type[2];
-};
-
-#define RELOC struct external_reloc
-#define RELSZ 10
-
 /* i386 Relocations.  */
 
 #define R_DIR32		 6
diff --git a/include/coff/pe.h b/include/coff/pe.h
index 37446e4..9d79090 100644
--- a/include/coff/pe.h
+++ b/include/coff/pe.h
@@ -338,6 +338,7 @@ typedef struct
 #define IMPORT_NAME		1
 #define IMPORT_NAME_NOPREFIX	2
 #define IMPORT_NAME_UNDECORATE	3
+#define IMPORT_NAME_EXPORTAS	4
 
 /* Weak external characteristics.  */
 #define IMAGE_WEAK_EXTERN_SEARCH_NOLIBRARY	1
diff --git a/include/coff/x86.h b/include/coff/x86.h
new file mode 100644
index 0000000..b62b176
--- /dev/null
+++ b/include/coff/x86.h
@@ -0,0 +1,59 @@
+/* COFF information shared by Intel 386/486 and AMD 64 (aka x86-64).
+   Copyright (C) 2001-2024 Free Software Foundation, Inc.
+
+   This file is part of BFD, the Binary File Descriptor library.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
+   MA 02110-1301, USA.  */
+
+#ifndef COFF_X86_H
+#define COFF_X86_H
+
+#define L_LNNO_SIZE 2
+#define INCLUDE_COMDAT_FIELDS_IN_AUXENT
+
+#include "coff/external.h"
+
+#define COFF_PAGE_SIZE	0x1000
+
+/* .NET DLLs XOR the Machine number (above) with an override to
+    indicate that the DLL contains OS-specific machine code rather
+    than just IL or bytecode. See
+    https://github.com/dotnet/coreclr/blob/6f7aa7967c607b8c667518314ab937c0d7547025/src/inc/pedecoder.h#L94-L107. */
+#define IMAGE_FILE_MACHINE_NATIVE_APPLE_OVERRIDE   0x4644
+#define IMAGE_FILE_MACHINE_NATIVE_FREEBSD_OVERRIDE 0xadc4
+#define IMAGE_FILE_MACHINE_NATIVE_LINUX_OVERRIDE   0x7b79
+#define IMAGE_FILE_MACHINE_NATIVE_NETBSD_OVERRIDE  0x1993
+
+/* Define some NT default values.  */
+/*  #define NT_IMAGE_BASE        0x400000 moved to internal.h.  */
+#define NT_SECTION_ALIGNMENT 0x1000
+#define NT_FILE_ALIGNMENT    0x200
+#define NT_DEF_RESERVE       0x100000
+#define NT_DEF_COMMIT        0x1000
+
+/* Relocation directives.  */
+
+struct external_reloc
+{
+  char r_vaddr[4];
+  char r_symndx[4];
+  char r_type[2];
+};
+
+#define RELOC struct external_reloc
+#define RELSZ 10
+
+#endif /* COFF_X86_H */
diff --git a/include/coff/x86_64.h b/include/coff/x86_64.h
index 72f3417..76b914f 100644
--- a/include/coff/x86_64.h
+++ b/include/coff/x86_64.h
@@ -23,24 +23,10 @@
 #ifndef COFF_X86_64_H
 #define COFF_X86_64_H
 
-#define L_LNNO_SIZE 2
-#define INCLUDE_COMDAT_FIELDS_IN_AUXENT
-
-#include "coff/external.h"
-
-#define COFF_PAGE_SIZE	0x1000
+#include "coff/x86.h"
 
 #define AMD64MAGIC	0x8664
 
-/* .NET DLLs XOR the Machine number (above) with an override to
-    indicate that the DLL contains OS-specific machine code rather
-    than just IL or bytecode. See
-    https://github.com/dotnet/coreclr/blob/6f7aa7967c607b8c667518314ab937c0d7547025/src/inc/pedecoder.h#L94-L107. */
-#define IMAGE_FILE_MACHINE_NATIVE_APPLE_OVERRIDE   0x4644
-#define IMAGE_FILE_MACHINE_NATIVE_FREEBSD_OVERRIDE 0xadc4
-#define IMAGE_FILE_MACHINE_NATIVE_LINUX_OVERRIDE   0x7b79
-#define IMAGE_FILE_MACHINE_NATIVE_NETBSD_OVERRIDE  0x1993
-
 /* Used in some .NET DLLs that target a specific OS.  */
 #define AMD64_APPLE_MAGIC   (AMD64MAGIC ^ IMAGE_FILE_MACHINE_NATIVE_APPLE_OVERRIDE)
 #define AMD64_FREEBSD_MAGIC (AMD64MAGIC ^ IMAGE_FILE_MACHINE_NATIVE_FREEBSD_OVERRIDE)
@@ -60,25 +46,6 @@
 #define STMAGIC		0401	/* Target shlib.  */
 #define SHMAGIC		0443	/* Host   shlib.  */
 
-/* Define some NT default values.  */
-/*  #define NT_IMAGE_BASE        0x400000 moved to internal.h.  */
-#define NT_SECTION_ALIGNMENT 0x1000
-#define NT_FILE_ALIGNMENT    0x200
-#define NT_DEF_RESERVE       0x100000
-#define NT_DEF_COMMIT        0x1000
-
-/* Relocation directives.  */
-
-struct external_reloc
-{
-  char r_vaddr[4];
-  char r_symndx[4];
-  char r_type[2];
-};
-
-#define RELOC struct external_reloc
-#define RELSZ 10
-
 /* X86-64 relocations.  */
 #define R_AMD64_ABS 		 0 /* Reference is absolute, no relocation is necessary.  */
 #define R_AMD64_DIR64		 1 /* 64-bit address (VA).  */
diff --git a/include/opcode/loongarch.h b/include/opcode/loongarch.h
index 965a164..5425eaf 100644
--- a/include/opcode/loongarch.h
+++ b/include/opcode/loongarch.h
@@ -31,22 +31,82 @@ extern "C"
   #define LARCH_NOP 0x03400000
   #define LARCH_B 0x50000000
   /* BCEQZ/BCNEZ.  */
-  #define LARCH_FLOAT_BRANCH 0x48000000
-  #define LARCH_BRANCH_OPCODE_MASK 0xfc000000
   #define LARCH_BRANCH_INVERT_BIT 0x04000000
   #define LARCH_FLOAT_BRANCH_INVERT_BIT 0x00000100
 
+  #define LARCH_MK_ADDI_D 0xffc00000
+  #define LARCH_OP_ADDI_D 0x02c00000
+  #define LARCH_MK_PCADDI 0xfe000000
+  #define LARCH_OP_PCADDI 0x18000000
+  #define LARCH_MK_B 0xfc000000
+  #define LARCH_OP_B 0x50000000
+  #define LARCH_MK_BL 0xfc000000
+  #define LARCH_OP_BL 0x54000000
+  #define LARCH_MK_ORI 0xffc00000
+  #define LARCH_OP_ORI 0x03800000
+  #define LARCH_MK_LU12I_W 0xfe000000
+  #define LARCH_OP_LU12I_W 0x14000000
+  #define LARCH_MK_LD_D 0xffc00000
+  #define LARCH_OP_LD_D 0x28c00000
+  #define LARCH_MK_JIRL 0xfc000000
+  #define LARCH_OP_JIRL 0x4c000000
+  #define LARCH_MK_BCEQZ 0xfc000300
+  #define LARCH_OP_BCEQZ 0x48000000
+  #define LARCH_MK_BCNEZ 0xfc000300
+  #define LARCH_OP_BCNEZ 0x48000100
+  #define LARCH_MK_ATOMIC_MEM 0xffff8000
+  #define LARCH_MK_BSTRINS_W 0xffe08000
+  #define LARCH_OP_BSTRINS_W 0x00600000
+  #define LARCH_MK_BSTRPICK_W 0xffe08000
+  #define LARCH_OP_BSTRPICK_W 0x00608000
+  #define LARCH_MK_BSTRINS_D 0xffc00000
+  #define LARCH_OP_BSTRINS_D 0x00800000
+  #define LARCH_MK_BSTRPICK_D 0xffc00000
+  #define LARCH_OP_BSTRPICK_D 0x00c00000
+  #define LARCH_MK_CSRRD 0xff0003e0
+  #define LARCH_OP_CSRRD 0x04000000
+  #define LARCH_MK_CSRWR 0xff0003e0
+  #define LARCH_OP_CSRWR 0x04000020
+  #define LARCH_MK_CSRXCHG 0xff000000
+  #define LARCH_OP_CSRXCHG 0x04000000
+  #define LARCH_MK_GCSRXCHG 0xff000000
+  #define LARCH_OP_GCSRXCHG 0x05000000
+
+  #define LARCH_INSN_OPS(insn, op) ((insn & LARCH_MK_##op) == LARCH_OP_##op)
+  #define LARCH_INSN_ADDI_D(insn) LARCH_INSN_OPS((insn), ADDI_D)
+  #define LARCH_INSN_PCADDI(insn) LARCH_INSN_OPS((insn), PCADDI)
+  #define LARCH_INSN_B(insn) LARCH_INSN_OPS((insn), B)
+  #define LARCH_INSN_BL(insn) LARCH_INSN_OPS((insn), BL)
+  #define LARCH_INSN_ORI(insn) LARCH_INSN_OPS((insn), ORI)
+  #define LARCH_INSN_LU12I_W(insn) LARCH_INSN_OPS((insn), LU12I_W)
+  #define LARCH_INSN_LD_D(insn) LARCH_INSN_OPS((insn), LD_D)
+  #define LARCH_INSN_JIRL(insn) LARCH_INSN_OPS((insn), JIRL)
+  #define LARCH_INSN_BCEQZ(insn) LARCH_INSN_OPS((insn), BCEQZ)
+  #define LARCH_INSN_BCNEZ(insn) LARCH_INSN_OPS((insn), BCNEZ)
+  #define LARCH_INSN_FLOAT_BRANCH(insn) (LARCH_INSN_BCEQZ(insn) || LARCH_INSN_BCNEZ(insn))
+  #define LARCH_INSN_BSTRINS_W(insn) LARCH_INSN_OPS((insn), BSTRINS_W)
+  #define LARCH_INSN_BSTRPICK_W(insn) LARCH_INSN_OPS((insn), BSTRPICK_W)
+  #define LARCH_INSN_BSTRINS_D(insn) LARCH_INSN_OPS((insn), BSTRINS_D)
+  #define LARCH_INSN_BSTRPICK_D(insn) LARCH_INSN_OPS((insn), BSTRPICK_D)
+  #define LARCH_INSN_CSRXCHG(insn) LARCH_INSN_OPS((insn), CSRXCHG)
+  #define LARCH_INSN_GCSRXCHG(insn) LARCH_INSN_OPS((insn), GCSRXCHG)
+
+  #define LARCH_INSN_ATOMIC_MEM(insn)			\
+	((insn & 0xfff80000) == 0x38580000	\
+	 || (insn & 0xfff00000) == 0x38600000	\
+	 || (insn & 0xffff0000) == 0x38700000	\
+	 || (insn & 0xffff0000) == 0x38710000)
+
   #define ENCODE_BRANCH16_IMM(x) (((x) >> 2) << 10)
 
   #define OUT_OF_RANGE(value, bits, align)	\
     ((value) < (-(1 << ((bits) - 1) << align)) 	\
       || (value) > ((((1 << ((bits) - 1)) - 1) << align)))
 
-  #define LARCH_LU12I_W 0x14000000
-  #define LARCH_ORI 0x03800000
-  #define LARCH_LD_D 0x28c00000
   #define LARCH_RD_A0 0x04
   #define LARCH_RD_RJ_A0 0x084
+  #define LARCH_GET_RD(insn) (insn & 0x1f)
+  #define LARCH_GET_RJ(insn) ((insn >> 5) & 0x1f)
 
   typedef uint32_t insn_t;
 
diff --git a/include/opcode/mips.h b/include/opcode/mips.h
index 5e16fe2..4a5d363 100644
--- a/include/opcode/mips.h
+++ b/include/opcode/mips.h
@@ -516,237 +516,241 @@ mips_opcode_32bit_p (const struct mips_opcode *mo)
   return mo->mask >> 16 != 0;
 }
 
-/* These are the characters which may appear in the args field of an
-   instruction.  They appear in the order in which the fields appear
-   when the instruction is used.  Commas and parentheses in the args
-   string are ignored when assembling, and written into the output
+/* These are the characters which may appear in the args field of a
+   regular MIPS instruction.  They appear in the order in which the fields
+   appear when the instruction is used.  Commas and parentheses in the
+   args string are ignored when assembling, and written into the output
    when disassembling.
 
-   Each of these characters corresponds to a mask field defined above.
-
-   "1" 5 bit sync type (OP_*_STYPE)
-   "<" 5 bit shift amount (OP_*_SHAMT)
-   ">" shift amount between 32 and 63, stored after subtracting 32 (OP_*_SHAMT)
-   "a" 26 bit target address (OP_*_TARGET)
-   "+i" likewise, but flips bit 0
-   "b" 5 bit base register (OP_*_RS)
-   "c" 10 bit breakpoint code (OP_*_CODE)
-   "d" 5 bit destination register specifier (OP_*_RD)
-   "h" 5 bit prefx hint (OP_*_PREFX)
-   "i" 16 bit unsigned immediate (OP_*_IMMEDIATE)
-   "j" 16 bit signed immediate (OP_*_DELTA)
-   "k" 5 bit cache opcode in target register position (OP_*_CACHE)
-   "o" 16 bit signed offset (OP_*_DELTA)
-   "p" 16 bit PC relative branch target address (OP_*_DELTA)
-   "q" 10 bit extra breakpoint code (OP_*_CODE2)
-   "r" 5 bit same register used as both source and target (OP_*_RS)
-   "s" 5 bit source register specifier (OP_*_RS)
-   "t" 5 bit target register (OP_*_RT)
-   "u" 16 bit upper 16 bits of address (OP_*_IMMEDIATE)
-   "v" 5 bit same register used as both source and destination (OP_*_RS)
-   "w" 5 bit same register used as both target and destination (OP_*_RT)
-   "U" 5 bit same destination register in both OP_*_RD and OP_*_RT
-       (used by clo and clz)
-   "C" 25 bit coprocessor function code (OP_*_COPZ)
-   "B" 20 bit syscall/breakpoint function code (OP_*_CODE20)
-   "J" 19 bit wait function code (OP_*_CODE19)
-   "x" accept and ignore register name
-   "z" must be zero register
-   "K" 5 bit Hardware Register (rdhwr instruction) (OP_*_RD)
-   "+A" 5 bit ins/ext/dins/dext/dinsm/dextm position, which becomes
-        LSB (OP_*_SHAMT; OP_*_EXTLSB or OP_*_STYPE may be used for
-        microMIPS compatibility).
+   "1" 5-bit SYNC type at bit 6.
+   "<" 5-bit shift amount at bit 6 (SHAMT).
+   ">" Shift amount between 32 and 63, stored after subtracting 32, at bit 6
+       (SHAMT).
+   "a" 26-bit target address at bit 0 (TARGET).
+   "+i" Likewise, but flips bit 0.
+   "b" 5-bit base register at bit 21 (RS).
+   "c" 10-bit breakpoint code at bit 16.
+   "d" 5-bit destination register at bit 11 (RD).
+   "h" 5-bit PREFX hint at bit 11.
+   "i" 16-bit unsigned immediate at bit 0 (IMMEDIATE).
+   "j" 16-bit signed immediate at bit 0 (DELTA).
+   "k" 5-bit CACHE opcode in target register position at bit 16.
+   "o" 16-bit signed offset at bit 0 (DELTA).
+   "p" 16-bit PC relative branch target address at bit 0 (DELTA).
+   "q" 10-bit extra breakpoint code at bit 6.
+   "r" 5-bit same register used as both source and target at bit 21 (RS).
+   "s" 5-bit source register at bit 21 (RS).
+   "t" 5-bit target register at bit 16 (RT).
+   "u" 16-bit upper 16 bits of address at bit 0 (IMMEDIATE).
+   "v" 5-bit same register used as both source and destination at bit 21 (RS).
+   "w" 5-bit same register used as both target and destination at bit 16 (RT).
+   "U" 5-bit same destination register at both bit 11 and 16 (both RD and RT)
+       (used by CLO and CLZ).
+   "C" 25-bit coprocessor function code at bit 0.
+   "B" 20-bit syscall/breakpoint function code at bit 6.
+   "J" 19-bit WAIT function code at bit 6.
+   "x" Accept and ignore register name.
+   "z" Must be zero register.
+   "K" 5-bit Hardware Register (RDHWR instruction) at bit 11 (RD).
+   "+A" 5-bit INS/EXT/DINS/DEXT/DINSM/DEXTM position at bit 6,
+	which becomes LSB (SHAMT).
 	Enforces: 0 <= pos < 32.
-   "+B" 5 bit ins/dins size, which becomes MSB (OP_*_INSMSB).
+   "+B" 5-bit INS/DINS size at bit 11, which becomes MSB.
 	Requires that "+A" or "+E" occur first to set position.
 	Enforces: 0 < (pos+size) <= 32.
-   "+C" 5 bit ext/dext size, which becomes MSBD (OP_*_EXTMSBD).
+   "+C" 5-bit EXT/DEXT size at bit 11, which becomes MSBD.
 	Requires that "+A" or "+E" occur first to set position.
 	Enforces: 0 < (pos+size) <= 32.
-	(Also used by "dext" w/ different limits, but limits for
+	(Also used by DEXT w/ different limits, but limits for
 	that are checked by the M_DEXT macro.)
-   "+E" 5 bit dinsu/dextu position, which becomes LSB-32 (OP_*_SHAMT).
+   "+E" 5-bit DINSU/DEXTU position at bit 6, which becomes LSB-32 (SHAMT).
 	Enforces: 32 <= pos < 64.
-   "+F" 5 bit "dinsm/dinsu" size, which becomes MSB-32 (OP_*_INSMSB).
+   "+F" 5-bit DINSM/DINSU size at bit 11, which becomes MSB-32.
 	Requires that "+A" or "+E" occur first to set position.
 	Enforces: 32 < (pos+size) <= 64.
-   "+G" 5 bit "dextm" size, which becomes MSBD-32 (OP_*_EXTMSBD).
+   "+G" 5-bit DEXTM size at bit 11, which becomes MSBD-32.
 	Requires that "+A" or "+E" occur first to set position.
 	Enforces: 32 < (pos+size) <= 64.
-   "+H" 5 bit "dextu" size, which becomes MSBD (OP_*_EXTMSBD).
+   "+H" 5-bit DEXTU size at bit 11, which becomes MSBD.
 	Requires that "+A" or "+E" occur first to set position.
 	Enforces: 32 < (pos+size) <= 64.
 
    Floating point instructions:
-   "D" 5 bit destination register (OP_*_FD)
-   "M" 3 bit compare condition code (OP_*_CCC) (only used for mips4 and up)
-   "N" 3 bit branch condition code (OP_*_BCC) (only used for mips4 and up)
-   "S" 5 bit fs source 1 register (OP_*_FS)
-   "T" 5 bit ft source 2 register (OP_*_FT)
-   "R" 5 bit fr source 3 register (OP_*_FR)
-   "V" 5 bit same register used as floating source and destination (OP_*_FS)
-   "W" 5 bit same register used as floating target and destination (OP_*_FT)
+   "D" 5-bit destination register at bit 6 (FD).
+   "M" 3-bit compare condition code at bit 8 (only used for mips4 and up).
+   "N" 3-bit branch condition code at bit 18 (only used for mips4 and up).
+   "S" 5-bit fs source 1 register at bit 11 (FS).
+   "T" 5-bit ft source 2 register at bit 16 (FT).
+   "R" 5-bit fr source 3 register at bit 21 (FR).
+   "V" 5-bit same register used as floating source and destination at bit 11
+       (FS).
+   "W" 5-bit same register used as floating target and destination at bit 16
+       (FT).
 
    Coprocessor instructions:
-   "E" 5 bit target register (OP_*_RT)
-   "G" 5 bit destination register (OP_*_RD)
-   "H" 3 bit sel field for (d)mtc* and (d)mfc* (OP_*_SEL)
-   "P" 5 bit performance-monitor register (OP_*_PERFREG)
-   "e" 5 bit vector register byte specifier (OP_*_VECBYTE)
-   "g" 5 bit control destination register (OP_*_RD)
-   "%" 3 bit immediate vr5400 vector alignment operand (OP_*_VECALIGN)
+   "E" 5-bit target register at bit 16 (RT).
+   "G" 5-bit destination register at bit 11 (RD).
+   "H" 3-bit sel field for (D)MTC* and (D)MFC* at bit 0.
+   "P" 5-bit performance-monitor register at bit 1.
+   "e" 3-bit vector register byte specifier at bit 22.
+   "g" 5-bit control destination register at bit 11 (RD).
+   "%" 3-bit immediate vr5400 vector alignment operand at bit 21.
 
    Macro instructions:
-   "A" General 32 bit expression
-   "I" 32 bit immediate (value placed in imm_expr).
-   "F" 64 bit floating point constant in .rdata
-   "L" 64 bit floating point constant in .lit8
-   "f" 32 bit floating point constant
-   "l" 32 bit floating point constant in .lit4
+   "A" General 32-bit expression.
+   "I" 32-bit immediate (value placed in imm_expr).
+   "F" 64-bit floating point constant in .rdata.
+   "L" 64-bit floating point constant in .lit8.
+   "f" 32-bit floating point constant.
+   "l" 32-bit floating point constant in .lit4.
 
    MDMX and VR5400 instruction operands (note that while these use the
    FP register fields, the MDMX instructions accept both $fN and $vN names
    for the registers):
-   "O"	alignment offset (OP_*_ALN)
-   "Q"	vector/scalar/immediate source (OP_*_VSEL and OP_*_FT)
-   "X"	destination register (OP_*_FD)
-   "Y"	source register (OP_*_FS)
-   "Z"	source register (OP_*_FT)
+   "O" 3-bit alignment offset at bit 21.
+   "Q" 10-bit vector/scalar/immediate source at bit 16.
+   "X" 5-bit destination register at bit 6 (FD).
+   "Y" 5-bit source register at bit 11 (FS).
+   "Z" 5-bit source register at bit 16 (FT).
 
    R5900 VU0 Macromode instructions:
-   "+5" 5 bit floating point register (FD)
-   "+6" 5 bit floating point register (FS)
-   "+7" 5 bit floating point register (FT)
-   "+8" 5 bit integer register (FD)
-   "+9" 5 bit integer register (FS)
-   "+0" 5 bit integer register (FT)
-   "+K" match an existing 4-bit channel mask starting at bit 21
-   "+L" 2-bit channel index starting at bit 21
-   "+M" 2-bit channel index starting at bit 23
-   "+N" match an existing 2-bit channel index starting at bit 0
-   "+f" 15 bit immediate for VCALLMS
-   "+g" 5 bit signed immediate for VIADDI
-   "+m" $ACC register (syntax only)
-   "+q" $Q register (syntax only)
-   "+r" $R register (syntax only)
-   "+y" $I register (syntax only)
-   "#+" "++" decorator in ($reg++) sequence
-   "#-" "--" decorator in (--$reg) sequence
+   "+5" 5-bit floating point register at bit 6 (FD).
+   "+6" 5-bit floating point register at bit 11 (FS).
+   "+7" 5-bit floating point register at bit 16 (FT).
+   "+8" 5-bit integer register at bit 6 (FD).
+   "+9" 5-bit integer register at bit 11 (FS).
+   "+0" 5-bit integer register at bit 16 (FT).
+   "+K" Match an existing 4-bit channel mask starting at bit 21.
+   "+L" 2-bit channel index starting at bit 21.
+   "+M" 2-bit channel index starting at bit 23.
+   "+N" Match an existing 2-bit channel index starting at bit 0.
+   "+f" 15-bit immediate for VCALLMS at bit 6.
+   "+g" 5-bit signed immediate for VIADDI at bit 6.
+   "+m" $ACC register (syntax only).
+   "+q" $Q register (syntax only).
+   "+r" $R register (syntax only).
+   "+y" $I register (syntax only).
+   "#+" "++" decorator in ($reg++) sequence.
+   "#-" "--" decorator in (--$reg) sequence.
 
    DSP ASE usage:
-   "2" 2 bit unsigned immediate for byte align (OP_*_BP)
-   "3" 3 bit unsigned immediate (OP_*_SA3)
-   "4" 4 bit unsigned immediate (OP_*_SA4)
-   "5" 8 bit unsigned immediate (OP_*_IMM8)
-   "6" 5 bit unsigned immediate (OP_*_RS)
-   "7" 2 bit dsp accumulator register (OP_*_DSPACC)
-   "8" 6 bit unsigned immediate (OP_*_WRDSP)
-   "9" 2 bit dsp accumulator register (OP_*_DSPACC_S)
-   "0" 6 bit signed immediate (OP_*_DSPSFT)
-   ":" 7 bit signed immediate (OP_*_DSPSFT_7)
-   "'" 6 bit unsigned immediate (OP_*_RDDSP)
-   "@" 10 bit signed immediate (OP_*_IMM10)
+   "2" 2-bit unsigned immediate for byte align at bit 11.
+   "3" 3-bit unsigned immediate at bit 21.
+   "4" 4-bit unsigned immediate at bit 21.
+   "5" 8-bit unsigned immediate at bit 16.
+   "6" 5-bit unsigned immediate at bit 21 (RS).
+   "7" 2-bit DSP accumulator register at bit 11.
+   "8" 6-bit unsigned immediate at bit 11.
+   "9" 2-bit DSP accumulator register at bit 21.
+   "0" 6-bit signed immediate at bit 20.
+   ":" 7-bit signed immediate at bit 19.
+   "'" 6-bit unsigned immediate at bit 16.
+   "@" 10-bit signed immediate at bit 16.
 
    MT ASE usage:
-   "!" 1 bit usermode flag (OP_*_MT_U)
-   "$" 1 bit load high flag (OP_*_MT_H)
-   "*" 2 bit dsp/smartmips accumulator register (OP_*_MTACC_T)
-   "&" 2 bit dsp/smartmips accumulator register (OP_*_MTACC_D)
-   "y" 5 bit control target register (OP_*_RT)
+   "!" 1-bit usermode flag at bit 5.
+   "$" 1-bit load high flag at bit 4.
+   "*" 2-bit DSP/SmartMIPS accumulator register at bit 18.
+   "&" 2-bit DSP/SmartMIPS accumulator register at bit 13.
+   "y" 5-bit control target register at bit 16 (RT).
 
    MCU ASE usage:
-   "~" 12 bit offset (OP_*_OFFSET12)
-   "\" 3 bit position for aset and aclr (OP_*_3BITPOS)
+   "~" 12-bit offset at bit 0.
+   "\" 3-bit position for ASET and ACLR at bit 12.
 
    VIRT ASE usage:
-   "+J" 10-bit hypcall code (OP_*CODE10)
+   "+J" 10-bit HYPCALL code at bit 11.
 
    UDI immediates:
-   "+1" UDI immediate bits 6-10
-   "+2" UDI immediate bits 6-15
-   "+3" UDI immediate bits 6-20
-   "+4" UDI immediate bits 6-25
+   "+1" UDI immediate bits 6-10.
+   "+2" UDI immediate bits 6-15.
+   "+3" UDI immediate bits 6-20.
+   "+4" UDI immediate bits 6-25.
 
    Octeon:
-   "+x" Bit index field of bbit.  Enforces: 0 <= index < 32.
-   "+X" Bit index field of bbit aliasing bbit32.  Matches if 32 <= index < 64,
-	otherwise skips to next candidate.
-   "+p" Position field of cins/cins32/exts/exts32. Enforces 0 <= pos < 32.
-   "+P" Position field of cins/exts aliasing cins32/exts32.  Matches if
-	32 <= pos < 64, otherwise skips to next candidate.
-   "+Q" Immediate field of seqi/snei.  Enforces -512 <= imm < 512.
-   "+s" Length-minus-one field of cins32/exts32.  Requires msb position
-	of the field to be <= 31.
-   "+S" Length-minus-one field of cins/exts.  Requires msb position
-	of the field to be <= 63.
+   "+x" Bit index field of BBITx at bit 16.
+	Enforces: 0 <= index < 32.
+   "+X" Bit index field of BBITx aliasing BBITx32 at bit 16.
+	Matches if 32 <= index < 64, otherwise skips to next candidate.
+   "+p" Position field of CINS/CINS32/EXTS/EXTS32 at bit 6.
+	Enforces 0 <= pos < 32.
+   "+P" Position field of CINS/EXTS aliasing CINS32/EXTS32 at bit 6.
+	Matches if 32 <= pos < 64, otherwise skips to next candidate.
+   "+Q" Immediate field of SEQI/SNEI at bit 6.
+	Enforces -512 <= imm < 512.
+   "+s" Length-minus-one field of CINS32/EXTS32 at bit 11.
+	Requires MSB position of the field to be <= 31.
+   "+S" Length-minus-one field of CINS/EXTS at bit 11.
+	Requires MSB position of the field to be <= 63.
 
    Loongson-ext ASE:
-   "+a" 8-bit signed offset in bit 6 (OP_*_OFFSET_A)
-   "+b" 8-bit signed offset in bit 3 (OP_*_OFFSET_B)
-   "+c" 9-bit signed offset in bit 6 (OP_*_OFFSET_C)
-   "+z" 5-bit rz register (OP_*_RZ)
-   "+Z" 5-bit fz register (OP_*_FZ)
+   "+a" 8-bit signed offset at bit 6.
+   "+b" 8-bit signed offset at bit 3.
+   "+c" 9-bit signed offset at bit 6.
+   "+z" 5-bit rz register at bit 0.
+   "+Z" 5-bit fz register at bit 0.
 
    interAptiv MR2:
-   "-m" register list for SAVE/RESTORE instruction
+   "-m" Register list for SAVE/RESTORE instruction.
 
    Enhanced VA Scheme:
-   "+j" 9-bit signed offset in bit 7 (OP_*_EVAOFFSET)
+   "+j" 9-bit signed offset at bit 7.
 
    MSA Extension:
-   "+d" 5-bit MSA register (FD)
-   "+e" 5-bit MSA register (FS)
-   "+h" 5-bit MSA register (FT)
-   "+k" 5-bit GPR at bit 6
-   "+l" 5-bit MSA control register at bit 6
-   "+n" 5-bit MSA control register at bit 11
-   "+o" 4-bit vector element index at bit 16
-   "+u" 3-bit vector element index at bit 16
-   "+v" 2-bit vector element index at bit 16
-   "+w" 1-bit vector element index at bit 16
-   "+T" (-512 .. 511) << 0 at bit 16
-   "+U" (-512 .. 511) << 1 at bit 16
-   "+V" (-512 .. 511) << 2 at bit 16
-   "+W" (-512 .. 511) << 3 at bit 16
-   "+~" 2 bit LSA/DLSA shift amount from 1 to 4 at bit 6
-   "+!" 3 bit unsigned bit position at bit 16
-   "+@" 4 bit unsigned bit position at bit 16
-   "+#" 6 bit unsigned bit position at bit 16
-   "+$" 5 bit unsigned immediate at bit 16
-   "+%" 5 bit signed immediate at bit 16
-   "+^" 10 bit signed immediate at bit 11
-   "+&" 0 vector element index
-   "+*" 5-bit register vector element index at bit 16
-   "+|" 8-bit mask at bit 16
+   "+d" 5-bit MSA register at bit 6 (FD).
+   "+e" 5-bit MSA register at bit 11 (FS).
+   "+h" 5-bit MSA register at bit 16 (FT).
+   "+k" 5-bit GPR at bit 6.
+   "+l" 5-bit MSA control register at bit 6.
+   "+n" 5-bit MSA control register at bit 11.
+   "+o" 4-bit vector element index at bit 16.
+   "+u" 3-bit vector element index at bit 16.
+   "+v" 2-bit vector element index at bit 16.
+   "+w" 1-bit vector element index at bit 16.
+   "+T" (-512 .. 511) << 0 at bit 16.
+   "+U" (-512 .. 511) << 1 at bit 16.
+   "+V" (-512 .. 511) << 2 at bit 16.
+   "+W" (-512 .. 511) << 3 at bit 16.
+   "+~" 2-bit LSA/DLSA shift amount from 1 to 4 at bit 6.
+   "+!" 3-bit unsigned bit position at bit 16.
+   "+@" 4-bit unsigned bit position at bit 16.
+   "+#" 6-bit unsigned bit position at bit 16.
+   "+$" 5-bit unsigned immediate at bit 16.
+   "+%" 5-bit signed immediate at bit 16.
+   "+^" 10-bit signed immediate at bit 11.
+   "+&" 0 vector element index.
+   "+*" 5-bit register vector element index at bit 16.
+   "+|" 8-bit mask at bit 16.
 
    MIPS R6:
-   "+:" 11-bit mask at bit 0
-   "+'" 26 bit PC relative branch target address
-   "+"" 21 bit PC relative branch target address
-   "+;" 5 bit same register in both OP_*_RS and OP_*_RT
-   "+I" 2bit unsigned bit position at bit 6
-   "+O" 3bit unsigned bit position at bit 6
-   "+R" must be program counter
-   "-a" (-262144 .. 262143) << 2 at bit 0
-   "-b" (-131072 .. 131071) << 3 at bit 0
-   "-d" Same as destination register GP
-   "-s" 5 bit source register specifier (OP_*_RS) not $0
-   "-t" 5 bit target register specifier (OP_*_RT) not $0
-   "-u" 5 bit target register specifier (OP_*_RT) greater than OP_*_RS
-   "-v" 5 bit target register specifier (OP_*_RT) not $0 not OP_*_RS
-   "-w" 5 bit target register specifier (OP_*_RT) less than or equal to OP_*_RS
-   "-x" 5 bit source register specifier (OP_*_RS) greater than OP_*_RT
-   "-y" 5 bit source register specifier (OP_*_RS) not $0 less than OP_*_RT
-   "-A" symbolic offset (-262144 .. 262143) << 2 at bit 0
-   "-B" symbolic offset (-131072 .. 131071) << 3 at bit 0
+   "+:" 11-bit mask at bit 0.
+   "+'" 26-bit PC relative branch target address at bit 0.
+   "+"" 21-bit PC relative branch target address at bit 0.
+   "+;" 5-bit same register at both bit 16 and 21 (both RT and RS).
+   "+I" 2-bit unsigned bit position at bit 6.
+   "+O" 3-bit unsigned bit position at bit 6.
+   "+R" Must be program counter.
+   "-a" (-262144 .. 262143) << 2 at bit 0.
+   "-b" (-131072 .. 131071) << 3 at bit 0.
+   "-d" Same as destination register GP.
+   "-s" 5-bit source register at bit 21 (RS) not $0.
+   "-t" 5-bit target register at bit 16 (RT) not $0
+   "-u" 5-bit target register at bit 16 (RT) greater than RS.
+   "-v" 5-bit target register at bit 16 (RT) not $0 not RS.
+   "-w" 5-bit target register at bit 16 (RT) less than or equal to RS.
+   "-x" 5-bit source register at bit 21 (RS) greater than RT.
+   "-y" 5-bit source register at bit 21 (RS) not $0 less than RT.
+   "-A" Symbolic offset (-262144 .. 262143) << 2 at bit 0.
+   "-B" Symbolic offset (-131072 .. 131071) << 3 at bit 0.
 
    GINV ASE usage:
-   "+\" 2 bit Global TLB invalidate type at bit 8
+   "+\" 2-bit Global TLB invalidate type at bit 8.
 
    Other:
-   "()" parens surrounding optional value
-   ","  separates operands
+   "()" Parens surrounding optional value.
+   ","  Separates operands.
    "+"  Start of extension sequence.
+   "-"  Start of extension sequence.
 
    Characters used so far, for quick reference when adding more:
    "1234567890"
@@ -758,13 +762,13 @@ mips_opcode_32bit_p (const struct mips_opcode *mo)
    following), for quick reference when adding more:
    "1234567890"
    "~!@#$%^&*|:'";\"
-   "ABCEFGHIJKLMNOPQRSTUVWXZ"
+   "ABC EFGHIJKLMNOPQRSTUVWX Z"
    "abcdefghijklmnopqrs uvwxyz"
 
    Extension character sequences used so far ("-" followed by the
    following), for quick reference when adding more:
-   "AB"
-   "abdmstuvwxy"
+   "AB                        "
+   "ab d        m     stuvwxy "
 */
 
 /* These are the bits which may be set in the pinfo field of an
@@ -1589,80 +1593,81 @@ extern int bfd_mips_num_opcodes;
 #define MIPS16OP_MASK_RZ	0x7
 #define MIPS16OP_SH_RZ		2
 
-/* These are the characters which may appears in the args field of a MIPS16
-   instruction.  They appear in the order in which the fields appear when the
-   instruction is used.  Commas and parentheses in the args string are ignored
-   when assembling, and written into the output when disassembling.
-
-   "y" 3 bit register (MIPS16OP_*_RY)
-   "x" 3 bit register (MIPS16OP_*_RX)
-   "z" 3 bit register (MIPS16OP_*_RZ)
-   "Z" 3 bit register (MIPS16OP_*_MOVE32Z)
-   "v" 3 bit same register as source and destination (MIPS16OP_*_RX)
-   "w" 3 bit same register as source and destination (MIPS16OP_*_RY)
-   "." zero register ($0)
-   "S" stack pointer ($sp or $29)
-   "P" program counter
-   "R" return address register ($ra or $31)
-   "X" 5 bit MIPS register (MIPS16OP_*_REGR32)
-   "Y" 5 bit MIPS register (MIPS16OP_*_REG32R)
-   "0" 5-bit ASMACRO p0 immediate
-   "1" 3-bit ASMACRO p1 immediate
-   "2" 3-bit ASMACRO p2 immediate
-   "3" 5-bit ASMACRO p3 immediate
-   "4" 3-bit ASMACRO p4 immediate
-   "6" 6 bit unsigned break code (MIPS16OP_*_IMM6)
-   "a" 26 bit jump address
-   "i" likewise, but flips bit 0
-   "e" 11 bit extension value
-   "l" register list for entry instruction
-   "L" register list for exit instruction
-   ">" 5-bit SYNC code
-   "9" 9-bit signed immediate
-   "G" global pointer ($gp or $28)
-   "N" 5-bit coprocessor register
-   "O" 3-bit sel field for MFC0/MTC0
-   "Q" 5-bit hardware register
-   "T" 5-bit CACHE opcode or PREF hint
-   "b" 5-bit INS/EXT position, which becomes LSB
+/* These are the characters which may appears in the args field of a
+   MIPS16 instruction.  They appear in the order in which the fields
+   appear when the instruction is used.  Commas and parentheses in the
+   args string are ignored when assembling, and written into the output
+   when disassembling.
+
+   "y" 3-bit register at bit 5 (RY).
+   "x" 3-bit register at bit 8 (RX).
+   "z" 3-bit register at bit 2 (RZ).
+   "Z" 3-bit register at bit 0 (MOV32Z).
+   "v" 3-bit same register as source and destination at bit 8 (RX).
+   "w" 3-bit same register as source and destination at bit 5 (RY).
+   "." Zero register ($0).
+   "S" Stack pointer ($sp or $29).
+   "P" Program counter.
+   "R" Return address register ($ra or $31).
+   "X" 5-bit MIPS register at bit 0 (REGR32).
+   "Y" 5-bit shuffled MIPS register at bit 3 (REG32R).
+   "0" 5-bit ASMACRO p0 immediate.
+   "1" 3-bit ASMACRO p1 immediate.
+   "2" 3-bit ASMACRO p2 immediate.
+   "3" 5-bit ASMACRO p3 immediate.
+   "4" 3-bit ASMACRO p4 immediate.
+   "6" 6-bit unsigned break code at bit 5.
+   "a" 26-bit jump address.
+   "i" Likewise, but flips bit 0.
+   "e" 11-bit extension value.
+   "l" Register list for ENTRY instruction.
+   "L" Register list for EXIT instruction.
+   ">" 5-bit SYNC code.
+   "9" 9-bit signed immediate.
+   "G" global pointer ($gp or $28).
+   "N" 5-bit coprocessor register.
+   "O" 3-bit sel field for MFC0/MTC0.
+   "Q" 5-bit hardware register.
+   "T" 5-bit CACHE opcode or PREF hint.
+   "b" 5-bit INS/EXT position, which becomes LSB.
        Enforces: 0 <= pos < 32.
-   "c" 5-bit INS size, which becomes MSB
+   "c" 5-bit INS size, which becomes MSB.
        Requires that "b" occurs first to set position.
        Enforces: 0 < (pos+size) <= 32.
-   "d" 5-bit EXT size, which becomes MSBD
+   "d" 5-bit EXT size, which becomes MSBD.
        Requires that "b" occurs first to set position.
        Enforces: 0 < (pos+size) <= 32.
-   "n" 2-bit immediate (1 .. 4)
-   "o" 5-bit unsigned immediate * 16
-   "r" 3-bit register
-   "s" 3-bit ASMACRO select immediate
-   "u" 16-bit unsigned immediate
+   "n" 2-bit immediate (1 .. 4).
+   "o" 5-bit unsigned immediate * 16.
+   "r" 3-bit register.
+   "s" 3-bit ASMACRO select immediate.
+   "u" 16-bit unsigned immediate.
 
-   "I" an immediate value used for macros
+   "I" An immediate value used for macros.
 
    The remaining codes may be extended.  Except as otherwise noted,
    the full extended operand is a 16 bit signed value.
-   "<" 3 bit unsigned shift count * 0 (MIPS16OP_*_RZ) (full 5 bit unsigned)
-   "[" 3 bit unsigned shift count * 0 (MIPS16OP_*_RZ) (full 6 bit unsigned)
-   "]" 3 bit unsigned shift count * 0 (MIPS16OP_*_RX) (full 6 bit unsigned)
-   "5" 5 bit unsigned immediate * 0 (MIPS16OP_*_IMM5)
-   "F" 4 bit signed immediate * 0 (MIPS16OP_*_IMM4) (full 15 bit signed)
-   "H" 5 bit unsigned immediate * 2 (MIPS16OP_*_IMM5)
-   "W" 5 bit unsigned immediate * 4 (MIPS16OP_*_IMM5)
-   "D" 5 bit unsigned immediate * 8 (MIPS16OP_*_IMM5)
-   "j" 5 bit signed immediate * 0 (MIPS16OP_*_IMM5)
-   "8" 8 bit unsigned immediate * 0 (MIPS16OP_*_IMM8)
-   "V" 8 bit unsigned immediate * 4 (MIPS16OP_*_IMM8)
-   "C" 8 bit unsigned immediate * 8 (MIPS16OP_*_IMM8)
-   "U" 8 bit unsigned immediate * 0 (MIPS16OP_*_IMM8) (full 16 bit unsigned)
-   "k" 8 bit signed immediate * 0 (MIPS16OP_*_IMM8)
-   "K" 8 bit signed immediate * 8 (MIPS16OP_*_IMM8)
-   "p" 8 bit conditional branch address (MIPS16OP_*_IMM8)
-   "q" 11 bit branch address (MIPS16OP_*_IMM11)
-   "A" 8 bit PC relative address * 4 (MIPS16OP_*_IMM8)
-   "B" 5 bit PC relative address * 8 (MIPS16OP_*_IMM5)
-   "E" 5 bit PC relative address * 4 (MIPS16OP_*_IMM5)
-   "m" 7 bit register list for SAVE/RESTORE instruction (18 bit extended)
+   "<" 3-bit unsigned shift count * 1 at bit 2 (SHAMT) (full 5-bit unsigned).
+   "[" 3-bit unsigned shift count * 1 at bit 2 (SHAMT) (full 6-bit unsigned).
+   "]" 3-bit unsigned shift count * 1 at bit 8 (RX) (full 6-bit unsigned).
+   "5" 5-bit unsigned immediate * 1 at bit 0 (IMM5).
+   "F" 4-bit signed immediate * 1 a bit 0 (IMM4) (full 15-bit signed).
+   "H" 5-bit unsigned immediate * 2 at bit 0 (IMM5).
+   "W" 5-bit unsigned immediate * 4 at bit 0 (IMM5).
+   "D" 5-bit unsigned immediate * 8 at bit 0 (IMM5).
+   "j" 5-bit signed immediate * 1 at bit 0 (IMM5).
+   "8" 8-bit unsigned immediate * 1 at bit 0 (IMM8).
+   "V" 8-bit unsigned immediate * 4 at bit 0 (IMM8).
+   "C" 8-bit unsigned immediate * 8 at bit 0 (IMM8).
+   "U" 8-bit unsigned immediate * 1 at bit 0 (IMM8) (full 16-bit unsigned).
+   "k" 8-bit signed immediate * 1 at bit 0 (IMM8).
+   "K" 8-bit signed immediate * 8 at bit 0 (IMM8).
+   "p" 8-bit conditional branch address at bit 0 (IMM8).
+   "q" 11-bit branch address at bit 0 (IMM11).
+   "A" 8-bit PC relative address * 4 at bit 0 (IMM8).
+   "B" 5-bit PC relative address * 8 at bit 0 (IMM5).
+   "E" 5-bit PC relative address * 4 at bit 0 (IMM5).
+   "m" 7-bit register list for SAVE/RESTORE instruction (18-bit extended).
 
    Characters used so far, for quick reference when adding more:
    "0123456 89"
@@ -1713,190 +1718,186 @@ extern const int bfd_mips16_num_opcodes;
 #define MICROMIPSOP_MASK_MJ		0x1f
 #define MICROMIPSOP_SH_MJ		0
 
-/* These are the characters which may appears in the args field of a microMIPS
-   instruction.  They appear in the order in which the fields appear
-   when the instruction is used.  Commas and parentheses in the args
-   string are ignored when assembling, and written into the output
+/* These are the characters which may appears in the args field of a
+   microMIPS instruction.  They appear in the order in which the fields
+   appear when the instruction is used.  Commas and parentheses in the
+   args string are ignored when assembling, and written into the output
    when disassembling.
 
    The followings are for 16-bit microMIPS instructions.
 
-   "ma" must be $28
-   "mc" 3-bit MIPS registers 2-7, 16, 17 (MICROMIPSOP_*_MC) at bit 4
-        The same register used as both source and target.
-   "md" 3-bit MIPS registers 2-7, 16, 17 (MICROMIPSOP_*_MD) at bit 7
-   "me" 3-bit MIPS registers 2-7, 16, 17 (MICROMIPSOP_*_ME) at bit 1
-        The same register used as both source and target.
-   "mf" 3-bit MIPS registers 2-7, 16, 17 (MICROMIPSOP_*_MF) at bit 3
-   "mg" 3-bit MIPS registers 2-7, 16, 17 (MICROMIPSOP_*_MG) at bit 0
-   "mh" 3-bit MIPS register pair (MICROMIPSOP_*_MH) at bit 7
-   "mj" 5-bit MIPS registers (MICROMIPSOP_*_MJ) at bit 0
-   "ml" 3-bit MIPS registers 2-7, 16, 17 (MICROMIPSOP_*_ML) at bit 4
-   "mm" 3-bit MIPS registers 0, 2, 3, 16-20 (MICROMIPSOP_*_MM) at bit 1
-   "mn" 3-bit MIPS registers 0, 2, 3, 16-20 (MICROMIPSOP_*_MN) at bit 4
-   "mp" 5-bit MIPS registers (MICROMIPSOP_*_MP) at bit 5
-   "mq" 3-bit MIPS registers 0, 2-7, 17 (MICROMIPSOP_*_MQ) at bit 7
-   "mr" must be program counter
-   "ms" must be $29
-   "mt" must be the same as the previous register
-   "mx" must be the same as the destination register
-   "my" must be $31
-   "mz" must be $0
-
-   "mA" 7-bit immediate (-64 .. 63) << 2 (MICROMIPSOP_*_IMMA)
-   "mB" 3-bit immediate (-1, 1, 4, 8, 12, 16, 20, 24) (MICROMIPSOP_*_IMMB)
+   "ma" Must be $28.
+   "mc" 3-bit registers 2-7, 16, 17 at bit 4.
+	The same register used as both source and target.
+   "md" 3-bit registers 2-7, 16, 17 at bit 7.
+   "me" 3-bit registers 2-7, 16, 17 at bit 1.
+	The same register used as both source and target.
+   "mf" 3-bit registers 2-7, 16, 17 at bit 3.
+   "mg" 3-bit registers 2-7, 16, 17 at bit 0.
+   "mh" 3-bit register pair at bit 7.
+   "mj" 5-bit registers at bit 0.
+   "ml" 3-bit registers 2-7, 16, 17 at bit 4.
+   "mm" 3-bit registers 0, 2, 3, 16-20 at bit 1.
+   "mn" 3-bit registers 0, 2, 3, 16-20 at bit 4.
+   "mp" 5-bit registers at bit 5.
+   "mq" 3-bit registers 0, 2-7, 17 at bit 7.
+   "mr" Must be program counter.
+   "ms" Must be $29.
+   "mt" Must be the same as the previous register.
+   "mx" Must be the same as the destination register.
+   "my" Must be $31.
+   "mz" Must be $0.
+
+   "mA" 7-bit immediate (-64 .. 63) << 2 at bit 0.
+   "mB" 3-bit immediate (-1, 1, 4, 8, 12, 16, 20, 24) at bit 1.
    "mC" 4-bit immediate (1, 2, 3, 4, 7, 8, 15, 16, 31, 32, 63, 64, 128, 255,
-        32768, 65535) (MICROMIPSOP_*_IMMC)
-   "mD" 10-bit branch address (-512 .. 511) << 1 (MICROMIPSOP_*_IMMD)
-   "mE" 7-bit branch address (-64 .. 63) << 1 (MICROMIPSOP_*_IMME)
-   "mF" 4-bit immediate (0 .. 15)  (MICROMIPSOP_*_IMMF)
-   "mG" 4-bit immediate (-1 .. 14) (MICROMIPSOP_*_IMMG)
-   "mH" 4-bit immediate (0 .. 15) << 1 (MICROMIPSOP_*_IMMH)
-   "mI" 7-bit immediate (-1 .. 126) (MICROMIPSOP_*_IMMI)
-   "mJ" 4-bit immediate (0 .. 15) << 2 (MICROMIPSOP_*_IMMJ)
-   "mL" 4-bit immediate (0 .. 15) (MICROMIPSOP_*_IMML)
-   "mM" 3-bit immediate (1 .. 8) (MICROMIPSOP_*_IMMM)
-   "mN" 2-bit immediate (0 .. 3) for register list (MICROMIPSOP_*_IMMN)
-   "mO" 4-bit immediate (0 .. 15) (MICROMIPSOP_*_IMML)
-   "mP" 5-bit immediate (0 .. 31) << 2 (MICROMIPSOP_*_IMMP)
-   "mU" 5-bit immediate (0 .. 31) << 2 (MICROMIPSOP_*_IMMU)
-   "mW" 6-bit immediate (0 .. 63) << 2 (MICROMIPSOP_*_IMMW)
-   "mX" 4-bit immediate (-8 .. 7) (MICROMIPSOP_*_IMMX)
-   "mY" 9-bit immediate (-258 .. -3, 2 .. 257) << 2 (MICROMIPSOP_*_IMMY)
-   "mZ" must be zero
+	32768, 65535) at bit 0.
+   "mD" 10-bit branch address (-512 .. 511) << 1 at bit 0.
+   "mE" 7-bit branch address (-64 .. 63) << 1 at bit 0.
+   "mF" 4-bit immediate (0 .. 15) at bit 0.
+   "mG" 4-bit immediate (-1 .. 14) at bit 0.
+   "mH" 4-bit immediate (0 .. 15) << 1 at bit 0.
+   "mI" 7-bit immediate (-1 .. 126) at bit 0.
+   "mJ" 4-bit immediate (0 .. 15) << 2 at bit 0.
+   "mL" 4-bit immediate (0 .. 15) at bit 0.
+   "mM" 3-bit immediate (1 .. 8) at bit 1.
+   "mN" 2-bit immediate (0 .. 3) for register list at bit 4.
+   "mO" 4-bit immediate (0 .. 15) at bit 0.
+   "mP" 5-bit immediate (0 .. 31) << 2 at bit 0.
+   "mU" 5-bit immediate (0 .. 31) << 2 at bit 0.
+   "mW" 6-bit immediate (0 .. 63) << 2 at bit 1.
+   "mX" 4-bit immediate (-8 .. 7) at bit 1.
+   "mY" 9-bit immediate (-258 .. -3, 2 .. 257) << 2 at bit 1.
+   "mZ" Must be zero.
 
    In most cases 32-bit microMIPS instructions use the same characters
    as MIPS (with ADDIUPC being a notable exception, but there are some
    others too).
 
-   "." 10-bit signed offset/number (MICROMIPSOP_*_OFFSET10)
-   "1" 5-bit sync type (MICROMIPSOP_*_STYPE)
-   "<" 5-bit shift amount (MICROMIPSOP_*_SHAMT)
-   ">" shift amount between 32 and 63, stored after subtracting 32
-       (MICROMIPSOP_*_SHAMT)
-   "\" 3-bit position for ASET and ACLR (MICROMIPSOP_*_3BITPOS)
-   "|" 4-bit trap code (MICROMIPSOP_*_TRAP)
-   "~" 12-bit signed offset (MICROMIPSOP_*_OFFSET12)
-   "a" 26-bit target address (MICROMIPSOP_*_TARGET)
-   "+i" likewise, but flips bit 0
-   "b" 5-bit base register (MICROMIPSOP_*_RS)
-   "c" 10-bit higher breakpoint code (MICROMIPSOP_*_CODE)
-   "d" 5-bit destination register specifier (MICROMIPSOP_*_RD)
-   "h" 5-bit PREFX hint (MICROMIPSOP_*_PREFX)
-   "i" 16-bit unsigned immediate (MICROMIPSOP_*_IMMEDIATE)
-   "j" 16-bit signed immediate (MICROMIPSOP_*_DELTA)
-   "k" 5-bit cache opcode in target register position (MICROMIPSOP_*_CACHE)
-   "n" register list for 32-bit LWM/SWM instruction (MICROMIPSOP_*_RT)
-   "o" 16-bit signed offset (MICROMIPSOP_*_DELTA)
-   "p" 16-bit PC-relative branch target address (MICROMIPSOP_*_DELTA)
-   "q" 10-bit lower breakpoint code (MICROMIPSOP_*_CODE2)
-   "r" 5-bit same register used as both source and target (MICROMIPSOP_*_RS)
-   "s" 5-bit source register specifier (MICROMIPSOP_*_RS)
-   "t" 5-bit target register (MICROMIPSOP_*_RT)
-   "u" 16-bit upper 16 bits of address (MICROMIPSOP_*_IMMEDIATE)
-   "v" 5-bit same register used as both source and destination
-       (MICROMIPSOP_*_RS)
-   "w" 5-bit same register used as both target and destination
-       (MICROMIPSOP_*_RT)
-   "x" 5-bit source 3 register for ALNV.PS (MICROMIPSOP_*_RS3)
-   "z" must be zero register
-   "C" 23-bit coprocessor function code (MICROMIPSOP_*_COPZ)
-   "K" 5-bit Hardware Register (RDHWR instruction) (MICROMIPSOP_*_RS)
-
-   "+A" 5-bit INS/EXT/DINS/DEXT/DINSM/DEXTM position, which becomes
-        LSB (MICROMIPSOP_*_EXTLSB).
+   "." 10-bit signed offset/number at bit 6.
+   "1" 5-bit SYNC type at bit 16.
+   "<" 5-bit shift amount at bit 11.
+   ">" Shift amount between 32 and 63, stored after subtracting 3, at bit 11.
+   "\" 3-bit position for ASET and ACLR at bit 21.
+   "|" 4-bit trap code at bit 12.
+   "~" 12-bit signed offset at bit 0.
+   "a" 26-bit target address at bit 0.
+   "+i" Likewise, but flips bit 0.
+   "b" 5-bit base register at bit 16 (RS).
+   "c" 10-bit higher breakpoint code at bit 16.
+   "d" 5-bit destination register at bit 11 (RD).
+   "h" 5-bit PREFX hint at bit 11.
+   "i" 16-bit unsigned immediate at bit 0.
+   "j" 16-bit signed immediate at bit 0.
+   "k" 5-bit CACHE opcode in target register position at bit 21.
+   "n" 5-bit register list for 32-bit LWM/SWM instruction at bit 21 (RT).
+   "o" 16-bit signed offset at bit 0.
+   "p" 16-bit PC-relative branch target address at bit 0.
+   "q" 10-bit lower breakpoint code at bit 6.
+   "r" 5-bit same register used as both source and target at bit 16 (RS).
+   "s" 5-bit source register at bit 16 (RS).
+   "t" 5-bit target register at bit 21 (RT).
+   "u" 16-bit upper 16 bits of address at bit 0.
+   "v" 5-bit same register used as both source and destination at bit 16 (RS).
+   "w" 5-bit same register used as both target and destination at bit 21 (RT).
+   "x" 5-bit source 3 register for ALNV.PS at bit 6.
+   "z" Must be zero register.
+   "C" 23-bit coprocessor function code at bit 3.
+   "K" 5-bit Hardware Register (RDHWR instruction) at bit 16 (RS).
+
+   "+A" 5-bit INS/EXT/DINS/DEXT/DINSM/DEXTM position at bit 6,
+	which becomes LSB.
 	Enforces: 0 <= pos < 32.
-   "+B" 5-bit INS/DINS size, which becomes MSB (MICROMIPSOP_*_INSMSB).
+   "+B" 5-bit INS/DINS size at bit 11, which becomes MSB.
 	Requires that "+A" or "+E" occur first to set position.
 	Enforces: 0 < (pos+size) <= 32.
-   "+C" 5-bit EXT/DEXT size, which becomes MSBD (MICROMIPSOP_*_EXTMSBD).
+   "+C" 5-bit EXT/DEXT size at bit 11, which becomes MSBD.
 	Requires that "+A" or "+E" occur first to set position.
 	Enforces: 0 < (pos+size) <= 32.
 	(Also used by DEXT w/ different limits, but limits for
 	that are checked by the M_DEXT macro.)
-   "+E" 5-bit DINSU/DEXTU position, which becomes LSB-32 (MICROMIPSOP_*_EXTLSB).
+   "+E" 5-bit DINSU/DEXTU position at bit 6, which becomes LSB-32.
 	Enforces: 32 <= pos < 64.
-   "+F" 5-bit DINSM/DINSU size, which becomes MSB-32 (MICROMIPSOP_*_INSMSB).
+   "+F" 5-bit DINSM/DINSU size at bit 11., which becomes MSB-32.
 	Requires that "+A" or "+E" occur first to set position.
 	Enforces: 32 < (pos+size) <= 64.
-   "+G" 5-bit DEXTM size, which becomes MSBD-32 (MICROMIPSOP_*_EXTMSBD).
+   "+G" 5-bit DEXTM size at bit 11, which becomes MSBD-32.
 	Requires that "+A" or "+E" occur first to set position.
 	Enforces: 32 < (pos+size) <= 64.
-   "+H" 5-bit DEXTU size, which becomes MSBD (MICROMIPSOP_*_EXTMSBD).
+   "+H" 5-bit DEXTU size at bit 11, which becomes MSBD.
 	Requires that "+A" or "+E" occur first to set position.
 	Enforces: 32 < (pos+size) <= 64.
-   "+J" 10-bit SYSCALL/WAIT/SDBBP/HYPCALL function code
-        (MICROMIPSOP_*_CODE10)
+   "+J" 10-bit SYSCALL/WAIT/SDBBP/HYPCALL function code at bit 16.
 
    PC-relative addition (ADDIUPC) instruction:
-   "mQ" 23-bit offset (-4194304 .. 4194303) << 2 (MICROMIPSOP_*_IMMQ)
-   "mb" 3-bit MIPS registers 2-7, 16, 17 (MICROMIPSOP_*_MB) at bit 23
+   "mQ" 23-bit offset (-4194304 .. 4194303) << 2 at bit 0.
+   "mb" 3-bit MIPS registers 2-7, 16, 17 at bit 23.
 
    Floating point instructions:
-   "D" 5-bit destination register (MICROMIPSOP_*_FD)
-   "M" 3-bit compare condition code (MICROMIPSOP_*_CCC)
-   "N" 3-bit branch condition code (MICROMIPSOP_*_BCC)
-   "R" 5-bit fr source 3 register (MICROMIPSOP_*_FR)
-   "S" 5-bit fs source 1 register (MICROMIPSOP_*_FS)
-   "T" 5-bit ft source 2 register (MICROMIPSOP_*_FT)
+   "D" 5-bit destination register at bit 11 (FD).
+   "M" 3-bit compare condition code at bit 13 (CCC).
+   "N" 3-bit branch condition code at bit 18 (BCC).
+   "R" 5-bit fr source 3 register at bit 6 (FR).
+   "S" 5-bit fs source 1 register at bit 16 (FS).
+   "T" 5-bit ft source 2 register at bit 21 (FT).
    "V" 5-bit same register used as floating source and destination or target
-       (MICROMIPSOP_*_FS)
+       at bit 16 (FS).
 
    Coprocessor instructions:
-   "E" 5-bit target register (MICROMIPSOP_*_RT)
-   "G" 5-bit source register (MICROMIPSOP_*_RS)
-   "H" 3-bit sel field for (D)MTC* and (D)MFC* (MICROMIPSOP_*_SEL)
-   "g" 5-bit control source register (MICROMIPSOP_*_RS)
+   "E" 5-bit target register at bit 21 (RT).
+   "G" 5-bit source register at bit 16 (RS).
+   "H" 3-bit sel field for (D)MTC* and (D)MFC* at bit 11.
+   "g" 5-bit control source register at bit 16 (RS).
 
    Macro instructions:
-   "A" general 32 bit expression
+   "A" General 32-bit expression.
    "I" 32-bit immediate (value placed in imm_expr).
-   "F" 64-bit floating point constant in .rdata
-   "L" 64-bit floating point constant in .lit8
-   "f" 32-bit floating point constant
-   "l" 32-bit floating point constant in .lit4
+   "F" 64-bit floating point constant in .rdata.
+   "L" 64-bit floating point constant in .lit8.
+   "f" 32-bit floating point constant.
+   "l" 32-bit floating point constant in .lit4.
 
    DSP ASE usage:
-   "2" 2-bit unsigned immediate for byte align (MICROMIPSOP_*_BP)
-   "3" 3-bit unsigned immediate (MICROMIPSOP_*_SA3)
-   "4" 4-bit unsigned immediate (MICROMIPSOP_*_SA4)
-   "5" 8-bit unsigned immediate (MICROMIPSOP_*_IMM8)
-   "6" 5-bit unsigned immediate (MICROMIPSOP_*_RS)
-   "7" 2-bit DSP accumulator register (MICROMIPSOP_*_DSPACC)
-   "8" 6-bit unsigned immediate (MICROMIPSOP_*_WRDSP)
-   "0" 6-bit signed immediate (MICROMIPSOP_*_DSPSFT)
-   "@" 10-bit signed immediate (MICROMIPSOP_*_IMM10)
-   "^" 5-bit unsigned immediate (MICROMIPSOP_*_RD)
+   "2" 2-bit unsigned immediate for byte align at bit 14.
+   "3" 3-bit unsigned immediate at bit 13.
+   "4" 4-bit unsigned immediate at bit 12.
+   "5" 8-bit unsigned immediate at bit 13.
+   "6" 5-bit unsigned immediate at bit 16 (RS).
+   "7" 2-bit DSP accumulator register at bit 14.
+   "8" 6-bit unsigned immediate at bit 14.
+   "0" 6-bit signed immediate at bit 16.
+   "@" 10-bit signed immediate at bit 16.
+   "^" 5-bit unsigned immediate at bit 11 (RD).
 
    microMIPS Enhanced VA Scheme:
-   "+j" 9-bit signed offset in bit 0 (OP_*_EVAOFFSET)
+   "+j" 9-bit signed offset in bit 0.
 
    MSA Extension:
-   "+d" 5-bit MSA register (FD)
-   "+e" 5-bit MSA register (FS)
-   "+h" 5-bit MSA register (FT)
-   "+k" 5-bit GPR at bit 6
-   "+l" 5-bit MSA control register at bit 6
-   "+n" 5-bit MSA control register at bit 11
-   "+o" 4-bit vector element index at bit 16
-   "+u" 3-bit vector element index at bit 16
-   "+v" 2-bit vector element index at bit 16
-   "+w" 1-bit vector element index at bit 16
-   "+x" 5-bit shift amount at bit 16
-   "+T" (-512 .. 511) << 0 at bit 16
-   "+U" (-512 .. 511) << 1 at bit 16
-   "+V" (-512 .. 511) << 2 at bit 16
-   "+W" (-512 .. 511) << 3 at bit 16
-   "+~" 2 bit LSA/DLSA shift amount from 1 to 4 at bit 6
-   "+!" 3 bit unsigned bit position at bit 16
-   "+@" 4 bit unsigned bit position at bit 16
-   "+#" 6 bit unsigned bit position at bit 16
-   "+$" 5 bit unsigned immediate at bit 16
-   "+%" 5 bit signed immediate at bit 16
-   "+^" 10 bit signed immediate at bit 11
-   "+&" 0 vector element index
-   "+*" 5-bit register vector element index at bit 16
-   "+|" 8-bit mask at bit 16
+   "+d" 5-bit MSA register at bit 6 (FD).
+   "+e" 5-bit MSA register at bit 11 (FS).
+   "+h" 5-bit MSA register at bit 16 (FT).
+   "+k" 5-bit GPR at bit 6.
+   "+l" 5-bit MSA control register at bit 6.
+   "+n" 5-bit MSA control register at bit 11.
+   "+o" 4-bit vector element index at bit 16.
+   "+u" 3-bit vector element index at bit 16.
+   "+v" 2-bit vector element index at bit 16.
+   "+w" 1-bit vector element index at bit 16.
+   "+x" 5-bit shift amount at bit 16.
+   "+T" (-512 .. 511) << 0 at bit 16.
+   "+U" (-512 .. 511) << 1 at bit 16.
+   "+V" (-512 .. 511) << 2 at bit 16.
+   "+W" (-512 .. 511) << 3 at bit 16.
+   "+~" 2-bit LSA/DLSA shift amount from 1 to 4 at bit 6.
+   "+!" 3-bit unsigned bit position at bit 16.
+   "+@" 4-bit unsigned bit position at bit 16.
+   "+#" 6-bit unsigned bit position at bit 16.
+   "+$" 5-bit unsigned immediate at bit 16.
+   "+%" 5-bit signed immediate at bit 16.
+   "+^" 10-bit signed immediate at bit 11.
+   "+&" 0 vector element index.
+   "+*" 5-bit register vector element index at bit 16.
+   "+|" 8-bit mask at bit 16.
 
    MT ASE usage:
    "!" 1-bit usermode flag at bit 10.
@@ -1907,10 +1908,11 @@ extern const int bfd_mips16_num_opcodes;
    "y" 5-bit control target register at bit 21 (RT).
 
    Other:
-   "()" parens surrounding optional value
-   ","  separates operands
-   "+"  start of extension sequence
-   "m"  start of microMIPS extension sequence
+   "()" Parens surrounding optional value.
+   ","  Separates operands.
+   "m"  Start of microMIPS extension sequence.
+   "+"  Start of extension sequence.
+   "-"  Start of extension sequence.
 
    Characters used so far, for quick reference when adding more:
    "12345678 0"
@@ -1918,13 +1920,6 @@ extern const int bfd_mips16_num_opcodes;
    "ABCDEFGHIJKLMN   RST V    "
    "abcd fghijklmnopqrstuvwxyz"
 
-   Extension character sequences used so far ("+" followed by the
-   following), for quick reference when adding more:
-   ""
-   "~!@#$%^&*|"
-   "ABCEFGHJTUVW"
-   "dehijklnouvwx"
-
    Extension character sequences used so far ("m" followed by the
    following), for quick reference when adding more:
    ""
@@ -1932,6 +1927,13 @@ extern const int bfd_mips16_num_opcodes;
    " BCDEFGHIJ LMNOPQ   U WXYZ"
    " bcdefghij lmn pq st   xyz"
 
+   Extension character sequences used so far ("+" followed by the
+   following), for quick reference when adding more:
+   ""
+   "~!@#$%^&*|"
+   "ABC EFGH J         TUVW   "
+   "   de  hijkl no     uvwx  "
+
    Extension character sequences used so far ("-" followed by the
    following), for quick reference when adding more:
    ""
diff --git a/include/opcode/riscv-opc.h b/include/opcode/riscv-opc.h
index f0e1d99..2209e1a 100644
--- a/include/opcode/riscv-opc.h
+++ b/include/opcode/riscv-opc.h
@@ -2275,6 +2275,23 @@
 #define MASK_C_NOT 0xfc7f
 #define MATCH_C_MUL 0x9c41
 #define MASK_C_MUL 0xfc63
+/* Zcmop instructions.  */
+#define MATCH_C_MOP_1 0x6081
+#define MASK_C_MOP_1 0xffff
+#define MATCH_C_MOP_3 0x6181
+#define MASK_C_MOP_3 0xffff
+#define MATCH_C_MOP_5 0x6281
+#define MASK_C_MOP_5 0xffff
+#define MATCH_C_MOP_7 0x6381
+#define MASK_C_MOP_7 0xffff
+#define MATCH_C_MOP_9 0x6481
+#define MASK_C_MOP_9 0xffff
+#define MATCH_C_MOP_11 0x6581
+#define MASK_C_MOP_11 0xffff
+#define MATCH_C_MOP_13 0x6681
+#define MASK_C_MOP_13 0xffff
+#define MATCH_C_MOP_15 0x6781
+#define MASK_C_MOP_15 0xffff
 /* Zcmp instructions.  */
 #define MATCH_CM_PUSH 0xb802
 #define MASK_CM_PUSH 0xff03
@@ -2284,6 +2301,10 @@
 #define MASK_CM_POPRET 0xff03
 #define MATCH_CM_POPRETZ 0xbc02
 #define MASK_CM_POPRETZ 0xff03
+#define MATCH_CM_MVA01S 0xac62
+#define MASK_CM_MVA01S 0xfc63
+#define MATCH_CM_MVSA01 0xac22
+#define MASK_CM_MVSA01 0xfc63
 /* Svinval instruction.  */
 #define MATCH_SINVAL_VMA 0x16000073
 #define MASK_SINVAL_VMA 0xfe007fff
@@ -2364,6 +2385,87 @@
 #define MASK_C_NTL_S1 0xffff
 #define MATCH_C_NTL_ALL 0x9016
 #define MASK_C_NTL_ALL 0xffff
+/* Zimop instructions.  */
+#define MATCH_MOP_R_0 0x81c04073
+#define MASK_MOP_R_0 0xfff0707f
+#define MATCH_MOP_R_1 0x81d04073
+#define MASK_MOP_R_1 0xfff0707f
+#define MATCH_MOP_R_2 0x81e04073
+#define MASK_MOP_R_2 0xfff0707f
+#define MATCH_MOP_R_3 0x81f04073
+#define MASK_MOP_R_3 0xfff0707f
+#define MATCH_MOP_R_4 0x85c04073
+#define MASK_MOP_R_4 0xfff0707f
+#define MATCH_MOP_R_5 0x85d04073
+#define MASK_MOP_R_5 0xfff0707f
+#define MATCH_MOP_R_6 0x85e04073
+#define MASK_MOP_R_6 0xfff0707f
+#define MATCH_MOP_R_7 0x85f04073
+#define MASK_MOP_R_7 0xfff0707f
+#define MATCH_MOP_R_8 0x89c04073
+#define MASK_MOP_R_8 0xfff0707f
+#define MATCH_MOP_R_9 0x89d04073
+#define MASK_MOP_R_9 0xfff0707f
+#define MATCH_MOP_R_10 0x89e04073
+#define MASK_MOP_R_10 0xfff0707f
+#define MATCH_MOP_R_11 0x89f04073
+#define MASK_MOP_R_11 0xfff0707f
+#define MATCH_MOP_R_12 0x8dc04073
+#define MASK_MOP_R_12 0xfff0707f
+#define MATCH_MOP_R_13 0x8dd04073
+#define MASK_MOP_R_13 0xfff0707f
+#define MATCH_MOP_R_14 0x8de04073
+#define MASK_MOP_R_14 0xfff0707f
+#define MATCH_MOP_R_15 0x8df04073
+#define MASK_MOP_R_15 0xfff0707f
+#define MATCH_MOP_R_16 0xc1c04073
+#define MASK_MOP_R_16 0xfff0707f
+#define MATCH_MOP_R_17 0xc1d04073
+#define MASK_MOP_R_17 0xfff0707f
+#define MATCH_MOP_R_18 0xc1e04073
+#define MASK_MOP_R_18 0xfff0707f
+#define MATCH_MOP_R_19 0xc1f04073
+#define MASK_MOP_R_19 0xfff0707f
+#define MATCH_MOP_R_20 0xc5c04073
+#define MASK_MOP_R_20 0xfff0707f
+#define MATCH_MOP_R_21 0xc5d04073
+#define MASK_MOP_R_21 0xfff0707f
+#define MATCH_MOP_R_22 0xc5e04073
+#define MASK_MOP_R_22 0xfff0707f
+#define MATCH_MOP_R_23 0xc5f04073
+#define MASK_MOP_R_23 0xfff0707f
+#define MATCH_MOP_R_24 0xc9c04073
+#define MASK_MOP_R_24 0xfff0707f
+#define MATCH_MOP_R_25 0xc9d04073
+#define MASK_MOP_R_25 0xfff0707f
+#define MATCH_MOP_R_26 0xc9e04073
+#define MASK_MOP_R_26 0xfff0707f
+#define MATCH_MOP_R_27 0xc9f04073
+#define MASK_MOP_R_27 0xfff0707f
+#define MATCH_MOP_R_28 0xcdc04073
+#define MASK_MOP_R_28 0xfff0707f
+#define MATCH_MOP_R_29 0xcdd04073
+#define MASK_MOP_R_29 0xfff0707f
+#define MATCH_MOP_R_30 0xcde04073
+#define MASK_MOP_R_30 0xfff0707f
+#define MATCH_MOP_R_31 0xcdf04073
+#define MASK_MOP_R_31 0xfff0707f
+#define MATCH_MOP_RR_0 0x82004073
+#define MASK_MOP_RR_0 0xfe00707f
+#define MATCH_MOP_RR_1 0x86004073
+#define MASK_MOP_RR_1 0xfe00707f
+#define MATCH_MOP_RR_2 0x8a004073
+#define MASK_MOP_RR_2 0xfe00707f
+#define MATCH_MOP_RR_3 0x8e004073
+#define MASK_MOP_RR_3 0xfe00707f
+#define MATCH_MOP_RR_4 0xc2004073
+#define MASK_MOP_RR_4 0xfe00707f
+#define MATCH_MOP_RR_5 0xc6004073
+#define MASK_MOP_RR_5 0xfe00707f
+#define MATCH_MOP_RR_6 0xca004073
+#define MASK_MOP_RR_6 0xfe00707f
+#define MATCH_MOP_RR_7 0xce004073
+#define MASK_MOP_RR_7 0xfe00707f
 /* Zacas instructions.  */
 #define MATCH_AMOCAS_W 0x2800202f
 #define MASK_AMOCAS_W 0xf800707f
@@ -2552,6 +2654,482 @@
 #define MATCH_CV_SHRR      0x2a00302b
 #define MASK_CV_SWRR       0xfe00707f
 #define MATCH_CV_SWRR      0x2c00302b
+/* Vendor-specific (CORE-V) Xcvbitmanip instructions.  */
+#define MATCH_CV_EXTRACTR     0x3000302b
+#define MATCH_CV_EXTRACTUR    0x3200302b
+#define MATCH_CV_INSERTR      0x3400302b
+#define MATCH_CV_BCLRR        0x3800302b
+#define MATCH_CV_BSETR        0x3a00302b
+#define MATCH_CV_ROR          0x4000302b
+#define MATCH_CV_FF1          0x4200302b
+#define MATCH_CV_FL1          0x4400302b
+#define MATCH_CV_CLB          0x4600302b
+#define MATCH_CV_CNT          0x4800302b
+#define MATCH_CV_EXTRACT      0x5b
+#define MATCH_CV_EXTRACTU     0x4000005b
+#define MATCH_CV_INSERT       0x8000005b
+#define MATCH_CV_BCLR         0x105b
+#define MATCH_CV_BSET         0x4000105b
+#define MATCH_CV_BITREV       0xc000105b
+#define MASK_CV_EXTRACTR      0xfe00707f
+#define MASK_CV_EXTRACTUR     0xfe00707f
+#define MASK_CV_INSERTR       0xfe00707f
+#define MASK_CV_BCLRR         0xfe00707f
+#define MASK_CV_BSETR         0xfe00707f
+#define MASK_CV_ROR           0xfe00707f
+#define MASK_CV_FF1           0xfff0707f
+#define MASK_CV_FL1           0xfff0707f
+#define MASK_CV_CLB           0xfff0707f
+#define MASK_CV_CNT           0xfff0707f
+#define MASK_CV_EXTRACT       0xc000707f
+#define MASK_CV_EXTRACTU      0xc000707f
+#define MASK_CV_INSERT        0xc000707f
+#define MASK_CV_BCLR          0xc000707f
+#define MASK_CV_BSET          0xc000707f
+#define MASK_CV_BITREV        0xf800707f
+/* Vendor-specific (CORE-V) Xcvsimd instructions. */
+#define MATCH_CV_ADD_H             0x7b
+#define MATCH_CV_ADD_B             0x107b
+#define MATCH_CV_ADD_SC_H          0x407b
+#define MATCH_CV_ADD_SC_B          0x507b
+#define MATCH_CV_ADD_SCI_H         0x607b
+#define MATCH_CV_ADD_SCI_B         0x707b
+#define MATCH_CV_SUB_H             0x800007b
+#define MATCH_CV_SUB_B             0x800107b
+#define MATCH_CV_SUB_SC_H          0x800407b
+#define MATCH_CV_SUB_SC_B          0x800507b
+#define MATCH_CV_SUB_SCI_H         0x800607b
+#define MATCH_CV_SUB_SCI_B         0x800707b
+#define MATCH_CV_AVG_H             0x1000007b
+#define MATCH_CV_AVG_B             0x1000107b
+#define MATCH_CV_AVG_SC_H          0x1000407b
+#define MATCH_CV_AVG_SC_B          0x1000507b
+#define MATCH_CV_AVG_SCI_H         0x1000607b
+#define MATCH_CV_AVG_SCI_B         0x1000707b
+#define MATCH_CV_AVGU_H            0x1800007b
+#define MATCH_CV_AVGU_B            0x1800107b
+#define MATCH_CV_AVGU_SC_H         0x1800407b
+#define MATCH_CV_AVGU_SC_B         0x1800507b
+#define MATCH_CV_AVGU_SCI_H        0x1800607b
+#define MATCH_CV_AVGU_SCI_B        0x1800707b
+#define MATCH_CV_MIN_H             0x2000007b
+#define MATCH_CV_MIN_B             0x2000107b
+#define MATCH_CV_MIN_SC_H          0x2000407b
+#define MATCH_CV_MIN_SC_B          0x2000507b
+#define MATCH_CV_MIN_SCI_H         0x2000607b
+#define MATCH_CV_MIN_SCI_B         0x2000707b
+#define MATCH_CV_MINU_H            0x2800007b
+#define MATCH_CV_MINU_B            0x2800107b
+#define MATCH_CV_MINU_SC_H         0x2800407b
+#define MATCH_CV_MINU_SC_B         0x2800507b
+#define MATCH_CV_MINU_SCI_H        0x2800607b
+#define MATCH_CV_MINU_SCI_B        0x2800707b
+#define MATCH_CV_MAX_H             0x3000007b
+#define MATCH_CV_MAX_B             0x3000107b
+#define MATCH_CV_MAX_SC_H          0x3000407b
+#define MATCH_CV_MAX_SC_B          0x3000507b
+#define MATCH_CV_MAX_SCI_H         0x3000607b
+#define MATCH_CV_MAX_SCI_B         0x3000707b
+#define MATCH_CV_MAXU_H            0x3800007b
+#define MATCH_CV_MAXU_B            0x3800107b
+#define MATCH_CV_MAXU_SC_H         0x3800407b
+#define MATCH_CV_MAXU_SC_B         0x3800507b
+#define MATCH_CV_MAXU_SCI_H        0x3800607b
+#define MATCH_CV_MAXU_SCI_B        0x3800707b
+#define MATCH_CV_SRL_H             0x4000007b
+#define MATCH_CV_SRL_B             0x4000107b
+#define MATCH_CV_SRL_SC_H          0x4000407b
+#define MATCH_CV_SRL_SC_B          0x4000507b
+#define MATCH_CV_SRL_SCI_H         0x4000607b
+#define MATCH_CV_SRL_SCI_B         0x4000707b
+#define MATCH_CV_SRA_H             0x4800007b
+#define MATCH_CV_SRA_B             0x4800107b
+#define MATCH_CV_SRA_SC_H          0x4800407b
+#define MATCH_CV_SRA_SC_B          0x4800507b
+#define MATCH_CV_SRA_SCI_H         0x4800607b
+#define MATCH_CV_SRA_SCI_B         0x4800707b
+#define MATCH_CV_SLL_H             0x5000007b
+#define MATCH_CV_SLL_B             0x5000107b
+#define MATCH_CV_SLL_SC_H          0x5000407b
+#define MATCH_CV_SLL_SC_B          0x5000507b
+#define MATCH_CV_SLL_SCI_H         0x5000607b
+#define MATCH_CV_SLL_SCI_B         0x5000707b
+#define MATCH_CV_OR_H              0x5800007b
+#define MATCH_CV_OR_B              0x5800107b
+#define MATCH_CV_OR_SC_H           0x5800407b
+#define MATCH_CV_OR_SC_B           0x5800507b
+#define MATCH_CV_OR_SCI_H          0x5800607b
+#define MATCH_CV_OR_SCI_B          0x5800707b
+#define MATCH_CV_XOR_H             0x6000007b
+#define MATCH_CV_XOR_B             0x6000107b
+#define MATCH_CV_XOR_SC_H          0x6000407b
+#define MATCH_CV_XOR_SC_B          0x6000507b
+#define MATCH_CV_XOR_SCI_H         0x6000607b
+#define MATCH_CV_XOR_SCI_B         0x6000707b
+#define MATCH_CV_AND_H             0x6800007b
+#define MATCH_CV_AND_B             0x6800107b
+#define MATCH_CV_AND_SC_H          0x6800407b
+#define MATCH_CV_AND_SC_B          0x6800507b
+#define MATCH_CV_AND_SCI_H         0x6800607b
+#define MATCH_CV_AND_SCI_B         0x6800707b
+#define MATCH_CV_ABS_H             0x7000007b
+#define MATCH_CV_ABS_B             0x7000107b
+#define MATCH_CV_DOTUP_H           0x8000007b
+#define MATCH_CV_DOTUP_B           0x8000107b
+#define MATCH_CV_DOTUP_SC_H        0x8000407b
+#define MATCH_CV_DOTUP_SC_B        0x8000507b
+#define MATCH_CV_DOTUP_SCI_H       0x8000607b
+#define MATCH_CV_DOTUP_SCI_B       0x8000707b
+#define MATCH_CV_DOTUSP_H          0x8800007b
+#define MATCH_CV_DOTUSP_B          0x8800107b
+#define MATCH_CV_DOTUSP_SC_H       0x8800407b
+#define MATCH_CV_DOTUSP_SC_B       0x8800507b
+#define MATCH_CV_DOTUSP_SCI_H      0x8800607b
+#define MATCH_CV_DOTUSP_SCI_B      0x8800707b
+#define MATCH_CV_DOTSP_H           0x9000007b
+#define MATCH_CV_DOTSP_B           0x9000107b
+#define MATCH_CV_DOTSP_SC_H        0x9000407b
+#define MATCH_CV_DOTSP_SC_B        0x9000507b
+#define MATCH_CV_DOTSP_SCI_H       0x9000607b
+#define MATCH_CV_DOTSP_SCI_B       0x9000707b
+#define MATCH_CV_SDOTUP_H          0x9800007b
+#define MATCH_CV_SDOTUP_B          0x9800107b
+#define MATCH_CV_SDOTUP_SC_H       0x9800407b
+#define MATCH_CV_SDOTUP_SC_B       0x9800507b
+#define MATCH_CV_SDOTUP_SCI_H      0x9800607b
+#define MATCH_CV_SDOTUP_SCI_B      0x9800707b
+#define MATCH_CV_SDOTUSP_H         0xa000007b
+#define MATCH_CV_SDOTUSP_B         0xa000107b
+#define MATCH_CV_SDOTUSP_SC_H      0xa000407b
+#define MATCH_CV_SDOTUSP_SC_B      0xa000507b
+#define MATCH_CV_SDOTUSP_SCI_H     0xa000607b
+#define MATCH_CV_SDOTUSP_SCI_B     0xa000707b
+#define MATCH_CV_SDOTSP_H          0xa800007b
+#define MATCH_CV_SDOTSP_B          0xa800107b
+#define MATCH_CV_SDOTSP_SC_H       0xa800407b
+#define MATCH_CV_SDOTSP_SC_B       0xa800507b
+#define MATCH_CV_SDOTSP_SCI_H      0xa800607b
+#define MATCH_CV_SDOTSP_SCI_B      0xa800707b
+#define MATCH_CV_EXTRACT_H         0xb800007b
+#define MATCH_CV_EXTRACT_B         0xb800107b
+#define MATCH_CV_EXTRACTU_H        0xb800207b
+#define MATCH_CV_EXTRACTU_B        0xb800307b
+#define MATCH_CV_INSERT_H          0xb800407b
+#define MATCH_CV_INSERT_B          0xb800507b
+#define MATCH_CV_SHUFFLE_H         0xc000007b
+#define MATCH_CV_SHUFFLE_B         0xc000107b
+#define MATCH_CV_SHUFFLE_SCI_H     0xc000607b
+#define MATCH_CV_SHUFFLEI0_SCI_B   0xc000707b
+#define MATCH_CV_SHUFFLEI1_SCI_B   0xc800707b
+#define MATCH_CV_SHUFFLEI2_SCI_B   0xd000707b
+#define MATCH_CV_SHUFFLEI3_SCI_B   0xd800707b
+#define MATCH_CV_SHUFFLE2_H        0xe000007b
+#define MATCH_CV_SHUFFLE2_B        0xe000107b
+#define MATCH_CV_PACK              0xf000007b
+#define MATCH_CV_PACK_H            0xf200007b
+#define MATCH_CV_PACKHI_B          0xfa00107b
+#define MATCH_CV_PACKLO_B          0xf800107b
+#define MATCH_CV_CMPEQ_H           0x400007b
+#define MATCH_CV_CMPEQ_B           0x400107b
+#define MATCH_CV_CMPEQ_SC_H        0x400407b
+#define MATCH_CV_CMPEQ_SC_B        0x400507b
+#define MATCH_CV_CMPEQ_SCI_H       0x400607b
+#define MATCH_CV_CMPEQ_SCI_B       0x400707b
+#define MATCH_CV_CMPNE_H           0xc00007b
+#define MATCH_CV_CMPNE_B           0xc00107b
+#define MATCH_CV_CMPNE_SC_H        0xc00407b
+#define MATCH_CV_CMPNE_SC_B        0xc00507b
+#define MATCH_CV_CMPNE_SCI_H       0xc00607b
+#define MATCH_CV_CMPNE_SCI_B       0xc00707b
+#define MATCH_CV_CMPGT_H           0x1400007b
+#define MATCH_CV_CMPGT_B           0x1400107b
+#define MATCH_CV_CMPGT_SC_H        0x1400407b
+#define MATCH_CV_CMPGT_SC_B        0x1400507b
+#define MATCH_CV_CMPGT_SCI_H       0x1400607b
+#define MATCH_CV_CMPGT_SCI_B       0x1400707b
+#define MATCH_CV_CMPGE_H           0x1c00007b
+#define MATCH_CV_CMPGE_B           0x1c00107b
+#define MATCH_CV_CMPGE_SC_H        0x1c00407b
+#define MATCH_CV_CMPGE_SC_B        0x1c00507b
+#define MATCH_CV_CMPGE_SCI_H       0x1c00607b
+#define MATCH_CV_CMPGE_SCI_B       0x1c00707b
+#define MATCH_CV_CMPLT_H           0x2400007b
+#define MATCH_CV_CMPLT_B           0x2400107b
+#define MATCH_CV_CMPLT_SC_H        0x2400407b
+#define MATCH_CV_CMPLT_SC_B        0x2400507b
+#define MATCH_CV_CMPLT_SCI_H       0x2400607b
+#define MATCH_CV_CMPLT_SCI_B       0x2400707b
+#define MATCH_CV_CMPLE_H           0x2c00007b
+#define MATCH_CV_CMPLE_B           0x2c00107b
+#define MATCH_CV_CMPLE_SC_H        0x2c00407b
+#define MATCH_CV_CMPLE_SC_B        0x2c00507b
+#define MATCH_CV_CMPLE_SCI_H       0x2c00607b
+#define MATCH_CV_CMPLE_SCI_B       0x2c00707b
+#define MATCH_CV_CMPGTU_H          0x3400007b
+#define MATCH_CV_CMPGTU_B          0x3400107b
+#define MATCH_CV_CMPGTU_SC_H       0x3400407b
+#define MATCH_CV_CMPGTU_SC_B       0x3400507b
+#define MATCH_CV_CMPGTU_SCI_H      0x3400607b
+#define MATCH_CV_CMPGTU_SCI_B      0x3400707b
+#define MATCH_CV_CMPGEU_H          0x3c00007b
+#define MATCH_CV_CMPGEU_B          0x3c00107b
+#define MATCH_CV_CMPGEU_SC_H       0x3c00407b
+#define MATCH_CV_CMPGEU_SC_B       0x3c00507b
+#define MATCH_CV_CMPGEU_SCI_H      0x3c00607b
+#define MATCH_CV_CMPGEU_SCI_B      0x3c00707b
+#define MATCH_CV_CMPLTU_H          0x4400007b
+#define MATCH_CV_CMPLTU_B          0x4400107b
+#define MATCH_CV_CMPLTU_SC_H       0x4400407b
+#define MATCH_CV_CMPLTU_SC_B       0x4400507b
+#define MATCH_CV_CMPLTU_SCI_H      0x4400607b
+#define MATCH_CV_CMPLTU_SCI_B      0x4400707b
+#define MATCH_CV_CMPLEU_H          0x4c00007b
+#define MATCH_CV_CMPLEU_B          0x4c00107b
+#define MATCH_CV_CMPLEU_SC_H       0x4c00407b
+#define MATCH_CV_CMPLEU_SC_B       0x4c00507b
+#define MATCH_CV_CMPLEU_SCI_H      0x4c00607b
+#define MATCH_CV_CMPLEU_SCI_B      0x4c00707b
+#define MATCH_CV_CPLXMUL_R         0x5400007b
+#define MATCH_CV_CPLXMUL_I         0x5600007b
+#define MATCH_CV_CPLXMUL_R_DIV2    0x5400207b
+#define MATCH_CV_CPLXMUL_I_DIV2    0x5600207b
+#define MATCH_CV_CPLXMUL_R_DIV4    0x5400407b
+#define MATCH_CV_CPLXMUL_I_DIV4    0x5600407b
+#define MATCH_CV_CPLXMUL_R_DIV8    0x5400607b
+#define MATCH_CV_CPLXMUL_I_DIV8    0x5600607b
+#define MATCH_CV_CPLXCONJ          0x5c00007b
+#define MATCH_CV_SUBROTMJ          0x6400007b
+#define MATCH_CV_SUBROTMJ_DIV2     0x6400207b
+#define MATCH_CV_SUBROTMJ_DIV4     0x6400407b
+#define MATCH_CV_SUBROTMJ_DIV8     0x6400607b
+#define MATCH_CV_ADD_DIV2          0x6c00207b
+#define MATCH_CV_ADD_DIV4          0x6c00407b
+#define MATCH_CV_ADD_DIV8          0x6c00607b
+#define MATCH_CV_SUB_DIV2          0x7400207b
+#define MATCH_CV_SUB_DIV4          0x7400407b
+#define MATCH_CV_SUB_DIV8          0x7400607b
+#define MASK_CV_ADD_H              0xfe00707f
+#define MASK_CV_ADD_B              0xfe00707f
+#define MASK_CV_ADD_SC_H           0xfe00707f
+#define MASK_CV_ADD_SC_B           0xfe00707f
+#define MASK_CV_ADD_SCI_H          0xfc00707f
+#define MASK_CV_ADD_SCI_B          0xfc00707f
+#define MASK_CV_SUB_H              0xfe00707f
+#define MASK_CV_SUB_B              0xfe00707f
+#define MASK_CV_SUB_SC_H           0xfe00707f
+#define MASK_CV_SUB_SC_B           0xfe00707f
+#define MASK_CV_SUB_SCI_H          0xfc00707f
+#define MASK_CV_SUB_SCI_B          0xfc00707f
+#define MASK_CV_AVG_H              0xfe00707f
+#define MASK_CV_AVG_B              0xfe00707f
+#define MASK_CV_AVG_SC_H           0xfe00707f
+#define MASK_CV_AVG_SC_B           0xfe00707f
+#define MASK_CV_AVG_SCI_H          0xfc00707f
+#define MASK_CV_AVG_SCI_B          0xfc00707f
+#define MASK_CV_AVGU_H             0xfe00707f
+#define MASK_CV_AVGU_B             0xfe00707f
+#define MASK_CV_AVGU_SC_H          0xfe00707f
+#define MASK_CV_AVGU_SC_B          0xfe00707f
+#define MASK_CV_AVGU_SCI_H         0xfc00707f
+#define MASK_CV_AVGU_SCI_B         0xfc00707f
+#define MASK_CV_MIN_H              0xfe00707f
+#define MASK_CV_MIN_B              0xfe00707f
+#define MASK_CV_MIN_SC_H           0xfe00707f
+#define MASK_CV_MIN_SC_B           0xfe00707f
+#define MASK_CV_MIN_SCI_H          0xfc00707f
+#define MASK_CV_MIN_SCI_B          0xfc00707f
+#define MASK_CV_MINU_H             0xfe00707f
+#define MASK_CV_MINU_B             0xfe00707f
+#define MASK_CV_MINU_SC_H          0xfe00707f
+#define MASK_CV_MINU_SC_B          0xfe00707f
+#define MASK_CV_MINU_SCI_H         0xfc00707f
+#define MASK_CV_MINU_SCI_B         0xfc00707f
+#define MASK_CV_MAX_H              0xfe00707f
+#define MASK_CV_MAX_B              0xfe00707f
+#define MASK_CV_MAX_SC_H           0xfe00707f
+#define MASK_CV_MAX_SC_B           0xfe00707f
+#define MASK_CV_MAX_SCI_H          0xfc00707f
+#define MASK_CV_MAX_SCI_B          0xfc00707f
+#define MASK_CV_MAXU_H             0xfe00707f
+#define MASK_CV_MAXU_B             0xfe00707f
+#define MASK_CV_MAXU_SC_H          0xfe00707f
+#define MASK_CV_MAXU_SC_B          0xfe00707f
+#define MASK_CV_MAXU_SCI_H         0xfc00707f
+#define MASK_CV_MAXU_SCI_B         0xfc00707f
+#define MASK_CV_SRL_H              0xfe00707f
+#define MASK_CV_SRL_B              0xfe00707f
+#define MASK_CV_SRL_SC_H           0xfe00707f
+#define MASK_CV_SRL_SC_B           0xfe00707f
+#define MASK_CV_SRL_SCI_H          0xfc00707f
+#define MASK_CV_SRL_SCI_B          0xfc00707f
+#define MASK_CV_SRA_H              0xfe00707f
+#define MASK_CV_SRA_B              0xfe00707f
+#define MASK_CV_SRA_SC_H           0xfe00707f
+#define MASK_CV_SRA_SC_B           0xfe00707f
+#define MASK_CV_SRA_SCI_H          0xfc00707f
+#define MASK_CV_SRA_SCI_B          0xfc00707f
+#define MASK_CV_SLL_H              0xfe00707f
+#define MASK_CV_SLL_B              0xfe00707f
+#define MASK_CV_SLL_SC_H           0xfe00707f
+#define MASK_CV_SLL_SC_B           0xfe00707f
+#define MASK_CV_SLL_SCI_H          0xfc00707f
+#define MASK_CV_SLL_SCI_B          0xfc00707f
+#define MASK_CV_OR_H               0xfe00707f
+#define MASK_CV_OR_B               0xfe00707f
+#define MASK_CV_OR_SC_H            0xfe00707f
+#define MASK_CV_OR_SC_B            0xfe00707f
+#define MASK_CV_OR_SCI_H           0xfc00707f
+#define MASK_CV_OR_SCI_B           0xfc00707f
+#define MASK_CV_XOR_H              0xfe00707f
+#define MASK_CV_XOR_B              0xfe00707f
+#define MASK_CV_XOR_SC_H           0xfe00707f
+#define MASK_CV_XOR_SC_B           0xfe00707f
+#define MASK_CV_XOR_SCI_H          0xfc00707f
+#define MASK_CV_XOR_SCI_B          0xfc00707f
+#define MASK_CV_AND_H              0xfe00707f
+#define MASK_CV_AND_B              0xfe00707f
+#define MASK_CV_AND_SC_H           0xfe00707f
+#define MASK_CV_AND_SC_B           0xfe00707f
+#define MASK_CV_AND_SCI_H          0xfc00707f
+#define MASK_CV_AND_SCI_B          0xfc00707f
+#define MASK_CV_ABS_H              0xfff0707f
+#define MASK_CV_ABS_B              0xfff0707f
+#define MASK_CV_DOTUP_H            0xfe00707f
+#define MASK_CV_DOTUP_B            0xfe00707f
+#define MASK_CV_DOTUP_SC_H         0xfe00707f
+#define MASK_CV_DOTUP_SC_B         0xfe00707f
+#define MASK_CV_DOTUP_SCI_H        0xfc00707f
+#define MASK_CV_DOTUP_SCI_B        0xfc00707f
+#define MASK_CV_DOTUSP_H           0xfe00707f
+#define MASK_CV_DOTUSP_B           0xfe00707f
+#define MASK_CV_DOTUSP_SC_H        0xfe00707f
+#define MASK_CV_DOTUSP_SC_B        0xfe00707f
+#define MASK_CV_DOTUSP_SCI_H       0xfc00707f
+#define MASK_CV_DOTUSP_SCI_B       0xfc00707f
+#define MASK_CV_DOTSP_H            0xfe00707f
+#define MASK_CV_DOTSP_B            0xfe00707f
+#define MASK_CV_DOTSP_SC_H         0xfe00707f
+#define MASK_CV_DOTSP_SC_B         0xfe00707f
+#define MASK_CV_DOTSP_SCI_H        0xfc00707f
+#define MASK_CV_DOTSP_SCI_B        0xfc00707f
+#define MASK_CV_SDOTUP_H           0xfe00707f
+#define MASK_CV_SDOTUP_B           0xfe00707f
+#define MASK_CV_SDOTUP_SC_H        0xfe00707f
+#define MASK_CV_SDOTUP_SC_B        0xfe00707f
+#define MASK_CV_SDOTUP_SCI_H       0xfc00707f
+#define MASK_CV_SDOTUP_SCI_B       0xfc00707f
+#define MASK_CV_SDOTUSP_H          0xfe00707f
+#define MASK_CV_SDOTUSP_B          0xfe00707f
+#define MASK_CV_SDOTUSP_SC_H       0xfe00707f
+#define MASK_CV_SDOTUSP_SC_B       0xfe00707f
+#define MASK_CV_SDOTUSP_SCI_H      0xfc00707f
+#define MASK_CV_SDOTUSP_SCI_B      0xfc00707f
+#define MASK_CV_SDOTSP_H           0xfe00707f
+#define MASK_CV_SDOTSP_B           0xfe00707f
+#define MASK_CV_SDOTSP_SC_H        0xfe00707f
+#define MASK_CV_SDOTSP_SC_B        0xfe00707f
+#define MASK_CV_SDOTSP_SCI_H       0xfc00707f
+#define MASK_CV_SDOTSP_SCI_B       0xfc00707f
+#define MASK_CV_EXTRACT_H          0xfc00707f
+#define MASK_CV_EXTRACT_B          0xfc00707f
+#define MASK_CV_EXTRACTU_H         0xfc00707f
+#define MASK_CV_EXTRACTU_B         0xfc00707f
+#define MASK_CV_INSERT_H           0xfc00707f
+#define MASK_CV_INSERT_B           0xfc00707f
+#define MASK_CV_SHUFFLE_H          0xfe00707f
+#define MASK_CV_SHUFFLE_B          0xfe00707f
+#define MASK_CV_SHUFFLE_SCI_H      0xfc00707f
+#define MASK_CV_SHUFFLEI0_SCI_B    0xfc00707f
+#define MASK_CV_SHUFFLEI1_SCI_B    0xfc00707f
+#define MASK_CV_SHUFFLEI2_SCI_B    0xfc00707f
+#define MASK_CV_SHUFFLEI3_SCI_B    0xfc00707f
+#define MASK_CV_SHUFFLE2_H         0xfe00707f
+#define MASK_CV_SHUFFLE2_B         0xfe00707f
+#define MASK_CV_PACK               0xfe00707f
+#define MASK_CV_PACK_H             0xfe00707f
+#define MASK_CV_PACKHI_B           0xfe00707f
+#define MASK_CV_PACKLO_B           0xfe00707f
+#define MASK_CV_CMPEQ_H            0xfe00707f
+#define MASK_CV_CMPEQ_B            0xfe00707f
+#define MASK_CV_CMPEQ_SC_H         0xfe00707f
+#define MASK_CV_CMPEQ_SC_B         0xfe00707f
+#define MASK_CV_CMPEQ_SCI_H        0xfc00707f
+#define MASK_CV_CMPEQ_SCI_B        0xfc00707f
+#define MASK_CV_CMPNE_H            0xfe00707f
+#define MASK_CV_CMPNE_B            0xfe00707f
+#define MASK_CV_CMPNE_SC_H         0xfe00707f
+#define MASK_CV_CMPNE_SC_B         0xfe00707f
+#define MASK_CV_CMPNE_SCI_H        0xfc00707f
+#define MASK_CV_CMPNE_SCI_B        0xfc00707f
+#define MASK_CV_CMPGT_H            0xfe00707f
+#define MASK_CV_CMPGT_B            0xfe00707f
+#define MASK_CV_CMPGT_SC_H         0xfe00707f
+#define MASK_CV_CMPGT_SC_B         0xfe00707f
+#define MASK_CV_CMPGT_SCI_H        0xfc00707f
+#define MASK_CV_CMPGT_SCI_B        0xfc00707f
+#define MASK_CV_CMPGE_H            0xfe00707f
+#define MASK_CV_CMPGE_B            0xfe00707f
+#define MASK_CV_CMPGE_SC_H         0xfe00707f
+#define MASK_CV_CMPGE_SC_B         0xfe00707f
+#define MASK_CV_CMPGE_SCI_H        0xfc00707f
+#define MASK_CV_CMPGE_SCI_B        0xfc00707f
+#define MASK_CV_CMPLT_H            0xfe00707f
+#define MASK_CV_CMPLT_B            0xfe00707f
+#define MASK_CV_CMPLT_SC_H         0xfe00707f
+#define MASK_CV_CMPLT_SC_B         0xfe00707f
+#define MASK_CV_CMPLT_SCI_H        0xfc00707f
+#define MASK_CV_CMPLT_SCI_B        0xfc00707f
+#define MASK_CV_CMPLE_H            0xfe00707f
+#define MASK_CV_CMPLE_B            0xfe00707f
+#define MASK_CV_CMPLE_SC_H         0xfe00707f
+#define MASK_CV_CMPLE_SC_B         0xfe00707f
+#define MASK_CV_CMPLE_SCI_H        0xfc00707f
+#define MASK_CV_CMPLE_SCI_B        0xfc00707f
+#define MASK_CV_CMPGTU_H           0xfe00707f
+#define MASK_CV_CMPGTU_B           0xfe00707f
+#define MASK_CV_CMPGTU_SC_H        0xfe00707f
+#define MASK_CV_CMPGTU_SC_B        0xfe00707f
+#define MASK_CV_CMPGTU_SCI_H       0xfc00707f
+#define MASK_CV_CMPGTU_SCI_B       0xfc00707f
+#define MASK_CV_CMPGEU_H           0xfe00707f
+#define MASK_CV_CMPGEU_B           0xfe00707f
+#define MASK_CV_CMPGEU_SC_H        0xfe00707f
+#define MASK_CV_CMPGEU_SC_B        0xfe00707f
+#define MASK_CV_CMPGEU_SCI_H       0xfc00707f
+#define MASK_CV_CMPGEU_SC_B        0xfe00707f
+#define MASK_CV_CMPGEU_SCI_H       0xfc00707f
+#define MASK_CV_CMPGEU_SCI_B       0xfc00707f
+#define MASK_CV_CMPLTU_H           0xfe00707f
+#define MASK_CV_CMPLTU_B           0xfe00707f
+#define MASK_CV_CMPLTU_SC_H        0xfe00707f
+#define MASK_CV_CMPLTU_SC_B        0xfe00707f
+#define MASK_CV_CMPLTU_SCI_H       0xfc00707f
+#define MASK_CV_CMPLTU_SCI_B       0xfc00707f
+#define MASK_CV_CMPLEU_H           0xfe00707f
+#define MASK_CV_CMPLEU_B           0xfe00707f
+#define MASK_CV_CMPLEU_SC_H        0xfe00707f
+#define MASK_CV_CMPLEU_SC_B        0xfe00707f
+#define MASK_CV_CMPLEU_SCI_H       0xfc00707f
+#define MASK_CV_CMPLEU_SCI_B       0xfc00707f
+#define MASK_CV_CPLXMUL_R          0xfe00707f
+#define MASK_CV_CPLXMUL_I          0xfe00707f
+#define MASK_CV_CPLXMUL_R_DIV2     0xfe00707f
+#define MASK_CV_CPLXMUL_I_DIV2     0xfe00707f
+#define MASK_CV_CPLXMUL_R_DIV4     0xfe00707f
+#define MASK_CV_CPLXMUL_I_DIV4     0xfe00707f
+#define MASK_CV_CPLXMUL_R_DIV8     0xfe00707f
+#define MASK_CV_CPLXMUL_I_DIV8     0xfe00707f
+#define MASK_CV_CPLXCONJ           0xfff0707f
+#define MASK_CV_SUBROTMJ           0xfe00707f
+#define MASK_CV_SUBROTMJ_DIV2      0xfe00707f
+#define MASK_CV_SUBROTMJ_DIV4      0xfe00707f
+#define MASK_CV_SUBROTMJ_DIV8      0xfe00707f
+#define MASK_CV_ADD_DIV2           0xfe00707f
+#define MASK_CV_ADD_DIV4           0xfe00707f
+#define MASK_CV_ADD_DIV8           0xfe00707f
+#define MASK_CV_SUB_DIV2           0xfe00707f
+#define MASK_CV_SUB_DIV4           0xfe00707f
+#define MASK_CV_SUB_DIV8           0xfe00707f
 /* Vendor-specific (T-Head) XTheadBa instructions.  */
 #define MATCH_TH_ADDSL 0x0000100b
 #define MASK_TH_ADDSL 0xf800707f
@@ -3496,6 +4074,11 @@
 #define CSR_MINSTRETCFG  0x322
 #define CSR_MCYCLECFGH   0x721
 #define CSR_MINSTRETCFGH 0x722
+/* Smrnmi extension.  */
+#define CSR_MNSCRATCH       0x740
+#define CSR_MNEPC           0x741
+#define CSR_MNCAUSE         0x742
+#define CSR_MNSTATUS        0x744
 /* Smstateen extension */
 #define CSR_MSTATEEN0 0x30c
 #define CSR_MSTATEEN1 0x30d
@@ -4014,6 +4597,47 @@ DECLARE_INSN(c_ntl_p1, MATCH_C_NTL_P1, MASK_C_NTL_P1)
 DECLARE_INSN(c_ntl_pall, MATCH_C_NTL_PALL, MASK_C_NTL_PALL)
 DECLARE_INSN(c_ntl_s1, MATCH_C_NTL_S1, MASK_C_NTL_S1)
 DECLARE_INSN(c_ntl_all, MATCH_C_NTL_ALL, MASK_C_NTL_ALL)
+/* Zimop instructions.  */
+DECLARE_INSN(MOP_R_0, MATCH_MOP_R_0, MASK_MOP_R_0)
+DECLARE_INSN(MOP_R_1, MATCH_MOP_R_1, MASK_MOP_R_1)
+DECLARE_INSN(MOP_R_2, MATCH_MOP_R_2, MASK_MOP_R_2)
+DECLARE_INSN(MOP_R_3, MATCH_MOP_R_3, MASK_MOP_R_3)
+DECLARE_INSN(MOP_R_4, MATCH_MOP_R_4, MASK_MOP_R_4)
+DECLARE_INSN(MOP_R_5, MATCH_MOP_R_5, MASK_MOP_R_5)
+DECLARE_INSN(MOP_R_6, MATCH_MOP_R_6, MASK_MOP_R_6)
+DECLARE_INSN(MOP_R_7, MATCH_MOP_R_7, MASK_MOP_R_7)
+DECLARE_INSN(MOP_R_8, MATCH_MOP_R_8, MASK_MOP_R_8)
+DECLARE_INSN(MOP_R_9, MATCH_MOP_R_9, MASK_MOP_R_9)
+DECLARE_INSN(MOP_R_10, MATCH_MOP_R_10, MASK_MOP_R_10)
+DECLARE_INSN(MOP_R_11, MATCH_MOP_R_11, MASK_MOP_R_11)
+DECLARE_INSN(MOP_R_12, MATCH_MOP_R_12, MASK_MOP_R_12)
+DECLARE_INSN(MOP_R_13, MATCH_MOP_R_13, MASK_MOP_R_13)
+DECLARE_INSN(MOP_R_14, MATCH_MOP_R_14, MASK_MOP_R_14)
+DECLARE_INSN(MOP_R_15, MATCH_MOP_R_15, MASK_MOP_R_15)
+DECLARE_INSN(MOP_R_16, MATCH_MOP_R_16, MASK_MOP_R_16)
+DECLARE_INSN(MOP_R_17, MATCH_MOP_R_17, MASK_MOP_R_17)
+DECLARE_INSN(MOP_R_18, MATCH_MOP_R_18, MASK_MOP_R_18)
+DECLARE_INSN(MOP_R_19, MATCH_MOP_R_19, MASK_MOP_R_19)
+DECLARE_INSN(MOP_R_20, MATCH_MOP_R_20, MASK_MOP_R_20)
+DECLARE_INSN(MOP_R_21, MATCH_MOP_R_21, MASK_MOP_R_21)
+DECLARE_INSN(MOP_R_22, MATCH_MOP_R_22, MASK_MOP_R_22)
+DECLARE_INSN(MOP_R_23, MATCH_MOP_R_23, MASK_MOP_R_23)
+DECLARE_INSN(MOP_R_24, MATCH_MOP_R_24, MASK_MOP_R_24)
+DECLARE_INSN(MOP_R_25, MATCH_MOP_R_25, MASK_MOP_R_25)
+DECLARE_INSN(MOP_R_26, MATCH_MOP_R_26, MASK_MOP_R_26)
+DECLARE_INSN(MOP_R_27, MATCH_MOP_R_27, MASK_MOP_R_27)
+DECLARE_INSN(MOP_R_28, MATCH_MOP_R_28, MASK_MOP_R_28)
+DECLARE_INSN(MOP_R_29, MATCH_MOP_R_29, MASK_MOP_R_29)
+DECLARE_INSN(MOP_R_30, MATCH_MOP_R_30, MASK_MOP_R_30)
+DECLARE_INSN(MOP_R_31, MATCH_MOP_R_31, MASK_MOP_R_31)
+DECLARE_INSN(MOP_RR_0, MATCH_MOP_RR_0, MASK_MOP_RR_0)
+DECLARE_INSN(MOP_RR_1, MATCH_MOP_RR_1, MASK_MOP_RR_1)
+DECLARE_INSN(MOP_RR_2, MATCH_MOP_RR_2, MASK_MOP_RR_2)
+DECLARE_INSN(MOP_RR_3, MATCH_MOP_RR_3, MASK_MOP_RR_3)
+DECLARE_INSN(MOP_RR_4, MATCH_MOP_RR_4, MASK_MOP_RR_4)
+DECLARE_INSN(MOP_RR_5, MATCH_MOP_RR_5, MASK_MOP_RR_5)
+DECLARE_INSN(MOP_RR_6, MATCH_MOP_RR_6, MASK_MOP_RR_6)
+DECLARE_INSN(MOP_RR_7, MATCH_MOP_RR_7, MASK_MOP_RR_7)
 /* Zacas instructions.  */
 DECLARE_INSN(amocas_w, MATCH_AMOCAS_W, MASK_AMOCAS_W)
 DECLARE_INSN(amocas_d, MATCH_AMOCAS_D, MASK_AMOCAS_D)
@@ -4091,11 +4715,22 @@ DECLARE_INSN(c_lhu, MATCH_C_LHU, MASK_C_LHU)
 DECLARE_INSN(c_lh, MATCH_C_LH, MASK_C_LH)
 DECLARE_INSN(c_sb, MATCH_C_SB, MASK_C_SB)
 DECLARE_INSN(c_sh, MATCH_C_SH, MASK_C_SH)
+/* Zcmop instructions.  */
+DECLARE_INSN(c_mop_1, MATCH_C_MOP_1, MASK_C_MOP_1)
+DECLARE_INSN(c_mop_3, MATCH_C_MOP_3, MASK_C_MOP_3)
+DECLARE_INSN(c_mop_5, MATCH_C_MOP_5, MASK_C_MOP_5)
+DECLARE_INSN(c_mop_7, MATCH_C_MOP_7, MASK_C_MOP_7)
+DECLARE_INSN(c_mop_9, MATCH_C_MOP_9, MASK_C_MOP_9)
+DECLARE_INSN(c_mop_11, MATCH_C_MOP_11, MASK_C_MOP_11)
+DECLARE_INSN(c_mop_13, MATCH_C_MOP_13, MASK_C_MOP_13)
+DECLARE_INSN(c_mop_15, MATCH_C_MOP_15, MASK_C_MOP_15)
 /* Zcmp instructions.  */
 DECLARE_INSN(cm_push, MATCH_CM_PUSH, MASK_CM_PUSH)
 DECLARE_INSN(cm_pop, MATCH_CM_POP, MASK_CM_POP)
 DECLARE_INSN(cm_popret, MATCH_CM_POPRET, MASK_CM_POPRET)
 DECLARE_INSN(cm_popretz, MATCH_CM_POPRETZ, MASK_CM_POPRETZ)
+DECLARE_INSN(cm_mvsa01, MATCH_CM_MVSA01, MASK_CM_MVSA01)
+DECLARE_INSN(cm_mva01s, MATCH_CM_MVA01S, MASK_CM_MVA01S)
 /* Vendor-specific (T-Head) XTheadBa instructions.  */
 DECLARE_INSN(th_addsl, MATCH_TH_ADDSL, MASK_TH_ADDSL)
 /* Vendor-specific (T-Head) XTheadBb instructions.  */
@@ -4542,6 +5177,11 @@ DECLARE_CSR(mcyclecfg, CSR_MCYCLECFG, CSR_CLASS_SMCNTRPMF, PRIV_SPEC_CLASS_1P10,
 DECLARE_CSR(minstretcfg, CSR_MINSTRETCFG, CSR_CLASS_SMCNTRPMF, PRIV_SPEC_CLASS_1P10, PRIV_SPEC_CLASS_DRAFT)
 DECLARE_CSR(mcyclecfgh, CSR_MCYCLECFGH, CSR_CLASS_SMCNTRPMF_32, PRIV_SPEC_CLASS_1P10, PRIV_SPEC_CLASS_DRAFT)
 DECLARE_CSR(minstretcfgh, CSR_MINSTRETCFGH, CSR_CLASS_SMCNTRPMF_32, PRIV_SPEC_CLASS_1P10, PRIV_SPEC_CLASS_DRAFT)
+/* Smrnmi extensions.  */
+DECLARE_CSR(mnepc, CSR_MNEPC, CSR_CLASS_SMRNMI, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(mncause, CSR_MNCAUSE, CSR_CLASS_SMRNMI, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(mnscratch, CSR_MNSCRATCH, CSR_CLASS_SMRNMI, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(mnstatus, CSR_MNSTATUS, CSR_CLASS_SMRNMI, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
 /* Smstateen/Ssstateen extensions.  */
 DECLARE_CSR(mstateen0, CSR_MSTATEEN0, CSR_CLASS_SMSTATEEN, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
 DECLARE_CSR(mstateen1, CSR_MSTATEEN1, CSR_CLASS_SMSTATEEN, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
diff --git a/include/opcode/riscv.h b/include/opcode/riscv.h
index fedd478..7df1517 100644
--- a/include/opcode/riscv.h
+++ b/include/opcode/riscv.h
@@ -122,6 +122,14 @@ static inline unsigned int riscv_insn_length (insn_t insn)
   (RV_X(x, 25, 5))
 #define EXTRACT_CV_BI_IMM5(x) \
   (RV_X(x, 20, 5) | (RV_IMM_SIGN_N(x, 20, 5) << 5))
+#define EXTRACT_CV_BITMANIP_UIMM5(x) \
+  (RV_X(x, 25, 5))
+#define EXTRACT_CV_BITMANIP_UIMM2(x) \
+  (RV_X(x, 25, 2))
+#define EXTRACT_CV_SIMD_IMM6(x) \
+  ((RV_X(x, 25, 1)) | (RV_X(x, 20, 5) << 1) | (RV_IMM_SIGN_N(x, 20, 5) << 5))
+#define EXTRACT_CV_SIMD_UIMM6(x) \
+  ((RV_X(x, 25, 1)) | (RV_X(x, 20, 5) << 1))
 
 #define ENCODE_ITYPE_IMM(x) \
   (RV_X(x, 0, 12) << 20)
@@ -180,6 +188,14 @@ static inline unsigned int riscv_insn_length (insn_t insn)
   (RV_X(x, 0, 5) << 20)
 #define ENCODE_CV_IS3_UIMM5(x) \
   (RV_X(x, 0, 5) << 25)
+#define ENCODE_CV_BITMANIP_UIMM5(x) \
+  (RV_X(x, 0, 5) << 25)
+#define ENCODE_CV_BITMANIP_UIMM2(x) \
+  (RV_X(x, 0, 2) << 25)
+#define ENCODE_CV_SIMD_IMM6(x) \
+  ((RV_X(x, 0, 1) << 25) | (RV_X(x, 1, 5) << 20))
+#define ENCODE_CV_SIMD_UIMM6(x) \
+  ((RV_X(x, 0, 1) << 25) | (RV_X(x, 1, 5) << 20))
 
 #define VALID_ITYPE_IMM(x) (EXTRACT_ITYPE_IMM(ENCODE_ITYPE_IMM(x)) == (x))
 #define VALID_STYPE_IMM(x) (EXTRACT_STYPE_IMM(ENCODE_STYPE_IMM(x)) == (x))
@@ -349,6 +365,10 @@ static inline unsigned int riscv_insn_length (insn_t insn)
 #define OP_MASK_REG_LIST	0xf
 #define OP_SH_REG_LIST		4
 #define ZCMP_SP_ALIGNMENT	16
+#define OP_MASK_SREG1		0x7
+#define OP_SH_SREG1		7
+#define OP_MASK_SREG2		0x7
+#define OP_SH_SREG2		2
 
 #define NVECR 32
 #define NVECM 1
@@ -370,7 +390,10 @@ static inline unsigned int riscv_insn_length (insn_t insn)
 #define X_T2 7
 #define X_S0 8
 #define X_S1 9
+#define X_A0 10
+#define X_A1 11
 #define X_S2 18
+#define X_S7 23
 #define X_S10 26
 #define X_S11 27
 #define X_T3 28
@@ -418,6 +441,11 @@ static inline unsigned int riscv_insn_length (insn_t insn)
 /* The maximal number of subset can be required.  */
 #define MAX_SUBSET_NUM 4
 
+/* The range of sregs.  */
+#define RISCV_SREG_0_7(REGNO) \
+	((REGNO == X_S0 || REGNO == X_S1) \
+	 || (REGNO >= X_S2 && REGNO <= X_S7))
+
 /* All RISC-V instructions belong to at least one of these classes.  */
 enum riscv_insn_class
 {
@@ -437,6 +465,7 @@ enum riscv_insn_class
   INSN_CLASS_ZIHINTNTL,
   INSN_CLASS_ZIHINTNTL_AND_C,
   INSN_CLASS_ZIHINTPAUSE,
+  INSN_CLASS_ZIMOP,
   INSN_CLASS_ZMMUL,
   INSN_CLASS_ZAAMO,
   INSN_CLASS_ZALRSC,
@@ -486,6 +515,7 @@ enum riscv_insn_class
   INSN_CLASS_ZCB_AND_ZBA,
   INSN_CLASS_ZCB_AND_ZBB,
   INSN_CLASS_ZCB_AND_ZMMUL,
+  INSN_CLASS_ZCMOP,
   INSN_CLASS_ZCMP,
   INSN_CLASS_SVINVAL,
   INSN_CLASS_ZICBOM,
@@ -495,11 +525,13 @@ enum riscv_insn_class
   INSN_CLASS_ZACAS,
   INSN_CLASS_ZABHA_AND_ZACAS,
   INSN_CLASS_H,
-  INSN_CLASS_XCVMAC,
   INSN_CLASS_XCVALU,
-  INSN_CLASS_XCVELW,
   INSN_CLASS_XCVBI,
+  INSN_CLASS_XCVBITMANIP,
+  INSN_CLASS_XCVELW,
+  INSN_CLASS_XCVMAC,
   INSN_CLASS_XCVMEM,
+  INSN_CLASS_XCVSIMD,
   INSN_CLASS_XTHEADBA,
   INSN_CLASS_XTHEADBB,
   INSN_CLASS_XTHEADBS,
diff --git a/include/opcode/s390.h b/include/opcode/s390.h
index e5dfcb2..8322882 100644
--- a/include/opcode/s390.h
+++ b/include/opcode/s390.h
@@ -45,6 +45,7 @@ enum s390_opcode_cpu_val
     S390_OPCODE_ARCH12,
     S390_OPCODE_ARCH13,
     S390_OPCODE_ARCH14,
+    S390_OPCODE_ARCH15,
     S390_OPCODE_MAXCPU
   };
 
@@ -193,8 +194,4 @@ extern const struct s390_operand s390_operands[];
 
 #define S390_OPERAND_CP16 0x1000
 
-#define S390_OPERAND_OR1 0x2000
-#define S390_OPERAND_OR2 0x4000
-#define S390_OPERAND_OR8 0x8000
-
 #endif /* S390_H */
diff --git a/ld/NEWS b/ld/NEWS
index bad8c3e..1f14dd6 100644
--- a/ld/NEWS
+++ b/ld/NEWS
@@ -1,5 +1,10 @@
 -*- text -*-
 
+Changes in 2.44:
+
+* Add a "--build-id=xx" option, if built with the xxhash library.  This
+  produces a 128-bit hash, 2-4x faster than md5 or sha1.
+
 Changes in 2.43:
 
 * Add support for LoongArch DT_RELR (compressed R_LARCH_RELATIVE).
diff --git a/ld/config.in b/ld/config.in
index f7c9da3..f2aaf0a 100644
--- a/ld/config.in
+++ b/ld/config.in
@@ -269,6 +269,9 @@
 /* Version number of package */
 #undef VERSION
 
+/* whether to use inline xxhash */
+#undef WITH_XXHASH
+
 /* Define to 1 if `lex' declares `yytext' as a `char *' by default, not a
    `char[]'. */
 #undef YYTEXT_POINTER
diff --git a/ld/configure b/ld/configure
index bf58214..d905f1c 100755
--- a/ld/configure
+++ b/ld/configure
@@ -872,6 +872,7 @@ with_libiconv_prefix
 with_libiconv_type
 with_libintl_prefix
 with_libintl_type
+with_xxhash
 with_system_zlib
 with_zstd
 '
@@ -1589,6 +1590,8 @@ Optional Packages:
   --with-libintl-prefix[=DIR]  search for libintl in DIR/include and DIR/lib
   --without-libintl-prefix     don't search for libintl in includedir and libdir
   --with-libintl-type=TYPE     type of library to search for (auto/static/shared)
+  --with-xxhash           use inlined libxxhash for hashing (faster)
+                          (auto/yes/no)
   --with-system-zlib      use installed libz
   --with-zstd             support zstd compressed debug sections
                           (default=auto)
@@ -11683,7 +11686,7 @@ else
   lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
   lt_status=$lt_dlunknown
   cat > conftest.$ac_ext <<_LT_EOF
-#line 11686 "configure"
+#line 11689 "configure"
 #include "confdefs.h"
 
 #if HAVE_DLFCN_H
@@ -11789,7 +11792,7 @@ else
   lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
   lt_status=$lt_dlunknown
   cat > conftest.$ac_ext <<_LT_EOF
-#line 11792 "configure"
+#line 11795 "configure"
 #include "confdefs.h"
 
 #if HAVE_DLFCN_H
@@ -19086,6 +19089,45 @@ $as_echo "#define HAVE_DECL_GETOPT 1" >>confdefs.h
 
 fi
 
+{ $as_echo "$as_me:${as_lineno-$LINENO}: checking whether to use xxhash" >&5
+$as_echo_n "checking whether to use xxhash... " >&6; }
+
+# Check whether --with-xxhash was given.
+if test "${with_xxhash+set}" = set; then :
+  withval=$with_xxhash;
+else
+  with_xxhash=auto
+fi
+
+if test "x$with_xxhash" != "xno"; then
+  cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+
+#define XXH_INLINE_ALL
+#include <xxhash.h>
+XXH128_hash_t r;
+void foo (void) { r = XXH128("foo", 3, 0); }
+
+_ACEOF
+if ac_fn_c_try_compile "$LINENO"; then :
+
+  with_xxhash=yes
+
+$as_echo "#define WITH_XXHASH 1" >>confdefs.h
+
+
+else
+
+  if test "$with_xxhash" = yes; then
+    as_fn_error $? "xxhash is missing or unusable" "$LINENO" 5
+  fi
+  with_xxhash=no
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext
+fi
+{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $with_xxhash" >&5
+$as_echo "$with_xxhash" >&6; }
+
 # Link in zlib/zstd if we can.  This allows us to read and write
 # compressed debug sections.
 
diff --git a/ld/configure.ac b/ld/configure.ac
index bdf51a0..5d10b38 100644
--- a/ld/configure.ac
+++ b/ld/configure.ac
@@ -424,6 +424,28 @@ if test $ld_cv_decl_getopt_unistd_h = yes; then
 	    [Is the prototype for getopt in <unistd.h> in the expected format?])
 fi
 
+dnl xxhash support from gdbsupport/common.m4
+AC_MSG_CHECKING([whether to use xxhash])
+AC_ARG_WITH(xxhash,
+  AS_HELP_STRING([--with-xxhash], [use inlined libxxhash for hashing (faster) (auto/yes/no)]),
+  [], [with_xxhash=auto])
+if test "x$with_xxhash" != "xno"; then
+  AC_COMPILE_IFELSE([AC_LANG_SOURCE([
+#define XXH_INLINE_ALL
+#include <xxhash.h>
+XXH128_hash_t r;
+void foo (void) { r = XXH128("foo", 3, 0); }
+])],[
+  with_xxhash=yes
+  AC_DEFINE([WITH_XXHASH], 1, [whether to use inline xxhash])
+],[
+  if test "$with_xxhash" = yes; then
+    AC_MSG_ERROR([xxhash is missing or unusable])
+  fi
+  with_xxhash=no])
+fi
+AC_MSG_RESULT([$with_xxhash])
+
 # Link in zlib/zstd if we can.  This allows us to read and write
 # compressed debug sections.
 AM_ZLIB
diff --git a/ld/emultempl/elf.em b/ld/emultempl/elf.em
index 863657e..2e86572 100644
--- a/ld/emultempl/elf.em
+++ b/ld/emultempl/elf.em
@@ -1084,6 +1084,7 @@ fragment <<EOF
 	link_info.relro = false;
 EOF
 fi
+fi
 fragment <<EOF
       else if (strcmp (optarg, "separate-code") == 0)
 	link_info.separate_code = true;
@@ -1100,7 +1101,6 @@ fragment <<EOF
       else if (strcmp (optarg, "textoff") == 0)
 	link_info.textrel_check = textrel_check_none;
 EOF
-fi
 
 if test -n "$PARSE_AND_LIST_ARGS_CASE_Z" ; then
 fragment <<EOF
diff --git a/ld/emultempl/loongarchelf.em b/ld/emultempl/loongarchelf.em
index 2da4058..8a1a898 100644
--- a/ld/emultempl/loongarchelf.em
+++ b/ld/emultempl/loongarchelf.em
@@ -102,23 +102,7 @@ gld${EMULATION_NAME}_after_allocation (void)
   ldelf_map_segments (need_layout);
 }
 
-/* This is a convenient point to tell BFD about target specific flags.
-   After the output has been created, but before inputs are read.  */
-
-static void
-larch_create_output_section_statements (void)
-{
-  /* See PR 22920 for an example of why this is necessary.  */
-  if (strstr (bfd_get_target (link_info.output_bfd), "loong") == NULL)
-    {
-      einfo (_("%F%P: error: cannot change output format"
-	       " whilst linking %s binaries\n"), "LoongArch");
-      return;
-    }
-}
-
 EOF
 
 LDEMUL_BEFORE_ALLOCATION=larch_elf_before_allocation
 LDEMUL_AFTER_ALLOCATION=gld${EMULATION_NAME}_after_allocation
-LDEMUL_CREATE_OUTPUT_SECTION_STATEMENTS=larch_create_output_section_statements
diff --git a/ld/genscripts.sh b/ld/genscripts.sh
index a726b15..556f03e 100755
--- a/ld/genscripts.sh
+++ b/ld/genscripts.sh
@@ -64,50 +64,50 @@
 # following suffixes might be generated as well:
 #
 # xdwe:   -pie    -z combreloc -z separate-code -z relro -z now
-# xdwer:  -pie    -z combreloc -z separate-code -z relro -z now -z one-rosegment
+# xdwer:  -pie    -z combreloc -z separate-code -z relro -z now --rosegment
 # xdw:    -pie    -z combreloc                  -z relro -z now
 # xdceo:  -pie    -z combreloc -z separate-code -z relro
-# xdceor: -pie    -z combreloc -z separate-code -z relro        -z one-rosegment
+# xdceor: -pie    -z combreloc -z separate-code -z relro        --rosegment
 # xdce:   -pie    -z combreloc -z separate-code
-# xdcer:  -pie    -z combreloc -z separate-code                 -z one-rosegment
+# xdcer:  -pie    -z combreloc -z separate-code                 --rosegment
 # xdco:   -pie    -z combreloc                  -z relro
 # xdc:    -pie    -z combreloc
 # xdeo:   -pie                 -z separate-code -z relro
-# xdeor:  -pie                 -z separate-code -z relro        -z one-rosegment
+# xdeor:  -pie                 -z separate-code -z relro        --rosegment
 # xde:    -pie                 -z separate-code
-# xder:   -pie                 -z separate-code                 -z one-rosegment
+# xder:   -pie                 -z separate-code                 --rosegment
 # xdo:    -pie                                  -z relro
 # xd:     -pie
 #
 # xswe:   -shared -z combreloc -z separate-code -z relro -z now
-# xswer:  -shared -z combreloc -z separate-code -z relro -z now -z one-rosegment
+# xswer:  -shared -z combreloc -z separate-code -z relro -z now --rosegment
 # xsw:    -shared -z combreloc                  -z relro -z now
 # xsceo:  -shared -z combreloc -z separate-code -z relro
-# xsceor: -shared -z combreloc -z separate-code -z relro        -z one-rosegment
+# xsceor: -shared -z combreloc -z separate-code -z relro        --rosegment
 # xsce:   -shared -z combreloc -z separate-code
-# xscer:  -shared -z combreloc -z separate-code                 -z one-rosegment
+# xscer:  -shared -z combreloc -z separate-code                 --rosegment
 # xsco:   -shared -z combreloc                  -z relro
 # xsc:    -shared -z combreloc
 # xseo:   -shared              -z separate-code -z relro
-# xseor:  -shared              -z separate-code -z relro        -z one-rosegment
+# xseor:  -shared              -z separate-code -z relro        --rosegment
 # xse:    -shared              -z separate-code
-# xser:   -shared              -z separate-code                 -z one-rosegment
+# xser:   -shared              -z separate-code                 --rosegment
 # xso:    -shared                               -z relro
 # xs:     -shared
 #
-# xwe:            -z combreloc -z separate-code -z relro -z now -z one-rosegment
+# xwe:            -z combreloc -z separate-code -z relro -z now --rosegment
 # xwer:           -z combreloc -z separate-code -z relro -z now
 # xw:             -z combreloc                  -z relro -z now
 # xceo:           -z combreloc -z separate-code -z relro
-# xceor:          -z combreloc -z separate-code -z relro        -z one-rosegment
+# xceor:          -z combreloc -z separate-code -z relro        --rosegment
 # xce:            -z combreloc -z separate-code
-# xcer:           -z combreloc -z separate-code                 -z one-rosegment
+# xcer:           -z combreloc -z separate-code                 --rosegment
 # xco:            -z combreloc                  -z relro
 # xc:             -z combreloc
 # xeo:                         -z separate-code -z relro
-# xeor:                        -z separate-code -z relro        -z one-rosegment
+# xeor:                        -z separate-code -z relro        --rosegment
 # xe:                          -z separate-code
-# xer:                         -z separate-code                 -z one-rosegment
+# xer:                         -z separate-code                 --rosegment
 # xo:                                           -z relro
 #
 #
@@ -343,7 +343,7 @@ LD_FLAG=textonly
 ) | sed -e '/^ *$/d;s/[	 ]*$//' > ldscripts/${EMULATION_NAME}.xe
 
 LD_FLAG=rotextonly
-( echo "/* Script for -z separate-code -z one-rosegment */"
+( echo "/* Script for -z separate-code --rosegment */"
   source_sh ${CUSTOMIZER_SCRIPT}
   source_sh ${srcdir}/scripttempl/${SCRIPT_NAME}.sc
 ) | sed -e '/^ *$/d;s/[	 ]*$//' > ldscripts/${EMULATION_NAME}.xer
@@ -364,7 +364,7 @@ if test -n "$GENERATE_RELRO_SCRIPT"; then
     ) | sed -e '/^ *$/d;s/[	 ]*$//' > ldscripts/${EMULATION_NAME}.xeo
 
     LD_FLAG=rotextonly
-    ( echo "/* Script for -z separate-code -z relro -z one-rosegment */"
+    ( echo "/* Script for -z separate-code -z relro --rosegment */"
       source_sh ${CUSTOMIZER_SCRIPT}
       source_sh ${srcdir}/scripttempl/${SCRIPT_NAME}.sc
     ) | sed -e '/^ *$/d;s/[	 ]*$//' > ldscripts/${EMULATION_NAME}.xeor
@@ -406,7 +406,7 @@ if test -n "$GENERATE_COMBRELOC_SCRIPT"; then
 
   LD_FLAG=roctextonly
   COMBRELOC=ldscripts/${EMULATION_NAME}.xcer.tmp
-  ( echo "/* Script for -z combreloc -z separate-code -z one-rosegment */"
+  ( echo "/* Script for -z combreloc -z separate-code --rosegment */"
     source_sh ${CUSTOMIZER_SCRIPT}
     source_sh ${srcdir}/scripttempl/${SCRIPT_NAME}.sc
   ) | sed -e '/^ *$/d;s/[	 ]*$//' > ldscripts/${EMULATION_NAME}.xcer
@@ -433,7 +433,7 @@ if test -n "$GENERATE_COMBRELOC_SCRIPT"; then
 
   LD_FLAG=rowtextonly
   COMBRELOC=ldscripts/${EMULATION_NAME}.xwer.tmp
-  ( echo "/* Script for -z combreloc -z separate-code -z relro -z now -z one-rosegment */"
+  ( echo "/* Script for -z combreloc -z separate-code -z relro -z now --rosegment */"
     source_sh ${CUSTOMIZER_SCRIPT}
     source_sh ${srcdir}/scripttempl/${SCRIPT_NAME}.sc
   ) | sed -e '/^ *$/d;s/[	 ]*$//' > ldscripts/${EMULATION_NAME}.xwer
@@ -464,7 +464,7 @@ if test -n "$GENERATE_COMBRELOC_SCRIPT"; then
 
       LD_FLAG=roctextonly
       COMBRELOC=ldscripts/${EMULATION_NAME}.xceor.tmp
-      ( echo "/* Script for -z combreloc -z separate-code -z relro -z one-rosegment */"
+      ( echo "/* Script for -z combreloc -z separate-code -z relro --rosegment */"
 	source_sh ${CUSTOMIZER_SCRIPT}
 	source_sh ${srcdir}/scripttempl/${SCRIPT_NAME}.sc
       ) | sed -e '/^ *$/d;s/[    ]*$//' > ldscripts/${EMULATION_NAME}.xceor
@@ -492,7 +492,7 @@ if test -n "$GENERATE_SHLIB_SCRIPT"; then
   ) | sed -e '/^ *$/d;s/[	 ]*$//' > ldscripts/${EMULATION_NAME}.xse
 
   LD_FLAG=rosharedtextonly
-  ( echo "/* Script for -shared -z separate-code -z one-rosegment */"
+  ( echo "/* Script for -shared -z separate-code --rosegment */"
     source_sh ${CUSTOMIZER_SCRIPT}
     source_sh ${srcdir}/scripttempl/${SCRIPT_NAME}.sc
   ) | sed -e '/^ *$/d;s/[	 ]*$//' > ldscripts/${EMULATION_NAME}.xser
@@ -513,7 +513,7 @@ if test -n "$GENERATE_SHLIB_SCRIPT"; then
       ) | sed -e '/^ *$/d;s/[	 ]*$//' > ldscripts/${EMULATION_NAME}.xseo
 
       LD_FLAG=rosharedtextonly
-      ( echo "/* Script for -shared -z separate-code -z relro -z one-rosegment */"
+      ( echo "/* Script for -shared -z separate-code -z relro --rosegment */"
 	source_sh ${CUSTOMIZER_SCRIPT}
 	source_sh ${srcdir}/scripttempl/${SCRIPT_NAME}.sc
       ) | sed -e '/^ *$/d;s/[	 ]*$//' > ldscripts/${EMULATION_NAME}.xseor
@@ -541,7 +541,7 @@ if test -n "$GENERATE_SHLIB_SCRIPT"; then
 
     LD_FLAG=rocsharedtextonly
     COMBRELOC=ldscripts/${EMULATION_NAME}.xscer.tmp
-    ( echo "/* Script for -shared -z combreloc -z separate-code -z one-rosegment */"
+    ( echo "/* Script for -shared -z combreloc -z separate-code --rosegment */"
       source_sh ${CUSTOMIZER_SCRIPT}
       source_sh ${srcdir}/scripttempl/${SCRIPT_NAME}.sc
     ) | sed -e '/^ *$/d;s/[	 ]*$//' > ldscripts/${EMULATION_NAME}.xscer
@@ -567,7 +567,7 @@ if test -n "$GENERATE_SHLIB_SCRIPT"; then
 
     LD_FLAG=rowsharedtextonly
     COMBRELOC=ldscripts/${EMULATION_NAME}.xswe.tmp
-    ( echo "/* Script for -shared -z combreloc -z separate-code -z relro -z now -z one-rosegment */"
+    ( echo "/* Script for -shared -z combreloc -z separate-code -z relro -z now --rosegment */"
       source_sh ${CUSTOMIZER_SCRIPT}
       source_sh ${srcdir}/scripttempl/${SCRIPT_NAME}.sc
     ) | sed -e '/^ *$/d;s/[	 ]*$//' > ldscripts/${EMULATION_NAME}.xswer
@@ -596,7 +596,7 @@ if test -n "$GENERATE_SHLIB_SCRIPT"; then
 
 	LD_FLAG=rowsharedtextonly
 	COMBRELOC=ldscripts/${EMULATION_NAME}.xsceor.tmp
-	( echo "/* Script for -shared -z combreloc -z separate-code -z relro -z one-rosegment */"
+	( echo "/* Script for -shared -z combreloc -z separate-code -z relro --rosegment */"
 	  source_sh ${CUSTOMIZER_SCRIPT}
 	  source_sh ${srcdir}/scripttempl/${SCRIPT_NAME}.sc
 	) | sed -e '/^ *$/d;s/[	 ]*$//' > ldscripts/${EMULATION_NAME}.xsceor
@@ -628,7 +628,7 @@ if test -n "$GENERATE_PIE_SCRIPT"; then
   ) | sed -e '/^ *$/d;s/[	 ]*$//' > ldscripts/${EMULATION_NAME}.xde
 
   LD_FLAG=ropietextonly
-  ( echo "/* Script for -pie -z separate-code -z one-rosegment */"
+  ( echo "/* Script for -pie -z separate-code --rosegment */"
     source_sh ${CUSTOMIZER_SCRIPT}
     source_sh ${srcdir}/scripttempl/${SCRIPT_NAME}.sc
   ) | sed -e '/^ *$/d;s/[	 ]*$//' > ldscripts/${EMULATION_NAME}.xder
@@ -649,7 +649,7 @@ if test -n "$GENERATE_PIE_SCRIPT"; then
       ) | sed -e '/^ *$/d;s/[	 ]*$//' > ldscripts/${EMULATION_NAME}.xdeo
 
       LD_FLAG=ropietextonly
-      ( echo "/* Script for -pie -z separate-code -z relro -z one-rosegment */"
+      ( echo "/* Script for -pie -z separate-code -z relro --rosegment */"
 	source_sh ${CUSTOMIZER_SCRIPT}
 	source_sh ${srcdir}/scripttempl/${SCRIPT_NAME}.sc
       ) | sed -e '/^ *$/d;s/[	 ]*$//' > ldscripts/${EMULATION_NAME}.xdeor
@@ -677,7 +677,7 @@ if test -n "$GENERATE_PIE_SCRIPT"; then
 
     LD_FLAG=rocpietextonly
     COMBRELOC=ldscripts/${EMULATION_NAME}.xdcer.tmp
-    ( echo "/* Script for -pie -z combreloc -z separate-code -z one-rosegment */"
+    ( echo "/* Script for -pie -z combreloc -z separate-code --rosegment */"
       source_sh ${CUSTOMIZER_SCRIPT}
       source_sh ${srcdir}/scripttempl/${SCRIPT_NAME}.sc
     ) | sed -e '/^ *$/d;s/[	 ]*$//' > ldscripts/${EMULATION_NAME}.xdcer
@@ -703,7 +703,7 @@ if test -n "$GENERATE_PIE_SCRIPT"; then
 
     LD_FLAG=rowpietextonly
     COMBRELOC=ldscripts/${EMULATION_NAME}.xdwer.tmp
-    ( echo "/* Script for -pie -z combreloc -z separate-code -z relro -z now -z one-rosegment */"
+    ( echo "/* Script for -pie -z combreloc -z separate-code -z relro -z now --rosegment */"
       source_sh ${CUSTOMIZER_SCRIPT}
       source_sh ${srcdir}/scripttempl/${SCRIPT_NAME}.sc
     ) | sed -e '/^ *$/d;s/[	 ]*$//' > ldscripts/${EMULATION_NAME}.xdwer
@@ -732,7 +732,7 @@ if test -n "$GENERATE_PIE_SCRIPT"; then
 
 	LD_FLAG=rowpietextonly
 	COMBRELOC=ldscripts/${EMULATION_NAME}.xdceor.tmp
-	( echo "/* Script for -pie -z combreloc -z separate-code -z relro -z one-rosegment */"
+	( echo "/* Script for -pie -z combreloc -z separate-code -z relro --rosegment */"
 	  source_sh ${CUSTOMIZER_SCRIPT}
 	  source_sh ${srcdir}/scripttempl/${SCRIPT_NAME}.sc
 	) | sed -e '/^ *$/d;s/[	 ]*$//' > ldscripts/${EMULATION_NAME}.xdceor
diff --git a/ld/ld.texi b/ld/ld.texi
index 89e3913..90182c4 100644
--- a/ld/ld.texi
+++ b/ld/ld.texi
@@ -3216,20 +3216,20 @@ maximum cache size to @var{size}.
 Request the creation of a @code{.note.gnu.build-id} ELF note section
 or a @code{.buildid} COFF section.  The contents of the note are
 unique bits identifying this linked file.  @var{style} can be
-@code{uuid} to use 128 random bits, @code{sha1} to use a 160-bit
-@sc{SHA1} hash on the normative parts of the output contents,
-@code{md5} to use a 128-bit @sc{MD5} hash on the normative parts of
-the output contents, or @code{0x@var{hexstring}} to use a chosen bit
-string specified as an even number of hexadecimal digits (@code{-} and
+@code{uuid} to use 128 random bits; @code{sha1} to use a 160-bit
+@sc{SHA1} hash, @code{md5} to use a 128-bit @sc{MD5} hash, or @code{xx}
+to use a 128-bit @sc{XXHASH} on the normative parts of the output
+contents; or @code{0x@var{hexstring}} to use a chosen bit string
+specified as an even number of hexadecimal digits (@code{-} and
 @code{:} characters between digit pairs are ignored).  If @var{style}
 is omitted, @code{sha1} is used.
 
-The @code{md5} and @code{sha1} styles produces an identifier
-that is always the same in an identical output file, but will be
-unique among all nonidentical output files.  It is not intended
-to be compared as a checksum for the file's contents.  A linked
-file may be changed later by other tools, but the build ID bit
-string identifying the original linked file does not change.
+The @code{md5}, @code{sha1}, and @code{xx} styles produces an
+identifier that is always the same in an identical output file, but
+are almost certainly unique among all nonidentical output files.  It
+is not intended to be compared as a checksum for the file's contents.
+A linked file may be changed later by other tools, but the build ID
+bit string identifying the original linked file does not change.
 
 Passing @code{none} for @var{style} disables the setting from any
 @code{--build-id} options earlier on the command line.
@@ -4048,6 +4048,13 @@ a similar fashion by the @code{gcc} linker wrapper program.  The default
 may be overridden by the @samp{--demangle} and @samp{--no-demangle}
 options.
 
+@kindex SOURCE_DATE_EPOCH
+@cindex timestamps
+If the PE/COFF specific @option{--insert-timestamp} is active and the
+@env{SOURCE_DATE_EPOCH} environment variable is defined, then the
+timestamp value in this variable will be inserted into the COFF header
+instead of the current time.
+
 @c man end
 @end ifset
 
diff --git a/ld/ldbuildid.c b/ld/ldbuildid.c
index 5ba9e50..2571f1a 100644
--- a/ld/ldbuildid.c
+++ b/ld/ldbuildid.c
@@ -23,6 +23,10 @@
 #include "safe-ctype.h"
 #include "md5.h"
 #include "sha1.h"
+#ifdef WITH_XXHASH
+#define XXH_INLINE_ALL
+#include <xxhash.h>
+#endif
 #include "ldbuildid.h"
 #ifdef __MINGW32__
 #include <windows.h>
@@ -35,6 +39,9 @@ bool
 validate_build_id_style (const char *style)
 {
   if ((streq (style, "md5")) || (streq (style, "sha1"))
+#ifdef WITH_XXHASH
+      || (streq (style, "xx"))
+#endif
       || (streq (style, "uuid")) || (startswith (style, "0x")))
     return true;
 
@@ -47,6 +54,11 @@ compute_build_id_size (const char *style)
   if (streq (style, "md5") || streq (style, "uuid"))
     return 128 / 8;
 
+#ifdef WITH_XXHASH
+  if (streq (style, "xx"))
+    return 128 / 8;
+#endif
+
   if (streq (style, "sha1"))
     return 160 / 8;
 
@@ -93,6 +105,16 @@ read_hex (const char xdigit)
   return 0;
 }
 
+
+#ifdef WITH_XXHASH
+static void
+xx_process_bytes(const void* buffer, size_t size, void* state)
+{
+  XXH3_128bits_update ((XXH3_state_t*) state, buffer, size);
+}
+#endif
+
+
 bool
 generate_build_id (bfd *abfd,
 		   const char *style,
@@ -100,7 +122,31 @@ generate_build_id (bfd *abfd,
 		   unsigned char *id_bits,
 		   int size ATTRIBUTE_UNUSED)
 {
-  if (streq (style, "md5"))
+#ifdef WITH_XXHASH
+  if (streq (style, "xx"))
+    {
+      XXH3_state_t* state = XXH3_createState ();
+      if (!state)
+        {
+          return false;
+        }
+      XXH3_128bits_reset (state);
+      if (!(*checksum_contents) (abfd, &xx_process_bytes, state))
+        {
+          XXH3_freeState (state);
+          return false;
+        }
+      XXH128_hash_t result = XXH3_128bits_digest (state);
+      XXH3_freeState (state);
+      /* Use canonical-endianness output. */
+      XXH128_canonical_t result_canon;
+      XXH128_canonicalFromHash (&result_canon, result);
+      memcpy (id_bits, &result_canon,
+	      (size_t) size < sizeof (result) ? (size_t) size : sizeof (result));
+    }
+  else
+#endif
+    if (streq (style, "md5"))
     {
       struct md5_ctx ctx;
 
diff --git a/ld/ldelf.c b/ld/ldelf.c
index 0969160..2371af3 100644
--- a/ld/ldelf.c
+++ b/ld/ldelf.c
@@ -2118,7 +2118,7 @@ ldelf_place_orphan (asection *s, const char *secname, int constraint)
       { ".bss",
 	SEC_ALLOC,
 	0, 0, 0, 0 },
-      { 0,
+      { NULL,
 	SEC_HAS_CONTENTS | SEC_ALLOC | SEC_LOAD | SEC_READONLY | SEC_DATA,
 	0, 0, 0, 0 },
       { ".interp",
@@ -2328,7 +2328,18 @@ ldelf_place_orphan (asection *s, const char *secname, int constraint)
 	   && (elfinput
 	       ? sh_type == SHT_NOTE
 	       : startswith (secname, ".note")))
-    place = &hold[orphan_interp];
+    {
+      /* PR 32219: Check that the .interp section
+	 exists before attaching orphans to it.  */
+      if (lang_output_section_find (hold[orphan_interp].name))
+	place = &hold[orphan_interp];
+      /* Next best place: after .rodata.  */
+      else if (lang_output_section_find (hold[orphan_rodata].name))
+	place = &hold[orphan_rodata];
+      /* Last attempt: the .text section.  */
+      else
+	place = &hold[orphan_text];
+    }
   else if ((flags & (SEC_LOAD | SEC_HAS_CONTENTS | SEC_THREAD_LOCAL)) == 0)
     place = &hold[orphan_bss];
   else if ((flags & SEC_SMALL_DATA) != 0)
diff --git a/ld/ldlang.c b/ld/ldlang.c
index 9e8cc22..343c4de 100644
--- a/ld/ldlang.c
+++ b/ld/ldlang.c
@@ -2047,13 +2047,25 @@ lang_insert_orphan (asection *s,
 		 place orphan note section after non-note sections.  */
 
 	      first_orphan_note = NULL;
+
+	      /* NB: When --rosegment is used, the .note.gnu.build-id
+		 section is placed before text sections.  Ignore the
+		 .note.gnu.build-id section if -z separate-code and
+		 --rosegment are used together to avoid putting any
+		 note sections between the .note.gnu.build-id section
+		 and text sections in the same PT_LOAD segment.  */
+	      bool ignore_build_id = (link_info.separate_code
+				      && link_info.one_rosegment);
+
 	      for (sec = link_info.output_bfd->sections;
 		   (sec != NULL
 		    && !bfd_is_abs_section (sec));
 		   sec = sec->next)
 		if (sec != snew
 		    && elf_section_type (sec) == SHT_NOTE
-		    && (sec->flags & SEC_LOAD) != 0)
+		    && (sec->flags & SEC_LOAD) != 0
+		    && (!ignore_build_id
+			|| strcmp (sec->name, ".note.gnu.build-id") != 0))
 		  {
 		    if (!first_orphan_note)
 		      first_orphan_note = sec;
@@ -4883,9 +4895,6 @@ ld_is_local_symbol (asymbol * sym)
   if (name == NULL || *name == 0)
     return false;
 
-  if (strcmp (name, "(null)") == 0)
-    return false;
-
   /* Skip .Lxxx and such like.  */
   if (bfd_is_local_label (link_info.output_bfd, sym))
     return false;
@@ -9000,7 +9009,7 @@ lang_record_phdrs (void)
 		continue;
 
 	      /* Don't add orphans to PT_INTERP header.  */
-	      if (l->type == 3)
+	      if (l->type == PT_INTERP)
 		continue;
 
 	      if (last == NULL)
diff --git a/ld/lexsup.c b/ld/lexsup.c
index 4aa0124..8982073 100644
--- a/ld/lexsup.c
+++ b/ld/lexsup.c
@@ -2278,6 +2278,15 @@ elf_static_list_options (FILE *file)
 {
   fprintf (file, _("\
   --build-id[=STYLE]          Generate build ID note\n"));
+  /* DEFAULT_BUILD_ID_STYLE n/a here */
+#ifdef WITH_XXHASH
+  fprintf (file, _("\
+                                Styles: none,md5,sha1,xx,uuid,0xHEX\n"));
+  /* NB: testsuite/ld-elf/build-id.exp depends on this syntax */
+#else
+  fprintf (file, _("\
+                                Styles: none,md5,sha1,uuid,0xHEX\n"));
+#endif
   fprintf (file, _("\
   --package-metadata[=JSON]   Generate package metadata note\n"));
   fprintf (file, _("\
diff --git a/ld/pdb.c b/ld/pdb.c
index fcbe325..5fd55fb 100644
--- a/ld/pdb.c
+++ b/ld/pdb.c
@@ -161,6 +161,9 @@ static const uint32_t crc_table[] =
   0xb40bbe37, 0xc30c8ea1, 0x5a05df1b, 0x2d02ef8d
 };
 
+static bool remap_type (void *data, struct type_entry **map,
+			uint32_t type_num, uint32_t num_types);
+
 /* Add a new stream to the PDB archive, and return its BFD.  */
 static bfd *
 add_stream (bfd *pdb, const char *name, uint16_t *stream_num)
@@ -1836,6 +1839,76 @@ calculate_symbols_size (uint8_t *data, uint32_t size, uint32_t *sym_size)
   return true;
 }
 
+/* Parse the DEBUG_S_INLINEELINES data, which records the line numbers that
+   correspond to inlined functions.  This is similar to DEBUG_S_LINES (see
+   handle_debugs_section), but rather than just copying we also need to remap
+   the numbers of the referenced LF_FUNC_ID types.  */
+
+static bool
+parse_inlinee_lines (uint8_t *data, uint32_t size, uint8_t **bufptr,
+		     struct type_entry **map, uint32_t num_types)
+{
+  uint32_t version;
+  uint8_t *ptr;
+  unsigned int num_entries;
+
+  bfd_putl32 (DEBUG_S_INLINEELINES, *bufptr);
+  *bufptr += sizeof (uint32_t);
+
+  bfd_putl32 (size, *bufptr);
+  *bufptr += sizeof (uint32_t);
+
+  /* The inlinee lines data consists of a version uint32_t (0), followed by an
+     array of struct inlinee_source_line:
+
+     struct inlinee_source_line
+     {
+	uint32_t function_id;
+	uint32_t file_id;
+	uint32_t line_no;
+     };
+
+     (see InlineeSourceLine in cvinfo.h)
+
+     We're only interested here in the function_id, as we need to remap its
+     type number.
+  */
+
+  if (size < sizeof (uint32_t))
+    {
+      einfo (_("%P: warning: truncated DEBUG_S_INLINEELINES data\n"));
+      return false;
+    }
+
+  version = bfd_getl32 (data + sizeof (uint32_t) + sizeof (uint32_t));
+  if (version != CV_INLINEE_SOURCE_LINE_SIGNATURE)
+    {
+      einfo (_("%P: warning: unexpected DEBUG_S_INLINEELINES version %u\n"),
+	     version);
+      return false;
+    }
+
+  memcpy (*bufptr, data, size);
+  ptr = *bufptr + sizeof (uint32_t);
+  *bufptr += size;
+
+  num_entries = (size - sizeof (uint32_t)) / (3 * sizeof (uint32_t));
+
+  for (unsigned int i = 0; i < num_entries; i++)
+    {
+      uint32_t func_id;
+
+      func_id = bfd_getl32 (ptr);
+
+      if (!remap_type (ptr, map, func_id, num_types))
+	return false;
+
+      ptr += 3 * sizeof (uint32_t);
+    }
+
+  return true;
+}
+
 /* Parse the .debug$S section within an object file.  */
 static bool
 handle_debugs_section (asection *s, bfd *mod, struct string_table *strings,
@@ -1951,6 +2024,7 @@ handle_debugs_section (asection *s, bfd *mod, struct string_table *strings,
       switch (type)
 	{
 	case DEBUG_S_FILECHKSMS:
+	case DEBUG_S_INLINEELINES:
 	  c13_size += sizeof (uint32_t) + sizeof (uint32_t) + size;
 
 	  if (c13_size % sizeof (uint32_t))
@@ -2088,6 +2162,16 @@ handle_debugs_section (asection *s, bfd *mod, struct string_table *strings,
 	    }
 
 	  break;
+
+	case DEBUG_S_INLINEELINES:
+	  if (!parse_inlinee_lines (data + off, size, &bufptr, map, num_types))
+	    {
+	      free (data);
+	      free (symbuf);
+	      return false;
+	    }
+
+	  break;
 	}
 
       off += size;
@@ -2375,6 +2459,7 @@ handle_type (uint8_t *data, struct type_entry **map, uint32_t type_num,
     case LF_POINTER:
       {
 	struct lf_pointer *ptr = (struct lf_pointer *) data;
+	uint32_t attributes;
 
 	if (size < offsetof (struct lf_pointer, attributes))
 	  {
@@ -2386,6 +2471,22 @@ handle_type (uint8_t *data, struct type_entry **map, uint32_t type_num,
 	if (!remap_type (&ptr->base_type, map, type_num, num_types))
 	  return false;
 
+	attributes = bfd_getl32 (&ptr->attributes);
+
+	if ((attributes & CV_PTR_MODE_MASK) == CV_PTR_MODE_PMEM
+	    || (attributes & CV_PTR_MODE_MASK) == CV_PTR_MODE_PMFUNC)
+	  {
+	    if (size < offsetof (struct lf_pointer, ptr_to_mem_type))
+	      {
+		einfo (_("%P: warning: truncated CodeView type record"
+			 " LF_POINTER\n"));
+		return false;
+	      }
+
+	    if (!remap_type (&ptr->containing_class, map, type_num, num_types))
+	      return false;
+	  }
+
 	break;
       }
 
diff --git a/ld/pdb.h b/ld/pdb.h
index b98d386..06a58bb 100644
--- a/ld/pdb.h
+++ b/ld/pdb.h
@@ -241,10 +241,13 @@ struct optional_dbg_header
 #define DEBUG_S_LINES			0xf2
 #define DEBUG_S_STRINGTABLE		0xf3
 #define DEBUG_S_FILECHKSMS		0xf4
+#define DEBUG_S_INLINEELINES		0xf6
 
 #define STRING_TABLE_SIGNATURE		0xeffeeffe
 #define STRING_TABLE_VERSION		1
 
+#define CV_INLINEE_SOURCE_LINE_SIGNATURE	0
+
 /* VHdr in nmt.h */
 struct string_table_header
 {
@@ -303,6 +306,11 @@ struct lf_modifier
   uint16_t padding;
 } ATTRIBUTE_PACKED;
 
+/* enum CV_ptrmode_e in cvinfo.h, shifted by 5 for the lfPointerAttr bitfield */
+#define CV_PTR_MODE_MASK	0xe0
+#define CV_PTR_MODE_PMEM	0x40
+#define CV_PTR_MODE_PMFUNC	0x60
+
 /* lfPointer in cvinfo.h */
 struct lf_pointer
 {
@@ -310,6 +318,10 @@ struct lf_pointer
   uint16_t kind;
   uint32_t base_type;
   uint32_t attributes;
+  /* following only if CV_PTR_MODE_PMEM or CV_PTR_MODE_PMFUNC in attributes */
+  uint32_t containing_class;
+  uint16_t ptr_to_mem_type;
+  uint16_t padding;
 } ATTRIBUTE_PACKED;
 
 /* lfArgList in cvinfo.h (used for both LF_ARGLIST and LF_SUBSTR_LIST) */
diff --git a/ld/pe-dll.c b/ld/pe-dll.c
index 5b27439..93229e0 100644
--- a/ld/pe-dll.c
+++ b/ld/pe-dll.c
@@ -185,6 +185,9 @@ typedef struct
   const char *target_name;
   const char *object_target;
   unsigned int imagebase_reloc;
+  unsigned int secrel_reloc_lo;
+  unsigned int secrel_reloc_hi;
+  unsigned int section_reloc;
   int pe_arch;
   int bfd_arch;
   bool underscored;
@@ -257,11 +260,16 @@ static pe_details_type pe_detail_list[] =
 #ifdef pe_use_plus
     "pei-x86-64",
     "pe-x86-64",
-    3 /* R_IMAGEBASE */,
+    3 /* R_AMD64_IMAGEBASE */,
+    11 /* R_AMD64_SECREL32 */,
+    12 /* R_AMD64_SECREL7 */,
+    10 /* R_AMD64_SECTION */,
 #else
     "pei-i386",
     "pe-i386",
     7 /* R_IMAGEBASE */,
+    11, 11 /* R_SECREL32 */,
+    10 /* R_SECTION */,
 #endif
     PE_ARCH_i386,
     bfd_arch_i386,
@@ -276,7 +284,10 @@ static pe_details_type pe_detail_list[] =
   {
     "pei-x86-64",
     "pe-bigobj-x86-64",
-    3 /* R_IMAGEBASE */,
+    3 /* R_AMD64_IMAGEBASE */,
+    11 /* R_AMD64_SECREL32 */,
+    12 /* R_AMD64_SECREL7 */,
+    10 /* R_AMD64_SECTION */,
     PE_ARCH_i386,
     bfd_arch_i386,
     false,
@@ -287,6 +298,8 @@ static pe_details_type pe_detail_list[] =
     "pei-i386",
     "pe-bigobj-i386",
     7 /* R_IMAGEBASE */,
+    11, 11 /* R_SECREL32 */,
+    10 /* R_SECTION */,
     PE_ARCH_i386,
     bfd_arch_i386,
     true,
@@ -297,6 +310,7 @@ static pe_details_type pe_detail_list[] =
     "pei-shl",
     "pe-shl",
     16 /* R_SH_IMAGEBASE */,
+    ~0, 0, ~0, /* none */
     PE_ARCH_sh,
     bfd_arch_sh,
     true,
@@ -306,6 +320,7 @@ static pe_details_type pe_detail_list[] =
     "pei-mips",
     "pe-mips",
     34 /* MIPS_R_RVA */,
+    ~0, 0, ~0, /* none */
     PE_ARCH_mips,
     bfd_arch_mips,
     false,
@@ -315,6 +330,7 @@ static pe_details_type pe_detail_list[] =
     "pei-arm-little",
     "pe-arm-little",
     11 /* ARM_RVA32 */,
+    ~0, 0, ~0, /* none */
     PE_ARCH_arm,
     bfd_arch_arm,
     true,
@@ -324,6 +340,8 @@ static pe_details_type pe_detail_list[] =
     "pei-arm-wince-little",
     "pe-arm-wince-little",
     2,  /* ARM_RVA32 on Windows CE, see bfd/coff-arm.c.  */
+    15, 15, /* ARM_SECREL (dito) */
+    14, /* ARM_SECTION (dito) */
     PE_ARCH_arm_wince,
     bfd_arch_arm,
     false,
@@ -332,13 +350,16 @@ static pe_details_type pe_detail_list[] =
   {
     "pei-aarch64-little",
     "pe-aarch64-little",
-    2,  /* ARM64_RVA32 */
+    2,  /* IMAGE_REL_ARM64_ADDR32NB */
+    8,  /* IMAGE_REL_ARM64_SECREL */
+    11, /* IMAGE_REL_ARM64_SECREL_LOW12L */
+    13, /* IMAGE_REL_ARM64_SECTION */
     PE_ARCH_aarch64,
     bfd_arch_aarch64,
     false,
     autofilter_symbollist_generic
   },
-  { NULL, NULL, 0, 0, 0, false, NULL }
+  { NULL, NULL, 0, 0, 0, 0, 0, 0, false, NULL }
 };
 
 static const pe_details_type *pe_details;
@@ -1596,7 +1617,10 @@ generate_reloc (bfd *abfd, struct bfd_link_info *info)
 		  printf ("rel: %s\n", sym->name);
 		}
 	      if (!relocs[i]->howto->pc_relative
-		  && relocs[i]->howto->type != pe_details->imagebase_reloc)
+		  && relocs[i]->howto->type != pe_details->imagebase_reloc
+		  && (relocs[i]->howto->type < pe_details->secrel_reloc_lo
+		      || relocs[i]->howto->type > pe_details->secrel_reloc_hi)
+		  && relocs[i]->howto->type != pe_details->section_reloc)
 		{
 		  struct bfd_symbol *sym = *relocs[i]->sym_ptr_ptr;
 		  const struct bfd_link_hash_entry *blhe
diff --git a/ld/plugin.c b/ld/plugin.c
index 03ee988..34ae3a0 100644
--- a/ld/plugin.c
+++ b/ld/plugin.c
@@ -778,8 +778,18 @@ get_symbols (const void *handle, int nsyms, struct ld_plugin_symbol *syms,
 	{
 	  blhe = h;
 	  /* Check if a symbol is a wrapper symbol.  */
-	  if (blhe && blhe->wrapper_symbol)
-	    wrap_status = wrapper;
+	  if (blhe)
+	    {
+	      if (blhe->wrapper_symbol)
+		wrap_status = wrapper;
+	      else if (link_info.wrap_hash != NULL)
+		{
+		  struct bfd_link_hash_entry *unwrap
+		    = unwrap_hash_lookup (&link_info, (bfd *) abfd, blhe);
+		  if (unwrap != NULL && unwrap != h)
+		    wrap_status = wrapper;
+		}
+	    }
 	}
       else
 	{
@@ -1164,10 +1174,11 @@ plugin_load_plugins (void)
 /* Call 'claim file' hook for all plugins.  */
 static int
 plugin_call_claim_file (const struct ld_plugin_input_file *file, int *claimed,
-			bool known_used)
+			int *claim_file_handler_v2, bool known_used)
 {
   plugin_t *curplug = plugins_list;
   *claimed = false;
+  *claim_file_handler_v2 = false;
   while (curplug && !*claimed)
     {
       if (curplug->claim_file_handler)
@@ -1176,7 +1187,11 @@ plugin_call_claim_file (const struct ld_plugin_input_file *file, int *claimed,
 
 	  called_plugin = curplug;
 	  if (curplug->claim_file_handler_v2)
-	    rv = (*curplug->claim_file_handler_v2) (file, claimed, known_used);
+	    {
+	      rv = (*curplug->claim_file_handler_v2) (file, claimed,
+						      known_used);
+	      *claim_file_handler_v2 = true;
+	    }
 	  else
 	    rv = (*curplug->claim_file_handler) (file, claimed);
 	  called_plugin = NULL;
@@ -1212,7 +1227,7 @@ plugin_cleanup (bfd *abfd ATTRIBUTE_UNUSED)
 static bfd_cleanup
 plugin_object_p (bfd *ibfd, bool known_used)
 {
-  int claimed;
+  int claimed, claim_file_handler_v2;
   plugin_input_file_t *input;
   struct ld_plugin_input_file file;
   bfd *abfd;
@@ -1221,12 +1236,17 @@ plugin_object_p (bfd *ibfd, bool known_used)
   if ((ibfd->flags & BFD_PLUGIN) != 0)
     return NULL;
 
-  if (ibfd->plugin_format != bfd_plugin_unknown)
+  /* When KNOWN_USED is false, we call plugin claim_file if plugin_format
+     is bfd_plugin_unknown and set plugin_format to bfd_plugin_yes_unused
+     on LTO object.  When KNOWN_USED is true, we call plugin claim_file
+     if plugin_format is bfd_plugin_unknown or bfd_plugin_yes_unused.  */
+  if (ibfd->plugin_format != bfd_plugin_unknown
+      && (!known_used || ibfd->plugin_format != bfd_plugin_yes_unused))
     {
-      if (ibfd->plugin_format == bfd_plugin_yes)
-	return plugin_cleanup;
-      else
+      if (ibfd->plugin_format == bfd_plugin_no)
 	return NULL;
+      else
+	return plugin_cleanup;
     }
 
   /* We create a dummy BFD, initially empty, to house whatever symbols
@@ -1262,7 +1282,8 @@ plugin_object_p (bfd *ibfd, bool known_used)
 
   claimed = 0;
 
-  if (plugin_call_claim_file (&file, &claimed, known_used))
+  if (plugin_call_claim_file (&file, &claimed, &claim_file_handler_v2,
+			      known_used))
     einfo (_("%F%P: %s: plugin reported error claiming file\n"),
 	   plugin_error_plugin ());
 
@@ -1282,7 +1303,13 @@ plugin_object_p (bfd *ibfd, bool known_used)
 
   if (claimed)
     {
-      ibfd->plugin_format = bfd_plugin_yes;
+      /* Set plugin_format to bfd_plugin_yes_unused if KNOWN_USED is
+	 false for plugin claim_file_v2 to avoid including the unused
+	 LTO archive members in linker output.  */
+      if (known_used || !claim_file_handler_v2)
+	ibfd->plugin_format = bfd_plugin_yes;
+      else
+	ibfd->plugin_format = bfd_plugin_yes_unused;
       ibfd->plugin_dummy_bfd = abfd;
       bfd_make_readable (abfd);
       abfd->no_export = ibfd->no_export;
diff --git a/ld/scripttempl/arclinux.sc b/ld/scripttempl/arclinux.sc
index 36ba5a6..245e020 100644
--- a/ld/scripttempl/arclinux.sc
+++ b/ld/scripttempl/arclinux.sc
@@ -661,6 +661,7 @@ source_sh $srcdir/scripttempl/DWARF.sc
 
 cat <<EOF
   ${ATTRS_SECTIONS}
+  .ARC.attributes 0 : { KEEP (*(.ARC.attributes)) }
   ${OTHER_SECTIONS}
   ${RELOCATING+${OTHER_SYMBOLS}}
   ${RELOCATING+${DISCARDED}}
diff --git a/ld/scripttempl/elf.sc b/ld/scripttempl/elf.sc
index 5471611..6ef93dc 100644
--- a/ld/scripttempl/elf.sc
+++ b/ld/scripttempl/elf.sc
@@ -397,6 +397,19 @@ fi
 # ===========================================================================
 # Functions for generating parts of the linker script
 
+# Helper function for putting comments into scripts.
+# Useful when trying to track down script composition problems.
+# Use by adding:
+#   emit_comment "a message"
+# wherever necessary.
+
+emit_comment()
+{
+cat <<EOF
+  /* $1 */
+EOF
+}
+
 emit_header()
 {
 cat <<EOF
@@ -425,7 +438,6 @@ emit_early_ro()
 {
   cat <<EOF
   ${INITIAL_READONLY_SECTIONS}
-  .note.gnu.build-id ${RELOCATING-0}: { *(.note.gnu.build-id) }
 EOF
 }
 
@@ -436,6 +448,11 @@ cat <<EOF
   ${CREATE_SHLIB-${CREATE_PIE-${RELOCATING+PROVIDE (__executable_start = ${TEXT_START_ADDR}); . = ${TEXT_BASE_ADDRESS};}}}
   ${CREATE_SHLIB+${RELOCATING+. = ${SHLIB_TEXT_START_ADDR}${SIZEOF_HEADERS_CODE};}}
   ${CREATE_PIE+${RELOCATING+PROVIDE (__executable_start = ${SHLIB_TEXT_START_ADDR}); . = ${SHLIB_TEXT_START_ADDR}${SIZEOF_HEADERS_CODE};}}
+
+  /* Place build-id as close to the ELF headers as possible.  This
+     maximises the chance the build-id will be present in core files,
+     which GDB can then use to locate the associated debuginfo file.  */
+  .note.gnu.build-id ${RELOCATING-0}: { *(.note.gnu.build-id) }
 EOF
 }
 
@@ -557,6 +574,7 @@ EOF
 align_text()
 {
 cat <<EOF
+  ${RELOCATING+/* Align the text segment.  */}
   ${RELOCATING+${TEXT_SEGMENT_ALIGN}}
 EOF
 }
@@ -798,11 +816,28 @@ EOF
   emit_executable_start
 
   if test -z "${ALL_TEXT_BEFORE_RO}"; then
+    # We are allowed to put R/O sections before code sections.
+
     test -n "${SEPARATE_CODE}" || emit_early_ro
     test -n "${NON_ALLOC_DYN}${SEPARATE_CODE}" || emit_dyn
+
+    # We only need the alignment if we have emitted some sections.
+    if test -z "${SEPARATE_CODE}"; then
+      align_text
+    elif test -z "${NON_ALLOC_DYN}${SEPARATE_CODE}"; then
+      align_text
+    fi
   fi
   
-  align_text  
+  # We do not align the code segment here as doing so will increase the file size.
+  # Normally having the text segment at the start of the file will automatically
+  # mean that it is aligned(*), and if we have emitted any r/o sections due to the
+  # tests of SEPARATE_CODE above, then extra alignment will have already been
+  # generated.
+  #
+  # *: Including the ELF headers and .note.gnu.build-id section in the code segment
+  # is a very small theoretical risk.
+
   emit_text
 
   align_rodata
diff --git a/ld/scripttempl/elf32cr16.sc b/ld/scripttempl/elf32cr16.sc
index 3e7d92a..305f1f2 100644
--- a/ld/scripttempl/elf32cr16.sc
+++ b/ld/scripttempl/elf32cr16.sc
@@ -171,7 +171,7 @@ SECTIONS
 
 EOF
 
-source_sh $srcdir/scripttempl/misc-sections.sc
+source_sh $srcdir/scripttempl/misc-sections.sc rom
 source_sh $srcdir/scripttempl/DWARF.sc
 
 cat <<EOF
diff --git a/ld/scripttempl/elf32crx.sc b/ld/scripttempl/elf32crx.sc
index 1b13166..0dcf6ad 100644
--- a/ld/scripttempl/elf32crx.sc
+++ b/ld/scripttempl/elf32crx.sc
@@ -169,7 +169,7 @@ SECTIONS
 
 EOF
 
-source_sh $srcdir/scripttempl/misc-sections.sc
+source_sh $srcdir/scripttempl/misc-sections.sc rom
 source_sh $srcdir/scripttempl/DWARF.sc
 
 cat <<EOF
diff --git a/ld/scripttempl/elfd10v.sc b/ld/scripttempl/elfd10v.sc
index 1ecf4a1..8d139de 100644
--- a/ld/scripttempl/elfd10v.sc
+++ b/ld/scripttempl/elfd10v.sc
@@ -102,6 +102,10 @@ EOF
 cat <<EOF
 SECTIONS
 {
+  /* PR 32100: GDB makes use of the fact that the .note.gnu.build-id
+     section is typically placed next to the ELF headers.  */
+  .note.gnu.build-id ${RELOCATING-0}: { *(.note.gnu.build-id) } ${RELOCATING+ >INSN}
+
   .text ${RELOCATING+${TEXT_START_ADDR}} :
   {
     ${RELOCATING+${TEXT_START_SYMBOLS}
@@ -175,7 +179,7 @@ SECTIONS
 
 EOF
 
-source_sh $srcdir/scripttempl/misc-sections.sc
+source_sh $srcdir/scripttempl/misc-sections.sc DATA
 source_sh $srcdir/scripttempl/DWARF.sc
 
 cat <<EOF
diff --git a/ld/scripttempl/elfxtensa.sc b/ld/scripttempl/elfxtensa.sc
index 231f53b..046e872 100644
--- a/ld/scripttempl/elfxtensa.sc
+++ b/ld/scripttempl/elfxtensa.sc
@@ -305,6 +305,10 @@ ${RELOCATING- /* For some reason, the Solaris linker makes bad executables
 
 SECTIONS
 {
+  /* PR 32100: GDB makes use of the fact that the .note.gnu.build-id
+     section is typically placed next to the ELF headers.  */
+  .note.gnu.build-id ${RELOCATING-0}: { *(.note.gnu.build-id) }
+
   /* Read-only sections, merged into text segment: */
   ${CREATE_SHLIB-${CREATE_PIE-${RELOCATING+PROVIDE (__executable_start = ${TEXT_START_ADDR}); . = ${TEXT_BASE_ADDRESS};}}}
   ${CREATE_SHLIB+${RELOCATING+. = ${SHLIB_TEXT_START_ADDR:-0} + SIZEOF_HEADERS;}}
@@ -549,6 +553,7 @@ source_sh $srcdir/scripttempl/DWARF.sc
 
 cat <<EOF
   ${ATTRS_SECTIONS}
+  .xtensa.info : { *(.xtensa.info) }
   ${OTHER_SECTIONS}
   ${RELOCATING+${OTHER_SYMBOLS}}
   ${RELOCATING+${DISCARDED}}
diff --git a/ld/scripttempl/mep.sc b/ld/scripttempl/mep.sc
index 39e4d64..2f085d7 100644
--- a/ld/scripttempl/mep.sc
+++ b/ld/scripttempl/mep.sc
@@ -230,6 +230,11 @@ SECTIONS
   ${CREATE_SHLIB-${CREATE_PIE-${RELOCATING+PROVIDE (__executable_start = ${TEXT_START_ADDR}); . = ${TEXT_BASE_ADDRESS};}}}
   ${CREATE_SHLIB+${RELOCATING+. = ${SHLIB_TEXT_START_ADDR:-0} + SIZEOF_HEADERS;}}
   ${CREATE_PIE+${RELOCATING+. = ${SHLIB_TEXT_START_ADDR:-0} + SIZEOF_HEADERS;}}
+
+  /* PR 32100: GDB makes use of the fact that the .note.gnu.build-id
+     section is typically placed next to the ELF headers.  */
+  .note.gnu.build-id ${RELOCATING-0}: { *(.note.gnu.build-id) }
+
   ${CREATE_SHLIB-${INTERP}}
   ${INITIAL_READONLY_SECTIONS}
   ${TEXT_DYNAMIC+${DYNAMIC}}
diff --git a/ld/scripttempl/misc-sections.sc b/ld/scripttempl/misc-sections.sc
index 94ad715..71b1a6b 100644
--- a/ld/scripttempl/misc-sections.sc
+++ b/ld/scripttempl/misc-sections.sc
@@ -3,10 +3,23 @@
 # Copying and distribution of this file, with or without modification,
 # are permitted in any medium without royalty provided the copyright
 # notice and this notice are preserved.
-#
+
+# This script fragment gathers together some of the more miscellaneous
+# sections that might appear in a linker's input.  It can be invoked
+# with a single parameter which is the memory region into which loadable
+# sections should be placed.  If the parameter is missing, no memory
+# section placement is used.
+
+if test "x$2" = "x" ;
+then
+  REGION=""
+else
+  REGION="> $2"
+fi
+
 cat <<EOF
   /* Stabs debugging sections.  */
-  .stab          0 : { *(.stab) }
+  .stab          0 : { *(.stab) } 
   .stabstr       0 : { *(.stabstr) }
   .stab.excl     0 : { *(.stab.excl) }
   .stab.exclstr  0 : { *(.stab.exclstr) }
@@ -17,4 +30,15 @@ cat <<EOF
 
   .gnu.build.attributes : { *(.gnu.build.attributes${RELOCATING+ .gnu.build.attributes.*}) }
 
+  /* Various note sections.  Placed here so that they do not get
+     treated as orphan sections.  */
+  .note.build-id :      { *(.note.build-id) } ${RELOCATING+${REGION}}
+  .note.GNU-stack :     { *(.note.GNU-stack) } ${RELOCATING+${REGION}}
+  .note.gnu-property :  { *(.note.gnu-property) } ${RELOCATING+${REGION}}
+  .note.ABI-tag :       { *(.note.ABI-tag) } ${RELOCATING+${REGION}}
+  .note.package :       { *(.note.package) } ${RELOCATING+${REGION}}
+  .note.dlopen :        { *(.note.dlopen) } ${RELOCATING+${REGION}}
+  .note.netbsd.ident :  { *(.note.netbsd.ident) } ${RELOCATING+${REGION}}
+  .note.openbsd.ident : { *(.note.openbsd.ident) } ${RELOCATING+${REGION}}
+
 EOF
diff --git a/ld/scripttempl/nds32elf.sc b/ld/scripttempl/nds32elf.sc
index 0f8366d..ac7de72 100644
--- a/ld/scripttempl/nds32elf.sc
+++ b/ld/scripttempl/nds32elf.sc
@@ -597,6 +597,8 @@ SHLIB_LARGE_DATA_ADDR=". = SEGMENT_START(\"ldata-segment\", ${SHLIB_LARGE_DATA_A
   ${TINY_DATA_SECTION}
   ${TINY_BSS_SECTION}
   ${STACK_ADDR+${STACK}}
+
+  ${RELOCATING+${DISCARDED}}
 EOF
 
 test -z "${NON_ALLOC_DYN}" || emit_dyn
@@ -608,6 +610,5 @@ cat <<EOF
   ${ATTRS_SECTIONS}
   ${OTHER_SECTIONS}
   ${RELOCATING+${OTHER_SYMBOLS}}
-  ${RELOCATING+${DISCARDED}}
 }
 EOF
diff --git a/ld/scripttempl/v850.sc b/ld/scripttempl/v850.sc
index 10d1da8..7daea32 100644
--- a/ld/scripttempl/v850.sc
+++ b/ld/scripttempl/v850.sc
@@ -19,6 +19,10 @@ SEARCH_DIR(.);
 ${RELOCATING+EXTERN(__ctbp __ep __gp)};
 SECTIONS
 {
+  /* PR 32100: GDB makes use of the fact that the .note.gnu.build-id
+     section is typically placed next to the ELF headers.  */
+  .note.gnu.build-id ${RELOCATING-0}: { *(.note.gnu.build-id) }
+
   /* This saves a little space in the ELF file, since the zda starts
      at a higher location that the ELF headers take up.  */
 
diff --git a/ld/scripttempl/v850_rh850.sc b/ld/scripttempl/v850_rh850.sc
index e63e7db..dd9d832 100644
--- a/ld/scripttempl/v850_rh850.sc
+++ b/ld/scripttempl/v850_rh850.sc
@@ -19,6 +19,10 @@ SEARCH_DIR(.);
 ${RELOCATING+EXTERN(__ctbp __ep __gp)};
 SECTIONS
 {
+  /* PR 32100: GDB makes use of the fact that the .note.gnu.build-id
+     section is typically placed next to the ELF headers.  */
+  .note.gnu.build-id ${RELOCATING-0}: { *(.note.gnu.build-id) }
+
   /* This saves a little space in the ELF file, since the zda starts
      at a higher location that the ELF headers take up.  */
 
diff --git a/ld/testsuite/ld-arm/arm-elf.exp b/ld/testsuite/ld-arm/arm-elf.exp
index 272d518..7fa4520 100644
--- a/ld/testsuite/ld-arm/arm-elf.exp
+++ b/ld/testsuite/ld-arm/arm-elf.exp
@@ -653,10 +653,10 @@ set armeabitests_nonacl {
      {{objdump -d thumb2-bl-bad.d}}
      "thumb2-bl-bad"}
     {"Branch to linker script symbol with BL for thumb-only target" "-T branch-lks-sym.ld" "" "" {thumb-bl-lks-sym.s}
-     {{objdump -d thumb-bl-lks-sym.d}}
+     {{ld thumb-bl-lks-sym.output} {objdump -d thumb-bl-lks-sym.d}}
      "thumb-bl-lks-sym"}
     {"Branch to linker script symbol with B for thumb-only target" "-T branch-lks-sym.ld" "" "" {thumb-b-lks-sym.s}
-     {{objdump -d thumb-b-lks-sym.d}}
+     {{ld thumb-b-lks-sym.output} {objdump -d thumb-b-lks-sym.d}}
      "thumb-b-lks-sym"}
 
     {"erratum 760522 fix (default for v6z)" "--section-start=.foo=0x2001014" ""
@@ -1207,6 +1207,8 @@ run_dump_test "attr-merge-wchar-40-nowarn"
 run_dump_test "attr-merge-wchar-42-nowarn"
 run_dump_test "attr-merge-wchar-44-nowarn"
 run_dump_test "farcall-section"
+run_dump_test "farcall-missing-type"
+run_dump_test "farcall-missing-type-undefweak"
 run_dump_test "attr-merge-unknown-1"
 run_dump_test "attr-merge-unknown-2"
 run_dump_test "attr-merge-unknown-2r"
diff --git a/ld/testsuite/ld-arm/attr-merge-arch-2b.s b/ld/testsuite/ld-arm/attr-merge-arch-2b.s
index 5771835..f20522f 100644
--- a/ld/testsuite/ld-arm/attr-merge-arch-2b.s
+++ b/ld/testsuite/ld-arm/attr-merge-arch-2b.s
@@ -4,5 +4,6 @@
         .align  2
         .global foo
         .type   foo, %function
+	.thumb_func
 foo:
         bx      lr
diff --git a/ld/testsuite/ld-arm/bfs-1.s b/ld/testsuite/ld-arm/bfs-1.s
index 2b72819..1e31d44 100644
--- a/ld/testsuite/ld-arm/bfs-1.s
+++ b/ld/testsuite/ld-arm/bfs-1.s
@@ -4,6 +4,7 @@
 .thumb
 .global _start
 .global target
+.type target, %function
 _start:
 target:
 	add	r0, r0, r1
diff --git a/ld/testsuite/ld-arm/branch-futures.d b/ld/testsuite/ld-arm/branch-futures.d
index 427ecce..bc9ae8e 100644
--- a/ld/testsuite/ld-arm/branch-futures.d
+++ b/ld/testsuite/ld-arm/branch-futures.d
@@ -5,13 +5,13 @@
 Disassembly of section .text:
 
 0[0-9a-f]+ <future>:
-    [0-9a-f]+:	f2c0 e807 	bf	a, 8012 <_start>
-    [0-9a-f]+:	f182 e805 	bfcsel	6, 8012 <_start>, a, eq
-    [0-9a-f]+:	f080 c803 	bfl	2, 8012 <_start>
+    [0-9a-f]+:	f2c0 e807 	bf	a, 8012 <target>
+    [0-9a-f]+:	f182 e805 	bfcsel	6, 8012 <target>, a, eq
+    [0-9a-f]+:	f080 c803 	bfl	2, 8012 <target>
     [0-9a-f]+:	4408      	add	r0, r1
 
 0[0-9a-f]+ <branch>:
-    [0-9a-f]+:	f000 b800 	b.w	8012 <_start>
+    [0-9a-f]+:	f000 b800 	b.w	8012 <target>
 
-0[0-9a-f]+ <_start>:
+0[0-9a-f]+ <target>:
     [0-9a-f]+:	4408      	add	r0, r1
diff --git a/ld/testsuite/ld-arm/farcall-missing-type-bad.s b/ld/testsuite/ld-arm/farcall-missing-type-bad.s
new file mode 100644
index 0000000..e087992
--- /dev/null
+++ b/ld/testsuite/ld-arm/farcall-missing-type-bad.s
@@ -0,0 +1,7 @@
+	.thumb
+	.cpu cortex-m33
+	.syntax unified
+	.section .text.bar
+	.global bad @ untyped
+#	.type bad, function
+bad:	bx lr
diff --git a/ld/testsuite/ld-arm/farcall-missing-type-main-undefweak.s b/ld/testsuite/ld-arm/farcall-missing-type-main-undefweak.s
new file mode 100644
index 0000000..cf72722
--- /dev/null
+++ b/ld/testsuite/ld-arm/farcall-missing-type-main-undefweak.s
@@ -0,0 +1,10 @@
+	.thumb
+	.cpu cortex-m33
+	.syntax unified
+	.global __start
+	.weak	bad
+	.type __start, function
+__start:
+	push	{r4, lr}
+	bl	bad
+	pop	{r4, pc}
diff --git a/ld/testsuite/ld-arm/farcall-missing-type-main.s b/ld/testsuite/ld-arm/farcall-missing-type-main.s
new file mode 100644
index 0000000..c97df0c
--- /dev/null
+++ b/ld/testsuite/ld-arm/farcall-missing-type-main.s
@@ -0,0 +1,9 @@
+	.thumb
+	.cpu cortex-m33
+	.syntax unified
+	.global __start
+	.type __start, function
+__start:
+	push	{r4, lr}
+	bl	bad
+	pop	{r4, pc}
diff --git a/ld/testsuite/ld-arm/farcall-missing-type-undefweak.d b/ld/testsuite/ld-arm/farcall-missing-type-undefweak.d
new file mode 100644
index 0000000..b6e123f
--- /dev/null
+++ b/ld/testsuite/ld-arm/farcall-missing-type-undefweak.d
@@ -0,0 +1,11 @@
+#source: farcall-missing-type-main-undefweak.s
+#as:
+#ld:-T farcall-missing-type.ld
+#objdump: -dr
+#...
+Disassembly of section .text:
+
+.* <__start>:
+ +[0-9a-f]+:	.... .... 	push	{r4, lr}
+ +[0-9a-f]+:	.... .... 	nop.w
+ +[0-9a-f]+:	.... .... 	pop	{r4, pc}
diff --git a/ld/testsuite/ld-arm/farcall-missing-type.d b/ld/testsuite/ld-arm/farcall-missing-type.d
new file mode 100644
index 0000000..9766bf1
--- /dev/null
+++ b/ld/testsuite/ld-arm/farcall-missing-type.d
@@ -0,0 +1,5 @@
+#source: farcall-missing-type-main.s
+#source: farcall-missing-type-bad.s
+#as:
+#ld:-T farcall-missing-type.ld
+#error: .* .*/farcall-missing-type-bad.o\(bad\): Unknown destination type \(ARM/Thumb\) in .*/farcall-missing-type-main.o
diff --git a/ld/testsuite/ld-arm/farcall-missing-type.ld b/ld/testsuite/ld-arm/farcall-missing-type.ld
new file mode 100644
index 0000000..b1136de
--- /dev/null
+++ b/ld/testsuite/ld-arm/farcall-missing-type.ld
@@ -0,0 +1,23 @@
+/* Linker script to configure memory regions. */
+MEMORY
+{
+  FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x40000   /* 256k */
+  FLASH2 (rx) : ORIGIN = 0x200001e0, LENGTH = 0x4000
+}
+
+ENTRY(__start)
+
+SECTIONS
+{
+	.far_away_section :
+	{
+	  *(.text.bar)
+	} > FLASH2
+
+	.text :
+	{
+		*(.text*)
+
+	} > FLASH
+
+}
diff --git a/ld/testsuite/ld-arm/thumb-b-lks-sym.output b/ld/testsuite/ld-arm/thumb-b-lks-sym.output
new file mode 100644
index 0000000..4961204
--- /dev/null
+++ b/ld/testsuite/ld-arm/thumb-b-lks-sym.output
@@ -0,0 +1 @@
+.* \(extFunc\): Forcing branch to absolute symbol in Thumb mode \(Thumb-only CPU\) in tmpdir/thumb-b-lks-sym.o
diff --git a/ld/testsuite/ld-arm/thumb-bl-lks-sym.output b/ld/testsuite/ld-arm/thumb-bl-lks-sym.output
new file mode 100644
index 0000000..7c5e354
--- /dev/null
+++ b/ld/testsuite/ld-arm/thumb-bl-lks-sym.output
@@ -0,0 +1 @@
+.* \(extFunc\): Forcing branch to absolute symbol in Thumb mode \(Thumb-only CPU\) in tmpdir/thumb-bl-lks-sym.o
diff --git a/ld/testsuite/ld-elf/build-id.exp b/ld/testsuite/ld-elf/build-id.exp
index 1bf258b..6bf8f3d 100644
--- a/ld/testsuite/ld-elf/build-id.exp
+++ b/ld/testsuite/ld-elf/build-id.exp
@@ -36,42 +36,71 @@ if { !([istarget *-*-linux*]
     return
 }
 
-run_ld_link_tests [list \
-    [list \
-	"pr28639a.o" \
-	"-r --build-id=md5" \
-	"" \
-	"" \
-	{start.s} \
-	{{readelf {--notes} pr28639a.rd}} \
-	"pr28639a.o" \
-    ] \
-    [list \
-	"pr28639a.o" \
-	"-r --build-id" \
-	"" \
-	"" \
-	{dummy.s} \
-	{{readelf {--notes} pr28639b.rd}} \
-	"pr28639b.o" \
-    ] \
-    [list \
-	"pr28639a" \
-	"--build-id tmpdir/pr28639a.o tmpdir/pr28639b.o" \
-	"" \
-	"" \
-	{dummy.s} \
-	{{readelf {--notes} pr28639b.rd}  \
-	 {readelf {--notes} pr28639c.rd}} \
-	"pr28639a" \
-    ] \
-    [list \
-	"pr28639b" \
-	"--build-id=none tmpdir/pr28639a.o tmpdir/pr28639b.o" \
-	"" \
-	"" \
-	{dummy.s} \
-	{{readelf {--notes} pr28639d.rd}} \
-	"pr28639b" \
-    ] \
-]
+
+set stylelist {"" "--build-id" "--build-id=none" "--build-id=md5"
+    "--build-id=sha1" "--build-id=guid" "--build-id=0xdeadbeef"}
+
+run_ld_link_tests {
+    {
+	"pr28639a.o"
+	"-r --build-id=md5"
+	""
+	""
+	{start.s}
+	{{readelf {--notes} pr28639a.rd}}
+	"pr28639a.o"
+    }
+    {
+	"pr28639b.o"
+	"-r --build-id"
+	""
+	""
+	{dummy.s}
+	{{readelf {--notes} pr28639b.rd}}
+	"pr28639b.o"
+    }
+    {
+	"pr28639a.o deadbeef"
+	"-r --build-id=0xdeadbeef"
+	""
+	""
+	{start.s}
+	{{readelf {--notes} pr28639e.rd}}
+	"pr28639a.o"
+    }
+    {
+	"pr28639a"
+	"--build-id tmpdir/pr28639a.o tmpdir/pr28639b.o"
+	""
+	""
+	{dummy.s}
+	{{readelf {--notes} pr28639b.rd}
+	 {readelf {--notes} pr28639c.rd}}
+	"pr28639a"
+    }
+    {
+	"pr28639b"
+	"--build-id=none tmpdir/pr28639a.o tmpdir/pr28639b.o"
+	""
+	""
+	{dummy.s}
+	{{readelf {--notes} pr28639d.rd}}
+	"pr28639b"
+    }
+}
+
+# see if linker supports xx style also
+catch "exec $ld --help | grep -A2 -- --build-id | grep Styles" tmp
+if {[string first ",xx," $tmp] >= 0} then {
+    run_ld_link_tests {
+        {
+            "pr28639a.o xx"
+            "-r --build-id=xx"
+            ""
+            ""
+            {start.s}
+            {{readelf {--notes} pr28639a.rd}} # 16 bytes
+            "pr28639a.o"
+        }
+    }
+}
diff --git a/ld/testsuite/ld-elf/pr21884.d b/ld/testsuite/ld-elf/pr21884.d
index e289b41..3d44ccf 100644
--- a/ld/testsuite/ld-elf/pr21884.d
+++ b/ld/testsuite/ld-elf/pr21884.d
@@ -3,7 +3,7 @@
 #ld: -T pr21884.t
 #objdump: -b binary -s
 #xfail: aarch64*-*-* arm*-*-* avr-*-* ia64-*-* m68hc1*-*-* nds32*-*-*
-#xfail: riscv*-*-* score-*-* v850-*-* loongarch*-*-*
+#xfail: riscv*-*-* score-*-* v850-*-*
 # Skip targets which can't change output format to binary.
 
 .*:     file format binary
diff --git a/ld/testsuite/ld-elf/pr22393-1e.d b/ld/testsuite/ld-elf/pr22393-1e.d
index 51d74fa..55f7e9a 100644
--- a/ld/testsuite/ld-elf/pr22393-1e.d
+++ b/ld/testsuite/ld-elf/pr22393-1e.d
@@ -2,7 +2,7 @@
 #ld: -z separate-code
 #readelf: -l --wide
 #target: *-*-linux-gnu *-*-gnu* *-*-nacl* arm*-*-uclinuxfdpiceabi
-#xfail: h8300-*-* rx-*-linux*
+#xfail: rx-*-linux*
 
 #failif
 #...
diff --git a/ld/testsuite/ld-elf/pr22393-1f.d b/ld/testsuite/ld-elf/pr22393-1f.d
index 2a44955..bc61b63 100644
--- a/ld/testsuite/ld-elf/pr22393-1f.d
+++ b/ld/testsuite/ld-elf/pr22393-1f.d
@@ -2,7 +2,7 @@
 #ld: -z separate-code
 #readelf: -l --wide
 #target: *-*-linux-gnu *-*-gnu* *-*-nacl* arm*-*-uclinuxfdpiceabi
-#xfail: h8300-*-* rx-*-linux*
+#xfail: rx-*-linux*
 
 #failif
 #...
diff --git a/ld/testsuite/ld-elf/pr22393-2a.rd b/ld/testsuite/ld-elf/pr22393-2a.rd
index 0050f1b..a9c5478 100644
--- a/ld/testsuite/ld-elf/pr22393-2a.rd
+++ b/ld/testsuite/ld-elf/pr22393-2a.rd
@@ -1,5 +1,5 @@
 #source: pr22393-1.s
-#ld: -shared -z separate-code
+#ld: -shared -z separate-code --no-rosegment
 #readelf: -l --wide
 #target: *-*-linux-gnu *-*-gnu* *-*-nacl*
 
diff --git a/ld/testsuite/ld-elf/pr22393-2b.rd b/ld/testsuite/ld-elf/pr22393-2b.rd
index 0050f1b..a9c5478 100644
--- a/ld/testsuite/ld-elf/pr22393-2b.rd
+++ b/ld/testsuite/ld-elf/pr22393-2b.rd
@@ -1,5 +1,5 @@
 #source: pr22393-1.s
-#ld: -shared -z separate-code
+#ld: -shared -z separate-code --no-rosegment
 #readelf: -l --wide
 #target: *-*-linux-gnu *-*-gnu* *-*-nacl*
 
diff --git a/ld/testsuite/ld-elf/pr23658-1a.d b/ld/testsuite/ld-elf/pr23658-1a.d
index 10c6ef3..21847f9 100644
--- a/ld/testsuite/ld-elf/pr23658-1a.d
+++ b/ld/testsuite/ld-elf/pr23658-1a.d
@@ -3,16 +3,14 @@
 #source: pr23658-1c.s
 #source: pr23658-1d.s
 #source: start.s
-#ld: --build-id
+#ld: --build-id --no-rosegment
 #readelf: -l --wide
 # Since generic linker targets don't place SHT_NOTE sections as orphan,
 # SHT_NOTE sections aren't grouped nor sorted.
 #xfail: [uses_genelf]
 #xfail: m68hc12-*
-# The following targets don't support --build-id.
-#xfail: cr16-* crx-* visium-*
 # The following targets place .note.gnu.build-id in unusual places.
-#xfail: pru-*
+#xfail: d10v-* pru-*
 
 #...
  +[0-9]+ +\.note\.4 \.note\.1 +
diff --git a/ld/testsuite/ld-elf/pr23658-1c.d b/ld/testsuite/ld-elf/pr23658-1c.d
index 87aceca..6ab72dc 100644
--- a/ld/testsuite/ld-elf/pr23658-1c.d
+++ b/ld/testsuite/ld-elf/pr23658-1c.d
@@ -3,7 +3,7 @@
 #source: pr23658-1c.s
 #source: pr23658-1d.s
 #source: start.s
-#ld: --build-id -shared
+#ld: --build-id --no-rosegment -shared
 #readelf: -l --wide
 #target: *-*-linux* *-*-gnu* arm*-*-uclinuxfdpiceabi
 #xfail: ![check_shared_lib_support] 
diff --git a/ld/testsuite/ld-elf/pr23658-1e.d b/ld/testsuite/ld-elf/pr23658-1e.d
new file mode 100644
index 0000000..992c748
--- /dev/null
+++ b/ld/testsuite/ld-elf/pr23658-1e.d
@@ -0,0 +1,24 @@
+#source: pr23658-1a.s
+#source: pr23658-1b.s
+#source: pr23658-1c.s
+#source: pr23658-1d.s
+#source: start.s
+#ld: --build-id -z separate-code --rosegment
+#readelf: -l --wide
+# Since generic linker targets don't place SHT_NOTE sections as orphan,
+# SHT_NOTE sections aren't grouped nor sorted.  .note.gnu.build-id is
+# placed before text sections and there should no other note sections
+# between .note.gnu.build-id and text sections.
+#xfail: [uses_genelf]
+#xfail: m68hc12-*
+# The following targets don't support --build-id.
+#xfail: cr16-* crx-* visium-*
+# The following targets place .note.gnu.build-id in unusual places.
+#xfail: *-*-hpux* arc*-* avr-* microblaze-*-* nds32*-* spu-*-*
+
+#...
+ +[0-9]+ +\.note.gnu.build-id +
+#...
+ +[0-9]+ +\.note\.4 \.note\.1 +
+ +[0-9]+ +\.note\.2 \.note\.3 +
+#pass
diff --git a/ld/testsuite/ld-elf/pr23658-1f.d b/ld/testsuite/ld-elf/pr23658-1f.d
new file mode 100644
index 0000000..1823111
--- /dev/null
+++ b/ld/testsuite/ld-elf/pr23658-1f.d
@@ -0,0 +1,17 @@
+#source: pr23658-1a.s
+#source: pr23658-1b.s
+#source: pr23658-1c.s
+#source: pr23658-1d.s
+#source: start.s
+#ld: --build-id -z separate-code --rosegment -shared
+# .note.gnu.build-id is placed before text sections and there should
+# no other note sections between .note.gnu.build-id and text sections.
+#readelf: -l --wide
+#target: *-*-linux* *-*-gnu* arm*-*-uclinuxfdpiceabi
+#xfail: ![check_shared_lib_support]
+
+#...
+ +[0-9]+ +\.note.gnu.build-id +
+ +[0-9]+ +\.note\.4 \.note\.1 +
+ +[0-9]+ +\.note\.2 \.note\.3 +
+#pass
diff --git a/ld/testsuite/ld-elf/pr28639e.rd b/ld/testsuite/ld-elf/pr28639e.rd
new file mode 100644
index 0000000..15157ba
--- /dev/null
+++ b/ld/testsuite/ld-elf/pr28639e.rd
@@ -0,0 +1,6 @@
+#...
+Displaying notes found in: \.note\.gnu\.build-id
+  Owner                Data size 	Description
+  GNU                  0x00000004	NT_GNU_BUILD_ID \(unique build ID bitstring\)
+    Build ID: deadbeef
+#pass
diff --git a/ld/testsuite/ld-elf/pr30508.d b/ld/testsuite/ld-elf/pr30508.d
index 325ff40..1692780 100644
--- a/ld/testsuite/ld-elf/pr30508.d
+++ b/ld/testsuite/ld-elf/pr30508.d
@@ -2,7 +2,7 @@
 #objcopy_linked_file: -R .foo
 #readelf: -lW
 #target: *-*-linux-gnu *-*-gnu* *-*-nacl* arm*-*-uclinuxfdpiceabi
-#xfail: h8300-*-* mips*-*-* rx-*-linux*
+#xfail: mips*-*-* rx-*-linux*
 
 #...
  Section to Segment mapping:
diff --git a/ld/testsuite/ld-elf/shared.exp b/ld/testsuite/ld-elf/shared.exp
index 281c3f5..e13e7e0 100644
--- a/ld/testsuite/ld-elf/shared.exp
+++ b/ld/testsuite/ld-elf/shared.exp
@@ -1410,7 +1410,7 @@ if { [istarget *-*-linux*]
 	] \
 	[list \
 	    "Build pr22393-2a.so" \
-	    "-shared -Wl,-z,separate-code" \
+	    "-shared -Wl,-z,separate-code,--no-rosegment" \
 	    "-fPIC" \
 	    {pr22393-2a.c} \
 	    {{readelf -lW pr22393-2a.rd} \
@@ -1419,7 +1419,7 @@ if { [istarget *-*-linux*]
 	] \
 	[list \
 	    "Build pr22393-2a-now.so" \
-	    "-shared -Wl,-z,separate-code,-z,now" \
+	    "-shared -Wl,-z,separate-code,-z,now,--no-rosegment" \
 	    "-fPIC" \
 	    {pr22393-2a.c} \
 	    {{readelf -lW pr22393-2a.rd} \
@@ -1428,7 +1428,7 @@ if { [istarget *-*-linux*]
 	] \
 	[list \
 	    "Build pr22393-2" \
-	    "$NOPIE_LDFLAGS -Wl,-z,separate-code,--no-as-needed tmpdir/pr22393-2a.so" \
+	    "$NOPIE_LDFLAGS -Wl,-z,separate-code,--no-rosegment,--no-as-needed tmpdir/pr22393-2a.so" \
 	    "$NOPIE_CFLAGS" \
 	    {pr22393-2b.c} \
 	    {{readelf -lW pr22393-2a.rd} \
@@ -1437,7 +1437,7 @@ if { [istarget *-*-linux*]
 	] \
 	[list \
 	    "Build pr22393-2 (PIE)" \
-	    "-pie -Wl,-z,separate-code,--no-as-needed tmpdir/pr22393-2a-now.so" \
+	    "-pie -Wl,-z,separate-code,--no-rosegment,--no-as-needed tmpdir/pr22393-2a-now.so" \
 	    "-fPIE" \
 	    {pr22393-2b.c} \
 	    {{readelf -lW pr22393-2a.rd} \
@@ -1446,7 +1446,7 @@ if { [istarget *-*-linux*]
 	] \
 	[list \
 	    "Build pr22393-2 (static)" \
-	    "-static -Wl,-z,separate-code" \
+	    "-static -Wl,-z,separate-code,--no-rosegment" \
 	    "" \
 	    {pr22393-2a.c pr22393-2b.c} \
 	    {{readelf -lW pr22393-2a.rd} \
diff --git a/ld/testsuite/ld-i386/i386.exp b/ld/testsuite/ld-i386/i386.exp
index d5f322d..9029322 100644
--- a/ld/testsuite/ld-i386/i386.exp
+++ b/ld/testsuite/ld-i386/i386.exp
@@ -314,6 +314,7 @@ run_dump_test "tlsie2"
 run_dump_test "tlsie3"
 run_dump_test "tlsie4"
 run_dump_test "tlsie5"
+run_dump_test "tlsle1"
 run_dump_test "hidden1"
 run_dump_test "hidden2"
 run_dump_test "hidden3"
@@ -513,6 +514,7 @@ run_dump_test "pr28870"
 run_dump_test "pr28894"
 run_dump_test "pr30787"
 run_dump_test "pr31047"
+run_dump_test "pr32191"
 
 if { !([istarget "i?86-*-linux*"]
        || [istarget "i?86-*-gnu*"]
@@ -546,6 +548,7 @@ run_dump_test "pr31868b"
 run_dump_test "pr31868c"
 run_dump_test "tlsgdesc1"
 run_dump_test "tlsgdesc2"
+run_dump_test "tlsgdesc3"
 
 proc undefined_weak {cflags ldflags} {
     set testname "Undefined weak symbol"
@@ -1323,6 +1326,14 @@ if { [isnative]
 	    {{error_output "pr21997-1.err"}} \
 	    "pr21997-1" \
 	] \
+	[list \
+	    "Build pr32067" \
+	    "-Wl,--oformat,binary -nostdlib -nostartfiles" \
+	    "" \
+	    { start.s ../ld-x86-64/pr32067.s } \
+	    {} \
+	    "pr32067" \
+	] \
     ]
 
     # The musl C library does not support TEXTRELs.
diff --git a/ld/testsuite/ld-i386/pr32191.d b/ld/testsuite/ld-i386/pr32191.d
new file mode 100644
index 0000000..8d7838a
--- /dev/null
+++ b/ld/testsuite/ld-i386/pr32191.d
@@ -0,0 +1,9 @@
+#source: ../ld-x86-64/pr32191.s
+#as: --32 -mx86-used-note=yes
+#ld: -shared -m elf_i386 -z separate-code --build-id --rosegment
+#readelf: -lW
+
+#...
+ +[0-9]+ +\.note\.gnu\.build-id \.text 
+ +[0-9]+ +\..* \.note\.gnu\.property .*
+#pass
diff --git a/ld/testsuite/ld-i386/start.s b/ld/testsuite/ld-i386/start.s
index 80301c6..4262a33 100644
--- a/ld/testsuite/ld-i386/start.s
+++ b/ld/testsuite/ld-i386/start.s
@@ -1,3 +1,4 @@
 	.globl _start
 _start:
 	jmp foo
+	.section	.note.GNU-stack
diff --git a/ld/testsuite/ld-i386/tlsgdesc1.d b/ld/testsuite/ld-i386/tlsgdesc1.d
index 2a70e81..0c853ab 100644
--- a/ld/testsuite/ld-i386/tlsgdesc1.d
+++ b/ld/testsuite/ld-i386/tlsgdesc1.d
@@ -1,4 +1,4 @@
 #name: TLS GDesc->LE transition check (LEA)
-#as: --32
+#as: --32 -mtls-check=no
 #ld: -melf_i386
 #error: .*: relocation R_386_TLS_GOTDESC against `foo' must be used in LEA only
diff --git a/ld/testsuite/ld-i386/tlsgdesc2.d b/ld/testsuite/ld-i386/tlsgdesc2.d
index 2e6a66d..99e1b18 100644
--- a/ld/testsuite/ld-i386/tlsgdesc2.d
+++ b/ld/testsuite/ld-i386/tlsgdesc2.d
@@ -1,4 +1,4 @@
 #name: TLS GDesc->LE transition check (indirect CALL)
-#as: --32
+#as: --32 -mtls-check=no
 #ld: -melf_i386
-#error: .*: relocation R_386_TLS_DESC_CALL against `foo' must be used in indirect CALL only
+#error: .*: relocation R_386_TLS_DESC_CALL against `foo' must be used in indirect CALL with EAX register only
diff --git a/ld/testsuite/ld-i386/tlsgdesc2.s b/ld/testsuite/ld-i386/tlsgdesc2.s
index 7d9d556..5d3d0b8 100644
--- a/ld/testsuite/ld-i386/tlsgdesc2.s
+++ b/ld/testsuite/ld-i386/tlsgdesc2.s
@@ -1,8 +1,8 @@
 	.text
 	.globl _start
 _start:
-	leal	foo@tlsdesc(%ebx), %eax
-	jmp	*foo@tlscall(%eax)
+	leal	foo@tlsdesc(%ebx), %ecx
+	call	*foo@tlscall(%ecx)
 	.section	.tdata,"awT",@progbits
 	.align 4
 	.type	foo, @object
diff --git a/ld/testsuite/ld-i386/tlsgdesc3.d b/ld/testsuite/ld-i386/tlsgdesc3.d
new file mode 100644
index 0000000..4bb99c4
--- /dev/null
+++ b/ld/testsuite/ld-i386/tlsgdesc3.d
@@ -0,0 +1,5 @@
+#source: tlsgdesc2.s
+#name: TLS GDesc call (indirect CALL)
+#as: --32 -mtls-check=no
+#ld: -shared -melf_i386
+#error: .*: relocation R_386_TLS_DESC_CALL against `foo' must be used in indirect CALL with EAX register only
diff --git a/ld/testsuite/ld-i386/tlsie2.d b/ld/testsuite/ld-i386/tlsie2.d
index 9f9e630..4e7dc6e 100644
--- a/ld/testsuite/ld-i386/tlsie2.d
+++ b/ld/testsuite/ld-i386/tlsie2.d
@@ -1,4 +1,4 @@
 #name: TLS IE->LE transition check (R_386_TLS_GOTIE with %eax)
-#as: --32
+#as: --32 -mtls-check=no
 #ld: -melf_i386
 #error: .*: relocation R_386_TLS_GOTIE against `foo' must be used in ADD, SUB or MOV only
diff --git a/ld/testsuite/ld-i386/tlsie3.d b/ld/testsuite/ld-i386/tlsie3.d
index 506f1a0..6bfc78e 100644
--- a/ld/testsuite/ld-i386/tlsie3.d
+++ b/ld/testsuite/ld-i386/tlsie3.d
@@ -1,4 +1,4 @@
 #name: TLS IE->LE transition check (R_386_TLS_GOTIE)
-#as: --32
+#as: --32 -mtls-check=no
 #ld: -melf_i386
 #error: .*: relocation R_386_TLS_GOTIE against `foo' must be used in ADD, SUB or MOV only
diff --git a/ld/testsuite/ld-i386/tlsie4.d b/ld/testsuite/ld-i386/tlsie4.d
index a516d00..98293f4 100644
--- a/ld/testsuite/ld-i386/tlsie4.d
+++ b/ld/testsuite/ld-i386/tlsie4.d
@@ -1,4 +1,4 @@
 #name: TLS IE->LE transition check (R_386_TLS_IE with %eax)
-#as: --32
+#as: --32 -mtls-check=no
 #ld: -melf_i386
 #error: .*: relocation R_386_TLS_IE against `foo' must be used in ADD or MOV only
diff --git a/ld/testsuite/ld-i386/tlsie5.d b/ld/testsuite/ld-i386/tlsie5.d
index d344718..4e9c9a8 100644
--- a/ld/testsuite/ld-i386/tlsie5.d
+++ b/ld/testsuite/ld-i386/tlsie5.d
@@ -1,4 +1,4 @@
 #name: TLS IE->LE transition check (R_386_TLS_IE)
-#as: --32
+#as: --32 -mtls-check=no
 #ld: -melf_i386
 #error: .*: relocation R_386_TLS_IE against `foo' must be used in ADD or MOV only
diff --git a/ld/testsuite/ld-i386/tlsle1.d b/ld/testsuite/ld-i386/tlsle1.d
new file mode 100644
index 0000000..d1b65f2
--- /dev/null
+++ b/ld/testsuite/ld-i386/tlsle1.d
@@ -0,0 +1,15 @@
+#name: TLS LE with kmovd
+#as: --32
+#ld: -melf_i386
+#objdump: -dw
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+.* <_start>:
+.*:	65 c4 e1 f9 90 05 04 00 00 00 	kmovd  %gs:0x4,%k0
+.*:	c4 e1 f9 90 80 04 00 00 00 	kmovd  0x4\(%eax\),%k0
+.*:	65 c4 e1 f9 90 05 fc ff ff ff 	kmovd  %gs:0xfffffffc,%k0
+.*:	c4 e1 f9 90 80 fc ff ff ff 	kmovd  -0x4\(%eax\),%k0
+#pass
diff --git a/ld/testsuite/ld-i386/tlsle1.s b/ld/testsuite/ld-i386/tlsle1.s
new file mode 100644
index 0000000..283b903
--- /dev/null
+++ b/ld/testsuite/ld-i386/tlsle1.s
@@ -0,0 +1,14 @@
+	.text
+	.globl _start
+_start:
+	kmovd %gs:foo@tpoff,%k0
+	kmovd foo@tpoff(%eax),%k0
+	kmovd %gs:foo@ntpoff,%k0
+	kmovd foo@ntpoff(%eax),%k0
+	.globl foo
+	.section	.tdata,"awT",@progbits
+	.align 4
+	.type	foo, @object
+	.size	foo, 4
+foo:
+	.long	100
diff --git a/ld/testsuite/ld-loongarch-elf/abs-global.out b/ld/testsuite/ld-loongarch-elf/abs-global.out
new file mode 100644
index 0000000..3656652
--- /dev/null
+++ b/ld/testsuite/ld-loongarch-elf/abs-global.out
@@ -0,0 +1 @@
+abba
diff --git a/ld/testsuite/ld-loongarch-elf/abs-global.s b/ld/testsuite/ld-loongarch-elf/abs-global.s
new file mode 100644
index 0000000..93a5da6
--- /dev/null
+++ b/ld/testsuite/ld-loongarch-elf/abs-global.s
@@ -0,0 +1,5 @@
+.text
+.globl get_sym
+get_sym:
+ la.global $a0, sym
+ ret
diff --git a/ld/testsuite/ld-loongarch-elf/binary.ld b/ld/testsuite/ld-loongarch-elf/binary.ld
new file mode 100644
index 0000000..73cd4f2
--- /dev/null
+++ b/ld/testsuite/ld-loongarch-elf/binary.ld
@@ -0,0 +1 @@
+OUTPUT_FORMAT(binary);
diff --git a/ld/testsuite/ld-loongarch-elf/binary.s b/ld/testsuite/ld-loongarch-elf/binary.s
new file mode 100644
index 0000000..b0aeb62
--- /dev/null
+++ b/ld/testsuite/ld-loongarch-elf/binary.s
@@ -0,0 +1,4 @@
+.text
+  ret
+.data
+  .4byte 0x12345678
diff --git a/ld/testsuite/ld-loongarch-elf/get_abs_global_sym.c b/ld/testsuite/ld-loongarch-elf/get_abs_global_sym.c
new file mode 100644
index 0000000..29781ad
--- /dev/null
+++ b/ld/testsuite/ld-loongarch-elf/get_abs_global_sym.c
@@ -0,0 +1,7 @@
+#include <stdio.h>
+
+extern int get_sym();
+int main() {
+	printf("%x\n", get_sym());
+	return 0;
+}
diff --git a/ld/testsuite/ld-loongarch-elf/ld-loongarch-elf.exp b/ld/testsuite/ld-loongarch-elf/ld-loongarch-elf.exp
index fb34eeb..6bef97c2 100644
--- a/ld/testsuite/ld-loongarch-elf/ld-loongarch-elf.exp
+++ b/ld/testsuite/ld-loongarch-elf/ld-loongarch-elf.exp
@@ -118,6 +118,30 @@ if [istarget "loongarch64-*-*"] {
 	      "abi1_max_imm" \
 	  ] \
       ]
+
+  run_ld_link_tests \
+      [list \
+	   [list \
+		"binary output format" \
+		"-T binary.ld" "" \
+		"" \
+		{binary.s} \
+		{} \
+		"a.binary" \
+	   ] \
+      ]
+
+
+  run_ld_link_exec_tests [list \
+	[list \
+	    "get global abs symbol test" \
+	    "-Wl,-z norelro -Wl,--defsym sym=0xabba" \
+	    "" \
+	    { abs-global.s get_abs_global_sym.c} \
+	    "abs-global" \
+	    "abs-global.out" \
+	] \
+    ]
 }
 
 if [istarget "loongarch64-*-*"] {
@@ -149,6 +173,7 @@ if [istarget "loongarch64-*-*"] {
     run_dump_test "relr-data-pie"
     run_dump_test "relr-discard-pie"
     run_dump_test "relr-got-pie"
+    run_dump_test "relr-got-start"
     run_dump_test "relr-text-pie"
     run_dump_test "abssym_pie"
   }
@@ -171,5 +196,8 @@ if [istarget "loongarch64-*-*"] {
   run_dump_test "ie-le-relax"
   run_dump_test "tlsdesc_abs"
   run_dump_test "tlsdesc_extreme"
+  run_dump_test "provide_abs"
+  run_dump_test "provide_noabs"
+
 }
 
diff --git a/ld/testsuite/ld-loongarch-elf/provide_abs.d b/ld/testsuite/ld-loongarch-elf/provide_abs.d
new file mode 100644
index 0000000..1514fb1
--- /dev/null
+++ b/ld/testsuite/ld-loongarch-elf/provide_abs.d
@@ -0,0 +1,12 @@
+#source: provide_sym.s
+#as:
+#ld: -T provide_abs.ld
+#objdump: -d
+
+.*: +file format .*
+
+#...
+   0:	58001085 	beq         	\$a0, \$a1, 16	# 10 <fun1>
+   4:	40000c80 	beqz        	\$a0, 12	# 10 <fun1>
+   8:	54000800 	bl          	8	# 10 <fun1>
+#pass
diff --git a/ld/testsuite/ld-loongarch-elf/provide_abs.ld b/ld/testsuite/ld-loongarch-elf/provide_abs.ld
new file mode 100644
index 0000000..473476c
--- /dev/null
+++ b/ld/testsuite/ld-loongarch-elf/provide_abs.ld
@@ -0,0 +1 @@
+PROVIDE(fun1 = 0x10);
diff --git a/ld/testsuite/ld-loongarch-elf/provide_noabs.d b/ld/testsuite/ld-loongarch-elf/provide_noabs.d
new file mode 100644
index 0000000..7d6bc4d
--- /dev/null
+++ b/ld/testsuite/ld-loongarch-elf/provide_noabs.d
@@ -0,0 +1,13 @@
+#source: provide_sym.s
+#as:
+#ld: -T provide_noabs.ld
+#objdump: -d
+
+.*: +file format .*
+
+
+#...
+   0:	58001085 	beq         	\$a0, \$a1, 16	# 10 <fun1>
+   4:	40000c80 	beqz        	\$a0, 12	# 10 <fun1>
+   8:	54000800 	bl          	8	# 10 <fun1>
+#pass
diff --git a/ld/testsuite/ld-loongarch-elf/provide_noabs.ld b/ld/testsuite/ld-loongarch-elf/provide_noabs.ld
new file mode 100644
index 0000000..0154c6f
--- /dev/null
+++ b/ld/testsuite/ld-loongarch-elf/provide_noabs.ld
@@ -0,0 +1,7 @@
+SECTIONS
+{
+  .text :
+  {
+    PROVIDE(fun1 = 0x10);
+  }
+}
diff --git a/ld/testsuite/ld-loongarch-elf/provide_sym.s b/ld/testsuite/ld-loongarch-elf/provide_sym.s
new file mode 100644
index 0000000..6610894
--- /dev/null
+++ b/ld/testsuite/ld-loongarch-elf/provide_sym.s
@@ -0,0 +1,7 @@
+	.text
+	.globl	main
+	.type	main, @function
+main:
+	beq	$a0,$a1,%b16(fun1)
+	beqz	$a0,%b21(fun1)
+	bl	%b26(fun1)
diff --git a/ld/testsuite/ld-loongarch-elf/relr-got-start.d b/ld/testsuite/ld-loongarch-elf/relr-got-start.d
new file mode 100644
index 0000000..0b1a5b9
--- /dev/null
+++ b/ld/testsuite/ld-loongarch-elf/relr-got-start.d
@@ -0,0 +1,7 @@
+#source: relr-got-start.s
+#ld: -pie -z pack-relative-relocs -T relr-relocs.ld
+#readelf: -rW
+
+Relocation section '\.relr\.dyn' at offset 0x[a-z0-f]+ contains 1 entry which relocates 1 location:
+Index: Entry            Address           Symbolic Address
+0000:  0000000000020008 0000000000020008  _GLOBAL_OFFSET_TABLE_ \+ 0x8
diff --git a/ld/testsuite/ld-loongarch-elf/relr-got-start.s b/ld/testsuite/ld-loongarch-elf/relr-got-start.s
new file mode 100644
index 0000000..c89fb42
--- /dev/null
+++ b/ld/testsuite/ld-loongarch-elf/relr-got-start.s
@@ -0,0 +1,5 @@
+.globl _start
+_start:
+        pcalau12i       $r5,%got_pc_hi20(_start)
+        ld.d    $r5,$r5,%got_pc_lo12(_start)
+        ret
diff --git a/ld/testsuite/ld-mips-elf/unaligned-data.s b/ld/testsuite/ld-mips-elf/unaligned-data.s
index f645c15..e865a13 100644
--- a/ld/testsuite/ld-mips-elf/unaligned-data.s
+++ b/ld/testsuite/ld-mips-elf/unaligned-data.s
@@ -5,7 +5,7 @@
 bar\@ :
 	.byte	0
 	.size	bar\@, . - bar\@
-	sym	(\n - 1)
+	sym	\n - 1
 	.endif
 	.endm
 
diff --git a/ld/testsuite/ld-mips-elf/unaligned-insn.s b/ld/testsuite/ld-mips-elf/unaligned-insn.s
index 5313372..10649de 100644
--- a/ld/testsuite/ld-mips-elf/unaligned-insn.s
+++ b/ld/testsuite/ld-mips-elf/unaligned-insn.s
@@ -6,7 +6,7 @@ bar\@ :
 	.insn
 	.hword	0
 	.size	bar\@, . - bar\@
-	sym	(\n - 1)
+	sym	\n - 1
 	.endif
 	.endm
 
diff --git a/ld/testsuite/ld-mips-elf/unaligned-text.s b/ld/testsuite/ld-mips-elf/unaligned-text.s
index 2495c4b..4b3aa38 100644
--- a/ld/testsuite/ld-mips-elf/unaligned-text.s
+++ b/ld/testsuite/ld-mips-elf/unaligned-text.s
@@ -5,7 +5,7 @@
 bar\@ :
 	.byte	0
 	.size	bar\@, . - bar\@
-	sym	(\n - 1)
+	sym	\n - 1
 	.endif
 	.endm
 
diff --git a/ld/testsuite/ld-pe/pdb-inlineelines1-c13-info2.d b/ld/testsuite/ld-pe/pdb-inlineelines1-c13-info2.d
new file mode 100644
index 0000000..ac4e49b
--- /dev/null
+++ b/ld/testsuite/ld-pe/pdb-inlineelines1-c13-info2.d
@@ -0,0 +1,10 @@
+
+tmpdir/pdb-inlineelines1-c13-info2:     file format binary
+
+Contents of section .data:
+ 0000 f4000000 30000000 02000000 10016745  ....0.........gE
+ 0010 2301efcd ab8998ba dcfe1023 45670000  #..........#Eg..
+ 0020 08000000 100198ba dcfe1023 45676745  ...........#EggE
+ 0030 2301efcd ab890000 f6000000 1c000000  #...............
+ 0040 00000000 02100000 00000000 2a000000  ............*...
+ 0050 03100000 18000000 1c000000           ............    
diff --git a/ld/testsuite/ld-pe/pdb-inlineelines1a.s b/ld/testsuite/ld-pe/pdb-inlineelines1a.s
new file mode 100644
index 0000000..1ab2617
--- /dev/null
+++ b/ld/testsuite/ld-pe/pdb-inlineelines1a.s
@@ -0,0 +1,20 @@
+.equ CV_SIGNATURE_C13, 4
+
+.equ LF_STRING_ID, 0x1605
+
+.equ CV_INLINEE_SOURCE_LINE_SIGNATURE, 0
+
+.section ".debug$T", "rn"
+
+.long CV_SIGNATURE_C13
+
+/* Type 1000, string "hello" */
+.string1:
+.short .types_end - .string1 - 2
+.short LF_STRING_ID
+.long 0 /* sub-string */
+.asciz "hello"
+.byte 0xf2 /* padding */
+.byte 0xf1 /* padding */
+
+.types_end:
diff --git a/ld/testsuite/ld-pe/pdb-inlineelines1b.s b/ld/testsuite/ld-pe/pdb-inlineelines1b.s
new file mode 100644
index 0000000..d8d9170
--- /dev/null
+++ b/ld/testsuite/ld-pe/pdb-inlineelines1b.s
@@ -0,0 +1,160 @@
+.equ CV_SIGNATURE_C13, 4
+
+.equ DEBUG_S_STRINGTABLE, 0xf3
+.equ DEBUG_S_FILECHKSMS, 0xf4
+.equ DEBUG_S_INLINEELINES, 0xf6
+.equ CHKSUM_TYPE_MD5, 1
+
+.equ NUM_MD5_BYTES, 16
+
+.equ T_VOID, 0x0003
+.equ T_UINT4, 0x0075
+
+.equ LF_ARGLIST, 0x1201
+.equ LF_PROCEDURE, 0x1008
+.equ LF_FUNC_ID, 0x1601
+.equ LF_STRING_ID, 0x1605
+
+.equ CV_INLINEE_SOURCE_LINE_SIGNATURE, 0
+
+.section ".debug$T", "rn"
+
+.long CV_SIGNATURE_C13
+
+/* Type 1000, string "world" */
+.string1:
+.short .arglist1 - .string1 - 2
+.short LF_STRING_ID
+.long 0 /* sub-string */
+.asciz "world"
+.byte 0xf2 /* padding */
+.byte 0xf1 /* padding */
+
+/* Type 1001, arglist (uint32_t) */
+.arglist1:
+.short .proctype1 - .arglist1 - 2
+.short LF_ARGLIST
+.long 1 /* no. entries */
+.long T_UINT4
+
+/* Type 1002, procedure (return type T_VOID, arglist 1001) */
+.proctype1:
+.short .funcid1 - .proctype1 - 2
+.short LF_PROCEDURE
+.long T_VOID
+.byte 0 /* calling convention */
+.byte 0 /* attributes */
+.short 1 /* no. parameters */
+.long 0x1001
+
+/* Type 1003, func ID for proc1 */
+.funcid1:
+.short .funcid2 - .funcid1 - 2
+.short LF_FUNC_ID
+.long 0 /* parent scope */
+.long 0x1002 /* type */
+.asciz "proc1"
+.byte 0xf2 /* padding */
+.byte 0xf1 /* padding */
+
+/* Type 1004, func ID for proc2 */
+.funcid2:
+.short .types_end - .funcid2 - 2
+.short LF_FUNC_ID
+.long 0 /* parent scope */
+.long 0x1002 /* type */
+.asciz "proc2"
+.byte 0xf2 /* padding */
+.byte 0xf1 /* padding */
+
+.types_end:
+
+.section ".debug$S", "rn"
+.long CV_SIGNATURE_C13
+
+/*
+  *** STRINGTABLE
+
+  00000000
+  00000001 foo.c
+  00000007 bar.c
+*/
+
+.long DEBUG_S_STRINGTABLE
+.long .strings_end - .strings_start
+
+.strings_start:
+
+.asciz ""
+
+.src1:
+.asciz "foo.c"
+
+.src2:
+.asciz "bar.c"
+
+.strings_end:
+
+.balign 4
+
+/*
+  *** FILECHKSUMS
+
+  FileId  St.Offset  Cb  Type  ChksumBytes
+      0   00000001   10  MD5   67452301EFCDAB8998BADCFE10234567
+      18  00000007   10  MD5   98BADCFE1023456767452301EFCDAB89
+*/
+
+.long DEBUG_S_FILECHKSMS
+.long .chksms_end - .chksms_start
+
+.chksms_start:
+
+.file1:
+.long .src1 - .strings_start
+.byte NUM_MD5_BYTES
+.byte CHKSUM_TYPE_MD5
+.long 0x01234567
+.long 0x89abcdef
+.long 0xfedcba98
+.long 0x67452310
+.short 0 /* padding */
+
+.file2:
+.long .src2 - .strings_start
+.byte NUM_MD5_BYTES
+.byte CHKSUM_TYPE_MD5
+.long 0xfedcba98
+.long 0x67452310
+.long 0x01234567
+.long 0x89abcdef
+.short 0 /* padding */
+
+.chksms_end:
+
+.balign 4
+
+/*
+  *** INLINEE LINES
+
+  InlineeId  FileId  StaringLine
+       1003       0           42
+       1004      18           28
+*/
+
+.long DEBUG_S_INLINEELINES
+.long .lines_end - .lines_start
+
+.lines_start:
+
+.long CV_INLINEE_SOURCE_LINE_SIGNATURE
+
+.long 0x1003
+.long .file1 - .chksms_start
+.long 42
+
+.long 0x1004
+.long .file2 - .chksms_start
+.long 28
+
+.lines_end:
diff --git a/ld/testsuite/ld-pe/pdb-types1-typelist.d b/ld/testsuite/ld-pe/pdb-types1-typelist.d
index 1caa074..e97c4f7 100644
--- a/ld/testsuite/ld-pe/pdb-types1-typelist.d
+++ b/ld/testsuite/ld-pe/pdb-types1-typelist.d
@@ -80,4 +80,6 @@ Contents of section .data:
  04b0 65660052 656c6561 736500f1 02000312  ef.Release......
  04c0 22000515 00000000 2c100000 00000000  ".......,.......
  04d0 00000000 0100656d 7074795f 73747275  ......empty_stru
- 04e0 637400f1                             ct..            
+ 04e0 637400f1 12000210 11100000 6c000100  ct..........l...
+ 04f0 0d100000 0500f2f1 12000210 75000000  ............u...
+ 0500 4c000100 0d100000 0100f2f1           L...........    
diff --git a/ld/testsuite/ld-pe/pdb-types1b.s b/ld/testsuite/ld-pe/pdb-types1b.s
index 8bfc973..0cb301c 100644
--- a/ld/testsuite/ld-pe/pdb-types1b.s
+++ b/ld/testsuite/ld-pe/pdb-types1b.s
@@ -40,6 +40,12 @@
 .equ CV_PTR_NEAR32, 0xa
 .equ CV_PTR_64, 0xc
 
+.equ CV_PTR_MODE_PMEM, 0x40
+.equ CV_PTR_MODE_PMFUNC, 0x60
+
+.equ CV_PMTYPE_D_Single, 0x01
+.equ CV_PMTYPE_F_Single, 0x05
+
 .section ".debug$T", "rn"
 
 .long CV_SIGNATURE_C13
@@ -614,7 +620,7 @@
 
 /* Type 102c, empty struct */
 .struct7:
-.short .types_end - .struct7 - 2
+.short .ptr5 - .struct7 - 2
 .short LF_STRUCTURE
 .short 0 /* no. members */
 .short 0 /* property */
@@ -625,4 +631,26 @@
 .asciz "empty_struct" /* name */
 .byte 0xf1 /* padding */
 
+/* Type 102d, pointer to member function method2 in struct foo */
+.ptr5:
+.short .ptr6 - .ptr5 - 2
+.short LF_POINTER
+.long 0x1010 /* base type */
+.long (8 << 13) | CV_PTR_MODE_PMFUNC | CV_PTR_64 /* attributes */
+.long 0x100c /* containing class */
+.short CV_PMTYPE_F_Single /* member function, single inheritance */
+.byte 0xf2 /* padding */
+.byte 0xf1 /* padding */
+
+/* Type 102e, pointer to member num in struct foo */
+.ptr6:
+.short .types_end - .ptr6 - 2
+.short LF_POINTER
+.long T_UINT4 /* base type */
+.long (8 << 13) | CV_PTR_MODE_PMEM | CV_PTR_64 /* attributes */
+.long 0x100c /* containing class */
+.short CV_PMTYPE_D_Single /* member data, single inheritance */
+.byte 0xf2 /* padding */
+.byte 0xf1 /* padding */
+
 .types_end:
diff --git a/ld/testsuite/ld-pe/pdb.exp b/ld/testsuite/ld-pe/pdb.exp
index b583e87..803ec8a 100644
--- a/ld/testsuite/ld-pe/pdb.exp
+++ b/ld/testsuite/ld-pe/pdb.exp
@@ -611,26 +611,6 @@ proc test_mod_info { mod_info } {
     if { [expr $off % 4] != 0 } {
 	set off [expr $off + 4 - ($off % 4)]
     }
-
-    incr off 64
-
-    set obj3 [string range $mod_info $off [expr [string first \000 $mod_info $off] - 1]]
-    incr off [expr [string length $obj3] + 1]
-
-    set ar3 [string range $mod_info $off [expr [string first \000 $mod_info $off] - 1]]
-    incr off [expr [string length $ar3] + 1]
-
-    if [string equal $obj3 "* Linker *"] {
-	pass "Correct name for dummy object file"
-    } else {
-	fail "Incorrect name for dummy object file"
-    }
-
-    if [string equal $ar3 ""] {
-	pass "Correct archive name for dummy object file"
-    } else {
-	fail "Incorrect archive name for dummy object file"
-    }
 }
 
 proc test_section_contrib { section_contrib } {
@@ -677,7 +657,7 @@ proc test2 { } {
 	return
     }
 
-    if ![ld_link $ld "tmpdir/pdb2.exe" "--pdb=tmpdir/pdb2.pdb --gc-sections -e foo tmpdir/pdb2a.o tmpdir/pdb2b.a"] {
+    if ![ld_link $ld "tmpdir/pdb2.exe" "--pdb=tmpdir/pdb2.pdb --gc-sections --disable-reloc-section -e foo tmpdir/pdb2a.o tmpdir/pdb2b.a"] {
 	unsupported "Create PE image with PDB file"
 	return
     }
@@ -1036,7 +1016,7 @@ proc test5 { } {
     binary scan $data i end_type
 
     # end_type is one greater than the last type in the stream
-    if { $end_type != 0x102e } {
+    if { $end_type != 0x1030 } {
 	fail "Incorrect end type value in TPI stream."
     } else {
 	pass "Correct end type value in TPI stream."
@@ -1764,6 +1744,99 @@ proc test9 { } {
     }
 }
 
+proc test10 { } {
+    global as
+    global ar
+    global ld
+    global objdump
+    global srcdir
+    global subdir
+
+    if ![ld_assemble $as $srcdir/$subdir/pdb-inlineelines1a.s tmpdir/pdb-inlineelines1a.o] {
+	unsupported "Build pdb-inlineelines1a.o"
+	return
+    }
+
+    if ![ld_assemble $as $srcdir/$subdir/pdb-inlineelines1b.s tmpdir/pdb-inlineelines1b.o] {
+      unsupported "Build pdb-inlineelines1a.o"
+      return
+    }
+
+    if ![ld_link $ld "tmpdir/pdb-inlineelines1.exe" "--pdb=tmpdir/pdb-inlineelines1.pdb tmpdir/pdb-inlineelines1a.o tmpdir/pdb-inlineelines1b.o"] {
+	unsupported "Create PE image with PDB file"
+	return
+    }
+
+    # read relevant bits from DBI stream
+
+    set exec_output [run_host_cmd "$ar" "x --output tmpdir tmpdir/pdb-inlineelines1.pdb 0003"]
+
+    if ![string match "" $exec_output] {
+	fail "Could not extract DBI stream"
+	return
+    } else {
+	pass "Extracted DBI stream"
+    }
+
+    set fi [open tmpdir/0003]
+    fconfigure $fi -translation binary
+
+    seek $fi 24
+
+    # read substream sizes
+
+    set data [read $fi 4]
+    binary scan $data i mod_info_size
+
+    seek $fi 36 current
+
+    set mod_info [read $fi $mod_info_size]
+
+    close $fi
+
+    # check C13 info in second module
+
+    # We're interested here that the inlinee function IDs get rewritten:
+    # 1003 -> 1002, 1004 -> 1003.  The numbers are lower because linking splits
+    # the types into two separate streams, numbered individually.
+
+    # This is what cvdump.exe -inll pdb-inlineelines1.pdb should look like:
+
+    # *** INLINEE LINES
+    #
+    # InlineeId  FileId  StaringLine
+    #      1002       0           42
+    #      1003       1           28
+
+    # For some reason it numbers file IDs in bytes for object files but as an
+    # index for PDBs, but they're stored on disk the same way.
+
+    set fn1_end [string first \000 $mod_info 64]
+    set fn2_end [string first \000 $mod_info [expr $fn1_end + 1]]
+
+    set off [expr $fn2_end + 1]
+
+    if { [expr $off % 4] != 0 } {
+	set off [expr $off + 4 - ($off % 4)]
+    }
+
+    set c13_info [extract_c13_info "tmpdir/pdb-inlineelines1.pdb" [string range $mod_info $off [expr $off + 63]]]
+
+    set fi [open tmpdir/pdb-inlineelines1-c13-info2 w]
+    fconfigure $fi -translation binary
+    puts -nonewline $fi $c13_info
+    close $fi
+
+    set exp [file_contents "$srcdir/$subdir/pdb-inlineelines1-c13-info2.d"]
+    set got [run_host_cmd "$objdump" "-s --target=binary tmpdir/pdb-inlineelines1-c13-info2"]
+
+    if [string match $exp $got] {
+	pass "Correct C13 info for second module"
+    } else {
+	fail "Incorrect C13 info for second module"
+    }
+}
+
 test1
 test2
 test3
@@ -1773,3 +1846,4 @@ test6
 test7
 test8
 test9
+test10
diff --git a/ld/testsuite/ld-pe/pdb2-section-contrib.d b/ld/testsuite/ld-pe/pdb2-section-contrib.d
index 5b1df9f..214eb11 100644
--- a/ld/testsuite/ld-pe/pdb2-section-contrib.d
+++ b/ld/testsuite/ld-pe/pdb2-section-contrib.d
@@ -7,6 +7,4 @@ Contents of section .data:
  0020 01000000 10000000 10000000 20000060  ............ ..`
  0030 01000000 00000000 00000000 02000000  ................
  0040 00000000 3d000000 40000040 00000000  ....=...@..@....
- 0050 00000000 00000000 04000000 00000000  ................
- 0060 0c000000 40000042 02000000 00000000  ....@..B........
- 0070 00000000                             ....            
+ 0050 00000000 00000000                    ........        
diff --git a/ld/testsuite/ld-pe/pe.exp b/ld/testsuite/ld-pe/pe.exp
index 6a1afef..725b58c 100644
--- a/ld/testsuite/ld-pe/pe.exp
+++ b/ld/testsuite/ld-pe/pe.exp
@@ -29,6 +29,7 @@ if {[istarget i*86-*-cygwin*]
     || [istarget i*86-*-pe]
     || [istarget i*86-*-mingw*]
     || [istarget x86_64-*-mingw*]
+    || [istarget x86_64-*-cygwin*]
     || [istarget arm-wince-pe] } {
 
     if {[istarget x86_64-*-mingw*] } {
@@ -37,6 +38,25 @@ if {[istarget i*86-*-cygwin*]
 	 {{objdump -s secrel_64.d}} "secrel.x"}
 	{".secidx" "--disable-reloc-section" "" "" {secidx1.s secidx2.s}
 	 {{objdump -s secidx_64.d}} "secidx.x"}
+	{".secrel32 w/ relocs" "--enable-reloc-section" "" "" {secrel1.s secrel2.s}
+	 {{objdump -p secrel-reloc.d}} "secrel.x"}
+	{".secidx w/ relocs" "--enable-reloc-section" "" "" {secidx1.s secidx2.s}
+	 {{objdump -p secidx-reloc.d}} "secidx.x"}
+	{"Empty export table" "" "" "" "exports.s"
+	 {{objdump -p exports64.d}} "exports.dll"}
+	{"TLS directory entry" "" "" "" "tlssec.s"
+	 {{objdump -p tlssec64.d}} "tlssec.dll"}
+      }
+    } elseif {[istarget x86_64-*-cygwin*]} {
+      set pe_tests {
+	{".secrel32" "--disable-auto-import --disable-reloc-section" "" "" {secrel1.s secrel2.s}
+	 {{objdump -s secrel_64.d}} "secrel.x"}
+	{".secidx" "--disable-auto-import --disable-reloc-section" "" "" {secidx1.s secidx2.s}
+	 {{objdump -s secidx_64.d}} "secidx.x"}
+	{".secrel32 w/ relocs" "--disable-auto-import --enable-reloc-section" "" "" {secrel1.s secrel2.s}
+	 {{objdump -p secrel-reloc.d}} "secrel.x"}
+	{".secidx w/ relocs" "--disable-auto-import --enable-reloc-section" "" "" {secidx1.s secidx2.s}
+	 {{objdump -p secidx-reloc.d}} "secidx.x"}
 	{"Empty export table" "" "" "" "exports.s"
 	 {{objdump -p exports64.d}} "exports.dll"}
 	{"TLS directory entry" "" "" "" "tlssec.s"
@@ -48,6 +68,10 @@ if {[istarget i*86-*-cygwin*]
 	 {{objdump -s secrel.d}} "secrel.x"}
 	{".secidx" "--disable-auto-import --disable-reloc-section" "" "" {secidx1.s secidx2.s}
 	 {{objdump -s secidx.d}} "secidx.x"}
+	{".secrel32 w/ relocs" "--disable-auto-import --enable-reloc-section" "" "" {secrel1.s secrel2.s}
+	 {{objdump -p secrel-reloc.d}} "secrel-reloc.x"}
+	{".secidx w/ relocs" "--disable-auto-import --enable-reloc-section" "" "" {secidx1.s secidx2.s}
+	 {{objdump -p secidx-reloc.d}} "secidx-reloc.x"}
 	{"Empty export table" "" "" "" "exports.s"
 	 {{objdump -p exports.d}} "exports.dll"}
 	{"TLS directory entry" "" "" "" "tlssec.s"
@@ -57,6 +81,8 @@ if {[istarget i*86-*-cygwin*]
       set pe_tests {
 	{".secrel32" "--disable-reloc-section" "" "" {secrel1.s secrel2.s}
 	 {{objdump -s secrel.d}} "secrel.x"}
+	{".secrel32 w/ relocs" "" "" "" {secrel1.s secrel2.s}
+	 {{objdump -p secrel-reloc.d}} "secrel-reloc.x"}
 	{"Empty export table" "" "" "" "exports.s"
 	 {{objdump -p exports.d}} "exports.dll"}
 	{"TLS directory entry" "" "" "" "tlssec.s"
@@ -68,6 +94,10 @@ if {[istarget i*86-*-cygwin*]
 	 {{objdump -s secrel.d}} "secrel.x"}
 	{".secidx" "--disable-reloc-section" "" "" {secidx1.s secidx2.s}
 	 {{objdump -s secidx.d}} "secidx.x"}
+	{".secrel32 w/ relocs" " --enable-reloc-section" "" "" {secrel1.s secrel2.s}
+	 {{objdump -p secrel-reloc.d}} "secrel-reloc.x"}
+	{".secidx w/ relocs" " --enable-reloc-section" "" "" {secidx1.s secidx2.s}
+	 {{objdump -p secidx-reloc.d}} "secidx-reloc.x"}
 	{"Empty export table" "" "" "" "exports.s"
 	 {{objdump -p exports.d}} "exports.dll"}
 	{"TLS directory entry" "" "" "" "tlssec.s"
diff --git a/ld/testsuite/ld-pe/secidx-reloc.d b/ld/testsuite/ld-pe/secidx-reloc.d
new file mode 100644
index 0000000..043182d
--- /dev/null
+++ b/ld/testsuite/ld-pe/secidx-reloc.d
@@ -0,0 +1,5 @@
+#...
+The Data Directory
+#...
+Entry 5 0+ 0+ Base Relocation Directory \[\.reloc\]
+#...
diff --git a/ld/testsuite/ld-pe/secrel-reloc.d b/ld/testsuite/ld-pe/secrel-reloc.d
new file mode 100644
index 0000000..043182d
--- /dev/null
+++ b/ld/testsuite/ld-pe/secrel-reloc.d
@@ -0,0 +1,5 @@
+#...
+The Data Directory
+#...
+Entry 5 0+ 0+ Base Relocation Directory \[\.reloc\]
+#...
diff --git a/ld/testsuite/ld-plugin/common-1.c b/ld/testsuite/ld-plugin/common-1.c
new file mode 100644
index 0000000..b4f616a
--- /dev/null
+++ b/ld/testsuite/ld-plugin/common-1.c
@@ -0,0 +1,11 @@
+#include <stdio.h>
+
+int foo;
+
+int main()
+{
+  if (foo == 1)
+    printf ("PASS\n");
+
+  return 0;
+}
diff --git a/ld/testsuite/ld-plugin/common-2a.c b/ld/testsuite/ld-plugin/common-2a.c
new file mode 100644
index 0000000..fccfca7
--- /dev/null
+++ b/ld/testsuite/ld-plugin/common-2a.c
@@ -0,0 +1,11 @@
+#include <stdio.h>
+
+int foo;
+
+int main()
+{
+  if (foo == 0)
+    printf ("PASS\n");
+
+  return 0;
+}
diff --git a/ld/testsuite/ld-plugin/common-2b.c b/ld/testsuite/ld-plugin/common-2b.c
new file mode 100644
index 0000000..c014c67
--- /dev/null
+++ b/ld/testsuite/ld-plugin/common-2b.c
@@ -0,0 +1,6 @@
+int foo;
+
+void
+func (void)
+{
+}
diff --git a/ld/testsuite/ld-plugin/definition-1.c b/ld/testsuite/ld-plugin/definition-1.c
new file mode 100644
index 0000000..a244740
--- /dev/null
+++ b/ld/testsuite/ld-plugin/definition-1.c
@@ -0,0 +1 @@
+int foo = 1;
diff --git a/ld/testsuite/ld-plugin/lto.exp b/ld/testsuite/ld-plugin/lto.exp
index ad59e2a..6424ba4 100644
--- a/ld/testsuite/ld-plugin/lto.exp
+++ b/ld/testsuite/ld-plugin/lto.exp
@@ -231,6 +231,30 @@ set lto_link_tests [list \
    "$plug_opt" "-flto $lto_no_fat -fcommon" \
    {pr26389.c} \
    [list [list "nm" "$plug_opt" "pr26389.d"]]] \
+  [list "Build libdefinition-1.a" \
+   "$plug_opt" \
+   "-O2 -fcommon -flto $lto_no_fat" \
+   {definition-1.c} \
+   {} \
+   "libdefinition-1.a" \
+  ] \
+  [list \
+   "Build common-2a.o" \
+   "" \
+   "-O2 -fcommon -flto $lto_no_fat" \
+   {common-2a.c} \
+   {} \
+   "" \
+   "c" \
+  ] \
+  [list \
+   "Build libcommon-2.a" \
+   "$plug_opt" \
+   "-O2 -fcommon -flto $lto_no_fat" \
+   {common-2b.c} \
+   {} \
+   "libcommon-2.a" \
+  ] \
 ]
 
 if { [at_least_gcc_version 10 0] && [check_lto_shared_available] } {
@@ -547,6 +571,22 @@ set lto_link_elf_tests [list \
    "pr31956b" \
   ] \
   [list \
+   "PR ld/31956 (malloc)" \
+   "-Wl,--wrap=malloc" \
+   "-O2 -flto" \
+   {pr31956c.c} \
+   {} \
+   "pr31956c" \
+  ] \
+  [list \
+   "PR ld/31956 (unused)" \
+   "-Wl,--wrap=parse_line" \
+   "-O2 -flto" \
+   {pr31956d.c} \
+   {{"nm" {} "pr31956d.d"}} \
+   "pr31956d" \
+  ] \
+  [list \
    "Build pr30281.so" \
    "-shared -Wl,--version-script,pr30281.t \
     -O2 -fPIC -flto-partition=max -flto=2" \
@@ -747,6 +787,17 @@ set lto_run_tests [list \
    {pr26262a.c} "pr26262b" "pass.out" \
    "-flto -O2" "c" "" \
    ""] \
+  [list "Run common-1" \
+   "-O2 -flto" \
+   "" \
+   {common-1.c} \
+   "common-1" \
+   "pass.out" \
+   "-O2 -fcommon -flto $lto_no_fat" \
+   "c" \
+   "" \
+   "tmpdir/libdefinition-1.a" \
+  ] \
 ]
 
 if { [at_least_gcc_version 4 7] } {
@@ -846,6 +897,26 @@ run_cc_link_tests $lto_link_tests
 # by some elf tests besides shared libs tests.  So, always compile them.
 run_cc_link_tests $lto_compile_elf_tests
 
+# Xfail PR ld/32083 test for GCC without the fix:
+#
+# commit a98dd536b1017c2b814a3465206c6c01b2890998
+# Author: H.J. Lu <hjl.tools@gmail.com>
+# Date:   Wed Aug 21 07:25:25 2024 -0700
+#
+#    Update LDPT_REGISTER_CLAIM_FILE_HOOK_V2 linker plugin hook
+#
+set exec_output [run_host_cmd "$CC_FOR_TARGET" \
+			      "-O2 -fcommon -flto -o tmpdir/common-2 \
+			       tmpdir/common-2a.o tmpdir/libcommon-2.a \
+			       tmpdir/libcommon-2.a"]
+if [string match "" $exec_output] then {
+    pass "PR ld/32083"
+} elseif { [ regexp "lto1: fatal error: multiple prevailing defs for 'func'" $exec_output ] } {
+    xfail "PR ld/32083"
+} else {
+    fail "PR ld/32083"
+}
+
 # Restrict these to ELF targets that support shared libs and PIC.
 if { [is_elf_format] && [check_lto_shared_available] } {
     run_cc_link_tests $lto_link_elf_tests
diff --git a/ld/testsuite/ld-plugin/pr31956c.c b/ld/testsuite/ld-plugin/pr31956c.c
new file mode 100644
index 0000000..4a46b2b
--- /dev/null
+++ b/ld/testsuite/ld-plugin/pr31956c.c
@@ -0,0 +1,19 @@
+#include <stdlib.h>
+
+extern void *__real_malloc (size_t);
+
+void *
+__wrap_malloc (size_t n)
+{
+  if (n == 0)
+    return NULL;
+  else
+    return __real_malloc (n);
+};
+
+int
+main (void)
+{
+  void *ptr = malloc (30);
+  return ptr == NULL ? 1 : 0;
+}
diff --git a/ld/testsuite/ld-plugin/pr31956d.c b/ld/testsuite/ld-plugin/pr31956d.c
new file mode 100644
index 0000000..cb7f2d5
--- /dev/null
+++ b/ld/testsuite/ld-plugin/pr31956d.c
@@ -0,0 +1,7 @@
+void __wrap_parse_line(void) {};
+
+int
+main (void)
+{
+  return 0;
+}
diff --git a/ld/testsuite/ld-plugin/pr31956d.d b/ld/testsuite/ld-plugin/pr31956d.d
new file mode 100644
index 0000000..b579cdc
--- /dev/null
+++ b/ld/testsuite/ld-plugin/pr31956d.d
@@ -0,0 +1,4 @@
+#failif
+#...
+[0-9a-f]+ T .*parse_line
+#...
diff --git a/ld/testsuite/ld-riscv-elf/relax-max-align-gp.d b/ld/testsuite/ld-riscv-elf/relax-max-align-gp.d
index b62d388..5832835 100644
--- a/ld/testsuite/ld-riscv-elf/relax-max-align-gp.d
+++ b/ld/testsuite/ld-riscv-elf/relax-max-align-gp.d
@@ -7,7 +7,7 @@
 
 Disassembly of section .text:
 
-0+[0-9a-f]+ <_start>:
+0+[0-9a-f]+00 <_start>:
 .*:[ 	]+[0-9a-f]+[ 	]+addi[ 	]+.*<gdata>
 .*:[ 	]+[0-9a-f]+[ 	]+jal[ 	]+.*
 .*:[ 	]+[0-9a-f]+[ 	]+j[ 	]+.*
@@ -41,6 +41,32 @@ Disassembly of section .text:
 .*:[ 	]+[0-9a-f]+[ 	]+nop
 .*:[ 	]+[0-9a-f]+[ 	]+nop
 
-0+[0-9a-f]+ <func>:
+0+[0-9a-f]+80 <func>:
 .*:[ 	]+[0-9a-f]+[ 	]+ret
-[ 	]+...
+.*:[ 	]+[0-9a-f]+[ 	]+nop
+.*:[ 	]+[0-9a-f]+[ 	]+nop
+.*:[ 	]+[0-9a-f]+[ 	]+nop
+.*:[ 	]+[0-9a-f]+[ 	]+nop
+.*:[ 	]+[0-9a-f]+[ 	]+nop
+.*:[ 	]+[0-9a-f]+[ 	]+nop
+.*:[ 	]+[0-9a-f]+[ 	]+nop
+.*:[ 	]+[0-9a-f]+[ 	]+nop
+.*:[ 	]+[0-9a-f]+[ 	]+nop
+.*:[ 	]+[0-9a-f]+[ 	]+nop
+.*:[ 	]+[0-9a-f]+[ 	]+nop
+.*:[ 	]+[0-9a-f]+[ 	]+nop
+.*:[ 	]+[0-9a-f]+[ 	]+nop
+.*:[ 	]+[0-9a-f]+[ 	]+nop
+.*:[ 	]+[0-9a-f]+[ 	]+nop
+.*:[ 	]+[0-9a-f]+[ 	]+nop
+.*:[ 	]+[0-9a-f]+[ 	]+nop
+.*:[ 	]+[0-9a-f]+[ 	]+nop
+.*:[ 	]+[0-9a-f]+[ 	]+nop
+.*:[ 	]+[0-9a-f]+[ 	]+nop
+.*:[ 	]+[0-9a-f]+[ 	]+nop
+.*:[ 	]+[0-9a-f]+[ 	]+nop
+.*:[ 	]+[0-9a-f]+[ 	]+nop
+.*:[ 	]+[0-9a-f]+[ 	]+nop
+.*:[ 	]+[0-9a-f]+[ 	]+nop
+.*:[ 	]+[0-9a-f]+[ 	]+nop
+.*:[ 	]+[0-9a-f]+[ 	]+nop
diff --git a/ld/testsuite/ld-unique/pr21529.d b/ld/testsuite/ld-unique/pr21529.d
index 896f872..fb63794 100644
--- a/ld/testsuite/ld-unique/pr21529.d
+++ b/ld/testsuite/ld-unique/pr21529.d
@@ -1,6 +1,6 @@
 #ld: --oformat binary -T pr21529.ld -e main
 #objdump: -s -b binary
-#xfail: aarch64*-*-* arm*-*-* avr-*-* ia64-*-* m68hc1*-*-* nds32*-*-* riscv*-*-* score-*-* v850-*-* loongarch*-*-*
+#xfail: aarch64*-*-* arm*-*-* avr-*-* ia64-*-* m68hc1*-*-* nds32*-*-* riscv*-*-* score-*-* v850-*-*
 # Skip targets which can't change output format to binary.
 
 #pass
diff --git a/ld/testsuite/ld-x86-64/lam-u48.rd b/ld/testsuite/ld-x86-64/lam-u48.rd
index ad31262..8fac904 100644
--- a/ld/testsuite/ld-x86-64/lam-u48.rd
+++ b/ld/testsuite/ld-x86-64/lam-u48.rd
@@ -1,3 +1,4 @@
+#...
 Displaying notes found in: .note.gnu.property
 [ 	]+Owner[ 	]+Data size[ 	]+Description
   GNU                  0x[0-9a-f]+	NT_GNU_PROPERTY_TYPE_0
diff --git a/ld/testsuite/ld-x86-64/lam-u57.rd b/ld/testsuite/ld-x86-64/lam-u57.rd
index 8b77e63..dd8d1da 100644
--- a/ld/testsuite/ld-x86-64/lam-u57.rd
+++ b/ld/testsuite/ld-x86-64/lam-u57.rd
@@ -1,3 +1,4 @@
+#...
 Displaying notes found in: .note.gnu.property
 [ 	]+Owner[ 	]+Data size[ 	]+Description
   GNU                  0x[0-9a-f]+	NT_GNU_PROPERTY_TYPE_0
diff --git a/ld/testsuite/ld-x86-64/plt3.s b/ld/testsuite/ld-x86-64/plt3.s
new file mode 100644
index 0000000..c3a29b5
--- /dev/null
+++ b/ld/testsuite/ld-x86-64/plt3.s
@@ -0,0 +1,27 @@
+	.text
+	.global _start
+_start:
+	movq $foo@PLT, %rax
+	leaq -11(%rip), %rbx
+	leaq (%rbx, %rax), %rax
+	call *%rax
+
+	# Write out "PASS\n".
+	movl	$5, %edx
+	movl	$.LC0, %esi
+	movl	$1, %edi
+	movl	$1, %eax
+	syscall
+
+	# exit
+	movq $60, %rax
+	movq $0, %rdi
+	syscall
+
+foo:
+	ret
+
+	.section	.rodata.str1.1,"aMS",@progbits,1
+.LC0:
+	.string	"PASS\n"
+	.section	.note.GNU-stack,"",@progbits
diff --git a/ld/testsuite/ld-x86-64/pr22393-3a.rd b/ld/testsuite/ld-x86-64/pr22393-3a.rd
index b17e09b..4027ed3 100644
--- a/ld/testsuite/ld-x86-64/pr22393-3a.rd
+++ b/ld/testsuite/ld-x86-64/pr22393-3a.rd
@@ -1,5 +1,5 @@
 #source: pr22393-1.s
-#ld: -shared -z separate-code
+#ld: -shared -z separate-code --no-rosegment
 #readelf: -l --wide
 #target: *-*-linux-gnu *-*-gnu*
 
diff --git a/ld/testsuite/ld-x86-64/pr22393-3b.rd b/ld/testsuite/ld-x86-64/pr22393-3b.rd
index b17e09b..4027ed3 100644
--- a/ld/testsuite/ld-x86-64/pr22393-3b.rd
+++ b/ld/testsuite/ld-x86-64/pr22393-3b.rd
@@ -1,5 +1,5 @@
 #source: pr22393-1.s
-#ld: -shared -z separate-code
+#ld: -shared -z separate-code --no-rosegment
 #readelf: -l --wide
 #target: *-*-linux-gnu *-*-gnu*
 
diff --git a/ld/testsuite/ld-x86-64/pr27590.rd b/ld/testsuite/ld-x86-64/pr27590.rd
index 1946984..55ed17d 100644
--- a/ld/testsuite/ld-x86-64/pr27590.rd
+++ b/ld/testsuite/ld-x86-64/pr27590.rd
@@ -1,11 +1,11 @@
 #...
-  \[[ 0-9]+\] .gnu.debuglto_.debug_info PROGBITS +0+ 0+28a 0+42 00 +E  0 +0  1
-  \[[ 0-9]+\] .rela.gnu.debuglto_.debug_info RELA +0+ 0+810 0+f0 18 +I 26  17  8
-  \[[ 0-9]+\] .gnu.debuglto_.debug_abbrev PROGBITS +0+ 0+2cc 0+26 00 +E  0 +0  1
-  \[[ 0-9]+\] .gnu.debuglto_.debug_macro PROGBITS +0+ 0+2f2 0+2a 00 +E  0 +0  1
-  \[[ 0-9]+\] .rela.gnu.debuglto_.debug_macro RELA +0+ 0+900 0+60 18 +I 26  20  8
-  \[[ 0-9]+\] .gnu.debuglto_.debug_macro PROGBITS +0+ 0+31c 0+10 00  GE  0 +0  1
-  \[[ 0-9]+\] .rela.gnu.debuglto_.debug_macro RELA +0+ 0+960 0+30 18  IG 26  22  8
-  \[[ 0-9]+\] .gnu.debuglto_.debug_line PROGBITS +0+ 0+32c 0+8a 00 +E  0 +0  1
-  \[[ 0-9]+\] .gnu.debuglto_.debug_str PROGBITS +0+ 0+3b6 0+15c 01 MSE  0 +0  1
+  \[[ 0-9]+\] .gnu.debuglto_.debug_info PROGBITS +0+ [0-9a-f]+ 0+42 00 +E  0 +0  1
+  \[[ 0-9]+\] .rela.gnu.debuglto_.debug_info RELA +0+ [0-9a-f]+ 0+f0 18 +I 26  17  8
+  \[[ 0-9]+\] .gnu.debuglto_.debug_abbrev PROGBITS +0+ [0-9a-f]+ 0+26 00 +E  0 +0  1
+  \[[ 0-9]+\] .gnu.debuglto_.debug_macro PROGBITS +0+ [0-9a-f]+ 0+2a 00 +E  0 +0  1
+  \[[ 0-9]+\] .rela.gnu.debuglto_.debug_macro RELA +0+ [0-9a-f]+ 0+60 18 +I 26  20  8
+  \[[ 0-9]+\] .gnu.debuglto_.debug_macro PROGBITS +0+ [0-9a-f]+ 0+10 00  GE  0 +0  1
+  \[[ 0-9]+\] .rela.gnu.debuglto_.debug_macro RELA +0+ [0-9a-f]+ 0+30 18  IG 26  22  8
+  \[[ 0-9]+\] .gnu.debuglto_.debug_line PROGBITS +0+ [0-9a-f]+ 0+8a 00 +E  0 +0  1
+  \[[ 0-9]+\] .gnu.debuglto_.debug_str PROGBITS +0+ [0-9a-f]+ 0+15c 01 MSE  0 +0  1
 #pass
diff --git a/ld/testsuite/ld-x86-64/pr32067.s b/ld/testsuite/ld-x86-64/pr32067.s
new file mode 100644
index 0000000..40878a9
--- /dev/null
+++ b/ld/testsuite/ld-x86-64/pr32067.s
@@ -0,0 +1,5 @@
+	.text
+	.globl foo
+foo:
+	ret
+	.section	.note.GNU-stack
diff --git a/ld/testsuite/ld-x86-64/pr32189.s b/ld/testsuite/ld-x86-64/pr32189.s
new file mode 100644
index 0000000..3d0f682
--- /dev/null
+++ b/ld/testsuite/ld-x86-64/pr32189.s
@@ -0,0 +1,35 @@
+	.text
+	.global _start
+_start:
+	leaq 1f(%rip), %r11
+1:
+	movabs $_GLOBAL_OFFSET_TABLE_, %r15
+	leaq (%r11,%r15), %r15
+
+	movabs $ptr@GOT, %rax
+	movabs $Ldst@GOTOFF, %rdx
+	movq (%rax,%r15), %rax
+	leaq (%rdx,%r15), %rcx
+	movq %rcx, (%rax)
+
+	# Write out "PASS\n".
+	movl	$5, %edx
+	movl	$.LC0, %esi
+	movl	$1, %edi
+	movl	$1, %eax
+	syscall
+
+	# exit
+	movq $60, %rax
+	movq $0, %rdi
+	syscall
+
+	.data
+Ldst:
+	.quad 0
+ptr:
+	.quad 0
+	.section	.rodata.str1.1,"aMS",@progbits,1
+.LC0:
+	.string	"PASS\n"
+	.section	.note.GNU-stack,"",@progbits
diff --git a/ld/testsuite/ld-x86-64/pr32191-x32.d b/ld/testsuite/ld-x86-64/pr32191-x32.d
new file mode 100644
index 0000000..19e06a2
--- /dev/null
+++ b/ld/testsuite/ld-x86-64/pr32191-x32.d
@@ -0,0 +1,9 @@
+#source: pr32191.s
+#as: --x32 -mx86-used-note=yes
+#ld: -shared -m elf32_x86_64 -z separate-code --build-id --rosegment
+#readelf: -lW
+
+#...
+ +[0-9]+ +\.note\.gnu\.build-id \.text 
+ +[0-9]+ +\..* \.note\.gnu\.property .*
+#pass
diff --git a/ld/testsuite/ld-x86-64/pr32191.d b/ld/testsuite/ld-x86-64/pr32191.d
new file mode 100644
index 0000000..9038ccd
--- /dev/null
+++ b/ld/testsuite/ld-x86-64/pr32191.d
@@ -0,0 +1,9 @@
+#source: pr32191.s
+#as: --64 -mx86-used-note=yes
+#ld: -shared -m elf_x86_64 -z separate-code --build-id --rosegment
+#readelf: -lW
+
+#...
+ +[0-9]+ +\.note\.gnu\.build-id \.text 
+ +[0-9]+ +\..* \.note\.gnu\.property .*
+#pass
diff --git a/ld/testsuite/ld-x86-64/pr32191.s b/ld/testsuite/ld-x86-64/pr32191.s
new file mode 100644
index 0000000..953f0de
--- /dev/null
+++ b/ld/testsuite/ld-x86-64/pr32191.s
@@ -0,0 +1,5 @@
+	.text
+	.global foo
+foo:
+	.nops 4
+	.section	.note.GNU-stack,"",@progbits
diff --git a/ld/testsuite/ld-x86-64/tlsdesc3.d b/ld/testsuite/ld-x86-64/tlsdesc3.d
index bbf22eb..9558848 100644
--- a/ld/testsuite/ld-x86-64/tlsdesc3.d
+++ b/ld/testsuite/ld-x86-64/tlsdesc3.d
@@ -1,4 +1,4 @@
 #name: TLS GDesc->LE transition check (LEA)
-#as: --64
+#as: --64 -mtls-check=no
 #ld: -melf_x86_64
 #error: .*: relocation R_X86_64_GOTPC32_TLSDESC against `foo' must be used in LEA only
diff --git a/ld/testsuite/ld-x86-64/tlsdesc4.d b/ld/testsuite/ld-x86-64/tlsdesc4.d
index b50115c..ccaa525 100644
--- a/ld/testsuite/ld-x86-64/tlsdesc4.d
+++ b/ld/testsuite/ld-x86-64/tlsdesc4.d
@@ -1,4 +1,4 @@
 #name: TLS GDesc->LE transition check (indirect CALL)
-#as: --64
+#as: --64 -mtls-check=no
 #ld: -melf_x86_64
-#error: .*: relocation R_X86_64_TLSDESC_CALL against `foo' must be used in indirect CALL only
+#error: .*: relocation R_X86_64_TLSDESC_CALL against `foo' must be used in indirect CALL with RAX register only
diff --git a/ld/testsuite/ld-x86-64/tlsdesc4.s b/ld/testsuite/ld-x86-64/tlsdesc4.s
index b3d6c12..1f3febc 100644
--- a/ld/testsuite/ld-x86-64/tlsdesc4.s
+++ b/ld/testsuite/ld-x86-64/tlsdesc4.s
@@ -2,8 +2,8 @@
 	.globl	_start
 	.type	_start,@function
 _start:
-	leaq	foo@tlsdesc(%rip), %rax
-	jmp	*foo@tlscall(%rax)
+	leaq	foo@tlsdesc(%rip), %rcx
+	call	*foo@tlscall(%rcx)
 	.globl foo
 	.section	.tdata,"awT",@progbits
 	.align 8
diff --git a/ld/testsuite/ld-x86-64/tlsdesc5.d b/ld/testsuite/ld-x86-64/tlsdesc5.d
new file mode 100644
index 0000000..0876993
--- /dev/null
+++ b/ld/testsuite/ld-x86-64/tlsdesc5.d
@@ -0,0 +1,5 @@
+#source: tlsdesc4.s
+#name: TLS GDesc call (indirect CALL)
+#as: --64 -mtls-check=no
+#ld: -shared -melf_x86_64
+#error: .*: relocation R_X86_64_TLSDESC_CALL against `foo' must be used in indirect CALL with RAX register only
diff --git a/ld/testsuite/ld-x86-64/tlsie2.d b/ld/testsuite/ld-x86-64/tlsie2.d
index bf8a819..2e6d41c 100644
--- a/ld/testsuite/ld-x86-64/tlsie2.d
+++ b/ld/testsuite/ld-x86-64/tlsie2.d
@@ -1,4 +1,4 @@
 #name: TLS IE->LE transition check
-#as: --64
+#as: --64 -mtls-check=no
 #ld: -melf_x86_64
 #error: .*: relocation R_X86_64_GOTTPOFF against `foo' must be used in ADD or MOV only
diff --git a/ld/testsuite/ld-x86-64/tlsie3.d b/ld/testsuite/ld-x86-64/tlsie3.d
index 49d8464..b59cc64 100644
--- a/ld/testsuite/ld-x86-64/tlsie3.d
+++ b/ld/testsuite/ld-x86-64/tlsie3.d
@@ -1,4 +1,4 @@
 #name: TLS IE->LE transition check (%r12)
-#as: --64
+#as: --64 -mtls-check=no
 #ld: -melf_x86_64
 #error: .*: relocation R_X86_64_GOTTPOFF against `foo' must be used in ADD or MOV only
diff --git a/ld/testsuite/ld-x86-64/tlsie5.d b/ld/testsuite/ld-x86-64/tlsie5.d
index 29de1ce..d7ab5ab 100644
--- a/ld/testsuite/ld-x86-64/tlsie5.d
+++ b/ld/testsuite/ld-x86-64/tlsie5.d
@@ -1,4 +1,4 @@
 #name: TLS IE->LE transition check (APX)
-#as: --64
+#as: --64 -mtls-check=no
 #ld: -melf_x86_64
 #error: .*: relocation R_X86_64_CODE_6_GOTTPOFF against `foo' must be used in ADD only
diff --git a/ld/testsuite/ld-x86-64/x86-64.exp b/ld/testsuite/ld-x86-64/x86-64.exp
index 1cae0a3..bd7574d 100644
--- a/ld/testsuite/ld-x86-64/x86-64.exp
+++ b/ld/testsuite/ld-x86-64/x86-64.exp
@@ -540,6 +540,9 @@ run_dump_test "pr31868c-x32"
 run_dump_test "tlsie5"
 run_dump_test "tlsdesc3"
 run_dump_test "tlsdesc4"
+run_dump_test "tlsdesc5"
+run_dump_test "pr32191"
+run_dump_test "pr32191-x32"
 
 if { ![skip_sframe_tests] } {
     run_dump_test "sframe-simple-1"
@@ -1218,7 +1221,7 @@ if { [isnative] && [check_compiler_available] } {
 	] \
 	[list \
 	    "Build pr22393-3a.so" \
-	    "-shared -Wl,-z,separate-code,-z,max-page-size=0x1000" \
+	    "-shared -Wl,-z,separate-code,-z,max-page-size=0x1000,--no-rosegment" \
 	    "-fPIC -Wa,-mx86-used-note=yes" \
 	    {pr22393-3a.c} \
 	    {{readelf -lW pr22393-3a.rd} \
@@ -1227,7 +1230,7 @@ if { [isnative] && [check_compiler_available] } {
 	] \
 	[list \
 	    "Build pr22393-3a-now.so" \
-	    "-shared -Wl,-z,separate-code,-z,now,-z,max-page-size=0x1000" \
+	    "-shared -Wl,-z,separate-code,-z,now,-z,max-page-size=0x1000,--no-rosegment" \
 	    "-fPIC -Wa,-mx86-used-note=yes" \
 	    {pr22393-3a.c} \
 	    {{readelf -lW pr22393-3a.rd} \
@@ -1236,7 +1239,7 @@ if { [isnative] && [check_compiler_available] } {
 	] \
 	[list \
 	    "Build pr22393-3" \
-	    "$NOPIE_LDFLAGS -Wl,-z,separate-code,-z,max-page-size=0x1000,--no-as-needed tmpdir/pr22393-3a.so" \
+	    "$NOPIE_LDFLAGS -Wl,-z,separate-code,-z,max-page-size=0x1000,--no-rosegment,--no-as-needed tmpdir/pr22393-3a.so" \
 	    "$NOPIE_CFLAGS -Wa,-mx86-used-note=yes" \
 	    {pr22393-3b.c} \
 	    {{readelf -lW pr22393-3a.rd} \
@@ -1245,7 +1248,7 @@ if { [isnative] && [check_compiler_available] } {
 	] \
 	[list \
 	    "Build pr22393-3 (PIE)" \
-	    "-pie -Wl,-z,separate-code,-z,max-page-size=0x1000,--no-as-needed tmpdir/pr22393-3a-now.so" \
+	    "-pie -Wl,-z,separate-code,-z,max-page-size=0x1000,--no-rosegment,--no-as-needed tmpdir/pr22393-3a-now.so" \
 	    "-fPIE -Wa,-mx86-used-note=yes" \
 	    {pr22393-3b.c} \
 	    {{readelf -lW pr22393-3a.rd} \
@@ -1254,7 +1257,7 @@ if { [isnative] && [check_compiler_available] } {
 	] \
 	[list \
 	    "Build pr22393-3 (static)" \
-	    "-static -Wl,-z,separate-code,-z,max-page-size=0x1000" \
+	    "-static -Wl,-z,separate-code,-z,max-page-size=0x1000,--no-rosegment" \
 	    "-Wa,-mx86-used-note=yes" \
 	    {pr22393-3a.c pr22393-3b.c} \
 	    {{readelf -lW pr22393-3a.rd} \
@@ -1405,6 +1408,14 @@ if { [isnative] && [check_compiler_available] } {
 	    {{readelf -n indirect-extern-access.rd}}  \
 	    "libprotected-data-2b.so" \
 	] \
+	[list \
+	    "Build pr32067" \
+	    "-Wl,--oformat,binary -nostdlib -nostartfiles" \
+	    "" \
+	    { start.s pr32067.s } \
+	    {} \
+	    "pr32067" \
+	] \
     ]
 
     if  {[istarget "x86_64-*-linux*-gnux32"]} {
@@ -1912,6 +1923,22 @@ if { [isnative] && [check_compiler_available] } {
 	    "pass.out" \
 	    "-fPIE" \
 	] \
+	[list \
+	    "Run pr32189" \
+	    "$NOPIE_LDFLAGS -nostdlib -nostartfiles" \
+	    "" \
+	    { pr32189.s } \
+	    "pr32189" \
+	    "pass.out" \
+	] \
+	[list \
+	    "Run plt3" \
+	    "$NOPIE_LDFLAGS -nostdlib -nostartfiles" \
+	    "" \
+	    { plt3.s } \
+	    "plt3" \
+	    "pass.out" \
+	] \
     ]
 
     # Run-time tests which require working ifunc attribute support.
diff --git a/ld/testsuite/lib/ld-lib.exp b/ld/testsuite/lib/ld-lib.exp
index 5d5905d..4c43425 100644
--- a/ld/testsuite/lib/ld-lib.exp
+++ b/ld/testsuite/lib/ld-lib.exp
@@ -488,6 +488,11 @@ proc run_ld_link_tests { ldtests args } {
 	set maybe_failed 0
 	set ld_output ""
 
+	# Don't leave previous output around
+	if { $binfile ne "tmpdir/" } {
+	    remote_file host delete $binfile
+	}
+
 	# Add -fno-lto.  LTO should be tested explicitly by $cflags.
 	if {[check_lto_available]} {
 	    set cflags "-fno-lto $cflags"
@@ -706,6 +711,11 @@ proc run_ld_link_exec_tests { ldtests args } {
 	set objfiles {}
 	set failed 0
 
+	# Don't leave previous output around
+	if { $binfile ne "tmpdir/" } {
+	    remote_file host delete $binfile
+	}
+
 	if { ![check_compiler_available] } {
 	    unsupported $testname
 	    continue
@@ -875,6 +885,11 @@ proc run_cc_link_tests { ldtests } {
 	set check_ld(terminal) 0
 	set check_ld(source) ""
 
+	# Don't leave previous output around
+	if { $binfile ne "tmpdir/" } {
+	    remote_file host delete $binfile
+	}
+
 	if { ![check_compiler_available] } {
 	    unsupported $testname
 	    continue
@@ -1126,6 +1141,7 @@ proc uses_genelf { } {
 	 || [istarget "ft32-*-*"]
 	 || [istarget "iq2000-*-*"]
 	 || [istarget "mn10200-*-*"]
+	 || [istarget "moxie-*-moxiebox*"]
 	 || [istarget "msp430-*-*"]
 	 || [istarget "mt-*-*"]
 	 || [istarget "pj*-*-*"]
@@ -1136,6 +1152,14 @@ proc uses_genelf { } {
     return 0
 }
 
+# Return true if target uses elf.em.
+proc uses_elf_em { } {
+    if { [is_elf_format] && ![uses_genelf] } {
+	return 1;
+    }
+    return 0;
+}
+
 proc is_underscore_target { } {
     global is_underscore_target_saved
     global target_triplet
diff --git a/libctf/ctf-hash.c b/libctf/ctf-hash.c
index cd74734..a451aa2 100644
--- a/libctf/ctf-hash.c
+++ b/libctf/ctf-hash.c
@@ -164,7 +164,10 @@ ctf_dynhash_create_sized (unsigned long nelems, ctf_hash_fun hash_fun,
   if (key_free || value_free)
     dynhash = malloc (sizeof (ctf_dynhash_t));
   else
-    dynhash = malloc (offsetof (ctf_dynhash_t, key_free));
+    {
+      void *p = malloc (offsetof (ctf_dynhash_t, key_free));
+      dynhash = p;
+    }
   if (!dynhash)
     return NULL;
 
@@ -225,7 +228,10 @@ ctf_hashtab_insert (struct htab *htab, void *key, void *value,
       if (key_free || value_free)
 	*slot = malloc (sizeof (ctf_helem_t));
       else
-	*slot = malloc (offsetof (ctf_helem_t, owner));
+	{
+	  void *p = malloc (offsetof (ctf_helem_t, owner));
+	  *slot = p;
+	}
       if (!*slot)
 	return NULL;
       (*slot)->key = key;
diff --git a/libctf/testsuite/lib/ctf-lib.exp b/libctf/testsuite/lib/ctf-lib.exp
index cfd36be..966c5a9 100644
--- a/libctf/testsuite/lib/ctf-lib.exp
+++ b/libctf/testsuite/lib/ctf-lib.exp
@@ -136,11 +136,13 @@ proc run_lookup_test { name } {
     } else {
 	set file "$srcdir/$subdir/$name"
     }
+    # strip off the srcdir, which contains build host specific pathnames
+    set file4log [string map [list $srcdir/ ""] $file]
 
     set opt_array [slurp_options "${file}.lk"]
     if { $opt_array == -1 } {
 	perror "error reading options from $file.lk"
-	unresolved $subdir/$name
+	unresolved $file4log
 	return
     }
     set run_ld 0
@@ -166,7 +168,7 @@ proc run_lookup_test { name } {
 	}
 	if ![info exists opts($opt_name)] {
 	    perror "unknown option $opt_name in file $file.lk"
-	    unresolved $subdir/$name
+	    unresolved $file4log
 	    return
 	}
 
@@ -175,12 +177,12 @@ proc run_lookup_test { name } {
 
     if { [llength $opts(no_cross)] != 0
 	 && "$TEST_CROSS" eq "yes" } {
-	untested "$subdir/$name not tested when cross-compiling"
+	untested "$file4log not tested when cross-compiling"
 	return
     }
 
     if { [llength $opts(host)] != 0 && ![ishost $opts(host)] } {
-	untested "$subdir/$name only runs on $opts(host)"
+	untested "$file4log only runs on $opts(host)"
 	return
     }
 
@@ -203,10 +205,7 @@ proc run_lookup_test { name } {
 	set shared ""
     }
 
-    set testname $opts(name)
-    if { $opts(name) == "" } {
-	set testname "$subdir/$name"
-    }
+    set testname $file4log
 
     # Compile and link the lookup program.
     set comp_output [prune_warnings [compile_link_one_host_cc $opts(lookup) "tmpdir/lookup" "libctf.la $opts(lookup_link)"]]
diff --git a/libctf/testsuite/libctf-regression/libctf-repeat-cu.exp b/libctf/testsuite/libctf-regression/libctf-repeat-cu.exp
index 2f14119..6bfeac3 100644
--- a/libctf/testsuite/libctf-regression/libctf-repeat-cu.exp
+++ b/libctf/testsuite/libctf-regression/libctf-repeat-cu.exp
@@ -25,7 +25,7 @@ global testname
 global subsrcdir
 
 set subsrcdir "$srcdir/$subdir/"
-set testname "$dir/libctf-repeat-cu.exp"
+set testname "libctf-repeat-cu.exp"
 
 if ![is_elf_format] {
     unsupported "CTF needs bfd changes to be emitted on non-ELF"
diff --git a/libiberty/ChangeLog b/libiberty/ChangeLog
index cdcd4b3..949fec6 100644
--- a/libiberty/ChangeLog
+++ b/libiberty/ChangeLog
@@ -1,3 +1,24 @@
+2024-08-05  Andrew Burgess  <aburgess@redhat.com>
+
+	* argv.c (only_whitespace): Delete.
+
+2024-07-16  Andrew Burgess  <aburgess@redhat.com>
+
+	* argv.c (buildargv): Treat input of only whitespace as an empty
+	argument list.
+	(expandargv): Remove work around for intput that is only
+	whitespace.
+	* testsuite/test-expandargv.c: Add new tests 10, 11, and 12.
+	Extend testing to call buildargv in more cases.
+
+2024-07-16  Andrew Burgess  <aburgess@redhat.com>
+
+	* argv.c (buildargv): Backslashes within single quotes are
+	literal, backslashes only escape POSIX defined special characters
+	within double quotes, and backslashed newlines should act as line
+	continuations.
+	* testsuite/test-expandargv.c: Add new tests 7, 8, and 9.
+
 2024-04-02  Tom Tromey  <tom@tromey.com>
 
 	* cplus-dem.c (cplus_demangle): Try the D demangler with
diff --git a/libiberty/argv.c b/libiberty/argv.c
index 45f1685..f889432 100644
--- a/libiberty/argv.c
+++ b/libiberty/argv.c
@@ -124,15 +124,6 @@ consume_whitespace (const char **input)
     }
 }
 
-static int
-only_whitespace (const char* input)
-{
-  while (*input != EOS && ISSPACE (*input))
-    input++;
-
-  return (*input == EOS);
-}
-
 /*
 
 @deftypefn Extension char** buildargv (char *@var{sp})
@@ -212,67 +203,74 @@ char **buildargv (const char *input)
 	      argv[argc] = NULL;
 	    }
 	  /* Begin scanning arg */
-	  arg = copybuf;
-	  while (*input != EOS)
+	  if (*input != EOS)
 	    {
-	      if (ISSPACE (*input) && !squote && !dquote && !bsquote)
-		{
-		  break;
-		}
-	      else
+	      arg = copybuf;
+	      while (*input != EOS)
 		{
-		  if (bsquote)
-		    {
-		      bsquote = 0;
-		      *arg++ = *input;
-		    }
-		  else if (*input == '\\')
+		  if (ISSPACE (*input) && !squote && !dquote && !bsquote)
 		    {
-		      bsquote = 1;
-		    }
-		  else if (squote)
-		    {
-		      if (*input == '\'')
-			{
-			  squote = 0;
-			}
-		      else
-			{
-			  *arg++ = *input;
-			}
+		      break;
 		    }
-		  else if (dquote)
+		  else
 		    {
-		      if (*input == '"')
+		      if (bsquote)
 			{
-			  dquote = 0;
+			  bsquote = 0;
+			  if (*input != '\n')
+			    *arg++ = *input;
 			}
-		      else
+		      else if (*input == '\\'
+			       && !squote
+			       && (!dquote
+				   || strchr ("$`\"\\\n", *(input + 1)) != NULL))
 			{
-			  *arg++ = *input;
+			  bsquote = 1;
 			}
-		    }
-		  else
-		    {
-		      if (*input == '\'')
+		      else if (squote)
 			{
-			  squote = 1;
+			  if (*input == '\'')
+			    {
+			      squote = 0;
+			    }
+			  else
+			    {
+			      *arg++ = *input;
+			    }
 			}
-		      else if (*input == '"')
+		      else if (dquote)
 			{
-			  dquote = 1;
+			  if (*input == '"')
+			    {
+			      dquote = 0;
+			    }
+			  else
+			    {
+			      *arg++ = *input;
+			    }
 			}
 		      else
 			{
-			  *arg++ = *input;
+			  if (*input == '\'')
+			    {
+			      squote = 1;
+			    }
+			  else if (*input == '"')
+			    {
+			      dquote = 1;
+			    }
+			  else
+			    {
+			      *arg++ = *input;
+			    }
 			}
+		      input++;
 		    }
-		  input++;
 		}
+	      *arg = EOS;
+	      argv[argc] = xstrdup (copybuf);
+	      argc++;
 	    }
-	  *arg = EOS;
-	  argv[argc] = xstrdup (copybuf);
-	  argc++;
 	  argv[argc] = NULL;
 
 	  consume_whitespace (&input);
@@ -435,17 +433,8 @@ expandargv (int *argcp, char ***argvp)
 	}
       /* Add a NUL terminator.  */
       buffer[len] = '\0';
-      /* If the file is empty or contains only whitespace, buildargv would
-	 return a single empty argument.  In this context we want no arguments,
-	 instead.  */
-      if (only_whitespace (buffer))
-	{
-	  file_argv = (char **) xmalloc (sizeof (char *));
-	  file_argv[0] = NULL;
-	}
-      else
-	/* Parse the string.  */
-	file_argv = buildargv (buffer);
+      /* Parse the string.  */
+      file_argv = buildargv (buffer);
       /* If *ARGVP is not already dynamically allocated, copy it.  */
       if (*argvp == original_argv)
 	*argvp = dupargv (*argvp);
diff --git a/libiberty/testsuite/test-expandargv.c b/libiberty/testsuite/test-expandargv.c
index 1e9cb0a..ca7031e 100644
--- a/libiberty/testsuite/test-expandargv.c
+++ b/libiberty/testsuite/test-expandargv.c
@@ -142,6 +142,64 @@ const char *test_data[] = {
   "b",
   0,
 
+  /* Test 7 - No backslash removal within single quotes.  */
+  "'a\\$VAR' '\\\"'",    /* Test 7 data */
+  ARGV0,
+  "@test-expandargv-7.lst",
+  0,
+  ARGV0,
+  "a\\$VAR",
+  "\\\"",
+  0,
+
+  /* Test 8 - Remove backslash / newline pairs.  */
+  "\"ab\\\ncd\" ef\\\ngh",    /* Test 8 data */
+  ARGV0,
+  "@test-expandargv-8.lst",
+  0,
+  ARGV0,
+  "abcd",
+  "efgh",
+  0,
+
+  /* Test 9 - Backslash within double quotes.  */
+  "\"\\$VAR\" \"\\`\" \"\\\"\" \"\\\\\" \"\\n\" \"\\t\"",    /* Test 9 data */
+  ARGV0,
+  "@test-expandargv-9.lst",
+  0,
+  ARGV0,
+  "$VAR",
+  "`",
+  "\"",
+  "\\",
+  "\\n",
+  "\\t",
+  0,
+
+  /* Test 10 - Mixed white space characters.  */
+  "\t \n \t ",		/* Test 10 data */
+  ARGV0,
+  "@test-expandargv-10.lst",
+  0,
+  ARGV0,
+  0,
+
+  /* Test 11 - Single ' ' character.  */
+  " ",		/* Test 11 data */
+  ARGV0,
+  "@test-expandargv-11.lst",
+  0,
+  ARGV0,
+  0,
+
+  /* Test 12 - Multiple ' ' characters.  */
+  "   ",		/* Test 12 data */
+  ARGV0,
+  "@test-expandargv-12.lst",
+  0,
+  ARGV0,
+  0,
+
   0 /* Test done marker, don't remove. */
 };
 
@@ -231,6 +289,78 @@ erase_test (int test)
     fatal_error (__LINE__, "Failed to erase test file.", errno);
 }
 
+/* compare_argv:
+     TEST is the current test number, and NAME is a short string to identify
+     which libibery function is being tested.  ARGC_A and ARGV_A describe an
+     argument array, and this is compared to ARGC_B and ARGV_B, return 0 if
+     the two arrays match, otherwise return 1.  */
+
+static int
+compare_argv (int test, const char *name, int argc_a, char *argv_a[],
+	      int argc_b, char *argv_b[])
+{
+  int failed = 0, k;
+
+  if (argc_a != argc_b)
+    {
+      printf ("FAIL: test-%s-%d.  Argument count didn't match\n", name, test);
+      failed = 1;
+    }
+  /* Compare each of the argv's ... */
+  else
+    for (k = 0; k < argc_a; k++)
+      if (strcmp (argv_a[k], argv_b[k]) != 0)
+	{
+	  printf ("FAIL: test-%s-%d. Arguments don't match.\n", name, test);
+	  failed = 1;
+	  break;
+	}
+
+  if (!failed)
+    printf ("PASS: test-%s-%d.\n", name, test);
+
+  return failed;
+}
+
+/* test_buildargv
+     Test the buildargv function from libiberty.  TEST is the current test
+     number and TEST_INPUT is the string to pass to buildargv (after calling
+     run_replaces on it).  ARGC_AFTER and ARGV_AFTER are the expected
+     results.  Return 0 if the test passes, otherwise return 1.  */
+
+static int
+test_buildargv (int test, const char * test_input, int argc_after,
+		char *argv_after[])
+{
+  char * input, ** argv;
+  size_t len;
+  int argc, failed;
+
+  /* Generate RW copy of data for replaces */
+  len = strlen (test_input);
+  input = malloc (sizeof (char) * (len + 1));
+  if (input == NULL)
+    fatal_error (__LINE__, "Failed to malloc buildargv input buffer.", errno);
+
+  memcpy (input, test_input, sizeof (char) * (len + 1));
+  /* Run all possible replaces */
+  run_replaces (input);
+
+  /* Split INPUT into separate arguments.  */
+  argv = buildargv (input);
+
+  /* Count the arguments we got back.  */
+  argc = 0;
+  while (argv[argc])
+    ++argc;
+
+  failed = compare_argv (test, "buildargv", argc_after, argv_after, argc, argv);
+
+  free (input);
+  freeargv (argv);
+
+  return failed;
+}
 
 /* run_tests:
     Run expandargv
@@ -242,12 +372,16 @@ run_tests (const char **test_data)
 {
   int argc_after, argc_before;
   char ** argv_before, ** argv_after;
-  int i, j, k, fails, failed;
+  int i, j, k, fails;
+  const char * input_str;
 
   i = j = fails = 0;
   /* Loop over all the tests */
   while (test_data[j])
     {
+      /* Save original input in case we run a buildargv test.  */
+      input_str = test_data[j];
+
       /* Write test data */
       writeout_test (i, test_data[j++]);
       /* Copy argv before */
@@ -271,29 +405,23 @@ run_tests (const char **test_data)
       for (k = 0; k < argc_after; k++)
         run_replaces (argv_after[k]);
 
+      /* If the test input is just a file to expand then we can also test
+	 calling buildargv directly as the expected output is equivalent to
+	 calling buildargv on the contents of the file.
+
+	 The results of calling buildargv will not include the ARGV0 constant,
+	 which is why we pass 'argc_after - 1' and 'argv_after + 1', this skips
+	 over the ARGV0 in the expected results.  */
+      if (argc_before == 2)
+	fails += test_buildargv (i, input_str, argc_after - 1, argv_after + 1);
+      else
+	printf ("SKIP: test-buildargv-%d.  This test isn't for buildargv\n", i);
+
       /* Run test: Expand arguments */
       expandargv (&argc_before, &argv_before);
 
-      failed = 0;
-      /* Compare size first */
-      if (argc_before != argc_after)
-        {
-          printf ("FAIL: test-expandargv-%d. Number of arguments don't match.\n", i);
-	  failed++;
-        }
-      /* Compare each of the argv's ... */
-      else
-        for (k = 0; k < argc_after; k++)
-          if (strcmp (argv_before[k], argv_after[k]) != 0)
-            {
-              printf ("FAIL: test-expandargv-%d. Arguments don't match.\n", i);
-              failed++;
-            }
-
-      if (!failed)
-        printf ("PASS: test-expandargv-%d.\n", i);
-      else
-        fails++;
+      fails += compare_argv (i, "expandargv", argc_before, argv_before,
+			     argc_after, argv_after);
 
       freeargv (argv_before);
       freeargv (argv_after);
diff --git a/ltmain.sh b/ltmain.sh
index 7099074..1a71017 100644
--- a/ltmain.sh
+++ b/ltmain.sh
@@ -4968,19 +4968,41 @@ func_mode_link ()
 	arg="$func_quote_for_eval_result"
 	;;
 
-      # -64, -mips[0-9] enable 64-bit mode on the SGI compiler
-      # -r[0-9][0-9]* specifies the processor on the SGI compiler
-      # -xarch=*, -xtarget=* enable 64-bit mode on the Sun compiler
-      # +DA*, +DD* enable 64-bit mode on the HP compiler
-      # -q* pass through compiler args for the IBM compiler
-      # -m*, -t[45]*, -txscale* pass through architecture-specific
-      # compiler args for GCC
-      # -F/path gives path to uninstalled frameworks, gcc on darwin
-      # -p, -pg, --coverage, -fprofile-* pass through profiling flag for GCC
-      # @file GCC response files
-      # -tp=* Portland pgcc target processor selection
+      # Flags to be passed through unchanged, with rationale:
+      # -64, -mips[0-9]      enable 64-bit mode for the SGI compiler
+      # -r[0-9][0-9]*        specify processor for the SGI compiler
+      # -xarch=*, -xtarget=* enable 64-bit mode for the Sun compiler
+      # +DA*, +DD*           enable 64-bit mode for the HP compiler
+      # -q*                  compiler args for the IBM compiler
+      # -m*, -t[45]*, -txscale* architecture-specific flags for GCC
+      # -F/path              path to uninstalled frameworks, gcc on darwin
+      # -p, -pg, --coverage, -fprofile-*  profiling flags for GCC
+      # -fstack-protector*   stack protector flags for GCC
+      # @file                GCC response files
+      # -tp=*                Portland pgcc target processor selection
+      # -O*, -g*, -flto*, -fwhopr*, -fuse-linker-plugin GCC link-time optimization
+      # -specs=*             GCC specs files
+      # -stdlib=*            select c++ std lib with clang
+      # -fdiagnostics-color* simply affects output
+      # -frecord-gcc-switches used to verify flags were respected
+      # -fsanitize=*         Clang/GCC memory and address sanitizer
+      # -fno-sanitize*       Clang/GCC memory and address sanitizer
+      # -shared-libsan       Link with shared sanitizer runtimes (Clang)
+      # -static-libsan       Link with static sanitizer runtimes (Clang)
+      # -fuse-ld=*           Linker select flags for GCC
+      # -rtlib=*             select c runtime lib with clang
+      # --unwindlib=*        select unwinder library with clang
+      # -f{file|debug|macro|profile}-prefix-map=* needed for lto linking
+      # -Wa,*                Pass flags directly to the assembler
+      # -Werror, -Werror=*   Report (specified) warnings as errors
       -64|-mips[0-9]|-r[0-9][0-9]*|-xarch=*|-xtarget=*|+DA*|+DD*|-q*|-m*| \
-      -t[45]*|-txscale*|-p|-pg|--coverage|-fprofile-*|-F*|@*|-tp=*)
+      -t[45]*|-txscale*|-p|-pg|--coverage|-fprofile-*|-F*|@*|-tp=*| \
+      -O*|-g*|-flto*|-fwhopr*|-fuse-linker-plugin|-fstack-protector*| \
+      -stdlib=*|-rtlib=*|--unwindlib=*| \
+      -specs=*|-fsanitize=*|-fno-sanitize*|-shared-libsan|-static-libsan| \
+      -ffile-prefix-map=*|-fdebug-prefix-map=*|-fmacro-prefix-map=*|-fprofile-prefix-map=*| \
+      -fdiagnostics-color*|-frecord-gcc-switches| \
+      -fuse-ld=*|-Wa,*|-Werror|-Werror=*)
         func_quote_for_eval "$arg"
 	arg="$func_quote_for_eval_result"
         func_append compile_command " $arg"
diff --git a/opcodes/cgen.sh b/opcodes/cgen.sh
index f6b9e4d..467535e 100644
--- a/opcodes/cgen.sh
+++ b/opcodes/cgen.sh
@@ -192,15 +192,15 @@ desc)
 		-O ${tmp}-opc.h1
 
 	sed -e "s/@ARCH@/${ARCH}/g" -e "s/@arch@/${arch}/g" \
-		-e "s/@prefix@/${prefix}/g" \
+		-e "s/@prefix@/${prefix}/g" -e 's/[ 	][ 	]*$//' \
 		< ${tmp}-desc.h1 > ${tmp}-desc.h
 	${rootdir}/move-if-change ${tmp}-desc.h ${srcdir}/${arch}-desc.h
 	sed -e "s/@ARCH@/${ARCH}/g" -e "s/@arch@/${arch}/g" \
-		-e "s/@prefix@/${prefix}/g" \
+		-e "s/@prefix@/${prefix}/g" -e 's/[ 	][ 	]*$//' \
 		< ${tmp}-desc.c1 > ${tmp}-desc.c
 	${rootdir}/move-if-change ${tmp}-desc.c ${srcdir}/${arch}-desc.c
 	sed -e "s/@ARCH@/${ARCH}/g" -e "s/@arch@/${arch}/g" \
-		-e "s/@prefix@/${prefix}/g" \
+		-e "s/@prefix@/${prefix}/g" -e 's/[ 	][ 	]*$//' \
 		< ${tmp}-opc.h1 > ${tmp}-opc.h
 	${rootdir}/move-if-change ${tmp}-opc.h ${srcdir}/${arch}-opc.h
 
diff --git a/opcodes/cris-desc.c b/opcodes/cris-desc.c
index bf1536a..2c8624c 100644
--- a/opcodes/cris-desc.c
+++ b/opcodes/cris-desc.c
@@ -840,175 +840,175 @@ const CGEN_OPERAND cris_cgen_operand_table[] =
 {
 /* pc: program counter */
   { "pc", CRIS_OPERAND_PC, HW_H_PC, 0, 0,
-    { 0, { &cris_cgen_ifld_table[CRIS_F_NIL] } }, 
+    { 0, { &cris_cgen_ifld_table[CRIS_F_NIL] } },
     { 0|A(SEM_ONLY), { { { (1<<MACH_BASE), 0 } } } }  },
 /* cbit:  */
   { "cbit", CRIS_OPERAND_CBIT, HW_H_CBIT, 0, 0,
-    { 0, { 0 } }, 
+    { 0, { 0 } },
     { 0|A(SEM_ONLY), { { { (1<<MACH_BASE), 0 } } } }  },
 /* cbit-move: cbit for pre-V32, nothing for newer */
   { "cbit-move", CRIS_OPERAND_CBIT_MOVE, HW_H_CBIT_MOVE, 0, 0,
-    { 0, { 0 } }, 
+    { 0, { 0 } },
     { 0|A(SEM_ONLY), { { { (1<<MACH_BASE), 0 } } } }  },
 /* vbit:  */
   { "vbit", CRIS_OPERAND_VBIT, HW_H_VBIT, 0, 0,
-    { 0, { 0 } }, 
+    { 0, { 0 } },
     { 0|A(SEM_ONLY), { { { (1<<MACH_BASE), 0 } } } }  },
 /* vbit-move: vbit for pre-V32, nothing for newer */
   { "vbit-move", CRIS_OPERAND_VBIT_MOVE, HW_H_VBIT_MOVE, 0, 0,
-    { 0, { 0 } }, 
+    { 0, { 0 } },
     { 0|A(SEM_ONLY), { { { (1<<MACH_BASE), 0 } } } }  },
 /* zbit:  */
   { "zbit", CRIS_OPERAND_ZBIT, HW_H_ZBIT, 0, 0,
-    { 0, { 0 } }, 
+    { 0, { 0 } },
     { 0|A(SEM_ONLY), { { { (1<<MACH_BASE), 0 } } } }  },
 /* zbit-move: zbit for pre-V32, nothing for newer */
   { "zbit-move", CRIS_OPERAND_ZBIT_MOVE, HW_H_ZBIT_MOVE, 0, 0,
-    { 0, { 0 } }, 
+    { 0, { 0 } },
     { 0|A(SEM_ONLY), { { { (1<<MACH_BASE), 0 } } } }  },
 /* nbit:  */
   { "nbit", CRIS_OPERAND_NBIT, HW_H_NBIT, 0, 0,
-    { 0, { 0 } }, 
+    { 0, { 0 } },
     { 0|A(SEM_ONLY), { { { (1<<MACH_BASE), 0 } } } }  },
 /* nbit-move: nbit for pre-V32, nothing for newer */
   { "nbit-move", CRIS_OPERAND_NBIT_MOVE, HW_H_NBIT_MOVE, 0, 0,
-    { 0, { 0 } }, 
+    { 0, { 0 } },
     { 0|A(SEM_ONLY), { { { (1<<MACH_BASE), 0 } } } }  },
 /* xbit:  */
   { "xbit", CRIS_OPERAND_XBIT, HW_H_XBIT, 0, 0,
-    { 0, { 0 } }, 
+    { 0, { 0 } },
     { 0|A(SEM_ONLY), { { { (1<<MACH_BASE), 0 } } } }  },
 /* ibit:  */
   { "ibit", CRIS_OPERAND_IBIT, HW_H_IBIT, 0, 0,
-    { 0, { 0 } }, 
+    { 0, { 0 } },
     { 0|A(SEM_ONLY), { { { (1<<MACH_BASE), 0 } } } }  },
 /* ubit:  */
   { "ubit", CRIS_OPERAND_UBIT, HW_H_UBIT, 0, 0,
-    { 0, { 0 } }, 
+    { 0, { 0 } },
     { 0|A(SEM_ONLY), { { { (1<<MACH_CRISV10)|(1<<MACH_CRISV32), 0 } } } }  },
 /* pbit:  */
   { "pbit", CRIS_OPERAND_PBIT, HW_H_PBIT, 0, 0,
-    { 0, { 0 } }, 
+    { 0, { 0 } },
     { 0|A(SEM_ONLY), { { { (1<<MACH_CRISV10)|(1<<MACH_CRISV32), 0 } } } }  },
 /* rbit: carry bit for MCP+restore-P flag bit */
   { "rbit", CRIS_OPERAND_RBIT, HW_H_RBIT, 0, 0,
-    { 0, { 0 } }, 
+    { 0, { 0 } },
     { 0|A(SEM_ONLY), { { { (1<<MACH_CRISV32), 0 } } } }  },
 /* sbit:  */
   { "sbit", CRIS_OPERAND_SBIT, HW_H_SBIT, 0, 0,
-    { 0, { 0 } }, 
+    { 0, { 0 } },
     { 0|A(SEM_ONLY), { { { (1<<MACH_CRISV32), 0 } } } }  },
 /* mbit:  */
   { "mbit", CRIS_OPERAND_MBIT, HW_H_MBIT, 0, 0,
-    { 0, { 0 } }, 
+    { 0, { 0 } },
     { 0|A(SEM_ONLY), { { { (1<<MACH_CRISV32), 0 } } } }  },
 /* qbit:  */
   { "qbit", CRIS_OPERAND_QBIT, HW_H_QBIT, 0, 0,
-    { 0, { 0 } }, 
+    { 0, { 0 } },
     { 0|A(SEM_ONLY), { { { (1<<MACH_CRISV32), 0 } } } }  },
 /* prefix-set: Instruction-prefixed flag */
   { "prefix-set", CRIS_OPERAND_PREFIX_SET, HW_H_INSN_PREFIXED_P, 0, 0,
-    { 0, { 0 } }, 
+    { 0, { 0 } },
     { 0|A(SEM_ONLY), { { { (1<<MACH_BASE), 0 } } } }  },
 /* prefixreg: Prefix address */
   { "prefixreg", CRIS_OPERAND_PREFIXREG, HW_H_PREFIXREG, 0, 0,
-    { 0, { 0 } }, 
+    { 0, { 0 } },
     { 0|A(SEM_ONLY), { { { (1<<MACH_BASE), 0 } } } }  },
 /* Rs: Source general register */
   { "Rs", CRIS_OPERAND_RS, HW_H_GR, 3, 4,
-    { 0, { &cris_cgen_ifld_table[CRIS_F_OPERAND1] } }, 
+    { 0, { &cris_cgen_ifld_table[CRIS_F_OPERAND1] } },
     { 0, { { { (1<<MACH_BASE), 0 } } } }  },
 /* inc: Incrementness of indirect operand */
   { "inc", CRIS_OPERAND_INC, HW_H_INC, 10, 1,
-    { 0, { &cris_cgen_ifld_table[CRIS_F_MEMMODE] } }, 
+    { 0, { &cris_cgen_ifld_table[CRIS_F_MEMMODE] } },
     { 0, { { { (1<<MACH_BASE), 0 } } } }  },
 /* Ps: Source special register */
   { "Ps", CRIS_OPERAND_PS, HW_H_SR, 15, 4,
-    { 0, { &cris_cgen_ifld_table[CRIS_F_OPERAND2] } }, 
+    { 0, { &cris_cgen_ifld_table[CRIS_F_OPERAND2] } },
     { 0, { { { (1<<MACH_BASE), 0 } } } }  },
 /* Ss: Source support register */
   { "Ss", CRIS_OPERAND_SS, HW_H_SUPR, 15, 4,
-    { 0, { &cris_cgen_ifld_table[CRIS_F_OPERAND2] } }, 
+    { 0, { &cris_cgen_ifld_table[CRIS_F_OPERAND2] } },
     { 0, { { { (1<<MACH_CRISV32), 0 } } } }  },
 /* Sd: Destination support register */
   { "Sd", CRIS_OPERAND_SD, HW_H_SUPR, 15, 4,
-    { 0, { &cris_cgen_ifld_table[CRIS_F_OPERAND2] } }, 
+    { 0, { &cris_cgen_ifld_table[CRIS_F_OPERAND2] } },
     { 0, { { { (1<<MACH_CRISV32), 0 } } } }  },
 /* i: Quick signed 6-bit */
   { "i", CRIS_OPERAND_I, HW_H_SINT, 5, 6,
-    { 0, { &cris_cgen_ifld_table[CRIS_F_S6] } }, 
+    { 0, { &cris_cgen_ifld_table[CRIS_F_S6] } },
     { 0, { { { (1<<MACH_BASE), 0 } } } }  },
 /* j: Quick unsigned 6-bit */
   { "j", CRIS_OPERAND_J, HW_H_UINT, 5, 6,
-    { 0, { &cris_cgen_ifld_table[CRIS_F_U6] } }, 
+    { 0, { &cris_cgen_ifld_table[CRIS_F_U6] } },
     { 0, { { { (1<<MACH_BASE), 0 } } } }  },
 /* c: Quick unsigned 5-bit */
   { "c", CRIS_OPERAND_C, HW_H_UINT, 4, 5,
-    { 0, { &cris_cgen_ifld_table[CRIS_F_U5] } }, 
+    { 0, { &cris_cgen_ifld_table[CRIS_F_U5] } },
     { 0, { { { (1<<MACH_BASE), 0 } } } }  },
 /* qo: Quick unsigned 4-bit, PC-relative */
   { "qo", CRIS_OPERAND_QO, HW_H_ADDR, 3, 4,
-    { 0, { &cris_cgen_ifld_table[CRIS_F_QO] } }, 
+    { 0, { &cris_cgen_ifld_table[CRIS_F_QO] } },
     { 0|A(PCREL_ADDR), { { { (1<<MACH_CRISV32), 0 } } } }  },
 /* Rd: Destination general register */
   { "Rd", CRIS_OPERAND_RD, HW_H_GR, 15, 4,
-    { 0, { &cris_cgen_ifld_table[CRIS_F_OPERAND2] } }, 
+    { 0, { &cris_cgen_ifld_table[CRIS_F_OPERAND2] } },
     { 0, { { { (1<<MACH_BASE), 0 } } } }  },
 /* sconst8: Signed byte [PC+] */
   { "sconst8", CRIS_OPERAND_SCONST8, HW_H_SINT, 15, 16,
-    { 0, { &cris_cgen_ifld_table[CRIS_F_INDIR_PC__BYTE] } }, 
+    { 0, { &cris_cgen_ifld_table[CRIS_F_INDIR_PC__BYTE] } },
     { 0|A(SIGN_OPT), { { { (1<<MACH_BASE), 0 } } } }  },
 /* uconst8: Unsigned byte [PC+] */
   { "uconst8", CRIS_OPERAND_UCONST8, HW_H_UINT, 15, 16,
-    { 0, { &cris_cgen_ifld_table[CRIS_F_INDIR_PC__BYTE] } }, 
+    { 0, { &cris_cgen_ifld_table[CRIS_F_INDIR_PC__BYTE] } },
     { 0|A(SIGN_OPT), { { { (1<<MACH_BASE), 0 } } } }  },
 /* sconst16: Signed word [PC+] */
   { "sconst16", CRIS_OPERAND_SCONST16, HW_H_SINT, 15, 16,
-    { 0, { &cris_cgen_ifld_table[CRIS_F_INDIR_PC__WORD] } }, 
+    { 0, { &cris_cgen_ifld_table[CRIS_F_INDIR_PC__WORD] } },
     { 0|A(SIGN_OPT), { { { (1<<MACH_BASE), 0 } } } }  },
 /* uconst16: Unsigned word [PC+] */
   { "uconst16", CRIS_OPERAND_UCONST16, HW_H_UINT, 15, 16,
-    { 0, { &cris_cgen_ifld_table[CRIS_F_INDIR_PC__WORD] } }, 
+    { 0, { &cris_cgen_ifld_table[CRIS_F_INDIR_PC__WORD] } },
     { 0|A(SIGN_OPT), { { { (1<<MACH_BASE), 0 } } } }  },
 /* const32: Dword [PC+] */
   { "const32", CRIS_OPERAND_CONST32, HW_H_UINT, 31, 32,
-    { 0, { &cris_cgen_ifld_table[CRIS_F_INDIR_PC__DWORD] } }, 
+    { 0, { &cris_cgen_ifld_table[CRIS_F_INDIR_PC__DWORD] } },
     { 0|A(SIGN_OPT), { { { (1<<MACH_BASE), 0 } } } }  },
 /* const32-pcrel: Dword [PC+] */
   { "const32-pcrel", CRIS_OPERAND_CONST32_PCREL, HW_H_ADDR, 31, 32,
-    { 0, { &cris_cgen_ifld_table[CRIS_F_INDIR_PC__DWORD_PCREL] } }, 
+    { 0, { &cris_cgen_ifld_table[CRIS_F_INDIR_PC__DWORD_PCREL] } },
     { 0|A(PCREL_ADDR)|A(SIGN_OPT), { { { (1<<MACH_CRISV32), 0 } } } }  },
 /* Pd: Destination special register */
   { "Pd", CRIS_OPERAND_PD, HW_H_SR, 15, 4,
-    { 0, { &cris_cgen_ifld_table[CRIS_F_OPERAND2] } }, 
+    { 0, { &cris_cgen_ifld_table[CRIS_F_OPERAND2] } },
     { 0, { { { (1<<MACH_BASE), 0 } } } }  },
 /* o: Signed 8-bit */
   { "o", CRIS_OPERAND_O, HW_H_SINT, 7, 8,
-    { 0, { &cris_cgen_ifld_table[CRIS_F_S8] } }, 
+    { 0, { &cris_cgen_ifld_table[CRIS_F_S8] } },
     { 0, { { { (1<<MACH_BASE), 0 } } } }  },
 /* o-pcrel: 9-bit signed immediate PC-rel */
   { "o-pcrel", CRIS_OPERAND_O_PCREL, HW_H_IADDR, 0, 8,
-    { 2, { &CRIS_F_DISP9_MULTI_IFIELD[0] } }, 
+    { 2, { &CRIS_F_DISP9_MULTI_IFIELD[0] } },
     { 0|A(PCREL_ADDR)|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } } } }  },
 /* o-word-pcrel: 16-bit signed immediate PC-rel */
   { "o-word-pcrel", CRIS_OPERAND_O_WORD_PCREL, HW_H_IADDR, 15, 16,
-    { 0, { &cris_cgen_ifld_table[CRIS_F_INDIR_PC__WORD_PCREL] } }, 
+    { 0, { &cris_cgen_ifld_table[CRIS_F_INDIR_PC__WORD_PCREL] } },
     { 0|A(SIGN_OPT)|A(PCREL_ADDR), { { { (1<<MACH_BASE), 0 } } } }  },
 /* cc: Condition codes */
   { "cc", CRIS_OPERAND_CC, HW_H_CCODE, 15, 4,
-    { 0, { &cris_cgen_ifld_table[CRIS_F_OPERAND2] } }, 
+    { 0, { &cris_cgen_ifld_table[CRIS_F_OPERAND2] } },
     { 0, { { { (1<<MACH_BASE), 0 } } } }  },
 /* n: Quick unsigned 4-bit */
   { "n", CRIS_OPERAND_N, HW_H_UINT, 3, 4,
-    { 0, { &cris_cgen_ifld_table[CRIS_F_U4] } }, 
+    { 0, { &cris_cgen_ifld_table[CRIS_F_U4] } },
     { 0, { { { (1<<MACH_BASE), 0 } } } }  },
 /* swapoption: Swap option */
   { "swapoption", CRIS_OPERAND_SWAPOPTION, HW_H_SWAP, 15, 4,
-    { 0, { &cris_cgen_ifld_table[CRIS_F_OPERAND2] } }, 
+    { 0, { &cris_cgen_ifld_table[CRIS_F_OPERAND2] } },
     { 0, { { { (1<<MACH_BASE), 0 } } } }  },
 /* list-of-flags: Flag bits as operand */
   { "list-of-flags", CRIS_OPERAND_LIST_OF_FLAGS, HW_H_FLAGBITS, 3, 8,
-    { 2, { &CRIS_F_DSTSRC_MULTI_IFIELD[0] } }, 
+    { 2, { &CRIS_F_DSTSRC_MULTI_IFIELD[0] } },
     { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } } } }  },
 /* sentinel */
   { 0, 0, 0, 0, 0,
@@ -2742,7 +2742,7 @@ cris_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...)
 
   /* Default to not allowing signed overflow.  */
   cd->signed_overflow_ok_p = 0;
-  
+
   return (CGEN_CPU_DESC) cd;
 }
 
@@ -2782,7 +2782,7 @@ cris_cgen_cpu_close (CGEN_CPU_DESC cd)
       for (i = 0; i < cd->insn_table.num_init_entries; ++i, ++insns)
 	if (CGEN_INSN_RX (insns))
 	  regfree (CGEN_INSN_RX (insns));
-    }  
+    }
 
   free ((CGEN_INSN *) cd->macro_insn_table.init_entries);
   free ((CGEN_INSN *) cd->insn_table.init_entries);
diff --git a/opcodes/i386-dis-evex-prefix.h b/opcodes/i386-dis-evex-prefix.h
index 0fb6bd4..574a640 100644
--- a/opcodes/i386-dis-evex-prefix.h
+++ b/opcodes/i386-dis-evex-prefix.h
@@ -231,8 +231,8 @@
   },
   /* PREFIX_EVEX_0F3852 */
   {
-    { Bad_Opcode },
-    { "vdpbf16p%XS", { XM, Vex, EXx }, 0 },
+    { "vdpphp%XS",	{ XM, Vex, EXx }, 0 },
+    { "vdpbf16p%XS",	{ XM, Vex, EXx }, 0 },
     { VEX_W_TABLE (VEX_W_0F3852) },
     { "vp4dpws%XSd",	{ XM, Vex, Mxmm }, 0 },
   },
@@ -309,6 +309,12 @@
     { Bad_Opcode },
     { "vgetmants%XW",	{ XMScalar, VexScalar, EXdq, EXxEVexS, Ib }, 0 },
   },
+  /* PREFIX_EVEX_0F3A42_W_0 */
+  {
+    { Bad_Opcode },
+    { "%XEvmpsadbw",	{ XM, Vex, EXx, Ib }, 0 },
+    { "vdbpsadbw",	{ XM, Vex, EXx, Ib }, 0 },
+  },
   /* PREFIX_EVEX_0F3A56 */
   {
     { "vreducep%XH",      { XM, EXxh, EXxEVexS, Ib }, 0 },
diff --git a/opcodes/i386-dis-evex-w.h b/opcodes/i386-dis-evex-w.h
index 24c0c23..27053b4 100644
--- a/opcodes/i386-dis-evex-w.h
+++ b/opcodes/i386-dis-evex-w.h
@@ -425,7 +425,7 @@
   },
   /* EVEX_W_0F3A42 */
   {
-    { "vdbpsadbw",	{ XM, Vex, EXx, Ib }, 0 },
+    { PREFIX_TABLE (PREFIX_EVEX_0F3A42_W_0) },
   },
   /* EVEX_W_0F3A43_L_n */
   {
diff --git a/opcodes/i386-dis-evex.h b/opcodes/i386-dis-evex.h
index 434133e..b5ca4a0 100644
--- a/opcodes/i386-dis-evex.h
+++ b/opcodes/i386-dis-evex.h
@@ -529,8 +529,8 @@ static const struct dis386 evex_table[][256] = {
     /* D0 */
     { Bad_Opcode },
     { Bad_Opcode },
-    { Bad_Opcode },
-    { Bad_Opcode },
+    { VEX_W_TABLE (VEX_W_0F38D2) },
+    { VEX_W_TABLE (VEX_W_0F38D3) },
     { Bad_Opcode },
     { Bad_Opcode },
     { Bad_Opcode },
@@ -938,10 +938,10 @@ static const struct dis386 evex_table[][256] = {
     { Bad_Opcode },
     { Bad_Opcode },
     /* 38 */
-    { "%NEccmp%SCB%DF",		{ Eb, Gb }, 0 },
-    { "%NEccmp%SCS%DF",		{ Ev, Gv }, PREFIX_NP_OR_DATA },
-    { "%NEccmp%SCB%SW%DF",	{ Gb, Eb }, 0 },
-    { "%NEccmp%SCS%SW%DF",	{ Gv, Ev }, PREFIX_NP_OR_DATA },
+    { "%NEccmp%SCB%DF",	{ Eb, Gb }, 0 },
+    { "%NEccmp%SCS%DF",	{ Ev, Gv }, PREFIX_NP_OR_DATA },
+    { "%NEccmp%SCB%DF",	{ Gb, EbS }, 0 },
+    { "%NEccmp%SCS%DF",	{ Gv, EvS }, PREFIX_NP_OR_DATA },
     { Bad_Opcode },
     { Bad_Opcode },
     { Bad_Opcode },
diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
index 59ec771..3a4af4d 100644
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -229,6 +229,7 @@ struct instr_info
     bool b;
     bool no_broadcast;
     bool nf;
+    bool u;
   }
   vex;
 
@@ -1198,6 +1199,7 @@ enum
   PREFIX_EVEX_0F3A0A,
   PREFIX_EVEX_0F3A26,
   PREFIX_EVEX_0F3A27,
+  PREFIX_EVEX_0F3A42_W_0,
   PREFIX_EVEX_0F3A56,
   PREFIX_EVEX_0F3A57,
   PREFIX_EVEX_0F3A66,
@@ -1809,8 +1811,6 @@ struct dis386 {
 	   in MAP4.
    "ZU" => print 'zu' if EVEX.ZU=1.
    "SC" => print suffix SCC for SCC insns
-   "SW" => print '.s' to indicate operands were swapped when suffix_always is
-	   true.
    "YK" keep unused, to avoid ambiguity with the combined use of Y and K.
    "YX" keep unused, to avoid ambiguity with the combined use of Y and X.
    "LQ" => print 'l' ('d' in Intel mode) or 'q' for memory operand, cond
@@ -3988,18 +3988,18 @@ static const struct dis386 prefix_table[][4] = {
 
   /* PREFIX_VEX_0F3850_W_0 */
   {
-    { "vpdpbuud",	{ XM, Vex, EXx }, 0 },
-    { "vpdpbsud",	{ XM, Vex, EXx }, 0 },
+    { "%XEvpdpbuud",	{ XM, Vex, EXx }, 0 },
+    { "%XEvpdpbsud",	{ XM, Vex, EXx }, 0 },
     { "%XVvpdpbusd",	{ XM, Vex, EXx }, 0 },
-    { "vpdpbssd",	{ XM, Vex, EXx }, 0 },
+    { "%XEvpdpbssd",	{ XM, Vex, EXx }, 0 },
   },
 
   /* PREFIX_VEX_0F3851_W_0 */
   {
-    { "vpdpbuuds",	{ XM, Vex, EXx }, 0 },
-    { "vpdpbsuds",	{ XM, Vex, EXx }, 0 },
+    { "%XEvpdpbuuds",	{ XM, Vex, EXx }, 0 },
+    { "%XEvpdpbsuds",	{ XM, Vex, EXx }, 0 },
     { "%XVvpdpbusds",	{ XM, Vex, EXx }, 0 },
-    { "vpdpbssds",	{ XM, Vex, EXx }, 0 },
+    { "%XEvpdpbssds",	{ XM, Vex, EXx }, 0 },
   },
   /* PREFIX_VEX_0F385C_X86_64_L_0_W_0 */
   {
@@ -4047,16 +4047,16 @@ static const struct dis386 prefix_table[][4] = {
 
   /* PREFIX_VEX_0F38D2_W_0 */
   {
-    { "vpdpwuud",	{ XM, Vex, EXx }, 0 },
-    { "vpdpwsud",	{ XM, Vex, EXx }, 0 },
-    { "vpdpwusd",	{ XM, Vex, EXx }, 0 },
+    { "%XEvpdpwuud",	{ XM, Vex, EXx }, 0 },
+    { "%XEvpdpwsud",	{ XM, Vex, EXx }, 0 },
+    { "%XEvpdpwusd",	{ XM, Vex, EXx }, 0 },
   },
 
   /* PREFIX_VEX_0F38D3_W_0 */
   {
-    { "vpdpwuuds",	{ XM, Vex, EXx }, 0 },
-    { "vpdpwsuds",	{ XM, Vex, EXx }, 0 },
-    { "vpdpwusds",	{ XM, Vex, EXx }, 0 },
+    { "%XEvpdpwuuds",	{ XM, Vex, EXx }, 0 },
+    { "%XEvpdpwsuds",	{ XM, Vex, EXx }, 0 },
+    { "%XEvpdpwusds",	{ XM, Vex, EXx }, 0 },
   },
 
   /* PREFIX_VEX_0F38CB */
@@ -9031,6 +9031,8 @@ get_valid_dis386 (const struct dis386 *dp, instr_info *ins)
       if (!(*ins->codep & 0x4))
 	ins->rex2 |= REX_X;
 
+      ins->vex.u = *ins->codep & 0x4;
+
       switch ((*ins->codep & 0x3))
 	{
 	case 0:
@@ -9064,9 +9066,9 @@ get_valid_dis386 (const struct dis386 *dp, instr_info *ins)
       if (ins->address_mode != mode_64bit)
 	{
 	  /* Report bad for !evex_default and when two fixed values of evex
-	     change..  */
-	  if (ins->evex_type != evex_default
-	      || (ins->rex2 & (REX_B | REX_X)))
+	     change.  */
+	  if (ins->evex_type != evex_default || (ins->rex2 & REX_B)
+	      || ((ins->rex2 & REX_X) && (ins->modrm.mod != 3)))
 	    return &bad_opcode;
 	  /* In 16/32-bit mode silently ignore following bits.  */
 	  ins->rex &= ~REX_B;
@@ -9088,14 +9090,22 @@ get_valid_dis386 (const struct dis386 *dp, instr_info *ins)
       if (!fetch_modrm (ins))
 	return &err_opcode;
 
-      if (ins->modrm.mod == 3 && (ins->rex2 & REX_X))
+      /* When modrm.mod != 3, the U bit is used by APX for bit X4.
+	 When modrm.mod == 3, the U bit is used by AVX10.  The U bit and
+	 the b bit should not be zero at the same time.  */
+      if (ins->modrm.mod == 3 && !ins->vex.u && !ins->vex.b)
 	return &bad_opcode;
 
       /* Set vector length. For EVEX-promoted instructions, evex.ll == 0b00,
 	 which has the same encoding as vex.length == 128 and they can share
 	 the same processing with vex.length in OP_VEX.  */
       if (ins->modrm.mod == 3 && ins->vex.b && ins->evex_type != evex_from_legacy)
-	ins->vex.length = 512;
+	{
+	  if (ins->vex.u)
+	    ins->vex.length = 512;
+	  else
+	    ins->vex.length = 256;
+	}
       else
 	{
 	  switch (ins->vex.ll)
@@ -10251,9 +10261,21 @@ static const char *const scc_suffix[16] = {
 static void
 swap_operand (instr_info *ins)
 {
-  ins->mnemonicendp[0] = '.';
-  ins->mnemonicendp[1] = 's';
-  ins->mnemonicendp[2] = '\0';
+  char *p = ins->mnemonicendp;
+
+  if (p[-1] == '}')
+    {
+      while (*--p != '{')
+	{
+	  if (p <= ins->obuf + 2)
+	    abort ();
+	}
+      if (p[-1] == ' ')
+	--p;
+    }
+  memmove (p + 2, p, ins->mnemonicendp - p + 1);
+  p[0] = '.';
+  p[1] = 's';
   ins->mnemonicendp += 2;
 }
 
@@ -10929,14 +10951,6 @@ putop (instr_info *ins, const char *in_template, int sizeflag)
 		*ins->obufp++ = ins->vex.w ? 'd': 's';
 	      else if (last[0] == 'B')
 		*ins->obufp++ = ins->vex.w ? 'w': 'b';
-	      else if (last[0] == 'S')
-		{
-		  if (ins->modrm.mod == 3 && (sizeflag & SUFFIX_ALWAYS))
-		    {
-		      *ins->obufp++ = '.';
-		      *ins->obufp++ = 's';
-		    }
-		}
 	      else
 		abort ();
 	    }
@@ -12999,14 +13013,15 @@ OP_EX (instr_info *ins, int bytemode, int sizeflag)
   USED_REX (REX_B);
   if (ins->rex & REX_B)
     reg += 8;
-  if (ins->rex2 & REX_B)
-    reg += 16;
   if (ins->vex.evex)
     {
       USED_REX (REX_X);
       if ((ins->rex & REX_X))
 	reg += 16;
+      ins->rex2_used &= ~REX_B;
     }
+  else if (ins->rex2 & REX_B)
+    reg += 16;
 
   if ((sizeflag & SUFFIX_ALWAYS)
       && (bytemode == x_swap_mode
diff --git a/opcodes/i386-gen.c b/opcodes/i386-gen.c
index 7b74055..565aae7 100644
--- a/opcodes/i386-gen.c
+++ b/opcodes/i386-gen.c
@@ -241,6 +241,8 @@ static const dependency isa_dependencies[] =
   { "AVX10_1",
     "AVX512VL|AVX512DQ|AVX512CD|AVX512VBMI|AVX512_VBMI2|AVX512IFMA"
     "|AVX512_VNNI|AVX512_BF16|AVX512_FP16|AVX512_VPOPCNTDQ|AVX512_BITALG" },
+  { "AVX10_2",
+    "AVX10_1" },
   { "SEV_ES",
     "SVME" },
   { "SNP",
@@ -402,6 +404,7 @@ static bitfield cpu_flags[] =
   BITFIELD (LKGS),
   BITFIELD (USER_MSR),
   BITFIELD (APX_F),
+  BITFIELD (AVX10_2),
   BITFIELD (MWAITX),
   BITFIELD (CLZERO),
   BITFIELD (OSPKE),
diff --git a/opcodes/i386-init.h b/opcodes/i386-init.h
index 9c67063..ec71709 100644
--- a/opcodes/i386-init.h
+++ b/opcodes/i386-init.h
@@ -26,7 +26,7 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_286_FLAGS \
   { { 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -36,7 +36,7 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_386_FLAGS \
   { { 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -46,7 +46,7 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_486_FLAGS \
   { { 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -56,7 +56,7 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_586_FLAGS \
   { { 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -65,8 +65,8 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, \
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_686_FLAGS \
   { { 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, \
@@ -75,8 +75,8 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, \
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_CMOV_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -86,7 +86,7 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_FXSR_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -96,7 +96,7 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_CLFLUSH_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -106,7 +106,7 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_NOP_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -116,7 +116,7 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_SYSCALL_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -126,7 +126,7 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_8087_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -136,7 +136,7 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_687_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, \
@@ -145,8 +145,8 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, \
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_FISTTP_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, \
@@ -155,8 +155,8 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, \
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_MMX_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, \
@@ -166,7 +166,7 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_SSE_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, \
@@ -176,7 +176,7 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_SSE2_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, \
@@ -186,7 +186,7 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_SSE3_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
@@ -196,7 +196,7 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_PADLOCK_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, \
@@ -206,7 +206,7 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_SVME_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
@@ -216,7 +216,7 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_VMX_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -226,7 +226,7 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_SMX_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -236,7 +236,7 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_SSSE3_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
@@ -246,7 +246,7 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_SSE4A_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
@@ -256,7 +256,7 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_LZCNT_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -266,7 +266,7 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_POPCNT_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -276,7 +276,7 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_MONITOR_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -286,7 +286,7 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_SSE4_1_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
@@ -296,7 +296,7 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_SSE4_2_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
@@ -306,7 +306,7 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_AVX2_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
@@ -315,8 +315,8 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      1, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_AVX512CD_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
@@ -325,8 +325,8 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
-      0, 1, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      1, 0, 1, 0, 0, 0, 0 } }
 
 #define CPU_AVX512ER_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
@@ -335,8 +335,8 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
-      0, 1, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      1, 0, 1, 0, 0, 0, 0 } }
 
 #define CPU_AVX512PF_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
@@ -345,8 +345,8 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
-      0, 1, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      1, 0, 1, 0, 0, 0, 0 } }
 
 #define CPU_AVX512DQ_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
@@ -355,8 +355,8 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
-      0, 1, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      1, 0, 1, 0, 0, 0, 0 } }
 
 #define CPU_AVX512BW_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
@@ -365,8 +365,8 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
-      0, 1, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      1, 0, 1, 0, 0, 0, 0 } }
 
 #define CPU_IAMCU_FLAGS \
   { { 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -376,7 +376,7 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_XSAVE_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -386,7 +386,7 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_XSAVEOPT_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -396,7 +396,7 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_AES_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, \
@@ -406,7 +406,7 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_PCLMULQDQ_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, \
@@ -416,7 +416,7 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_FMA_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
@@ -425,8 +425,8 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      1, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_FMA4_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
@@ -435,8 +435,8 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      1, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_XOP_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
@@ -445,8 +445,8 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      1, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_LWP_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -456,7 +456,7 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_BMI_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -466,7 +466,7 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_TBM_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -476,7 +476,7 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_MOVBE_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -486,7 +486,7 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_CX16_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -496,7 +496,7 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_LAHF_SAHF_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -506,7 +506,7 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_EPT_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -516,7 +516,7 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_RDTSCP_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -526,7 +526,7 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_FSGSBASE_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -536,7 +536,7 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_RDRND_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -546,7 +546,7 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_F16C_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
@@ -555,8 +555,8 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      1, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_BMI2_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -566,7 +566,7 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_RTM_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -576,7 +576,7 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_INVPCID_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -586,7 +586,7 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_VMFUNC_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -596,7 +596,7 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_MPX_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -606,7 +606,7 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_RDSEED_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -616,7 +616,7 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_ADX_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -626,7 +626,7 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_PRFCHW_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -636,7 +636,7 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_SMAP_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -646,7 +646,7 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_SHA_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, \
@@ -656,7 +656,7 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_SHA512_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
@@ -665,8 +665,8 @@
       0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      1, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_SM3_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
@@ -675,8 +675,8 @@
       0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      1, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_SM4_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
@@ -685,8 +685,8 @@
       0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      1, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_CLFLUSHOPT_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -696,7 +696,7 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_XSAVES_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -706,7 +706,7 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_XSAVEC_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -716,7 +716,7 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_PREFETCHWT1_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -726,7 +726,7 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_SE1_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -736,7 +736,7 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_CLWB_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -746,7 +746,7 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_AVX512IFMA_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
@@ -755,8 +755,8 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
-      0, 1, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      1, 0, 1, 0, 0, 0, 0 } }
 
 #define CPU_AVX512VBMI_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
@@ -765,8 +765,8 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
-      0, 1, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      1, 0, 1, 0, 0, 0, 0 } }
 
 #define CPU_AVX512_4FMAPS_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
@@ -775,8 +775,8 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
-      0, 1, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      1, 0, 1, 0, 0, 0, 0 } }
 
 #define CPU_AVX512_4VNNIW_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
@@ -785,8 +785,8 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
-      0, 1, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      1, 0, 1, 0, 0, 0, 0 } }
 
 #define CPU_AVX512_VPOPCNTDQ_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
@@ -795,8 +795,8 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
-      0, 1, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      1, 0, 1, 0, 0, 0, 0 } }
 
 #define CPU_AVX512_VBMI2_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
@@ -805,8 +805,8 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
-      0, 1, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      1, 0, 1, 0, 0, 0, 0 } }
 
 #define CPU_AVX512_VNNI_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
@@ -815,8 +815,8 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
-      0, 1, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      1, 0, 1, 0, 0, 0, 0 } }
 
 #define CPU_AVX512_BITALG_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
@@ -825,8 +825,8 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
-      0, 1, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      1, 0, 1, 0, 0, 0, 0 } }
 
 #define CPU_AVX512_BF16_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
@@ -835,8 +835,8 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
-      0, 1, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      1, 0, 1, 0, 0, 0, 0 } }
 
 #define CPU_AVX512_VP2INTERSECT_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
@@ -845,8 +845,8 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
-      0, 1, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      1, 0, 1, 0, 0, 0, 0 } }
 
 #define CPU_TDX_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -856,7 +856,7 @@
       0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_AVX_VNNI_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
@@ -865,8 +865,8 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      1, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_AVX512_FP16_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
@@ -875,8 +875,8 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
-      0, 1, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      1, 0, 1, 0, 0, 0, 0 } }
 
 #define CPU_PREFETCHI_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -886,7 +886,7 @@
       0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_AVX_IFMA_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
@@ -895,8 +895,8 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      1, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_AVX_VNNI_INT8_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
@@ -905,8 +905,8 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      1, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_AVX_VNNI_INT16_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
@@ -915,8 +915,8 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      1, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_CMPCCXADD_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -926,7 +926,7 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_WRMSRNS_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -936,7 +936,7 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_MSRLIST_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -946,7 +946,7 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_AVX_NE_CONVERT_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
@@ -955,8 +955,8 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      1, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_RAO_INT_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -966,7 +966,7 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_FRED_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -976,7 +976,7 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_LKGS_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -986,7 +986,7 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_USER_MSR_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -996,27 +996,37 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
+
+#define CPU_AVX10_2_FLAGS \
+  { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
+      0, 0, 1, 0, 0, 1, 0, 1, 1, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 0, \
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 1, 1, 1, \
+      1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, \
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      1, 0, 1, 1, 0, 0, 0 } }
 
 #define CPU_MWAITX_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, \
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_CLZERO_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_OSPKE_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -1024,9 +1034,9 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_RDPID_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -1034,9 +1044,9 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_PTWRITE_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -1044,9 +1054,9 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_IBT_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -1054,9 +1064,9 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_SHSTK_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -1064,9 +1074,9 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_AMX_INT8_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -1074,9 +1084,9 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_AMX_BF16_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -1084,9 +1094,9 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_AMX_FP16_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -1094,9 +1104,9 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_AMX_COMPLEX_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -1104,9 +1114,9 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_AMX_TILE_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -1114,9 +1124,9 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_GFNI_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, \
@@ -1124,9 +1134,9 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_VAES_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
@@ -1134,9 +1144,9 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      1, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_VPCLMULQDQ_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
@@ -1144,9 +1154,9 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      1, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_WBNOINVD_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -1154,9 +1164,9 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_PCONFIG_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -1164,9 +1174,9 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_PBNDKB_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -1174,9 +1184,9 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_WAITPKG_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -1184,9 +1194,9 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, \
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_UINTR_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -1194,9 +1204,9 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, \
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_CLDEMOTE_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -1204,9 +1214,9 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, \
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_MOVDIRI_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -1214,9 +1224,9 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_MOVDIR64B_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -1225,8 +1235,8 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_ENQCMD_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -1235,8 +1245,8 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_SERIALIZE_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -1245,8 +1255,8 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_RDPRU_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -1255,8 +1265,8 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_MCOMMIT_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -1265,8 +1275,8 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_SEV_ES_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
@@ -1275,8 +1285,8 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_TSXLDTRK_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -1285,8 +1295,8 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_KL_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, \
@@ -1295,8 +1305,8 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_WIDEKL_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, \
@@ -1305,8 +1315,8 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_HRESET_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -1315,8 +1325,8 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_INVLPGB_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -1325,8 +1335,8 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_TLBSYNC_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -1335,8 +1345,8 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_SNP_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
@@ -1345,8 +1355,8 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_RMPQUERY_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
@@ -1355,8 +1365,8 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_287_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -1365,8 +1375,8 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_387_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -1375,8 +1385,8 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, \
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_3DNOW_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, \
@@ -1385,8 +1395,8 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, \
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_3DNOWA_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, \
@@ -1395,8 +1405,8 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, \
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_AVX_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
@@ -1405,8 +1415,8 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      1, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_HLE_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -1416,7 +1426,7 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      1, 0, 0, 0, 0, 0 } }
+      0, 1, 0, 0, 0, 0, 0 } }
 
 #define CPU_AVX512F_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
@@ -1425,8 +1435,8 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
-      0, 1, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      1, 0, 1, 0, 0, 0, 0 } }
 
 #define CPU_AVX512VL_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
@@ -1435,8 +1445,8 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
-      0, 1, 1, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      1, 0, 1, 1, 0, 0, 0 } }
 
 #define CPU_APX_F_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -1446,7 +1456,7 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 1, 0, 0 } }
+      0, 0, 0, 0, 1, 0, 0 } }
 
 #define CPU_UNKNOWN_FLAGS \
   { { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
@@ -1456,7 +1466,7 @@
       1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
       1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
       1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
-      1, 1, 1, 1, 0, 0 } }
+      1, 1, 1, 1, 1, 0, 0 } }
 
 #define CPU_GENERIC32_FLAGS \
   { { 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -1466,7 +1476,7 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_GENERIC64_FLAGS \
   { { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 0, 1, 1, 1, 0, 0, 0, \
@@ -1475,8 +1485,8 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, \
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_NONE_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -1486,7 +1496,7 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_PENTIUMPRO_FLAGS \
   { { 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, \
@@ -1495,8 +1505,8 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, \
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_P2_FLAGS \
   { { 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, \
@@ -1505,8 +1515,8 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, \
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_P3_FLAGS \
   { { 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 0, 0, 1, 0, 1, 1, 0, 0, 0, 0, \
@@ -1515,8 +1525,8 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, \
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_P4_FLAGS \
   { { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 1, 0, 1, 1, 1, 0, 0, 0, \
@@ -1525,8 +1535,8 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, \
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_NOCONA_FLAGS \
   { { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, \
@@ -1535,8 +1545,8 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, \
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_CORE_FLAGS \
   { { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, \
@@ -1545,8 +1555,8 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, \
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_CORE2_FLAGS \
   { { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, \
@@ -1555,8 +1565,8 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, \
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_COREI7_FLAGS \
   { { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, \
@@ -1565,8 +1575,8 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, \
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_K6_FLAGS \
   { { 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, \
@@ -1575,8 +1585,8 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, \
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_K6_2_FLAGS \
   { { 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, \
@@ -1585,8 +1595,8 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, \
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_ATHLON_FLAGS \
   { { 1, 1, 1, 1, 1, 1, 0, 0, 0, 1, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, \
@@ -1595,8 +1605,8 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, \
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_K8_FLAGS \
   { { 1, 1, 1, 1, 1, 1, 0, 1, 0, 1, 1, 0, 1, 0, 1, 1, 1, 0, 0, 0, \
@@ -1605,8 +1615,8 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, \
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_AMDFAM10_FLAGS \
   { { 1, 1, 1, 1, 1, 1, 0, 1, 0, 1, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, \
@@ -1615,8 +1625,8 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, \
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_BDVER1_FLAGS \
   { { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, 1, 0, 1, \
@@ -1625,8 +1635,8 @@
       0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, \
+      1, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_BDVER2_FLAGS \
   { { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, 1, 0, 1, \
@@ -1635,8 +1645,8 @@
       0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, \
+      1, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_BDVER3_FLAGS \
   { { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, 1, 0, 1, \
@@ -1645,68 +1655,68 @@
       0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, \
+      1, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_BDVER4_FLAGS \
   { { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, 1, 0, 1, \
       0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, \
       1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, \
       0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, \
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, \
+      1, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_ZNVER1_FLAGS \
   { { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, 1, 0, 1, \
       0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, \
       1, 0, 0, 0, 1, 0, 1, 1, 1, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 1, \
       1, 1, 1, 1, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
+      1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, \
+      1, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_ZNVER2_FLAGS \
   { { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, 1, 0, 1, \
       0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, \
       1, 0, 0, 0, 1, 0, 1, 1, 1, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 1, \
       1, 1, 1, 1, 0, 0, 0, 1, 1, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, \
-      0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
+      1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, \
+      0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, \
+      1, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_ZNVER3_FLAGS \
   { { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, 1, 0, 1, \
       0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, \
       1, 0, 0, 0, 1, 0, 1, 1, 1, 0, 1, 1, 1, 1, 1, 0, 1, 0, 0, 1, \
       1, 1, 1, 1, 0, 0, 0, 1, 1, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, \
-      1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 1, 1, 1, 0, 0, 1, 0, 0, 1, 1, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
+      1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, \
+      0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 1, 1, 1, 0, 0, 1, 0, 0, 1, \
+      1, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_ZNVER4_FLAGS \
   { { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, 1, 0, 1, \
       0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 1, 1, 0, 1, 1, 1, 1, \
       1, 0, 0, 0, 1, 0, 1, 1, 1, 0, 1, 1, 1, 1, 1, 0, 1, 0, 0, 1, \
       1, 1, 1, 1, 0, 0, 0, 1, 1, 1, 0, 0, 1, 1, 1, 0, 0, 1, 1, 1, \
-      1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, \
-      1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 1, 1, 1, 1, 0, 1, 0, 0, 1, 1, \
-      0, 1, 1, 0, 0, 0 } }
+      1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
+      1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, \
+      0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 1, 1, 1, 1, 0, 1, 0, 0, 1, \
+      1, 0, 1, 1, 0, 0, 0 } }
 
 #define CPU_ZNVER5_FLAGS \
   { { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, 1, 0, 1, \
       0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 1, 1, 0, 1, 1, 1, 1, \
       1, 0, 0, 0, 1, 0, 1, 1, 1, 0, 1, 1, 1, 1, 1, 0, 1, 0, 0, 1, \
       1, 1, 1, 1, 0, 0, 0, 1, 1, 1, 0, 0, 1, 1, 1, 0, 0, 1, 1, 1, \
-      1, 1, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, \
-      1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 1, \
-      1, 0, 0, 1, 1, 1, 0, 0, 0, 0, 1, 1, 1, 1, 0, 1, 0, 0, 1, 1, \
-      0, 1, 1, 0, 0, 0 } }
+      1, 1, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
+      1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, \
+      1, 1, 0, 0, 1, 1, 1, 0, 0, 0, 0, 1, 1, 1, 1, 0, 1, 0, 0, 1, \
+      1, 0, 1, 1, 0, 0, 0 } }
 
 #define CPU_BTVER1_FLAGS \
   { { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, 1, 0, 1, \
@@ -1715,8 +1725,8 @@
       0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, \
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_BTVER2_FLAGS \
   { { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, 1, 0, 1, \
@@ -1725,8 +1735,8 @@
       0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, \
+      1, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_ABM_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -1736,7 +1746,7 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_AVX10_1_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
@@ -1745,8 +1755,8 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 1, 1, 1, \
       1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
-      0, 1, 1, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      1, 0, 1, 1, 0, 0, 0 } }
 
 #define CPU_TSX_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -1756,7 +1766,7 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      1, 0, 0, 0, 0, 0 } }
+      0, 1, 0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_FXSR_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
@@ -1764,9 +1774,9 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_8087_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, \
@@ -1775,8 +1785,8 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, \
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_687_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, \
@@ -1786,7 +1796,7 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_FISTTP_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, \
@@ -1796,7 +1806,7 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_MMX_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, \
@@ -1805,8 +1815,8 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, \
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_SSE_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
@@ -1814,9 +1824,9 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_SSE2_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, \
@@ -1824,9 +1834,9 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_SSE3_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, \
@@ -1836,7 +1846,7 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_SVME_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
@@ -1845,8 +1855,8 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_VMX_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -1856,7 +1866,7 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_SSSE3_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -1866,7 +1876,7 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_SSE4A_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -1876,7 +1886,7 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_SSE4_1_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -1886,7 +1896,7 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_SSE4_2_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -1896,27 +1906,27 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_AVX2_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, \
-      1, 1, 1, 0, 1, 1, 0, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, \
+      1, 1, 1, 0, 1, 1, 0, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, \
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 1, 1, 0, 0, 0 } }
+      0, 0, 1, 1, 0, 0, 0 } }
 
 #define CPU_ANY_AVX512CD_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_AVX512ER_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -1926,7 +1936,7 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_AVX512PF_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -1936,27 +1946,27 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_AVX512DQ_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_AVX512BW_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, \
-      1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_IAMCU_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -1966,17 +1976,17 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_XSAVE_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 1, 1, 0, 0, \
       1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, \
       0, 0, 0, 0, 1, 1, 1, 0, 1, 1, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, \
-      1, 1, 1, 0, 1, 1, 0, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, \
-      1, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
-      0, 1, 1, 1, 0, 0 } }
+      1, 1, 1, 0, 1, 1, 0, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, \
+      0, 1, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 1, 1, 0, 0, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      1, 0, 1, 1, 1, 0, 0 } }
 
 #define CPU_ANY_XSAVEOPT_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -1986,7 +1996,7 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_AES_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -1994,9 +2004,9 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_PCLMULQDQ_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2004,9 +2014,9 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_FMA_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2016,7 +2026,7 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_FMA4_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2026,7 +2036,7 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_XOP_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2036,7 +2046,7 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_LWP_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2046,7 +2056,7 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_EPT_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2056,7 +2066,7 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_F16C_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2066,7 +2076,7 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_RTM_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2075,8 +2085,8 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_VMFUNC_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2086,7 +2096,7 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_MPX_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2096,7 +2106,7 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_SHA_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2106,7 +2116,7 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_SHA512_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2116,7 +2126,7 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_SM3_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2126,7 +2136,7 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_SM4_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2136,7 +2146,7 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_XSAVES_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2146,7 +2156,7 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_XSAVEC_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2156,27 +2166,27 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_AVX512IFMA_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_AVX512VBMI_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_AVX512_4FMAPS_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2186,7 +2196,7 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_AVX512_4VNNIW_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2196,57 +2206,57 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_AVX512_VPOPCNTDQ_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, \
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_AVX512_VBMI2_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, \
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_AVX512_VNNI_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_AVX512_BITALG_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_AVX512_BF16_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_AVX512_VP2INTERSECT_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2256,7 +2266,7 @@
       0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_AVX_VNNI_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2266,17 +2276,17 @@
       0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_AVX512_FP16_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_AVX_IFMA_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2286,7 +2296,7 @@
       0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_AVX_VNNI_INT8_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2296,7 +2306,7 @@
       0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_AVX_VNNI_INT16_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2306,7 +2316,7 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_AVX_NE_CONVERT_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2316,7 +2326,7 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_FRED_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2326,7 +2336,7 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_LKGS_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2336,7 +2346,17 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
+
+#define CPU_ANY_AVX10_2_FLAGS \
+  { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, \
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_OSPKE_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2344,9 +2364,9 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_AMX_INT8_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2354,9 +2374,9 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_AMX_BF16_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2364,9 +2384,9 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_AMX_FP16_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2374,9 +2394,9 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_AMX_COMPLEX_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2384,9 +2404,9 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_AMX_TILE_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2394,9 +2414,9 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_GFNI_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2404,9 +2424,9 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_VAES_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2414,9 +2434,9 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_VPCLMULQDQ_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2424,9 +2444,9 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_SEV_ES_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2435,8 +2455,8 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_TSXLDTRK_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2445,8 +2465,8 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_KL_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2455,8 +2475,8 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_WIDEKL_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2465,8 +2485,8 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_SNP_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2475,8 +2495,8 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_RMPQUERY_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2485,8 +2505,8 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_287_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, \
@@ -2495,8 +2515,8 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, \
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_387_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, \
@@ -2505,8 +2525,8 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, \
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_3DNOW_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2515,8 +2535,8 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, \
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_3DNOWA_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2525,8 +2545,8 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, \
-      0, 0, 0, 0, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, \
+      0, 0, 0, 0, 0, 0, 0 } }
 
 #define CPU_ANY_64_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2534,39 +2554,39 @@
       0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 1, 0, 0, 1, 1, 1, 0, 0, \
-      0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 1, 0, 0 } }
+      0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 1, 0, 1, 0, \
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, \
+      0, 0, 0, 0, 1, 0, 0 } }
 
 #define CPU_ANY_AVX_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, \
       1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, \
-      1, 1, 1, 0, 1, 1, 0, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
-      0, 1, 1, 0, 0, 0 } }
+      1, 1, 1, 0, 1, 1, 0, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, \
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      1, 0, 1, 1, 0, 0, 0 } }
 
 #define CPU_ANY_AVX512F_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, \
-      1, 1, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      1, 1, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 1, 1, 0, 0, 0 } }
+      0, 0, 1, 1, 0, 0, 0 } }
 
 #define CPU_ANY_AVX512VL_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 1, 0, 0, 0 } }
+      0, 0, 0, 1, 0, 0, 0 } }
 
 #define CPU_ANY_APX_F_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -2576,5 +2596,5 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 1, 0, 0 } }
+      0, 0, 0, 0, 1, 0, 0 } }
 
diff --git a/opcodes/i386-mnem.h b/opcodes/i386-mnem.h
index 48f8c94..ec6fa8f 100644
--- a/opcodes/i386-mnem.h
+++ b/opcodes/i386-mnem.h
@@ -1852,638 +1852,639 @@ extern const char i386_mnemonics[];
 #define MN_vunpckhps 0x37e4
 #define MN_movlhps (MN_vmovlhps + 1)
 #define MN_vmovlhps 0x37ee
+#define MN_vdpphps 0x37f7
 #define MN_movhps (MN_vmovhps + 1)
-#define MN_vmovhps 0x37f7
+#define MN_vmovhps 0x37ff
 #define MN_movmskps (MN_vmovmskps + 1)
-#define MN_vmovmskps 0x37ff
+#define MN_vmovmskps 0x3807
 #define MN_movhlps (MN_vmovhlps + 1)
-#define MN_vmovhlps 0x3809
-#define MN_vpermilps 0x3812
+#define MN_vmovhlps 0x3811
+#define MN_vpermilps 0x381a
 #define MN_unpcklps (MN_vunpcklps + 1)
-#define MN_vunpcklps 0x381c
+#define MN_vunpcklps 0x3824
 #define MN_mulps (MN_vmulps + 1)
-#define MN_vmulps 0x3826
+#define MN_vmulps 0x382e
 #define MN_movlps (MN_vmovlps + 1)
-#define MN_vmovlps 0x382d
+#define MN_vmovlps 0x3835
 #define MN_cmps (MN_ccmps + 1)
-#define MN_ccmps 0x3835
-#define MN_vblendmps 0x383b
-#define MN_vfixupimmps 0x3845
-#define MN_vpermps 0x3851
+#define MN_ccmps 0x383d
+#define MN_vblendmps 0x3843
+#define MN_vfixupimmps 0x384d
+#define MN_vpermps 0x3859
 #define MN_andnps (MN_vandnps + 1)
-#define MN_vandnps 0x3859
+#define MN_vandnps 0x3861
 #define MN_minps (MN_vminps + 1)
-#define MN_vminps 0x3861
-#define MN_seamops 0x3868
+#define MN_vminps 0x3869
+#define MN_seamops 0x3870
 #define MN_rcpps (MN_vrcpps + 1)
-#define MN_vrcpps 0x3870
+#define MN_vrcpps 0x3878
 #define MN_dpps (MN_vdpps + 1)
-#define MN_vdpps 0x3877
+#define MN_vdpps 0x387f
 #define MN_cmpps (MN_vcmpps + 1)
-#define MN_vcmpps 0x387d
-#define MN_vgetexpps 0x3884
-#define MN_vgatherpf0qps 0x388e
-#define MN_vscatterpf0qps 0x389c
-#define MN_vgatherpf1qps 0x38ab
-#define MN_vscatterpf1qps 0x38b9
-#define MN_vcmpunord_qps 0x38c8
-#define MN_vcmpord_qps 0x38d6
+#define MN_vcmpps 0x3885
+#define MN_vgetexpps 0x388c
+#define MN_vgatherpf0qps 0x3896
+#define MN_vscatterpf0qps 0x38a4
+#define MN_vgatherpf1qps 0x38b3
+#define MN_vscatterpf1qps 0x38c1
+#define MN_vcmpunord_qps 0x38d0
+#define MN_vcmpord_qps 0x38de
 #define MN_cmpneqps (MN_vcmpneqps + 1)
-#define MN_vcmpneqps 0x38e2
+#define MN_vcmpneqps 0x38ea
 #define MN_cmpeqps (MN_vcmpeqps + 1)
-#define MN_vcmpeqps 0x38ec
-#define MN_vcmpge_oqps 0x38f5
-#define MN_vcmple_oqps 0x3901
-#define MN_vcmpfalse_oqps 0x390d
-#define MN_vcmpneq_oqps 0x391c
-#define MN_vcmpeq_oqps 0x3929
-#define MN_vcmpgt_oqps 0x3935
-#define MN_vcmplt_oqps 0x3941
-#define MN_vgatherqps 0x394d
-#define MN_vscatterqps 0x3958
-#define MN_vcmpnge_uqps 0x3964
-#define MN_vcmpnle_uqps 0x3971
-#define MN_vcmptrue_uqps 0x397e
-#define MN_vcmpneq_uqps 0x398c
-#define MN_vcmpeq_uqps 0x3999
-#define MN_vcmpngt_uqps 0x39a5
-#define MN_vcmpnlt_uqps 0x39b2
+#define MN_vcmpeqps 0x38f4
+#define MN_vcmpge_oqps 0x38fd
+#define MN_vcmple_oqps 0x3909
+#define MN_vcmpfalse_oqps 0x3915
+#define MN_vcmpneq_oqps 0x3924
+#define MN_vcmpeq_oqps 0x3931
+#define MN_vcmpgt_oqps 0x393d
+#define MN_vcmplt_oqps 0x3949
+#define MN_vgatherqps 0x3955
+#define MN_vscatterqps 0x3960
+#define MN_vcmpnge_uqps 0x396c
+#define MN_vcmpnle_uqps 0x3979
+#define MN_vcmptrue_uqps 0x3986
+#define MN_vcmpneq_uqps 0x3994
+#define MN_vcmpeq_uqps 0x39a1
+#define MN_vcmpngt_uqps 0x39ad
+#define MN_vcmpnlt_uqps 0x39ba
 #define MN_orps (MN_vorps + 1)
-#define MN_vorps 0x39bf
+#define MN_vorps 0x39c7
 #define MN_xorps (MN_vxorps + 1)
-#define MN_vxorps 0x39c5
-#define MN_vcmpunord_sps 0x39cc
-#define MN_vcmpord_sps 0x39da
-#define MN_vcmpge_osps 0x39e6
-#define MN_vcmple_osps 0x39f2
-#define MN_vcmpfalse_osps 0x39fe
-#define MN_vcmpneq_osps 0x3a0d
-#define MN_vcmpeq_osps 0x3a1a
-#define MN_vcmpgt_osps 0x3a26
-#define MN_vcmplt_osps 0x3a32
-#define MN_vfpclassps 0x3a3e
-#define MN_vcompressps 0x3a49
-#define MN_vcmpnge_usps 0x3a55
-#define MN_vcmpnle_usps 0x3a62
-#define MN_vcmptrue_usps 0x3a6f
-#define MN_vcmpneq_usps 0x3a7d
-#define MN_vcmpeq_usps 0x3a8a
-#define MN_vcmpngt_usps 0x3a96
-#define MN_vcmpnlt_usps 0x3aa3
+#define MN_vxorps 0x39cd
+#define MN_vcmpunord_sps 0x39d4
+#define MN_vcmpord_sps 0x39e2
+#define MN_vcmpge_osps 0x39ee
+#define MN_vcmple_osps 0x39fa
+#define MN_vcmpfalse_osps 0x3a06
+#define MN_vcmpneq_osps 0x3a15
+#define MN_vcmpeq_osps 0x3a22
+#define MN_vcmpgt_osps 0x3a2e
+#define MN_vcmplt_osps 0x3a3a
+#define MN_vfpclassps 0x3a46
+#define MN_vcompressps 0x3a51
+#define MN_vcmpnge_usps 0x3a5d
+#define MN_vcmpnle_usps 0x3a6a
+#define MN_vcmptrue_usps 0x3a77
+#define MN_vcmpneq_usps 0x3a85
+#define MN_vcmpeq_usps 0x3a92
+#define MN_vcmpngt_usps 0x3a9e
+#define MN_vcmpnlt_usps 0x3aab
 #define MN_extractps (MN_vextractps + 1)
-#define MN_vextractps 0x3ab0
-#define MN_vcmpngtps 0x3abb
-#define MN_vcmpgtps 0x3ac5
+#define MN_vextractps 0x3ab8
+#define MN_vcmpngtps 0x3ac3
+#define MN_vcmpgtps 0x3acd
 #define MN_cmpnltps (MN_vcmpnltps + 1)
-#define MN_vcmpnltps 0x3ace
+#define MN_vcmpnltps 0x3ad6
 #define MN_cmpltps (MN_vcmpltps + 1)
-#define MN_vcmpltps 0x3ad8
-#define MN_vgetmantps 0x3ae1
+#define MN_vcmpltps 0x3ae0
+#define MN_vgetmantps 0x3ae9
 #define MN_movntps (MN_vmovntps + 1)
-#define MN_vmovntps 0x3aec
+#define MN_vmovntps 0x3af4
 #define MN_insertps (MN_vinsertps + 1)
-#define MN_vinsertps 0x3af5
+#define MN_vinsertps 0x3afd
 #define MN_sqrtps (MN_rsqrtps + 1)
 #define MN_rsqrtps (MN_vrsqrtps + 1)
-#define MN_vrsqrtps 0x3aff
-#define MN_vsqrtps 0x3b08
-#define MN_vtestps 0x3b10
+#define MN_vrsqrtps 0x3b07
+#define MN_vsqrtps 0x3b10
+#define MN_vtestps 0x3b18
 #define MN_movups (MN_vmovups + 1)
-#define MN_vmovups 0x3b18
+#define MN_vmovups 0x3b20
 #define MN_blendvps (MN_vblendvps + 1)
-#define MN_vblendvps 0x3b20
+#define MN_vblendvps 0x3b28
 #define MN_divps (MN_vdivps + 1)
-#define MN_vdivps 0x3b2a
-#define MN_vmaskmovps 0x3b31
+#define MN_vdivps 0x3b32
+#define MN_vmaskmovps 0x3b39
 #define MN_maxps (MN_vmaxps + 1)
-#define MN_vmaxps 0x3b3c
-#define MN_vfrczps 0x3b43
-#define MN_xrstors 0x3b4b
+#define MN_vmaxps 0x3b44
+#define MN_vfrczps 0x3b4b
+#define MN_xrstors 0x3b53
 #define MN_ss (MN_vfmsub231ss + 9)
-#define MN_vfmsub231ss 0x3b53
-#define MN_vfnmsub231ss 0x3b5f
-#define MN_vfmadd231ss 0x3b6c
-#define MN_vfnmadd231ss 0x3b78
-#define MN_vfmsub132ss 0x3b85
-#define MN_vfnmsub132ss 0x3b91
-#define MN_vfmadd132ss 0x3b9e
-#define MN_vfnmadd132ss 0x3baa
+#define MN_vfmsub231ss 0x3b5b
+#define MN_vfnmsub231ss 0x3b67
+#define MN_vfmadd231ss 0x3b74
+#define MN_vfnmadd231ss 0x3b80
+#define MN_vfmsub132ss 0x3b8d
+#define MN_vfnmsub132ss 0x3b99
+#define MN_vfmadd132ss 0x3ba6
+#define MN_vfnmadd132ss 0x3bb2
 #define MN_cvtsd2ss (MN_vcvtsd2ss + 1)
-#define MN_vcvtsd2ss 0x3bb7
-#define MN_vcvtsh2ss 0x3bc1
+#define MN_vcvtsd2ss 0x3bbf
+#define MN_vcvtsh2ss 0x3bc9
 #define MN_cvtsi2ss (MN_vcvtsi2ss + 1)
-#define MN_vcvtsi2ss 0x3bcb
-#define MN_vcvtusi2ss 0x3bd5
-#define MN_vfmsub213ss 0x3be0
-#define MN_vfnmsub213ss 0x3bec
-#define MN_vfmadd213ss 0x3bf9
-#define MN_vfnmadd213ss 0x3c05
-#define MN_vrcp14ss 0x3c12
-#define MN_vrsqrt14ss 0x3c1b
-#define MN_vrcp28ss 0x3c26
-#define MN_vrsqrt28ss 0x3c2f
+#define MN_vcvtsi2ss 0x3bd3
+#define MN_vcvtusi2ss 0x3bdd
+#define MN_vfmsub213ss 0x3be8
+#define MN_vfnmsub213ss 0x3bf4
+#define MN_vfmadd213ss 0x3c01
+#define MN_vfnmadd213ss 0x3c0d
+#define MN_vrcp14ss 0x3c1a
+#define MN_vrsqrt14ss 0x3c23
+#define MN_vrcp28ss 0x3c2e
+#define MN_vrsqrt28ss 0x3c37
 #define MN_subss (MN_vfmsubss + 3)
-#define MN_vfmsubss 0x3c3a
-#define MN_vfnmsubss 0x3c43
-#define MN_vsubss 0x3c4d
+#define MN_vfmsubss 0x3c42
+#define MN_vfnmsubss 0x3c4b
+#define MN_vsubss 0x3c55
 #define MN_addss (MN_v4fmaddss + 4)
-#define MN_v4fmaddss 0x3c54
-#define MN_vfmaddss 0x3c5e
-#define MN_v4fnmaddss 0x3c67
-#define MN_vfnmaddss 0x3c72
-#define MN_vaddss 0x3c7c
+#define MN_v4fmaddss 0x3c5c
+#define MN_vfmaddss 0x3c66
+#define MN_v4fnmaddss 0x3c6f
+#define MN_vfnmaddss 0x3c7a
+#define MN_vaddss 0x3c84
 #define MN_roundss (MN_vroundss + 1)
-#define MN_vroundss 0x3c83
+#define MN_vroundss 0x3c8b
 #define MN_cmpunordss (MN_vcmpunordss + 1)
-#define MN_vcmpunordss 0x3c8c
+#define MN_vcmpunordss 0x3c94
 #define MN_cmpordss (MN_vcmpordss + 1)
-#define MN_vcmpordss 0x3c98
-#define MN_vreducess 0x3ca2
-#define MN_vrangess 0x3cac
-#define MN_vcmpngess 0x3cb5
-#define MN_vcmpgess 0x3cbf
-#define MN_vrndscaless 0x3cc8
+#define MN_vcmpordss 0x3ca0
+#define MN_vreducess 0x3caa
+#define MN_vrangess 0x3cb4
+#define MN_vcmpngess 0x3cbd
+#define MN_vcmpgess 0x3cc7
+#define MN_vrndscaless 0x3cd0
 #define MN_cmpnless (MN_vcmpnless + 1)
-#define MN_vcmpnless 0x3cd4
+#define MN_vcmpnless 0x3cdc
 #define MN_cmpless (MN_vcmpless + 1)
-#define MN_vcmpless 0x3cde
-#define MN_vcmpfalsess 0x3ce7
-#define MN_vcmptruess 0x3cf3
-#define MN_vscalefss 0x3cfe
+#define MN_vcmpless 0x3ce6
+#define MN_vcmpfalsess 0x3cef
+#define MN_vcmptruess 0x3cfb
+#define MN_vscalefss 0x3d06
 #define MN_comiss (MN_ucomiss + 1)
 #define MN_ucomiss (MN_vucomiss + 1)
-#define MN_vucomiss 0x3d08
-#define MN_vcomiss 0x3d11
+#define MN_vucomiss 0x3d10
+#define MN_vcomiss 0x3d19
 #define MN_lss (MN_mulss + 2)
 #define MN_mulss (MN_vmulss + 1)
-#define MN_vmulss 0x3d19
-#define MN_vfixupimmss 0x3d20
+#define MN_vmulss 0x3d21
+#define MN_vfixupimmss 0x3d28
 #define MN_minss (MN_vminss + 1)
-#define MN_vminss 0x3d2c
+#define MN_vminss 0x3d34
 #define MN_rcpss (MN_vrcpss + 1)
-#define MN_vrcpss 0x3d33
+#define MN_vrcpss 0x3d3b
 #define MN_cmpss (MN_vcmpss + 1)
-#define MN_vcmpss 0x3d3a
-#define MN_vgetexpss 0x3d41
-#define MN_vcmpunord_qss 0x3d4b
-#define MN_vcmpord_qss 0x3d59
+#define MN_vcmpss 0x3d42
+#define MN_vgetexpss 0x3d49
+#define MN_vcmpunord_qss 0x3d53
+#define MN_vcmpord_qss 0x3d61
 #define MN_cmpneqss (MN_vcmpneqss + 1)
-#define MN_vcmpneqss 0x3d65
+#define MN_vcmpneqss 0x3d6d
 #define MN_cmpeqss (MN_vcmpeqss + 1)
-#define MN_vcmpeqss 0x3d6f
-#define MN_vcmpge_oqss 0x3d78
-#define MN_vcmple_oqss 0x3d84
-#define MN_vcmpfalse_oqss 0x3d90
-#define MN_vcmpneq_oqss 0x3d9f
-#define MN_vcmpeq_oqss 0x3dac
-#define MN_vcmpgt_oqss 0x3db8
-#define MN_vcmplt_oqss 0x3dc4
-#define MN_vcmpnge_uqss 0x3dd0
-#define MN_vcmpnle_uqss 0x3ddd
-#define MN_vcmptrue_uqss 0x3dea
-#define MN_vcmpneq_uqss 0x3df8
-#define MN_vcmpeq_uqss 0x3e05
-#define MN_vcmpngt_uqss 0x3e11
-#define MN_vcmpnlt_uqss 0x3e1e
-#define MN_vcmpunord_sss 0x3e2b
-#define MN_vcmpord_sss 0x3e39
-#define MN_vcmpge_osss 0x3e45
-#define MN_vcmple_osss 0x3e51
-#define MN_vcmpfalse_osss 0x3e5d
-#define MN_vcmpneq_osss 0x3e6c
-#define MN_vcmpeq_osss 0x3e79
-#define MN_vcmpgt_osss 0x3e85
-#define MN_vcmplt_osss 0x3e91
-#define MN_vfpclassss 0x3e9d
-#define MN_vcmpnge_usss 0x3ea8
-#define MN_vcmpnle_usss 0x3eb5
-#define MN_vcmptrue_usss 0x3ec2
-#define MN_vcmpneq_usss 0x3ed0
-#define MN_vcmpeq_usss 0x3edd
-#define MN_vcmpngt_usss 0x3ee9
-#define MN_vcmpnlt_usss 0x3ef6
-#define MN_vcmpngtss 0x3f03
-#define MN_vcmpgtss 0x3f0d
+#define MN_vcmpeqss 0x3d77
+#define MN_vcmpge_oqss 0x3d80
+#define MN_vcmple_oqss 0x3d8c
+#define MN_vcmpfalse_oqss 0x3d98
+#define MN_vcmpneq_oqss 0x3da7
+#define MN_vcmpeq_oqss 0x3db4
+#define MN_vcmpgt_oqss 0x3dc0
+#define MN_vcmplt_oqss 0x3dcc
+#define MN_vcmpnge_uqss 0x3dd8
+#define MN_vcmpnle_uqss 0x3de5
+#define MN_vcmptrue_uqss 0x3df2
+#define MN_vcmpneq_uqss 0x3e00
+#define MN_vcmpeq_uqss 0x3e0d
+#define MN_vcmpngt_uqss 0x3e19
+#define MN_vcmpnlt_uqss 0x3e26
+#define MN_vcmpunord_sss 0x3e33
+#define MN_vcmpord_sss 0x3e41
+#define MN_vcmpge_osss 0x3e4d
+#define MN_vcmple_osss 0x3e59
+#define MN_vcmpfalse_osss 0x3e65
+#define MN_vcmpneq_osss 0x3e74
+#define MN_vcmpeq_osss 0x3e81
+#define MN_vcmpgt_osss 0x3e8d
+#define MN_vcmplt_osss 0x3e99
+#define MN_vfpclassss 0x3ea5
+#define MN_vcmpnge_usss 0x3eb0
+#define MN_vcmpnle_usss 0x3ebd
+#define MN_vcmptrue_usss 0x3eca
+#define MN_vcmpneq_usss 0x3ed8
+#define MN_vcmpeq_usss 0x3ee5
+#define MN_vcmpngt_usss 0x3ef1
+#define MN_vcmpnlt_usss 0x3efe
+#define MN_vcmpngtss 0x3f0b
+#define MN_vcmpgtss 0x3f15
 #define MN_cmpnltss (MN_vcmpnltss + 1)
-#define MN_vcmpnltss 0x3f16
+#define MN_vcmpnltss 0x3f1e
 #define MN_cmpltss (MN_vcmpltss + 1)
-#define MN_vcmpltss 0x3f20
-#define MN_vgetmantss 0x3f29
-#define MN_movntss 0x3f34
+#define MN_vcmpltss 0x3f28
+#define MN_vgetmantss 0x3f31
+#define MN_movntss 0x3f3c
 #define MN_sqrtss (MN_rsqrtss + 1)
 #define MN_rsqrtss (MN_vrsqrtss + 1)
-#define MN_vrsqrtss 0x3f3c
-#define MN_vsqrtss 0x3f45
-#define MN_vbroadcastss 0x3f4d
+#define MN_vrsqrtss 0x3f44
+#define MN_vsqrtss 0x3f4d
+#define MN_vbroadcastss 0x3f55
 #define MN_divss (MN_vdivss + 1)
-#define MN_vdivss 0x3f5a
+#define MN_vdivss 0x3f62
 #define MN_movss (MN_vmovss + 1)
-#define MN_vmovss 0x3f61
+#define MN_vmovss 0x3f69
 #define MN_maxss (MN_vmaxss + 1)
-#define MN_vmaxss 0x3f68
-#define MN_vfrczss 0x3f6f
-#define MN_bts 0x3f77
-#define MN_erets 0x3f7b
-#define MN_sets 0x3f81
-#define MN_clts 0x3f86
-#define MN_ctests 0x3f8b
-#define MN_outs 0x3f92
-#define MN_setzus 0x3f97
+#define MN_vmaxss 0x3f70
+#define MN_vfrczss 0x3f77
+#define MN_bts 0x3f7f
+#define MN_erets 0x3f83
+#define MN_sets 0x3f89
+#define MN_clts 0x3f8e
+#define MN_ctests 0x3f93
+#define MN_outs 0x3f9a
+#define MN_setzus 0x3f9f
 #define MN_movs (MN_cmovs + 1)
 #define MN_cmovs (MN_cfcmovs + 2)
-#define MN_cfcmovs 0x3f9e
-#define MN_fldl2t 0x3fa6
-#define MN_xlat 0x3fad
-#define MN_bt 0x3fb2
-#define MN_fxtract 0x3fb5
-#define MN_lgdt 0x3fbd
-#define MN_sgdt 0x3fc2
-#define MN_lidt 0x3fc7
-#define MN_sidt 0x3fcc
-#define MN_fldt 0x3fd1
-#define MN_lldt 0x3fd6
-#define MN_sldt 0x3fdb
+#define MN_cfcmovs 0x3fa6
+#define MN_fldl2t 0x3fae
+#define MN_xlat 0x3fb5
+#define MN_bt 0x3fba
+#define MN_fxtract 0x3fbd
+#define MN_lgdt 0x3fc5
+#define MN_sgdt 0x3fca
+#define MN_lidt 0x3fcf
+#define MN_sidt 0x3fd4
+#define MN_fldt 0x3fd9
+#define MN_lldt 0x3fde
+#define MN_sldt 0x3fe3
 #define MN_ret (MN_iret + 1)
 #define MN_iret (MN_uiret + 1)
-#define MN_uiret 0x3fe0
-#define MN_lret 0x3fe6
-#define MN_seamret 0x3feb
-#define MN_sysret 0x3ff3
-#define MN_hreset 0x3ffa
-#define MN_pfcmpgt 0x4001
-#define MN_ht 0x4009
+#define MN_uiret 0x3fe8
+#define MN_lret 0x3fee
+#define MN_seamret 0x3ff3
+#define MN_sysret 0x3ffb
+#define MN_hreset 0x4002
+#define MN_pfcmpgt 0x4009
+#define MN_ht 0x4011
 #define MN_wait (MN_fwait + 1)
-#define MN_fwait 0x400c
+#define MN_fwait 0x4014
 #define MN_mwait (MN_umwait + 1)
-#define MN_umwait 0x4012
-#define MN_mcommit 0x4019
-#define MN_finit 0x4021
-#define MN_skinit 0x4027
-#define MN_fninit 0x402e
-#define MN_vmgexit 0x4035
-#define MN_sysexit 0x403d
-#define MN_hlt 0x4045
-#define MN_popcnt 0x4049
-#define MN_lzcnt 0x4050
-#define MN_tzcnt 0x4056
-#define MN_hnt 0x405c
+#define MN_umwait 0x401a
+#define MN_mcommit 0x4021
+#define MN_finit 0x4029
+#define MN_skinit 0x402f
+#define MN_fninit 0x4036
+#define MN_vmgexit 0x403d
+#define MN_sysexit 0x4045
+#define MN_hlt 0x404d
+#define MN_popcnt 0x4051
+#define MN_lzcnt 0x4058
+#define MN_tzcnt 0x405e
+#define MN_hnt 0x4064
 #define MN_int (MN_frndint + 4)
-#define MN_frndint 0x4060
-#define MN_not 0x4068
-#define MN_invept 0x406c
-#define MN_ccmpt 0x4073
-#define MN_xsaveopt 0x4079
-#define MN_clflushopt 0x4082
-#define MN_fstpt 0x408d
-#define MN_xabort 0x4093
-#define MN_fsqrt 0x409a
-#define MN_pfrsqrt 0x40a0
+#define MN_frndint 0x4068
+#define MN_not 0x4070
+#define MN_invept 0x4074
+#define MN_ccmpt 0x407b
+#define MN_xsaveopt 0x4081
+#define MN_clflushopt 0x408a
+#define MN_fstpt 0x4095
+#define MN_xabort 0x409b
+#define MN_fsqrt 0x40a2
+#define MN_pfrsqrt 0x40a8
 #define MN_aesdeclast (MN_vaesdeclast + 1)
-#define MN_vaesdeclast 0x40a8
+#define MN_vaesdeclast 0x40b0
 #define MN_aesenclast (MN_vaesenclast + 1)
-#define MN_vaesenclast 0x40b4
+#define MN_vaesenclast 0x40bc
 #define MN_test (MN_ptest + 1)
 #define MN_ptest (MN_vptest + 1)
-#define MN_vptest 0x40c0
-#define MN_xtest 0x40c7
-#define MN_fst 0x40cd
-#define MN_fist 0x40d1
-#define MN_rdmsrlist 0x40d6
-#define MN_wrmsrlist 0x40e0
+#define MN_vptest 0x40c8
+#define MN_xtest 0x40cf
+#define MN_fst 0x40d5
+#define MN_fist 0x40d9
+#define MN_rdmsrlist 0x40de
+#define MN_wrmsrlist 0x40e8
 #define MN_aeskeygenassist (MN_vaeskeygenassist + 1)
-#define MN_vaeskeygenassist 0x40ea
-#define MN_vmptrst 0x40fb
-#define MN_ftst 0x4103
-#define MN_rmpadjust 0x4108
-#define MN_ctestt 0x4112
-#define MN_out 0x4119
-#define MN_pext 0x411d
-#define MN_bndcu 0x4122
-#define MN_enclu 0x4128
-#define MN_fcmovnu 0x412e
+#define MN_vaeskeygenassist 0x40f2
+#define MN_vmptrst 0x4103
+#define MN_ftst 0x410b
+#define MN_rmpadjust 0x4110
+#define MN_ctestt 0x411a
+#define MN_out 0x4121
+#define MN_pext 0x4125
+#define MN_bndcu 0x412a
+#define MN_enclu 0x4130
+#define MN_fcmovnu 0x4136
 #define MN_lddqu (MN_vlddqu + 1)
-#define MN_vlddqu 0x4136
+#define MN_vlddqu 0x413e
 #define MN_movdqu (MN_maskmovdqu + 4)
 #define MN_maskmovdqu (MN_vmaskmovdqu + 1)
-#define MN_vmaskmovdqu 0x413d
-#define MN_vmovdqu 0x4149
-#define MN_rdpkru 0x4151
-#define MN_wrpkru 0x4158
-#define MN_rdpru 0x415f
-#define MN_eretu 0x4165
-#define MN_fcmovu 0x416b
-#define MN_imulzu 0x4172
-#define MN_xgetbv 0x4179
-#define MN_xsetbv 0x4180
+#define MN_vmaskmovdqu 0x4145
+#define MN_vmovdqu 0x4151
+#define MN_rdpkru 0x4159
+#define MN_wrpkru 0x4160
+#define MN_rdpru 0x4167
+#define MN_eretu 0x416d
+#define MN_fcmovu 0x4173
+#define MN_imulzu 0x417a
+#define MN_xgetbv 0x4181
+#define MN_xsetbv 0x4188
 #define MN_div (MN_fdiv + 1)
-#define MN_fdiv 0x4187
+#define MN_fdiv 0x418f
 #define MN_idiv (MN_fidiv + 1)
-#define MN_fidiv 0x418c
-#define MN_enclv 0x4192
-#define MN_fldenv 0x4198
-#define MN_fstenv 0x419f
-#define MN_fnstenv 0x41a6
+#define MN_fidiv 0x4194
+#define MN_enclv 0x419a
+#define MN_fldenv 0x41a0
+#define MN_fstenv 0x41a7
+#define MN_fnstenv 0x41ae
 #define MN_mov (MN_vpcmov + 3)
-#define MN_vpcmov 0x41ae
-#define MN_bndmov 0x41b5
-#define MN_smov 0x41bc
-#define MN_rex_w 0x41c1
-#define MN_vcvttph2w 0x41c7
-#define MN_vcvtph2w 0x41d1
-#define MN_vpermi2w 0x41da
-#define MN_vpmovm2w 0x41e3
-#define MN_vpermt2w 0x41ec
-#define MN_vpshaw 0x41f5
+#define MN_vpcmov 0x41b6
+#define MN_bndmov 0x41bd
+#define MN_smov 0x41c4
+#define MN_rex_w 0x41c9
+#define MN_vcvttph2w 0x41cf
+#define MN_vcvtph2w 0x41d9
+#define MN_vpermi2w 0x41e2
+#define MN_vpmovm2w 0x41eb
+#define MN_vpermt2w 0x41f4
+#define MN_vpshaw 0x41fd
 #define MN_psraw (MN_vpsraw + 1)
-#define MN_vpsraw 0x41fc
-#define MN_vphsubbw 0x4203
-#define MN_cbw 0x420c
+#define MN_vpsraw 0x4204
+#define MN_vphsubbw 0x420b
+#define MN_cbw 0x4214
 #define MN_psadbw (MN_vdbpsadbw + 3)
-#define MN_vdbpsadbw 0x4210
+#define MN_vdbpsadbw 0x4218
 #define MN_mpsadbw (MN_vmpsadbw + 1)
-#define MN_vmpsadbw 0x421a
-#define MN_vpsadbw 0x4223
-#define MN_vphaddbw 0x422b
+#define MN_vmpsadbw 0x4222
+#define MN_vpsadbw 0x422b
+#define MN_vphaddbw 0x4233
 #define MN_punpckhbw (MN_vpunpckhbw + 1)
-#define MN_vpunpckhbw 0x4234
-#define MN_kunpckbw 0x423f
+#define MN_vpunpckhbw 0x423c
+#define MN_kunpckbw 0x4247
 #define MN_punpcklbw (MN_vpunpcklbw + 1)
-#define MN_vpunpcklbw 0x4248
-#define MN_vphaddubw 0x4253
+#define MN_vpunpcklbw 0x4250
+#define MN_vphaddubw 0x425b
 #define MN_phsubw (MN_vphsubw + 1)
-#define MN_vphsubw 0x425d
+#define MN_vphsubw 0x4265
 #define MN_psubw (MN_vpsubw + 1)
-#define MN_vpsubw 0x4265
+#define MN_vpsubw 0x426d
 #define MN_pmovsxbw (MN_vpmovsxbw + 1)
-#define MN_vpmovsxbw 0x426c
+#define MN_vpmovsxbw 0x4274
 #define MN_pmovzxbw (MN_vpmovzxbw + 1)
-#define MN_vpmovzxbw 0x4276
-#define MN_fldcw 0x4280
-#define MN_fstcw 0x4286
-#define MN_fnstcw 0x428c
+#define MN_vpmovzxbw 0x427e
+#define MN_fldcw 0x4288
+#define MN_fstcw 0x428e
+#define MN_fnstcw 0x4294
 #define MN_phaddw (MN_vphaddw + 1)
-#define MN_vphaddw 0x4293
-#define MN_kaddw 0x429b
+#define MN_vphaddw 0x429b
+#define MN_kaddw 0x42a3
 #define MN_paddw (MN_vpaddw + 1)
-#define MN_vpaddw 0x42a1
-#define MN_vpshldw 0x42a8
-#define MN_kandw 0x42b0
-#define MN_vpexpandw 0x42b6
+#define MN_vpaddw 0x42a9
+#define MN_vpshldw 0x42b0
+#define MN_kandw 0x42b8
+#define MN_vpexpandw 0x42be
 #define MN_pblendw (MN_vpblendw + 1)
-#define MN_vpblendw 0x42c0
-#define MN_vpshrdw 0x42c9
+#define MN_vpblendw 0x42c8
+#define MN_vpshrdw 0x42d1
 #define MN_packssdw (MN_vpackssdw + 1)
-#define MN_vpackssdw 0x42d1
+#define MN_vpackssdw 0x42d9
 #define MN_packusdw (MN_vpackusdw + 1)
-#define MN_vpackusdw 0x42db
-#define MN_vpmovusdw 0x42e5
-#define MN_vpmovsdw 0x42ef
-#define MN_vpmovdw 0x42f8
-#define MN_vpcomgew 0x4300
-#define MN_vpcomlew 0x4309
-#define MN_vpcmpnlew 0x4312
-#define MN_vpcmplew 0x431c
-#define MN_vpcomfalsew 0x4325
-#define MN_vpcomtruew 0x4331
-#define MN_pi2fw 0x433c
-#define MN_pshufw 0x4342
+#define MN_vpackusdw 0x42e3
+#define MN_vpmovusdw 0x42ed
+#define MN_vpmovsdw 0x42f7
+#define MN_vpmovdw 0x4300
+#define MN_vpcomgew 0x4308
+#define MN_vpcomlew 0x4311
+#define MN_vpcmpnlew 0x431a
+#define MN_vpcmplew 0x4324
+#define MN_vpcomfalsew 0x432d
+#define MN_vpcomtruew 0x4339
+#define MN_pi2fw 0x4344
+#define MN_pshufw 0x434a
 #define MN_pavgw (MN_vpavgw + 1)
-#define MN_vpavgw 0x4349
-#define MN_prefetchw 0x4350
+#define MN_vpavgw 0x4351
+#define MN_prefetchw 0x4358
 #define MN_pshufhw (MN_vpshufhw + 1)
-#define MN_vpshufhw 0x435a
+#define MN_vpshufhw 0x4362
 #define MN_pmulhw (MN_vpmulhw + 1)
-#define MN_vpmulhw 0x4363
-#define MN_pf2iw 0x436b
+#define MN_vpmulhw 0x436b
+#define MN_pf2iw 0x4373
 #define MN_pshuflw (MN_vpshuflw + 1)
-#define MN_vpshuflw 0x4371
-#define MN_vpshlw 0x437a
+#define MN_vpshuflw 0x4379
+#define MN_vpshlw 0x4382
 #define MN_psllw (MN_vpsllw + 1)
-#define MN_vpsllw 0x4381
+#define MN_vpsllw 0x4389
 #define MN_pmullw (MN_vpmullw + 1)
-#define MN_vpmullw 0x4388
+#define MN_vpmullw 0x4390
 #define MN_psrlw (MN_vpsrlw + 1)
-#define MN_vpsrlw 0x4390
-#define MN_kshiftlw 0x4397
-#define MN_vpblendmw 0x43a0
-#define MN_vptestnmw 0x43aa
-#define MN_vpcomw 0x43b4
-#define MN_vpermw 0x43bb
-#define MN_vptestmw 0x43c2
-#define MN_kandnw 0x43cb
+#define MN_vpsrlw 0x4398
+#define MN_kshiftlw 0x439f
+#define MN_vpblendmw 0x43a8
+#define MN_vptestnmw 0x43b2
+#define MN_vpcomw 0x43bc
+#define MN_vpermw 0x43c3
+#define MN_vptestmw 0x43ca
+#define MN_kandnw 0x43d3
 #define MN_psignw (MN_vpsignw + 1)
-#define MN_vpsignw 0x43d2
-#define MN_vpcmpw 0x43da
-#define MN_vpcomeqw 0x43e1
-#define MN_vpcomneqw 0x43ea
-#define MN_vpcmpneqw 0x43f4
+#define MN_vpsignw 0x43da
+#define MN_vpcmpw 0x43e2
+#define MN_vpcomeqw 0x43e9
+#define MN_vpcomneqw 0x43f2
+#define MN_vpcmpneqw 0x43fc
 #define MN_pcmpeqw (MN_vpcmpeqw + 1)
-#define MN_vpcmpeqw 0x43fe
-#define MN_vpmovusqw 0x4407
-#define MN_vpmovsqw 0x4411
-#define MN_vpmovqw 0x441a
-#define MN_verw 0x4422
-#define MN_pmulhrw 0x4427
-#define MN_korw 0x442f
-#define MN_kxnorw 0x4434
-#define MN_kxorw 0x443b
+#define MN_vpcmpeqw 0x4406
+#define MN_vpmovusqw 0x440f
+#define MN_vpmovsqw 0x4419
+#define MN_vpmovqw 0x4422
+#define MN_verw 0x442a
+#define MN_pmulhrw 0x442f
+#define MN_korw 0x4437
+#define MN_kxnorw 0x443c
+#define MN_kxorw 0x4443
 #define MN_pinsrw (MN_vpinsrw + 1)
-#define MN_vpinsrw 0x4441
-#define MN_kshiftrw 0x4449
+#define MN_vpinsrw 0x4449
+#define MN_kshiftrw 0x4451
 #define MN_pextrw (MN_vpextrw + 1)
-#define MN_vpextrw 0x4452
+#define MN_vpextrw 0x445a
 #define MN_pabsw (MN_vpabsw + 1)
-#define MN_vpabsw 0x445a
+#define MN_vpabsw 0x4462
 #define MN_pmaddubsw (MN_vpmaddubsw + 1)
-#define MN_vpmaddubsw 0x4461
+#define MN_vpmaddubsw 0x4469
 #define MN_phsubsw (MN_vphsubsw + 1)
-#define MN_vphsubsw 0x446c
+#define MN_vphsubsw 0x4474
 #define MN_psubsw (MN_vpsubsw + 1)
-#define MN_vpsubsw 0x4475
+#define MN_vpsubsw 0x447d
 #define MN_phaddsw (MN_vphaddsw + 1)
-#define MN_vphaddsw 0x447d
+#define MN_vphaddsw 0x4485
 #define MN_paddsw (MN_vpaddsw + 1)
-#define MN_vpaddsw 0x4486
-#define MN_lmsw 0x448e
-#define MN_smsw 0x4493
+#define MN_vpaddsw 0x448e
+#define MN_lmsw 0x4496
+#define MN_smsw 0x449b
 #define MN_pminsw (MN_vpminsw + 1)
-#define MN_vpminsw 0x4498
+#define MN_vpminsw 0x44a0
 #define MN_pmulhrsw (MN_vpmulhrsw + 1)
-#define MN_vpmulhrsw 0x44a0
-#define MN_vpcompressw 0x44aa
-#define MN_fstsw 0x44b6
-#define MN_fnstsw 0x44bc
+#define MN_vpmulhrsw 0x44a8
+#define MN_vpcompressw 0x44b2
+#define MN_fstsw 0x44be
+#define MN_fnstsw 0x44c4
 #define MN_psubusw (MN_vpsubusw + 1)
-#define MN_vpsubusw 0x44c3
+#define MN_vpsubusw 0x44cb
 #define MN_paddusw (MN_vpaddusw + 1)
-#define MN_vpaddusw 0x44cc
-#define MN_movsw 0x44d5
+#define MN_vpaddusw 0x44d4
+#define MN_movsw 0x44dd
 #define MN_pmaxsw (MN_vpmaxsw + 1)
-#define MN_vpmaxsw 0x44db
-#define MN_cbtw 0x44e3
-#define MN_vpcomgtw 0x44e8
+#define MN_vpmaxsw 0x44e3
+#define MN_cbtw 0x44eb
+#define MN_vpcomgtw 0x44f0
 #define MN_pcmpgtw (MN_vpcmpgtw + 1)
-#define MN_vpcmpgtw 0x44f1
-#define MN_vpcomltw 0x44fa
-#define MN_vpcmpnltw 0x4503
-#define MN_vpcmpltw 0x450d
-#define MN_vpopcntw 0x4516
-#define MN_knotw 0x451f
-#define MN_vprotw 0x4525
-#define MN_vpbroadcastw 0x452c
-#define MN_ktestw 0x4539
-#define MN_kortestw 0x4540
-#define MN_vcvttph2uw 0x4549
-#define MN_vcvtph2uw 0x4554
-#define MN_vpcomgeuw 0x455e
-#define MN_vpcomleuw 0x4568
-#define MN_vpcmpnleuw 0x4572
-#define MN_vpcmpleuw 0x457d
-#define MN_vpcomfalseuw 0x4587
-#define MN_vpcomtrueuw 0x4594
+#define MN_vpcmpgtw 0x44f9
+#define MN_vpcomltw 0x4502
+#define MN_vpcmpnltw 0x450b
+#define MN_vpcmpltw 0x4515
+#define MN_vpopcntw 0x451e
+#define MN_knotw 0x4527
+#define MN_vprotw 0x452d
+#define MN_vpbroadcastw 0x4534
+#define MN_ktestw 0x4541
+#define MN_kortestw 0x4548
+#define MN_vcvttph2uw 0x4551
+#define MN_vcvtph2uw 0x455c
+#define MN_vpcomgeuw 0x4566
+#define MN_vpcomleuw 0x4570
+#define MN_vpcmpnleuw 0x457a
+#define MN_vpcmpleuw 0x4585
+#define MN_vpcomfalseuw 0x458f
+#define MN_vpcomtrueuw 0x459c
 #define MN_pmulhuw (MN_vpmulhuw + 1)
-#define MN_vpmulhuw 0x45a0
-#define MN_vpcomuw 0x45a9
+#define MN_vpmulhuw 0x45a8
+#define MN_vpcomuw 0x45b1
 #define MN_pminuw (MN_vpminuw + 1)
-#define MN_vpminuw 0x45b1
-#define MN_vpcmpuw 0x45b9
-#define MN_vpcomequw 0x45c1
-#define MN_vpcomnequw 0x45cb
-#define MN_vpcmpnequw 0x45d6
-#define MN_vpcmpequw 0x45e1
+#define MN_vpminuw 0x45b9
+#define MN_vpcmpuw 0x45c1
+#define MN_vpcomequw 0x45c9
+#define MN_vpcomnequw 0x45d3
+#define MN_vpcmpnequw 0x45de
+#define MN_vpcmpequw 0x45e9
 #define MN_phminposuw (MN_vphminposuw + 1)
-#define MN_vphminposuw 0x45eb
-#define MN_vpcomgtuw 0x45f7
-#define MN_vpcomltuw 0x4601
-#define MN_vpcmpnltuw 0x460b
-#define MN_vpcmpltuw 0x4616
+#define MN_vphminposuw 0x45f3
+#define MN_vpcomgtuw 0x45ff
+#define MN_vpcomltuw 0x4609
+#define MN_vpcmpnltuw 0x4613
+#define MN_vpcmpltuw 0x461e
 #define MN_pmaxuw (MN_vpmaxuw + 1)
-#define MN_vpmaxuw 0x4620
-#define MN_vpsravw 0x4628
-#define MN_vpshldvw 0x4630
-#define MN_vpshrdvw 0x4639
-#define MN_vpsllvw 0x4642
-#define MN_vpsrlvw 0x464a
-#define MN_kmovw 0x4652
-#define MN_vmovw 0x4658
-#define MN_vpmacsww 0x465e
-#define MN_vpmacssww 0x4667
-#define MN_movzw 0x4671
-#define MN_rex_x 0x4677
-#define MN_fyl2x 0x467d
-#define MN_rex64x 0x4683
-#define MN_vcvtneps2bf16x 0x468a
-#define MN_pfmax 0x4699
-#define MN_adcx 0x469f
-#define MN_bndldx 0x46a4
-#define MN_vfpclasspdx 0x46ab
-#define MN_fclex 0x46b7
-#define MN_fnclex 0x46bd
-#define MN_rex 0x46c4
-#define MN_vcvtpd2phx 0x46c8
-#define MN_vcvtdq2phx 0x46d3
-#define MN_vcvtudq2phx 0x46de
-#define MN_vcvtqq2phx 0x46ea
-#define MN_vcvtuqq2phx 0x46f5
-#define MN_vcvtps2phx 0x4701
-#define MN_vfpclassphx 0x470c
-#define MN_shlx 0x4718
-#define MN_mulx 0x471d
-#define MN_adox 0x4722
-#define MN_vcvttpd2dqx 0x4727
-#define MN_vcvtpd2dqx 0x4733
-#define MN_vcvttpd2udqx 0x473e
-#define MN_vcvtpd2udqx 0x474b
-#define MN_rex_rx 0x4757
-#define MN_sarx 0x475e
-#define MN_shrx 0x4763
-#define MN_rorx 0x4768
-#define MN_monitorx 0x476d
-#define MN_rex_wrx 0x4776
-#define MN_vcvtpd2psx 0x477e
-#define MN_vcvtph2psx 0x4789
-#define MN_vcvtqq2psx 0x4794
-#define MN_vcvtuqq2psx 0x479f
-#define MN_vfpclasspsx 0x47ab
-#define MN_movsx 0x47b7
-#define MN_mwaitx 0x47bd
-#define MN_bndstx 0x47c4
-#define MN_rex_wx 0x47cb
-#define MN_rexx 0x47d2
-#define MN_vcvtps2phxx 0x47d7
-#define MN_movzx 0x47e3
-#define MN_rex64y 0x47e9
-#define MN_vcvtneps2bf16y 0x47f0
-#define MN_vfpclasspdy 0x47ff
-#define MN_loadiwkey 0x480b
-#define MN_vcvtpd2phy 0x4815
-#define MN_vcvtdq2phy 0x4820
-#define MN_vcvtudq2phy 0x482b
-#define MN_vcvtqq2phy 0x4837
-#define MN_vcvtuqq2phy 0x4842
-#define MN_vfpclassphy 0x484e
-#define MN_vcvttpd2dqy 0x485a
-#define MN_vcvtpd2dqy 0x4866
-#define MN_vcvttpd2udqy 0x4871
-#define MN_vcvtpd2udqy 0x487e
-#define MN_rmpquery 0x488a
-#define MN_clrssbsy 0x4893
-#define MN_setssbsy 0x489c
-#define MN_vcvtpd2psy 0x48a5
-#define MN_vcvtqq2psy 0x48b0
-#define MN_vcvtuqq2psy 0x48bb
-#define MN_vfpclasspsy 0x48c7
-#define MN_rex64xy 0x48d3
-#define MN_rexy 0x48db
-#define MN_vcvtps2phxy 0x48e0
-#define MN_rexxy 0x48ec
-#define MN_rex64z 0x48f2
-#define MN_fldz 0x48f9
-#define MN_vfpclasspdz 0x48fe
-#define MN_vcvtpd2phz 0x490a
-#define MN_vcvtqq2phz 0x4915
-#define MN_vcvtuqq2phz 0x4920
-#define MN_vfpclassphz 0x492c
-#define MN_jz 0x4938
-#define MN_jnz 0x493b
-#define MN_repnz 0x493f
-#define MN_ccmpnz 0x4945
-#define MN_loopnz 0x494c
-#define MN_setnz 0x4953
-#define MN_ctestnz 0x4959
-#define MN_setzunz 0x4961
+#define MN_vpmaxuw 0x4628
+#define MN_vpsravw 0x4630
+#define MN_vpshldvw 0x4638
+#define MN_vpshrdvw 0x4641
+#define MN_vpsllvw 0x464a
+#define MN_vpsrlvw 0x4652
+#define MN_kmovw 0x465a
+#define MN_vmovw 0x4660
+#define MN_vpmacsww 0x4666
+#define MN_vpmacssww 0x466f
+#define MN_movzw 0x4679
+#define MN_rex_x 0x467f
+#define MN_fyl2x 0x4685
+#define MN_rex64x 0x468b
+#define MN_vcvtneps2bf16x 0x4692
+#define MN_pfmax 0x46a1
+#define MN_adcx 0x46a7
+#define MN_bndldx 0x46ac
+#define MN_vfpclasspdx 0x46b3
+#define MN_fclex 0x46bf
+#define MN_fnclex 0x46c5
+#define MN_rex 0x46cc
+#define MN_vcvtpd2phx 0x46d0
+#define MN_vcvtdq2phx 0x46db
+#define MN_vcvtudq2phx 0x46e6
+#define MN_vcvtqq2phx 0x46f2
+#define MN_vcvtuqq2phx 0x46fd
+#define MN_vcvtps2phx 0x4709
+#define MN_vfpclassphx 0x4714
+#define MN_shlx 0x4720
+#define MN_mulx 0x4725
+#define MN_adox 0x472a
+#define MN_vcvttpd2dqx 0x472f
+#define MN_vcvtpd2dqx 0x473b
+#define MN_vcvttpd2udqx 0x4746
+#define MN_vcvtpd2udqx 0x4753
+#define MN_rex_rx 0x475f
+#define MN_sarx 0x4766
+#define MN_shrx 0x476b
+#define MN_rorx 0x4770
+#define MN_monitorx 0x4775
+#define MN_rex_wrx 0x477e
+#define MN_vcvtpd2psx 0x4786
+#define MN_vcvtph2psx 0x4791
+#define MN_vcvtqq2psx 0x479c
+#define MN_vcvtuqq2psx 0x47a7
+#define MN_vfpclasspsx 0x47b3
+#define MN_movsx 0x47bf
+#define MN_mwaitx 0x47c5
+#define MN_bndstx 0x47cc
+#define MN_rex_wx 0x47d3
+#define MN_rexx 0x47da
+#define MN_vcvtps2phxx 0x47df
+#define MN_movzx 0x47eb
+#define MN_rex64y 0x47f1
+#define MN_vcvtneps2bf16y 0x47f8
+#define MN_vfpclasspdy 0x4807
+#define MN_loadiwkey 0x4813
+#define MN_vcvtpd2phy 0x481d
+#define MN_vcvtdq2phy 0x4828
+#define MN_vcvtudq2phy 0x4833
+#define MN_vcvtqq2phy 0x483f
+#define MN_vcvtuqq2phy 0x484a
+#define MN_vfpclassphy 0x4856
+#define MN_vcvttpd2dqy 0x4862
+#define MN_vcvtpd2dqy 0x486e
+#define MN_vcvttpd2udqy 0x4879
+#define MN_vcvtpd2udqy 0x4886
+#define MN_rmpquery 0x4892
+#define MN_clrssbsy 0x489b
+#define MN_setssbsy 0x48a4
+#define MN_vcvtpd2psy 0x48ad
+#define MN_vcvtqq2psy 0x48b8
+#define MN_vcvtuqq2psy 0x48c3
+#define MN_vfpclasspsy 0x48cf
+#define MN_rex64xy 0x48db
+#define MN_rexy 0x48e3
+#define MN_vcvtps2phxy 0x48e8
+#define MN_rexxy 0x48f4
+#define MN_rex64z 0x48fa
+#define MN_fldz 0x4901
+#define MN_vfpclasspdz 0x4906
+#define MN_vcvtpd2phz 0x4912
+#define MN_vcvtqq2phz 0x491d
+#define MN_vcvtuqq2phz 0x4928
+#define MN_vfpclassphz 0x4934
+#define MN_jz 0x4940
+#define MN_jnz 0x4943
+#define MN_repnz 0x4947
+#define MN_ccmpnz 0x494d
+#define MN_loopnz 0x4954
+#define MN_setnz 0x495b
+#define MN_ctestnz 0x4961
+#define MN_setzunz 0x4969
 #define MN_cmovnz (MN_cfcmovnz + 2)
-#define MN_cfcmovnz 0x4969
-#define MN_repz 0x4972
-#define MN_ccmpz 0x4977
-#define MN_loopz 0x497d
-#define MN_vfpclasspsz 0x4983
-#define MN_setz 0x498f
-#define MN_ctestz 0x4994
-#define MN_setzuz 0x499b
+#define MN_cfcmovnz 0x4971
+#define MN_repz 0x497a
+#define MN_ccmpz 0x497f
+#define MN_loopz 0x4985
+#define MN_vfpclasspsz 0x498b
+#define MN_setz 0x4997
+#define MN_ctestz 0x499c
+#define MN_setzuz 0x49a3
 #define MN_cmovz (MN_cfcmovz + 2)
-#define MN_cfcmovz 0x49a2
-#define MN_rex64xz 0x49aa
-#define MN_jecxz 0x49b2
-#define MN_jcxz 0x49b8
-#define MN_jrcxz 0x49bd
-#define MN_rexz 0x49c3
-#define MN_rexxz 0x49c8
-#define MN_rex64yz 0x49ce
-#define MN_rex64xyz 0x49d6
-#define MN_rexyz 0x49df
-#define MN_rexxyz 0x49e5
-#define MN__disp32_ 0x49ec
-#define MN__rex2_ 0x49f5
-#define MN__vex2_ 0x49fc
-#define MN__vex3_ 0x4a03
-#define MN__disp16_ 0x4a0a
-#define MN__disp8_ 0x4a13
-#define MN__load_ 0x4a1b
-#define MN__store_ 0x4a22
-#define MN__nooptimize_ 0x4a2a
-#define MN__nf_ 0x4a37
-#define MN__rex_ 0x4a3c
-#define MN__evex_ 0x4a42
-#define MN__vex_ 0x4a49
-#define MN__insn 0x4a4f
+#define MN_cfcmovz 0x49aa
+#define MN_rex64xz 0x49b2
+#define MN_jecxz 0x49ba
+#define MN_jcxz 0x49c0
+#define MN_jrcxz 0x49c5
+#define MN_rexz 0x49cb
+#define MN_rexxz 0x49d0
+#define MN_rex64yz 0x49d6
+#define MN_rex64xyz 0x49de
+#define MN_rexyz 0x49e7
+#define MN_rexxyz 0x49ed
+#define MN__disp32_ 0x49f4
+#define MN__rex2_ 0x49fd
+#define MN__vex2_ 0x4a04
+#define MN__vex3_ 0x4a0b
+#define MN__disp16_ 0x4a12
+#define MN__disp8_ 0x4a1b
+#define MN__load_ 0x4a23
+#define MN__store_ 0x4a2a
+#define MN__nooptimize_ 0x4a32
+#define MN__nf_ 0x4a3f
+#define MN__rex_ 0x4a44
+#define MN__evex_ 0x4a4a
+#define MN__vex_ 0x4a51
+#define MN__insn 0x4a57
diff --git a/opcodes/i386-opc.h b/opcodes/i386-opc.h
index db5ca36..c0d5e44 100644
--- a/opcodes/i386-opc.h
+++ b/opcodes/i386-opc.h
@@ -225,6 +225,8 @@ enum i386_cpu
   CpuLKGS,
   /* Intel USER_MSR Instruction support required.  */
   CpuUSER_MSR,
+  /* Intel AVX10.2 Instructions support required.  */
+  CpuAVX10_2,
   /* mwaitx instruction required */
   CpuMWAITX,
   /* Clzero instruction required */
@@ -477,6 +479,7 @@ typedef union i386_cpu_flags
       unsigned int cpufred:1;
       unsigned int cpulkgs:1;
       unsigned int cpuuser_msr:1;
+      unsigned int cpuavx10_2:1;
       unsigned int cpumwaitx:1;
       unsigned int cpuclzero:1;
       unsigned int cpuospke:1;
diff --git a/opcodes/i386-opc.tbl b/opcodes/i386-opc.tbl
index 97978fe..9a14a4d 100644
--- a/opcodes/i386-opc.tbl
+++ b/opcodes/i386-opc.tbl
@@ -992,9 +992,8 @@ ud0, 0xfff, i186, Modrm|CheckOperandSize|No_bSuf|No_sSuf, { Reg16|Reg32|Reg64|Un
 cmov<cc>, 0x4<cc:opc>, CMOV&APX_F, C|Modrm|CheckOperandSize|No_bSuf|No_sSuf|DstVVVV|EVexMap4|Optimize, { Reg16|Reg32|Reg64|Unspecified|BaseIndex, Reg16|Reg32|Reg64, Reg16|Reg32|Reg64 }
 cmov<cc>, 0xf4<cc:opc>, CMOV, Modrm|CheckOperandSize|No_bSuf|No_sSuf, { Reg16|Reg32|Reg64|Unspecified|BaseIndex, Reg16|Reg32|Reg64 }
 
-cfcmov<cc>, 0x4<cc:opc>, CMOV&APX_F, Modrm|CheckOperandSize|No_bSuf|No_sSuf|DstVVVV|EVexMap4|EVexNF, { Reg16|Reg32|Reg64|Unspecified|BaseIndex, Reg16|Reg32|Reg64, Reg16|Reg32|Reg64 }
-cfcmov<cc>, 0x4<cc:opc>, CMOV&APX_F, Load|Modrm|CheckOperandSize|No_bSuf|No_sSuf|EVexMap4, { Reg16|Reg32|Reg64|Unspecified|BaseIndex, Reg16|Reg32|Reg64 }
-cfcmov<cc>, 0x4<cc:opc>, CMOV&APX_F, Modrm|CheckOperandSize|No_bSuf|No_sSuf|EVexMap4|EVexNF, { Reg16|Reg32|Reg64, Reg16|Reg32|Reg64|Unspecified|BaseIndex }
+cfcmov<cc>, 0x4<cc:opc>, CMOV&APX_F, Modrm|CheckOperandSize|No_bSuf|No_sSuf|DstVVVV|EVexMap4|EVexNF|Optimize, { Reg16|Reg32|Reg64|Unspecified|BaseIndex, Reg16|Reg32|Reg64, Reg16|Reg32|Reg64 }
+cfcmov<cc>, 0x4<cc:opc>, CMOV&APX_F, D|Modrm|CheckOperandSize|No_bSuf|No_sSuf|EVexMap4, { Reg16|Reg32|Reg64|Unspecified|BaseIndex, Reg16|Reg32|Reg64 }
 
 fcmovb, 0xda/0, i687, Modrm|NoSuf, { FloatReg, FloatAcc }
 fcmovnae, 0xda/0, i687, Modrm|NoSuf, { FloatReg, FloatAcc }
@@ -1177,12 +1176,19 @@ pxor<MMX>, 0x<MMX:pfx>0fef, <MMX:cpu>, Modrm|<MMX:attr>|C|NoSuf, { <MMX:reg>|<MM
     $avx:0xf30f53:0xf30f52:AVX:VexLIG|VexW0|Src1VVVV|SSE2AVX, +
     $apx:0x660f384d:0x660f384f:AVX512F:EVexLIG|VexW0|Src1VVVV|Disp8MemShift=2|SSE2AVX, +
     $sse:0xf30f53:0xf30f52:SSE:::>
+<fop:opc:sr:ne, +
+    add:58:StaticRounding:ne, +
+    sub:5c:StaticRounding:ne, +
+    mul:59:StaticRounding:ne, +
+    div:5e:StaticRounding:ne, +
+    min:5d::, +
+    max:5f::>
+<flog:opc:comm:optim, and:54:C:, andn:55::Optimize, or:56:C:, xor:57:C:Optimize>
 <frel:imm:comm, eq:0:C, lt:1:, le:2:, unord:3:C, neq:4:C, nlt:5:, nle:6:, ord:7:C>
 
-addps<SSE>, 0x0f58, <SSE:cpu>, Modrm|<SSE:attr>|<SSE:vvvv>|NoSuf, { RegXMM|Unspecified|BaseIndex, RegXMM }
-addss<SSE>, 0xf30f58, <SSE:cpu>, Modrm|<SSE:scal>|<SSE:vvvv>|NoSuf, { Dword|Unspecified|BaseIndex|RegXMM, RegXMM }
-andnps<SSEDQ>, 0x0f55, <SSEDQ:cpu>, Modrm|<SSEDQ:attr>|NoSuf, { RegXMM|Unspecified|BaseIndex, RegXMM }
-andps<SSEDQ>, 0x0f54, <SSEDQ:cpu>, Modrm|<SSEDQ:attr>|C|NoSuf, { RegXMM|Unspecified|BaseIndex, RegXMM }
+<fop>ps<SSE>, 0x0f<fop:opc>, <SSE:cpu>, Modrm|<SSE:attr>|<SSE:vvvv>|NoSuf, { RegXMM|Unspecified|BaseIndex, RegXMM }
+<fop>ss<SSE>, 0xf30f<fop:opc>, <SSE:cpu>, Modrm|<SSE:scal>|<SSE:vvvv>|NoSuf, { RegXMM|Dword|Unspecified|BaseIndex, RegXMM }
+<flog>ps<SSEDQ>, 0x0f<flog:opc>, <SSEDQ:cpu>, Modrm|<SSEDQ:attr>|<flog:comm>|NoSuf, { RegXMM|Unspecified|BaseIndex, RegXMM }
 cmp<frel>ps<sse>, 0x0fc2/<frel:imm>, <sse:cpu>, Modrm|<sse:attr>|<sse:vvvv>|<frel:comm>|NoSuf|ImmExt, { RegXMM|Unspecified|BaseIndex, RegXMM }
 cmp<frel>ss<sse>, 0xf30fc2/<frel:imm>, <sse:cpu>, Modrm|<sse:scal>|<sse:vvvv>|<frel:comm>|NoSuf|ImmExt, { RegXMM|Dword|Unspecified|BaseIndex, RegXMM }
 cmpps<sse>, 0x0fc2, <sse:cpu>, Modrm|<sse:attr>|<sse:vvvv>|NoSuf, { Imm8, RegXMM|Unspecified|BaseIndex, RegXMM }
@@ -1200,14 +1206,8 @@ cvtss2si, 0xf30f2d, SSE, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_sSuf, { Dword|Unspe
 cvttps2pi, 0xf2c, SSE, Modrm|NoSuf, { Qword|Unspecified|BaseIndex|RegXMM, RegMMX }
 cvttss2si, 0xf32c, AVX|AVX512F, Modrm|VexLIG|EVexLIG|Space0F|Disp8MemShift=2|No_bSuf|No_wSuf|No_sSuf|SSE2AVX, { Dword|Unspecified|BaseIndex|RegXMM, Reg32|Reg64 }
 cvttss2si, 0xf30f2c, SSE, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_sSuf, { Dword|Unspecified|BaseIndex|RegXMM, Reg32|Reg64 }
-divps<SSE>, 0x0f5e, <SSE:cpu>, Modrm|<SSE:attr>|<SSE:vvvv>|NoSuf, { RegXMM|Unspecified|BaseIndex, RegXMM }
-divss<SSE>, 0xf30f5e, <SSE:cpu>, Modrm|<SSE:scal>|<SSE:vvvv>|NoSuf, { Dword|Unspecified|BaseIndex|RegXMM, RegXMM }
 ldmxcsr<sse>, 0x0fae/2, <sse:cpu>, Modrm|<sse:attr>|NoSuf, { Dword|Unspecified|BaseIndex }
 maskmovq, 0xff7, SSE|3dnowA, Modrm|NoSuf, { RegMMX, RegMMX }
-maxps<SSE>, 0x0f5f, <SSE:cpu>, Modrm|<SSE:attr>|<SSE:vvvv>|NoSuf, { RegXMM|Unspecified|BaseIndex, RegXMM }
-maxss<SSE>, 0xf30f5f, <SSE:cpu>, Modrm|<SSE:scal>|<SSE:vvvv>|NoSuf, { Dword|Unspecified|BaseIndex|RegXMM, RegXMM }
-minps<SSE>, 0x0f5d, <SSE:cpu>, Modrm|<SSE:attr>|<SSE:vvvv>|NoSuf, { RegXMM|Unspecified|BaseIndex, RegXMM }
-minss<SSE>, 0xf30f5d, <SSE:cpu>, Modrm|<SSE:scal>|<SSE:vvvv>|NoSuf, { Dword|Unspecified|BaseIndex|RegXMM, RegXMM }
 movaps<SSE>, 0x0f28, <SSE:cpu>, D|Modrm|<SSE:attr>|NoSuf, { RegXMM|Unspecified|BaseIndex, RegXMM }
 movhlps<SSE>, 0x0f12, <SSE:cpu>, Modrm|<SSE:attr>|<SSE:vvvv>|NoSuf, { RegXMM, RegXMM }
 movhps, 0x16, AVX|AVX512F, Modrm|Vex128|EVex128|Space0F|Src1VVVV|VexW0|Disp8MemShift=3|NoSuf|SSE2AVX, { Qword|Unspecified|BaseIndex, RegXMM }
@@ -1225,9 +1225,6 @@ movss, 0xf310, AVX|AVX512F, D|Modrm|VexLIG|EVexLIG|Space0F|VexW0|Disp8MemShift=2
 movss, 0xf310, AVX|AVX512F, D|Modrm|VexLIG|EVexLIG|Space0F|Src1VVVV|VexW0|NoSuf|SSE2AVX, { RegXMM, RegXMM }
 movss, 0xf30f10, SSE, D|Modrm|NoSuf, { Dword|Unspecified|BaseIndex|RegXMM, RegXMM }
 movups<SSE>, 0x0f10, <SSE:cpu>, D|Modrm|<SSE:attr>|NoSuf, { RegXMM|Unspecified|BaseIndex, RegXMM }
-mulps<SSE>, 0x0f59, <SSE:cpu>, Modrm|<SSE:attr>|<SSE:vvvv>|NoSuf, { RegXMM|Unspecified|BaseIndex, RegXMM }
-mulss<SSE>, 0xf30f59, <SSE:cpu>, Modrm|<SSE:scal>|<SSE:vvvv>|NoSuf, { Dword|Unspecified|BaseIndex|RegXMM, RegXMM }
-orps<SSEDQ>, 0x0f56, <SSEDQ:cpu>, Modrm|<SSEDQ:attr>|C|NoSuf, { RegXMM|Unspecified|BaseIndex, RegXMM }
 pavg<bw>, 0xfe0 | (3 * <bw:opc>), SSE|3dnowA, Modrm|NoSuf, { Qword|Unspecified|BaseIndex|RegMMX, RegMMX }
 pavg<bw><SSE2BW>, 0x660fe0 | (3 * <bw:opc>), <SSE2BW:cpu>, Modrm|<SSE2BW:attr>|<SSE2BW:vvvv>|C|NoSuf, { RegXMM|Unspecified|BaseIndex, RegXMM }
 pextrw<SSE2D>, 0x660fc5, <SSE2D:cpu>, Load|Modrm|<SSE2D:attr>|No_bSuf|No_wSuf|No_sSuf|IgnoreSize|NoRex64, { Imm8, RegXMM, Reg32|Reg64 }
@@ -1264,12 +1261,9 @@ shufps<SSE>, 0x0fc6, <SSE:cpu>, Modrm|<SSE:attr>|<SSE:vvvv>|NoSuf, { Imm8|Imm8S,
 sqrtps<SSE>, 0x0f51, <SSE:cpu>, Modrm|<SSE:attr>|NoSuf, { RegXMM|Unspecified|BaseIndex, RegXMM }
 sqrtss<SSE>, 0xf30f51, <SSE:cpu>, Modrm|<SSE:scal>|<SSE:vvvv>|NoSuf, { Dword|Unspecified|BaseIndex|RegXMM, RegXMM }
 stmxcsr<sse>, 0x0fae/3, <sse:cpu>, Modrm|<sse:attr>|NoSuf, { Dword|Unspecified|BaseIndex }
-subps<SSE>, 0x0f5c, <SSE:cpu>, Modrm|<SSE:attr>|<SSE:vvvv>|NoSuf, { RegXMM|Unspecified|BaseIndex, RegXMM }
-subss<SSE>, 0xf30f5c, <SSE:cpu>, Modrm|<SSE:scal>|<SSE:vvvv>|NoSuf, { Dword|Unspecified|BaseIndex|RegXMM, RegXMM }
 ucomiss<SSE>, 0x0f2e, <SSE:cpu>, Modrm|<SSE:scal>|NoSuf, { Dword|Unspecified|BaseIndex|RegXMM, RegXMM }
 unpckhps<SSE>, 0x0f15, <SSE:cpu>, Modrm|<SSE:attr>|<SSE:vvvv>|NoSuf, { RegXMM|Unspecified|BaseIndex, RegXMM }
 unpcklps<SSE>, 0x0f14, <SSE:cpu>, Modrm|<SSE:attr>|<SSE:vvvv>|NoSuf, { RegXMM|Unspecified|BaseIndex, RegXMM }
-xorps<SSEDQ>, 0x0f57, <SSEDQ:cpu>, Modrm|<SSEDQ:attr>|C|NoSuf, { RegXMM|Unspecified|BaseIndex, RegXMM }
 
 // SSE2 instructions.
 
@@ -1278,10 +1272,9 @@ xorps<SSEDQ>, 0x0f57, <SSEDQ:cpu>, Modrm|<SSEDQ:attr>|C|NoSuf, { RegXMM|Unspecif
     $apx:AVX512DQ&AVX512VL:EVex128|VexW1|Src1VVVV|Disp8MemShift=4|SSE2AVX, +
     $sse:SSE2:>
 
-addpd<SSE2Q>, 0x660f58, <SSE2Q:cpu>, Modrm|<SSE2Q:attr>|<SSE2Q:vvvv>|NoSuf, { RegXMM|Unspecified|BaseIndex, RegXMM }
-addsd<SSE2Q>, 0xf20f58, <SSE2Q:cpu>, Modrm|<SSE2Q:scal>|<SSE2Q:vvvv>|NoSuf, { Qword|Unspecified|BaseIndex|RegXMM, RegXMM }
-andnpd<SSE2DQ>, 0x660f55, <SSE2DQ:cpu>, Modrm|<SSE2DQ:attr>|NoSuf, { RegXMM|Unspecified|BaseIndex, RegXMM }
-andpd<SSE2DQ>, 0x660f54, <SSE2DQ:cpu>, Modrm|<SSE2DQ:attr>|C|NoSuf, { RegXMM|Unspecified|BaseIndex, RegXMM }
+<fop>pd<SSE2Q>, 0x660f<fop:opc>, <SSE2Q:cpu>, Modrm|<SSE2Q:attr>|<SSE2Q:vvvv>|NoSuf, { RegXMM|Unspecified|BaseIndex, RegXMM }
+<fop>sd<SSE2Q>, 0xf20f<fop:opc>, <SSE2Q:cpu>, Modrm|<SSE2Q:scal>|<SSE2Q:vvvv>|NoSuf, { RegXMM|Qword|Unspecified|BaseIndex, RegXMM }
+<flog>pd<SSE2DQ>, 0x660f<flog:opc>, <SSE2DQ:cpu>, Modrm|<SSE2DQ:attr>|<flog:comm>|NoSuf, { RegXMM|Unspecified|BaseIndex, RegXMM }
 cmp<frel>pd<sse2>, 0x660fc2/<frel:imm>, <sse2:cpu>, Modrm|<sse2:attr>|<sse2:vvvv>|<frel:comm>|NoSuf|ImmExt, { RegXMM|Unspecified|BaseIndex, RegXMM }
 cmp<frel>sd<sse2>, 0xf20fc2/<frel:imm>, <sse2:cpu>, Modrm|<sse2:scal>|<sse2:vvvv>|<frel:comm>|NoSuf|ImmExt, { RegXMM|Qword|Unspecified|BaseIndex, RegXMM }
 cmppd<sse2>, 0x660fc2, <sse2:cpu>, Modrm|<sse2:attr>|<sse2:vvvv>|NoSuf, { Imm8, RegXMM|Unspecified|BaseIndex, RegXMM }
@@ -1295,12 +1288,6 @@ cvtsi2sd, 0xf22a, x64&(AVX|AVX512F), Modrm|VexLIG|EVexLIG|Space0F|Src1VVVV|Disp8
 cvtsi2sd, 0xf22a, x64&(AVX|AVX512F), Modrm|VexLIG|EVexLIG|Space0F|Src1VVVV|Disp8ShiftVL|No_bSuf|No_wSuf|No_sSuf|SSE2AVX|IntelSyntax, { Reg32|Reg64|Unspecified|BaseIndex, RegXMM }
 cvtsi2sd, 0xf20f2a, SSE2&x64, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|ATTSyntax, { Reg32|Reg64|Unspecified|BaseIndex, RegXMM }
 cvtsi2sd, 0xf20f2a, SSE2&x64, Modrm|No_bSuf|No_wSuf|No_sSuf|IntelSyntax, { Reg32|Reg64|Unspecified|BaseIndex, RegXMM }
-divpd<SSE2Q>, 0x660f5e, <SSE2Q:cpu>, Modrm|<SSE2Q:attr>|<SSE2Q:vvvv>|NoSuf, { RegXMM|Unspecified|BaseIndex, RegXMM }
-divsd<SSE2Q>, 0xf20f5e, <SSE2Q:cpu>, Modrm|<SSE2Q:scal>|<SSE2Q:vvvv>|NoSuf, { Qword|Unspecified|BaseIndex|RegXMM, RegXMM }
-maxpd<SSE2Q>, 0x660f5f, <SSE2Q:cpu>, Modrm|<SSE2Q:attr>|<SSE2Q:vvvv>|NoSuf, { RegXMM|Unspecified|BaseIndex, RegXMM }
-maxsd<SSE2Q>, 0xf20f5f, <SSE2Q:cpu>, Modrm|<SSE2Q:scal>|<SSE2Q:vvvv>|NoSuf, { Qword|Unspecified|BaseIndex|RegXMM, RegXMM }
-minpd<SSE2Q>, 0x660f5d, <SSE2Q:cpu>, Modrm|<SSE2Q:attr>|<SSE2Q:vvvv>|NoSuf, { RegXMM|Unspecified|BaseIndex, RegXMM }
-minsd<SSE2Q>, 0xf20f5d, <SSE2Q:cpu>, Modrm|<SSE2Q:scal>|<SSE2Q:vvvv>|NoSuf, { Qword|Unspecified|BaseIndex|RegXMM, RegXMM }
 movapd<SSE2Q>, 0x660f28, <SSE2Q:cpu>, D|Modrm|<SSE2Q:attr>|NoSuf, { RegXMM|Unspecified|BaseIndex, RegXMM }
 movhpd, 0x6616, AVX, Modrm|Vex|Space0F|Src1VVVV|VexW0|NoSuf|SSE2AVX, { Qword|Unspecified|BaseIndex, RegXMM }
 movhpd, 0x6616, AVX512F, Modrm|EVex128|Space0F|Src1VVVV|VexW1|Disp8MemShift=3|NoSuf|SSE2AVX, { Qword|Unspecified|BaseIndex, RegXMM }
@@ -1320,18 +1307,12 @@ movsd, 0xf210, AVX, D|Modrm|VexLIG|Space0F|Src1VVVV|VexW0|NoSuf|SSE2AVX, { RegXM
 movsd, 0xf210, AVX512F, D|Modrm|EVexLIG|Space0F|Src1VVVV|VexW1|NoSuf|SSE2AVX, { RegXMM, RegXMM }
 movsd, 0xf20f10, SSE2, D|Modrm|NoSuf, { Qword|Unspecified|BaseIndex|RegXMM, RegXMM }
 movupd<SSE2Q>, 0x660f10, <SSE2Q:cpu>, D|Modrm|<SSE2Q:attr>|NoSuf, { RegXMM|Unspecified|BaseIndex, RegXMM }
-mulpd<SSE2Q>, 0x660f59, <SSE2Q:cpu>, Modrm|<SSE2Q:attr>|<SSE2Q:vvvv>|NoSuf, { RegXMM|Unspecified|BaseIndex, RegXMM }
-mulsd<SSE2Q>, 0xf20f59, <SSE2Q:cpu>, Modrm|<SSE2Q:scal>|<SSE2Q:vvvv>|NoSuf, { Qword|Unspecified|BaseIndex|RegXMM, RegXMM }
-orpd<SSE2DQ>, 0x660f56, <SSE2DQ:cpu>, Modrm|<SSE2DQ:attr>|C|NoSuf, { RegXMM|Unspecified|BaseIndex, RegXMM }
 shufpd<SSE2Q>, 0x660fc6, <SSE2Q:cpu>, Modrm|<SSE2Q:attr>|<SSE2Q:vvvv>|NoSuf, { Imm8|Imm8S, RegXMM|Unspecified|BaseIndex, RegXMM }
 sqrtpd<SSE2Q>, 0x660f51, <SSE2Q:cpu>, Modrm|<SSE2Q:attr>|NoSuf, { RegXMM|Unspecified|BaseIndex, RegXMM }
 sqrtsd<SSE2Q>, 0xf20f51, <SSE2Q:cpu>, Modrm|<SSE2Q:scal>|<SSE2Q:vvvv>|NoSuf, { Qword|Unspecified|BaseIndex|RegXMM, RegXMM }
-subpd<SSE2Q>, 0x660f5c, <SSE2Q:cpu>, Modrm|<SSE2Q:attr>|<SSE2Q:vvvv>|NoSuf, { RegXMM|Unspecified|BaseIndex, RegXMM }
-subsd<SSE2Q>, 0xf20f5c, <SSE2Q:cpu>, Modrm|<SSE2Q:scal>|<SSE2Q:vvvv>|NoSuf, { Qword|Unspecified|BaseIndex|RegXMM, RegXMM }
 ucomisd<SSE2Q>, 0x660f2e, <SSE2Q:cpu>, Modrm|<SSE2Q:scal>|NoSuf, { Qword|Unspecified|BaseIndex|RegXMM, RegXMM }
 unpckhpd<SSE2Q>, 0x660f15, <SSE2Q:cpu>, Modrm|<SSE2Q:attr>|<SSE2Q:vvvv>|NoSuf, { RegXMM|Unspecified|BaseIndex, RegXMM }
 unpcklpd<SSE2Q>, 0x660f14, <SSE2Q:cpu>, Modrm|<SSE2Q:attr>|<SSE2Q:vvvv>|NoSuf, { RegXMM|Unspecified|BaseIndex, RegXMM }
-xorpd<SSE2DQ>, 0x660f57, <SSE2DQ:cpu>, Modrm|<SSE2DQ:attr>|C|NoSuf, { RegXMM|Unspecified|BaseIndex, RegXMM }
 cvtdq2pd<SSE2D>, 0xf30fe6, <SSE2D:cpu>, Modrm|<SSE2D:attr>|Disp8MemShift|NoSuf, { Qword|Unspecified|BaseIndex|RegXMM, RegXMM }
 cvtpd2dq<SSE2Q>, 0xf20fe6, <SSE2Q:cpu>, Modrm|<SSE2Q:attr>|NoSuf, { RegXMM|Unspecified|BaseIndex, RegXMM }
 cvtdq2ps<SSE2D>, 0x0f5b, <SSE2D:cpu>, Modrm|<SSE2D:attr>|NoSuf, { RegXMM|Unspecified|BaseIndex, RegXMM }
@@ -1510,11 +1491,11 @@ blendvp<sd>, 0x664a | <sd:opc>, AVX, Modrm|Vex128|Space0F3A|Src1VVVV|VexW0|NoSuf
 blendvp<sd>, 0x660f3814 | <sd:opc>, SSE4_1, Modrm|NoSuf, { Acc|Xmmword, RegXMM|Unspecified|BaseIndex, RegXMM }
 blendvp<sd>, 0x660f3814 | <sd:opc>, SSE4_1, Modrm|NoSuf, { RegXMM|Unspecified|BaseIndex, RegXMM }
 dpp<sd><sse41>, 0x660f3a40 | <sd:opc>, <sse41:cpu>, Modrm|<sse41:attr>|<sse41:vvvv>|NoSuf, { Imm8|Imm8S, RegXMM|Unspecified|BaseIndex, RegXMM }
-extractps, 0x6617, AVX|AVX512F, Modrm|Vex128|EVex128|Space0F3A|VexW0|Disp8MemShift=2|NoSuf|SSE2AVX, { Imm8, RegXMM, Reg32|Unspecified|BaseIndex }
-extractps, 0x6617, x64&(AVX|AVX512F), RegMem|Vex128|EVex128|Space0F3A|VexW1|NoSuf|SSE2AVX, { Imm8, RegXMM, Reg64 }
-extractps, 0x660f3a17, SSE4_1, Modrm|IgnoreSize|NoSuf, { Imm8, RegXMM, Reg32|Unspecified|BaseIndex }
-extractps, 0x660f3a17, SSE4_1&x64, RegMem|NoSuf|NoRex64, { Imm8, RegXMM, Reg64 }
-insertps<SSE41D>, 0x660f3a21, <SSE41D:cpu>, Modrm|<SSE41D:attr>|<SSE41D:vvvv>|Disp8MemShift|NoSuf, { Imm8, Dword|Unspecified|BaseIndex|RegXMM, RegXMM }
+extractps, 0x6617, AVX|AVX512F, Modrm|Vex128|EVex128|Space0F3A|VexW0|Disp8MemShift=2|NoSuf|SSE2AVX|Optimize, { Imm8, RegXMM, Reg32|Unspecified|BaseIndex }
+extractps, 0x6617, x64&(AVX|AVX512F), RegMem|Vex128|EVex128|Space0F3A|VexW1|NoSuf|SSE2AVX|Optimize, { Imm8, RegXMM, Reg64 }
+extractps, 0x660f3a17, SSE4_1, Modrm|IgnoreSize|NoSuf|Optimize, { Imm8, RegXMM, Reg32|Unspecified|BaseIndex }
+extractps, 0x660f3a17, SSE4_1&x64, RegMem|NoSuf|Optimize|NoRex64, { Imm8, RegXMM, Reg64 }
+insertps<SSE41D>, 0x660f3a21, <SSE41D:cpu>, Modrm|<SSE41D:attr>|<SSE41D:vvvv>|Disp8MemShift|NoSuf|Optimize, { Imm8, Dword|Unspecified|BaseIndex|RegXMM, RegXMM }
 movntdqa<SSE41D>, 0x660f382a, <SSE41D:cpu>, Modrm|<SSE41D:attr>|NoSuf, { Xmmword|Unspecified|BaseIndex, RegXMM }
 mpsadbw<sse41>, 0x660f3a42, <sse41:cpu>, Modrm|<sse41:attr>|<sse41:vvvv>|NoSuf, { Imm8|Imm8S, RegXMM|Unspecified|BaseIndex, RegXMM }
 packusdw<SSE41BW>, 0x660f382b, <SSE41BW:cpu>, Modrm|<SSE41BW:attr>|<SSE41BW:vvvv>|NoSuf, { RegXMM|Unspecified|BaseIndex, RegXMM }
@@ -1545,18 +1526,13 @@ pminsb<SSE41BW>, 0x660f3838, <SSE41BW:cpu>, Modrm|<SSE41BW:attr>|<SSE41BW:vvvv>|
 pminsd<SSE41D>, 0x660f3839, <SSE41D:cpu>, Modrm|<SSE41D:attr>|<SSE41D:vvvv>|NoSuf, { RegXMM|Unspecified|BaseIndex, RegXMM }
 pminud<SSE41D>, 0x660f383b, <SSE41D:cpu>, Modrm|<SSE41D:attr>|<SSE41D:vvvv>|NoSuf, { RegXMM|Unspecified|BaseIndex, RegXMM }
 pminuw<SSE41BW>, 0x660f383a, <SSE41BW:cpu>, Modrm|<SSE41BW:attr>|<SSE41BW:vvvv>|NoSuf, { RegXMM|Unspecified|BaseIndex, RegXMM }
-pmovsxbw<SSE41BW>, 0x660f3820, <SSE41BW:cpu>, Modrm|<SSE41BW:attr>|Disp8MemShift|NoSuf, { Qword|Unspecified|BaseIndex|RegXMM, RegXMM }
-pmovsxbd<SSE41D>, 0x660f3821, <SSE41D:cpu>, Modrm|<SSE41D:attr>|Disp8MemShift|NoSuf, { Dword|Unspecified|BaseIndex|RegXMM, RegXMM }
-pmovsxbq<SSE41D>, 0x660f3822, <SSE41D:cpu>, Modrm|<SSE41D:attr>|Disp8MemShift|NoSuf, { Word|Unspecified|BaseIndex|RegXMM, RegXMM }
-pmovsxwd<SSE41D>, 0x660f3823, <SSE41D:cpu>, Modrm|<SSE41D:attr>|Disp8MemShift|NoSuf, { Qword|Unspecified|BaseIndex|RegXMM, RegXMM }
-pmovsxwq<SSE41D>, 0x660f3824, <SSE41D:cpu>, Modrm|<SSE41D:attr>|Disp8MemShift|NoSuf, { Dword|Unspecified|BaseIndex|RegXMM, RegXMM }
-pmovsxdq<SSE41D>, 0x660f3825, <SSE41D:cpu>, Modrm|<SSE41D:attr>|Disp8MemShift|NoSuf, { Qword|Unspecified|BaseIndex|RegXMM, RegXMM }
-pmovzxbw<SSE41BW>, 0x660f3830, <SSE41BW:cpu>, Modrm|<SSE41BW:attr>|Disp8MemShift|NoSuf, { Qword|Unspecified|BaseIndex|RegXMM, RegXMM }
-pmovzxbd<SSE41D>, 0x660f3831, <SSE41D:cpu>, Modrm|<SSE41D:attr>|Disp8MemShift|NoSuf, { Dword|Unspecified|BaseIndex|RegXMM, RegXMM }
-pmovzxbq<SSE41D>, 0x660f3832, <SSE41D:cpu>, Modrm|<SSE41D:attr>|Disp8MemShift|NoSuf, { Word|Unspecified|BaseIndex|RegXMM, RegXMM }
-pmovzxwd<SSE41D>, 0x660f3833, <SSE41D:cpu>, Modrm|<SSE41D:attr>|Disp8MemShift|NoSuf, { Qword|Unspecified|BaseIndex|RegXMM, RegXMM }
-pmovzxwq<SSE41D>, 0x660f3834, <SSE41D:cpu>, Modrm|<SSE41D:attr>|Disp8MemShift|NoSuf, { Dword|Unspecified|BaseIndex|RegXMM, RegXMM }
-pmovzxdq<SSE41D>, 0x660f3835, <SSE41D:cpu>, Modrm|<SSE41D:attr>|Disp8MemShift|NoSuf, { Qword|Unspecified|BaseIndex|RegXMM, RegXMM }
+<movx:opc, movsx:2, movzx:3>
+p<movx>bw<SSE41BW>, 0x660f38<movx:opc>0, <SSE41BW:cpu>, Modrm|<SSE41BW:attr>|Disp8MemShift|NoSuf, { Qword|Unspecified|BaseIndex|RegXMM, RegXMM }
+p<movx>bd<SSE41D>, 0x660f38<movx:opc>1, <SSE41D:cpu>, Modrm|<SSE41D:attr>|Disp8MemShift|NoSuf, { Dword|Unspecified|BaseIndex|RegXMM, RegXMM }
+p<movx>bq<SSE41D>, 0x660f38<movx:opc>2, <SSE41D:cpu>, Modrm|<SSE41D:attr>|Disp8MemShift|NoSuf, { Word|Unspecified|BaseIndex|RegXMM, RegXMM }
+p<movx>wd<SSE41D>, 0x660f38<movx:opc>3, <SSE41D:cpu>, Modrm|<SSE41D:attr>|Disp8MemShift|NoSuf, { Qword|Unspecified|BaseIndex|RegXMM, RegXMM }
+p<movx>wq<SSE41D>, 0x660f38<movx:opc>4, <SSE41D:cpu>, Modrm|<SSE41D:attr>|Disp8MemShift|NoSuf, { Dword|Unspecified|BaseIndex|RegXMM, RegXMM }
+p<movx>dq<SSE41D>, 0x660f38<movx:opc>5, <SSE41D:cpu>, Modrm|<SSE41D:attr>|Disp8MemShift|NoSuf, { Qword|Unspecified|BaseIndex|RegXMM, RegXMM }
 pmuldq<SSE41Q>, 0x660f3828, <SSE41Q:cpu>, Modrm|<SSE41Q:attr>|<SSE41Q:vvvv>|NoSuf, { RegXMM|Unspecified|BaseIndex, RegXMM }
 pmulld<SSE41D>, 0x660f3840, <SSE41D:cpu>, Modrm|<SSE41D:attr>|<SSE41D:vvvv>|NoSuf, { RegXMM|Unspecified|BaseIndex, RegXMM }
 ptest<sse41>, 0x660f3817, <sse41:cpu>, Modrm|<sse41:attr>|NoSuf, { RegXMM|Unspecified|BaseIndex, RegXMM }
@@ -1655,17 +1631,14 @@ gf2p8mulb<gfni>, 0x660f38cf, GFNI<gfni:cpu>, Modrm|<gfni:attr>|<gfni:vexw0>|NoSu
     x:Vex128:ATTSyntax:RegXMM|Unspecified|BaseIndex, +
     y:Vex256:ATTSyntax:RegYMM|Unspecified|BaseIndex>
 
-vaddp<sd>, 0x<sd:ppfx>58, AVX, Modrm|Vex|Space0F|Src1VVVV|VexWIG|CheckOperandSize|NoSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
-vadds<sd>, 0x<sd:spfx>58, AVX, Modrm|VexLIG|Space0F|Src1VVVV|VexWIG|NoSuf, { <sd:elem>|Unspecified|BaseIndex|RegXMM, RegXMM, RegXMM }
+v<fop>p<sd>, 0x<sd:ppfx><fop:opc>, AVX, Modrm|Vex|Space0F|Src1VVVV|VexWIG|CheckOperandSize|NoSuf, { RegXMM|RegYMM|Unspecified|BaseIndex, RegXMM|RegYMM, RegXMM|RegYMM }
+v<fop>s<sd>, 0x<sd:spfx><fop:opc>, AVX, Modrm|VexLIG|Space0F|Src1VVVV|VexWIG|NoSuf, { RegXMM|<sd:elem>|Unspecified|BaseIndex, RegXMM, RegXMM }
 vaddsubpd, 0x66d0, AVX, Modrm|Vex|Space0F|Src1VVVV|VexWIG|CheckOperandSize|NoSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
 vaddsubps, 0xf2d0, AVX, Modrm|Vex|Space0F|Src1VVVV|VexWIG|CheckOperandSize|NoSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
-vandnp<sd>, 0x<sd:ppfx>55, AVX, Modrm|Vex|Space0F|Src1VVVV|VexWIG|CheckOperandSize|NoSuf|Optimize, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
-vandp<sd>, 0x<sd:ppfx>54, AVX, Modrm|C|Vex|Space0F|Src1VVVV|VexWIG|CheckOperandSize|NoSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
+v<flog>p<sd>, 0x<sd:ppfx><flog:opc>, AVX, Modrm|Vex|Space0F|Src1VVVV|VexWIG|<flog:comm>|CheckOperandSize|NoSuf|<flog:optim>, { RegXMM|RegYMM|Unspecified|BaseIndex, RegXMM|RegYMM, RegXMM|RegYMM }
 vblendp<sd>, 0x660c | <sd:opc>, AVX, Modrm|Vex|Space0F3A|Src1VVVV|VexWIG|CheckOperandSize|NoSuf, { Imm8|Imm8S, Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
 vblendvp<sd>, 0x664a | <sd:opc>, AVX, Modrm|Vex|Space0F3A|Src1VVVV|VexW0|CheckOperandSize|NoSuf, { RegXMM|RegYMM, Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
 vbroadcastf128, 0x661a, AVX, Modrm|Vex256|Space0F38|VexW0|NoSuf, { Xmmword|Unspecified|BaseIndex, RegYMM }
-// vbroadcastf32x4 in disguise (see vround{p,s}{s,d} comment)
-vbroadcastf128, 0x661a, APX_F&AVX512VL, Modrm|EVex256|Space0F38|VexW0|Disp8MemShift=4|NoSuf, { Xmmword|Unspecified|BaseIndex, RegYMM }
 vbroadcastsd, 0x6619, AVX, Modrm|Vex256|Space0F38|VexW0|NoSuf, { Qword|Unspecified|BaseIndex, RegYMM }
 vbroadcastss, 0x6618, AVX, Modrm|Vex128|Space0F38|VexW0|NoSuf, { Dword|Unspecified|BaseIndex, RegXMM|RegYMM }
 vcmp<frel>p<sd>, 0x<sd:ppfx>c2/0x<frel:imm>, AVX, Modrm|<frel:comm>|Vex|Space0F|Src1VVVV|VexWIG|CheckOperandSize|NoSuf|ImmExt, { RegXMM|RegYMM|Unspecified|BaseIndex, RegXMM|RegYMM, RegXMM|RegYMM }
@@ -1689,32 +1662,22 @@ vcvtss2sd, 0xf35a, AVX, Modrm|Vex=3|Space0F|Src1VVVV|VexWIG|NoSuf, { Dword|Unspe
 vcvttpd2dq<Vxy>, 0x66e6, AVX, Modrm|<Vxy:vex>|Space0F|VexWIG|NoSuf|<Vxy:syntax>, { <Vxy:src>, RegXMM }
 vcvttps2dq, 0xf35b, AVX, Modrm|Vex|Space0F|VexWIG|NoSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM }
 vcvtts<sd>2si, 0x<sd:spfx>2c, AVX, Modrm|VexLIG|Space0F|No_bSuf|No_wSuf|No_sSuf, { <sd:elem>|Unspecified|BaseIndex|RegXMM, Reg32|Reg64 }
-vdivp<sd>, 0x<sd:ppfx>5e, AVX, Modrm|Vex|Space0F|Src1VVVV|VexWIG|CheckOperandSize|NoSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
-vdivs<sd>, 0x<sd:spfx>5e, AVX, Modrm|VexLIG|Space0F|Src1VVVV|VexWIG|NoSuf, { <sd:elem>|Unspecified|BaseIndex|RegXMM, RegXMM, RegXMM }
 vdppd, 0x6641, AVX, Modrm|Vex|Space0F3A|Src1VVVV|VexWIG|NoSuf, { Imm8|Imm8S, Unspecified|BaseIndex|RegXMM, RegXMM, RegXMM }
 vdpps, 0x6640, AVX, Modrm|Vex|Space0F3A|Src1VVVV|VexWIG|CheckOperandSize|NoSuf, { Imm8|Imm8S, Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
-vextractf128, 0x6619, AVX, Modrm|Vex256|Space0F3A|VexW0|NoSuf, { Imm8, RegYMM, Unspecified|BaseIndex|RegXMM }
-// vextractf32x4 in disguise (see vround{p,s}{s,d} comment)
-vextractf128, 0x6619, APX_F&AVX512VL, Modrm|EVex256|Space0F3A|VexW0|Disp8MemShift=4|NoSuf, { Imm8, RegYMM, Xmmword|Unspecified|BaseIndex }
-vextractps, 0x6617, AVX|AVX512F, Modrm|Vex128|EVex128|Space0F3A|VexWIG|Disp8MemShift=2|NoSuf, { Imm8, RegXMM, Reg32|Unspecified|BaseIndex }
-vextractps, 0x6617, x64&(AVX|AVX512F), RegMem|Vex128|EVex128|Space0F3A|VexWIG|NoSuf, { Imm8, RegXMM, Reg64 }
+vextractf128, 0x6619, AVX, Modrm|Vex256|Space0F3A|VexW0|NoSuf|Optimize, { Imm8, RegYMM, Unspecified|BaseIndex|RegXMM }
+vextractps, 0x6617, AVX|AVX512F, Modrm|Vex128|EVex128|Space0F3A|VexWIG|Disp8MemShift=2|NoSuf|Optimize, { Imm8, RegXMM, Reg32|Unspecified|BaseIndex }
+vextractps, 0x6617, x64&(AVX|AVX512F), RegMem|Vex128|EVex128|Space0F3A|VexWIG|NoSuf|Optimize, { Imm8, RegXMM, Reg64 }
 vhaddpd, 0x667c, AVX, Modrm|Vex|Space0F|Src1VVVV|VexWIG|CheckOperandSize|NoSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
 vhaddps, 0xf27c, AVX, Modrm|Vex|Space0F|Src1VVVV|VexWIG|CheckOperandSize|NoSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
 vhsubpd, 0x667d, AVX, Modrm|Vex|Space0F|Src1VVVV|VexWIG|CheckOperandSize|NoSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
 vhsubps, 0xf27d, AVX, Modrm|Vex|Space0F|Src1VVVV|VexWIG|CheckOperandSize|NoSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
 vinsertf128, 0x6618, AVX, Modrm|Vex256|Space0F3A|Src1VVVV|VexW0|NoSuf, { Imm8, Unspecified|BaseIndex|RegXMM, RegYMM, RegYMM }
-// vinsertf32x4 in disguise (see vround{p,s}{s,d} comment)
-vinsertf128, 0x6618, APX_F&AVX512VL, Modrm|EVex256|Space0F3A|Src1VVVV|VexW0|Disp8MemShift=4|NoSuf, { Imm8, Xmmword|Unspecified|BaseIndex, RegYMM, RegYMM }
-vinsertps, 0x6621, AVX, Modrm|Vex|Space0F3A|Src1VVVV|VexWIG|NoSuf, { Imm8, Dword|Unspecified|BaseIndex|RegXMM, RegXMM, RegXMM }
+vinsertps, 0x6621, AVX, Modrm|Vex|Space0F3A|Src1VVVV|VexWIG|NoSuf|Optimize, { Imm8, Dword|Unspecified|BaseIndex|RegXMM, RegXMM, RegXMM }
 vlddqu, 0xf2f0, AVX, Modrm|Vex|Space0F|VexWIG|CheckOperandSize|NoSuf, { Xmmword|Ymmword|Unspecified|BaseIndex, RegXMM|RegYMM }
 vldmxcsr, 0xae/2, AVX, Modrm|Vex128|Space0F|VexWIG|NoSuf, { Dword|Unspecified|BaseIndex }
 vmaskmovdqu, 0x66f7, AVX, Modrm|Vex|Space0F|VexWIG|NoSuf, { RegXMM, RegXMM }
 vmaskmovp<sd>, 0x662e | <sd:opc>, AVX, Modrm|Vex|Space0F38|Src1VVVV|VexW0|CheckOperandSize|NoSuf, { RegXMM|RegYMM, RegXMM|RegYMM, Xmmword|Ymmword|Unspecified|BaseIndex }
 vmaskmovp<sd>, 0x662c | <sd:opc>, AVX, Modrm|Vex|Space0F38|Src1VVVV|VexW0|CheckOperandSize|NoSuf, { Xmmword|Ymmword|Unspecified|BaseIndex, RegXMM|RegYMM, RegXMM|RegYMM }
-vmaxp<sd>, 0x<sd:ppfx>5f, AVX, Modrm|Vex|Space0F|Src1VVVV|VexWIG|CheckOperandSize|NoSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
-vmaxs<sd>, 0x<sd:spfx>5f, AVX, Modrm|VexLIG|Space0F|Src1VVVV|VexWIG|NoSuf, { <sd:elem>|Unspecified|BaseIndex|RegXMM, RegXMM, RegXMM }
-vminp<sd>, 0x<sd:ppfx>5d, AVX, Modrm|Vex|Space0F|Src1VVVV|VexWIG|CheckOperandSize|NoSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
-vmins<sd>, 0x<sd:spfx>5d, AVX, Modrm|VexLIG|Space0F|Src1VVVV|VexWIG|NoSuf, { <sd:elem>|Unspecified|BaseIndex|RegXMM, RegXMM, RegXMM }
 vmovap<sd>, 0x<sd:ppfx>28, AVX, D|Modrm|Vex|Space0F|VexWIG|CheckOperandSize|NoSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM }
 // vmovd really shouldn't allow for 64bit operand (vmovq is the right
 // mnemonic for copying between Reg64/Mem64 and RegXMM, as is mandated
@@ -1746,9 +1709,6 @@ vmovshdup, 0xf316, AVX, Modrm|Vex|Space0F|VexWIG|CheckOperandSize|NoSuf, { Unspe
 vmovsldup, 0xf312, AVX, Modrm|Vex|Space0F|VexWIG|CheckOperandSize|NoSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM }
 vmovup<sd>, 0x<sd:ppfx>10, AVX, D|Modrm|Vex|Space0F|VexWIG|CheckOperandSize|NoSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM }
 vmpsadbw, 0x6642, AVX|AVX2, Modrm|Vex|Space0F3A|Src1VVVV|VexWIG|CheckOperandSize|NoSuf, { Imm8|Imm8S, Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
-vmulp<sd>, 0x<sd:ppfx>59, AVX, Modrm|Vex|Space0F|Src1VVVV|VexWIG|CheckOperandSize|NoSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
-vmuls<sd>, 0x<sd:spfx>59, AVX, Modrm|VexLIG|Space0F|Src1VVVV|VexWIG|NoSuf, { <sd:elem>|Unspecified|BaseIndex|RegXMM, RegXMM, RegXMM }
-vorp<sd>, 0x<sd:ppfx>56, AVX, Modrm|C|Vex|Space0F|Src1VVVV|VexWIG|CheckOperandSize|NoSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
 vpabs<bw>, 0x661c | <bw:opc>, AVX|AVX2, Modrm|Vex|Space0F38|VexWIG|CheckOperandSize|NoSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM }
 vpabsd, 0x661e, AVX|AVX2, Modrm|Vex|Space0F38|VexWIG|CheckOperandSize|NoSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM }
 vpackssdw, 0x666b, AVX|AVX2, Modrm|Vex|Space0F|Src1VVVV|VexWIG|CheckOperandSize|NoSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
@@ -1814,18 +1774,12 @@ vpminub, 0x66da, AVX|AVX2, Modrm|C|Vex|Space0F|Src1VVVV|VexWIG|CheckOperandSize|
 vpminud, 0x663b, AVX|AVX2, Modrm|Vex|Space0F38|Src1VVVV|VexWIG|CheckOperandSize|NoSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
 vpminuw, 0x663a, AVX|AVX2, Modrm|Vex|Space0F38|Src1VVVV|VexWIG|CheckOperandSize|NoSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
 vpmovmskb, 0x66d7, AVX|AVX2, Modrm|Vex|Space0F|VexWIG|No_bSuf|No_wSuf|No_sSuf, { RegXMM|RegYMM, Reg32|Reg64 }
-vpmovsxbd, 0x6621, AVX|AVX512VL, Modrm|Vex128|EVex128|Masking|Space0F38|VexWIG|Disp8MemShift=2|NoSuf, { RegXMM|Dword|Unspecified|BaseIndex, RegXMM }
-vpmovsxbq, 0x6622, AVX|AVX512VL, Modrm|Vex128|EVex128|Masking|Space0F38|VexWIG|Disp8MemShift=1|NoSuf, { RegXMM|Word|Unspecified|BaseIndex, RegXMM }
-vpmovsxbw, 0x6620, AVX, Modrm|Vex|Space0F38|VexWIG|NoSuf, { Qword|Unspecified|BaseIndex|RegXMM, RegXMM }
-vpmovsxdq, 0x6625, AVX, Modrm|Vex|Space0F38|VexWIG|NoSuf, { Qword|Unspecified|BaseIndex|RegXMM, RegXMM }
-vpmovsxwd, 0x6623, AVX|AVX512VL, Modrm|Vex128|EVex128|Masking|Space0F38|VexWIG|Disp8MemShift=3|NoSuf, { RegXMM|Qword|Unspecified|BaseIndex, RegXMM }
-vpmovsxwq, 0x6624, AVX|AVX512VL, Modrm|Vex128|EVex128|Masking|Space0F38|VexWIG|Disp8MemShift=2|NoSuf, { RegXMM|Dword|Unspecified|BaseIndex, RegXMM }
-vpmovzxbd, 0x6631, AVX|AVX512VL, Modrm|Vex128|EVex128|Masking|Space0F38|VexWIG|Disp8MemShift=2|NoSuf, { RegXMM|Dword|Unspecified|BaseIndex, RegXMM }
-vpmovzxbq, 0x6632, AVX|AVX512VL, Modrm|Vex128|EVex128|Masking|Space0F38|VexWIG|Disp8MemShift=1|NoSuf, { RegXMM|Word|Unspecified|BaseIndex, RegXMM }
-vpmovzxbw, 0x6630, AVX, Modrm|Vex|Space0F38|VexWIG|NoSuf, { Qword|Unspecified|BaseIndex|RegXMM, RegXMM }
-vpmovzxdq, 0x6635, AVX, Modrm|Vex|Space0F38|VexWIG|NoSuf, { Qword|Unspecified|BaseIndex|RegXMM, RegXMM }
-vpmovzxwd, 0x6633, AVX|AVX512VL, Modrm|Vex128|EVex128|Masking|Space0F38|VexWIG|Disp8MemShift=3|NoSuf, { RegXMM|Qword|Unspecified|BaseIndex, RegXMM }
-vpmovzxwq, 0x6634, AVX|AVX512VL, Modrm|Vex128|EVex128|Masking|Space0F38|VexWIG|Disp8MemShift=2|NoSuf, { RegXMM|Dword|Unspecified|BaseIndex, RegXMM }
+vp<movx>bd, 0x66<movx:opc>1, AVX|AVX512VL, Modrm|Vex128|EVex128|Masking|Space0F38|VexWIG|Disp8MemShift=2|NoSuf, { RegXMM|Dword|Unspecified|BaseIndex, RegXMM }
+vp<movx>bq, 0x66<movx:opc>2, AVX|AVX512VL, Modrm|Vex128|EVex128|Masking|Space0F38|VexWIG|Disp8MemShift=1|NoSuf, { RegXMM|Word|Unspecified|BaseIndex, RegXMM }
+vp<movx>bw, 0x66<movx:opc>0, AVX, Modrm|Vex|Space0F38|VexWIG|NoSuf, { Qword|Unspecified|BaseIndex|RegXMM, RegXMM }
+vp<movx>dq, 0x66<movx:opc>5, AVX, Modrm|Vex|Space0F38|VexWIG|NoSuf, { Qword|Unspecified|BaseIndex|RegXMM, RegXMM }
+vp<movx>wd, 0x66<movx:opc>3, AVX|AVX512VL, Modrm|Vex128|EVex128|Masking|Space0F38|VexWIG|Disp8MemShift=3|NoSuf, { RegXMM|Qword|Unspecified|BaseIndex, RegXMM }
+vp<movx>wq, 0x66<movx:opc>4, AVX|AVX512VL, Modrm|Vex128|EVex128|Masking|Space0F38|VexWIG|Disp8MemShift=2|NoSuf, { RegXMM|Dword|Unspecified|BaseIndex, RegXMM }
 vpmuldq, 0x6628, AVX|AVX2, Modrm|Vex|Space0F38|Src1VVVV|VexWIG|CheckOperandSize|NoSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
 vpmulhrsw, 0x660b, AVX|AVX2, Modrm|Vex|Space0F38|Src1VVVV|VexWIG|CheckOperandSize|NoSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
 vpmulhuw, 0x66e4, AVX|AVX2, Modrm|C|Vex|Space0F|Src1VVVV|VexWIG|CheckOperandSize|NoSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
@@ -1873,47 +1827,32 @@ vrcpps, 0x53, AVX, Modrm|Vex|Space0F|VexWIG|CheckOperandSize|NoSuf, { Unspecifie
 vrcpss, 0xf353, AVX, Modrm|Vex=3|Space0F|Src1VVVV|VexWIG|NoSuf, { Dword|Unspecified|BaseIndex|RegXMM, RegXMM, RegXMM }
 vroundp<sd>, 0x6608 | <sd:opc>, AVX, Modrm|Vex|Space0F3A|VexWIG|CheckOperandSize|NoSuf, { Imm8, Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM }
 vrounds<sd>, 0x660a | <sd:opc>, AVX, Modrm|VexLIG|Space0F3A|Src1VVVV|VexWIG|NoSuf, { Imm8, <sd:elem>|Unspecified|BaseIndex|RegXMM, RegXMM, RegXMM }
-// These are really clones of VRNDSCALE{P,S}{S,D}, with broadcast, masking, SAE,
-// 512-bit operand size, and register sources dropped.
-vroundp<sd>, 0x6608 | <sd:opc>, APX_F&AVX512VL, Modrm|Space0F3A|<sd:vexw>|Disp8ShiftVL|CheckOperandSize|NoSuf, { Imm8, Xmmword|Ymmword|Unspecified|BaseIndex, RegXMM|RegYMM }
-vrounds<sd>, 0x660a | <sd:opc>, APX_F&AVX512F, Modrm|EVexLIG|Space0F3A|Src1VVVV|<sd:vexw>|Disp8MemShift|NoSuf, { Imm8, <sd:elem>|Unspecified|BaseIndex, RegXMM, RegXMM }
 vrsqrtps, 0x52, AVX, Modrm|Vex|Space0F|VexWIG|CheckOperandSize|NoSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM }
 vrsqrtss, 0xf352, AVX, Modrm|Vex=3|Space0F|Src1VVVV|VexWIG|NoSuf, { Dword|Unspecified|BaseIndex|RegXMM, RegXMM, RegXMM }
 vshufp<sd>, 0x<sd:ppfx>c6, AVX, Modrm|Vex|Space0F|Src1VVVV|VexWIG|CheckOperandSize|NoSuf, { Imm8|Imm8S, Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
 vsqrtp<sd>, 0x<sd:ppfx>51, AVX, Modrm|Vex|Space0F|VexWIG|CheckOperandSize|NoSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM }
 vsqrts<sd>, 0x<sd:spfx>51, AVX, Modrm|VexLIG|Space0F|Src1VVVV|VexWIG|NoSuf, { <sd:elem>|Unspecified|BaseIndex|RegXMM, RegXMM, RegXMM }
 vstmxcsr, 0xae/3, AVX, Modrm|Vex128|Space0F|VexWIG|NoSuf, { Dword|Unspecified|BaseIndex }
-vsubp<sd>, 0x<sd:ppfx>5c, AVX, Modrm|Vex|Space0F|Src1VVVV|VexWIG|CheckOperandSize|NoSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
-vsubs<sd>, 0x<sd:spfx>5c, AVX, Modrm|VexLIG|Space0F|Src1VVVV|VexWIG|NoSuf, { <sd:elem>|Unspecified|BaseIndex|RegXMM, RegXMM, RegXMM }
 vtestp<sd>, 0x660e | <sd:opc>, AVX, Modrm|Vex|Space0F38|VexW0|CheckOperandSize|NoSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM }
 vucomis<sd>, 0x<sd:ppfx>2e, AVX, Modrm|VexLIG|Space0F|VexWIG|NoSuf, { <sd:elem>|Unspecified|BaseIndex|RegXMM, RegXMM }
 vunpckhp<sd>, 0x<sd:ppfx>15, AVX, Modrm|Vex|Space0F|Src1VVVV|VexWIG|CheckOperandSize|NoSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
 vunpcklp<sd>, 0x<sd:ppfx>14, AVX, Modrm|Vex|Space0F|Src1VVVV|VexWIG|CheckOperandSize|NoSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
-vxorp<sd>, 0x<sd:ppfx>57, AVX, Modrm|C|Vex|Space0F|Src1VVVV|VexWIG|CheckOperandSize|NoSuf|Optimize, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
 vzeroall, 0x77, AVX, Vex=2|Space0F|VexWIG|NoSuf, {}
 vzeroupper, 0x77, AVX, Vex|Space0F|VexWIG|NoSuf, {}
 
 
 // 256bit integer AVX2 instructions.
 
-vpmovsxbd, 0x6621, AVX2|AVX512VL, Modrm|Vex256|EVex256|Masking|Space0F38|VexWIG|Disp8MemShift=3|NoSuf, { RegXMM|Qword|Unspecified|BaseIndex, RegYMM }
-vpmovsxbq, 0x6622, AVX2|AVX512VL, Modrm|Vex256|EVex256|Masking|Space0F38|VexWIG|Disp8MemShift=2|NoSuf, { RegXMM|Dword|Unspecified|BaseIndex, RegYMM }
-vpmovsxbw, 0x6620, AVX2, Modrm|Vex=2|Space0F38|VexWIG|NoSuf, { Unspecified|BaseIndex|RegXMM, RegYMM }
-vpmovsxdq, 0x6625, AVX2, Modrm|Vex=2|Space0F38|VexWIG|NoSuf, { Unspecified|BaseIndex|RegXMM, RegYMM }
-vpmovsxwd, 0x6623, AVX2|AVX512VL, Modrm|Vex256|EVex256|Masking|Space0F38|VexWIG|Disp8MemShift=4|NoSuf, { RegXMM|Unspecified|BaseIndex, RegYMM }
-vpmovsxwq, 0x6624, AVX2|AVX512VL, Modrm|Vex256|EVex256|Masking|Space0F38|VexWIG|Disp8MemShift=3|NoSuf, { RegXMM|Qword|Unspecified|BaseIndex, RegYMM }
-vpmovzxbd, 0x6631, AVX2|AVX512VL, Modrm|Vex256|EVex256|Masking|Space0F38|VexWIG|Disp8MemShift=3|NoSuf, { RegXMM|Qword|Unspecified|BaseIndex, RegYMM }
-vpmovzxbq, 0x6632, AVX2|AVX512VL, Modrm|Vex256|EVex256|Masking|Space0F38|VexWIG|Disp8MemShift=2|NoSuf, { RegXMM|Dword|Unspecified|BaseIndex, RegYMM }
-vpmovzxbw, 0x6630, AVX2, Modrm|Vex=2|Space0F38|VexWIG|NoSuf, { Unspecified|BaseIndex|RegXMM, RegYMM }
-vpmovzxdq, 0x6635, AVX2, Modrm|Vex=2|Space0F38|VexWIG|NoSuf, { Unspecified|BaseIndex|RegXMM, RegYMM }
-vpmovzxwd, 0x6633, AVX2|AVX512VL, Modrm|Vex256|EVex256|Masking|Space0F38|VexWIG|Disp8MemShift=4|NoSuf, { RegXMM|Unspecified|BaseIndex, RegYMM }
-vpmovzxwq, 0x6634, AVX2|AVX512VL, Modrm|Vex256|EVex256|Masking|Space0F38|VexWIG|Disp8MemShift=3|NoSuf, { RegXMM|Qword|Unspecified|BaseIndex, RegYMM }
+vp<movx>bd, 0x66<movx:opc>1, AVX2|AVX512VL, Modrm|Vex256|EVex256|Masking|Space0F38|VexWIG|Disp8MemShift=3|NoSuf, { RegXMM|Qword|Unspecified|BaseIndex, RegYMM }
+vp<movx>bq, 0x66<movx:opc>2, AVX2|AVX512VL, Modrm|Vex256|EVex256|Masking|Space0F38|VexWIG|Disp8MemShift=2|NoSuf, { RegXMM|Dword|Unspecified|BaseIndex, RegYMM }
+vp<movx>bw, 0x66<movx:opc>0, AVX2, Modrm|Vex=2|Space0F38|VexWIG|NoSuf, { Unspecified|BaseIndex|RegXMM, RegYMM }
+vp<movx>dq, 0x66<movx:opc>5, AVX2, Modrm|Vex=2|Space0F38|VexWIG|NoSuf, { Unspecified|BaseIndex|RegXMM, RegYMM }
+vp<movx>wd, 0x66<movx:opc>3, AVX2|AVX512VL, Modrm|Vex256|EVex256|Masking|Space0F38|VexWIG|Disp8MemShift=4|NoSuf, { RegXMM|Unspecified|BaseIndex, RegYMM }
+vp<movx>wq, 0x66<movx:opc>4, AVX2|AVX512VL, Modrm|Vex256|EVex256|Masking|Space0F38|VexWIG|Disp8MemShift=3|NoSuf, { RegXMM|Qword|Unspecified|BaseIndex, RegYMM }
 
 // New AVX2 instructions.
 
 vbroadcasti128, 0x665A, AVX2, Modrm|Vex256|Space0F38|VexW0|NoSuf, { Xmmword|Unspecified|BaseIndex, RegYMM }
-// vbroadcasti32x4 in disguise (see vround{p,s}{s,d} comment)
-vbroadcasti128, 0x665a, APX_F&AVX512VL, Modrm|EVex256|Space0F38|VexW0|Disp8MemShift=4|NoSuf, { Xmmword|Unspecified|BaseIndex, RegYMM }
 vbroadcastsd, 0x6619, AVX2, Modrm|Vex=2|Space0F38|VexW=1|NoSuf, { RegXMM, RegYMM }
 vbroadcastss, 0x6618, AVX2|AVX512F, Modrm|Vex|EVexDYN|Masking|Space0F38|VexW0|Disp8MemShift=2|NoSuf, { RegXMM|Dword|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM }
 vpblendd, 0x6602, AVX2, Modrm|Vex|Space0F3A|Src1VVVV|VexW0|CheckOperandSize|NoSuf, { Imm8|Imm8S, Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
@@ -1925,12 +1864,8 @@ vpermd, 0x6636, AVX2|AVX512F, Modrm|Vex256|EVexDYN|Masking|Space0F38|Src1VVVV|Ve
 vpermpd, 0x6601, AVX2|AVX512F, Modrm|Vex256|EVexDYN|Masking|Space0F3A|VexW1|Broadcast|Disp8ShiftVL|CheckOperandSize|NoSuf, { Imm8|Imm8S, RegYMM|RegZMM|Qword|Unspecified|BaseIndex, RegYMM|RegZMM }
 vpermps, 0x6616, AVX2|AVX512F, Modrm|Vex256|EVexDYN|Masking|Space0F38|Src1VVVV|VexW0|Broadcast|Disp8ShiftVL|CheckOperandSize|NoSuf, { RegYMM|RegZMM|Dword|Unspecified|BaseIndex, RegYMM|RegZMM, RegYMM|RegZMM }
 vpermq, 0x6600, AVX2|AVX512F, Modrm|Vex256|EVexDYN|Masking|Space0F3A|VexW1|Broadcast|Disp8ShiftVL|CheckOperandSize|NoSuf, { Imm8|Imm8S, RegYMM|RegZMM|Qword|Unspecified|BaseIndex, RegYMM|RegZMM }
-vextracti128, 0x6639, AVX2, Modrm|Vex256|Space0F3A|VexW0|NoSuf, { Imm8, RegYMM, Unspecified|BaseIndex|RegXMM }
-// vextracti32x4 in disguise (see vround{p,s}{s,d} comment)
-vextracti128, 0x6639, APX_F&AVX512VL, Modrm|EVex256|Space0F3A|VexW0|Disp8MemShift=4|NoSuf, { Imm8, RegYMM, Xmmword|Unspecified|BaseIndex }
+vextracti128, 0x6639, AVX2, Modrm|Vex256|Space0F3A|VexW0|NoSuf|Optimize, { Imm8, RegYMM, Unspecified|BaseIndex|RegXMM }
 vinserti128, 0x6638, AVX2, Modrm|Vex256|Space0F3A|Src1VVVV|VexW0|NoSuf, { Imm8, Unspecified|BaseIndex|RegXMM, RegYMM, RegYMM }
-// vinserti32x4 in disguise (see vround{p,s}{s,d} comment)
-vinserti128, 0x6638, APX_F&AVX512VL, Modrm|EVex256|Space0F3A|Src1VVVV|VexW0|Disp8MemShift=4|NoSuf, { Imm8, Xmmword|Unspecified|BaseIndex, RegYMM, RegYMM }
 vpmaskmov<dq>, 0x668e, AVX2, Modrm|Vex|Space0F38|Src1VVVV|<dq:vexw>|CheckOperandSize|NoSuf, { RegXMM|RegYMM, RegXMM|RegYMM, Xmmword|Ymmword|Unspecified|BaseIndex }
 vpmaskmov<dq>, 0x668c, AVX2, Modrm|Vex|Space0F38|Src1VVVV|<dq:vexw>|CheckOperandSize|NoSuf, { Xmmword|Ymmword|Unspecified|BaseIndex, RegXMM|RegYMM, RegXMM|RegYMM }
 vpsllv<dq>, 0x6647, AVX2|AVX512F, Modrm|Vex|EVexDYN|Masking|Space0F38|Src1VVVV|<dq:vexw>|Broadcast|Disp8ShiftVL|CheckOperandSize|NoSuf, { RegXMM|RegYMM|RegZMM|<dq:elem>|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM, RegXMM|RegYMM|RegZMM }
@@ -1988,6 +1923,8 @@ vcvtps2ph, 0x661d, F16C, Modrm|Vex=2|Space0F3A|VexW=1|NoSuf, { Imm8, RegYMM, Uns
 
 // FMA instructions
 
+<fm:opc3:opc4, fmadd:88:68, fmsub:8a:6c, fnmadd:8c:78, fnmsub:8e:7c>
+
 <fma:opc, 132:10, 213:20, 231:30>
 
 <sdh:cpu:cpudq:fma:ppfx:spfx:pfx:spc1:spc2:opc:vex:vexlig:vexw:elem, +
@@ -1995,16 +1932,10 @@ vcvtps2ph, 0x661d, F16C, Modrm|Vex=2|Space0F3A|VexW=1|NoSuf, { Imm8, RegYMM, Uns
     d:AVX512F:AVX512DQ:FMA|AVX512F:66:f2:66:Space0F:Space0F38:1:Vex|EVexDYN:VexLIG|EVexLIG:VexW1:Qword, +
     h:AVX512_FP16:AVX512_FP16:AVX512_FP16::f3::EVexMap5:EVexMap6:0::EVexLIG:VexW0:Word>
 
-vfmadd<fma>p<sdh>, 0x6688 | 0x<fma:opc>, <sdh:fma>, Modrm|<sdh:vex>|Masking|<sdh:spc2>|Src1VVVV|<sdh:vexw>|Broadcast|Disp8ShiftVL|CheckOperandSize|NoSuf|StaticRounding|SAE, { RegXMM|RegYMM|RegZMM|<sdh:elem>|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM, RegXMM|RegYMM|RegZMM }
-vfmadd<fma>s<sdh>, 0x6689 | 0x<fma:opc>, <sdh:fma>, Modrm|<sdh:vexlig>|Masking|<sdh:spc2>|Src1VVVV|<sdh:vexw>|Disp8MemShift|NoSuf|StaticRounding|SAE, { RegXMM|<sdh:elem>|Unspecified|BaseIndex, RegXMM, RegXMM }
+v<fm><fma>p<sdh>, 0x66<fm:opc3> | 0x<fma:opc>, <sdh:fma>, Modrm|<sdh:vex>|Masking|<sdh:spc2>|Src1VVVV|<sdh:vexw>|Broadcast|Disp8ShiftVL|CheckOperandSize|NoSuf|StaticRounding|SAE, { RegXMM|RegYMM|RegZMM|<sdh:elem>|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM, RegXMM|RegYMM|RegZMM }
+v<fm><fma>s<sdh>, 0x66<fm:opc3> | 1 | 0x<fma:opc>, <sdh:fma>, Modrm|<sdh:vexlig>|Masking|<sdh:spc2>|Src1VVVV|<sdh:vexw>|Disp8MemShift|NoSuf|StaticRounding|SAE, { RegXMM|<sdh:elem>|Unspecified|BaseIndex, RegXMM, RegXMM }
 vfmaddsub<fma>p<sdh>, 0x6686 | 0x<fma:opc>, <sdh:fma>, Modrm|<sdh:vex>|Masking|<sdh:spc2>|Src1VVVV|<sdh:vexw>|Broadcast|Disp8ShiftVL|CheckOperandSize|NoSuf|StaticRounding|SAE, { RegXMM|RegYMM|RegZMM|<sdh:elem>|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM, RegXMM|RegYMM|RegZMM }
-vfmsub<fma>p<sdh>, 0x668a | 0x<fma:opc>, <sdh:fma>, Modrm|<sdh:vex>|Masking|<sdh:spc2>|Src1VVVV|<sdh:vexw>|Broadcast|Disp8ShiftVL|CheckOperandSize|NoSuf|StaticRounding|SAE, { RegXMM|RegYMM|RegZMM|<sdh:elem>|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM, RegXMM|RegYMM|RegZMM }
-vfmsub<fma>s<sdh>, 0x668b | 0x<fma:opc>, <sdh:fma>, Modrm|<sdh:vexlig>|Masking|<sdh:spc2>|Src1VVVV|<sdh:vexw>|Disp8MemShift|NoSuf|StaticRounding|SAE, { RegXMM|<sdh:elem>|Unspecified|BaseIndex, RegXMM, RegXMM }
 vfmsubadd<fma>p<sdh>, 0x6687 | 0x<fma:opc>, <sdh:fma>, Modrm|<sdh:vex>|Masking|<sdh:spc2>|Src1VVVV|<sdh:vexw>|Broadcast|Disp8ShiftVL|CheckOperandSize|NoSuf|StaticRounding|SAE, { RegXMM|RegYMM|RegZMM|<sdh:elem>|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM, RegXMM|RegYMM|RegZMM }
-vfnmadd<fma>p<sdh>, 0x668c | 0x<fma:opc>, <sdh:fma>, Modrm|<sdh:vex>|Masking|<sdh:spc2>|Src1VVVV|<sdh:vexw>|Broadcast|Disp8ShiftVL|CheckOperandSize|NoSuf|StaticRounding|SAE, { RegXMM|RegYMM|RegZMM|<sdh:elem>|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM, RegXMM|RegYMM|RegZMM }
-vfnmadd<fma>s<sdh>, 0x668d | 0x<fma:opc>, <sdh:fma>, Modrm|<sdh:vexlig>|Masking|<sdh:spc2>|Src1VVVV|<sdh:vexw>|Disp8MemShift|NoSuf|StaticRounding|SAE, { RegXMM|<sdh:elem>|Unspecified|BaseIndex, RegXMM, RegXMM }
-vfnmsub<fma>p<sdh>, 0x668e | 0x<fma:opc>, <sdh:fma>, Modrm|<sdh:vex>|Masking|<sdh:spc2>|Src1VVVV|<sdh:vexw>|Broadcast|Disp8ShiftVL|CheckOperandSize|NoSuf|StaticRounding|SAE, { RegXMM|RegYMM|RegZMM|<sdh:elem>|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM, RegXMM|RegYMM|RegZMM }
-vfnmsub<fma>s<sdh>, 0x668f | 0x<fma:opc>, <sdh:fma>, Modrm|<sdh:vexlig>|Masking|<sdh:spc2>|Src1VVVV|<sdh:vexw>|Disp8MemShift|NoSuf|StaticRounding|SAE, { RegXMM|<sdh:elem>|Unspecified|BaseIndex, RegXMM, RegXMM }
 
 // HLE prefixes
 
@@ -2030,16 +1961,10 @@ shrx, 0xf2f7, APX_F(BMI2), Modrm|CheckOperandSize|Vex128|EVex128|Space0F38|Src2V
 
 // FMA4 instructions
 
-vfmaddp<sd>, 0x6668 | <sd:opc>, FMA4, D|Modrm|Vex|Space0F3A|Src1VVVV|VexW1|CheckOperandSize|NoSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
-vfmadds<sd>, 0x666a | <sd:opc>, FMA4, D|Modrm|VexLIG|Space0F3A|Src1VVVV|VexW1|NoSuf, { <sd:elem>|Unspecified|BaseIndex|RegXMM, RegXMM, RegXMM, RegXMM }
+v<fm>p<sd>, 0x66<fm:opc4> | <sd:opc>, FMA4, D|Modrm|Vex|Space0F3A|Src1VVVV|VexW1|CheckOperandSize|NoSuf, { RegXMM|RegYMM|Unspecified|BaseIndex, RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
+v<fm>s<sd>, 0x66<fm:opc4> | 2 | <sd:opc>, FMA4, D|Modrm|VexLIG|Space0F3A|Src1VVVV|VexW1|NoSuf, { RegXMM|<sd:elem>|Unspecified|BaseIndex, RegXMM, RegXMM, RegXMM }
 vfmaddsubp<sd>, 0x665c | <sd:opc>, FMA4, D|Modrm|Vex|Space0F3A|Src1VVVV|VexW1|CheckOperandSize|NoSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
 vfmsubaddp<sd>, 0x665e | <sd:opc>, FMA4, D|Modrm|Vex|Space0F3A|Src1VVVV|VexW1|CheckOperandSize|NoSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
-vfmsubp<sd>, 0x666c | <sd:opc>, FMA4, D|Modrm|Vex|Space0F3A|Src1VVVV|VexW1|CheckOperandSize|NoSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
-vfmsubs<sd>, 0x666e | <sd:opc>, FMA4, D|Modrm|VexLIG|Space0F3A|Src1VVVV|VexW1|NoSuf, { <sd:elem>|Unspecified|BaseIndex|RegXMM, RegXMM, RegXMM, RegXMM }
-vfnmaddp<sd>, 0x6678 | <sd:opc>, FMA4, D|Modrm|Vex|Space0F3A|Src1VVVV|VexW1|CheckOperandSize|NoSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
-vfnmadds<sd>, 0x667a | <sd:opc>, FMA4, D|Modrm|VexLIG|Space0F3A|Src1VVVV|VexW1|NoSuf, { <sd:elem>|Unspecified|BaseIndex|RegXMM, RegXMM, RegXMM, RegXMM }
-vfnmsubp<sd>, 0x667c | <sd:opc>, FMA4, D|Modrm|Vex|Space0F3A|Src1VVVV|VexW1|CheckOperandSize|NoSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
-vfnmsubs<sd>, 0x667e | <sd:opc>, FMA4, D|Modrm|VexLIG|Space0F3A|Src1VVVV|VexW1|NoSuf, { <sd:elem>|Unspecified|BaseIndex|RegXMM, RegXMM, RegXMM, RegXMM }
 
 // XOP instructions
 
@@ -2292,10 +2217,10 @@ vpclmulhqhqdq, 0x6644/0x11, VPCLMULQDQ&(AVX|AVX512F), Modrm|Space0F3A|Vex|EVexDY
 //       continue to work.
 <Exy:vl:attr:sr:sae:src:dst, +
     $z::EVex512|Disp8MemShift=6:StaticRounding|SAE:SAE:RegZMM|Unspecified|BaseIndex:RegYMM, +
-    $i:AVX512VL:Disp8ShiftVL|IntelSyntax:::RegXMM|RegYMM|Unspecified|BaseIndex:RegXMM, +
-    $a:AVX512VL:Disp8ShiftVL|ATTSyntax:::RegXMM|RegYMM|BaseIndex:RegXMM, +
+    $i:AVX512VL:Disp8ShiftVL|IntelSyntax:StaticRounding|SAE:SAE:RegXMM|RegYMM|Unspecified|BaseIndex:RegXMM, +
+    $a:AVX512VL:Disp8ShiftVL|ATTSyntax:StaticRounding|SAE:SAE:RegXMM|RegYMM|BaseIndex:RegXMM, +
     x:AVX512VL:EVex128|Disp8MemShift=4|ATTSyntax:::RegXMM|Unspecified|BaseIndex:RegXMM, +
-    y:AVX512VL:EVex256|Disp8MemShift=5|ATTSyntax:::RegYMM|Unspecified|BaseIndex:RegXMM>
+    y:AVX512VL:EVex256|Disp8MemShift=5|ATTSyntax:StaticRounding|SAE:SAE:RegYMM|Unspecified|BaseIndex:RegXMM>
 
 kand<bw>, 0x<bw:kpfx>41, <bw:kcpu>, Modrm|Vex256|Space0F|Src1VVVV|VexW0|NoSuf, { RegMask, RegMask, RegMask }
 kandn<bw>, 0x<bw:kpfx>42, <bw:kcpu>, Modrm|Vex256|Space0F|Src1VVVV|VexW0|NoSuf, { RegMask, RegMask, RegMask }
@@ -2315,17 +2240,11 @@ kshiftr<bw>, 0x6630, <bw:kcpu>, Modrm|Vex128|Space0F3A|<bw:vexw>|NoSuf, { Imm8,
 
 kunpckbw, 0x664B, AVX512F, Modrm|Vex=2|Space0F|Src1VVVV|VexW0|NoSuf, { RegMask, RegMask, RegMask }
 
-vaddp<sdh>, 0x<sdh:ppfx>58, <sdh:cpu>, Modrm|Masking|<sdh:spc1>|Src1VVVV|<sdh:vexw>|Broadcast|Disp8ShiftVL|CheckOperandSize|NoSuf|StaticRounding|SAE, { RegXMM|RegYMM|RegZMM|<sdh:elem>|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM, RegXMM|RegYMM|RegZMM }
-vdivp<sdh>, 0x<sdh:ppfx>5e, <sdh:cpu>, Modrm|Masking|<sdh:spc1>|Src1VVVV|<sdh:vexw>|Broadcast|Disp8ShiftVL|CheckOperandSize|NoSuf|StaticRounding|SAE, { RegXMM|RegYMM|RegZMM|<sdh:elem>|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM, RegXMM|RegYMM|RegZMM }
-vmulp<sdh>, 0x<sdh:ppfx>59, <sdh:cpu>, Modrm|Masking|<sdh:spc1>|Src1VVVV|<sdh:vexw>|Broadcast|Disp8ShiftVL|CheckOperandSize|NoSuf|StaticRounding|SAE, { RegXMM|RegYMM|RegZMM|<sdh:elem>|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM, RegXMM|RegYMM|RegZMM }
-vsqrtp<sdh>, 0x<sdh:ppfx>51, <sdh:cpu>, Modrm|Masking|<sdh:spc1>|<sdh:vexw>|Broadcast|Disp8ShiftVL|CheckOperandSize|NoSuf|StaticRounding|SAE, { RegXMM|RegYMM|RegZMM|<sdh:elem>|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM }
-vsubp<sdh>, 0x<sdh:ppfx>5c, <sdh:cpu>, Modrm|Masking|<sdh:spc1>|Src1VVVV|<sdh:vexw>|Broadcast|Disp8ShiftVL|CheckOperandSize|NoSuf|StaticRounding|SAE, { RegXMM|RegYMM|RegZMM|<sdh:elem>|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM, RegXMM|RegYMM|RegZMM }
+v<fop>p<sdh>, 0x<sdh:ppfx><fop:opc>, <sdh:cpu>, Modrm|Masking|<sdh:spc1>|Src1VVVV|<sdh:vexw>|Broadcast|Disp8ShiftVL|CheckOperandSize|NoSuf|<fop:sr>|SAE, { RegXMM|RegYMM|RegZMM|<sdh:elem>|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM, RegXMM|RegYMM|RegZMM }
+v<fop>s<sdh>, 0x<sdh:spfx><fop:opc>, <sdh:cpu>, Modrm|EVexLIG|Masking|<sdh:spc1>|Src1VVVV|<sdh:vexw>|Disp8MemShift|NoSuf|<fop:sr>|SAE, { RegXMM|<sdh:elem>|Unspecified|BaseIndex, RegXMM, RegXMM }
 
-vadds<sdh>, 0x<sdh:spfx>58, <sdh:cpu>, Modrm|EVexLIG|Masking|<sdh:spc1>|Src1VVVV|<sdh:vexw>|Disp8MemShift|NoSuf|StaticRounding|SAE, { RegXMM|<sdh:elem>|Unspecified|BaseIndex, RegXMM, RegXMM }
-vdivs<sdh>, 0x<sdh:spfx>5e, <sdh:cpu>, Modrm|EVexLIG|Masking|<sdh:spc1>|Src1VVVV|<sdh:vexw>|Disp8MemShift|NoSuf|StaticRounding|SAE, { RegXMM|<sdh:elem>|Unspecified|BaseIndex, RegXMM, RegXMM }
-vmuls<sdh>, 0x<sdh:spfx>59, <sdh:cpu>, Modrm|EVexLIG|Masking|<sdh:spc1>|Src1VVVV|<sdh:vexw>|Disp8MemShift|NoSuf|StaticRounding|SAE, { RegXMM|<sdh:elem>|Unspecified|BaseIndex, RegXMM, RegXMM }
+vsqrtp<sdh>, 0x<sdh:ppfx>51, <sdh:cpu>, Modrm|Masking|<sdh:spc1>|<sdh:vexw>|Broadcast|Disp8ShiftVL|CheckOperandSize|NoSuf|StaticRounding|SAE, { RegXMM|RegYMM|RegZMM|<sdh:elem>|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM }
 vsqrts<sdh>, 0x<sdh:spfx>51, <sdh:cpu>, Modrm|EVexLIG|Masking|<sdh:spc1>|Src1VVVV|<sdh:vexw>|Disp8MemShift|NoSuf|StaticRounding|SAE, { RegXMM|<sdh:elem>|Unspecified|BaseIndex, RegXMM, RegXMM }
-vsubs<sdh>, 0x<sdh:spfx>5C, <sdh:cpu>, Modrm|EVexLIG|Masking|<sdh:spc1>|Src1VVVV|<sdh:vexw>|Disp8MemShift|NoSuf|StaticRounding|SAE, { RegXMM|<sdh:elem>|Unspecified|BaseIndex, RegXMM, RegXMM }
 
 valign<dq>, 0x6603, AVX512F, Modrm|Masking|Space0F3A|Src1VVVV|<dq:vexw>|Broadcast|Disp8ShiftVL|CheckOperandSize|NoSuf, { Imm8, RegXMM|RegYMM|RegZMM|<dq:elem>|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM, RegXMM|RegYMM|RegZMM }
 vblendmp<sd>, 0x6665, AVX512F, Modrm|Masking|Space0F38|Src1VVVV|<sd:vexw>|Broadcast|Disp8ShiftVL|CheckOperandSize|NoSuf, { RegXMM|RegYMM|RegZMM|<sd:elem>|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM, RegXMM|RegYMM|RegZMM }
@@ -2437,11 +2356,11 @@ vpexpandq, 0x6689, AVX512F, Modrm|Masking|Space0F38|VexW=2|Disp8MemShift=3|Check
 vexpandps, 0x6688, AVX512F, Modrm|Masking|Space0F38|VexW=1|Disp8MemShift=2|CheckOperandSize|NoSuf, { RegXMM|RegYMM|RegZMM|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM }
 vpexpandd, 0x6689, AVX512F, Modrm|Masking|Space0F38|VexW=1|Disp8MemShift=2|CheckOperandSize|NoSuf, { RegXMM|RegYMM|RegZMM|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM }
 
-vextractf32x4, 0x6619, AVX512F, Modrm|Masking|Space0F3A|VexW=1|Disp8MemShift=4|NoSuf, { Imm8, RegYMM|RegZMM, RegXMM|Unspecified|BaseIndex }
-vextracti32x4, 0x6639, AVX512F, Modrm|Masking|Space0F3A|VexW=1|Disp8MemShift=4|NoSuf, { Imm8, RegYMM|RegZMM, RegXMM|Unspecified|BaseIndex }
+vextractf32x4, 0x6619, AVX512F, Modrm|Masking|Space0F3A|VexW=1|Disp8MemShift=4|NoSuf|Optimize, { Imm8, RegYMM|RegZMM, RegXMM|Unspecified|BaseIndex }
+vextracti32x4, 0x6639, AVX512F, Modrm|Masking|Space0F3A|VexW=1|Disp8MemShift=4|NoSuf|Optimize, { Imm8, RegYMM|RegZMM, RegXMM|Unspecified|BaseIndex }
 
-vextractf64x4, 0x661B, AVX512F, Modrm|EVex=1|Masking|Space0F3A|VexW=2|Disp8MemShift=5|NoSuf, { Imm8, RegZMM, RegYMM|Unspecified|BaseIndex }
-vextracti64x4, 0x663B, AVX512F, Modrm|EVex=1|Masking|Space0F3A|VexW=2|Disp8MemShift=5|NoSuf, { Imm8, RegZMM, RegYMM|Unspecified|BaseIndex }
+vextractf64x4, 0x661B, AVX512F, Modrm|EVex=1|Masking|Space0F3A|VexW=2|Disp8MemShift=5|NoSuf|Optimize, { Imm8, RegZMM, RegYMM|Unspecified|BaseIndex }
+vextracti64x4, 0x663B, AVX512F, Modrm|EVex=1|Masking|Space0F3A|VexW=2|Disp8MemShift=5|NoSuf|Optimize, { Imm8, RegZMM, RegYMM|Unspecified|BaseIndex }
 
 vfixupimmp<sd>, 0x6654, AVX512F, Modrm|Masking|Space0F3A|Src1VVVV|<sd:vexw>|Broadcast|Disp8ShiftVL|CheckOperandSize|NoSuf|SAE, { Imm8|Imm8S, RegXMM|RegYMM|RegZMM|<sd:elem>|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM, RegXMM|RegYMM|RegZMM }
 vfixupimms<sd>, 0x6655, AVX512F, Modrm|EVexLIG|Masking|Space0F3A|Src1VVVV|<sd:vexw>|Disp8MemShift|NoSuf|SAE, { Imm8|Imm8S, RegXMM|<sd:elem>|Unspecified|BaseIndex, RegXMM, RegXMM }
@@ -2475,13 +2394,7 @@ vinserti32x4, 0x6638, AVX512F, Modrm|Masking|Space0F3A|Src1VVVV|VexW0|Disp8MemSh
 vinsertf64x4, 0x661A, AVX512F, Modrm|EVex=1|Masking|Space0F3A|Src1VVVV|VexW1|Disp8MemShift=5|NoSuf, { Imm8, RegYMM|Unspecified|BaseIndex, RegZMM, RegZMM }
 vinserti64x4, 0x663A, AVX512F, Modrm|EVex=1|Masking|Space0F3A|Src1VVVV|VexW1|Disp8MemShift=5|NoSuf, { Imm8, RegYMM|Unspecified|BaseIndex, RegZMM, RegZMM }
 
-vinsertps, 0x6621, AVX512F, Modrm|EVex128|Space0F3A|Src1VVVV|VexW0|Disp8MemShift=2|NoSuf, { Imm8, RegXMM|Dword|Unspecified|BaseIndex, RegXMM, RegXMM }
-
-vmaxp<sdh>, 0x<sdh:ppfx>5f, <sdh:cpu>, Modrm|Masking|<sdh:spc1>|Src1VVVV|<sdh:vexw>|Broadcast|Disp8ShiftVL|CheckOperandSize|NoSuf|SAE, { RegXMM|RegYMM|RegZMM|<sdh:elem>|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM, RegXMM|RegYMM|RegZMM }
-vmaxs<sdh>, 0x<sdh:spfx>5f, <sdh:cpu>, Modrm|EVexLIG|Masking|<sdh:spc1>|Src1VVVV|<sdh:vexw>|Disp8MemShift|NoSuf|SAE, { RegXMM|<sdh:elem>|Unspecified|BaseIndex, RegXMM, RegXMM }
-
-vminp<sdh>, 0x<sdh:ppfx>5d, <sdh:cpu>, Modrm|Masking|<sdh:spc1>|Src1VVVV|<sdh:vexw>|Broadcast|Disp8ShiftVL|CheckOperandSize|NoSuf|SAE, { RegXMM|RegYMM|RegZMM|<sdh:elem>|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM, RegXMM|RegYMM|RegZMM }
-vmins<sdh>, 0x<sdh:spfx>5d, <sdh:cpu>, Modrm|EVexLIG|Masking|<sdh:spc1>|Src1VVVV|<sdh:vexw>|Disp8MemShift|NoSuf|SAE, { RegXMM|<sdh:elem>|Unspecified|BaseIndex, RegXMM, RegXMM }
+vinsertps, 0x6621, AVX512F, Modrm|EVex128|Space0F3A|Src1VVVV|VexW0|Disp8MemShift=2|NoSuf|Optimize, { Imm8, RegXMM|Dword|Unspecified|BaseIndex, RegXMM, RegXMM }
 
 vmovap<sd>, 0x<sd:ppfx>28, AVX512F, D|Modrm|Masking|Space0F|<sd:vexw>|Disp8ShiftVL|CheckOperandSize|NoSuf, { RegXMM|RegYMM|RegZMM|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM }
 vmovntp<sd>, 0x<sd:ppfx>2B, AVX512F, Modrm|Space0F|<sd:vexw>|Disp8ShiftVL|CheckOperandSize|NoSuf, { RegXMM|RegYMM|RegZMM, XMMword|YMMword|ZMMword|Unspecified|BaseIndex }
@@ -2546,40 +2459,19 @@ vpermilpd, 0x660d, AVX512F, Modrm|Masking|Space0F38|Src1VVVV|VexW1|Broadcast|Dis
 vpermpd, 0x6616, AVX512F, Modrm|Masking|Space0F38|Src1VVVV|VexW1|Broadcast|Disp8ShiftVL|CheckOperandSize|NoSuf, { RegYMM|RegZMM|Qword|Unspecified|BaseIndex, RegYMM|RegZMM, RegYMM|RegZMM }
 vpermq, 0x6636, AVX512F, Modrm|Masking|Space0F38|Src1VVVV|VexW1|Broadcast|Disp8ShiftVL|CheckOperandSize|NoSuf, { RegYMM|RegZMM|Qword|Unspecified|BaseIndex, RegYMM|RegZMM, RegYMM|RegZMM }
 
-vpmovdb, 0xF331, AVX512F, Modrm|EVex=1|Masking|Space0F38|VexW=1|Disp8MemShift=4|NoSuf, { RegZMM, RegXMM|Unspecified|BaseIndex }
-vpmovsdb, 0xF321, AVX512F, Modrm|EVex=1|Masking|Space0F38|VexW=1|Disp8MemShift=4|NoSuf, { RegZMM, RegXMM|Unspecified|BaseIndex }
-vpmovusdb, 0xF311, AVX512F, Modrm|EVex=1|Masking|Space0F38|VexW=1|Disp8MemShift=4|NoSuf, { RegZMM, RegXMM|Unspecified|BaseIndex }
-
-vpmovdw, 0xF333, AVX512F, Modrm|EVex=1|Masking|Space0F38|VexW=1|Disp8MemShift=5|NoSuf, { RegZMM, RegYMM|Unspecified|BaseIndex }
-vpmovsdw, 0xF323, AVX512F, Modrm|EVex=1|Masking|Space0F38|VexW=1|Disp8MemShift=5|NoSuf, { RegZMM, RegYMM|Unspecified|BaseIndex }
-vpmovusdw, 0xF313, AVX512F, Modrm|EVex=1|Masking|Space0F38|VexW=1|Disp8MemShift=5|NoSuf, { RegZMM, RegYMM|Unspecified|BaseIndex }
-
-vpmovqb, 0xF332, AVX512F, Modrm|EVex=1|Masking|Space0F38|VexW0|Disp8MemShift=3|NoSuf, { RegZMM, RegXMM|Qword|Unspecified|BaseIndex }
-vpmovsqb, 0xF322, AVX512F, Modrm|EVex=1|Masking|Space0F38|VexW0|Disp8MemShift=3|NoSuf, { RegZMM, RegXMM|Qword|Unspecified|BaseIndex }
-vpmovusqb, 0xF312, AVX512F, Modrm|EVex=1|Masking|Space0F38|VexW0|Disp8MemShift=3|NoSuf, { RegZMM, RegXMM|Qword|Unspecified|BaseIndex }
+<movn:opc, mov:3, movs:2, movus:1>
 
-vpmovqd, 0xF335, AVX512F, Modrm|EVex=1|Masking|Space0F38|VexW=1|Disp8MemShift=5|NoSuf, { RegZMM, RegYMM|Unspecified|BaseIndex }
-vpmovsqd, 0xF325, AVX512F, Modrm|EVex=1|Masking|Space0F38|VexW=1|Disp8MemShift=5|NoSuf, { RegZMM, RegYMM|Unspecified|BaseIndex }
-vpmovusqd, 0xF315, AVX512F, Modrm|EVex=1|Masking|Space0F38|VexW=1|Disp8MemShift=5|NoSuf, { RegZMM, RegYMM|Unspecified|BaseIndex }
+vp<movn>db, 0xf3<movn:opc>1, AVX512F, Modrm|EVex512|Masking|Space0F38|VexW0|Disp8MemShift=4|NoSuf, { RegZMM, RegXMM|Unspecified|BaseIndex }
+vp<movn>dw, 0xf3<movn:opc>3, AVX512F, Modrm|EVex512|Masking|Space0F38|VexW0|Disp8MemShift=5|NoSuf, { RegZMM, RegYMM|Unspecified|BaseIndex }
+vp<movn>qb, 0xf3<movn:opc>2, AVX512F, Modrm|EVex512|Masking|Space0F38|VexW0|Disp8MemShift=3|NoSuf, { RegZMM, RegXMM|Qword|Unspecified|BaseIndex }
+vp<movn>qd, 0xf3<movn:opc>5, AVX512F, Modrm|EVex512|Masking|Space0F38|VexW0|Disp8MemShift=5|NoSuf, { RegZMM, RegYMM|Unspecified|BaseIndex }
+vp<movn>qw, 0xf3<movn:opc>4, AVX512F, Modrm|EVex512|Masking|Space0F38|VexW0|Disp8MemShift=4|NoSuf, { RegZMM, RegXMM|Unspecified|BaseIndex }
 
-vpmovqw, 0xF334, AVX512F, Modrm|EVex=1|Masking|Space0F38|VexW=1|Disp8MemShift=4|NoSuf, { RegZMM, RegXMM|Unspecified|BaseIndex }
-vpmovsqw, 0xF324, AVX512F, Modrm|EVex=1|Masking|Space0F38|VexW=1|Disp8MemShift=4|NoSuf, { RegZMM, RegXMM|Unspecified|BaseIndex }
-vpmovusqw, 0xF314, AVX512F, Modrm|EVex=1|Masking|Space0F38|VexW=1|Disp8MemShift=4|NoSuf, { RegZMM, RegXMM|Unspecified|BaseIndex }
-
-vpmovsxbd, 0x6621, AVX512F, Modrm|EVex=1|Masking|Space0F38|VexWIG|Disp8MemShift=4|NoSuf, { RegXMM|Unspecified|BaseIndex, RegZMM }
-vpmovzxbd, 0x6631, AVX512F, Modrm|EVex=1|Masking|Space0F38|VexWIG|Disp8MemShift=4|NoSuf, { RegXMM|Unspecified|BaseIndex, RegZMM }
-
-vpmovsxbq, 0x6622, AVX512F, Modrm|EVex=1|Masking|Space0F38|VexWIG|Disp8MemShift=3|NoSuf, { RegXMM|Qword|Unspecified|BaseIndex, RegZMM }
-vpmovzxbq, 0x6632, AVX512F, Modrm|EVex=1|Masking|Space0F38|VexWIG|Disp8MemShift=3|NoSuf, { RegXMM|Qword|Unspecified|BaseIndex, RegZMM }
-
-vpmovsxdq, 0x6625, AVX512F, Modrm|EVex=1|Masking|Space0F38|VexW=1|Disp8MemShift=5|NoSuf, { RegYMM|Unspecified|BaseIndex, RegZMM }
-vpmovzxdq, 0x6635, AVX512F, Modrm|EVex=1|Masking|Space0F38|VexW=1|Disp8MemShift=5|NoSuf, { RegYMM|Unspecified|BaseIndex, RegZMM }
-
-vpmovsxwd, 0x6623, AVX512F, Modrm|EVex=1|Masking|Space0F38|VexWIG|Disp8MemShift=5|NoSuf, { RegYMM|Unspecified|BaseIndex, RegZMM }
-vpmovzxwd, 0x6633, AVX512F, Modrm|EVex=1|Masking|Space0F38|VexWIG|Disp8MemShift=5|NoSuf, { RegYMM|Unspecified|BaseIndex, RegZMM }
-
-vpmovsxwq, 0x6624, AVX512F, Modrm|EVex=1|Masking|Space0F38|VexWIG|Disp8MemShift=4|NoSuf, { RegXMM|Unspecified|BaseIndex, RegZMM }
-vpmovzxwq, 0x6634, AVX512F, Modrm|EVex=1|Masking|Space0F38|VexWIG|Disp8MemShift=4|NoSuf, { RegXMM|Unspecified|BaseIndex, RegZMM }
+vp<movx>bd, 0x66<movx:opc>1, AVX512F, Modrm|EVex512|Masking|Space0F38|VexWIG|Disp8MemShift=4|NoSuf, { RegXMM|Unspecified|BaseIndex, RegZMM }
+vp<movx>bq, 0x66<movx:opc>2, AVX512F, Modrm|EVex512|Masking|Space0F38|VexWIG|Disp8MemShift=3|NoSuf, { RegXMM|Qword|Unspecified|BaseIndex, RegZMM }
+vp<movx>dq, 0x66<movx:opc>5, AVX512F, Modrm|EVex512|Masking|Space0F38|VexW0|Disp8MemShift=5|NoSuf, { RegYMM|Unspecified|BaseIndex, RegZMM }
+vp<movx>wd, 0x66<movx:opc>3, AVX512F, Modrm|EVex512|Masking|Space0F38|VexWIG|Disp8MemShift=5|NoSuf, { RegYMM|Unspecified|BaseIndex, RegZMM }
+vp<movx>wq, 0x66<movx:opc>4, AVX512F, Modrm|EVex512|Masking|Space0F38|VexWIG|Disp8MemShift=4|NoSuf, { RegXMM|Unspecified|BaseIndex, RegZMM }
 
 vprol<dq>, 0x6672/1, AVX512F, Modrm|Masking|Space0F|DstVVVV|<dq:vexw>|Broadcast|Disp8ShiftVL|CheckOperandSize|NoSuf, { Imm8|Imm8S, RegXMM|RegYMM|RegZMM|<dq:elem>|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM }
 vpror<dq>, 0x6672/0, AVX512F, Modrm|Masking|Space0F|DstVVVV|<dq:vexw>|Broadcast|Disp8ShiftVL|CheckOperandSize|NoSuf, { Imm8|Imm8S, RegXMM|RegYMM|RegZMM|<dq:elem>|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM }
@@ -2723,55 +2615,33 @@ vcvtudq2pd, 0xF37A, AVX512VL, Modrm|EVex128|Masking|Space0F|VexW0|Broadcast|Disp
 vcvtudq2pd, 0xF37A, AVX512VL, Modrm|EVex256|Masking|Space0F|VexW0|Broadcast|Disp8MemShift=4|NoSuf, { RegXMM|Dword|Unspecified|BaseIndex, RegYMM }
 
 vcvtph2ps, 0x6613, AVX512VL, Modrm|EVex=2|Masking|Space0F38|VexW0|Disp8MemShift=3|NoSuf, { RegXMM|Qword|Unspecified|BaseIndex, RegXMM }
-vcvtph2ps, 0x6613, AVX512VL, Modrm|EVex=3|Masking|Space0F38|VexW=1|Disp8MemShift=4|NoSuf, { RegXMM|Unspecified|BaseIndex, RegYMM }
+vcvtph2ps, 0x6613, AVX512VL, Modrm|EVex=3|Masking|Space0F38|VexW=1|Disp8MemShift=4|NoSuf|SAE, { RegXMM|Unspecified|BaseIndex, RegYMM }
 
 vcvtps2pd, 0x5A, AVX512VL, Modrm|EVex128|Masking|Space0F|VexW0|Broadcast|Disp8MemShift=3|NoSuf, { RegXMM|Dword|Qword|Unspecified|BaseIndex, RegXMM }
-vcvtps2pd, 0x5A, AVX512VL, Modrm|EVex256|Masking|Space0F|VexW0|Broadcast|Disp8MemShift=4|NoSuf, { RegXMM|Dword|Unspecified|BaseIndex, RegYMM }
+vcvtps2pd, 0x5A, AVX512VL, Modrm|EVex256|Masking|Space0F|VexW0|Broadcast|Disp8MemShift=4|NoSuf|SAE, { RegXMM|Dword|Unspecified|BaseIndex, RegYMM }
 
 vcvtps2ph, 0x661D, AVX512VL, Modrm|EVex128|Masking|Space0F3A|VexW0|Disp8MemShift=3|NoSuf, { Imm8, RegXMM, RegXMM|Qword|Unspecified|BaseIndex }
 vcvtps2ph, 0x661D, AVX512VL, Modrm|EVex256|Masking|Space0F3A|VexW0|Disp8MemShift=4|NoSuf, { Imm8, RegYMM, RegXMM|Unspecified|BaseIndex }
 
 vmovddup, 0xF212, AVX512VL, Modrm|EVex=2|Masking|Space0F|VexW1|Disp8MemShift=3|NoSuf, { RegXMM|Qword|Unspecified|BaseIndex, RegXMM }
 
-vpmovdb, 0xF331, AVX512VL, Modrm|EVex=2|Masking|Space0F38|VexW0|Disp8MemShift=2|NoSuf, { RegXMM, RegXMM|Dword|Unspecified|BaseIndex }
-vpmovdb, 0xF331, AVX512VL, Modrm|EVex=3|Masking|Space0F38|VexW0|Disp8MemShift=3|NoSuf, { RegYMM, RegXMM|Qword|Unspecified|BaseIndex }
-vpmovsdb, 0xF321, AVX512VL, Modrm|EVex=2|Masking|Space0F38|VexW0|Disp8MemShift=2|NoSuf, { RegXMM, RegXMM|Dword|Unspecified|BaseIndex }
-vpmovsdb, 0xF321, AVX512VL, Modrm|EVex=3|Masking|Space0F38|VexW0|Disp8MemShift=3|NoSuf, { RegYMM, RegXMM|Qword|Unspecified|BaseIndex }
-vpmovusdb, 0xF311, AVX512VL, Modrm|EVex=2|Masking|Space0F38|VexW0|Disp8MemShift=2|NoSuf, { RegXMM, RegXMM|Dword|Unspecified|BaseIndex }
-vpmovusdb, 0xF311, AVX512VL, Modrm|EVex=3|Masking|Space0F38|VexW0|Disp8MemShift=3|NoSuf, { RegYMM, RegXMM|Qword|Unspecified|BaseIndex }
-
-vpmovdw, 0xF333, AVX512VL, Modrm|EVex=2|Masking|Space0F38|VexW0|Disp8MemShift=3|NoSuf, { RegXMM, RegXMM|Qword|Unspecified|BaseIndex }
-vpmovdw, 0xF333, AVX512VL, Modrm|EVex=3|Masking|Space0F38|VexW=1|Disp8MemShift=4|NoSuf, { RegYMM, RegXMM|Unspecified|BaseIndex }
-vpmovsdw, 0xF323, AVX512VL, Modrm|EVex=2|Masking|Space0F38|VexW0|Disp8MemShift=3|NoSuf, { RegXMM, RegXMM|Qword|Unspecified|BaseIndex }
-vpmovsdw, 0xF323, AVX512VL, Modrm|EVex=3|Masking|Space0F38|VexW=1|Disp8MemShift=4|NoSuf, { RegYMM, RegXMM|Unspecified|BaseIndex }
-vpmovusdw, 0xF313, AVX512VL, Modrm|EVex=2|Masking|Space0F38|VexW0|Disp8MemShift=3|NoSuf, { RegXMM, RegXMM|Qword|Unspecified|BaseIndex }
-vpmovusdw, 0xF313, AVX512VL, Modrm|EVex=3|Masking|Space0F38|VexW=1|Disp8MemShift=4|NoSuf, { RegYMM, RegXMM|Unspecified|BaseIndex }
-
-vpmovqb, 0xF332, AVX512VL, Modrm|EVex=2|Masking|Space0F38|VexW0|Disp8MemShift=1|NoSuf, { RegXMM, RegXMM|Word|Unspecified|BaseIndex }
-vpmovqb, 0xF332, AVX512VL, Modrm|EVex=3|Masking|Space0F38|VexW0|Disp8MemShift=2|NoSuf, { RegYMM, RegXMM|Dword|Unspecified|BaseIndex }
-vpmovsqb, 0xF322, AVX512VL, Modrm|EVex=2|Masking|Space0F38|VexW0|Disp8MemShift=1|NoSuf, { RegXMM, RegXMM|Word|Unspecified|BaseIndex }
-vpmovsqb, 0xF322, AVX512VL, Modrm|EVex=3|Masking|Space0F38|VexW0|Disp8MemShift=2|NoSuf, { RegYMM, RegXMM|Dword|Unspecified|BaseIndex }
-vpmovusqb, 0xF312, AVX512VL, Modrm|EVex=2|Masking|Space0F38|VexW0|Disp8MemShift=1|NoSuf, { RegXMM, RegXMM|Word|Unspecified|BaseIndex }
-vpmovusqb, 0xF312, AVX512VL, Modrm|EVex=3|Masking|Space0F38|VexW0|Disp8MemShift=2|NoSuf, { RegYMM, RegXMM|Dword|Unspecified|BaseIndex }
-
-vpmovqd, 0xF335, AVX512VL, Modrm|EVex=2|Masking|Space0F38|VexW0|Disp8MemShift=3|NoSuf, { RegXMM, RegXMM|Qword|Unspecified|BaseIndex }
-vpmovqd, 0xF335, AVX512VL, Modrm|EVex=3|Masking|Space0F38|VexW=1|Disp8MemShift=4|NoSuf, { RegYMM, RegXMM|Unspecified|BaseIndex }
-vpmovsqd, 0xF325, AVX512VL, Modrm|EVex=2|Masking|Space0F38|VexW0|Disp8MemShift=3|NoSuf, { RegXMM, RegXMM|Qword|Unspecified|BaseIndex }
-vpmovsqd, 0xF325, AVX512VL, Modrm|EVex=3|Masking|Space0F38|VexW=1|Disp8MemShift=4|NoSuf, { RegYMM, RegXMM|Unspecified|BaseIndex }
-vpmovusqd, 0xF315, AVX512VL, Modrm|EVex=2|Masking|Space0F38|VexW0|Disp8MemShift=3|NoSuf, { RegXMM, RegXMM|Qword|Unspecified|BaseIndex }
-vpmovusqd, 0xF315, AVX512VL, Modrm|EVex=3|Masking|Space0F38|VexW=1|Disp8MemShift=4|NoSuf, { RegYMM, RegXMM|Unspecified|BaseIndex }
-
-vpmovqw, 0xF334, AVX512VL, Modrm|EVex=2|Masking|Space0F38|VexW0|Disp8MemShift=2|NoSuf, { RegXMM, RegXMM|Dword|Unspecified|BaseIndex }
-vpmovqw, 0xF334, AVX512VL, Modrm|EVex=3|Masking|Space0F38|VexW0|Disp8MemShift=3|NoSuf, { RegYMM, RegXMM|Qword|Unspecified|BaseIndex }
-vpmovsqw, 0xF324, AVX512VL, Modrm|EVex=2|Masking|Space0F38|VexW0|Disp8MemShift=2|NoSuf, { RegXMM, RegXMM|Dword|Unspecified|BaseIndex }
-vpmovsqw, 0xF324, AVX512VL, Modrm|EVex=3|Masking|Space0F38|VexW0|Disp8MemShift=3|NoSuf, { RegYMM, RegXMM|Qword|Unspecified|BaseIndex }
-vpmovusqw, 0xF314, AVX512VL, Modrm|EVex=2|Masking|Space0F38|VexW0|Disp8MemShift=2|NoSuf, { RegXMM, RegXMM|Dword|Unspecified|BaseIndex }
-vpmovusqw, 0xF314, AVX512VL, Modrm|EVex=3|Masking|Space0F38|VexW0|Disp8MemShift=3|NoSuf, { RegYMM, RegXMM|Qword|Unspecified|BaseIndex }
-
-vpmovsxdq, 0x6625, AVX512VL, Modrm|EVex=2|Masking|Space0F38|VexW0|Disp8MemShift=3|NoSuf, { RegXMM|Qword|Unspecified|BaseIndex, RegXMM }
-vpmovsxdq, 0x6625, AVX512VL, Modrm|EVex=3|Masking|Space0F38|VexW=1|Disp8MemShift=4|NoSuf, { RegXMM|Unspecified|BaseIndex, RegYMM }
-vpmovzxdq, 0x6635, AVX512VL, Modrm|EVex=2|Masking|Space0F38|VexW0|Disp8MemShift=3|NoSuf, { RegXMM|Qword|Unspecified|BaseIndex, RegXMM }
-vpmovzxdq, 0x6635, AVX512VL, Modrm|EVex=3|Masking|Space0F38|VexW=1|Disp8MemShift=4|NoSuf, { RegXMM|Unspecified|BaseIndex, RegYMM }
+vp<movn>db, 0xf3<movn:opc>1, AVX512VL, Modrm|EVex128|Masking|Space0F38|VexW0|Disp8MemShift=2|NoSuf, { RegXMM, RegXMM|Dword|Unspecified|BaseIndex }
+vp<movn>db, 0xf3<movn:opc>1, AVX512VL, Modrm|EVex256|Masking|Space0F38|VexW0|Disp8MemShift=3|NoSuf, { RegYMM, RegXMM|Qword|Unspecified|BaseIndex }
+
+vp<movn>dw, 0xf3<movn:opc>3, AVX512VL, Modrm|EVex128|Masking|Space0F38|VexW0|Disp8MemShift=3|NoSuf, { RegXMM, RegXMM|Qword|Unspecified|BaseIndex }
+vp<movn>dw, 0xf3<movn:opc>3, AVX512VL, Modrm|EVex256|Masking|Space0F38|VexW0|Disp8MemShift=4|NoSuf, { RegYMM, RegXMM|Unspecified|BaseIndex }
+
+vp<movn>qb, 0xf3<movn:opc>2, AVX512VL, Modrm|EVex128|Masking|Space0F38|VexW0|Disp8MemShift=1|NoSuf, { RegXMM, RegXMM|Word|Unspecified|BaseIndex }
+vp<movn>qb, 0xf3<movn:opc>2, AVX512VL, Modrm|EVex256|Masking|Space0F38|VexW0|Disp8MemShift=2|NoSuf, { RegYMM, RegXMM|Dword|Unspecified|BaseIndex }
+
+vp<movn>qd, 0xf3<movn:opc>5, AVX512VL, Modrm|EVex128|Masking|Space0F38|VexW0|Disp8MemShift=3|NoSuf, { RegXMM, RegXMM|Qword|Unspecified|BaseIndex }
+vp<movn>qd, 0xf3<movn:opc>5, AVX512VL, Modrm|EVex256|Masking|Space0F38|VexW0|Disp8MemShift=4|NoSuf, { RegYMM, RegXMM|Unspecified|BaseIndex }
+
+vp<movn>qw, 0xf3<movn:opc>4, AVX512VL, Modrm|EVex128|Masking|Space0F38|VexW0|Disp8MemShift=2|NoSuf, { RegXMM, RegXMM|Dword|Unspecified|BaseIndex }
+vp<movn>qw, 0xf3<movn:opc>4, AVX512VL, Modrm|EVex256|Masking|Space0F38|VexW0|Disp8MemShift=3|NoSuf, { RegYMM, RegXMM|Qword|Unspecified|BaseIndex }
+
+vp<movx>dq, 0x66<movx:opc>5, AVX512VL, Modrm|EVex128|Masking|Space0F38|VexW0|Disp8MemShift=3|NoSuf, { RegXMM|Qword|Unspecified|BaseIndex, RegXMM }
+vp<movx>dq, 0x66<movx:opc>5, AVX512VL, Modrm|EVex256|Masking|Space0F38|VexW0|Disp8MemShift=4|NoSuf, { RegXMM|Unspecified|BaseIndex, RegYMM }
 
 // AVX512VL instructions end.
 
@@ -2877,24 +2747,13 @@ vpmaddwd, 0x66F5, AVX512BW, Modrm|Masking|Space0F|Src1VVVV|VexWIG|Disp8ShiftVL|C
 vpmov<bw>2m, 0xf329, AVX512BW, Modrm|EVexDYN|Space0F38|<bw:vexw>|NoSuf, { RegXMM|RegYMM|RegZMM, RegMask }
 vpmovm2<bw>, 0xf328, AVX512BW, Modrm|EVexDYN|Space0F38|<bw:vexw>|NoSuf, { RegMask, RegXMM|RegYMM|RegZMM }
 
-vpmovswb, 0xF320, AVX512BW, Modrm|EVex=1|Masking|Space0F38|VexW=1|Disp8MemShift=5|NoSuf, { RegZMM, RegYMM|Unspecified|BaseIndex }
-vpmovswb, 0xF320, AVX512BW&AVX512VL, Modrm|EVex=2|Masking|Space0F38|VexW0|Disp8MemShift=3|NoSuf, { RegXMM, RegXMM|Qword|Unspecified|BaseIndex }
-vpmovswb, 0xF320, AVX512BW&AVX512VL, Modrm|EVex=3|Masking|Space0F38|VexW=1|Disp8MemShift=4|NoSuf, { RegYMM, RegXMM|Unspecified|BaseIndex }
+vp<movn>wb, 0xf3<movn:opc>0, AVX512BW, Modrm|EVex512|Masking|Space0F38|VexW0|Disp8MemShift=5|NoSuf, { RegZMM, RegYMM|Unspecified|BaseIndex }
+vp<movn>wb, 0xf3<movn:opc>0, AVX512BW&AVX512VL, Modrm|EVex128|Masking|Space0F38|VexW0|Disp8MemShift=3|NoSuf, { RegXMM, RegXMM|Qword|Unspecified|BaseIndex }
+vp<movn>wb, 0xf3<movn:opc>0, AVX512BW&AVX512VL, Modrm|EVex256|Masking|Space0F38|VexW0|Disp8MemShift=4|NoSuf, { RegYMM, RegXMM|Unspecified|BaseIndex }
 
-vpmovuswb, 0xF310, AVX512BW, Modrm|EVex=1|Masking|Space0F38|VexW=1|Disp8MemShift=5|NoSuf, { RegZMM, RegYMM|Unspecified|BaseIndex }
-vpmovuswb, 0xF310, AVX512BW&AVX512VL, Modrm|EVex=2|Masking|Space0F38|VexW0|Disp8MemShift=3|NoSuf, { RegXMM, RegXMM|Qword|Unspecified|BaseIndex }
-vpmovuswb, 0xF310, AVX512BW&AVX512VL, Modrm|EVex=3|Masking|Space0F38|VexW=1|Disp8MemShift=4|NoSuf, { RegYMM, RegXMM|Unspecified|BaseIndex }
-
-vpmovwb, 0xF330, AVX512BW, Modrm|EVex=1|Masking|Space0F38|VexW=1|Disp8MemShift=5|NoSuf, { RegZMM, RegYMM|Unspecified|BaseIndex }
-vpmovwb, 0xF330, AVX512BW&AVX512VL, Modrm|EVex=2|Masking|Space0F38|VexW0|Disp8MemShift=3|NoSuf, { RegXMM, RegXMM|Qword|Unspecified|BaseIndex }
-vpmovwb, 0xF330, AVX512BW&AVX512VL, Modrm|EVex=3|Masking|Space0F38|VexW=1|Disp8MemShift=4|NoSuf, { RegYMM, RegXMM|Unspecified|BaseIndex }
-
-vpmovsxbw, 0x6620, AVX512BW, Modrm|EVex=1|Masking|Space0F38|VexWIG|Disp8MemShift=5|NoSuf, { RegYMM|Unspecified|BaseIndex, RegZMM }
-vpmovsxbw, 0x6620, AVX512BW&AVX512VL, Modrm|EVex=2|Masking|VexWIG|Space0F38|Disp8MemShift=3|NoSuf, { RegXMM|Qword|Unspecified|BaseIndex, RegXMM }
-vpmovsxbw, 0x6620, AVX512BW&AVX512VL, Modrm|EVex=3|Masking|VexWIG|Space0F38|Disp8MemShift=4|NoSuf, { RegXMM|Unspecified|BaseIndex, RegYMM }
-vpmovzxbw, 0x6630, AVX512BW, Modrm|EVex=1|Masking|Space0F38|VexWIG|Disp8MemShift=5|NoSuf, { RegYMM|Unspecified|BaseIndex, RegZMM }
-vpmovzxbw, 0x6630, AVX512BW&AVX512VL, Modrm|EVex=2|Masking|VexWIG|Space0F38|Disp8MemShift=3|NoSuf, { RegXMM|Qword|Unspecified|BaseIndex, RegXMM }
-vpmovzxbw, 0x6630, AVX512BW&AVX512VL, Modrm|EVex=3|Masking|VexWIG|Space0F38|Disp8MemShift=4|NoSuf, { RegXMM|Unspecified|BaseIndex, RegYMM }
+vp<movx>bw, 0x66<movx:opc>0, AVX512BW, Modrm|EVex512|Masking|Space0F38|VexWIG|Disp8MemShift=5|NoSuf, { RegYMM|Unspecified|BaseIndex, RegZMM }
+vp<movx>bw, 0x66<movx:opc>0, AVX512BW&AVX512VL, Modrm|EVex128|Masking|VexWIG|Space0F38|Disp8MemShift=3|NoSuf, { RegXMM|Qword|Unspecified|BaseIndex, RegXMM }
+vp<movx>bw, 0x66<movx:opc>0, AVX512BW&AVX512VL, Modrm|EVex256|Masking|VexWIG|Space0F38|Disp8MemShift=4|NoSuf, { RegXMM|Unspecified|BaseIndex, RegYMM }
 
 vpsadbw, 0x66F6, AVX512BW, Modrm|Space0F|Src1VVVV|VexWIG|Disp8ShiftVL|CheckOperandSize|NoSuf, { RegXMM|RegYMM|RegZMM|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM, RegXMM|RegYMM|RegZMM }
 
@@ -2913,15 +2772,12 @@ vptestnm<bw>, 0xf326, AVX512BW, Modrm|Masking|Space0F38|Src1VVVV|<bw:vexw>|Disp8
     $a::Disp8ShiftVL|ATTSyntax:StaticRounding|SAE::RegXMM|RegYMM|RegZMM|BaseIndex, +
     z::EVex512|Disp8MemShift=6:StaticRounding|SAE:ATTSyntax:RegZMM|Unspecified|BaseIndex, +
     x:AVX512VL:EVex128|Disp8MemShift=4::ATTSyntax:RegXMM|Unspecified|BaseIndex, +
-    y:AVX512VL:EVex256|Disp8MemShift=5::ATTSyntax:RegYMM|Unspecified|BaseIndex>
+    y:AVX512VL:EVex256|Disp8MemShift=5:StaticRounding|SAE:ATTSyntax:RegYMM|Unspecified|BaseIndex>
 
 kadd<bw>, 0x<bw:kpfx>4A, AVX512DQ, Modrm|Vex256|Space0F|Src1VVVV|VexW0|NoSuf, { RegMask, RegMask, RegMask }
 ktest<bw>, 0x<bw:kpfx>99, AVX512DQ, Modrm|Vex128|Space0F|VexW0|NoSuf, { RegMask, RegMask }
 
-vandnp<sd>, 0x<sd:ppfx>55, AVX512DQ, Modrm|Masking|Space0F|Src1VVVV|<sd:vexw>|Broadcast|Disp8ShiftVL|CheckOperandSize|NoSuf|Optimize, { RegXMM|RegYMM|RegZMM|<sd:elem>|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM, RegXMM|RegYMM|RegZMM }
-vandp<sd>, 0x<sd:ppfx>54, AVX512DQ, Modrm|Masking|Space0F|Src1VVVV|<sd:vexw>|Broadcast|Disp8ShiftVL|CheckOperandSize|NoSuf, { RegXMM|RegYMM|RegZMM|<sd:elem>|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM, RegXMM|RegYMM|RegZMM }
-vorp<sd>, 0x<sd:ppfx>56, AVX512DQ, Modrm|Masking|Space0F|Src1VVVV|<sd:vexw>|Broadcast|Disp8ShiftVL|CheckOperandSize|NoSuf, { RegXMM|RegYMM|RegZMM|<sd:elem>|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM, RegXMM|RegYMM|RegZMM }
-vxorp<sd>, 0x<sd:ppfx>57, AVX512DQ, Modrm|Masking|Space0F|Src1VVVV|<sd:vexw>|Broadcast|Disp8ShiftVL|CheckOperandSize|NoSuf|Optimize, { RegXMM|RegYMM|RegZMM|<sd:elem>|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM, RegXMM|RegYMM|RegZMM }
+v<flog>p<sd>, 0x<sd:ppfx><flog:opc>, AVX512DQ, Modrm|Masking|Space0F|Src1VVVV|<sd:vexw>|Broadcast|Disp8ShiftVL|CheckOperandSize|NoSuf|<flog:optim>, { RegXMM|RegYMM|RegZMM|<sd:elem>|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM, RegXMM|RegYMM|RegZMM }
 
 vbroadcastf32x2, 0x6619, AVX512DQ, Modrm|Masking|Space0F38|VexW0|Disp8MemShift=3|NoSuf, { RegXMM|Qword|Unspecified|BaseIndex, RegYMM|RegZMM }
 vbroadcastf32x8, 0x661B, AVX512DQ, Modrm|EVex=1|Masking|Space0F38|VexW=1|Disp8MemShift=5|NoSuf, { YMMword|Unspecified|BaseIndex, RegZMM }
@@ -2936,10 +2792,10 @@ vcvtpd2uqq, 0x6679, AVX512DQ, Modrm|Masking|Space0F|VexW1|Broadcast|Disp8ShiftVL
 
 vcvtps2qq, 0x667B, AVX512DQ, Modrm|EVex512|Masking|Space0F|VexW0|Broadcast|Disp8MemShift=5|NoSuf|StaticRounding|SAE, { RegYMM|Dword|Unspecified|BaseIndex, RegZMM }
 vcvtps2qq, 0x667B, AVX512DQ&AVX512VL, Modrm|EVex128|Masking|Space0F|VexW0|Broadcast|Disp8MemShift=3|NoSuf, { RegXMM|Dword|Qword|Unspecified|BaseIndex, RegXMM }
-vcvtps2qq, 0x667B, AVX512DQ&AVX512VL, Modrm|EVex256|Masking|Space0F|VexW0|Broadcast|Disp8MemShift=4|NoSuf, { RegXMM|Dword|Unspecified|BaseIndex, RegYMM }
+vcvtps2qq, 0x667B, AVX512DQ&AVX512VL, Modrm|EVex256|Masking|Space0F|VexW0|Broadcast|Disp8MemShift=4|NoSuf|StaticRounding|SAE, { RegXMM|Dword|Unspecified|BaseIndex, RegYMM }
 vcvtps2uqq, 0x6679, AVX512DQ, Modrm|EVex512|Masking|Space0F|VexW0|Broadcast|Disp8MemShift=5|NoSuf|StaticRounding|SAE, { RegYMM|Dword|Unspecified|BaseIndex, RegZMM }
 vcvtps2uqq, 0x6679, AVX512DQ&AVX512VL, Modrm|EVex128|Masking|Space0F|VexW0|Broadcast|Disp8MemShift=3|NoSuf, { RegXMM|Dword|Qword|Unspecified|BaseIndex, RegXMM }
-vcvtps2uqq, 0x6679, AVX512DQ&AVX512VL, Modrm|EVex256|Masking|Space0F|VexW0|Broadcast|Disp8MemShift=4|NoSuf, { RegXMM|RegXMM|Dword|Unspecified|BaseIndex, RegYMM }
+vcvtps2uqq, 0x6679, AVX512DQ&AVX512VL, Modrm|EVex256|Masking|Space0F|VexW0|Broadcast|Disp8MemShift=4|NoSuf|StaticRounding|SAE, { RegXMM|Dword|Unspecified|BaseIndex, RegYMM }
 
 vcvtqq2pd, 0xF3E6, AVX512DQ, Modrm|Masking|Space0F|VexW1|Broadcast|Disp8ShiftVL|CheckOperandSize|NoSuf|StaticRounding|SAE, { RegXMM|RegYMM|RegZMM|Qword|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM }
 vcvtuqq2pd, 0xF37A, AVX512DQ, Modrm|Masking|Space0F|VexW1|Broadcast|Disp8ShiftVL|CheckOperandSize|NoSuf|StaticRounding|SAE, { RegXMM|RegYMM|RegZMM|Qword|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM }
@@ -2951,23 +2807,23 @@ vcvttpd2uqq, 0x6678, AVX512DQ, Modrm|Masking|Space0F|VexW1|Broadcast|Disp8ShiftV
 
 vcvttps2qq, 0x667A, AVX512DQ, Modrm|EVex512|Masking|Space0F|VexW0|Broadcast|Disp8MemShift=5|NoSuf|SAE, { RegYMM|Dword|Unspecified|BaseIndex, RegZMM }
 vcvttps2qq, 0x667A, AVX512DQ&AVX512VL, Modrm|EVex128|Masking|Space0F|VexW0|Broadcast|Disp8MemShift=3|NoSuf, { RegXMM|Dword|Qword|Unspecified|BaseIndex, RegXMM }
-vcvttps2qq, 0x667A, AVX512DQ&AVX512VL, Modrm|EVex256|Masking|Space0F|VexW0|Broadcast|Disp8MemShift=4|NoSuf, { RegXMM|Dword|Unspecified|BaseIndex, RegYMM }
+vcvttps2qq, 0x667A, AVX512DQ&AVX512VL, Modrm|EVex256|Masking|Space0F|VexW0|Broadcast|Disp8MemShift=4|NoSuf|SAE, { RegXMM|Dword|Unspecified|BaseIndex, RegYMM }
 vcvttps2uqq, 0x6678, AVX512DQ, Modrm|EVex512|Masking|Space0F|VexW0|Broadcast|Disp8MemShift=5|NoSuf|SAE, { RegYMM|Dword|Unspecified|BaseIndex, RegZMM }
 vcvttps2uqq, 0x6678, AVX512DQ&AVX512VL, Modrm|EVex128|Masking|Space0F|VexW0|Broadcast|Disp8MemShift=3|NoSuf, { RegXMM|Dword|Qword|Unspecified|BaseIndex, RegXMM }
-vcvttps2uqq, 0x6678, AVX512DQ&AVX512VL, Modrm|EVex256|Masking|Space0F|VexW0|Broadcast|Disp8MemShift=4|NoSuf, { RegXMM|Dword|Unspecified|BaseIndex, RegYMM }
+vcvttps2uqq, 0x6678, AVX512DQ&AVX512VL, Modrm|EVex256|Masking|Space0F|VexW0|Broadcast|Disp8MemShift=4|NoSuf|SAE, { RegXMM|Dword|Unspecified|BaseIndex, RegYMM }
 
 vcvtuqq2ps<Exy>, 0xf27a, AVX512DQ&<Exy:vl>, Modrm|<Exy:attr>|Masking|Space0F|VexW1|Broadcast|NoSuf|<Exy:sr>, { <Exy:src>|Qword, <Exy:dst> }
 
-vextractf32x8, 0x661B, AVX512DQ, Modrm|EVex=1|Masking|Space0F3A|VexW=1|Disp8MemShift=5|NoSuf, { Imm8, RegZMM, RegYMM|Unspecified|BaseIndex }
-vextracti32x8, 0x663B, AVX512DQ, Modrm|EVex=1|Masking|Space0F3A|VexW=1|Disp8MemShift=5|NoSuf, { Imm8, RegZMM, RegYMM|Unspecified|BaseIndex }
+vextractf32x8, 0x661B, AVX512DQ, Modrm|EVex=1|Masking|Space0F3A|VexW=1|Disp8MemShift=5|NoSuf|Optimize, { Imm8, RegZMM, RegYMM|Unspecified|BaseIndex }
+vextracti32x8, 0x663B, AVX512DQ, Modrm|EVex=1|Masking|Space0F3A|VexW=1|Disp8MemShift=5|NoSuf|Optimize, { Imm8, RegZMM, RegYMM|Unspecified|BaseIndex }
 vinsertf32x8, 0x661A, AVX512DQ, Modrm|EVex512|Masking|Space0F3A|Src1VVVV|VexW0|Disp8MemShift=5|NoSuf, { Imm8, RegYMM|Unspecified|BaseIndex, RegZMM, RegZMM }
 vinserti32x8, 0x663A, AVX512DQ, Modrm|EVex512|Masking|Space0F3A|Src1VVVV|VexW0|Disp8MemShift=5|NoSuf, { Imm8, RegYMM|Unspecified|BaseIndex, RegZMM, RegZMM }
 
 vpextr<dq>, 0x6616, AVX512DQ&<dq:cpu64>, Modrm|EVex128|Space0F3A|<dq:vexw64>|Disp8MemShift|NoSuf|Optimize, { Imm8, RegXMM, <dq:gpr>|Unspecified|BaseIndex }
 vpinsr<dq>, 0x6622, AVX512DQ&<dq:cpu64>, Modrm|EVex128|Space0F3A|Src1VVVV|<dq:vexw64>|Disp8MemShift|NoSuf, { Imm8, <dq:gpr>|Unspecified|BaseIndex, RegXMM, RegXMM }
 
-vextractf64x2, 0x6619, AVX512DQ, Modrm|Masking|Space0F3A|VexW=2|Disp8MemShift=4|NoSuf, { Imm8, RegYMM|RegZMM, RegXMM|Unspecified|BaseIndex }
-vextracti64x2, 0x6639, AVX512DQ, Modrm|Masking|Space0F3A|VexW=2|Disp8MemShift=4|NoSuf, { Imm8, RegYMM|RegZMM, RegXMM|Unspecified|BaseIndex }
+vextractf64x2, 0x6619, AVX512DQ, Modrm|Masking|Space0F3A|VexW=2|Disp8MemShift=4|NoSuf|Optimize, { Imm8, RegYMM|RegZMM, RegXMM|Unspecified|BaseIndex }
+vextracti64x2, 0x6639, AVX512DQ, Modrm|Masking|Space0F3A|VexW=2|Disp8MemShift=4|NoSuf|Optimize, { Imm8, RegYMM|RegZMM, RegXMM|Unspecified|BaseIndex }
 vinsertf64x2, 0x6618, AVX512DQ, Modrm|Masking|Space0F3A|Src1VVVV|VexW1|Disp8MemShift=4|CheckOperandSize|NoSuf, { Imm8, RegXMM|Unspecified|BaseIndex, RegYMM|RegZMM, RegYMM|RegZMM }
 vinserti64x2, 0x6638, AVX512DQ, Modrm|Masking|Space0F3A|Src1VVVV|VexW1|Disp8MemShift=4|CheckOperandSize|NoSuf, { Imm8, RegXMM|Unspecified|BaseIndex, RegYMM|RegZMM, RegYMM|RegZMM }
 
@@ -3061,48 +2917,44 @@ vpshrdw, 0x6672, AVX512_VBMI2, Modrm|Masking|Space0F3A|Src1VVVV|VexW1|Disp8Shift
 
 // AVX512_VBMI2 instructions end
 
-// AVX512_VNNI instructions
-
-vpdpbusd, 0x6650, AVX512_VNNI, Modrm|Masking|Space0F38|Src1VVVV|VexW0|Broadcast|Disp8ShiftVL|CheckOperandSize|NoSuf, { RegXMM|RegYMM|RegZMM|Dword|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM, RegXMM|RegYMM|RegZMM }
-vpdpwssd, 0x6652, AVX512_VNNI, Modrm|Masking|Space0F38|Src1VVVV|VexW0|Broadcast|Disp8ShiftVL|CheckOperandSize|NoSuf, { RegXMM|RegYMM|RegZMM|Dword|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM, RegXMM|RegYMM|RegZMM }
+<sat:opc, $:0, s:1>
 
-vpdpbusds, 0x6651, AVX512_VNNI, Modrm|Masking|Space0F38|Src1VVVV|VexW0|Broadcast|Disp8ShiftVL|CheckOperandSize|NoSuf, { RegXMM|RegYMM|RegZMM|Dword|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM, RegXMM|RegYMM|RegZMM }
-vpdpwssds, 0x6653, AVX512_VNNI, Modrm|Masking|Space0F38|Src1VVVV|VexW0|Broadcast|Disp8ShiftVL|CheckOperandSize|NoSuf, { RegXMM|RegYMM|RegZMM|Dword|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM, RegXMM|RegYMM|RegZMM }
+// {AVX512,AVX}_VNNI instructions
 
-// AVX512_VNNI instructions end
+<vnni:avx:attr:reg:mem, $z:AVX512:Masking|Broadcast|Disp8ShiftVL:RegZMM:Dword, $y:AVX:Vex::>
 
-// AVX_VNNI instructions
+vpdpbusd<vnni><sat>, 0x6650|<sat:opc>, <vnni:avx>_VNNI, Modrm|Space0F38|Src1VVVV|VexW0|<vnni:attr>|CheckOperandSize|NoSuf, { RegXMM|RegYMM|<vnni:reg>|<vnni:mem>|Unspecified|BaseIndex, RegXMM|RegYMM|<vnni:reg>, RegXMM|RegYMM|<vnni:reg> }
+vpdpwssd<vnni><sat>, 0x6652|<sat:opc>, <vnni:avx>_VNNI, Modrm|Space0F38|Src1VVVV|VexW0|<vnni:attr>|CheckOperandSize|NoSuf, { RegXMM|RegYMM|<vnni:reg>|<vnni:mem>|Unspecified|BaseIndex, RegXMM|RegYMM|<vnni:reg>, RegXMM|RegYMM|<vnni:reg> }
 
-vpdpbusd, 0x6650, AVX_VNNI, Modrm|Vex|Space0F38|Src1VVVV|VexW0|CheckOperandSize|NoSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
-vpdpwssd, 0x6652, AVX_VNNI, Modrm|Vex|Space0F38|Src1VVVV|VexW0|CheckOperandSize|NoSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
+<vnni>
 
-vpdpbusds, 0x6651, AVX_VNNI, Modrm|Vex|Space0F38|Src1VVVV|VexW0|CheckOperandSize|NoSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
-vpdpwssds, 0x6653, AVX_VNNI, Modrm|Vex|Space0F38|Src1VVVV|VexW0|CheckOperandSize|NoSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
+// {AVX512,AVX}_VNNI instructions end
 
-// AVX_VNNI instructions end
+<vnni:int8:int16:attr:reg:mem, +
+  $y:_VNNI_INT8:_VNNI_INT16:Vex::, +
+  $z:10_2:10_2:Masking|Broadcast|Disp8ShiftVL:RegZMM:Dword>
 
 // AVX-VNNI-INT8 instructions.
 
-vpdpbuud, 0x50, AVX_VNNI_INT8, Modrm|Vex|Space0F38|Src1VVVV|VexW0|CheckOperandSize|NoSuf, { RegXMM|RegYMM|Unspecified|BaseIndex, RegXMM|RegYMM, RegXMM|RegYMM }
-vpdpbuuds, 0x51, AVX_VNNI_INT8, Modrm|Vex|Space0F38|Src1VVVV|VexW0|CheckOperandSize|NoSuf, { RegXMM|RegYMM|Unspecified|BaseIndex, RegXMM|RegYMM, RegXMM|RegYMM }
-vpdpbssd, 0xf250, AVX_VNNI_INT8, Modrm|Vex|Space0F38|Src1VVVV|VexW0|CheckOperandSize|NoSuf, { RegXMM|RegYMM|Unspecified|BaseIndex, RegXMM|RegYMM, RegXMM|RegYMM }
-vpdpbssds, 0xf251, AVX_VNNI_INT8, Modrm|Vex|Space0F38|Src1VVVV|VexW0|CheckOperandSize|NoSuf, { RegXMM|RegYMM|Unspecified|BaseIndex, RegXMM|RegYMM, RegXMM|RegYMM }
-vpdpbsud, 0xf350, AVX_VNNI_INT8, Modrm|Vex|Space0F38|Src1VVVV|VexW0|CheckOperandSize|NoSuf, { RegXMM|RegYMM|Unspecified|BaseIndex, RegXMM|RegYMM, RegXMM|RegYMM }
-vpdpbsuds, 0xf351, AVX_VNNI_INT8, Modrm|Vex|Space0F38|Src1VVVV|VexW0|CheckOperandSize|NoSuf, { RegXMM|RegYMM|Unspecified|BaseIndex, RegXMM|RegYMM, RegXMM|RegYMM }
+<dpb:pfx, uu:, ss:f2, su:f3>
+
+vpdpb<dpb>d<vnni><sat>, 0x<dpb:pfx>50|<sat:opc>, AVX<vnni:int8>, Modrm|Space0F38|Src1VVVV|VexW0|<vnni:attr>|CheckOperandSize|NoSuf, { RegXMM|RegYMM|<vnni:reg>|<vnni:mem>|Unspecified|BaseIndex, RegXMM|RegYMM|<vnni:reg>, RegXMM|RegYMM|<vnni:reg> }
 
 // AVX-VNNI-INT8 instructions end.
 
 // AVX-VNNI-INT16 instructions.
 
-vpdpwuud, 0xd2, AVX_VNNI_INT16, Modrm|Vex|Space0F38|Src1VVVV|VexW0|CheckOperandSize|NoSuf, { RegXMM|RegYMM|Unspecified|BaseIndex, RegXMM|RegYMM, RegXMM|RegYMM }
-vpdpwuuds, 0xd3, AVX_VNNI_INT16, Modrm|Vex|Space0F38|Src1VVVV|VexW0|CheckOperandSize|NoSuf, { RegXMM|RegYMM|Unspecified|BaseIndex, RegXMM|RegYMM, RegXMM|RegYMM }
-vpdpwusd, 0x66d2, AVX_VNNI_INT16, Modrm|Vex|Space0F38|Src1VVVV|VexW0|CheckOperandSize|NoSuf, { RegXMM|RegYMM|Unspecified|BaseIndex, RegXMM|RegYMM, RegXMM|RegYMM }
-vpdpwusds, 0x66d3, AVX_VNNI_INT16, Modrm|Vex|Space0F38|Src1VVVV|VexW0|CheckOperandSize|NoSuf, { RegXMM|RegYMM|Unspecified|BaseIndex, RegXMM|RegYMM, RegXMM|RegYMM }
-vpdpwsud, 0xf3d2, AVX_VNNI_INT16, Modrm|Vex|Space0F38|Src1VVVV|VexW0|CheckOperandSize|NoSuf, { RegXMM|RegYMM|Unspecified|BaseIndex, RegXMM|RegYMM, RegXMM|RegYMM }
-vpdpwsuds, 0xf3d3, AVX_VNNI_INT16, Modrm|Vex|Space0F38|Src1VVVV|VexW0|CheckOperandSize|NoSuf, { RegXMM|RegYMM|Unspecified|BaseIndex, RegXMM|RegYMM, RegXMM|RegYMM }
+<dpw:pfx, uu:, us:66, su:f3>
+
+vpdpw<dpw>d<vnni><sat>, 0x<dpw:pfx>d2|<sat:opc>, AVX<vnni:int16>, Modrm|Space0F38|Src1VVVV|VexW0|<vnni:attr>|CheckOperandSize|NoSuf, { RegXMM|RegYMM|<vnni:reg>|<vnni:mem>|Unspecified|BaseIndex, RegXMM|RegYMM|<vnni:reg>, RegXMM|RegYMM|<vnni:reg> }
 
 // AVX-VNNI-INT16 instructions end.
 
+<dpw>
+<dpb>
+<vnni>
+<sat>
+
 // AVX512_BITALG instructions
 
 vpopcnt<bw>, 0x6654, AVX512_BITALG, Modrm|Masking|Space0F38|<bw:vexw>|Disp8ShiftVL|CheckOperandSize|NoSuf, { RegXMM|RegYMM|RegZMM|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM }
@@ -3427,23 +3279,23 @@ vcvtw2ph, 0xf37d, AVX512_FP16, Modrm|Masking|EVexMap5|VexW0|Broadcast|Disp8Shift
 vcvtuw2ph, 0xf27d, AVX512_FP16, Modrm|Masking|EVexMap5|VexW0|Broadcast|Disp8ShiftVL|CheckOperandSize|NoSuf|StaticRounding|SAE, { RegXMM|RegYMM|RegZMM|Word|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM }
 
 vcvtph2dq, 0x665b, AVX512_FP16&AVX512VL, Modrm|EVex128|Masking|EVexMap5|VexW0|Broadcast|Disp8MemShift=3|NoSuf, { RegXMM|Word|Qword|Unspecified|BaseIndex, RegXMM }
-vcvtph2dq, 0x665b, AVX512_FP16&AVX512VL, Modrm|EVex256|Masking|EVexMap5|VexW0|Broadcast|Disp8MemShift=4|NoSuf, { RegXMM|Word|Unspecified|BaseIndex, RegYMM }
+vcvtph2dq, 0x665b, AVX512_FP16&AVX512VL, Modrm|EVex256|Masking|EVexMap5|VexW0|Broadcast|Disp8MemShift=4|NoSuf|StaticRounding|SAE, { RegXMM|Word|Unspecified|BaseIndex, RegYMM }
 vcvtph2dq, 0x665b, AVX512_FP16, Modrm|EVex512|Masking|EVexMap5|VexW0|Broadcast|Disp8MemShift=5|NoSuf|StaticRounding|SAE, { RegYMM|Word|Unspecified|BaseIndex, RegZMM }
 
 vcvtph2udq, 0x79, AVX512_FP16&AVX512VL, Modrm|EVex128|Masking|EVexMap5|VexW0|Broadcast|Disp8MemShift=3|NoSuf, { RegXMM|Word|Qword|Unspecified|BaseIndex, RegXMM }
-vcvtph2udq, 0x79, AVX512_FP16&AVX512VL, Modrm|EVex256|Masking|EVexMap5|VexW0|Broadcast|Disp8MemShift=4|NoSuf, { RegXMM|Word|Unspecified|BaseIndex, RegYMM }
+vcvtph2udq, 0x79, AVX512_FP16&AVX512VL, Modrm|EVex256|Masking|EVexMap5|VexW0|Broadcast|Disp8MemShift=4|NoSuf|StaticRounding|SAE, { RegXMM|Word|Unspecified|BaseIndex, RegYMM }
 vcvtph2udq, 0x79, AVX512_FP16, Modrm|EVex512|Masking|EVexMap5|VexW0|Broadcast|Disp8MemShift=5|NoSuf|StaticRounding|SAE, { RegYMM|Word|Unspecified|BaseIndex, RegZMM }
 
 vcvtph2qq, 0x667b, AVX512_FP16&AVX512VL, Modrm|EVex128|Masking|EVexMap5|VexW0|Broadcast|Disp8MemShift=2|NoSuf, { RegXMM|Word|Dword|Unspecified|BaseIndex, RegXMM }
-vcvtph2qq, 0x667b, AVX512_FP16&AVX512VL, Modrm|EVex256|Masking|EVexMap5|VexW0|Broadcast|Disp8MemShift=3|NoSuf, { RegXMM|Word|Qword|Unspecified|BaseIndex, RegYMM }
+vcvtph2qq, 0x667b, AVX512_FP16&AVX512VL, Modrm|EVex256|Masking|EVexMap5|VexW0|Broadcast|Disp8MemShift=3|NoSuf|StaticRounding|SAE, { RegXMM|Word|Qword|Unspecified|BaseIndex, RegYMM }
 vcvtph2qq, 0x667b, AVX512_FP16, Modrm|EVex512|Masking|EVexMap5|VexW0|Broadcast|Disp8MemShift=4|NoSuf|StaticRounding|SAE, { RegXMM|Word|Unspecified|BaseIndex, RegZMM }
 
 vcvtph2uqq, 0x6679, AVX512_FP16&AVX512VL, Modrm|EVex128|Masking|EVexMap5|VexW0|Broadcast|Disp8MemShift=2|NoSuf, { RegXMM|Word|Dword|Unspecified|BaseIndex, RegXMM }
-vcvtph2uqq, 0x6679, AVX512_FP16&AVX512VL, Modrm|EVex256|Masking|EVexMap5|VexW0|Broadcast|Disp8MemShift=3|NoSuf, { RegXMM|Word|Qword|Unspecified|BaseIndex, RegYMM }
+vcvtph2uqq, 0x6679, AVX512_FP16&AVX512VL, Modrm|EVex256|Masking|EVexMap5|VexW0|Broadcast|Disp8MemShift=3|NoSuf|StaticRounding|SAE, { RegXMM|Word|Qword|Unspecified|BaseIndex, RegYMM }
 vcvtph2uqq, 0x6679, AVX512_FP16, Modrm|EVex512|Masking|EVexMap5|VexW0|Broadcast|Disp8MemShift=4|NoSuf|StaticRounding|SAE, { RegXMM|Word|Unspecified|BaseIndex, RegZMM }
 
 vcvtph2pd, 0x5a, AVX512_FP16&AVX512VL, Modrm|EVex128|Masking|EVexMap5|VexW0|Broadcast|Disp8MemShift=2|NoSuf, { RegXMM|Word|Dword|Unspecified|BaseIndex, RegXMM }
-vcvtph2pd, 0x5a, AVX512_FP16&AVX512VL, Modrm|EVex256|Masking|EVexMap5|VexW0|Broadcast|Disp8MemShift=3|NoSuf, { RegXMM|Word|Qword|Unspecified|BaseIndex, RegYMM }
+vcvtph2pd, 0x5a, AVX512_FP16&AVX512VL, Modrm|EVex256|Masking|EVexMap5|VexW0|Broadcast|Disp8MemShift=3|NoSuf|SAE, { RegXMM|Word|Qword|Unspecified|BaseIndex, RegYMM }
 vcvtph2pd, 0x5a, AVX512_FP16, Modrm|EVex512|Masking|EVexMap5|VexW0|Broadcast|Disp8MemShift=4|NoSuf|SAE, { RegXMM|Word|Unspecified|BaseIndex, RegZMM }
 
 vcvtph2w, 0x667d, AVX512_FP16, Modrm|Masking|EVexMap5|VexW0|Broadcast|Disp8ShiftVL|CheckOperandSize|NoSuf|StaticRounding|SAE, { RegXMM|RegYMM|RegZMM|Word|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM }
@@ -3464,23 +3316,23 @@ vcvtsh2ss, 0x13, AVX512_FP16, Modrm|EVexLIG|Masking|EVexMap6|Src1VVVV|VexW0|Disp
 vcvtsh2si, 0xf32d, AVX512_FP16, Modrm|EVexLIG|EVexMap5|Disp8MemShift=1|NoSuf|StaticRounding|SAE, { RegXMM|Word|Unspecified|BaseIndex, Reg32|Reg64 }
 
 vcvttph2dq, 0xf35b, AVX512_FP16&AVX512VL, Modrm|EVex128|Masking|EVexMap5|VexW0|Broadcast|Disp8MemShift=3|NoSuf, { RegXMM|Word|Qword|Unspecified|BaseIndex, RegXMM }
-vcvttph2dq, 0xf35b, AVX512_FP16&AVX512VL, Modrm|EVex256|Masking|EVexMap5|VexW0|Broadcast|Disp8MemShift=4|NoSuf, { RegXMM|Word|Unspecified|BaseIndex, RegYMM }
+vcvttph2dq, 0xf35b, AVX512_FP16&AVX512VL, Modrm|EVex256|Masking|EVexMap5|VexW0|Broadcast|Disp8MemShift=4|NoSuf|SAE, { RegXMM|Word|Unspecified|BaseIndex, RegYMM }
 vcvttph2dq, 0xf35b, AVX512_FP16, Modrm|EVex512|Masking|EVexMap5|VexW0|Broadcast|Disp8MemShift=5|NoSuf|SAE, { RegYMM|Word|Unspecified|BaseIndex, RegZMM }
 
 vcvttph2udq, 0x78, AVX512_FP16&AVX512VL, Modrm|EVex128|Masking|EVexMap5|VexW0|Broadcast|Disp8MemShift=3|NoSuf, { RegXMM|Word|Qword|Unspecified|BaseIndex, RegXMM }
-vcvttph2udq, 0x78, AVX512_FP16&AVX512VL, Modrm|EVex256|Masking|EVexMap5|VexW0|Broadcast|Disp8MemShift=4|NoSuf, { RegXMM|Word|Unspecified|BaseIndex, RegYMM }
+vcvttph2udq, 0x78, AVX512_FP16&AVX512VL, Modrm|EVex256|Masking|EVexMap5|VexW0|Broadcast|Disp8MemShift=4|NoSuf|SAE, { RegXMM|Word|Unspecified|BaseIndex, RegYMM }
 vcvttph2udq, 0x78, AVX512_FP16, Modrm|EVex512|Masking|EVexMap5|VexW0|Broadcast|Disp8MemShift=5|NoSuf|SAE, { RegYMM|Word|Unspecified|BaseIndex, RegZMM }
 
 vcvttph2qq, 0x667a, AVX512_FP16&AVX512VL, Modrm|EVex128|Masking|EVexMap5|VexW0|Broadcast|Disp8MemShift=2|NoSuf, { RegXMM|Word|Dword|Unspecified|BaseIndex, RegXMM }
-vcvttph2qq, 0x667a, AVX512_FP16&AVX512VL, Modrm|EVex256|Masking|EVexMap5|VexW0|Broadcast|Disp8MemShift=3|NoSuf, { RegXMM|Word|Qword|Unspecified|BaseIndex, RegYMM }
+vcvttph2qq, 0x667a, AVX512_FP16&AVX512VL, Modrm|EVex256|Masking|EVexMap5|VexW0|Broadcast|Disp8MemShift=3|NoSuf|SAE, { RegXMM|Word|Qword|Unspecified|BaseIndex, RegYMM }
 vcvttph2qq, 0x667a, AVX512_FP16, Modrm|EVex512|Masking|EVexMap5|VexW0|Broadcast|Disp8MemShift=4|NoSuf|SAE, { RegXMM|Word|Unspecified|BaseIndex, RegZMM }
 
 vcvttph2uqq, 0x6678, AVX512_FP16&AVX512VL, Modrm|EVex128|Masking|EVexMap5|VexW0|Broadcast|Disp8MemShift=2|NoSuf, { RegXMM|Word|Dword|Unspecified|BaseIndex, RegXMM }
-vcvttph2uqq, 0x6678, AVX512_FP16&AVX512VL, Modrm|EVex256|Masking|EVexMap5|VexW0|Broadcast|Disp8MemShift=3|NoSuf, { RegXMM|Word|Qword|Unspecified|BaseIndex, RegYMM }
+vcvttph2uqq, 0x6678, AVX512_FP16&AVX512VL, Modrm|EVex256|Masking|EVexMap5|VexW0|Broadcast|Disp8MemShift=3|NoSuf|SAE, { RegXMM|Word|Qword|Unspecified|BaseIndex, RegYMM }
 vcvttph2uqq, 0x6678, AVX512_FP16, Modrm|EVex512|Masking|EVexMap5|VexW0|Broadcast|Disp8MemShift=4|NoSuf|SAE, { RegXMM|Word|Unspecified|BaseIndex, RegZMM }
 
 vcvtph2psx, 0x6613, AVX512_FP16&AVX512VL, Modrm|EVex128|Masking|EVexMap6|VexW0|Broadcast|Disp8MemShift=3|NoSuf, { RegXMM|Word|Qword|Unspecified|BaseIndex, RegXMM }
-vcvtph2psx, 0x6613, AVX512_FP16&AVX512VL, Modrm|EVex256|Masking|EVexMap6|VexW0|Broadcast|Disp8MemShift=4|NoSuf, { RegXMM|Word|Unspecified|BaseIndex, RegYMM }
+vcvtph2psx, 0x6613, AVX512_FP16&AVX512VL, Modrm|EVex256|Masking|EVexMap6|VexW0|Broadcast|Disp8MemShift=4|NoSuf|SAE, { RegXMM|Word|Unspecified|BaseIndex, RegYMM }
 vcvtph2psx, 0x6613, AVX512_FP16, Modrm|EVex512|Masking|EVexMap6|VexW0|Broadcast|Disp8MemShift=5|NoSuf|SAE, { RegYMM|Word|Unspecified|BaseIndex, RegZMM }
 
 vcvttph2w, 0x667c, AVX512_FP16, Modrm|Masking|EVexMap5|VexW0|Broadcast|Disp8ShiftVL|CheckOperandSize|NoSuf|SAE, { RegXMM|RegYMM|RegZMM|Word|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM }
@@ -3575,3 +3427,10 @@ pop2, 0x8f/0, APX_F, Modrm|VexW0|EVexMap4|DstVVVV|ImplicitStackOp|No_bSuf|No_wSu
 pop2p, 0x8f/0, APX_F, Modrm|VexW1|EVexMap4|DstVVVV|ImplicitStackOp|No_bSuf|No_wSuf|No_lSuf|No_sSuf, { Reg64, Reg64 }
 
 // APX Push2/Pop2 instructions end.
+
+// AVX10.2 instructions.
+
+vdpphps, 0x52, AVX10_2, Modrm|Space0F38|Src1VVVV|VexW0|Masking|Broadcast|Disp8ShiftVL|CheckOperandSize|NoSuf, { RegXMM|RegYMM|RegZMM|Dword|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM, RegXMM|RegYMM|RegZMM }
+vmpsadbw, 0xf342, AVX10_2, Modrm|Space0F3A|Src1VVVV|VexW0|Masking|Disp8ShiftVL|CheckOperandSize|NoSuf, { Imm8, RegXMM|RegYMM|RegZMM|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM, RegXMM|RegYMM|RegZMM }
+
+// AVX10.2 instructions end.
diff --git a/opcodes/i386-reg.tbl b/opcodes/i386-reg.tbl
index d441f36..e314645 100644
--- a/opcodes/i386-reg.tbl
+++ b/opcodes/i386-reg.tbl
@@ -38,30 +38,30 @@ spl, Class=Reg|Byte, RegRex64, 4, Dw2Inval, Dw2Inval
 bpl, Class=Reg|Byte, RegRex64, 5, Dw2Inval, Dw2Inval
 sil, Class=Reg|Byte, RegRex64, 6, Dw2Inval, Dw2Inval
 dil, Class=Reg|Byte, RegRex64, 7, Dw2Inval, Dw2Inval
-r8b, Class=Reg|Byte, RegRex|RegRex64, 0, Dw2Inval, Dw2Inval
-r9b, Class=Reg|Byte, RegRex|RegRex64, 1, Dw2Inval, Dw2Inval
-r10b, Class=Reg|Byte, RegRex|RegRex64, 2, Dw2Inval, Dw2Inval
-r11b, Class=Reg|Byte, RegRex|RegRex64, 3, Dw2Inval, Dw2Inval
-r12b, Class=Reg|Byte, RegRex|RegRex64, 4, Dw2Inval, Dw2Inval
-r13b, Class=Reg|Byte, RegRex|RegRex64, 5, Dw2Inval, Dw2Inval
-r14b, Class=Reg|Byte, RegRex|RegRex64, 6, Dw2Inval, Dw2Inval
-r15b, Class=Reg|Byte, RegRex|RegRex64, 7, Dw2Inval, Dw2Inval
-r16b, Class=Reg|Byte, RegRex2|RegRex64, 0, Dw2Inval, Dw2Inval
-r17b, Class=Reg|Byte, RegRex2|RegRex64, 1, Dw2Inval, Dw2Inval
-r18b, Class=Reg|Byte, RegRex2|RegRex64, 2, Dw2Inval, Dw2Inval
-r19b, Class=Reg|Byte, RegRex2|RegRex64, 3, Dw2Inval, Dw2Inval
-r20b, Class=Reg|Byte, RegRex2|RegRex64, 4, Dw2Inval, Dw2Inval
-r21b, Class=Reg|Byte, RegRex2|RegRex64, 5, Dw2Inval, Dw2Inval
-r22b, Class=Reg|Byte, RegRex2|RegRex64, 6, Dw2Inval, Dw2Inval
-r23b, Class=Reg|Byte, RegRex2|RegRex64, 7, Dw2Inval, Dw2Inval
-r24b, Class=Reg|Byte, RegRex2|RegRex64|RegRex, 0, Dw2Inval, Dw2Inval
-r25b, Class=Reg|Byte, RegRex2|RegRex64|RegRex, 1, Dw2Inval, Dw2Inval
-r26b, Class=Reg|Byte, RegRex2|RegRex64|RegRex, 2, Dw2Inval, Dw2Inval
-r27b, Class=Reg|Byte, RegRex2|RegRex64|RegRex, 3, Dw2Inval, Dw2Inval
-r28b, Class=Reg|Byte, RegRex2|RegRex64|RegRex, 4, Dw2Inval, Dw2Inval
-r29b, Class=Reg|Byte, RegRex2|RegRex64|RegRex, 5, Dw2Inval, Dw2Inval
-r30b, Class=Reg|Byte, RegRex2|RegRex64|RegRex, 6, Dw2Inval, Dw2Inval
-r31b, Class=Reg|Byte, RegRex2|RegRex64|RegRex, 7, Dw2Inval, Dw2Inval
+r8b, Class=Reg|Byte, RegRex, 0, Dw2Inval, Dw2Inval
+r9b, Class=Reg|Byte, RegRex, 1, Dw2Inval, Dw2Inval
+r10b, Class=Reg|Byte, RegRex, 2, Dw2Inval, Dw2Inval
+r11b, Class=Reg|Byte, RegRex, 3, Dw2Inval, Dw2Inval
+r12b, Class=Reg|Byte, RegRex, 4, Dw2Inval, Dw2Inval
+r13b, Class=Reg|Byte, RegRex, 5, Dw2Inval, Dw2Inval
+r14b, Class=Reg|Byte, RegRex, 6, Dw2Inval, Dw2Inval
+r15b, Class=Reg|Byte, RegRex, 7, Dw2Inval, Dw2Inval
+r16b, Class=Reg|Byte, RegRex2, 0, Dw2Inval, Dw2Inval
+r17b, Class=Reg|Byte, RegRex2, 1, Dw2Inval, Dw2Inval
+r18b, Class=Reg|Byte, RegRex2, 2, Dw2Inval, Dw2Inval
+r19b, Class=Reg|Byte, RegRex2, 3, Dw2Inval, Dw2Inval
+r20b, Class=Reg|Byte, RegRex2, 4, Dw2Inval, Dw2Inval
+r21b, Class=Reg|Byte, RegRex2, 5, Dw2Inval, Dw2Inval
+r22b, Class=Reg|Byte, RegRex2, 6, Dw2Inval, Dw2Inval
+r23b, Class=Reg|Byte, RegRex2, 7, Dw2Inval, Dw2Inval
+r24b, Class=Reg|Byte, RegRex2|RegRex, 0, Dw2Inval, Dw2Inval
+r25b, Class=Reg|Byte, RegRex2|RegRex, 1, Dw2Inval, Dw2Inval
+r26b, Class=Reg|Byte, RegRex2|RegRex, 2, Dw2Inval, Dw2Inval
+r27b, Class=Reg|Byte, RegRex2|RegRex, 3, Dw2Inval, Dw2Inval
+r28b, Class=Reg|Byte, RegRex2|RegRex, 4, Dw2Inval, Dw2Inval
+r29b, Class=Reg|Byte, RegRex2|RegRex, 5, Dw2Inval, Dw2Inval
+r30b, Class=Reg|Byte, RegRex2|RegRex, 6, Dw2Inval, Dw2Inval
+r31b, Class=Reg|Byte, RegRex2|RegRex, 7, Dw2Inval, Dw2Inval
 // 16 bit regs
 ax, Class=Reg|Instance=Accum|Word, 0, 0, Dw2Inval, Dw2Inval
 cx, Class=Reg|Word, 0, 1, Dw2Inval, Dw2Inval
diff --git a/opcodes/i386-tbl.h b/opcodes/i386-tbl.h
index e42254b..085e8cd 100644
--- a/opcodes/i386-tbl.h
+++ b/opcodes/i386-tbl.h
@@ -9628,7 +9628,7 @@ static const insn_template i386_optab[] =
 	  0, 0, 0, 0, 0, 0 } } } },
   { MN_cfcmovo, 0x40, 3, SPACE_EVEXMAP4, None,
     { 0, 0, 0, 1, 0, 0, 0, 1, 12, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 3, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 3, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0,
       0, 0 },
     { { 7, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
@@ -9639,7 +9639,7 @@ static const insn_template i386_optab[] =
       { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
   { MN_cfcmovo, 0x40, 2, SPACE_EVEXMAP4, None,
-    { 0, 0, 1, 1, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
+    { 1, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
     { { 7, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
@@ -9648,19 +9648,9 @@ static const insn_template i386_optab[] =
 	  0, 0, 0, 0, 1, 0 } },
       { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
-  { MN_cfcmovo, 0x40, 2, SPACE_EVEXMAP4, None,
-    { 0, 0, 0, 1, 0, 0, 0, 1, 12, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 7, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0,
-	  0, 0, 0, 0, 0, 0 } },
-      { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 1, 1, 0, 1, 0,
-	  0, 0, 0, 0, 1, 0 } } } },
   { MN_cfcmovno, 0x41, 3, SPACE_EVEXMAP4, None,
     { 0, 0, 0, 1, 0, 0, 0, 1, 12, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 3, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 3, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0,
       0, 0 },
     { { 7, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
@@ -9671,7 +9661,7 @@ static const insn_template i386_optab[] =
       { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
   { MN_cfcmovno, 0x41, 2, SPACE_EVEXMAP4, None,
-    { 0, 0, 1, 1, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
+    { 1, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
     { { 7, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
@@ -9680,19 +9670,9 @@ static const insn_template i386_optab[] =
 	  0, 0, 0, 0, 1, 0 } },
       { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
-  { MN_cfcmovno, 0x41, 2, SPACE_EVEXMAP4, None,
-    { 0, 0, 0, 1, 0, 0, 0, 1, 12, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 7, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0,
-	  0, 0, 0, 0, 0, 0 } },
-      { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 1, 1, 0, 1, 0,
-	  0, 0, 0, 0, 1, 0 } } } },
   { MN_cfcmovb, 0x42, 3, SPACE_EVEXMAP4, None,
     { 0, 0, 0, 1, 0, 0, 0, 1, 12, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 3, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 3, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0,
       0, 0 },
     { { 7, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
@@ -9703,7 +9683,7 @@ static const insn_template i386_optab[] =
       { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
   { MN_cfcmovb, 0x42, 2, SPACE_EVEXMAP4, None,
-    { 0, 0, 1, 1, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
+    { 1, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
     { { 7, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
@@ -9712,19 +9692,9 @@ static const insn_template i386_optab[] =
 	  0, 0, 0, 0, 1, 0 } },
       { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
-  { MN_cfcmovb, 0x42, 2, SPACE_EVEXMAP4, None,
-    { 0, 0, 0, 1, 0, 0, 0, 1, 12, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 7, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0,
-	  0, 0, 0, 0, 0, 0 } },
-      { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 1, 1, 0, 1, 0,
-	  0, 0, 0, 0, 1, 0 } } } },
   { MN_cfcmovc, 0x42, 3, SPACE_EVEXMAP4, None,
     { 0, 0, 0, 1, 0, 0, 0, 1, 12, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 3, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 3, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0,
       0, 0 },
     { { 7, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
@@ -9735,7 +9705,7 @@ static const insn_template i386_optab[] =
       { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
   { MN_cfcmovc, 0x42, 2, SPACE_EVEXMAP4, None,
-    { 0, 0, 1, 1, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
+    { 1, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
     { { 7, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
@@ -9744,19 +9714,9 @@ static const insn_template i386_optab[] =
 	  0, 0, 0, 0, 1, 0 } },
       { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
-  { MN_cfcmovc, 0x42, 2, SPACE_EVEXMAP4, None,
-    { 0, 0, 0, 1, 0, 0, 0, 1, 12, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 7, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0,
-	  0, 0, 0, 0, 0, 0 } },
-      { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 1, 1, 0, 1, 0,
-	  0, 0, 0, 0, 1, 0 } } } },
   { MN_cfcmovnae, 0x42, 3, SPACE_EVEXMAP4, None,
     { 0, 0, 0, 1, 0, 0, 0, 1, 12, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 3, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 3, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0,
       0, 0 },
     { { 7, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
@@ -9767,7 +9727,7 @@ static const insn_template i386_optab[] =
       { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
   { MN_cfcmovnae, 0x42, 2, SPACE_EVEXMAP4, None,
-    { 0, 0, 1, 1, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
+    { 1, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
     { { 7, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
@@ -9776,19 +9736,9 @@ static const insn_template i386_optab[] =
 	  0, 0, 0, 0, 1, 0 } },
       { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
-  { MN_cfcmovnae, 0x42, 2, SPACE_EVEXMAP4, None,
-    { 0, 0, 0, 1, 0, 0, 0, 1, 12, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 7, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0,
-	  0, 0, 0, 0, 0, 0 } },
-      { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 1, 1, 0, 1, 0,
-	  0, 0, 0, 0, 1, 0 } } } },
   { MN_cfcmovnb, 0x43, 3, SPACE_EVEXMAP4, None,
     { 0, 0, 0, 1, 0, 0, 0, 1, 12, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 3, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 3, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0,
       0, 0 },
     { { 7, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
@@ -9799,7 +9749,7 @@ static const insn_template i386_optab[] =
       { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
   { MN_cfcmovnb, 0x43, 2, SPACE_EVEXMAP4, None,
-    { 0, 0, 1, 1, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
+    { 1, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
     { { 7, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
@@ -9808,19 +9758,9 @@ static const insn_template i386_optab[] =
 	  0, 0, 0, 0, 1, 0 } },
       { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
-  { MN_cfcmovnb, 0x43, 2, SPACE_EVEXMAP4, None,
-    { 0, 0, 0, 1, 0, 0, 0, 1, 12, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 7, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0,
-	  0, 0, 0, 0, 0, 0 } },
-      { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 1, 1, 0, 1, 0,
-	  0, 0, 0, 0, 1, 0 } } } },
   { MN_cfcmovnc, 0x43, 3, SPACE_EVEXMAP4, None,
     { 0, 0, 0, 1, 0, 0, 0, 1, 12, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 3, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 3, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0,
       0, 0 },
     { { 7, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
@@ -9831,7 +9771,7 @@ static const insn_template i386_optab[] =
       { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
   { MN_cfcmovnc, 0x43, 2, SPACE_EVEXMAP4, None,
-    { 0, 0, 1, 1, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
+    { 1, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
     { { 7, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
@@ -9840,19 +9780,9 @@ static const insn_template i386_optab[] =
 	  0, 0, 0, 0, 1, 0 } },
       { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
-  { MN_cfcmovnc, 0x43, 2, SPACE_EVEXMAP4, None,
-    { 0, 0, 0, 1, 0, 0, 0, 1, 12, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 7, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0,
-	  0, 0, 0, 0, 0, 0 } },
-      { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 1, 1, 0, 1, 0,
-	  0, 0, 0, 0, 1, 0 } } } },
   { MN_cfcmovae, 0x43, 3, SPACE_EVEXMAP4, None,
     { 0, 0, 0, 1, 0, 0, 0, 1, 12, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 3, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 3, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0,
       0, 0 },
     { { 7, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
@@ -9863,7 +9793,7 @@ static const insn_template i386_optab[] =
       { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
   { MN_cfcmovae, 0x43, 2, SPACE_EVEXMAP4, None,
-    { 0, 0, 1, 1, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
+    { 1, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
     { { 7, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
@@ -9872,19 +9802,9 @@ static const insn_template i386_optab[] =
 	  0, 0, 0, 0, 1, 0 } },
       { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
-  { MN_cfcmovae, 0x43, 2, SPACE_EVEXMAP4, None,
-    { 0, 0, 0, 1, 0, 0, 0, 1, 12, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 7, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0,
-	  0, 0, 0, 0, 0, 0 } },
-      { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 1, 1, 0, 1, 0,
-	  0, 0, 0, 0, 1, 0 } } } },
   { MN_cfcmove, 0x44, 3, SPACE_EVEXMAP4, None,
     { 0, 0, 0, 1, 0, 0, 0, 1, 12, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 3, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 3, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0,
       0, 0 },
     { { 7, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
@@ -9895,7 +9815,7 @@ static const insn_template i386_optab[] =
       { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
   { MN_cfcmove, 0x44, 2, SPACE_EVEXMAP4, None,
-    { 0, 0, 1, 1, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
+    { 1, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
     { { 7, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
@@ -9904,19 +9824,9 @@ static const insn_template i386_optab[] =
 	  0, 0, 0, 0, 1, 0 } },
       { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
-  { MN_cfcmove, 0x44, 2, SPACE_EVEXMAP4, None,
-    { 0, 0, 0, 1, 0, 0, 0, 1, 12, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 7, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0,
-	  0, 0, 0, 0, 0, 0 } },
-      { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 1, 1, 0, 1, 0,
-	  0, 0, 0, 0, 1, 0 } } } },
   { MN_cfcmovz, 0x44, 3, SPACE_EVEXMAP4, None,
     { 0, 0, 0, 1, 0, 0, 0, 1, 12, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 3, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 3, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0,
       0, 0 },
     { { 7, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
@@ -9927,7 +9837,7 @@ static const insn_template i386_optab[] =
       { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
   { MN_cfcmovz, 0x44, 2, SPACE_EVEXMAP4, None,
-    { 0, 0, 1, 1, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
+    { 1, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
     { { 7, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
@@ -9936,19 +9846,9 @@ static const insn_template i386_optab[] =
 	  0, 0, 0, 0, 1, 0 } },
       { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
-  { MN_cfcmovz, 0x44, 2, SPACE_EVEXMAP4, None,
-    { 0, 0, 0, 1, 0, 0, 0, 1, 12, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 7, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0,
-	  0, 0, 0, 0, 0, 0 } },
-      { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 1, 1, 0, 1, 0,
-	  0, 0, 0, 0, 1, 0 } } } },
   { MN_cfcmovne, 0x45, 3, SPACE_EVEXMAP4, None,
     { 0, 0, 0, 1, 0, 0, 0, 1, 12, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 3, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 3, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0,
       0, 0 },
     { { 7, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
@@ -9959,7 +9859,7 @@ static const insn_template i386_optab[] =
       { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
   { MN_cfcmovne, 0x45, 2, SPACE_EVEXMAP4, None,
-    { 0, 0, 1, 1, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
+    { 1, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
     { { 7, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
@@ -9968,19 +9868,9 @@ static const insn_template i386_optab[] =
 	  0, 0, 0, 0, 1, 0 } },
       { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
-  { MN_cfcmovne, 0x45, 2, SPACE_EVEXMAP4, None,
-    { 0, 0, 0, 1, 0, 0, 0, 1, 12, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 7, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0,
-	  0, 0, 0, 0, 0, 0 } },
-      { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 1, 1, 0, 1, 0,
-	  0, 0, 0, 0, 1, 0 } } } },
   { MN_cfcmovnz, 0x45, 3, SPACE_EVEXMAP4, None,
     { 0, 0, 0, 1, 0, 0, 0, 1, 12, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 3, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 3, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0,
       0, 0 },
     { { 7, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
@@ -9991,7 +9881,7 @@ static const insn_template i386_optab[] =
       { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
   { MN_cfcmovnz, 0x45, 2, SPACE_EVEXMAP4, None,
-    { 0, 0, 1, 1, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
+    { 1, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
     { { 7, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
@@ -10000,19 +9890,9 @@ static const insn_template i386_optab[] =
 	  0, 0, 0, 0, 1, 0 } },
       { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
-  { MN_cfcmovnz, 0x45, 2, SPACE_EVEXMAP4, None,
-    { 0, 0, 0, 1, 0, 0, 0, 1, 12, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 7, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0,
-	  0, 0, 0, 0, 0, 0 } },
-      { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 1, 1, 0, 1, 0,
-	  0, 0, 0, 0, 1, 0 } } } },
   { MN_cfcmovbe, 0x46, 3, SPACE_EVEXMAP4, None,
     { 0, 0, 0, 1, 0, 0, 0, 1, 12, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 3, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 3, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0,
       0, 0 },
     { { 7, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
@@ -10023,7 +9903,7 @@ static const insn_template i386_optab[] =
       { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
   { MN_cfcmovbe, 0x46, 2, SPACE_EVEXMAP4, None,
-    { 0, 0, 1, 1, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
+    { 1, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
     { { 7, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
@@ -10032,19 +9912,9 @@ static const insn_template i386_optab[] =
 	  0, 0, 0, 0, 1, 0 } },
       { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
-  { MN_cfcmovbe, 0x46, 2, SPACE_EVEXMAP4, None,
-    { 0, 0, 0, 1, 0, 0, 0, 1, 12, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 7, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0,
-	  0, 0, 0, 0, 0, 0 } },
-      { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 1, 1, 0, 1, 0,
-	  0, 0, 0, 0, 1, 0 } } } },
   { MN_cfcmovna, 0x46, 3, SPACE_EVEXMAP4, None,
     { 0, 0, 0, 1, 0, 0, 0, 1, 12, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 3, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 3, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0,
       0, 0 },
     { { 7, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
@@ -10055,7 +9925,7 @@ static const insn_template i386_optab[] =
       { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
   { MN_cfcmovna, 0x46, 2, SPACE_EVEXMAP4, None,
-    { 0, 0, 1, 1, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
+    { 1, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
     { { 7, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
@@ -10064,19 +9934,9 @@ static const insn_template i386_optab[] =
 	  0, 0, 0, 0, 1, 0 } },
       { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
-  { MN_cfcmovna, 0x46, 2, SPACE_EVEXMAP4, None,
-    { 0, 0, 0, 1, 0, 0, 0, 1, 12, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 7, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0,
-	  0, 0, 0, 0, 0, 0 } },
-      { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 1, 1, 0, 1, 0,
-	  0, 0, 0, 0, 1, 0 } } } },
   { MN_cfcmovnbe, 0x47, 3, SPACE_EVEXMAP4, None,
     { 0, 0, 0, 1, 0, 0, 0, 1, 12, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 3, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 3, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0,
       0, 0 },
     { { 7, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
@@ -10087,7 +9947,7 @@ static const insn_template i386_optab[] =
       { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
   { MN_cfcmovnbe, 0x47, 2, SPACE_EVEXMAP4, None,
-    { 0, 0, 1, 1, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
+    { 1, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
     { { 7, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
@@ -10096,19 +9956,9 @@ static const insn_template i386_optab[] =
 	  0, 0, 0, 0, 1, 0 } },
       { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
-  { MN_cfcmovnbe, 0x47, 2, SPACE_EVEXMAP4, None,
-    { 0, 0, 0, 1, 0, 0, 0, 1, 12, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 7, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0,
-	  0, 0, 0, 0, 0, 0 } },
-      { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 1, 1, 0, 1, 0,
-	  0, 0, 0, 0, 1, 0 } } } },
   { MN_cfcmova, 0x47, 3, SPACE_EVEXMAP4, None,
     { 0, 0, 0, 1, 0, 0, 0, 1, 12, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 3, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 3, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0,
       0, 0 },
     { { 7, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
@@ -10119,7 +9969,7 @@ static const insn_template i386_optab[] =
       { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
   { MN_cfcmova, 0x47, 2, SPACE_EVEXMAP4, None,
-    { 0, 0, 1, 1, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
+    { 1, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
     { { 7, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
@@ -10128,19 +9978,9 @@ static const insn_template i386_optab[] =
 	  0, 0, 0, 0, 1, 0 } },
       { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
-  { MN_cfcmova, 0x47, 2, SPACE_EVEXMAP4, None,
-    { 0, 0, 0, 1, 0, 0, 0, 1, 12, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 7, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0,
-	  0, 0, 0, 0, 0, 0 } },
-      { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 1, 1, 0, 1, 0,
-	  0, 0, 0, 0, 1, 0 } } } },
   { MN_cfcmovs, 0x48, 3, SPACE_EVEXMAP4, None,
     { 0, 0, 0, 1, 0, 0, 0, 1, 12, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 3, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 3, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0,
       0, 0 },
     { { 7, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
@@ -10151,7 +9991,7 @@ static const insn_template i386_optab[] =
       { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
   { MN_cfcmovs, 0x48, 2, SPACE_EVEXMAP4, None,
-    { 0, 0, 1, 1, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
+    { 1, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
     { { 7, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
@@ -10160,19 +10000,9 @@ static const insn_template i386_optab[] =
 	  0, 0, 0, 0, 1, 0 } },
       { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
-  { MN_cfcmovs, 0x48, 2, SPACE_EVEXMAP4, None,
-    { 0, 0, 0, 1, 0, 0, 0, 1, 12, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 7, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0,
-	  0, 0, 0, 0, 0, 0 } },
-      { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 1, 1, 0, 1, 0,
-	  0, 0, 0, 0, 1, 0 } } } },
   { MN_cfcmovns, 0x49, 3, SPACE_EVEXMAP4, None,
     { 0, 0, 0, 1, 0, 0, 0, 1, 12, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 3, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 3, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0,
       0, 0 },
     { { 7, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
@@ -10183,7 +10013,7 @@ static const insn_template i386_optab[] =
       { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
   { MN_cfcmovns, 0x49, 2, SPACE_EVEXMAP4, None,
-    { 0, 0, 1, 1, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
+    { 1, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
     { { 7, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
@@ -10192,19 +10022,9 @@ static const insn_template i386_optab[] =
 	  0, 0, 0, 0, 1, 0 } },
       { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
-  { MN_cfcmovns, 0x49, 2, SPACE_EVEXMAP4, None,
-    { 0, 0, 0, 1, 0, 0, 0, 1, 12, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 7, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0,
-	  0, 0, 0, 0, 0, 0 } },
-      { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 1, 1, 0, 1, 0,
-	  0, 0, 0, 0, 1, 0 } } } },
   { MN_cfcmovp, 0x4a, 3, SPACE_EVEXMAP4, None,
     { 0, 0, 0, 1, 0, 0, 0, 1, 12, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 3, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 3, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0,
       0, 0 },
     { { 7, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
@@ -10215,7 +10035,7 @@ static const insn_template i386_optab[] =
       { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
   { MN_cfcmovp, 0x4a, 2, SPACE_EVEXMAP4, None,
-    { 0, 0, 1, 1, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
+    { 1, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
     { { 7, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
@@ -10224,19 +10044,9 @@ static const insn_template i386_optab[] =
 	  0, 0, 0, 0, 1, 0 } },
       { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
-  { MN_cfcmovp, 0x4a, 2, SPACE_EVEXMAP4, None,
-    { 0, 0, 0, 1, 0, 0, 0, 1, 12, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 7, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0,
-	  0, 0, 0, 0, 0, 0 } },
-      { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 1, 1, 0, 1, 0,
-	  0, 0, 0, 0, 1, 0 } } } },
   { MN_cfcmovpe, 0x4a, 3, SPACE_EVEXMAP4, None,
     { 0, 0, 0, 1, 0, 0, 0, 1, 12, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 3, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 3, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0,
       0, 0 },
     { { 7, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
@@ -10247,7 +10057,7 @@ static const insn_template i386_optab[] =
       { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
   { MN_cfcmovpe, 0x4a, 2, SPACE_EVEXMAP4, None,
-    { 0, 0, 1, 1, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
+    { 1, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
     { { 7, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
@@ -10256,19 +10066,9 @@ static const insn_template i386_optab[] =
 	  0, 0, 0, 0, 1, 0 } },
       { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
-  { MN_cfcmovpe, 0x4a, 2, SPACE_EVEXMAP4, None,
-    { 0, 0, 0, 1, 0, 0, 0, 1, 12, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 7, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0,
-	  0, 0, 0, 0, 0, 0 } },
-      { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 1, 1, 0, 1, 0,
-	  0, 0, 0, 0, 1, 0 } } } },
   { MN_cfcmovnp, 0x4b, 3, SPACE_EVEXMAP4, None,
     { 0, 0, 0, 1, 0, 0, 0, 1, 12, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 3, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 3, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0,
       0, 0 },
     { { 7, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
@@ -10279,7 +10079,7 @@ static const insn_template i386_optab[] =
       { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
   { MN_cfcmovnp, 0x4b, 2, SPACE_EVEXMAP4, None,
-    { 0, 0, 1, 1, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
+    { 1, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
     { { 7, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
@@ -10288,19 +10088,9 @@ static const insn_template i386_optab[] =
 	  0, 0, 0, 0, 1, 0 } },
       { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
-  { MN_cfcmovnp, 0x4b, 2, SPACE_EVEXMAP4, None,
-    { 0, 0, 0, 1, 0, 0, 0, 1, 12, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 7, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0,
-	  0, 0, 0, 0, 0, 0 } },
-      { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 1, 1, 0, 1, 0,
-	  0, 0, 0, 0, 1, 0 } } } },
   { MN_cfcmovpo, 0x4b, 3, SPACE_EVEXMAP4, None,
     { 0, 0, 0, 1, 0, 0, 0, 1, 12, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 3, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 3, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0,
       0, 0 },
     { { 7, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
@@ -10311,7 +10101,7 @@ static const insn_template i386_optab[] =
       { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
   { MN_cfcmovpo, 0x4b, 2, SPACE_EVEXMAP4, None,
-    { 0, 0, 1, 1, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
+    { 1, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
     { { 7, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
@@ -10320,19 +10110,9 @@ static const insn_template i386_optab[] =
 	  0, 0, 0, 0, 1, 0 } },
       { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
-  { MN_cfcmovpo, 0x4b, 2, SPACE_EVEXMAP4, None,
-    { 0, 0, 0, 1, 0, 0, 0, 1, 12, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 7, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0,
-	  0, 0, 0, 0, 0, 0 } },
-      { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 1, 1, 0, 1, 0,
-	  0, 0, 0, 0, 1, 0 } } } },
   { MN_cfcmovl, 0x4c, 3, SPACE_EVEXMAP4, None,
     { 0, 0, 0, 1, 0, 0, 0, 1, 12, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 3, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 3, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0,
       0, 0 },
     { { 7, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
@@ -10343,7 +10123,7 @@ static const insn_template i386_optab[] =
       { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
   { MN_cfcmovl, 0x4c, 2, SPACE_EVEXMAP4, None,
-    { 0, 0, 1, 1, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
+    { 1, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
     { { 7, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
@@ -10352,19 +10132,9 @@ static const insn_template i386_optab[] =
 	  0, 0, 0, 0, 1, 0 } },
       { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
-  { MN_cfcmovl, 0x4c, 2, SPACE_EVEXMAP4, None,
-    { 0, 0, 0, 1, 0, 0, 0, 1, 12, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 7, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0,
-	  0, 0, 0, 0, 0, 0 } },
-      { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 1, 1, 0, 1, 0,
-	  0, 0, 0, 0, 1, 0 } } } },
   { MN_cfcmovnge, 0x4c, 3, SPACE_EVEXMAP4, None,
     { 0, 0, 0, 1, 0, 0, 0, 1, 12, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 3, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 3, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0,
       0, 0 },
     { { 7, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
@@ -10375,7 +10145,7 @@ static const insn_template i386_optab[] =
       { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
   { MN_cfcmovnge, 0x4c, 2, SPACE_EVEXMAP4, None,
-    { 0, 0, 1, 1, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
+    { 1, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
     { { 7, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
@@ -10384,19 +10154,9 @@ static const insn_template i386_optab[] =
 	  0, 0, 0, 0, 1, 0 } },
       { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
-  { MN_cfcmovnge, 0x4c, 2, SPACE_EVEXMAP4, None,
-    { 0, 0, 0, 1, 0, 0, 0, 1, 12, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 7, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0,
-	  0, 0, 0, 0, 0, 0 } },
-      { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 1, 1, 0, 1, 0,
-	  0, 0, 0, 0, 1, 0 } } } },
   { MN_cfcmovnl, 0x4d, 3, SPACE_EVEXMAP4, None,
     { 0, 0, 0, 1, 0, 0, 0, 1, 12, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 3, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 3, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0,
       0, 0 },
     { { 7, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
@@ -10407,7 +10167,7 @@ static const insn_template i386_optab[] =
       { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
   { MN_cfcmovnl, 0x4d, 2, SPACE_EVEXMAP4, None,
-    { 0, 0, 1, 1, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
+    { 1, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
     { { 7, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
@@ -10416,19 +10176,9 @@ static const insn_template i386_optab[] =
 	  0, 0, 0, 0, 1, 0 } },
       { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
-  { MN_cfcmovnl, 0x4d, 2, SPACE_EVEXMAP4, None,
-    { 0, 0, 0, 1, 0, 0, 0, 1, 12, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 7, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0,
-	  0, 0, 0, 0, 0, 0 } },
-      { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 1, 1, 0, 1, 0,
-	  0, 0, 0, 0, 1, 0 } } } },
   { MN_cfcmovge, 0x4d, 3, SPACE_EVEXMAP4, None,
     { 0, 0, 0, 1, 0, 0, 0, 1, 12, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 3, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 3, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0,
       0, 0 },
     { { 7, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
@@ -10439,7 +10189,7 @@ static const insn_template i386_optab[] =
       { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
   { MN_cfcmovge, 0x4d, 2, SPACE_EVEXMAP4, None,
-    { 0, 0, 1, 1, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
+    { 1, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
     { { 7, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
@@ -10448,19 +10198,9 @@ static const insn_template i386_optab[] =
 	  0, 0, 0, 0, 1, 0 } },
       { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
-  { MN_cfcmovge, 0x4d, 2, SPACE_EVEXMAP4, None,
-    { 0, 0, 0, 1, 0, 0, 0, 1, 12, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 7, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0,
-	  0, 0, 0, 0, 0, 0 } },
-      { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 1, 1, 0, 1, 0,
-	  0, 0, 0, 0, 1, 0 } } } },
   { MN_cfcmovle, 0x4e, 3, SPACE_EVEXMAP4, None,
     { 0, 0, 0, 1, 0, 0, 0, 1, 12, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 3, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 3, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0,
       0, 0 },
     { { 7, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
@@ -10471,7 +10211,7 @@ static const insn_template i386_optab[] =
       { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
   { MN_cfcmovle, 0x4e, 2, SPACE_EVEXMAP4, None,
-    { 0, 0, 1, 1, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
+    { 1, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
     { { 7, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
@@ -10480,19 +10220,9 @@ static const insn_template i386_optab[] =
 	  0, 0, 0, 0, 1, 0 } },
       { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
-  { MN_cfcmovle, 0x4e, 2, SPACE_EVEXMAP4, None,
-    { 0, 0, 0, 1, 0, 0, 0, 1, 12, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 7, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0,
-	  0, 0, 0, 0, 0, 0 } },
-      { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 1, 1, 0, 1, 0,
-	  0, 0, 0, 0, 1, 0 } } } },
   { MN_cfcmovng, 0x4e, 3, SPACE_EVEXMAP4, None,
     { 0, 0, 0, 1, 0, 0, 0, 1, 12, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 3, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 3, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0,
       0, 0 },
     { { 7, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
@@ -10503,7 +10233,7 @@ static const insn_template i386_optab[] =
       { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
   { MN_cfcmovng, 0x4e, 2, SPACE_EVEXMAP4, None,
-    { 0, 0, 1, 1, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
+    { 1, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
     { { 7, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
@@ -10512,19 +10242,9 @@ static const insn_template i386_optab[] =
 	  0, 0, 0, 0, 1, 0 } },
       { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
-  { MN_cfcmovng, 0x4e, 2, SPACE_EVEXMAP4, None,
-    { 0, 0, 0, 1, 0, 0, 0, 1, 12, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 7, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0,
-	  0, 0, 0, 0, 0, 0 } },
-      { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 1, 1, 0, 1, 0,
-	  0, 0, 0, 0, 1, 0 } } } },
   { MN_cfcmovnle, 0x4f, 3, SPACE_EVEXMAP4, None,
     { 0, 0, 0, 1, 0, 0, 0, 1, 12, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 3, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 3, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0,
       0, 0 },
     { { 7, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
@@ -10535,7 +10255,7 @@ static const insn_template i386_optab[] =
       { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
   { MN_cfcmovnle, 0x4f, 2, SPACE_EVEXMAP4, None,
-    { 0, 0, 1, 1, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
+    { 1, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
     { { 7, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
@@ -10544,19 +10264,9 @@ static const insn_template i386_optab[] =
 	  0, 0, 0, 0, 1, 0 } },
       { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
-  { MN_cfcmovnle, 0x4f, 2, SPACE_EVEXMAP4, None,
-    { 0, 0, 0, 1, 0, 0, 0, 1, 12, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 7, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0,
-	  0, 0, 0, 0, 0, 0 } },
-      { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 1, 1, 0, 1, 0,
-	  0, 0, 0, 0, 1, 0 } } } },
   { MN_cfcmovg, 0x4f, 3, SPACE_EVEXMAP4, None,
     { 0, 0, 0, 1, 0, 0, 0, 1, 12, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 3, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 3, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0,
       0, 0 },
     { { 7, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
@@ -10567,7 +10277,7 @@ static const insn_template i386_optab[] =
       { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
   { MN_cfcmovg, 0x4f, 2, SPACE_EVEXMAP4, None,
-    { 0, 0, 1, 1, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
+    { 1, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
     { { 7, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
@@ -10576,16 +10286,6 @@ static const insn_template i386_optab[] =
 	  0, 0, 0, 0, 1, 0 } },
       { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
-  { MN_cfcmovg, 0x4f, 2, SPACE_EVEXMAP4, None,
-    { 0, 0, 0, 1, 0, 0, 0, 1, 12, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 7, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0,
-	  0, 0, 0, 0, 0, 0 } },
-      { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 1, 1, 0, 1, 0,
-	  0, 0, 0, 0, 1, 0 } } } },
   { MN_fcmovb, 0xda, 2, SPACE_BASE, 0,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
@@ -13052,6 +12752,106 @@ static const insn_template i386_optab[] =
 	  1, 0, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_subps, 0x5c, 2, SPACE_0F, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 1, 1, 1, 0, 0, 1, 2, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_subps, 0x5c, 2, SPACE_0F, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_mulps, 0x59, 2, SPACE_0F, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 1, 1, 1, 0, 0, 1, 2, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_mulps, 0x59, 2, SPACE_0F, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_divps, 0x5e, 2, SPACE_0F, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 1, 1, 1, 0, 0, 1, 2, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_divps, 0x5e, 2, SPACE_0F, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_minps, 0x5d, 2, SPACE_0F, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 1, 1, 1, 0, 0, 1, 2, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_minps, 0x5d, 2, SPACE_0F, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_maxps, 0x5f, 2, SPACE_0F, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 1, 1, 1, 0, 0, 1, 2, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_maxps, 0x5f, 2, SPACE_0F, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
   { MN_addss, 0x58, 2, SPACE_0F, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 3, 1, 1, 2, 0, 1, 4, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0,
@@ -13072,6 +12872,136 @@ static const insn_template i386_optab[] =
 	  1, 0, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_subss, 0x5c, 2, SPACE_0F, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 3, 1, 1, 2, 0, 1, 4, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
+	  1, 0, 0, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_subss, 0x5c, 2, SPACE_0F, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
+	  1, 0, 0, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_mulss, 0x59, 2, SPACE_0F, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 3, 1, 1, 2, 0, 1, 4, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
+	  1, 0, 0, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_mulss, 0x59, 2, SPACE_0F, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
+	  1, 0, 0, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_divss, 0x5e, 2, SPACE_0F, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 3, 1, 1, 2, 0, 1, 4, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
+	  1, 0, 0, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_divss, 0x5e, 2, SPACE_0F, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
+	  1, 0, 0, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_minss, 0x5d, 2, SPACE_0F, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 3, 1, 1, 2, 0, 1, 4, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
+	  1, 0, 0, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_minss, 0x5d, 2, SPACE_0F, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
+	  1, 0, 0, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_maxss, 0x5f, 2, SPACE_0F, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 3, 1, 1, 2, 0, 1, 4, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
+	  1, 0, 0, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_maxss, 0x5f, 2, SPACE_0F, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
+	  1, 0, 0, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_andps, 0x54, 2, SPACE_0F, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 1, 1, 1, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1,
+      0, 0 },
+    { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_andps, 0x54, 2, SPACE_0F, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 1, 1, 0, 0, 1, 2, 0, 0, 1, 0, 4, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 34, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_andps, 0x54, 2, SPACE_0F, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
   { MN_andnps, 0x55, 2, SPACE_0F, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 1, 1, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
@@ -13102,7 +13032,7 @@ static const insn_template i386_optab[] =
 	  1, 0, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_andps, 0x54, 2, SPACE_0F, None,
+  { MN_orps, 0x56, 2, SPACE_0F, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 1, 1, 1, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1,
       0, 0 },
@@ -13112,7 +13042,7 @@ static const insn_template i386_optab[] =
 	  1, 0, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_andps, 0x54, 2, SPACE_0F, None,
+  { MN_orps, 0x56, 2, SPACE_0F, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 1, 1, 0, 0, 1, 2, 0, 0, 1, 0, 4, 0, 0, 0, 0, 0,
       0, 0 },
@@ -13122,7 +13052,37 @@ static const insn_template i386_optab[] =
 	  1, 0, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_andps, 0x54, 2, SPACE_0F, None,
+  { MN_orps, 0x56, 2, SPACE_0F, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_xorps, 0x57, 2, SPACE_0F, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 1, 1, 1, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1,
+      0, 0 },
+    { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_xorps, 0x57, 2, SPACE_0F, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 1, 1, 0, 0, 1, 2, 0, 0, 1, 0, 4, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 34, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_xorps, 0x57, 2, SPACE_0F, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
@@ -13650,46 +13610,6 @@ static const insn_template i386_optab[] =
 	  1, 0, 0, 0, 1, 0 } },
       { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
-  { MN_divps, 0x5e, 2, SPACE_0F, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 1, 1, 1, 0, 0, 1, 2, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_divps, 0x5e, 2, SPACE_0F, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_divss, 0x5e, 2, SPACE_0F, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 3, 1, 1, 2, 0, 1, 4, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
-	  1, 0, 0, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_divss, 0x5e, 2, SPACE_0F, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
-	  1, 0, 0, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } } } },
   { MN_ldmxcsr, 0xae, 1, SPACE_0F, 2,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 1, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
@@ -13716,86 +13636,6 @@ static const insn_template i386_optab[] =
 	  0, 0, 0, 0, 0, 0 } },
       { { 6, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
-  { MN_maxps, 0x5f, 2, SPACE_0F, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 1, 1, 1, 0, 0, 1, 2, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_maxps, 0x5f, 2, SPACE_0F, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_maxss, 0x5f, 2, SPACE_0F, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 3, 1, 1, 2, 0, 1, 4, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
-	  1, 0, 0, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_maxss, 0x5f, 2, SPACE_0F, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
-	  1, 0, 0, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_minps, 0x5d, 2, SPACE_0F, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 1, 1, 1, 0, 0, 1, 2, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_minps, 0x5d, 2, SPACE_0F, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_minss, 0x5d, 2, SPACE_0F, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 3, 1, 1, 2, 0, 1, 4, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
-	  1, 0, 0, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_minss, 0x5d, 2, SPACE_0F, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
-	  1, 0, 0, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } } } },
   { MN_movaps, 0x28, 2, SPACE_0F, None,
     { 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 1, 0, 1, 0, 0, 1, 2, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0,
@@ -14036,76 +13876,6 @@ static const insn_template i386_optab[] =
 	  1, 0, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_mulps, 0x59, 2, SPACE_0F, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 1, 1, 1, 0, 0, 1, 2, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_mulps, 0x59, 2, SPACE_0F, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_mulss, 0x59, 2, SPACE_0F, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 3, 1, 1, 2, 0, 1, 4, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
-	  1, 0, 0, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_mulss, 0x59, 2, SPACE_0F, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
-	  1, 0, 0, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_orps, 0x56, 2, SPACE_0F, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 1, 1, 1, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1,
-      0, 0 },
-    { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_orps, 0x56, 2, SPACE_0F, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 1, 1, 0, 0, 1, 2, 0, 0, 1, 0, 4, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 34, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_orps, 0x56, 2, SPACE_0F, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } } } },
   { MN_pavgb, 0xe0 | (3 * 0), 2, SPACE_0F, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
@@ -14888,109 +14658,129 @@ static const insn_template i386_optab[] =
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
 	  0, 0, 0, 0, 1, 0 } } } },
-  { MN_subps, 0x5c, 2, SPACE_0F, None,
+  { MN_ucomiss, 0x2e, 2, SPACE_0F, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 1, 1, 1, 0, 0, 1, 2, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0,
+      0, 0, 0, 3, 0, 1, 0, 0, 1, 4, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0,
       0, 0 },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
 	  1, 0, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_subps, 0x5c, 2, SPACE_0F, None,
+  { MN_ucomiss, 0x2e, 2, SPACE_0F, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
     { { 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
 	  1, 0, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_subss, 0x5c, 2, SPACE_0F, None,
+  { MN_unpckhps, 0x15, 2, SPACE_0F, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 3, 1, 1, 2, 0, 1, 4, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0,
+      0, 0, 0, 1, 1, 1, 0, 0, 1, 2, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0,
       0, 0 },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_subss, 0x5c, 2, SPACE_0F, None,
+  { MN_unpckhps, 0x15, 2, SPACE_0F, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
     { { 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_ucomiss, 0x2e, 2, SPACE_0F, None,
+  { MN_unpcklps, 0x14, 2, SPACE_0F, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 3, 0, 1, 0, 0, 1, 4, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0,
+      0, 0, 0, 1, 1, 1, 0, 0, 1, 2, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0,
       0, 0 },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_ucomiss, 0x2e, 2, SPACE_0F, None,
+  { MN_unpcklps, 0x14, 2, SPACE_0F, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
     { { 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_unpckhps, 0x15, 2, SPACE_0F, None,
+  { MN_addpd, 0x58, 2, SPACE_0F, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 1, 1, 1, 0, 0, 1, 2, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0,
+      0, 0, 0, 1, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
       0, 0 },
+    { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0 } },
     { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_unpckhps, 0x15, 2, SPACE_0F, None,
+  { MN_addpd, 0x58, 2, SPACE_0F, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 1, 2, 1, 0, 1, 2, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0,
       0, 0 },
-    { { 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_unpcklps, 0x14, 2, SPACE_0F, None,
+  { MN_addpd, 0x58, 2, SPACE_0F, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 1, 1, 1, 0, 0, 1, 2, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
+    { { 17, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0 } },
     { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_unpcklps, 0x14, 2, SPACE_0F, None,
+  { MN_subpd, 0x5c, 2, SPACE_0F, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+      0, 0, 0, 1, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
       0, 0 },
-    { { 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_xorps, 0x57, 2, SPACE_0F, None,
+  { MN_subpd, 0x5c, 2, SPACE_0F, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 1, 1, 1, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1,
+      0, 0, 0, 0, 1, 2, 1, 0, 1, 2, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_subpd, 0x5c, 2, SPACE_0F, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 17, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_mulpd, 0x59, 2, SPACE_0F, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 1, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
       0, 0 },
     { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
@@ -14998,27 +14788,27 @@ static const insn_template i386_optab[] =
 	  1, 0, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_xorps, 0x57, 2, SPACE_0F, None,
+  { MN_mulpd, 0x59, 2, SPACE_0F, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 1, 1, 0, 0, 1, 2, 0, 0, 1, 0, 4, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 1, 2, 1, 0, 1, 2, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0,
       0, 0 },
-    { { 34, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_xorps, 0x57, 2, SPACE_0F, None,
+  { MN_mulpd, 0x59, 2, SPACE_0F, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
-    { { 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 17, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_addpd, 0x58, 2, SPACE_0F, None,
+  { MN_divpd, 0x5e, 2, SPACE_0F, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 1, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
       0, 0 },
@@ -15028,7 +14818,7 @@ static const insn_template i386_optab[] =
 	  1, 0, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_addpd, 0x58, 2, SPACE_0F, None,
+  { MN_divpd, 0x5e, 2, SPACE_0F, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 1, 2, 1, 0, 1, 2, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0,
       0, 0 },
@@ -15038,7 +14828,67 @@ static const insn_template i386_optab[] =
 	  1, 0, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_addpd, 0x58, 2, SPACE_0F, None,
+  { MN_divpd, 0x5e, 2, SPACE_0F, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 17, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_minpd, 0x5d, 2, SPACE_0F, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 1, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
+      0, 0 },
+    { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_minpd, 0x5d, 2, SPACE_0F, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 1, 2, 1, 0, 1, 2, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_minpd, 0x5d, 2, SPACE_0F, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 17, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_maxpd, 0x5f, 2, SPACE_0F, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 1, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
+      0, 0 },
+    { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_maxpd, 0x5f, 2, SPACE_0F, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 1, 2, 1, 0, 1, 2, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_maxpd, 0x5f, 2, SPACE_0F, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
@@ -15078,6 +14928,186 @@ static const insn_template i386_optab[] =
 	  1, 0, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_subsd, 0x5c, 2, SPACE_0F, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 3, 1, 1, 3, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
+      0, 0 },
+    { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
+	  1, 0, 0, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_subsd, 0x5c, 2, SPACE_0F, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 1, 2, 3, 0, 1, 4, 0, 0, 0, 0, 3, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
+	  1, 0, 0, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_subsd, 0x5c, 2, SPACE_0F, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 0, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 17, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
+	  1, 0, 0, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_mulsd, 0x59, 2, SPACE_0F, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 3, 1, 1, 3, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
+      0, 0 },
+    { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
+	  1, 0, 0, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_mulsd, 0x59, 2, SPACE_0F, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 1, 2, 3, 0, 1, 4, 0, 0, 0, 0, 3, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
+	  1, 0, 0, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_mulsd, 0x59, 2, SPACE_0F, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 0, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 17, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
+	  1, 0, 0, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_divsd, 0x5e, 2, SPACE_0F, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 3, 1, 1, 3, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
+      0, 0 },
+    { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
+	  1, 0, 0, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_divsd, 0x5e, 2, SPACE_0F, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 1, 2, 3, 0, 1, 4, 0, 0, 0, 0, 3, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
+	  1, 0, 0, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_divsd, 0x5e, 2, SPACE_0F, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 0, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 17, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
+	  1, 0, 0, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_minsd, 0x5d, 2, SPACE_0F, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 3, 1, 1, 3, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
+      0, 0 },
+    { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
+	  1, 0, 0, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_minsd, 0x5d, 2, SPACE_0F, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 1, 2, 3, 0, 1, 4, 0, 0, 0, 0, 3, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
+	  1, 0, 0, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_minsd, 0x5d, 2, SPACE_0F, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 0, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 17, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
+	  1, 0, 0, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_maxsd, 0x5f, 2, SPACE_0F, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 3, 1, 1, 3, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
+      0, 0 },
+    { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
+	  1, 0, 0, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_maxsd, 0x5f, 2, SPACE_0F, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 1, 2, 3, 0, 1, 4, 0, 0, 0, 0, 3, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
+	  1, 0, 0, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_maxsd, 0x5f, 2, SPACE_0F, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 0, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 17, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
+	  1, 0, 0, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_andpd, 0x54, 2, SPACE_0F, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 1, 1, 1, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1,
+      0, 0 },
+    { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_andpd, 0x54, 2, SPACE_0F, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 1, 2, 1, 0, 1, 2, 0, 0, 1, 0, 4, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 34, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_andpd, 0x54, 2, SPACE_0F, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 17, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
   { MN_andnpd, 0x55, 2, SPACE_0F, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 1, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
@@ -15108,7 +15138,7 @@ static const insn_template i386_optab[] =
 	  1, 0, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_andpd, 0x54, 2, SPACE_0F, None,
+  { MN_orpd, 0x56, 2, SPACE_0F, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 1, 1, 1, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1,
       0, 0 },
@@ -15118,7 +15148,7 @@ static const insn_template i386_optab[] =
 	  1, 0, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_andpd, 0x54, 2, SPACE_0F, None,
+  { MN_orpd, 0x56, 2, SPACE_0F, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 1, 2, 1, 0, 1, 2, 0, 0, 1, 0, 4, 0, 0, 0, 0, 0,
       0, 0 },
@@ -15128,7 +15158,37 @@ static const insn_template i386_optab[] =
 	  1, 0, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_andpd, 0x54, 2, SPACE_0F, None,
+  { MN_orpd, 0x56, 2, SPACE_0F, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 17, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_xorpd, 0x57, 2, SPACE_0F, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 1, 1, 1, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1,
+      0, 0 },
+    { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_xorpd, 0x57, 2, SPACE_0F, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 1, 2, 1, 0, 1, 2, 0, 0, 1, 0, 4, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 34, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_xorpd, 0x57, 2, SPACE_0F, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
@@ -15626,186 +15686,6 @@ static const insn_template i386_optab[] =
 	  0, 0, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_divpd, 0x5e, 2, SPACE_0F, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 1, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
-      0, 0 },
-    { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_divpd, 0x5e, 2, SPACE_0F, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 1, 2, 1, 0, 1, 2, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_divpd, 0x5e, 2, SPACE_0F, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 17, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_divsd, 0x5e, 2, SPACE_0F, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 3, 1, 1, 3, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
-      0, 0 },
-    { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
-	  1, 0, 0, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_divsd, 0x5e, 2, SPACE_0F, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 1, 2, 3, 0, 1, 4, 0, 0, 0, 0, 3, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
-	  1, 0, 0, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_divsd, 0x5e, 2, SPACE_0F, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 0, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 17, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
-	  1, 0, 0, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_maxpd, 0x5f, 2, SPACE_0F, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 1, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
-      0, 0 },
-    { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_maxpd, 0x5f, 2, SPACE_0F, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 1, 2, 1, 0, 1, 2, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_maxpd, 0x5f, 2, SPACE_0F, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 17, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_maxsd, 0x5f, 2, SPACE_0F, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 3, 1, 1, 3, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
-      0, 0 },
-    { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
-	  1, 0, 0, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_maxsd, 0x5f, 2, SPACE_0F, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 1, 2, 3, 0, 1, 4, 0, 0, 0, 0, 3, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
-	  1, 0, 0, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_maxsd, 0x5f, 2, SPACE_0F, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 0, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 17, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
-	  1, 0, 0, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_minpd, 0x5d, 2, SPACE_0F, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 1, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
-      0, 0 },
-    { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_minpd, 0x5d, 2, SPACE_0F, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 1, 2, 1, 0, 1, 2, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_minpd, 0x5d, 2, SPACE_0F, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 17, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_minsd, 0x5d, 2, SPACE_0F, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 3, 1, 1, 3, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
-      0, 0 },
-    { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
-	  1, 0, 0, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_minsd, 0x5d, 2, SPACE_0F, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 1, 2, 3, 0, 1, 4, 0, 0, 0, 0, 3, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
-	  1, 0, 0, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_minsd, 0x5d, 2, SPACE_0F, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 0, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 17, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
-	  1, 0, 0, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } } } },
   { MN_movapd, 0x28, 2, SPACE_0F, None,
     { 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 1, 0, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
@@ -16066,96 +15946,6 @@ static const insn_template i386_optab[] =
 	  1, 0, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_mulpd, 0x59, 2, SPACE_0F, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 1, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
-      0, 0 },
-    { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_mulpd, 0x59, 2, SPACE_0F, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 1, 2, 1, 0, 1, 2, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_mulpd, 0x59, 2, SPACE_0F, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 17, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_mulsd, 0x59, 2, SPACE_0F, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 3, 1, 1, 3, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
-      0, 0 },
-    { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
-	  1, 0, 0, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_mulsd, 0x59, 2, SPACE_0F, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 1, 2, 3, 0, 1, 4, 0, 0, 0, 0, 3, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
-	  1, 0, 0, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_mulsd, 0x59, 2, SPACE_0F, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 0, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 17, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
-	  1, 0, 0, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_orpd, 0x56, 2, SPACE_0F, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 1, 1, 1, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1,
-      0, 0 },
-    { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_orpd, 0x56, 2, SPACE_0F, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 1, 2, 1, 0, 1, 2, 0, 0, 1, 0, 4, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 34, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_orpd, 0x56, 2, SPACE_0F, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 17, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } } } },
   { MN_shufpd, 0xc6, 3, SPACE_0F, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 1, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
@@ -16252,66 +16042,6 @@ static const insn_template i386_optab[] =
 	  1, 0, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_subpd, 0x5c, 2, SPACE_0F, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 1, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
-      0, 0 },
-    { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_subpd, 0x5c, 2, SPACE_0F, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 1, 2, 1, 0, 1, 2, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_subpd, 0x5c, 2, SPACE_0F, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 17, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_subsd, 0x5c, 2, SPACE_0F, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 3, 1, 1, 3, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
-      0, 0 },
-    { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
-	  1, 0, 0, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_subsd, 0x5c, 2, SPACE_0F, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 1, 2, 3, 0, 1, 4, 0, 0, 0, 0, 3, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
-	  1, 0, 0, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_subsd, 0x5c, 2, SPACE_0F, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 0, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 17, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
-	  1, 0, 0, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } } } },
   { MN_ucomisd, 0x2e, 2, SPACE_0F, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 3, 0, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
@@ -16402,36 +16132,6 @@ static const insn_template i386_optab[] =
 	  1, 0, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_xorpd, 0x57, 2, SPACE_0F, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 1, 1, 1, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1,
-      0, 0 },
-    { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_xorpd, 0x57, 2, SPACE_0F, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 1, 2, 1, 0, 1, 2, 0, 0, 1, 0, 4, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 34, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_xorpd, 0x57, 2, SPACE_0F, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 17, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } } } },
   { MN_cvtdq2pd, 0xe6, 2, SPACE_0F, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 1, 0, 1, 2, 0, 1, 2, 0, 0, 0, 0, 3, 0, 0, 0, 0, 0,
@@ -18314,7 +18014,7 @@ static const insn_template i386_optab[] =
 	  1, 0, 0, 0, 0, 0 } } } },
   { MN_extractps, 0x17, 3, SPACE_0F3A, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 1, 0, 1, 1, 0, 1, 2, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0,
+      0, 0, 0, 1, 0, 1, 1, 0, 1, 2, 0, 0, 0, 0, 2, 1, 0, 0, 0, 0,
       0, 0 },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 0 } },
@@ -18326,7 +18026,7 @@ static const insn_template i386_optab[] =
 	  0, 0, 0, 0, 1, 0 } } } },
   { MN_extractps, 0x17, 3, SPACE_0F3A, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 1, 0, 0,
-      0, 0, 0, 1, 0, 2, 1, 0, 1, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+      0, 0, 0, 1, 0, 2, 1, 0, 1, 2, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0,
       0, 0 },
     { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 0 } },
@@ -18338,7 +18038,7 @@ static const insn_template i386_optab[] =
 	  0, 0, 0, 0, 0, 0 } } } },
   { MN_extractps, 0x17, 3, SPACE_0F3A, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
+      0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1,
       0, 0 },
     { { 28, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
@@ -18350,7 +18050,7 @@ static const insn_template i386_optab[] =
 	  0, 0, 0, 0, 1, 0 } } } },
   { MN_extractps, 0x17, 3, SPACE_0F3A, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 1, 0, 0,
-      0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
+      0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1,
       0, 0 },
     { { 28, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
@@ -18362,7 +18062,7 @@ static const insn_template i386_optab[] =
 	  0, 0, 0, 0, 0, 0 } } } },
   { MN_insertps, 0x21, 3, SPACE_0F3A, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 1, 1, 1, 1, 0, 1, 2, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0,
+      0, 0, 0, 1, 1, 1, 1, 0, 1, 2, 0, 0, 0, 0, 2, 1, 0, 0, 0, 0,
       0, 0 },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0 } },
@@ -18374,7 +18074,7 @@ static const insn_template i386_optab[] =
 	  1, 0, 0, 0, 0, 0 } } } },
   { MN_insertps, 0x21, 3, SPACE_0F3A, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
+      0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1,
       0, 0 },
     { { 28, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
@@ -19084,67 +18784,57 @@ static const insn_template i386_optab[] =
 	  1, 0, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_pmovsxbd, 0x21, 2, SPACE_0F38, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 1, 0, 1, 1, 0, 1, 2, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
-	  1, 0, 0, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_pmovsxbd, 0x21, 2, SPACE_0F38, None,
+  { MN_pmovzxbw, 0x30, 2, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
+      0, 0, 0, 1, 0, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
       0, 0 },
-    { { 28, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
 	  1, 0, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_pmovsxbq, 0x22, 2, SPACE_0F38, None,
+  { MN_pmovzxbw, 0x30, 2, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 1, 0, 1, 1, 0, 1, 2, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 1, 1, 0, 1, 2, 0, 0, 0, 0, 3, 0, 0, 0, 0, 0,
       0, 0 },
+    { { 35, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 1, 0, 0, 0, 0,
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
 	  1, 0, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_pmovsxbq, 0x22, 2, SPACE_0F38, None,
+  { MN_pmovzxbw, 0x30, 2, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
       0, 0 },
     { { 28, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 1, 0, 0, 0, 0,
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
 	  1, 0, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_pmovsxwd, 0x23, 2, SPACE_0F38, None,
+  { MN_pmovsxbd, 0x21, 2, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 1, 0, 1, 1, 0, 1, 2, 0, 0, 0, 0, 3, 0, 0, 0, 0, 0,
+      0, 0, 0, 1, 0, 1, 1, 0, 1, 2, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0,
       0, 0 },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
 	  1, 0, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_pmovsxwd, 0x23, 2, SPACE_0F38, None,
+  { MN_pmovsxbd, 0x21, 2, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
       0, 0 },
     { { 28, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
 	  1, 0, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_pmovsxwq, 0x24, 2, SPACE_0F38, None,
+  { MN_pmovzxbd, 0x31, 2, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 1, 0, 1, 1, 0, 1, 2, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0,
       0, 0 },
@@ -19154,7 +18844,7 @@ static const insn_template i386_optab[] =
 	  1, 0, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_pmovsxwq, 0x24, 2, SPACE_0F38, None,
+  { MN_pmovzxbd, 0x31, 2, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
       0, 0 },
@@ -19164,47 +18854,57 @@ static const insn_template i386_optab[] =
 	  1, 0, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_pmovsxdq, 0x25, 2, SPACE_0F38, None,
+  { MN_pmovsxbq, 0x22, 2, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 1, 0, 1, 1, 0, 1, 2, 0, 0, 0, 0, 3, 0, 0, 0, 0, 0,
+      0, 0, 0, 1, 0, 1, 1, 0, 1, 2, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0,
       0, 0 },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 1, 0, 0, 0, 0,
 	  1, 0, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_pmovsxdq, 0x25, 2, SPACE_0F38, None,
+  { MN_pmovsxbq, 0x22, 2, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
       0, 0 },
     { { 28, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 1, 0, 0, 0, 0,
 	  1, 0, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_pmovzxbw, 0x30, 2, SPACE_0F38, None,
+  { MN_pmovzxbq, 0x32, 2, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 1, 0, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
+      0, 0, 0, 1, 0, 1, 1, 0, 1, 2, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0,
       0, 0 },
-    { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
+    { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 1, 0, 0, 0, 0,
 	  1, 0, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_pmovzxbw, 0x30, 2, SPACE_0F38, None,
+  { MN_pmovzxbq, 0x32, 2, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 1, 1, 0, 1, 2, 0, 0, 0, 0, 3, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
       0, 0 },
-    { { 35, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } },
+    { { 28, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 1, 0, 0, 0, 0,
+	  1, 0, 0, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_pmovsxwd, 0x23, 2, SPACE_0F38, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 1, 0, 1, 1, 0, 1, 2, 0, 0, 0, 0, 3, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0 } },
     { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
 	  1, 0, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_pmovzxbw, 0x30, 2, SPACE_0F38, None,
+  { MN_pmovsxwd, 0x23, 2, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
       0, 0 },
@@ -19214,83 +18914,83 @@ static const insn_template i386_optab[] =
 	  1, 0, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_pmovzxbd, 0x31, 2, SPACE_0F38, None,
+  { MN_pmovzxwd, 0x33, 2, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 1, 0, 1, 1, 0, 1, 2, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0,
+      0, 0, 0, 1, 0, 1, 1, 0, 1, 2, 0, 0, 0, 0, 3, 0, 0, 0, 0, 0,
       0, 0 },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
 	  1, 0, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_pmovzxbd, 0x31, 2, SPACE_0F38, None,
+  { MN_pmovzxwd, 0x33, 2, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
       0, 0 },
     { { 28, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
 	  1, 0, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_pmovzxbq, 0x32, 2, SPACE_0F38, None,
+  { MN_pmovsxwq, 0x24, 2, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 1, 0, 1, 1, 0, 1, 2, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 1, 0, 1, 1, 0, 1, 2, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0,
       0, 0 },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 1, 0, 0, 0, 0,
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
 	  1, 0, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_pmovzxbq, 0x32, 2, SPACE_0F38, None,
+  { MN_pmovsxwq, 0x24, 2, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
       0, 0 },
     { { 28, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 1, 0, 0, 0, 0,
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
 	  1, 0, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_pmovzxwd, 0x33, 2, SPACE_0F38, None,
+  { MN_pmovzxwq, 0x34, 2, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 1, 0, 1, 1, 0, 1, 2, 0, 0, 0, 0, 3, 0, 0, 0, 0, 0,
+      0, 0, 0, 1, 0, 1, 1, 0, 1, 2, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0,
       0, 0 },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
 	  1, 0, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_pmovzxwd, 0x33, 2, SPACE_0F38, None,
+  { MN_pmovzxwq, 0x34, 2, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
       0, 0 },
     { { 28, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
 	  1, 0, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_pmovzxwq, 0x34, 2, SPACE_0F38, None,
+  { MN_pmovsxdq, 0x25, 2, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 1, 0, 1, 1, 0, 1, 2, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0,
+      0, 0, 0, 1, 0, 1, 1, 0, 1, 2, 0, 0, 0, 0, 3, 0, 0, 0, 0, 0,
       0, 0 },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
 	  1, 0, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_pmovzxwq, 0x34, 2, SPACE_0F38, None,
+  { MN_pmovsxdq, 0x25, 2, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
       0, 0 },
     { { 28, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
 	  1, 0, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 0, 0 } } } },
@@ -20004,7 +19704,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 1, 1, 2, 1, 0, 1, 2, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0,
       0, 0 },
-    { { 111, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 112, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0 } },
     { { { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  0, 0, 0, 0, 0, 0 } },
@@ -20016,7 +19716,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
       0, 0 },
-    { { 111, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 112, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  0, 0, 0, 0, 0, 0 } },
@@ -20028,7 +19728,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 1, 1, 2, 1, 0, 1, 2, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0,
       0, 0 },
-    { { 111, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 112, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0 } },
     { { { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  0, 0, 0, 0, 0, 0 } },
@@ -20040,7 +19740,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
       0, 0 },
-    { { 111, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 112, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  0, 0, 0, 0, 0, 0 } },
@@ -20052,7 +19752,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 1, 1, 1, 1, 0, 1, 2, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0,
       0, 0 },
-    { { 111, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 112, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0 } },
     { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 1, 0 } },
@@ -20062,7 +19762,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
       0, 0 },
-    { { 111, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 112, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 1, 0 } },
@@ -20116,6 +19816,246 @@ static const insn_template i386_optab[] =
 	  1, 1, 1, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 1, 1, 0, 0, 0 } } } },
+  { MN_vsubps, 0x5c, 3, SPACE_0F, None,
+    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 1, 1, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
+      0, 0 },
+    { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
+	  1, 1, 0, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 0, 0, 0, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 0, 0, 0, 0 } } } },
+  { MN_vsubps, 0x5c, 3, SPACE_0F, None,
+    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 1, 1, 0, 0, 0, 5, 1, 3, 1, 1, 7, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
+	  1, 1, 1, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 1, 0, 0, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 1, 0, 0, 0 } } } },
+  { MN_vsubpd, 0x5c, 3, SPACE_0F, None,
+    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 1, 1, 3, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
+      0, 0 },
+    { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
+	  1, 1, 0, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 0, 0, 0, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 0, 0, 0, 0 } } } },
+  { MN_vsubpd, 0x5c, 3, SPACE_0F, None,
+    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 1, 2, 1, 0, 0, 5, 1, 4, 1, 1, 7, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
+	  1, 1, 1, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 1, 0, 0, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 1, 0, 0, 0 } } } },
+  { MN_vmulps, 0x59, 3, SPACE_0F, None,
+    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 1, 1, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
+      0, 0 },
+    { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
+	  1, 1, 0, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 0, 0, 0, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 0, 0, 0, 0 } } } },
+  { MN_vmulps, 0x59, 3, SPACE_0F, None,
+    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 1, 1, 0, 0, 0, 5, 1, 3, 1, 1, 7, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
+	  1, 1, 1, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 1, 0, 0, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 1, 0, 0, 0 } } } },
+  { MN_vmulpd, 0x59, 3, SPACE_0F, None,
+    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 1, 1, 3, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
+      0, 0 },
+    { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
+	  1, 1, 0, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 0, 0, 0, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 0, 0, 0, 0 } } } },
+  { MN_vmulpd, 0x59, 3, SPACE_0F, None,
+    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 1, 2, 1, 0, 0, 5, 1, 4, 1, 1, 7, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
+	  1, 1, 1, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 1, 0, 0, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 1, 0, 0, 0 } } } },
+  { MN_vdivps, 0x5e, 3, SPACE_0F, None,
+    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 1, 1, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
+      0, 0 },
+    { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
+	  1, 1, 0, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 0, 0, 0, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 0, 0, 0, 0 } } } },
+  { MN_vdivps, 0x5e, 3, SPACE_0F, None,
+    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 1, 1, 0, 0, 0, 5, 1, 3, 1, 1, 7, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
+	  1, 1, 1, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 1, 0, 0, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 1, 0, 0, 0 } } } },
+  { MN_vdivpd, 0x5e, 3, SPACE_0F, None,
+    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 1, 1, 3, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
+      0, 0 },
+    { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
+	  1, 1, 0, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 0, 0, 0, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 0, 0, 0, 0 } } } },
+  { MN_vdivpd, 0x5e, 3, SPACE_0F, None,
+    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 1, 2, 1, 0, 0, 5, 1, 4, 1, 1, 7, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
+	  1, 1, 1, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 1, 0, 0, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 1, 0, 0, 0 } } } },
+  { MN_vminps, 0x5d, 3, SPACE_0F, None,
+    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 1, 1, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
+      0, 0 },
+    { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
+	  1, 1, 0, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 0, 0, 0, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 0, 0, 0, 0 } } } },
+  { MN_vminps, 0x5d, 3, SPACE_0F, None,
+    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 1, 1, 0, 0, 0, 5, 1, 3, 0, 1, 7, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
+	  1, 1, 1, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 1, 0, 0, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 1, 0, 0, 0 } } } },
+  { MN_vminpd, 0x5d, 3, SPACE_0F, None,
+    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 1, 1, 3, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
+      0, 0 },
+    { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
+	  1, 1, 0, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 0, 0, 0, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 0, 0, 0, 0 } } } },
+  { MN_vminpd, 0x5d, 3, SPACE_0F, None,
+    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 1, 2, 1, 0, 0, 5, 1, 4, 0, 1, 7, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
+	  1, 1, 1, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 1, 0, 0, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 1, 0, 0, 0 } } } },
+  { MN_vmaxps, 0x5f, 3, SPACE_0F, None,
+    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 1, 1, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
+      0, 0 },
+    { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
+	  1, 1, 0, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 0, 0, 0, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 0, 0, 0, 0 } } } },
+  { MN_vmaxps, 0x5f, 3, SPACE_0F, None,
+    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 1, 1, 0, 0, 0, 5, 1, 3, 0, 1, 7, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
+	  1, 1, 1, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 1, 0, 0, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 1, 0, 0, 0 } } } },
+  { MN_vmaxpd, 0x5f, 3, SPACE_0F, None,
+    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 1, 1, 3, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
+      0, 0 },
+    { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
+	  1, 1, 0, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 0, 0, 0, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 0, 0, 0, 0 } } } },
+  { MN_vmaxpd, 0x5f, 3, SPACE_0F, None,
+    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 1, 2, 1, 0, 0, 5, 1, 4, 0, 1, 7, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
+	  1, 1, 1, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 1, 0, 0, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 1, 0, 0, 0 } } } },
   { MN_vaddss, 0x58, 3, SPACE_0F, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 3, 1, 3, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
@@ -20164,6 +20104,246 @@ static const insn_template i386_optab[] =
 	  1, 0, 0, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_vsubss, 0x5c, 3, SPACE_0F, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 3, 1, 3, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
+      0, 0 },
+    { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
+	  1, 0, 0, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_vsubss, 0x5c, 3, SPACE_0F, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 1, 1, 2, 0, 0, 4, 1, 0, 1, 1, 2, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
+	  1, 0, 0, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_vsubsd, 0x5c, 3, SPACE_0F, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 3, 1, 3, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
+      0, 0 },
+    { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
+	  1, 0, 0, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_vsubsd, 0x5c, 3, SPACE_0F, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 1, 2, 3, 0, 0, 4, 1, 0, 1, 1, 3, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
+	  1, 0, 0, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_vmulss, 0x59, 3, SPACE_0F, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 3, 1, 3, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
+      0, 0 },
+    { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
+	  1, 0, 0, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_vmulss, 0x59, 3, SPACE_0F, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 1, 1, 2, 0, 0, 4, 1, 0, 1, 1, 2, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
+	  1, 0, 0, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_vmulsd, 0x59, 3, SPACE_0F, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 3, 1, 3, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
+      0, 0 },
+    { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
+	  1, 0, 0, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_vmulsd, 0x59, 3, SPACE_0F, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 1, 2, 3, 0, 0, 4, 1, 0, 1, 1, 3, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
+	  1, 0, 0, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_vdivss, 0x5e, 3, SPACE_0F, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 3, 1, 3, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
+      0, 0 },
+    { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
+	  1, 0, 0, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_vdivss, 0x5e, 3, SPACE_0F, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 1, 1, 2, 0, 0, 4, 1, 0, 1, 1, 2, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
+	  1, 0, 0, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_vdivsd, 0x5e, 3, SPACE_0F, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 3, 1, 3, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
+      0, 0 },
+    { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
+	  1, 0, 0, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_vdivsd, 0x5e, 3, SPACE_0F, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 1, 2, 3, 0, 0, 4, 1, 0, 1, 1, 3, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
+	  1, 0, 0, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_vminss, 0x5d, 3, SPACE_0F, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 3, 1, 3, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
+      0, 0 },
+    { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
+	  1, 0, 0, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_vminss, 0x5d, 3, SPACE_0F, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 1, 1, 2, 0, 0, 4, 1, 0, 0, 1, 2, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
+	  1, 0, 0, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_vminsd, 0x5d, 3, SPACE_0F, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 3, 1, 3, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
+      0, 0 },
+    { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
+	  1, 0, 0, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_vminsd, 0x5d, 3, SPACE_0F, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 1, 2, 3, 0, 0, 4, 1, 0, 0, 1, 3, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
+	  1, 0, 0, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_vmaxss, 0x5f, 3, SPACE_0F, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 3, 1, 3, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
+      0, 0 },
+    { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
+	  1, 0, 0, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_vmaxss, 0x5f, 3, SPACE_0F, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 1, 1, 2, 0, 0, 4, 1, 0, 0, 1, 2, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
+	  1, 0, 0, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_vmaxsd, 0x5f, 3, SPACE_0F, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 3, 1, 3, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
+      0, 0 },
+    { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
+	  1, 0, 0, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_vmaxsd, 0x5f, 3, SPACE_0F, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 1, 2, 3, 0, 0, 4, 1, 0, 0, 1, 3, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
+	  1, 0, 0, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
   { MN_vaddsubpd, 0xd0, 3, SPACE_0F, None,
     { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 1, 1, 3, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
@@ -20188,6 +20368,54 @@ static const insn_template i386_optab[] =
 	  1, 1, 0, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 1, 0, 0, 0, 0 } } } },
+  { MN_vandps, 0x54, 3, SPACE_0F, None,
+    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 1, 1, 3, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1,
+      0, 0 },
+    { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
+	  1, 1, 0, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 0, 0, 0, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 0, 0, 0, 0 } } } },
+  { MN_vandps, 0x54, 3, SPACE_0F, None,
+    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 1, 1, 0, 0, 0, 5, 1, 3, 0, 0, 7, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 34, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
+	  1, 1, 1, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 1, 0, 0, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 1, 0, 0, 0 } } } },
+  { MN_vandpd, 0x54, 3, SPACE_0F, None,
+    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 1, 1, 3, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1,
+      0, 0 },
+    { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
+	  1, 1, 0, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 0, 0, 0, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 0, 0, 0, 0 } } } },
+  { MN_vandpd, 0x54, 3, SPACE_0F, None,
+    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 1, 2, 1, 0, 0, 5, 1, 4, 0, 0, 7, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 34, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
+	  1, 1, 1, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 1, 0, 0, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 1, 0, 0, 0 } } } },
   { MN_vandnps, 0x55, 3, SPACE_0F, None,
     { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 1, 1, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1,
@@ -20236,7 +20464,7 @@ static const insn_template i386_optab[] =
 	  1, 1, 1, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 1, 1, 0, 0, 0 } } } },
-  { MN_vandps, 0x54, 3, SPACE_0F, None,
+  { MN_vorps, 0x56, 3, SPACE_0F, None,
     { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 1, 1, 3, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1,
       0, 0 },
@@ -20248,7 +20476,7 @@ static const insn_template i386_optab[] =
 	  1, 1, 0, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 1, 0, 0, 0, 0 } } } },
-  { MN_vandps, 0x54, 3, SPACE_0F, None,
+  { MN_vorps, 0x56, 3, SPACE_0F, None,
     { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 1, 1, 0, 0, 0, 5, 1, 3, 0, 0, 7, 0, 0, 0, 0, 0,
       0, 0 },
@@ -20260,7 +20488,7 @@ static const insn_template i386_optab[] =
 	  1, 1, 1, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 1, 1, 0, 0, 0 } } } },
-  { MN_vandpd, 0x54, 3, SPACE_0F, None,
+  { MN_vorpd, 0x56, 3, SPACE_0F, None,
     { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 1, 1, 3, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1,
       0, 0 },
@@ -20272,7 +20500,7 @@ static const insn_template i386_optab[] =
 	  1, 1, 0, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 1, 0, 0, 0, 0 } } } },
-  { MN_vandpd, 0x54, 3, SPACE_0F, None,
+  { MN_vorpd, 0x56, 3, SPACE_0F, None,
     { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 1, 2, 1, 0, 0, 5, 1, 4, 0, 0, 7, 0, 0, 0, 0, 0,
       0, 0 },
@@ -20284,6 +20512,54 @@ static const insn_template i386_optab[] =
 	  1, 1, 1, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 1, 1, 0, 0, 0 } } } },
+  { MN_vxorps, 0x57, 3, SPACE_0F, None,
+    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 1, 1, 3, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0, 1,
+      0, 0 },
+    { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
+	  1, 1, 0, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 0, 0, 0, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 0, 0, 0, 0 } } } },
+  { MN_vxorps, 0x57, 3, SPACE_0F, None,
+    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 1, 1, 0, 0, 0, 5, 1, 3, 0, 0, 7, 1, 0, 0, 0, 0,
+      0, 0 },
+    { { 34, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
+	  1, 1, 1, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 1, 0, 0, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 1, 0, 0, 0 } } } },
+  { MN_vxorpd, 0x57, 3, SPACE_0F, None,
+    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 1, 1, 3, 1, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0, 1,
+      0, 0 },
+    { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
+	  1, 1, 0, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 0, 0, 0, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 0, 0, 0, 0 } } } },
+  { MN_vxorpd, 0x57, 3, SPACE_0F, None,
+    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 1, 2, 1, 0, 0, 5, 1, 4, 0, 0, 7, 1, 0, 0, 0, 0,
+      0, 0 },
+    { { 34, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
+	  1, 1, 1, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 1, 0, 0, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 1, 0, 0, 0 } } } },
   { MN_vblendps, 0x0c | 0, 4, SPACE_0F3A, None,
     { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 1, 1, 3, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
@@ -20350,16 +20626,6 @@ static const insn_template i386_optab[] =
 	  1, 0, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  0, 1, 0, 0, 0, 0 } } } },
-  { MN_vbroadcastf128, 0x1a, 2, SPACE_0F38, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 1, 1, 0, 0, 3, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  0, 1, 0, 0, 0, 0 } } } },
   { MN_vbroadcastsd, 0x19, 2, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 2, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
@@ -25080,7 +25346,7 @@ static const insn_template i386_optab[] =
 	  0, 1, 0, 0, 0, 0 } } } },
   { MN_vcvtpd2dq, 0xe6, 2, SPACE_0F, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 2, 3, 0, 0, 5, 1, 4, 0, 0, 7, 0, 1, 0, 0, 0,
+      0, 0, 0, 0, 0, 2, 3, 0, 0, 5, 1, 4, 1, 1, 7, 0, 1, 0, 0, 0,
       0, 0 },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
@@ -25090,7 +25356,7 @@ static const insn_template i386_optab[] =
 	  1, 0, 0, 0, 0, 0 } } } },
   { MN_vcvtpd2dq, 0xe6, 2, SPACE_0F, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 2, 3, 0, 0, 5, 1, 4, 0, 0, 7, 0, 2, 0, 0, 0,
+      0, 0, 0, 0, 0, 2, 3, 0, 0, 5, 1, 4, 1, 1, 7, 0, 2, 0, 0, 0,
       0, 0 },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
@@ -25130,7 +25396,7 @@ static const insn_template i386_optab[] =
 	  1, 0, 0, 0, 0, 0 } } } },
   { MN_vcvtpd2dqy, 0xe6, 2, SPACE_0F, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 2, 3, 0, 0, 3, 1, 4, 0, 0, 5, 0, 2, 0, 0, 0,
+      0, 0, 0, 0, 0, 2, 3, 0, 0, 3, 1, 4, 1, 1, 5, 0, 2, 0, 0, 0,
       0, 0 },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
@@ -25170,7 +25436,7 @@ static const insn_template i386_optab[] =
 	  0, 1, 0, 0, 0, 0 } } } },
   { MN_vcvtpd2ps, 0x5a, 2, SPACE_0F, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 2, 1, 0, 0, 5, 1, 4, 0, 0, 7, 0, 1, 0, 0, 0,
+      0, 0, 0, 0, 0, 2, 1, 0, 0, 5, 1, 4, 1, 1, 7, 0, 1, 0, 0, 0,
       0, 0 },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
@@ -25180,7 +25446,7 @@ static const insn_template i386_optab[] =
 	  1, 0, 0, 0, 0, 0 } } } },
   { MN_vcvtpd2ps, 0x5a, 2, SPACE_0F, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 2, 1, 0, 0, 5, 1, 4, 0, 0, 7, 0, 2, 0, 0, 0,
+      0, 0, 0, 0, 0, 2, 1, 0, 0, 5, 1, 4, 1, 1, 7, 0, 2, 0, 0, 0,
       0, 0 },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
@@ -25220,7 +25486,7 @@ static const insn_template i386_optab[] =
 	  1, 0, 0, 0, 0, 0 } } } },
   { MN_vcvtpd2psy, 0x5a, 2, SPACE_0F, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 2, 1, 0, 0, 3, 1, 4, 0, 0, 5, 0, 2, 0, 0, 0,
+      0, 0, 0, 0, 0, 2, 1, 0, 0, 3, 1, 4, 1, 1, 5, 0, 2, 0, 0, 0,
       0, 0 },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
@@ -25290,7 +25556,7 @@ static const insn_template i386_optab[] =
 	  1, 0, 0, 0, 0, 0 } } } },
   { MN_vcvtps2pd, 0x5a, 2, SPACE_0F, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 1, 0, 0, 0, 3, 1, 3, 0, 0, 4, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 1, 0, 0, 0, 3, 1, 3, 0, 1, 4, 0, 0, 0, 0, 0,
       0, 0 },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
@@ -25538,7 +25804,7 @@ static const insn_template i386_optab[] =
 	  0, 1, 0, 0, 0, 0 } } } },
   { MN_vcvttpd2dq, 0xe6, 2, SPACE_0F, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 2, 1, 0, 0, 5, 1, 4, 0, 0, 7, 0, 1, 0, 0, 0,
+      0, 0, 0, 0, 0, 2, 1, 0, 0, 5, 1, 4, 0, 1, 7, 0, 1, 0, 0, 0,
       0, 0 },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
@@ -25548,7 +25814,7 @@ static const insn_template i386_optab[] =
 	  1, 0, 0, 0, 0, 0 } } } },
   { MN_vcvttpd2dq, 0xe6, 2, SPACE_0F, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 2, 1, 0, 0, 5, 1, 4, 0, 0, 7, 0, 2, 0, 0, 0,
+      0, 0, 0, 0, 0, 2, 1, 0, 0, 5, 1, 4, 0, 1, 7, 0, 2, 0, 0, 0,
       0, 0 },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
@@ -25588,7 +25854,7 @@ static const insn_template i386_optab[] =
 	  1, 0, 0, 0, 0, 0 } } } },
   { MN_vcvttpd2dqy, 0xe6, 2, SPACE_0F, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 2, 1, 0, 0, 3, 1, 4, 0, 0, 5, 0, 2, 0, 0, 0,
+      0, 0, 0, 0, 0, 2, 1, 0, 0, 3, 1, 4, 0, 1, 5, 0, 2, 0, 0, 0,
       0, 0 },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
@@ -25656,102 +25922,6 @@ static const insn_template i386_optab[] =
 	  1, 0, 0, 0, 1, 0 } },
       { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
-  { MN_vdivps, 0x5e, 3, SPACE_0F, None,
-    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 1, 1, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
-      0, 0 },
-    { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
-	  1, 1, 0, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 1, 0, 0, 0, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 1, 0, 0, 0, 0 } } } },
-  { MN_vdivps, 0x5e, 3, SPACE_0F, None,
-    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 1, 1, 0, 0, 0, 5, 1, 3, 1, 1, 7, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
-	  1, 1, 1, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 1, 1, 0, 0, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 1, 1, 0, 0, 0 } } } },
-  { MN_vdivpd, 0x5e, 3, SPACE_0F, None,
-    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 1, 1, 3, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
-      0, 0 },
-    { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
-	  1, 1, 0, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 1, 0, 0, 0, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 1, 0, 0, 0, 0 } } } },
-  { MN_vdivpd, 0x5e, 3, SPACE_0F, None,
-    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 1, 2, 1, 0, 0, 5, 1, 4, 1, 1, 7, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
-	  1, 1, 1, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 1, 1, 0, 0, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 1, 1, 0, 0, 0 } } } },
-  { MN_vdivss, 0x5e, 3, SPACE_0F, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 3, 1, 3, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
-      0, 0 },
-    { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
-	  1, 0, 0, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_vdivss, 0x5e, 3, SPACE_0F, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 1, 1, 2, 0, 0, 4, 1, 0, 1, 1, 2, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
-	  1, 0, 0, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_vdivsd, 0x5e, 3, SPACE_0F, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 3, 1, 3, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
-      0, 0 },
-    { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
-	  1, 0, 0, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_vdivsd, 0x5e, 3, SPACE_0F, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 1, 2, 3, 0, 0, 4, 1, 0, 1, 1, 3, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
-	  1, 0, 0, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } } } },
   { MN_vdppd, 0x41, 4, SPACE_0F3A, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 1, 1, 3, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
@@ -25782,7 +25952,7 @@ static const insn_template i386_optab[] =
 	  1, 1, 0, 0, 0, 0 } } } },
   { MN_vextractf128, 0x19, 3, SPACE_0F3A, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 2, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
+      0, 0, 0, 2, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1,
       0, 0 },
     { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
@@ -25792,21 +25962,9 @@ static const insn_template i386_optab[] =
 	  0, 1, 0, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 1, 0 } } } },
-  { MN_vextractf128, 0x19, 3, SPACE_0F3A, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 1, 1, 0, 0, 3, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  0, 0, 0, 0, 0, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  0, 1, 0, 0, 0, 0 } },
-      { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 1, 0 } } } },
   { MN_vextractps, 0x17, 3, SPACE_0F3A, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 1, 0, 3, 1, 0, 0, 2, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0,
+      0, 0, 0, 1, 0, 3, 1, 0, 0, 2, 0, 0, 0, 0, 2, 1, 0, 0, 0, 0,
       0, 0 },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 0 } },
@@ -25818,7 +25976,7 @@ static const insn_template i386_optab[] =
 	  0, 0, 0, 0, 1, 0 } } } },
   { MN_vextractps, 0x17, 3, SPACE_0F3A, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 1, 0, 0,
-      0, 0, 0, 1, 0, 3, 1, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+      0, 0, 0, 1, 0, 3, 1, 0, 0, 2, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0,
       0, 0 },
     { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 0 } },
@@ -25890,23 +26048,9 @@ static const insn_template i386_optab[] =
 	  0, 1, 0, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  0, 1, 0, 0, 0, 0 } } } },
-  { MN_vinsertf128, 0x18, 4, SPACE_0F3A, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 1, 1, 1, 0, 0, 3, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  0, 0, 0, 0, 0, 0 } },
-      { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  0, 1, 0, 0, 0, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  0, 1, 0, 0, 0, 0 } } } },
   { MN_vinsertps, 0x21, 4, SPACE_0F3A, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 1, 1, 3, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
+      0, 0, 0, 1, 1, 3, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1,
       0, 0 },
     { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
@@ -25920,7 +26064,7 @@ static const insn_template i386_optab[] =
 	  1, 0, 0, 0, 0, 0 } } } },
   { MN_vinsertps, 0x21, 4, SPACE_0F3A, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 1, 1, 1, 0, 0, 2, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 1, 1, 1, 0, 0, 2, 0, 0, 0, 0, 2, 1, 0, 0, 0, 0,
       0, 0 },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
@@ -26008,198 +26152,6 @@ static const insn_template i386_optab[] =
 	  1, 1, 0, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 1, 0, 0, 0, 0 } } } },
-  { MN_vmaxps, 0x5f, 3, SPACE_0F, None,
-    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 1, 1, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
-      0, 0 },
-    { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
-	  1, 1, 0, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 1, 0, 0, 0, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 1, 0, 0, 0, 0 } } } },
-  { MN_vmaxps, 0x5f, 3, SPACE_0F, None,
-    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 1, 1, 0, 0, 0, 5, 1, 3, 0, 1, 7, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
-	  1, 1, 1, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 1, 1, 0, 0, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 1, 1, 0, 0, 0 } } } },
-  { MN_vmaxpd, 0x5f, 3, SPACE_0F, None,
-    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 1, 1, 3, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
-      0, 0 },
-    { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
-	  1, 1, 0, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 1, 0, 0, 0, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 1, 0, 0, 0, 0 } } } },
-  { MN_vmaxpd, 0x5f, 3, SPACE_0F, None,
-    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 1, 2, 1, 0, 0, 5, 1, 4, 0, 1, 7, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
-	  1, 1, 1, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 1, 1, 0, 0, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 1, 1, 0, 0, 0 } } } },
-  { MN_vmaxss, 0x5f, 3, SPACE_0F, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 3, 1, 3, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
-      0, 0 },
-    { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
-	  1, 0, 0, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_vmaxss, 0x5f, 3, SPACE_0F, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 1, 1, 2, 0, 0, 4, 1, 0, 0, 1, 2, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
-	  1, 0, 0, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_vmaxsd, 0x5f, 3, SPACE_0F, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 3, 1, 3, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
-      0, 0 },
-    { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
-	  1, 0, 0, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_vmaxsd, 0x5f, 3, SPACE_0F, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 1, 2, 3, 0, 0, 4, 1, 0, 0, 1, 3, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
-	  1, 0, 0, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_vminps, 0x5d, 3, SPACE_0F, None,
-    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 1, 1, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
-      0, 0 },
-    { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
-	  1, 1, 0, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 1, 0, 0, 0, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 1, 0, 0, 0, 0 } } } },
-  { MN_vminps, 0x5d, 3, SPACE_0F, None,
-    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 1, 1, 0, 0, 0, 5, 1, 3, 0, 1, 7, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
-	  1, 1, 1, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 1, 1, 0, 0, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 1, 1, 0, 0, 0 } } } },
-  { MN_vminpd, 0x5d, 3, SPACE_0F, None,
-    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 1, 1, 3, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
-      0, 0 },
-    { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
-	  1, 1, 0, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 1, 0, 0, 0, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 1, 0, 0, 0, 0 } } } },
-  { MN_vminpd, 0x5d, 3, SPACE_0F, None,
-    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 1, 2, 1, 0, 0, 5, 1, 4, 0, 1, 7, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
-	  1, 1, 1, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 1, 1, 0, 0, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 1, 1, 0, 0, 0 } } } },
-  { MN_vminss, 0x5d, 3, SPACE_0F, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 3, 1, 3, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
-      0, 0 },
-    { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
-	  1, 0, 0, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_vminss, 0x5d, 3, SPACE_0F, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 1, 1, 2, 0, 0, 4, 1, 0, 0, 1, 2, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
-	  1, 0, 0, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_vminsd, 0x5d, 3, SPACE_0F, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 3, 1, 3, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
-      0, 0 },
-    { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
-	  1, 0, 0, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_vminsd, 0x5d, 3, SPACE_0F, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 1, 2, 3, 0, 0, 4, 1, 0, 0, 1, 3, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
-	  1, 0, 0, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } } } },
   { MN_vmovaps, 0x28, 2, SPACE_0F, None,
     { 1, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 1, 0, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
@@ -26876,145 +26828,15 @@ static const insn_template i386_optab[] =
 	  1, 1, 0, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 1, 0, 0, 0, 0 } } } },
-  { MN_vmulps, 0x59, 3, SPACE_0F, None,
-    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 1, 1, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
-      0, 0 },
-    { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
-	  1, 1, 0, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 1, 0, 0, 0, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 1, 0, 0, 0, 0 } } } },
-  { MN_vmulps, 0x59, 3, SPACE_0F, None,
-    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 1, 1, 0, 0, 0, 5, 1, 3, 1, 1, 7, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
-	  1, 1, 1, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 1, 1, 0, 0, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 1, 1, 0, 0, 0 } } } },
-  { MN_vmulpd, 0x59, 3, SPACE_0F, None,
-    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 1, 1, 3, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
-      0, 0 },
-    { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
-	  1, 1, 0, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 1, 0, 0, 0, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 1, 0, 0, 0, 0 } } } },
-  { MN_vmulpd, 0x59, 3, SPACE_0F, None,
-    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 1, 2, 1, 0, 0, 5, 1, 4, 1, 1, 7, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
-	  1, 1, 1, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 1, 1, 0, 0, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 1, 1, 0, 0, 0 } } } },
-  { MN_vmulss, 0x59, 3, SPACE_0F, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 3, 1, 3, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
-      0, 0 },
-    { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
-	  1, 0, 0, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_vmulss, 0x59, 3, SPACE_0F, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 1, 1, 2, 0, 0, 4, 1, 0, 1, 1, 2, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
-	  1, 0, 0, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_vmulsd, 0x59, 3, SPACE_0F, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 3, 1, 3, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
-      0, 0 },
-    { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
-	  1, 0, 0, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_vmulsd, 0x59, 3, SPACE_0F, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 1, 2, 3, 0, 0, 4, 1, 0, 1, 1, 3, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
-	  1, 0, 0, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_vorps, 0x56, 3, SPACE_0F, None,
-    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 1, 1, 3, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1,
-      0, 0 },
-    { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
-	  1, 1, 0, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 1, 0, 0, 0, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 1, 0, 0, 0, 0 } } } },
-  { MN_vorps, 0x56, 3, SPACE_0F, None,
-    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 1, 1, 0, 0, 0, 5, 1, 3, 0, 0, 7, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 34, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
-	  1, 1, 1, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 1, 1, 0, 0, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 1, 1, 0, 0, 0 } } } },
-  { MN_vorpd, 0x56, 3, SPACE_0F, None,
-    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 1, 1, 3, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1,
-      0, 0 },
-    { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
-	  1, 1, 0, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 1, 0, 0, 0, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 1, 0, 0, 0, 0 } } } },
-  { MN_vorpd, 0x56, 3, SPACE_0F, None,
+  { MN_vmpsadbw, 0x42, 4, SPACE_0F3A, None,
     { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 1, 2, 1, 0, 0, 5, 1, 4, 0, 0, 7, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 1, 1, 2, 0, 0, 5, 1, 0, 0, 0, 7, 0, 0, 0, 0, 0,
       0, 0 },
-    { { 34, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 99, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
+    { { { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  0, 0, 0, 0, 0, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
 	  1, 1, 1, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 1, 1, 0, 0, 0 } },
@@ -28688,6 +28510,36 @@ static const insn_template i386_optab[] =
 	  1, 0, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  0, 0, 1, 0, 0, 0 } } } },
+  { MN_vpmovzxbd, 0x31, 2, SPACE_0F38, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 1, 0, 3, 1, 0, 0, 2, 1, 0, 0, 0, 2, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
+	  1, 0, 0, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_vpmovzxbd, 0x31, 2, SPACE_0F38, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 2, 0, 3, 1, 0, 0, 3, 1, 0, 0, 0, 3, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 30, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
+	  1, 0, 0, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  0, 1, 0, 0, 0, 0 } } } },
+  { MN_vpmovzxbd, 0x31, 2, SPACE_0F38, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 3, 1, 0, 0, 1, 1, 0, 0, 0, 4, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  0, 0, 1, 0, 0, 0 } } } },
   { MN_vpmovsxbq, 0x22, 2, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 1, 0, 3, 1, 0, 0, 2, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0,
@@ -28718,6 +28570,36 @@ static const insn_template i386_optab[] =
 	  1, 0, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  0, 0, 1, 0, 0, 0 } } } },
+  { MN_vpmovzxbq, 0x32, 2, SPACE_0F38, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 1, 0, 3, 1, 0, 0, 2, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 1, 0, 0, 0, 0,
+	  1, 0, 0, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_vpmovzxbq, 0x32, 2, SPACE_0F38, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 2, 0, 3, 1, 0, 0, 3, 1, 0, 0, 0, 2, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 30, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
+	  1, 0, 0, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  0, 1, 0, 0, 0, 0 } } } },
+  { MN_vpmovzxbq, 0x32, 2, SPACE_0F38, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 3, 1, 0, 0, 1, 1, 0, 0, 0, 3, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
+	  1, 0, 0, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  0, 0, 1, 0, 0, 0 } } } },
   { MN_vpmovsxbw, 0x20, 2, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 1, 0, 3, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
@@ -28768,7 +28650,7 @@ static const insn_template i386_optab[] =
 	  1, 0, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  0, 1, 0, 0, 0, 0 } } } },
-  { MN_vpmovsxdq, 0x25, 2, SPACE_0F38, None,
+  { MN_vpmovzxbw, 0x30, 2, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 1, 0, 3, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
       0, 0 },
@@ -28778,7 +28660,7 @@ static const insn_template i386_optab[] =
 	  1, 0, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_vpmovsxdq, 0x25, 2, SPACE_0F38, None,
+  { MN_vpmovzxbw, 0x30, 2, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 2, 0, 3, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
       0, 0 },
@@ -28788,59 +28670,59 @@ static const insn_template i386_optab[] =
 	  1, 0, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  0, 1, 0, 0, 0, 0 } } } },
-  { MN_vpmovsxdq, 0x25, 2, SPACE_0F38, None,
+  { MN_vpmovzxbw, 0x30, 2, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 1, 1, 0, 0, 1, 1, 0, 0, 0, 5, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 3, 1, 0, 0, 1, 1, 0, 0, 0, 5, 0, 0, 0, 0, 0,
       0, 0 },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 } },
+    { { 35, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
 	  0, 1, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  0, 0, 1, 0, 0, 0 } } } },
-  { MN_vpmovsxdq, 0x25, 2, SPACE_0F38, None,
+  { MN_vpmovzxbw, 0x30, 2, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 1, 1, 0, 0, 2, 1, 0, 0, 0, 3, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 3, 1, 0, 0, 2, 1, 0, 0, 0, 3, 0, 0, 0, 0, 0,
       0, 0 },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } },
+    { { 35, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
 	  1, 0, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_vpmovsxdq, 0x25, 2, SPACE_0F38, None,
+  { MN_vpmovzxbw, 0x30, 2, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 1, 1, 0, 0, 3, 1, 0, 0, 0, 4, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 3, 1, 0, 0, 3, 1, 0, 0, 0, 4, 0, 0, 0, 0, 0,
       0, 0 },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } },
+    { { 35, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  0, 1, 0, 0, 0, 0 } } } },
-  { MN_vpmovsxwd, 0x23, 2, SPACE_0F38, None,
+  { MN_vpmovsxdq, 0x25, 2, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 1, 0, 3, 1, 0, 0, 2, 1, 0, 0, 0, 3, 0, 0, 0, 0, 0,
+      0, 0, 0, 1, 0, 3, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
       0, 0 },
+    { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0 } },
     { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
 	  1, 0, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_vpmovsxwd, 0x23, 2, SPACE_0F38, None,
+  { MN_vpmovsxdq, 0x25, 2, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 2, 0, 3, 1, 0, 0, 3, 1, 0, 0, 0, 4, 0, 0, 0, 0, 0,
+      0, 0, 0, 2, 0, 3, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
       0, 0 },
+    { { 30, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { 30, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } },
     { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  0, 1, 0, 0, 0, 0 } } } },
-  { MN_vpmovsxwd, 0x23, 2, SPACE_0F38, None,
+  { MN_vpmovsxdq, 0x25, 2, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 3, 1, 0, 0, 1, 1, 0, 0, 0, 5, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 1, 1, 0, 0, 1, 1, 0, 0, 0, 5, 0, 0, 0, 0, 0,
       0, 0 },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
@@ -28848,97 +28730,27 @@ static const insn_template i386_optab[] =
 	  0, 1, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  0, 0, 1, 0, 0, 0 } } } },
-  { MN_vpmovsxwq, 0x24, 2, SPACE_0F38, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 1, 0, 3, 1, 0, 0, 2, 1, 0, 0, 0, 2, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
-	  1, 0, 0, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_vpmovsxwq, 0x24, 2, SPACE_0F38, None,
+  { MN_vpmovsxdq, 0x25, 2, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 2, 0, 3, 1, 0, 0, 3, 1, 0, 0, 0, 3, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 1, 1, 0, 0, 2, 1, 0, 0, 0, 3, 0, 0, 0, 0, 0,
       0, 0 },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { 30, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } },
     { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
 	  1, 0, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  0, 1, 0, 0, 0, 0 } } } },
-  { MN_vpmovsxwq, 0x24, 2, SPACE_0F38, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 3, 1, 0, 0, 1, 1, 0, 0, 0, 4, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  0, 0, 1, 0, 0, 0 } } } },
-  { MN_vpmovzxbd, 0x31, 2, SPACE_0F38, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 1, 0, 3, 1, 0, 0, 2, 1, 0, 0, 0, 2, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
-	  1, 0, 0, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_vpmovzxbd, 0x31, 2, SPACE_0F38, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 2, 0, 3, 1, 0, 0, 3, 1, 0, 0, 0, 3, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { 30, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
-	  1, 0, 0, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  0, 1, 0, 0, 0, 0 } } } },
-  { MN_vpmovzxbd, 0x31, 2, SPACE_0F38, None,
+  { MN_vpmovsxdq, 0x25, 2, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 3, 1, 0, 0, 1, 1, 0, 0, 0, 4, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 1, 1, 0, 0, 3, 1, 0, 0, 0, 4, 0, 0, 0, 0, 0,
       0, 0 },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  0, 0, 1, 0, 0, 0 } } } },
-  { MN_vpmovzxbq, 0x32, 2, SPACE_0F38, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 1, 0, 3, 1, 0, 0, 2, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 1, 0, 0, 0, 0,
-	  1, 0, 0, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_vpmovzxbq, 0x32, 2, SPACE_0F38, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 2, 0, 3, 1, 0, 0, 3, 1, 0, 0, 0, 2, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { 30, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
-	  1, 0, 0, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  0, 1, 0, 0, 0, 0 } } } },
-  { MN_vpmovzxbq, 0x32, 2, SPACE_0F38, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 3, 1, 0, 0, 1, 1, 0, 0, 0, 3, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
-	  1, 0, 0, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  0, 0, 1, 0, 0, 0 } } } },
-  { MN_vpmovzxbw, 0x30, 2, SPACE_0F38, None,
+  { MN_vpmovzxdq, 0x35, 2, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 1, 0, 3, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
       0, 0 },
@@ -28948,7 +28760,7 @@ static const insn_template i386_optab[] =
 	  1, 0, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_vpmovzxbw, 0x30, 2, SPACE_0F38, None,
+  { MN_vpmovzxdq, 0x35, 2, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 2, 0, 3, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
       0, 0 },
@@ -28958,59 +28770,59 @@ static const insn_template i386_optab[] =
 	  1, 0, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  0, 1, 0, 0, 0, 0 } } } },
-  { MN_vpmovzxbw, 0x30, 2, SPACE_0F38, None,
+  { MN_vpmovzxdq, 0x35, 2, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 3, 1, 0, 0, 1, 1, 0, 0, 0, 5, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 1, 1, 0, 0, 1, 1, 0, 0, 0, 5, 0, 0, 0, 0, 0,
       0, 0 },
-    { { 35, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
 	  0, 1, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  0, 0, 1, 0, 0, 0 } } } },
-  { MN_vpmovzxbw, 0x30, 2, SPACE_0F38, None,
+  { MN_vpmovzxdq, 0x35, 2, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 3, 1, 0, 0, 2, 1, 0, 0, 0, 3, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 1, 1, 0, 0, 2, 1, 0, 0, 0, 3, 0, 0, 0, 0, 0,
       0, 0 },
-    { { 35, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
 	  1, 0, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_vpmovzxbw, 0x30, 2, SPACE_0F38, None,
+  { MN_vpmovzxdq, 0x35, 2, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 3, 1, 0, 0, 3, 1, 0, 0, 0, 4, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 1, 1, 0, 0, 3, 1, 0, 0, 0, 4, 0, 0, 0, 0, 0,
       0, 0 },
-    { { 35, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  0, 1, 0, 0, 0, 0 } } } },
-  { MN_vpmovzxdq, 0x35, 2, SPACE_0F38, None,
+  { MN_vpmovsxwd, 0x23, 2, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 1, 0, 3, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
+      0, 0, 0, 1, 0, 3, 1, 0, 0, 2, 1, 0, 0, 0, 3, 0, 0, 0, 0, 0,
       0, 0 },
-    { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0 } },
     { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
 	  1, 0, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_vpmovzxdq, 0x35, 2, SPACE_0F38, None,
+  { MN_vpmovsxwd, 0x23, 2, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 2, 0, 3, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
+      0, 0, 0, 2, 0, 3, 1, 0, 0, 3, 1, 0, 0, 0, 4, 0, 0, 0, 0, 0,
       0, 0 },
-    { { 30, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 30, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } },
     { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  0, 1, 0, 0, 0, 0 } } } },
-  { MN_vpmovzxdq, 0x35, 2, SPACE_0F38, None,
+  { MN_vpmovsxwd, 0x23, 2, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 1, 1, 0, 0, 1, 1, 0, 0, 0, 5, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 3, 1, 0, 0, 1, 1, 0, 0, 0, 5, 0, 0, 0, 0, 0,
       0, 0 },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
@@ -29018,54 +28830,64 @@ static const insn_template i386_optab[] =
 	  0, 1, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  0, 0, 1, 0, 0, 0 } } } },
-  { MN_vpmovzxdq, 0x35, 2, SPACE_0F38, None,
+  { MN_vpmovzxwd, 0x33, 2, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 1, 1, 0, 0, 2, 1, 0, 0, 0, 3, 0, 0, 0, 0, 0,
+      0, 0, 0, 1, 0, 3, 1, 0, 0, 2, 1, 0, 0, 0, 3, 0, 0, 0, 0, 0,
       0, 0 },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0 } },
     { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
 	  1, 0, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_vpmovzxdq, 0x35, 2, SPACE_0F38, None,
+  { MN_vpmovzxwd, 0x33, 2, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 1, 1, 0, 0, 3, 1, 0, 0, 0, 4, 0, 0, 0, 0, 0,
+      0, 0, 0, 2, 0, 3, 1, 0, 0, 3, 1, 0, 0, 0, 4, 0, 0, 0, 0, 0,
       0, 0 },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 30, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } },
     { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  0, 1, 0, 0, 0, 0 } } } },
   { MN_vpmovzxwd, 0x33, 2, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 1, 0, 3, 1, 0, 0, 2, 1, 0, 0, 0, 3, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 3, 1, 0, 0, 1, 1, 0, 0, 0, 5, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
+	  0, 1, 0, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  0, 0, 1, 0, 0, 0 } } } },
+  { MN_vpmovsxwq, 0x24, 2, SPACE_0F38, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 1, 0, 3, 1, 0, 0, 2, 1, 0, 0, 0, 2, 0, 0, 0, 0, 0,
       0, 0 },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
 	  1, 0, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_vpmovzxwd, 0x33, 2, SPACE_0F38, None,
+  { MN_vpmovsxwq, 0x24, 2, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 2, 0, 3, 1, 0, 0, 3, 1, 0, 0, 0, 4, 0, 0, 0, 0, 0,
+      0, 0, 0, 2, 0, 3, 1, 0, 0, 3, 1, 0, 0, 0, 3, 0, 0, 0, 0, 0,
       0, 0 },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 30, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
 	  1, 0, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  0, 1, 0, 0, 0, 0 } } } },
-  { MN_vpmovzxwd, 0x33, 2, SPACE_0F38, None,
+  { MN_vpmovsxwq, 0x24, 2, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 3, 1, 0, 0, 1, 1, 0, 0, 0, 5, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 3, 1, 0, 0, 1, 1, 0, 0, 0, 4, 0, 0, 0, 0, 0,
       0, 0 },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
-	  0, 1, 0, 0, 1, 0 } },
+	  1, 0, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  0, 0, 1, 0, 0, 0 } } } },
   { MN_vpmovzxwq, 0x34, 2, SPACE_0F38, None,
@@ -30306,18 +30128,6 @@ static const insn_template i386_optab[] =
 	  1, 1, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 1, 0, 0, 0, 0 } } } },
-  { MN_vroundps, 0x08 | 0, 3, SPACE_0F3A, None,
-    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 1, 1, 0, 0, 5, 0, 0, 0, 0, 7, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  0, 0, 0, 0, 0, 0 } },
-      { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0,
-	  1, 1, 0, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 1, 0, 0, 0, 0 } } } },
   { MN_vroundpd, 0x08 | 1, 3, SPACE_0F3A, None,
     { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 1, 0, 3, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
@@ -30330,18 +30140,6 @@ static const insn_template i386_optab[] =
 	  1, 1, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 1, 0, 0, 0, 0 } } } },
-  { MN_vroundpd, 0x08 | 1, 3, SPACE_0F3A, None,
-    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 2, 1, 0, 0, 5, 0, 0, 0, 0, 7, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  0, 0, 0, 0, 0, 0 } },
-      { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0,
-	  1, 1, 0, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 1, 0, 0, 0, 0 } } } },
   { MN_vroundss, 0x0a | 0, 4, SPACE_0F3A, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 3, 1, 3, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
@@ -30356,20 +30154,6 @@ static const insn_template i386_optab[] =
 	  1, 0, 0, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_vroundss, 0x0a | 0, 4, SPACE_0F3A, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 1, 1, 1, 0, 0, 4, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 1, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  0, 0, 0, 0, 0, 0 } },
-      { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 1, 0, 0, 0,
-	  0, 0, 0, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } } } },
   { MN_vroundsd, 0x0a | 1, 4, SPACE_0F3A, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 3, 1, 3, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
@@ -30384,20 +30168,6 @@ static const insn_template i386_optab[] =
 	  1, 0, 0, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_vroundsd, 0x0a | 1, 4, SPACE_0F3A, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 1, 2, 1, 0, 0, 4, 0, 0, 0, 0, 3, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 1, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  0, 0, 0, 0, 0, 0 } },
-      { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 0, 0, 1, 0,
-	  0, 0, 0, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } } } },
   { MN_vrsqrtps, 0x52, 2, SPACE_0F, None,
     { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 1, 0, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
@@ -30572,102 +30342,6 @@ static const insn_template i386_optab[] =
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
 	  0, 0, 0, 0, 1, 0 } } } },
-  { MN_vsubps, 0x5c, 3, SPACE_0F, None,
-    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 1, 1, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
-      0, 0 },
-    { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
-	  1, 1, 0, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 1, 0, 0, 0, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 1, 0, 0, 0, 0 } } } },
-  { MN_vsubps, 0x5c, 3, SPACE_0F, None,
-    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 1, 1, 0, 0, 0, 5, 1, 3, 1, 1, 7, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
-	  1, 1, 1, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 1, 1, 0, 0, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 1, 1, 0, 0, 0 } } } },
-  { MN_vsubpd, 0x5c, 3, SPACE_0F, None,
-    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 1, 1, 3, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
-      0, 0 },
-    { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
-	  1, 1, 0, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 1, 0, 0, 0, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 1, 0, 0, 0, 0 } } } },
-  { MN_vsubpd, 0x5c, 3, SPACE_0F, None,
-    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 1, 2, 1, 0, 0, 5, 1, 4, 1, 1, 7, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
-	  1, 1, 1, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 1, 1, 0, 0, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 1, 1, 0, 0, 0 } } } },
-  { MN_vsubss, 0x5c, 3, SPACE_0F, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 3, 1, 3, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
-      0, 0 },
-    { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
-	  1, 0, 0, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_vsubss, 0x5c, 3, SPACE_0F, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 1, 1, 2, 0, 0, 4, 1, 0, 1, 1, 2, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
-	  1, 0, 0, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_vsubsd, 0x5c, 3, SPACE_0F, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 3, 1, 3, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
-      0, 0 },
-    { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
-	  1, 0, 0, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_vsubsd, 0x5c, 3, SPACE_0F, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 1, 2, 3, 0, 0, 4, 1, 0, 1, 1, 3, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
-	  1, 0, 0, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } } } },
   { MN_vtestps, 0x0e | 0, 2, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 1, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
@@ -30824,54 +30498,6 @@ static const insn_template i386_optab[] =
 	  1, 1, 1, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 1, 1, 0, 0, 0 } } } },
-  { MN_vxorps, 0x57, 3, SPACE_0F, None,
-    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 1, 1, 3, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0, 1,
-      0, 0 },
-    { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
-	  1, 1, 0, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 1, 0, 0, 0, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 1, 0, 0, 0, 0 } } } },
-  { MN_vxorps, 0x57, 3, SPACE_0F, None,
-    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 1, 1, 0, 0, 0, 5, 1, 3, 0, 0, 7, 1, 0, 0, 0, 0,
-      0, 0 },
-    { { 34, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
-	  1, 1, 1, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 1, 1, 0, 0, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 1, 1, 0, 0, 0 } } } },
-  { MN_vxorpd, 0x57, 3, SPACE_0F, None,
-    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 1, 1, 3, 1, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0, 1,
-      0, 0 },
-    { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
-	  1, 1, 0, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 1, 0, 0, 0, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 1, 0, 0, 0, 0 } } } },
-  { MN_vxorpd, 0x57, 3, SPACE_0F, None,
-    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 1, 2, 1, 0, 0, 5, 1, 4, 0, 0, 7, 1, 0, 0, 0, 0,
-      0, 0 },
-    { { 34, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
-	  1, 1, 1, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 1, 1, 0, 0, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 1, 1, 0, 0, 0 } } } },
   { MN_vzeroall, 0x77, 0, SPACE_0F, None,
     { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 2, 0, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
@@ -30898,16 +30524,6 @@ static const insn_template i386_optab[] =
 	  1, 0, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  0, 1, 0, 0, 0, 0 } } } },
-  { MN_vbroadcasti128, 0x5a, 2, SPACE_0F38, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 1, 1, 0, 0, 3, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  0, 1, 0, 0, 0, 0 } } } },
   { MN_vpblendd, 0x02, 4, SPACE_0F3A, None,
     { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
@@ -31120,7 +30736,7 @@ static const insn_template i386_optab[] =
 	  0, 1, 1, 0, 0, 0 } } } },
   { MN_vextracti128, 0x39, 3, SPACE_0F3A, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 2, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
+      0, 0, 0, 2, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1,
       0, 0 },
     { { 30, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
@@ -31130,18 +30746,6 @@ static const insn_template i386_optab[] =
 	  0, 1, 0, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 1, 0 } } } },
-  { MN_vextracti128, 0x39, 3, SPACE_0F3A, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 1, 1, 0, 0, 3, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  0, 0, 0, 0, 0, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  0, 1, 0, 0, 0, 0 } },
-      { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 1, 0 } } } },
   { MN_vinserti128, 0x38, 4, SPACE_0F3A, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 2, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
@@ -31156,20 +30760,6 @@ static const insn_template i386_optab[] =
 	  0, 1, 0, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  0, 1, 0, 0, 0, 0 } } } },
-  { MN_vinserti128, 0x38, 4, SPACE_0F3A, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 1, 1, 1, 0, 0, 3, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  0, 0, 0, 0, 0, 0 } },
-      { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  0, 1, 0, 0, 0, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  0, 1, 0, 0, 0, 0 } } } },
   { MN_vpmaskmovd, 0x8e, 3, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
@@ -31682,7 +31272,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 1, 1, 3, 1, 0, 0, 5, 0, 0, 0, 0, 7, 0, 0, 0, 0, 0,
       0, 0 },
-    { { 112, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 113, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 0 } },
     { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
 	  1, 1, 1, 0, 1, 0 } },
@@ -31706,7 +31296,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 1, 1, 3, 1, 0, 0, 5, 0, 0, 0, 0, 7, 0, 0, 0, 0, 0,
       0, 0 },
-    { { 112, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 113, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 0 } },
     { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
 	  1, 1, 1, 0, 1, 0 } },
@@ -31730,7 +31320,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 1, 1, 3, 1, 0, 0, 5, 0, 0, 0, 0, 7, 0, 0, 0, 0, 0,
       0, 0 },
-    { { 112, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 113, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 0 } },
     { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
 	  1, 1, 1, 0, 1, 0 } },
@@ -31754,7 +31344,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 1, 1, 3, 1, 0, 0, 5, 0, 0, 0, 0, 7, 0, 0, 0, 0, 0,
       0, 0 },
-    { { 112, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 113, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 0 } },
     { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
 	  1, 1, 1, 0, 1, 0 } },
@@ -31802,7 +31392,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 1, 1, 3, 1, 0, 0, 5, 0, 0, 0, 0, 7, 0, 0, 0, 0, 0,
       0, 0 },
-    { { 113, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 114, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 0 } },
     { { { 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  0, 0, 0, 0, 0, 0 } },
@@ -31828,7 +31418,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 1, 0, 1, 1, 3, 1, 0, 0, 5, 0, 0, 0, 0, 7, 0, 0, 0, 0, 0,
       0, 0 },
-    { { 113, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 114, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 0 } },
     { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
 	  1, 1, 1, 0, 1, 0 } },
@@ -31852,7 +31442,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 1, 0, 1, 1, 3, 1, 0, 0, 5, 0, 0, 0, 0, 7, 0, 0, 0, 0, 0,
       0, 0 },
-    { { 113, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 114, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 0 } },
     { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
 	  1, 1, 1, 0, 1, 0 } },
@@ -31876,7 +31466,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 1, 0, 1, 1, 3, 1, 0, 0, 5, 0, 0, 0, 0, 7, 0, 0, 0, 0, 0,
       0, 0 },
-    { { 113, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 114, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 0 } },
     { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
 	  1, 1, 1, 0, 1, 0 } },
@@ -31900,7 +31490,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 1, 0, 1, 1, 3, 1, 0, 0, 5, 0, 0, 0, 0, 7, 0, 0, 0, 0, 0,
       0, 0 },
-    { { 113, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 114, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 0 } },
     { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
 	  1, 1, 1, 0, 1, 0 } },
@@ -31912,7 +31502,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 1, 1, 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
       0, 0 },
-    { { 111, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 } },
+    { { 112, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  0, 0, 0, 0, 0, 0 } },
@@ -31926,7 +31516,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 1, 2, 1, 0, 0, 5, 1, 4, 0, 0, 7, 0, 0, 0, 0, 0,
       0, 0 },
-    { { 111, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 } },
+    { { 112, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  0, 0, 0, 0, 0, 0 } },
@@ -31940,7 +31530,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 1, 1, 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
       0, 0 },
-    { { 111, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 } },
+    { { 112, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  0, 0, 0, 0, 0, 0 } },
@@ -31954,7 +31544,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 1, 2, 1, 0, 0, 5, 1, 4, 0, 0, 7, 0, 0, 0, 0, 0,
       0, 0 },
-    { { 111, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 } },
+    { { 112, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  0, 0, 0, 0, 0, 0 } },
@@ -31968,7 +31558,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 1, 1, 1, 1, 0, 0, 5, 1, 0, 0, 0, 7, 0, 0, 0, 0, 0,
       0, 0 },
-    { { 111, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 112, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 0 } },
     { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
 	  1, 1, 1, 0, 1, 0 } },
@@ -32058,7 +31648,7 @@ static const insn_template i386_optab[] =
 	  1, 0, 0, 0, 0, 0 } } } },
   { MN_vcvtph2ps, 0x13, 2, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 1, 1, 0, 0, 3, 1, 0, 0, 0, 4, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 1, 1, 0, 0, 3, 1, 0, 0, 1, 4, 0, 0, 0, 0, 0,
       0, 0 },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
@@ -32234,115 +31824,115 @@ static const insn_template i386_optab[] =
 	  1, 1, 1, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 1, 1, 0, 0, 0 } } } },
-  { MN_vfmadd132ss, 0x89 | 0x10, 3, SPACE_0F38, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 3, 1, 1, 1, 0, 0, 4, 1, 0, 1, 1, 2, 0, 0, 0, 0, 0,
+  { MN_vfmsub132ps, 0x8a | 0x10, 3, SPACE_0F38, None,
+    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 1, 1, 1, 1, 0, 0, 5, 1, 3, 1, 1, 7, 0, 0, 0, 0, 0,
       0, 0 },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 41, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 } },
     { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
-	  1, 0, 0, 0, 1, 0 } },
+	  1, 1, 1, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } },
+	  1, 1, 1, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_vfmadd132sd, 0x89 | 0x10, 3, SPACE_0F38, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 3, 1, 2, 1, 0, 0, 4, 1, 0, 1, 1, 3, 0, 0, 0, 0, 0,
+	  1, 1, 1, 0, 0, 0 } } } },
+  { MN_vfmsub132pd, 0x8a | 0x10, 3, SPACE_0F38, None,
+    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 1, 1, 2, 1, 0, 0, 5, 1, 4, 1, 1, 7, 0, 0, 0, 0, 0,
       0, 0 },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 41, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 } },
     { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
-	  1, 0, 0, 0, 1, 0 } },
+	  1, 1, 1, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } },
+	  1, 1, 1, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_vfmadd132sh, 0x89 | 0x10, 3, SPACE_EVEXMAP6, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 1, 1, 1, 0, 0, 4, 1, 0, 1, 1, 1, 0, 0, 0, 0, 0,
+	  1, 1, 1, 0, 0, 0 } } } },
+  { MN_vfmsub132ph, 0x8a | 0x10, 3, SPACE_EVEXMAP6, None,
+    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 1, 1, 1, 0, 0, 5, 1, 2, 1, 1, 7, 0, 0, 0, 0, 0,
       0, 0 },
     { { 86, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 1, 0, 0, 0, 0,
-	  1, 0, 0, 0, 1, 0 } },
+	  1, 1, 1, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } },
+	  1, 1, 1, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_vfmadd213ss, 0x89 | 0x20, 3, SPACE_0F38, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 3, 1, 1, 1, 0, 0, 4, 1, 0, 1, 1, 2, 0, 0, 0, 0, 0,
+	  1, 1, 1, 0, 0, 0 } } } },
+  { MN_vfmsub213ps, 0x8a | 0x20, 3, SPACE_0F38, None,
+    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 1, 1, 1, 1, 0, 0, 5, 1, 3, 1, 1, 7, 0, 0, 0, 0, 0,
       0, 0 },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 41, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 } },
     { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
-	  1, 0, 0, 0, 1, 0 } },
+	  1, 1, 1, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } },
+	  1, 1, 1, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_vfmadd213sd, 0x89 | 0x20, 3, SPACE_0F38, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 3, 1, 2, 1, 0, 0, 4, 1, 0, 1, 1, 3, 0, 0, 0, 0, 0,
+	  1, 1, 1, 0, 0, 0 } } } },
+  { MN_vfmsub213pd, 0x8a | 0x20, 3, SPACE_0F38, None,
+    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 1, 1, 2, 1, 0, 0, 5, 1, 4, 1, 1, 7, 0, 0, 0, 0, 0,
       0, 0 },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 41, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 } },
     { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
-	  1, 0, 0, 0, 1, 0 } },
+	  1, 1, 1, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } },
+	  1, 1, 1, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_vfmadd213sh, 0x89 | 0x20, 3, SPACE_EVEXMAP6, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 1, 1, 1, 0, 0, 4, 1, 0, 1, 1, 1, 0, 0, 0, 0, 0,
+	  1, 1, 1, 0, 0, 0 } } } },
+  { MN_vfmsub213ph, 0x8a | 0x20, 3, SPACE_EVEXMAP6, None,
+    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 1, 1, 1, 0, 0, 5, 1, 2, 1, 1, 7, 0, 0, 0, 0, 0,
       0, 0 },
     { { 86, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 1, 0, 0, 0, 0,
-	  1, 0, 0, 0, 1, 0 } },
+	  1, 1, 1, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } },
+	  1, 1, 1, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_vfmadd231ss, 0x89 | 0x30, 3, SPACE_0F38, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 3, 1, 1, 1, 0, 0, 4, 1, 0, 1, 1, 2, 0, 0, 0, 0, 0,
+	  1, 1, 1, 0, 0, 0 } } } },
+  { MN_vfmsub231ps, 0x8a | 0x30, 3, SPACE_0F38, None,
+    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 1, 1, 1, 1, 0, 0, 5, 1, 3, 1, 1, 7, 0, 0, 0, 0, 0,
       0, 0 },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 41, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 } },
     { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
-	  1, 0, 0, 0, 1, 0 } },
+	  1, 1, 1, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } },
+	  1, 1, 1, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_vfmadd231sd, 0x89 | 0x30, 3, SPACE_0F38, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 3, 1, 2, 1, 0, 0, 4, 1, 0, 1, 1, 3, 0, 0, 0, 0, 0,
+	  1, 1, 1, 0, 0, 0 } } } },
+  { MN_vfmsub231pd, 0x8a | 0x30, 3, SPACE_0F38, None,
+    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 1, 1, 2, 1, 0, 0, 5, 1, 4, 1, 1, 7, 0, 0, 0, 0, 0,
       0, 0 },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 41, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 } },
     { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
-	  1, 0, 0, 0, 1, 0 } },
+	  1, 1, 1, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } },
+	  1, 1, 1, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_vfmadd231sh, 0x89 | 0x30, 3, SPACE_EVEXMAP6, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 1, 1, 1, 0, 0, 4, 1, 0, 1, 1, 1, 0, 0, 0, 0, 0,
+	  1, 1, 1, 0, 0, 0 } } } },
+  { MN_vfmsub231ph, 0x8a | 0x30, 3, SPACE_EVEXMAP6, None,
+    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 1, 1, 1, 0, 0, 5, 1, 2, 1, 1, 7, 0, 0, 0, 0, 0,
       0, 0 },
     { { 86, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 1, 0, 0, 0, 0,
-	  1, 0, 0, 0, 1, 0 } },
+	  1, 1, 1, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } },
+	  1, 1, 1, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_vfmaddsub132ps, 0x86 | 0x10, 3, SPACE_0F38, None,
+	  1, 1, 1, 0, 0, 0 } } } },
+  { MN_vfnmadd132ps, 0x8c | 0x10, 3, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 1, 1, 1, 1, 0, 0, 5, 1, 3, 1, 1, 7, 0, 0, 0, 0, 0,
       0, 0 },
@@ -32354,7 +31944,7 @@ static const insn_template i386_optab[] =
 	  1, 1, 1, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 1, 1, 0, 0, 0 } } } },
-  { MN_vfmaddsub132pd, 0x86 | 0x10, 3, SPACE_0F38, None,
+  { MN_vfnmadd132pd, 0x8c | 0x10, 3, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 1, 1, 2, 1, 0, 0, 5, 1, 4, 1, 1, 7, 0, 0, 0, 0, 0,
       0, 0 },
@@ -32366,7 +31956,7 @@ static const insn_template i386_optab[] =
 	  1, 1, 1, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 1, 1, 0, 0, 0 } } } },
-  { MN_vfmaddsub132ph, 0x86 | 0x10, 3, SPACE_EVEXMAP6, None,
+  { MN_vfnmadd132ph, 0x8c | 0x10, 3, SPACE_EVEXMAP6, None,
     { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 1, 1, 1, 0, 0, 5, 1, 2, 1, 1, 7, 0, 0, 0, 0, 0,
       0, 0 },
@@ -32378,7 +31968,7 @@ static const insn_template i386_optab[] =
 	  1, 1, 1, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 1, 1, 0, 0, 0 } } } },
-  { MN_vfmaddsub213ps, 0x86 | 0x20, 3, SPACE_0F38, None,
+  { MN_vfnmadd213ps, 0x8c | 0x20, 3, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 1, 1, 1, 1, 0, 0, 5, 1, 3, 1, 1, 7, 0, 0, 0, 0, 0,
       0, 0 },
@@ -32390,7 +31980,7 @@ static const insn_template i386_optab[] =
 	  1, 1, 1, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 1, 1, 0, 0, 0 } } } },
-  { MN_vfmaddsub213pd, 0x86 | 0x20, 3, SPACE_0F38, None,
+  { MN_vfnmadd213pd, 0x8c | 0x20, 3, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 1, 1, 2, 1, 0, 0, 5, 1, 4, 1, 1, 7, 0, 0, 0, 0, 0,
       0, 0 },
@@ -32402,7 +31992,7 @@ static const insn_template i386_optab[] =
 	  1, 1, 1, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 1, 1, 0, 0, 0 } } } },
-  { MN_vfmaddsub213ph, 0x86 | 0x20, 3, SPACE_EVEXMAP6, None,
+  { MN_vfnmadd213ph, 0x8c | 0x20, 3, SPACE_EVEXMAP6, None,
     { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 1, 1, 1, 0, 0, 5, 1, 2, 1, 1, 7, 0, 0, 0, 0, 0,
       0, 0 },
@@ -32414,7 +32004,7 @@ static const insn_template i386_optab[] =
 	  1, 1, 1, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 1, 1, 0, 0, 0 } } } },
-  { MN_vfmaddsub231ps, 0x86 | 0x30, 3, SPACE_0F38, None,
+  { MN_vfnmadd231ps, 0x8c | 0x30, 3, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 1, 1, 1, 1, 0, 0, 5, 1, 3, 1, 1, 7, 0, 0, 0, 0, 0,
       0, 0 },
@@ -32426,7 +32016,7 @@ static const insn_template i386_optab[] =
 	  1, 1, 1, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 1, 1, 0, 0, 0 } } } },
-  { MN_vfmaddsub231pd, 0x86 | 0x30, 3, SPACE_0F38, None,
+  { MN_vfnmadd231pd, 0x8c | 0x30, 3, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 1, 1, 2, 1, 0, 0, 5, 1, 4, 1, 1, 7, 0, 0, 0, 0, 0,
       0, 0 },
@@ -32438,7 +32028,7 @@ static const insn_template i386_optab[] =
 	  1, 1, 1, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 1, 1, 0, 0, 0 } } } },
-  { MN_vfmaddsub231ph, 0x86 | 0x30, 3, SPACE_EVEXMAP6, None,
+  { MN_vfnmadd231ph, 0x8c | 0x30, 3, SPACE_EVEXMAP6, None,
     { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 1, 1, 1, 0, 0, 5, 1, 2, 1, 1, 7, 0, 0, 0, 0, 0,
       0, 0 },
@@ -32450,7 +32040,7 @@ static const insn_template i386_optab[] =
 	  1, 1, 1, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 1, 1, 0, 0, 0 } } } },
-  { MN_vfmsub132ps, 0x8a | 0x10, 3, SPACE_0F38, None,
+  { MN_vfnmsub132ps, 0x8e | 0x10, 3, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 1, 1, 1, 1, 0, 0, 5, 1, 3, 1, 1, 7, 0, 0, 0, 0, 0,
       0, 0 },
@@ -32462,7 +32052,7 @@ static const insn_template i386_optab[] =
 	  1, 1, 1, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 1, 1, 0, 0, 0 } } } },
-  { MN_vfmsub132pd, 0x8a | 0x10, 3, SPACE_0F38, None,
+  { MN_vfnmsub132pd, 0x8e | 0x10, 3, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 1, 1, 2, 1, 0, 0, 5, 1, 4, 1, 1, 7, 0, 0, 0, 0, 0,
       0, 0 },
@@ -32474,7 +32064,7 @@ static const insn_template i386_optab[] =
 	  1, 1, 1, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 1, 1, 0, 0, 0 } } } },
-  { MN_vfmsub132ph, 0x8a | 0x10, 3, SPACE_EVEXMAP6, None,
+  { MN_vfnmsub132ph, 0x8e | 0x10, 3, SPACE_EVEXMAP6, None,
     { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 1, 1, 1, 0, 0, 5, 1, 2, 1, 1, 7, 0, 0, 0, 0, 0,
       0, 0 },
@@ -32486,7 +32076,7 @@ static const insn_template i386_optab[] =
 	  1, 1, 1, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 1, 1, 0, 0, 0 } } } },
-  { MN_vfmsub213ps, 0x8a | 0x20, 3, SPACE_0F38, None,
+  { MN_vfnmsub213ps, 0x8e | 0x20, 3, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 1, 1, 1, 1, 0, 0, 5, 1, 3, 1, 1, 7, 0, 0, 0, 0, 0,
       0, 0 },
@@ -32498,7 +32088,7 @@ static const insn_template i386_optab[] =
 	  1, 1, 1, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 1, 1, 0, 0, 0 } } } },
-  { MN_vfmsub213pd, 0x8a | 0x20, 3, SPACE_0F38, None,
+  { MN_vfnmsub213pd, 0x8e | 0x20, 3, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 1, 1, 2, 1, 0, 0, 5, 1, 4, 1, 1, 7, 0, 0, 0, 0, 0,
       0, 0 },
@@ -32510,7 +32100,7 @@ static const insn_template i386_optab[] =
 	  1, 1, 1, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 1, 1, 0, 0, 0 } } } },
-  { MN_vfmsub213ph, 0x8a | 0x20, 3, SPACE_EVEXMAP6, None,
+  { MN_vfnmsub213ph, 0x8e | 0x20, 3, SPACE_EVEXMAP6, None,
     { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 1, 1, 1, 0, 0, 5, 1, 2, 1, 1, 7, 0, 0, 0, 0, 0,
       0, 0 },
@@ -32522,7 +32112,7 @@ static const insn_template i386_optab[] =
 	  1, 1, 1, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 1, 1, 0, 0, 0 } } } },
-  { MN_vfmsub231ps, 0x8a | 0x30, 3, SPACE_0F38, None,
+  { MN_vfnmsub231ps, 0x8e | 0x30, 3, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 1, 1, 1, 1, 0, 0, 5, 1, 3, 1, 1, 7, 0, 0, 0, 0, 0,
       0, 0 },
@@ -32534,7 +32124,7 @@ static const insn_template i386_optab[] =
 	  1, 1, 1, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 1, 1, 0, 0, 0 } } } },
-  { MN_vfmsub231pd, 0x8a | 0x30, 3, SPACE_0F38, None,
+  { MN_vfnmsub231pd, 0x8e | 0x30, 3, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 1, 1, 2, 1, 0, 0, 5, 1, 4, 1, 1, 7, 0, 0, 0, 0, 0,
       0, 0 },
@@ -32546,7 +32136,7 @@ static const insn_template i386_optab[] =
 	  1, 1, 1, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 1, 1, 0, 0, 0 } } } },
-  { MN_vfmsub231ph, 0x8a | 0x30, 3, SPACE_EVEXMAP6, None,
+  { MN_vfnmsub231ph, 0x8e | 0x30, 3, SPACE_EVEXMAP6, None,
     { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 1, 1, 1, 0, 0, 5, 1, 2, 1, 1, 7, 0, 0, 0, 0, 0,
       0, 0 },
@@ -32558,7 +32148,7 @@ static const insn_template i386_optab[] =
 	  1, 1, 1, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 1, 1, 0, 0, 0 } } } },
-  { MN_vfmsub132ss, 0x8b | 0x10, 3, SPACE_0F38, None,
+  { MN_vfmadd132ss, 0x88 | 1 | 0x10, 3, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 3, 1, 1, 1, 0, 0, 4, 1, 0, 1, 1, 2, 0, 0, 0, 0, 0,
       0, 0 },
@@ -32570,7 +32160,7 @@ static const insn_template i386_optab[] =
 	  1, 0, 0, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_vfmsub132sd, 0x8b | 0x10, 3, SPACE_0F38, None,
+  { MN_vfmadd132sd, 0x88 | 1 | 0x10, 3, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 3, 1, 2, 1, 0, 0, 4, 1, 0, 1, 1, 3, 0, 0, 0, 0, 0,
       0, 0 },
@@ -32582,7 +32172,7 @@ static const insn_template i386_optab[] =
 	  1, 0, 0, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_vfmsub132sh, 0x8b | 0x10, 3, SPACE_EVEXMAP6, None,
+  { MN_vfmadd132sh, 0x88 | 1 | 0x10, 3, SPACE_EVEXMAP6, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 1, 1, 1, 0, 0, 4, 1, 0, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0 },
@@ -32594,7 +32184,7 @@ static const insn_template i386_optab[] =
 	  1, 0, 0, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_vfmsub213ss, 0x8b | 0x20, 3, SPACE_0F38, None,
+  { MN_vfmadd213ss, 0x88 | 1 | 0x20, 3, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 3, 1, 1, 1, 0, 0, 4, 1, 0, 1, 1, 2, 0, 0, 0, 0, 0,
       0, 0 },
@@ -32606,7 +32196,7 @@ static const insn_template i386_optab[] =
 	  1, 0, 0, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_vfmsub213sd, 0x8b | 0x20, 3, SPACE_0F38, None,
+  { MN_vfmadd213sd, 0x88 | 1 | 0x20, 3, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 3, 1, 2, 1, 0, 0, 4, 1, 0, 1, 1, 3, 0, 0, 0, 0, 0,
       0, 0 },
@@ -32618,7 +32208,7 @@ static const insn_template i386_optab[] =
 	  1, 0, 0, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_vfmsub213sh, 0x8b | 0x20, 3, SPACE_EVEXMAP6, None,
+  { MN_vfmadd213sh, 0x88 | 1 | 0x20, 3, SPACE_EVEXMAP6, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 1, 1, 1, 0, 0, 4, 1, 0, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0 },
@@ -32630,7 +32220,7 @@ static const insn_template i386_optab[] =
 	  1, 0, 0, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_vfmsub231ss, 0x8b | 0x30, 3, SPACE_0F38, None,
+  { MN_vfmadd231ss, 0x88 | 1 | 0x30, 3, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 3, 1, 1, 1, 0, 0, 4, 1, 0, 1, 1, 2, 0, 0, 0, 0, 0,
       0, 0 },
@@ -32642,7 +32232,7 @@ static const insn_template i386_optab[] =
 	  1, 0, 0, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_vfmsub231sd, 0x8b | 0x30, 3, SPACE_0F38, None,
+  { MN_vfmadd231sd, 0x88 | 1 | 0x30, 3, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 3, 1, 2, 1, 0, 0, 4, 1, 0, 1, 1, 3, 0, 0, 0, 0, 0,
       0, 0 },
@@ -32654,7 +32244,7 @@ static const insn_template i386_optab[] =
 	  1, 0, 0, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_vfmsub231sh, 0x8b | 0x30, 3, SPACE_EVEXMAP6, None,
+  { MN_vfmadd231sh, 0x88 | 1 | 0x30, 3, SPACE_EVEXMAP6, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 1, 1, 1, 0, 0, 4, 1, 0, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0 },
@@ -32666,223 +32256,223 @@ static const insn_template i386_optab[] =
 	  1, 0, 0, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_vfmsubadd132ps, 0x87 | 0x10, 3, SPACE_0F38, None,
-    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 1, 1, 1, 1, 0, 0, 5, 1, 3, 1, 1, 7, 0, 0, 0, 0, 0,
+  { MN_vfmsub132ss, 0x8a | 1 | 0x10, 3, SPACE_0F38, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 3, 1, 1, 1, 0, 0, 4, 1, 0, 1, 1, 2, 0, 0, 0, 0, 0,
       0, 0 },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 41, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 } },
     { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
-	  1, 1, 1, 0, 1, 0 } },
+	  1, 0, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 1, 1, 0, 0, 0 } },
+	  1, 0, 0, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 1, 1, 0, 0, 0 } } } },
-  { MN_vfmsubadd132pd, 0x87 | 0x10, 3, SPACE_0F38, None,
-    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 1, 1, 2, 1, 0, 0, 5, 1, 4, 1, 1, 7, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_vfmsub132sd, 0x8a | 1 | 0x10, 3, SPACE_0F38, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 3, 1, 2, 1, 0, 0, 4, 1, 0, 1, 1, 3, 0, 0, 0, 0, 0,
       0, 0 },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 41, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 } },
     { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
-	  1, 1, 1, 0, 1, 0 } },
+	  1, 0, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 1, 1, 0, 0, 0 } },
+	  1, 0, 0, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 1, 1, 0, 0, 0 } } } },
-  { MN_vfmsubadd132ph, 0x87 | 0x10, 3, SPACE_EVEXMAP6, None,
-    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 1, 1, 1, 0, 0, 5, 1, 2, 1, 1, 7, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_vfmsub132sh, 0x8a | 1 | 0x10, 3, SPACE_EVEXMAP6, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 1, 1, 1, 0, 0, 4, 1, 0, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0 },
     { { 86, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 1, 0, 0, 0, 0,
-	  1, 1, 1, 0, 1, 0 } },
+	  1, 0, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 1, 1, 0, 0, 0 } },
+	  1, 0, 0, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 1, 1, 0, 0, 0 } } } },
-  { MN_vfmsubadd213ps, 0x87 | 0x20, 3, SPACE_0F38, None,
-    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 1, 1, 1, 1, 0, 0, 5, 1, 3, 1, 1, 7, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_vfmsub213ss, 0x8a | 1 | 0x20, 3, SPACE_0F38, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 3, 1, 1, 1, 0, 0, 4, 1, 0, 1, 1, 2, 0, 0, 0, 0, 0,
       0, 0 },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 41, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 } },
     { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
-	  1, 1, 1, 0, 1, 0 } },
+	  1, 0, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 1, 1, 0, 0, 0 } },
+	  1, 0, 0, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 1, 1, 0, 0, 0 } } } },
-  { MN_vfmsubadd213pd, 0x87 | 0x20, 3, SPACE_0F38, None,
-    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 1, 1, 2, 1, 0, 0, 5, 1, 4, 1, 1, 7, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_vfmsub213sd, 0x8a | 1 | 0x20, 3, SPACE_0F38, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 3, 1, 2, 1, 0, 0, 4, 1, 0, 1, 1, 3, 0, 0, 0, 0, 0,
       0, 0 },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 41, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 } },
     { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
-	  1, 1, 1, 0, 1, 0 } },
+	  1, 0, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 1, 1, 0, 0, 0 } },
+	  1, 0, 0, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 1, 1, 0, 0, 0 } } } },
-  { MN_vfmsubadd213ph, 0x87 | 0x20, 3, SPACE_EVEXMAP6, None,
-    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 1, 1, 1, 0, 0, 5, 1, 2, 1, 1, 7, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_vfmsub213sh, 0x8a | 1 | 0x20, 3, SPACE_EVEXMAP6, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 1, 1, 1, 0, 0, 4, 1, 0, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0 },
     { { 86, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 1, 0, 0, 0, 0,
-	  1, 1, 1, 0, 1, 0 } },
+	  1, 0, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 1, 1, 0, 0, 0 } },
+	  1, 0, 0, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 1, 1, 0, 0, 0 } } } },
-  { MN_vfmsubadd231ps, 0x87 | 0x30, 3, SPACE_0F38, None,
-    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 1, 1, 1, 1, 0, 0, 5, 1, 3, 1, 1, 7, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_vfmsub231ss, 0x8a | 1 | 0x30, 3, SPACE_0F38, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 3, 1, 1, 1, 0, 0, 4, 1, 0, 1, 1, 2, 0, 0, 0, 0, 0,
       0, 0 },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 41, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 } },
     { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
-	  1, 1, 1, 0, 1, 0 } },
+	  1, 0, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 1, 1, 0, 0, 0 } },
+	  1, 0, 0, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 1, 1, 0, 0, 0 } } } },
-  { MN_vfmsubadd231pd, 0x87 | 0x30, 3, SPACE_0F38, None,
-    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 1, 1, 2, 1, 0, 0, 5, 1, 4, 1, 1, 7, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_vfmsub231sd, 0x8a | 1 | 0x30, 3, SPACE_0F38, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 3, 1, 2, 1, 0, 0, 4, 1, 0, 1, 1, 3, 0, 0, 0, 0, 0,
       0, 0 },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 41, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 } },
     { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
-	  1, 1, 1, 0, 1, 0 } },
+	  1, 0, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 1, 1, 0, 0, 0 } },
+	  1, 0, 0, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 1, 1, 0, 0, 0 } } } },
-  { MN_vfmsubadd231ph, 0x87 | 0x30, 3, SPACE_EVEXMAP6, None,
-    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 1, 1, 1, 0, 0, 5, 1, 2, 1, 1, 7, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_vfmsub231sh, 0x8a | 1 | 0x30, 3, SPACE_EVEXMAP6, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 1, 1, 1, 0, 0, 4, 1, 0, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0 },
     { { 86, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 1, 0, 0, 0, 0,
-	  1, 1, 1, 0, 1, 0 } },
+	  1, 0, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 1, 1, 0, 0, 0 } },
+	  1, 0, 0, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 1, 1, 0, 0, 0 } } } },
-  { MN_vfnmadd132ps, 0x8c | 0x10, 3, SPACE_0F38, None,
-    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 1, 1, 1, 1, 0, 0, 5, 1, 3, 1, 1, 7, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_vfnmadd132ss, 0x8c | 1 | 0x10, 3, SPACE_0F38, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 3, 1, 1, 1, 0, 0, 4, 1, 0, 1, 1, 2, 0, 0, 0, 0, 0,
       0, 0 },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 41, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 } },
     { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
-	  1, 1, 1, 0, 1, 0 } },
+	  1, 0, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 1, 1, 0, 0, 0 } },
+	  1, 0, 0, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 1, 1, 0, 0, 0 } } } },
-  { MN_vfnmadd132pd, 0x8c | 0x10, 3, SPACE_0F38, None,
-    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 1, 1, 2, 1, 0, 0, 5, 1, 4, 1, 1, 7, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_vfnmadd132sd, 0x8c | 1 | 0x10, 3, SPACE_0F38, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 3, 1, 2, 1, 0, 0, 4, 1, 0, 1, 1, 3, 0, 0, 0, 0, 0,
       0, 0 },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 41, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 } },
     { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
-	  1, 1, 1, 0, 1, 0 } },
+	  1, 0, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 1, 1, 0, 0, 0 } },
+	  1, 0, 0, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 1, 1, 0, 0, 0 } } } },
-  { MN_vfnmadd132ph, 0x8c | 0x10, 3, SPACE_EVEXMAP6, None,
-    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 1, 1, 1, 0, 0, 5, 1, 2, 1, 1, 7, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_vfnmadd132sh, 0x8c | 1 | 0x10, 3, SPACE_EVEXMAP6, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 1, 1, 1, 0, 0, 4, 1, 0, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0 },
     { { 86, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 1, 0, 0, 0, 0,
-	  1, 1, 1, 0, 1, 0 } },
+	  1, 0, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 1, 1, 0, 0, 0 } },
+	  1, 0, 0, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 1, 1, 0, 0, 0 } } } },
-  { MN_vfnmadd213ps, 0x8c | 0x20, 3, SPACE_0F38, None,
-    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 1, 1, 1, 1, 0, 0, 5, 1, 3, 1, 1, 7, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_vfnmadd213ss, 0x8c | 1 | 0x20, 3, SPACE_0F38, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 3, 1, 1, 1, 0, 0, 4, 1, 0, 1, 1, 2, 0, 0, 0, 0, 0,
       0, 0 },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 41, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 } },
     { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
-	  1, 1, 1, 0, 1, 0 } },
+	  1, 0, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 1, 1, 0, 0, 0 } },
+	  1, 0, 0, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 1, 1, 0, 0, 0 } } } },
-  { MN_vfnmadd213pd, 0x8c | 0x20, 3, SPACE_0F38, None,
-    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 1, 1, 2, 1, 0, 0, 5, 1, 4, 1, 1, 7, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_vfnmadd213sd, 0x8c | 1 | 0x20, 3, SPACE_0F38, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 3, 1, 2, 1, 0, 0, 4, 1, 0, 1, 1, 3, 0, 0, 0, 0, 0,
       0, 0 },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 41, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 } },
     { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
-	  1, 1, 1, 0, 1, 0 } },
+	  1, 0, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 1, 1, 0, 0, 0 } },
+	  1, 0, 0, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 1, 1, 0, 0, 0 } } } },
-  { MN_vfnmadd213ph, 0x8c | 0x20, 3, SPACE_EVEXMAP6, None,
-    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 1, 1, 1, 0, 0, 5, 1, 2, 1, 1, 7, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_vfnmadd213sh, 0x8c | 1 | 0x20, 3, SPACE_EVEXMAP6, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 1, 1, 1, 0, 0, 4, 1, 0, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0 },
     { { 86, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 1, 0, 0, 0, 0,
-	  1, 1, 1, 0, 1, 0 } },
+	  1, 0, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 1, 1, 0, 0, 0 } },
+	  1, 0, 0, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 1, 1, 0, 0, 0 } } } },
-  { MN_vfnmadd231ps, 0x8c | 0x30, 3, SPACE_0F38, None,
-    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 1, 1, 1, 1, 0, 0, 5, 1, 3, 1, 1, 7, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_vfnmadd231ss, 0x8c | 1 | 0x30, 3, SPACE_0F38, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 3, 1, 1, 1, 0, 0, 4, 1, 0, 1, 1, 2, 0, 0, 0, 0, 0,
       0, 0 },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 41, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 } },
     { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
-	  1, 1, 1, 0, 1, 0 } },
+	  1, 0, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 1, 1, 0, 0, 0 } },
+	  1, 0, 0, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 1, 1, 0, 0, 0 } } } },
-  { MN_vfnmadd231pd, 0x8c | 0x30, 3, SPACE_0F38, None,
-    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 1, 1, 2, 1, 0, 0, 5, 1, 4, 1, 1, 7, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_vfnmadd231sd, 0x8c | 1 | 0x30, 3, SPACE_0F38, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 3, 1, 2, 1, 0, 0, 4, 1, 0, 1, 1, 3, 0, 0, 0, 0, 0,
       0, 0 },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 41, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 } },
     { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
-	  1, 1, 1, 0, 1, 0 } },
+	  1, 0, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 1, 1, 0, 0, 0 } },
+	  1, 0, 0, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 1, 1, 0, 0, 0 } } } },
-  { MN_vfnmadd231ph, 0x8c | 0x30, 3, SPACE_EVEXMAP6, None,
-    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 1, 1, 1, 0, 0, 5, 1, 2, 1, 1, 7, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_vfnmadd231sh, 0x8c | 1 | 0x30, 3, SPACE_EVEXMAP6, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 1, 1, 1, 0, 0, 4, 1, 0, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0 },
     { { 86, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 1, 0, 0, 0, 0,
-	  1, 1, 1, 0, 1, 0 } },
+	  1, 0, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 1, 1, 0, 0, 0 } },
+	  1, 0, 0, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 1, 1, 0, 0, 0 } } } },
-  { MN_vfnmadd132ss, 0x8d | 0x10, 3, SPACE_0F38, None,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_vfnmsub132ss, 0x8e | 1 | 0x10, 3, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 3, 1, 1, 1, 0, 0, 4, 1, 0, 1, 1, 2, 0, 0, 0, 0, 0,
       0, 0 },
@@ -32894,7 +32484,7 @@ static const insn_template i386_optab[] =
 	  1, 0, 0, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_vfnmadd132sd, 0x8d | 0x10, 3, SPACE_0F38, None,
+  { MN_vfnmsub132sd, 0x8e | 1 | 0x10, 3, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 3, 1, 2, 1, 0, 0, 4, 1, 0, 1, 1, 3, 0, 0, 0, 0, 0,
       0, 0 },
@@ -32906,7 +32496,7 @@ static const insn_template i386_optab[] =
 	  1, 0, 0, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_vfnmadd132sh, 0x8d | 0x10, 3, SPACE_EVEXMAP6, None,
+  { MN_vfnmsub132sh, 0x8e | 1 | 0x10, 3, SPACE_EVEXMAP6, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 1, 1, 1, 0, 0, 4, 1, 0, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0 },
@@ -32918,7 +32508,7 @@ static const insn_template i386_optab[] =
 	  1, 0, 0, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_vfnmadd213ss, 0x8d | 0x20, 3, SPACE_0F38, None,
+  { MN_vfnmsub213ss, 0x8e | 1 | 0x20, 3, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 3, 1, 1, 1, 0, 0, 4, 1, 0, 1, 1, 2, 0, 0, 0, 0, 0,
       0, 0 },
@@ -32930,7 +32520,7 @@ static const insn_template i386_optab[] =
 	  1, 0, 0, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_vfnmadd213sd, 0x8d | 0x20, 3, SPACE_0F38, None,
+  { MN_vfnmsub213sd, 0x8e | 1 | 0x20, 3, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 3, 1, 2, 1, 0, 0, 4, 1, 0, 1, 1, 3, 0, 0, 0, 0, 0,
       0, 0 },
@@ -32942,7 +32532,7 @@ static const insn_template i386_optab[] =
 	  1, 0, 0, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_vfnmadd213sh, 0x8d | 0x20, 3, SPACE_EVEXMAP6, None,
+  { MN_vfnmsub213sh, 0x8e | 1 | 0x20, 3, SPACE_EVEXMAP6, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 1, 1, 1, 0, 0, 4, 1, 0, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0 },
@@ -32954,7 +32544,7 @@ static const insn_template i386_optab[] =
 	  1, 0, 0, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_vfnmadd231ss, 0x8d | 0x30, 3, SPACE_0F38, None,
+  { MN_vfnmsub231ss, 0x8e | 1 | 0x30, 3, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 3, 1, 1, 1, 0, 0, 4, 1, 0, 1, 1, 2, 0, 0, 0, 0, 0,
       0, 0 },
@@ -32966,7 +32556,7 @@ static const insn_template i386_optab[] =
 	  1, 0, 0, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_vfnmadd231sd, 0x8d | 0x30, 3, SPACE_0F38, None,
+  { MN_vfnmsub231sd, 0x8e | 1 | 0x30, 3, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 3, 1, 2, 1, 0, 0, 4, 1, 0, 1, 1, 3, 0, 0, 0, 0, 0,
       0, 0 },
@@ -32978,7 +32568,7 @@ static const insn_template i386_optab[] =
 	  1, 0, 0, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_vfnmadd231sh, 0x8d | 0x30, 3, SPACE_EVEXMAP6, None,
+  { MN_vfnmsub231sh, 0x8e | 1 | 0x30, 3, SPACE_EVEXMAP6, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 1, 1, 1, 0, 0, 4, 1, 0, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0 },
@@ -32990,7 +32580,7 @@ static const insn_template i386_optab[] =
 	  1, 0, 0, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_vfnmsub132ps, 0x8e | 0x10, 3, SPACE_0F38, None,
+  { MN_vfmaddsub132ps, 0x86 | 0x10, 3, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 1, 1, 1, 1, 0, 0, 5, 1, 3, 1, 1, 7, 0, 0, 0, 0, 0,
       0, 0 },
@@ -33002,7 +32592,7 @@ static const insn_template i386_optab[] =
 	  1, 1, 1, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 1, 1, 0, 0, 0 } } } },
-  { MN_vfnmsub132pd, 0x8e | 0x10, 3, SPACE_0F38, None,
+  { MN_vfmaddsub132pd, 0x86 | 0x10, 3, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 1, 1, 2, 1, 0, 0, 5, 1, 4, 1, 1, 7, 0, 0, 0, 0, 0,
       0, 0 },
@@ -33014,7 +32604,7 @@ static const insn_template i386_optab[] =
 	  1, 1, 1, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 1, 1, 0, 0, 0 } } } },
-  { MN_vfnmsub132ph, 0x8e | 0x10, 3, SPACE_EVEXMAP6, None,
+  { MN_vfmaddsub132ph, 0x86 | 0x10, 3, SPACE_EVEXMAP6, None,
     { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 1, 1, 1, 0, 0, 5, 1, 2, 1, 1, 7, 0, 0, 0, 0, 0,
       0, 0 },
@@ -33026,7 +32616,7 @@ static const insn_template i386_optab[] =
 	  1, 1, 1, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 1, 1, 0, 0, 0 } } } },
-  { MN_vfnmsub213ps, 0x8e | 0x20, 3, SPACE_0F38, None,
+  { MN_vfmaddsub213ps, 0x86 | 0x20, 3, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 1, 1, 1, 1, 0, 0, 5, 1, 3, 1, 1, 7, 0, 0, 0, 0, 0,
       0, 0 },
@@ -33038,7 +32628,7 @@ static const insn_template i386_optab[] =
 	  1, 1, 1, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 1, 1, 0, 0, 0 } } } },
-  { MN_vfnmsub213pd, 0x8e | 0x20, 3, SPACE_0F38, None,
+  { MN_vfmaddsub213pd, 0x86 | 0x20, 3, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 1, 1, 2, 1, 0, 0, 5, 1, 4, 1, 1, 7, 0, 0, 0, 0, 0,
       0, 0 },
@@ -33050,7 +32640,7 @@ static const insn_template i386_optab[] =
 	  1, 1, 1, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 1, 1, 0, 0, 0 } } } },
-  { MN_vfnmsub213ph, 0x8e | 0x20, 3, SPACE_EVEXMAP6, None,
+  { MN_vfmaddsub213ph, 0x86 | 0x20, 3, SPACE_EVEXMAP6, None,
     { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 1, 1, 1, 0, 0, 5, 1, 2, 1, 1, 7, 0, 0, 0, 0, 0,
       0, 0 },
@@ -33062,7 +32652,7 @@ static const insn_template i386_optab[] =
 	  1, 1, 1, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 1, 1, 0, 0, 0 } } } },
-  { MN_vfnmsub231ps, 0x8e | 0x30, 3, SPACE_0F38, None,
+  { MN_vfmaddsub231ps, 0x86 | 0x30, 3, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 1, 1, 1, 1, 0, 0, 5, 1, 3, 1, 1, 7, 0, 0, 0, 0, 0,
       0, 0 },
@@ -33074,7 +32664,7 @@ static const insn_template i386_optab[] =
 	  1, 1, 1, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 1, 1, 0, 0, 0 } } } },
-  { MN_vfnmsub231pd, 0x8e | 0x30, 3, SPACE_0F38, None,
+  { MN_vfmaddsub231pd, 0x86 | 0x30, 3, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 1, 1, 2, 1, 0, 0, 5, 1, 4, 1, 1, 7, 0, 0, 0, 0, 0,
       0, 0 },
@@ -33086,7 +32676,7 @@ static const insn_template i386_optab[] =
 	  1, 1, 1, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 1, 1, 0, 0, 0 } } } },
-  { MN_vfnmsub231ph, 0x8e | 0x30, 3, SPACE_EVEXMAP6, None,
+  { MN_vfmaddsub231ph, 0x86 | 0x30, 3, SPACE_EVEXMAP6, None,
     { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 1, 1, 1, 0, 0, 5, 1, 2, 1, 1, 7, 0, 0, 0, 0, 0,
       0, 0 },
@@ -33098,114 +32688,114 @@ static const insn_template i386_optab[] =
 	  1, 1, 1, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 1, 1, 0, 0, 0 } } } },
-  { MN_vfnmsub132ss, 0x8f | 0x10, 3, SPACE_0F38, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 3, 1, 1, 1, 0, 0, 4, 1, 0, 1, 1, 2, 0, 0, 0, 0, 0,
+  { MN_vfmsubadd132ps, 0x87 | 0x10, 3, SPACE_0F38, None,
+    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 1, 1, 1, 1, 0, 0, 5, 1, 3, 1, 1, 7, 0, 0, 0, 0, 0,
       0, 0 },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 41, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 } },
     { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
-	  1, 0, 0, 0, 1, 0 } },
+	  1, 1, 1, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } },
+	  1, 1, 1, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_vfnmsub132sd, 0x8f | 0x10, 3, SPACE_0F38, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 3, 1, 2, 1, 0, 0, 4, 1, 0, 1, 1, 3, 0, 0, 0, 0, 0,
+	  1, 1, 1, 0, 0, 0 } } } },
+  { MN_vfmsubadd132pd, 0x87 | 0x10, 3, SPACE_0F38, None,
+    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 1, 1, 2, 1, 0, 0, 5, 1, 4, 1, 1, 7, 0, 0, 0, 0, 0,
       0, 0 },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 41, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 } },
     { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
-	  1, 0, 0, 0, 1, 0 } },
+	  1, 1, 1, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } },
+	  1, 1, 1, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_vfnmsub132sh, 0x8f | 0x10, 3, SPACE_EVEXMAP6, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 1, 1, 1, 0, 0, 4, 1, 0, 1, 1, 1, 0, 0, 0, 0, 0,
+	  1, 1, 1, 0, 0, 0 } } } },
+  { MN_vfmsubadd132ph, 0x87 | 0x10, 3, SPACE_EVEXMAP6, None,
+    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 1, 1, 1, 0, 0, 5, 1, 2, 1, 1, 7, 0, 0, 0, 0, 0,
       0, 0 },
     { { 86, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 1, 0, 0, 0, 0,
-	  1, 0, 0, 0, 1, 0 } },
+	  1, 1, 1, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } },
+	  1, 1, 1, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_vfnmsub213ss, 0x8f | 0x20, 3, SPACE_0F38, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 3, 1, 1, 1, 0, 0, 4, 1, 0, 1, 1, 2, 0, 0, 0, 0, 0,
+	  1, 1, 1, 0, 0, 0 } } } },
+  { MN_vfmsubadd213ps, 0x87 | 0x20, 3, SPACE_0F38, None,
+    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 1, 1, 1, 1, 0, 0, 5, 1, 3, 1, 1, 7, 0, 0, 0, 0, 0,
       0, 0 },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 41, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 } },
     { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
-	  1, 0, 0, 0, 1, 0 } },
+	  1, 1, 1, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } },
+	  1, 1, 1, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_vfnmsub213sd, 0x8f | 0x20, 3, SPACE_0F38, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 3, 1, 2, 1, 0, 0, 4, 1, 0, 1, 1, 3, 0, 0, 0, 0, 0,
+	  1, 1, 1, 0, 0, 0 } } } },
+  { MN_vfmsubadd213pd, 0x87 | 0x20, 3, SPACE_0F38, None,
+    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 1, 1, 2, 1, 0, 0, 5, 1, 4, 1, 1, 7, 0, 0, 0, 0, 0,
       0, 0 },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 41, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 } },
     { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
-	  1, 0, 0, 0, 1, 0 } },
+	  1, 1, 1, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } },
+	  1, 1, 1, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_vfnmsub213sh, 0x8f | 0x20, 3, SPACE_EVEXMAP6, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 1, 1, 1, 0, 0, 4, 1, 0, 1, 1, 1, 0, 0, 0, 0, 0,
+	  1, 1, 1, 0, 0, 0 } } } },
+  { MN_vfmsubadd213ph, 0x87 | 0x20, 3, SPACE_EVEXMAP6, None,
+    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 1, 1, 1, 0, 0, 5, 1, 2, 1, 1, 7, 0, 0, 0, 0, 0,
       0, 0 },
     { { 86, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 1, 0, 0, 0, 0,
-	  1, 0, 0, 0, 1, 0 } },
+	  1, 1, 1, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } },
+	  1, 1, 1, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_vfnmsub231ss, 0x8f | 0x30, 3, SPACE_0F38, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 3, 1, 1, 1, 0, 0, 4, 1, 0, 1, 1, 2, 0, 0, 0, 0, 0,
+	  1, 1, 1, 0, 0, 0 } } } },
+  { MN_vfmsubadd231ps, 0x87 | 0x30, 3, SPACE_0F38, None,
+    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 1, 1, 1, 1, 0, 0, 5, 1, 3, 1, 1, 7, 0, 0, 0, 0, 0,
       0, 0 },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 41, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 } },
     { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
-	  1, 0, 0, 0, 1, 0 } },
+	  1, 1, 1, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } },
+	  1, 1, 1, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_vfnmsub231sd, 0x8f | 0x30, 3, SPACE_0F38, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 3, 1, 2, 1, 0, 0, 4, 1, 0, 1, 1, 3, 0, 0, 0, 0, 0,
+	  1, 1, 1, 0, 0, 0 } } } },
+  { MN_vfmsubadd231pd, 0x87 | 0x30, 3, SPACE_0F38, None,
+    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 1, 1, 2, 1, 0, 0, 5, 1, 4, 1, 1, 7, 0, 0, 0, 0, 0,
       0, 0 },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 41, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 } },
     { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
-	  1, 0, 0, 0, 1, 0 } },
+	  1, 1, 1, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } },
+	  1, 1, 1, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_vfnmsub231sh, 0x8f | 0x30, 3, SPACE_EVEXMAP6, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 1, 1, 1, 0, 0, 4, 1, 0, 1, 1, 1, 0, 0, 0, 0, 0,
+	  1, 1, 1, 0, 0, 0 } } } },
+  { MN_vfmsubadd231ph, 0x87 | 0x30, 3, SPACE_EVEXMAP6, None,
+    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 1, 1, 1, 0, 0, 5, 1, 2, 1, 1, 7, 0, 0, 0, 0, 0,
       0, 0 },
     { { 86, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 1, 0, 0, 0, 0,
-	  1, 0, 0, 0, 1, 0 } },
+	  1, 1, 1, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } },
+	  1, 1, 1, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } } } },
+	  1, 1, 1, 0, 0, 0 } } } },
   { MN_xacquire, 0xf2, 0, SPACE_BASE, None,
     { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
@@ -33378,35 +32968,7 @@ static const insn_template i386_optab[] =
 	  1, 1, 0, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 1, 0, 0, 0, 0 } } } },
-  { MN_vfmaddss, 0x6a | 0, 4, SPACE_0F3A, None,
-    { 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 3, 1, 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
-      0, 0 },
-    { { 42, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
-	  1, 0, 0, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_vfmaddsd, 0x6a | 1, 4, SPACE_0F3A, None,
-    { 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 3, 1, 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
-      0, 0 },
-    { { 42, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
-	  1, 0, 0, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_vfmaddsubps, 0x5c | 0, 4, SPACE_0F3A, None,
+  { MN_vfmsubps, 0x6c | 0, 4, SPACE_0F3A, None,
     { 1, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 1, 1, 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
       0, 0 },
@@ -33420,7 +32982,7 @@ static const insn_template i386_optab[] =
 	  1, 1, 0, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 1, 0, 0, 0, 0 } } } },
-  { MN_vfmaddsubpd, 0x5c | 1, 4, SPACE_0F3A, None,
+  { MN_vfmsubpd, 0x6c | 1, 4, SPACE_0F3A, None,
     { 1, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 1, 1, 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
       0, 0 },
@@ -33434,7 +32996,7 @@ static const insn_template i386_optab[] =
 	  1, 1, 0, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 1, 0, 0, 0, 0 } } } },
-  { MN_vfmsubaddps, 0x5e | 0, 4, SPACE_0F3A, None,
+  { MN_vfnmaddps, 0x78 | 0, 4, SPACE_0F3A, None,
     { 1, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 1, 1, 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
       0, 0 },
@@ -33448,7 +33010,7 @@ static const insn_template i386_optab[] =
 	  1, 1, 0, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 1, 0, 0, 0, 0 } } } },
-  { MN_vfmsubaddpd, 0x5e | 1, 4, SPACE_0F3A, None,
+  { MN_vfnmaddpd, 0x78 | 1, 4, SPACE_0F3A, None,
     { 1, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 1, 1, 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
       0, 0 },
@@ -33462,7 +33024,7 @@ static const insn_template i386_optab[] =
 	  1, 1, 0, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 1, 0, 0, 0, 0 } } } },
-  { MN_vfmsubps, 0x6c | 0, 4, SPACE_0F3A, None,
+  { MN_vfnmsubps, 0x7c | 0, 4, SPACE_0F3A, None,
     { 1, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 1, 1, 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
       0, 0 },
@@ -33476,7 +33038,7 @@ static const insn_template i386_optab[] =
 	  1, 1, 0, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 1, 0, 0, 0, 0 } } } },
-  { MN_vfmsubpd, 0x6c | 1, 4, SPACE_0F3A, None,
+  { MN_vfnmsubpd, 0x7c | 1, 4, SPACE_0F3A, None,
     { 1, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 1, 1, 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
       0, 0 },
@@ -33490,7 +33052,7 @@ static const insn_template i386_optab[] =
 	  1, 1, 0, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 1, 0, 0, 0, 0 } } } },
-  { MN_vfmsubss, 0x6e | 0, 4, SPACE_0F3A, None,
+  { MN_vfmaddss, 0x68 | 2 | 0, 4, SPACE_0F3A, None,
     { 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 3, 1, 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
       0, 0 },
@@ -33504,7 +33066,7 @@ static const insn_template i386_optab[] =
 	  1, 0, 0, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_vfmsubsd, 0x6e | 1, 4, SPACE_0F3A, None,
+  { MN_vfmaddsd, 0x68 | 2 | 1, 4, SPACE_0F3A, None,
     { 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 3, 1, 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
       0, 0 },
@@ -33518,35 +33080,35 @@ static const insn_template i386_optab[] =
 	  1, 0, 0, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_vfnmaddps, 0x78 | 0, 4, SPACE_0F3A, None,
-    { 1, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 1, 1, 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
+  { MN_vfmsubss, 0x6c | 2 | 0, 4, SPACE_0F3A, None,
+    { 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 3, 1, 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
       0, 0 },
     { { 42, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
-	  1, 1, 0, 0, 1, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
+	  1, 0, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 1, 0, 0, 0, 0 } },
+	  1, 0, 0, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 1, 0, 0, 0, 0 } },
+	  1, 0, 0, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 1, 0, 0, 0, 0 } } } },
-  { MN_vfnmaddpd, 0x78 | 1, 4, SPACE_0F3A, None,
-    { 1, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 1, 1, 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_vfmsubsd, 0x6c | 2 | 1, 4, SPACE_0F3A, None,
+    { 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 3, 1, 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
       0, 0 },
     { { 42, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
-	  1, 1, 0, 0, 1, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
+	  1, 0, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 1, 0, 0, 0, 0 } },
+	  1, 0, 0, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 1, 0, 0, 0, 0 } },
+	  1, 0, 0, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 1, 0, 0, 0, 0 } } } },
-  { MN_vfnmaddss, 0x7a | 0, 4, SPACE_0F3A, None,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_vfnmaddss, 0x78 | 2 | 0, 4, SPACE_0F3A, None,
     { 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 3, 1, 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
       0, 0 },
@@ -33560,7 +33122,7 @@ static const insn_template i386_optab[] =
 	  1, 0, 0, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_vfnmaddsd, 0x7a | 1, 4, SPACE_0F3A, None,
+  { MN_vfnmaddsd, 0x78 | 2 | 1, 4, SPACE_0F3A, None,
     { 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 3, 1, 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
       0, 0 },
@@ -33574,7 +33136,35 @@ static const insn_template i386_optab[] =
 	  1, 0, 0, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_vfnmsubps, 0x7c | 0, 4, SPACE_0F3A, None,
+  { MN_vfnmsubss, 0x7c | 2 | 0, 4, SPACE_0F3A, None,
+    { 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 3, 1, 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
+      0, 0 },
+    { { 42, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
+	  1, 0, 0, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_vfnmsubsd, 0x7c | 2 | 1, 4, SPACE_0F3A, None,
+    { 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 3, 1, 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
+      0, 0 },
+    { { 42, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
+	  1, 0, 0, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_vfmaddsubps, 0x5c | 0, 4, SPACE_0F3A, None,
     { 1, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 1, 1, 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
       0, 0 },
@@ -33588,7 +33178,7 @@ static const insn_template i386_optab[] =
 	  1, 1, 0, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 1, 0, 0, 0, 0 } } } },
-  { MN_vfnmsubpd, 0x7c | 1, 4, SPACE_0F3A, None,
+  { MN_vfmaddsubpd, 0x5c | 1, 4, SPACE_0F3A, None,
     { 1, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 1, 1, 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
       0, 0 },
@@ -33602,34 +33192,34 @@ static const insn_template i386_optab[] =
 	  1, 1, 0, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 1, 0, 0, 0, 0 } } } },
-  { MN_vfnmsubss, 0x7e | 0, 4, SPACE_0F3A, None,
-    { 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 3, 1, 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
+  { MN_vfmsubaddps, 0x5e | 0, 4, SPACE_0F3A, None,
+    { 1, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 1, 1, 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
       0, 0 },
     { { 42, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
-	  1, 0, 0, 0, 1, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
+	  1, 1, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } },
+	  1, 1, 0, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } },
+	  1, 1, 0, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_vfnmsubsd, 0x7e | 1, 4, SPACE_0F3A, None,
-    { 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 3, 1, 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
+	  1, 1, 0, 0, 0, 0 } } } },
+  { MN_vfmsubaddpd, 0x5e | 1, 4, SPACE_0F3A, None,
+    { 1, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 1, 1, 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
       0, 0 },
     { { 42, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
-	  1, 0, 0, 0, 1, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
+	  1, 1, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } },
+	  1, 1, 0, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } },
+	  1, 1, 0, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } } } },
+	  1, 1, 0, 0, 0, 0 } } } },
   { MN_vfrczps, 0x80 | 0, 2, SPACE_XOP09, None,
     { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
@@ -35718,7 +35308,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
-    { { 126, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 127, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
@@ -36678,7 +36268,7 @@ static const insn_template i386_optab[] =
 	  1, 1, 1, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 1, 1, 0, 0, 0 } } } },
-  { MN_vdivph, 0x5e, 3, SPACE_EVEXMAP5, None,
+  { MN_vsubph, 0x5c, 3, SPACE_EVEXMAP5, None,
     { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 1, 1, 0, 0, 0, 5, 1, 2, 1, 1, 7, 0, 0, 0, 0, 0,
       0, 0 },
@@ -36702,19 +36292,33 @@ static const insn_template i386_optab[] =
 	  1, 1, 1, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 1, 1, 0, 0, 0 } } } },
-  { MN_vsqrtph, 0x51, 2, SPACE_EVEXMAP5, None,
+  { MN_vdivph, 0x5e, 3, SPACE_EVEXMAP5, None,
     { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 1, 0, 0, 0, 5, 1, 2, 1, 1, 7, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 1, 1, 0, 0, 0, 5, 1, 2, 1, 1, 7, 0, 0, 0, 0, 0,
       0, 0 },
     { { 86, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 1, 0, 0, 0, 0,
 	  1, 1, 1, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 1, 0, 0, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 1, 1, 0, 0, 0 } } } },
-  { MN_vsubph, 0x5c, 3, SPACE_EVEXMAP5, None,
+  { MN_vminph, 0x5d, 3, SPACE_EVEXMAP5, None,
     { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 1, 1, 0, 0, 0, 5, 1, 2, 1, 1, 7, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 1, 1, 0, 0, 0, 5, 1, 2, 0, 1, 7, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 86, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 1, 0, 0, 0, 0,
+	  1, 1, 1, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 1, 0, 0, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 1, 0, 0, 0 } } } },
+  { MN_vmaxph, 0x5f, 3, SPACE_EVEXMAP5, None,
+    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 1, 1, 0, 0, 0, 5, 1, 2, 0, 1, 7, 0, 0, 0, 0, 0,
       0, 0 },
     { { 86, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
@@ -36736,7 +36340,7 @@ static const insn_template i386_optab[] =
 	  1, 0, 0, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_vdivsh, 0x5e, 3, SPACE_EVEXMAP5, None,
+  { MN_vsubsh, 0x5c, 3, SPACE_EVEXMAP5, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 1, 1, 2, 0, 0, 4, 1, 0, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0 },
@@ -36760,7 +36364,7 @@ static const insn_template i386_optab[] =
 	  1, 0, 0, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_vsqrtsh, 0x51, 3, SPACE_EVEXMAP5, None,
+  { MN_vdivsh, 0x5e, 3, SPACE_EVEXMAP5, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 1, 1, 2, 0, 0, 4, 1, 0, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0 },
@@ -36772,7 +36376,41 @@ static const insn_template i386_optab[] =
 	  1, 0, 0, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_vsubsh, 0x5c, 3, SPACE_EVEXMAP5, None,
+  { MN_vminsh, 0x5d, 3, SPACE_EVEXMAP5, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 1, 1, 2, 0, 0, 4, 1, 0, 0, 1, 1, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 86, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 1, 0, 0, 0, 0,
+	  1, 0, 0, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_vmaxsh, 0x5f, 3, SPACE_EVEXMAP5, None,
+    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 1, 1, 2, 0, 0, 4, 1, 0, 0, 1, 1, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 86, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 1, 0, 0, 0, 0,
+	  1, 0, 0, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 0, 0, 0, 0, 0 } } } },
+  { MN_vsqrtph, 0x51, 2, SPACE_EVEXMAP5, None,
+    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 1, 0, 0, 0, 5, 1, 2, 1, 1, 7, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 86, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 1, 0, 0, 0, 0,
+	  1, 1, 1, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 1, 0, 0, 0 } } } },
+  { MN_vsqrtsh, 0x51, 3, SPACE_EVEXMAP5, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 1, 1, 2, 0, 0, 4, 1, 0, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0 },
@@ -37464,7 +37102,7 @@ static const insn_template i386_optab[] =
 	  0, 1, 0, 0, 0, 0 } } } },
   { MN_vcvtpd2udq, 0x79, 2, SPACE_0F, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 2, 0, 0, 0, 5, 1, 4, 0, 0, 7, 0, 1, 0, 0, 0,
+      0, 0, 0, 0, 0, 2, 0, 0, 0, 5, 1, 4, 1, 1, 7, 0, 1, 0, 0, 0,
       0, 0 },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
@@ -37474,7 +37112,7 @@ static const insn_template i386_optab[] =
 	  1, 0, 0, 0, 0, 0 } } } },
   { MN_vcvtpd2udq, 0x79, 2, SPACE_0F, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 2, 0, 0, 0, 5, 1, 4, 0, 0, 7, 0, 2, 0, 0, 0,
+      0, 0, 0, 0, 0, 2, 0, 0, 0, 5, 1, 4, 1, 1, 7, 0, 2, 0, 0, 0,
       0, 0 },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
@@ -37494,7 +37132,7 @@ static const insn_template i386_optab[] =
 	  1, 0, 0, 0, 0, 0 } } } },
   { MN_vcvtpd2udqy, 0x79, 2, SPACE_0F, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 2, 0, 0, 0, 3, 1, 4, 0, 0, 5, 0, 2, 0, 0, 0,
+      0, 0, 0, 0, 0, 2, 0, 0, 0, 3, 1, 4, 1, 1, 5, 0, 2, 0, 0, 0,
       0, 0 },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
@@ -37616,7 +37254,7 @@ static const insn_template i386_optab[] =
 	  0, 1, 0, 0, 0, 0 } } } },
   { MN_vcvttpd2udq, 0x78, 2, SPACE_0F, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 2, 0, 0, 0, 5, 1, 4, 0, 0, 7, 0, 1, 0, 0, 0,
+      0, 0, 0, 0, 0, 2, 0, 0, 0, 5, 1, 4, 0, 1, 7, 0, 1, 0, 0, 0,
       0, 0 },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
@@ -37626,7 +37264,7 @@ static const insn_template i386_optab[] =
 	  1, 0, 0, 0, 0, 0 } } } },
   { MN_vcvttpd2udq, 0x78, 2, SPACE_0F, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 2, 0, 0, 0, 5, 1, 4, 0, 0, 7, 0, 2, 0, 0, 0,
+      0, 0, 0, 0, 0, 2, 0, 0, 0, 5, 1, 4, 0, 1, 7, 0, 2, 0, 0, 0,
       0, 0 },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
@@ -37646,7 +37284,7 @@ static const insn_template i386_optab[] =
 	  1, 0, 0, 0, 0, 0 } } } },
   { MN_vcvttpd2udqy, 0x78, 2, SPACE_0F, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 2, 0, 0, 0, 3, 1, 4, 0, 0, 5, 0, 2, 0, 0, 0,
+      0, 0, 0, 0, 0, 2, 0, 0, 0, 3, 1, 4, 0, 1, 5, 0, 2, 0, 0, 0,
       0, 0 },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
@@ -37746,7 +37384,7 @@ static const insn_template i386_optab[] =
 	  1, 1, 1, 0, 0, 0 } } } },
   { MN_vextractf32x4, 0x19, 3, SPACE_0F3A, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 1, 1, 0, 0, 5, 1, 0, 0, 0, 4, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 1, 1, 0, 0, 5, 1, 0, 0, 0, 4, 1, 0, 0, 0, 0,
       0, 0 },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
@@ -37758,7 +37396,7 @@ static const insn_template i386_optab[] =
 	  1, 0, 0, 0, 1, 0 } } } },
   { MN_vextracti32x4, 0x39, 3, SPACE_0F3A, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 1, 1, 0, 0, 5, 1, 0, 0, 0, 4, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 1, 1, 0, 0, 5, 1, 0, 0, 0, 4, 1, 0, 0, 0, 0,
       0, 0 },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
@@ -37770,7 +37408,7 @@ static const insn_template i386_optab[] =
 	  1, 0, 0, 0, 1, 0 } } } },
   { MN_vextractf64x4, 0x1b, 3, SPACE_0F3A, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 2, 1, 0, 0, 1, 1, 0, 0, 0, 5, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 2, 1, 0, 0, 1, 1, 0, 0, 0, 5, 1, 0, 0, 0, 0,
       0, 0 },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
@@ -37782,7 +37420,7 @@ static const insn_template i386_optab[] =
 	  0, 1, 0, 0, 1, 0 } } } },
   { MN_vextracti64x4, 0x3b, 3, SPACE_0F3A, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 2, 1, 0, 0, 1, 1, 0, 0, 0, 5, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 2, 1, 0, 0, 1, 1, 0, 0, 0, 5, 1, 0, 0, 0, 0,
       0, 0 },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
@@ -38198,54 +37836,6 @@ static const insn_template i386_optab[] =
 	  0, 0, 1, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  0, 0, 1, 0, 0, 0 } } } },
-  { MN_vmaxph, 0x5f, 3, SPACE_EVEXMAP5, None,
-    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 1, 1, 0, 0, 0, 5, 1, 2, 0, 1, 7, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 86, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 1, 0, 0, 0, 0,
-	  1, 1, 1, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 1, 1, 0, 0, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 1, 1, 0, 0, 0 } } } },
-  { MN_vmaxsh, 0x5f, 3, SPACE_EVEXMAP5, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 1, 1, 2, 0, 0, 4, 1, 0, 0, 1, 1, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 86, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 1, 0, 0, 0, 0,
-	  1, 0, 0, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } } } },
-  { MN_vminph, 0x5d, 3, SPACE_EVEXMAP5, None,
-    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 1, 1, 0, 0, 0, 5, 1, 2, 0, 1, 7, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 86, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 1, 0, 0, 0, 0,
-	  1, 1, 1, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 1, 1, 0, 0, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 1, 1, 0, 0, 0 } } } },
-  { MN_vminsh, 0x5d, 3, SPACE_EVEXMAP5, None,
-    { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 1, 1, 2, 0, 0, 4, 1, 0, 0, 1, 1, 0, 0, 0, 0, 0,
-      0, 0 },
-    { { 86, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 1, 0, 0, 0, 0,
-	  1, 0, 0, 0, 1, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } },
-      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-	  1, 0, 0, 0, 0, 0 } } } },
   { MN_vmovdqa64, 0x6f, 2, SPACE_0F, None,
     { 1, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 2, 1, 0, 0, 5, 1, 0, 0, 0, 7, 1, 0, 0, 0, 0,
@@ -40694,7 +40284,7 @@ static const insn_template i386_optab[] =
 	  0, 0, 0, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 1, 1, 0, 0, 0 } } } },
-  { MN_vpmovswb, 0x20, 2, SPACE_0F38, None,
+  { MN_vpmovwb, 0x30, 2, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 1, 2, 0, 0, 1, 1, 0, 0, 0, 5, 0, 0, 0, 0, 0,
       0, 0 },
@@ -40704,7 +40294,7 @@ static const insn_template i386_optab[] =
 	  0, 0, 1, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
 	  0, 1, 0, 0, 1, 0 } } } },
-  { MN_vpmovswb, 0x20, 2, SPACE_0F38, None,
+  { MN_vpmovwb, 0x30, 2, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 1, 2, 0, 0, 2, 1, 0, 0, 0, 3, 0, 0, 0, 0, 0,
       0, 0 },
@@ -40714,7 +40304,7 @@ static const insn_template i386_optab[] =
 	  1, 0, 0, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
 	  1, 0, 0, 0, 1, 0 } } } },
-  { MN_vpmovswb, 0x20, 2, SPACE_0F38, None,
+  { MN_vpmovwb, 0x30, 2, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 1, 2, 0, 0, 3, 1, 0, 0, 0, 4, 0, 0, 0, 0, 0,
       0, 0 },
@@ -40724,7 +40314,7 @@ static const insn_template i386_optab[] =
 	  0, 1, 0, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 1, 0 } } } },
-  { MN_vpmovuswb, 0x10, 2, SPACE_0F38, None,
+  { MN_vpmovswb, 0x20, 2, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 1, 2, 0, 0, 1, 1, 0, 0, 0, 5, 0, 0, 0, 0, 0,
       0, 0 },
@@ -40734,7 +40324,7 @@ static const insn_template i386_optab[] =
 	  0, 0, 1, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
 	  0, 1, 0, 0, 1, 0 } } } },
-  { MN_vpmovuswb, 0x10, 2, SPACE_0F38, None,
+  { MN_vpmovswb, 0x20, 2, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 1, 2, 0, 0, 2, 1, 0, 0, 0, 3, 0, 0, 0, 0, 0,
       0, 0 },
@@ -40744,7 +40334,7 @@ static const insn_template i386_optab[] =
 	  1, 0, 0, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
 	  1, 0, 0, 0, 1, 0 } } } },
-  { MN_vpmovuswb, 0x10, 2, SPACE_0F38, None,
+  { MN_vpmovswb, 0x20, 2, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 1, 2, 0, 0, 3, 1, 0, 0, 0, 4, 0, 0, 0, 0, 0,
       0, 0 },
@@ -40754,7 +40344,7 @@ static const insn_template i386_optab[] =
 	  0, 1, 0, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 1, 0 } } } },
-  { MN_vpmovwb, 0x30, 2, SPACE_0F38, None,
+  { MN_vpmovuswb, 0x10, 2, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 1, 2, 0, 0, 1, 1, 0, 0, 0, 5, 0, 0, 0, 0, 0,
       0, 0 },
@@ -40764,7 +40354,7 @@ static const insn_template i386_optab[] =
 	  0, 0, 1, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
 	  0, 1, 0, 0, 1, 0 } } } },
-  { MN_vpmovwb, 0x30, 2, SPACE_0F38, None,
+  { MN_vpmovuswb, 0x10, 2, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 1, 2, 0, 0, 2, 1, 0, 0, 0, 3, 0, 0, 0, 0, 0,
       0, 0 },
@@ -40774,7 +40364,7 @@ static const insn_template i386_optab[] =
 	  1, 0, 0, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
 	  1, 0, 0, 0, 1, 0 } } } },
-  { MN_vpmovwb, 0x30, 2, SPACE_0F38, None,
+  { MN_vpmovuswb, 0x10, 2, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 1, 2, 0, 0, 3, 1, 0, 0, 0, 4, 0, 0, 0, 0, 0,
       0, 0 },
@@ -40978,7 +40568,7 @@ static const insn_template i386_optab[] =
 	  1, 0, 0, 0, 0, 0 } } } },
   { MN_vcvtps2qq, 0x7b, 2, SPACE_0F, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 1, 1, 0, 0, 3, 1, 3, 0, 0, 4, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 1, 1, 0, 0, 3, 1, 3, 1, 1, 4, 0, 0, 0, 0, 0,
       0, 0 },
     { { 34, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
@@ -41008,7 +40598,7 @@ static const insn_template i386_optab[] =
 	  1, 0, 0, 0, 0, 0 } } } },
   { MN_vcvtps2uqq, 0x79, 2, SPACE_0F, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 1, 1, 0, 0, 3, 1, 3, 0, 0, 4, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 1, 1, 0, 0, 3, 1, 3, 1, 1, 4, 0, 0, 0, 0, 0,
       0, 0 },
     { { 34, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
@@ -41048,7 +40638,7 @@ static const insn_template i386_optab[] =
 	  0, 1, 0, 0, 0, 0 } } } },
   { MN_vcvtqq2ps, 0x5b, 2, SPACE_0F, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 2, 0, 0, 0, 5, 1, 4, 0, 0, 7, 0, 1, 0, 0, 0,
+      0, 0, 0, 0, 0, 2, 0, 0, 0, 5, 1, 4, 1, 1, 7, 0, 1, 0, 0, 0,
       0, 0 },
     { { 34, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
@@ -41058,7 +40648,7 @@ static const insn_template i386_optab[] =
 	  1, 0, 0, 0, 0, 0 } } } },
   { MN_vcvtqq2ps, 0x5b, 2, SPACE_0F, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 2, 0, 0, 0, 5, 1, 4, 0, 0, 7, 0, 2, 0, 0, 0,
+      0, 0, 0, 0, 0, 2, 0, 0, 0, 5, 1, 4, 1, 1, 7, 0, 2, 0, 0, 0,
       0, 0 },
     { { 34, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
@@ -41078,7 +40668,7 @@ static const insn_template i386_optab[] =
 	  1, 0, 0, 0, 0, 0 } } } },
   { MN_vcvtqq2psy, 0x5b, 2, SPACE_0F, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 2, 0, 0, 0, 3, 1, 4, 0, 0, 5, 0, 2, 0, 0, 0,
+      0, 0, 0, 0, 0, 2, 0, 0, 0, 3, 1, 4, 1, 1, 5, 0, 2, 0, 0, 0,
       0, 0 },
     { { 34, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
@@ -41128,7 +40718,7 @@ static const insn_template i386_optab[] =
 	  1, 0, 0, 0, 0, 0 } } } },
   { MN_vcvttps2qq, 0x7a, 2, SPACE_0F, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 1, 1, 0, 0, 3, 1, 3, 0, 0, 4, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 1, 1, 0, 0, 3, 1, 3, 0, 1, 4, 0, 0, 0, 0, 0,
       0, 0 },
     { { 34, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
@@ -41158,7 +40748,7 @@ static const insn_template i386_optab[] =
 	  1, 0, 0, 0, 0, 0 } } } },
   { MN_vcvttps2uqq, 0x78, 2, SPACE_0F, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 1, 1, 0, 0, 3, 1, 3, 0, 0, 4, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 1, 1, 0, 0, 3, 1, 3, 0, 1, 4, 0, 0, 0, 0, 0,
       0, 0 },
     { { 34, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
@@ -41178,7 +40768,7 @@ static const insn_template i386_optab[] =
 	  0, 1, 0, 0, 0, 0 } } } },
   { MN_vcvtuqq2ps, 0x7a, 2, SPACE_0F, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 2, 3, 0, 0, 5, 1, 4, 0, 0, 7, 0, 1, 0, 0, 0,
+      0, 0, 0, 0, 0, 2, 3, 0, 0, 5, 1, 4, 1, 1, 7, 0, 1, 0, 0, 0,
       0, 0 },
     { { 34, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
@@ -41188,7 +40778,7 @@ static const insn_template i386_optab[] =
 	  1, 0, 0, 0, 0, 0 } } } },
   { MN_vcvtuqq2ps, 0x7a, 2, SPACE_0F, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 2, 3, 0, 0, 5, 1, 4, 0, 0, 7, 0, 2, 0, 0, 0,
+      0, 0, 0, 0, 0, 2, 3, 0, 0, 5, 1, 4, 1, 1, 7, 0, 2, 0, 0, 0,
       0, 0 },
     { { 34, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
@@ -41208,7 +40798,7 @@ static const insn_template i386_optab[] =
 	  1, 0, 0, 0, 0, 0 } } } },
   { MN_vcvtuqq2psy, 0x7a, 2, SPACE_0F, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 2, 3, 0, 0, 3, 1, 4, 0, 0, 5, 0, 2, 0, 0, 0,
+      0, 0, 0, 0, 0, 2, 3, 0, 0, 3, 1, 4, 1, 1, 5, 0, 2, 0, 0, 0,
       0, 0 },
     { { 34, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
@@ -41218,7 +40808,7 @@ static const insn_template i386_optab[] =
 	  1, 0, 0, 0, 0, 0 } } } },
   { MN_vextractf32x8, 0x1b, 3, SPACE_0F3A, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 1, 1, 0, 0, 1, 1, 0, 0, 0, 5, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 1, 1, 0, 0, 1, 1, 0, 0, 0, 5, 1, 0, 0, 0, 0,
       0, 0 },
     { { 34, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
@@ -41230,7 +40820,7 @@ static const insn_template i386_optab[] =
 	  0, 1, 0, 0, 1, 0 } } } },
   { MN_vextracti32x8, 0x3b, 3, SPACE_0F3A, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 1, 1, 0, 0, 1, 1, 0, 0, 0, 5, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 1, 1, 0, 0, 1, 1, 0, 0, 0, 5, 1, 0, 0, 0, 0,
       0, 0 },
     { { 34, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
@@ -41270,7 +40860,7 @@ static const insn_template i386_optab[] =
 	  0, 0, 1, 0, 0, 0 } } } },
   { MN_vextractf64x2, 0x19, 3, SPACE_0F3A, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 2, 1, 0, 0, 5, 1, 0, 0, 0, 4, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 2, 1, 0, 0, 5, 1, 0, 0, 0, 4, 1, 0, 0, 0, 0,
       0, 0 },
     { { 34, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
@@ -41282,7 +40872,7 @@ static const insn_template i386_optab[] =
 	  1, 0, 0, 0, 1, 0 } } } },
   { MN_vextracti64x2, 0x39, 3, SPACE_0F3A, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 2, 1, 0, 0, 5, 1, 0, 0, 0, 4, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 2, 1, 0, 0, 5, 1, 0, 0, 0, 4, 1, 0, 0, 0, 0,
       0, 0 },
     { { 34, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
@@ -42018,7 +41608,7 @@ static const insn_template i386_optab[] =
 	  1, 1, 1, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 1, 1, 0, 0, 0 } } } },
-  { MN_vpdpbusd, 0x50, 3, SPACE_0F38, None,
+  { MN_vpdpbusd, 0x50|0, 3, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 1, 1, 1, 0, 0, 5, 1, 3, 0, 0, 7, 0, 0, 0, 0, 0,
       0, 0 },
@@ -42030,7 +41620,7 @@ static const insn_template i386_optab[] =
 	  1, 1, 1, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 1, 1, 0, 0, 0 } } } },
-  { MN_vpdpbusd, 0x50, 3, SPACE_0F38, None,
+  { MN_vpdpbusd, 0x50|0, 3, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
       0, 0 },
@@ -42042,7 +41632,7 @@ static const insn_template i386_optab[] =
 	  1, 1, 0, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 1, 0, 0, 0, 0 } } } },
-  { MN_vpdpwssd, 0x52, 3, SPACE_0F38, None,
+  { MN_vpdpbusds, 0x50|1, 3, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 1, 1, 1, 0, 0, 5, 1, 3, 0, 0, 7, 0, 0, 0, 0, 0,
       0, 0 },
@@ -42054,7 +41644,7 @@ static const insn_template i386_optab[] =
 	  1, 1, 1, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 1, 1, 0, 0, 0 } } } },
-  { MN_vpdpwssd, 0x52, 3, SPACE_0F38, None,
+  { MN_vpdpbusds, 0x50|1, 3, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
       0, 0 },
@@ -42066,7 +41656,7 @@ static const insn_template i386_optab[] =
 	  1, 1, 0, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 1, 0, 0, 0, 0 } } } },
-  { MN_vpdpbusds, 0x51, 3, SPACE_0F38, None,
+  { MN_vpdpwssd, 0x52|0, 3, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 1, 1, 1, 0, 0, 5, 1, 3, 0, 0, 7, 0, 0, 0, 0, 0,
       0, 0 },
@@ -42078,7 +41668,7 @@ static const insn_template i386_optab[] =
 	  1, 1, 1, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 1, 1, 0, 0, 0 } } } },
-  { MN_vpdpbusds, 0x51, 3, SPACE_0F38, None,
+  { MN_vpdpwssd, 0x52|0, 3, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
       0, 0 },
@@ -42090,7 +41680,7 @@ static const insn_template i386_optab[] =
 	  1, 1, 0, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 1, 0, 0, 0, 0 } } } },
-  { MN_vpdpwssds, 0x53, 3, SPACE_0F38, None,
+  { MN_vpdpwssds, 0x52|1, 3, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 1, 1, 1, 0, 0, 5, 1, 3, 0, 0, 7, 0, 0, 0, 0, 0,
       0, 0 },
@@ -42102,7 +41692,7 @@ static const insn_template i386_optab[] =
 	  1, 1, 1, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 1, 1, 0, 0, 0 } } } },
-  { MN_vpdpwssds, 0x53, 3, SPACE_0F38, None,
+  { MN_vpdpwssds, 0x52|1, 3, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
       0, 0 },
@@ -42114,7 +41704,7 @@ static const insn_template i386_optab[] =
 	  1, 1, 0, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 1, 0, 0, 0, 0 } } } },
-  { MN_vpdpbuud, 0x50, 3, SPACE_0F38, None,
+  { MN_vpdpbuud, 0x50|0, 3, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
       0, 0 },
@@ -42126,7 +41716,19 @@ static const insn_template i386_optab[] =
 	  1, 1, 0, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 1, 0, 0, 0, 0 } } } },
-  { MN_vpdpbuuds, 0x51, 3, SPACE_0F38, None,
+  { MN_vpdpbuud, 0x50|0, 3, SPACE_0F38, None,
+    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 1, 1, 0, 0, 0, 5, 1, 3, 0, 0, 7, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 99, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
+	  1, 1, 1, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 1, 0, 0, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 1, 0, 0, 0 } } } },
+  { MN_vpdpbuuds, 0x50|1, 3, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
       0, 0 },
@@ -42138,7 +41740,19 @@ static const insn_template i386_optab[] =
 	  1, 1, 0, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 1, 0, 0, 0, 0 } } } },
-  { MN_vpdpbssd, 0x50, 3, SPACE_0F38, None,
+  { MN_vpdpbuuds, 0x50|1, 3, SPACE_0F38, None,
+    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 1, 1, 0, 0, 0, 5, 1, 3, 0, 0, 7, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 99, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
+	  1, 1, 1, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 1, 0, 0, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 1, 0, 0, 0 } } } },
+  { MN_vpdpbssd, 0x50|0, 3, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 1, 1, 1, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
       0, 0 },
@@ -42150,7 +41764,19 @@ static const insn_template i386_optab[] =
 	  1, 1, 0, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 1, 0, 0, 0, 0 } } } },
-  { MN_vpdpbssds, 0x51, 3, SPACE_0F38, None,
+  { MN_vpdpbssd, 0x50|0, 3, SPACE_0F38, None,
+    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 1, 1, 3, 0, 0, 5, 1, 3, 0, 0, 7, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 99, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
+	  1, 1, 1, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 1, 0, 0, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 1, 0, 0, 0 } } } },
+  { MN_vpdpbssds, 0x50|1, 3, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 1, 1, 1, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
       0, 0 },
@@ -42162,7 +41788,19 @@ static const insn_template i386_optab[] =
 	  1, 1, 0, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 1, 0, 0, 0, 0 } } } },
-  { MN_vpdpbsud, 0x50, 3, SPACE_0F38, None,
+  { MN_vpdpbssds, 0x50|1, 3, SPACE_0F38, None,
+    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 1, 1, 3, 0, 0, 5, 1, 3, 0, 0, 7, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 99, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
+	  1, 1, 1, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 1, 0, 0, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 1, 0, 0, 0 } } } },
+  { MN_vpdpbsud, 0x50|0, 3, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 1, 1, 1, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
       0, 0 },
@@ -42174,7 +41812,19 @@ static const insn_template i386_optab[] =
 	  1, 1, 0, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 1, 0, 0, 0, 0 } } } },
-  { MN_vpdpbsuds, 0x51, 3, SPACE_0F38, None,
+  { MN_vpdpbsud, 0x50|0, 3, SPACE_0F38, None,
+    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 1, 1, 2, 0, 0, 5, 1, 3, 0, 0, 7, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 99, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
+	  1, 1, 1, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 1, 0, 0, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 1, 0, 0, 0 } } } },
+  { MN_vpdpbsuds, 0x50|1, 3, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 1, 1, 1, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
       0, 0 },
@@ -42186,7 +41836,19 @@ static const insn_template i386_optab[] =
 	  1, 1, 0, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 1, 0, 0, 0, 0 } } } },
-  { MN_vpdpwuud, 0xd2, 3, SPACE_0F38, None,
+  { MN_vpdpbsuds, 0x50|1, 3, SPACE_0F38, None,
+    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 1, 1, 2, 0, 0, 5, 1, 3, 0, 0, 7, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 99, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
+	  1, 1, 1, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 1, 0, 0, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 1, 0, 0, 0 } } } },
+  { MN_vpdpwuud, 0xd2|0, 3, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
       0, 0 },
@@ -42198,7 +41860,19 @@ static const insn_template i386_optab[] =
 	  1, 1, 0, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 1, 0, 0, 0, 0 } } } },
-  { MN_vpdpwuuds, 0xd3, 3, SPACE_0F38, None,
+  { MN_vpdpwuud, 0xd2|0, 3, SPACE_0F38, None,
+    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 1, 1, 0, 0, 0, 5, 1, 3, 0, 0, 7, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 99, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
+	  1, 1, 1, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 1, 0, 0, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 1, 0, 0, 0 } } } },
+  { MN_vpdpwuuds, 0xd2|1, 3, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
       0, 0 },
@@ -42210,7 +41884,19 @@ static const insn_template i386_optab[] =
 	  1, 1, 0, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 1, 0, 0, 0, 0 } } } },
-  { MN_vpdpwusd, 0xd2, 3, SPACE_0F38, None,
+  { MN_vpdpwuuds, 0xd2|1, 3, SPACE_0F38, None,
+    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 1, 1, 0, 0, 0, 5, 1, 3, 0, 0, 7, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 99, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
+	  1, 1, 1, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 1, 0, 0, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 1, 0, 0, 0 } } } },
+  { MN_vpdpwusd, 0xd2|0, 3, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
       0, 0 },
@@ -42222,7 +41908,19 @@ static const insn_template i386_optab[] =
 	  1, 1, 0, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 1, 0, 0, 0, 0 } } } },
-  { MN_vpdpwusds, 0xd3, 3, SPACE_0F38, None,
+  { MN_vpdpwusd, 0xd2|0, 3, SPACE_0F38, None,
+    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 1, 1, 1, 0, 0, 5, 1, 3, 0, 0, 7, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 99, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
+	  1, 1, 1, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 1, 0, 0, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 1, 0, 0, 0 } } } },
+  { MN_vpdpwusds, 0xd2|1, 3, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
       0, 0 },
@@ -42234,7 +41932,19 @@ static const insn_template i386_optab[] =
 	  1, 1, 0, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 1, 0, 0, 0, 0 } } } },
-  { MN_vpdpwsud, 0xd2, 3, SPACE_0F38, None,
+  { MN_vpdpwusds, 0xd2|1, 3, SPACE_0F38, None,
+    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 1, 1, 1, 0, 0, 5, 1, 3, 0, 0, 7, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 99, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
+	  1, 1, 1, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 1, 0, 0, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 1, 0, 0, 0 } } } },
+  { MN_vpdpwsud, 0xd2|0, 3, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 1, 1, 1, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
       0, 0 },
@@ -42246,7 +41956,19 @@ static const insn_template i386_optab[] =
 	  1, 1, 0, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 1, 0, 0, 0, 0 } } } },
-  { MN_vpdpwsuds, 0xd3, 3, SPACE_0F38, None,
+  { MN_vpdpwsud, 0xd2|0, 3, SPACE_0F38, None,
+    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 1, 1, 2, 0, 0, 5, 1, 3, 0, 0, 7, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 99, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
+	  1, 1, 1, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 1, 0, 0, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 1, 0, 0, 0 } } } },
+  { MN_vpdpwsuds, 0xd2|1, 3, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 1, 1, 1, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
       0, 0 },
@@ -42258,6 +41980,18 @@ static const insn_template i386_optab[] =
 	  1, 1, 0, 0, 0, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 1, 0, 0, 0, 0 } } } },
+  { MN_vpdpwsuds, 0xd2|1, 3, SPACE_0F38, None,
+    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 1, 1, 2, 0, 0, 5, 1, 3, 0, 0, 7, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 99, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
+	  1, 1, 1, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 1, 0, 0, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 1, 0, 0, 0 } } } },
   { MN_vpopcntb, 0x54, 2, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 1, 1, 0, 0, 5, 1, 0, 0, 0, 7, 0, 0, 0, 0, 0,
@@ -42294,7 +42028,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
-    { { 131, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 132, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
@@ -42302,7 +42036,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 0, 0, 0, 0, 0, 7, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
-    { { 131, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 132, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0,
 	  0, 0, 0, 0, 0, 0 } },
@@ -42314,7 +42048,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
-    { { 132, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 133, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
@@ -42322,7 +42056,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
-    { { 100, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 101, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
@@ -42330,7 +42064,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 0, 0, 0, 0, 0, 7, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
-    { { 100, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 101, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
@@ -42338,7 +42072,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
-    { { 99, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 100, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
@@ -42346,7 +42080,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 0, 0, 0, 0, 0, 7, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
-    { { 99, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 100, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0,
 	  0, 0, 0, 0, 0, 0 } },
@@ -42358,7 +42092,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 0, 0, 0, 0, 0, 7, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
-    { { 99, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 100, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0,
 	  0, 0, 0, 0, 0, 0 } },
@@ -42370,7 +42104,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
-    { { 99, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 100, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
@@ -42378,7 +42112,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
-    { { 99, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 100, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0,
 	  0, 0, 0, 0, 0, 0 } },
@@ -42390,7 +42124,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
-    { { 101, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 102, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
@@ -42398,7 +42132,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
-    { { 101, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 102, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
@@ -42406,7 +42140,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
-    { { 102, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } },
+    { { 103, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
@@ -42414,7 +42148,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 1, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
-    { { 102, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 103, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
@@ -42422,7 +42156,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
-    { { 103, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } },
+    { { 104, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
 	  0, 0, 0, 0, 1, 0 } } } },
@@ -42430,7 +42164,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
-    { { 103, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 104, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 1, 0, 1, 0,
 	  0, 0, 0, 0, 1, 0 } } } },
@@ -42438,7 +42172,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
-    { { 105, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 106, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
@@ -42446,7 +42180,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
-    { { 105, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 106, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
@@ -42454,7 +42188,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
-    { { 105, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 106, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
@@ -42462,7 +42196,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
-    { { 105, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 106, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
@@ -42470,7 +42204,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
-    { { 105, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 106, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
@@ -42478,7 +42212,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
-    { { 105, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 106, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
 	  0, 0, 0, 0, 1, 0 } } } },
@@ -42486,7 +42220,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
       0, 0 },
-    { { 105, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 106, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0,
 	  0, 0, 0, 0, 0, 0 } },
@@ -42496,7 +42230,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
-    { { 105, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
+    { { 106, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0,
 	  0, 0, 0, 0, 0, 0 } },
@@ -42506,7 +42240,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
       0, 0 },
-    { { 105, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 106, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0,
 	  0, 0, 0, 0, 0, 0 } },
@@ -42516,7 +42250,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
-    { { 105, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
+    { { 106, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0,
 	  0, 0, 0, 0, 0, 0 } },
@@ -42526,7 +42260,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
       0, 0 },
-    { { 105, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 106, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0,
 	  0, 0, 0, 0, 0, 0 } },
@@ -42536,7 +42270,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 1, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
-    { { 105, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
+    { { 106, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0,
 	  0, 0, 0, 0, 0, 0 } },
@@ -42546,7 +42280,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
       0, 0 },
-    { { 105, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 106, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0,
 	  0, 0, 0, 0, 0, 0 } },
@@ -42556,7 +42290,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 1, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
-    { { 105, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
+    { { 106, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0,
 	  0, 0, 0, 0, 0, 0 } },
@@ -42566,7 +42300,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
-    { { 105, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 106, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
@@ -42574,7 +42308,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
-    { { 105, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 106, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1, 0,
 	  0, 0, 0, 0, 1, 0 } } } },
@@ -42582,7 +42316,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
-    { { 104, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 105, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
@@ -42590,7 +42324,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
-    { { 104, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 105, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
@@ -42598,7 +42332,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
-    { { 104, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 105, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
@@ -42606,7 +42340,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
-    { { 114, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 115, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
@@ -42614,7 +42348,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
-    { { 115, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 116, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
@@ -42622,7 +42356,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
-    { { 116, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 117, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
@@ -42630,7 +42364,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 1, 0, 0, 0, 0, 7, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
-    { { 117, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 118, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
@@ -42638,7 +42372,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
-    { { 117, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 118, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
@@ -42646,7 +42380,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
-    { { 117, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 118, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0,
 	  0, 0, 0, 0, 0, 0 } },
@@ -42658,7 +42392,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
-    { { 117, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 118, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
@@ -42666,7 +42400,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
-    { { 117, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 118, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0,
 	  0, 0, 0, 0, 0, 0 } },
@@ -42678,7 +42412,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 1, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
-    { { 119, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 120, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
@@ -42686,7 +42420,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 1, 0, 0, 0, 1, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
       0, 0 },
-    { { 120, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 121, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0,
 	  0, 0, 0, 0, 0, 0 } },
@@ -42696,7 +42430,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
-    { { 120, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
+    { { 121, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0,
 	  0, 0, 0, 0, 0, 0 } },
@@ -42706,7 +42440,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 1, 0, 0, 0, 0, 7, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
       0, 0 },
-    { { 121, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 122, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
 	  0, 0, 0, 0, 1, 0 } },
@@ -42716,7 +42450,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 1, 0, 0, 0, 0, 7, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 1, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
-    { { 121, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
+    { { 122, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0,
 	  0, 0, 0, 0, 1, 0 } },
@@ -42900,7 +42634,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 1, 0, 0, 0, 0, 7, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
       0, 0 },
-    { { 122, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 123, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
 	  0, 0, 0, 0, 1, 0 } },
@@ -42910,8 +42644,8 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 1, 0, 0, 0, 0, 7, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 3, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
-    { { 122, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { 122, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } },
+    { { 123, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 123, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } },
     { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
 	  0, 0, 0, 0, 1, 0 } },
       { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0,
@@ -42920,7 +42654,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 1, 0, 0, 0, 0, 7, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
       0, 0 },
-    { { 122, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 123, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
 	  0, 0, 0, 0, 1, 0 } },
@@ -42930,8 +42664,8 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 1, 0, 0, 0, 0, 7, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 2, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
-    { { 122, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
-    { { 122, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } },
+    { { 123, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 123, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } },
     { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
 	  0, 0, 0, 0, 1, 0 } },
       { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0,
@@ -42964,7 +42698,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
-    { { 125, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 126, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
@@ -42972,7 +42706,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
-    { { 133, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 134, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
@@ -42980,7 +42714,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 0, 0, 0, 0, 0, 7, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
-    { { 133, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 134, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
@@ -42988,7 +42722,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
-    { { 133, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 134, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
@@ -42996,7 +42730,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 0, 0, 0, 0, 0, 7, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
-    { { 133, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 134, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0,
 	  0, 0, 0, 0, 0, 0 } },
@@ -43008,7 +42742,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 0, 0, 0, 0, 0, 7, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
-    { { 133, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 134, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
@@ -43016,7 +42750,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
-    { { 133, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 134, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
@@ -43024,7 +42758,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 0, 0, 0, 0, 0, 7, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
-    { { 133, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 134, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0,
 	  0, 0, 0, 0, 0, 0 } },
@@ -43034,7 +42768,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 0, 0, 0, 0, 0, 7, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
-    { { 133, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 134, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
@@ -43042,7 +42776,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
-    { { 133, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 134, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
@@ -43050,7 +42784,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 0, 0, 0, 0, 0, 7, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
-    { { 133, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 134, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0,
 	  0, 0, 0, 0, 0, 0 } },
@@ -43062,7 +42796,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 0, 0, 0, 0, 0, 7, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
-    { { 133, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 134, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
@@ -43070,7 +42804,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
-    { { 134, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 135, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
@@ -43078,7 +42812,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 0, 0, 0, 0, 0, 7, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
-    { { 134, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 135, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0,
 	  0, 0, 0, 0, 0, 0 } },
@@ -43090,7 +42824,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
-    { { 124, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 125, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
@@ -43098,7 +42832,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
-    { { 123, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 124, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
@@ -43106,7 +42840,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
-    { { 127, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 128, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
@@ -43114,7 +42848,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
-    { { 127, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 128, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
@@ -43122,23 +42856,23 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 1, 0, 1, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
-    { { 110, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0 } },
-    { { 110, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } },
+    { { 111, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 111, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } },
     { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0,
 	  0, 0, 0, 0, 1, 0 } } } },
   { MN_sttilecfg, 0x49, 1, SPACE_0F38, 0,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 1, 0, 1, 1, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
-    { { 110, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0 } },
-    { { 110, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } },
+    { { 111, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 111, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } },
     { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0,
 	  0, 0, 0, 0, 1, 0 } } } },
   { MN_tcmmimfp16ps, 0x6c, 3, SPACE_0F38, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 1, 2, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
       0, 0 },
-    { { 109, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 110, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  0, 0, 0, 1, 0, 0 } },
@@ -43150,7 +42884,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 1, 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
       0, 0 },
-    { { 109, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 110, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  0, 0, 0, 1, 0, 0 } },
@@ -43162,7 +42896,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 1, 2, 1, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
       0, 0 },
-    { { 107, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 108, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  0, 0, 0, 1, 0, 0 } },
@@ -43174,7 +42908,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 1, 2, 1, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
       0, 0 },
-    { { 108, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 109, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  0, 0, 0, 1, 0, 0 } },
@@ -43186,7 +42920,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 1, 2, 1, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
       0, 0 },
-    { { 106, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 107, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  0, 0, 0, 1, 0, 0 } },
@@ -43198,7 +42932,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 1, 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
       0, 0 },
-    { { 106, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 107, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  0, 0, 0, 1, 0, 0 } },
@@ -43210,7 +42944,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 1, 2, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
       0, 0 },
-    { { 106, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 107, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  0, 0, 0, 1, 0, 0 } },
@@ -43222,7 +42956,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 1, 2, 1, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
       0, 0 },
-    { { 106, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 107, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  0, 0, 0, 1, 0, 0 } },
@@ -43234,8 +42968,8 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 1, 0, 1, 3, 4, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
-    { { 110, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0 } },
-    { { 110, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } },
+    { { 111, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 111, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } },
     { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0,
 	  0, 0, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
@@ -43244,8 +42978,8 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 1, 0, 1, 1, 4, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
-    { { 110, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0 } },
-    { { 110, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } },
+    { { 111, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 111, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } },
     { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0,
 	  0, 0, 0, 0, 1, 0 } },
       { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
@@ -43254,8 +42988,8 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 1, 0, 1, 2, 4, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
-    { { 110, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0 } },
-    { { 110, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } },
+    { { 111, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 111, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } },
     { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  0, 0, 0, 1, 0, 0 } },
       { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0,
@@ -43264,7 +42998,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
       0, 0 },
-    { { 110, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 111, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
@@ -43272,7 +43006,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 1, 0, 1, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
       0, 0 },
-    { { 110, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 111, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  0, 0, 0, 1, 0, 0 } } } },
@@ -43280,7 +43014,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
       0, 0 },
-    { { 128, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 129, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  1, 0, 0, 0, 0, 0 } },
@@ -43290,7 +43024,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
       0, 0 },
-    { { 128, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 129, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0,
 	  0, 0, 0, 0, 0, 0 } },
@@ -43300,7 +43034,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
       0, 0 },
-    { { 128, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 129, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0,
 	  0, 0, 0, 0, 0, 0 } },
@@ -43310,7 +43044,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
       0, 0 },
-    { { 128, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 129, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
 	  0, 0, 0, 0, 1, 0 } },
@@ -43320,7 +43054,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
       0, 0 },
-    { { 128, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 129, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
 	  0, 0, 0, 0, 1, 0 } },
@@ -43330,7 +43064,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
       0, 0 },
-    { { 128, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 129, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
 	  0, 0, 0, 0, 1, 0 } },
@@ -43340,7 +43074,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
       0, 0 },
-    { { 128, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 129, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
 	  0, 0, 0, 0, 1, 0 } },
@@ -43350,7 +43084,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
       0, 0 },
-    { { 129, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 130, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
 	  0, 0, 0, 0, 1, 0 } } } },
@@ -43358,7 +43092,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
       0, 0 },
-    { { 129, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 130, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
 	  0, 0, 0, 0, 1, 0 } } } },
@@ -43366,7 +43100,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
       0, 0 },
-    { { 129, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 130, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
 	  0, 0, 0, 0, 1, 0 } } } },
@@ -43374,7 +43108,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
       0, 0 },
-    { { 129, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 130, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
 	  0, 0, 0, 0, 1, 0 } } } },
@@ -43414,7 +43148,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
-    { { 118, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 119, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
@@ -43422,7 +43156,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
-    { { 118, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 119, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
@@ -43430,7 +43164,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
-    { { 118, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 119, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
@@ -43438,7 +43172,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
-    { { 118, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 119, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
@@ -43446,7 +43180,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 1, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
       0, 0 },
-    { { 118, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 119, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
@@ -43454,7 +43188,7 @@ static const insn_template i386_optab[] =
     { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
       0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
       0, 0 },
-    { { 130, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 131, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
     { { { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
@@ -44698,7 +44432,7 @@ static const insn_template i386_optab[] =
 	  0, 1, 0, 0, 0, 0 } } } },
   { MN_vcvtdq2ph, 0x5b, 2, SPACE_EVEXMAP5, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 1, 0, 0, 0, 5, 1, 3, 0, 0, 7, 0, 1, 0, 0, 0,
+      0, 0, 0, 0, 0, 1, 0, 0, 0, 5, 1, 3, 1, 1, 7, 0, 1, 0, 0, 0,
       0, 0 },
     { { 86, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
@@ -44708,7 +44442,7 @@ static const insn_template i386_optab[] =
 	  1, 0, 0, 0, 0, 0 } } } },
   { MN_vcvtdq2ph, 0x5b, 2, SPACE_EVEXMAP5, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 1, 0, 0, 0, 5, 1, 3, 0, 0, 7, 0, 2, 0, 0, 0,
+      0, 0, 0, 0, 0, 1, 0, 0, 0, 5, 1, 3, 1, 1, 7, 0, 2, 0, 0, 0,
       0, 0 },
     { { 86, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
@@ -44728,7 +44462,7 @@ static const insn_template i386_optab[] =
 	  1, 0, 0, 0, 0, 0 } } } },
   { MN_vcvtdq2phy, 0x5b, 2, SPACE_EVEXMAP5, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 1, 0, 0, 0, 3, 1, 3, 0, 0, 5, 0, 2, 0, 0, 0,
+      0, 0, 0, 0, 0, 1, 0, 0, 0, 3, 1, 3, 1, 1, 5, 0, 2, 0, 0, 0,
       0, 0 },
     { { 86, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
@@ -44748,7 +44482,7 @@ static const insn_template i386_optab[] =
 	  0, 1, 0, 0, 0, 0 } } } },
   { MN_vcvtudq2ph, 0x7a, 2, SPACE_EVEXMAP5, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 1, 3, 0, 0, 5, 1, 3, 0, 0, 7, 0, 1, 0, 0, 0,
+      0, 0, 0, 0, 0, 1, 3, 0, 0, 5, 1, 3, 1, 1, 7, 0, 1, 0, 0, 0,
       0, 0 },
     { { 86, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
@@ -44758,7 +44492,7 @@ static const insn_template i386_optab[] =
 	  1, 0, 0, 0, 0, 0 } } } },
   { MN_vcvtudq2ph, 0x7a, 2, SPACE_EVEXMAP5, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 1, 3, 0, 0, 5, 1, 3, 0, 0, 7, 0, 2, 0, 0, 0,
+      0, 0, 0, 0, 0, 1, 3, 0, 0, 5, 1, 3, 1, 1, 7, 0, 2, 0, 0, 0,
       0, 0 },
     { { 86, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
@@ -44778,7 +44512,7 @@ static const insn_template i386_optab[] =
 	  1, 0, 0, 0, 0, 0 } } } },
   { MN_vcvtudq2phy, 0x7a, 2, SPACE_EVEXMAP5, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 1, 3, 0, 0, 3, 1, 3, 0, 0, 5, 0, 2, 0, 0, 0,
+      0, 0, 0, 0, 0, 1, 3, 0, 0, 3, 1, 3, 1, 1, 5, 0, 2, 0, 0, 0,
       0, 0 },
     { { 86, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
@@ -44828,7 +44562,7 @@ static const insn_template i386_optab[] =
 	  1, 0, 0, 0, 0, 0 } } } },
   { MN_vcvtqq2phy, 0x5b, 2, SPACE_EVEXMAP5, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 2, 0, 0, 0, 3, 1, 4, 0, 0, 5, 0, 2, 0, 0, 0,
+      0, 0, 0, 0, 0, 2, 0, 0, 0, 3, 1, 4, 1, 1, 5, 0, 2, 0, 0, 0,
       0, 0 },
     { { 86, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
@@ -44878,7 +44612,7 @@ static const insn_template i386_optab[] =
 	  1, 0, 0, 0, 0, 0 } } } },
   { MN_vcvtuqq2phy, 0x7a, 2, SPACE_EVEXMAP5, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 2, 3, 0, 0, 3, 1, 4, 0, 0, 5, 0, 2, 0, 0, 0,
+      0, 0, 0, 0, 0, 2, 3, 0, 0, 3, 1, 4, 1, 1, 5, 0, 2, 0, 0, 0,
       0, 0 },
     { { 86, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
@@ -44928,7 +44662,7 @@ static const insn_template i386_optab[] =
 	  1, 0, 0, 0, 0, 0 } } } },
   { MN_vcvtpd2phy, 0x5a, 2, SPACE_EVEXMAP5, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 2, 1, 0, 0, 3, 1, 4, 0, 0, 5, 0, 2, 0, 0, 0,
+      0, 0, 0, 0, 0, 2, 1, 0, 0, 3, 1, 4, 1, 1, 5, 0, 2, 0, 0, 0,
       0, 0 },
     { { 86, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
@@ -44948,7 +44682,7 @@ static const insn_template i386_optab[] =
 	  0, 1, 0, 0, 0, 0 } } } },
   { MN_vcvtps2phx, 0x1d, 2, SPACE_EVEXMAP5, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 1, 1, 0, 0, 5, 1, 3, 0, 0, 7, 0, 1, 0, 0, 0,
+      0, 0, 0, 0, 0, 1, 1, 0, 0, 5, 1, 3, 1, 1, 7, 0, 1, 0, 0, 0,
       0, 0 },
     { { 86, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
@@ -44958,7 +44692,7 @@ static const insn_template i386_optab[] =
 	  1, 0, 0, 0, 0, 0 } } } },
   { MN_vcvtps2phx, 0x1d, 2, SPACE_EVEXMAP5, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 1, 1, 0, 0, 5, 1, 3, 0, 0, 7, 0, 2, 0, 0, 0,
+      0, 0, 0, 0, 0, 1, 1, 0, 0, 5, 1, 3, 1, 1, 7, 0, 2, 0, 0, 0,
       0, 0 },
     { { 86, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
@@ -44978,7 +44712,7 @@ static const insn_template i386_optab[] =
 	  1, 0, 0, 0, 0, 0 } } } },
   { MN_vcvtps2phxy, 0x1d, 2, SPACE_EVEXMAP5, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 1, 1, 0, 0, 3, 1, 3, 0, 0, 5, 0, 2, 0, 0, 0,
+      0, 0, 0, 0, 0, 1, 1, 0, 0, 3, 1, 3, 1, 1, 5, 0, 2, 0, 0, 0,
       0, 0 },
     { { 86, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
@@ -45018,7 +44752,7 @@ static const insn_template i386_optab[] =
 	  1, 0, 0, 0, 0, 0 } } } },
   { MN_vcvtph2dq, 0x5b, 2, SPACE_EVEXMAP5, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 1, 1, 0, 0, 3, 1, 2, 0, 0, 4, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 1, 1, 0, 0, 3, 1, 2, 1, 1, 4, 0, 0, 0, 0, 0,
       0, 0 },
     { { 86, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
@@ -45048,7 +44782,7 @@ static const insn_template i386_optab[] =
 	  1, 0, 0, 0, 0, 0 } } } },
   { MN_vcvtph2udq, 0x79, 2, SPACE_EVEXMAP5, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 1, 0, 0, 0, 3, 1, 2, 0, 0, 4, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 1, 0, 0, 0, 3, 1, 2, 1, 1, 4, 0, 0, 0, 0, 0,
       0, 0 },
     { { 86, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
@@ -45078,7 +44812,7 @@ static const insn_template i386_optab[] =
 	  1, 0, 0, 0, 0, 0 } } } },
   { MN_vcvtph2qq, 0x7b, 2, SPACE_EVEXMAP5, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 1, 1, 0, 0, 3, 1, 2, 0, 0, 3, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 1, 1, 0, 0, 3, 1, 2, 1, 1, 3, 0, 0, 0, 0, 0,
       0, 0 },
     { { 86, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
@@ -45108,7 +44842,7 @@ static const insn_template i386_optab[] =
 	  1, 0, 0, 0, 0, 0 } } } },
   { MN_vcvtph2uqq, 0x79, 2, SPACE_EVEXMAP5, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 1, 1, 0, 0, 3, 1, 2, 0, 0, 3, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 1, 1, 0, 0, 3, 1, 2, 1, 1, 3, 0, 0, 0, 0, 0,
       0, 0 },
     { { 86, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
@@ -45138,7 +44872,7 @@ static const insn_template i386_optab[] =
 	  1, 0, 0, 0, 0, 0 } } } },
   { MN_vcvtph2pd, 0x5a, 2, SPACE_EVEXMAP5, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 1, 0, 0, 0, 3, 1, 2, 0, 0, 3, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 1, 0, 0, 0, 3, 1, 2, 0, 1, 3, 0, 0, 0, 0, 0,
       0, 0 },
     { { 86, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
@@ -45294,7 +45028,7 @@ static const insn_template i386_optab[] =
 	  1, 0, 0, 0, 0, 0 } } } },
   { MN_vcvttph2dq, 0x5b, 2, SPACE_EVEXMAP5, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 1, 2, 0, 0, 3, 1, 2, 0, 0, 4, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 1, 2, 0, 0, 3, 1, 2, 0, 1, 4, 0, 0, 0, 0, 0,
       0, 0 },
     { { 86, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
@@ -45324,7 +45058,7 @@ static const insn_template i386_optab[] =
 	  1, 0, 0, 0, 0, 0 } } } },
   { MN_vcvttph2udq, 0x78, 2, SPACE_EVEXMAP5, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 1, 0, 0, 0, 3, 1, 2, 0, 0, 4, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 1, 0, 0, 0, 3, 1, 2, 0, 1, 4, 0, 0, 0, 0, 0,
       0, 0 },
     { { 86, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
@@ -45354,7 +45088,7 @@ static const insn_template i386_optab[] =
 	  1, 0, 0, 0, 0, 0 } } } },
   { MN_vcvttph2qq, 0x7a, 2, SPACE_EVEXMAP5, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 1, 1, 0, 0, 3, 1, 2, 0, 0, 3, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 1, 1, 0, 0, 3, 1, 2, 0, 1, 3, 0, 0, 0, 0, 0,
       0, 0 },
     { { 86, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
@@ -45384,7 +45118,7 @@ static const insn_template i386_optab[] =
 	  1, 0, 0, 0, 0, 0 } } } },
   { MN_vcvttph2uqq, 0x78, 2, SPACE_EVEXMAP5, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 1, 1, 0, 0, 3, 1, 2, 0, 0, 3, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 1, 1, 0, 0, 3, 1, 2, 0, 1, 3, 0, 0, 0, 0, 0,
       0, 0 },
     { { 86, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
@@ -45414,7 +45148,7 @@ static const insn_template i386_optab[] =
 	  1, 0, 0, 0, 0, 0 } } } },
   { MN_vcvtph2psx, 0x13, 2, SPACE_EVEXMAP6, None,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
-      0, 0, 0, 0, 0, 1, 1, 0, 0, 3, 1, 2, 0, 0, 4, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 0, 1, 1, 0, 0, 3, 1, 2, 0, 1, 4, 0, 0, 0, 0, 0,
       0, 0 },
     { { 86, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
@@ -46198,6 +45932,18 @@ static const insn_template i386_optab[] =
 	  0, 0, 0, 0, 0, 0 } },
       { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0,
 	  0, 0, 0, 0, 0, 0 } } } },
+  { MN_vdpphps, 0x52, 3, SPACE_0F38, None,
+    { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+      0, 0, 0, 0, 1, 1, 0, 0, 0, 5, 1, 3, 0, 0, 7, 0, 0, 0, 0, 0,
+      0, 0 },
+    { { 99, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+    { { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
+	  1, 1, 1, 0, 1, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 1, 0, 0, 0 } },
+      { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  1, 1, 1, 0, 0, 0 } } } },
 };
 
 /* i386 opcode sets table.  */
@@ -46268,252 +46014,252 @@ static const i386_op_off_t i386_op_sets[] =
   1007, 1009, 1011, 1013, 1015, 1017, 1019, 1021,
   1023, 1025, 1027, 1029, 1031, 1033, 1035, 1037,
   1039, 1041, 1043, 1045, 1047, 1049, 1051, 1053,
-  1056, 1059, 1062, 1065, 1068, 1071, 1074, 1077,
-  1080, 1083, 1086, 1089, 1092, 1095, 1098, 1101,
-  1104, 1107, 1110, 1113, 1116, 1119, 1122, 1125,
-  1128, 1131, 1134, 1137, 1140, 1143, 1144, 1145,
-  1146, 1147, 1148, 1149, 1150, 1151, 1152, 1153,
-  1154, 1155, 1158, 1161, 1164, 1167, 1170, 1173,
-  1174, 1175, 1176, 1177, 1178, 1179, 1185, 1195,
-  1199, 1203, 1207, 1211, 1215, 1218, 1222, 1226,
-  1230, 1234, 1238, 1241, 1244, 1247, 1250, 1253,
-  1256, 1259, 1262, 1266, 1270, 1274, 1277, 1285,
-  1291, 1299, 1307, 1313, 1321, 1327, 1335, 1339,
-  1343, 1346, 1350, 1354, 1358, 1362, 1366, 1370,
-  1374, 1377, 1381, 1385, 1388, 1391, 1393, 1395,
-  1398, 1401, 1403, 1405, 1407, 1409, 1411, 1413,
-  1415, 1417, 1419, 1421, 1423, 1425, 1427, 1429,
-  1431, 1433, 1435, 1437, 1439, 1440, 1441, 1447,
-  1449, 1450, 1452, 1454, 1456, 1458, 1459, 1461,
-  1463, 1465, 1467, 1469, 1471, 1474, 1476, 1479,
-  1481, 1483, 1484, 1486, 1489, 1491, 1493, 1495,
-  1498, 1502, 1506, 1515, 1521, 1525, 1529, 1533,
-  1537, 1540, 1544, 1545, 1546, 1547, 1548, 1552,
-  1553, 1556, 1559, 1562, 1565, 1566, 1568, 1570,
-  1572, 1574, 1576, 1578, 1580, 1582, 1584, 1587,
-  1590, 1593, 1596, 1599, 1601, 1603, 1605, 1607,
-  1609, 1611, 1613, 1615, 1617, 1619, 1621, 1623,
-  1625, 1627, 1629, 1631, 1633, 1635, 1638, 1641,
-  1647, 1650, 1653, 1656, 1659, 1662, 1665, 1668,
-  1673, 1678, 1680, 1683, 1688, 1691, 1694, 1697,
-  1700, 1703, 1706, 1709, 1712, 1715, 1718, 1721,
-  1724, 1727, 1729, 1732, 1734, 1735, 1738, 1740,
-  1742, 1744, 1747, 1749, 1750, 1752, 1755, 1757,
-  1759, 1761, 1763, 1764, 1765, 1769, 1771, 1774,
-  1777, 1780, 1783, 1786, 1789, 1791, 1793, 1795,
-  1797, 1799, 1801, 1804, 1807, 1809, 1811, 1813,
-  1814, 1815, 1818, 1820, 1821, 1822, 1823, 1824,
-  1825, 1826, 1828, 1830, 1831, 1832, 1833, 1834,
-  1837, 1840, 1843, 1846, 1849, 1852, 1855, 1858,
-  1861, 1865, 1869, 1873, 1876, 1879, 1882, 1886,
-  1890, 1894, 1897, 1899, 1901, 1905, 1909, 1911,
-  1913, 1917, 1919, 1921, 1923, 1926, 1930, 1932,
-  1934, 1940, 1943, 1946, 1948, 1954, 1957, 1960,
-  1963, 1965, 1967, 1970, 1973, 1975, 1977, 1980,
-  1983, 1985, 1987, 1989, 1991, 1993, 1996, 1998,
-  2000, 2002, 2004, 2006, 2009, 2011, 2013, 2016,
-  2018, 2021, 2023, 2025, 2029, 2033, 2035, 2037,
-  2041, 2042, 2043, 2044, 2045, 2046, 2047, 2048,
-  2049, 2051, 2053, 2055, 2057, 2059, 2061, 2063,
-  2065, 2067, 2069, 2071, 2073, 2075, 2077, 2079,
-  2081, 2083, 2085, 2086, 2087, 2089, 2091, 2093,
-  2095, 2096, 2097, 2098, 2099, 2101, 2104, 2106,
-  2108, 2110, 2112, 2114, 2116, 2118, 2120, 2122,
-  2124, 2126, 2128, 2130, 2132, 2134, 2136, 2138,
-  2140, 2142, 2144, 2146, 2148, 2150, 2152, 2154,
-  2156, 2158, 2160, 2162, 2164, 2166, 2168, 2170,
-  2172, 2174, 2176, 2178, 2180, 2182, 2184, 2186,
-  2188, 2190, 2192, 2194, 2196, 2198, 2200, 2202,
-  2204, 2206, 2208, 2210, 2212, 2214, 2216, 2218,
-  2220, 2222, 2224, 2226, 2228, 2230, 2232, 2234,
-  2236, 2238, 2240, 2242, 2244, 2246, 2248, 2250,
-  2252, 2254, 2256, 2258, 2260, 2262, 2264, 2266,
-  2268, 2270, 2272, 2274, 2276, 2278, 2280, 2282,
-  2284, 2286, 2288, 2290, 2292, 2294, 2296, 2298,
-  2300, 2302, 2304, 2306, 2308, 2310, 2312, 2314,
-  2316, 2318, 2320, 2322, 2324, 2326, 2328, 2330,
-  2332, 2334, 2336, 2338, 2340, 2342, 2344, 2346,
-  2348, 2350, 2352, 2354, 2356, 2358, 2360, 2362,
-  2364, 2366, 2368, 2370, 2372, 2374, 2376, 2378,
-  2380, 2382, 2384, 2386, 2388, 2390, 2392, 2394,
-  2396, 2398, 2400, 2402, 2404, 2406, 2408, 2410,
-  2412, 2414, 2416, 2418, 2420, 2422, 2424, 2426,
-  2428, 2430, 2432, 2434, 2436, 2438, 2440, 2442,
-  2444, 2446, 2448, 2450, 2452, 2454, 2456, 2458,
-  2460, 2462, 2464, 2466, 2468, 2470, 2472, 2474,
-  2476, 2478, 2480, 2482, 2484, 2486, 2491, 2493,
-  2498, 2500, 2502, 2507, 2509, 2511, 2513, 2518,
-  2520, 2522, 2524, 2528, 2534, 2536, 2541, 2543,
-  2545, 2547, 2549, 2551, 2553, 2555, 2557, 2559,
-  2560, 2561, 2563, 2565, 2566, 2567, 2568, 2569,
-  2571, 2573, 2574, 2575, 2576, 2578, 2580, 2582,
-  2584, 2586, 2588, 2590, 2592, 2594, 2596, 2598,
-  2600, 2602, 2606, 2607, 2608, 2610, 2614, 2618,
-  2620, 2624, 2628, 2629, 2630, 2632, 2634, 2636,
-  2638, 2643, 2647, 2651, 2653, 2655, 2657, 2659,
+  1055, 1057, 1059, 1061, 1063, 1065, 1067, 1069,
+  1071, 1073, 1075, 1077, 1079, 1081, 1083, 1085,
+  1087, 1089, 1091, 1093, 1095, 1097, 1099, 1101,
+  1103, 1105, 1107, 1109, 1111, 1113, 1114, 1115,
+  1116, 1117, 1118, 1119, 1120, 1121, 1122, 1123,
+  1124, 1125, 1128, 1131, 1134, 1137, 1140, 1143,
+  1144, 1145, 1146, 1147, 1148, 1149, 1155, 1165,
+  1169, 1173, 1177, 1181, 1185, 1188, 1192, 1196,
+  1200, 1204, 1208, 1211, 1214, 1217, 1220, 1223,
+  1226, 1229, 1232, 1236, 1240, 1244, 1247, 1255,
+  1261, 1269, 1277, 1283, 1291, 1297, 1305, 1309,
+  1313, 1316, 1320, 1324, 1328, 1332, 1336, 1340,
+  1344, 1347, 1351, 1355, 1358, 1361, 1363, 1365,
+  1367, 1369, 1371, 1373, 1375, 1377, 1379, 1381,
+  1383, 1385, 1388, 1391, 1394, 1397, 1399, 1401,
+  1403, 1405, 1407, 1409, 1411, 1413, 1415, 1417,
+  1419, 1421, 1423, 1425, 1427, 1429, 1431, 1433,
+  1435, 1436, 1437, 1443, 1445, 1446, 1448, 1450,
+  1451, 1453, 1455, 1458, 1460, 1463, 1465, 1467,
+  1468, 1470, 1473, 1475, 1479, 1483, 1492, 1498,
+  1502, 1506, 1510, 1514, 1517, 1521, 1522, 1523,
+  1524, 1525, 1529, 1530, 1533, 1536, 1539, 1542,
+  1543, 1545, 1547, 1549, 1551, 1553, 1555, 1557,
+  1560, 1563, 1566, 1569, 1572, 1575, 1578, 1581,
+  1584, 1587, 1590, 1593, 1596, 1599, 1602, 1605,
+  1607, 1609, 1611, 1613, 1615, 1617, 1619, 1621,
+  1623, 1625, 1627, 1629, 1631, 1633, 1635, 1637,
+  1639, 1641, 1644, 1647, 1653, 1656, 1661, 1666,
+  1668, 1671, 1676, 1679, 1682, 1685, 1688, 1691,
+  1694, 1697, 1699, 1702, 1704, 1705, 1708, 1710,
+  1712, 1714, 1717, 1719, 1720, 1722, 1725, 1727,
+  1729, 1731, 1733, 1734, 1735, 1739, 1741, 1744,
+  1747, 1750, 1753, 1756, 1759, 1761, 1763, 1765,
+  1767, 1769, 1771, 1774, 1777, 1779, 1781, 1783,
+  1784, 1785, 1788, 1790, 1791, 1792, 1793, 1794,
+  1795, 1796, 1798, 1800, 1801, 1802, 1803, 1804,
+  1807, 1810, 1813, 1816, 1819, 1822, 1825, 1828,
+  1831, 1835, 1839, 1843, 1846, 1849, 1852, 1856,
+  1860, 1864, 1867, 1869, 1871, 1875, 1879, 1881,
+  1883, 1887, 1889, 1891, 1893, 1896, 1900, 1902,
+  1904, 1910, 1913, 1916, 1918, 1924, 1927, 1930,
+  1933, 1935, 1937, 1940, 1943, 1945, 1947, 1950,
+  1953, 1956, 1958, 1960, 1962, 1964, 1966, 1968,
+  1970, 1972, 1974, 1976, 1979, 1981, 1983, 1986,
+  1988, 1991, 1993, 1995, 1999, 2003, 2005, 2007,
+  2011, 2012, 2013, 2014, 2015, 2016, 2017, 2018,
+  2019, 2021, 2023, 2025, 2027, 2029, 2031, 2033,
+  2035, 2037, 2039, 2041, 2043, 2045, 2047, 2049,
+  2051, 2053, 2055, 2057, 2059, 2061, 2063, 2065,
+  2067, 2069, 2071, 2073, 2075, 2077, 2079, 2081,
+  2083, 2085, 2087, 2089, 2091, 2093, 2095, 2096,
+  2097, 2099, 2101, 2103, 2105, 2107, 2109, 2111,
+  2113, 2114, 2115, 2116, 2117, 2118, 2121, 2123,
+  2125, 2127, 2129, 2131, 2133, 2135, 2137, 2139,
+  2141, 2143, 2145, 2147, 2149, 2151, 2153, 2155,
+  2157, 2159, 2161, 2163, 2165, 2167, 2169, 2171,
+  2173, 2175, 2177, 2179, 2181, 2183, 2185, 2187,
+  2189, 2191, 2193, 2195, 2197, 2199, 2201, 2203,
+  2205, 2207, 2209, 2211, 2213, 2215, 2217, 2219,
+  2221, 2223, 2225, 2227, 2229, 2231, 2233, 2235,
+  2237, 2239, 2241, 2243, 2245, 2247, 2249, 2251,
+  2253, 2255, 2257, 2259, 2261, 2263, 2265, 2267,
+  2269, 2271, 2273, 2275, 2277, 2279, 2281, 2283,
+  2285, 2287, 2289, 2291, 2293, 2295, 2297, 2299,
+  2301, 2303, 2305, 2307, 2309, 2311, 2313, 2315,
+  2317, 2319, 2321, 2323, 2325, 2327, 2329, 2331,
+  2333, 2335, 2337, 2339, 2341, 2343, 2345, 2347,
+  2349, 2351, 2353, 2355, 2357, 2359, 2361, 2363,
+  2365, 2367, 2369, 2371, 2373, 2375, 2377, 2379,
+  2381, 2383, 2385, 2387, 2389, 2391, 2393, 2395,
+  2397, 2399, 2401, 2403, 2405, 2407, 2409, 2411,
+  2413, 2415, 2417, 2419, 2421, 2423, 2425, 2427,
+  2429, 2431, 2433, 2435, 2437, 2439, 2441, 2443,
+  2445, 2447, 2449, 2451, 2453, 2455, 2457, 2459,
+  2461, 2463, 2465, 2467, 2469, 2471, 2473, 2475,
+  2477, 2479, 2481, 2483, 2485, 2487, 2489, 2491,
+  2493, 2495, 2497, 2499, 2501, 2503, 2508, 2510,
+  2515, 2517, 2519, 2524, 2526, 2528, 2530, 2535,
+  2537, 2539, 2541, 2545, 2551, 2553, 2558, 2560,
+  2562, 2564, 2566, 2568, 2569, 2570, 2571, 2573,
+  2574, 2575, 2576, 2577, 2578, 2580, 2581, 2582,
+  2583, 2585, 2587, 2589, 2591, 2593, 2597, 2598,
+  2599, 2601, 2605, 2609, 2611, 2615, 2619, 2620,
+  2621, 2623, 2625, 2627, 2629, 2634, 2638, 2642,
+  2644, 2646, 2648, 2650, 2652, 2654, 2656, 2658,
   2660, 2662, 2664, 2666, 2668, 2670, 2672, 2674,
-  2676, 2678, 2680, 2682, 2684, 2686, 2688, 2690,
-  2692, 2694, 2696, 2698, 2700, 2702, 2704, 2705,
-  2706, 2708, 2710, 2711, 2712, 2715, 2718, 2721,
-  2724, 2726, 2728, 2730, 2732, 2734, 2736, 2737,
-  2738, 2739, 2741, 2745, 2747, 2749, 2755, 2759,
-  2760, 2761, 2762, 2763, 2764, 2765, 2766, 2770,
-  2772, 2774, 2778, 2780, 2782, 2784, 2786, 2788,
-  2790, 2792, 2794, 2796, 2798, 2800, 2802, 2804,
-  2806, 2807, 2810, 2813, 2818, 2823, 2826, 2829,
-  2832, 2835, 2840, 2845, 2848, 2851, 2853, 2855,
-  2857, 2859, 2861, 2863, 2865, 2866, 2868, 2870,
-  2872, 2874, 2876, 2877, 2878, 2879, 2883, 2887,
-  2889, 2893, 2897, 2901, 2905, 2909, 2911, 2915,
-  2917, 2919, 2921, 2923, 2925, 2927, 2929, 2931,
-  2932, 2934, 2936, 2938, 2940, 2942, 2944, 2946,
-  2948, 2949, 2950, 2951, 2953, 2955, 2957, 2959,
-  2960, 2961, 2963, 2965, 2967, 2969, 2971, 2973,
-  2974, 2976, 2978, 2980, 2982, 2983, 2984, 2986,
-  2988, 2990, 2992, 2994, 2996, 2998, 3000, 3001,
-  3002, 3004, 3005, 3008, 3011, 3013, 3016, 3017,
-  3018, 3020, 3021, 3023, 3025, 3027, 3029, 3031,
-  3032, 3033, 3034, 3035, 3036, 3039, 3044, 3049,
-  3054, 3059, 3062, 3067, 3072, 3074, 3076, 3078,
-  3080, 3081, 3082, 3084, 3086, 3088, 3090, 3092,
-  3094, 3096, 3097, 3098, 3099, 3100, 3101, 3102,
-  3107, 3112, 3113, 3114, 3115, 3116, 3117, 3118,
-  3119, 3120, 3121, 3122, 3123, 3124, 3125, 3126,
-  3127, 3128, 3129, 3130, 3131, 3132, 3133, 3134,
-  3135, 3136, 3137, 3138, 3139, 3140, 3141, 3142,
-  3143, 3144, 3145, 3146, 3147, 3148, 3149, 3150,
-  3151, 3152, 3153, 3154, 3155, 3156, 3157, 3158,
-  3159, 3160, 3161, 3162, 3163, 3164, 3165, 3166,
-  3167, 3168, 3169, 3170, 3171, 3172, 3173, 3174,
-  3175, 3176, 3177, 3178, 3179, 3180, 3181, 3182,
-  3183, 3184, 3185, 3186, 3187, 3188, 3189, 3190,
-  3191, 3192, 3193, 3194, 3195, 3196, 3197, 3198,
-  3199, 3200, 3201, 3202, 3203, 3204, 3205, 3206,
-  3207, 3208, 3209, 3210, 3211, 3212, 3213, 3214,
-  3215, 3216, 3217, 3218, 3219, 3220, 3221, 3222,
-  3223, 3224, 3225, 3226, 3227, 3228, 3229, 3230,
-  3231, 3232, 3233, 3234, 3235, 3236, 3237, 3238,
-  3239, 3240, 3241, 3242, 3243, 3244, 3245, 3246,
-  3247, 3248, 3249, 3250, 3251, 3252, 3253, 3254,
-  3255, 3256, 3257, 3258, 3259, 3260, 3261, 3262,
-  3263, 3264, 3265, 3266, 3267, 3268, 3269, 3270,
-  3271, 3272, 3273, 3274, 3275, 3276, 3277, 3278,
-  3279, 3280, 3281, 3282, 3283, 3284, 3285, 3286,
-  3287, 3288, 3289, 3290, 3291, 3292, 3293, 3294,
-  3295, 3296, 3297, 3298, 3299, 3300, 3301, 3302,
-  3303, 3304, 3305, 3306, 3307, 3308, 3309, 3310,
-  3311, 3312, 3313, 3315, 3317, 3318, 3319, 3320,
-  3321, 3322, 3323, 3324, 3325, 3326, 3327, 3328,
-  3329, 3330, 3331, 3332, 3333, 3334, 3335, 3336,
-  3337, 3338, 3339, 3340, 3341, 3342, 3343, 3344,
-  3345, 3347, 3349, 3351, 3353, 3354, 3355, 3356,
-  3357, 3358, 3359, 3360, 3361, 3362, 3363, 3364,
-  3365, 3366, 3368, 3369, 3370, 3371, 3373, 3374,
-  3375, 3376, 3377, 3378, 3379, 3380, 3381, 3382,
-  3383, 3384, 3385, 3386, 3387, 3388, 3389, 3390,
-  3391, 3392, 3393, 3394, 3395, 3396, 3397, 3398,
-  3399, 3400, 3401, 3402, 3403, 3404, 3405, 3406,
-  3407, 3408, 3409, 3410, 3411, 3412, 3413, 3414,
-  3416, 3418, 3419, 3420, 3422, 3423, 3425, 3427,
-  3428, 3429, 3431, 3433, 3435, 3437, 3438, 3439,
-  3440, 3441, 3442, 3443, 3444, 3445, 3446, 3447,
-  3448, 3449, 3450, 3451, 3452, 3453, 3456, 3459,
-  3460, 3461, 3462, 3463, 3464, 3465, 3467, 3469,
-  3471, 3472, 3473, 3474, 3475, 3476, 3477, 3479,
-  3480, 3481, 3482, 3483, 3484, 3485, 3486, 3487,
-  3488, 3489, 3490, 3491, 3492, 3493, 3494, 3495,
-  3496, 3497, 3498, 3499, 3502, 3505, 3506, 3507,
-  3508, 3509, 3510, 3511, 3512, 3513, 3514, 3515,
-  3516, 3517, 3518, 3519, 3520, 3521, 3522, 3523,
-  3524, 3525, 3526, 3527, 3528, 3529, 3530, 3531,
-  3532, 3533, 3534, 3535, 3536, 3537, 3538, 3539,
-  3540, 3541, 3542, 3543, 3544, 3545, 3546, 3547,
-  3548, 3549, 3550, 3551, 3552, 3553, 3554, 3555,
-  3556, 3557, 3558, 3559, 3562, 3564, 3567, 3570,
-  3572, 3575, 3578, 3581, 3584, 3585, 3588, 3589,
-  3590, 3591, 3592, 3593, 3597, 3599, 3602, 3603,
-  3604, 3605, 3606, 3607, 3608, 3609, 3610, 3611,
-  3612, 3613, 3614, 3615, 3616, 3617, 3618, 3619,
-  3620, 3621, 3622, 3623, 3624, 3625, 3626, 3627,
-  3628, 3629, 3630, 3631, 3632, 3633, 3634, 3635,
-  3636, 3637, 3638, 3639, 3640, 3641, 3642, 3643,
-  3644, 3645, 3646, 3647, 3648, 3649, 3650, 3651,
-  3652, 3653, 3654, 3655, 3656, 3657, 3659, 3660,
-  3661, 3662, 3663, 3664, 3665, 3666, 3667, 3668,
-  3669, 3670, 3671, 3672, 3673, 3674, 3675, 3676,
-  3677, 3678, 3679, 3680, 3681, 3682, 3683, 3684,
-  3685, 3686, 3687, 3688, 3689, 3690, 3691, 3692,
-  3693, 3694, 3695, 3696, 3697, 3698, 3701, 3704,
-  3707, 3710, 3713, 3716, 3719, 3722, 3725, 3728,
-  3731, 3734, 3737, 3740, 3743, 3744, 3745, 3746,
-  3747, 3749, 3750, 3751, 3752, 3753, 3754, 3755,
-  3756, 3757, 3758, 3759, 3760, 3761, 3762, 3763,
-  3764, 3765, 3766, 3767, 3768, 3769, 3770, 3771,
-  3772, 3773, 3774, 3775, 3776, 3777, 3778, 3779,
-  3780, 3781, 3782, 3783, 3784, 3785, 3786, 3787,
-  3788, 3789, 3790, 3791, 3792, 3793, 3794, 3795,
-  3796, 3797, 3798, 3799, 3800, 3801, 3802, 3803,
-  3804, 3805, 3806, 3807, 3808, 3809, 3810, 3813,
-  3816, 3817, 3818, 3819, 3820, 3821, 3822, 3823,
-  3824, 3825, 3826, 3827, 3828, 3829, 3830, 3831,
-  3832, 3833, 3834, 3835, 3836, 3837, 3838, 3839,
-  3840, 3841, 3842, 3843, 3844, 3845, 3846, 3847,
-  3848, 3849, 3850, 3851, 3852, 3853, 3854, 3855,
-  3856, 3857, 3858, 3859, 3860, 3861, 3862, 3863,
-  3864, 3865, 3866, 3867, 3868, 3869, 3870, 3871,
-  3872, 3873, 3874, 3875, 3876, 3877, 3878, 3881,
-  3884, 3887, 3888, 3889, 3890, 3891, 3892, 3893,
-  3894, 3895, 3896, 3897, 3898, 3899, 3900, 3901,
-  3902, 3903, 3906, 3909, 3910, 3911, 3914, 3915,
-  3916, 3917, 3918, 3921, 3924, 3927, 3928, 3929,
-  3930, 3931, 3932, 3933, 3934, 3935, 3936, 3937,
-  3939, 3941, 3942, 3943, 3944, 3945, 3946, 3947,
-  3948, 3949, 3950, 3951, 3952, 3953, 3954, 3955,
-  3956, 3957, 3958, 3959, 3960, 3961, 3962, 3963,
-  3964, 3965, 3966, 3968, 3970, 3971, 3972, 3973,
-  3974, 3975, 3976, 3977, 3978, 3979, 3980, 3981,
-  3982, 3983, 3984, 3985, 3986, 3987, 3988, 3989,
-  3990, 3991, 3992, 3993, 3994, 3995, 3997, 3999,
-  4001, 4003, 4004, 4005, 4006, 4007, 4008, 4009,
-  4010, 4011, 4012, 4013, 4014, 4015, 4016, 4017,
-  4018, 4020, 4021, 4023, 4026, 4028, 4029, 4030,
-  4032, 4034, 4035, 4036, 4037, 4038, 4039, 4040,
-  4042, 4044, 4046, 4048, 4049, 4050, 4051, 4052,
-  4053, 4054, 4055, 4056, 4057, 4059, 4061, 4062,
-  4064, 4066, 4067, 4072, 4074, 4076, 4077, 4078,
-  4079, 4080, 4081, 4082, 4083, 4085, 4087, 4088,
-  4089, 4090, 4092, 4095, 4098, 4101, 4103, 4104,
-  4105, 4106, 4107, 4108, 4109, 4110, 4111, 4112,
-  4113, 4114, 4115, 4116, 4117, 4118, 4119, 4120,
-  4121, 4122, 4123, 4124, 4125, 4126, 4127, 4128,
-  4129, 4130, 4131, 4132, 4133, 4134, 4135, 4136,
-  4137, 4138, 4139, 4140, 4141, 4142, 4143, 4144,
-  4145, 4146, 4147, 4148, 4149, 4150, 4151, 4152,
-  4153, 4154, 4155, 4156, 4157, 4158, 4159, 4160,
-  4161, 4162, 4163, 4164, 4165, 4166, 4167, 4168,
-  4169, 4170, 4171, 4172, 4173, 4174, 4175, 4176,
-  4177, 4178, 4179, 4180, 4181, 4182, 4183, 4184,
-  4185, 4186, 4187, 4188, 4189, 4190, 4191, 4192,
-  4193, 4194, 4195, 4196, 4197, 4198, 4199, 4200,
-  4201, 4202, 4203, 4204, 4205, 4206, 4207, 4208,
-  4209, 4210, 4211, 4212, 4213, 4214, 4215, 4216,
-  4217, 4218, 4219, 4220, 4221, 4222, 4223, 4224,
-  4225, 4226, 4227, 4228, 4229, 4230, 4231, 4232,
-  4233, 4234, 4235, 4236, 4237, 4238, 4239, 4240,
-  4241, 4242, 4243, 4244, 4245, 4248, 4249, 4250,
-  4253, 4254, 4255, 4257, 4258, 4259, 4260, 4262,
-  4263, 4264, 4265, 4267, 4268, 4269, 4270, 4273,
-  4274, 4275, 4276, 4277, 4280, 4283, 4286, 4289,
-  4292, 4293, 4294, 4295, 4296, 4298, 4300, 4301,
-  4302, 4303, 4306, 4309, 4312, 4315, 4318, 4319,
-  4320, 4321, 4323, 4324, 4325, 4326, 4328, 4329,
-  4330, 4331, 4332, 4333, 4334, 4335, 4336, 4337,
-  4338, 4339, 4340, 4341, 4342, 4343, 4344, 4345,
-  4346, 4347, 4348, 4349, 4350, 4351, 4352, 4353,
-  4354, 4355, 4356, 4357, 4358, 4359, 4360, 4361,
-  4362, 4363, 4364, 4365, 4366, 4367, 4369, 4371,
-  4373, 4375, 4377, 4378, 4379, 4382, 4385, 4386,
-  4387, 4388, 4389
+  2676, 2678, 2680, 2682, 2684, 2685, 2686, 2688,
+  2690, 2691, 2692, 2695, 2698, 2701, 2704, 2706,
+  2708, 2710, 2712, 2714, 2716, 2717, 2718, 2719,
+  2721, 2725, 2727, 2729, 2735, 2739, 2740, 2741,
+  2742, 2743, 2744, 2745, 2746, 2750, 2752, 2754,
+  2758, 2760, 2762, 2764, 2766, 2768, 2770, 2772,
+  2774, 2776, 2778, 2780, 2782, 2784, 2786, 2787,
+  2790, 2793, 2796, 2799, 2804, 2809, 2814, 2819,
+  2822, 2825, 2828, 2831, 2833, 2835, 2837, 2839,
+  2841, 2843, 2845, 2846, 2848, 2850, 2852, 2854,
+  2856, 2857, 2858, 2859, 2863, 2867, 2869, 2873,
+  2877, 2881, 2885, 2889, 2891, 2895, 2897, 2899,
+  2901, 2903, 2905, 2907, 2909, 2911, 2912, 2914,
+  2916, 2918, 2920, 2922, 2924, 2926, 2928, 2929,
+  2930, 2931, 2932, 2933, 2934, 2935, 2936, 2937,
+  2939, 2941, 2943, 2945, 2947, 2949, 2950, 2951,
+  2952, 2954, 2956, 2958, 2960, 2962, 2964, 2965,
+  2966, 2967, 2968, 2971, 2974, 2976, 2979, 2980,
+  2981, 2983, 2984, 2986, 2987, 2988, 2990, 2992,
+  2993, 2994, 2995, 2996, 2997, 3000, 3005, 3010,
+  3015, 3020, 3023, 3028, 3033, 3035, 3037, 3039,
+  3041, 3042, 3043, 3045, 3047, 3049, 3051, 3053,
+  3055, 3057, 3058, 3059, 3060, 3061, 3062, 3063,
+  3068, 3073, 3074, 3075, 3076, 3077, 3078, 3079,
+  3080, 3081, 3082, 3083, 3084, 3085, 3086, 3087,
+  3088, 3089, 3090, 3091, 3092, 3093, 3094, 3095,
+  3096, 3097, 3098, 3099, 3100, 3101, 3102, 3103,
+  3104, 3105, 3106, 3107, 3108, 3109, 3110, 3111,
+  3112, 3113, 3114, 3115, 3116, 3117, 3118, 3119,
+  3120, 3121, 3122, 3123, 3124, 3125, 3126, 3127,
+  3128, 3129, 3130, 3131, 3132, 3133, 3134, 3135,
+  3136, 3137, 3138, 3139, 3140, 3141, 3142, 3143,
+  3144, 3145, 3146, 3147, 3148, 3149, 3150, 3151,
+  3152, 3153, 3154, 3155, 3156, 3157, 3158, 3159,
+  3160, 3161, 3162, 3163, 3164, 3165, 3166, 3167,
+  3168, 3169, 3170, 3171, 3172, 3173, 3174, 3175,
+  3176, 3177, 3178, 3179, 3180, 3181, 3182, 3183,
+  3184, 3185, 3186, 3187, 3188, 3189, 3190, 3191,
+  3192, 3193, 3194, 3195, 3196, 3197, 3198, 3199,
+  3200, 3201, 3202, 3203, 3204, 3205, 3206, 3207,
+  3208, 3209, 3210, 3211, 3212, 3213, 3214, 3215,
+  3216, 3217, 3218, 3219, 3220, 3221, 3222, 3223,
+  3224, 3225, 3226, 3227, 3228, 3229, 3230, 3231,
+  3232, 3233, 3234, 3235, 3236, 3237, 3238, 3239,
+  3240, 3241, 3242, 3243, 3244, 3245, 3246, 3247,
+  3248, 3249, 3250, 3251, 3252, 3253, 3254, 3255,
+  3256, 3257, 3258, 3259, 3260, 3261, 3262, 3263,
+  3264, 3265, 3266, 3267, 3268, 3269, 3270, 3271,
+  3272, 3273, 3274, 3276, 3278, 3279, 3280, 3281,
+  3282, 3283, 3284, 3285, 3286, 3287, 3288, 3289,
+  3290, 3291, 3292, 3293, 3294, 3295, 3296, 3297,
+  3298, 3299, 3300, 3301, 3302, 3303, 3304, 3305,
+  3306, 3308, 3310, 3312, 3314, 3315, 3316, 3317,
+  3318, 3319, 3320, 3321, 3322, 3323, 3324, 3325,
+  3326, 3327, 3329, 3330, 3331, 3332, 3334, 3335,
+  3336, 3337, 3338, 3339, 3340, 3341, 3342, 3343,
+  3344, 3345, 3346, 3347, 3348, 3349, 3350, 3351,
+  3352, 3353, 3354, 3355, 3356, 3357, 3358, 3359,
+  3360, 3361, 3362, 3363, 3364, 3365, 3366, 3367,
+  3368, 3369, 3370, 3371, 3372, 3373, 3374, 3375,
+  3377, 3379, 3380, 3381, 3383, 3384, 3386, 3388,
+  3389, 3390, 3392, 3394, 3396, 3398, 3399, 3400,
+  3401, 3402, 3403, 3404, 3405, 3406, 3407, 3408,
+  3409, 3410, 3411, 3412, 3413, 3414, 3417, 3420,
+  3421, 3422, 3423, 3424, 3425, 3426, 3428, 3430,
+  3432, 3433, 3434, 3435, 3436, 3437, 3438, 3440,
+  3441, 3442, 3443, 3444, 3445, 3446, 3447, 3448,
+  3449, 3450, 3451, 3452, 3453, 3454, 3455, 3456,
+  3457, 3458, 3459, 3460, 3463, 3466, 3467, 3468,
+  3469, 3470, 3471, 3472, 3473, 3474, 3475, 3476,
+  3477, 3478, 3479, 3480, 3481, 3482, 3483, 3484,
+  3485, 3486, 3487, 3488, 3489, 3490, 3491, 3492,
+  3493, 3494, 3495, 3496, 3497, 3498, 3499, 3500,
+  3501, 3502, 3503, 3504, 3505, 3506, 3507, 3508,
+  3509, 3510, 3511, 3512, 3513, 3514, 3515, 3516,
+  3517, 3518, 3519, 3520, 3521, 3522, 3523, 3524,
+  3527, 3529, 3532, 3535, 3537, 3540, 3543, 3546,
+  3549, 3550, 3553, 3554, 3555, 3556, 3557, 3558,
+  3562, 3564, 3567, 3568, 3569, 3570, 3571, 3572,
+  3573, 3574, 3575, 3576, 3577, 3578, 3579, 3580,
+  3581, 3582, 3583, 3584, 3585, 3586, 3587, 3588,
+  3589, 3590, 3591, 3592, 3593, 3594, 3595, 3596,
+  3597, 3598, 3599, 3600, 3601, 3602, 3603, 3604,
+  3605, 3606, 3607, 3608, 3609, 3610, 3611, 3612,
+  3613, 3614, 3615, 3616, 3617, 3618, 3620, 3621,
+  3622, 3623, 3624, 3625, 3626, 3627, 3628, 3629,
+  3630, 3631, 3632, 3633, 3634, 3635, 3636, 3637,
+  3638, 3639, 3640, 3641, 3642, 3643, 3644, 3645,
+  3646, 3647, 3648, 3649, 3650, 3651, 3652, 3653,
+  3654, 3655, 3656, 3657, 3658, 3659, 3662, 3665,
+  3668, 3671, 3674, 3677, 3680, 3683, 3686, 3689,
+  3692, 3695, 3698, 3701, 3704, 3705, 3706, 3707,
+  3708, 3710, 3711, 3712, 3713, 3714, 3715, 3716,
+  3717, 3718, 3719, 3720, 3721, 3722, 3723, 3724,
+  3725, 3726, 3727, 3728, 3729, 3730, 3731, 3732,
+  3733, 3734, 3735, 3736, 3737, 3738, 3739, 3740,
+  3741, 3742, 3743, 3744, 3745, 3746, 3747, 3748,
+  3749, 3750, 3751, 3752, 3753, 3754, 3755, 3756,
+  3757, 3758, 3759, 3760, 3761, 3762, 3763, 3764,
+  3765, 3766, 3767, 3768, 3769, 3770, 3771, 3774,
+  3777, 3778, 3779, 3780, 3781, 3782, 3783, 3784,
+  3785, 3786, 3787, 3788, 3789, 3790, 3791, 3792,
+  3793, 3794, 3795, 3796, 3797, 3798, 3799, 3800,
+  3801, 3802, 3803, 3804, 3805, 3806, 3807, 3808,
+  3809, 3810, 3811, 3812, 3813, 3814, 3815, 3816,
+  3817, 3818, 3819, 3820, 3821, 3822, 3823, 3824,
+  3825, 3826, 3827, 3828, 3829, 3830, 3831, 3832,
+  3833, 3834, 3835, 3836, 3837, 3838, 3839, 3842,
+  3845, 3848, 3849, 3850, 3851, 3852, 3853, 3854,
+  3855, 3856, 3857, 3858, 3859, 3860, 3861, 3862,
+  3863, 3864, 3867, 3870, 3871, 3872, 3875, 3876,
+  3877, 3878, 3879, 3882, 3885, 3888, 3889, 3890,
+  3891, 3892, 3893, 3894, 3895, 3896, 3897, 3898,
+  3900, 3902, 3903, 3904, 3905, 3906, 3907, 3908,
+  3909, 3910, 3911, 3912, 3913, 3914, 3915, 3916,
+  3917, 3918, 3919, 3920, 3921, 3922, 3923, 3924,
+  3925, 3926, 3927, 3929, 3931, 3932, 3933, 3934,
+  3935, 3936, 3937, 3938, 3939, 3940, 3941, 3942,
+  3943, 3944, 3945, 3946, 3947, 3948, 3949, 3950,
+  3951, 3952, 3953, 3954, 3955, 3956, 3958, 3960,
+  3962, 3964, 3966, 3968, 3970, 3972, 3974, 3976,
+  3978, 3980, 3982, 3984, 3986, 3988, 3989, 3990,
+  3991, 3993, 3994, 3996, 3999, 4001, 4002, 4003,
+  4005, 4007, 4008, 4009, 4010, 4011, 4012, 4013,
+  4015, 4017, 4019, 4021, 4022, 4023, 4024, 4025,
+  4026, 4027, 4028, 4029, 4030, 4032, 4034, 4035,
+  4037, 4039, 4040, 4045, 4047, 4049, 4050, 4051,
+  4052, 4053, 4054, 4055, 4056, 4058, 4060, 4061,
+  4062, 4063, 4065, 4068, 4071, 4074, 4076, 4077,
+  4078, 4079, 4080, 4081, 4082, 4083, 4084, 4085,
+  4086, 4087, 4088, 4089, 4090, 4091, 4092, 4093,
+  4094, 4095, 4096, 4097, 4098, 4099, 4100, 4101,
+  4102, 4103, 4104, 4105, 4106, 4107, 4108, 4109,
+  4110, 4111, 4112, 4113, 4114, 4115, 4116, 4117,
+  4118, 4119, 4120, 4121, 4122, 4123, 4124, 4125,
+  4126, 4127, 4128, 4129, 4130, 4131, 4132, 4133,
+  4134, 4135, 4136, 4137, 4138, 4139, 4140, 4141,
+  4142, 4143, 4144, 4145, 4146, 4147, 4148, 4149,
+  4150, 4151, 4152, 4153, 4154, 4155, 4156, 4157,
+  4158, 4159, 4160, 4161, 4162, 4163, 4164, 4165,
+  4166, 4167, 4168, 4169, 4170, 4171, 4172, 4173,
+  4174, 4175, 4176, 4177, 4178, 4179, 4180, 4181,
+  4182, 4183, 4184, 4185, 4186, 4187, 4188, 4189,
+  4190, 4191, 4192, 4193, 4194, 4195, 4196, 4197,
+  4198, 4199, 4200, 4201, 4202, 4203, 4204, 4205,
+  4206, 4207, 4208, 4209, 4210, 4211, 4212, 4213,
+  4214, 4215, 4216, 4217, 4218, 4221, 4222, 4223,
+  4226, 4227, 4228, 4230, 4231, 4232, 4233, 4235,
+  4236, 4237, 4238, 4240, 4241, 4242, 4243, 4246,
+  4247, 4248, 4249, 4250, 4253, 4256, 4259, 4262,
+  4265, 4266, 4267, 4268, 4269, 4271, 4273, 4274,
+  4275, 4276, 4279, 4282, 4285, 4288, 4291, 4292,
+  4293, 4294, 4296, 4297, 4298, 4299, 4301, 4302,
+  4303, 4304, 4305, 4306, 4307, 4308, 4309, 4310,
+  4311, 4312, 4313, 4314, 4315, 4316, 4317, 4318,
+  4319, 4320, 4321, 4322, 4323, 4324, 4325, 4326,
+  4327, 4328, 4329, 4330, 4331, 4332, 4333, 4334,
+  4335, 4336, 4337, 4338, 4339, 4340, 4342, 4344,
+  4346, 4348, 4350, 4351, 4352, 4355, 4358, 4359,
+  4360, 4361, 4362, 4363
 };
 
 /* i386 mnemonics table.  */
@@ -48080,6 +47826,7 @@ const char i386_mnemonics[] =
   "\0""vshufps"
   "\0""vunpckhps"
   "\0""vmovlhps"
+  "\0""vdpphps"
   "\0""vmovhps"
   "\0""vmovmskps"
   "\0""vmovhlps"
@@ -48674,99 +48421,99 @@ static const reg_entry i386_regtab[] =
   { "r8b",
     { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0,
 	0, 0, 0, 0, 0, 0 } },
-    RegRex|RegRex64, 0, { Dw2Inval, Dw2Inval } },
+    RegRex, 0, { Dw2Inval, Dw2Inval } },
   { "r9b",
     { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0,
 	0, 0, 0, 0, 0, 0 } },
-    RegRex|RegRex64, 1, { Dw2Inval, Dw2Inval } },
+    RegRex, 1, { Dw2Inval, Dw2Inval } },
   { "r10b",
     { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0,
 	0, 0, 0, 0, 0, 0 } },
-    RegRex|RegRex64, 2, { Dw2Inval, Dw2Inval } },
+    RegRex, 2, { Dw2Inval, Dw2Inval } },
   { "r11b",
     { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0,
 	0, 0, 0, 0, 0, 0 } },
-    RegRex|RegRex64, 3, { Dw2Inval, Dw2Inval } },
+    RegRex, 3, { Dw2Inval, Dw2Inval } },
   { "r12b",
     { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0,
 	0, 0, 0, 0, 0, 0 } },
-    RegRex|RegRex64, 4, { Dw2Inval, Dw2Inval } },
+    RegRex, 4, { Dw2Inval, Dw2Inval } },
   { "r13b",
     { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0,
 	0, 0, 0, 0, 0, 0 } },
-    RegRex|RegRex64, 5, { Dw2Inval, Dw2Inval } },
+    RegRex, 5, { Dw2Inval, Dw2Inval } },
   { "r14b",
     { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0,
 	0, 0, 0, 0, 0, 0 } },
-    RegRex|RegRex64, 6, { Dw2Inval, Dw2Inval } },
+    RegRex, 6, { Dw2Inval, Dw2Inval } },
   { "r15b",
     { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0,
 	0, 0, 0, 0, 0, 0 } },
-    RegRex|RegRex64, 7, { Dw2Inval, Dw2Inval } },
+    RegRex, 7, { Dw2Inval, Dw2Inval } },
   { "r16b",
     { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0,
 	0, 0, 0, 0, 0, 0 } },
-    RegRex2|RegRex64, 0, { Dw2Inval, Dw2Inval } },
+    RegRex2, 0, { Dw2Inval, Dw2Inval } },
   { "r17b",
     { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0,
 	0, 0, 0, 0, 0, 0 } },
-    RegRex2|RegRex64, 1, { Dw2Inval, Dw2Inval } },
+    RegRex2, 1, { Dw2Inval, Dw2Inval } },
   { "r18b",
     { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0,
 	0, 0, 0, 0, 0, 0 } },
-    RegRex2|RegRex64, 2, { Dw2Inval, Dw2Inval } },
+    RegRex2, 2, { Dw2Inval, Dw2Inval } },
   { "r19b",
     { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0,
 	0, 0, 0, 0, 0, 0 } },
-    RegRex2|RegRex64, 3, { Dw2Inval, Dw2Inval } },
+    RegRex2, 3, { Dw2Inval, Dw2Inval } },
   { "r20b",
     { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0,
 	0, 0, 0, 0, 0, 0 } },
-    RegRex2|RegRex64, 4, { Dw2Inval, Dw2Inval } },
+    RegRex2, 4, { Dw2Inval, Dw2Inval } },
   { "r21b",
     { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0,
 	0, 0, 0, 0, 0, 0 } },
-    RegRex2|RegRex64, 5, { Dw2Inval, Dw2Inval } },
+    RegRex2, 5, { Dw2Inval, Dw2Inval } },
   { "r22b",
     { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0,
 	0, 0, 0, 0, 0, 0 } },
-    RegRex2|RegRex64, 6, { Dw2Inval, Dw2Inval } },
+    RegRex2, 6, { Dw2Inval, Dw2Inval } },
   { "r23b",
     { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0,
 	0, 0, 0, 0, 0, 0 } },
-    RegRex2|RegRex64, 7, { Dw2Inval, Dw2Inval } },
+    RegRex2, 7, { Dw2Inval, Dw2Inval } },
   { "r24b",
     { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0,
 	0, 0, 0, 0, 0, 0 } },
-    RegRex2|RegRex64|RegRex, 0, { Dw2Inval, Dw2Inval } },
+    RegRex2|RegRex, 0, { Dw2Inval, Dw2Inval } },
   { "r25b",
     { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0,
 	0, 0, 0, 0, 0, 0 } },
-    RegRex2|RegRex64|RegRex, 1, { Dw2Inval, Dw2Inval } },
+    RegRex2|RegRex, 1, { Dw2Inval, Dw2Inval } },
   { "r26b",
     { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0,
 	0, 0, 0, 0, 0, 0 } },
-    RegRex2|RegRex64|RegRex, 2, { Dw2Inval, Dw2Inval } },
+    RegRex2|RegRex, 2, { Dw2Inval, Dw2Inval } },
   { "r27b",
     { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0,
 	0, 0, 0, 0, 0, 0 } },
-    RegRex2|RegRex64|RegRex, 3, { Dw2Inval, Dw2Inval } },
+    RegRex2|RegRex, 3, { Dw2Inval, Dw2Inval } },
   { "r28b",
     { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0,
 	0, 0, 0, 0, 0, 0 } },
-    RegRex2|RegRex64|RegRex, 4, { Dw2Inval, Dw2Inval } },
+    RegRex2|RegRex, 4, { Dw2Inval, Dw2Inval } },
   { "r29b",
     { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0,
 	0, 0, 0, 0, 0, 0 } },
-    RegRex2|RegRex64|RegRex, 5, { Dw2Inval, Dw2Inval } },
+    RegRex2|RegRex, 5, { Dw2Inval, Dw2Inval } },
   { "r30b",
     { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0,
 	0, 0, 0, 0, 0, 0 } },
-    RegRex2|RegRex64|RegRex, 6, { Dw2Inval, Dw2Inval } },
+    RegRex2|RegRex, 6, { Dw2Inval, Dw2Inval } },
   { "r31b",
     { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0,
 	0, 0, 0, 0, 0, 0 } },
-    RegRex2|RegRex64|RegRex, 7, { Dw2Inval, Dw2Inval } },
+    RegRex2|RegRex, 7, { Dw2Inval, Dw2Inval } },
   { "ax",
     { { 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0,
 	0, 0, 0, 0, 0, 0 } },
diff --git a/opcodes/m68k-dis.c b/opcodes/m68k-dis.c
index bc2f820..7e9b087 100644
--- a/opcodes/m68k-dis.c
+++ b/opcodes/m68k-dis.c
@@ -991,6 +991,8 @@ print_insn_arg (const char *d,
       else
 	return PRINT_INSN_ARG_INVALID_OP_TABLE;
 
+      info->target = addr + disp;
+
       (*info->print_address_func) (addr + disp, info);
       break;
 
@@ -1442,6 +1444,27 @@ print_insn_arg (const char *d,
   return p - p0;
 }
 
+/* Return the insn type determined from the opcode information.  */
+
+static enum dis_insn_type
+m68k_opcode_to_insn_type (const struct m68k_opcode *opc)
+{
+  /* All branches have an operand in 'B' format (the 'B' place only comes
+     with the 'B' format).  */
+  if (strchr (opc->args, 'B') == NULL)
+    return dis_nonbranch;
+
+  /* Most branches are conditional branches, detect the ones that aren't
+     from the opcode name.  */
+  if (strncmp (opc->name, "bra", 3) == 0)
+    return dis_branch;
+
+  if (strncmp (opc->name, "bsr", 3) == 0)
+    return dis_jsr;
+
+  return dis_condbranch;
+}
+
 /* Try to match the current instruction to best and if so, return the
    number of bytes consumed from the instruction stream, else zero.
    Return -1 on memory error.  */
@@ -1573,6 +1596,7 @@ match_insn_m68k (bfd_vma memaddr,
   p = save_p;
   info->fprintf_styled_func = save_printer;
   info->print_address_func = save_print_address;
+  info->insn_type = m68k_opcode_to_insn_type (best);
 
   d = args;
 
@@ -1730,6 +1754,7 @@ print_insn_m68k (bfd_vma memaddr, disassemble_info *info)
 
   bfd_byte *buffer = priv.the_buffer;
 
+  info->insn_info_valid = 1;
   info->private_data = & priv;
   /* Tell objdump to use two bytes per chunk
      and six bytes per line for displaying raw data.  */
@@ -1761,6 +1786,8 @@ print_insn_m68k (bfd_vma memaddr, disassemble_info *info)
       info->fprintf_styled_func (info->stream, dis_style_text, " ");
       info->fprintf_styled_func (info->stream, dis_style_immediate,
 				 "0x%04x", (buffer[0] << 8) + buffer[1]);
+
+      info->insn_type = dis_noninsn;
     }
 
   return val ? val : 2;
diff --git a/opcodes/riscv-dis.c b/opcodes/riscv-dis.c
index 9c5e6ce..551d57e 100644
--- a/opcodes/riscv-dis.c
+++ b/opcodes/riscv-dis.c
@@ -285,6 +285,17 @@ riscv_get_spimm (insn_t l)
   return spimm;
 }
 
+/* Get s-register regno by using sreg number.
+   e.g. the regno of s0 is 8, so
+   riscv_zcmp_get_sregno (0) equals 8.  */
+
+static unsigned
+riscv_zcmp_get_sregno (unsigned sreg_idx)
+{
+  return sreg_idx > 1 ?
+      sreg_idx + 16 : sreg_idx + 8;
+}
+
 /* Print insn arguments for 32/64-bit code.  */
 
 static void
@@ -698,6 +709,14 @@ print_insn_args (const char *oparg, insn_t l, bfd_vma pc, disassemble_info *info
 	    case 'c': /* Zcb extension 16 bits length instruction fields. */
 	      switch (*++oparg)
 		{
+		case '1':
+		    print (info->stream, dis_style_register, "%s",
+		      riscv_gpr_names[riscv_zcmp_get_sregno (EXTRACT_OPERAND (SREG1, l))]);
+		    break;
+		case '2':
+		    print (info->stream, dis_style_register, "%s",
+		      riscv_gpr_names[riscv_zcmp_get_sregno (EXTRACT_OPERAND (SREG2, l))]);
+		    break;
 		case 'b':
 		  print (info->stream, dis_style_immediate, "%d",
 			 (int)EXTRACT_ZCB_BYTE_UIMM (l));
@@ -803,6 +822,23 @@ print_insn_args (const char *oparg, insn_t l, bfd_vma pc, disassemble_info *info
 		    print (info->stream, dis_style_immediate, "%d",
 			   ((int) EXTRACT_CV_BI_IMM5 (l)));
 		    break;
+		  case '5':
+		    print (info->stream, dis_style_immediate, "%d",
+			   ((int) EXTRACT_CV_SIMD_IMM6 (l)));
+		    break;
+		  case '6':
+		    print (info->stream, dis_style_immediate, "%d",
+			   ((int) EXTRACT_CV_BITMANIP_UIMM5 (l)));
+		    break;
+		  case '7':
+		    print (info->stream, dis_style_immediate, "%d",
+			   ((int) EXTRACT_CV_BITMANIP_UIMM2 (l)));
+		    break;
+		  case '8':
+		    print (info->stream, dis_style_immediate, "%d",
+			   ((int) EXTRACT_CV_SIMD_UIMM6 (l)));
+		    ++oparg;
+		    break;
 		  default:
 		    goto undefined_modifier;
 		}
@@ -994,7 +1030,7 @@ riscv_disassemble_insn (bfd_vma memaddr,
     {
       i -= 2;
       word = bfd_get_bits (packet + i, 16, false);
-      if (!word && !printed)
+      if (!word && !printed && i)
 	continue;
 
       (*info->fprintf_styled_func) (info->stream, dis_style_immediate,
diff --git a/opcodes/riscv-opc.c b/opcodes/riscv-opc.c
index 14ec290..8d5c574 100644
--- a/opcodes/riscv-opc.c
+++ b/opcodes/riscv-opc.c
@@ -355,6 +355,13 @@ match_th_load_pair(const struct riscv_opcode *op,
   return rd1 != rd2 && rd1 != rs && rd2 != rs && match_opcode (op, insn);
 }
 
+static int
+match_sreg1_not_eq_sreg2 (const struct riscv_opcode *op, insn_t insn)
+{
+  return match_opcode (op, insn)
+      && (EXTRACT_OPERAND (SREG1, insn) != EXTRACT_OPERAND (SREG2, insn));
+}
+
 /* The order of overloaded instructions matters.  Label arguments and
    register arguments look the same. Instructions that can have either
    for arguments must apear in the correct order in this table for the
@@ -1124,6 +1131,48 @@ const struct riscv_opcode riscv_opcodes[] =
 {"czero.eqz",  0, INSN_CLASS_ZICOND, "d,s,t", MATCH_CZERO_EQZ, MASK_CZERO_EQZ, match_opcode, 0 },
 {"czero.nez",  0, INSN_CLASS_ZICOND, "d,s,t", MATCH_CZERO_NEZ, MASK_CZERO_NEZ, match_opcode, 0 },
 
+/* Zimop instructions.  */
+{"mop.r.0",    0, INSN_CLASS_ZIMOP, "d,s",    MATCH_MOP_R_0,  MASK_MOP_R_0,  match_opcode, 0 },
+{"mop.r.1",    0, INSN_CLASS_ZIMOP, "d,s",    MATCH_MOP_R_1,  MASK_MOP_R_1,  match_opcode, 0 },
+{"mop.r.2",    0, INSN_CLASS_ZIMOP, "d,s",    MATCH_MOP_R_2,  MASK_MOP_R_2,  match_opcode, 0 },
+{"mop.r.3",    0, INSN_CLASS_ZIMOP, "d,s",    MATCH_MOP_R_3,  MASK_MOP_R_3,  match_opcode, 0 },
+{"mop.r.4",    0, INSN_CLASS_ZIMOP, "d,s",    MATCH_MOP_R_4,  MASK_MOP_R_4,  match_opcode, 0 },
+{"mop.r.5",    0, INSN_CLASS_ZIMOP, "d,s",    MATCH_MOP_R_5,  MASK_MOP_R_5,  match_opcode, 0 },
+{"mop.r.6",    0, INSN_CLASS_ZIMOP, "d,s",    MATCH_MOP_R_6,  MASK_MOP_R_6,  match_opcode, 0 },
+{"mop.r.7",    0, INSN_CLASS_ZIMOP, "d,s",    MATCH_MOP_R_7,  MASK_MOP_R_7,  match_opcode, 0 },
+{"mop.r.8",    0, INSN_CLASS_ZIMOP, "d,s",    MATCH_MOP_R_8,  MASK_MOP_R_8,  match_opcode, 0 },
+{"mop.r.9",    0, INSN_CLASS_ZIMOP, "d,s",    MATCH_MOP_R_9,  MASK_MOP_R_9,  match_opcode, 0 },
+{"mop.r.10",   0, INSN_CLASS_ZIMOP, "d,s",    MATCH_MOP_R_10, MASK_MOP_R_10, match_opcode, 0 },
+{"mop.r.11",   0, INSN_CLASS_ZIMOP, "d,s",    MATCH_MOP_R_11, MASK_MOP_R_11, match_opcode, 0 },
+{"mop.r.12",   0, INSN_CLASS_ZIMOP, "d,s",    MATCH_MOP_R_12, MASK_MOP_R_12, match_opcode, 0 },
+{"mop.r.13",   0, INSN_CLASS_ZIMOP, "d,s",    MATCH_MOP_R_13, MASK_MOP_R_13, match_opcode, 0 },
+{"mop.r.14",   0, INSN_CLASS_ZIMOP, "d,s",    MATCH_MOP_R_14, MASK_MOP_R_14, match_opcode, 0 },
+{"mop.r.15",   0, INSN_CLASS_ZIMOP, "d,s",    MATCH_MOP_R_15, MASK_MOP_R_15, match_opcode, 0 },
+{"mop.r.16",   0, INSN_CLASS_ZIMOP, "d,s",    MATCH_MOP_R_16, MASK_MOP_R_16, match_opcode, 0 },
+{"mop.r.17",   0, INSN_CLASS_ZIMOP, "d,s",    MATCH_MOP_R_17, MASK_MOP_R_17, match_opcode, 0 },
+{"mop.r.18",   0, INSN_CLASS_ZIMOP, "d,s",    MATCH_MOP_R_18, MASK_MOP_R_18, match_opcode, 0 },
+{"mop.r.19",   0, INSN_CLASS_ZIMOP, "d,s",    MATCH_MOP_R_19, MASK_MOP_R_19, match_opcode, 0 },
+{"mop.r.20",   0, INSN_CLASS_ZIMOP, "d,s",    MATCH_MOP_R_20, MASK_MOP_R_20, match_opcode, 0 },
+{"mop.r.21",   0, INSN_CLASS_ZIMOP, "d,s",    MATCH_MOP_R_21, MASK_MOP_R_21, match_opcode, 0 },
+{"mop.r.22",   0, INSN_CLASS_ZIMOP, "d,s",    MATCH_MOP_R_22, MASK_MOP_R_22, match_opcode, 0 },
+{"mop.r.23",   0, INSN_CLASS_ZIMOP, "d,s",    MATCH_MOP_R_23, MASK_MOP_R_23, match_opcode, 0 },
+{"mop.r.24",   0, INSN_CLASS_ZIMOP, "d,s",    MATCH_MOP_R_24, MASK_MOP_R_24, match_opcode, 0 },
+{"mop.r.25",   0, INSN_CLASS_ZIMOP, "d,s",    MATCH_MOP_R_25, MASK_MOP_R_25, match_opcode, 0 },
+{"mop.r.26",   0, INSN_CLASS_ZIMOP, "d,s",    MATCH_MOP_R_26, MASK_MOP_R_26, match_opcode, 0 },
+{"mop.r.27",   0, INSN_CLASS_ZIMOP, "d,s",    MATCH_MOP_R_27, MASK_MOP_R_27, match_opcode, 0 },
+{"mop.r.28",   0, INSN_CLASS_ZIMOP, "d,s",    MATCH_MOP_R_28, MASK_MOP_R_28, match_opcode, 0 },
+{"mop.r.29",   0, INSN_CLASS_ZIMOP, "d,s",    MATCH_MOP_R_29, MASK_MOP_R_29, match_opcode, 0 },
+{"mop.r.30",   0, INSN_CLASS_ZIMOP, "d,s",    MATCH_MOP_R_30, MASK_MOP_R_30, match_opcode, 0 },
+{"mop.r.31",   0, INSN_CLASS_ZIMOP, "d,s",    MATCH_MOP_R_31, MASK_MOP_R_31, match_opcode, 0 },
+{"mop.rr.0",   0, INSN_CLASS_ZIMOP, "d,s,t",  MATCH_MOP_RR_0, MASK_MOP_RR_0, match_opcode, 0 },
+{"mop.rr.1",   0, INSN_CLASS_ZIMOP, "d,s,t",  MATCH_MOP_RR_1, MASK_MOP_RR_1, match_opcode, 0 },
+{"mop.rr.2",   0, INSN_CLASS_ZIMOP, "d,s,t",  MATCH_MOP_RR_2, MASK_MOP_RR_2, match_opcode, 0 },
+{"mop.rr.3",   0, INSN_CLASS_ZIMOP, "d,s,t",  MATCH_MOP_RR_3, MASK_MOP_RR_3, match_opcode, 0 },
+{"mop.rr.4",   0, INSN_CLASS_ZIMOP, "d,s,t",  MATCH_MOP_RR_4, MASK_MOP_RR_4, match_opcode, 0 },
+{"mop.rr.5",   0, INSN_CLASS_ZIMOP, "d,s,t",  MATCH_MOP_RR_5, MASK_MOP_RR_5, match_opcode, 0 },
+{"mop.rr.6",   0, INSN_CLASS_ZIMOP, "d,s,t",  MATCH_MOP_RR_6, MASK_MOP_RR_6, match_opcode, 0 },
+{"mop.rr.7",   0, INSN_CLASS_ZIMOP, "d,s,t",  MATCH_MOP_RR_7, MASK_MOP_RR_7, match_opcode, 0 },
+
 /* Zawrs instructions.  */
 {"wrs.nto",    0, INSN_CLASS_ZAWRS, "", MATCH_WRS_NTO, MASK_WRS_NTO, match_opcode, 0 },
 {"wrs.sto",    0, INSN_CLASS_ZAWRS, "", MATCH_WRS_STO, MASK_WRS_STO, match_opcode, 0 },
@@ -1186,8 +1235,8 @@ const struct riscv_opcode riscv_opcodes[] =
 {"sext.h",     0, INSN_CLASS_ZBB,  "d,s",   MATCH_SEXT_H, MASK_SEXT_H, match_opcode, 0 },
 {"sext.h",     0, INSN_CLASS_I,         "d,s",   0, (int) M_EXTH, NULL, INSN_MACRO },
 {"zext.h",     0, INSN_CLASS_ZCB_AND_ZBB,  "Cs,Cw", MATCH_C_ZEXT_H, MASK_C_ZEXT_H, match_opcode, INSN_ALIAS },
-{"zext.h",    32, INSN_CLASS_ZBB,  "d,s",   MATCH_PACK, MASK_PACK | MASK_RS2, match_opcode, 0 },
-{"zext.h",    64, INSN_CLASS_ZBB,  "d,s",   MATCH_PACKW, MASK_PACKW | MASK_RS2, match_opcode, 0 },
+{"zext.h",    32, INSN_CLASS_ZBB_OR_ZBKB,  "d,s",   MATCH_PACK, MASK_PACK | MASK_RS2, match_opcode, 0 },
+{"zext.h",    64, INSN_CLASS_ZBB_OR_ZBKB,  "d,s",   MATCH_PACKW, MASK_PACKW | MASK_RS2, match_opcode, 0 },
 {"zext.h",     0, INSN_CLASS_I,         "d,s",   0, (int) M_EXTH, NULL, INSN_MACRO },
 {"orc.b",      0, INSN_CLASS_ZBB,  "d,s",   MATCH_GORCI | MATCH_SHAMT_ORC_B, MASK_GORCI | MASK_SHAMT, match_opcode, 0 },
 {"clzw",      64, INSN_CLASS_ZBB,  "d,s",   MATCH_CLZW, MASK_CLZW, match_opcode, 0 },
@@ -2129,11 +2178,23 @@ const struct riscv_opcode riscv_opcodes[] =
 {"c.zext.b",   0, INSN_CLASS_ZCB, "Cs",  MATCH_C_ZEXT_B, MASK_C_ZEXT_B, match_opcode, 0 },
 {"c.sext.w",  64, INSN_CLASS_ZCB, "d",  MATCH_C_ADDIW, MASK_C_ADDIW|MASK_RVC_IMM, match_rd_nonzero, INSN_ALIAS },
 
+/* Zcmop instructions.  */
+{"c.mop.1",     0,  INSN_CLASS_ZCMOP, "",  MATCH_C_MOP_1,  MASK_C_MOP_1, match_opcode, 0 },
+{"c.mop.3",     0,  INSN_CLASS_ZCMOP, "",  MATCH_C_MOP_3,  MASK_C_MOP_3, match_opcode, 0 },
+{"c.mop.5",     0,  INSN_CLASS_ZCMOP, "",  MATCH_C_MOP_5,  MASK_C_MOP_5, match_opcode, 0 },
+{"c.mop.7",     0,  INSN_CLASS_ZCMOP, "",  MATCH_C_MOP_7,  MASK_C_MOP_7, match_opcode, 0 },
+{"c.mop.9",     0,  INSN_CLASS_ZCMOP, "",  MATCH_C_MOP_9,  MASK_C_MOP_9, match_opcode, 0 },
+{"c.mop.11",    0,  INSN_CLASS_ZCMOP, "",  MATCH_C_MOP_11, MASK_C_MOP_11, match_opcode, 0 },
+{"c.mop.13",    0,  INSN_CLASS_ZCMOP, "",  MATCH_C_MOP_13, MASK_C_MOP_13, match_opcode, 0 },
+{"c.mop.15",    0,  INSN_CLASS_ZCMOP, "",  MATCH_C_MOP_15, MASK_C_MOP_15, match_opcode, 0 },
+
 /* Zcmp instructions.  */
 {"cm.push",    0,  INSN_CLASS_ZCMP, "{Wcr},Wcp",  MATCH_CM_PUSH, MASK_CM_PUSH, match_opcode, 0 },
 {"cm.pop",     0,  INSN_CLASS_ZCMP, "{Wcr},Wcp",  MATCH_CM_POP, MASK_CM_POP, match_opcode, 0 },
 {"cm.popret",  0,  INSN_CLASS_ZCMP, "{Wcr},Wcp",  MATCH_CM_POPRET, MASK_CM_POPRET, match_opcode, 0 },
 {"cm.popretz", 0,  INSN_CLASS_ZCMP, "{Wcr},Wcp",  MATCH_CM_POPRETZ, MASK_CM_POPRETZ, match_opcode, 0 },
+{"cm.mva01s",  0,  INSN_CLASS_ZCMP, "Wc1,Wc2",    MATCH_CM_MVA01S, MASK_CM_MVA01S, match_opcode, 0 },
+{"cm.mvsa01",  0,  INSN_CLASS_ZCMP, "Wc1,Wc2",    MATCH_CM_MVSA01, MASK_CM_MVSA01, match_sreg1_not_eq_sreg2, 0 },
 
 /* Supervisor instructions.  */
 {"csrr",       0, INSN_CLASS_ZICSR, "d,E",   MATCH_CSRRS, MASK_CSRRS|MASK_RS1, match_opcode, INSN_ALIAS },
@@ -2287,6 +2348,247 @@ const struct riscv_opcode riscv_opcodes[] =
 {"cv.sw", 0, INSN_CLASS_XCVMEM, "t,d(s)",  MATCH_CV_SWRR,      MASK_CV_SWRR,      match_opcode, 0},
 {"cv.sw", 0, INSN_CLASS_XCVMEM, "t,(s),d", MATCH_CV_SWRRPOST,  MASK_CV_SWRRPOST,  match_opcode, 0},
 
+/* Vendor-specific (CORE-V) Xcvbitmanip instructions.  */
+{"cv.extractr",     0, INSN_CLASS_XCVBITMANIP, "d,s,t", MATCH_CV_EXTRACTR, MASK_CV_EXTRACTR, match_opcode, 0},
+{"cv.extractur",    0, INSN_CLASS_XCVBITMANIP, "d,s,t", MATCH_CV_EXTRACTUR, MASK_CV_EXTRACTUR, match_opcode, 0},
+{"cv.insertr",      0, INSN_CLASS_XCVBITMANIP, "d,s,t", MATCH_CV_INSERTR, MASK_CV_INSERTR, match_opcode, 0},
+{"cv.bclrr",        0, INSN_CLASS_XCVBITMANIP, "d,s,t", MATCH_CV_BCLRR, MASK_CV_BCLRR, match_opcode, 0},
+{"cv.bsetr",        0, INSN_CLASS_XCVBITMANIP, "d,s,t", MATCH_CV_BSETR, MASK_CV_BSETR, match_opcode, 0},
+{"cv.ror",          0, INSN_CLASS_XCVBITMANIP, "d,s,t", MATCH_CV_ROR, MASK_CV_ROR, match_opcode, 0},
+{"cv.ff1",          0, INSN_CLASS_XCVBITMANIP, "d,s",   MATCH_CV_FF1, MASK_CV_FF1, match_opcode, 0},
+{"cv.fl1",          0, INSN_CLASS_XCVBITMANIP, "d,s",   MATCH_CV_FL1, MASK_CV_FL1, match_opcode, 0},
+{"cv.clb",          0, INSN_CLASS_XCVBITMANIP, "d,s",   MATCH_CV_CLB, MASK_CV_CLB, match_opcode, 0},
+{"cv.cnt",          0, INSN_CLASS_XCVBITMANIP, "d,s",   MATCH_CV_CNT, MASK_CV_CNT, match_opcode, 0},
+
+{"cv.extract",      0, INSN_CLASS_XCVBITMANIP, "d,s,Xc6,Xc2", MATCH_CV_EXTRACT, MASK_CV_EXTRACT, match_opcode, 0},
+{"cv.extractu",     0, INSN_CLASS_XCVBITMANIP, "d,s,Xc6,Xc2", MATCH_CV_EXTRACTU, MASK_CV_EXTRACTU, match_opcode, 0},
+{"cv.insert",       0, INSN_CLASS_XCVBITMANIP, "d,s,Xc6,Xc2", MATCH_CV_INSERT, MASK_CV_INSERT, match_opcode, 0},
+{"cv.bclr",         0, INSN_CLASS_XCVBITMANIP, "d,s,Xc6,Xc2", MATCH_CV_BCLR, MASK_CV_BCLR, match_opcode, 0},
+{"cv.bset",         0, INSN_CLASS_XCVBITMANIP, "d,s,Xc6,Xc2", MATCH_CV_BSET, MASK_CV_BSET, match_opcode, 0},
+{"cv.bitrev",       0, INSN_CLASS_XCVBITMANIP, "d,s,Xc7,Xc2", MATCH_CV_BITREV, MASK_CV_BITREV, match_opcode, 0},
+
+/* Vendor-specific (CORE-V) Xcvsimd Instructions */
+{"cv.add.h",              0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_ADD_H, MASK_CV_ADD_H, match_opcode, 0},
+{"cv.add.b",              0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_ADD_B, MASK_CV_ADD_B, match_opcode, 0},
+{"cv.add.sc.h",           0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_ADD_SC_H, MASK_CV_ADD_SC_H, match_opcode, 0},
+{"cv.add.sc.b",           0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_ADD_SC_B, MASK_CV_ADD_SC_B, match_opcode, 0},
+{"cv.add.sci.h",          0, INSN_CLASS_XCVSIMD, "d,s,Xc5", MATCH_CV_ADD_SCI_H, MASK_CV_ADD_SCI_H, match_opcode, 0},
+{"cv.add.sci.b",          0, INSN_CLASS_XCVSIMD, "d,s,Xc5", MATCH_CV_ADD_SCI_B, MASK_CV_ADD_SCI_B, match_opcode, 0},
+{"cv.sub.h",              0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_SUB_H, MASK_CV_SUB_H, match_opcode, 0},
+{"cv.sub.b",              0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_SUB_B, MASK_CV_SUB_B, match_opcode, 0},
+{"cv.sub.sc.h",           0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_SUB_SC_H, MASK_CV_SUB_SC_H, match_opcode, 0},
+{"cv.sub.sc.b",           0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_SUB_SC_B, MASK_CV_SUB_SC_B, match_opcode, 0},
+{"cv.sub.sci.h",          0, INSN_CLASS_XCVSIMD, "d,s,Xc5", MATCH_CV_SUB_SCI_H, MASK_CV_SUB_SCI_H, match_opcode, 0},
+{"cv.sub.sci.b",          0, INSN_CLASS_XCVSIMD, "d,s,Xc5", MATCH_CV_SUB_SCI_B, MASK_CV_SUB_SCI_B, match_opcode, 0},
+{"cv.avg.h",              0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_AVG_H, MASK_CV_AVG_H, match_opcode, 0},
+{"cv.avg.b",              0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_AVG_B, MASK_CV_AVG_B, match_opcode, 0},
+{"cv.avg.sc.h",           0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_AVG_SC_H, MASK_CV_AVG_SC_H, match_opcode, 0},
+{"cv.avg.sc.b",           0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_AVG_SC_B, MASK_CV_AVG_SC_B, match_opcode, 0},
+{"cv.avg.sci.h",          0, INSN_CLASS_XCVSIMD, "d,s,Xc5", MATCH_CV_AVG_SCI_H, MASK_CV_AVG_SCI_H, match_opcode, 0},
+{"cv.avg.sci.b",          0, INSN_CLASS_XCVSIMD, "d,s,Xc5", MATCH_CV_AVG_SCI_B, MASK_CV_AVG_SCI_B, match_opcode, 0},
+{"cv.avgu.h",             0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_AVGU_H, MASK_CV_AVGU_H, match_opcode, 0},
+{"cv.avgu.b",             0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_AVGU_B, MASK_CV_AVGU_B, match_opcode, 0},
+{"cv.avgu.sc.h",          0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_AVGU_SC_H, MASK_CV_AVGU_SC_H, match_opcode, 0},
+{"cv.avgu.sc.b",          0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_AVGU_SC_B, MASK_CV_AVGU_SC_B, match_opcode, 0},
+{"cv.avgu.sci.h",         0, INSN_CLASS_XCVSIMD, "d,s,Xc80", MATCH_CV_AVGU_SCI_H, MASK_CV_AVGU_SCI_H, match_opcode, 0},
+{"cv.avgu.sci.b",         0, INSN_CLASS_XCVSIMD, "d,s,Xc80", MATCH_CV_AVGU_SCI_B, MASK_CV_AVGU_SCI_B, match_opcode, 0},
+{"cv.min.h",              0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_MIN_H, MASK_CV_MIN_H, match_opcode, 0},
+{"cv.min.b",              0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_MIN_B, MASK_CV_MIN_B, match_opcode, 0},
+{"cv.min.sc.h",           0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_MIN_SC_H, MASK_CV_MIN_SC_H, match_opcode, 0},
+{"cv.min.sc.b",           0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_MIN_SC_B, MASK_CV_MIN_SC_B, match_opcode, 0},
+{"cv.min.sci.h",          0, INSN_CLASS_XCVSIMD, "d,s,Xc5", MATCH_CV_MIN_SCI_H, MASK_CV_MIN_SCI_H, match_opcode, 0},
+{"cv.min.sci.b",          0, INSN_CLASS_XCVSIMD, "d,s,Xc5", MATCH_CV_MIN_SCI_B, MASK_CV_MIN_SCI_B, match_opcode, 0},
+{"cv.minu.h",             0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_MINU_H, MASK_CV_MINU_H, match_opcode, 0},
+{"cv.minu.b",             0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_MINU_B, MASK_CV_MINU_B, match_opcode, 0},
+{"cv.minu.sc.h",          0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_MINU_SC_H, MASK_CV_MINU_SC_H, match_opcode, 0},
+{"cv.minu.sc.b",          0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_MINU_SC_B, MASK_CV_MINU_SC_B, match_opcode, 0},
+{"cv.minu.sci.h",         0, INSN_CLASS_XCVSIMD, "d,s,Xc80", MATCH_CV_MINU_SCI_H, MASK_CV_MINU_SCI_H, match_opcode, 0},
+{"cv.minu.sci.b",         0, INSN_CLASS_XCVSIMD, "d,s,Xc80", MATCH_CV_MINU_SCI_B, MASK_CV_MINU_SCI_B, match_opcode, 0},
+{"cv.max.h",              0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_MAX_H, MASK_CV_MAX_H, match_opcode, 0},
+{"cv.max.b",              0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_MAX_B, MASK_CV_MAX_B, match_opcode, 0},
+{"cv.max.sc.h",           0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_MAX_SC_H, MASK_CV_MAX_SC_H, match_opcode, 0},
+{"cv.max.sc.b",           0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_MAX_SC_B, MASK_CV_MAX_SC_B, match_opcode, 0},
+{"cv.max.sci.h",          0, INSN_CLASS_XCVSIMD, "d,s,Xc5", MATCH_CV_MAX_SCI_H, MASK_CV_MAX_SCI_H, match_opcode, 0},
+{"cv.max.sci.b",          0, INSN_CLASS_XCVSIMD, "d,s,Xc5", MATCH_CV_MAX_SCI_B, MASK_CV_MAX_SCI_B, match_opcode, 0},
+{"cv.maxu.h",             0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_MAXU_H, MASK_CV_MAXU_H, match_opcode, 0},
+{"cv.maxu.b",             0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_MAXU_B, MASK_CV_MAXU_B, match_opcode, 0},
+{"cv.maxu.sc.h",          0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_MAXU_SC_H, MASK_CV_MAXU_SC_H, match_opcode, 0},
+{"cv.maxu.sc.b",          0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_MAXU_SC_B, MASK_CV_MAXU_SC_B, match_opcode, 0},
+{"cv.maxu.sci.h",         0, INSN_CLASS_XCVSIMD, "d,s,Xc80", MATCH_CV_MAXU_SCI_H, MASK_CV_MAXU_SCI_H, match_opcode, 0},
+{"cv.maxu.sci.b",         0, INSN_CLASS_XCVSIMD, "d,s,Xc80", MATCH_CV_MAXU_SCI_B, MASK_CV_MAXU_SCI_B, match_opcode, 0},
+{"cv.srl.h",              0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_SRL_H, MASK_CV_SRL_H, match_opcode, 0},
+{"cv.srl.b",              0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_SRL_B, MASK_CV_SRL_B, match_opcode, 0},
+{"cv.srl.sc.h",           0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_SRL_SC_H, MASK_CV_SRL_SC_H, match_opcode, 0},
+{"cv.srl.sc.b",           0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_SRL_SC_B, MASK_CV_SRL_SC_B, match_opcode, 0},
+{"cv.srl.sci.h",          0, INSN_CLASS_XCVSIMD, "d,s,Xc84", MATCH_CV_SRL_SCI_H, MASK_CV_SRL_SCI_H, match_opcode, 0},
+{"cv.srl.sci.b",          0, INSN_CLASS_XCVSIMD, "d,s,Xc83", MATCH_CV_SRL_SCI_B, MASK_CV_SRL_SCI_B, match_opcode, 0},
+{"cv.sra.h",              0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_SRA_H, MASK_CV_SRA_H, match_opcode, 0},
+{"cv.sra.b",              0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_SRA_B, MASK_CV_SRA_B, match_opcode, 0},
+{"cv.sra.sc.h",           0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_SRA_SC_H, MASK_CV_SRA_SC_H, match_opcode, 0},
+{"cv.sra.sc.b",           0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_SRA_SC_B, MASK_CV_SRA_SC_B, match_opcode, 0},
+{"cv.sra.sci.h",          0, INSN_CLASS_XCVSIMD, "d,s,Xc84", MATCH_CV_SRA_SCI_H, MASK_CV_SRA_SCI_H, match_opcode, 0},
+{"cv.sra.sci.b",          0, INSN_CLASS_XCVSIMD, "d,s,Xc83", MATCH_CV_SRA_SCI_B, MASK_CV_SRA_SCI_B, match_opcode, 0},
+{"cv.sll.h",              0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_SLL_H, MASK_CV_SLL_H, match_opcode, 0},
+{"cv.sll.b",              0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_SLL_B, MASK_CV_SLL_B, match_opcode, 0},
+{"cv.sll.sc.h",           0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_SLL_SC_H, MASK_CV_SLL_SC_H, match_opcode, 0},
+{"cv.sll.sc.b",           0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_SLL_SC_B, MASK_CV_SLL_SC_B, match_opcode, 0},
+{"cv.sll.sci.h",          0, INSN_CLASS_XCVSIMD, "d,s,Xc84", MATCH_CV_SLL_SCI_H, MASK_CV_SLL_SCI_H, match_opcode, 0},
+{"cv.sll.sci.b",          0, INSN_CLASS_XCVSIMD, "d,s,Xc83", MATCH_CV_SLL_SCI_B, MASK_CV_SLL_SCI_B, match_opcode, 0},
+{"cv.or.h",               0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_OR_H, MASK_CV_OR_H, match_opcode, 0},
+{"cv.or.b",               0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_OR_B, MASK_CV_OR_B, match_opcode, 0},
+{"cv.or.sc.h",            0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_OR_SC_H, MASK_CV_OR_SC_H, match_opcode, 0},
+{"cv.or.sc.b",            0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_OR_SC_B, MASK_CV_OR_SC_B, match_opcode, 0},
+{"cv.or.sci.h",           0, INSN_CLASS_XCVSIMD, "d,s,Xc5", MATCH_CV_OR_SCI_H, MASK_CV_OR_SCI_H, match_opcode, 0},
+{"cv.or.sci.b",           0, INSN_CLASS_XCVSIMD, "d,s,Xc5", MATCH_CV_OR_SCI_B, MASK_CV_OR_SCI_B, match_opcode, 0},
+{"cv.xor.h",              0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_XOR_H, MASK_CV_XOR_H, match_opcode, 0},
+{"cv.xor.b",              0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_XOR_B, MASK_CV_XOR_B, match_opcode, 0},
+{"cv.xor.sc.h",           0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_XOR_SC_H, MASK_CV_XOR_SC_H, match_opcode, 0},
+{"cv.xor.sc.b",           0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_XOR_SC_B, MASK_CV_XOR_SC_B, match_opcode, 0},
+{"cv.xor.sci.h",          0, INSN_CLASS_XCVSIMD, "d,s,Xc5", MATCH_CV_XOR_SCI_H, MASK_CV_XOR_SCI_H, match_opcode, 0},
+{"cv.xor.sci.b",          0, INSN_CLASS_XCVSIMD, "d,s,Xc5", MATCH_CV_XOR_SCI_B, MASK_CV_XOR_SCI_B, match_opcode, 0},
+{"cv.and.h",              0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_AND_H, MASK_CV_AND_H, match_opcode, 0},
+{"cv.and.b",              0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_AND_B, MASK_CV_AND_B, match_opcode, 0},
+{"cv.and.sc.h",           0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_AND_SC_H, MASK_CV_AND_SC_H, match_opcode, 0},
+{"cv.and.sc.b",           0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_AND_SC_B, MASK_CV_AND_SC_B, match_opcode, 0},
+{"cv.and.sci.h",          0, INSN_CLASS_XCVSIMD, "d,s,Xc5", MATCH_CV_AND_SCI_H, MASK_CV_AND_SCI_H, match_opcode, 0},
+{"cv.and.sci.b",          0, INSN_CLASS_XCVSIMD, "d,s,Xc5", MATCH_CV_AND_SCI_B, MASK_CV_AND_SCI_B, match_opcode, 0},
+{"cv.abs.h",              0, INSN_CLASS_XCVSIMD, "d,s",   MATCH_CV_ABS_H, MASK_CV_ABS_H, match_opcode, 0},
+{"cv.abs.b",              0, INSN_CLASS_XCVSIMD, "d,s",   MATCH_CV_ABS_B, MASK_CV_ABS_B, match_opcode, 0},
+{"cv.dotup.h",            0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_DOTUP_H, MASK_CV_DOTUP_H, match_opcode, 0},
+{"cv.dotup.b",            0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_DOTUP_B, MASK_CV_DOTUP_B, match_opcode, 0},
+{"cv.dotup.sc.h",         0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_DOTUP_SC_H, MASK_CV_DOTUP_SC_H, match_opcode, 0},
+{"cv.dotup.sc.b",         0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_DOTUP_SC_B, MASK_CV_DOTUP_SC_B, match_opcode, 0},
+{"cv.dotup.sci.h",        0, INSN_CLASS_XCVSIMD, "d,s,Xc80", MATCH_CV_DOTUP_SCI_H, MASK_CV_DOTUP_SCI_H, match_opcode, 0},
+{"cv.dotup.sci.b",        0, INSN_CLASS_XCVSIMD, "d,s,Xc80", MATCH_CV_DOTUP_SCI_B, MASK_CV_DOTUP_SCI_B, match_opcode, 0},
+{"cv.dotusp.h",           0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_DOTUSP_H, MASK_CV_DOTUSP_H, match_opcode, 0},
+{"cv.dotusp.b",           0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_DOTUSP_B, MASK_CV_DOTUSP_B, match_opcode, 0},
+{"cv.dotusp.sc.h",        0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_DOTUSP_SC_H, MASK_CV_DOTUSP_SC_H, match_opcode, 0},
+{"cv.dotusp.sc.b",        0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_DOTUSP_SC_B, MASK_CV_DOTUSP_SC_B, match_opcode, 0},
+{"cv.dotusp.sci.h",       0, INSN_CLASS_XCVSIMD, "d,s,Xc5", MATCH_CV_DOTUSP_SCI_H, MASK_CV_DOTUSP_SCI_H, match_opcode, 0},
+{"cv.dotusp.sci.b",       0, INSN_CLASS_XCVSIMD, "d,s,Xc5", MATCH_CV_DOTUSP_SCI_B, MASK_CV_DOTUSP_SCI_B, match_opcode, 0},
+{"cv.dotsp.h",            0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_DOTSP_H, MASK_CV_DOTSP_H, match_opcode, 0},
+{"cv.dotsp.b",            0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_DOTSP_B, MASK_CV_DOTSP_B, match_opcode, 0},
+{"cv.dotsp.sc.h",         0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_DOTSP_SC_H, MASK_CV_DOTSP_SC_H, match_opcode, 0},
+{"cv.dotsp.sc.b",         0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_DOTSP_SC_B, MASK_CV_DOTSP_SC_B, match_opcode, 0},
+{"cv.dotsp.sci.h",        0, INSN_CLASS_XCVSIMD, "d,s,Xc5", MATCH_CV_DOTSP_SCI_H, MASK_CV_DOTSP_SCI_H, match_opcode, 0},
+{"cv.dotsp.sci.b",        0, INSN_CLASS_XCVSIMD, "d,s,Xc5", MATCH_CV_DOTSP_SCI_B, MASK_CV_DOTSP_SCI_B, match_opcode, 0},
+{"cv.sdotup.h",           0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_SDOTUP_H, MASK_CV_SDOTUP_H, match_opcode, 0},
+{"cv.sdotup.b",           0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_SDOTUP_B, MASK_CV_SDOTUP_B, match_opcode, 0},
+{"cv.sdotup.sc.h",        0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_SDOTUP_SC_H, MASK_CV_SDOTUP_SC_H, match_opcode, 0},
+{"cv.sdotup.sc.b",        0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_SDOTUP_SC_B, MASK_CV_SDOTUP_SC_B, match_opcode, 0},
+{"cv.sdotup.sci.h",       0, INSN_CLASS_XCVSIMD, "d,s,Xc80", MATCH_CV_SDOTUP_SCI_H, MASK_CV_SDOTUP_SCI_H, match_opcode, 0},
+{"cv.sdotup.sci.b",       0, INSN_CLASS_XCVSIMD, "d,s,Xc80", MATCH_CV_SDOTUP_SCI_B, MASK_CV_SDOTUP_SCI_B, match_opcode, 0},
+{"cv.sdotusp.h",          0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_SDOTUSP_H, MASK_CV_SDOTUSP_H, match_opcode, 0},
+{"cv.sdotusp.b",          0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_SDOTUSP_B, MASK_CV_SDOTUSP_B, match_opcode, 0},
+{"cv.sdotusp.sc.h",       0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_SDOTUSP_SC_H, MASK_CV_SDOTUSP_SC_H, match_opcode, 0},
+{"cv.sdotusp.sc.b",       0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_SDOTUSP_SC_B, MASK_CV_SDOTUSP_SC_B, match_opcode, 0},
+{"cv.sdotusp.sci.h",      0, INSN_CLASS_XCVSIMD, "d,s,Xc5", MATCH_CV_SDOTUSP_SCI_H, MASK_CV_SDOTUSP_SCI_H, match_opcode, 0},
+{"cv.sdotusp.sci.b",      0, INSN_CLASS_XCVSIMD, "d,s,Xc5", MATCH_CV_SDOTUSP_SCI_B, MASK_CV_SDOTUSP_SCI_B, match_opcode, 0},
+{"cv.sdotsp.h",           0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_SDOTSP_H, MASK_CV_SDOTSP_H, match_opcode, 0},
+{"cv.sdotsp.b",           0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_SDOTSP_B, MASK_CV_SDOTSP_B, match_opcode, 0},
+{"cv.sdotsp.sc.h",        0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_SDOTSP_SC_H, MASK_CV_SDOTSP_SC_H, match_opcode, 0},
+{"cv.sdotsp.sc.b",        0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_SDOTSP_SC_B, MASK_CV_SDOTSP_SC_B, match_opcode, 0},
+{"cv.sdotsp.sci.h",       0, INSN_CLASS_XCVSIMD, "d,s,Xc5", MATCH_CV_SDOTSP_SCI_H, MASK_CV_SDOTSP_SCI_H, match_opcode, 0},
+{"cv.sdotsp.sci.b",       0, INSN_CLASS_XCVSIMD, "d,s,Xc5", MATCH_CV_SDOTSP_SCI_B, MASK_CV_SDOTSP_SCI_B, match_opcode, 0},
+{"cv.extract.h",          0, INSN_CLASS_XCVSIMD, "d,s,Xc81", MATCH_CV_EXTRACT_H, MASK_CV_EXTRACT_H, match_opcode, 0},
+{"cv.extract.b",          0, INSN_CLASS_XCVSIMD, "d,s,Xc82", MATCH_CV_EXTRACT_B, MASK_CV_EXTRACT_B, match_opcode, 0},
+{"cv.extractu.h",         0, INSN_CLASS_XCVSIMD, "d,s,Xc81", MATCH_CV_EXTRACTU_H, MASK_CV_EXTRACTU_H, match_opcode, 0},
+{"cv.extractu.b",         0, INSN_CLASS_XCVSIMD, "d,s,Xc82", MATCH_CV_EXTRACTU_B, MASK_CV_EXTRACTU_B, match_opcode, 0},
+{"cv.insert.h",           0, INSN_CLASS_XCVSIMD, "d,s,Xc81", MATCH_CV_INSERT_H, MASK_CV_INSERT_H, match_opcode, 0},
+{"cv.insert.b",           0, INSN_CLASS_XCVSIMD, "d,s,Xc82", MATCH_CV_INSERT_B, MASK_CV_INSERT_B, match_opcode, 0},
+{"cv.shuffle.h",          0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_SHUFFLE_H, MASK_CV_SHUFFLE_H, match_opcode, 0},
+{"cv.shuffle.b",          0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_SHUFFLE_B, MASK_CV_SHUFFLE_B, match_opcode, 0},
+{"cv.shuffle.sci.h",      0, INSN_CLASS_XCVSIMD, "d,s,Xc82", MATCH_CV_SHUFFLE_SCI_H, MASK_CV_SHUFFLE_SCI_H, match_opcode, 0},
+{"cv.shufflei0.sci.b",    0, INSN_CLASS_XCVSIMD, "d,s,Xc80", MATCH_CV_SHUFFLEI0_SCI_B, MASK_CV_SHUFFLEI0_SCI_B, match_opcode, 0},
+{"cv.shufflei1.sci.b",    0, INSN_CLASS_XCVSIMD, "d,s,Xc80", MATCH_CV_SHUFFLEI1_SCI_B, MASK_CV_SHUFFLEI1_SCI_B, match_opcode, 0},
+{"cv.shufflei2.sci.b",    0, INSN_CLASS_XCVSIMD, "d,s,Xc80", MATCH_CV_SHUFFLEI2_SCI_B, MASK_CV_SHUFFLEI2_SCI_B, match_opcode, 0},
+{"cv.shufflei3.sci.b",    0, INSN_CLASS_XCVSIMD, "d,s,Xc80", MATCH_CV_SHUFFLEI3_SCI_B, MASK_CV_SHUFFLEI3_SCI_B, match_opcode, 0},
+{"cv.shuffle2.h",         0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_SHUFFLE2_H, MASK_CV_SHUFFLE2_H, match_opcode, 0},
+{"cv.shuffle2.b",         0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_SHUFFLE2_B, MASK_CV_SHUFFLE2_B, match_opcode, 0},
+{"cv.pack",               0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_PACK, MASK_CV_PACK, match_opcode, 0},
+{"cv.pack.h",             0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_PACK_H, MASK_CV_PACK_H, match_opcode, 0},
+{"cv.packhi.b",           0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_PACKHI_B, MASK_CV_PACKHI_B, match_opcode, 0},
+{"cv.packlo.b",           0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_PACKLO_B, MASK_CV_PACKLO_B, match_opcode, 0},
+{"cv.cmpeq.h",            0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_CMPEQ_H, MASK_CV_CMPEQ_H, match_opcode, 0},
+{"cv.cmpeq.b",            0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_CMPEQ_B, MASK_CV_CMPEQ_B, match_opcode, 0},
+{"cv.cmpeq.sc.h",         0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_CMPEQ_SC_H, MASK_CV_CMPEQ_SC_H, match_opcode, 0},
+{"cv.cmpeq.sc.b",         0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_CMPEQ_SC_B, MASK_CV_CMPEQ_SC_B, match_opcode, 0},
+{"cv.cmpeq.sci.h",        0, INSN_CLASS_XCVSIMD, "d,s,Xc5", MATCH_CV_CMPEQ_SCI_H, MASK_CV_CMPEQ_SCI_H, match_opcode, 0},
+{"cv.cmpeq.sci.b",        0, INSN_CLASS_XCVSIMD, "d,s,Xc5", MATCH_CV_CMPEQ_SCI_B, MASK_CV_CMPEQ_SCI_B, match_opcode, 0},
+{"cv.cmpne.h",            0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_CMPNE_H, MASK_CV_CMPNE_H, match_opcode, 0},
+{"cv.cmpne.b",            0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_CMPNE_B, MASK_CV_CMPNE_B, match_opcode, 0},
+{"cv.cmpne.sc.h",         0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_CMPNE_SC_H, MASK_CV_CMPNE_SC_H, match_opcode, 0},
+{"cv.cmpne.sc.b",         0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_CMPNE_SC_B, MASK_CV_CMPNE_SC_B, match_opcode, 0},
+{"cv.cmpne.sci.h",        0, INSN_CLASS_XCVSIMD, "d,s,Xc5", MATCH_CV_CMPNE_SCI_H, MASK_CV_CMPNE_SCI_H, match_opcode, 0},
+{"cv.cmpne.sci.b",        0, INSN_CLASS_XCVSIMD, "d,s,Xc5", MATCH_CV_CMPNE_SCI_B, MASK_CV_CMPNE_SCI_B, match_opcode, 0},
+{"cv.cmpgt.h",            0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_CMPGT_H, MASK_CV_CMPGT_H, match_opcode, 0},
+{"cv.cmpgt.b",            0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_CMPGT_B, MASK_CV_CMPGT_B, match_opcode, 0},
+{"cv.cmpgt.sc.h",         0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_CMPGT_SC_H, MASK_CV_CMPGT_SC_H, match_opcode, 0},
+{"cv.cmpgt.sc.b",         0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_CMPGT_SC_B, MASK_CV_CMPGT_SC_B, match_opcode, 0},
+{"cv.cmpgt.sci.h",        0, INSN_CLASS_XCVSIMD, "d,s,Xc5", MATCH_CV_CMPGT_SCI_H, MASK_CV_CMPGT_SCI_H, match_opcode, 0},
+{"cv.cmpgt.sci.b",        0, INSN_CLASS_XCVSIMD, "d,s,Xc5", MATCH_CV_CMPGT_SCI_B, MASK_CV_CMPGT_SCI_B, match_opcode, 0},
+{"cv.cmpge.h",            0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_CMPGE_H, MASK_CV_CMPGE_H, match_opcode, 0},
+{"cv.cmpge.b",            0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_CMPGE_B, MASK_CV_CMPGE_B, match_opcode, 0},
+{"cv.cmpge.sc.h",         0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_CMPGE_SC_H, MASK_CV_CMPGE_SC_H, match_opcode, 0},
+{"cv.cmpge.sc.b",         0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_CMPGE_SC_B, MASK_CV_CMPGE_SC_B, match_opcode, 0},
+{"cv.cmpge.sci.h",        0, INSN_CLASS_XCVSIMD, "d,s,Xc5", MATCH_CV_CMPGE_SCI_H, MASK_CV_CMPGE_SCI_H, match_opcode, 0},
+{"cv.cmpge.sci.b",        0, INSN_CLASS_XCVSIMD, "d,s,Xc5", MATCH_CV_CMPGE_SCI_B, MASK_CV_CMPGE_SCI_B, match_opcode, 0},
+{"cv.cmplt.h",            0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_CMPLT_H, MASK_CV_CMPLT_H, match_opcode, 0},
+{"cv.cmplt.b",            0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_CMPLT_B, MASK_CV_CMPLT_B, match_opcode, 0},
+{"cv.cmplt.sc.h",         0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_CMPLT_SC_H, MASK_CV_CMPLT_SC_H, match_opcode, 0},
+{"cv.cmplt.sc.b",         0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_CMPLT_SC_B, MASK_CV_CMPLT_SC_B, match_opcode, 0},
+{"cv.cmplt.sci.h",        0, INSN_CLASS_XCVSIMD, "d,s,Xc5", MATCH_CV_CMPLT_SCI_H, MASK_CV_CMPLT_SCI_H, match_opcode, 0},
+{"cv.cmplt.sci.b",        0, INSN_CLASS_XCVSIMD, "d,s,Xc5", MATCH_CV_CMPLT_SCI_B, MASK_CV_CMPLT_SCI_B, match_opcode, 0},
+{"cv.cmple.h",            0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_CMPLE_H, MASK_CV_CMPLE_H, match_opcode, 0},
+{"cv.cmple.b",            0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_CMPLE_B, MASK_CV_CMPLE_B, match_opcode, 0},
+{"cv.cmple.sc.h",         0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_CMPLE_SC_H, MASK_CV_CMPLE_SC_H, match_opcode, 0},
+{"cv.cmple.sc.b",         0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_CMPLE_SC_B, MASK_CV_CMPLE_SC_B, match_opcode, 0},
+{"cv.cmple.sci.h",        0, INSN_CLASS_XCVSIMD, "d,s,Xc5", MATCH_CV_CMPLE_SCI_H, MASK_CV_CMPLE_SCI_H, match_opcode, 0},
+{"cv.cmple.sci.b",        0, INSN_CLASS_XCVSIMD, "d,s,Xc5", MATCH_CV_CMPLE_SCI_B, MASK_CV_CMPLE_SCI_B, match_opcode, 0},
+{"cv.cmpgtu.h",           0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_CMPGTU_H, MASK_CV_CMPGTU_H, match_opcode, 0},
+{"cv.cmpgtu.b",           0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_CMPGTU_B, MASK_CV_CMPGTU_B, match_opcode, 0},
+{"cv.cmpgtu.sc.h",        0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_CMPGTU_SC_H, MASK_CV_CMPGTU_SC_H, match_opcode, 0},
+{"cv.cmpgtu.sc.b",        0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_CMPGTU_SC_B, MASK_CV_CMPGTU_SC_B, match_opcode, 0},
+{"cv.cmpgtu.sci.h",       0, INSN_CLASS_XCVSIMD, "d,s,Xc80", MATCH_CV_CMPGTU_SCI_H, MASK_CV_CMPGTU_SCI_H, match_opcode, 0},
+{"cv.cmpgtu.sci.b",       0, INSN_CLASS_XCVSIMD, "d,s,Xc80", MATCH_CV_CMPGTU_SCI_B, MASK_CV_CMPGTU_SCI_B, match_opcode, 0},
+{"cv.cmpgeu.h",           0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_CMPGEU_H, MASK_CV_CMPGEU_H, match_opcode, 0},
+{"cv.cmpgeu.b",           0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_CMPGEU_B, MASK_CV_CMPGEU_B, match_opcode, 0},
+{"cv.cmpgeu.sc.h",        0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_CMPGEU_SC_H, MASK_CV_CMPGEU_SC_H, match_opcode, 0},
+{"cv.cmpgeu.sc.b",        0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_CMPGEU_SC_B, MASK_CV_CMPGEU_SC_B, match_opcode, 0},
+{"cv.cmpgeu.sci.h",       0, INSN_CLASS_XCVSIMD, "d,s,Xc80", MATCH_CV_CMPGEU_SCI_H, MASK_CV_CMPGEU_SCI_H, match_opcode, 0},
+{"cv.cmpgeu.sci.b",       0, INSN_CLASS_XCVSIMD, "d,s,Xc80", MATCH_CV_CMPGEU_SCI_B, MASK_CV_CMPGEU_SCI_B, match_opcode, 0},
+{"cv.cmpltu.h",           0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_CMPLTU_H, MASK_CV_CMPLTU_H, match_opcode, 0},
+{"cv.cmpltu.b",           0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_CMPLTU_B, MASK_CV_CMPLTU_B, match_opcode, 0},
+{"cv.cmpltu.sc.h",        0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_CMPLTU_SC_H, MASK_CV_CMPLTU_SC_H, match_opcode, 0},
+{"cv.cmpltu.sc.b",        0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_CMPLTU_SC_B, MASK_CV_CMPLTU_SC_B, match_opcode, 0},
+{"cv.cmpltu.sci.h",       0, INSN_CLASS_XCVSIMD, "d,s,Xc80", MATCH_CV_CMPLTU_SCI_H, MASK_CV_CMPLTU_SCI_H, match_opcode, 0},
+{"cv.cmpltu.sci.b",       0, INSN_CLASS_XCVSIMD, "d,s,Xc80", MATCH_CV_CMPLTU_SCI_B, MASK_CV_CMPLTU_SCI_B, match_opcode, 0},
+{"cv.cmpleu.h",           0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_CMPLEU_H, MASK_CV_CMPLEU_H, match_opcode, 0},
+{"cv.cmpleu.b",           0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_CMPLEU_B, MASK_CV_CMPLEU_B, match_opcode, 0},
+{"cv.cmpleu.sc.h",        0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_CMPLEU_SC_H, MASK_CV_CMPLEU_SC_H, match_opcode, 0},
+{"cv.cmpleu.sc.b",        0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_CMPLEU_SC_B, MASK_CV_CMPLEU_SC_B, match_opcode, 0},
+{"cv.cmpleu.sci.h",       0, INSN_CLASS_XCVSIMD, "d,s,Xc80", MATCH_CV_CMPLEU_SCI_H, MASK_CV_CMPLEU_SCI_H, match_opcode, 0},
+{"cv.cmpleu.sci.b",       0, INSN_CLASS_XCVSIMD, "d,s,Xc80", MATCH_CV_CMPLEU_SCI_B, MASK_CV_CMPLEU_SCI_B, match_opcode, 0},
+{"cv.cplxmul.r",          0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_CPLXMUL_R, MASK_CV_CPLXMUL_R, match_opcode, 0},
+{"cv.cplxmul.i",          0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_CPLXMUL_I, MASK_CV_CPLXMUL_I, match_opcode, 0},
+{"cv.cplxmul.r.div2",     0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_CPLXMUL_R_DIV2, MASK_CV_CPLXMUL_R_DIV2, match_opcode, 0},
+{"cv.cplxmul.i.div2",     0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_CPLXMUL_I_DIV2, MASK_CV_CPLXMUL_I_DIV2, match_opcode, 0},
+{"cv.cplxmul.r.div4",     0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_CPLXMUL_R_DIV4, MASK_CV_CPLXMUL_R_DIV4, match_opcode, 0},
+{"cv.cplxmul.i.div4",     0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_CPLXMUL_I_DIV4, MASK_CV_CPLXMUL_I_DIV4, match_opcode, 0},
+{"cv.cplxmul.r.div8",     0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_CPLXMUL_R_DIV8, MASK_CV_CPLXMUL_R_DIV8, match_opcode, 0},
+{"cv.cplxmul.i.div8",     0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_CPLXMUL_I_DIV8, MASK_CV_CPLXMUL_I_DIV8, match_opcode, 0},
+{"cv.cplxconj",           0, INSN_CLASS_XCVSIMD, "d,s",   MATCH_CV_CPLXCONJ, MASK_CV_CPLXCONJ, match_opcode, 0},
+{"cv.subrotmj",           0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_SUBROTMJ, MASK_CV_SUBROTMJ, match_opcode, 0},
+{"cv.subrotmj.div2",      0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_SUBROTMJ_DIV2, MASK_CV_SUBROTMJ_DIV2, match_opcode, 0},
+{"cv.subrotmj.div4",      0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_SUBROTMJ_DIV4, MASK_CV_SUBROTMJ_DIV4, match_opcode, 0},
+{"cv.subrotmj.div8",      0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_SUBROTMJ_DIV8, MASK_CV_SUBROTMJ_DIV8, match_opcode, 0},
+{"cv.add.div2",           0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_ADD_DIV2, MASK_CV_ADD_DIV2, match_opcode, 0},
+{"cv.add.div4",           0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_ADD_DIV4, MASK_CV_ADD_DIV4, match_opcode, 0},
+{"cv.add.div8",           0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_ADD_DIV8, MASK_CV_ADD_DIV8, match_opcode, 0},
+{"cv.sub.div2",           0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_SUB_DIV2, MASK_CV_SUB_DIV2, match_opcode, 0},
+{"cv.sub.div4",           0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_SUB_DIV4, MASK_CV_SUB_DIV4, match_opcode, 0},
+{"cv.sub.div8",           0, INSN_CLASS_XCVSIMD, "d,s,t", MATCH_CV_SUB_DIV8, MASK_CV_SUB_DIV8, match_opcode, 0},
+
 /* Vendor-specific (T-Head) XTheadBa instructions.  */
 {"th.addsl",    0, INSN_CLASS_XTHEADBA,    "d,s,t,Xtu2@25",   MATCH_TH_ADDSL,    MASK_TH_ADDSL,    match_opcode, 0},
 
diff --git a/opcodes/s390-dis.c b/opcodes/s390-dis.c
index ee2f2cb..852d2f6 100644
--- a/opcodes/s390-dis.c
+++ b/opcodes/s390-dis.c
@@ -299,12 +299,14 @@ s390_print_insn_with_opcode (bfd_vma memaddr,
 	{
 	  enum disassembler_style style;
 
-	  if (flags & S390_OPERAND_OR1)
-	    val.u &= ~1;
-	  if (flags & S390_OPERAND_OR2)
-	    val.u &= ~2;
-	  if (flags & S390_OPERAND_OR8)
-	    val.u &= ~8;
+	  if (!(flags & S390_OPERAND_LENGTH))
+	    {
+	      union operand_value insn_opval;
+
+	      /* Mask any constant operand bits set in insn template.  */
+	      insn_opval = s390_extract_operand (opcode->opcode, operand);
+	      val.u &= ~insn_opval.u;
+	    }
 
 	  if ((opcode->flags & S390_INSTR_FLAG_OPTPARM)
 	      && val.u == 0
diff --git a/opcodes/s390-mkopc.c b/opcodes/s390-mkopc.c
index 1f5729a..8251884 100644
--- a/opcodes/s390-mkopc.c
+++ b/opcodes/s390-mkopc.c
@@ -443,6 +443,8 @@ main (void)
       else if (strcmp (cpu_string, "z16") == 0
 	       || strcmp (cpu_string, "arch14") == 0)
 	min_cpu = S390_OPCODE_ARCH14;
+      else if (strcmp (cpu_string, "arch15") == 0)
+	min_cpu = S390_OPCODE_ARCH15;
       else {
 	print_error ("Mnemonic \"%s\": Couldn't parse CPU string: %s\n",
 		     mnemonic, cpu_string);
diff --git a/opcodes/s390-opc.c b/opcodes/s390-opc.c
index 10482fb..9d9f097 100644
--- a/opcodes/s390-opc.c
+++ b/opcodes/s390-opc.c
@@ -208,31 +208,17 @@ const struct s390_operand s390_operands[] =
   { 4, 20, 0 },
 #define U4_24       (U4_20 + 1)   /* 4 bit unsigned value starting at 24 */
   { 4, 24, 0 },
-#define U4_OR1_24   (U4_24 + 1)   /* 4 bit unsigned value ORed with 1 */
-  { 4, 24, S390_OPERAND_OR1 },	  /* starting at 24 */
-#define U4_OR2_24   (U4_OR1_24+1) /* 4 bit unsigned value ORed with 2 */
-  { 4, 24, S390_OPERAND_OR2 },    /* starting at 24 */
-#define U4_OR3_24   (U4_OR2_24+1) /* 4 bit unsigned value ORed with 3 */
-  { 4, 24, S390_OPERAND_OR1 | S390_OPERAND_OR2 }, /* starting at 24 */
-#define U4_28       (U4_OR3_24+1) /* 4 bit unsigned value starting at 28 */
+#define U4_28       (U4_24+1)     /* 4 bit unsigned value starting at 28 */
   { 4, 28, 0 },
-#define U4_OR8_28   (U4_28 + 1)   /* 4 bit unsigned value ORed with 8 */
-  { 4, 28, S390_OPERAND_OR8 },    /* starting at 28 */
-#define U4_32       (U4_OR8_28+1) /* 4 bit unsigned value starting at 32 */
+#define U4_32       (U4_28+1)     /* 4 bit unsigned value starting at 32 */
   { 4, 32, 0 },
 #define U4_36       (U4_32 + 1)   /* 4 bit unsigned value starting at 36 */
   { 4, 36, 0 },
 #define U8_8        (U4_36 + 1)   /* 8 bit unsigned value starting at 8 */
   { 8, 8, 0 },
-#define U6_18       (U8_8 + 1)    /* 6 bit unsigned value starting at 18 */
-  { 6, 18, 0 },
-#define U8_16       (U6_18 + 1)   /* 8 bit unsigned value starting at 16 */
+#define U8_16       (U8_8 + 1)    /* 8 bit unsigned value starting at 16 */
   { 8, 16, 0 },
-#define U5_27       (U8_16 + 1)   /* 5 bit unsigned value starting at 27 */
-  { 5, 27, 0 },
-#define U6_26       (U5_27 + 1)   /* 6 bit unsigned value starting at 26 */
-  { 6, 26, 0 },
-#define U8_24       (U6_26 + 1)   /* 8 bit unsigned value starting at 24 */
+#define U8_24       (U8_16 + 1)   /* 8 bit unsigned value starting at 24 */
   { 8, 24, 0 },
 #define U8_28       (U8_24 + 1)   /* 8 bit unsigned value starting at 28 */
   { 8, 28, 0 },
@@ -242,7 +228,9 @@ const struct s390_operand s390_operands[] =
   { 12, 16, 0 },
 #define U16_16      (U12_16 + 1)  /* 16 bit unsigned value starting at 16 */
   { 16, 16, 0 },
-#define U16_32      (U16_16 + 1)  /* 16 bit unsigned value starting at 32 */
+#define U16_20      (U16_16 + 1)  /* 16 bit unsigned value starting at 20 */
+  { 16, 20, 0 },
+#define U16_32      (U16_20 + 1)  /* 16 bit unsigned value starting at 32 */
   { 16, 32, 0 },
 #define U32_16      (U16_32 + 1)  /* 32 bit unsigned value starting at 16 */
   { 32, 16, 0 },
@@ -296,7 +284,7 @@ unused_s390_operands_static_asserts (void)
       p - pc relative
       r - general purpose register
       re - gpr extended operand, a valid general purpose register pair
-      u - unsigned integer, 4, 6, 8, 16 or 32 bit
+      u - unsigned integer, 4, 8, 16 or 32 bit
       m - mode field, 4 bit
       0 - operand skipped.
       The order of the letters reflects the layout of the format in
@@ -332,9 +320,9 @@ unused_s390_operands_static_asserts (void)
 #define INSTR_RIE_R0U0     6, { R_8,U16_16,0,0,0,0 }             /* e.g. clfitne */
 #define INSTR_RIE_RUI0     6, { R_8,I16_16,U4_12,0,0,0 }         /* e.g. lochi */
 #define INSTR_RIE_RRUUU    6, { R_8,R_12,U8_16,U8_24,U8_32,0 }   /* e.g. rnsbg */
-#define INSTR_RIE_RRUUU2   6, { R_8,R_12,U8_16,U6_26,U8_32,0 }   /* e.g. risbgz */
-#define INSTR_RIE_RRUUU3   6, { R_8,R_12,U8_16,U5_27,U8_32,0 }   /* e.g. risbhg */
-#define INSTR_RIE_RRUUU4   6, { R_8,R_12,U6_18,U8_24,U8_32,0 }   /* e.g. rnsbgt */
+#define INSTR_RIE_RRUUU2   INSTR_RIE_RRUUU                       /* e.g. risbgz */
+#define INSTR_RIE_RRUUU3   INSTR_RIE_RRUUU                       /* e.g. risbhg */
+#define INSTR_RIE_RRUUU4   INSTR_RIE_RRUUU                       /* e.g. rnsbgt */
 #define INSTR_RIL_0P       6, { J32_16,0,0,0,0 }                 /* e.g. jg    */
 #define INSTR_RIL_RP       6, { R_8,J32_16,0,0,0,0 }             /* e.g. brasl */
 #define INSTR_RIL_UP       6, { U4_8,J32_16,0,0,0,0 }            /* e.g. brcl  */
@@ -498,6 +486,8 @@ unused_s390_operands_static_asserts (void)
 #define INSTR_VRI_VVUUU    6, { V_8,V_12,U12_16,U4_32,U4_28,0 }  /* e.g. vftci */
 #define INSTR_VRI_VVUUU2   6, { V_8,V_12,U8_28,U8_16,U4_24,0 }   /* e.g. vpsop */
 #define INSTR_VRI_VR0UU    6, { V_8,R_12,U8_28,U4_24,0,0 }       /* e.g. vcvd  */
+#define INSTR_VRI_VV0UU    6, { V_8,V_12,U8_28,U4_24,0,0 }       /* e.g. vcvdq */
+#define INSTR_VRI_VVV0UV   6, { V_8,V_12,V_16,V_32,U8_24,0 }     /* e.g. veval */
 #define INSTR_VRX_VRRD     6, { V_8,D_20,X_12,B_16,0,0 }         /* e.g. vl    */
 #define INSTR_VRX_VV       6, { V_8,V_12,0,0,0,0 }               /* e.g. vlr   */
 #define INSTR_VRX_VRRDU    6, { V_8,D_20,X_12,B_16,U4_32,0 }     /* e.g. vlrep */
@@ -508,27 +498,27 @@ unused_s390_operands_static_asserts (void)
 #define INSTR_VRS_VRRDU    6, { V_8,R_12,D_20,B_16,U4_32,0 }     /* e.g. vlvg  */
 #define INSTR_VRS_VRRD     6, { V_8,R_12,D_20,B_16,0,0 }         /* e.g. vlvgb */
 #define INSTR_VRS_RRDV     6, { V_32,R_12,D_20,B_16,0,0 }        /* e.g. vlrlr */
-#define INSTR_VRR_0V       6, { V_12,0,0,0,0,0 }                 /* e.g. vtp   */
 #define INSTR_VRR_VRR      6, { V_8,R_12,R_16,0,0,0 }            /* e.g. vlvgp */
 #define INSTR_VRR_VVV0U    6, { V_8,V_12,V_16,U4_32,0,0 }        /* e.g. vmrh  */
 #define INSTR_VRR_VVV0U0   6, { V_8,V_12,V_16,U4_24,0,0 }        /* e.g. vfaeb */
-#define INSTR_VRR_VVV0U1   6, { V_8,V_12,V_16,U4_OR1_24,0,0 }    /* e.g. vfaebs*/
-#define INSTR_VRR_VVV0U2   6, { V_8,V_12,V_16,U4_OR2_24,0,0 }    /* e.g. vfaezb*/
-#define INSTR_VRR_VVV0U3   6, { V_8,V_12,V_16,U4_OR3_24,0,0 }    /* e.g. vfaezbs*/
+#define INSTR_VRR_VVV0U02  6, { V_8,V_12,V_16,U4_28,0,0 }        /* e.g. vd */
+#define INSTR_VRR_VVV0U1   INSTR_VRR_VVV0U0                      /* e.g. vfaebs*/
+#define INSTR_VRR_VVV0U2   INSTR_VRR_VVV0U0                      /* e.g. vfaezb*/
+#define INSTR_VRR_VVV0U3   INSTR_VRR_VVV0U0                      /* e.g. vfaezbs*/
 #define INSTR_VRR_VVV      6, { V_8,V_12,V_16,0,0,0 }            /* e.g. vmrhb */
 #define INSTR_VRR_VVV2     6, { V_8,V_CP16_12,0,0,0,0 }          /* e.g. vnot  */
 #define INSTR_VRR_VV0U     6, { V_8,V_12,U4_32,0,0,0 }           /* e.g. vseg  */
 #define INSTR_VRR_VV0U2    6, { V_8,V_12,U4_24,0,0,0 }           /* e.g. vistrb*/
 #define INSTR_VRR_VV0UU    6, { V_8,V_12,U4_28,U4_24,0,0 }       /* e.g. vcdgb */
 #define INSTR_VRR_VV0UU2   6, { V_8,V_12,U4_32,U4_28,0,0 }       /* e.g. wfc */
-#define INSTR_VRR_VV0UU8   6, { V_8,V_12,U4_OR8_28,U4_24,0,0 }   /* e.g. wcdgb */
+#define INSTR_VRR_VV0UU8   INSTR_VRR_VV0UU                       /* e.g. wcdgb */
 #define INSTR_VRR_VV       6, { V_8,V_12,0,0,0,0 }               /* e.g. vsegb */
 #define INSTR_VRR_VVVUU0V  6, { V_8,V_12,V_16,V_32,U4_20,U4_24 } /* e.g. vstrc */
 #define INSTR_VRR_VVVU0V   6, { V_8,V_12,V_16,V_32,U4_20,0 }     /* e.g. vac   */
 #define INSTR_VRR_VVVU0VB  6, { V_8,V_12,V_16,V_32,U4_24,0 }     /* e.g. vstrcb*/
-#define INSTR_VRR_VVVU0VB1 6, { V_8,V_12,V_16,V_32,U4_OR1_24,0 } /* e.g. vstrcbs*/
-#define INSTR_VRR_VVVU0VB2 6, { V_8,V_12,V_16,V_32,U4_OR2_24,0 } /* e.g. vstrczb*/
-#define INSTR_VRR_VVVU0VB3 6, { V_8,V_12,V_16,V_32,U4_OR3_24,0 } /* e.g. vstrczbs*/
+#define INSTR_VRR_VVVU0VB1 INSTR_VRR_VVVU0VB                     /* e.g. vstrcbs*/
+#define INSTR_VRR_VVVU0VB2 INSTR_VRR_VVVU0VB                     /* e.g. vstrczb*/
+#define INSTR_VRR_VVVU0VB3 INSTR_VRR_VVVU0VB                     /* e.g. vstrczbs*/
 #define INSTR_VRR_VVV0V    6, { V_8,V_12,V_16,V_32,0,0 }         /* e.g. vacq  */
 #define INSTR_VRR_VVV0U0U  6, { V_8,V_12,V_16,U4_32,U4_24,0 }    /* e.g. vfae  */
 #define INSTR_VRR_VVVV     6, { V_8,V_12,V_16,V_32,0,0 }         /* e.g. vfmadb*/
@@ -537,6 +527,9 @@ unused_s390_operands_static_asserts (void)
 #define INSTR_VRR_VV0UUU   6, { V_8,V_12,U4_32,U4_28,U4_24,0 }   /* e.g. vcdg  */
 #define INSTR_VRR_VVVU0UV  6, { V_8,V_12,V_16,V_32,U4_28,U4_20 } /* e.g. vfma  */
 #define INSTR_VRR_VV0U0U   6, { V_8,V_12,U4_32,U4_24,0,0 }       /* e.g. vistr */
+#define INSTR_VRR_0V       6, { V_12,0,0,0,0,0 }                 /* e.g. vtp   */
+#define INSTR_VRR_0V0U     6, { V_12,U16_20,0,0,0,0 }            /* e.g. vtp   */
+#define INSTR_VRR_0VVU     6, { V_12,V_16,U16_20,0,0,0 }         /* e.g. vtz   */
 #define INSTR_VRR_0VV0U    6, { V_12,V_16,U4_24,0,0,0 }          /* e.g. vcp   */
 #define INSTR_VRR_RV0U     6, { R_8,V_12,U4_24,0,0,0 }           /* e.g. vcvb  */
 #define INSTR_VRR_RV0UU    6, { R_8,V_12,U4_24,U4_28,0,0 }       /* e.g. vcvb  */
@@ -559,9 +552,9 @@ unused_s390_operands_static_asserts (void)
 #define MASK_RIE_R0U0     { 0xff, 0x0f, 0x00, 0x00, 0xff, 0xff }
 #define MASK_RIE_RUI0     { 0xff, 0x00, 0x00, 0x00, 0xff, 0xff }
 #define MASK_RIE_RRUUU    { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff }
-#define MASK_RIE_RRUUU2   { 0xff, 0x00, 0x00, 0xc0, 0x00, 0xff }
-#define MASK_RIE_RRUUU3   { 0xff, 0x00, 0x00, 0xe0, 0x00, 0xff }
-#define MASK_RIE_RRUUU4   { 0xff, 0x00, 0xc0, 0x00, 0x00, 0xff }
+#define MASK_RIE_RRUUU2   { 0xff, 0x00, 0x00, 0x80, 0x00, 0xff }
+#define MASK_RIE_RRUUU3   { 0xff, 0x00, 0x00, 0x80, 0x00, 0xff }
+#define MASK_RIE_RRUUU4   { 0xff, 0x00, 0x80, 0x00, 0x00, 0xff }
 #define MASK_RIL_0P       { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 }
 #define MASK_RIL_RP       { 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00 }
 #define MASK_RIL_UP       { 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00 }
@@ -725,6 +718,8 @@ unused_s390_operands_static_asserts (void)
 #define MASK_VRI_VVUUU    { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff }
 #define MASK_VRI_VVUUU2   { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff }
 #define MASK_VRI_VR0UU    { 0xff, 0x00, 0xff, 0x00, 0x00, 0xff }
+#define MASK_VRI_VV0UU    { 0xff, 0x00, 0xff, 0x00, 0x00, 0xff }
+#define MASK_VRI_VVV0UV   { 0xff, 0x00, 0x0f, 0x00, 0x00, 0xff }
 #define MASK_VRX_VRRD     { 0xff, 0x00, 0x00, 0x00, 0xf0, 0xff }
 #define MASK_VRX_VV       { 0xff, 0x00, 0xff, 0xff, 0xf0, 0xff }
 #define MASK_VRX_VRRDU    { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff }
@@ -735,10 +730,10 @@ unused_s390_operands_static_asserts (void)
 #define MASK_VRS_VRRDU    { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff }
 #define MASK_VRS_VRRD     { 0xff, 0x00, 0x00, 0x00, 0xf0, 0xff }
 #define MASK_VRS_RRDV     { 0xff, 0xf0, 0x00, 0x00, 0x00, 0xff }
-#define MASK_VRR_0V       { 0xff, 0xf0, 0xff, 0xff, 0xf0, 0xff }
 #define MASK_VRR_VRR      { 0xff, 0x00, 0x0f, 0xff, 0xf0, 0xff }
 #define MASK_VRR_VVV0U    { 0xff, 0x00, 0x0f, 0xff, 0x00, 0xff }
 #define MASK_VRR_VVV0U0   { 0xff, 0x00, 0x0f, 0x0f, 0xf0, 0xff }
+#define MASK_VRR_VVV0U02  { 0xff, 0x00, 0x0f, 0xf0, 0xf0, 0xff }
 #define MASK_VRR_VVV0U1   { 0xff, 0x00, 0x0f, 0x1f, 0xf0, 0xff }
 #define MASK_VRR_VVV0U2   { 0xff, 0x00, 0x0f, 0x2f, 0xf0, 0xff }
 #define MASK_VRR_VVV0U3   { 0xff, 0x00, 0x0f, 0x3f, 0xf0, 0xff }
@@ -764,6 +759,9 @@ unused_s390_operands_static_asserts (void)
 #define MASK_VRR_VV0UUU   { 0xff, 0x00, 0xff, 0x00, 0x00, 0xff }
 #define MASK_VRR_VVVU0UV  { 0xff, 0x00, 0x00, 0xf0, 0x00, 0xff }
 #define MASK_VRR_VV0U0U   { 0xff, 0x00, 0xff, 0x0f, 0x00, 0xff }
+#define MASK_VRR_0V       { 0xff, 0xf0, 0xff, 0xff, 0xf0, 0xff }
+#define MASK_VRR_0V0U     { 0xff, 0xf0, 0xf0, 0x00, 0x00, 0xff }
+#define MASK_VRR_0VVU     { 0xff, 0xf0, 0x00, 0x00, 0x00, 0xff }
 #define MASK_VRR_0VV0U    { 0xff, 0xf0, 0x0f, 0x0f, 0xf0, 0xff }
 #define MASK_VRR_RV0U     { 0xff, 0x00, 0xff, 0x0f, 0xf0, 0xff }
 #define MASK_VRR_RV0UU    { 0xff, 0x00, 0xff, 0x00, 0xf0, 0xff }
diff --git a/opcodes/s390-opc.txt b/opcodes/s390-opc.txt
index 1182e19..bbc00b1 100644
--- a/opcodes/s390-opc.txt
+++ b/opcodes/s390-opc.txt
@@ -2061,7 +2061,7 @@ e60000000055 vcnf VRR_VV0UU2 "vector fp convert to nnp" arch14 zarch
 
 # Reset-DAT-Protection Facility
 
-b98B rdp RRF_RURR2 "reset dat protection" arch14 zarch optparm
+b98b rdp RRF_RURR2 "reset dat protection" arch14 zarch optparm
 
 # BEAR-Enhancement Facility
 
@@ -2072,3 +2072,113 @@ b201 stbear S_RD "store bear" arch14 zarch
 # Processor-Activity-Instrumentation Facility
 
 b28f qpaci S_RD "query processor activity counter information" arch14 zarch
+
+
+# arch15 instructions
+
+e70000000089 vblend VRR_VVVU0V " " arch15 zarch
+e70000000089 vblendb VRR_VVV0V " " arch15 zarch
+e70001000089 vblendh VRR_VVV0V " " arch15 zarch
+e70002000089 vblendf VRR_VVV0V " " arch15 zarch
+e70003000089 vblendg VRR_VVV0V " " arch15 zarch
+e70004000089 vblendq VRR_VVV0V " " arch15 zarch
+
+e70000000088 veval VRI_VVV0UV " " arch15 zarch
+
+e70000000054 vgem VRR_VV0U " " arch15 zarch
+e70000000054 vgemb VRR_VV " " arch15 zarch
+e70000001054 vgemh VRR_VV " " arch15 zarch
+e70000002054 vgemf VRR_VV " " arch15 zarch
+e70000003054 vgemg VRR_VV " " arch15 zarch
+e70000004054 vgemq VRR_VV " " arch15 zarch
+
+e700000030d7 vuphg VRR_VV " " arch15 zarch
+e700000030d5 vuplhg VRR_VV " " arch15 zarch
+e700000030d6 vuplg VRR_VV " " arch15 zarch
+e700000030d4 vupllg VRR_VV " " arch15 zarch
+
+e700000040f2 vavgq VRR_VVV " " arch15 zarch
+e700000040f0 vavglq VRR_VVV " " arch15 zarch
+e700000040db vecq VRR_VV " " arch15 zarch
+e700000040d9 veclq VRR_VV " " arch15 zarch
+e700000040f8 vceqq VRR_VVV " " arch15 zarch
+e700001040f8 vceqqs VRR_VVV " " arch15 zarch
+e700000040fb vchq VRR_VVV " " arch15 zarch
+e700001040fb vchqs VRR_VVV " " arch15 zarch
+e700000040f9 vchlq VRR_VVV " " arch15 zarch
+e700001040f9 vchlqs VRR_VVV " " arch15 zarch
+e70000004053 vclzq VRR_VV " " arch15 zarch
+e70000004052 vctzq VRR_VV " " arch15 zarch
+e700000040de vlcq VRR_VV " " arch15 zarch
+e700000040df vlpq VRR_VV " " arch15 zarch
+e700000040ff vmxq VRR_VVV " " arch15 zarch
+e700000040fd vmxlq VRR_VVV " " arch15 zarch
+e700000040fe vmnq VRR_VVV " " arch15 zarch
+e700000040fc vmnlq VRR_VVV " " arch15 zarch
+e700030000aa vmalg VRR_VVV0V " " arch15 zarch
+e700040000aa vmalq VRR_VVV0V " " arch15 zarch
+e700030000ab vmahg VRR_VVV0V " " arch15 zarch
+e700040000ab vmahq VRR_VVV0V " " arch15 zarch
+e700030000a9 vmalhg VRR_VVV0V " " arch15 zarch
+e700040000a9 vmalhq VRR_VVV0V " " arch15 zarch
+e700030000ae vmaeg VRR_VVV0V " " arch15 zarch
+e700030000ac vmaleg VRR_VVV0V " " arch15 zarch
+e700030000af vmaog VRR_VVV0V " " arch15 zarch
+e700030000ad vmalog VRR_VVV0V " " arch15 zarch
+e700000030a3 vmhg VRR_VVV " " arch15 zarch
+e700000040a3 vmhq VRR_VVV " " arch15 zarch
+e700000030a1 vmlhg VRR_VVV " " arch15 zarch
+e700000040a1 vmlhq VRR_VVV " " arch15 zarch
+e700000030a2 vmlg VRR_VVV " " arch15 zarch
+e700000040a2 vmlq VRR_VVV " " arch15 zarch
+e700000030a6 vmeg VRR_VVV " " arch15 zarch
+e700000030a4 vmleg VRR_VVV " " arch15 zarch
+e700000030a7 vmog VRR_VVV " " arch15 zarch
+e700000030a5 vmlog VRR_VVV " " arch15 zarch
+
+e700000000b2 vd VRR_VVV0UU " " arch15 zarch
+e700000020b2 vdf VRR_VVV0U02 " " arch15 zarch
+e700000030b2 vdg VRR_VVV0U02 " " arch15 zarch
+e700000040b2 vdq VRR_VVV0U02 " " arch15 zarch
+
+e700000000b0 vdl VRR_VVV0UU " " arch15 zarch
+e700000020b0 vdlf VRR_VVV0U02 " " arch15 zarch
+e700000030b0 vdlg VRR_VVV0U02 " " arch15 zarch
+e700000040b0 vdlq VRR_VVV0U02 " " arch15 zarch
+
+e700000000b3 vr VRR_VVV0UU " " arch15 zarch
+e700000020b3 vrf VRR_VVV0U02 " " arch15 zarch
+e700000030b3 vrg VRR_VVV0U02 " " arch15 zarch
+e700000040b3 vrq VRR_VVV0U02 " " arch15 zarch
+
+e700000000b1 vrl VRR_VVV0UU " " arch15 zarch
+e700000020b1 vrlf VRR_VVV0U02 " " arch15 zarch
+e700000030b1 vrlg VRR_VVV0U02 " " arch15 zarch
+e700000040b1 vrlq VRR_VVV0U02 " " arch15 zarch
+
+b968 clzg RRE_RR " " arch15 zarch
+b969 ctzg RRE_RR " " arch15 zarch
+
+e30000000060 lxab RXY_RRRD " " arch15 zarch
+e30000000062 lxah RXY_RRRD " " arch15 zarch
+e30000000064 lxaf RXY_RRRD " " arch15 zarch
+e30000000066 lxag RXY_RRRD " " arch15 zarch
+e30000000068 lxaq RXY_RRRD " " arch15 zarch
+
+e30000000061 llxab RXY_RRRD " " arch15 zarch
+e30000000063 llxah RXY_RRRD " " arch15 zarch
+e30000000065 llxaf RXY_RRRD " " arch15 zarch
+e30000000067 llxag RXY_RRRD " " arch15 zarch
+e30000000069 llxaq RXY_RRRD " " arch15 zarch
+
+b96c bextg RRF_R0RR2 " " arch15 zarch
+b96d bdepg RRF_R0RR2 " " arch15 zarch
+
+b93e kimd RRF_U0RR " " arch15 zarch optparm
+b93f klmd RRF_U0RR " " arch15 zarch optparm
+
+e6000000004e vcvbq VRR_VV0U2 " " arch15 zarch
+e6000000004a vcvdq VRI_VV0UU " " arch15 zarch
+
+e6000000005f vtp VRR_0V0U " " arch15 zarch optparm
+e6000000007f vtz VRR_0VVU " " arch15 zarch
diff --git a/opcodes/sparc-opc.c b/opcodes/sparc-opc.c
index fb7ebe3..19f7f62 100644
--- a/opcodes/sparc-opc.c
+++ b/opcodes/sparc-opc.c
@@ -2016,7 +2016,7 @@ SLCBCC("cbnefr", 15),
 { "alignaddr",	F3F(2, 0x36, 0x018), F3F(~2, ~0x36, ~0x018), "1,2,d", 0, HWCAP_VIS, 0, v9a },
 { "alignaddrl",	F3F(2, 0x36, 0x01a), F3F(~2, ~0x36, ~0x01a), "1,2,d", 0, HWCAP_VIS, 0, v9a },
 { "faligndata",	F3F(2, 0x36, 0x048), F3F(~2, ~0x36, ~0x048), "v,B,H", 0, HWCAP_VIS, 0, v9a }, /* faligndatag */
-{ "faligndata", F3F(2, 0x36, 0x049), F3F(~2, ~0x36, ~0x049), "v,B,5,}", 0, 0, HWCAP2_SPARC5, v9m }, /* faligndatai  */
+{ "faligndata", F3F(2, 0x36, 0x049), F3F(~2, ~0x36, ~0x049), "1,H,B,}", 0, 0, HWCAP2_SPARC5, v9m }, /* faligndatai  */
 
 { "fzerod",	F3F(2, 0x36, 0x060), F3F(~2, ~0x36, ~0x060), "H", 0, HWCAP_VIS, 0, v9a },
 { "fzero",	F3F(2, 0x36, 0x060), F3F(~2, ~0x36, ~0x060), "H", F_ALIAS, HWCAP_VIS, 0, v9a },
diff --git a/sim/testsuite/pru/mul.s b/sim/testsuite/pru/mul.s
index d62b3ea..754a129 100644
--- a/sim/testsuite/pru/mul.s
+++ b/sim/testsuite/pru/mul.s
@@ -28,16 +28,16 @@
 	ldi r29, 4567
 	nop
 	xin 0, r26, 4
-	qbne32 2f, r26, 1001 * 4567
+	qbne32 2f, r26, (1001 * 4567)
 
 	# MUL: Test the pipeline emulation
 	ldi r28, 1002
 	ldi r29, 1003
 	ldi r29, 4004
 	xin 0, r26, 4
-	qbne32 2f, r26, 1002 * 1003
+	qbne32 2f, r26, (1002 * 1003)
 	xin 0, r26, 4
-	qbne32 2f, r26, 1002 * 4004
+	qbne32 2f, r26, (1002 * 4004)
 
 	# MUL: Test 64-bit result
 	ldi32 r28, 0x12345678
@@ -62,7 +62,7 @@
 	xout 0, r25, 1
 
 	xin 0, r26, 4
-	qbne32 2f, r26, (1001 * 2002) + (3003 * 4004)
+	qbne32 2f, r26, ((1001 * 2002) + (3003 * 4004))
 
 	# MAC: Test 64-bit result
 	ldi r25, 3