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authorBen Elliston <bje@au.ibm.com>2000-12-05 00:46:04 +0000
committerBen Elliston <bje@au.ibm.com>2000-12-05 00:46:04 +0000
commitbb4e03e55591d8751dc9a669afd57f033c14fc22 (patch)
tree00ebb01f2a8dbeef036d329f541ebc3d4d52ef84 /sim
parent0dcedd822e4933f4e9cf2b23eadd2e1581843b96 (diff)
downloadbinutils-bb4e03e55591d8751dc9a669afd57f033c14fc22.zip
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2000-12-05 Ben Elliston <bje@redhat.com>
* genmloop.sh: Use @prefix@, not @cpu@ throughout. Add -prefix and -outfile-suffix options.
Diffstat (limited to 'sim')
-rw-r--r--sim/common/ChangeLog5
-rw-r--r--sim/common/genmloop.sh139
2 files changed, 84 insertions, 60 deletions
diff --git a/sim/common/ChangeLog b/sim/common/ChangeLog
index 074fcd7..e9aad81 100644
--- a/sim/common/ChangeLog
+++ b/sim/common/ChangeLog
@@ -1,3 +1,8 @@
+2000-12-05 Ben Elliston <bje@redhat.com>
+
+ * genmloop.sh: Use @prefix@, not @cpu@ throughout. Add -prefix and
+ -outfile-suffix options.
+
2000-12-04 Ben Elliston <bje@redhat.com>
* cgen-ops.h (SUBWORDSIQI): Mask off top bits.
diff --git a/sim/common/genmloop.sh b/sim/common/genmloop.sh
index d3e17b0..dddd1a1 100644
--- a/sim/common/genmloop.sh
+++ b/sim/common/genmloop.sh
@@ -1,5 +1,5 @@
# Generate the main loop of the simulator.
-# Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc.
+# Copyright (C) 1996, 1997, 1998, 1999, 2000 Free Software Foundation, Inc.
# Contributed by Cygnus Support.
#
# This file is part of the GNU simulators.
@@ -100,6 +100,10 @@
# Things can be sped up by generating both serial and parallel versions
# and is better suited to mixed parallel architectures like the m32r.
#
+# -prefix: string to prepend to function names in mloop.c/eng.h.
+#
+# If no prefix is specified, the cpu type is used.
+#
# -switch file: specify file containing semantics implemented as a switch()
#
# -cpu <cpu-family>
@@ -110,6 +114,10 @@
#
# Specify the mainloop.in input file.
#
+# -outfile-suffix <output-file-suffix>
+#
+# Specify the suffix to append to output files.
+#
# Only one of -scache/-pbb may be selected.
# -simple is the default.
#
@@ -128,6 +136,8 @@ parallel_only=no
switch=
cpu="unknown"
infile=""
+prefix="unknown"
+outsuffix=""
while test $# -gt 0
do
@@ -141,10 +151,12 @@ do
-scache) scache=yes ;;
-pbb) pbb=yes ;;
-no-parallel) ;;
+ -outfile-suffix) shift ; outsuffix=$1 ;;
-parallel-read) parallel=read ;;
-parallel-write) parallel=write ;;
-parallel-generic-write) parallel=genwrite ;;
-parallel-only) parallel_only=yes ;;
+ -prefix) shift ; prefix=$1 ;;
-switch) shift ; switch=$1 ;;
-cpu) shift ; cpu=$1 ;;
-infile) shift ; infile=$1 ;;
@@ -170,14 +182,19 @@ if [ "x$infile" = x ] ; then
exit 1
fi
+if [ "x$prefix" = xunknown ] ; then
+ prefix=$cpu
+fi
+
lowercase='abcdefghijklmnopqrstuvwxyz'
uppercase='ABCDEFGHIJKLMNOPQRSTUVWXYZ'
CPU=`echo ${cpu} | tr "${lowercase}" "${uppercase}"`
+PREFIX=`echo ${prefix} | tr "${lowercase}" "${uppercase}"`
##########################################################################
-rm -f eng.hin
-exec 1>eng.hin
+rm -f eng${outsuffix}.hin
+exec 1>eng${outsuffix}.hin
echo "/* engine configuration for ${cpu} */"
echo ""
@@ -191,11 +208,11 @@ else
fi
echo ""
-echo "/* WITH_SCACHE_PBB_${CPU}: non-zero if the pbb engine was selected. */"
+echo "/* WITH_SCACHE_PBB_${PREFIX}: non-zero if the pbb engine was selected. */"
if [ x$pbb = xyes ] ; then
- echo "#define WITH_SCACHE_PBB_${CPU} 1"
+ echo "#define WITH_SCACHE_PBB_${PREFIX} 1"
else
- echo "#define WITH_SCACHE_PBB_${CPU} 0"
+ echo "#define WITH_SCACHE_PBB_${PREFIX} 0"
fi
echo ""
@@ -256,22 +273,22 @@ echo ""
echo "/* Functions defined in the generated mainloop.c file"
echo " (which doesn't necessarily have that file name). */"
echo ""
-echo "extern ENGINE_FN ${cpu}_engine_run_full;"
-echo "extern ENGINE_FN ${cpu}_engine_run_fast;"
+echo "extern ENGINE_FN ${prefix}_engine_run_full;"
+echo "extern ENGINE_FN ${prefix}_engine_run_fast;"
if [ x$pbb = xyes ] ; then
echo ""
- echo "extern SEM_PC ${cpu}_pbb_begin (SIM_CPU *, int);"
- echo "extern SEM_PC ${cpu}_pbb_chain (SIM_CPU *, SEM_ARG);"
- echo "extern SEM_PC ${cpu}_pbb_cti_chain (SIM_CPU *, SEM_ARG, SEM_BRANCH_TYPE, PCADDR);"
- echo "extern void ${cpu}_pbb_before (SIM_CPU *, SCACHE *);"
- echo "extern void ${cpu}_pbb_after (SIM_CPU *, SCACHE *);"
+ echo "extern SEM_PC ${prefix}_pbb_begin (SIM_CPU *, int);"
+ echo "extern SEM_PC ${prefix}_pbb_chain (SIM_CPU *, SEM_ARG);"
+ echo "extern SEM_PC ${prefix}_pbb_cti_chain (SIM_CPU *, SEM_ARG, SEM_BRANCH_TYPE, PCADDR);"
+ echo "extern void ${prefix}_pbb_before (SIM_CPU *, SCACHE *);"
+ echo "extern void ${prefix}_pbb_after (SIM_CPU *, SCACHE *);"
fi
##########################################################################
-rm -f tmp-mloop.cin mloop.cin
-exec 1>tmp-mloop.cin
+rm -f tmp-mloop-$$.cin mloop${outsuffix}.cin
+exec 1>tmp-mloop-$$.cin
# We use @cpu@ instead of ${cpu} because we still need to run sed to handle
# transformation of @cpu@ for mainloop.in, so there's no need to use ${cpu}
@@ -296,7 +313,7 @@ cat << EOF
virtual and real. */
static INLINE void
-@cpu@_fill_argbuf (const SIM_CPU *cpu, ARGBUF *abuf, const IDESC *idesc,
+@prefix@_fill_argbuf (const SIM_CPU *cpu, ARGBUF *abuf, const IDESC *idesc,
PCADDR pc, int fast_p)
{
#if WITH_SCACHE
@@ -309,7 +326,7 @@ static INLINE void
/* Fill in tracing/profiling fields of an ARGBUF. */
static INLINE void
-@cpu@_fill_argbuf_tp (const SIM_CPU *cpu, ARGBUF *abuf,
+@prefix@_fill_argbuf_tp (const SIM_CPU *cpu, ARGBUF *abuf,
int trace_p, int profile_p)
{
ARGBUF_TRACE_P (abuf) = trace_p;
@@ -324,13 +341,13 @@ static INLINE void
of parallel insns. */
static INLINE void
-@cpu@_emit_before (SIM_CPU *current_cpu, SCACHE *sc, PCADDR pc, int first_p)
+@prefix@_emit_before (SIM_CPU *current_cpu, SCACHE *sc, PCADDR pc, int first_p)
{
ARGBUF *abuf = &sc[0].argbuf;
- const IDESC *id = & CPU_IDESC (current_cpu) [@CPU@_INSN_X_BEFORE];
+ const IDESC *id = & CPU_IDESC (current_cpu) [@PREFIX@_INSN_X_BEFORE];
abuf->fields.before.first_p = first_p;
- @cpu@_fill_argbuf (current_cpu, abuf, id, pc, 0);
+ @prefix@_fill_argbuf (current_cpu, abuf, id, pc, 0);
/* no need to set trace_p,profile_p */
}
@@ -339,12 +356,12 @@ static INLINE void
parallel insns. */
static INLINE void
-@cpu@_emit_after (SIM_CPU *current_cpu, SCACHE *sc, PCADDR pc)
+@prefix@_emit_after (SIM_CPU *current_cpu, SCACHE *sc, PCADDR pc)
{
ARGBUF *abuf = &sc[0].argbuf;
- const IDESC *id = & CPU_IDESC (current_cpu) [@CPU@_INSN_X_AFTER];
+ const IDESC *id = & CPU_IDESC (current_cpu) [@PREFIX@_INSN_X_AFTER];
- @cpu@_fill_argbuf (current_cpu, abuf, id, pc, 0);
+ @prefix@_fill_argbuf (current_cpu, abuf, id, pc, 0);
/* no need to set trace_p,profile_p */
}
@@ -373,7 +390,7 @@ if [ x$scache != xyes -a x$pbb != xyes ] ; then
#define FAST_P 0
void
-@cpu@_engine_run_full (SIM_CPU *current_cpu)
+@prefix@_engine_run_full (SIM_CPU *current_cpu)
{
#define FAST_P 0
SIM_DESC current_state = CPU_STATE (current_cpu);
@@ -428,7 +445,7 @@ cat << EOF
#include "$switch"
#endif
#else
- @cpu@_sem_init_idesc_table (current_cpu);
+ @prefix@_sem_init_idesc_table (current_cpu);
#endif
CPU_IDESC_SEM_INIT_P (current_cpu) = 1;
}
@@ -483,7 +500,7 @@ if [ x$scache = xyes -a x$parallel = xno ] ; then
cat << EOF
static INLINE SCACHE *
-@cpu@_scache_lookup (SIM_CPU *current_cpu, PCADDR vpc, SCACHE *scache,
+@prefix@_scache_lookup (SIM_CPU *current_cpu, PCADDR vpc, SCACHE *scache,
unsigned int hash_mask, int FAST_P)
{
/* First step: look up current insn in hash table. */
@@ -518,7 +535,7 @@ cat << EOF
#define FAST_P 0
void
-@cpu@_engine_run_full (SIM_CPU *current_cpu)
+@prefix@_engine_run_full (SIM_CPU *current_cpu)
{
SIM_DESC current_state = CPU_STATE (current_cpu);
SCACHE *scache = CPU_SCACHE_CACHE (current_cpu);
@@ -536,7 +553,7 @@ cat << EOF
if (! CPU_IDESC_SEM_INIT_P (current_cpu))
{
#if ! WITH_SEM_SWITCH_FULL
- @cpu@_sem_init_idesc_table (current_cpu);
+ @prefix@_sem_init_idesc_table (current_cpu);
#endif
CPU_IDESC_SEM_INIT_P (current_cpu) = 1;
}
@@ -547,7 +564,7 @@ cat << EOF
{
SCACHE *sc;
- sc = @cpu@_scache_lookup (current_cpu, vpc, scache, hash_mask, FAST_P);
+ sc = @prefix@_scache_lookup (current_cpu, vpc, scache, hash_mask, FAST_P);
/* begin full-exec-scache */
EOF
@@ -579,7 +596,7 @@ if [ x$fast = xyes ] ; then
#define FAST_P 1
void
-@cpu@_engine_run_fast (SIM_CPU *current_cpu)
+@prefix@_engine_run_fast (SIM_CPU *current_cpu)
{
SIM_DESC current_state = CPU_STATE (current_cpu);
SCACHE *scache = CPU_SCACHE_CACHE (current_cpu);
@@ -603,7 +620,7 @@ cat << EOF
#include "$switch"
#endif
#else
- @cpu@_semf_init_idesc_table (current_cpu);
+ @prefix@_semf_init_idesc_table (current_cpu);
#endif
CPU_IDESC_SEM_INIT_P (current_cpu) = 1;
}
@@ -614,7 +631,7 @@ cat << EOF
{
SCACHE *sc;
- sc = @cpu@_scache_lookup (current_cpu, vpc, scache, hash_mask, FAST_P);
+ sc = @prefix@_scache_lookup (current_cpu, vpc, scache, hash_mask, FAST_P);
/* begin fast-exec-scache */
EOF
@@ -650,7 +667,7 @@ if [ x$scache = xyes -a x$parallel != xno ] ; then
cat << EOF
static INLINE SCACHE *
-@cpu@_scache_lookup (SIM_CPU *current_cpu, PCADDR vpc, SCACHE *scache,
+@prefix@_scache_lookup (SIM_CPU *current_cpu, PCADDR vpc, SCACHE *scache,
unsigned int hash_mask, int FAST_P)
{
/* First step: look up current insn in hash table. */
@@ -687,7 +704,7 @@ cat << EOF
#define FAST_P 0
void
-@cpu@_engine_run_full (SIM_CPU *current_cpu)
+@prefix@_engine_run_full (SIM_CPU *current_cpu)
{
SIM_DESC current_state = CPU_STATE (current_cpu);
SCACHE *scache = CPU_SCACHE_CACHE (current_cpu);
@@ -722,7 +739,7 @@ cat << EOF
if (! CPU_IDESC_SEM_INIT_P (current_cpu))
{
#if ! WITH_SEM_SWITCH_FULL
- @cpu@_sem_init_idesc_table (current_cpu);
+ @prefix@_sem_init_idesc_table (current_cpu);
#endif
CPU_IDESC_SEM_INIT_P (current_cpu) = 1;
}
@@ -757,7 +774,7 @@ if [ x$fast = xyes ] ; then
#define FAST_P 1
void
-@cpu@_engine_run_fast (SIM_CPU *current_cpu)
+@prefix@_engine_run_fast (SIM_CPU *current_cpu)
{
SIM_DESC current_state = CPU_STATE (current_cpu);
SCACHE *scache = CPU_SCACHE_CACHE (current_cpu);
@@ -801,7 +818,7 @@ cat << EOF
#include "$switch"
#endif
#else
- @cpu@_semf_init_idesc_table (current_cpu);
+ @prefix@_semf_init_idesc_table (current_cpu);
#endif
CPU_IDESC_SEM_INIT_P (current_cpu) = 1;
}
@@ -850,7 +867,7 @@ if [ x$pbb = xyes ] ; then
FAST_P is non-zero if no tracing/profiling/etc. is wanted. */
INLINE SEM_PC
-@cpu@_pbb_begin (SIM_CPU *current_cpu, int FAST_P)
+@prefix@_pbb_begin (SIM_CPU *current_cpu, int FAST_P)
{
SEM_PC new_vpc;
PCADDR pc;
@@ -933,11 +950,11 @@ cat << EOF
/* Was pbb terminated by a cti? */
if (_cti_sc)
{
- id = & CPU_IDESC (current_cpu) [@CPU@_INSN_X_CTI_CHAIN];
+ id = & CPU_IDESC (current_cpu) [@PREFIX@_INSN_X_CTI_CHAIN];
}
else
{
- id = & CPU_IDESC (current_cpu) [@CPU@_INSN_X_CHAIN];
+ id = & CPU_IDESC (current_cpu) [@PREFIX@_INSN_X_CHAIN];
}
SEM_SET_CODE (&sc->argbuf, id, FAST_P);
sc->argbuf.idesc = id;
@@ -964,7 +981,7 @@ cat << EOF
/* Chain to the next block from a non-cti terminated previous block. */
INLINE SEM_PC
-@cpu@_pbb_chain (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+@prefix@_pbb_chain (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
@@ -1002,7 +1019,7 @@ INLINE SEM_PC
BR_TYPE != SEM_BRANCH_UNTAKEN. */
INLINE SEM_PC
-@cpu@_pbb_cti_chain (SIM_CPU *current_cpu, SEM_ARG sem_arg,
+@prefix@_pbb_cti_chain (SIM_CPU *current_cpu, SEM_ARG sem_arg,
SEM_BRANCH_TYPE br_type, PCADDR new_pc)
{
SEM_PC *new_vpc_ptr;
@@ -1060,7 +1077,7 @@ INLINE SEM_PC
This is called before each insn. */
void
-@cpu@_pbb_before (SIM_CPU *current_cpu, SCACHE *sc)
+@prefix@_pbb_before (SIM_CPU *current_cpu, SCACHE *sc)
{
SEM_ARG sem_arg = sc;
const ARGBUF *abuf = SEM_ARGBUF (sem_arg);
@@ -1087,7 +1104,7 @@ void
if (ARGBUF_PROFILE_P (prev_abuf))
{
cycles = (*prev_idesc->timing->model_fn) (current_cpu, prev_sem_arg);
- @cpu@_model_insn_after (current_cpu, 0 /*last_p*/, cycles);
+ @prefix@_model_insn_after (current_cpu, 0 /*last_p*/, cycles);
}
}
@@ -1097,7 +1114,7 @@ void
/* FIXME: Later make cover macros: PROFILE_INSN_{INIT,FINI}. */
if (PROFILE_MODEL_P (current_cpu)
&& ARGBUF_PROFILE_P (cur_abuf))
- @cpu@_model_insn_before (current_cpu, first_p);
+ @prefix@_model_insn_before (current_cpu, first_p);
TRACE_INSN_INIT (current_cpu, cur_abuf, first_p);
TRACE_INSN (current_cpu, cur_idesc->idata, cur_abuf, pc);
@@ -1108,7 +1125,7 @@ void
insns. */
void
-@cpu@_pbb_after (SIM_CPU *current_cpu, SCACHE *sc)
+@prefix@_pbb_after (SIM_CPU *current_cpu, SCACHE *sc)
{
SEM_ARG sem_arg = sc;
const ARGBUF *abuf = SEM_ARGBUF (sem_arg);
@@ -1123,7 +1140,7 @@ void
int cycles;
cycles = (*prev_idesc->timing->model_fn) (current_cpu, prev_sem_arg);
- @cpu@_model_insn_after (current_cpu, 1 /*last_p*/, cycles);
+ @prefix@_model_insn_after (current_cpu, 1 /*last_p*/, cycles);
}
TRACE_INSN_FINI (current_cpu, prev_abuf, 1 /*last_p*/);
}
@@ -1131,7 +1148,7 @@ void
#define FAST_P 0
void
-@cpu@_engine_run_full (SIM_CPU *current_cpu)
+@prefix@_engine_run_full (SIM_CPU *current_cpu)
{
SIM_DESC current_state = CPU_STATE (current_cpu);
SCACHE *scache = CPU_SCACHE_CACHE (current_cpu);
@@ -1176,14 +1193,14 @@ cat << EOF
#include "$switch"
#endif
#else
- @cpu@_sem_init_idesc_table (current_cpu);
+ @prefix@_sem_init_idesc_table (current_cpu);
#endif
/* Initialize the "begin (compile) a pbb" virtual insn. */
vpc = CPU_SCACHE_PBB_BEGIN (current_cpu);
SEM_SET_FULL_CODE (SEM_ARGBUF (vpc),
- & CPU_IDESC (current_cpu) [@CPU@_INSN_X_BEGIN]);
- vpc->argbuf.idesc = & CPU_IDESC (current_cpu) [@CPU@_INSN_X_BEGIN];
+ & CPU_IDESC (current_cpu) [@PREFIX@_INSN_X_BEGIN]);
+ vpc->argbuf.idesc = & CPU_IDESC (current_cpu) [@PREFIX@_INSN_X_BEGIN];
CPU_IDESC_SEM_INIT_P (current_cpu) = 1;
}
@@ -1193,7 +1210,7 @@ cat << EOF
pbb we don't want to call pbb_begin each time (which hashes on the pc
and does a table lookup). A way to speed this up is to save vpc
between calls. */
- vpc = @cpu@_pbb_begin (current_cpu, FAST_P);
+ vpc = @prefix@_pbb_begin (current_cpu, FAST_P);
do
{
@@ -1223,7 +1240,7 @@ if [ x$fast = xyes ] ; then
#define FAST_P 1
void
-@cpu@_engine_run_fast (SIM_CPU *current_cpu)
+@prefix@_engine_run_fast (SIM_CPU *current_cpu)
{
SIM_DESC current_state = CPU_STATE (current_cpu);
SCACHE *scache = CPU_SCACHE_CACHE (current_cpu);
@@ -1268,14 +1285,14 @@ cat << EOF
#include "$switch"
#endif
#else
- @cpu@_semf_init_idesc_table (current_cpu);
+ @prefix@_semf_init_idesc_table (current_cpu);
#endif
/* Initialize the "begin (compile) a pbb" virtual insn. */
vpc = CPU_SCACHE_PBB_BEGIN (current_cpu);
SEM_SET_FAST_CODE (SEM_ARGBUF (vpc),
- & CPU_IDESC (current_cpu) [@CPU@_INSN_X_BEGIN]);
- vpc->argbuf.idesc = & CPU_IDESC (current_cpu) [@CPU@_INSN_X_BEGIN];
+ & CPU_IDESC (current_cpu) [@PREFIX@_INSN_X_BEGIN]);
+ vpc->argbuf.idesc = & CPU_IDESC (current_cpu) [@PREFIX@_INSN_X_BEGIN];
CPU_IDESC_SEM_INIT_P (current_cpu) = 1;
}
@@ -1285,7 +1302,7 @@ cat << EOF
pbb we don't want to call pbb_begin each time (which hashes on the pc
and does a table lookup). A way to speed this up is to save vpc
between calls. */
- vpc = @cpu@_pbb_begin (current_cpu, FAST_P);
+ vpc = @prefix@_pbb_begin (current_cpu, FAST_P);
do
{
@@ -1307,9 +1324,11 @@ fi # -fast
fi # -pbb
-# Process @cpu@,@CPU@ appearing in mainloop.in.
-sed -e "s/@cpu@/$cpu/g" -e "s/@CPU@/$CPU/g" < tmp-mloop.cin > mloop.cin
+# Expand @..@ macros appearing in tmp-mloop-{pid}.cin.
+sed \
+ -e "s/@cpu@/$cpu/g" -e "s/@CPU@/$CPU/g" \
+ -e "s/@prefix@/$prefix/g" -e "s/@PREFIX@/$PREFIX/g" < tmp-mloop-$$.cin > mloop${outsuffix}.cin
rc=$?
-rm -f tmp-mloop.cin
+rm -f tmp-mloop-$$.cin
exit $rc