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author | Tom de Vries <tdevries@suse.de> | 2024-11-23 13:07:38 +0100 |
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committer | Tom de Vries <tdevries@suse.de> | 2024-11-23 13:07:38 +0100 |
commit | d2d240ff89b4d3359ea70cdb47d3e79294ca891a (patch) | |
tree | d277cf5c4263881d513deb2d7389c2a0c1f4610b /sim/v850 | |
parent | 8dfa29fcbd60bead4d67569bd14c818540959130 (diff) | |
download | binutils-d2d240ff89b4d3359ea70cdb47d3e79294ca891a.zip binutils-d2d240ff89b4d3359ea70cdb47d3e79294ca891a.tar.gz binutils-d2d240ff89b4d3359ea70cdb47d3e79294ca891a.tar.bz2 |
[sim] Run spellcheck.sh in sim (part 1)
Run gdb/contrib/spellcheck.sh on directory sim.
Fix auto-corrected typos:
...
accessable -> accessible
accidently -> accidentally
accomodate -> accommodate
adress -> address
afair -> affair
agains -> against
agressively -> aggressively
annuled -> annulled
arbitary -> arbitrary
arround -> around
auxillary -> auxiliary
availablity -> availability
clasic -> classic
comming -> coming
controled -> controlled
controling -> controlling
destory -> destroy
existance -> existence
explictly -> explicitly
faciliate -> facilitate
fouth -> fourth
fullfilled -> fulfilled
guarentee -> guarantee
hinderance -> hindrance
independant -> independent
inital -> initial
loosing -> losing
occurance -> occurrence
occured -> occurred
occuring -> occurring
omited -> omitted
oportunity -> opportunity
parallely -> parallelly
permissable -> permissible
postive -> positive
powerfull -> powerful
preceed -> precede
preceeding -> preceding
preceeds -> precedes
primative -> primitive
probaly -> probably
programable -> programmable
propogate -> propagate
propper -> proper
recieve -> receive
reconized -> recognized
refered -> referred
refering -> referring
relevent -> relevant
responisble -> responsible
retreive -> retrieve
safty -> safety
specifiying -> specifying
spontanous -> spontaneous
sqaure -> square
successfull -> successful
supress -> suppress
sytem -> system
thru -> through
transfered -> transferred
trigered -> triggered
unfortunatly -> unfortunately
upto -> up to
usefull -> useful
wierd -> weird
writen -> written
doesnt -> doesn't
isnt -> isn't
...
Manually undid the "andd -> and" transformation in sim/testsuite/cr16/andd.cgs
and sim/cr16/simops.c.
Tested by rebuilding on x86_64-linux.
Approved-By: Tom Tromey <tom@tromey.com>
Diffstat (limited to 'sim/v850')
-rw-r--r-- | sim/v850/simops.c | 2 | ||||
-rw-r--r-- | sim/v850/v850-sim.h | 2 | ||||
-rw-r--r-- | sim/v850/v850.igen | 4 |
3 files changed, 4 insertions, 4 deletions
diff --git a/sim/v850/simops.c b/sim/v850/simops.c index 97948f7..e2799af 100644 --- a/sim/v850/simops.c +++ b/sim/v850/simops.c @@ -355,7 +355,7 @@ Multiply64 (int sign, unsigned long op0) hi = (((op0 >> 16) & 0xFFFF) * ((op1 >> 16) & 0xFFFF)); /* We now need to add all of these results together, taking care - to propogate the carries from the additions: */ + to propagate the carries from the additions: */ RdLo = Add32 (lo, (mid1 << 16), & carry); RdHi = carry; RdLo = Add32 (RdLo, (mid2 << 16), & carry); diff --git a/sim/v850/v850-sim.h b/sim/v850/v850-sim.h index 6bd5fcf..1719cf8 100644 --- a/sim/v850/v850-sim.h +++ b/sim/v850/v850-sim.h @@ -28,7 +28,7 @@ typedef struct _v850_regs { reg_t mpu0_sregs[28]; /* mpu0 system registers */ reg_t mpu1_sregs[28]; /* mpu1 system registers */ reg_t fpu_sregs[28]; /* fpu system registers */ - reg_t selID_sregs[7][32]; /* system registers, selID 1 thru selID 7 */ + reg_t selID_sregs[7][32]; /* system registers, selID 1 through selID 7 */ reg64_t vregs[32]; /* vector registers. */ } v850_regs; diff --git a/sim/v850/v850.igen b/sim/v850/v850.igen index 6b9a8bb..ef0f559 100644 --- a/sim/v850/v850.igen +++ b/sim/v850/v850.igen @@ -1149,7 +1149,7 @@ rrrrr,111111,RRRRR + wwww,0011110,mmmm,0:XI:::mac hi = (((op0 >> 16) & 0xFFFF) * ((op1 >> 16) & 0xFFFF)); /* We now need to add all of these results together, taking care - to propogate the carries from the additions: */ + to propagate the carries from the additions: */ RdLo = Add32 (lo, (mid1 << 16), & carry); RdHi = carry; RdLo = Add32 (RdLo, (mid2 << 16), & carry); @@ -1214,7 +1214,7 @@ rrrrr,111111,RRRRR + wwww,0011111,mmmm,0:XI:::macu hi = (((op0 >> 16) & 0xFFFF) * ((op1 >> 16) & 0xFFFF)); /* We now need to add all of these results together, taking care - to propogate the carries from the additions: */ + to propagate the carries from the additions: */ RdLo = Add32 (lo, (mid1 << 16), & carry); RdHi = carry; RdLo = Add32 (RdLo, (mid2 << 16), & carry); |