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| author | Mike Frysinger <vapier@gentoo.org> | 2021-01-05 22:09:57 -0500 |
|---|---|---|
| committer | Mike Frysinger <vapier@gentoo.org> | 2021-01-15 19:18:34 -0500 |
| commit | 1368b914e93a3af332f787d3d41c106d11bb90da (patch) | |
| tree | 9893ccae5d2d8cbf2ce855e09d6b8f30b56a21bc /sim/testsuite/frv/umul.cgs | |
| parent | e403a898b5893337baea73bcb001ece74042f351 (diff) | |
| download | binutils-1368b914e93a3af332f787d3d41c106d11bb90da.zip binutils-1368b914e93a3af332f787d3d41c106d11bb90da.tar.gz binutils-1368b914e93a3af332f787d3d41c106d11bb90da.tar.bz2 | |
sim: testsuite: flatten tree
Now that all port tests live under testsuite/sim/*/, and none live
in testsuite/ directly, flatten the structure by moving all of the
dirs under testsuite/sim/ to testsuite/ directly.
We need to stop passing --tool to dejagnu so that it searches all
dirs and not just ones that start with "sim". Since we have no
other dirs in this tree, and no plans to add any, should be fine.
Diffstat (limited to 'sim/testsuite/frv/umul.cgs')
| -rw-r--r-- | sim/testsuite/frv/umul.cgs | 76 |
1 files changed, 76 insertions, 0 deletions
diff --git a/sim/testsuite/frv/umul.cgs b/sim/testsuite/frv/umul.cgs new file mode 100644 index 0000000..6c61221 --- /dev/null +++ b/sim/testsuite/frv/umul.cgs @@ -0,0 +1,76 @@ +# frv testcase for umul $GRi,$GRj,$GRk +# mach: all + + .include "testutils.inc" + + start + + .global umul +umul: + set_gr_immed 3,gr7 ; multiply small numbers + set_gr_immed 2,gr8 + umul gr7,gr8,gr8 + test_gr_immed 0,gr8 + test_gr_immed 6,gr9 + + set_gr_immed 1,gr7 ; multiply by 1 + set_gr_immed 2,gr8 + umul gr7,gr8,gr8 + test_gr_immed 0,gr8 + test_gr_immed 2,gr9 + + set_gr_immed 2,gr7 ; multiply by 1 + set_gr_immed 1,gr8 + umul gr7,gr8,gr8 + test_gr_immed 0,gr8 + test_gr_immed 2,gr9 + + set_gr_immed 0,gr7 ; multiply by 0 + set_gr_immed 2,gr8 + umul gr7,gr8,gr8 + test_gr_immed 0,gr8 + test_gr_immed 0,gr9 + + set_gr_immed 2,gr7 ; multiply by 0 + set_gr_immed 0,gr8 + umul gr7,gr8,gr8 + test_gr_immed 0,gr8 + test_gr_immed 0,gr9 + + set_gr_limmed 0x3fff,0xffff,gr7 ; 31 bit result + set_gr_immed 2,gr8 + umul gr7,gr8,gr8 + test_gr_immed 0,gr8 + test_gr_limmed 0x7fff,0xfffe,gr9 + + set_gr_limmed 0x4000,0x0000,gr7 ; 32 bit result + set_gr_immed 2,gr8 + umul gr7,gr8,gr8 + test_gr_immed 0,gr8 + test_gr_limmed 0x8000,0x0000,gr9 + + set_gr_limmed 0x8000,0x0000,gr7 ; 33 bit result + set_gr_immed 2,gr8 + umul gr7,gr8,gr8 + test_gr_immed 1,gr8 + test_gr_immed 0x00000000,gr9 + + set_gr_limmed 0x7fff,0xffff,gr7 ; max positive result + set_gr_limmed 0x7fff,0xffff,gr8 + umul gr7,gr8,gr8 + test_gr_limmed 0x3fff,0xffff,gr8 + test_gr_immed 0x00000001,gr9 + + set_gr_limmed 0x8000,0x0000,gr7 ; max positive result + set_gr_limmed 0x8000,0x0000,gr8 + umul gr7,gr8,gr8 + test_gr_limmed 0x4000,0x0000,gr8 + test_gr_immed 0,gr9 + + set_gr_limmed 0xffff,0xffff,gr7 ; max positive result + set_gr_limmed 0xffff,0xffff,gr8 + umul gr7,gr8,gr8 + test_gr_limmed 0xffff,0xfffe,gr8 + test_gr_immed 1,gr9 + + pass |