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author | Jan Beulich <jbeulich@novell.com> | 2018-04-26 08:29:09 +0200 |
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committer | Jan Beulich <jbeulich@suse.com> | 2018-04-26 08:29:09 +0200 |
commit | dcd7e323760ab296262a2e18e9869d37ff59f340 (patch) | |
tree | e99379f41e148453d0633a481b70a1cd94aa16e5 /sim/rl78/gdb-if.c | |
parent | 6b8d358865b10f3f8269d0d89ece1b19b114be0d (diff) | |
download | binutils-dcd7e323760ab296262a2e18e9869d37ff59f340.zip binutils-dcd7e323760ab296262a2e18e9869d37ff59f340.tar.gz binutils-dcd7e323760ab296262a2e18e9869d37ff59f340.tar.bz2 |
x86: tighten assertion in build_modrm_byte()
All VEX3SOURCES cases should have VexW set, and all should have a SIMD
register destination.
Diffstat (limited to 'sim/rl78/gdb-if.c')
0 files changed, 0 insertions, 0 deletions