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| author | Michael Meissner <gnu@the-meissners.org> | 1997-02-11 20:19:28 +0000 |
|---|---|---|
| committer | Michael Meissner <gnu@the-meissners.org> | 1997-02-11 20:19:28 +0000 |
| commit | 37404956b433bcbef387449d997a683be6f78369 (patch) | |
| tree | 809162bcebe78c5f088111966bca2993a8a2b49e /sim/ppc/ppc-opcode-complex | |
| parent | 3d6ab69f3535bb78ec386181a491854d880e43b0 (diff) | |
| download | binutils-37404956b433bcbef387449d997a683be6f78369.zip binutils-37404956b433bcbef387449d997a683be6f78369.tar.gz binutils-37404956b433bcbef387449d997a683be6f78369.tar.bz2 | |
New version from Andrew; Portability fixes on top of that
Diffstat (limited to 'sim/ppc/ppc-opcode-complex')
| -rw-r--r-- | sim/ppc/ppc-opcode-complex | 35 |
1 files changed, 33 insertions, 2 deletions
diff --git a/sim/ppc/ppc-opcode-complex b/sim/ppc/ppc-opcode-complex index 78fac6a..13361ec 100644 --- a/sim/ppc/ppc-opcode-complex +++ b/sim/ppc/ppc-opcode-complex @@ -19,9 +19,40 @@ # array,normal: 0: 5: 0: 5: array,normal: 21:31:32:-1:OE,LR,AA,Rc,LK: +## +## Branch Conditional instruction - Expand BO{0:4} only, ignore BO{5} +## array,expand-forced: 6: 9: 6: 9:BO: 0xfc000000:0x40000000 -array,boolean: 11:15:11:15:0RA: 0xfc000000:0x38000000:0 +## +## Expand RA on equality with 0 in Add instructions were if(RA==0) appears. +## +# Add Immediate +array,boolean: 11:15:11:15:RA: 0xfc000000:0x38000000:0 +# Add Immediate Shifted array,boolean: 11:15:11:15:RA: 0xfc000000:0x3c000000:0 -# BLR instruction - LR=8 is munged into 0x100 == 256 +## +## Ditto for high frequency load/store instructions. +## +# Store Byte +#array,boolean: 11:15:11:15:RA: 0xfc000000:0x98000000:0 +# Store Word +#array,boolean: 11:15:11:15:RA: 0xfc000000:0x90000000:0 +# Load Word and Zero +#array,boolean: 11:15:11:15:RA: 0xfc000000:0x80000000:0 +## +## Move to/from SPR instructions - LR=8 is munged into 0x100 == 256 +## +#array,boolean: 11:20:11:20:SPR: 0xfc0007ff:0x7c0003a6:256 +#array,boolean: 11:20:11:20:SPR: 0xfc0007ff:0x7c0002a6:256 +## +## Compare Immediate instruction - separate out L == 0 and L == 1 +## +# Compare Immediate +#array,normal: 10:11:10:11:L: 0xfc000000:0x2c000000:0 +## +## Move to/from SPR instructions - separate out LR case +## +# Move to SPR array,boolean: 11:20:11:20:SPR: 0xfc0007ff:0x7c0003a6:256 +# Move from SPR array,boolean: 11:20:11:20:SPR: 0xfc0007ff:0x7c0002a6:256 |