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| author | Mike Frysinger <vapier@gentoo.org> | 2022-10-26 23:01:21 +0545 |
|---|---|---|
| committer | Mike Frysinger <vapier@gentoo.org> | 2022-10-31 21:24:39 +0545 |
| commit | 5bab16fdf1775c8abd16376458c5843fbe1d4314 (patch) | |
| tree | 0b41c08b25c87525ba53362fca775a7d6acb6599 /sim/m32r | |
| parent | ed60d3edd51f6c33fb0f3f09400094a1b1c2ceb2 (diff) | |
| download | binutils-5bab16fdf1775c8abd16376458c5843fbe1d4314.zip binutils-5bab16fdf1775c8abd16376458c5843fbe1d4314.tar.gz binutils-5bab16fdf1775c8abd16376458c5843fbe1d4314.tar.bz2 | |
sim: reg: constify store helper
These functions only read from memory, so mark the pointer as const.
Diffstat (limited to 'sim/m32r')
| -rw-r--r-- | sim/m32r/m32r.c | 2 | ||||
| -rw-r--r-- | sim/m32r/m32r2.c | 2 | ||||
| -rw-r--r-- | sim/m32r/m32rx.c | 2 |
3 files changed, 3 insertions, 3 deletions
diff --git a/sim/m32r/m32r.c b/sim/m32r/m32r.c index 811c2b1..f857369 100644 --- a/sim/m32r/m32r.c +++ b/sim/m32r/m32r.c @@ -98,7 +98,7 @@ m32rbf_fetch_register (SIM_CPU *current_cpu, int rn, unsigned char *buf, int len /* The contents of BUF are in target byte order. */ int -m32rbf_store_register (SIM_CPU *current_cpu, int rn, unsigned char *buf, int len) +m32rbf_store_register (SIM_CPU *current_cpu, int rn, const unsigned char *buf, int len) { int size = m32rbf_register_size (rn); if (len != size) diff --git a/sim/m32r/m32r2.c b/sim/m32r/m32r2.c index 9c8daa5..a057a4c 100644 --- a/sim/m32r/m32r2.c +++ b/sim/m32r/m32r2.c @@ -38,7 +38,7 @@ m32r2f_fetch_register (SIM_CPU *current_cpu, int rn, unsigned char *buf, int len /* The contents of BUF are in target byte order. */ int -m32r2f_store_register (SIM_CPU *current_cpu, int rn, unsigned char *buf, int len) +m32r2f_store_register (SIM_CPU *current_cpu, int rn, const unsigned char *buf, int len) { return m32rbf_store_register (current_cpu, rn, buf, len); } diff --git a/sim/m32r/m32rx.c b/sim/m32r/m32rx.c index 0709803..deafcbe 100644 --- a/sim/m32r/m32rx.c +++ b/sim/m32r/m32rx.c @@ -38,7 +38,7 @@ m32rxf_fetch_register (SIM_CPU *current_cpu, int rn, unsigned char *buf, int len /* The contents of BUF are in target byte order. */ int -m32rxf_store_register (SIM_CPU *current_cpu, int rn, unsigned char *buf, int len) +m32rxf_store_register (SIM_CPU *current_cpu, int rn, const unsigned char *buf, int len) { return m32rbf_store_register (current_cpu, rn, buf, len); } |