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authorMike Frysinger <vapier@gentoo.org>2015-03-14 23:41:25 -0400
committerMike Frysinger <vapier@gentoo.org>2015-03-16 01:23:52 -0400
commitae7d0cac8ce971f7108d270c1d3f8481919b1e86 (patch)
tree922127997fda3de2483ed896fba8ae88576bba5e /sim/m32r/tconfig.h
parent9c5f41df36176d86afa65fc9b69b8fd6f6044547 (diff)
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sim: rename tconfig.in to tconfig.h
Rather than manually include tconfig.h when we think we'll need it (which is error prone as it can define symbols we expect from config.h), have it be included directly by config.h. Since we know we have to include that header everywhere already, this will make sure tconfig.h isn't missed. It should also be fine as tconfig.h is supposed to be simple and only set up a few core defines for the target. This allows us to stop symlinking it in place all the time and just use it straight out of the respective source directory.
Diffstat (limited to 'sim/m32r/tconfig.h')
-rw-r--r--sim/m32r/tconfig.h38
1 files changed, 38 insertions, 0 deletions
diff --git a/sim/m32r/tconfig.h b/sim/m32r/tconfig.h
new file mode 100644
index 0000000..a5c55d5
--- /dev/null
+++ b/sim/m32r/tconfig.h
@@ -0,0 +1,38 @@
+/* M32R target configuration file. -*- C -*- */
+
+#ifndef M32R_TCONFIG_H
+#define M32R_TCONFIG_H
+
+/* Define this if the simulator can vary the size of memory.
+ See the xxx simulator for an example.
+ This enables the `-m size' option.
+ The memory size is stored in STATE_MEM_SIZE. */
+/* Not used for M32R since we use the memory module. */
+/* #define SIM_HAVE_MEM_SIZE */
+
+/* See sim-hload.c. We properly handle LMA. */
+#define SIM_HANDLES_LMA 1
+
+/* For MSPR support. FIXME: revisit. */
+#define WITH_DEVICES 1
+
+#if 0
+/* Enable watchpoints. */
+#define WITH_WATCHPOINTS 1
+#endif
+
+/* Define this to enable the intrinsic breakpoint mechanism. */
+/* FIXME: may be able to remove SIM_HAVE_BREAKPOINT since it essentially
+ duplicates ifdef SIM_BREAKPOINT (right?) */
+#if 0
+#define SIM_HAVE_BREAKPOINTS
+#define SIM_BREAKPOINT { 0x10, 0xf1 }
+#define SIM_BREAKPOINT_SIZE 2
+#endif
+
+/* This is a global setting. Different cpu families can't mix-n-match -scache
+ and -pbb. However some cpu families may use -simple while others use
+ one of -scache/-pbb. */
+#define WITH_SCACHE_PBB 1
+
+#endif /* M32R_TCONFIG_H */