diff options
author | Doug Evans <dje@google.com> | 1999-01-28 06:51:00 +0000 |
---|---|---|
committer | Doug Evans <dje@google.com> | 1999-01-28 06:51:00 +0000 |
commit | eb2346970afecdf18739229ad0d4dbe6aab18723 (patch) | |
tree | 1390775a5d2de9ee42fadc018d6ace8961f909dc /sim/m32r/cpux.h | |
parent | 44ccd41a12123d98a7eed808906e763dae4e620e (diff) | |
download | binutils-eb2346970afecdf18739229ad0d4dbe6aab18723.zip binutils-eb2346970afecdf18739229ad0d4dbe6aab18723.tar.gz binutils-eb2346970afecdf18739229ad0d4dbe6aab18723.tar.bz2 |
* cpu.h,decode.c,model.c,sem-switch.c,sem.c: Rebuild.
* cpux.h,decodex.c,modelx.c,semx-switch.c: Rebuild.
Diffstat (limited to 'sim/m32r/cpux.h')
-rw-r--r-- | sim/m32r/cpux.h | 694 |
1 files changed, 94 insertions, 600 deletions
diff --git a/sim/m32r/cpux.h b/sim/m32r/cpux.h index 6323b18..c8894df 100644 --- a/sim/m32r/cpux.h +++ b/sim/m32r/cpux.h @@ -2,7 +2,7 @@ THIS FILE IS MACHINE GENERATED WITH CGEN. -Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc. +Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc. This file is part of the GNU Simulators. @@ -115,7 +115,7 @@ typedef struct { } MODEL_M32RX_DATA; union sem_fields { - struct { /* empty format for unspecified field list */ + struct { /* empty sformat for unspecified field list */ int empty; } fmt_empty; struct { /* e.g. add $dr,$sr */ @@ -189,10 +189,10 @@ union sem_fields { unsigned char in_src2; } fmt_cmpz; struct { /* e.g. div $dr,$sr */ - SI * i_sr; SI * i_dr; - unsigned char in_sr; + SI * i_sr; unsigned char in_dr; + unsigned char in_sr; unsigned char out_dr; } fmt_div; struct { /* e.g. ld $dr,@$sr */ @@ -329,56 +329,56 @@ union sem_fields { unsigned char out_dr; } fmt_slli; struct { /* e.g. st $src1,@$src2 */ - SI * i_src2; SI * i_src1; - unsigned char in_src2; + SI * i_src2; unsigned char in_src1; + unsigned char in_src2; } fmt_st; struct { /* e.g. st $src1,@($slo16,$src2) */ INT f_simm16; - SI * i_src2; SI * i_src1; - unsigned char in_src2; + SI * i_src2; unsigned char in_src1; + unsigned char in_src2; } fmt_st_d; struct { /* e.g. stb $src1,@$src2 */ - SI * i_src2; SI * i_src1; - unsigned char in_src2; + SI * i_src2; unsigned char in_src1; + unsigned char in_src2; } fmt_stb; struct { /* e.g. stb $src1,@($slo16,$src2) */ INT f_simm16; - SI * i_src2; SI * i_src1; - unsigned char in_src2; + SI * i_src2; unsigned char in_src1; + unsigned char in_src2; } fmt_stb_d; struct { /* e.g. sth $src1,@$src2 */ - SI * i_src2; SI * i_src1; - unsigned char in_src2; + SI * i_src2; unsigned char in_src1; + unsigned char in_src2; } fmt_sth; struct { /* e.g. sth $src1,@($slo16,$src2) */ INT f_simm16; - SI * i_src2; SI * i_src1; - unsigned char in_src2; + SI * i_src2; unsigned char in_src1; + unsigned char in_src2; } fmt_sth_d; struct { /* e.g. st $src1,@+$src2 */ - SI * i_src2; SI * i_src1; - unsigned char in_src2; + SI * i_src2; unsigned char in_src1; + unsigned char in_src2; unsigned char out_src2; } fmt_st_plus; struct { /* e.g. unlock $src1,@$src2 */ - SI * i_src2; SI * i_src1; - unsigned char in_src2; + SI * i_src2; unsigned char in_src1; + unsigned char in_src2; } fmt_unlock; struct { /* e.g. satb $dr,$sr */ SI * i_sr; @@ -423,15 +423,15 @@ union sem_fields { IADDR i_disp24; } fmt_bc24; struct { /* e.g. beq $src1,$src2,$disp16 */ + IADDR i_disp16; SI * i_src1; SI * i_src2; - IADDR i_disp16; unsigned char in_src1; unsigned char in_src2; } fmt_beq; struct { /* e.g. beqz $src2,$disp16 */ - SI * i_src2; IADDR i_disp16; + SI * i_src2; unsigned char in_src2; } fmt_beqz; struct { /* e.g. bl.s $disp8 */ @@ -511,7 +511,7 @@ union sem_fields { /* The ARGBUF struct. */ struct argbuf { /* These are the baseclass definitions. */ - PCADDR addr; + IADDR addr; const IDESC *idesc; char trace_p; char profile_p; @@ -534,27 +534,27 @@ struct scache { /* Macros to simplify extraction, reading and semantic code. These define and assign the local vars that contain the insn's fields. */ -#define EXTRACT_FMT_EMPTY_VARS \ +#define EXTRACT_IFMT_EMPTY_VARS \ /* Instruction fields. */ \ unsigned int length; -#define EXTRACT_FMT_EMPTY_CODE \ +#define EXTRACT_IFMT_EMPTY_CODE \ length = 0; \ -#define EXTRACT_FMT_ADD_VARS \ +#define EXTRACT_IFMT_ADD_VARS \ /* Instruction fields. */ \ UINT f_op1; \ UINT f_r1; \ UINT f_op2; \ UINT f_r2; \ unsigned int length; -#define EXTRACT_FMT_ADD_CODE \ +#define EXTRACT_IFMT_ADD_CODE \ length = 2; \ f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \ f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \ f_op2 = EXTRACT_UINT (insn, 16, 8, 4); \ f_r2 = EXTRACT_UINT (insn, 16, 12, 4); \ -#define EXTRACT_FMT_ADD3_VARS \ +#define EXTRACT_IFMT_ADD3_VARS \ /* Instruction fields. */ \ UINT f_op1; \ UINT f_r1; \ @@ -562,7 +562,7 @@ struct scache { UINT f_r2; \ INT f_simm16; \ unsigned int length; -#define EXTRACT_FMT_ADD3_CODE \ +#define EXTRACT_IFMT_ADD3_CODE \ length = 4; \ f_op1 = EXTRACT_UINT (insn, 32, 0, 4); \ f_r1 = EXTRACT_UINT (insn, 32, 4, 4); \ @@ -570,7 +570,7 @@ struct scache { f_r2 = EXTRACT_UINT (insn, 32, 12, 4); \ f_simm16 = EXTRACT_INT (insn, 32, 16, 16); \ -#define EXTRACT_FMT_AND3_VARS \ +#define EXTRACT_IFMT_AND3_VARS \ /* Instruction fields. */ \ UINT f_op1; \ UINT f_r1; \ @@ -578,7 +578,7 @@ struct scache { UINT f_r2; \ UINT f_uimm16; \ unsigned int length; -#define EXTRACT_FMT_AND3_CODE \ +#define EXTRACT_IFMT_AND3_CODE \ length = 4; \ f_op1 = EXTRACT_UINT (insn, 32, 0, 4); \ f_r1 = EXTRACT_UINT (insn, 32, 4, 4); \ @@ -586,7 +586,7 @@ struct scache { f_r2 = EXTRACT_UINT (insn, 32, 12, 4); \ f_uimm16 = EXTRACT_UINT (insn, 32, 16, 16); \ -#define EXTRACT_FMT_OR3_VARS \ +#define EXTRACT_IFMT_OR3_VARS \ /* Instruction fields. */ \ UINT f_op1; \ UINT f_r1; \ @@ -594,7 +594,7 @@ struct scache { UINT f_r2; \ UINT f_uimm16; \ unsigned int length; -#define EXTRACT_FMT_OR3_CODE \ +#define EXTRACT_IFMT_OR3_CODE \ length = 4; \ f_op1 = EXTRACT_UINT (insn, 32, 0, 4); \ f_r1 = EXTRACT_UINT (insn, 32, 4, 4); \ @@ -602,33 +602,19 @@ struct scache { f_r2 = EXTRACT_UINT (insn, 32, 12, 4); \ f_uimm16 = EXTRACT_UINT (insn, 32, 16, 16); \ -#define EXTRACT_FMT_ADDI_VARS \ +#define EXTRACT_IFMT_ADDI_VARS \ /* Instruction fields. */ \ UINT f_op1; \ UINT f_r1; \ INT f_simm8; \ unsigned int length; -#define EXTRACT_FMT_ADDI_CODE \ +#define EXTRACT_IFMT_ADDI_CODE \ length = 2; \ f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \ f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \ f_simm8 = EXTRACT_INT (insn, 16, 8, 8); \ -#define EXTRACT_FMT_ADDV_VARS \ - /* Instruction fields. */ \ - UINT f_op1; \ - UINT f_r1; \ - UINT f_op2; \ - UINT f_r2; \ - unsigned int length; -#define EXTRACT_FMT_ADDV_CODE \ - length = 2; \ - f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \ - f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \ - f_op2 = EXTRACT_UINT (insn, 16, 8, 4); \ - f_r2 = EXTRACT_UINT (insn, 16, 12, 4); \ - -#define EXTRACT_FMT_ADDV3_VARS \ +#define EXTRACT_IFMT_ADDV3_VARS \ /* Instruction fields. */ \ UINT f_op1; \ UINT f_r1; \ @@ -636,7 +622,7 @@ struct scache { UINT f_r2; \ INT f_simm16; \ unsigned int length; -#define EXTRACT_FMT_ADDV3_CODE \ +#define EXTRACT_IFMT_ADDV3_CODE \ length = 4; \ f_op1 = EXTRACT_UINT (insn, 32, 0, 4); \ f_r1 = EXTRACT_UINT (insn, 32, 4, 4); \ @@ -644,45 +630,31 @@ struct scache { f_r2 = EXTRACT_UINT (insn, 32, 12, 4); \ f_simm16 = EXTRACT_INT (insn, 32, 16, 16); \ -#define EXTRACT_FMT_ADDX_VARS \ - /* Instruction fields. */ \ - UINT f_op1; \ - UINT f_r1; \ - UINT f_op2; \ - UINT f_r2; \ - unsigned int length; -#define EXTRACT_FMT_ADDX_CODE \ - length = 2; \ - f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \ - f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \ - f_op2 = EXTRACT_UINT (insn, 16, 8, 4); \ - f_r2 = EXTRACT_UINT (insn, 16, 12, 4); \ - -#define EXTRACT_FMT_BC8_VARS \ +#define EXTRACT_IFMT_BC8_VARS \ /* Instruction fields. */ \ UINT f_op1; \ UINT f_r1; \ SI f_disp8; \ unsigned int length; -#define EXTRACT_FMT_BC8_CODE \ +#define EXTRACT_IFMT_BC8_CODE \ length = 2; \ f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \ f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \ f_disp8 = ((((EXTRACT_INT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4)))); \ -#define EXTRACT_FMT_BC24_VARS \ +#define EXTRACT_IFMT_BC24_VARS \ /* Instruction fields. */ \ UINT f_op1; \ UINT f_r1; \ SI f_disp24; \ unsigned int length; -#define EXTRACT_FMT_BC24_CODE \ +#define EXTRACT_IFMT_BC24_CODE \ length = 4; \ f_op1 = EXTRACT_UINT (insn, 32, 0, 4); \ f_r1 = EXTRACT_UINT (insn, 32, 4, 4); \ f_disp24 = ((((EXTRACT_INT (insn, 32, 8, 24)) << (2))) + (pc)); \ -#define EXTRACT_FMT_BEQ_VARS \ +#define EXTRACT_IFMT_BEQ_VARS \ /* Instruction fields. */ \ UINT f_op1; \ UINT f_r1; \ @@ -690,7 +662,7 @@ struct scache { UINT f_r2; \ SI f_disp16; \ unsigned int length; -#define EXTRACT_FMT_BEQ_CODE \ +#define EXTRACT_IFMT_BEQ_CODE \ length = 4; \ f_op1 = EXTRACT_UINT (insn, 32, 0, 4); \ f_r1 = EXTRACT_UINT (insn, 32, 4, 4); \ @@ -698,7 +670,7 @@ struct scache { f_r2 = EXTRACT_UINT (insn, 32, 12, 4); \ f_disp16 = ((((EXTRACT_INT (insn, 32, 16, 16)) << (2))) + (pc)); \ -#define EXTRACT_FMT_BEQZ_VARS \ +#define EXTRACT_IFMT_BEQZ_VARS \ /* Instruction fields. */ \ UINT f_op1; \ UINT f_r1; \ @@ -706,7 +678,7 @@ struct scache { UINT f_r2; \ SI f_disp16; \ unsigned int length; -#define EXTRACT_FMT_BEQZ_CODE \ +#define EXTRACT_IFMT_BEQZ_CODE \ length = 4; \ f_op1 = EXTRACT_UINT (insn, 32, 0, 4); \ f_r1 = EXTRACT_UINT (insn, 32, 4, 4); \ @@ -714,93 +686,21 @@ struct scache { f_r2 = EXTRACT_UINT (insn, 32, 12, 4); \ f_disp16 = ((((EXTRACT_INT (insn, 32, 16, 16)) << (2))) + (pc)); \ -#define EXTRACT_FMT_BL8_VARS \ - /* Instruction fields. */ \ - UINT f_op1; \ - UINT f_r1; \ - SI f_disp8; \ - unsigned int length; -#define EXTRACT_FMT_BL8_CODE \ - length = 2; \ - f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \ - f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \ - f_disp8 = ((((EXTRACT_INT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4)))); \ - -#define EXTRACT_FMT_BL24_VARS \ - /* Instruction fields. */ \ - UINT f_op1; \ - UINT f_r1; \ - SI f_disp24; \ - unsigned int length; -#define EXTRACT_FMT_BL24_CODE \ - length = 4; \ - f_op1 = EXTRACT_UINT (insn, 32, 0, 4); \ - f_r1 = EXTRACT_UINT (insn, 32, 4, 4); \ - f_disp24 = ((((EXTRACT_INT (insn, 32, 8, 24)) << (2))) + (pc)); \ - -#define EXTRACT_FMT_BCL8_VARS \ - /* Instruction fields. */ \ - UINT f_op1; \ - UINT f_r1; \ - SI f_disp8; \ - unsigned int length; -#define EXTRACT_FMT_BCL8_CODE \ - length = 2; \ - f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \ - f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \ - f_disp8 = ((((EXTRACT_INT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4)))); \ - -#define EXTRACT_FMT_BCL24_VARS \ - /* Instruction fields. */ \ - UINT f_op1; \ - UINT f_r1; \ - SI f_disp24; \ - unsigned int length; -#define EXTRACT_FMT_BCL24_CODE \ - length = 4; \ - f_op1 = EXTRACT_UINT (insn, 32, 0, 4); \ - f_r1 = EXTRACT_UINT (insn, 32, 4, 4); \ - f_disp24 = ((((EXTRACT_INT (insn, 32, 8, 24)) << (2))) + (pc)); \ - -#define EXTRACT_FMT_BRA8_VARS \ - /* Instruction fields. */ \ - UINT f_op1; \ - UINT f_r1; \ - SI f_disp8; \ - unsigned int length; -#define EXTRACT_FMT_BRA8_CODE \ - length = 2; \ - f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \ - f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \ - f_disp8 = ((((EXTRACT_INT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4)))); \ - -#define EXTRACT_FMT_BRA24_VARS \ - /* Instruction fields. */ \ - UINT f_op1; \ - UINT f_r1; \ - SI f_disp24; \ - unsigned int length; -#define EXTRACT_FMT_BRA24_CODE \ - length = 4; \ - f_op1 = EXTRACT_UINT (insn, 32, 0, 4); \ - f_r1 = EXTRACT_UINT (insn, 32, 4, 4); \ - f_disp24 = ((((EXTRACT_INT (insn, 32, 8, 24)) << (2))) + (pc)); \ - -#define EXTRACT_FMT_CMP_VARS \ +#define EXTRACT_IFMT_CMP_VARS \ /* Instruction fields. */ \ UINT f_op1; \ UINT f_r1; \ UINT f_op2; \ UINT f_r2; \ unsigned int length; -#define EXTRACT_FMT_CMP_CODE \ +#define EXTRACT_IFMT_CMP_CODE \ length = 2; \ f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \ f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \ f_op2 = EXTRACT_UINT (insn, 16, 8, 4); \ f_r2 = EXTRACT_UINT (insn, 16, 12, 4); \ -#define EXTRACT_FMT_CMPI_VARS \ +#define EXTRACT_IFMT_CMPI_VARS \ /* Instruction fields. */ \ UINT f_op1; \ UINT f_r1; \ @@ -808,7 +708,7 @@ struct scache { UINT f_r2; \ INT f_simm16; \ unsigned int length; -#define EXTRACT_FMT_CMPI_CODE \ +#define EXTRACT_IFMT_CMPI_CODE \ length = 4; \ f_op1 = EXTRACT_UINT (insn, 32, 0, 4); \ f_r1 = EXTRACT_UINT (insn, 32, 4, 4); \ @@ -816,21 +716,21 @@ struct scache { f_r2 = EXTRACT_UINT (insn, 32, 12, 4); \ f_simm16 = EXTRACT_INT (insn, 32, 16, 16); \ -#define EXTRACT_FMT_CMPZ_VARS \ +#define EXTRACT_IFMT_CMPZ_VARS \ /* Instruction fields. */ \ UINT f_op1; \ UINT f_r1; \ UINT f_op2; \ UINT f_r2; \ unsigned int length; -#define EXTRACT_FMT_CMPZ_CODE \ +#define EXTRACT_IFMT_CMPZ_CODE \ length = 2; \ f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \ f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \ f_op2 = EXTRACT_UINT (insn, 16, 8, 4); \ f_r2 = EXTRACT_UINT (insn, 16, 12, 4); \ -#define EXTRACT_FMT_DIV_VARS \ +#define EXTRACT_IFMT_DIV_VARS \ /* Instruction fields. */ \ UINT f_op1; \ UINT f_r1; \ @@ -838,7 +738,7 @@ struct scache { UINT f_r2; \ INT f_simm16; \ unsigned int length; -#define EXTRACT_FMT_DIV_CODE \ +#define EXTRACT_IFMT_DIV_CODE \ length = 4; \ f_op1 = EXTRACT_UINT (insn, 32, 0, 4); \ f_r1 = EXTRACT_UINT (insn, 32, 4, 4); \ @@ -846,177 +746,33 @@ struct scache { f_r2 = EXTRACT_UINT (insn, 32, 12, 4); \ f_simm16 = EXTRACT_INT (insn, 32, 16, 16); \ -#define EXTRACT_FMT_JC_VARS \ - /* Instruction fields. */ \ - UINT f_op1; \ - UINT f_r1; \ - UINT f_op2; \ - UINT f_r2; \ - unsigned int length; -#define EXTRACT_FMT_JC_CODE \ - length = 2; \ - f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \ - f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \ - f_op2 = EXTRACT_UINT (insn, 16, 8, 4); \ - f_r2 = EXTRACT_UINT (insn, 16, 12, 4); \ - -#define EXTRACT_FMT_JL_VARS \ - /* Instruction fields. */ \ - UINT f_op1; \ - UINT f_r1; \ - UINT f_op2; \ - UINT f_r2; \ - unsigned int length; -#define EXTRACT_FMT_JL_CODE \ - length = 2; \ - f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \ - f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \ - f_op2 = EXTRACT_UINT (insn, 16, 8, 4); \ - f_r2 = EXTRACT_UINT (insn, 16, 12, 4); \ - -#define EXTRACT_FMT_JMP_VARS \ - /* Instruction fields. */ \ - UINT f_op1; \ - UINT f_r1; \ - UINT f_op2; \ - UINT f_r2; \ - unsigned int length; -#define EXTRACT_FMT_JMP_CODE \ - length = 2; \ - f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \ - f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \ - f_op2 = EXTRACT_UINT (insn, 16, 8, 4); \ - f_r2 = EXTRACT_UINT (insn, 16, 12, 4); \ - -#define EXTRACT_FMT_LD_VARS \ +#define EXTRACT_IFMT_JC_VARS \ /* Instruction fields. */ \ UINT f_op1; \ UINT f_r1; \ UINT f_op2; \ UINT f_r2; \ unsigned int length; -#define EXTRACT_FMT_LD_CODE \ +#define EXTRACT_IFMT_JC_CODE \ length = 2; \ f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \ f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \ f_op2 = EXTRACT_UINT (insn, 16, 8, 4); \ f_r2 = EXTRACT_UINT (insn, 16, 12, 4); \ -#define EXTRACT_FMT_LD_D_VARS \ - /* Instruction fields. */ \ - UINT f_op1; \ - UINT f_r1; \ - UINT f_op2; \ - UINT f_r2; \ - INT f_simm16; \ - unsigned int length; -#define EXTRACT_FMT_LD_D_CODE \ - length = 4; \ - f_op1 = EXTRACT_UINT (insn, 32, 0, 4); \ - f_r1 = EXTRACT_UINT (insn, 32, 4, 4); \ - f_op2 = EXTRACT_UINT (insn, 32, 8, 4); \ - f_r2 = EXTRACT_UINT (insn, 32, 12, 4); \ - f_simm16 = EXTRACT_INT (insn, 32, 16, 16); \ - -#define EXTRACT_FMT_LDB_VARS \ - /* Instruction fields. */ \ - UINT f_op1; \ - UINT f_r1; \ - UINT f_op2; \ - UINT f_r2; \ - unsigned int length; -#define EXTRACT_FMT_LDB_CODE \ - length = 2; \ - f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \ - f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \ - f_op2 = EXTRACT_UINT (insn, 16, 8, 4); \ - f_r2 = EXTRACT_UINT (insn, 16, 12, 4); \ - -#define EXTRACT_FMT_LDB_D_VARS \ - /* Instruction fields. */ \ - UINT f_op1; \ - UINT f_r1; \ - UINT f_op2; \ - UINT f_r2; \ - INT f_simm16; \ - unsigned int length; -#define EXTRACT_FMT_LDB_D_CODE \ - length = 4; \ - f_op1 = EXTRACT_UINT (insn, 32, 0, 4); \ - f_r1 = EXTRACT_UINT (insn, 32, 4, 4); \ - f_op2 = EXTRACT_UINT (insn, 32, 8, 4); \ - f_r2 = EXTRACT_UINT (insn, 32, 12, 4); \ - f_simm16 = EXTRACT_INT (insn, 32, 16, 16); \ - -#define EXTRACT_FMT_LDH_VARS \ - /* Instruction fields. */ \ - UINT f_op1; \ - UINT f_r1; \ - UINT f_op2; \ - UINT f_r2; \ - unsigned int length; -#define EXTRACT_FMT_LDH_CODE \ - length = 2; \ - f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \ - f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \ - f_op2 = EXTRACT_UINT (insn, 16, 8, 4); \ - f_r2 = EXTRACT_UINT (insn, 16, 12, 4); \ - -#define EXTRACT_FMT_LDH_D_VARS \ - /* Instruction fields. */ \ - UINT f_op1; \ - UINT f_r1; \ - UINT f_op2; \ - UINT f_r2; \ - INT f_simm16; \ - unsigned int length; -#define EXTRACT_FMT_LDH_D_CODE \ - length = 4; \ - f_op1 = EXTRACT_UINT (insn, 32, 0, 4); \ - f_r1 = EXTRACT_UINT (insn, 32, 4, 4); \ - f_op2 = EXTRACT_UINT (insn, 32, 8, 4); \ - f_r2 = EXTRACT_UINT (insn, 32, 12, 4); \ - f_simm16 = EXTRACT_INT (insn, 32, 16, 16); \ - -#define EXTRACT_FMT_LD_PLUS_VARS \ - /* Instruction fields. */ \ - UINT f_op1; \ - UINT f_r1; \ - UINT f_op2; \ - UINT f_r2; \ - unsigned int length; -#define EXTRACT_FMT_LD_PLUS_CODE \ - length = 2; \ - f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \ - f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \ - f_op2 = EXTRACT_UINT (insn, 16, 8, 4); \ - f_r2 = EXTRACT_UINT (insn, 16, 12, 4); \ - -#define EXTRACT_FMT_LD24_VARS \ +#define EXTRACT_IFMT_LD24_VARS \ /* Instruction fields. */ \ UINT f_op1; \ UINT f_r1; \ UINT f_uimm24; \ unsigned int length; -#define EXTRACT_FMT_LD24_CODE \ +#define EXTRACT_IFMT_LD24_CODE \ length = 4; \ f_op1 = EXTRACT_UINT (insn, 32, 0, 4); \ f_r1 = EXTRACT_UINT (insn, 32, 4, 4); \ f_uimm24 = EXTRACT_UINT (insn, 32, 8, 24); \ -#define EXTRACT_FMT_LDI8_VARS \ - /* Instruction fields. */ \ - UINT f_op1; \ - UINT f_r1; \ - INT f_simm8; \ - unsigned int length; -#define EXTRACT_FMT_LDI8_CODE \ - length = 2; \ - f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \ - f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \ - f_simm8 = EXTRACT_INT (insn, 16, 8, 8); \ - -#define EXTRACT_FMT_LDI16_VARS \ +#define EXTRACT_IFMT_LDI16_VARS \ /* Instruction fields. */ \ UINT f_op1; \ UINT f_r1; \ @@ -1024,7 +780,7 @@ struct scache { UINT f_r2; \ INT f_simm16; \ unsigned int length; -#define EXTRACT_FMT_LDI16_CODE \ +#define EXTRACT_IFMT_LDI16_CODE \ length = 4; \ f_op1 = EXTRACT_UINT (insn, 32, 0, 4); \ f_r1 = EXTRACT_UINT (insn, 32, 4, 4); \ @@ -1032,21 +788,7 @@ struct scache { f_r2 = EXTRACT_UINT (insn, 32, 12, 4); \ f_simm16 = EXTRACT_INT (insn, 32, 16, 16); \ -#define EXTRACT_FMT_LOCK_VARS \ - /* Instruction fields. */ \ - UINT f_op1; \ - UINT f_r1; \ - UINT f_op2; \ - UINT f_r2; \ - unsigned int length; -#define EXTRACT_FMT_LOCK_CODE \ - length = 2; \ - f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \ - f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \ - f_op2 = EXTRACT_UINT (insn, 16, 8, 4); \ - f_r2 = EXTRACT_UINT (insn, 16, 12, 4); \ - -#define EXTRACT_FMT_MACHI_A_VARS \ +#define EXTRACT_IFMT_MACHI_A_VARS \ /* Instruction fields. */ \ UINT f_op1; \ UINT f_r1; \ @@ -1054,7 +796,7 @@ struct scache { UINT f_op23; \ UINT f_r2; \ unsigned int length; -#define EXTRACT_FMT_MACHI_A_CODE \ +#define EXTRACT_IFMT_MACHI_A_CODE \ length = 2; \ f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \ f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \ @@ -1062,37 +804,7 @@ struct scache { f_op23 = EXTRACT_UINT (insn, 16, 9, 3); \ f_r2 = EXTRACT_UINT (insn, 16, 12, 4); \ -#define EXTRACT_FMT_MULHI_A_VARS \ - /* Instruction fields. */ \ - UINT f_op1; \ - UINT f_r1; \ - UINT f_acc; \ - UINT f_op23; \ - UINT f_r2; \ - unsigned int length; -#define EXTRACT_FMT_MULHI_A_CODE \ - length = 2; \ - f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \ - f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \ - f_acc = EXTRACT_UINT (insn, 16, 8, 1); \ - f_op23 = EXTRACT_UINT (insn, 16, 9, 3); \ - f_r2 = EXTRACT_UINT (insn, 16, 12, 4); \ - -#define EXTRACT_FMT_MV_VARS \ - /* Instruction fields. */ \ - UINT f_op1; \ - UINT f_r1; \ - UINT f_op2; \ - UINT f_r2; \ - unsigned int length; -#define EXTRACT_FMT_MV_CODE \ - length = 2; \ - f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \ - f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \ - f_op2 = EXTRACT_UINT (insn, 16, 8, 4); \ - f_r2 = EXTRACT_UINT (insn, 16, 12, 4); \ - -#define EXTRACT_FMT_MVFACHI_A_VARS \ +#define EXTRACT_IFMT_MVFACHI_A_VARS \ /* Instruction fields. */ \ UINT f_op1; \ UINT f_r1; \ @@ -1100,7 +812,7 @@ struct scache { UINT f_accs; \ UINT f_op3; \ unsigned int length; -#define EXTRACT_FMT_MVFACHI_A_CODE \ +#define EXTRACT_IFMT_MVFACHI_A_CODE \ length = 2; \ f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \ f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \ @@ -1108,21 +820,21 @@ struct scache { f_accs = EXTRACT_UINT (insn, 16, 12, 2); \ f_op3 = EXTRACT_UINT (insn, 16, 14, 2); \ -#define EXTRACT_FMT_MVFC_VARS \ +#define EXTRACT_IFMT_MVFC_VARS \ /* Instruction fields. */ \ UINT f_op1; \ UINT f_r1; \ UINT f_op2; \ UINT f_r2; \ unsigned int length; -#define EXTRACT_FMT_MVFC_CODE \ +#define EXTRACT_IFMT_MVFC_CODE \ length = 2; \ f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \ f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \ f_op2 = EXTRACT_UINT (insn, 16, 8, 4); \ f_r2 = EXTRACT_UINT (insn, 16, 12, 4); \ -#define EXTRACT_FMT_MVTACHI_A_VARS \ +#define EXTRACT_IFMT_MVTACHI_A_VARS \ /* Instruction fields. */ \ UINT f_op1; \ UINT f_r1; \ @@ -1130,7 +842,7 @@ struct scache { UINT f_accs; \ UINT f_op3; \ unsigned int length; -#define EXTRACT_FMT_MVTACHI_A_CODE \ +#define EXTRACT_IFMT_MVTACHI_A_CODE \ length = 2; \ f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \ f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \ @@ -1138,35 +850,35 @@ struct scache { f_accs = EXTRACT_UINT (insn, 16, 12, 2); \ f_op3 = EXTRACT_UINT (insn, 16, 14, 2); \ -#define EXTRACT_FMT_MVTC_VARS \ +#define EXTRACT_IFMT_MVTC_VARS \ /* Instruction fields. */ \ UINT f_op1; \ UINT f_r1; \ UINT f_op2; \ UINT f_r2; \ unsigned int length; -#define EXTRACT_FMT_MVTC_CODE \ +#define EXTRACT_IFMT_MVTC_CODE \ length = 2; \ f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \ f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \ f_op2 = EXTRACT_UINT (insn, 16, 8, 4); \ f_r2 = EXTRACT_UINT (insn, 16, 12, 4); \ -#define EXTRACT_FMT_NOP_VARS \ +#define EXTRACT_IFMT_NOP_VARS \ /* Instruction fields. */ \ UINT f_op1; \ UINT f_r1; \ UINT f_op2; \ UINT f_r2; \ unsigned int length; -#define EXTRACT_FMT_NOP_CODE \ +#define EXTRACT_IFMT_NOP_CODE \ length = 2; \ f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \ f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \ f_op2 = EXTRACT_UINT (insn, 16, 8, 4); \ f_r2 = EXTRACT_UINT (insn, 16, 12, 4); \ -#define EXTRACT_FMT_RAC_DSI_VARS \ +#define EXTRACT_IFMT_RAC_DSI_VARS \ /* Instruction fields. */ \ UINT f_op1; \ UINT f_accd; \ @@ -1176,7 +888,7 @@ struct scache { UINT f_bit14; \ SI f_imm1; \ unsigned int length; -#define EXTRACT_FMT_RAC_DSI_CODE \ +#define EXTRACT_IFMT_RAC_DSI_CODE \ length = 2; \ f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \ f_accd = EXTRACT_UINT (insn, 16, 4, 2); \ @@ -1186,21 +898,7 @@ struct scache { f_bit14 = EXTRACT_UINT (insn, 16, 14, 1); \ f_imm1 = ((EXTRACT_UINT (insn, 16, 15, 1)) + (1)); \ -#define EXTRACT_FMT_RTE_VARS \ - /* Instruction fields. */ \ - UINT f_op1; \ - UINT f_r1; \ - UINT f_op2; \ - UINT f_r2; \ - unsigned int length; -#define EXTRACT_FMT_RTE_CODE \ - length = 2; \ - f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \ - f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \ - f_op2 = EXTRACT_UINT (insn, 16, 8, 4); \ - f_r2 = EXTRACT_UINT (insn, 16, 12, 4); \ - -#define EXTRACT_FMT_SETH_VARS \ +#define EXTRACT_IFMT_SETH_VARS \ /* Instruction fields. */ \ UINT f_op1; \ UINT f_r1; \ @@ -1208,7 +906,7 @@ struct scache { UINT f_r2; \ UINT f_hi16; \ unsigned int length; -#define EXTRACT_FMT_SETH_CODE \ +#define EXTRACT_IFMT_SETH_CODE \ length = 4; \ f_op1 = EXTRACT_UINT (insn, 32, 0, 4); \ f_r1 = EXTRACT_UINT (insn, 32, 4, 4); \ @@ -1216,111 +914,21 @@ struct scache { f_r2 = EXTRACT_UINT (insn, 32, 12, 4); \ f_hi16 = EXTRACT_UINT (insn, 32, 16, 16); \ -#define EXTRACT_FMT_SLL3_VARS \ - /* Instruction fields. */ \ - UINT f_op1; \ - UINT f_r1; \ - UINT f_op2; \ - UINT f_r2; \ - INT f_simm16; \ - unsigned int length; -#define EXTRACT_FMT_SLL3_CODE \ - length = 4; \ - f_op1 = EXTRACT_UINT (insn, 32, 0, 4); \ - f_r1 = EXTRACT_UINT (insn, 32, 4, 4); \ - f_op2 = EXTRACT_UINT (insn, 32, 8, 4); \ - f_r2 = EXTRACT_UINT (insn, 32, 12, 4); \ - f_simm16 = EXTRACT_INT (insn, 32, 16, 16); \ - -#define EXTRACT_FMT_SLLI_VARS \ +#define EXTRACT_IFMT_SLLI_VARS \ /* Instruction fields. */ \ UINT f_op1; \ UINT f_r1; \ UINT f_shift_op2; \ UINT f_uimm5; \ unsigned int length; -#define EXTRACT_FMT_SLLI_CODE \ +#define EXTRACT_IFMT_SLLI_CODE \ length = 2; \ f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \ f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \ f_shift_op2 = EXTRACT_UINT (insn, 16, 8, 3); \ f_uimm5 = EXTRACT_UINT (insn, 16, 11, 5); \ -#define EXTRACT_FMT_ST_VARS \ - /* Instruction fields. */ \ - UINT f_op1; \ - UINT f_r1; \ - UINT f_op2; \ - UINT f_r2; \ - unsigned int length; -#define EXTRACT_FMT_ST_CODE \ - length = 2; \ - f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \ - f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \ - f_op2 = EXTRACT_UINT (insn, 16, 8, 4); \ - f_r2 = EXTRACT_UINT (insn, 16, 12, 4); \ - -#define EXTRACT_FMT_ST_D_VARS \ - /* Instruction fields. */ \ - UINT f_op1; \ - UINT f_r1; \ - UINT f_op2; \ - UINT f_r2; \ - INT f_simm16; \ - unsigned int length; -#define EXTRACT_FMT_ST_D_CODE \ - length = 4; \ - f_op1 = EXTRACT_UINT (insn, 32, 0, 4); \ - f_r1 = EXTRACT_UINT (insn, 32, 4, 4); \ - f_op2 = EXTRACT_UINT (insn, 32, 8, 4); \ - f_r2 = EXTRACT_UINT (insn, 32, 12, 4); \ - f_simm16 = EXTRACT_INT (insn, 32, 16, 16); \ - -#define EXTRACT_FMT_STB_VARS \ - /* Instruction fields. */ \ - UINT f_op1; \ - UINT f_r1; \ - UINT f_op2; \ - UINT f_r2; \ - unsigned int length; -#define EXTRACT_FMT_STB_CODE \ - length = 2; \ - f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \ - f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \ - f_op2 = EXTRACT_UINT (insn, 16, 8, 4); \ - f_r2 = EXTRACT_UINT (insn, 16, 12, 4); \ - -#define EXTRACT_FMT_STB_D_VARS \ - /* Instruction fields. */ \ - UINT f_op1; \ - UINT f_r1; \ - UINT f_op2; \ - UINT f_r2; \ - INT f_simm16; \ - unsigned int length; -#define EXTRACT_FMT_STB_D_CODE \ - length = 4; \ - f_op1 = EXTRACT_UINT (insn, 32, 0, 4); \ - f_r1 = EXTRACT_UINT (insn, 32, 4, 4); \ - f_op2 = EXTRACT_UINT (insn, 32, 8, 4); \ - f_r2 = EXTRACT_UINT (insn, 32, 12, 4); \ - f_simm16 = EXTRACT_INT (insn, 32, 16, 16); \ - -#define EXTRACT_FMT_STH_VARS \ - /* Instruction fields. */ \ - UINT f_op1; \ - UINT f_r1; \ - UINT f_op2; \ - UINT f_r2; \ - unsigned int length; -#define EXTRACT_FMT_STH_CODE \ - length = 2; \ - f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \ - f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \ - f_op2 = EXTRACT_UINT (insn, 16, 8, 4); \ - f_r2 = EXTRACT_UINT (insn, 16, 12, 4); \ - -#define EXTRACT_FMT_STH_D_VARS \ +#define EXTRACT_IFMT_ST_D_VARS \ /* Instruction fields. */ \ UINT f_op1; \ UINT f_r1; \ @@ -1328,7 +936,7 @@ struct scache { UINT f_r2; \ INT f_simm16; \ unsigned int length; -#define EXTRACT_FMT_STH_D_CODE \ +#define EXTRACT_IFMT_ST_D_CODE \ length = 4; \ f_op1 = EXTRACT_UINT (insn, 32, 0, 4); \ f_r1 = EXTRACT_UINT (insn, 32, 4, 4); \ @@ -1336,49 +944,21 @@ struct scache { f_r2 = EXTRACT_UINT (insn, 32, 12, 4); \ f_simm16 = EXTRACT_INT (insn, 32, 16, 16); \ -#define EXTRACT_FMT_ST_PLUS_VARS \ - /* Instruction fields. */ \ - UINT f_op1; \ - UINT f_r1; \ - UINT f_op2; \ - UINT f_r2; \ - unsigned int length; -#define EXTRACT_FMT_ST_PLUS_CODE \ - length = 2; \ - f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \ - f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \ - f_op2 = EXTRACT_UINT (insn, 16, 8, 4); \ - f_r2 = EXTRACT_UINT (insn, 16, 12, 4); \ - -#define EXTRACT_FMT_TRAP_VARS \ +#define EXTRACT_IFMT_TRAP_VARS \ /* Instruction fields. */ \ UINT f_op1; \ UINT f_r1; \ UINT f_op2; \ UINT f_uimm4; \ unsigned int length; -#define EXTRACT_FMT_TRAP_CODE \ +#define EXTRACT_IFMT_TRAP_CODE \ length = 2; \ f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \ f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \ f_op2 = EXTRACT_UINT (insn, 16, 8, 4); \ f_uimm4 = EXTRACT_UINT (insn, 16, 12, 4); \ -#define EXTRACT_FMT_UNLOCK_VARS \ - /* Instruction fields. */ \ - UINT f_op1; \ - UINT f_r1; \ - UINT f_op2; \ - UINT f_r2; \ - unsigned int length; -#define EXTRACT_FMT_UNLOCK_CODE \ - length = 2; \ - f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \ - f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \ - f_op2 = EXTRACT_UINT (insn, 16, 8, 4); \ - f_r2 = EXTRACT_UINT (insn, 16, 12, 4); \ - -#define EXTRACT_FMT_SATB_VARS \ +#define EXTRACT_IFMT_SATB_VARS \ /* Instruction fields. */ \ UINT f_op1; \ UINT f_r1; \ @@ -1386,7 +966,7 @@ struct scache { UINT f_r2; \ UINT f_uimm16; \ unsigned int length; -#define EXTRACT_FMT_SATB_CODE \ +#define EXTRACT_IFMT_SATB_CODE \ length = 4; \ f_op1 = EXTRACT_UINT (insn, 32, 0, 4); \ f_r1 = EXTRACT_UINT (insn, 32, 4, 4); \ @@ -1394,97 +974,11 @@ struct scache { f_r2 = EXTRACT_UINT (insn, 32, 12, 4); \ f_uimm16 = EXTRACT_UINT (insn, 32, 16, 16); \ -#define EXTRACT_FMT_SAT_VARS \ - /* Instruction fields. */ \ - UINT f_op1; \ - UINT f_r1; \ - UINT f_op2; \ - UINT f_r2; \ - UINT f_uimm16; \ - unsigned int length; -#define EXTRACT_FMT_SAT_CODE \ - length = 4; \ - f_op1 = EXTRACT_UINT (insn, 32, 0, 4); \ - f_r1 = EXTRACT_UINT (insn, 32, 4, 4); \ - f_op2 = EXTRACT_UINT (insn, 32, 8, 4); \ - f_r2 = EXTRACT_UINT (insn, 32, 12, 4); \ - f_uimm16 = EXTRACT_UINT (insn, 32, 16, 16); \ - -#define EXTRACT_FMT_SADD_VARS \ - /* Instruction fields. */ \ - UINT f_op1; \ - UINT f_r1; \ - UINT f_op2; \ - UINT f_r2; \ - unsigned int length; -#define EXTRACT_FMT_SADD_CODE \ - length = 2; \ - f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \ - f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \ - f_op2 = EXTRACT_UINT (insn, 16, 8, 4); \ - f_r2 = EXTRACT_UINT (insn, 16, 12, 4); \ - -#define EXTRACT_FMT_MACWU1_VARS \ - /* Instruction fields. */ \ - UINT f_op1; \ - UINT f_r1; \ - UINT f_op2; \ - UINT f_r2; \ - unsigned int length; -#define EXTRACT_FMT_MACWU1_CODE \ - length = 2; \ - f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \ - f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \ - f_op2 = EXTRACT_UINT (insn, 16, 8, 4); \ - f_r2 = EXTRACT_UINT (insn, 16, 12, 4); \ - -#define EXTRACT_FMT_MSBLO_VARS \ - /* Instruction fields. */ \ - UINT f_op1; \ - UINT f_r1; \ - UINT f_op2; \ - UINT f_r2; \ - unsigned int length; -#define EXTRACT_FMT_MSBLO_CODE \ - length = 2; \ - f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \ - f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \ - f_op2 = EXTRACT_UINT (insn, 16, 8, 4); \ - f_r2 = EXTRACT_UINT (insn, 16, 12, 4); \ - -#define EXTRACT_FMT_MULWU1_VARS \ - /* Instruction fields. */ \ - UINT f_op1; \ - UINT f_r1; \ - UINT f_op2; \ - UINT f_r2; \ - unsigned int length; -#define EXTRACT_FMT_MULWU1_CODE \ - length = 2; \ - f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \ - f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \ - f_op2 = EXTRACT_UINT (insn, 16, 8, 4); \ - f_r2 = EXTRACT_UINT (insn, 16, 12, 4); \ - -#define EXTRACT_FMT_SC_VARS \ - /* Instruction fields. */ \ - UINT f_op1; \ - UINT f_r1; \ - UINT f_op2; \ - UINT f_r2; \ - unsigned int length; -#define EXTRACT_FMT_SC_CODE \ - length = 2; \ - f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \ - f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \ - f_op2 = EXTRACT_UINT (insn, 16, 8, 4); \ - f_r2 = EXTRACT_UINT (insn, 16, 12, 4); \ - /* Queued output values of an instruction. */ struct parexec { union { - struct { /* empty format for unspecified field list */ + struct { /* empty sformat for unspecified field list */ int empty; } fmt_empty; struct { /* e.g. add $dr,$sr */ @@ -1503,16 +997,16 @@ struct parexec { SI dr; } fmt_addi; struct { /* e.g. addv $dr,$sr */ - SI dr; BI condbit; + SI dr; } fmt_addv; struct { /* e.g. addv3 $dr,$sr,$simm16 */ - SI dr; BI condbit; + SI dr; } fmt_addv3; struct { /* e.g. addx $dr,$sr */ - SI dr; BI condbit; + SI dr; } fmt_addx; struct { /* e.g. bc.s $disp8 */ USI pc; @@ -1602,8 +1096,8 @@ struct parexec { SI dr; } fmt_ldi16; struct { /* e.g. lock $dr,@$sr */ - BI h_lock_0; SI dr; + BI h_lock_0; } fmt_lock; struct { /* e.g. machi $src1,$src2,$acc */ DI acc; @@ -1633,10 +1127,10 @@ struct parexec { DI accd; } fmt_rac_dsi; struct { /* e.g. rte */ - USI pc; + UQI h_bpsw_0; USI h_cr_6; UQI h_psw_0; - UQI h_bpsw_0; + USI pc; } fmt_rte; struct { /* e.g. seth $dr,$hash$hi16 */ SI dr; @@ -1677,17 +1171,17 @@ struct parexec { SI src2; } fmt_st_plus; struct { /* e.g. trap $uimm4 */ - USI h_cr_14; - USI h_cr_6; UQI h_bbpsw_0; UQI h_bpsw_0; + USI h_cr_14; + USI h_cr_6; UQI h_psw_0; SI pc; } fmt_trap; struct { /* e.g. unlock $src1,@$src2 */ + BI h_lock_0; SI h_memory_src2; USI h_memory_src2_idx; - BI h_lock_0; } fmt_unlock; struct { /* e.g. satb $dr,$sr */ SI dr; @@ -1718,7 +1212,7 @@ struct parexec { /* Collection of various things for the trace handler to use. */ typedef struct trace_record { - PCADDR pc; + IADDR pc; /* FIXME:wip */ } TRACE_RECORD; |