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author | Stan Shebs <shebs@codesourcery.com> | 1999-04-16 01:35:26 +0000 |
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committer | Stan Shebs <shebs@codesourcery.com> | 1999-04-16 01:35:26 +0000 |
commit | c906108c21474dfb4ed285bcc0ac6fe02cd400cc (patch) | |
tree | a0015aa5cedc19ccbab307251353a41722a3ae13 /sim/igen/gen-icache.h | |
parent | cd946cff9ede3f30935803403f06f6ed30cad136 (diff) | |
download | binutils-c906108c21474dfb4ed285bcc0ac6fe02cd400cc.zip binutils-c906108c21474dfb4ed285bcc0ac6fe02cd400cc.tar.gz binutils-c906108c21474dfb4ed285bcc0ac6fe02cd400cc.tar.bz2 |
Initial creation of sourceware repositorygdb-4_18-branchpoint
Diffstat (limited to 'sim/igen/gen-icache.h')
-rw-r--r-- | sim/igen/gen-icache.h | 81 |
1 files changed, 81 insertions, 0 deletions
diff --git a/sim/igen/gen-icache.h b/sim/igen/gen-icache.h new file mode 100644 index 0000000..34c73f6 --- /dev/null +++ b/sim/igen/gen-icache.h @@ -0,0 +1,81 @@ +/* This file is part of the program psim. + + Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au> + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + */ + + + +/* Output code to manipulate the instruction cache: either create it + or reference it */ + +typedef enum { + declare_variables, + define_variables, + undef_variables, +} icache_decl_type; + +typedef enum { + do_not_use_icache = 0, + get_values_from_icache = 0x1, + put_values_in_icache = 0x2, + both_values_and_icache = 0x3, +} icache_body_type; + +extern void print_icache_body +(lf *file, + insn_entry *instruction, + opcode_bits *expanded_bits, + cache_entry *cache_rules, + icache_decl_type what_to_declare, + icache_body_type what_to_do, + int nr_prefetched_words); + + +/* Output an instruction cache decode function */ + +extern void print_icache_declaration +(lf *file, + insn_entry *insn, + opcode_bits *expanded_bits, + insn_opcodes *opcodes, + int nr_prefetched_words); + +extern void print_icache_definition +(lf *file, + insn_entry *insn, + opcode_bits *expanded_bits, + insn_opcodes *opcodes, + cache_entry *cache_rules, + int nr_prefetched_words); + + +/* Output an instruction cache support function */ + +extern function_entry_handler print_icache_internal_function_declaration; +extern function_entry_handler print_icache_internal_function_definition; + + +/* Output the instruction cache table data structure */ + +extern void print_icache_struct +(lf *file, + insn_table *instructions, + cache_entry *cache_rules); + + +/* Output a single instructions decoder */ |