sim: h8300: switch to cpu for state

Rather than rely on pulling out the first cpu from the sim state
for cpu state, pass down the active cpu that's already available.

1 files changed, 299 insertions, 394 deletions

diff --git a/sim/h8300/compile.c b/sim/h8300/compile.c
index b8256b1..25fb8b8 100644
--- a/sim/h8300/compile.c
+++ b/sim/h8300/compile.c
@@ -55,87 +55,58 @@ static int memory_size;
 /* CPU data object: */
 
 static unsigned int
-h8_get_pc (SIM_DESC sd)
+h8_get_reg (sim_cpu *cpu, int regnum)
 {
-  return (STATE_CPU (sd, 0)) -> pc;
+  return cpu->regs[regnum];
 }
 
 static void
-h8_set_pc (SIM_DESC sd, unsigned int val)
+h8_set_reg (sim_cpu *cpu, int regnum, int val)
 {
-  (STATE_CPU (sd, 0)) -> pc = val;
+  cpu->regs[regnum] = val;
 }
 
-static unsigned int
-h8_get_ccr (SIM_DESC sd)
-{
-  return (STATE_CPU (sd, 0)) -> regs[CCR_REGNUM];
-}
-
-static void
-h8_set_ccr (SIM_DESC sd, unsigned int val)
-{
-  (STATE_CPU (sd, 0)) -> regs[CCR_REGNUM] = val;
-}
-
-static unsigned int
-h8_get_exr (SIM_DESC sd)
-{
-  return (STATE_CPU (sd, 0)) -> regs[EXR_REGNUM];
-}
-
-static void
-h8_set_exr (SIM_DESC sd, unsigned int val)
-{
-  (STATE_CPU (sd, 0)) -> regs[EXR_REGNUM] = val;
-}
+#define h8_get_ccr(cpu)		h8_get_reg (cpu, CCR_REGNUM)
+#define h8_set_ccr(cpu, val)	h8_set_reg (cpu, CCR_REGNUM, val)
+#define h8_get_exr(cpu)		h8_get_reg (cpu, EXR_REGNUM)
+#define h8_set_exr(cpu, val)	h8_set_reg (cpu, EXR_REGNUM, val)
+#define h8_get_sbr(cpu)		h8_get_reg (cpu, SBR_REGNUM)
+#define h8_set_sbr(cpu, val)	h8_set_reg (cpu, SBR_REGNUM, val)
+#define h8_get_vbr(cpu)		h8_get_reg (cpu, VBR_REGNUM)
+#define h8_set_vbr(cpu, val)	h8_set_reg (cpu, VBR_REGNUM, val)
+#define h8_get_cycles(cpu)	h8_get_reg (cpu, CYCLE_REGNUM)
+#define h8_set_cycles(cpu, val)	h8_set_reg (cpu, CYCLE_REGNUM, val)
+#define h8_get_insts(cpu)	h8_get_reg (cpu, INST_REGNUM)
+#define h8_set_insts(cpu, val)	h8_set_reg (cpu, INST_REGNUM, val)
+#define h8_get_ticks(cpu)	h8_get_reg (cpu, TICK_REGNUM)
+#define h8_set_ticks(cpu, val)	h8_set_reg (cpu, TICK_REGNUM, val)
+#define h8_get_mach(cpu)	h8_get_reg (cpu, MACH_REGNUM)
+#define h8_set_mach(cpu, val)	h8_set_reg (cpu, MACH_REGNUM, val)
+#define h8_get_macl(cpu)	h8_get_reg (cpu, MACL_REGNUM)
+#define h8_set_macl(cpu, val)	h8_set_reg (cpu, MACL_REGNUM, val)
 
 static int
-h8_get_sbr (SIM_DESC sd)
+h8_get_mask (sim_cpu *cpu)
 {
-  return (STATE_CPU (sd, 0)) -> regs[SBR_REGNUM];
+  return cpu->mask;
 }
 
 static void
-h8_set_sbr (SIM_DESC sd, int val)
-{
-  (STATE_CPU (sd, 0)) -> regs[SBR_REGNUM] = val;
-}
-
-static int
-h8_get_vbr (SIM_DESC sd)
+h8_set_mask (sim_cpu *cpu, int val)
 {
-  return (STATE_CPU (sd, 0)) -> regs[VBR_REGNUM];
-}
-
-static void
-h8_set_vbr (SIM_DESC sd, int val)
-{
-  (STATE_CPU (sd, 0)) -> regs[VBR_REGNUM] = val;
-}
-
-static int
-h8_get_mask (SIM_DESC sd)
-{
-  return (STATE_CPU (sd, 0)) -> mask;
-}
-
-static void
-h8_set_mask (SIM_DESC sd, int val)
-{
-  (STATE_CPU (sd, 0)) -> mask = val;
+  cpu->mask = val;
 }
 #if 0
 static int
-h8_get_exception (SIM_DESC sd)
+h8_get_exception (sim_cpu *cpu)
 {
-  return (STATE_CPU (sd, 0)) -> exception;
+  return cpu->exception;
 }
 
 static void
-h8_set_exception (SIM_DESC sd, int val)
+h8_set_exception (sim_cpu *cpu, int val)
 {
-  (STATE_CPU (sd, 0)) -> exception = val;
+  cpu->exception = val;
 }
 
 static enum h8300_sim_state
@@ -150,82 +121,11 @@ h8_set_state (SIM_DESC sd, enum h8300_sim_state val)
   H8300_SIM_STATE (sd)->state = val;
 }
 #endif
-static unsigned int
-h8_get_cycles (SIM_DESC sd)
-{
-  return (STATE_CPU (sd, 0)) -> regs[CYCLE_REGNUM];
-}
-
-static void
-h8_set_cycles (SIM_DESC sd, unsigned int val)
-{
-  (STATE_CPU (sd, 0)) -> regs[CYCLE_REGNUM] = val;
-}
-
-static unsigned int
-h8_get_insts (SIM_DESC sd)
-{
-  return (STATE_CPU (sd, 0)) -> regs[INST_REGNUM];
-}
-
-static void
-h8_set_insts (SIM_DESC sd, unsigned int val)
-{
-  (STATE_CPU (sd, 0)) -> regs[INST_REGNUM] = val;
-}
-
-static unsigned int
-h8_get_ticks (SIM_DESC sd)
-{
-  return (STATE_CPU (sd, 0)) -> regs[TICK_REGNUM];
-}
-
-static void
-h8_set_ticks (SIM_DESC sd, unsigned int val)
-{
-  (STATE_CPU (sd, 0)) -> regs[TICK_REGNUM] = val;
-}
-
-static unsigned int
-h8_get_mach (SIM_DESC sd)
-{
-  return (STATE_CPU (sd, 0)) -> regs[MACH_REGNUM];
-}
-
-static void
-h8_set_mach (SIM_DESC sd, unsigned int val)
-{
-  (STATE_CPU (sd, 0)) -> regs[MACH_REGNUM] = val;
-}
-
-static unsigned int
-h8_get_macl (SIM_DESC sd)
-{
-  return (STATE_CPU (sd, 0)) -> regs[MACL_REGNUM];
-}
-
-static void
-h8_set_macl (SIM_DESC sd, unsigned int val)
-{
-  (STATE_CPU (sd, 0)) -> regs[MACL_REGNUM] = val;
-}
 
 static unsigned int *
-h8_get_reg_buf (SIM_DESC sd)
-{
-  return &(((STATE_CPU (sd, 0)) -> regs)[0]);
-}
-
-static unsigned int
-h8_get_reg (SIM_DESC sd, int regnum)
-{
-  return (STATE_CPU (sd, 0)) -> regs[regnum];
-}
-
-static void
-h8_set_reg (SIM_DESC sd, int regnum, int val)
+h8_get_reg_buf (sim_cpu *cpu)
 {
-  (STATE_CPU (sd, 0)) -> regs[regnum] = val;
+  return &cpu->regs[0];
 }
 
 #ifdef ADEBUG
@@ -243,119 +143,119 @@ h8_increment_stats (SIM_DESC sd, int idx)
 #endif /* ADEBUG */
 
 static unsigned char *
-h8_get_memory_buf (SIM_DESC sd)
+h8_get_memory_buf (sim_cpu *cpu)
 {
-  return (STATE_CPU (sd, 0)) -> memory;
+  return cpu->memory;
 }
 
 static void
-h8_set_memory_buf (SIM_DESC sd, unsigned char *ptr)
+h8_set_memory_buf (sim_cpu *cpu, unsigned char *ptr)
 {
-  (STATE_CPU (sd, 0)) -> memory = ptr;
+  cpu->memory = ptr;
 }
 
 static unsigned char
-h8_get_memory (SIM_DESC sd, int idx)
+h8_get_memory (sim_cpu *cpu, int idx)
 {
   ASSERT (idx < memory_size);
-  return (STATE_CPU (sd, 0)) -> memory[idx];
+  return cpu->memory[idx];
 }
 
 static void
-h8_set_memory (SIM_DESC sd, int idx, unsigned int val)
+h8_set_memory (sim_cpu *cpu, int idx, unsigned int val)
 {
   ASSERT (idx < memory_size);
-  (STATE_CPU (sd, 0)) -> memory[idx] = (unsigned char) val;
+  cpu->memory[idx] = (unsigned char) val;
 }
 
 static unsigned int
-h8_get_delayed_branch (SIM_DESC sd)
+h8_get_delayed_branch (sim_cpu *cpu)
 {
-  return (STATE_CPU (sd, 0)) -> delayed_branch;
+  return cpu->delayed_branch;
 }
 
 static void
-h8_set_delayed_branch (SIM_DESC sd, unsigned int dest)
+h8_set_delayed_branch (sim_cpu *cpu, unsigned int dest)
 {
-  (STATE_CPU (sd, 0)) -> delayed_branch = dest;
+  cpu->delayed_branch = dest;
 }
 
 static char **
-h8_get_command_line (SIM_DESC sd)
+h8_get_command_line (sim_cpu *cpu)
 {
-  return (STATE_CPU (sd, 0)) -> command_line;
+  return cpu->command_line;
 }
 
 static void
-h8_set_command_line (SIM_DESC sd, char ** val)
+h8_set_command_line (sim_cpu *cpu, char ** val)
 {
-  (STATE_CPU (sd, 0)) -> command_line = val;
+  cpu->command_line = val;
 }
 
 static char *
-h8_get_cmdline_arg (SIM_DESC sd, int index)
+h8_get_cmdline_arg (sim_cpu *cpu, int index)
 {
-  return (STATE_CPU (sd, 0)) -> command_line[index];
+  return cpu->command_line[index];
 }
 
 static void
-h8_set_cmdline_arg (SIM_DESC sd, int index, char * val)
+h8_set_cmdline_arg (sim_cpu *cpu, int index, char * val)
 {
-  (STATE_CPU (sd, 0)) -> command_line[index] = val;
+  cpu->command_line[index] = val;
 }
 
 /* MAC Saturation Mode */
 static int
-h8_get_macS (SIM_DESC sd)
+h8_get_macS (sim_cpu *cpu)
 {
-  return (STATE_CPU (sd, 0)) -> macS;
+  return cpu->macS;
 }
 
 #if 0
 static void
-h8_set_macS (SIM_DESC sd, int val)
+h8_set_macS (sim_cpu *cpu, int val)
 {
-  (STATE_CPU (sd, 0)) -> macS = (val != 0);
+  cpu->macS = (val != 0);
 }
 #endif
 
 /* MAC Zero Flag */
 static int
-h8_get_macZ (SIM_DESC sd)
+h8_get_macZ (sim_cpu *cpu)
 {
-  return (STATE_CPU (sd, 0)) -> macZ;
+  return cpu->macZ;
 }
 
 static void
-h8_set_macZ (SIM_DESC sd, int val)
+h8_set_macZ (sim_cpu *cpu, int val)
 {
-  (STATE_CPU (sd, 0)) -> macZ = (val != 0);
+  cpu->macZ = (val != 0);
 }
 
 /* MAC Negative Flag */
 static int
-h8_get_macN (SIM_DESC sd)
+h8_get_macN (sim_cpu *cpu)
 {
-  return (STATE_CPU (sd, 0)) -> macN;
+  return cpu->macN;
 }
 
 static void
-h8_set_macN (SIM_DESC sd, int val)
+h8_set_macN (sim_cpu *cpu, int val)
 {
-  (STATE_CPU (sd, 0)) -> macN = (val != 0);
+  cpu->macN = (val != 0);
 }
 
 /* MAC Overflow Flag */
 static int
-h8_get_macV (SIM_DESC sd)
+h8_get_macV (sim_cpu *cpu)
 {
-  return (STATE_CPU (sd, 0)) -> macV;
+  return cpu->macV;
 }
 
 static void
-h8_set_macV (SIM_DESC sd, int val)
+h8_set_macV (sim_cpu *cpu, int val)
 {
-  (STATE_CPU (sd, 0)) -> macV = (val != 0);
+  cpu->macV = (val != 0);
 }
 
 /* End CPU data object.  */
@@ -377,20 +277,20 @@ enum { POLL_QUIT_INTERVAL = 0x80000 };
 #define UI (ui != 0)
 #define I (intMaskBit != 0)
 
-#define BUILDSR(SD)						\
-  h8_set_ccr (SD, (I << 7) | (UI << 6) | (H << 5) | (U << 4)	\
+#define BUILDSR(cpu)						\
+  h8_set_ccr (cpu, (I << 7) | (UI << 6) | (H << 5) | (U << 4)	\
 	     | (N << 3) | (Z << 2) | (V << 1) | C)
 
-#define GETSR(SD) \
+#define GETSR(cpu) \
   /* Get Status Register (flags).  */		\
-  c = (h8_get_ccr (sd) >> 0) & 1;		\
-  v = (h8_get_ccr (sd) >> 1) & 1;		\
-  nz = !((h8_get_ccr (sd) >> 2) & 1);		\
-  n = (h8_get_ccr (sd) >> 3) & 1;		\
-  u = (h8_get_ccr (sd) >> 4) & 1;		\
-  h = (h8_get_ccr (sd) >> 5) & 1;		\
-  ui = ((h8_get_ccr (sd) >> 6) & 1);		\
-  intMaskBit = (h8_get_ccr (sd) >> 7) & 1
+  c = (h8_get_ccr (cpu) >> 0) & 1;		\
+  v = (h8_get_ccr (cpu) >> 1) & 1;		\
+  nz = !((h8_get_ccr (cpu) >> 2) & 1);		\
+  n = (h8_get_ccr (cpu) >> 3) & 1;		\
+  u = (h8_get_ccr (cpu) >> 4) & 1;		\
+  h = (h8_get_ccr (cpu) >> 5) & 1;		\
+  ui = ((h8_get_ccr (cpu) >> 6) & 1);		\
+  intMaskBit = (h8_get_ccr (cpu) >> 7) & 1
 
 
 #ifdef __CHAR_IS_SIGNED__
@@ -445,10 +345,8 @@ bitfrom (int x)
 */
 
 static unsigned int
-lvalue (SIM_DESC sd, int x, int rn, unsigned int *val)
+lvalue (SIM_DESC sd, sim_cpu *cpu, int x, int rn, unsigned int *val)
 {
-  SIM_CPU *cpu = STATE_CPU (sd, 0);
-
   if (val == NULL)	/* Paranoia.  */
     return -1;
 
@@ -482,7 +380,7 @@ cmdline_location(void)
 }
 
 static void
-decode (SIM_DESC sd, int addr, unsigned char *data, decoded_inst *dst)
+decode (SIM_DESC sd, sim_cpu *cpu, int addr, unsigned char *data, decoded_inst *dst)
 {
   int cst[3]   = {0, 0, 0};
   int reg[3]   = {0, 0, 0};
@@ -740,7 +638,7 @@ decode (SIM_DESC sd, int addr, unsigned char *data, decoded_inst *dst)
 		    cst[opnum] = ((data[1] & 0x7f) + 0x80) * 2;
 		  else
 		    cst[opnum] = ((data[1] & 0x7f) + 0x80) * 4;
-		  cst[opnum] += h8_get_vbr (sd); /* Add vector base reg.  */
+		  cst[opnum] += h8_get_vbr (cpu); /* Add vector base reg.  */
 		}
 	      else if ((looking_for & SIZE) == L_32)
 		{
@@ -916,7 +814,7 @@ decode (SIM_DESC sd, int addr, unsigned char *data, decoded_inst *dst)
 			    p->literal = 0;
 			    if (OP_KIND (q->how) == O_JSR ||
 				OP_KIND (q->how) == O_JMP)
-			      if (lvalue (sd, p->type, p->reg, (unsigned int *)&p->type))
+			      if (lvalue (sd, cpu, p->type, p->reg, (unsigned int *)&p->type))
 				goto end;
 			  }
 			else if ((x & MODE) == ABS)
@@ -948,7 +846,7 @@ decode (SIM_DESC sd, int addr, unsigned char *data, decoded_inst *dst)
 			    p->literal = cst[opnum];
 			    if (OP_KIND (q->how) == O_JSR ||
 				OP_KIND (q->how) == O_JMP)
-			      if (lvalue (sd, p->type, p->reg, (unsigned int *)&p->type))
+			      if (lvalue (sd, cpu, p->type, p->reg, (unsigned int *)&p->type))
 				goto end;
 			  }
 			else if ((x & MODE) == PCREL)
@@ -1158,38 +1056,38 @@ static unsigned short *wreg[16];
 #define SET_B_REG(X, Y) (*(breg[X])) = (Y)
 #define GET_W_REG(X)     *(wreg[X])
 #define SET_W_REG(X, Y) (*(wreg[X])) = (Y)
-#define GET_L_REG(X)     h8_get_reg (sd, X)
-#define SET_L_REG(X, Y)  h8_set_reg (sd, X, Y)
+#define GET_L_REG(X)     h8_get_reg (cpu, X)
+#define SET_L_REG(X, Y)  h8_set_reg (cpu, X, Y)
 
 #define GET_MEMORY_L(X) \
   ((X) < memory_size \
-   ? ((h8_get_memory (sd, (X)+0) << 24) | (h8_get_memory (sd, (X)+1) << 16)  \
-    | (h8_get_memory (sd, (X)+2) <<  8) | (h8_get_memory (sd, (X)+3) <<  0)) \
+   ? ((h8_get_memory (cpu, (X)+0) << 24) | (h8_get_memory (cpu, (X)+1) << 16)  \
+    | (h8_get_memory (cpu, (X)+2) <<  8) | (h8_get_memory (cpu, (X)+3) <<  0)) \
    : 0)
 
 #define GET_MEMORY_W(X) \
   ((X) < memory_size \
-   ? ((h8_get_memory (sd, (X)+0) << 8) | (h8_get_memory (sd, (X)+1) << 0)) \
+   ? ((h8_get_memory (cpu, (X)+0) << 8) | (h8_get_memory (cpu, (X)+1) << 0)) \
    : 0)
 
 #define GET_MEMORY_B(X) \
-  ((X) < memory_size ? h8_get_memory (sd, (X)) : 0)
+  ((X) < memory_size ? h8_get_memory (cpu, (X)) : 0)
 
 #define SET_MEMORY_L(X, Y)  \
 {  register unsigned char *_p; register int __y = (Y); \
-   _p = ((X) < memory_size ? h8_get_memory_buf (sd) + (X) : 0); \
+   _p = ((X) < memory_size ? h8_get_memory_buf (cpu) + (X) : 0); \
    _p[0] = __y >> 24; _p[1] = __y >> 16; \
    _p[2] = __y >>  8; _p[3] = __y >>  0; \
 }
 
 #define SET_MEMORY_W(X, Y) \
 {  register unsigned char *_p; register int __y = (Y); \
-   _p = ((X) < memory_size ? h8_get_memory_buf (sd) + (X) : 0); \
+   _p = ((X) < memory_size ? h8_get_memory_buf (cpu) + (X) : 0); \
    _p[0] = __y >> 8; _p[1] = __y; \
 }
 
 #define SET_MEMORY_B(X, Y) \
-  ((X) < memory_size ? h8_set_memory (sd, (X), (Y)) : 0)
+  ((X) < memory_size ? h8_set_memory (cpu, (X), (Y)) : 0)
 
 /* Simulate a memory fetch.
    Return 0 for success, -1 for failure.
@@ -1241,13 +1139,13 @@ fetch_1 (SIM_DESC sd, ea_type *arg, int *val, int twice)
       }
       switch (OP_SIZE (arg->type)) {
       case SB:
-	*val = GET_MEMORY_B ((t * 1 + abs) & h8_get_mask (sd));
+	*val = GET_MEMORY_B ((t * 1 + abs) & h8_get_mask (cpu));
 	break;
       case SW:
-	*val = GET_MEMORY_W ((t * 2 + abs) & h8_get_mask (sd));
+	*val = GET_MEMORY_W ((t * 2 + abs) & h8_get_mask (cpu));
 	break;
       case SL:
-	*val = GET_MEMORY_L ((t * 4 + abs) & h8_get_mask (sd));
+	*val = GET_MEMORY_L ((t * 4 + abs) & h8_get_mask (cpu));
 	break;
       }
       break;
@@ -1275,7 +1173,7 @@ fetch_1 (SIM_DESC sd, ea_type *arg, int *val, int twice)
       break;
     case X (OP_POSTINC, SB):	/* Register indirect w/post-incr: byte.  */
       t = GET_L_REG (rn);
-      r = GET_MEMORY_B (t & h8_get_mask (sd));
+      r = GET_MEMORY_B (t & h8_get_mask (cpu));
       if (!twice)
 	t += 1;
       SET_L_REG (rn, t);
@@ -1283,7 +1181,7 @@ fetch_1 (SIM_DESC sd, ea_type *arg, int *val, int twice)
       break;
     case X (OP_POSTINC, SW):	/* Register indirect w/post-incr: word.  */
       t = GET_L_REG (rn);
-      r = GET_MEMORY_W (t & h8_get_mask (sd));
+      r = GET_MEMORY_W (t & h8_get_mask (cpu));
       if (!twice)
 	t += 2;
       SET_L_REG (rn, t);
@@ -1291,7 +1189,7 @@ fetch_1 (SIM_DESC sd, ea_type *arg, int *val, int twice)
       break;
     case X (OP_POSTINC, SL):	/* Register indirect w/post-incr: long.  */
       t = GET_L_REG (rn);
-      r = GET_MEMORY_L (t & h8_get_mask (sd));
+      r = GET_MEMORY_L (t & h8_get_mask (cpu));
       if (!twice)
 	t += 4;
       SET_L_REG (rn, t);
@@ -1300,7 +1198,7 @@ fetch_1 (SIM_DESC sd, ea_type *arg, int *val, int twice)
 
     case X (OP_POSTDEC, SB):	/* Register indirect w/post-decr: byte.  */
       t = GET_L_REG (rn);
-      r = GET_MEMORY_B (t & h8_get_mask (sd));
+      r = GET_MEMORY_B (t & h8_get_mask (cpu));
       if (!twice)
 	t -= 1;
       SET_L_REG (rn, t);
@@ -1308,7 +1206,7 @@ fetch_1 (SIM_DESC sd, ea_type *arg, int *val, int twice)
       break;
     case X (OP_POSTDEC, SW):	/* Register indirect w/post-decr: word.  */
       t = GET_L_REG (rn);
-      r = GET_MEMORY_W (t & h8_get_mask (sd));
+      r = GET_MEMORY_W (t & h8_get_mask (cpu));
       if (!twice)
 	t -= 2;
       SET_L_REG (rn, t);
@@ -1316,7 +1214,7 @@ fetch_1 (SIM_DESC sd, ea_type *arg, int *val, int twice)
       break;
     case X (OP_POSTDEC, SL):	/* Register indirect w/post-decr: long.  */
       t = GET_L_REG (rn);
-      r = GET_MEMORY_L (t & h8_get_mask (sd));
+      r = GET_MEMORY_L (t & h8_get_mask (cpu));
       if (!twice)
 	t -= 4;
       SET_L_REG (rn, t);
@@ -1326,72 +1224,72 @@ fetch_1 (SIM_DESC sd, ea_type *arg, int *val, int twice)
     case X (OP_PREDEC, SB):	/* Register indirect w/pre-decr: byte.  */
       t = GET_L_REG (rn) - 1;
       SET_L_REG (rn, t);
-      t &= h8_get_mask (sd);
+      t &= h8_get_mask (cpu);
       *val = GET_MEMORY_B (t);
       break;
       
     case X (OP_PREDEC, SW):	/* Register indirect w/pre-decr: word.  */
       t = GET_L_REG (rn) - 2;
       SET_L_REG (rn, t);
-      t &= h8_get_mask (sd);
+      t &= h8_get_mask (cpu);
       *val = GET_MEMORY_W (t);
       break;
       
     case X (OP_PREDEC, SL):	/* Register indirect w/pre-decr: long.  */
       t = GET_L_REG (rn) - 4;
       SET_L_REG (rn, t);
-      t &= h8_get_mask (sd);
+      t &= h8_get_mask (cpu);
       *val = GET_MEMORY_L (t);
       break;
       
     case X (OP_PREINC, SB):	/* Register indirect w/pre-incr: byte.  */
       t = GET_L_REG (rn) + 1;
       SET_L_REG (rn, t);
-      t &= h8_get_mask (sd);
+      t &= h8_get_mask (cpu);
       *val = GET_MEMORY_B (t);
       break;
 
     case X (OP_PREINC, SW):	/* Register indirect w/pre-incr: long.  */
       t = GET_L_REG (rn) + 2;
       SET_L_REG (rn, t);
-      t &= h8_get_mask (sd);
+      t &= h8_get_mask (cpu);
       *val = GET_MEMORY_W (t);
       break;
 
     case X (OP_PREINC, SL):	/* Register indirect w/pre-incr: long.  */
       t = GET_L_REG (rn) + 4;
       SET_L_REG (rn, t);
-      t &= h8_get_mask (sd);
+      t &= h8_get_mask (cpu);
       *val = GET_MEMORY_L (t);
       break;
 
     case X (OP_DISP, SB):	/* Register indirect w/displacement: byte.  */
       t = GET_L_REG (rn) + abs;
-      t &= h8_get_mask (sd);
+      t &= h8_get_mask (cpu);
       *val = GET_MEMORY_B (t);
       break;
 
     case X (OP_DISP, SW):	/* Register indirect w/displacement: word.  */
       t = GET_L_REG (rn) + abs;
-      t &= h8_get_mask (sd);
+      t &= h8_get_mask (cpu);
       *val = GET_MEMORY_W (t);
       break;
 
     case X (OP_DISP, SL):	/* Register indirect w/displacement: long.  */
       t = GET_L_REG (rn) + abs;
-      t &= h8_get_mask (sd);
+      t &= h8_get_mask (cpu);
       *val =GET_MEMORY_L (t);
       break;
 
     case X (OP_MEM, SL):	/* Absolute memory address, long.  */
       t = GET_MEMORY_L (abs);
-      t &= h8_get_mask (sd);
+      t &= h8_get_mask (cpu);
       *val = t;
       break;
 
     case X (OP_MEM, SW):	/* Absolute memory address, word.  */
       t = GET_MEMORY_W (abs);
-      t &= h8_get_mask (sd);
+      t &= h8_get_mask (cpu);
       *val = t;
       break;
 
@@ -1493,13 +1391,13 @@ store_1 (SIM_DESC sd, ea_type *arg, int n, int twice)
       }
       switch (OP_SIZE (arg->type)) {
       case SB:
-	SET_MEMORY_B ((t * 1 + abs) & h8_get_mask (sd), n);
+	SET_MEMORY_B ((t * 1 + abs) & h8_get_mask (cpu), n);
 	break;
       case SW:
-	SET_MEMORY_W ((t * 2 + abs) & h8_get_mask (sd), n);
+	SET_MEMORY_W ((t * 2 + abs) & h8_get_mask (cpu), n);
 	break;
       case SL:
-	SET_MEMORY_L ((t * 4 + abs) & h8_get_mask (sd), n);
+	SET_MEMORY_L ((t * 4 + abs) & h8_get_mask (cpu), n);
 	break;
       }
       break;
@@ -1519,7 +1417,7 @@ store_1 (SIM_DESC sd, ea_type *arg, int n, int twice)
       if (!twice)
 	t -= 1;
       SET_L_REG (rn, t);
-      t &= h8_get_mask (sd);
+      t &= h8_get_mask (cpu);
       SET_MEMORY_B (t, n);
 
       break;
@@ -1528,7 +1426,7 @@ store_1 (SIM_DESC sd, ea_type *arg, int n, int twice)
       if (!twice)
 	t -= 2;
       SET_L_REG (rn, t);
-      t &= h8_get_mask (sd);
+      t &= h8_get_mask (cpu);
       SET_MEMORY_W (t, n);
       break;
 
@@ -1537,7 +1435,7 @@ store_1 (SIM_DESC sd, ea_type *arg, int n, int twice)
       if (!twice)
 	t -= 4;
       SET_L_REG (rn, t);
-      t &= h8_get_mask (sd);
+      t &= h8_get_mask (cpu);
       SET_MEMORY_L (t, n);
       break;
 
@@ -1546,7 +1444,7 @@ store_1 (SIM_DESC sd, ea_type *arg, int n, int twice)
       if (!twice)
 	t += 1;
       SET_L_REG (rn, t);
-      t &= h8_get_mask (sd);
+      t &= h8_get_mask (cpu);
       SET_MEMORY_B (t, n);
 
       break;
@@ -1555,7 +1453,7 @@ store_1 (SIM_DESC sd, ea_type *arg, int n, int twice)
       if (!twice)
 	t += 2;
       SET_L_REG (rn, t);
-      t &= h8_get_mask (sd);
+      t &= h8_get_mask (cpu);
       SET_MEMORY_W (t, n);
       break;
 
@@ -1564,67 +1462,67 @@ store_1 (SIM_DESC sd, ea_type *arg, int n, int twice)
       if (!twice)
 	t += 4;
       SET_L_REG (rn, t);
-      t &= h8_get_mask (sd);
+      t &= h8_get_mask (cpu);
       SET_MEMORY_L (t, n);
       break;
 
     case X (OP_POSTDEC, SB):	/* Register indirect w/post-decr, byte.  */
       t = GET_L_REG (rn);
       SET_L_REG (rn, t - 1);
-      t &= h8_get_mask (sd);
+      t &= h8_get_mask (cpu);
       SET_MEMORY_B (t, n);
       break;
 
     case X (OP_POSTDEC, SW):	/* Register indirect w/post-decr, word.  */
       t = GET_L_REG (rn);
       SET_L_REG (rn, t - 2);
-      t &= h8_get_mask (sd);
+      t &= h8_get_mask (cpu);
       SET_MEMORY_W (t, n);
       break;
 
     case X (OP_POSTDEC, SL):	/* Register indirect w/post-decr, long.  */
       t = GET_L_REG (rn);
       SET_L_REG (rn, t - 4);
-      t &= h8_get_mask (sd);
+      t &= h8_get_mask (cpu);
       SET_MEMORY_L (t, n);
       break;
 
     case X (OP_POSTINC, SB):	/* Register indirect w/post-incr, byte.  */
       t = GET_L_REG (rn);
       SET_L_REG (rn, t + 1);
-      t &= h8_get_mask (sd);
+      t &= h8_get_mask (cpu);
       SET_MEMORY_B (t, n);
       break;
 
     case X (OP_POSTINC, SW):	/* Register indirect w/post-incr, word.  */
       t = GET_L_REG (rn);
       SET_L_REG (rn, t + 2);
-      t &= h8_get_mask (sd);
+      t &= h8_get_mask (cpu);
       SET_MEMORY_W (t, n);
       break;
 
     case X (OP_POSTINC, SL):	/* Register indirect w/post-incr, long.  */
       t = GET_L_REG (rn);
       SET_L_REG (rn, t + 4);
-      t &= h8_get_mask (sd);
+      t &= h8_get_mask (cpu);
       SET_MEMORY_L (t, n);
       break;
 
     case X (OP_DISP, SB):	/* Register indirect w/displacement, byte.  */
       t = GET_L_REG (rn) + abs;
-      t &= h8_get_mask (sd);
+      t &= h8_get_mask (cpu);
       SET_MEMORY_B (t, n);
       break;
 
     case X (OP_DISP, SW):	/* Register indirect w/displacement, word.  */
       t = GET_L_REG (rn) + abs;
-      t &= h8_get_mask (sd);
+      t &= h8_get_mask (cpu);
       SET_MEMORY_W (t, n);
       break;
 
     case X (OP_DISP, SL):	/* Register indirect w/displacement, long.  */
       t = GET_L_REG (rn) + abs;
-      t &= h8_get_mask (sd);
+      t &= h8_get_mask (cpu);
       SET_MEMORY_L (t, n);
       break;
 
@@ -1663,6 +1561,7 @@ static int init_pointers_needed = 1;
 static void
 init_pointers (SIM_DESC sd)
 {
+  sim_cpu *cpu = STATE_CPU (sd, 0);
   struct h8300_sim_state *state = H8300_SIM_STATE (sd);
 
   if (init_pointers_needed)
@@ -1685,25 +1584,25 @@ init_pointers (SIM_DESC sd)
 	  memory_size = H8300S_MSIZE;
 	}
 
-      if (h8_get_memory_buf (sd))
-	free (h8_get_memory_buf (sd));
+      if (h8_get_memory_buf (cpu))
+	free (h8_get_memory_buf (cpu));
 
-      h8_set_memory_buf (sd, (unsigned char *) 
+      h8_set_memory_buf (cpu, (unsigned char *)
 			 calloc (sizeof (char), memory_size));
       state->memory_size = memory_size;
 
-      h8_set_mask (sd, memory_size - 1);
+      h8_set_mask (cpu, memory_size - 1);
 
-      memset (h8_get_reg_buf (sd), 0, sizeof (((STATE_CPU (sd, 0))->regs)));
+      memset (h8_get_reg_buf (cpu), 0, sizeof (cpu->regs));
 
       for (i = 0; i < 8; i++)
 	{
 	  /* FIXME: rewrite using local buffer.  */
-	  unsigned char *p = (unsigned char *) (h8_get_reg_buf (sd) + i);
-	  unsigned char *e = (unsigned char *) (h8_get_reg_buf (sd) + i + 1);
-	  unsigned short *q = (unsigned short *) (h8_get_reg_buf (sd) + i);
-	  unsigned short *u = (unsigned short *) (h8_get_reg_buf (sd) + i + 1);
-	  h8_set_reg (sd, i, 0x00112233);
+	  unsigned char *p = (unsigned char *) (h8_get_reg_buf (cpu) + i);
+	  unsigned char *e = (unsigned char *) (h8_get_reg_buf (cpu) + i + 1);
+	  unsigned short *q = (unsigned short *) (h8_get_reg_buf (cpu) + i);
+	  unsigned short *u = (unsigned short *) (h8_get_reg_buf (cpu) + i + 1);
+	  h8_set_reg (cpu, i, 0x00112233);
 
 	  while (p < e)
 	    {
@@ -1735,7 +1634,7 @@ init_pointers (SIM_DESC sd)
 	  if (wreg[i] == 0 || wreg[i + 8] == 0)
 	    sim_io_printf (sd, "init_pointers: internal error.\n");
 
-	  h8_set_reg (sd, i, 0);
+	  h8_set_reg (cpu, i, 0);
 	}
 
       init_pointers_needed = 0;
@@ -1781,7 +1680,7 @@ step_once (SIM_DESC sd, SIM_CPU *cpu)
 
   init_pointers (sd);
 
-  pc = h8_get_pc (sd);
+  pc = cpu_get_pc (cpu);
 
   /* The PC should never be odd.  */
   if (pc & 0x1)
@@ -1791,22 +1690,22 @@ step_once (SIM_DESC sd, SIM_CPU *cpu)
     }
 
   /* Get Status Register (flags).  */
-  GETSR (sd);
+  GETSR (cpu);
 
   if (h8300smode)	/* Get exr.  */
     {
-      trace = (h8_get_exr (sd) >> 7) & 1;
-      intMask = h8_get_exr (sd) & 7;
+      trace = (h8_get_exr (cpu) >> 7) & 1;
+      intMask = h8_get_exr (cpu) & 7;
     }
 
-  oldmask = h8_get_mask (sd);
+  oldmask = h8_get_mask (cpu);
   if (!h8300hmode || h8300_normal_mode)
-    h8_set_mask (sd, 0xffff);
+    h8_set_mask (cpu, 0xffff);
   do
     {
       decoded_inst _code, *code = &_code;
       memset (code, 0, sizeof (*code));
-      decode (sd, pc, h8_get_memory_buf (sd) + pc, code);
+      decode (sd, cpu, pc, h8_get_memory_buf (cpu) + pc, code);
       code->oldpc = pc;
 
 #if ADEBUG
@@ -2186,20 +2085,20 @@ step_once (SIM_DESC sd, SIM_CPU *cpu)
 	    {
 	      register unsigned char *_src, *_dst;
 	      unsigned int count = ((code->opcode == O (O_EEPMOV, SW))
-				    ? h8_get_reg (sd, R4_REGNUM) & 0xffff
-				    : h8_get_reg (sd, R4_REGNUM) & 0xff);
+				    ? h8_get_reg (cpu, R4_REGNUM) & 0xffff
+				    : h8_get_reg (cpu, R4_REGNUM) & 0xff);
 
-	      _src = h8_get_memory_buf (sd) + h8_get_reg (sd, R5_REGNUM);
-	      if ((_src + count) >= (h8_get_memory_buf (sd) + memory_size))
+	      _src = h8_get_memory_buf (cpu) + h8_get_reg (cpu, R5_REGNUM);
+	      if ((_src + count) >= (h8_get_memory_buf (cpu) + memory_size))
 		goto illegal;
-	      _dst = h8_get_memory_buf (sd) + h8_get_reg (sd, R6_REGNUM);
-	      if ((_dst + count) >= (h8_get_memory_buf (sd) + memory_size))
+	      _dst = h8_get_memory_buf (cpu) + h8_get_reg (cpu, R6_REGNUM);
+	      if ((_dst + count) >= (h8_get_memory_buf (cpu) + memory_size))
 		goto illegal;
 	      memcpy (_dst, _src, count);
 
-	      h8_set_reg (sd, R5_REGNUM, h8_get_reg (sd, R5_REGNUM) + count);
-	      h8_set_reg (sd, R6_REGNUM, h8_get_reg (sd, R6_REGNUM) + count);
-	      h8_set_reg (sd, R4_REGNUM, h8_get_reg (sd, R4_REGNUM) &
+	      h8_set_reg (cpu, R5_REGNUM, h8_get_reg (cpu, R5_REGNUM) + count);
+	      h8_set_reg (cpu, R6_REGNUM, h8_get_reg (cpu, R6_REGNUM) + count);
+	      h8_set_reg (cpu, R4_REGNUM, h8_get_reg (cpu, R4_REGNUM) &
 			  ((code->opcode == O (O_EEPMOV, SW))
 			  ? (~0xffff) : (~0xff)));
 	      cycles += 2 * count;
@@ -2331,10 +2230,10 @@ step_once (SIM_DESC sd, SIM_CPU *cpu)
 	    goto end;
 	  switch (code->dst.type) {
 	  case X (OP_SBR, SL):
-	    h8_set_sbr (sd, res);
+	    h8_set_sbr (cpu, res);
 	    break;
 	  case X (OP_VBR, SL):
-	    h8_set_vbr (sd, res);
+	    h8_set_vbr (cpu, res);
 	    break;
 	  default:
 	    goto illegal;
@@ -2345,14 +2244,14 @@ step_once (SIM_DESC sd, SIM_CPU *cpu)
 	case O (O_STC, SB):		/* stc.b */
 	  if (code->src.type == X (OP_CCR, SB))
 	    {
-	      BUILDSR (sd);
-	      res = h8_get_ccr (sd);
+	      BUILDSR (cpu);
+	      res = h8_get_ccr (cpu);
 	    }
 	  else if (code->src.type == X (OP_EXR, SB) && h8300smode)
 	    {
 	      if (h8300smode)
-		h8_set_exr (sd, (trace << 7) | intMask);
-	      res = h8_get_exr (sd);
+		h8_set_exr (cpu, (trace << 7) | intMask);
+	      res = h8_get_exr (cpu);
 	    }
 	  else
 	    goto illegal;
@@ -2366,10 +2265,10 @@ step_once (SIM_DESC sd, SIM_CPU *cpu)
 	case O (O_STC, SL):		/* stc.l */
 	  switch (code->src.type) {
 	  case X (OP_SBR, SL):
-	    res = h8_get_sbr (sd);
+	    res = h8_get_sbr (cpu);
 	    break;
 	  case X (OP_VBR, SL):
-	    res = h8_get_vbr (sd);
+	    res = h8_get_vbr (cpu);
 	    break;
 	  default:
 	    goto illegal;
@@ -2381,14 +2280,14 @@ step_once (SIM_DESC sd, SIM_CPU *cpu)
 	case O (O_ANDC, SB):		/* andc.b */
 	  if (code->dst.type == X (OP_CCR, SB))
 	    {
-	      BUILDSR (sd);
-	      rd = h8_get_ccr (sd);
+	      BUILDSR (cpu);
+	      rd = h8_get_ccr (cpu);
 	    }
 	  else if (code->dst.type == X (OP_EXR, SB) && h8300smode)
 	    {
 	      if (h8300smode)
-		h8_set_exr (sd, (trace << 7) | intMask);
-	      rd = h8_get_exr (sd);
+		h8_set_exr (cpu, (trace << 7) | intMask);
+	      rd = h8_get_exr (cpu);
 	    }
 	  else
 	    goto illegal;
@@ -2399,14 +2298,14 @@ step_once (SIM_DESC sd, SIM_CPU *cpu)
 	case O (O_ORC, SB):		/* orc.b */
 	  if (code->dst.type == X (OP_CCR, SB))
 	    {
-	      BUILDSR (sd);
-	      rd = h8_get_ccr (sd);
+	      BUILDSR (cpu);
+	      rd = h8_get_ccr (cpu);
 	    }
 	  else if (code->dst.type == X (OP_EXR, SB) && h8300smode)
 	    {
 	      if (h8300smode)
-		h8_set_exr (sd, (trace << 7) | intMask);
-	      rd = h8_get_exr (sd);
+		h8_set_exr (cpu, (trace << 7) | intMask);
+	      rd = h8_get_exr (cpu);
 	    }
 	  else
 	    goto illegal;
@@ -2417,14 +2316,14 @@ step_once (SIM_DESC sd, SIM_CPU *cpu)
 	case O (O_XORC, SB):		/* xorc.b */
 	  if (code->dst.type == X (OP_CCR, SB))
 	    {
-	      BUILDSR (sd);
-	      rd = h8_get_ccr (sd);
+	      BUILDSR (cpu);
+	      rd = h8_get_ccr (cpu);
 	    }
 	  else if (code->dst.type == X (OP_EXR, SB) && h8300smode)
 	    {
 	      if (h8300smode)
-		h8_set_exr (sd, (trace << 7) | intMask);
-	      rd = h8_get_exr (sd);
+		h8_set_exr (cpu, (trace << 7) | intMask);
+	      rd = h8_get_exr (cpu);
 	    }
 	  else
 	    goto illegal;
@@ -2444,7 +2343,7 @@ step_once (SIM_DESC sd, SIM_CPU *cpu)
 
 	  /* Execution continues at next instruction, but
 	     delayed_branch is set up for next cycle.  */
-	  h8_set_delayed_branch (sd, code->next_pc + res);
+	  h8_set_delayed_branch (cpu, code->next_pc + res);
 	  pc = code->next_pc;
 	  goto end;
 
@@ -2596,10 +2495,10 @@ step_once (SIM_DESC sd, SIM_CPU *cpu)
 	    /* Set the address of 256 free locations where command line is
 	       stored.  */
 	    addr_cmdline = cmdline_location();
-	    h8_set_reg (sd, 0, addr_cmdline);
+	    h8_set_reg (cpu, 0, addr_cmdline);
 
 	    /* Counting the no. of commandline arguments.  */
-	    for (i = 0; h8_get_cmdline_arg (sd, i) != NULL; i++)
+	    for (i = 0; h8_get_cmdline_arg (cpu, i) != NULL; i++)
 	      continue;
 
 	    /* No. of arguments in the command line.  */
@@ -2629,7 +2528,7 @@ step_once (SIM_DESC sd, SIM_CPU *cpu)
 		ind_arg_len = 0;
 
 		/* The size of the commandline argument.  */
-		ind_arg_len = strlen (h8_get_cmdline_arg (sd, i)) + 1;
+		ind_arg_len = strlen (h8_get_cmdline_arg (cpu, i)) + 1;
 
 		/* The total size of the command line string.  */
 		size_cmdline += ind_arg_len;
@@ -2640,7 +2539,7 @@ step_once (SIM_DESC sd, SIM_CPU *cpu)
 		   given may behave unpredictably.  */
 		if (size_cmdline >= 256)
 		  {
-		    h8_set_reg (sd, 0, 0);
+		    h8_set_reg (cpu, 0, 0);
 		    goto next;
 		  }
 		else
@@ -2652,7 +2551,7 @@ step_once (SIM_DESC sd, SIM_CPU *cpu)
 		      {
 			SET_MEMORY_B ((current_location +
 				       (sizeof (char) * j)),
-				      *(h8_get_cmdline_arg (sd, i) + 
+				      *(h8_get_cmdline_arg (cpu, i) +
 				       sizeof (char) * j));
 		      }
 
@@ -2663,7 +2562,7 @@ step_once (SIM_DESC sd, SIM_CPU *cpu)
 	      }
 
 	    /* This is the original position of the stack pointer.  */
-	    old_sp = h8_get_reg (sd, SP_REGNUM);
+	    old_sp = h8_get_reg (cpu, SP_REGNUM);
 
 	    /* We need space from the stack to store the pointers to argvs.  */
 	    /* As we will infringe on the stack, we need to shift the stack
@@ -2713,16 +2612,16 @@ step_once (SIM_DESC sd, SIM_CPU *cpu)
 	    free (argv_ptrs);
 	    for (i = 0; i <= no_of_args; i++)
 	      {
-		free (h8_get_cmdline_arg (sd, i));
+		free (h8_get_cmdline_arg (cpu, i));
 	      }
-	    free (h8_get_command_line (sd));
+	    free (h8_get_command_line (cpu));
 
 	    /* The no. of argv arguments are returned in Reg 0.  */
-	    h8_set_reg (sd, 0, no_of_args);
+	    h8_set_reg (cpu, 0, no_of_args);
 	    /* The Pointer to argv in Register 1.  */
-	    h8_set_reg (sd, 1, new_sp);
+	    h8_set_reg (cpu, 1, new_sp);
 	    /* Setting the stack pointer to the new value.  */
-	    h8_set_reg (sd, SP_REGNUM, new_sp);
+	    h8_set_reg (cpu, SP_REGNUM, new_sp);
 	  }
 	  goto next;
 
@@ -2742,16 +2641,16 @@ step_once (SIM_DESC sd, SIM_CPU *cpu)
 	    if ((h8300sxmode || h8300hmode || h8300smode) && !h8300_normal_mode)
 	      {
 		filename_ptr = GET_L_REG (0);
-		mode = GET_MEMORY_L (h8_get_reg (sd, SP_REGNUM) + 4);
+		mode = GET_MEMORY_L (h8_get_reg (cpu, SP_REGNUM) + 4);
 	      }
 	    else
 	      {
 		filename_ptr = GET_W_REG (0);
-		mode = GET_MEMORY_W (h8_get_reg (sd, SP_REGNUM) + 2);
+		mode = GET_MEMORY_W (h8_get_reg (cpu, SP_REGNUM) + 2);
 	      }
 
 	    /* Trying to find the length of the filename.  */
-	    temp_char = GET_MEMORY_B (h8_get_reg (sd, 0));
+	    temp_char = GET_MEMORY_B (h8_get_reg (cpu, 0));
 
 	    len = 1;
 	    while (temp_char != '\0')
@@ -2774,7 +2673,7 @@ step_once (SIM_DESC sd, SIM_CPU *cpu)
 	    open_return = sim_callback->open (sim_callback, filename, mode);
 
 	    /* Return value in register 0.  */
-	    h8_set_reg (sd, 0, open_return);
+	    h8_set_reg (cpu, 0, open_return);
 
 	    /* Freeing memory used for filename. */
 	    free (filename);
@@ -2802,12 +2701,12 @@ step_once (SIM_DESC sd, SIM_CPU *cpu)
 	    /* The characters read are stored in cpu memory.  */
 	    for (i = 0; i < buf_size; i++)
 	      {
-		SET_MEMORY_B ((h8_get_reg (sd, 1) + (sizeof (char) * i)),
+		SET_MEMORY_B ((h8_get_reg (cpu, 1) + (sizeof (char) * i)),
 			      *(char_ptr + (sizeof (char) * i)));
 	      }
 
 	    /* Return value in Register 0.  */
-	    h8_set_reg (sd, 0, read_return);
+	    h8_set_reg (cpu, 0, read_return);
 
 	    /* Freeing memory used as buffer.  */
 	    free (char_ptr);
@@ -2843,7 +2742,7 @@ step_once (SIM_DESC sd, SIM_CPU *cpu)
 	    write_return = sim_callback->write (sim_callback, fd, ptr, len);
 
 	    /* Return value in Register 0.  */
-	    h8_set_reg (sd, 0, write_return);
+	    h8_set_reg (cpu, 0, write_return);
 
 	    /* Freeing memory used as buffer.  */
 	    free (ptr);
@@ -2866,7 +2765,7 @@ step_once (SIM_DESC sd, SIM_CPU *cpu)
 	      sim_callback->lseek (sim_callback, fd, offset, origin);
 
 	    /* Return value in register 0.  */
-	    h8_set_reg (sd, 0, lseek_return);
+	    h8_set_reg (cpu, 0, lseek_return);
 	  }
 	  goto next;
 
@@ -2881,7 +2780,7 @@ step_once (SIM_DESC sd, SIM_CPU *cpu)
 	    close_return = sim_callback->close (sim_callback, fd);
 
 	    /* Return value in register 0.  */
-	    h8_set_reg (sd, 0, close_return);
+	    h8_set_reg (cpu, 0, close_return);
 	  }
 	  goto next;
 
@@ -2929,7 +2828,7 @@ step_once (SIM_DESC sd, SIM_CPU *cpu)
 	    SET_MEMORY_L (stat_ptr, stat_rec.st_ctime);
 
 	    /* Return value in register 0.  */
-	    h8_set_reg (sd, 0, fstat_return);
+	    h8_set_reg (cpu, 0, fstat_return);
 	  }
 	  goto next;
 
@@ -2949,7 +2848,7 @@ step_once (SIM_DESC sd, SIM_CPU *cpu)
 	    filename_ptr = (h8300hmode && !h8300_normal_mode) ? GET_L_REG (0) : GET_W_REG (0);
 
 	    /* Trying to find the length of the filename.  */
-	    temp_char = GET_MEMORY_B (h8_get_reg (sd, 0));
+	    temp_char = GET_MEMORY_B (h8_get_reg (cpu, 0));
 
 	    len = 1;
 	    while (temp_char != '\0')
@@ -2969,7 +2868,7 @@ step_once (SIM_DESC sd, SIM_CPU *cpu)
 	      }
 
 	    /* Setting stat_ptr to second argument of stat.  */
-	    /* stat_ptr = h8_get_reg (sd, 1); */
+	    /* stat_ptr = h8_get_reg (cpu, 1); */
 	    stat_ptr = (h8300hmode && !h8300_normal_mode) ? GET_L_REG (1) : GET_W_REG (1);
 
 	    /* Callback stat and return.  */
@@ -3006,7 +2905,7 @@ step_once (SIM_DESC sd, SIM_CPU *cpu)
 	    SET_MEMORY_L (stat_ptr, stat_rec.st_ctime);
  
 	    /* Return value in register 0.  */
-	    h8_set_reg (sd, 0, stat_return);
+	    h8_set_reg (cpu, 0, stat_return);
 	  }
 	  goto next;
 	  /* End of system call processing.  */
@@ -3376,7 +3275,7 @@ step_once (SIM_DESC sd, SIM_CPU *cpu)
 	  if (fetch (sd, &code->src, &pc))
 	    goto end;
 	call:
-	  tmp = h8_get_reg (sd, SP_REGNUM);
+	  tmp = h8_get_reg (cpu, SP_REGNUM);
 
 	  if (h8300hmode && !h8300_normal_mode)
 	    {
@@ -3388,7 +3287,7 @@ step_once (SIM_DESC sd, SIM_CPU *cpu)
 	      tmp -= 2;
 	      SET_MEMORY_W (tmp, code->next_pc);
 	    }
-	  h8_set_reg (sd, SP_REGNUM, tmp);
+	  h8_set_reg (cpu, SP_REGNUM, tmp);
 
 	  goto end;
 
@@ -3403,35 +3302,35 @@ step_once (SIM_DESC sd, SIM_CPU *cpu)
 	case O (O_RTE, SN):		/* rte, return from exception */
 	rte:
 	  /* Pops exr and ccr before pc -- otherwise identical to rts.  */
-	  tmp = h8_get_reg (sd, SP_REGNUM);
+	  tmp = h8_get_reg (cpu, SP_REGNUM);
 
 	  if (h8300smode)			/* pop exr */
 	    {
-	      h8_set_exr (sd, GET_MEMORY_L (tmp));
+	      h8_set_exr (cpu, GET_MEMORY_L (tmp));
 	      tmp += 4;
 	    }
 	  if (h8300hmode && !h8300_normal_mode)
 	    {
-	      h8_set_ccr (sd, GET_MEMORY_L (tmp));
+	      h8_set_ccr (cpu, GET_MEMORY_L (tmp));
 	      tmp += 4;
 	      pc = GET_MEMORY_L (tmp);
 	      tmp += 4;
 	    }
 	  else
 	    {
-	      h8_set_ccr (sd, GET_MEMORY_W (tmp));
+	      h8_set_ccr (cpu, GET_MEMORY_W (tmp));
 	      tmp += 2;
 	      pc = GET_MEMORY_W (tmp);
 	      tmp += 2;
 	    }
 
-	  GETSR (sd);
-	  h8_set_reg (sd, SP_REGNUM, tmp);
+	  GETSR (cpu);
+	  h8_set_reg (cpu, SP_REGNUM, tmp);
 	  goto end;
 
 	case O (O_RTS, SN):		/* rts, return from subroutine */
 	rts:
-	  tmp = h8_get_reg (sd, SP_REGNUM);
+	  tmp = h8_get_reg (cpu, SP_REGNUM);
 
 	  if (h8300hmode && !h8300_normal_mode)
 	    {
@@ -3444,7 +3343,7 @@ step_once (SIM_DESC sd, SIM_CPU *cpu)
 	      tmp += 2;
 	    }
 
-	  h8_set_reg (sd, SP_REGNUM, tmp);
+	  h8_set_reg (cpu, SP_REGNUM, tmp);
 	  goto end;
 
 	case O (O_ILL, SB):		/* illegal */
@@ -3453,23 +3352,23 @@ step_once (SIM_DESC sd, SIM_CPU *cpu)
 
 	case O (O_SLEEP, SN):		/* sleep */
 	  /* Check for magic numbers in r1 and r2.  */
-	  if ((h8_get_reg (sd, R1_REGNUM) & 0xffff) == LIBC_EXIT_MAGIC1 &&
-	      (h8_get_reg (sd, R2_REGNUM) & 0xffff) == LIBC_EXIT_MAGIC2 &&
-	      SIM_WIFEXITED (h8_get_reg (sd, 0)))
+	  if ((h8_get_reg (cpu, R1_REGNUM) & 0xffff) == LIBC_EXIT_MAGIC1 &&
+	      (h8_get_reg (cpu, R2_REGNUM) & 0xffff) == LIBC_EXIT_MAGIC2 &&
+	      SIM_WIFEXITED (h8_get_reg (cpu, 0)))
 	    {
 	      /* This trap comes from _exit, not from gdb.  */
 	      sim_engine_halt (sd, cpu, NULL, pc, sim_exited,
-			       SIM_WEXITSTATUS (h8_get_reg (sd, 0)));
+			       SIM_WEXITSTATUS (h8_get_reg (cpu, 0)));
 	    }
 #if 0
 	  /* Unfortunately this won't really work, because
 	     when we take a breakpoint trap, R0 has a "random", 
 	     user-defined value.  Don't see any immediate solution.  */
-	  else if (SIM_WIFSTOPPED (h8_get_reg (sd, 0)))
+	  else if (SIM_WIFSTOPPED (h8_get_reg (cpu, 0)))
 	    {
 	      /* Pass the stop signal up to gdb.  */
 	      sim_engine_halt (sd, cpu, NULL, pc, sim_stopped,
-			       SIM_WSTOPSIG (h8_get_reg (sd, 0)));
+			       SIM_WSTOPSIG (h8_get_reg (cpu, 0)));
 	    }
 #endif
 	  else
@@ -3483,31 +3382,31 @@ step_once (SIM_DESC sd, SIM_CPU *cpu)
 	  if (fetch (sd, &code->src, &res))
    	    goto end;			/* res is vector number.  */
   
-   	  tmp = h8_get_reg (sd, SP_REGNUM);
+   	  tmp = h8_get_reg (cpu, SP_REGNUM);
    	  if(h8300_normal_mode)
    	    {
    	      tmp -= 2;
    	      SET_MEMORY_W (tmp, code->next_pc);
    	      tmp -= 2;
-   	      SET_MEMORY_W (tmp, h8_get_ccr (sd));
+   	      SET_MEMORY_W (tmp, h8_get_ccr (cpu));
    	    }
    	  else
    	    {
    	      tmp -= 4;
    	      SET_MEMORY_L (tmp, code->next_pc);
    	      tmp -= 4;
-   	      SET_MEMORY_L (tmp, h8_get_ccr (sd));
+   	      SET_MEMORY_L (tmp, h8_get_ccr (cpu));
    	    }
    	  intMaskBit = 1;
-   	  BUILDSR (sd);
+   	  BUILDSR (cpu);
  
 	  if (h8300smode)
 	    {
 	      tmp -= 4;
-	      SET_MEMORY_L (tmp, h8_get_exr (sd));
+	      SET_MEMORY_L (tmp, h8_get_exr (cpu));
 	    }
 
-	  h8_set_reg (sd, SP_REGNUM, tmp);
+	  h8_set_reg (cpu, SP_REGNUM, tmp);
 
 	  if(h8300_normal_mode)
 	    pc = GET_MEMORY_L (0x10 + res * 2); /* Vector addresses are 0x10,0x12,0x14 and 0x16 */
@@ -3615,28 +3514,28 @@ step_once (SIM_DESC sd, SIM_CPU *cpu)
 	  goto next;
 
 	case O (O_CLRMAC, SN):		/* clrmac */
-	  h8_set_mach (sd, 0);
-	  h8_set_macl (sd, 0);
-	  h8_set_macZ (sd, 1);
-	  h8_set_macV (sd, 0);
-	  h8_set_macN (sd, 0);
+	  h8_set_mach (cpu, 0);
+	  h8_set_macl (cpu, 0);
+	  h8_set_macZ (cpu, 1);
+	  h8_set_macV (cpu, 0);
+	  h8_set_macN (cpu, 0);
 	  goto next;
 
 	case O (O_STMAC, SL):		/* stmac, 260 */
 	  switch (code->src.type) {
 	  case X (OP_MACH, SL): 
-	    res = h8_get_mach (sd);
+	    res = h8_get_mach (cpu);
 	    if (res & 0x200)		/* sign extend */
 	      res |= 0xfffffc00;
 	    break;
 	  case X (OP_MACL, SL): 
-	    res = h8_get_macl (sd);
+	    res = h8_get_macl (cpu);
 	    break;
 	  default:	goto illegal;
 	  }
-	  nz = !h8_get_macZ (sd);
-	  n = h8_get_macN (sd);
-	  v = h8_get_macV (sd);
+	  nz = !h8_get_macZ (cpu);
+	  n = h8_get_macN (cpu);
+	  v = h8_get_macV (cpu);
 
 	  if (store (sd, &code->dst, res))
 	    goto end;
@@ -3650,14 +3549,14 @@ step_once (SIM_DESC sd, SIM_CPU *cpu)
 	  switch (code->dst.type) {
 	  case X (OP_MACH, SL):	
 	    rd &= 0x3ff;		/* Truncate to 10 bits */
-	    h8_set_mach (sd, rd);
+	    h8_set_mach (cpu, rd);
 	    break;
 	  case X (OP_MACL, SL):	
-	    h8_set_macl (sd, rd);
+	    h8_set_macl (cpu, rd);
 	    break;
 	  default:	goto illegal;
 	  }
-	  h8_set_macV (sd, 0);
+	  h8_set_macV (cpu, 0);
 	  goto next;
 
 	case O (O_MAC, SW):
@@ -3669,25 +3568,25 @@ step_once (SIM_DESC sd, SIM_CPU *cpu)
 	     However, the existing mul/div code is similar.  */
 	  res = SEXTSHORT (res) * SEXTSHORT (rd);
 
-	  if (h8_get_macS (sd))		/* Saturating mode */
+	  if (h8_get_macS (cpu))		/* Saturating mode */
 	    {
-	      long long mac = h8_get_macl (sd);
+	      long long mac = h8_get_macl (cpu);
 
 	      if (mac & 0x80000000)		/* sign extend */
 		mac |= 0xffffffff00000000LL;
 
 	      mac += res;
 	      if (mac > 0x7fffffff || mac < 0xffffffff80000000LL)
-		h8_set_macV (sd, 1);
-	      h8_set_macZ (sd, (mac == 0));
-	      h8_set_macN (sd, (mac  < 0));
-	      h8_set_macl (sd, (int) mac);
+		h8_set_macV (cpu, 1);
+	      h8_set_macZ (cpu, (mac == 0));
+	      h8_set_macN (cpu, (mac  < 0));
+	      h8_set_macl (cpu, (int) mac);
 	    }
 	  else				/* "Less Saturating" mode */
 	    {
-	      long long mac = h8_get_mach (sd);
+	      long long mac = h8_get_mach (cpu);
 	      mac <<= 32;
-	      mac += h8_get_macl (sd);
+	      mac += h8_get_macl (cpu);
 
 	      if (mac & 0x20000000000LL)	/* sign extend */
 		mac |= 0xfffffc0000000000LL;
@@ -3695,12 +3594,12 @@ step_once (SIM_DESC sd, SIM_CPU *cpu)
 	      mac += res;
 	      if (mac > 0x1ffffffffffLL || 
 		  mac < (long long) 0xfffffe0000000000LL)
-		h8_set_macV (sd, 1);
-	      h8_set_macZ (sd, (mac == 0));
-	      h8_set_macN (sd, (mac  < 0));
-	      h8_set_macl (sd, (int) mac);
+		h8_set_macV (cpu, 1);
+	      h8_set_macZ (cpu, (mac == 0));
+	      h8_set_macN (cpu, (mac  < 0));
+	      h8_set_macl (cpu, (int) mac);
 	      mac >>= 32;
-	      h8_set_mach (sd, (int) (mac & 0x3ff));
+	      h8_set_mach (cpu, (int) (mac & 0x3ff));
 	    }
 	  goto next;
 
@@ -4105,8 +4004,8 @@ step_once (SIM_DESC sd, SIM_CPU *cpu)
 	    firstreg &= 0xf;
 	    for (i = firstreg; i <= firstreg + nregs; i++)
 	      {
-		h8_set_reg (sd, SP_REGNUM, h8_get_reg (sd, SP_REGNUM) - 4);
-		SET_MEMORY_L (h8_get_reg (sd, SP_REGNUM), h8_get_reg (sd, i));
+		h8_set_reg (cpu, SP_REGNUM, h8_get_reg (cpu, SP_REGNUM) - 4);
+		SET_MEMORY_L (h8_get_reg (cpu, SP_REGNUM), h8_get_reg (cpu, i));
 	      }
 	  }
 	  goto next;
@@ -4121,8 +4020,8 @@ step_once (SIM_DESC sd, SIM_CPU *cpu)
 	    firstreg = code->dst.reg & 0xf;
 	    for (i = firstreg; i >= firstreg - nregs; i--)
 	      {
-		h8_set_reg (sd, i, GET_MEMORY_L (h8_get_reg (sd, SP_REGNUM)));
-		h8_set_reg (sd, SP_REGNUM, h8_get_reg (sd, SP_REGNUM) + 4);
+		h8_set_reg (cpu, i, GET_MEMORY_L (h8_get_reg (cpu, SP_REGNUM)));
+		h8_set_reg (cpu, SP_REGNUM, h8_get_reg (cpu, SP_REGNUM) + 4);
 	      }
 	  }
 	  switch (code->opcode) {
@@ -4202,18 +4101,18 @@ step_once (SIM_DESC sd, SIM_CPU *cpu)
       if (code->dst.type == X (OP_CCR, SB) ||
 	  code->dst.type == X (OP_CCR, SW))
 	{
-	  h8_set_ccr (sd, res);
-	  GETSR (sd);
+	  h8_set_ccr (cpu, res);
+	  GETSR (cpu);
 	}
       else if (h8300smode &&
 	       (code->dst.type == X (OP_EXR, SB) ||
 		code->dst.type == X (OP_EXR, SW)))
 	{
-	  h8_set_exr (sd, res);
+	  h8_set_exr (cpu, res);
 	  if (h8300smode)	/* Get exr.  */
 	    {
-	      trace = (h8_get_exr (sd) >> 7) & 1;
-	      intMask = h8_get_exr (sd) & 7;
+	      trace = (h8_get_exr (cpu) >> 7) & 1;
+	      intMask = h8_get_exr (cpu) & 7;
 	    }
 	}
       else
@@ -4398,10 +4297,10 @@ step_once (SIM_DESC sd, SIM_CPU *cpu)
       goto next;
 
     next:
-      if ((res = h8_get_delayed_branch (sd)) != 0)
+      if ((res = h8_get_delayed_branch (cpu)) != 0)
 	{
 	  pc = res;
-	  h8_set_delayed_branch (sd, 0);
+	  h8_set_delayed_branch (cpu, 0);
 	}
       else
 	pc = code->next_pc;
@@ -4409,16 +4308,16 @@ step_once (SIM_DESC sd, SIM_CPU *cpu)
     } while (0);
 
  end:
-  h8_set_ticks (sd, h8_get_ticks (sd) + get_now () - tick_start);
-  h8_set_cycles (sd, h8_get_cycles (sd) + cycles);
-  h8_set_insts (sd, h8_get_insts (sd) + insts);
-  h8_set_pc (sd, pc);
-  BUILDSR (sd);
+  h8_set_ticks (cpu, h8_get_ticks (cpu) + get_now () - tick_start);
+  h8_set_cycles (cpu, h8_get_cycles (cpu) + cycles);
+  h8_set_insts (cpu, h8_get_insts (cpu) + insts);
+  cpu_set_pc (cpu, pc);
+  BUILDSR (cpu);
 
   if (h8300smode)
-    h8_set_exr (sd, (trace<<7) | intMask);
+    h8_set_exr (cpu, (trace<<7) | intMask);
 
-  h8_set_mask (sd, oldmask);
+  h8_set_mask (cpu, oldmask);
 }
 
 void
@@ -4444,6 +4343,7 @@ sim_engine_run (SIM_DESC sd,
 int
 sim_write (SIM_DESC sd, SIM_ADDR addr, const void *buffer, int size)
 {
+  sim_cpu *cpu = STATE_CPU (sd, 0);
   int i;
   const unsigned char *data = buffer;
 
@@ -4454,7 +4354,7 @@ sim_write (SIM_DESC sd, SIM_ADDR addr, const void *buffer, int size)
     {
       if (addr < memory_size)
 	{
-	  h8_set_memory (sd, addr + i, data[i]);
+	  h8_set_memory (cpu, addr + i, data[i]);
 	}
       else
 	break;
@@ -4465,11 +4365,13 @@ sim_write (SIM_DESC sd, SIM_ADDR addr, const void *buffer, int size)
 int
 sim_read (SIM_DESC sd, SIM_ADDR addr, void *buffer, int size)
 {
+  sim_cpu *cpu = STATE_CPU (sd, 0);
+
   init_pointers (sd);
   if (addr < 0)
     return 0;
   if (addr + size < memory_size)
-    memcpy (buffer, h8_get_memory_buf (sd) + addr, size);
+    memcpy (buffer, h8_get_memory_buf (cpu) + addr, size);
   else
     return 0;
   return size;
@@ -4492,9 +4394,9 @@ h8300_reg_store (SIM_CPU *cpu, int rn, const void *buf, int length)
     {
     case PC_REGNUM:
       if(h8300_normal_mode)
-        cpu->pc = shortval; /* PC for Normal mode is 2 bytes */
+	cpu_set_pc (cpu, shortval); /* PC for Normal mode is 2 bytes */
       else
-        cpu->pc = intval;
+	cpu_set_pc (cpu, intval);
       break;
     default:
       return -1;
@@ -4512,12 +4414,12 @@ h8300_reg_store (SIM_CPU *cpu, int rn, const void *buf, int length)
     case VBR_REGNUM:
     case MACH_REGNUM:
     case MACL_REGNUM:
-      cpu->regs[rn] = intval;
+      h8_set_reg (cpu, rn, intval);
       break;
     case CYCLE_REGNUM:
     case INST_REGNUM:
     case TICK_REGNUM:
-      cpu->regs[rn] = longval;
+      h8_set_reg (cpu, rn, longval);
       break;
     }
   return length;
@@ -4539,7 +4441,7 @@ h8300_reg_fetch (SIM_CPU *cpu, int rn, void *buf, int length)
     default:
       return -1;
     case PC_REGNUM:
-      v = cpu->pc;
+      v = cpu_get_pc (cpu);
       break;
     case CCR_REGNUM:
     case EXR_REGNUM:
@@ -4555,12 +4457,12 @@ h8300_reg_fetch (SIM_CPU *cpu, int rn, void *buf, int length)
     case R5_REGNUM:
     case R6_REGNUM:
     case R7_REGNUM:
-      v = cpu->regs[rn];
+      v = h8_get_reg (cpu, rn);
       break;
     case CYCLE_REGNUM:
     case TICK_REGNUM:
     case INST_REGNUM:
-      v = cpu->regs[rn];
+      v = h8_get_reg (cpu, rn);
       longreg = 1;
       break;
     case ZERO_REGNUM:
@@ -4587,12 +4489,13 @@ h8300_reg_fetch (SIM_CPU *cpu, int rn, void *buf, int length)
 void
 sim_info (SIM_DESC sd, int verbose)
 {
+  sim_cpu *cpu = STATE_CPU (sd, 0);
   const struct h8300_sim_state *state = H8300_SIM_STATE (sd);
-  double timetaken = (double) h8_get_ticks (sd) / (double) now_persec ();
-  double virttime = h8_get_cycles (sd) / 10.0e6;
+  double timetaken = (double) h8_get_ticks (cpu) / (double) now_persec ();
+  double virttime = h8_get_cycles (cpu) / 10.0e6;
 
-  sim_io_printf (sd, "\n\n#instructions executed  %10d\n", h8_get_insts (sd));
-  sim_io_printf (sd, "#cycles (v approximate) %10d\n", h8_get_cycles (sd));
+  sim_io_printf (sd, "\n\n#instructions executed  %10d\n", h8_get_insts (cpu));
+  sim_io_printf (sd, "#cycles (v approximate) %10d\n", h8_get_cycles (cpu));
   sim_io_printf (sd, "#real time taken        %10.4f\n", timetaken);
   sim_io_printf (sd, "#virtual time taken     %10.4f\n", virttime);
   if (timetaken != 0.0)
@@ -4734,7 +4637,7 @@ sim_open (SIM_OPEN_KIND kind,
 
   cpu = STATE_CPU (sd, 0);
   SIM_ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER);
-  cpu->regs[SBR_REGNUM] = 0xFFFFFF00;
+  h8_set_reg (cpu, SBR_REGNUM, 0xFFFFFF00);
   /* sim_cpu object is new, so some initialization is needed.  */
   init_pointers_needed = 1;
 
@@ -4804,6 +4707,7 @@ sim_open (SIM_OPEN_KIND kind,
 SIM_RC
 sim_load (SIM_DESC sd, const char *prog, bfd *abfd, int from_tty)
 {
+  sim_cpu *cpu = STATE_CPU (sd, 0);
   struct h8300_sim_state *state = H8300_SIM_STATE (sd);
   bfd *prog_bfd;
 
@@ -4849,10 +4753,10 @@ sim_load (SIM_DESC sd, const char *prog, bfd *abfd, int from_tty)
   else
     memory_size = H8300_MSIZE;
 
-  if (h8_get_memory_buf (sd))
-    free (h8_get_memory_buf (sd));
+  if (h8_get_memory_buf (cpu))
+    free (h8_get_memory_buf (cpu));
 
-  h8_set_memory_buf (sd, (unsigned char *) 
+  h8_set_memory_buf (cpu, (unsigned char *)
 		     calloc (sizeof (char), memory_size));
   state->memory_size = memory_size;
 
@@ -4862,7 +4766,7 @@ sim_load (SIM_DESC sd, const char *prog, bfd *abfd, int from_tty)
       sim_io_printf (sd, "sim_load: bad memory size.\n");
       return SIM_RC_FAIL;
     }
-  h8_set_mask (sd, memory_size - 1);
+  h8_set_mask (cpu, memory_size - 1);
 
   if (sim_load_file (sd, STATE_MY_NAME (sd), STATE_CALLBACK (sd), prog,
 		     prog_bfd, STATE_OPEN_KIND (sd) == SIM_OPEN_DEBUG,
@@ -4885,14 +4789,15 @@ SIM_RC
 sim_create_inferior (SIM_DESC sd, struct bfd *abfd,
 		     char * const *argv, char * const *env)
 {
+  SIM_CPU *cpu = STATE_CPU (sd, 0);
   int i = 0;
   int len_arg = 0;
   int no_of_args = 0;
 
   if (abfd != NULL)
-    h8_set_pc (sd, bfd_get_start_address (abfd));
+    cpu_set_pc (cpu, bfd_get_start_address (abfd));
   else
-    h8_set_pc (sd, 0);
+    cpu_set_pc (cpu, 0);
 
   /* Command Line support.  */
   if (argv != NULL)
@@ -4902,15 +4807,15 @@ sim_create_inferior (SIM_DESC sd, struct bfd *abfd,
         continue;
 
       /* Allocating memory for the argv pointers.  */
-      h8_set_command_line (sd, (char **) malloc ((sizeof (char *))
+      h8_set_command_line (cpu, (char **) malloc ((sizeof (char *))
 						 * (no_of_args + 1)));
 
       for (i = 0; i < no_of_args; i++)
 	{
 	  /* Copying the argument string.  */
-	  h8_set_cmdline_arg (sd, i, (char *) strdup (argv[i]));
+	  h8_set_cmdline_arg (cpu, i, (char *) strdup (argv[i]));
 	}
-      h8_set_cmdline_arg (sd, i, NULL);
+      h8_set_cmdline_arg (cpu, i, NULL);
     }
   
   return SIM_RC_OK;