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author | Mike Frysinger <vapier@gentoo.org> | 2015-11-15 02:57:42 -0800 |
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committer | Mike Frysinger <vapier@gentoo.org> | 2015-11-15 21:46:13 -0500 |
commit | 267b3b8e068f5043419991175bdbc56eb7a575be (patch) | |
tree | 95ccaa415abddee402e0cfffd1710e2380f26597 /sim/cr16/cr16_sim.h | |
parent | 137fbfd2818b5d1443f5f628e28b55b4e23037d1 (diff) | |
download | binutils-267b3b8e068f5043419991175bdbc56eb7a575be.zip binutils-267b3b8e068f5043419991175bdbc56eb7a575be.tar.gz binutils-267b3b8e068f5043419991175bdbc56eb7a575be.tar.bz2 |
sim: cr16: push down sd/cpu vars
By itself, this commit doesn't really change anything. It lays the
groundwork for using the cpu state in follow up commits, both for
engine state and for cpu state. Splitting things up this way so it
is easier to see how things have changed.
Diffstat (limited to 'sim/cr16/cr16_sim.h')
-rw-r--r-- | sim/cr16/cr16_sim.h | 24 |
1 files changed, 12 insertions, 12 deletions
diff --git a/sim/cr16/cr16_sim.h b/sim/cr16/cr16_sim.h index e9769ac..5167ade 100644 --- a/sim/cr16/cr16_sim.h +++ b/sim/cr16/cr16_sim.h @@ -66,7 +66,7 @@ struct simops uint32 opcode; int format; char fname[12]; - void (*func)(); + void (*func)(SIM_DESC, SIM_CPU *); int numops; operand_desc operands[4]; }; @@ -251,8 +251,8 @@ struct _state creg_t cregs[16]; /* control registers */ #define CREG(N) (State.cregs[(N)] + 0) -#define SET_CREG(N,VAL) move_to_cr ((N), 0, (VAL), 0) -#define SET_HW_CREG(N,VAL) move_to_cr ((N), 0, (VAL), 1) +#define SET_CREG(N,VAL) move_to_cr (sd, cpu, (N), 0, (VAL), 0) +#define SET_HW_CREG(N,VAL) move_to_cr (sd, cpu, (N), 0, (VAL), 1) reg_t sp[2]; /* holding area for SPI(0)/SPU(1) */ #define HELD_SP(N) (State.sp[(N)] + 0) @@ -318,7 +318,7 @@ enum #define PSR CREG (PSR_CR) #define SET_PSR(VAL) SET_CREG (PSR_CR, (VAL)) #define SET_HW_PSR(VAL) SET_HW_CREG (PSR_CR, (VAL)) -#define SET_PSR_BIT(MASK,VAL) move_to_cr (PSR_CR, ~((creg_t) MASK), (VAL) ? (MASK) : 0, 1) +#define SET_PSR_BIT(MASK,VAL) move_to_cr (sd, cpu, PSR_CR, ~((creg_t) MASK), (VAL) ? (MASK) : 0, 1) #define PSR_SM ((PSR & PSR_SM_BIT) != 0) #define SET_PSR_SM(VAL) SET_PSR_BIT (PSR_SM_BIT, (VAL)) @@ -421,11 +421,11 @@ enum /* sign-extend a 32-bit number */ #define SEXT32(x) ((((x)&0xffffffff)^(~0x7fffffff))+0x80000000) -extern uint8 *dmem_addr (uint32 offset); -extern uint8 *imem_addr (uint32); +extern uint8 *dmem_addr (SIM_DESC, SIM_CPU *, uint32 offset); +extern uint8 *imem_addr (SIM_DESC, SIM_CPU *, uint32); extern bfd_vma decode_pc (void); -#define RB(x) (*(dmem_addr(x))) +#define RB(x) (*(dmem_addr (sd, cpu, x))) #define SB(addr,data) ( RB(addr) = (data & 0xff)) #if defined(__GNUC__) && defined(__OPTIMIZE__) && !defined(NO_ENDIAN_INLINE) @@ -440,10 +440,10 @@ extern void write_word (uint8 *addr, uint16 data); extern void write_longword (uint8 *addr, uint32 data); #endif -#define SW(addr,data) write_word(dmem_addr(addr),data) -#define RW(x) get_word(dmem_addr(x)) -#define SLW(addr,data) write_longword(dmem_addr(addr),data) -#define RLW(x) get_longword(dmem_addr(x)) +#define SW(addr,data) write_word (dmem_addr (sd, cpu, addr), data) +#define RW(x) get_word (dmem_addr (sd, cpu, x)) +#define SLW(addr,data) write_longword (dmem_addr (sd, cpu, addr), data) +#define RLW(x) get_longword (dmem_addr (sd, cpu, x)) #define READ_16(x) get_word(x) #define JMP(x) do { SET_PC (x); State.pc_changed = 1; } while (0) @@ -467,7 +467,7 @@ extern void write_longword (uint8 *addr, uint32 data); (VAL & ~MASK)). In addition, unless PSR_HW_P, a VAL intended for PSR is masked for zero bits. */ -extern creg_t move_to_cr (int cr, creg_t mask, creg_t val, int psw_hw_p); +extern creg_t move_to_cr (SIM_DESC, SIM_CPU *, int cr, creg_t mask, creg_t val, int psw_hw_p); #ifndef SIGTRAP #define SIGTRAP 5 |