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authorJoel Brobecker <brobecker@adacore.com>2018-01-01 08:43:02 +0400
committerJoel Brobecker <brobecker@adacore.com>2018-01-02 07:38:06 +0400
commite2882c85786571175a0b0bfc3bcd2f14620b1ea3 (patch)
tree5033409aa5b63af816330509f8dc7deb4e0361dd /sim/bfin/dv-bfin_uart2.c
parent1690bb24d855c387211f7bc5a77334c11cc75f4b (diff)
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Update copyright year range in all GDB files
gdb/ChangeLog: Update copyright year range in all GDB files
Diffstat (limited to 'sim/bfin/dv-bfin_uart2.c')
-rw-r--r--sim/bfin/dv-bfin_uart2.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/sim/bfin/dv-bfin_uart2.c b/sim/bfin/dv-bfin_uart2.c
index e3a13e4..c0627f5 100644
--- a/sim/bfin/dv-bfin_uart2.c
+++ b/sim/bfin/dv-bfin_uart2.c
@@ -1,7 +1,7 @@
/* Blackfin Universal Asynchronous Receiver/Transmitter (UART) model.
For "new style" UARTs on BF50x/BF54x parts.
- Copyright (C) 2010-2017 Free Software Foundation, Inc.
+ Copyright (C) 2010-2018 Free Software Foundation, Inc.
Contributed by Analog Devices, Inc.
This file is part of simulators.