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| author | Mike Frysinger <vapier@gentoo.org> | 2013-05-15 17:49:44 +0000 |
|---|---|---|
| committer | Mike Frysinger <vapier@gentoo.org> | 2013-05-15 17:49:44 +0000 |
| commit | 590919de6c670394fb3bc42bd99e559f04ee8edc (patch) | |
| tree | 72bc0c171d223c6cc7dfb42118e2608d5585a418 /sim/arm | |
| parent | ed0f00b834265be723abc3fba882804bfc1f8f71 (diff) | |
| download | binutils-590919de6c670394fb3bc42bd99e559f04ee8edc.zip binutils-590919de6c670394fb3bc42bd99e559f04ee8edc.tar.gz binutils-590919de6c670394fb3bc42bd99e559f04ee8edc.tar.bz2 | |
sim: arm: add support for MOVW and MOVT instructions
From: Jayant R. Sonar <Jayant.Sonar@kpitcummins.com>
This patch adds simulator support for handling the armv7 instructions
'movw (immediate)' and 'movt'.
Compiler frequently use these instructions to load the 32bit addresses of
global variables, string pointers etc. into the general registers.
In absence of support of these instructions:
1. GDB run simulator fails to print even simple "hello world" string
on console.
2. Loading of global variable addresses into the registers fail causing
arithmetic operation failures.
Patch has been regression tested for arm-none-eabi (-march=armv7-a).
Diffstat (limited to 'sim/arm')
| -rw-r--r-- | sim/arm/ChangeLog | 5 | ||||
| -rw-r--r-- | sim/arm/armemu.c | 12 |
2 files changed, 13 insertions, 4 deletions
diff --git a/sim/arm/ChangeLog b/sim/arm/ChangeLog index 78f0f3b..8babf09 100644 --- a/sim/arm/ChangeLog +++ b/sim/arm/ChangeLog @@ -1,3 +1,8 @@ +2013-05-07 Jayant Sonar <jayant.sonar@kpitcummins.com> + Kaushik Phatak <Kaushik.Phatak@kpitcummins.com> + + * armemu.c (ARMul_Emulate32): Emulate instructions MOVW and MOVT. + 2012-12-19 Joel Brobecker <brobecker@adacore.com> * COPYING: Update to GPL version 3. diff --git a/sim/arm/armemu.c b/sim/arm/armemu.c index e728813..20a36bc 100644 --- a/sim/arm/armemu.c +++ b/sim/arm/armemu.c @@ -2315,8 +2315,10 @@ check_PMUintr: WRITESDEST (dest); break; - case 0x30: /* TST immed */ - UNDEF_Test; + case 0x30: /* MOVW immed */ + dest = BITS (0, 11); + dest |= (BITS (16, 19) << 12); + WRITEDEST (dest); break; case 0x31: /* TSTP immed */ @@ -2368,8 +2370,10 @@ check_PMUintr: } break; - case 0x34: /* CMP immed */ - UNDEF_Test; + case 0x34: /* MOVT immed */ + dest = BITS (0, 11); + dest |= (BITS (16, 19) << 12); + DEST |= (dest << 16); break; case 0x35: /* CMPP immed */ |