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authorNick Clifton <nickc@redhat.com>2016-03-03 15:14:35 +0000
committerNick Clifton <nickc@redhat.com>2016-03-03 15:22:53 +0000
commit57aa17424380be1c3e362a5601071f1f3a6f74f6 (patch)
treee81c24eb3aee8c69ecb7eb0d063dfb2da003ea24 /sim/aarch64/ChangeLog
parentc40c8d4b6793b71eed7cf9fa7467edda2271dc86 (diff)
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Fix bugs in the simulation of the AArch64's ADDP, FADDP, LD1, CCMP and CCMP instructions.
* simulator.c (set_flags_for_sub32): Correct type of signbit. (CondCompare): Swap interpretation of bit 30. (DO_ADDP): Delete macro. (do_vec_ADDP): Copy source registers before starting to update destination register. (do_vec_FADDP): Likewise. (do_vec_load_store): Fix computation of sizeof_operation. (rbit64): Fix type of constant. (aarch64_step): When displaying insn value, display all 32 bits.
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@@ -1,3 +1,15 @@
+2016-03-03 Nick Clifton <nickc@redhat.com>
+
+ * simulator.c (set_flags_for_sub32): Correct type of signbit.
+ (CondCompare): Swap interpretation of bit 30.
+ (DO_ADDP): Delete macro.
+ (do_vec_ADDP): Copy source registers before starting to update
+ destination register.
+ (do_vec_FADDP): Likewise.
+ (do_vec_load_store): Fix computation of sizeof_operation.
+ (rbit64): Fix type of constant.
+ (aarch64_step): When displaying insn value, display all 32 bits.
+
2016-01-10 Mike Frysinger <vapier@gentoo.org>
* config.in, configure: Regenerate.